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authorArnd Bergmann <arnd@arndb.de>2011-09-20 16:15:55 -0400
committerArnd Bergmann <arnd@arndb.de>2011-09-20 16:15:55 -0400
commitda1c5afee092a2b51136ac3bf20c68bfff2924be (patch)
treefa71b9e3af25c870012a22e4cb72547f9aafcfd0 /arch
parent1fdb4888e45f1413972a8e9da55f3ffc08b9abcb (diff)
parent4c59de052e7167a3bcf3f32c5ea4c9a5ef07386a (diff)
Merge branch 'samsung/cleanup' into next/cleanup
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/Kconfig12
-rw-r--r--arch/arm/boot/compressed/mmcif-sh7372.c2
-rw-r--r--arch/arm/boot/compressed/sdhi-sh7372.c2
-rw-r--r--arch/arm/include/asm/hardware/cache-l2x0.h11
-rw-r--r--arch/arm/include/asm/pmu.h10
-rw-r--r--arch/arm/kernel/pmu.c26
-rw-r--r--arch/arm/kernel/relocate_kernel.S3
-rw-r--r--arch/arm/kernel/setup.c15
-rw-r--r--arch/arm/kernel/smp_twd.c4
-rw-r--r--arch/arm/mach-at91/at91sam9261.c2
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/entry-macro.S1
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/system.h1
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/uncompress.h1
-rw-r--r--arch/arm/mach-cns3xxx/pcie.c2
-rw-r--r--arch/arm/mach-davinci/board-da850-evm.c28
-rw-r--r--arch/arm/mach-davinci/include/mach/psc.h2
-rw-r--r--arch/arm/mach-davinci/sleep.S6
-rw-r--r--arch/arm/mach-ep93xx/include/mach/ts72xx.h26
-rw-r--r--arch/arm/mach-exynos4/Kconfig17
-rw-r--r--arch/arm/mach-exynos4/Makefile2
-rw-r--r--arch/arm/mach-exynos4/clock.c2
-rw-r--r--arch/arm/mach-exynos4/cpu.c11
-rw-r--r--arch/arm/mach-exynos4/include/mach/irqs.h5
-rw-r--r--arch/arm/mach-exynos4/include/mach/regs-pmu.h2
-rw-r--r--arch/arm/mach-exynos4/irq-eint.c7
-rw-r--r--arch/arm/mach-exynos4/mach-smdkc210.c309
-rw-r--r--arch/arm/mach-exynos4/mach-smdkv310.c78
-rw-r--r--arch/arm/mach-exynos4/mach-universal_c210.c4
-rw-r--r--arch/arm/mach-exynos4/setup-usb-phy.c2
-rw-r--r--arch/arm/mach-footbridge/Kconfig1
-rw-r--r--arch/arm/mach-footbridge/dc21285.c1
-rw-r--r--arch/arm/mach-imx/mach-cpuimx27.c2
-rw-r--r--arch/arm/mach-imx/mach-cpuimx35.c2
-rw-r--r--arch/arm/mach-imx/mach-eukrea_cpuimx25.c2
-rw-r--r--arch/arm/mach-integrator/integrator_ap.c6
-rw-r--r--arch/arm/mach-orion5x/dns323-setup.c2
-rw-r--r--arch/arm/mach-orion5x/pci.c1
-rw-r--r--arch/arm/mach-prima2/clock.c1
-rw-r--r--arch/arm/mach-prima2/irq.c1
-rw-r--r--arch/arm/mach-prima2/rstc.c1
-rw-r--r--arch/arm/mach-prima2/timer.c1
-rw-r--r--arch/arm/mach-realview/include/mach/system.h1
-rw-r--r--arch/arm/mach-s3c2410/Kconfig6
-rw-r--r--arch/arm/mach-s3c2410/Makefile1
-rw-r--r--arch/arm/mach-s3c2410/dma.c14
-rw-r--r--arch/arm/mach-s3c2410/gpio.c72
-rw-r--r--arch/arm/mach-s3c2410/include/mach/map.h52
-rw-r--r--arch/arm/mach-s3c2412/Kconfig1
-rw-r--r--arch/arm/mach-s3c2412/Makefile1
-rw-r--r--arch/arm/mach-s3c2412/dma.c18
-rw-r--r--arch/arm/mach-s3c2412/gpio.c62
-rw-r--r--arch/arm/mach-s3c2440/Kconfig2
-rw-r--r--arch/arm/mach-s3c2440/dma.c17
-rw-r--r--arch/arm/mach-s3c2443/dma.c27
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/map.h9
-rw-r--r--arch/arm/mach-s3c64xx/mach-crag6410.c3
-rw-r--r--arch/arm/mach-s3c64xx/mach-mini6410.c8
-rw-r--r--arch/arm/mach-s3c64xx/mach-real6410.c8
-rw-r--r--arch/arm/mach-s3c64xx/mach-smdk6410.c8
-rw-r--r--arch/arm/mach-s3c64xx/pm.c1
-rw-r--r--arch/arm/mach-s5p64x0/irq-eint.c2
-rw-r--r--arch/arm/mach-s5p64x0/mach-smdk6440.c8
-rw-r--r--arch/arm/mach-s5p64x0/mach-smdk6450.c8
-rw-r--r--arch/arm/mach-s5pc100/mach-smdkc100.c8
-rw-r--r--arch/arm/mach-s5pv210/Kconfig6
-rw-r--r--arch/arm/mach-s5pv210/Makefile2
-rw-r--r--arch/arm/mach-s5pv210/mach-smdkv210.c8
-rw-r--r--arch/arm/mach-s5pv210/pm.c2
-rw-r--r--arch/arm/mach-shmobile/board-ag5evm.c3
-rw-r--r--arch/arm/mach-shmobile/board-mackerel.c4
-rw-r--r--arch/arm/mach-shmobile/clock-sh7372.c29
-rw-r--r--arch/arm/mach-shmobile/clock-sh73a0.c2
-rw-r--r--arch/arm/mach-shmobile/include/mach/sh7372.h4
-rw-r--r--arch/arm/mach-shmobile/intc-sh7372.c7
-rw-r--r--arch/arm/mach-shmobile/setup-sh7372.c176
-rw-r--r--arch/arm/mach-vexpress/v2m.c7
-rw-r--r--arch/arm/mm/abort-macro.S2
-rw-r--r--arch/arm/mm/cache-l2x0.c21
-rw-r--r--arch/arm/mm/init.c2
-rw-r--r--arch/arm/mm/proc-arm920.S2
-rw-r--r--arch/arm/mm/proc-arm926.S2
-rw-r--r--arch/arm/mm/proc-sa1100.S10
-rw-r--r--arch/arm/mm/proc-v6.S16
-rw-r--r--arch/arm/mm/proc-v7.S6
-rw-r--r--arch/arm/mm/proc-xsc3.S6
-rw-r--r--arch/arm/plat-omap/omap_device.c3
-rw-r--r--arch/arm/plat-s3c24xx/include/plat/map.h100
-rw-r--r--arch/arm/plat-s5p/clock.c2
-rw-r--r--arch/arm/plat-s5p/include/plat/pll.h1
-rw-r--r--arch/arm/plat-s5p/irq-gpioint.c6
-rw-r--r--arch/arm/plat-samsung/dev-hsmmc.c19
-rw-r--r--arch/arm/plat-samsung/dev-hsmmc1.c19
-rw-r--r--arch/arm/plat-samsung/dev-hsmmc2.c19
-rw-r--r--arch/arm/plat-samsung/dev-hsmmc3.c19
-rw-r--r--arch/arm/plat-samsung/dev-ts.c9
-rw-r--r--arch/arm/plat-samsung/include/plat/backlight.h2
-rw-r--r--arch/arm/plat-samsung/include/plat/dma-s3c24xx.h6
-rw-r--r--arch/arm/plat-samsung/include/plat/map-s3c.h84
-rw-r--r--arch/arm/plat-samsung/include/plat/map-s5p.h (renamed from arch/arm/plat-s5p/include/plat/map-s5p.h)6
-rw-r--r--arch/arm/plat-samsung/include/plat/sdhci.h7
-rw-r--r--arch/arm/plat-samsung/irq-vic-timer.c5
-rw-r--r--arch/arm/plat-samsung/platformdata.c22
-rw-r--r--arch/arm/tools/mach-types6
-rw-r--r--arch/openrisc/include/asm/dma-mapping.h59
-rw-r--r--arch/openrisc/include/asm/sigcontext.h7
-rw-r--r--arch/openrisc/kernel/dma.c28
-rw-r--r--arch/openrisc/kernel/signal.c29
-rw-r--r--arch/parisc/kernel/syscall_table.S2
-rw-r--r--arch/powerpc/boot/dts/p1023rds.dts2
-rw-r--r--arch/powerpc/configs/85xx/p1023rds_defconfig1
-rw-r--r--arch/powerpc/configs/corenet32_smp_defconfig1
-rw-r--r--arch/powerpc/configs/corenet64_smp_defconfig5
-rw-r--r--arch/powerpc/configs/mpc85xx_defconfig1
-rw-r--r--arch/powerpc/configs/mpc85xx_smp_defconfig1
-rw-r--r--arch/powerpc/include/asm/systbl.h2
-rw-r--r--arch/sh/include/asm/ptrace.h2
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7757.c1
-rw-r--r--arch/sh/kernel/idle.c2
-rw-r--r--arch/sh/kernel/traps_32.c37
-rw-r--r--arch/sparc/kernel/irq.h2
-rw-r--r--arch/sparc/kernel/setup_64.c10
-rw-r--r--arch/sparc/kernel/systbls_64.S2
-rw-r--r--arch/x86/include/asm/pvclock.h2
-rw-r--r--arch/x86/kernel/cpu/perf_event.c3
-rw-r--r--arch/x86/pci/acpi.c9
-rw-r--r--arch/x86/xen/setup.c19
-rw-r--r--arch/x86/xen/smp.c10
-rw-r--r--arch/x86/xen/xen-asm_32.S8
128 files changed, 896 insertions, 952 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 6c7eb9c080fd..9f1ff5c94bef 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1272,6 +1272,18 @@ config ARM_ERRATA_754327
1272 This workaround defines cpu_relax() as smp_mb(), preventing correctly 1272 This workaround defines cpu_relax() as smp_mb(), preventing correctly
1273 written polling loops from denying visibility of updates to memory. 1273 written polling loops from denying visibility of updates to memory.
1274 1274
1275config ARM_ERRATA_364296
1276 bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
1277 depends on CPU_V6 && !SMP
1278 help
1279 This options enables the workaround for the 364296 ARM1136
1280 r0p2 erratum (possible cache data corruption with
1281 hit-under-miss enabled). It sets the undocumented bit 31 in
1282 the auxiliary control register and the FI bit in the control
1283 register, thus disabling hit-under-miss without putting the
1284 processor into full low interrupt latency mode. ARM11MPCore
1285 is not affected.
1286
1275endmenu 1287endmenu
1276 1288
1277source "arch/arm/common/Kconfig" 1289source "arch/arm/common/Kconfig"
diff --git a/arch/arm/boot/compressed/mmcif-sh7372.c b/arch/arm/boot/compressed/mmcif-sh7372.c
index b6f61d9a5a1b..672ae95db5c3 100644
--- a/arch/arm/boot/compressed/mmcif-sh7372.c
+++ b/arch/arm/boot/compressed/mmcif-sh7372.c
@@ -82,7 +82,7 @@ asmlinkage void mmc_loader(unsigned char *buf, unsigned long len)
82 82
83 83
84 /* Disable clock to MMC hardware block */ 84 /* Disable clock to MMC hardware block */
85 __raw_writel(__raw_readl(SMSTPCR3) & (1 << 12), SMSTPCR3); 85 __raw_writel(__raw_readl(SMSTPCR3) | (1 << 12), SMSTPCR3);
86 86
87 mmc_update_progress(MMC_PROGRESS_DONE); 87 mmc_update_progress(MMC_PROGRESS_DONE);
88} 88}
diff --git a/arch/arm/boot/compressed/sdhi-sh7372.c b/arch/arm/boot/compressed/sdhi-sh7372.c
index d403a8b24d7f..d279294f2381 100644
--- a/arch/arm/boot/compressed/sdhi-sh7372.c
+++ b/arch/arm/boot/compressed/sdhi-sh7372.c
@@ -85,7 +85,7 @@ asmlinkage void mmc_loader(unsigned short *buf, unsigned long len)
85 goto err; 85 goto err;
86 86
87 /* Disable clock to SDHI1 hardware block */ 87 /* Disable clock to SDHI1 hardware block */
88 __raw_writel(__raw_readl(SMSTPCR3) & (1 << 13), SMSTPCR3); 88 __raw_writel(__raw_readl(SMSTPCR3) | (1 << 13), SMSTPCR3);
89 89
90 mmc_update_progress(MMC_PROGRESS_DONE); 90 mmc_update_progress(MMC_PROGRESS_DONE);
91 91
diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/include/asm/hardware/cache-l2x0.h
index 16bd48031583..99a6ed7e1bfd 100644
--- a/arch/arm/include/asm/hardware/cache-l2x0.h
+++ b/arch/arm/include/asm/hardware/cache-l2x0.h
@@ -45,8 +45,13 @@
45#define L2X0_CLEAN_INV_LINE_PA 0x7F0 45#define L2X0_CLEAN_INV_LINE_PA 0x7F0
46#define L2X0_CLEAN_INV_LINE_IDX 0x7F8 46#define L2X0_CLEAN_INV_LINE_IDX 0x7F8
47#define L2X0_CLEAN_INV_WAY 0x7FC 47#define L2X0_CLEAN_INV_WAY 0x7FC
48#define L2X0_LOCKDOWN_WAY_D 0x900 48/*
49#define L2X0_LOCKDOWN_WAY_I 0x904 49 * The lockdown registers repeat 8 times for L310, the L210 has only one
50 * D and one I lockdown register at 0x0900 and 0x0904.
51 */
52#define L2X0_LOCKDOWN_WAY_D_BASE 0x900
53#define L2X0_LOCKDOWN_WAY_I_BASE 0x904
54#define L2X0_LOCKDOWN_STRIDE 0x08
50#define L2X0_TEST_OPERATION 0xF00 55#define L2X0_TEST_OPERATION 0xF00
51#define L2X0_LINE_DATA 0xF10 56#define L2X0_LINE_DATA 0xF10
52#define L2X0_LINE_TAG 0xF30 57#define L2X0_LINE_TAG 0xF30
@@ -64,7 +69,7 @@
64#define L2X0_AUX_CTRL_MASK 0xc0000fff 69#define L2X0_AUX_CTRL_MASK 0xc0000fff
65#define L2X0_AUX_CTRL_ASSOCIATIVITY_SHIFT 16 70#define L2X0_AUX_CTRL_ASSOCIATIVITY_SHIFT 16
66#define L2X0_AUX_CTRL_WAY_SIZE_SHIFT 17 71#define L2X0_AUX_CTRL_WAY_SIZE_SHIFT 17
67#define L2X0_AUX_CTRL_WAY_SIZE_MASK (0x3 << 17) 72#define L2X0_AUX_CTRL_WAY_SIZE_MASK (0x7 << 17)
68#define L2X0_AUX_CTRL_SHARE_OVERRIDE_SHIFT 22 73#define L2X0_AUX_CTRL_SHARE_OVERRIDE_SHIFT 22
69#define L2X0_AUX_CTRL_NS_LOCKDOWN_SHIFT 26 74#define L2X0_AUX_CTRL_NS_LOCKDOWN_SHIFT 26
70#define L2X0_AUX_CTRL_NS_INT_CTRL_SHIFT 27 75#define L2X0_AUX_CTRL_NS_INT_CTRL_SHIFT 27
diff --git a/arch/arm/include/asm/pmu.h b/arch/arm/include/asm/pmu.h
index 67c70a31a1be..b7e82c4aced6 100644
--- a/arch/arm/include/asm/pmu.h
+++ b/arch/arm/include/asm/pmu.h
@@ -41,7 +41,7 @@ struct arm_pmu_platdata {
41 * encoded error on failure. 41 * encoded error on failure.
42 */ 42 */
43extern struct platform_device * 43extern struct platform_device *
44reserve_pmu(enum arm_pmu_type device); 44reserve_pmu(enum arm_pmu_type type);
45 45
46/** 46/**
47 * release_pmu() - Relinquish control of the performance counters 47 * release_pmu() - Relinquish control of the performance counters
@@ -62,26 +62,26 @@ release_pmu(enum arm_pmu_type type);
62 * the actual hardware initialisation. 62 * the actual hardware initialisation.
63 */ 63 */
64extern int 64extern int
65init_pmu(enum arm_pmu_type device); 65init_pmu(enum arm_pmu_type type);
66 66
67#else /* CONFIG_CPU_HAS_PMU */ 67#else /* CONFIG_CPU_HAS_PMU */
68 68
69#include <linux/err.h> 69#include <linux/err.h>
70 70
71static inline struct platform_device * 71static inline struct platform_device *
72reserve_pmu(enum arm_pmu_type device) 72reserve_pmu(enum arm_pmu_type type)
73{ 73{
74 return ERR_PTR(-ENODEV); 74 return ERR_PTR(-ENODEV);
75} 75}
76 76
77static inline int 77static inline int
78release_pmu(struct platform_device *pdev) 78release_pmu(enum arm_pmu_type type)
79{ 79{
80 return -ENODEV; 80 return -ENODEV;
81} 81}
82 82
83static inline int 83static inline int
84init_pmu(enum arm_pmu_type device) 84init_pmu(enum arm_pmu_type type)
85{ 85{
86 return -ENODEV; 86 return -ENODEV;
87} 87}
diff --git a/arch/arm/kernel/pmu.c b/arch/arm/kernel/pmu.c
index 2b70709376c3..c53474fe84df 100644
--- a/arch/arm/kernel/pmu.c
+++ b/arch/arm/kernel/pmu.c
@@ -31,7 +31,7 @@ static int __devinit pmu_register(struct platform_device *pdev,
31{ 31{
32 if (type < 0 || type >= ARM_NUM_PMU_DEVICES) { 32 if (type < 0 || type >= ARM_NUM_PMU_DEVICES) {
33 pr_warning("received registration request for unknown " 33 pr_warning("received registration request for unknown "
34 "device %d\n", type); 34 "PMU device type %d\n", type);
35 return -EINVAL; 35 return -EINVAL;
36 } 36 }
37 37
@@ -112,17 +112,17 @@ static int __init register_pmu_driver(void)
112device_initcall(register_pmu_driver); 112device_initcall(register_pmu_driver);
113 113
114struct platform_device * 114struct platform_device *
115reserve_pmu(enum arm_pmu_type device) 115reserve_pmu(enum arm_pmu_type type)
116{ 116{
117 struct platform_device *pdev; 117 struct platform_device *pdev;
118 118
119 if (test_and_set_bit_lock(device, &pmu_lock)) { 119 if (test_and_set_bit_lock(type, &pmu_lock)) {
120 pdev = ERR_PTR(-EBUSY); 120 pdev = ERR_PTR(-EBUSY);
121 } else if (pmu_devices[device] == NULL) { 121 } else if (pmu_devices[type] == NULL) {
122 clear_bit_unlock(device, &pmu_lock); 122 clear_bit_unlock(type, &pmu_lock);
123 pdev = ERR_PTR(-ENODEV); 123 pdev = ERR_PTR(-ENODEV);
124 } else { 124 } else {
125 pdev = pmu_devices[device]; 125 pdev = pmu_devices[type];
126 } 126 }
127 127
128 return pdev; 128 return pdev;
@@ -130,11 +130,11 @@ reserve_pmu(enum arm_pmu_type device)
130EXPORT_SYMBOL_GPL(reserve_pmu); 130EXPORT_SYMBOL_GPL(reserve_pmu);
131 131
132int 132int
133release_pmu(enum arm_pmu_type device) 133release_pmu(enum arm_pmu_type type)
134{ 134{
135 if (WARN_ON(!pmu_devices[device])) 135 if (WARN_ON(!pmu_devices[type]))
136 return -EINVAL; 136 return -EINVAL;
137 clear_bit_unlock(device, &pmu_lock); 137 clear_bit_unlock(type, &pmu_lock);
138 return 0; 138 return 0;
139} 139}
140EXPORT_SYMBOL_GPL(release_pmu); 140EXPORT_SYMBOL_GPL(release_pmu);
@@ -182,17 +182,17 @@ init_cpu_pmu(void)
182} 182}
183 183
184int 184int
185init_pmu(enum arm_pmu_type device) 185init_pmu(enum arm_pmu_type type)
186{ 186{
187 int err = 0; 187 int err = 0;
188 188
189 switch (device) { 189 switch (type) {
190 case ARM_PMU_DEVICE_CPU: 190 case ARM_PMU_DEVICE_CPU:
191 err = init_cpu_pmu(); 191 err = init_cpu_pmu();
192 break; 192 break;
193 default: 193 default:
194 pr_warning("attempt to initialise unknown device %d\n", 194 pr_warning("attempt to initialise PMU of unknown "
195 device); 195 "type %d\n", type);
196 err = -EINVAL; 196 err = -EINVAL;
197 } 197 }
198 198
diff --git a/arch/arm/kernel/relocate_kernel.S b/arch/arm/kernel/relocate_kernel.S
index 9cf4cbf8f95b..d0cdedf4864d 100644
--- a/arch/arm/kernel/relocate_kernel.S
+++ b/arch/arm/kernel/relocate_kernel.S
@@ -57,7 +57,8 @@ relocate_new_kernel:
57 mov r0,#0 57 mov r0,#0
58 ldr r1,kexec_mach_type 58 ldr r1,kexec_mach_type
59 ldr r2,kexec_boot_atags 59 ldr r2,kexec_boot_atags
60 mov pc,lr 60 ARM( mov pc, lr )
61 THUMB( bx lr )
61 62
62 .align 63 .align
63 64
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 70bca649e925..e514c76043b4 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -280,18 +280,19 @@ static void __init cacheid_init(void)
280 if (arch >= CPU_ARCH_ARMv6) { 280 if (arch >= CPU_ARCH_ARMv6) {
281 if ((cachetype & (7 << 29)) == 4 << 29) { 281 if ((cachetype & (7 << 29)) == 4 << 29) {
282 /* ARMv7 register format */ 282 /* ARMv7 register format */
283 arch = CPU_ARCH_ARMv7;
283 cacheid = CACHEID_VIPT_NONALIASING; 284 cacheid = CACHEID_VIPT_NONALIASING;
284 if ((cachetype & (3 << 14)) == 1 << 14) 285 if ((cachetype & (3 << 14)) == 1 << 14)
285 cacheid |= CACHEID_ASID_TAGGED; 286 cacheid |= CACHEID_ASID_TAGGED;
286 else if (cpu_has_aliasing_icache(CPU_ARCH_ARMv7))
287 cacheid |= CACHEID_VIPT_I_ALIASING;
288 } else if (cachetype & (1 << 23)) {
289 cacheid = CACHEID_VIPT_ALIASING;
290 } else { 287 } else {
291 cacheid = CACHEID_VIPT_NONALIASING; 288 arch = CPU_ARCH_ARMv6;
292 if (cpu_has_aliasing_icache(CPU_ARCH_ARMv6)) 289 if (cachetype & (1 << 23))
293 cacheid |= CACHEID_VIPT_I_ALIASING; 290 cacheid = CACHEID_VIPT_ALIASING;
291 else
292 cacheid = CACHEID_VIPT_NONALIASING;
294 } 293 }
294 if (cpu_has_aliasing_icache(arch))
295 cacheid |= CACHEID_VIPT_I_ALIASING;
295 } else { 296 } else {
296 cacheid = CACHEID_VIVT; 297 cacheid = CACHEID_VIVT;
297 } 298 }
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index 2c277d40cee6..01c186222f3b 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -137,8 +137,8 @@ void __cpuinit twd_timer_setup(struct clock_event_device *clk)
137 clk->max_delta_ns = clockevent_delta2ns(0xffffffff, clk); 137 clk->max_delta_ns = clockevent_delta2ns(0xffffffff, clk);
138 clk->min_delta_ns = clockevent_delta2ns(0xf, clk); 138 clk->min_delta_ns = clockevent_delta2ns(0xf, clk);
139 139
140 clockevents_register_device(clk);
141
140 /* Make sure our local interrupt controller has this enabled */ 142 /* Make sure our local interrupt controller has this enabled */
141 gic_enable_ppi(clk->irq); 143 gic_enable_ppi(clk->irq);
142
143 clockevents_register_device(clk);
144} 144}
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c
index d522b47e30b5..6c8e3b5f669f 100644
--- a/arch/arm/mach-at91/at91sam9261.c
+++ b/arch/arm/mach-at91/at91sam9261.c
@@ -157,7 +157,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
157 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk), 157 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
158 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk), 158 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
159 CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk), 159 CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
160 CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc1_clk), 160 CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
161 CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), 161 CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk),
162 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), 162 CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk),
163 CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk), 163 CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk),
diff --git a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
index 6bd83ed90afe..d87bfc397d39 100644
--- a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
+++ b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S
@@ -8,7 +8,6 @@
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10 10
11#include <mach/hardware.h>
12#include <asm/hardware/entry-macro-gic.S> 11#include <asm/hardware/entry-macro-gic.S>
13 12
14 .macro disable_fiq 13 .macro disable_fiq
diff --git a/arch/arm/mach-cns3xxx/include/mach/system.h b/arch/arm/mach-cns3xxx/include/mach/system.h
index 58bb03ae3cf4..4f16c9b79f78 100644
--- a/arch/arm/mach-cns3xxx/include/mach/system.h
+++ b/arch/arm/mach-cns3xxx/include/mach/system.h
@@ -13,7 +13,6 @@
13 13
14#include <linux/io.h> 14#include <linux/io.h>
15#include <asm/proc-fns.h> 15#include <asm/proc-fns.h>
16#include <mach/hardware.h>
17 16
18static inline void arch_idle(void) 17static inline void arch_idle(void)
19{ 18{
diff --git a/arch/arm/mach-cns3xxx/include/mach/uncompress.h b/arch/arm/mach-cns3xxx/include/mach/uncompress.h
index de8ead9b91f7..a91b6058ab4f 100644
--- a/arch/arm/mach-cns3xxx/include/mach/uncompress.h
+++ b/arch/arm/mach-cns3xxx/include/mach/uncompress.h
@@ -8,7 +8,6 @@
8 */ 8 */
9 9
10#include <asm/mach-types.h> 10#include <asm/mach-types.h>
11#include <mach/hardware.h>
12#include <mach/cns3xxx.h> 11#include <mach/cns3xxx.h>
13 12
14#define AMBA_UART_DR(base) (*(volatile unsigned char *)((base) + 0x00)) 13#define AMBA_UART_DR(base) (*(volatile unsigned char *)((base) + 0x00))
diff --git a/arch/arm/mach-cns3xxx/pcie.c b/arch/arm/mach-cns3xxx/pcie.c
index 06fd25d70aec..0f8fca48a5ed 100644
--- a/arch/arm/mach-cns3xxx/pcie.c
+++ b/arch/arm/mach-cns3xxx/pcie.c
@@ -49,7 +49,7 @@ static struct cns3xxx_pcie *sysdata_to_cnspci(void *sysdata)
49 return &cns3xxx_pcie[root->domain]; 49 return &cns3xxx_pcie[root->domain];
50} 50}
51 51
52static struct cns3xxx_pcie *pdev_to_cnspci(struct pci_dev *dev) 52static struct cns3xxx_pcie *pdev_to_cnspci(const struct pci_dev *dev)
53{ 53{
54 return sysdata_to_cnspci(dev->sysdata); 54 return sysdata_to_cnspci(dev->sysdata);
55} 55}
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index bd5394537c88..008d51407cd7 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -115,6 +115,32 @@ static struct spi_board_info da850evm_spi_info[] = {
115 }, 115 },
116}; 116};
117 117
118#ifdef CONFIG_MTD
119static void da850_evm_m25p80_notify_add(struct mtd_info *mtd)
120{
121 char *mac_addr = davinci_soc_info.emac_pdata->mac_addr;
122 size_t retlen;
123
124 if (!strcmp(mtd->name, "MAC-Address")) {
125 mtd->read(mtd, 0, ETH_ALEN, &retlen, mac_addr);
126 if (retlen == ETH_ALEN)
127 pr_info("Read MAC addr from SPI Flash: %pM\n",
128 mac_addr);
129 }
130}
131
132static struct mtd_notifier da850evm_spi_notifier = {
133 .add = da850_evm_m25p80_notify_add,
134};
135
136static void da850_evm_setup_mac_addr(void)
137{
138 register_mtd_user(&da850evm_spi_notifier);
139}
140#else
141static void da850_evm_setup_mac_addr(void) { }
142#endif
143
118static struct mtd_partition da850_evm_norflash_partition[] = { 144static struct mtd_partition da850_evm_norflash_partition[] = {
119 { 145 {
120 .name = "bootloaders + env", 146 .name = "bootloaders + env",
@@ -1244,6 +1270,8 @@ static __init void da850_evm_init(void)
1244 if (ret) 1270 if (ret)
1245 pr_warning("da850_evm_init: sata registration failed: %d\n", 1271 pr_warning("da850_evm_init: sata registration failed: %d\n",
1246 ret); 1272 ret);
1273
1274 da850_evm_setup_mac_addr();
1247} 1275}
1248 1276
1249#ifdef CONFIG_SERIAL_8250_CONSOLE 1277#ifdef CONFIG_SERIAL_8250_CONSOLE
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h
index 47fd0bc3d3e7..fa59c097223d 100644
--- a/arch/arm/mach-davinci/include/mach/psc.h
+++ b/arch/arm/mach-davinci/include/mach/psc.h
@@ -243,7 +243,7 @@
243#define PSC_STATE_DISABLE 2 243#define PSC_STATE_DISABLE 2
244#define PSC_STATE_ENABLE 3 244#define PSC_STATE_ENABLE 3
245 245
246#define MDSTAT_STATE_MASK 0x1f 246#define MDSTAT_STATE_MASK 0x3f
247#define MDCTL_FORCE BIT(31) 247#define MDCTL_FORCE BIT(31)
248 248
249#ifndef __ASSEMBLER__ 249#ifndef __ASSEMBLER__
diff --git a/arch/arm/mach-davinci/sleep.S b/arch/arm/mach-davinci/sleep.S
index fb5e72b532b0..5f1e045a3ad1 100644
--- a/arch/arm/mach-davinci/sleep.S
+++ b/arch/arm/mach-davinci/sleep.S
@@ -217,7 +217,11 @@ ddr2clk_stop_done:
217ENDPROC(davinci_ddr_psc_config) 217ENDPROC(davinci_ddr_psc_config)
218 218
219CACHE_FLUSH: 219CACHE_FLUSH:
220 .word arm926_flush_kern_cache_all 220#ifdef CONFIG_CPU_V6
221 .word v6_flush_kern_cache_all
222#else
223 .word arm926_flush_kern_cache_all
224#endif
221 225
222ENTRY(davinci_cpu_suspend_sz) 226ENTRY(davinci_cpu_suspend_sz)
223 .word . - davinci_cpu_suspend 227 .word . - davinci_cpu_suspend
diff --git a/arch/arm/mach-ep93xx/include/mach/ts72xx.h b/arch/arm/mach-ep93xx/include/mach/ts72xx.h
index 0eabec62cd9d..f1397a13e76b 100644
--- a/arch/arm/mach-ep93xx/include/mach/ts72xx.h
+++ b/arch/arm/mach-ep93xx/include/mach/ts72xx.h
@@ -6,7 +6,7 @@
6 * TS72xx memory map: 6 * TS72xx memory map:
7 * 7 *
8 * virt phys size 8 * virt phys size
9 * febff000 22000000 4K model number register 9 * febff000 22000000 4K model number register (bits 0-2)
10 * febfe000 22400000 4K options register 10 * febfe000 22400000 4K options register
11 * febfd000 22800000 4K options register #2 11 * febfd000 22800000 4K options register #2
12 * febf9000 10800000 4K TS-5620 RTC index register 12 * febf9000 10800000 4K TS-5620 RTC index register
@@ -20,6 +20,9 @@
20#define TS72XX_MODEL_TS7200 0x00 20#define TS72XX_MODEL_TS7200 0x00
21#define TS72XX_MODEL_TS7250 0x01 21#define TS72XX_MODEL_TS7250 0x01
22#define TS72XX_MODEL_TS7260 0x02 22#define TS72XX_MODEL_TS7260 0x02
23#define TS72XX_MODEL_TS7300 0x03
24#define TS72XX_MODEL_TS7400 0x04
25#define TS72XX_MODEL_MASK 0x07
23 26
24 27
25#define TS72XX_OPTIONS_PHYS_BASE 0x22400000 28#define TS72XX_OPTIONS_PHYS_BASE 0x22400000
@@ -51,19 +54,34 @@
51 54
52#ifndef __ASSEMBLY__ 55#ifndef __ASSEMBLY__
53 56
57static inline int ts72xx_model(void)
58{
59 return __raw_readb(TS72XX_MODEL_VIRT_BASE) & TS72XX_MODEL_MASK;
60}
61
54static inline int board_is_ts7200(void) 62static inline int board_is_ts7200(void)
55{ 63{
56 return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7200; 64 return ts72xx_model() == TS72XX_MODEL_TS7200;
57} 65}
58 66
59static inline int board_is_ts7250(void) 67static inline int board_is_ts7250(void)
60{ 68{
61 return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7250; 69 return ts72xx_model() == TS72XX_MODEL_TS7250;
62} 70}
63 71
64static inline int board_is_ts7260(void) 72static inline int board_is_ts7260(void)
65{ 73{
66 return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7260; 74 return ts72xx_model() == TS72XX_MODEL_TS7260;
75}
76
77static inline int board_is_ts7300(void)
78{
79 return ts72xx_model() == TS72XX_MODEL_TS7300;
80}
81
82static inline int board_is_ts7400(void)
83{
84 return ts72xx_model() == TS72XX_MODEL_TS7400;
67} 85}
68 86
69static inline int is_max197_installed(void) 87static inline int is_max197_installed(void)
diff --git a/arch/arm/mach-exynos4/Kconfig b/arch/arm/mach-exynos4/Kconfig
index 0c77ab99fa16..bee8f77de2ab 100644
--- a/arch/arm/mach-exynos4/Kconfig
+++ b/arch/arm/mach-exynos4/Kconfig
@@ -113,22 +113,7 @@ menu "EXYNOS4 Machines"
113 113
114config MACH_SMDKC210 114config MACH_SMDKC210
115 bool "SMDKC210" 115 bool "SMDKC210"
116 select CPU_EXYNOS4210 116 select MACH_SMDKV310
117 select S5P_DEV_FIMD0
118 select S3C_DEV_RTC
119 select S3C_DEV_WDT
120 select S3C_DEV_I2C1
121 select S3C_DEV_HSMMC
122 select S3C_DEV_HSMMC1
123 select S3C_DEV_HSMMC2
124 select S3C_DEV_HSMMC3
125 select SAMSUNG_DEV_PWM
126 select SAMSUNG_DEV_BACKLIGHT
127 select EXYNOS4_DEV_PD
128 select EXYNOS4_DEV_SYSMMU
129 select EXYNOS4_SETUP_FIMD0
130 select EXYNOS4_SETUP_I2C1
131 select EXYNOS4_SETUP_SDHCI
132 help 117 help
133 Machine support for Samsung SMDKC210 118 Machine support for Samsung SMDKC210
134 119
diff --git a/arch/arm/mach-exynos4/Makefile b/arch/arm/mach-exynos4/Makefile
index b7fe1d7b0b1f..e3e93ea41385 100644
--- a/arch/arm/mach-exynos4/Makefile
+++ b/arch/arm/mach-exynos4/Makefile
@@ -25,7 +25,7 @@ obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
25 25
26# machine support 26# machine support
27 27
28obj-$(CONFIG_MACH_SMDKC210) += mach-smdkc210.o 28obj-$(CONFIG_MACH_SMDKC210) += mach-smdkv310.o
29obj-$(CONFIG_MACH_SMDKV310) += mach-smdkv310.o 29obj-$(CONFIG_MACH_SMDKV310) += mach-smdkv310.o
30obj-$(CONFIG_MACH_ARMLEX4210) += mach-armlex4210.o 30obj-$(CONFIG_MACH_ARMLEX4210) += mach-armlex4210.o
31obj-$(CONFIG_MACH_UNIVERSAL_C210) += mach-universal_c210.o 31obj-$(CONFIG_MACH_UNIVERSAL_C210) += mach-universal_c210.o
diff --git a/arch/arm/mach-exynos4/clock.c b/arch/arm/mach-exynos4/clock.c
index 851dea018578..1561b036a9bf 100644
--- a/arch/arm/mach-exynos4/clock.c
+++ b/arch/arm/mach-exynos4/clock.c
@@ -520,7 +520,7 @@ static struct clk init_clocks_off[] = {
520 .ctrlbit = (1 << 21), 520 .ctrlbit = (1 << 21),
521 }, { 521 }, {
522 .name = "ac97", 522 .name = "ac97",
523 .id = -1, 523 .devname = "samsung-ac97",
524 .enable = exynos4_clk_ip_peril_ctrl, 524 .enable = exynos4_clk_ip_peril_ctrl,
525 .ctrlbit = (1 << 27), 525 .ctrlbit = (1 << 27),
526 }, { 526 }, {
diff --git a/arch/arm/mach-exynos4/cpu.c b/arch/arm/mach-exynos4/cpu.c
index 2d8a40c9e6e5..746d6fc6d397 100644
--- a/arch/arm/mach-exynos4/cpu.c
+++ b/arch/arm/mach-exynos4/cpu.c
@@ -24,12 +24,13 @@
24#include <plat/exynos4.h> 24#include <plat/exynos4.h>
25#include <plat/adc-core.h> 25#include <plat/adc-core.h>
26#include <plat/sdhci.h> 26#include <plat/sdhci.h>
27#include <plat/devs.h>
28#include <plat/fb-core.h> 27#include <plat/fb-core.h>
29#include <plat/fimc-core.h> 28#include <plat/fimc-core.h>
30#include <plat/iic-core.h> 29#include <plat/iic-core.h>
30#include <plat/reset.h>
31 31
32#include <mach/regs-irq.h> 32#include <mach/regs-irq.h>
33#include <mach/regs-pmu.h>
33 34
34extern int combiner_init(unsigned int combiner_nr, void __iomem *base, 35extern int combiner_init(unsigned int combiner_nr, void __iomem *base,
35 unsigned int irq_start); 36 unsigned int irq_start);
@@ -128,6 +129,11 @@ static void exynos4_idle(void)
128 local_irq_enable(); 129 local_irq_enable();
129} 130}
130 131
132static void exynos4_sw_reset(void)
133{
134 __raw_writel(0x1, S5P_SWRESET);
135}
136
131/* 137/*
132 * exynos4_map_io 138 * exynos4_map_io
133 * 139 *
@@ -241,5 +247,8 @@ int __init exynos4_init(void)
241 /* set idle function */ 247 /* set idle function */
242 pm_idle = exynos4_idle; 248 pm_idle = exynos4_idle;
243 249
250 /* set sw_reset function */
251 s5p_reset_hook = exynos4_sw_reset;
252
244 return sysdev_register(&exynos4_sysdev); 253 return sysdev_register(&exynos4_sysdev);
245} 254}
diff --git a/arch/arm/mach-exynos4/include/mach/irqs.h b/arch/arm/mach-exynos4/include/mach/irqs.h
index 934d2a493982..f8952f8f3757 100644
--- a/arch/arm/mach-exynos4/include/mach/irqs.h
+++ b/arch/arm/mach-exynos4/include/mach/irqs.h
@@ -80,9 +80,8 @@
80#define IRQ_HSMMC3 IRQ_SPI(76) 80#define IRQ_HSMMC3 IRQ_SPI(76)
81#define IRQ_DWMCI IRQ_SPI(77) 81#define IRQ_DWMCI IRQ_SPI(77)
82 82
83#define IRQ_MIPICSI0 IRQ_SPI(78) 83#define IRQ_MIPI_CSIS0 IRQ_SPI(78)
84 84#define IRQ_MIPI_CSIS1 IRQ_SPI(80)
85#define IRQ_MIPICSI1 IRQ_SPI(80)
86 85
87#define IRQ_ONENAND_AUDI IRQ_SPI(82) 86#define IRQ_ONENAND_AUDI IRQ_SPI(82)
88#define IRQ_ROTATOR IRQ_SPI(83) 87#define IRQ_ROTATOR IRQ_SPI(83)
diff --git a/arch/arm/mach-exynos4/include/mach/regs-pmu.h b/arch/arm/mach-exynos4/include/mach/regs-pmu.h
index fa49bbb8e7b0..cdf9b47c303c 100644
--- a/arch/arm/mach-exynos4/include/mach/regs-pmu.h
+++ b/arch/arm/mach-exynos4/include/mach/regs-pmu.h
@@ -29,6 +29,8 @@
29#define S5P_USE_STANDBY_WFE1 (1 << 25) 29#define S5P_USE_STANDBY_WFE1 (1 << 25)
30#define S5P_USE_MASK ((0x3 << 16) | (0x3 << 24)) 30#define S5P_USE_MASK ((0x3 << 16) | (0x3 << 24))
31 31
32#define S5P_SWRESET S5P_PMUREG(0x0400)
33
32#define S5P_WAKEUP_STAT S5P_PMUREG(0x0600) 34#define S5P_WAKEUP_STAT S5P_PMUREG(0x0600)
33#define S5P_EINT_WAKEUP_MASK S5P_PMUREG(0x0604) 35#define S5P_EINT_WAKEUP_MASK S5P_PMUREG(0x0604)
34#define S5P_WAKEUP_MASK S5P_PMUREG(0x0608) 36#define S5P_WAKEUP_MASK S5P_PMUREG(0x0608)
diff --git a/arch/arm/mach-exynos4/irq-eint.c b/arch/arm/mach-exynos4/irq-eint.c
index 9d87d2ac7f68..badb8c66fc9b 100644
--- a/arch/arm/mach-exynos4/irq-eint.c
+++ b/arch/arm/mach-exynos4/irq-eint.c
@@ -23,6 +23,8 @@
23 23
24#include <mach/regs-gpio.h> 24#include <mach/regs-gpio.h>
25 25
26#include <asm/mach/irq.h>
27
26static DEFINE_SPINLOCK(eint_lock); 28static DEFINE_SPINLOCK(eint_lock);
27 29
28static unsigned int eint0_15_data[16]; 30static unsigned int eint0_15_data[16];
@@ -184,8 +186,11 @@ static inline void exynos4_irq_demux_eint(unsigned int start)
184 186
185static void exynos4_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc) 187static void exynos4_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
186{ 188{
189 struct irq_chip *chip = irq_get_chip(irq);
190 chained_irq_enter(chip, desc);
187 exynos4_irq_demux_eint(IRQ_EINT(16)); 191 exynos4_irq_demux_eint(IRQ_EINT(16));
188 exynos4_irq_demux_eint(IRQ_EINT(24)); 192 exynos4_irq_demux_eint(IRQ_EINT(24));
193 chained_irq_exit(chip, desc);
189} 194}
190 195
191static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc) 196static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
@@ -193,6 +198,7 @@ static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
193 u32 *irq_data = irq_get_handler_data(irq); 198 u32 *irq_data = irq_get_handler_data(irq);
194 struct irq_chip *chip = irq_get_chip(irq); 199 struct irq_chip *chip = irq_get_chip(irq);
195 200
201 chained_irq_enter(chip, desc);
196 chip->irq_mask(&desc->irq_data); 202 chip->irq_mask(&desc->irq_data);
197 203
198 if (chip->irq_ack) 204 if (chip->irq_ack)
@@ -201,6 +207,7 @@ static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc)
201 generic_handle_irq(*irq_data); 207 generic_handle_irq(*irq_data);
202 208
203 chip->irq_unmask(&desc->irq_data); 209 chip->irq_unmask(&desc->irq_data);
210 chained_irq_exit(chip, desc);
204} 211}
205 212
206int __init exynos4_init_irq_eint(void) 213int __init exynos4_init_irq_eint(void)
diff --git a/arch/arm/mach-exynos4/mach-smdkc210.c b/arch/arm/mach-exynos4/mach-smdkc210.c
deleted file mode 100644
index a7c65e05c1eb..000000000000
--- a/arch/arm/mach-exynos4/mach-smdkc210.c
+++ /dev/null
@@ -1,309 +0,0 @@
1/* linux/arch/arm/mach-exynos4/mach-smdkc210.c
2 *
3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/serial_core.h>
12#include <linux/delay.h>
13#include <linux/gpio.h>
14#include <linux/lcd.h>
15#include <linux/mmc/host.h>
16#include <linux/platform_device.h>
17#include <linux/smsc911x.h>
18#include <linux/io.h>
19#include <linux/i2c.h>
20#include <linux/pwm_backlight.h>
21
22#include <asm/mach/arch.h>
23#include <asm/mach-types.h>
24
25#include <video/platform_lcd.h>
26
27#include <plat/regs-serial.h>
28#include <plat/regs-srom.h>
29#include <plat/regs-fb-v4.h>
30#include <plat/exynos4.h>
31#include <plat/cpu.h>
32#include <plat/devs.h>
33#include <plat/fb.h>
34#include <plat/sdhci.h>
35#include <plat/iic.h>
36#include <plat/pd.h>
37#include <plat/gpio-cfg.h>
38#include <plat/backlight.h>
39
40#include <mach/map.h>
41
42/* Following are default values for UCON, ULCON and UFCON UART registers */
43#define SMDKC210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
44 S3C2410_UCON_RXILEVEL | \
45 S3C2410_UCON_TXIRQMODE | \
46 S3C2410_UCON_RXIRQMODE | \
47 S3C2410_UCON_RXFIFO_TOI | \
48 S3C2443_UCON_RXERR_IRQEN)
49
50#define SMDKC210_ULCON_DEFAULT S3C2410_LCON_CS8
51
52#define SMDKC210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
53 S5PV210_UFCON_TXTRIG4 | \
54 S5PV210_UFCON_RXTRIG4)
55
56static struct s3c2410_uartcfg smdkc210_uartcfgs[] __initdata = {
57 [0] = {
58 .hwport = 0,
59 .flags = 0,
60 .ucon = SMDKC210_UCON_DEFAULT,
61 .ulcon = SMDKC210_ULCON_DEFAULT,
62 .ufcon = SMDKC210_UFCON_DEFAULT,
63 },
64 [1] = {
65 .hwport = 1,
66 .flags = 0,
67 .ucon = SMDKC210_UCON_DEFAULT,
68 .ulcon = SMDKC210_ULCON_DEFAULT,
69 .ufcon = SMDKC210_UFCON_DEFAULT,
70 },
71 [2] = {
72 .hwport = 2,
73 .flags = 0,
74 .ucon = SMDKC210_UCON_DEFAULT,
75 .ulcon = SMDKC210_ULCON_DEFAULT,
76 .ufcon = SMDKC210_UFCON_DEFAULT,
77 },
78 [3] = {
79 .hwport = 3,
80 .flags = 0,
81 .ucon = SMDKC210_UCON_DEFAULT,
82 .ulcon = SMDKC210_ULCON_DEFAULT,
83 .ufcon = SMDKC210_UFCON_DEFAULT,
84 },
85};
86
87static struct s3c_sdhci_platdata smdkc210_hsmmc0_pdata __initdata = {
88 .cd_type = S3C_SDHCI_CD_GPIO,
89 .ext_cd_gpio = EXYNOS4_GPK0(2),
90 .ext_cd_gpio_invert = 1,
91 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
92#ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
93 .max_width = 8,
94 .host_caps = MMC_CAP_8_BIT_DATA,
95#endif
96};
97
98static struct s3c_sdhci_platdata smdkc210_hsmmc1_pdata __initdata = {
99 .cd_type = S3C_SDHCI_CD_GPIO,
100 .ext_cd_gpio = EXYNOS4_GPK0(2),
101 .ext_cd_gpio_invert = 1,
102 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
103};
104
105static struct s3c_sdhci_platdata smdkc210_hsmmc2_pdata __initdata = {
106 .cd_type = S3C_SDHCI_CD_GPIO,
107 .ext_cd_gpio = EXYNOS4_GPK2(2),
108 .ext_cd_gpio_invert = 1,
109 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
110#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
111 .max_width = 8,
112 .host_caps = MMC_CAP_8_BIT_DATA,
113#endif
114};
115
116static struct s3c_sdhci_platdata smdkc210_hsmmc3_pdata __initdata = {
117 .cd_type = S3C_SDHCI_CD_GPIO,
118 .ext_cd_gpio = EXYNOS4_GPK2(2),
119 .ext_cd_gpio_invert = 1,
120 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
121};
122
123static void lcd_lte480wv_set_power(struct plat_lcd_data *pd,
124 unsigned int power)
125{
126 if (power) {
127#if !defined(CONFIG_BACKLIGHT_PWM)
128 gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_HIGH, "GPD0");
129 gpio_free(EXYNOS4_GPD0(1));
130#endif
131 /* fire nRESET on power up */
132 gpio_request(EXYNOS4_GPX0(6), "GPX0");
133
134 gpio_direction_output(EXYNOS4_GPX0(6), 1);
135 mdelay(100);
136
137 gpio_set_value(EXYNOS4_GPX0(6), 0);
138 mdelay(10);
139
140 gpio_set_value(EXYNOS4_GPX0(6), 1);
141 mdelay(10);
142
143 gpio_free(EXYNOS4_GPX0(6));
144 } else {
145#if !defined(CONFIG_BACKLIGHT_PWM)
146 gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_LOW, "GPD0");
147 gpio_free(EXYNOS4_GPD0(1));
148#endif
149 }
150}
151
152static struct plat_lcd_data smdkc210_lcd_lte480wv_data = {
153 .set_power = lcd_lte480wv_set_power,
154};
155
156static struct platform_device smdkc210_lcd_lte480wv = {
157 .name = "platform-lcd",
158 .dev.parent = &s5p_device_fimd0.dev,
159 .dev.platform_data = &smdkc210_lcd_lte480wv_data,
160};
161
162static struct s3c_fb_pd_win smdkc210_fb_win0 = {
163 .win_mode = {
164 .left_margin = 13,
165 .right_margin = 8,
166 .upper_margin = 7,
167 .lower_margin = 5,
168 .hsync_len = 3,
169 .vsync_len = 1,
170 .xres = 800,
171 .yres = 480,
172 },
173 .max_bpp = 32,
174 .default_bpp = 24,
175};
176
177static struct s3c_fb_platdata smdkc210_lcd0_pdata __initdata = {
178 .win[0] = &smdkc210_fb_win0,
179 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
180 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
181 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
182};
183
184static struct resource smdkc210_smsc911x_resources[] = {
185 [0] = {
186 .start = EXYNOS4_PA_SROM_BANK(1),
187 .end = EXYNOS4_PA_SROM_BANK(1) + SZ_64K - 1,
188 .flags = IORESOURCE_MEM,
189 },
190 [1] = {
191 .start = IRQ_EINT(5),
192 .end = IRQ_EINT(5),
193 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
194 },
195};
196
197static struct smsc911x_platform_config smsc9215_config = {
198 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
199 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
200 .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
201 .phy_interface = PHY_INTERFACE_MODE_MII,
202 .mac = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67},
203};
204
205static struct platform_device smdkc210_smsc911x = {
206 .name = "smsc911x",
207 .id = -1,
208 .num_resources = ARRAY_SIZE(smdkc210_smsc911x_resources),
209 .resource = smdkc210_smsc911x_resources,
210 .dev = {
211 .platform_data = &smsc9215_config,
212 },
213};
214
215static struct i2c_board_info i2c_devs1[] __initdata = {
216 {I2C_BOARD_INFO("wm8994", 0x1a),},
217};
218
219static struct platform_device *smdkc210_devices[] __initdata = {
220 &s3c_device_hsmmc0,
221 &s3c_device_hsmmc1,
222 &s3c_device_hsmmc2,
223 &s3c_device_hsmmc3,
224 &s3c_device_i2c1,
225 &s3c_device_rtc,
226 &s3c_device_wdt,
227 &exynos4_device_ac97,
228 &exynos4_device_i2s0,
229 &exynos4_device_pd[PD_MFC],
230 &exynos4_device_pd[PD_G3D],
231 &exynos4_device_pd[PD_LCD0],
232 &exynos4_device_pd[PD_LCD1],
233 &exynos4_device_pd[PD_CAM],
234 &exynos4_device_pd[PD_TV],
235 &exynos4_device_pd[PD_GPS],
236 &exynos4_device_sysmmu,
237 &samsung_asoc_dma,
238 &s5p_device_fimd0,
239 &smdkc210_lcd_lte480wv,
240 &smdkc210_smsc911x,
241};
242
243static void __init smdkc210_smsc911x_init(void)
244{
245 u32 cs1;
246
247 /* configure nCS1 width to 16 bits */
248 cs1 = __raw_readl(S5P_SROM_BW) &
249 ~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT);
250 cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) |
251 (1 << S5P_SROM_BW__WAITENABLE__SHIFT) |
252 (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) <<
253 S5P_SROM_BW__NCS1__SHIFT;
254 __raw_writel(cs1, S5P_SROM_BW);
255
256 /* set timing for nCS1 suitable for ethernet chip */
257 __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) |
258 (0x9 << S5P_SROM_BCX__TACP__SHIFT) |
259 (0xc << S5P_SROM_BCX__TCAH__SHIFT) |
260 (0x1 << S5P_SROM_BCX__TCOH__SHIFT) |
261 (0x6 << S5P_SROM_BCX__TACC__SHIFT) |
262 (0x1 << S5P_SROM_BCX__TCOS__SHIFT) |
263 (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
264}
265
266/* LCD Backlight data */
267static struct samsung_bl_gpio_info smdkc210_bl_gpio_info = {
268 .no = EXYNOS4_GPD0(1),
269 .func = S3C_GPIO_SFN(2),
270};
271
272static struct platform_pwm_backlight_data smdkc210_bl_data = {
273 .pwm_id = 1,
274 .pwm_period_ns = 1000,
275};
276
277static void __init smdkc210_map_io(void)
278{
279 s5p_init_io(NULL, 0, S5P_VA_CHIPID);
280 s3c24xx_init_clocks(24000000);
281 s3c24xx_init_uarts(smdkc210_uartcfgs, ARRAY_SIZE(smdkc210_uartcfgs));
282}
283
284static void __init smdkc210_machine_init(void)
285{
286 s3c_i2c1_set_platdata(NULL);
287 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
288
289 smdkc210_smsc911x_init();
290
291 s3c_sdhci0_set_platdata(&smdkc210_hsmmc0_pdata);
292 s3c_sdhci1_set_platdata(&smdkc210_hsmmc1_pdata);
293 s3c_sdhci2_set_platdata(&smdkc210_hsmmc2_pdata);
294 s3c_sdhci3_set_platdata(&smdkc210_hsmmc3_pdata);
295
296 samsung_bl_set(&smdkc210_bl_gpio_info, &smdkc210_bl_data);
297 s5p_fimd0_set_platdata(&smdkc210_lcd0_pdata);
298
299 platform_add_devices(smdkc210_devices, ARRAY_SIZE(smdkc210_devices));
300}
301
302MACHINE_START(SMDKC210, "SMDKC210")
303 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
304 .boot_params = S5P_PA_SDRAM + 0x100,
305 .init_irq = exynos4_init_irq,
306 .map_io = smdkc210_map_io,
307 .init_machine = smdkc210_machine_init,
308 .timer = &exynos4_timer,
309MACHINE_END
diff --git a/arch/arm/mach-exynos4/mach-smdkv310.c b/arch/arm/mach-exynos4/mach-smdkv310.c
index ea4149556860..a16eb569a3e6 100644
--- a/arch/arm/mach-exynos4/mach-smdkv310.c
+++ b/arch/arm/mach-exynos4/mach-smdkv310.c
@@ -9,7 +9,9 @@
9*/ 9*/
10 10
11#include <linux/serial_core.h> 11#include <linux/serial_core.h>
12#include <linux/delay.h>
12#include <linux/gpio.h> 13#include <linux/gpio.h>
14#include <linux/lcd.h>
13#include <linux/mmc/host.h> 15#include <linux/mmc/host.h>
14#include <linux/platform_device.h> 16#include <linux/platform_device.h>
15#include <linux/smsc911x.h> 17#include <linux/smsc911x.h>
@@ -21,11 +23,14 @@
21#include <asm/mach/arch.h> 23#include <asm/mach/arch.h>
22#include <asm/mach-types.h> 24#include <asm/mach-types.h>
23 25
26#include <video/platform_lcd.h>
24#include <plat/regs-serial.h> 27#include <plat/regs-serial.h>
25#include <plat/regs-srom.h> 28#include <plat/regs-srom.h>
29#include <plat/regs-fb-v4.h>
26#include <plat/exynos4.h> 30#include <plat/exynos4.h>
27#include <plat/cpu.h> 31#include <plat/cpu.h>
28#include <plat/devs.h> 32#include <plat/devs.h>
33#include <plat/fb.h>
29#include <plat/keypad.h> 34#include <plat/keypad.h>
30#include <plat/sdhci.h> 35#include <plat/sdhci.h>
31#include <plat/iic.h> 36#include <plat/iic.h>
@@ -112,6 +117,67 @@ static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = {
112 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, 117 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
113}; 118};
114 119
120static void lcd_lte480wv_set_power(struct plat_lcd_data *pd,
121 unsigned int power)
122{
123 if (power) {
124#if !defined(CONFIG_BACKLIGHT_PWM)
125 gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_HIGH, "GPD0");
126 gpio_free(EXYNOS4_GPD0(1));
127#endif
128 /* fire nRESET on power up */
129 gpio_request(EXYNOS4_GPX0(6), "GPX0");
130
131 gpio_direction_output(EXYNOS4_GPX0(6), 1);
132 mdelay(100);
133
134 gpio_set_value(EXYNOS4_GPX0(6), 0);
135 mdelay(10);
136
137 gpio_set_value(EXYNOS4_GPX0(6), 1);
138 mdelay(10);
139
140 gpio_free(EXYNOS4_GPX0(6));
141 } else {
142#if !defined(CONFIG_BACKLIGHT_PWM)
143 gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_LOW, "GPD0");
144 gpio_free(EXYNOS4_GPD0(1));
145#endif
146 }
147}
148
149static struct plat_lcd_data smdkv310_lcd_lte480wv_data = {
150 .set_power = lcd_lte480wv_set_power,
151};
152
153static struct platform_device smdkv310_lcd_lte480wv = {
154 .name = "platform-lcd",
155 .dev.parent = &s5p_device_fimd0.dev,
156 .dev.platform_data = &smdkv310_lcd_lte480wv_data,
157};
158
159static struct s3c_fb_pd_win smdkv310_fb_win0 = {
160 .win_mode = {
161 .left_margin = 13,
162 .right_margin = 8,
163 .upper_margin = 7,
164 .lower_margin = 5,
165 .hsync_len = 3,
166 .vsync_len = 1,
167 .xres = 800,
168 .yres = 480,
169 },
170 .max_bpp = 32,
171 .default_bpp = 24,
172};
173
174static struct s3c_fb_platdata smdkv310_lcd0_pdata __initdata = {
175 .win[0] = &smdkv310_fb_win0,
176 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
177 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
178 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
179};
180
115static struct resource smdkv310_smsc911x_resources[] = { 181static struct resource smdkv310_smsc911x_resources[] = {
116 [0] = { 182 [0] = {
117 .start = EXYNOS4_PA_SROM_BANK(1), 183 .start = EXYNOS4_PA_SROM_BANK(1),
@@ -188,6 +254,8 @@ static struct platform_device *smdkv310_devices[] __initdata = {
188 &exynos4_device_sysmmu, 254 &exynos4_device_sysmmu,
189 &samsung_asoc_dma, 255 &samsung_asoc_dma,
190 &samsung_asoc_idma, 256 &samsung_asoc_idma,
257 &s5p_device_fimd0,
258 &smdkv310_lcd_lte480wv,
191 &smdkv310_smsc911x, 259 &smdkv310_smsc911x,
192 &exynos4_device_ahci, 260 &exynos4_device_ahci,
193}; 261};
@@ -248,6 +316,7 @@ static void __init smdkv310_machine_init(void)
248 samsung_keypad_set_platdata(&smdkv310_keypad_data); 316 samsung_keypad_set_platdata(&smdkv310_keypad_data);
249 317
250 samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data); 318 samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data);
319 s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata);
251 320
252 platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices)); 321 platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
253} 322}
@@ -261,3 +330,12 @@ MACHINE_START(SMDKV310, "SMDKV310")
261 .init_machine = smdkv310_machine_init, 330 .init_machine = smdkv310_machine_init,
262 .timer = &exynos4_timer, 331 .timer = &exynos4_timer,
263MACHINE_END 332MACHINE_END
333
334MACHINE_START(SMDKC210, "SMDKC210")
335 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
336 .boot_params = S5P_PA_SDRAM + 0x100,
337 .init_irq = exynos4_init_irq,
338 .map_io = smdkv310_map_io,
339 .init_machine = smdkv310_machine_init,
340 .timer = &exynos4_timer,
341MACHINE_END
diff --git a/arch/arm/mach-exynos4/mach-universal_c210.c b/arch/arm/mach-exynos4/mach-universal_c210.c
index 0e280d12301e..b3b5d8911004 100644
--- a/arch/arm/mach-exynos4/mach-universal_c210.c
+++ b/arch/arm/mach-exynos4/mach-universal_c210.c
@@ -79,7 +79,7 @@ static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = {
79}; 79};
80 80
81static struct regulator_consumer_supply max8952_consumer = 81static struct regulator_consumer_supply max8952_consumer =
82 REGULATOR_SUPPLY("vddarm", NULL); 82 REGULATOR_SUPPLY("vdd_arm", NULL);
83 83
84static struct max8952_platform_data universal_max8952_pdata __initdata = { 84static struct max8952_platform_data universal_max8952_pdata __initdata = {
85 .gpio_vid0 = EXYNOS4_GPX0(3), 85 .gpio_vid0 = EXYNOS4_GPX0(3),
@@ -105,7 +105,7 @@ static struct max8952_platform_data universal_max8952_pdata __initdata = {
105}; 105};
106 106
107static struct regulator_consumer_supply lp3974_buck1_consumer = 107static struct regulator_consumer_supply lp3974_buck1_consumer =
108 REGULATOR_SUPPLY("vddint", NULL); 108 REGULATOR_SUPPLY("vdd_int", NULL);
109 109
110static struct regulator_consumer_supply lp3974_buck2_consumer = 110static struct regulator_consumer_supply lp3974_buck2_consumer =
111 REGULATOR_SUPPLY("vddg3d", NULL); 111 REGULATOR_SUPPLY("vddg3d", NULL);
diff --git a/arch/arm/mach-exynos4/setup-usb-phy.c b/arch/arm/mach-exynos4/setup-usb-phy.c
index 0883c1b824b9..39aca045f660 100644
--- a/arch/arm/mach-exynos4/setup-usb-phy.c
+++ b/arch/arm/mach-exynos4/setup-usb-phy.c
@@ -82,7 +82,7 @@ static int exynos4_usb_phy1_init(struct platform_device *pdev)
82 82
83 rstcon &= ~(HOST_LINK_PORT_SWRST_MASK | PHY1_SWRST_MASK); 83 rstcon &= ~(HOST_LINK_PORT_SWRST_MASK | PHY1_SWRST_MASK);
84 writel(rstcon, EXYNOS4_RSTCON); 84 writel(rstcon, EXYNOS4_RSTCON);
85 udelay(50); 85 udelay(80);
86 86
87 clk_disable(otg_clk); 87 clk_disable(otg_clk);
88 clk_put(otg_clk); 88 clk_put(otg_clk);
diff --git a/arch/arm/mach-footbridge/Kconfig b/arch/arm/mach-footbridge/Kconfig
index dc26fff22cf0..c8e7afcf14ec 100644
--- a/arch/arm/mach-footbridge/Kconfig
+++ b/arch/arm/mach-footbridge/Kconfig
@@ -62,6 +62,7 @@ config ARCH_EBSA285_HOST
62config ARCH_NETWINDER 62config ARCH_NETWINDER
63 bool "NetWinder" 63 bool "NetWinder"
64 select CLKSRC_I8253 64 select CLKSRC_I8253
65 select CLKEVT_I8253
65 select FOOTBRIDGE_HOST 66 select FOOTBRIDGE_HOST
66 select ISA 67 select ISA
67 select ISA_DMA 68 select ISA_DMA
diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c
index 1331fff51ae2..18c32a5541d9 100644
--- a/arch/arm/mach-footbridge/dc21285.c
+++ b/arch/arm/mach-footbridge/dc21285.c
@@ -18,6 +18,7 @@
18#include <linux/irq.h> 18#include <linux/irq.h>
19#include <linux/io.h> 19#include <linux/io.h>
20#include <linux/spinlock.h> 20#include <linux/spinlock.h>
21#include <video/vga.h>
21 22
22#include <asm/irq.h> 23#include <asm/irq.h>
23#include <asm/system.h> 24#include <asm/system.h>
diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c
index 87887ac5806b..f851fe903687 100644
--- a/arch/arm/mach-imx/mach-cpuimx27.c
+++ b/arch/arm/mach-imx/mach-cpuimx27.c
@@ -310,7 +310,7 @@ static struct sys_timer eukrea_cpuimx27_timer = {
310 .init = eukrea_cpuimx27_timer_init, 310 .init = eukrea_cpuimx27_timer_init,
311}; 311};
312 312
313MACHINE_START(CPUIMX27, "EUKREA CPUIMX27") 313MACHINE_START(EUKREA_CPUIMX27, "EUKREA CPUIMX27")
314 .boot_params = MX27_PHYS_OFFSET + 0x100, 314 .boot_params = MX27_PHYS_OFFSET + 0x100,
315 .map_io = mx27_map_io, 315 .map_io = mx27_map_io,
316 .init_early = imx27_init_early, 316 .init_early = imx27_init_early,
diff --git a/arch/arm/mach-imx/mach-cpuimx35.c b/arch/arm/mach-imx/mach-cpuimx35.c
index 13b704120f07..d69807422847 100644
--- a/arch/arm/mach-imx/mach-cpuimx35.c
+++ b/arch/arm/mach-imx/mach-cpuimx35.c
@@ -192,7 +192,7 @@ struct sys_timer eukrea_cpuimx35_timer = {
192 .init = eukrea_cpuimx35_timer_init, 192 .init = eukrea_cpuimx35_timer_init,
193}; 193};
194 194
195MACHINE_START(EUKREA_CPUIMX35, "Eukrea CPUIMX35") 195MACHINE_START(EUKREA_CPUIMX35SD, "Eukrea CPUIMX35")
196 /* Maintainer: Eukrea Electromatique */ 196 /* Maintainer: Eukrea Electromatique */
197 .boot_params = MX3x_PHYS_OFFSET + 0x100, 197 .boot_params = MX3x_PHYS_OFFSET + 0x100,
198 .map_io = mx35_map_io, 198 .map_io = mx35_map_io,
diff --git a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
index da36da52969d..2442d5da883d 100644
--- a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
+++ b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c
@@ -161,7 +161,7 @@ static struct sys_timer eukrea_cpuimx25_timer = {
161 .init = eukrea_cpuimx25_timer_init, 161 .init = eukrea_cpuimx25_timer_init,
162}; 162};
163 163
164MACHINE_START(EUKREA_CPUIMX25, "Eukrea CPUIMX25") 164MACHINE_START(EUKREA_CPUIMX25SD, "Eukrea CPUIMX25")
165 /* Maintainer: Eukrea Electromatique */ 165 /* Maintainer: Eukrea Electromatique */
166 .boot_params = MX25_PHYS_OFFSET + 0x100, 166 .boot_params = MX25_PHYS_OFFSET + 0x100,
167 .map_io = mx25_map_io, 167 .map_io = mx25_map_io,
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index 2fbbdd5eac35..fcf0ae95651f 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -337,15 +337,15 @@ static unsigned long timer_reload;
337static void integrator_clocksource_init(u32 khz) 337static void integrator_clocksource_init(u32 khz)
338{ 338{
339 void __iomem *base = (void __iomem *)TIMER2_VA_BASE; 339 void __iomem *base = (void __iomem *)TIMER2_VA_BASE;
340 u32 ctrl = TIMER_CTRL_ENABLE; 340 u32 ctrl = TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC;
341 341
342 if (khz >= 1500) { 342 if (khz >= 1500) {
343 khz /= 16; 343 khz /= 16;
344 ctrl = TIMER_CTRL_DIV16; 344 ctrl |= TIMER_CTRL_DIV16;
345 } 345 }
346 346
347 writel(ctrl, base + TIMER_CTRL);
348 writel(0xffff, base + TIMER_LOAD); 347 writel(0xffff, base + TIMER_LOAD);
348 writel(ctrl, base + TIMER_CTRL);
349 349
350 clocksource_mmio_init(base + TIMER_VALUE, "timer2", 350 clocksource_mmio_init(base + TIMER_VALUE, "timer2",
351 khz * 1000, 200, 16, clocksource_mmio_readl_down); 351 khz * 1000, 200, 16, clocksource_mmio_readl_down);
diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c
index a6eddae82a0b..c105556a0ee1 100644
--- a/arch/arm/mach-orion5x/dns323-setup.c
+++ b/arch/arm/mach-orion5x/dns323-setup.c
@@ -77,7 +77,7 @@ static int __init dns323_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
77 /* 77 /*
78 * Check for devices with hard-wired IRQs. 78 * Check for devices with hard-wired IRQs.
79 */ 79 */
80 irq = orion5x_pci_map_irq(const dev, slot, pin); 80 irq = orion5x_pci_map_irq(dev, slot, pin);
81 if (irq != -1) 81 if (irq != -1)
82 return irq; 82 return irq;
83 83
diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index 28b8760ab9fa..bc4a920e26ee 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -14,6 +14,7 @@
14#include <linux/pci.h> 14#include <linux/pci.h>
15#include <linux/slab.h> 15#include <linux/slab.h>
16#include <linux/mbus.h> 16#include <linux/mbus.h>
17#include <video/vga.h>
17#include <asm/irq.h> 18#include <asm/irq.h>
18#include <asm/mach/pci.h> 19#include <asm/mach/pci.h>
19#include <plat/pcie.h> 20#include <plat/pcie.h>
diff --git a/arch/arm/mach-prima2/clock.c b/arch/arm/mach-prima2/clock.c
index f9a2aaf63f71..615a4e75ceab 100644
--- a/arch/arm/mach-prima2/clock.c
+++ b/arch/arm/mach-prima2/clock.c
@@ -481,6 +481,7 @@ static void __init sirfsoc_clk_init(void)
481 481
482static struct of_device_id clkc_ids[] = { 482static struct of_device_id clkc_ids[] = {
483 { .compatible = "sirf,prima2-clkc" }, 483 { .compatible = "sirf,prima2-clkc" },
484 {},
484}; 485};
485 486
486void __init sirfsoc_of_clk_init(void) 487void __init sirfsoc_of_clk_init(void)
diff --git a/arch/arm/mach-prima2/irq.c b/arch/arm/mach-prima2/irq.c
index c3404cbb6ff7..7af254d046ba 100644
--- a/arch/arm/mach-prima2/irq.c
+++ b/arch/arm/mach-prima2/irq.c
@@ -51,6 +51,7 @@ static __init void sirfsoc_irq_init(void)
51 51
52static struct of_device_id intc_ids[] = { 52static struct of_device_id intc_ids[] = {
53 { .compatible = "sirf,prima2-intc" }, 53 { .compatible = "sirf,prima2-intc" },
54 {},
54}; 55};
55 56
56void __init sirfsoc_of_irq_init(void) 57void __init sirfsoc_of_irq_init(void)
diff --git a/arch/arm/mach-prima2/rstc.c b/arch/arm/mach-prima2/rstc.c
index d074786e83d4..492cfa8d2610 100644
--- a/arch/arm/mach-prima2/rstc.c
+++ b/arch/arm/mach-prima2/rstc.c
@@ -19,6 +19,7 @@ static DEFINE_MUTEX(rstc_lock);
19 19
20static struct of_device_id rstc_ids[] = { 20static struct of_device_id rstc_ids[] = {
21 { .compatible = "sirf,prima2-rstc" }, 21 { .compatible = "sirf,prima2-rstc" },
22 {},
22}; 23};
23 24
24static int __init sirfsoc_of_rstc_init(void) 25static int __init sirfsoc_of_rstc_init(void)
diff --git a/arch/arm/mach-prima2/timer.c b/arch/arm/mach-prima2/timer.c
index 44027f34a88a..ed7ec48d11da 100644
--- a/arch/arm/mach-prima2/timer.c
+++ b/arch/arm/mach-prima2/timer.c
@@ -190,6 +190,7 @@ static void __init sirfsoc_timer_init(void)
190 190
191static struct of_device_id timer_ids[] = { 191static struct of_device_id timer_ids[] = {
192 { .compatible = "sirf,prima2-tick" }, 192 { .compatible = "sirf,prima2-tick" },
193 {},
193}; 194};
194 195
195static void __init sirfsoc_of_timer_map(void) 196static void __init sirfsoc_of_timer_map(void)
diff --git a/arch/arm/mach-realview/include/mach/system.h b/arch/arm/mach-realview/include/mach/system.h
index a30f2e3ec178..6657ff231161 100644
--- a/arch/arm/mach-realview/include/mach/system.h
+++ b/arch/arm/mach-realview/include/mach/system.h
@@ -44,6 +44,7 @@ static inline void arch_reset(char mode, const char *cmd)
44 */ 44 */
45 if (realview_reset) 45 if (realview_reset)
46 realview_reset(mode); 46 realview_reset(mode);
47 dsb();
47} 48}
48 49
49#endif 50#endif
diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig
index 7245a55795dc..3700cf32af0f 100644
--- a/arch/arm/mach-s3c2410/Kconfig
+++ b/arch/arm/mach-s3c2410/Kconfig
@@ -8,7 +8,6 @@ config CPU_S3C2410
8 select CPU_ARM920T 8 select CPU_ARM920T
9 select S3C_GPIO_PULL_UP 9 select S3C_GPIO_PULL_UP
10 select S3C2410_CLOCK 10 select S3C2410_CLOCK
11 select S3C2410_GPIO
12 select CPU_LLSERIAL_S3C2410 11 select CPU_LLSERIAL_S3C2410
13 select S3C2410_PM if PM 12 select S3C2410_PM if PM
14 select S3C2410_CPUFREQ if CPU_FREQ_S3C24XX 13 select S3C2410_CPUFREQ if CPU_FREQ_S3C24XX
@@ -28,11 +27,6 @@ config S3C2410_PM
28 help 27 help
29 Power Management code common to S3C2410 and better 28 Power Management code common to S3C2410 and better
30 29
31config S3C2410_GPIO
32 bool
33 help
34 GPIO code for S3C2410 and similar processors
35
36config SIMTEC_NOR 30config SIMTEC_NOR
37 bool 31 bool
38 help 32 help
diff --git a/arch/arm/mach-s3c2410/Makefile b/arch/arm/mach-s3c2410/Makefile
index 81695353d8f4..782fd81144e9 100644
--- a/arch/arm/mach-s3c2410/Makefile
+++ b/arch/arm/mach-s3c2410/Makefile
@@ -13,7 +13,6 @@ obj-$(CONFIG_CPU_S3C2410) += s3c2410.o
13obj-$(CONFIG_CPU_S3C2410_DMA) += dma.o 13obj-$(CONFIG_CPU_S3C2410_DMA) += dma.o
14obj-$(CONFIG_CPU_S3C2410_DMA) += dma.o 14obj-$(CONFIG_CPU_S3C2410_DMA) += dma.o
15obj-$(CONFIG_S3C2410_PM) += pm.o sleep.o 15obj-$(CONFIG_S3C2410_PM) += pm.o sleep.o
16obj-$(CONFIG_S3C2410_GPIO) += gpio.o
17obj-$(CONFIG_S3C2410_CPUFREQ) += cpu-freq.o 16obj-$(CONFIG_S3C2410_CPUFREQ) += cpu-freq.o
18obj-$(CONFIG_S3C2410_PLLTABLE) += pll.o 17obj-$(CONFIG_S3C2410_PLLTABLE) += pll.o
19 18
diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c
index 0d8e043804c2..dbe43df8cfec 100644
--- a/arch/arm/mach-s3c2410/dma.c
+++ b/arch/arm/mach-s3c2410/dma.c
@@ -47,38 +47,26 @@ static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = {
47 .channels[0] = S3C2410_DCON_CH0_SDI | DMA_CH_VALID, 47 .channels[0] = S3C2410_DCON_CH0_SDI | DMA_CH_VALID,
48 .channels[2] = S3C2410_DCON_CH2_SDI | DMA_CH_VALID, 48 .channels[2] = S3C2410_DCON_CH2_SDI | DMA_CH_VALID,
49 .channels[3] = S3C2410_DCON_CH3_SDI | DMA_CH_VALID, 49 .channels[3] = S3C2410_DCON_CH3_SDI | DMA_CH_VALID,
50 .hw_addr.to = S3C2410_PA_IIS + S3C2410_IISFIFO,
51 .hw_addr.from = S3C2410_PA_IIS + S3C2410_IISFIFO,
52 }, 50 },
53 [DMACH_SPI0] = { 51 [DMACH_SPI0] = {
54 .name = "spi0", 52 .name = "spi0",
55 .channels[1] = S3C2410_DCON_CH1_SPI | DMA_CH_VALID, 53 .channels[1] = S3C2410_DCON_CH1_SPI | DMA_CH_VALID,
56 .hw_addr.to = S3C2410_PA_SPI + S3C2410_SPTDAT,
57 .hw_addr.from = S3C2410_PA_SPI + S3C2410_SPRDAT,
58 }, 54 },
59 [DMACH_SPI1] = { 55 [DMACH_SPI1] = {
60 .name = "spi1", 56 .name = "spi1",
61 .channels[3] = S3C2410_DCON_CH3_SPI | DMA_CH_VALID, 57 .channels[3] = S3C2410_DCON_CH3_SPI | DMA_CH_VALID,
62 .hw_addr.to = S3C2410_PA_SPI + 0x20 + S3C2410_SPTDAT,
63 .hw_addr.from = S3C2410_PA_SPI + 0x20 + S3C2410_SPRDAT,
64 }, 58 },
65 [DMACH_UART0] = { 59 [DMACH_UART0] = {
66 .name = "uart0", 60 .name = "uart0",
67 .channels[0] = S3C2410_DCON_CH0_UART0 | DMA_CH_VALID, 61 .channels[0] = S3C2410_DCON_CH0_UART0 | DMA_CH_VALID,
68 .hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH,
69 .hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH,
70 }, 62 },
71 [DMACH_UART1] = { 63 [DMACH_UART1] = {
72 .name = "uart1", 64 .name = "uart1",
73 .channels[1] = S3C2410_DCON_CH1_UART1 | DMA_CH_VALID, 65 .channels[1] = S3C2410_DCON_CH1_UART1 | DMA_CH_VALID,
74 .hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH,
75 .hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH,
76 }, 66 },
77 [DMACH_UART2] = { 67 [DMACH_UART2] = {
78 .name = "uart2", 68 .name = "uart2",
79 .channels[3] = S3C2410_DCON_CH3_UART2 | DMA_CH_VALID, 69 .channels[3] = S3C2410_DCON_CH3_UART2 | DMA_CH_VALID,
80 .hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH,
81 .hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH,
82 }, 70 },
83 [DMACH_TIMER] = { 71 [DMACH_TIMER] = {
84 .name = "timer", 72 .name = "timer",
@@ -90,12 +78,10 @@ static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = {
90 .name = "i2s-sdi", 78 .name = "i2s-sdi",
91 .channels[1] = S3C2410_DCON_CH1_I2SSDI | DMA_CH_VALID, 79 .channels[1] = S3C2410_DCON_CH1_I2SSDI | DMA_CH_VALID,
92 .channels[2] = S3C2410_DCON_CH2_I2SSDI | DMA_CH_VALID, 80 .channels[2] = S3C2410_DCON_CH2_I2SSDI | DMA_CH_VALID,
93 .hw_addr.from = S3C2410_PA_IIS + S3C2410_IISFIFO,
94 }, 81 },
95 [DMACH_I2S_OUT] = { 82 [DMACH_I2S_OUT] = {
96 .name = "i2s-sdo", 83 .name = "i2s-sdo",
97 .channels[2] = S3C2410_DCON_CH2_I2SSDO | DMA_CH_VALID, 84 .channels[2] = S3C2410_DCON_CH2_I2SSDO | DMA_CH_VALID,
98 .hw_addr.to = S3C2410_PA_IIS + S3C2410_IISFIFO,
99 }, 85 },
100 [DMACH_USB_EP1] = { 86 [DMACH_USB_EP1] = {
101 .name = "usb-ep1", 87 .name = "usb-ep1",
diff --git a/arch/arm/mach-s3c2410/gpio.c b/arch/arm/mach-s3c2410/gpio.c
deleted file mode 100644
index 9664e011dae2..000000000000
--- a/arch/arm/mach-s3c2410/gpio.c
+++ /dev/null
@@ -1,72 +0,0 @@
1/* linux/arch/arm/mach-s3c2410/gpio.c
2 *
3 * Copyright (c) 2004-2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C2410 GPIO support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#include <linux/kernel.h>
24#include <linux/init.h>
25#include <linux/module.h>
26#include <linux/interrupt.h>
27#include <linux/ioport.h>
28#include <linux/io.h>
29
30#include <mach/hardware.h>
31#include <mach/gpio-fns.h>
32#include <asm/irq.h>
33
34#include <mach/regs-gpio.h>
35
36int s3c2410_gpio_irqfilter(unsigned int pin, unsigned int on,
37 unsigned int config)
38{
39 void __iomem *reg = S3C24XX_EINFLT0;
40 unsigned long flags;
41 unsigned long val;
42
43 if (pin < S3C2410_GPG(8) || pin > S3C2410_GPG(15))
44 return -EINVAL;
45
46 config &= 0xff;
47
48 pin -= S3C2410_GPG(8);
49 reg += pin & ~3;
50
51 local_irq_save(flags);
52
53 /* update filter width and clock source */
54
55 val = __raw_readl(reg);
56 val &= ~(0xff << ((pin & 3) * 8));
57 val |= config << ((pin & 3) * 8);
58 __raw_writel(val, reg);
59
60 /* update filter enable */
61
62 val = __raw_readl(S3C24XX_EXTINT2);
63 val &= ~(1 << ((pin * 4) + 3));
64 val |= on << ((pin * 4) + 3);
65 __raw_writel(val, S3C24XX_EXTINT2);
66
67 local_irq_restore(flags);
68
69 return 0;
70}
71
72EXPORT_SYMBOL(s3c2410_gpio_irqfilter);
diff --git a/arch/arm/mach-s3c2410/include/mach/map.h b/arch/arm/mach-s3c2410/include/mach/map.h
index 425552d84b60..4cf495f813a7 100644
--- a/arch/arm/mach-s3c2410/include/mach/map.h
+++ b/arch/arm/mach-s3c2410/include/mach/map.h
@@ -14,9 +14,53 @@
14#define __ASM_ARCH_MAP_H 14#define __ASM_ARCH_MAP_H
15 15
16#include <plat/map-base.h> 16#include <plat/map-base.h>
17#include <plat/map.h>
18 17
19#define S3C2410_ADDR(x) S3C_ADDR(x) 18/*
19 * S3C2410 UART offset is 0x4000 but the other SoCs are 0x400.
20 * So need to define it, and here is to avoid redefinition warning.
21 */
22#define S3C_UART_OFFSET (0x4000)
23
24#include <plat/map-s3c.h>
25
26/*
27 * interrupt controller is the first thing we put in, to make
28 * the assembly code for the irq detection easier
29 */
30#define S3C2410_PA_IRQ (0x4A000000)
31#define S3C24XX_SZ_IRQ SZ_1M
32
33/* memory controller registers */
34#define S3C2410_PA_MEMCTRL (0x48000000)
35#define S3C24XX_SZ_MEMCTRL SZ_1M
36
37/* UARTs */
38#define S3C_VA_UARTx(uart) (S3C_VA_UART + ((uart * S3C_UART_OFFSET)))
39
40/* Timers */
41#define S3C2410_PA_TIMER (0x51000000)
42#define S3C24XX_SZ_TIMER SZ_1M
43
44/* Clock and Power management */
45#define S3C24XX_SZ_CLKPWR SZ_1M
46
47/* USB Device port */
48#define S3C2410_PA_USBDEV (0x52000000)
49#define S3C24XX_SZ_USBDEV SZ_1M
50
51/* Watchdog */
52#define S3C2410_PA_WATCHDOG (0x53000000)
53#define S3C24XX_SZ_WATCHDOG SZ_1M
54
55/* Standard size definitions for peripheral blocks. */
56
57#define S3C24XX_SZ_UART SZ_1M
58#define S3C24XX_SZ_IIS SZ_1M
59#define S3C24XX_SZ_ADC SZ_1M
60#define S3C24XX_SZ_SPI SZ_1M
61#define S3C24XX_SZ_SDI SZ_1M
62#define S3C24XX_SZ_NAND SZ_1M
63#define S3C24XX_SZ_GPIO SZ_1M
20 64
21/* USB host controller */ 65/* USB host controller */
22#define S3C2410_PA_USBHOST (0x49000000) 66#define S3C2410_PA_USBHOST (0x49000000)
@@ -75,10 +119,8 @@
75 119
76/* S3C2412 memory and IO controls */ 120/* S3C2412 memory and IO controls */
77#define S3C2412_PA_SSMC (0x4F000000) 121#define S3C2412_PA_SSMC (0x4F000000)
78#define S3C2412_VA_SSMC S3C_ADDR_CPU(0x00000000)
79 122
80#define S3C2412_PA_EBI (0x48800000) 123#define S3C2412_PA_EBI (0x48800000)
81#define S3C2412_VA_EBI S3C_ADDR_CPU(0x00010000)
82 124
83/* physical addresses of all the chip-select areas */ 125/* physical addresses of all the chip-select areas */
84 126
@@ -100,12 +142,10 @@
100#define S3C24XX_PA_DMA S3C2410_PA_DMA 142#define S3C24XX_PA_DMA S3C2410_PA_DMA
101#define S3C24XX_PA_CLKPWR S3C2410_PA_CLKPWR 143#define S3C24XX_PA_CLKPWR S3C2410_PA_CLKPWR
102#define S3C24XX_PA_LCD S3C2410_PA_LCD 144#define S3C24XX_PA_LCD S3C2410_PA_LCD
103#define S3C24XX_PA_UART S3C2410_PA_UART
104#define S3C24XX_PA_TIMER S3C2410_PA_TIMER 145#define S3C24XX_PA_TIMER S3C2410_PA_TIMER
105#define S3C24XX_PA_USBDEV S3C2410_PA_USBDEV 146#define S3C24XX_PA_USBDEV S3C2410_PA_USBDEV
106#define S3C24XX_PA_WATCHDOG S3C2410_PA_WATCHDOG 147#define S3C24XX_PA_WATCHDOG S3C2410_PA_WATCHDOG
107#define S3C24XX_PA_IIS S3C2410_PA_IIS 148#define S3C24XX_PA_IIS S3C2410_PA_IIS
108#define S3C24XX_PA_GPIO S3C2410_PA_GPIO
109#define S3C24XX_PA_RTC S3C2410_PA_RTC 149#define S3C24XX_PA_RTC S3C2410_PA_RTC
110#define S3C24XX_PA_ADC S3C2410_PA_ADC 150#define S3C24XX_PA_ADC S3C2410_PA_ADC
111#define S3C24XX_PA_SPI S3C2410_PA_SPI 151#define S3C24XX_PA_SPI S3C2410_PA_SPI
diff --git a/arch/arm/mach-s3c2412/Kconfig b/arch/arm/mach-s3c2412/Kconfig
index c2cf4e569989..b8b9029e9f2d 100644
--- a/arch/arm/mach-s3c2412/Kconfig
+++ b/arch/arm/mach-s3c2412/Kconfig
@@ -9,7 +9,6 @@ config CPU_S3C2412
9 select CPU_LLSERIAL_S3C2440 9 select CPU_LLSERIAL_S3C2440
10 select S3C2412_PM if PM 10 select S3C2412_PM if PM
11 select S3C2412_DMA if S3C2410_DMA 11 select S3C2412_DMA if S3C2410_DMA
12 select S3C2410_GPIO
13 help 12 help
14 Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line 13 Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line
15 14
diff --git a/arch/arm/mach-s3c2412/Makefile b/arch/arm/mach-s3c2412/Makefile
index 6c48a91ea39e..7e4d95fa8a97 100644
--- a/arch/arm/mach-s3c2412/Makefile
+++ b/arch/arm/mach-s3c2412/Makefile
@@ -12,7 +12,6 @@ obj- :=
12obj-$(CONFIG_CPU_S3C2412) += s3c2412.o 12obj-$(CONFIG_CPU_S3C2412) += s3c2412.o
13obj-$(CONFIG_CPU_S3C2412) += irq.o 13obj-$(CONFIG_CPU_S3C2412) += irq.o
14obj-$(CONFIG_CPU_S3C2412) += clock.o 14obj-$(CONFIG_CPU_S3C2412) += clock.o
15obj-$(CONFIG_CPU_S3C2412) += gpio.o
16obj-$(CONFIG_S3C2412_DMA) += dma.o 15obj-$(CONFIG_S3C2412_DMA) += dma.o
17obj-$(CONFIG_S3C2412_PM) += pm.o 16obj-$(CONFIG_S3C2412_PM) += pm.o
18obj-$(CONFIG_S3C2412_PM_SLEEP) += sleep.o 17obj-$(CONFIG_S3C2412_PM_SLEEP) += sleep.o
diff --git a/arch/arm/mach-s3c2412/dma.c b/arch/arm/mach-s3c2412/dma.c
index 7abecfca0b7e..c61e3261615d 100644
--- a/arch/arm/mach-s3c2412/dma.c
+++ b/arch/arm/mach-s3c2412/dma.c
@@ -50,64 +50,46 @@ static struct s3c24xx_dma_map __initdata s3c2412_dma_mappings[] = {
50 .name = "sdi", 50 .name = "sdi",
51 .channels = MAP(S3C2412_DMAREQSEL_SDI), 51 .channels = MAP(S3C2412_DMAREQSEL_SDI),
52 .channels_rx = MAP(S3C2412_DMAREQSEL_SDI), 52 .channels_rx = MAP(S3C2412_DMAREQSEL_SDI),
53 .hw_addr.to = S3C2410_PA_SDI + S3C2410_SDIDATA,
54 .hw_addr.from = S3C2410_PA_SDI + S3C2410_SDIDATA,
55 }, 53 },
56 [DMACH_SPI0] = { 54 [DMACH_SPI0] = {
57 .name = "spi0", 55 .name = "spi0",
58 .channels = MAP(S3C2412_DMAREQSEL_SPI0TX), 56 .channels = MAP(S3C2412_DMAREQSEL_SPI0TX),
59 .channels_rx = MAP(S3C2412_DMAREQSEL_SPI0RX), 57 .channels_rx = MAP(S3C2412_DMAREQSEL_SPI0RX),
60 .hw_addr.to = S3C2410_PA_SPI + S3C2410_SPTDAT,
61 .hw_addr.from = S3C2410_PA_SPI + S3C2410_SPRDAT,
62 }, 58 },
63 [DMACH_SPI1] = { 59 [DMACH_SPI1] = {
64 .name = "spi1", 60 .name = "spi1",
65 .channels = MAP(S3C2412_DMAREQSEL_SPI1TX), 61 .channels = MAP(S3C2412_DMAREQSEL_SPI1TX),
66 .channels_rx = MAP(S3C2412_DMAREQSEL_SPI1RX), 62 .channels_rx = MAP(S3C2412_DMAREQSEL_SPI1RX),
67 .hw_addr.to = S3C2410_PA_SPI + S3C2412_SPI1 + S3C2410_SPTDAT,
68 .hw_addr.from = S3C2410_PA_SPI + S3C2412_SPI1 + S3C2410_SPRDAT,
69 }, 63 },
70 [DMACH_UART0] = { 64 [DMACH_UART0] = {
71 .name = "uart0", 65 .name = "uart0",
72 .channels = MAP(S3C2412_DMAREQSEL_UART0_0), 66 .channels = MAP(S3C2412_DMAREQSEL_UART0_0),
73 .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_0), 67 .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_0),
74 .hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH,
75 .hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH,
76 }, 68 },
77 [DMACH_UART1] = { 69 [DMACH_UART1] = {
78 .name = "uart1", 70 .name = "uart1",
79 .channels = MAP(S3C2412_DMAREQSEL_UART1_0), 71 .channels = MAP(S3C2412_DMAREQSEL_UART1_0),
80 .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_0), 72 .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_0),
81 .hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH,
82 .hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH,
83 }, 73 },
84 [DMACH_UART2] = { 74 [DMACH_UART2] = {
85 .name = "uart2", 75 .name = "uart2",
86 .channels = MAP(S3C2412_DMAREQSEL_UART2_0), 76 .channels = MAP(S3C2412_DMAREQSEL_UART2_0),
87 .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_0), 77 .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_0),
88 .hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH,
89 .hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH,
90 }, 78 },
91 [DMACH_UART0_SRC2] = { 79 [DMACH_UART0_SRC2] = {
92 .name = "uart0", 80 .name = "uart0",
93 .channels = MAP(S3C2412_DMAREQSEL_UART0_1), 81 .channels = MAP(S3C2412_DMAREQSEL_UART0_1),
94 .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_1), 82 .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_1),
95 .hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH,
96 .hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH,
97 }, 83 },
98 [DMACH_UART1_SRC2] = { 84 [DMACH_UART1_SRC2] = {
99 .name = "uart1", 85 .name = "uart1",
100 .channels = MAP(S3C2412_DMAREQSEL_UART1_1), 86 .channels = MAP(S3C2412_DMAREQSEL_UART1_1),
101 .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_1), 87 .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_1),
102 .hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH,
103 .hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH,
104 }, 88 },
105 [DMACH_UART2_SRC2] = { 89 [DMACH_UART2_SRC2] = {
106 .name = "uart2", 90 .name = "uart2",
107 .channels = MAP(S3C2412_DMAREQSEL_UART2_1), 91 .channels = MAP(S3C2412_DMAREQSEL_UART2_1),
108 .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_1), 92 .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_1),
109 .hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH,
110 .hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH,
111 }, 93 },
112 [DMACH_TIMER] = { 94 [DMACH_TIMER] = {
113 .name = "timer", 95 .name = "timer",
diff --git a/arch/arm/mach-s3c2412/gpio.c b/arch/arm/mach-s3c2412/gpio.c
deleted file mode 100644
index 3404a876b33e..000000000000
--- a/arch/arm/mach-s3c2412/gpio.c
+++ /dev/null
@@ -1,62 +0,0 @@
1/* linux/arch/arm/mach-s3c2412/gpio.c
2 *
3 * Copyright (c) 2007 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * http://armlinux.simtec.co.uk/.
7 *
8 * S3C2412/S3C2413 specific GPIO support
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/kernel.h>
16#include <linux/types.h>
17#include <linux/module.h>
18#include <linux/interrupt.h>
19#include <linux/gpio.h>
20
21#include <asm/mach/arch.h>
22#include <asm/mach/map.h>
23
24#include <mach/regs-gpio.h>
25#include <mach/hardware.h>
26
27#include <plat/gpio-core.h>
28
29int s3c2412_gpio_set_sleepcfg(unsigned int pin, unsigned int state)
30{
31 struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin);
32 unsigned long offs = pin - chip->chip.base;
33 unsigned long flags;
34 unsigned long slpcon;
35
36 offs *= 2;
37
38 if (pin < S3C2410_GPB(0))
39 return -EINVAL;
40
41 if (pin >= S3C2410_GPF(0) &&
42 pin <= S3C2410_GPG(16))
43 return -EINVAL;
44
45 if (pin > S3C2410_GPH(16))
46 return -EINVAL;
47
48 local_irq_save(flags);
49
50 slpcon = __raw_readl(chip->base + 0x0C);
51
52 slpcon &= ~(3 << offs);
53 slpcon |= state << offs;
54
55 __raw_writel(slpcon, chip->base + 0x0C);
56
57 local_irq_restore(flags);
58
59 return 0;
60}
61
62EXPORT_SYMBOL(s3c2412_gpio_set_sleepcfg);
diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig
index 50825a3f91cc..c461fb8e15c0 100644
--- a/arch/arm/mach-s3c2440/Kconfig
+++ b/arch/arm/mach-s3c2440/Kconfig
@@ -8,7 +8,6 @@ config CPU_S3C2440
8 select S3C_GPIO_PULL_UP 8 select S3C_GPIO_PULL_UP
9 select S3C2410_CLOCK 9 select S3C2410_CLOCK
10 select S3C2410_PM if PM 10 select S3C2410_PM if PM
11 select S3C2410_GPIO
12 select S3C2440_DMA if S3C2410_DMA 11 select S3C2440_DMA if S3C2410_DMA
13 select CPU_S3C244X 12 select CPU_S3C244X
14 select CPU_LLSERIAL_S3C2440 13 select CPU_LLSERIAL_S3C2440
@@ -20,7 +19,6 @@ config CPU_S3C2442
20 select CPU_ARM920T 19 select CPU_ARM920T
21 select S3C_GPIO_PULL_DOWN 20 select S3C_GPIO_PULL_DOWN
22 select S3C2410_CLOCK 21 select S3C2410_CLOCK
23 select S3C2410_GPIO
24 select S3C2410_PM if PM 22 select S3C2410_PM if PM
25 select CPU_S3C244X 23 select CPU_S3C244X
26 select CPU_LLSERIAL_S3C2440 24 select CPU_LLSERIAL_S3C2440
diff --git a/arch/arm/mach-s3c2440/dma.c b/arch/arm/mach-s3c2440/dma.c
index 3b0529f54e9c..0e73f8f9d132 100644
--- a/arch/arm/mach-s3c2440/dma.c
+++ b/arch/arm/mach-s3c2440/dma.c
@@ -48,38 +48,26 @@ static struct s3c24xx_dma_map __initdata s3c2440_dma_mappings[] = {
48 .channels[1] = S3C2440_DCON_CH1_SDI | DMA_CH_VALID, 48 .channels[1] = S3C2440_DCON_CH1_SDI | DMA_CH_VALID,
49 .channels[2] = S3C2410_DCON_CH2_SDI | DMA_CH_VALID, 49 .channels[2] = S3C2410_DCON_CH2_SDI | DMA_CH_VALID,
50 .channels[3] = S3C2410_DCON_CH3_SDI | DMA_CH_VALID, 50 .channels[3] = S3C2410_DCON_CH3_SDI | DMA_CH_VALID,
51 .hw_addr.to = S3C2410_PA_IIS + S3C2410_IISFIFO,
52 .hw_addr.from = S3C2410_PA_IIS + S3C2410_IISFIFO,
53 }, 51 },
54 [DMACH_SPI0] = { 52 [DMACH_SPI0] = {
55 .name = "spi0", 53 .name = "spi0",
56 .channels[1] = S3C2410_DCON_CH1_SPI | DMA_CH_VALID, 54 .channels[1] = S3C2410_DCON_CH1_SPI | DMA_CH_VALID,
57 .hw_addr.to = S3C2410_PA_SPI + S3C2410_SPTDAT,
58 .hw_addr.from = S3C2410_PA_SPI + S3C2410_SPRDAT,
59 }, 55 },
60 [DMACH_SPI1] = { 56 [DMACH_SPI1] = {
61 .name = "spi1", 57 .name = "spi1",
62 .channels[3] = S3C2410_DCON_CH3_SPI | DMA_CH_VALID, 58 .channels[3] = S3C2410_DCON_CH3_SPI | DMA_CH_VALID,
63 .hw_addr.to = S3C2410_PA_SPI + 0x20 + S3C2410_SPTDAT,
64 .hw_addr.from = S3C2410_PA_SPI + 0x20 + S3C2410_SPRDAT,
65 }, 59 },
66 [DMACH_UART0] = { 60 [DMACH_UART0] = {
67 .name = "uart0", 61 .name = "uart0",
68 .channels[0] = S3C2410_DCON_CH0_UART0 | DMA_CH_VALID, 62 .channels[0] = S3C2410_DCON_CH0_UART0 | DMA_CH_VALID,
69 .hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH,
70 .hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH,
71 }, 63 },
72 [DMACH_UART1] = { 64 [DMACH_UART1] = {
73 .name = "uart1", 65 .name = "uart1",
74 .channels[1] = S3C2410_DCON_CH1_UART1 | DMA_CH_VALID, 66 .channels[1] = S3C2410_DCON_CH1_UART1 | DMA_CH_VALID,
75 .hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH,
76 .hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH,
77 }, 67 },
78 [DMACH_UART2] = { 68 [DMACH_UART2] = {
79 .name = "uart2", 69 .name = "uart2",
80 .channels[3] = S3C2410_DCON_CH3_UART2 | DMA_CH_VALID, 70 .channels[3] = S3C2410_DCON_CH3_UART2 | DMA_CH_VALID,
81 .hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH,
82 .hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH,
83 }, 71 },
84 [DMACH_TIMER] = { 72 [DMACH_TIMER] = {
85 .name = "timer", 73 .name = "timer",
@@ -91,31 +79,26 @@ static struct s3c24xx_dma_map __initdata s3c2440_dma_mappings[] = {
91 .name = "i2s-sdi", 79 .name = "i2s-sdi",
92 .channels[1] = S3C2410_DCON_CH1_I2SSDI | DMA_CH_VALID, 80 .channels[1] = S3C2410_DCON_CH1_I2SSDI | DMA_CH_VALID,
93 .channels[2] = S3C2410_DCON_CH2_I2SSDI | DMA_CH_VALID, 81 .channels[2] = S3C2410_DCON_CH2_I2SSDI | DMA_CH_VALID,
94 .hw_addr.from = S3C2410_PA_IIS + S3C2410_IISFIFO,
95 }, 82 },
96 [DMACH_I2S_OUT] = { 83 [DMACH_I2S_OUT] = {
97 .name = "i2s-sdo", 84 .name = "i2s-sdo",
98 .channels[0] = S3C2440_DCON_CH0_I2SSDO | DMA_CH_VALID, 85 .channels[0] = S3C2440_DCON_CH0_I2SSDO | DMA_CH_VALID,
99 .channels[2] = S3C2410_DCON_CH2_I2SSDO | DMA_CH_VALID, 86 .channels[2] = S3C2410_DCON_CH2_I2SSDO | DMA_CH_VALID,
100 .hw_addr.to = S3C2410_PA_IIS + S3C2410_IISFIFO,
101 }, 87 },
102 [DMACH_PCM_IN] = { 88 [DMACH_PCM_IN] = {
103 .name = "pcm-in", 89 .name = "pcm-in",
104 .channels[0] = S3C2440_DCON_CH0_PCMIN | DMA_CH_VALID, 90 .channels[0] = S3C2440_DCON_CH0_PCMIN | DMA_CH_VALID,
105 .channels[2] = S3C2440_DCON_CH2_PCMIN | DMA_CH_VALID, 91 .channels[2] = S3C2440_DCON_CH2_PCMIN | DMA_CH_VALID,
106 .hw_addr.from = S3C2440_PA_AC97 + S3C_AC97_PCM_DATA,
107 }, 92 },
108 [DMACH_PCM_OUT] = { 93 [DMACH_PCM_OUT] = {
109 .name = "pcm-out", 94 .name = "pcm-out",
110 .channels[1] = S3C2440_DCON_CH1_PCMOUT | DMA_CH_VALID, 95 .channels[1] = S3C2440_DCON_CH1_PCMOUT | DMA_CH_VALID,
111 .channels[3] = S3C2440_DCON_CH3_PCMOUT | DMA_CH_VALID, 96 .channels[3] = S3C2440_DCON_CH3_PCMOUT | DMA_CH_VALID,
112 .hw_addr.to = S3C2440_PA_AC97 + S3C_AC97_PCM_DATA,
113 }, 97 },
114 [DMACH_MIC_IN] = { 98 [DMACH_MIC_IN] = {
115 .name = "mic-in", 99 .name = "mic-in",
116 .channels[2] = S3C2440_DCON_CH2_MICIN | DMA_CH_VALID, 100 .channels[2] = S3C2440_DCON_CH2_MICIN | DMA_CH_VALID,
117 .channels[3] = S3C2440_DCON_CH3_MICIN | DMA_CH_VALID, 101 .channels[3] = S3C2440_DCON_CH3_MICIN | DMA_CH_VALID,
118 .hw_addr.from = S3C2440_PA_AC97 + S3C_AC97_MIC_DATA,
119 }, 102 },
120 [DMACH_USB_EP1] = { 103 [DMACH_USB_EP1] = {
121 .name = "usb-ep1", 104 .name = "usb-ep1",
diff --git a/arch/arm/mach-s3c2443/dma.c b/arch/arm/mach-s3c2443/dma.c
index 3f658685ec16..fe52151d2e84 100644
--- a/arch/arm/mach-s3c2443/dma.c
+++ b/arch/arm/mach-s3c2443/dma.c
@@ -54,68 +54,46 @@ static struct s3c24xx_dma_map __initdata s3c2443_dma_mappings[] = {
54 [DMACH_SDI] = { 54 [DMACH_SDI] = {
55 .name = "sdi", 55 .name = "sdi",
56 .channels = MAP(S3C2443_DMAREQSEL_SDI), 56 .channels = MAP(S3C2443_DMAREQSEL_SDI),
57 .hw_addr.to = S3C2410_PA_IIS + S3C2410_IISFIFO,
58 .hw_addr.from = S3C2410_PA_IIS + S3C2410_IISFIFO,
59 }, 57 },
60 [DMACH_SPI0] = { 58 [DMACH_SPI0] = {
61 .name = "spi0", 59 .name = "spi0",
62 .channels = MAP(S3C2443_DMAREQSEL_SPI0TX), 60 .channels = MAP(S3C2443_DMAREQSEL_SPI0TX),
63 .hw_addr.to = S3C2410_PA_SPI + S3C2410_SPTDAT,
64 .hw_addr.from = S3C2410_PA_SPI + S3C2410_SPRDAT,
65 }, 61 },
66 [DMACH_SPI1] = { 62 [DMACH_SPI1] = {
67 .name = "spi1", 63 .name = "spi1",
68 .channels = MAP(S3C2443_DMAREQSEL_SPI1TX), 64 .channels = MAP(S3C2443_DMAREQSEL_SPI1TX),
69 .hw_addr.to = S3C2410_PA_SPI + 0x20 + S3C2410_SPTDAT,
70 .hw_addr.from = S3C2410_PA_SPI + 0x20 + S3C2410_SPRDAT,
71 }, 65 },
72 [DMACH_UART0] = { 66 [DMACH_UART0] = {
73 .name = "uart0", 67 .name = "uart0",
74 .channels = MAP(S3C2443_DMAREQSEL_UART0_0), 68 .channels = MAP(S3C2443_DMAREQSEL_UART0_0),
75 .hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH,
76 .hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH,
77 }, 69 },
78 [DMACH_UART1] = { 70 [DMACH_UART1] = {
79 .name = "uart1", 71 .name = "uart1",
80 .channels = MAP(S3C2443_DMAREQSEL_UART1_0), 72 .channels = MAP(S3C2443_DMAREQSEL_UART1_0),
81 .hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH,
82 .hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH,
83 }, 73 },
84 [DMACH_UART2] = { 74 [DMACH_UART2] = {
85 .name = "uart2", 75 .name = "uart2",
86 .channels = MAP(S3C2443_DMAREQSEL_UART2_0), 76 .channels = MAP(S3C2443_DMAREQSEL_UART2_0),
87 .hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH,
88 .hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH,
89 }, 77 },
90 [DMACH_UART3] = { 78 [DMACH_UART3] = {
91 .name = "uart3", 79 .name = "uart3",
92 .channels = MAP(S3C2443_DMAREQSEL_UART3_0), 80 .channels = MAP(S3C2443_DMAREQSEL_UART3_0),
93 .hw_addr.to = S3C2443_PA_UART3 + S3C2410_UTXH,
94 .hw_addr.from = S3C2443_PA_UART3 + S3C2410_URXH,
95 }, 81 },
96 [DMACH_UART0_SRC2] = { 82 [DMACH_UART0_SRC2] = {
97 .name = "uart0", 83 .name = "uart0",
98 .channels = MAP(S3C2443_DMAREQSEL_UART0_1), 84 .channels = MAP(S3C2443_DMAREQSEL_UART0_1),
99 .hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH,
100 .hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH,
101 }, 85 },
102 [DMACH_UART1_SRC2] = { 86 [DMACH_UART1_SRC2] = {
103 .name = "uart1", 87 .name = "uart1",
104 .channels = MAP(S3C2443_DMAREQSEL_UART1_1), 88 .channels = MAP(S3C2443_DMAREQSEL_UART1_1),
105 .hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH,
106 .hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH,
107 }, 89 },
108 [DMACH_UART2_SRC2] = { 90 [DMACH_UART2_SRC2] = {
109 .name = "uart2", 91 .name = "uart2",
110 .channels = MAP(S3C2443_DMAREQSEL_UART2_1), 92 .channels = MAP(S3C2443_DMAREQSEL_UART2_1),
111 .hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH,
112 .hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH,
113 }, 93 },
114 [DMACH_UART3_SRC2] = { 94 [DMACH_UART3_SRC2] = {
115 .name = "uart3", 95 .name = "uart3",
116 .channels = MAP(S3C2443_DMAREQSEL_UART3_1), 96 .channels = MAP(S3C2443_DMAREQSEL_UART3_1),
117 .hw_addr.to = S3C2443_PA_UART3 + S3C2410_UTXH,
118 .hw_addr.from = S3C2443_PA_UART3 + S3C2410_URXH,
119 }, 97 },
120 [DMACH_TIMER] = { 98 [DMACH_TIMER] = {
121 .name = "timer", 99 .name = "timer",
@@ -124,27 +102,22 @@ static struct s3c24xx_dma_map __initdata s3c2443_dma_mappings[] = {
124 [DMACH_I2S_IN] = { 102 [DMACH_I2S_IN] = {
125 .name = "i2s-sdi", 103 .name = "i2s-sdi",
126 .channels = MAP(S3C2443_DMAREQSEL_I2SRX), 104 .channels = MAP(S3C2443_DMAREQSEL_I2SRX),
127 .hw_addr.from = S3C2410_PA_IIS + S3C2410_IISFIFO,
128 }, 105 },
129 [DMACH_I2S_OUT] = { 106 [DMACH_I2S_OUT] = {
130 .name = "i2s-sdo", 107 .name = "i2s-sdo",
131 .channels = MAP(S3C2443_DMAREQSEL_I2STX), 108 .channels = MAP(S3C2443_DMAREQSEL_I2STX),
132 .hw_addr.to = S3C2410_PA_IIS + S3C2410_IISFIFO,
133 }, 109 },
134 [DMACH_PCM_IN] = { 110 [DMACH_PCM_IN] = {
135 .name = "pcm-in", 111 .name = "pcm-in",
136 .channels = MAP(S3C2443_DMAREQSEL_PCMIN), 112 .channels = MAP(S3C2443_DMAREQSEL_PCMIN),
137 .hw_addr.from = S3C2440_PA_AC97 + S3C_AC97_PCM_DATA,
138 }, 113 },
139 [DMACH_PCM_OUT] = { 114 [DMACH_PCM_OUT] = {
140 .name = "pcm-out", 115 .name = "pcm-out",
141 .channels = MAP(S3C2443_DMAREQSEL_PCMOUT), 116 .channels = MAP(S3C2443_DMAREQSEL_PCMOUT),
142 .hw_addr.to = S3C2440_PA_AC97 + S3C_AC97_PCM_DATA,
143 }, 117 },
144 [DMACH_MIC_IN] = { 118 [DMACH_MIC_IN] = {
145 .name = "mic-in", 119 .name = "mic-in",
146 .channels = MAP(S3C2443_DMAREQSEL_MICIN), 120 .channels = MAP(S3C2443_DMAREQSEL_MICIN),
147 .hw_addr.from = S3C2440_PA_AC97 + S3C_AC97_MIC_DATA,
148 }, 121 },
149}; 122};
150 123
diff --git a/arch/arm/mach-s3c64xx/include/mach/map.h b/arch/arm/mach-s3c64xx/include/mach/map.h
index a1f13f02c841..23a1d71e4d53 100644
--- a/arch/arm/mach-s3c64xx/include/mach/map.h
+++ b/arch/arm/mach-s3c64xx/include/mach/map.h
@@ -16,6 +16,7 @@
16#define __ASM_ARCH_MAP_H __FILE__ 16#define __ASM_ARCH_MAP_H __FILE__
17 17
18#include <plat/map-base.h> 18#include <plat/map-base.h>
19#include <plat/map-s3c.h>
19 20
20/* 21/*
21 * Post-mux Chip Select Regions Xm0CSn_ 22 * Post-mux Chip Select Regions Xm0CSn_
@@ -83,7 +84,6 @@
83#define S3C64XX_PA_IIC1 (0x7F00F000) 84#define S3C64XX_PA_IIC1 (0x7F00F000)
84 85
85#define S3C64XX_PA_GPIO (0x7F008000) 86#define S3C64XX_PA_GPIO (0x7F008000)
86#define S3C64XX_VA_GPIO S3C_ADDR_CPU(0x00000000)
87#define S3C64XX_SZ_GPIO SZ_4K 87#define S3C64XX_SZ_GPIO SZ_4K
88 88
89#define S3C64XX_PA_SDRAM (0x50000000) 89#define S3C64XX_PA_SDRAM (0x50000000)
@@ -94,16 +94,10 @@
94#define S3C64XX_PA_VIC1 (0x71300000) 94#define S3C64XX_PA_VIC1 (0x71300000)
95 95
96#define S3C64XX_PA_MODEM (0x74108000) 96#define S3C64XX_PA_MODEM (0x74108000)
97#define S3C64XX_VA_MODEM S3C_ADDR_CPU(0x00100000)
98 97
99#define S3C64XX_PA_USBHOST (0x74300000) 98#define S3C64XX_PA_USBHOST (0x74300000)
100 99
101#define S3C64XX_PA_USB_HSPHY (0x7C100000) 100#define S3C64XX_PA_USB_HSPHY (0x7C100000)
102#define S3C64XX_VA_USB_HSPHY S3C_ADDR_CPU(0x00200000)
103
104/* place VICs close together */
105#define VA_VIC0 (S3C_VA_IRQ + 0x00)
106#define VA_VIC1 (S3C_VA_IRQ + 0x10000)
107 101
108/* compatibiltiy defines. */ 102/* compatibiltiy defines. */
109#define S3C_PA_TIMER S3C64XX_PA_TIMER 103#define S3C_PA_TIMER S3C64XX_PA_TIMER
@@ -119,7 +113,6 @@
119#define S3C_PA_FB S3C64XX_PA_FB 113#define S3C_PA_FB S3C64XX_PA_FB
120#define S3C_PA_USBHOST S3C64XX_PA_USBHOST 114#define S3C_PA_USBHOST S3C64XX_PA_USBHOST
121#define S3C_PA_USB_HSOTG S3C64XX_PA_USB_HSOTG 115#define S3C_PA_USB_HSOTG S3C64XX_PA_USB_HSOTG
122#define S3C_VA_USB_HSPHY S3C64XX_VA_USB_HSPHY
123#define S3C_PA_RTC S3C64XX_PA_RTC 116#define S3C_PA_RTC S3C64XX_PA_RTC
124#define S3C_PA_WDT S3C64XX_PA_WATCHDOG 117#define S3C_PA_WDT S3C64XX_PA_WATCHDOG
125 118
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c
index af0c2fe1ea37..f32ec68002ef 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -329,9 +329,6 @@ static struct platform_device *crag6410_devices[] __initdata = {
329 &s3c_device_fb, 329 &s3c_device_fb,
330 &s3c_device_ohci, 330 &s3c_device_ohci,
331 &s3c_device_usb_hsotg, 331 &s3c_device_usb_hsotg,
332 &s3c_device_adc,
333 &s3c_device_rtc,
334 &s3c_device_ts,
335 &s3c_device_timer[0], 332 &s3c_device_timer[0],
336 &s3c64xx_device_iis0, 333 &s3c64xx_device_iis0,
337 &s3c64xx_device_iis1, 334 &s3c64xx_device_iis1,
diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c64xx/mach-mini6410.c
index 527f49bd1b57..8f34a3c10497 100644
--- a/arch/arm/mach-s3c64xx/mach-mini6410.c
+++ b/arch/arm/mach-s3c64xx/mach-mini6410.c
@@ -205,12 +205,6 @@ static struct platform_device mini6410_lcd_powerdev = {
205 .dev.platform_data = &mini6410_lcd_power_data, 205 .dev.platform_data = &mini6410_lcd_power_data,
206}; 206};
207 207
208static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
209 .delay = 10000,
210 .presc = 49,
211 .oversampling_shift = 2,
212};
213
214static struct platform_device *mini6410_devices[] __initdata = { 208static struct platform_device *mini6410_devices[] __initdata = {
215 &mini6410_device_eth, 209 &mini6410_device_eth,
216 &s3c_device_hsmmc0, 210 &s3c_device_hsmmc0,
@@ -319,7 +313,7 @@ static void __init mini6410_machine_init(void)
319 313
320 s3c_nand_set_platdata(&mini6410_nand_info); 314 s3c_nand_set_platdata(&mini6410_nand_info);
321 s3c_fb_set_platdata(&mini6410_lcd_pdata); 315 s3c_fb_set_platdata(&mini6410_lcd_pdata);
322 s3c24xx_ts_set_platdata(&s3c_ts_platform); 316 s3c24xx_ts_set_platdata(NULL);
323 317
324 /* configure nCS1 width to 16 bits */ 318 /* configure nCS1 width to 16 bits */
325 319
diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c
index 95b04b1729e3..1f5abfae4eac 100644
--- a/arch/arm/mach-s3c64xx/mach-real6410.c
+++ b/arch/arm/mach-s3c64xx/mach-real6410.c
@@ -198,12 +198,6 @@ static struct platform_device *real6410_devices[] __initdata = {
198 &s3c_device_ohci, 198 &s3c_device_ohci,
199}; 199};
200 200
201static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
202 .delay = 10000,
203 .presc = 49,
204 .oversampling_shift = 2,
205};
206
207static void __init real6410_map_io(void) 201static void __init real6410_map_io(void)
208{ 202{
209 u32 tmp; 203 u32 tmp;
@@ -300,7 +294,7 @@ static void __init real6410_machine_init(void)
300 294
301 s3c_fb_set_platdata(&real6410_lcd_pdata); 295 s3c_fb_set_platdata(&real6410_lcd_pdata);
302 s3c_nand_set_platdata(&real6410_nand_info); 296 s3c_nand_set_platdata(&real6410_nand_info);
303 s3c24xx_ts_set_platdata(&s3c_ts_platform); 297 s3c24xx_ts_set_platdata(NULL);
304 298
305 /* configure nCS1 width to 16 bits */ 299 /* configure nCS1 width to 16 bits */
306 300
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index ecbea92bf83b..c5190a50f0d9 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -658,12 +658,6 @@ static struct i2c_board_info i2c_devs1[] __initdata = {
658 { I2C_BOARD_INFO("24c128", 0x57), }, /* Samsung S524AD0XD1 */ 658 { I2C_BOARD_INFO("24c128", 0x57), }, /* Samsung S524AD0XD1 */
659}; 659};
660 660
661static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
662 .delay = 10000,
663 .presc = 49,
664 .oversampling_shift = 2,
665};
666
667/* LCD Backlight data */ 661/* LCD Backlight data */
668static struct samsung_bl_gpio_info smdk6410_bl_gpio_info = { 662static struct samsung_bl_gpio_info smdk6410_bl_gpio_info = {
669 .no = S3C64XX_GPF(15), 663 .no = S3C64XX_GPF(15),
@@ -705,7 +699,7 @@ static void __init smdk6410_machine_init(void)
705 699
706 samsung_keypad_set_platdata(&smdk6410_keypad_data); 700 samsung_keypad_set_platdata(&smdk6410_keypad_data);
707 701
708 s3c24xx_ts_set_platdata(&s3c_ts_platform); 702 s3c24xx_ts_set_platdata(NULL);
709 703
710 /* configure nCS1 width to 16 bits */ 704 /* configure nCS1 width to 16 bits */
711 705
diff --git a/arch/arm/mach-s3c64xx/pm.c b/arch/arm/mach-s3c64xx/pm.c
index 8bad64370689..055e2858b0dd 100644
--- a/arch/arm/mach-s3c64xx/pm.c
+++ b/arch/arm/mach-s3c64xx/pm.c
@@ -16,6 +16,7 @@
16#include <linux/suspend.h> 16#include <linux/suspend.h>
17#include <linux/serial_core.h> 17#include <linux/serial_core.h>
18#include <linux/io.h> 18#include <linux/io.h>
19#include <linux/gpio.h>
19 20
20#include <mach/map.h> 21#include <mach/map.h>
21#include <mach/irqs.h> 22#include <mach/irqs.h>
diff --git a/arch/arm/mach-s5p64x0/irq-eint.c b/arch/arm/mach-s5p64x0/irq-eint.c
index 69ed4545112b..fe7380f5c3cd 100644
--- a/arch/arm/mach-s5p64x0/irq-eint.c
+++ b/arch/arm/mach-s5p64x0/irq-eint.c
@@ -129,7 +129,7 @@ static int s5p64x0_alloc_gc(void)
129 } 129 }
130 130
131 ct = gc->chip_types; 131 ct = gc->chip_types;
132 ct->chip.irq_ack = irq_gc_ack; 132 ct->chip.irq_ack = irq_gc_ack_set_bit;
133 ct->chip.irq_mask = irq_gc_mask_set_bit; 133 ct->chip.irq_mask = irq_gc_mask_set_bit;
134 ct->chip.irq_unmask = irq_gc_mask_clr_bit; 134 ct->chip.irq_unmask = irq_gc_mask_clr_bit;
135 ct->chip.irq_set_type = s5p64x0_irq_eint_set_type; 135 ct->chip.irq_set_type = s5p64x0_irq_eint_set_type;
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c
index 346f8dfa6f35..340f30f4a3da 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6440.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c
@@ -129,12 +129,6 @@ static struct i2c_board_info smdk6440_i2c_devs1[] __initdata = {
129 /* To be populated */ 129 /* To be populated */
130}; 130};
131 131
132static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
133 .delay = 10000,
134 .presc = 49,
135 .oversampling_shift = 2,
136};
137
138/* LCD Backlight data */ 132/* LCD Backlight data */
139static struct samsung_bl_gpio_info smdk6440_bl_gpio_info = { 133static struct samsung_bl_gpio_info smdk6440_bl_gpio_info = {
140 .no = S5P6440_GPF(15), 134 .no = S5P6440_GPF(15),
@@ -155,7 +149,7 @@ static void __init smdk6440_map_io(void)
155 149
156static void __init smdk6440_machine_init(void) 150static void __init smdk6440_machine_init(void)
157{ 151{
158 s3c24xx_ts_set_platdata(&s3c_ts_platform); 152 s3c24xx_ts_set_platdata(NULL);
159 153
160 s3c_i2c0_set_platdata(&s5p6440_i2c0_data); 154 s3c_i2c0_set_platdata(&s5p6440_i2c0_data);
161 s3c_i2c1_set_platdata(&s5p6440_i2c1_data); 155 s3c_i2c1_set_platdata(&s5p6440_i2c1_data);
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c
index 33f2adf8f3fe..ee0da14665b6 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6450.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c
@@ -148,12 +148,6 @@ static struct i2c_board_info smdk6450_i2c_devs1[] __initdata = {
148 { I2C_BOARD_INFO("24c128", 0x57), },/* Samsung S524AD0XD1 EEPROM */ 148 { I2C_BOARD_INFO("24c128", 0x57), },/* Samsung S524AD0XD1 EEPROM */
149}; 149};
150 150
151static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
152 .delay = 10000,
153 .presc = 49,
154 .oversampling_shift = 2,
155};
156
157/* LCD Backlight data */ 151/* LCD Backlight data */
158static struct samsung_bl_gpio_info smdk6450_bl_gpio_info = { 152static struct samsung_bl_gpio_info smdk6450_bl_gpio_info = {
159 .no = S5P6450_GPF(15), 153 .no = S5P6450_GPF(15),
@@ -174,7 +168,7 @@ static void __init smdk6450_map_io(void)
174 168
175static void __init smdk6450_machine_init(void) 169static void __init smdk6450_machine_init(void)
176{ 170{
177 s3c24xx_ts_set_platdata(&s3c_ts_platform); 171 s3c24xx_ts_set_platdata(NULL);
178 172
179 s3c_i2c0_set_platdata(&s5p6450_i2c0_data); 173 s3c_i2c0_set_platdata(&s5p6450_i2c0_data);
180 s3c_i2c1_set_platdata(&s5p6450_i2c1_data); 174 s3c_i2c1_set_platdata(&s5p6450_i2c1_data);
diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c
index 227d8908aab6..0b70762ebf1a 100644
--- a/arch/arm/mach-s5pc100/mach-smdkc100.c
+++ b/arch/arm/mach-s5pc100/mach-smdkc100.c
@@ -203,12 +203,6 @@ static struct platform_device *smdkc100_devices[] __initdata = {
203 &s5pc100_device_spdif, 203 &s5pc100_device_spdif,
204}; 204};
205 205
206static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
207 .delay = 10000,
208 .presc = 49,
209 .oversampling_shift = 2,
210};
211
212/* LCD Backlight data */ 206/* LCD Backlight data */
213static struct samsung_bl_gpio_info smdkc100_bl_gpio_info = { 207static struct samsung_bl_gpio_info smdkc100_bl_gpio_info = {
214 .no = S5PC100_GPD(0), 208 .no = S5PC100_GPD(0),
@@ -228,7 +222,7 @@ static void __init smdkc100_map_io(void)
228 222
229static void __init smdkc100_machine_init(void) 223static void __init smdkc100_machine_init(void)
230{ 224{
231 s3c24xx_ts_set_platdata(&s3c_ts_platform); 225 s3c24xx_ts_set_platdata(NULL);
232 226
233 /* I2C */ 227 /* I2C */
234 s3c_i2c0_set_platdata(NULL); 228 s3c_i2c0_set_platdata(NULL);
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig
index 69dd87cd8e22..aaeb44a73716 100644
--- a/arch/arm/mach-s5pv210/Kconfig
+++ b/arch/arm/mach-s5pv210/Kconfig
@@ -14,7 +14,6 @@ config CPU_S5PV210
14 select S3C_PL330_DMA 14 select S3C_PL330_DMA
15 select S5P_EXT_INT 15 select S5P_EXT_INT
16 select S5P_HRT 16 select S5P_HRT
17 select S5PV210_PM if PM
18 help 17 help
19 Enable S5PV210 CPU support 18 Enable S5PV210 CPU support
20 19
@@ -169,9 +168,4 @@ config MACH_TORBRECK
169 168
170endmenu 169endmenu
171 170
172config S5PV210_PM
173 bool
174 help
175 Power Management code common to S5PV210
176
177endif 171endif
diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile
index 599a3c0e8f6c..ef7e4668d670 100644
--- a/arch/arm/mach-s5pv210/Makefile
+++ b/arch/arm/mach-s5pv210/Makefile
@@ -14,7 +14,7 @@ obj- :=
14 14
15obj-$(CONFIG_CPU_S5PV210) += cpu.o init.o clock.o dma.o 15obj-$(CONFIG_CPU_S5PV210) += cpu.o init.o clock.o dma.o
16obj-$(CONFIG_CPU_S5PV210) += setup-i2c0.o 16obj-$(CONFIG_CPU_S5PV210) += setup-i2c0.o
17obj-$(CONFIG_S5PV210_PM) += pm.o sleep.o 17obj-$(CONFIG_PM) += pm.o sleep.o
18 18
19# machine support 19# machine support
20 20
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
index 5e011fc6720d..4b27bcaf676a 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -265,12 +265,6 @@ static struct i2c_board_info smdkv210_i2c_devs2[] __initdata = {
265 /* To Be Updated */ 265 /* To Be Updated */
266}; 266};
267 267
268static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
269 .delay = 10000,
270 .presc = 49,
271 .oversampling_shift = 2,
272};
273
274/* LCD Backlight data */ 268/* LCD Backlight data */
275static struct samsung_bl_gpio_info smdkv210_bl_gpio_info = { 269static struct samsung_bl_gpio_info smdkv210_bl_gpio_info = {
276 .no = S5PV210_GPD0(3), 270 .no = S5PV210_GPD0(3),
@@ -296,7 +290,7 @@ static void __init smdkv210_machine_init(void)
296 smdkv210_dm9000_init(); 290 smdkv210_dm9000_init();
297 291
298 samsung_keypad_set_platdata(&smdkv210_keypad_data); 292 samsung_keypad_set_platdata(&smdkv210_keypad_data);
299 s3c24xx_ts_set_platdata(&s3c_ts_platform); 293 s3c24xx_ts_set_platdata(NULL);
300 294
301 s3c_i2c0_set_platdata(NULL); 295 s3c_i2c0_set_platdata(NULL);
302 s3c_i2c1_set_platdata(NULL); 296 s3c_i2c1_set_platdata(NULL);
diff --git a/arch/arm/mach-s5pv210/pm.c b/arch/arm/mach-s5pv210/pm.c
index 309e388a8a83..f149d278377b 100644
--- a/arch/arm/mach-s5pv210/pm.c
+++ b/arch/arm/mach-s5pv210/pm.c
@@ -88,7 +88,7 @@ static struct sleep_save s5pv210_core_save[] = {
88 SAVE_ITEM(S3C2410_TCNTO(0)), 88 SAVE_ITEM(S3C2410_TCNTO(0)),
89}; 89};
90 90
91void s5pv210_cpu_suspend(unsigned long arg) 91static int s5pv210_cpu_suspend(unsigned long arg)
92{ 92{
93 unsigned long tmp; 93 unsigned long tmp;
94 94
diff --git a/arch/arm/mach-shmobile/board-ag5evm.c b/arch/arm/mach-shmobile/board-ag5evm.c
index ce5c2513c6ce..cdfdd624d21d 100644
--- a/arch/arm/mach-shmobile/board-ag5evm.c
+++ b/arch/arm/mach-shmobile/board-ag5evm.c
@@ -341,6 +341,7 @@ static struct platform_device mipidsi0_device = {
341static struct sh_mobile_sdhi_info sdhi0_info = { 341static struct sh_mobile_sdhi_info sdhi0_info = {
342 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, 342 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
343 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX, 343 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
344 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
344 .tmio_caps = MMC_CAP_SD_HIGHSPEED, 345 .tmio_caps = MMC_CAP_SD_HIGHSPEED,
345 .tmio_ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29, 346 .tmio_ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
346}; 347};
@@ -382,7 +383,7 @@ void ag5evm_sdhi1_set_pwr(struct platform_device *pdev, int state)
382} 383}
383 384
384static struct sh_mobile_sdhi_info sh_sdhi1_info = { 385static struct sh_mobile_sdhi_info sh_sdhi1_info = {
385 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE, 386 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT,
386 .tmio_caps = MMC_CAP_NONREMOVABLE | MMC_CAP_SDIO_IRQ, 387 .tmio_caps = MMC_CAP_NONREMOVABLE | MMC_CAP_SDIO_IRQ,
387 .tmio_ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, 388 .tmio_ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
388 .set_pwr = ag5evm_sdhi1_set_pwr, 389 .set_pwr = ag5evm_sdhi1_set_pwr,
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index 0ea71f8d4b89..17c19dc25604 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -641,6 +641,8 @@ static struct usbhs_private usbhs0_private = {
641 }, 641 },
642 .driver_param = { 642 .driver_param = {
643 .buswait_bwait = 4, 643 .buswait_bwait = 4,
644 .d0_tx_id = SHDMA_SLAVE_USB0_TX,
645 .d1_rx_id = SHDMA_SLAVE_USB0_RX,
644 }, 646 },
645 }, 647 },
646}; 648};
@@ -810,6 +812,8 @@ static struct usbhs_private usbhs1_private = {
810 .buswait_bwait = 4, 812 .buswait_bwait = 4,
811 .pipe_type = usbhs1_pipe_cfg, 813 .pipe_type = usbhs1_pipe_cfg,
812 .pipe_size = ARRAY_SIZE(usbhs1_pipe_cfg), 814 .pipe_size = ARRAY_SIZE(usbhs1_pipe_cfg),
815 .d0_tx_id = SHDMA_SLAVE_USB1_TX,
816 .d1_rx_id = SHDMA_SLAVE_USB1_RX,
813 }, 817 },
814 }, 818 },
815}; 819};
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index e6e11e4e2d43..66975921e646 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -503,16 +503,17 @@ static struct clk *late_main_clks[] = {
503 &sh7372_fsidivb_clk, 503 &sh7372_fsidivb_clk,
504}; 504};
505 505
506enum { MSTP001, 506enum { MSTP001, MSTP000,
507 MSTP131, MSTP130, 507 MSTP131, MSTP130,
508 MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, 508 MSTP129, MSTP128, MSTP127, MSTP126, MSTP125,
509 MSTP118, MSTP117, MSTP116, MSTP113, 509 MSTP118, MSTP117, MSTP116, MSTP113,
510 MSTP106, MSTP101, MSTP100, 510 MSTP106, MSTP101, MSTP100,
511 MSTP223, 511 MSTP223,
512 MSTP218, MSTP217, MSTP216, 512 MSTP218, MSTP217, MSTP216, MSTP214, MSTP208, MSTP207,
513 MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, 513 MSTP206, MSTP205, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
514 MSTP329, MSTP328, MSTP323, MSTP322, MSTP314, MSTP313, MSTP312, 514 MSTP328, MSTP323, MSTP322, MSTP314, MSTP313, MSTP312,
515 MSTP423, MSTP415, MSTP413, MSTP411, MSTP410, MSTP406, MSTP403, 515 MSTP423, MSTP415, MSTP413, MSTP411, MSTP410, MSTP407, MSTP406,
516 MSTP405, MSTP404, MSTP403, MSTP400,
516 MSTP_NR }; 517 MSTP_NR };
517 518
518#define MSTP(_parent, _reg, _bit, _flags) \ 519#define MSTP(_parent, _reg, _bit, _flags) \
@@ -520,6 +521,7 @@ enum { MSTP001,
520 521
521static struct clk mstp_clks[MSTP_NR] = { 522static struct clk mstp_clks[MSTP_NR] = {
522 [MSTP001] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR0, 1, 0), /* IIC2 */ 523 [MSTP001] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR0, 1, 0), /* IIC2 */
524 [MSTP000] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR0, 0, 0), /* MSIOF0 */
523 [MSTP131] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 31, 0), /* VEU3 */ 525 [MSTP131] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 31, 0), /* VEU3 */
524 [MSTP130] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 30, 0), /* VEU2 */ 526 [MSTP130] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 30, 0), /* VEU2 */
525 [MSTP129] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 29, 0), /* VEU1 */ 527 [MSTP129] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 29, 0), /* VEU1 */
@@ -538,14 +540,16 @@ static struct clk mstp_clks[MSTP_NR] = {
538 [MSTP218] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 18, 0), /* DMAC1 */ 540 [MSTP218] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 18, 0), /* DMAC1 */
539 [MSTP217] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 17, 0), /* DMAC2 */ 541 [MSTP217] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 17, 0), /* DMAC2 */
540 [MSTP216] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 16, 0), /* DMAC3 */ 542 [MSTP216] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 16, 0), /* DMAC3 */
543 [MSTP214] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 14, 0), /* USBDMAC */
544 [MSTP208] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 8, 0), /* MSIOF1 */
541 [MSTP207] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */ 545 [MSTP207] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */
542 [MSTP206] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */ 546 [MSTP206] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */
547 [MSTP205] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 5, 0), /* MSIOF2 */
543 [MSTP204] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 4, 0), /* SCIFA0 */ 548 [MSTP204] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 4, 0), /* SCIFA0 */
544 [MSTP203] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 3, 0), /* SCIFA1 */ 549 [MSTP203] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 3, 0), /* SCIFA1 */
545 [MSTP202] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 2, 0), /* SCIFA2 */ 550 [MSTP202] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 2, 0), /* SCIFA2 */
546 [MSTP201] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 1, 0), /* SCIFA3 */ 551 [MSTP201] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 1, 0), /* SCIFA3 */
547 [MSTP200] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 0, 0), /* SCIFA4 */ 552 [MSTP200] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 0, 0), /* SCIFA4 */
548 [MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */
549 [MSTP328] = MSTP(&div6_clks[DIV6_SPU], SMSTPCR3, 28, 0), /* FSI2 */ 553 [MSTP328] = MSTP(&div6_clks[DIV6_SPU], SMSTPCR3, 28, 0), /* FSI2 */
550 [MSTP323] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 23, 0), /* IIC1 */ 554 [MSTP323] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 23, 0), /* IIC1 */
551 [MSTP322] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 22, 0), /* USB0 */ 555 [MSTP322] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 22, 0), /* USB0 */
@@ -557,8 +561,12 @@ static struct clk mstp_clks[MSTP_NR] = {
557 [MSTP413] = MSTP(&pllc1_div2_clk, SMSTPCR4, 13, 0), /* HDMI */ 561 [MSTP413] = MSTP(&pllc1_div2_clk, SMSTPCR4, 13, 0), /* HDMI */
558 [MSTP411] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR4, 11, 0), /* IIC3 */ 562 [MSTP411] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR4, 11, 0), /* IIC3 */
559 [MSTP410] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR4, 10, 0), /* IIC4 */ 563 [MSTP410] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR4, 10, 0), /* IIC4 */
564 [MSTP407] = MSTP(&div4_clks[DIV4_HP], SMSTPCR4, 7, 0), /* USB-DMAC1 */
560 [MSTP406] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR4, 6, 0), /* USB1 */ 565 [MSTP406] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR4, 6, 0), /* USB1 */
566 [MSTP405] = MSTP(&r_clk, SMSTPCR4, 5, 0), /* CMT4 */
567 [MSTP404] = MSTP(&r_clk, SMSTPCR4, 4, 0), /* CMT3 */
561 [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */ 568 [MSTP403] = MSTP(&r_clk, SMSTPCR4, 3, 0), /* KEYSC */
569 [MSTP400] = MSTP(&r_clk, SMSTPCR4, 0, 0), /* CMT2 */
562}; 570};
563 571
564static struct clk_lookup lookups[] = { 572static struct clk_lookup lookups[] = {
@@ -609,6 +617,7 @@ static struct clk_lookup lookups[] = {
609 617
610 /* MSTP32 clocks */ 618 /* MSTP32 clocks */
611 CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* IIC2 */ 619 CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* IIC2 */
620 CLKDEV_DEV_ID("spi_sh_msiof.0", &mstp_clks[MSTP000]), /* MSIOF0 */
612 CLKDEV_DEV_ID("uio_pdrv_genirq.4", &mstp_clks[MSTP131]), /* VEU3 */ 621 CLKDEV_DEV_ID("uio_pdrv_genirq.4", &mstp_clks[MSTP131]), /* VEU3 */
613 CLKDEV_DEV_ID("uio_pdrv_genirq.3", &mstp_clks[MSTP130]), /* VEU2 */ 622 CLKDEV_DEV_ID("uio_pdrv_genirq.3", &mstp_clks[MSTP130]), /* VEU2 */
614 CLKDEV_DEV_ID("uio_pdrv_genirq.2", &mstp_clks[MSTP129]), /* VEU1 */ 623 CLKDEV_DEV_ID("uio_pdrv_genirq.2", &mstp_clks[MSTP129]), /* VEU1 */
@@ -629,14 +638,16 @@ static struct clk_lookup lookups[] = {
629 CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP218]), /* DMAC1 */ 638 CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP218]), /* DMAC1 */
630 CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[MSTP217]), /* DMAC2 */ 639 CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[MSTP217]), /* DMAC2 */
631 CLKDEV_DEV_ID("sh-dma-engine.2", &mstp_clks[MSTP216]), /* DMAC3 */ 640 CLKDEV_DEV_ID("sh-dma-engine.2", &mstp_clks[MSTP216]), /* DMAC3 */
641 CLKDEV_DEV_ID("sh-dma-engine.3", &mstp_clks[MSTP214]), /* USB-DMAC0 */
642 CLKDEV_DEV_ID("spi_sh_msiof.1", &mstp_clks[MSTP208]), /* MSIOF1 */
632 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */ 643 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */
633 CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP206]), /* SCIFB */ 644 CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP206]), /* SCIFB */
645 CLKDEV_DEV_ID("spi_sh_msiof.2", &mstp_clks[MSTP205]), /* MSIOF2 */
634 CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */ 646 CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */
635 CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), /* SCIFA1 */ 647 CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), /* SCIFA1 */
636 CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP202]), /* SCIFA2 */ 648 CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP202]), /* SCIFA2 */
637 CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP201]), /* SCIFA3 */ 649 CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP201]), /* SCIFA3 */
638 CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */ 650 CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */
639 CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */
640 CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI2 */ 651 CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI2 */
641 CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* IIC1 */ 652 CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* IIC1 */
642 CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[MSTP322]), /* USB0 */ 653 CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[MSTP322]), /* USB0 */
@@ -650,10 +661,14 @@ static struct clk_lookup lookups[] = {
650 CLKDEV_DEV_ID("sh-mobile-hdmi", &mstp_clks[MSTP413]), /* HDMI */ 661 CLKDEV_DEV_ID("sh-mobile-hdmi", &mstp_clks[MSTP413]), /* HDMI */
651 CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* IIC3 */ 662 CLKDEV_DEV_ID("i2c-sh_mobile.3", &mstp_clks[MSTP411]), /* IIC3 */
652 CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* IIC4 */ 663 CLKDEV_DEV_ID("i2c-sh_mobile.4", &mstp_clks[MSTP410]), /* IIC4 */
664 CLKDEV_DEV_ID("sh-dma-engine.4", &mstp_clks[MSTP407]), /* USB-DMAC1 */
653 CLKDEV_DEV_ID("r8a66597_hcd.1", &mstp_clks[MSTP406]), /* USB1 */ 665 CLKDEV_DEV_ID("r8a66597_hcd.1", &mstp_clks[MSTP406]), /* USB1 */
654 CLKDEV_DEV_ID("r8a66597_udc.1", &mstp_clks[MSTP406]), /* USB1 */ 666 CLKDEV_DEV_ID("r8a66597_udc.1", &mstp_clks[MSTP406]), /* USB1 */
655 CLKDEV_DEV_ID("renesas_usbhs.1", &mstp_clks[MSTP406]), /* USB1 */ 667 CLKDEV_DEV_ID("renesas_usbhs.1", &mstp_clks[MSTP406]), /* USB1 */
668 CLKDEV_DEV_ID("sh_cmt.4", &mstp_clks[MSTP405]), /* CMT4 */
669 CLKDEV_DEV_ID("sh_cmt.3", &mstp_clks[MSTP404]), /* CMT3 */
656 CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */ 670 CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */
671 CLKDEV_DEV_ID("sh_cmt.2", &mstp_clks[MSTP400]), /* CMT2 */
657 672
658 CLKDEV_ICK_ID("hdmi", "sh_mobile_lcdc_fb.1", 673 CLKDEV_ICK_ID("hdmi", "sh_mobile_lcdc_fb.1",
659 &div6_reparent_clks[DIV6_HDMI]), 674 &div6_reparent_clks[DIV6_HDMI]),
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index 6db2ccabc2bf..61a846bb30f2 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -365,7 +365,7 @@ void __init sh73a0_clock_init(void)
365 __raw_writel(0x108, SD2CKCR); 365 __raw_writel(0x108, SD2CKCR);
366 366
367 /* detect main clock parent */ 367 /* detect main clock parent */
368 switch ((__raw_readl(CKSCR) >> 24) & 0x03) { 368 switch ((__raw_readl(CKSCR) >> 28) & 0x03) {
369 case 0: 369 case 0:
370 main_clk.parent = &sh73a0_extal1_clk; 370 main_clk.parent = &sh73a0_extal1_clk;
371 break; 371 break;
diff --git a/arch/arm/mach-shmobile/include/mach/sh7372.h b/arch/arm/mach-shmobile/include/mach/sh7372.h
index ce595cee86cd..24e63a85e669 100644
--- a/arch/arm/mach-shmobile/include/mach/sh7372.h
+++ b/arch/arm/mach-shmobile/include/mach/sh7372.h
@@ -459,6 +459,10 @@ enum {
459 SHDMA_SLAVE_SDHI2_TX, 459 SHDMA_SLAVE_SDHI2_TX,
460 SHDMA_SLAVE_MMCIF_RX, 460 SHDMA_SLAVE_MMCIF_RX,
461 SHDMA_SLAVE_MMCIF_TX, 461 SHDMA_SLAVE_MMCIF_TX,
462 SHDMA_SLAVE_USB0_TX,
463 SHDMA_SLAVE_USB0_RX,
464 SHDMA_SLAVE_USB1_TX,
465 SHDMA_SLAVE_USB1_RX,
462}; 466};
463 467
464extern struct clk sh7372_extal1_clk; 468extern struct clk sh7372_extal1_clk;
diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c
index 3b28743c77eb..739315e30eb9 100644
--- a/arch/arm/mach-shmobile/intc-sh7372.c
+++ b/arch/arm/mach-shmobile/intc-sh7372.c
@@ -379,7 +379,7 @@ enum {
379 /* BBIF2 */ 379 /* BBIF2 */
380 VPU, 380 VPU,
381 TSIF1, 381 TSIF1,
382 _3DG_SGX530, 382 /* 3DG */
383 _2DDMAC, 383 _2DDMAC,
384 IIC2_ALI2, IIC2_TACKI2, IIC2_WAITI2, IIC2_DTEI2, 384 IIC2_ALI2, IIC2_TACKI2, IIC2_WAITI2, IIC2_DTEI2,
385 IPMMU_IPMMUR, IPMMU_IPMMUR2, 385 IPMMU_IPMMUR, IPMMU_IPMMUR2,
@@ -436,7 +436,7 @@ static struct intc_vect intcs_vectors[] = {
436 /* BBIF2 */ 436 /* BBIF2 */
437 INTCS_VECT(VPU, 0x980), 437 INTCS_VECT(VPU, 0x980),
438 INTCS_VECT(TSIF1, 0x9a0), 438 INTCS_VECT(TSIF1, 0x9a0),
439 INTCS_VECT(_3DG_SGX530, 0x9e0), 439 /* 3DG */
440 INTCS_VECT(_2DDMAC, 0xa00), 440 INTCS_VECT(_2DDMAC, 0xa00),
441 INTCS_VECT(IIC2_ALI2, 0xa80), INTCS_VECT(IIC2_TACKI2, 0xaa0), 441 INTCS_VECT(IIC2_ALI2, 0xa80), INTCS_VECT(IIC2_TACKI2, 0xaa0),
442 INTCS_VECT(IIC2_WAITI2, 0xac0), INTCS_VECT(IIC2_DTEI2, 0xae0), 442 INTCS_VECT(IIC2_WAITI2, 0xac0), INTCS_VECT(IIC2_DTEI2, 0xae0),
@@ -521,7 +521,7 @@ static struct intc_mask_reg intcs_mask_registers[] = {
521 RTDMAC_1_DEI3, RTDMAC_1_DEI2, RTDMAC_1_DEI1, RTDMAC_1_DEI0 } }, 521 RTDMAC_1_DEI3, RTDMAC_1_DEI2, RTDMAC_1_DEI1, RTDMAC_1_DEI0 } },
522 { 0xffd20198, 0xffd201d8, 8, /* IMR6SA / IMCR6SA */ 522 { 0xffd20198, 0xffd201d8, 8, /* IMR6SA / IMCR6SA */
523 { 0, 0, MSIOF, 0, 523 { 0, 0, MSIOF, 0,
524 _3DG_SGX530, 0, 0, 0 } }, 524 0, 0, 0, 0 } },
525 { 0xffd2019c, 0xffd201dc, 8, /* IMR7SA / IMCR7SA */ 525 { 0xffd2019c, 0xffd201dc, 8, /* IMR7SA / IMCR7SA */
526 { 0, TMU_TUNI2, TMU_TUNI1, TMU_TUNI0, 526 { 0, TMU_TUNI2, TMU_TUNI1, TMU_TUNI0,
527 0, 0, 0, 0 } }, 527 0, 0, 0, 0 } },
@@ -561,7 +561,6 @@ static struct intc_prio_reg intcs_prio_registers[] = {
561 TMU_TUNI2, TSIF1 } }, 561 TMU_TUNI2, TSIF1 } },
562 { 0xffd2001c, 0, 16, 4, /* IPRHS */ { 0, 0, VEU, BEU } }, 562 { 0xffd2001c, 0, 16, 4, /* IPRHS */ { 0, 0, VEU, BEU } },
563 { 0xffd20020, 0, 16, 4, /* IPRIS */ { 0, MSIOF, TSIF0, IIC0 } }, 563 { 0xffd20020, 0, 16, 4, /* IPRIS */ { 0, MSIOF, TSIF0, IIC0 } },
564 { 0xffd20024, 0, 16, 4, /* IPRJS */ { 0, _3DG_SGX530, 0, 0 } },
565 { 0xffd20028, 0, 16, 4, /* IPRKS */ { 0, 0, LMB, 0 } }, 564 { 0xffd20028, 0, 16, 4, /* IPRKS */ { 0, 0, LMB, 0 } },
566 { 0xffd2002c, 0, 16, 4, /* IPRLS */ { IPMMU, 0, 0, 0 } }, 565 { 0xffd2002c, 0, 16, 4, /* IPRLS */ { IPMMU, 0, 0, 0 } },
567 { 0xffd20030, 0, 16, 4, /* IPRMS */ { IIC2, 0, 0, 0 } }, 566 { 0xffd20030, 0, 16, 4, /* IPRMS */ { IIC2, 0, 0, 0 } },
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
index 79f0413d8725..2d9b1b1a2538 100644
--- a/arch/arm/mach-shmobile/setup-sh7372.c
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -169,35 +169,35 @@ static struct platform_device scif6_device = {
169}; 169};
170 170
171/* CMT */ 171/* CMT */
172static struct sh_timer_config cmt10_platform_data = { 172static struct sh_timer_config cmt2_platform_data = {
173 .name = "CMT10", 173 .name = "CMT2",
174 .channel_offset = 0x10, 174 .channel_offset = 0x40,
175 .timer_bit = 0, 175 .timer_bit = 5,
176 .clockevent_rating = 125, 176 .clockevent_rating = 125,
177 .clocksource_rating = 125, 177 .clocksource_rating = 125,
178}; 178};
179 179
180static struct resource cmt10_resources[] = { 180static struct resource cmt2_resources[] = {
181 [0] = { 181 [0] = {
182 .name = "CMT10", 182 .name = "CMT2",
183 .start = 0xe6138010, 183 .start = 0xe6130040,
184 .end = 0xe613801b, 184 .end = 0xe613004b,
185 .flags = IORESOURCE_MEM, 185 .flags = IORESOURCE_MEM,
186 }, 186 },
187 [1] = { 187 [1] = {
188 .start = evt2irq(0x0b00), /* CMT1_CMT10 */ 188 .start = evt2irq(0x0b80), /* CMT2 */
189 .flags = IORESOURCE_IRQ, 189 .flags = IORESOURCE_IRQ,
190 }, 190 },
191}; 191};
192 192
193static struct platform_device cmt10_device = { 193static struct platform_device cmt2_device = {
194 .name = "sh_cmt", 194 .name = "sh_cmt",
195 .id = 10, 195 .id = 2,
196 .dev = { 196 .dev = {
197 .platform_data = &cmt10_platform_data, 197 .platform_data = &cmt2_platform_data,
198 }, 198 },
199 .resource = cmt10_resources, 199 .resource = cmt2_resources,
200 .num_resources = ARRAY_SIZE(cmt10_resources), 200 .num_resources = ARRAY_SIZE(cmt2_resources),
201}; 201};
202 202
203/* TMU */ 203/* TMU */
@@ -602,6 +602,150 @@ static struct platform_device dma2_device = {
602 }, 602 },
603}; 603};
604 604
605/*
606 * USB-DMAC
607 */
608
609unsigned int usbts_shift[] = {3, 4, 5};
610
611enum {
612 XMIT_SZ_8BYTE = 0,
613 XMIT_SZ_16BYTE = 1,
614 XMIT_SZ_32BYTE = 2,
615};
616
617#define USBTS_INDEX2VAL(i) (((i) & 3) << 6)
618
619static const struct sh_dmae_channel sh7372_usb_dmae_channels[] = {
620 {
621 .offset = 0,
622 }, {
623 .offset = 0x20,
624 },
625};
626
627/* USB DMAC0 */
628static const struct sh_dmae_slave_config sh7372_usb_dmae0_slaves[] = {
629 {
630 .slave_id = SHDMA_SLAVE_USB0_TX,
631 .chcr = USBTS_INDEX2VAL(XMIT_SZ_8BYTE),
632 }, {
633 .slave_id = SHDMA_SLAVE_USB0_RX,
634 .chcr = USBTS_INDEX2VAL(XMIT_SZ_8BYTE),
635 },
636};
637
638static struct sh_dmae_pdata usb_dma0_platform_data = {
639 .slave = sh7372_usb_dmae0_slaves,
640 .slave_num = ARRAY_SIZE(sh7372_usb_dmae0_slaves),
641 .channel = sh7372_usb_dmae_channels,
642 .channel_num = ARRAY_SIZE(sh7372_usb_dmae_channels),
643 .ts_low_shift = 6,
644 .ts_low_mask = 0xc0,
645 .ts_high_shift = 0,
646 .ts_high_mask = 0,
647 .ts_shift = usbts_shift,
648 .ts_shift_num = ARRAY_SIZE(usbts_shift),
649 .dmaor_init = DMAOR_DME,
650 .chcr_offset = 0x14,
651 .chcr_ie_bit = 1 << 5,
652 .dmaor_is_32bit = 1,
653 .needs_tend_set = 1,
654 .no_dmars = 1,
655};
656
657static struct resource sh7372_usb_dmae0_resources[] = {
658 {
659 /* Channel registers and DMAOR */
660 .start = 0xe68a0020,
661 .end = 0xe68a0064 - 1,
662 .flags = IORESOURCE_MEM,
663 },
664 {
665 /* VCR/SWR/DMICR */
666 .start = 0xe68a0000,
667 .end = 0xe68a0014 - 1,
668 .flags = IORESOURCE_MEM,
669 },
670 {
671 /* IRQ for channels */
672 .start = evt2irq(0x0a00),
673 .end = evt2irq(0x0a00),
674 .flags = IORESOURCE_IRQ,
675 },
676};
677
678static struct platform_device usb_dma0_device = {
679 .name = "sh-dma-engine",
680 .id = 3,
681 .resource = sh7372_usb_dmae0_resources,
682 .num_resources = ARRAY_SIZE(sh7372_usb_dmae0_resources),
683 .dev = {
684 .platform_data = &usb_dma0_platform_data,
685 },
686};
687
688/* USB DMAC1 */
689static const struct sh_dmae_slave_config sh7372_usb_dmae1_slaves[] = {
690 {
691 .slave_id = SHDMA_SLAVE_USB1_TX,
692 .chcr = USBTS_INDEX2VAL(XMIT_SZ_8BYTE),
693 }, {
694 .slave_id = SHDMA_SLAVE_USB1_RX,
695 .chcr = USBTS_INDEX2VAL(XMIT_SZ_8BYTE),
696 },
697};
698
699static struct sh_dmae_pdata usb_dma1_platform_data = {
700 .slave = sh7372_usb_dmae1_slaves,
701 .slave_num = ARRAY_SIZE(sh7372_usb_dmae1_slaves),
702 .channel = sh7372_usb_dmae_channels,
703 .channel_num = ARRAY_SIZE(sh7372_usb_dmae_channels),
704 .ts_low_shift = 6,
705 .ts_low_mask = 0xc0,
706 .ts_high_shift = 0,
707 .ts_high_mask = 0,
708 .ts_shift = usbts_shift,
709 .ts_shift_num = ARRAY_SIZE(usbts_shift),
710 .dmaor_init = DMAOR_DME,
711 .chcr_offset = 0x14,
712 .chcr_ie_bit = 1 << 5,
713 .dmaor_is_32bit = 1,
714 .needs_tend_set = 1,
715 .no_dmars = 1,
716};
717
718static struct resource sh7372_usb_dmae1_resources[] = {
719 {
720 /* Channel registers and DMAOR */
721 .start = 0xe68c0020,
722 .end = 0xe68c0064 - 1,
723 .flags = IORESOURCE_MEM,
724 },
725 {
726 /* VCR/SWR/DMICR */
727 .start = 0xe68c0000,
728 .end = 0xe68c0014 - 1,
729 .flags = IORESOURCE_MEM,
730 },
731 {
732 /* IRQ for channels */
733 .start = evt2irq(0x1d00),
734 .end = evt2irq(0x1d00),
735 .flags = IORESOURCE_IRQ,
736 },
737};
738
739static struct platform_device usb_dma1_device = {
740 .name = "sh-dma-engine",
741 .id = 4,
742 .resource = sh7372_usb_dmae1_resources,
743 .num_resources = ARRAY_SIZE(sh7372_usb_dmae1_resources),
744 .dev = {
745 .platform_data = &usb_dma1_platform_data,
746 },
747};
748
605/* VPU */ 749/* VPU */
606static struct uio_info vpu_platform_data = { 750static struct uio_info vpu_platform_data = {
607 .name = "VPU5HG", 751 .name = "VPU5HG",
@@ -818,7 +962,7 @@ static struct platform_device *sh7372_early_devices[] __initdata = {
818 &scif4_device, 962 &scif4_device,
819 &scif5_device, 963 &scif5_device,
820 &scif6_device, 964 &scif6_device,
821 &cmt10_device, 965 &cmt2_device,
822 &tmu00_device, 966 &tmu00_device,
823 &tmu01_device, 967 &tmu01_device,
824}; 968};
@@ -829,6 +973,8 @@ static struct platform_device *sh7372_late_devices[] __initdata = {
829 &dma0_device, 973 &dma0_device,
830 &dma1_device, 974 &dma1_device,
831 &dma2_device, 975 &dma2_device,
976 &usb_dma0_device,
977 &usb_dma1_device,
832 &vpu_device, 978 &vpu_device,
833 &veu0_device, 979 &veu0_device,
834 &veu1_device, 980 &veu1_device,
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c
index 9e6b93b1a043..d0d267a8d3f9 100644
--- a/arch/arm/mach-vexpress/v2m.c
+++ b/arch/arm/mach-vexpress/v2m.c
@@ -318,6 +318,10 @@ static struct clk v2m_sp804_clk = {
318 .rate = 1000000, 318 .rate = 1000000,
319}; 319};
320 320
321static struct clk v2m_ref_clk = {
322 .rate = 32768,
323};
324
321static struct clk dummy_apb_pclk; 325static struct clk dummy_apb_pclk;
322 326
323static struct clk_lookup v2m_lookups[] = { 327static struct clk_lookup v2m_lookups[] = {
@@ -348,6 +352,9 @@ static struct clk_lookup v2m_lookups[] = {
348 }, { /* CLCD */ 352 }, { /* CLCD */
349 .dev_id = "mb:clcd", 353 .dev_id = "mb:clcd",
350 .clk = &osc1_clk, 354 .clk = &osc1_clk,
355 }, { /* SP805 WDT */
356 .dev_id = "mb:wdt",
357 .clk = &v2m_ref_clk,
351 }, { /* SP804 timers */ 358 }, { /* SP804 timers */
352 .dev_id = "sp804", 359 .dev_id = "sp804",
353 .con_id = "v2m-timer0", 360 .con_id = "v2m-timer0",
diff --git a/arch/arm/mm/abort-macro.S b/arch/arm/mm/abort-macro.S
index 52162d59407a..2cbf68ef0e83 100644
--- a/arch/arm/mm/abort-macro.S
+++ b/arch/arm/mm/abort-macro.S
@@ -17,7 +17,7 @@
17 cmp \tmp, # 0x5600 @ Is it ldrsb? 17 cmp \tmp, # 0x5600 @ Is it ldrsb?
18 orreq \tmp, \tmp, #1 << 11 @ Set L-bit if yes 18 orreq \tmp, \tmp, #1 << 11 @ Set L-bit if yes
19 tst \tmp, #1 << 11 @ L = 0 -> write 19 tst \tmp, #1 << 11 @ L = 0 -> write
20 orreq \psr, \psr, #1 << 11 @ yes. 20 orreq \fsr, \fsr, #1 << 11 @ yes.
21 b do_DataAbort 21 b do_DataAbort
22not_thumb: 22not_thumb:
23 .endm 23 .endm
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 44c086710d2b..9ecfdb511951 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -277,6 +277,25 @@ static void l2x0_disable(void)
277 spin_unlock_irqrestore(&l2x0_lock, flags); 277 spin_unlock_irqrestore(&l2x0_lock, flags);
278} 278}
279 279
280static void __init l2x0_unlock(__u32 cache_id)
281{
282 int lockregs;
283 int i;
284
285 if (cache_id == L2X0_CACHE_ID_PART_L310)
286 lockregs = 8;
287 else
288 /* L210 and unknown types */
289 lockregs = 1;
290
291 for (i = 0; i < lockregs; i++) {
292 writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_D_BASE +
293 i * L2X0_LOCKDOWN_STRIDE);
294 writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_I_BASE +
295 i * L2X0_LOCKDOWN_STRIDE);
296 }
297}
298
280void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) 299void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)
281{ 300{
282 __u32 aux; 301 __u32 aux;
@@ -328,6 +347,8 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)
328 * accessing the below registers will fault. 347 * accessing the below registers will fault.
329 */ 348 */
330 if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & 1)) { 349 if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & 1)) {
350 /* Make sure that I&D is not locked down when starting */
351 l2x0_unlock(cache_id);
331 352
332 /* l2x0 controller is disabled */ 353 /* l2x0 controller is disabled */
333 writel_relaxed(aux, l2x0_base + L2X0_AUX_CTRL); 354 writel_relaxed(aux, l2x0_base + L2X0_AUX_CTRL);
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 91bca355cd31..cc7e2d8be9aa 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -298,7 +298,7 @@ static void __init arm_bootmem_free(unsigned long min, unsigned long max_low,
298#ifdef CONFIG_HAVE_ARCH_PFN_VALID 298#ifdef CONFIG_HAVE_ARCH_PFN_VALID
299int pfn_valid(unsigned long pfn) 299int pfn_valid(unsigned long pfn)
300{ 300{
301 return memblock_is_memory(pfn << PAGE_SHIFT); 301 return memblock_is_memory(__pfn_to_phys(pfn));
302} 302}
303EXPORT_SYMBOL(pfn_valid); 303EXPORT_SYMBOL(pfn_valid);
304#endif 304#endif
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S
index 92bd102e3982..2e6849b41f66 100644
--- a/arch/arm/mm/proc-arm920.S
+++ b/arch/arm/mm/proc-arm920.S
@@ -379,7 +379,7 @@ ENTRY(cpu_arm920_set_pte_ext)
379 379
380/* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */ 380/* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */
381.globl cpu_arm920_suspend_size 381.globl cpu_arm920_suspend_size
382.equ cpu_arm920_suspend_size, 4 * 3 382.equ cpu_arm920_suspend_size, 4 * 4
383#ifdef CONFIG_PM_SLEEP 383#ifdef CONFIG_PM_SLEEP
384ENTRY(cpu_arm920_do_suspend) 384ENTRY(cpu_arm920_do_suspend)
385 stmfd sp!, {r4 - r7, lr} 385 stmfd sp!, {r4 - r7, lr}
diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S
index 2bbcf053dffd..cd8f79c3a282 100644
--- a/arch/arm/mm/proc-arm926.S
+++ b/arch/arm/mm/proc-arm926.S
@@ -394,7 +394,7 @@ ENTRY(cpu_arm926_set_pte_ext)
394 394
395/* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */ 395/* Suspend/resume support: taken from arch/arm/plat-s3c24xx/sleep.S */
396.globl cpu_arm926_suspend_size 396.globl cpu_arm926_suspend_size
397.equ cpu_arm926_suspend_size, 4 * 3 397.equ cpu_arm926_suspend_size, 4 * 4
398#ifdef CONFIG_PM_SLEEP 398#ifdef CONFIG_PM_SLEEP
399ENTRY(cpu_arm926_do_suspend) 399ENTRY(cpu_arm926_do_suspend)
400 stmfd sp!, {r4 - r7, lr} 400 stmfd sp!, {r4 - r7, lr}
diff --git a/arch/arm/mm/proc-sa1100.S b/arch/arm/mm/proc-sa1100.S
index 07219c2ae114..69e7f2ef7384 100644
--- a/arch/arm/mm/proc-sa1100.S
+++ b/arch/arm/mm/proc-sa1100.S
@@ -182,11 +182,11 @@ ENDPROC(cpu_sa1100_do_suspend)
182 182
183ENTRY(cpu_sa1100_do_resume) 183ENTRY(cpu_sa1100_do_resume)
184 ldmia r0, {r4 - r7} @ load cp regs 184 ldmia r0, {r4 - r7} @ load cp regs
185 mov r1, #0 185 mov ip, #0
186 mcr p15, 0, r1, c8, c7, 0 @ flush I+D TLBs 186 mcr p15, 0, ip, c8, c7, 0 @ flush I+D TLBs
187 mcr p15, 0, r1, c7, c7, 0 @ flush I&D cache 187 mcr p15, 0, ip, c7, c7, 0 @ flush I&D cache
188 mcr p15, 0, r1, c9, c0, 0 @ invalidate RB 188 mcr p15, 0, ip, c9, c0, 0 @ invalidate RB
189 mcr p15, 0, r1, c9, c0, 5 @ allow user space to use RB 189 mcr p15, 0, ip, c9, c0, 5 @ allow user space to use RB
190 190
191 mcr p15, 0, r4, c3, c0, 0 @ domain ID 191 mcr p15, 0, r4, c3, c0, 0 @ domain ID
192 mcr p15, 0, r5, c2, c0, 0 @ translation table base addr 192 mcr p15, 0, r5, c2, c0, 0 @ translation table base addr
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S
index 219138d2f158..a923aa0fd00d 100644
--- a/arch/arm/mm/proc-v6.S
+++ b/arch/arm/mm/proc-v6.S
@@ -223,6 +223,22 @@ __v6_setup:
223 mrc p15, 0, r0, c1, c0, 0 @ read control register 223 mrc p15, 0, r0, c1, c0, 0 @ read control register
224 bic r0, r0, r5 @ clear bits them 224 bic r0, r0, r5 @ clear bits them
225 orr r0, r0, r6 @ set them 225 orr r0, r0, r6 @ set them
226#ifdef CONFIG_ARM_ERRATA_364296
227 /*
228 * Workaround for the 364296 ARM1136 r0p2 erratum (possible cache data
229 * corruption with hit-under-miss enabled). The conditional code below
230 * (setting the undocumented bit 31 in the auxiliary control register
231 * and the FI bit in the control register) disables hit-under-miss
232 * without putting the processor into full low interrupt latency mode.
233 */
234 ldr r6, =0x4107b362 @ id for ARM1136 r0p2
235 mrc p15, 0, r5, c0, c0, 0 @ get processor id
236 teq r5, r6 @ check for the faulty core
237 mrceq p15, 0, r5, c1, c0, 1 @ load aux control reg
238 orreq r5, r5, #(1 << 31) @ set the undocumented bit 31
239 mcreq p15, 0, r5, c1, c0, 1 @ write aux control reg
240 orreq r0, r0, #(1 << 21) @ low interrupt latency configuration
241#endif
226 mov pc, lr @ return to head.S:__ret 242 mov pc, lr @ return to head.S:__ret
227 243
228 /* 244 /*
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index a30e78542ccf..9049c0764db2 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -66,6 +66,7 @@ ENDPROC(cpu_v7_proc_fin)
66ENTRY(cpu_v7_reset) 66ENTRY(cpu_v7_reset)
67 mrc p15, 0, r1, c1, c0, 0 @ ctrl register 67 mrc p15, 0, r1, c1, c0, 0 @ ctrl register
68 bic r1, r1, #0x1 @ ...............m 68 bic r1, r1, #0x1 @ ...............m
69 THUMB( bic r1, r1, #1 << 30 ) @ SCTLR.TE (Thumb exceptions)
69 mcr p15, 0, r1, c1, c0, 0 @ disable MMU 70 mcr p15, 0, r1, c1, c0, 0 @ disable MMU
70 isb 71 isb
71 mov pc, r0 72 mov pc, r0
@@ -247,13 +248,16 @@ ENTRY(cpu_v7_do_resume)
247 mcr p15, 0, r7, c2, c0, 0 @ TTB 0 248 mcr p15, 0, r7, c2, c0, 0 @ TTB 0
248 mcr p15, 0, r8, c2, c0, 1 @ TTB 1 249 mcr p15, 0, r8, c2, c0, 1 @ TTB 1
249 mcr p15, 0, ip, c2, c0, 2 @ TTB control register 250 mcr p15, 0, ip, c2, c0, 2 @ TTB control register
250 mcr p15, 0, r10, c1, c0, 1 @ Auxiliary control register 251 mrc p15, 0, r4, c1, c0, 1 @ Read Auxiliary control register
252 teq r4, r10 @ Is it already set?
253 mcrne p15, 0, r10, c1, c0, 1 @ No, so write it
251 mcr p15, 0, r11, c1, c0, 2 @ Co-processor access control 254 mcr p15, 0, r11, c1, c0, 2 @ Co-processor access control
252 ldr r4, =PRRR @ PRRR 255 ldr r4, =PRRR @ PRRR
253 ldr r5, =NMRR @ NMRR 256 ldr r5, =NMRR @ NMRR
254 mcr p15, 0, r4, c10, c2, 0 @ write PRRR 257 mcr p15, 0, r4, c10, c2, 0 @ write PRRR
255 mcr p15, 0, r5, c10, c2, 1 @ write NMRR 258 mcr p15, 0, r5, c10, c2, 1 @ write NMRR
256 isb 259 isb
260 dsb
257 mov r0, r9 @ control register 261 mov r0, r9 @ control register
258 mov r2, r7, lsr #14 @ get TTB0 base 262 mov r2, r7, lsr #14 @ get TTB0 base
259 mov r2, r2, lsl #14 263 mov r2, r2, lsl #14
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S
index 28c72a2006a1..755e1bf22681 100644
--- a/arch/arm/mm/proc-xsc3.S
+++ b/arch/arm/mm/proc-xsc3.S
@@ -406,7 +406,7 @@ ENTRY(cpu_xsc3_set_pte_ext)
406 .align 406 .align
407 407
408.globl cpu_xsc3_suspend_size 408.globl cpu_xsc3_suspend_size
409.equ cpu_xsc3_suspend_size, 4 * 8 409.equ cpu_xsc3_suspend_size, 4 * 7
410#ifdef CONFIG_PM_SLEEP 410#ifdef CONFIG_PM_SLEEP
411ENTRY(cpu_xsc3_do_suspend) 411ENTRY(cpu_xsc3_do_suspend)
412 stmfd sp!, {r4 - r10, lr} 412 stmfd sp!, {r4 - r10, lr}
@@ -418,12 +418,12 @@ ENTRY(cpu_xsc3_do_suspend)
418 mrc p15, 0, r9, c1, c0, 1 @ auxiliary control reg 418 mrc p15, 0, r9, c1, c0, 1 @ auxiliary control reg
419 mrc p15, 0, r10, c1, c0, 0 @ control reg 419 mrc p15, 0, r10, c1, c0, 0 @ control reg
420 bic r4, r4, #2 @ clear frequency change bit 420 bic r4, r4, #2 @ clear frequency change bit
421 stmia r0, {r1, r4 - r10} @ store v:p offset + cp regs 421 stmia r0, {r4 - r10} @ store cp regs
422 ldmia sp!, {r4 - r10, pc} 422 ldmia sp!, {r4 - r10, pc}
423ENDPROC(cpu_xsc3_do_suspend) 423ENDPROC(cpu_xsc3_do_suspend)
424 424
425ENTRY(cpu_xsc3_do_resume) 425ENTRY(cpu_xsc3_do_resume)
426 ldmia r0, {r1, r4 - r10} @ load v:p offset + cp regs 426 ldmia r0, {r4 - r10} @ load cp regs
427 mov ip, #0 427 mov ip, #0
428 mcr p15, 0, ip, c7, c7, 0 @ invalidate I & D caches, BTB 428 mcr p15, 0, ip, c7, c7, 0 @ invalidate I & D caches, BTB
429 mcr p15, 0, ip, c7, c10, 4 @ drain write (&fill) buffer 429 mcr p15, 0, ip, c7, c10, 4 @ drain write (&fill) buffer
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c
index 9a6a53854911..02609eee0562 100644
--- a/arch/arm/plat-omap/omap_device.c
+++ b/arch/arm/plat-omap/omap_device.c
@@ -615,6 +615,9 @@ static int _od_resume_noirq(struct device *dev)
615 615
616 return pm_generic_resume_noirq(dev); 616 return pm_generic_resume_noirq(dev);
617} 617}
618#else
619#define _od_suspend_noirq NULL
620#define _od_resume_noirq NULL
618#endif 621#endif
619 622
620static struct dev_pm_domain omap_device_pm_domain = { 623static struct dev_pm_domain omap_device_pm_domain = {
diff --git a/arch/arm/plat-s3c24xx/include/plat/map.h b/arch/arm/plat-s3c24xx/include/plat/map.h
deleted file mode 100644
index bd534d32b993..000000000000
--- a/arch/arm/plat-s3c24xx/include/plat/map.h
+++ /dev/null
@@ -1,100 +0,0 @@
1/* linux/include/asm-arm/plat-s3c24xx/map.h
2 *
3 * Copyright (c) 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C24XX - Memory map definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_PLAT_S3C24XX_MAP_H
14#define __ASM_PLAT_S3C24XX_MAP_H
15
16/* interrupt controller is the first thing we put in, to make
17 * the assembly code for the irq detection easier
18 */
19#define S3C24XX_VA_IRQ S3C_VA_IRQ
20#define S3C2410_PA_IRQ (0x4A000000)
21#define S3C24XX_SZ_IRQ SZ_1M
22
23/* memory controller registers */
24#define S3C24XX_VA_MEMCTRL S3C_VA_MEM
25#define S3C2410_PA_MEMCTRL (0x48000000)
26#define S3C24XX_SZ_MEMCTRL SZ_1M
27
28/* UARTs */
29#define S3C24XX_VA_UART S3C_VA_UART
30#define S3C2410_PA_UART (0x50000000)
31#define S3C24XX_SZ_UART SZ_1M
32#define S3C_UART_OFFSET (0x4000)
33
34#define S3C_VA_UARTx(uart) (S3C_VA_UART + ((uart * S3C_UART_OFFSET)))
35
36/* Timers */
37#define S3C24XX_VA_TIMER S3C_VA_TIMER
38#define S3C2410_PA_TIMER (0x51000000)
39#define S3C24XX_SZ_TIMER SZ_1M
40
41/* Clock and Power management */
42#define S3C24XX_VA_CLKPWR S3C_VA_SYS
43#define S3C24XX_SZ_CLKPWR SZ_1M
44
45/* USB Device port */
46#define S3C2410_PA_USBDEV (0x52000000)
47#define S3C24XX_SZ_USBDEV SZ_1M
48
49/* Watchdog */
50#define S3C24XX_VA_WATCHDOG S3C_VA_WATCHDOG
51#define S3C2410_PA_WATCHDOG (0x53000000)
52#define S3C24XX_SZ_WATCHDOG SZ_1M
53
54/* Standard size definitions for peripheral blocks. */
55
56#define S3C24XX_SZ_IIS SZ_1M
57#define S3C24XX_SZ_ADC SZ_1M
58#define S3C24XX_SZ_SPI SZ_1M
59#define S3C24XX_SZ_SDI SZ_1M
60#define S3C24XX_SZ_NAND SZ_1M
61
62/* GPIO ports */
63
64/* the calculation for the VA of this must ensure that
65 * it is the same distance apart from the UART in the
66 * phsyical address space, as the initial mapping for the IO
67 * is done as a 1:1 mapping. This puts it (currently) at
68 * 0xFA800000, which is not in the way of any current mapping
69 * by the base system.
70*/
71
72#define S3C2410_PA_GPIO (0x56000000)
73#define S3C24XX_VA_GPIO ((S3C24XX_PA_GPIO - S3C24XX_PA_UART) + S3C24XX_VA_UART)
74#define S3C24XX_SZ_GPIO SZ_1M
75
76
77/* ISA style IO, for each machine to sort out mappings for, if it
78 * implements it. We reserve two 16M regions for ISA.
79 */
80
81#define S3C24XX_VA_ISA_WORD S3C2410_ADDR(0x02000000)
82#define S3C24XX_VA_ISA_BYTE S3C2410_ADDR(0x03000000)
83
84/* deal with the registers that move under the 2412/2413 */
85
86#if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413)
87#ifndef __ASSEMBLY__
88extern void __iomem *s3c24xx_va_gpio2;
89#endif
90#ifdef CONFIG_CPU_S3C2412_ONLY
91#define S3C24XX_VA_GPIO2 (S3C24XX_VA_GPIO + 0x10)
92#else
93#define S3C24XX_VA_GPIO2 s3c24xx_va_gpio2
94#endif
95#else
96#define s3c24xx_va_gpio2 S3C24XX_VA_GPIO
97#define S3C24XX_VA_GPIO2 S3C24XX_VA_GPIO
98#endif
99
100#endif /* __ASM_PLAT_S3C24XX_MAP_H */
diff --git a/arch/arm/plat-s5p/clock.c b/arch/arm/plat-s5p/clock.c
index 02af235298e2..5f84a3f13ef9 100644
--- a/arch/arm/plat-s5p/clock.c
+++ b/arch/arm/plat-s5p/clock.c
@@ -192,7 +192,7 @@ unsigned long s5p_spdif_get_rate(struct clk *clk)
192 if (IS_ERR(pclk)) 192 if (IS_ERR(pclk))
193 return -EINVAL; 193 return -EINVAL;
194 194
195 rate = pclk->ops->get_rate(clk); 195 rate = pclk->ops->get_rate(pclk);
196 clk_put(pclk); 196 clk_put(pclk);
197 197
198 return rate; 198 return rate;
diff --git a/arch/arm/plat-s5p/include/plat/pll.h b/arch/arm/plat-s5p/include/plat/pll.h
index bf28fadee7ae..ebc142c5c84c 100644
--- a/arch/arm/plat-s5p/include/plat/pll.h
+++ b/arch/arm/plat-s5p/include/plat/pll.h
@@ -72,7 +72,6 @@ static inline unsigned long s5p_get_pll46xx(unsigned long baseclk,
72 mdiv = (pll_con0 >> PLL46XX_MDIV_SHIFT) & PLL46XX_MDIV_MASK; 72 mdiv = (pll_con0 >> PLL46XX_MDIV_SHIFT) & PLL46XX_MDIV_MASK;
73 pdiv = (pll_con0 >> PLL46XX_PDIV_SHIFT) & PLL46XX_PDIV_MASK; 73 pdiv = (pll_con0 >> PLL46XX_PDIV_SHIFT) & PLL46XX_PDIV_MASK;
74 sdiv = (pll_con0 >> PLL46XX_SDIV_SHIFT) & PLL46XX_SDIV_MASK; 74 sdiv = (pll_con0 >> PLL46XX_SDIV_SHIFT) & PLL46XX_SDIV_MASK;
75 kdiv = pll_con1 & PLL46XX_KDIV_MASK;
76 75
77 if (pll_type == pll_4650c) 76 if (pll_type == pll_4650c)
78 kdiv = pll_con1 & PLL4650C_KDIV_MASK; 77 kdiv = pll_con1 & PLL4650C_KDIV_MASK;
diff --git a/arch/arm/plat-s5p/irq-gpioint.c b/arch/arm/plat-s5p/irq-gpioint.c
index 327ab9f662e8..f71078ef6bb5 100644
--- a/arch/arm/plat-s5p/irq-gpioint.c
+++ b/arch/arm/plat-s5p/irq-gpioint.c
@@ -23,6 +23,8 @@
23#include <plat/gpio-core.h> 23#include <plat/gpio-core.h>
24#include <plat/gpio-cfg.h> 24#include <plat/gpio-cfg.h>
25 25
26#include <asm/mach/irq.h>
27
26#define GPIO_BASE(chip) (((unsigned long)(chip)->base) & 0xFFFFF000u) 28#define GPIO_BASE(chip) (((unsigned long)(chip)->base) & 0xFFFFF000u)
27 29
28#define CON_OFFSET 0x700 30#define CON_OFFSET 0x700
@@ -81,6 +83,9 @@ static void s5p_gpioint_handler(unsigned int irq, struct irq_desc *desc)
81 int group, pend_offset, mask_offset; 83 int group, pend_offset, mask_offset;
82 unsigned int pend, mask; 84 unsigned int pend, mask;
83 85
86 struct irq_chip *chip = irq_get_chip(irq);
87 chained_irq_enter(chip, desc);
88
84 for (group = 0; group < bank->nr_groups; group++) { 89 for (group = 0; group < bank->nr_groups; group++) {
85 struct s3c_gpio_chip *chip = bank->chips[group]; 90 struct s3c_gpio_chip *chip = bank->chips[group];
86 if (!chip) 91 if (!chip)
@@ -102,6 +107,7 @@ static void s5p_gpioint_handler(unsigned int irq, struct irq_desc *desc)
102 pend &= ~BIT(offset); 107 pend &= ~BIT(offset);
103 } 108 }
104 } 109 }
110 chained_irq_exit(chip, desc);
105} 111}
106 112
107static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip) 113static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip)
diff --git a/arch/arm/plat-samsung/dev-hsmmc.c b/arch/arm/plat-samsung/dev-hsmmc.c
index db7a65c7f127..06825c4276de 100644
--- a/arch/arm/plat-samsung/dev-hsmmc.c
+++ b/arch/arm/plat-samsung/dev-hsmmc.c
@@ -58,22 +58,5 @@ struct platform_device s3c_device_hsmmc0 = {
58 58
59void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd) 59void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
60{ 60{
61 struct s3c_sdhci_platdata *set = &s3c_hsmmc0_def_platdata; 61 s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
62
63 set->cd_type = pd->cd_type;
64 set->ext_cd_init = pd->ext_cd_init;
65 set->ext_cd_cleanup = pd->ext_cd_cleanup;
66 set->ext_cd_gpio = pd->ext_cd_gpio;
67 set->ext_cd_gpio_invert = pd->ext_cd_gpio_invert;
68
69 if (pd->max_width)
70 set->max_width = pd->max_width;
71 if (pd->cfg_gpio)
72 set->cfg_gpio = pd->cfg_gpio;
73 if (pd->cfg_card)
74 set->cfg_card = pd->cfg_card;
75 if (pd->host_caps)
76 set->host_caps |= pd->host_caps;
77 if (pd->clk_type)
78 set->clk_type = pd->clk_type;
79} 62}
diff --git a/arch/arm/plat-samsung/dev-hsmmc1.c b/arch/arm/plat-samsung/dev-hsmmc1.c
index 2497321f08d7..4524ef440010 100644
--- a/arch/arm/plat-samsung/dev-hsmmc1.c
+++ b/arch/arm/plat-samsung/dev-hsmmc1.c
@@ -58,22 +58,5 @@ struct platform_device s3c_device_hsmmc1 = {
58 58
59void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd) 59void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
60{ 60{
61 struct s3c_sdhci_platdata *set = &s3c_hsmmc1_def_platdata; 61 s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
62
63 set->cd_type = pd->cd_type;
64 set->ext_cd_init = pd->ext_cd_init;
65 set->ext_cd_cleanup = pd->ext_cd_cleanup;
66 set->ext_cd_gpio = pd->ext_cd_gpio;
67 set->ext_cd_gpio_invert = pd->ext_cd_gpio_invert;
68
69 if (pd->max_width)
70 set->max_width = pd->max_width;
71 if (pd->cfg_gpio)
72 set->cfg_gpio = pd->cfg_gpio;
73 if (pd->cfg_card)
74 set->cfg_card = pd->cfg_card;
75 if (pd->host_caps)
76 set->host_caps |= pd->host_caps;
77 if (pd->clk_type)
78 set->clk_type = pd->clk_type;
79} 62}
diff --git a/arch/arm/plat-samsung/dev-hsmmc2.c b/arch/arm/plat-samsung/dev-hsmmc2.c
index f60aedba417c..9cede9615e48 100644
--- a/arch/arm/plat-samsung/dev-hsmmc2.c
+++ b/arch/arm/plat-samsung/dev-hsmmc2.c
@@ -59,22 +59,5 @@ struct platform_device s3c_device_hsmmc2 = {
59 59
60void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd) 60void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
61{ 61{
62 struct s3c_sdhci_platdata *set = &s3c_hsmmc2_def_platdata; 62 s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
63
64 set->cd_type = pd->cd_type;
65 set->ext_cd_init = pd->ext_cd_init;
66 set->ext_cd_cleanup = pd->ext_cd_cleanup;
67 set->ext_cd_gpio = pd->ext_cd_gpio;
68 set->ext_cd_gpio_invert = pd->ext_cd_gpio_invert;
69
70 if (pd->max_width)
71 set->max_width = pd->max_width;
72 if (pd->cfg_gpio)
73 set->cfg_gpio = pd->cfg_gpio;
74 if (pd->cfg_card)
75 set->cfg_card = pd->cfg_card;
76 if (pd->host_caps)
77 set->host_caps |= pd->host_caps;
78 if (pd->clk_type)
79 set->clk_type = pd->clk_type;
80} 63}
diff --git a/arch/arm/plat-samsung/dev-hsmmc3.c b/arch/arm/plat-samsung/dev-hsmmc3.c
index ede776f20e62..0358ef4a8f66 100644
--- a/arch/arm/plat-samsung/dev-hsmmc3.c
+++ b/arch/arm/plat-samsung/dev-hsmmc3.c
@@ -62,22 +62,5 @@ struct platform_device s3c_device_hsmmc3 = {
62 62
63void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd) 63void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
64{ 64{
65 struct s3c_sdhci_platdata *set = &s3c_hsmmc3_def_platdata; 65 s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
66
67 set->cd_type = pd->cd_type;
68 set->ext_cd_init = pd->ext_cd_init;
69 set->ext_cd_cleanup = pd->ext_cd_cleanup;
70 set->ext_cd_gpio = pd->ext_cd_gpio;
71 set->ext_cd_gpio_invert = pd->ext_cd_gpio_invert;
72
73 if (pd->max_width)
74 set->max_width = pd->max_width;
75 if (pd->cfg_gpio)
76 set->cfg_gpio = pd->cfg_gpio;
77 if (pd->cfg_card)
78 set->cfg_card = pd->cfg_card;
79 if (pd->host_caps)
80 set->host_caps |= pd->host_caps;
81 if (pd->clk_type)
82 set->clk_type = pd->clk_type;
83} 66}
diff --git a/arch/arm/plat-samsung/dev-ts.c b/arch/arm/plat-samsung/dev-ts.c
index 82543f0248ac..5f3d46a9bd88 100644
--- a/arch/arm/plat-samsung/dev-ts.c
+++ b/arch/arm/plat-samsung/dev-ts.c
@@ -43,8 +43,17 @@ struct platform_device s3c_device_ts = {
43 .resource = s3c_ts_resource, 43 .resource = s3c_ts_resource,
44}; 44};
45 45
46static struct s3c2410_ts_mach_info default_ts_data __initdata = {
47 .delay = 10000,
48 .presc = 49,
49 .oversampling_shift = 2,
50};
51
46void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd) 52void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
47{ 53{
54 if (!pd)
55 pd = &default_ts_data;
56
48 s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info), 57 s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
49 &s3c_device_ts); 58 &s3c_device_ts);
50} 59}
diff --git a/arch/arm/plat-samsung/include/plat/backlight.h b/arch/arm/plat-samsung/include/plat/backlight.h
index 51d8da846a62..ad530c78fe8c 100644
--- a/arch/arm/plat-samsung/include/plat/backlight.h
+++ b/arch/arm/plat-samsung/include/plat/backlight.h
@@ -20,7 +20,7 @@ struct samsung_bl_gpio_info {
20 int func; 20 int func;
21}; 21};
22 22
23extern void samsung_bl_set(struct samsung_bl_gpio_info *gpio_info, 23extern void __init samsung_bl_set(struct samsung_bl_gpio_info *gpio_info,
24 struct platform_pwm_backlight_data *bl_data); 24 struct platform_pwm_backlight_data *bl_data);
25 25
26#endif /* __ASM_PLAT_BACKLIGHT_H */ 26#endif /* __ASM_PLAT_BACKLIGHT_H */
diff --git a/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h b/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h
index 336d5ac02035..ab9bce637cbd 100644
--- a/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h
+++ b/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h
@@ -18,11 +18,6 @@ extern struct s3c2410_dma_chan s3c2410_chans[S3C_DMA_CHANNELS];
18#define DMA_CH_VALID (1<<31) 18#define DMA_CH_VALID (1<<31)
19#define DMA_CH_NEVER (1<<30) 19#define DMA_CH_NEVER (1<<30)
20 20
21struct s3c24xx_dma_addr {
22 unsigned long from;
23 unsigned long to;
24};
25
26/* struct s3c24xx_dma_map 21/* struct s3c24xx_dma_map
27 * 22 *
28 * this holds the mapping information for the channel selected 23 * this holds the mapping information for the channel selected
@@ -31,7 +26,6 @@ struct s3c24xx_dma_addr {
31 26
32struct s3c24xx_dma_map { 27struct s3c24xx_dma_map {
33 const char *name; 28 const char *name;
34 struct s3c24xx_dma_addr hw_addr;
35 29
36 unsigned long channels[S3C_DMA_CHANNELS]; 30 unsigned long channels[S3C_DMA_CHANNELS];
37 unsigned long channels_rx[S3C_DMA_CHANNELS]; 31 unsigned long channels_rx[S3C_DMA_CHANNELS];
diff --git a/arch/arm/plat-samsung/include/plat/map-s3c.h b/arch/arm/plat-samsung/include/plat/map-s3c.h
new file mode 100644
index 000000000000..7d048759b772
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/map-s3c.h
@@ -0,0 +1,84 @@
1/* linux/arch/arm/plat-samsung/include/plat/map-s3c.h
2 *
3 * Copyright (c) 2008 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * S3C24XX - Memory map definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_PLAT_MAP_S3C_H
14#define __ASM_PLAT_MAP_S3C_H __FILE__
15
16#define S3C24XX_VA_IRQ S3C_VA_IRQ
17#define S3C24XX_VA_MEMCTRL S3C_VA_MEM
18#define S3C24XX_VA_UART S3C_VA_UART
19
20#define S3C24XX_VA_TIMER S3C_VA_TIMER
21#define S3C24XX_VA_CLKPWR S3C_VA_SYS
22#define S3C24XX_VA_WATCHDOG S3C_VA_WATCHDOG
23
24#define S3C2412_VA_SSMC S3C_ADDR_CPU(0x00000000)
25#define S3C2412_VA_EBI S3C_ADDR_CPU(0x00010000)
26
27#define S3C2410_PA_UART (0x50000000)
28#define S3C24XX_PA_UART S3C2410_PA_UART
29
30#ifndef S3C_UART_OFFSET
31#define S3C_UART_OFFSET (0x400)
32#endif
33
34/*
35 * GPIO ports
36 *
37 * the calculation for the VA of this must ensure that
38 * it is the same distance apart from the UART in the
39 * phsyical address space, as the initial mapping for the IO
40 * is done as a 1:1 mapping. This puts it (currently) at
41 * 0xFA800000, which is not in the way of any current mapping
42 * by the base system.
43*/
44
45#define S3C2410_PA_GPIO (0x56000000)
46#define S3C24XX_PA_GPIO S3C2410_PA_GPIO
47
48#define S3C24XX_VA_GPIO ((S3C24XX_PA_GPIO - S3C24XX_PA_UART) + S3C24XX_VA_UART)
49#define S3C64XX_VA_GPIO S3C_ADDR_CPU(0x00000000)
50
51#define S3C64XX_VA_MODEM S3C_ADDR_CPU(0x00100000)
52#define S3C64XX_VA_USB_HSPHY S3C_ADDR_CPU(0x00200000)
53
54#define S3C_VA_USB_HSPHY S3C64XX_VA_USB_HSPHY
55
56/*
57 * ISA style IO, for each machine to sort out mappings for,
58 * if it implements it. We reserve two 16M regions for ISA.
59 */
60
61#define S3C2410_ADDR(x) S3C_ADDR(x)
62
63#define S3C24XX_VA_ISA_WORD S3C2410_ADDR(0x02000000)
64#define S3C24XX_VA_ISA_BYTE S3C2410_ADDR(0x03000000)
65
66/* deal with the registers that move under the 2412/2413 */
67
68#if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413)
69#ifndef __ASSEMBLY__
70extern void __iomem *s3c24xx_va_gpio2;
71#endif
72#ifdef CONFIG_CPU_S3C2412_ONLY
73#define S3C24XX_VA_GPIO2 (S3C24XX_VA_GPIO + 0x10)
74#else
75#define S3C24XX_VA_GPIO2 s3c24xx_va_gpio2
76#endif
77#else
78#define s3c24xx_va_gpio2 S3C24XX_VA_GPIO
79#define S3C24XX_VA_GPIO2 S3C24XX_VA_GPIO
80#endif
81
82#include <plat/map-s5p.h>
83
84#endif /* __ASM_PLAT_MAP_S3C_H */
diff --git a/arch/arm/plat-s5p/include/plat/map-s5p.h b/arch/arm/plat-samsung/include/plat/map-s5p.h
index 36d3551173b2..c2d7bdae5891 100644
--- a/arch/arm/plat-s5p/include/plat/map-s5p.h
+++ b/arch/arm/plat-samsung/include/plat/map-s5p.h
@@ -1,4 +1,4 @@
1/* linux/arch/arm/plat-s5p/include/plat/map-s5p.h 1/* linux/arch/arm/plat-samsung/include/plat/map-s5p.h
2 * 2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd. 3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/ 4 * http://www.samsung.com/
@@ -40,8 +40,6 @@
40#define S5P_VA_GIC_CPU S3C_ADDR(0x02810000) 40#define S5P_VA_GIC_CPU S3C_ADDR(0x02810000)
41#define S5P_VA_GIC_DIST S3C_ADDR(0x02820000) 41#define S5P_VA_GIC_DIST S3C_ADDR(0x02820000)
42 42
43#define S3C_VA_USB_HSPHY S3C_ADDR(0x02900000)
44
45#define VA_VIC(x) (S3C_VA_IRQ + ((x) * 0x10000)) 43#define VA_VIC(x) (S3C_VA_IRQ + ((x) * 0x10000))
46#define VA_VIC0 VA_VIC(0) 44#define VA_VIC0 VA_VIC(0)
47#define VA_VIC1 VA_VIC(1) 45#define VA_VIC1 VA_VIC(1)
@@ -58,4 +56,6 @@
58#define S3C_UART_OFFSET (0x400) 56#define S3C_UART_OFFSET (0x400)
59#endif 57#endif
60 58
59#include <plat/map-s3c.h>
60
61#endif /* __ASM_PLAT_MAP_S5P_H */ 61#endif /* __ASM_PLAT_MAP_S5P_H */
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h
index 058e09654fe8..4a6552066c7e 100644
--- a/arch/arm/plat-samsung/include/plat/sdhci.h
+++ b/arch/arm/plat-samsung/include/plat/sdhci.h
@@ -86,6 +86,13 @@ struct s3c_sdhci_platdata {
86 struct mmc_card *card); 86 struct mmc_card *card);
87}; 87};
88 88
89/* s3c_sdhci_set_platdata() - common helper for setting SDHCI platform data
90 * @pd: The default platform data for this device.
91 * @set: Pointer to the platform data to fill in.
92 */
93extern void s3c_sdhci_set_platdata(struct s3c_sdhci_platdata *pd,
94 struct s3c_sdhci_platdata *set);
95
89/** 96/**
90 * s3c_sdhci0_set_platdata - Set platform data for S3C SDHCI device. 97 * s3c_sdhci0_set_platdata - Set platform data for S3C SDHCI device.
91 * @pd: Platform data to register to device. 98 * @pd: Platform data to register to device.
diff --git a/arch/arm/plat-samsung/irq-vic-timer.c b/arch/arm/plat-samsung/irq-vic-timer.c
index f714d060370d..51583cd30164 100644
--- a/arch/arm/plat-samsung/irq-vic-timer.c
+++ b/arch/arm/plat-samsung/irq-vic-timer.c
@@ -22,9 +22,14 @@
22#include <plat/irq-vic-timer.h> 22#include <plat/irq-vic-timer.h>
23#include <plat/regs-timer.h> 23#include <plat/regs-timer.h>
24 24
25#include <asm/mach/irq.h>
26
25static void s3c_irq_demux_vic_timer(unsigned int irq, struct irq_desc *desc) 27static void s3c_irq_demux_vic_timer(unsigned int irq, struct irq_desc *desc)
26{ 28{
29 struct irq_chip *chip = irq_get_chip(irq);
30 chained_irq_enter(chip, desc);
27 generic_handle_irq((int)desc->irq_data.handler_data); 31 generic_handle_irq((int)desc->irq_data.handler_data);
32 chained_irq_exit(chip, desc);
28} 33}
29 34
30/* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */ 35/* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */
diff --git a/arch/arm/plat-samsung/platformdata.c b/arch/arm/plat-samsung/platformdata.c
index 7cf2e1e3b20f..6de1a3825927 100644
--- a/arch/arm/plat-samsung/platformdata.c
+++ b/arch/arm/plat-samsung/platformdata.c
@@ -14,6 +14,7 @@
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15 15
16#include <plat/devs.h> 16#include <plat/devs.h>
17#include <plat/sdhci.h>
17 18
18void __init *s3c_set_platdata(void *pd, size_t pdsize, 19void __init *s3c_set_platdata(void *pd, size_t pdsize,
19 struct platform_device *pdev) 20 struct platform_device *pdev)
@@ -35,3 +36,24 @@ void __init *s3c_set_platdata(void *pd, size_t pdsize,
35 pdev->dev.platform_data = npd; 36 pdev->dev.platform_data = npd;
36 return npd; 37 return npd;
37} 38}
39
40void s3c_sdhci_set_platdata(struct s3c_sdhci_platdata *pd,
41 struct s3c_sdhci_platdata *set)
42{
43 set->cd_type = pd->cd_type;
44 set->ext_cd_init = pd->ext_cd_init;
45 set->ext_cd_cleanup = pd->ext_cd_cleanup;
46 set->ext_cd_gpio = pd->ext_cd_gpio;
47 set->ext_cd_gpio_invert = pd->ext_cd_gpio_invert;
48
49 if (pd->max_width)
50 set->max_width = pd->max_width;
51 if (pd->cfg_gpio)
52 set->cfg_gpio = pd->cfg_gpio;
53 if (pd->cfg_card)
54 set->cfg_card = pd->cfg_card;
55 if (pd->host_caps)
56 set->host_caps |= pd->host_caps;
57 if (pd->clk_type)
58 set->clk_type = pd->clk_type;
59}
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index fff68d0d521b..62cc8f981171 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -351,7 +351,7 @@ centro MACH_CENTRO CENTRO 1944
351nokia_rx51 MACH_NOKIA_RX51 NOKIA_RX51 1955 351nokia_rx51 MACH_NOKIA_RX51 NOKIA_RX51 1955
352omap_zoom2 MACH_OMAP_ZOOM2 OMAP_ZOOM2 1967 352omap_zoom2 MACH_OMAP_ZOOM2 OMAP_ZOOM2 1967
353cpuat9260 MACH_CPUAT9260 CPUAT9260 1973 353cpuat9260 MACH_CPUAT9260 CPUAT9260 1973
354eukrea_cpuimx27 MACH_CPUIMX27 CPUIMX27 1975 354eukrea_cpuimx27 MACH_EUKREA_CPUIMX27 EUKREA_CPUIMX27 1975
355acs5k MACH_ACS5K ACS5K 1982 355acs5k MACH_ACS5K ACS5K 1982
356snapper_9260 MACH_SNAPPER_9260 SNAPPER_9260 1987 356snapper_9260 MACH_SNAPPER_9260 SNAPPER_9260 1987
357dsm320 MACH_DSM320 DSM320 1988 357dsm320 MACH_DSM320 DSM320 1988
@@ -476,8 +476,8 @@ cns3420vb MACH_CNS3420VB CNS3420VB 2776
476omap4_panda MACH_OMAP4_PANDA OMAP4_PANDA 2791 476omap4_panda MACH_OMAP4_PANDA OMAP4_PANDA 2791
477ti8168evm MACH_TI8168EVM TI8168EVM 2800 477ti8168evm MACH_TI8168EVM TI8168EVM 2800
478teton_bga MACH_TETON_BGA TETON_BGA 2816 478teton_bga MACH_TETON_BGA TETON_BGA 2816
479eukrea_cpuimx25sd MACH_EUKREA_CPUIMX25 EUKREA_CPUIMX25 2820 479eukrea_cpuimx25sd MACH_EUKREA_CPUIMX25SD EUKREA_CPUIMX25SD 2820
480eukrea_cpuimx35sd MACH_EUKREA_CPUIMX35 EUKREA_CPUIMX35 2821 480eukrea_cpuimx35sd MACH_EUKREA_CPUIMX35SD EUKREA_CPUIMX35SD 2821
481eukrea_cpuimx51sd MACH_EUKREA_CPUIMX51SD EUKREA_CPUIMX51SD 2822 481eukrea_cpuimx51sd MACH_EUKREA_CPUIMX51SD EUKREA_CPUIMX51SD 2822
482eukrea_cpuimx51 MACH_EUKREA_CPUIMX51 EUKREA_CPUIMX51 2823 482eukrea_cpuimx51 MACH_EUKREA_CPUIMX51 EUKREA_CPUIMX51 2823
483smdkc210 MACH_SMDKC210 SMDKC210 2838 483smdkc210 MACH_SMDKC210 SMDKC210 2838
diff --git a/arch/openrisc/include/asm/dma-mapping.h b/arch/openrisc/include/asm/dma-mapping.h
index 052f877b52a5..60b472233900 100644
--- a/arch/openrisc/include/asm/dma-mapping.h
+++ b/arch/openrisc/include/asm/dma-mapping.h
@@ -31,7 +31,6 @@
31 31
32#define DMA_ERROR_CODE (~(dma_addr_t)0x0) 32#define DMA_ERROR_CODE (~(dma_addr_t)0x0)
33 33
34int dma_mapping_error(struct device *dev, dma_addr_t dma_addr);
35 34
36#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) 35#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
37#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) 36#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
@@ -47,6 +46,12 @@ dma_addr_t or1k_map_page(struct device *dev, struct page *page,
47void or1k_unmap_page(struct device *dev, dma_addr_t dma_handle, 46void or1k_unmap_page(struct device *dev, dma_addr_t dma_handle,
48 size_t size, enum dma_data_direction dir, 47 size_t size, enum dma_data_direction dir,
49 struct dma_attrs *attrs); 48 struct dma_attrs *attrs);
49int or1k_map_sg(struct device *dev, struct scatterlist *sg,
50 int nents, enum dma_data_direction dir,
51 struct dma_attrs *attrs);
52void or1k_unmap_sg(struct device *dev, struct scatterlist *sg,
53 int nents, enum dma_data_direction dir,
54 struct dma_attrs *attrs);
50void or1k_sync_single_for_cpu(struct device *dev, 55void or1k_sync_single_for_cpu(struct device *dev,
51 dma_addr_t dma_handle, size_t size, 56 dma_addr_t dma_handle, size_t size,
52 enum dma_data_direction dir); 57 enum dma_data_direction dir);
@@ -98,6 +103,51 @@ static inline void dma_unmap_single(struct device *dev, dma_addr_t addr,
98 debug_dma_unmap_page(dev, addr, size, dir, true); 103 debug_dma_unmap_page(dev, addr, size, dir, true);
99} 104}
100 105
106static inline int dma_map_sg(struct device *dev, struct scatterlist *sg,
107 int nents, enum dma_data_direction dir)
108{
109 int i, ents;
110 struct scatterlist *s;
111
112 for_each_sg(sg, s, nents, i)
113 kmemcheck_mark_initialized(sg_virt(s), s->length);
114 BUG_ON(!valid_dma_direction(dir));
115 ents = or1k_map_sg(dev, sg, nents, dir, NULL);
116 debug_dma_map_sg(dev, sg, nents, ents, dir);
117
118 return ents;
119}
120
121static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
122 int nents, enum dma_data_direction dir)
123{
124 BUG_ON(!valid_dma_direction(dir));
125 debug_dma_unmap_sg(dev, sg, nents, dir);
126 or1k_unmap_sg(dev, sg, nents, dir, NULL);
127}
128
129static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
130 size_t offset, size_t size,
131 enum dma_data_direction dir)
132{
133 dma_addr_t addr;
134
135 kmemcheck_mark_initialized(page_address(page) + offset, size);
136 BUG_ON(!valid_dma_direction(dir));
137 addr = or1k_map_page(dev, page, offset, size, dir, NULL);
138 debug_dma_map_page(dev, page, offset, size, dir, addr, false);
139
140 return addr;
141}
142
143static inline void dma_unmap_page(struct device *dev, dma_addr_t addr,
144 size_t size, enum dma_data_direction dir)
145{
146 BUG_ON(!valid_dma_direction(dir));
147 or1k_unmap_page(dev, addr, size, dir, NULL);
148 debug_dma_unmap_page(dev, addr, size, dir, true);
149}
150
101static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr, 151static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr,
102 size_t size, 152 size_t size,
103 enum dma_data_direction dir) 153 enum dma_data_direction dir)
@@ -119,7 +169,12 @@ static inline void dma_sync_single_for_device(struct device *dev,
119static inline int dma_supported(struct device *dev, u64 dma_mask) 169static inline int dma_supported(struct device *dev, u64 dma_mask)
120{ 170{
121 /* Support 32 bit DMA mask exclusively */ 171 /* Support 32 bit DMA mask exclusively */
122 return dma_mask == 0xffffffffULL; 172 return dma_mask == DMA_BIT_MASK(32);
173}
174
175static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
176{
177 return 0;
123} 178}
124 179
125static inline int dma_set_mask(struct device *dev, u64 dma_mask) 180static inline int dma_set_mask(struct device *dev, u64 dma_mask)
diff --git a/arch/openrisc/include/asm/sigcontext.h b/arch/openrisc/include/asm/sigcontext.h
index 54a5c50132e3..b79c2b19afbe 100644
--- a/arch/openrisc/include/asm/sigcontext.h
+++ b/arch/openrisc/include/asm/sigcontext.h
@@ -23,16 +23,11 @@
23 23
24/* This struct is saved by setup_frame in signal.c, to keep the current 24/* This struct is saved by setup_frame in signal.c, to keep the current
25 context while a signal handler is executed. It's restored by sys_sigreturn. 25 context while a signal handler is executed. It's restored by sys_sigreturn.
26
27 To keep things simple, we use pt_regs here even though normally you just
28 specify the list of regs to save. Then we can use copy_from_user on the
29 entire regs instead of a bunch of get_user's as well...
30*/ 26*/
31 27
32struct sigcontext { 28struct sigcontext {
33 struct pt_regs regs; /* needs to be first */ 29 struct user_regs_struct regs; /* needs to be first */
34 unsigned long oldmask; 30 unsigned long oldmask;
35 unsigned long usp; /* usp before stacking this gunk on it */
36}; 31};
37 32
38#endif /* __ASM_OPENRISC_SIGCONTEXT_H */ 33#endif /* __ASM_OPENRISC_SIGCONTEXT_H */
diff --git a/arch/openrisc/kernel/dma.c b/arch/openrisc/kernel/dma.c
index 968d3ee477e3..f1c8ee2895d0 100644
--- a/arch/openrisc/kernel/dma.c
+++ b/arch/openrisc/kernel/dma.c
@@ -154,6 +154,33 @@ void or1k_unmap_page(struct device *dev, dma_addr_t dma_handle,
154 /* Nothing special to do here... */ 154 /* Nothing special to do here... */
155} 155}
156 156
157int or1k_map_sg(struct device *dev, struct scatterlist *sg,
158 int nents, enum dma_data_direction dir,
159 struct dma_attrs *attrs)
160{
161 struct scatterlist *s;
162 int i;
163
164 for_each_sg(sg, s, nents, i) {
165 s->dma_address = or1k_map_page(dev, sg_page(s), s->offset,
166 s->length, dir, NULL);
167 }
168
169 return nents;
170}
171
172void or1k_unmap_sg(struct device *dev, struct scatterlist *sg,
173 int nents, enum dma_data_direction dir,
174 struct dma_attrs *attrs)
175{
176 struct scatterlist *s;
177 int i;
178
179 for_each_sg(sg, s, nents, i) {
180 or1k_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, NULL);
181 }
182}
183
157void or1k_sync_single_for_cpu(struct device *dev, 184void or1k_sync_single_for_cpu(struct device *dev,
158 dma_addr_t dma_handle, size_t size, 185 dma_addr_t dma_handle, size_t size,
159 enum dma_data_direction dir) 186 enum dma_data_direction dir)
@@ -187,5 +214,4 @@ static int __init dma_init(void)
187 214
188 return 0; 215 return 0;
189} 216}
190
191fs_initcall(dma_init); 217fs_initcall(dma_init);
diff --git a/arch/openrisc/kernel/signal.c b/arch/openrisc/kernel/signal.c
index 5f759c76834e..95207ab0c99e 100644
--- a/arch/openrisc/kernel/signal.c
+++ b/arch/openrisc/kernel/signal.c
@@ -52,31 +52,25 @@ struct rt_sigframe {
52static int restore_sigcontext(struct pt_regs *regs, struct sigcontext *sc) 52static int restore_sigcontext(struct pt_regs *regs, struct sigcontext *sc)
53{ 53{
54 unsigned int err = 0; 54 unsigned int err = 0;
55 unsigned long old_usp;
56 55
57 /* Alwys make any pending restarted system call return -EINTR */ 56 /* Alwys make any pending restarted system call return -EINTR */
58 current_thread_info()->restart_block.fn = do_no_restart_syscall; 57 current_thread_info()->restart_block.fn = do_no_restart_syscall;
59 58
60 /* restore the regs from &sc->regs (same as sc, since regs is first) 59 /*
60 * Restore the regs from &sc->regs.
61 * (sc is already checked for VERIFY_READ since the sigframe was 61 * (sc is already checked for VERIFY_READ since the sigframe was
62 * checked in sys_sigreturn previously) 62 * checked in sys_sigreturn previously)
63 */ 63 */
64 64 if (__copy_from_user(regs, sc->regs.gpr, 32 * sizeof(unsigned long)))
65 if (__copy_from_user(regs, sc, sizeof(struct pt_regs))) 65 goto badframe;
66 if (__copy_from_user(&regs->pc, &sc->regs.pc, sizeof(unsigned long)))
67 goto badframe;
68 if (__copy_from_user(&regs->sr, &sc->regs.sr, sizeof(unsigned long)))
66 goto badframe; 69 goto badframe;
67 70
68 /* make sure the SM-bit is cleared so user-mode cannot fool us */ 71 /* make sure the SM-bit is cleared so user-mode cannot fool us */
69 regs->sr &= ~SPR_SR_SM; 72 regs->sr &= ~SPR_SR_SM;
70 73
71 /* restore the old USP as it was before we stacked the sc etc.
72 * (we cannot just pop the sigcontext since we aligned the sp and
73 * stuff after pushing it)
74 */
75
76 err |= __get_user(old_usp, &sc->usp);
77
78 regs->sp = old_usp;
79
80 /* TODO: the other ports use regs->orig_XX to disable syscall checks 74 /* TODO: the other ports use regs->orig_XX to disable syscall checks
81 * after this completes, but we don't use that mechanism. maybe we can 75 * after this completes, but we don't use that mechanism. maybe we can
82 * use it now ? 76 * use it now ?
@@ -137,18 +131,17 @@ static int setup_sigcontext(struct sigcontext *sc, struct pt_regs *regs,
137 unsigned long mask) 131 unsigned long mask)
138{ 132{
139 int err = 0; 133 int err = 0;
140 unsigned long usp = regs->sp;
141 134
142 /* copy the regs. they are first in sc so we can use sc directly */ 135 /* copy the regs */
143 136
144 err |= __copy_to_user(sc, regs, sizeof(struct pt_regs)); 137 err |= __copy_to_user(sc->regs.gpr, regs, 32 * sizeof(unsigned long));
138 err |= __copy_to_user(&sc->regs.pc, &regs->pc, sizeof(unsigned long));
139 err |= __copy_to_user(&sc->regs.sr, &regs->sr, sizeof(unsigned long));
145 140
146 /* then some other stuff */ 141 /* then some other stuff */
147 142
148 err |= __put_user(mask, &sc->oldmask); 143 err |= __put_user(mask, &sc->oldmask);
149 144
150 err |= __put_user(usp, &sc->usp);
151
152 return err; 145 return err;
153} 146}
154 147
diff --git a/arch/parisc/kernel/syscall_table.S b/arch/parisc/kernel/syscall_table.S
index e66366fd2abc..3735abd7f8f6 100644
--- a/arch/parisc/kernel/syscall_table.S
+++ b/arch/parisc/kernel/syscall_table.S
@@ -259,7 +259,7 @@
259 ENTRY_SAME(ni_syscall) /* query_module */ 259 ENTRY_SAME(ni_syscall) /* query_module */
260 ENTRY_SAME(poll) 260 ENTRY_SAME(poll)
261 /* structs contain pointers and an in_addr... */ 261 /* structs contain pointers and an in_addr... */
262 ENTRY_COMP(nfsservctl) 262 ENTRY_SAME(ni_syscall) /* was nfsservctl */
263 ENTRY_SAME(setresgid) /* 170 */ 263 ENTRY_SAME(setresgid) /* 170 */
264 ENTRY_SAME(getresgid) 264 ENTRY_SAME(getresgid)
265 ENTRY_SAME(prctl) 265 ENTRY_SAME(prctl)
diff --git a/arch/powerpc/boot/dts/p1023rds.dts b/arch/powerpc/boot/dts/p1023rds.dts
index bfa96aa8f2ca..d9b776740a67 100644
--- a/arch/powerpc/boot/dts/p1023rds.dts
+++ b/arch/powerpc/boot/dts/p1023rds.dts
@@ -387,7 +387,7 @@
387 #size-cells = <1>; 387 #size-cells = <1>;
388 compatible = "cfi-flash"; 388 compatible = "cfi-flash";
389 reg = <0x0 0x0 0x02000000>; 389 reg = <0x0 0x0 0x02000000>;
390 bank-width = <1>; 390 bank-width = <2>;
391 device-width = <1>; 391 device-width = <1>;
392 partition@0 { 392 partition@0 {
393 label = "ramdisk"; 393 label = "ramdisk";
diff --git a/arch/powerpc/configs/85xx/p1023rds_defconfig b/arch/powerpc/configs/85xx/p1023rds_defconfig
index 980ff8f61fd4..3ff5a81c709f 100644
--- a/arch/powerpc/configs/85xx/p1023rds_defconfig
+++ b/arch/powerpc/configs/85xx/p1023rds_defconfig
@@ -171,3 +171,4 @@ CONFIG_CRYPTO_SHA256=y
171CONFIG_CRYPTO_SHA512=y 171CONFIG_CRYPTO_SHA512=y
172CONFIG_CRYPTO_AES=y 172CONFIG_CRYPTO_AES=y
173# CONFIG_CRYPTO_ANSI_CPRNG is not set 173# CONFIG_CRYPTO_ANSI_CPRNG is not set
174CONFIG_CRYPTO_DEV_FSL_CAAM=y
diff --git a/arch/powerpc/configs/corenet32_smp_defconfig b/arch/powerpc/configs/corenet32_smp_defconfig
index 10562a5c65b9..4311d02a3bfd 100644
--- a/arch/powerpc/configs/corenet32_smp_defconfig
+++ b/arch/powerpc/configs/corenet32_smp_defconfig
@@ -185,3 +185,4 @@ CONFIG_CRYPTO_SHA256=y
185CONFIG_CRYPTO_SHA512=y 185CONFIG_CRYPTO_SHA512=y
186CONFIG_CRYPTO_AES=y 186CONFIG_CRYPTO_AES=y
187# CONFIG_CRYPTO_ANSI_CPRNG is not set 187# CONFIG_CRYPTO_ANSI_CPRNG is not set
188CONFIG_CRYPTO_DEV_FSL_CAAM=y
diff --git a/arch/powerpc/configs/corenet64_smp_defconfig b/arch/powerpc/configs/corenet64_smp_defconfig
index d32283555b53..c92c204a204b 100644
--- a/arch/powerpc/configs/corenet64_smp_defconfig
+++ b/arch/powerpc/configs/corenet64_smp_defconfig
@@ -100,5 +100,8 @@ CONFIG_DEBUG_INFO=y
100CONFIG_SYSCTL_SYSCALL_CHECK=y 100CONFIG_SYSCTL_SYSCALL_CHECK=y
101CONFIG_VIRQ_DEBUG=y 101CONFIG_VIRQ_DEBUG=y
102CONFIG_CRYPTO_PCBC=m 102CONFIG_CRYPTO_PCBC=m
103CONFIG_CRYPTO_SHA256=y
104CONFIG_CRYPTO_SHA512=y
105CONFIG_CRYPTO_AES=y
103# CONFIG_CRYPTO_ANSI_CPRNG is not set 106# CONFIG_CRYPTO_ANSI_CPRNG is not set
104CONFIG_CRYPTO_DEV_TALITOS=y 107CONFIG_CRYPTO_DEV_FSL_CAAM=y
diff --git a/arch/powerpc/configs/mpc85xx_defconfig b/arch/powerpc/configs/mpc85xx_defconfig
index fcd85d2c72dc..a3467bfb7671 100644
--- a/arch/powerpc/configs/mpc85xx_defconfig
+++ b/arch/powerpc/configs/mpc85xx_defconfig
@@ -139,6 +139,7 @@ CONFIG_SND=y
139CONFIG_SND_INTEL8X0=y 139CONFIG_SND_INTEL8X0=y
140# CONFIG_SND_PPC is not set 140# CONFIG_SND_PPC is not set
141# CONFIG_SND_USB is not set 141# CONFIG_SND_USB is not set
142CONFIG_SND_SOC=y
142CONFIG_HID_A4TECH=y 143CONFIG_HID_A4TECH=y
143CONFIG_HID_APPLE=y 144CONFIG_HID_APPLE=y
144CONFIG_HID_BELKIN=y 145CONFIG_HID_BELKIN=y
diff --git a/arch/powerpc/configs/mpc85xx_smp_defconfig b/arch/powerpc/configs/mpc85xx_smp_defconfig
index 908c941fc24c..9693f6ed3da0 100644
--- a/arch/powerpc/configs/mpc85xx_smp_defconfig
+++ b/arch/powerpc/configs/mpc85xx_smp_defconfig
@@ -140,6 +140,7 @@ CONFIG_SND=y
140CONFIG_SND_INTEL8X0=y 140CONFIG_SND_INTEL8X0=y
141# CONFIG_SND_PPC is not set 141# CONFIG_SND_PPC is not set
142# CONFIG_SND_USB is not set 142# CONFIG_SND_USB is not set
143CONFIG_SND_SOC=y
143CONFIG_HID_A4TECH=y 144CONFIG_HID_A4TECH=y
144CONFIG_HID_APPLE=y 145CONFIG_HID_APPLE=y
145CONFIG_HID_BELKIN=y 146CONFIG_HID_BELKIN=y
diff --git a/arch/powerpc/include/asm/systbl.h b/arch/powerpc/include/asm/systbl.h
index f6736b7da463..fa0d27a400de 100644
--- a/arch/powerpc/include/asm/systbl.h
+++ b/arch/powerpc/include/asm/systbl.h
@@ -171,7 +171,7 @@ SYSCALL_SPU(setresuid)
171SYSCALL_SPU(getresuid) 171SYSCALL_SPU(getresuid)
172SYSCALL(ni_syscall) 172SYSCALL(ni_syscall)
173SYSCALL_SPU(poll) 173SYSCALL_SPU(poll)
174COMPAT_SYS(nfsservctl) 174SYSCALL(ni_syscall)
175SYSCALL_SPU(setresgid) 175SYSCALL_SPU(setresgid)
176SYSCALL_SPU(getresgid) 176SYSCALL_SPU(getresgid)
177COMPAT_SYS_SPU(prctl) 177COMPAT_SYS_SPU(prctl)
diff --git a/arch/sh/include/asm/ptrace.h b/arch/sh/include/asm/ptrace.h
index b97baf81a87b..2d3679b2447f 100644
--- a/arch/sh/include/asm/ptrace.h
+++ b/arch/sh/include/asm/ptrace.h
@@ -123,7 +123,7 @@ static inline unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs,
123struct perf_event; 123struct perf_event;
124struct perf_sample_data; 124struct perf_sample_data;
125 125
126extern void ptrace_triggered(struct perf_event *bp, int nmi, 126extern void ptrace_triggered(struct perf_event *bp,
127 struct perf_sample_data *data, struct pt_regs *regs); 127 struct perf_sample_data *data, struct pt_regs *regs);
128 128
129#define task_pt_regs(task) \ 129#define task_pt_regs(task) \
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
index e915deafac89..05559295d2ca 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
@@ -15,6 +15,7 @@
15#include <linux/serial_sci.h> 15#include <linux/serial_sci.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/mm.h> 17#include <linux/mm.h>
18#include <linux/dma-mapping.h>
18#include <linux/sh_timer.h> 19#include <linux/sh_timer.h>
19#include <linux/sh_dma.h> 20#include <linux/sh_dma.h>
20 21
diff --git a/arch/sh/kernel/idle.c b/arch/sh/kernel/idle.c
index 32114e0941ae..db4ecd731a00 100644
--- a/arch/sh/kernel/idle.c
+++ b/arch/sh/kernel/idle.c
@@ -22,7 +22,7 @@
22#include <linux/atomic.h> 22#include <linux/atomic.h>
23#include <asm/smp.h> 23#include <asm/smp.h>
24 24
25static void (*pm_idle)(void); 25void (*pm_idle)(void);
26 26
27static int hlt_counter; 27static int hlt_counter;
28 28
diff --git a/arch/sh/kernel/traps_32.c b/arch/sh/kernel/traps_32.c
index d9006f8ffc14..7bbef95c9d1b 100644
--- a/arch/sh/kernel/traps_32.c
+++ b/arch/sh/kernel/traps_32.c
@@ -316,6 +316,35 @@ static int handle_unaligned_ins(insn_size_t instruction, struct pt_regs *regs,
316 break; 316 break;
317 } 317 }
318 break; 318 break;
319
320 case 9: /* mov.w @(disp,PC),Rn */
321 srcu = (unsigned char __user *)regs->pc;
322 srcu += 4;
323 srcu += (instruction & 0x00FF) << 1;
324 dst = (unsigned char *)rn;
325 *(unsigned long *)dst = 0;
326
327#if !defined(__LITTLE_ENDIAN__)
328 dst += 2;
329#endif
330
331 if (ma->from(dst, srcu, 2))
332 goto fetch_fault;
333 sign_extend(2, dst);
334 ret = 0;
335 break;
336
337 case 0xd: /* mov.l @(disp,PC),Rn */
338 srcu = (unsigned char __user *)(regs->pc & ~0x3);
339 srcu += 4;
340 srcu += (instruction & 0x00FF) << 2;
341 dst = (unsigned char *)rn;
342 *(unsigned long *)dst = 0;
343
344 if (ma->from(dst, srcu, 4))
345 goto fetch_fault;
346 ret = 0;
347 break;
319 } 348 }
320 return ret; 349 return ret;
321 350
@@ -466,6 +495,7 @@ int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs,
466 case 0x0500: /* mov.w @(disp,Rm),R0 */ 495 case 0x0500: /* mov.w @(disp,Rm),R0 */
467 goto simple; 496 goto simple;
468 case 0x0B00: /* bf lab - no delayslot*/ 497 case 0x0B00: /* bf lab - no delayslot*/
498 ret = 0;
469 break; 499 break;
470 case 0x0F00: /* bf/s lab */ 500 case 0x0F00: /* bf/s lab */
471 ret = handle_delayslot(regs, instruction, ma); 501 ret = handle_delayslot(regs, instruction, ma);
@@ -479,6 +509,7 @@ int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs,
479 } 509 }
480 break; 510 break;
481 case 0x0900: /* bt lab - no delayslot */ 511 case 0x0900: /* bt lab - no delayslot */
512 ret = 0;
482 break; 513 break;
483 case 0x0D00: /* bt/s lab */ 514 case 0x0D00: /* bt/s lab */
484 ret = handle_delayslot(regs, instruction, ma); 515 ret = handle_delayslot(regs, instruction, ma);
@@ -494,6 +525,9 @@ int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs,
494 } 525 }
495 break; 526 break;
496 527
528 case 0x9000: /* mov.w @(disp,Rm),Rn */
529 goto simple;
530
497 case 0xA000: /* bra label */ 531 case 0xA000: /* bra label */
498 ret = handle_delayslot(regs, instruction, ma); 532 ret = handle_delayslot(regs, instruction, ma);
499 if (ret==0) 533 if (ret==0)
@@ -507,6 +541,9 @@ int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs,
507 regs->pc += SH_PC_12BIT_OFFSET(instruction); 541 regs->pc += SH_PC_12BIT_OFFSET(instruction);
508 } 542 }
509 break; 543 break;
544
545 case 0xD000: /* mov.l @(disp,Rm),Rn */
546 goto simple;
510 } 547 }
511 return ret; 548 return ret;
512 549
diff --git a/arch/sparc/kernel/irq.h b/arch/sparc/kernel/irq.h
index 100b9c204e78..42851122bbd9 100644
--- a/arch/sparc/kernel/irq.h
+++ b/arch/sparc/kernel/irq.h
@@ -88,7 +88,7 @@ BTFIXUPDEF_CALL(void, set_irq_udt, int)
88#define set_irq_udt(cpu) BTFIXUP_CALL(set_irq_udt)(cpu) 88#define set_irq_udt(cpu) BTFIXUP_CALL(set_irq_udt)(cpu)
89 89
90/* All SUN4D IPIs are sent on this IRQ, may be shared with hard IRQs */ 90/* All SUN4D IPIs are sent on this IRQ, may be shared with hard IRQs */
91#define SUN4D_IPI_IRQ 14 91#define SUN4D_IPI_IRQ 13
92 92
93extern void sun4d_ipi_interrupt(void); 93extern void sun4d_ipi_interrupt(void);
94 94
diff --git a/arch/sparc/kernel/setup_64.c b/arch/sparc/kernel/setup_64.c
index 3e9daea1653d..3c5bb784214f 100644
--- a/arch/sparc/kernel/setup_64.c
+++ b/arch/sparc/kernel/setup_64.c
@@ -440,8 +440,14 @@ static void __init init_sparc64_elf_hwcap(void)
440 cap |= AV_SPARC_VIS; 440 cap |= AV_SPARC_VIS;
441 if (tlb_type == cheetah || tlb_type == cheetah_plus) 441 if (tlb_type == cheetah || tlb_type == cheetah_plus)
442 cap |= AV_SPARC_VIS | AV_SPARC_VIS2; 442 cap |= AV_SPARC_VIS | AV_SPARC_VIS2;
443 if (tlb_type == cheetah_plus) 443 if (tlb_type == cheetah_plus) {
444 cap |= AV_SPARC_POPC; 444 unsigned long impl, ver;
445
446 __asm__ __volatile__("rdpr %%ver, %0" : "=r" (ver));
447 impl = ((ver >> 32) & 0xffff);
448 if (impl == PANTHER_IMPL)
449 cap |= AV_SPARC_POPC;
450 }
445 if (tlb_type == hypervisor) { 451 if (tlb_type == hypervisor) {
446 if (sun4v_chip_type == SUN4V_CHIP_NIAGARA1) 452 if (sun4v_chip_type == SUN4V_CHIP_NIAGARA1)
447 cap |= AV_SPARC_ASI_BLK_INIT; 453 cap |= AV_SPARC_ASI_BLK_INIT;
diff --git a/arch/sparc/kernel/systbls_64.S b/arch/sparc/kernel/systbls_64.S
index c9296ab0b1f4..edbec45d4688 100644
--- a/arch/sparc/kernel/systbls_64.S
+++ b/arch/sparc/kernel/systbls_64.S
@@ -68,7 +68,7 @@ sys_call_table32:
68 .word compat_sys_fstatfs64, sys_llseek, sys_mlock, sys_munlock, sys32_mlockall 68 .word compat_sys_fstatfs64, sys_llseek, sys_mlock, sys_munlock, sys32_mlockall
69/*240*/ .word sys_munlockall, sys32_sched_setparam, sys32_sched_getparam, sys32_sched_setscheduler, sys32_sched_getscheduler 69/*240*/ .word sys_munlockall, sys32_sched_setparam, sys32_sched_getparam, sys32_sched_setscheduler, sys32_sched_getscheduler
70 .word sys_sched_yield, sys32_sched_get_priority_max, sys32_sched_get_priority_min, sys32_sched_rr_get_interval, compat_sys_nanosleep 70 .word sys_sched_yield, sys32_sched_get_priority_max, sys32_sched_get_priority_min, sys32_sched_rr_get_interval, compat_sys_nanosleep
71/*250*/ .word sys_mremap, compat_sys_sysctl, sys32_getsid, sys_fdatasync, sys32_nfsservctl 71/*250*/ .word sys_mremap, compat_sys_sysctl, sys32_getsid, sys_fdatasync, sys_nis_syscall
72 .word sys32_sync_file_range, compat_sys_clock_settime, compat_sys_clock_gettime, compat_sys_clock_getres, sys32_clock_nanosleep 72 .word sys32_sync_file_range, compat_sys_clock_settime, compat_sys_clock_gettime, compat_sys_clock_getres, sys32_clock_nanosleep
73/*260*/ .word compat_sys_sched_getaffinity, compat_sys_sched_setaffinity, sys32_timer_settime, compat_sys_timer_gettime, sys_timer_getoverrun 73/*260*/ .word compat_sys_sched_getaffinity, compat_sys_sched_setaffinity, sys32_timer_settime, compat_sys_timer_gettime, sys_timer_getoverrun
74 .word sys_timer_delete, compat_sys_timer_create, sys_ni_syscall, compat_sys_io_setup, sys_io_destroy 74 .word sys_timer_delete, compat_sys_timer_create, sys_ni_syscall, compat_sys_io_setup, sys_io_destroy
diff --git a/arch/x86/include/asm/pvclock.h b/arch/x86/include/asm/pvclock.h
index a518c0a45044..c59cc97fe6c1 100644
--- a/arch/x86/include/asm/pvclock.h
+++ b/arch/x86/include/asm/pvclock.h
@@ -44,7 +44,7 @@ static inline u64 pvclock_scale_delta(u64 delta, u32 mul_frac, int shift)
44 : "a" ((u32)delta), "1" ((u32)(delta >> 32)), "2" (mul_frac) ); 44 : "a" ((u32)delta), "1" ((u32)(delta >> 32)), "2" (mul_frac) );
45#elif defined(__x86_64__) 45#elif defined(__x86_64__)
46 __asm__ ( 46 __asm__ (
47 "mul %[mul_frac] ; shrd $32, %[hi], %[lo]" 47 "mulq %[mul_frac] ; shrd $32, %[hi], %[lo]"
48 : [lo]"=a"(product), 48 : [lo]"=a"(product),
49 [hi]"=d"(tmp) 49 [hi]"=d"(tmp)
50 : "0"(delta), 50 : "0"(delta),
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index 4ee3abf20ed6..cfa62ec090ec 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -1900,6 +1900,9 @@ perf_callchain_user(struct perf_callchain_entry *entry, struct pt_regs *regs)
1900 1900
1901 perf_callchain_store(entry, regs->ip); 1901 perf_callchain_store(entry, regs->ip);
1902 1902
1903 if (!current->mm)
1904 return;
1905
1903 if (perf_callchain_user32(regs, entry)) 1906 if (perf_callchain_user32(regs, entry))
1904 return; 1907 return;
1905 1908
diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c
index c95330267f08..039d91315bc5 100644
--- a/arch/x86/pci/acpi.c
+++ b/arch/x86/pci/acpi.c
@@ -365,8 +365,13 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root)
365 */ 365 */
366 if (bus) { 366 if (bus) {
367 struct pci_bus *child; 367 struct pci_bus *child;
368 list_for_each_entry(child, &bus->children, node) 368 list_for_each_entry(child, &bus->children, node) {
369 pcie_bus_configure_settings(child, child->self->pcie_mpss); 369 struct pci_dev *self = child->self;
370 if (!self)
371 continue;
372
373 pcie_bus_configure_settings(child, self->pcie_mpss);
374 }
370 } 375 }
371 376
372 if (!bus) 377 if (!bus)
diff --git a/arch/x86/xen/setup.c b/arch/x86/xen/setup.c
index df118a825f39..c3b8d440873c 100644
--- a/arch/x86/xen/setup.c
+++ b/arch/x86/xen/setup.c
@@ -184,6 +184,19 @@ static unsigned long __init xen_set_identity(const struct e820entry *list,
184 PFN_UP(start_pci), PFN_DOWN(last)); 184 PFN_UP(start_pci), PFN_DOWN(last));
185 return identity; 185 return identity;
186} 186}
187
188static unsigned long __init xen_get_max_pages(void)
189{
190 unsigned long max_pages = MAX_DOMAIN_PAGES;
191 domid_t domid = DOMID_SELF;
192 int ret;
193
194 ret = HYPERVISOR_memory_op(XENMEM_maximum_reservation, &domid);
195 if (ret > 0)
196 max_pages = ret;
197 return min(max_pages, MAX_DOMAIN_PAGES);
198}
199
187/** 200/**
188 * machine_specific_memory_setup - Hook for machine specific memory setup. 201 * machine_specific_memory_setup - Hook for machine specific memory setup.
189 **/ 202 **/
@@ -292,6 +305,12 @@ char * __init xen_memory_setup(void)
292 305
293 sanitize_e820_map(e820.map, ARRAY_SIZE(e820.map), &e820.nr_map); 306 sanitize_e820_map(e820.map, ARRAY_SIZE(e820.map), &e820.nr_map);
294 307
308 extra_limit = xen_get_max_pages();
309 if (extra_limit >= max_pfn)
310 extra_pages = extra_limit - max_pfn;
311 else
312 extra_pages = 0;
313
295 extra_pages += xen_return_unused_memory(xen_start_info->nr_pages, &e820); 314 extra_pages += xen_return_unused_memory(xen_start_info->nr_pages, &e820);
296 315
297 /* 316 /*
diff --git a/arch/x86/xen/smp.c b/arch/x86/xen/smp.c
index e79dbb95482b..d4fc6d454f8d 100644
--- a/arch/x86/xen/smp.c
+++ b/arch/x86/xen/smp.c
@@ -32,6 +32,7 @@
32#include <xen/page.h> 32#include <xen/page.h>
33#include <xen/events.h> 33#include <xen/events.h>
34 34
35#include <xen/hvc-console.h>
35#include "xen-ops.h" 36#include "xen-ops.h"
36#include "mmu.h" 37#include "mmu.h"
37 38
@@ -207,6 +208,15 @@ static void __init xen_smp_prepare_cpus(unsigned int max_cpus)
207 unsigned cpu; 208 unsigned cpu;
208 unsigned int i; 209 unsigned int i;
209 210
211 if (skip_ioapic_setup) {
212 char *m = (max_cpus == 0) ?
213 "The nosmp parameter is incompatible with Xen; " \
214 "use Xen dom0_max_vcpus=1 parameter" :
215 "The noapic parameter is incompatible with Xen";
216
217 xen_raw_printk(m);
218 panic(m);
219 }
210 xen_init_lock_cpu(0); 220 xen_init_lock_cpu(0);
211 221
212 smp_store_cpu_info(0); 222 smp_store_cpu_info(0);
diff --git a/arch/x86/xen/xen-asm_32.S b/arch/x86/xen/xen-asm_32.S
index 22a2093b5862..b040b0e518ca 100644
--- a/arch/x86/xen/xen-asm_32.S
+++ b/arch/x86/xen/xen-asm_32.S
@@ -113,11 +113,13 @@ xen_iret_start_crit:
113 113
114 /* 114 /*
115 * If there's something pending, mask events again so we can 115 * If there's something pending, mask events again so we can
116 * jump back into xen_hypervisor_callback 116 * jump back into xen_hypervisor_callback. Otherwise do not
117 * touch XEN_vcpu_info_mask.
117 */ 118 */
118 sete XEN_vcpu_info_mask(%eax) 119 jne 1f
120 movb $1, XEN_vcpu_info_mask(%eax)
119 121
120 popl %eax 1221: popl %eax
121 123
122 /* 124 /*
123 * From this point on the registers are restored and the stack 125 * From this point on the registers are restored and the stack