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authorLei Wen <leiwen@marvell.com>2010-08-17 01:50:23 -0400
committerDavid Woodhouse <David.Woodhouse@intel.com>2010-10-24 18:38:47 -0400
commitc1f82478c535f1de9fecf3cafa82014f312d5d4e (patch)
treed3713c7b47f472bfea939305b2a67ec5198f2768 /arch
parent13ed7aed45e370f30a746e49e674144297a92e16 (diff)
mtd: pxa3xx_nand: condense the flash definition
Adding a new flash definition would need less code. Keep the platform passing flash definition method. If one flash is both defined in platform data and builtin table, driver would select the one from platform data first. By this way, platform could select the timing most suit for itself, not need to follow the common settings. Signed-off-by: Lei Wen <leiwen@marvell.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Acked-by: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/plat-pxa/include/plat/pxa3xx_nand.h18
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/arm/plat-pxa/include/plat/pxa3xx_nand.h b/arch/arm/plat-pxa/include/plat/pxa3xx_nand.h
index 3478eae32d8a..01a8448e471c 100644
--- a/arch/arm/plat-pxa/include/plat/pxa3xx_nand.h
+++ b/arch/arm/plat-pxa/include/plat/pxa3xx_nand.h
@@ -30,15 +30,15 @@ struct pxa3xx_nand_cmdset {
30}; 30};
31 31
32struct pxa3xx_nand_flash { 32struct pxa3xx_nand_flash {
33 const struct pxa3xx_nand_timing *timing; /* NAND Flash timing */ 33 uint32_t chip_id;
34 const struct pxa3xx_nand_cmdset *cmdset; 34 unsigned int page_per_block; /* Pages per block (PG_PER_BLK) */
35 35 unsigned int page_size; /* Page size in bytes (PAGE_SZ) */
36 uint32_t page_per_block;/* Pages per block (PG_PER_BLK) */ 36 unsigned int flash_width; /* Width of Flash memory (DWIDTH_M) */
37 uint32_t page_size; /* Page size in bytes (PAGE_SZ) */ 37 unsigned int dfc_width; /* Width of flash controller(DWIDTH_C) */
38 uint32_t flash_width; /* Width of Flash memory (DWIDTH_M) */ 38 unsigned int num_blocks; /* Number of physical blocks in Flash */
39 uint32_t dfc_width; /* Width of flash controller(DWIDTH_C) */ 39
40 uint32_t num_blocks; /* Number of physical blocks in Flash */ 40 struct pxa3xx_nand_cmdset *cmdset; /* NAND command set */
41 uint32_t chip_id; 41 struct pxa3xx_nand_timing *timing; /* NAND Flash timing */
42}; 42};
43 43
44struct pxa3xx_nand_platform_data { 44struct pxa3xx_nand_platform_data {