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authorAlan Cox <alan@lxorguk.ukuu.org.uk>2010-11-15 12:31:19 -0500
committerThomas Gleixner <tglx@linutronix.de>2010-11-17 07:27:44 -0500
commitb9fc71f47dc060c588e5099638242fad44eeecbc (patch)
tree31f269cb4a28d3efdd03ebcf776395adccc3cec4 /arch
parent37bc9f5078c62bfa73edeb0053edceb3ed5e46a4 (diff)
x86, mrst: The shutdown for MRST requires the SCU IPC mechanism
Fix the build failure reported by Randy. Reported-by: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Alan Cox <alan@linux.intel.com> LKML-Reference: <20101115173110.6877.83958.stgit@localhost.localdomain> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index e5510cf0666f..6e877b90ed2d 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -399,6 +399,7 @@ config X86_MRST
399 select APB_TIMER 399 select APB_TIMER
400 select I2C 400 select I2C
401 select SPI 401 select SPI
402 select INTEL_SCU_IPC
402 ---help--- 403 ---help---
403 Moorestown is Intel's Low Power Intel Architecture (LPIA) based Moblin 404 Moorestown is Intel's Low Power Intel Architecture (LPIA) based Moblin
404 Internet Device(MID) platform. Moorestown consists of two chips: 405 Internet Device(MID) platform. Moorestown consists of two chips: