aboutsummaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
authorKyungmin Park <kyungmin.park@samsung.com>2009-11-17 02:41:11 -0500
committerBen Dooks <ben-linux@fluff.org>2009-11-30 20:33:12 -0500
commitb0cc3031ffe1800aa6fe8ab0f55a75939bb265b7 (patch)
tree45a35ee7169cc08f6bd3cbe10d68f01a3673166d /arch
parentcf383678242eacd6f92a48314922598ed3408355 (diff)
ARM: S5PC1XX: registers rename
S5PC110 and S5PC100 register maps differs in many places, rename all defined registers to be S5PC100 specific. PA_SYS register known from S3C64XX series has been renamed to more adequate PA_CLK. Also system map has been also updated to cover more integrated peripherals. Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-s5pc100/include/mach/map.h87
-rw-r--r--arch/arm/mach-s5pc100/mach-smdkc100.c2
2 files changed, 82 insertions, 7 deletions
diff --git a/arch/arm/mach-s5pc100/include/mach/map.h b/arch/arm/mach-s5pc100/include/mach/map.h
index 9e9f39130b2c..4681ebe8bef6 100644
--- a/arch/arm/mach-s5pc100/include/mach/map.h
+++ b/arch/arm/mach-s5pc100/include/mach/map.h
@@ -17,6 +17,19 @@
17 17
18#include <plat/map-base.h> 18#include <plat/map-base.h>
19 19
20/*
21 * map-base.h has already defined virtual memory address
22 * S3C_VA_IRQ S3C_ADDR(0x00000000) irq controller(s)
23 * S3C_VA_SYS S3C_ADDR(0x00100000) system control
24 * S3C_VA_MEM S3C_ADDR(0x00200000) system control (not used)
25 * S3C_VA_TIMER S3C_ADDR(0x00300000) timer block
26 * S3C_VA_WATCHDOG S3C_ADDR(0x00400000) watchdog
27 * S3C_VA_UART S3C_ADDR(0x01000000) UART
28 *
29 * S5PC100 specific virtual memory address can be defined here
30 * S5PC1XX_VA_GPIO S3C_ADDR(0x00500000) GPIO
31 *
32 */
20 33
21/* Chip ID */ 34/* Chip ID */
22#define S5PC100_PA_CHIPID (0xE0000000) 35#define S5PC100_PA_CHIPID (0xE0000000)
@@ -24,13 +37,20 @@
24#define S5PC1XX_VA_CHIPID S3C_VA_SYS 37#define S5PC1XX_VA_CHIPID S3C_VA_SYS
25 38
26/* System */ 39/* System */
27#define S5PC100_PA_SYS (0xE0100000) 40#define S5PC100_PA_CLK (0xE0100000)
28#define S5PC100_PA_CLK (S5PC100_PA_SYS + 0x0) 41#define S5PC100_PA_CLK_OTHER (0xE0200000)
29#define S5PC100_PA_PWR (S5PC100_PA_SYS + 0x8000) 42#define S5PC100_PA_PWR (0xE0108000)
30#define S5PC1XX_PA_CLK S5PC100_PA_CLK 43#define S5PC1XX_PA_CLK S5PC100_PA_CLK
31#define S5PC1XX_PA_PWR S5PC100_PA_PWR 44#define S5PC1XX_PA_PWR S5PC100_PA_PWR
45#define S5PC1XX_PA_CLK_OTHER S5PC100_PA_CLK_OTHER
32#define S5PC1XX_VA_CLK (S3C_VA_SYS + 0x10000) 46#define S5PC1XX_VA_CLK (S3C_VA_SYS + 0x10000)
33#define S5PC1XX_VA_PWR (S3C_VA_SYS + 0x20000) 47#define S5PC1XX_VA_PWR (S3C_VA_SYS + 0x20000)
48#define S5PC1XX_VA_CLK_OTHER (S3C_VA_SYS + 0x30000)
49
50/* GPIO */
51#define S5PC100_PA_GPIO (0xE0300000)
52#define S5PC1XX_PA_GPIO S5PC100_PA_GPIO
53#define S5PC1XX_VA_GPIO S3C_ADDR(0x00500000)
34 54
35/* Interrupt */ 55/* Interrupt */
36#define S5PC100_PA_VIC (0xE4000000) 56#define S5PC100_PA_VIC (0xE4000000)
@@ -40,23 +60,64 @@
40#define S5PC1XX_PA_VIC(x) (S5PC100_PA_VIC + ((x) * S5PC100_PA_VIC_OFFSET)) 60#define S5PC1XX_PA_VIC(x) (S5PC100_PA_VIC + ((x) * S5PC100_PA_VIC_OFFSET))
41#define S5PC1XX_VA_VIC(x) (S5PC100_VA_VIC + ((x) * S5PC100_VA_VIC_OFFSET)) 61#define S5PC1XX_VA_VIC(x) (S5PC100_VA_VIC + ((x) * S5PC100_VA_VIC_OFFSET))
42 62
63/* DMA */
64#define S5PC100_PA_MDMA (0xE8100000)
65#define S5PC100_PA_PDMA0 (0xE9000000)
66#define S5PC100_PA_PDMA1 (0xE9200000)
67
43/* Timer */ 68/* Timer */
44#define S5PC100_PA_TIMER (0xEA000000) 69#define S5PC100_PA_TIMER (0xEA000000)
45#define S5PC1XX_PA_TIMER S5PC100_PA_TIMER 70#define S5PC1XX_PA_TIMER S5PC100_PA_TIMER
46#define S5PC1XX_VA_TIMER S3C_VA_TIMER 71#define S5PC1XX_VA_TIMER S3C_VA_TIMER
47 72
73/* RTC */
74#define S5PC100_PA_RTC (0xEA300000)
75
48/* UART */ 76/* UART */
49#define S5PC100_PA_UART (0xEC000000) 77#define S5PC100_PA_UART (0xEC000000)
50#define S5PC1XX_PA_UART S5PC100_PA_UART 78#define S5PC1XX_PA_UART S5PC100_PA_UART
51#define S5PC1XX_VA_UART S3C_VA_UART 79#define S5PC1XX_VA_UART S3C_VA_UART
52 80
53/* IIC */ 81/* I2C */
54#define S5PC100_PA_IIC (0xEC100000) 82#define S5PC100_PA_I2C (0xEC100000)
83#define S5PC100_PA_I2C1 (0xEC200000)
84
85/* USB HS OTG */
86#define S5PC100_PA_USB_HSOTG (0xED200000)
87#define S5PC100_PA_USB_HSPHY (0xED300000)
88
89/* SD/MMC */
90#define S5PC100_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000))
91#define S5PC100_PA_HSMMC0 S5PC100_PA_HSMMC(0)
92#define S5PC100_PA_HSMMC1 S5PC100_PA_HSMMC(1)
93#define S5PC100_PA_HSMMC2 S5PC100_PA_HSMMC(2)
94
95/* LCD */
96#define S5PC100_PA_FB (0xEE000000)
97
98/* Multimedia */
99#define S5PC100_PA_G2D (0xEE800000)
100#define S5PC100_PA_JPEG (0xEE500000)
101#define S5PC100_PA_ROTATOR (0xEE100000)
102#define S5PC100_PA_G3D (0xEF000000)
103
104/* I2S */
105#define S5PC100_PA_I2S0 (0xF2000000)
106#define S5PC100_PA_I2S1 (0xF2100000)
107#define S5PC100_PA_I2S2 (0xF2200000)
108
109/* KEYPAD */
110#define S5PC100_PA_KEYPAD (0xF3100000)
111
112/* ADC & TouchScreen */
113#define S5PC100_PA_TSADC (0xF3000000)
55 114
56/* ETC */ 115/* ETC */
57#define S5PC100_PA_SDRAM (0x20000000) 116#define S5PC100_PA_SDRAM (0x20000000)
117#define S5PC1XX_PA_SDRAM S5PC100_PA_SDRAM
58 118
59/* compatibility defines. */ 119/* compatibility defines. */
120#define S3C_PA_RTC S5PC100_PA_RTC
60#define S3C_PA_UART S5PC100_PA_UART 121#define S3C_PA_UART S5PC100_PA_UART
61#define S3C_PA_UART0 (S5PC100_PA_UART + 0x0) 122#define S3C_PA_UART0 (S5PC100_PA_UART + 0x0)
62#define S3C_PA_UART1 (S5PC100_PA_UART + 0x400) 123#define S3C_PA_UART1 (S5PC100_PA_UART + 0x400)
@@ -67,9 +128,23 @@
67#define S3C_VA_UART2 (S3C_VA_UART + 0x800) 128#define S3C_VA_UART2 (S3C_VA_UART + 0x800)
68#define S3C_VA_UART3 (S3C_VA_UART + 0xC00) 129#define S3C_VA_UART3 (S3C_VA_UART + 0xC00)
69#define S3C_UART_OFFSET 0x400 130#define S3C_UART_OFFSET 0x400
131#define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
132#define S3C_PA_FB S5PC100_PA_FB
133#define S3C_PA_G2D S5PC100_PA_G2D
134#define S3C_PA_G3D S5PC100_PA_G3D
135#define S3C_PA_JPEG S5PC100_PA_JPEG
136#define S3C_PA_ROTATOR S5PC100_PA_ROTATOR
70#define S3C_VA_VIC0 (S3C_VA_IRQ + 0x0) 137#define S3C_VA_VIC0 (S3C_VA_IRQ + 0x0)
71#define S3C_VA_VIC1 (S3C_VA_IRQ + 0x10000) 138#define S3C_VA_VIC1 (S3C_VA_IRQ + 0x10000)
72#define S3C_VA_VIC2 (S3C_VA_IRQ + 0x20000) 139#define S3C_VA_VIC2 (S3C_VA_IRQ + 0x20000)
73#define S3C_PA_IIC S5PC100_PA_IIC 140#define S3C_PA_IIC S5PC100_PA_I2C
141#define S3C_PA_IIC1 S5PC100_PA_I2C1
142#define S3C_PA_USB_HSOTG S5PC100_PA_USB_HSOTG
143#define S3C_PA_USB_HSPHY S5PC100_PA_USB_HSPHY
144#define S3C_PA_HSMMC0 S5PC100_PA_HSMMC0
145#define S3C_PA_HSMMC1 S5PC100_PA_HSMMC1
146#define S3C_PA_HSMMC2 S5PC100_PA_HSMMC2
147#define S3C_PA_KEYPAD S5PC100_PA_KEYPAD
148#define S3C_PA_TSADC S5PC100_PA_TSADC
74 149
75#endif /* __ASM_ARCH_C100_MAP_H */ 150#endif /* __ASM_ARCH_C100_MAP_H */
diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c
index 214093cd7632..daf6a2bc6b61 100644
--- a/arch/arm/mach-s5pc100/mach-smdkc100.c
+++ b/arch/arm/mach-s5pc100/mach-smdkc100.c
@@ -92,7 +92,7 @@ static void __init smdkc100_machine_init(void)
92 92
93MACHINE_START(SMDKC100, "SMDKC100") 93MACHINE_START(SMDKC100, "SMDKC100")
94 /* Maintainer: Byungho Min <bhmin@samsung.com> */ 94 /* Maintainer: Byungho Min <bhmin@samsung.com> */
95 .phys_io = S5PC1XX_PA_UART & 0xfff00000, 95 .phys_io = S5PC100_PA_UART & 0xfff00000,
96 .io_pg_offst = (((u32)S5PC1XX_VA_UART) >> 18) & 0xfffc, 96 .io_pg_offst = (((u32)S5PC1XX_VA_UART) >> 18) & 0xfffc,
97 .boot_params = S5PC100_PA_SDRAM + 0x100, 97 .boot_params = S5PC100_PA_SDRAM + 0x100,
98 98