diff options
author | Will Deacon <will.deacon@arm.com> | 2012-08-24 10:21:52 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-08-25 04:15:57 -0400 |
commit | ae3790b8a916429be5fa61da95992929e6b34d64 (patch) | |
tree | c3fb5e0b4ef1221412a50e34999e56ea6af38df7 /arch | |
parent | dbece45894d3ab1baac15a96dc4e1e8e23f64a93 (diff) |
ARM: 7502/1: contextidr: avoid using bfi instruction during notifier
The bfi instruction is not available on ARMv6, so instead use an and/orr
sequence in the contextidr_notifier. This gets rid of the assembler
error:
Assembler messages:
Error: selected processor does not support ARM mode `bfi r3,r2,#0,#8'
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mm/context.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm/mm/context.c b/arch/arm/mm/context.c index 119bc52ab93e..4e07eec1270d 100644 --- a/arch/arm/mm/context.c +++ b/arch/arm/mm/context.c | |||
@@ -63,10 +63,11 @@ static int contextidr_notifier(struct notifier_block *unused, unsigned long cmd, | |||
63 | pid = task_pid_nr(thread->task) << ASID_BITS; | 63 | pid = task_pid_nr(thread->task) << ASID_BITS; |
64 | asm volatile( | 64 | asm volatile( |
65 | " mrc p15, 0, %0, c13, c0, 1\n" | 65 | " mrc p15, 0, %0, c13, c0, 1\n" |
66 | " bfi %1, %0, #0, %2\n" | 66 | " and %0, %0, %2\n" |
67 | " mcr p15, 0, %1, c13, c0, 1\n" | 67 | " orr %0, %0, %1\n" |
68 | " mcr p15, 0, %0, c13, c0, 1\n" | ||
68 | : "=r" (contextidr), "+r" (pid) | 69 | : "=r" (contextidr), "+r" (pid) |
69 | : "I" (ASID_BITS)); | 70 | : "I" (~ASID_MASK)); |
70 | isb(); | 71 | isb(); |
71 | 72 | ||
72 | return NOTIFY_OK; | 73 | return NOTIFY_OK; |