diff options
author | Magnus Damm <damm@opensource.se> | 2014-01-15 02:43:08 -0500 |
---|---|---|
committer | Simon Horman <horms+renesas@verge.net.au> | 2014-02-23 18:55:46 -0500 |
commit | a6557eb795edcf7832b5278a11842c4ca302f4af (patch) | |
tree | f46f65b333815c8fe013575496bb229b57161668 /arch | |
parent | 4a51856b42672cfcb7d6fbab22dcf2caba2be5ab (diff) |
ARM: shmobile: Break out R-Car SYSC PM code
Break out the R-Car SYSC power management code from
the r8a7779 SoC code. With this new shared R-Car SYSC
code base it is possible to hook in Generation 2 SoCs
as well.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-shmobile/Makefile | 2 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/include/mach/pm-rcar.h | 15 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/include/mach/r8a7779.h | 13 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/pm-r8a7779.c | 131 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/pm-rcar.c | 142 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/smp-r8a7779.c | 17 |
6 files changed, 177 insertions, 143 deletions
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index fe7d4ff706e4..7bc450c1708d 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile | |||
@@ -52,7 +52,7 @@ obj-$(CONFIG_CPU_IDLE) += cpuidle.o | |||
52 | obj-$(CONFIG_ARCH_SH7372) += pm-sh7372.o sleep-sh7372.o pm-rmobile.o | 52 | obj-$(CONFIG_ARCH_SH7372) += pm-sh7372.o sleep-sh7372.o pm-rmobile.o |
53 | obj-$(CONFIG_ARCH_SH73A0) += pm-sh73a0.o | 53 | obj-$(CONFIG_ARCH_SH73A0) += pm-sh73a0.o |
54 | obj-$(CONFIG_ARCH_R8A7740) += pm-r8a7740.o pm-rmobile.o | 54 | obj-$(CONFIG_ARCH_R8A7740) += pm-r8a7740.o pm-rmobile.o |
55 | obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o | 55 | obj-$(CONFIG_ARCH_R8A7779) += pm-r8a7779.o pm-rcar.o |
56 | 56 | ||
57 | # Board objects | 57 | # Board objects |
58 | ifdef CONFIG_ARCH_SHMOBILE_MULTI | 58 | ifdef CONFIG_ARCH_SHMOBILE_MULTI |
diff --git a/arch/arm/mach-shmobile/include/mach/pm-rcar.h b/arch/arm/mach-shmobile/include/mach/pm-rcar.h new file mode 100644 index 000000000000..ef3a1ef628f1 --- /dev/null +++ b/arch/arm/mach-shmobile/include/mach/pm-rcar.h | |||
@@ -0,0 +1,15 @@ | |||
1 | #ifndef PM_RCAR_H | ||
2 | #define PM_RCAR_H | ||
3 | |||
4 | struct rcar_sysc_ch { | ||
5 | unsigned long chan_offs; | ||
6 | unsigned int chan_bit; | ||
7 | unsigned int isr_bit; | ||
8 | }; | ||
9 | |||
10 | int rcar_sysc_power_down(struct rcar_sysc_ch *sysc_ch); | ||
11 | int rcar_sysc_power_up(struct rcar_sysc_ch *sysc_ch); | ||
12 | bool rcar_sysc_power_is_off(struct rcar_sysc_ch *sysc_ch); | ||
13 | void __iomem *rcar_sysc_init(phys_addr_t base); | ||
14 | |||
15 | #endif /* PM_RCAR_H */ | ||
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7779.h b/arch/arm/mach-shmobile/include/mach/r8a7779.h index b40e13631f6a..88eeceaf1088 100644 --- a/arch/arm/mach-shmobile/include/mach/r8a7779.h +++ b/arch/arm/mach-shmobile/include/mach/r8a7779.h | |||
@@ -3,6 +3,7 @@ | |||
3 | 3 | ||
4 | #include <linux/sh_clk.h> | 4 | #include <linux/sh_clk.h> |
5 | #include <linux/pm_domain.h> | 5 | #include <linux/pm_domain.h> |
6 | #include <mach/pm-rcar.h> | ||
6 | 7 | ||
7 | /* HPB-DMA slave IDs */ | 8 | /* HPB-DMA slave IDs */ |
8 | enum { | 9 | enum { |
@@ -11,18 +12,12 @@ enum { | |||
11 | HPBDMA_SLAVE_SDHI0_RX, | 12 | HPBDMA_SLAVE_SDHI0_RX, |
12 | }; | 13 | }; |
13 | 14 | ||
14 | struct r8a7779_pm_ch { | ||
15 | unsigned long chan_offs; | ||
16 | unsigned int chan_bit; | ||
17 | unsigned int isr_bit; | ||
18 | }; | ||
19 | |||
20 | struct r8a7779_pm_domain { | 15 | struct r8a7779_pm_domain { |
21 | struct generic_pm_domain genpd; | 16 | struct generic_pm_domain genpd; |
22 | struct r8a7779_pm_ch ch; | 17 | struct rcar_sysc_ch ch; |
23 | }; | 18 | }; |
24 | 19 | ||
25 | static inline struct r8a7779_pm_ch *to_r8a7779_ch(struct generic_pm_domain *d) | 20 | static inline struct rcar_sysc_ch *to_r8a7779_ch(struct generic_pm_domain *d) |
26 | { | 21 | { |
27 | return &container_of(d, struct r8a7779_pm_domain, genpd)->ch; | 22 | return &container_of(d, struct r8a7779_pm_domain, genpd)->ch; |
28 | } | 23 | } |
@@ -41,8 +36,6 @@ extern void r8a7779_clock_init(void); | |||
41 | extern void r8a7779_pinmux_init(void); | 36 | extern void r8a7779_pinmux_init(void); |
42 | extern void r8a7779_pm_init(void); | 37 | extern void r8a7779_pm_init(void); |
43 | extern void r8a7779_register_twd(void); | 38 | extern void r8a7779_register_twd(void); |
44 | extern int r8a7779_sysc_power_down(struct r8a7779_pm_ch *r8a7779_ch); | ||
45 | extern int r8a7779_sysc_power_up(struct r8a7779_pm_ch *r8a7779_ch); | ||
46 | 39 | ||
47 | #ifdef CONFIG_PM | 40 | #ifdef CONFIG_PM |
48 | extern void __init r8a7779_init_pm_domains(void); | 41 | extern void __init r8a7779_init_pm_domains(void); |
diff --git a/arch/arm/mach-shmobile/pm-r8a7779.c b/arch/arm/mach-shmobile/pm-r8a7779.c index d50a8e9b94a4..d6fe189b2df6 100644 --- a/arch/arm/mach-shmobile/pm-r8a7779.c +++ b/arch/arm/mach-shmobile/pm-r8a7779.c | |||
@@ -20,132 +20,22 @@ | |||
20 | #include <linux/console.h> | 20 | #include <linux/console.h> |
21 | #include <asm/io.h> | 21 | #include <asm/io.h> |
22 | #include <mach/common.h> | 22 | #include <mach/common.h> |
23 | #include <mach/pm-rcar.h> | ||
23 | #include <mach/r8a7779.h> | 24 | #include <mach/r8a7779.h> |
24 | 25 | ||
25 | static void __iomem *r8a7779_sysc_base; | ||
26 | |||
27 | /* SYSC */ | 26 | /* SYSC */ |
28 | #define SYSCSR 0x00 | ||
29 | #define SYSCISR 0x04 | ||
30 | #define SYSCISCR 0x08 | ||
31 | #define SYSCIER 0x0c | 27 | #define SYSCIER 0x0c |
32 | #define SYSCIMR 0x10 | 28 | #define SYSCIMR 0x10 |
33 | #define PWRSR0 0x40 | ||
34 | #define PWRSR1 0x80 | ||
35 | #define PWRSR2 0xc0 | ||
36 | #define PWRSR3 0x100 | ||
37 | #define PWRSR4 0x140 | ||
38 | |||
39 | #define PWRSR_OFFS 0x00 | ||
40 | #define PWROFFCR_OFFS 0x04 | ||
41 | #define PWRONCR_OFFS 0x0c | ||
42 | #define PWRER_OFFS 0x14 | ||
43 | |||
44 | #define SYSCSR_RETRIES 100 | ||
45 | #define SYSCSR_DELAY_US 1 | ||
46 | |||
47 | #define SYSCISR_RETRIES 1000 | ||
48 | #define SYSCISR_DELAY_US 1 | ||
49 | 29 | ||
50 | #if defined(CONFIG_PM) || defined(CONFIG_SMP) | 30 | #if defined(CONFIG_PM) || defined(CONFIG_SMP) |
51 | 31 | ||
52 | static DEFINE_SPINLOCK(r8a7779_sysc_lock); /* SMP CPUs + I/O devices */ | ||
53 | |||
54 | static int r8a7779_sysc_pwr_on_off(struct r8a7779_pm_ch *r8a7779_ch, | ||
55 | int sr_bit, int reg_offs) | ||
56 | { | ||
57 | int k; | ||
58 | |||
59 | for (k = 0; k < SYSCSR_RETRIES; k++) { | ||
60 | if (ioread32(r8a7779_sysc_base + SYSCSR) & (1 << sr_bit)) | ||
61 | break; | ||
62 | udelay(SYSCSR_DELAY_US); | ||
63 | } | ||
64 | |||
65 | if (k == SYSCSR_RETRIES) | ||
66 | return -EAGAIN; | ||
67 | |||
68 | iowrite32(1 << r8a7779_ch->chan_bit, | ||
69 | r8a7779_sysc_base + r8a7779_ch->chan_offs + reg_offs); | ||
70 | |||
71 | return 0; | ||
72 | } | ||
73 | |||
74 | static int r8a7779_sysc_pwr_off(struct r8a7779_pm_ch *r8a7779_ch) | ||
75 | { | ||
76 | return r8a7779_sysc_pwr_on_off(r8a7779_ch, 0, PWROFFCR_OFFS); | ||
77 | } | ||
78 | |||
79 | static int r8a7779_sysc_pwr_on(struct r8a7779_pm_ch *r8a7779_ch) | ||
80 | { | ||
81 | return r8a7779_sysc_pwr_on_off(r8a7779_ch, 1, PWRONCR_OFFS); | ||
82 | } | ||
83 | |||
84 | static int r8a7779_sysc_update(struct r8a7779_pm_ch *r8a7779_ch, | ||
85 | int (*on_off_fn)(struct r8a7779_pm_ch *)) | ||
86 | { | ||
87 | unsigned int isr_mask = 1 << r8a7779_ch->isr_bit; | ||
88 | unsigned int chan_mask = 1 << r8a7779_ch->chan_bit; | ||
89 | unsigned int status; | ||
90 | unsigned long flags; | ||
91 | int ret = 0; | ||
92 | int k; | ||
93 | |||
94 | spin_lock_irqsave(&r8a7779_sysc_lock, flags); | ||
95 | |||
96 | iowrite32(isr_mask, r8a7779_sysc_base + SYSCISCR); | ||
97 | |||
98 | do { | ||
99 | ret = on_off_fn(r8a7779_ch); | ||
100 | if (ret) | ||
101 | goto out; | ||
102 | |||
103 | status = ioread32(r8a7779_sysc_base + | ||
104 | r8a7779_ch->chan_offs + PWRER_OFFS); | ||
105 | } while (status & chan_mask); | ||
106 | |||
107 | for (k = 0; k < SYSCISR_RETRIES; k++) { | ||
108 | if (ioread32(r8a7779_sysc_base + SYSCISR) & isr_mask) | ||
109 | break; | ||
110 | udelay(SYSCISR_DELAY_US); | ||
111 | } | ||
112 | |||
113 | if (k == SYSCISR_RETRIES) | ||
114 | ret = -EIO; | ||
115 | |||
116 | iowrite32(isr_mask, r8a7779_sysc_base + SYSCISCR); | ||
117 | |||
118 | out: | ||
119 | spin_unlock_irqrestore(&r8a7779_sysc_lock, flags); | ||
120 | |||
121 | pr_debug("r8a7779 power domain %d: %02x %02x %02x %02x %02x -> %d\n", | ||
122 | r8a7779_ch->isr_bit, ioread32(r8a7779_sysc_base + PWRSR0), | ||
123 | ioread32(r8a7779_sysc_base + PWRSR1), | ||
124 | ioread32(r8a7779_sysc_base + PWRSR2), | ||
125 | ioread32(r8a7779_sysc_base + PWRSR3), | ||
126 | ioread32(r8a7779_sysc_base + PWRSR4), ret); | ||
127 | return ret; | ||
128 | } | ||
129 | |||
130 | int r8a7779_sysc_power_down(struct r8a7779_pm_ch *r8a7779_ch) | ||
131 | { | ||
132 | return r8a7779_sysc_update(r8a7779_ch, r8a7779_sysc_pwr_off); | ||
133 | } | ||
134 | |||
135 | int r8a7779_sysc_power_up(struct r8a7779_pm_ch *r8a7779_ch) | ||
136 | { | ||
137 | return r8a7779_sysc_update(r8a7779_ch, r8a7779_sysc_pwr_on); | ||
138 | } | ||
139 | |||
140 | static void __init r8a7779_sysc_init(void) | 32 | static void __init r8a7779_sysc_init(void) |
141 | { | 33 | { |
142 | r8a7779_sysc_base = ioremap_nocache(0xffd85000, PAGE_SIZE); | 34 | void __iomem *base = rcar_sysc_init(0xffd85000); |
143 | if (!r8a7779_sysc_base) | ||
144 | panic("unable to ioremap r8a7779 SYSC hardware block\n"); | ||
145 | 35 | ||
146 | /* enable all interrupt sources, but do not use interrupt handler */ | 36 | /* enable all interrupt sources, but do not use interrupt handler */ |
147 | iowrite32(0x0131000e, r8a7779_sysc_base + SYSCIER); | 37 | iowrite32(0x0131000e, base + SYSCIER); |
148 | iowrite32(0, r8a7779_sysc_base + SYSCIMR); | 38 | iowrite32(0, base + SYSCIMR); |
149 | } | 39 | } |
150 | 40 | ||
151 | #else /* CONFIG_PM || CONFIG_SMP */ | 41 | #else /* CONFIG_PM || CONFIG_SMP */ |
@@ -158,24 +48,17 @@ static inline void r8a7779_sysc_init(void) {} | |||
158 | 48 | ||
159 | static int pd_power_down(struct generic_pm_domain *genpd) | 49 | static int pd_power_down(struct generic_pm_domain *genpd) |
160 | { | 50 | { |
161 | return r8a7779_sysc_power_down(to_r8a7779_ch(genpd)); | 51 | return rcar_sysc_power_down(to_r8a7779_ch(genpd)); |
162 | } | 52 | } |
163 | 53 | ||
164 | static int pd_power_up(struct generic_pm_domain *genpd) | 54 | static int pd_power_up(struct generic_pm_domain *genpd) |
165 | { | 55 | { |
166 | return r8a7779_sysc_power_up(to_r8a7779_ch(genpd)); | 56 | return rcar_sysc_power_up(to_r8a7779_ch(genpd)); |
167 | } | 57 | } |
168 | 58 | ||
169 | static bool pd_is_off(struct generic_pm_domain *genpd) | 59 | static bool pd_is_off(struct generic_pm_domain *genpd) |
170 | { | 60 | { |
171 | struct r8a7779_pm_ch *r8a7779_ch = to_r8a7779_ch(genpd); | 61 | return rcar_sysc_power_is_off(to_r8a7779_ch(genpd)); |
172 | unsigned int st; | ||
173 | |||
174 | st = ioread32(r8a7779_sysc_base + r8a7779_ch->chan_offs + PWRSR_OFFS); | ||
175 | if (st & (1 << r8a7779_ch->chan_bit)) | ||
176 | return true; | ||
177 | |||
178 | return false; | ||
179 | } | 62 | } |
180 | 63 | ||
181 | static bool pd_active_wakeup(struct device *dev) | 64 | static bool pd_active_wakeup(struct device *dev) |
diff --git a/arch/arm/mach-shmobile/pm-rcar.c b/arch/arm/mach-shmobile/pm-rcar.c new file mode 100644 index 000000000000..17225db09558 --- /dev/null +++ b/arch/arm/mach-shmobile/pm-rcar.c | |||
@@ -0,0 +1,142 @@ | |||
1 | /* | ||
2 | * R-Car SYSC Power management support | ||
3 | * | ||
4 | * Copyright (C) 2014 Magnus Damm | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | |||
11 | #include <linux/delay.h> | ||
12 | #include <linux/err.h> | ||
13 | #include <linux/mm.h> | ||
14 | #include <linux/spinlock.h> | ||
15 | #include <asm/io.h> | ||
16 | #include <mach/pm-rcar.h> | ||
17 | |||
18 | static void __iomem *rcar_sysc_base; | ||
19 | |||
20 | /* SYSC */ | ||
21 | #define SYSCSR 0x00 | ||
22 | #define SYSCISR 0x04 | ||
23 | #define SYSCISCR 0x08 | ||
24 | |||
25 | #define PWRSR_OFFS 0x00 | ||
26 | #define PWROFFCR_OFFS 0x04 | ||
27 | #define PWRONCR_OFFS 0x0c | ||
28 | #define PWRER_OFFS 0x14 | ||
29 | |||
30 | #define SYSCSR_RETRIES 100 | ||
31 | #define SYSCSR_DELAY_US 1 | ||
32 | |||
33 | #define SYSCISR_RETRIES 1000 | ||
34 | #define SYSCISR_DELAY_US 1 | ||
35 | |||
36 | #if defined(CONFIG_PM) || defined(CONFIG_SMP) | ||
37 | |||
38 | static DEFINE_SPINLOCK(rcar_sysc_lock); /* SMP CPUs + I/O devices */ | ||
39 | |||
40 | static int rcar_sysc_pwr_on_off(struct rcar_sysc_ch *sysc_ch, | ||
41 | int sr_bit, int reg_offs) | ||
42 | { | ||
43 | int k; | ||
44 | |||
45 | for (k = 0; k < SYSCSR_RETRIES; k++) { | ||
46 | if (ioread32(rcar_sysc_base + SYSCSR) & (1 << sr_bit)) | ||
47 | break; | ||
48 | udelay(SYSCSR_DELAY_US); | ||
49 | } | ||
50 | |||
51 | if (k == SYSCSR_RETRIES) | ||
52 | return -EAGAIN; | ||
53 | |||
54 | iowrite32(1 << sysc_ch->chan_bit, | ||
55 | rcar_sysc_base + sysc_ch->chan_offs + reg_offs); | ||
56 | |||
57 | return 0; | ||
58 | } | ||
59 | |||
60 | static int rcar_sysc_pwr_off(struct rcar_sysc_ch *sysc_ch) | ||
61 | { | ||
62 | return rcar_sysc_pwr_on_off(sysc_ch, 0, PWROFFCR_OFFS); | ||
63 | } | ||
64 | |||
65 | static int rcar_sysc_pwr_on(struct rcar_sysc_ch *sysc_ch) | ||
66 | { | ||
67 | return rcar_sysc_pwr_on_off(sysc_ch, 1, PWRONCR_OFFS); | ||
68 | } | ||
69 | |||
70 | static int rcar_sysc_update(struct rcar_sysc_ch *sysc_ch, | ||
71 | int (*on_off_fn)(struct rcar_sysc_ch *)) | ||
72 | { | ||
73 | unsigned int isr_mask = 1 << sysc_ch->isr_bit; | ||
74 | unsigned int chan_mask = 1 << sysc_ch->chan_bit; | ||
75 | unsigned int status; | ||
76 | unsigned long flags; | ||
77 | int ret = 0; | ||
78 | int k; | ||
79 | |||
80 | spin_lock_irqsave(&rcar_sysc_lock, flags); | ||
81 | |||
82 | iowrite32(isr_mask, rcar_sysc_base + SYSCISCR); | ||
83 | |||
84 | do { | ||
85 | ret = on_off_fn(sysc_ch); | ||
86 | if (ret) | ||
87 | goto out; | ||
88 | |||
89 | status = ioread32(rcar_sysc_base + | ||
90 | sysc_ch->chan_offs + PWRER_OFFS); | ||
91 | } while (status & chan_mask); | ||
92 | |||
93 | for (k = 0; k < SYSCISR_RETRIES; k++) { | ||
94 | if (ioread32(rcar_sysc_base + SYSCISR) & isr_mask) | ||
95 | break; | ||
96 | udelay(SYSCISR_DELAY_US); | ||
97 | } | ||
98 | |||
99 | if (k == SYSCISR_RETRIES) | ||
100 | ret = -EIO; | ||
101 | |||
102 | iowrite32(isr_mask, rcar_sysc_base + SYSCISCR); | ||
103 | |||
104 | out: | ||
105 | spin_unlock_irqrestore(&rcar_sysc_lock, flags); | ||
106 | |||
107 | pr_debug("sysc power domain %d: %08x -> %d\n", | ||
108 | sysc_ch->isr_bit, ioread32(rcar_sysc_base + SYSCISR), ret); | ||
109 | return ret; | ||
110 | } | ||
111 | |||
112 | int rcar_sysc_power_down(struct rcar_sysc_ch *sysc_ch) | ||
113 | { | ||
114 | return rcar_sysc_update(sysc_ch, rcar_sysc_pwr_off); | ||
115 | } | ||
116 | |||
117 | int rcar_sysc_power_up(struct rcar_sysc_ch *sysc_ch) | ||
118 | { | ||
119 | return rcar_sysc_update(sysc_ch, rcar_sysc_pwr_on); | ||
120 | } | ||
121 | |||
122 | bool rcar_sysc_power_is_off(struct rcar_sysc_ch *sysc_ch) | ||
123 | { | ||
124 | unsigned int st; | ||
125 | |||
126 | st = ioread32(rcar_sysc_base + sysc_ch->chan_offs + PWRSR_OFFS); | ||
127 | if (st & (1 << sysc_ch->chan_bit)) | ||
128 | return true; | ||
129 | |||
130 | return false; | ||
131 | } | ||
132 | |||
133 | void __iomem *rcar_sysc_init(phys_addr_t base) | ||
134 | { | ||
135 | rcar_sysc_base = ioremap_nocache(base, PAGE_SIZE); | ||
136 | if (!rcar_sysc_base) | ||
137 | panic("unable to ioremap R-Car SYSC hardware block\n"); | ||
138 | |||
139 | return rcar_sysc_base; | ||
140 | } | ||
141 | |||
142 | #endif /* CONFIG_PM || CONFIG_SMP */ | ||
diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c index 627c1f0d9478..e7a3201473d0 100644 --- a/arch/arm/mach-shmobile/smp-r8a7779.c +++ b/arch/arm/mach-shmobile/smp-r8a7779.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <linux/io.h> | 24 | #include <linux/io.h> |
25 | #include <linux/delay.h> | 25 | #include <linux/delay.h> |
26 | #include <mach/common.h> | 26 | #include <mach/common.h> |
27 | #include <mach/pm-rcar.h> | ||
27 | #include <mach/r8a7779.h> | 28 | #include <mach/r8a7779.h> |
28 | #include <asm/cacheflush.h> | 29 | #include <asm/cacheflush.h> |
29 | #include <asm/smp_plat.h> | 30 | #include <asm/smp_plat.h> |
@@ -33,25 +34,25 @@ | |||
33 | #define AVECR IOMEM(0xfe700040) | 34 | #define AVECR IOMEM(0xfe700040) |
34 | #define R8A7779_SCU_BASE 0xf0000000 | 35 | #define R8A7779_SCU_BASE 0xf0000000 |
35 | 36 | ||
36 | static struct r8a7779_pm_ch r8a7779_ch_cpu1 = { | 37 | static struct rcar_sysc_ch r8a7779_ch_cpu1 = { |
37 | .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */ | 38 | .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */ |
38 | .chan_bit = 1, /* ARM1 */ | 39 | .chan_bit = 1, /* ARM1 */ |
39 | .isr_bit = 1, /* ARM1 */ | 40 | .isr_bit = 1, /* ARM1 */ |
40 | }; | 41 | }; |
41 | 42 | ||
42 | static struct r8a7779_pm_ch r8a7779_ch_cpu2 = { | 43 | static struct rcar_sysc_ch r8a7779_ch_cpu2 = { |
43 | .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */ | 44 | .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */ |
44 | .chan_bit = 2, /* ARM2 */ | 45 | .chan_bit = 2, /* ARM2 */ |
45 | .isr_bit = 2, /* ARM2 */ | 46 | .isr_bit = 2, /* ARM2 */ |
46 | }; | 47 | }; |
47 | 48 | ||
48 | static struct r8a7779_pm_ch r8a7779_ch_cpu3 = { | 49 | static struct rcar_sysc_ch r8a7779_ch_cpu3 = { |
49 | .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */ | 50 | .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */ |
50 | .chan_bit = 3, /* ARM3 */ | 51 | .chan_bit = 3, /* ARM3 */ |
51 | .isr_bit = 3, /* ARM3 */ | 52 | .isr_bit = 3, /* ARM3 */ |
52 | }; | 53 | }; |
53 | 54 | ||
54 | static struct r8a7779_pm_ch *r8a7779_ch_cpu[4] = { | 55 | static struct rcar_sysc_ch *r8a7779_ch_cpu[4] = { |
55 | [1] = &r8a7779_ch_cpu1, | 56 | [1] = &r8a7779_ch_cpu1, |
56 | [2] = &r8a7779_ch_cpu2, | 57 | [2] = &r8a7779_ch_cpu2, |
57 | [3] = &r8a7779_ch_cpu3, | 58 | [3] = &r8a7779_ch_cpu3, |
@@ -67,7 +68,7 @@ void __init r8a7779_register_twd(void) | |||
67 | 68 | ||
68 | static int r8a7779_platform_cpu_kill(unsigned int cpu) | 69 | static int r8a7779_platform_cpu_kill(unsigned int cpu) |
69 | { | 70 | { |
70 | struct r8a7779_pm_ch *ch = NULL; | 71 | struct rcar_sysc_ch *ch = NULL; |
71 | int ret = -EIO; | 72 | int ret = -EIO; |
72 | 73 | ||
73 | cpu = cpu_logical_map(cpu); | 74 | cpu = cpu_logical_map(cpu); |
@@ -76,14 +77,14 @@ static int r8a7779_platform_cpu_kill(unsigned int cpu) | |||
76 | ch = r8a7779_ch_cpu[cpu]; | 77 | ch = r8a7779_ch_cpu[cpu]; |
77 | 78 | ||
78 | if (ch) | 79 | if (ch) |
79 | ret = r8a7779_sysc_power_down(ch); | 80 | ret = rcar_sysc_power_down(ch); |
80 | 81 | ||
81 | return ret ? ret : 1; | 82 | return ret ? ret : 1; |
82 | } | 83 | } |
83 | 84 | ||
84 | static int r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle) | 85 | static int r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle) |
85 | { | 86 | { |
86 | struct r8a7779_pm_ch *ch = NULL; | 87 | struct rcar_sysc_ch *ch = NULL; |
87 | unsigned int lcpu = cpu_logical_map(cpu); | 88 | unsigned int lcpu = cpu_logical_map(cpu); |
88 | int ret; | 89 | int ret; |
89 | 90 | ||
@@ -91,7 +92,7 @@ static int r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle) | |||
91 | ch = r8a7779_ch_cpu[lcpu]; | 92 | ch = r8a7779_ch_cpu[lcpu]; |
92 | 93 | ||
93 | if (ch) | 94 | if (ch) |
94 | ret = r8a7779_sysc_power_up(ch); | 95 | ret = rcar_sysc_power_up(ch); |
95 | else | 96 | else |
96 | ret = -EIO; | 97 | ret = -EIO; |
97 | 98 | ||