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authorThomas Gleixner <tglx@linutronix.de>2011-01-19 13:01:23 -0500
committerThomas Gleixner <tglx@linutronix.de>2011-01-21 05:55:30 -0500
commit9b141fa649b160c6a0854a79fe2cd741c5c99e80 (patch)
treeaa96a5837b48d197ea406c8131d857a7ef240774 /arch
parent1899a493b991cf9ea7a57d15b64588632fe32cf0 (diff)
m32r: Convert opsput_lcdpld irq chip
Convert the irq chips to the new functions and use proper flow handlers. handle_level_irq is appropriate. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/m32r/platforms/opsput/setup.c42
1 files changed, 16 insertions, 26 deletions
diff --git a/arch/m32r/platforms/opsput/setup.c b/arch/m32r/platforms/opsput/setup.c
index 7648c1dd8dee..12731547e8bf 100644
--- a/arch/m32r/platforms/opsput/setup.c
+++ b/arch/m32r/platforms/opsput/setup.c
@@ -227,42 +227,32 @@ static void enable_opsput_lcdpld_irq(unsigned int irq)
227 outw(data, port); 227 outw(data, port);
228} 228}
229 229
230static void mask_and_ack_opsput_lcdpld(unsigned int irq) 230static void mask_opsput_lcdpld(struct irq_data *data)
231{ 231{
232 disable_opsput_lcdpld_irq(irq); 232 disable_opsput_lcdpld_irq(data->irq);
233} 233}
234 234
235static void end_opsput_lcdpld_irq(unsigned int irq) 235static void unmask_opsput_lcdpld(struct irq_data *data)
236{ 236{
237 enable_opsput_lcdpld_irq(irq); 237 enable_opsput_lcdpld_irq(data->irq);
238 enable_opsput_irq(M32R_IRQ_INT2); 238 enable_opsput_irq(M32R_IRQ_INT2);
239} 239}
240 240
241static unsigned int startup_opsput_lcdpld_irq(unsigned int irq) 241static void shutdown_opsput_lcdpld(struct irq_data *data)
242{
243 enable_opsput_lcdpld_irq(irq);
244 return (0);
245}
246
247static void shutdown_opsput_lcdpld_irq(unsigned int irq)
248{ 242{
249 unsigned long port; 243 unsigned long port;
250 unsigned int pldirq; 244 unsigned int pldirq;
251 245
252 pldirq = irq2lcdpldirq(irq); 246 pldirq = irq2lcdpldirq(data->irq);
253 port = lcdpldirq2port(pldirq); 247 port = lcdpldirq2port(pldirq);
254 outw(PLD_ICUCR_ILEVEL7, port); 248 outw(PLD_ICUCR_ILEVEL7, port);
255} 249}
256 250
257static struct irq_chip opsput_lcdpld_irq_type = 251static struct irq_chip opsput_lcdpld_irq_type = {
258{ 252 .name = "OPSPUT-PLD-LCD-IRQ",
259 "OPSPUT-PLD-LCD-IRQ", 253 .irq_shutdown = shutdown_opsput_lcdpld,
260 startup_opsput_lcdpld_irq, 254 .irq_mask = mask_opsput_lcdpld,
261 shutdown_opsput_lcdpld_irq, 255 .irq_unmask = unmask_opsput_lcdpld,
262 enable_opsput_lcdpld_irq,
263 disable_opsput_lcdpld_irq,
264 mask_and_ack_opsput_lcdpld,
265 end_opsput_lcdpld_irq
266}; 256};
267 257
268void __init init_IRQ(void) 258void __init init_IRQ(void)
@@ -358,11 +348,11 @@ void __init init_IRQ(void)
358 enable_opsput_irq(M32R_IRQ_INT1); 348 enable_opsput_irq(M32R_IRQ_INT1);
359 349
360#if defined(CONFIG_USB) 350#if defined(CONFIG_USB)
361 outw(USBCR_OTGS, USBCR); /* USBCR: non-OTG */ 351 outw(USBCR_OTGS, USBCR); /* USBCR: non-OTG */
362 352 set_irq_chip_and_handler(OPSPUT_LCD_IRQ_USB_INT1,
363 set_irq_chip(OPSPUT_LCD_IRQ_USB_INT1, &opsput_lcdpld_irq_type); 353 &opsput_lcdpld_irq_type, handle_level_irq);
364 lcdpld_icu_data[irq2lcdpldirq(OPSPUT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* "L" level sense */ 354 lcdpld_icu_data[irq2lcdpldirq(OPSPUT_LCD_IRQ_USB_INT1)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD01; /* "L" level sense */
365 disable_opsput_lcdpld_irq(OPSPUT_LCD_IRQ_USB_INT1); 355 disable_opsput_lcdpld_irq(OPSPUT_LCD_IRQ_USB_INT1);
366#endif 356#endif
367 /* 357 /*
368 * INT2# is used for BAT, USB, AUDIO 358 * INT2# is used for BAT, USB, AUDIO