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authorStephen Warren <swarren@nvidia.com>2012-05-21 16:40:14 -0400
committerStephen Warren <swarren@nvidia.com>2012-06-20 14:37:41 -0400
commit98a1405e20ecf261abbc091eabb229d8adfbf62c (patch)
tree2d4a9fd8684ba821ff2bf5de95ff9e61eaa18190 /arch
parent2c95b7e06f63b264500fbcd5b4718c1a7258aa76 (diff)
ARM: tegra: remove Seaboard board files
The Seaboard device tree supports all the features that the Seaboard board files support. Hence, there's no need to keep the board files around any more; all users should convert to device tree. MACH_KAEN and MACH_WARIO are also removed. While tegra-seaboard.dts doesn't support those explicitly, it would be trivial to create device trees for those boards if anyone cares. The Seaboard device tree is now compiled if Tegra2 support is enabled, rather than when Seaboard support is enabled. Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-tegra/Kconfig22
-rw-r--r--arch/arm/mach-tegra/Makefile3
-rw-r--r--arch/arm/mach-tegra/board-seaboard-pinmux.c197
-rw-r--r--arch/arm/mach-tegra/board-seaboard.c306
-rw-r--r--arch/arm/mach-tegra/board-seaboard.h47
5 files changed, 0 insertions, 575 deletions
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 621466a717d1..9077aaa398d9 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -66,27 +66,12 @@ config MACH_HARMONY
66 help 66 help
67 Support for nVidia Harmony development platform 67 Support for nVidia Harmony development platform
68 68
69config MACH_KAEN
70 bool "Kaen board"
71 depends on ARCH_TEGRA_2x_SOC
72 select MACH_SEABOARD
73 help
74 Support for the Kaen version of Seaboard
75
76config MACH_PAZ00 69config MACH_PAZ00
77 bool "Paz00 board" 70 bool "Paz00 board"
78 depends on ARCH_TEGRA_2x_SOC 71 depends on ARCH_TEGRA_2x_SOC
79 help 72 help
80 Support for the Toshiba AC100/Dynabook AZ netbook 73 Support for the Toshiba AC100/Dynabook AZ netbook
81 74
82config MACH_SEABOARD
83 bool "Seaboard board"
84 depends on ARCH_TEGRA_2x_SOC
85 help
86 Support for nVidia Seaboard development platform. It will
87 also be included for some of the derivative boards that
88 have large similarities with the seaboard design.
89
90config MACH_TRIMSLICE 75config MACH_TRIMSLICE
91 bool "TrimSlice board" 76 bool "TrimSlice board"
92 depends on ARCH_TEGRA_2x_SOC 77 depends on ARCH_TEGRA_2x_SOC
@@ -94,13 +79,6 @@ config MACH_TRIMSLICE
94 help 79 help
95 Support for CompuLab TrimSlice platform 80 Support for CompuLab TrimSlice platform
96 81
97config MACH_WARIO
98 bool "Wario board"
99 depends on ARCH_TEGRA_2x_SOC
100 select MACH_SEABOARD
101 help
102 Support for the Wario version of Seaboard
103
104choice 82choice
105 prompt "Default low-level debug console UART" 83 prompt "Default low-level debug console UART"
106 default TEGRA_DEBUG_UART_NONE 84 default TEGRA_DEBUG_UART_NONE
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index 60a02132d2da..1f6f237586e4 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -33,8 +33,5 @@ obj-$(CONFIG_MACH_HARMONY) += board-harmony-power.o
33obj-$(CONFIG_MACH_PAZ00) += board-paz00.o 33obj-$(CONFIG_MACH_PAZ00) += board-paz00.o
34obj-$(CONFIG_MACH_PAZ00) += board-paz00-pinmux.o 34obj-$(CONFIG_MACH_PAZ00) += board-paz00-pinmux.o
35 35
36obj-$(CONFIG_MACH_SEABOARD) += board-seaboard.o
37obj-$(CONFIG_MACH_SEABOARD) += board-seaboard-pinmux.o
38
39obj-$(CONFIG_MACH_TRIMSLICE) += board-trimslice.o 36obj-$(CONFIG_MACH_TRIMSLICE) += board-trimslice.o
40obj-$(CONFIG_MACH_TRIMSLICE) += board-trimslice-pinmux.o 37obj-$(CONFIG_MACH_TRIMSLICE) += board-trimslice-pinmux.o
diff --git a/arch/arm/mach-tegra/board-seaboard-pinmux.c b/arch/arm/mach-tegra/board-seaboard-pinmux.c
deleted file mode 100644
index 11fc8a568c64..000000000000
--- a/arch/arm/mach-tegra/board-seaboard-pinmux.c
+++ /dev/null
@@ -1,197 +0,0 @@
1/*
2 * Copyright (C) 2010-2012 NVIDIA Corporation
3 * Copyright (C) 2011 Google, Inc.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#include <linux/kernel.h>
17
18#include "board-seaboard.h"
19#include "board-pinmux.h"
20
21static unsigned long seaboard_pincfg_drive_sdio1[] = {
22 TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_HIGH_SPEED_MODE, 0),
23 TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_SCHMITT, 0),
24 TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_LOW_POWER_MODE, 3),
25 TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_DRIVE_DOWN_STRENGTH, 31),
26 TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_DRIVE_UP_STRENGTH, 31),
27 TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_SLEW_RATE_FALLING, 3),
28 TEGRA_PINCONF_PACK(TEGRA_PINCONF_PARAM_SLEW_RATE_RISING, 3),
29};
30
31static struct pinctrl_map common_map[] = {
32 TEGRA_MAP_MUXCONF("ata", "ide", none, driven),
33 TEGRA_MAP_MUXCONF("atb", "sdio4", none, driven),
34 TEGRA_MAP_MUXCONF("atc", "nand", none, driven),
35 TEGRA_MAP_MUXCONF("atd", "gmi", none, driven),
36 TEGRA_MAP_MUXCONF("ate", "gmi", none, tristate),
37 TEGRA_MAP_MUXCONF("cdev1", "plla_out", none, driven),
38 TEGRA_MAP_MUXCONF("cdev2", "pllp_out4", none, driven),
39 TEGRA_MAP_MUXCONF("crtp", "crt", up, tristate),
40 TEGRA_MAP_MUXCONF("csus", "vi_sensor_clk", none, tristate),
41 TEGRA_MAP_MUXCONF("dap1", "dap1", none, driven),
42 TEGRA_MAP_MUXCONF("dap2", "dap2", none, driven),
43 TEGRA_MAP_MUXCONF("dap3", "dap3", none, tristate),
44 TEGRA_MAP_MUXCONF("dap4", "dap4", none, driven),
45 TEGRA_MAP_MUXCONF("dta", "vi", down, driven),
46 TEGRA_MAP_MUXCONF("dtb", "vi", down, driven),
47 TEGRA_MAP_MUXCONF("dtc", "vi", down, driven),
48 TEGRA_MAP_MUXCONF("dtd", "vi", down, driven),
49 TEGRA_MAP_MUXCONF("dte", "vi", down, tristate),
50 TEGRA_MAP_MUXCONF("dtf", "i2c3", none, driven),
51 TEGRA_MAP_MUXCONF("gma", "sdio4", none, driven),
52 TEGRA_MAP_MUXCONF("gmb", "gmi", up, tristate),
53 TEGRA_MAP_MUXCONF("gmc", "uartd", none, driven),
54 TEGRA_MAP_MUXCONF("gme", "sdio4", none, driven),
55 TEGRA_MAP_MUXCONF("gpu", "pwm", none, driven),
56 TEGRA_MAP_MUXCONF("gpu7", "rtck", none, driven),
57 TEGRA_MAP_MUXCONF("gpv", "pcie", none, tristate),
58 TEGRA_MAP_MUXCONF("hdint", "hdmi", na, tristate),
59 TEGRA_MAP_MUXCONF("i2cp", "i2cp", none, driven),
60 TEGRA_MAP_MUXCONF("irrx", "uartb", none, driven),
61 TEGRA_MAP_MUXCONF("irtx", "uartb", none, driven),
62 TEGRA_MAP_MUXCONF("kbca", "kbc", up, driven),
63 TEGRA_MAP_MUXCONF("kbcb", "kbc", up, driven),
64 TEGRA_MAP_MUXCONF("kbcc", "kbc", up, driven),
65 TEGRA_MAP_MUXCONF("kbcd", "kbc", up, driven),
66 TEGRA_MAP_MUXCONF("kbce", "kbc", up, driven),
67 TEGRA_MAP_MUXCONF("kbcf", "kbc", up, driven),
68 TEGRA_MAP_MUXCONF("lcsn", "rsvd4", na, tristate),
69 TEGRA_MAP_MUXCONF("ld0", "displaya", na, driven),
70 TEGRA_MAP_MUXCONF("ld1", "displaya", na, driven),
71 TEGRA_MAP_MUXCONF("ld10", "displaya", na, driven),
72 TEGRA_MAP_MUXCONF("ld11", "displaya", na, driven),
73 TEGRA_MAP_MUXCONF("ld12", "displaya", na, driven),
74 TEGRA_MAP_MUXCONF("ld13", "displaya", na, driven),
75 TEGRA_MAP_MUXCONF("ld14", "displaya", na, driven),
76 TEGRA_MAP_MUXCONF("ld15", "displaya", na, driven),
77 TEGRA_MAP_MUXCONF("ld16", "displaya", na, driven),
78 TEGRA_MAP_MUXCONF("ld17", "displaya", na, driven),
79 TEGRA_MAP_MUXCONF("ld2", "displaya", na, driven),
80 TEGRA_MAP_MUXCONF("ld3", "displaya", na, driven),
81 TEGRA_MAP_MUXCONF("ld4", "displaya", na, driven),
82 TEGRA_MAP_MUXCONF("ld5", "displaya", na, driven),
83 TEGRA_MAP_MUXCONF("ld6", "displaya", na, driven),
84 TEGRA_MAP_MUXCONF("ld7", "displaya", na, driven),
85 TEGRA_MAP_MUXCONF("ld8", "displaya", na, driven),
86 TEGRA_MAP_MUXCONF("ld9", "displaya", na, driven),
87 TEGRA_MAP_MUXCONF("ldc", "rsvd4", na, tristate),
88 TEGRA_MAP_MUXCONF("ldi", "displaya", na, driven),
89 TEGRA_MAP_MUXCONF("lhp0", "displaya", na, driven),
90 TEGRA_MAP_MUXCONF("lhp1", "displaya", na, driven),
91 TEGRA_MAP_MUXCONF("lhp2", "displaya", na, driven),
92 TEGRA_MAP_MUXCONF("lhs", "displaya", na, driven),
93 TEGRA_MAP_MUXCONF("lm0", "rsvd4", na, driven),
94 TEGRA_MAP_MUXCONF("lm1", "crt", na, tristate),
95 TEGRA_MAP_MUXCONF("lpp", "displaya", na, driven),
96 TEGRA_MAP_MUXCONF("lpw1", "rsvd4", na, tristate),
97 TEGRA_MAP_MUXCONF("lsc0", "displaya", na, driven),
98 TEGRA_MAP_MUXCONF("lsdi", "rsvd4", na, tristate),
99 TEGRA_MAP_MUXCONF("lspi", "displaya", na, driven),
100 TEGRA_MAP_MUXCONF("lvp0", "rsvd4", na, tristate),
101 TEGRA_MAP_MUXCONF("lvp1", "displaya", na, driven),
102 TEGRA_MAP_MUXCONF("lvs", "displaya", na, driven),
103 TEGRA_MAP_MUXCONF("owc", "rsvd2", none, tristate),
104 TEGRA_MAP_MUXCONF("pmc", "pwr_on", na, driven),
105 TEGRA_MAP_MUXCONF("pta", "hdmi", none, driven),
106 TEGRA_MAP_MUXCONF("rm", "i2c1", none, driven),
107 TEGRA_MAP_MUXCONF("sdb", "sdio3", na, driven),
108 TEGRA_MAP_MUXCONF("sdc", "sdio3", none, driven),
109 TEGRA_MAP_MUXCONF("sdd", "sdio3", none, driven),
110 TEGRA_MAP_MUXCONF("sdio1", "sdio1", up, driven),
111 TEGRA_MAP_MUXCONF("slxa", "pcie", up, tristate),
112 TEGRA_MAP_MUXCONF("slxd", "spdif", none, driven),
113 TEGRA_MAP_MUXCONF("slxk", "pcie", none, driven),
114 TEGRA_MAP_MUXCONF("spdi", "rsvd2", none, driven),
115 TEGRA_MAP_MUXCONF("spdo", "rsvd2", none, driven),
116 TEGRA_MAP_MUXCONF("spib", "gmi", none, tristate),
117 TEGRA_MAP_MUXCONF("spid", "spi1", none, tristate),
118 TEGRA_MAP_MUXCONF("spie", "spi1", none, tristate),
119 TEGRA_MAP_MUXCONF("spif", "spi1", down, tristate),
120 TEGRA_MAP_MUXCONF("spih", "spi2_alt", up, tristate),
121 TEGRA_MAP_MUXCONF("uaa", "ulpi", up, driven),
122 TEGRA_MAP_MUXCONF("uab", "ulpi", up, driven),
123 TEGRA_MAP_MUXCONF("uac", "rsvd2", none, driven),
124 TEGRA_MAP_MUXCONF("uad", "irda", none, driven),
125 TEGRA_MAP_MUXCONF("uca", "uartc", none, driven),
126 TEGRA_MAP_MUXCONF("ucb", "uartc", none, driven),
127 TEGRA_MAP_MUXCONF("uda", "ulpi", none, driven),
128 TEGRA_MAP_CONF("ck32", none, na),
129 TEGRA_MAP_CONF("ddrc", none, na),
130 TEGRA_MAP_CONF("pmca", none, na),
131 TEGRA_MAP_CONF("pmcb", none, na),
132 TEGRA_MAP_CONF("pmcc", none, na),
133 TEGRA_MAP_CONF("pmcd", none, na),
134 TEGRA_MAP_CONF("pmce", none, na),
135 TEGRA_MAP_CONF("xm2c", none, na),
136 TEGRA_MAP_CONF("xm2d", none, na),
137 TEGRA_MAP_CONF("ls", up, na),
138 TEGRA_MAP_CONF("lc", up, na),
139 TEGRA_MAP_CONF("ld17_0", down, na),
140 TEGRA_MAP_CONF("ld19_18", down, na),
141 TEGRA_MAP_CONF("ld21_20", down, na),
142 TEGRA_MAP_CONF("ld23_22", down, na),
143};
144
145static struct pinctrl_map seaboard_map[] = {
146 TEGRA_MAP_MUXCONF("ddc", "rsvd2", none, tristate),
147 TEGRA_MAP_MUXCONF("gmd", "sflash", none, driven),
148 TEGRA_MAP_MUXCONF("lpw0", "hdmi", na, driven),
149 TEGRA_MAP_MUXCONF("lpw2", "hdmi", na, driven),
150 TEGRA_MAP_MUXCONF("lsc1", "hdmi", na, tristate),
151 TEGRA_MAP_MUXCONF("lsck", "hdmi", na, tristate),
152 TEGRA_MAP_MUXCONF("lsda", "hdmi", na, tristate),
153 TEGRA_MAP_MUXCONF("slxc", "spdif", none, tristate),
154 TEGRA_MAP_MUXCONF("spia", "gmi", up, tristate),
155 TEGRA_MAP_MUXCONF("spic", "gmi", up, driven),
156 TEGRA_MAP_MUXCONF("spig", "spi2_alt", up, tristate),
157 PIN_MAP_CONFIGS_GROUP_HOG_DEFAULT(PINMUX_DEV, "drive_sdio1", seaboard_pincfg_drive_sdio1),
158};
159
160static struct pinctrl_map ventana_map[] = {
161 TEGRA_MAP_MUXCONF("ddc", "rsvd2", none, driven),
162 TEGRA_MAP_MUXCONF("gmd", "sflash", none, tristate),
163 TEGRA_MAP_MUXCONF("lpw0", "displaya", na, driven),
164 TEGRA_MAP_MUXCONF("lpw2", "displaya", na, driven),
165 TEGRA_MAP_MUXCONF("lsc1", "displaya", na, driven),
166 TEGRA_MAP_MUXCONF("lsck", "displaya", na, tristate),
167 TEGRA_MAP_MUXCONF("lsda", "displaya", na, tristate),
168 TEGRA_MAP_MUXCONF("slxc", "sdio3", none, driven),
169 TEGRA_MAP_MUXCONF("spia", "gmi", none, tristate),
170 TEGRA_MAP_MUXCONF("spic", "gmi", none, tristate),
171 TEGRA_MAP_MUXCONF("spig", "spi2_alt", none, tristate),
172};
173
174static struct tegra_board_pinmux_conf common_conf = {
175 .maps = common_map,
176 .map_count = ARRAY_SIZE(common_map),
177};
178
179static struct tegra_board_pinmux_conf seaboard_conf = {
180 .maps = seaboard_map,
181 .map_count = ARRAY_SIZE(seaboard_map),
182};
183
184static struct tegra_board_pinmux_conf ventana_conf = {
185 .maps = ventana_map,
186 .map_count = ARRAY_SIZE(ventana_map),
187};
188
189void seaboard_pinmux_init(void)
190{
191 tegra_board_pinmux_init(&common_conf, &seaboard_conf);
192}
193
194void ventana_pinmux_init(void)
195{
196 tegra_board_pinmux_init(&common_conf, &ventana_conf);
197}
diff --git a/arch/arm/mach-tegra/board-seaboard.c b/arch/arm/mach-tegra/board-seaboard.c
deleted file mode 100644
index 71e9f3fc7fba..000000000000
--- a/arch/arm/mach-tegra/board-seaboard.c
+++ /dev/null
@@ -1,306 +0,0 @@
1/*
2 * Copyright (c) 2010, 2011 NVIDIA Corporation.
3 * Copyright (C) 2010, 2011 Google, Inc.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 */
16
17#include <linux/kernel.h>
18#include <linux/init.h>
19#include <linux/platform_device.h>
20#include <linux/serial_8250.h>
21#include <linux/of_serial.h>
22#include <linux/i2c.h>
23#include <linux/delay.h>
24#include <linux/input.h>
25#include <linux/io.h>
26#include <linux/gpio.h>
27#include <linux/gpio_keys.h>
28#include <linux/platform_data/tegra_usb.h>
29
30#include <sound/wm8903.h>
31
32#include <mach/iomap.h>
33#include <mach/irqs.h>
34#include <mach/sdhci.h>
35#include <mach/tegra_wm8903_pdata.h>
36
37#include <asm/mach-types.h>
38#include <asm/mach/arch.h>
39#include <asm/hardware/gic.h>
40
41#include "board.h"
42#include "board-seaboard.h"
43#include "clock.h"
44#include "devices.h"
45#include "gpio-names.h"
46
47static struct plat_serial8250_port debug_uart_platform_data[] = {
48 {
49 /* Memory and IRQ filled in before registration */
50 .flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
51 .type = PORT_TEGRA,
52 .handle_break = tegra_serial_handle_break,
53 .iotype = UPIO_MEM,
54 .regshift = 2,
55 .uartclk = 216000000,
56 }, {
57 .flags = 0,
58 }
59};
60
61static struct platform_device debug_uart = {
62 .name = "serial8250",
63 .id = PLAT8250_DEV_PLATFORM,
64 .dev = {
65 .platform_data = debug_uart_platform_data,
66 },
67};
68
69static __initdata struct tegra_clk_init_table seaboard_clk_init_table[] = {
70 /* name parent rate enabled */
71 { "uartb", "pll_p", 216000000, true},
72 { "uartd", "pll_p", 216000000, true},
73 { "pll_a", "pll_p_out1", 56448000, true },
74 { "pll_a_out0", "pll_a", 11289600, true },
75 { "cdev1", NULL, 0, true },
76 { "i2s1", "pll_a_out0", 11289600, false},
77 { "usbd", "clk_m", 12000000, true},
78 { "usb3", "clk_m", 12000000, true},
79 { NULL, NULL, 0, 0},
80};
81
82static struct gpio_keys_button seaboard_gpio_keys_buttons[] = {
83 {
84 .code = SW_LID,
85 .gpio = TEGRA_GPIO_LIDSWITCH,
86 .active_low = 0,
87 .desc = "Lid",
88 .type = EV_SW,
89 .wakeup = 1,
90 .debounce_interval = 1,
91 },
92 {
93 .code = KEY_POWER,
94 .gpio = TEGRA_GPIO_POWERKEY,
95 .active_low = 1,
96 .desc = "Power",
97 .type = EV_KEY,
98 .wakeup = 1,
99 },
100};
101
102static struct gpio_keys_platform_data seaboard_gpio_keys = {
103 .buttons = seaboard_gpio_keys_buttons,
104 .nbuttons = ARRAY_SIZE(seaboard_gpio_keys_buttons),
105};
106
107static struct platform_device seaboard_gpio_keys_device = {
108 .name = "gpio-keys",
109 .id = -1,
110 .dev = {
111 .platform_data = &seaboard_gpio_keys,
112 }
113};
114
115static struct tegra_sdhci_platform_data sdhci_pdata1 = {
116 .cd_gpio = -1,
117 .wp_gpio = -1,
118 .power_gpio = -1,
119};
120
121static struct tegra_sdhci_platform_data sdhci_pdata3 = {
122 .cd_gpio = TEGRA_GPIO_SD2_CD,
123 .wp_gpio = TEGRA_GPIO_SD2_WP,
124 .power_gpio = TEGRA_GPIO_SD2_POWER,
125};
126
127static struct tegra_sdhci_platform_data sdhci_pdata4 = {
128 .cd_gpio = -1,
129 .wp_gpio = -1,
130 .power_gpio = -1,
131 .is_8bit = 1,
132};
133
134static struct tegra_wm8903_platform_data seaboard_audio_pdata = {
135 .gpio_spkr_en = TEGRA_GPIO_SPKR_EN,
136 .gpio_hp_det = TEGRA_GPIO_HP_DET,
137 .gpio_hp_mute = -1,
138 .gpio_int_mic_en = -1,
139 .gpio_ext_mic_en = -1,
140};
141
142static struct platform_device seaboard_audio_device = {
143 .name = "tegra-snd-wm8903",
144 .id = 0,
145 .dev = {
146 .platform_data = &seaboard_audio_pdata,
147 },
148};
149
150static struct platform_device *seaboard_devices[] __initdata = {
151 &debug_uart,
152 &tegra_pmu_device,
153 &tegra_sdhci_device4,
154 &tegra_sdhci_device3,
155 &tegra_sdhci_device1,
156 &seaboard_gpio_keys_device,
157 &tegra_i2s_device1,
158 &tegra_das_device,
159 &seaboard_audio_device,
160};
161
162static struct i2c_board_info __initdata isl29018_device = {
163 I2C_BOARD_INFO("isl29018", 0x44),
164};
165
166static struct i2c_board_info __initdata adt7461_device = {
167 I2C_BOARD_INFO("adt7461", 0x4c),
168};
169
170static struct wm8903_platform_data wm8903_pdata = {
171 .irq_active_low = 0,
172 .micdet_cfg = 0,
173 .micdet_delay = 100,
174 .gpio_base = SEABOARD_GPIO_WM8903(0),
175 .gpio_cfg = {
176 0,
177 0,
178 WM8903_GPIO_CONFIG_ZERO,
179 0,
180 0,
181 },
182};
183
184static struct i2c_board_info __initdata wm8903_device = {
185 I2C_BOARD_INFO("wm8903", 0x1a),
186 .platform_data = &wm8903_pdata,
187};
188
189static int seaboard_ehci_init(void)
190{
191 struct tegra_ehci_platform_data *pdata;
192
193 pdata = tegra_ehci1_device.dev.platform_data;
194 pdata->vbus_gpio = TEGRA_GPIO_USB1;
195
196 platform_device_register(&tegra_ehci1_device);
197 platform_device_register(&tegra_ehci3_device);
198
199 return 0;
200}
201
202static void __init seaboard_i2c_init(void)
203{
204 isl29018_device.irq = gpio_to_irq(TEGRA_GPIO_ISL29018_IRQ);
205 i2c_register_board_info(0, &isl29018_device, 1);
206
207 wm8903_device.irq = gpio_to_irq(TEGRA_GPIO_CDC_IRQ);
208 i2c_register_board_info(0, &wm8903_device, 1);
209
210 i2c_register_board_info(3, &adt7461_device, 1);
211
212 platform_device_register(&tegra_i2c_device1);
213 platform_device_register(&tegra_i2c_device2);
214 platform_device_register(&tegra_i2c_device3);
215 platform_device_register(&tegra_i2c_device4);
216}
217
218static void __init seaboard_common_init(void)
219{
220 seaboard_pinmux_init();
221
222 tegra_clk_init_from_table(seaboard_clk_init_table);
223
224 tegra_sdhci_device1.dev.platform_data = &sdhci_pdata1;
225 tegra_sdhci_device3.dev.platform_data = &sdhci_pdata3;
226 tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4;
227
228 platform_add_devices(seaboard_devices, ARRAY_SIZE(seaboard_devices));
229
230 seaboard_ehci_init();
231}
232
233static void __init tegra_seaboard_init(void)
234{
235 /* Seaboard uses UARTD for the debug port. */
236 debug_uart_platform_data[0].membase = IO_ADDRESS(TEGRA_UARTD_BASE);
237 debug_uart_platform_data[0].mapbase = TEGRA_UARTD_BASE;
238 debug_uart_platform_data[0].irq = INT_UARTD;
239
240 seaboard_common_init();
241
242 seaboard_i2c_init();
243}
244
245static void __init tegra_kaen_init(void)
246{
247 /* Kaen uses UARTB for the debug port. */
248 debug_uart_platform_data[0].membase = IO_ADDRESS(TEGRA_UARTB_BASE);
249 debug_uart_platform_data[0].mapbase = TEGRA_UARTB_BASE;
250 debug_uart_platform_data[0].irq = INT_UARTB;
251
252 seaboard_audio_pdata.gpio_hp_mute = TEGRA_GPIO_KAEN_HP_MUTE;
253
254 seaboard_common_init();
255
256 seaboard_i2c_init();
257}
258
259static void __init tegra_wario_init(void)
260{
261 /* Wario uses UARTB for the debug port. */
262 debug_uart_platform_data[0].membase = IO_ADDRESS(TEGRA_UARTB_BASE);
263 debug_uart_platform_data[0].mapbase = TEGRA_UARTB_BASE;
264 debug_uart_platform_data[0].irq = INT_UARTB;
265
266 seaboard_common_init();
267
268 seaboard_i2c_init();
269}
270
271
272MACHINE_START(SEABOARD, "seaboard")
273 .atag_offset = 0x100,
274 .map_io = tegra_map_common_io,
275 .init_early = tegra20_init_early,
276 .init_irq = tegra_init_irq,
277 .handle_irq = gic_handle_irq,
278 .timer = &tegra_timer,
279 .init_machine = tegra_seaboard_init,
280 .init_late = tegra_init_late,
281 .restart = tegra_assert_system_reset,
282MACHINE_END
283
284MACHINE_START(KAEN, "kaen")
285 .atag_offset = 0x100,
286 .map_io = tegra_map_common_io,
287 .init_early = tegra20_init_early,
288 .init_irq = tegra_init_irq,
289 .handle_irq = gic_handle_irq,
290 .timer = &tegra_timer,
291 .init_machine = tegra_kaen_init,
292 .init_late = tegra_init_late,
293 .restart = tegra_assert_system_reset,
294MACHINE_END
295
296MACHINE_START(WARIO, "wario")
297 .atag_offset = 0x100,
298 .map_io = tegra_map_common_io,
299 .init_early = tegra20_init_early,
300 .init_irq = tegra_init_irq,
301 .handle_irq = gic_handle_irq,
302 .timer = &tegra_timer,
303 .init_machine = tegra_wario_init,
304 .init_late = tegra_init_late,
305 .restart = tegra_assert_system_reset,
306MACHINE_END
diff --git a/arch/arm/mach-tegra/board-seaboard.h b/arch/arm/mach-tegra/board-seaboard.h
deleted file mode 100644
index 4c45d4ca3c49..000000000000
--- a/arch/arm/mach-tegra/board-seaboard.h
+++ /dev/null
@@ -1,47 +0,0 @@
1/*
2 * arch/arm/mach-tegra/board-seaboard.h
3 *
4 * Copyright (C) 2010 Google, Inc.
5 *
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 */
16
17#ifndef _MACH_TEGRA_BOARD_SEABOARD_H
18#define _MACH_TEGRA_BOARD_SEABOARD_H
19
20#include <mach/gpio-tegra.h>
21
22#define SEABOARD_GPIO_TPS6586X(_x_) (TEGRA_NR_GPIOS + (_x_))
23#define SEABOARD_GPIO_WM8903(_x_) (SEABOARD_GPIO_TPS6586X(4) + (_x_))
24
25#define TEGRA_GPIO_SD2_CD TEGRA_GPIO_PI5
26#define TEGRA_GPIO_SD2_WP TEGRA_GPIO_PH1
27#define TEGRA_GPIO_SD2_POWER TEGRA_GPIO_PI6
28#define TEGRA_GPIO_LIDSWITCH TEGRA_GPIO_PC7
29#define TEGRA_GPIO_USB1 TEGRA_GPIO_PD0
30#define TEGRA_GPIO_POWERKEY TEGRA_GPIO_PV2
31#define TEGRA_GPIO_BACKLIGHT TEGRA_GPIO_PD4
32#define TEGRA_GPIO_LVDS_SHUTDOWN TEGRA_GPIO_PB2
33#define TEGRA_GPIO_BACKLIGHT_PWM TEGRA_GPIO_PU5
34#define TEGRA_GPIO_BACKLIGHT_VDD TEGRA_GPIO_PW0
35#define TEGRA_GPIO_EN_VDD_PNL TEGRA_GPIO_PC6
36#define TEGRA_GPIO_MAGNETOMETER TEGRA_GPIO_PN5
37#define TEGRA_GPIO_ISL29018_IRQ TEGRA_GPIO_PZ2
38#define TEGRA_GPIO_AC_ONLINE TEGRA_GPIO_PV3
39#define TEGRA_GPIO_WWAN_PWR SEABOARD_GPIO_TPS6586X(2)
40#define TEGRA_GPIO_CDC_IRQ TEGRA_GPIO_PX3
41#define TEGRA_GPIO_SPKR_EN SEABOARD_GPIO_WM8903(2)
42#define TEGRA_GPIO_HP_DET TEGRA_GPIO_PX1
43#define TEGRA_GPIO_KAEN_HP_MUTE TEGRA_GPIO_PA5
44
45void seaboard_pinmux_init(void);
46
47#endif
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-27 06:02:48 -0500