diff options
author | Ishizaki Kou <kou.ishizaki@toshiba.co.jp> | 2007-12-04 03:38:24 -0500 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2007-12-10 21:34:40 -0500 |
commit | 9858ee8ac52117cb38d7ef79b4db3382ea465a2a (patch) | |
tree | 008593333b2430af6398f7ec16f7f58b9e70d3d5 /arch | |
parent | c7a3f93d00726b9c51b2517ddfa4767422e9e631 (diff) |
[POWERPC] celleb: Add support for native CBE
This adds support for native CBE on Celleb, that is, without the BEAT
hypervisor. Many codes in platforms/cell/ are used in native CBE
environment.
Signed-off-by: Kou Ishizaki <Kou.Ishizaki@toshiba.co.jp>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/powerpc/platforms/cell/iommu.c | 4 | ||||
-rw-r--r-- | arch/powerpc/platforms/celleb/Kconfig | 2 | ||||
-rw-r--r-- | arch/powerpc/platforms/celleb/iommu.c | 3 | ||||
-rw-r--r-- | arch/powerpc/platforms/celleb/setup.c | 99 |
4 files changed, 85 insertions, 23 deletions
diff --git a/arch/powerpc/platforms/cell/iommu.c b/arch/powerpc/platforms/cell/iommu.c index faabc3fdc130..b465494cc24c 100644 --- a/arch/powerpc/platforms/cell/iommu.c +++ b/arch/powerpc/platforms/cell/iommu.c | |||
@@ -34,6 +34,7 @@ | |||
34 | #include <asm/udbg.h> | 34 | #include <asm/udbg.h> |
35 | #include <asm/of_platform.h> | 35 | #include <asm/of_platform.h> |
36 | #include <asm/lmb.h> | 36 | #include <asm/lmb.h> |
37 | #include <asm/firmware.h> | ||
37 | #include <asm/cell-regs.h> | 38 | #include <asm/cell-regs.h> |
38 | 39 | ||
39 | #include "interrupt.h" | 40 | #include "interrupt.h" |
@@ -699,7 +700,8 @@ static int __init cell_iommu_init(void) | |||
699 | { | 700 | { |
700 | struct device_node *np; | 701 | struct device_node *np; |
701 | 702 | ||
702 | if (!machine_is(cell)) | 703 | if ((!machine_is(cell) && !machine_is(celleb)) || |
704 | firmware_has_feature(FW_FEATURE_LPAR)) | ||
703 | return -ENODEV; | 705 | return -ENODEV; |
704 | 706 | ||
705 | /* If IOMMU is disabled or we have little enough RAM to not need | 707 | /* If IOMMU is disabled or we have little enough RAM to not need |
diff --git a/arch/powerpc/platforms/celleb/Kconfig b/arch/powerpc/platforms/celleb/Kconfig index 04748d410fc9..372891edcdd2 100644 --- a/arch/powerpc/platforms/celleb/Kconfig +++ b/arch/powerpc/platforms/celleb/Kconfig | |||
@@ -2,6 +2,8 @@ config PPC_CELLEB | |||
2 | bool "Toshiba's Cell Reference Set 'Celleb' Architecture" | 2 | bool "Toshiba's Cell Reference Set 'Celleb' Architecture" |
3 | depends on PPC_MULTIPLATFORM && PPC64 | 3 | depends on PPC_MULTIPLATFORM && PPC64 |
4 | select PPC_CELL | 4 | select PPC_CELL |
5 | select PPC_CELL_NATIVE | ||
6 | select PPC_RTAS | ||
5 | select PPC_INDIRECT_IO | 7 | select PPC_INDIRECT_IO |
6 | select PPC_OF_PLATFORM_PCI | 8 | select PPC_OF_PLATFORM_PCI |
7 | select HAS_TXX9_SERIAL | 9 | select HAS_TXX9_SERIAL |
diff --git a/arch/powerpc/platforms/celleb/iommu.c b/arch/powerpc/platforms/celleb/iommu.c index 755d869d8553..287450a07c41 100644 --- a/arch/powerpc/platforms/celleb/iommu.c +++ b/arch/powerpc/platforms/celleb/iommu.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <linux/pci.h> | 24 | #include <linux/pci.h> |
25 | 25 | ||
26 | #include <asm/of_platform.h> | 26 | #include <asm/of_platform.h> |
27 | #include <asm/firmware.h> | ||
27 | 28 | ||
28 | #include "beat_wrapper.h" | 29 | #include "beat_wrapper.h" |
29 | 30 | ||
@@ -91,7 +92,7 @@ static struct notifier_block celleb_of_bus_notifier = { | |||
91 | 92 | ||
92 | static int __init celleb_init_iommu(void) | 93 | static int __init celleb_init_iommu(void) |
93 | { | 94 | { |
94 | if (!machine_is(celleb)) | 95 | if (!firmware_has_feature(FW_FEATURE_BEAT)) |
95 | return -ENODEV; | 96 | return -ENODEV; |
96 | 97 | ||
97 | celleb_init_direct_mapping(); | 98 | celleb_init_direct_mapping(); |
diff --git a/arch/powerpc/platforms/celleb/setup.c b/arch/powerpc/platforms/celleb/setup.c index ddfb35ae741f..5a3f73478f4b 100644 --- a/arch/powerpc/platforms/celleb/setup.c +++ b/arch/powerpc/platforms/celleb/setup.c | |||
@@ -53,11 +53,16 @@ | |||
53 | #include <asm/spu_priv1.h> | 53 | #include <asm/spu_priv1.h> |
54 | #include <asm/firmware.h> | 54 | #include <asm/firmware.h> |
55 | #include <asm/of_platform.h> | 55 | #include <asm/of_platform.h> |
56 | #include <asm/rtas.h> | ||
57 | #include <asm/cell-regs.h> | ||
56 | 58 | ||
57 | #include "interrupt.h" | 59 | #include "interrupt.h" |
58 | #include "beat_wrapper.h" | 60 | #include "beat_wrapper.h" |
59 | #include "beat.h" | 61 | #include "beat.h" |
60 | #include "pci.h" | 62 | #include "pci.h" |
63 | #include "../cell/interrupt.h" | ||
64 | #include "../cell/pervasive.h" | ||
65 | #include "../cell/ras.h" | ||
61 | 66 | ||
62 | static char celleb_machine_type[128] = "Celleb"; | 67 | static char celleb_machine_type[128] = "Celleb"; |
63 | 68 | ||
@@ -88,16 +93,74 @@ static void celleb_progress(char *s, unsigned short hex) | |||
88 | printk("*** %04x : %s\n", hex, s ? s : ""); | 93 | printk("*** %04x : %s\n", hex, s ? s : ""); |
89 | } | 94 | } |
90 | 95 | ||
91 | static void __init celleb_setup_arch(void) | 96 | static void __init celleb_init_IRQ_native(void) |
97 | { | ||
98 | iic_init_IRQ(); | ||
99 | spider_init_IRQ(); | ||
100 | } | ||
101 | |||
102 | static void __init celleb_setup_arch_beat(void) | ||
92 | { | 103 | { |
104 | ppc_md.restart = beat_restart; | ||
105 | ppc_md.power_off = beat_power_off; | ||
106 | ppc_md.halt = beat_halt; | ||
107 | ppc_md.get_rtc_time = beat_get_rtc_time; | ||
108 | ppc_md.set_rtc_time = beat_set_rtc_time; | ||
109 | ppc_md.power_save = beat_power_save; | ||
110 | ppc_md.nvram_size = beat_nvram_get_size; | ||
111 | ppc_md.nvram_read = beat_nvram_read; | ||
112 | ppc_md.nvram_write = beat_nvram_write; | ||
113 | ppc_md.set_dabr = beat_set_xdabr; | ||
114 | ppc_md.init_IRQ = beatic_init_IRQ; | ||
115 | ppc_md.get_irq = beatic_get_irq; | ||
116 | #ifdef CONFIG_KEXEC | ||
117 | ppc_md.kexec_cpu_down = beat_kexec_cpu_down; | ||
118 | #endif | ||
119 | |||
93 | #ifdef CONFIG_SPU_BASE | 120 | #ifdef CONFIG_SPU_BASE |
94 | spu_priv1_ops = &spu_priv1_beat_ops; | 121 | spu_priv1_ops = &spu_priv1_beat_ops; |
95 | spu_management_ops = &spu_management_of_ops; | 122 | spu_management_ops = &spu_management_of_ops; |
96 | #endif | 123 | #endif |
97 | 124 | ||
98 | #ifdef CONFIG_SMP | 125 | #ifdef CONFIG_SMP |
99 | smp_init_celleb(); | 126 | smp_init_celleb(); |
100 | #endif | 127 | #endif |
128 | } | ||
129 | |||
130 | static void __init celleb_setup_arch_native(void) | ||
131 | { | ||
132 | ppc_md.restart = rtas_restart; | ||
133 | ppc_md.power_off = rtas_power_off; | ||
134 | ppc_md.halt = rtas_halt; | ||
135 | ppc_md.get_boot_time = rtas_get_boot_time; | ||
136 | ppc_md.get_rtc_time = rtas_get_rtc_time; | ||
137 | ppc_md.set_rtc_time = rtas_set_rtc_time; | ||
138 | ppc_md.init_IRQ = celleb_init_IRQ_native; | ||
139 | |||
140 | #ifdef CONFIG_SPU_BASE | ||
141 | spu_priv1_ops = &spu_priv1_mmio_ops; | ||
142 | spu_management_ops = &spu_management_of_ops; | ||
143 | #endif | ||
144 | |||
145 | cbe_regs_init(); | ||
146 | |||
147 | #ifdef CONFIG_CBE_RAS | ||
148 | cbe_ras_init(); | ||
149 | #endif | ||
150 | |||
151 | #ifdef CONFIG_SMP | ||
152 | smp_init_cell(); | ||
153 | #endif | ||
154 | |||
155 | cbe_pervasive_init(); | ||
156 | } | ||
157 | |||
158 | static void __init celleb_setup_arch(void) | ||
159 | { | ||
160 | if (firmware_has_feature(FW_FEATURE_BEAT)) | ||
161 | celleb_setup_arch_beat(); | ||
162 | else | ||
163 | celleb_setup_arch_native(); | ||
101 | 164 | ||
102 | /* init to some ~sane value until calibrate_delay() runs */ | 165 | /* init to some ~sane value until calibrate_delay() runs */ |
103 | loops_per_jiffy = 50000000; | 166 | loops_per_jiffy = 50000000; |
@@ -111,12 +174,19 @@ static int __init celleb_probe(void) | |||
111 | { | 174 | { |
112 | unsigned long root = of_get_flat_dt_root(); | 175 | unsigned long root = of_get_flat_dt_root(); |
113 | 176 | ||
114 | if (!of_flat_dt_is_compatible(root, "Beat")) | 177 | if (of_flat_dt_is_compatible(root, "Beat")) { |
115 | return 0; | 178 | powerpc_firmware_features |= FW_FEATURE_CELLEB_ALWAYS |
179 | | FW_FEATURE_BEAT | FW_FEATURE_LPAR; | ||
180 | hpte_init_beat_v3(); | ||
181 | return 1; | ||
182 | } | ||
183 | if (of_flat_dt_is_compatible(root, "TOSHIBA,Celleb")) { | ||
184 | powerpc_firmware_features |= FW_FEATURE_CELLEB_ALWAYS; | ||
185 | hpte_init_native(); | ||
186 | return 1; | ||
187 | } | ||
116 | 188 | ||
117 | powerpc_firmware_features |= FW_FEATURE_CELLEB_POSSIBLE; | 189 | return 0; |
118 | hpte_init_beat_v3(); | ||
119 | return 1; | ||
120 | } | 190 | } |
121 | 191 | ||
122 | static struct of_device_id celleb_bus_ids[] __initdata = { | 192 | static struct of_device_id celleb_bus_ids[] __initdata = { |
@@ -144,24 +214,11 @@ define_machine(celleb) { | |||
144 | .probe = celleb_probe, | 214 | .probe = celleb_probe, |
145 | .setup_arch = celleb_setup_arch, | 215 | .setup_arch = celleb_setup_arch, |
146 | .show_cpuinfo = celleb_show_cpuinfo, | 216 | .show_cpuinfo = celleb_show_cpuinfo, |
147 | .restart = beat_restart, | ||
148 | .power_off = beat_power_off, | ||
149 | .halt = beat_halt, | ||
150 | .get_rtc_time = beat_get_rtc_time, | ||
151 | .set_rtc_time = beat_set_rtc_time, | ||
152 | .calibrate_decr = generic_calibrate_decr, | 217 | .calibrate_decr = generic_calibrate_decr, |
153 | .progress = celleb_progress, | 218 | .progress = celleb_progress, |
154 | .power_save = beat_power_save, | ||
155 | .nvram_size = beat_nvram_get_size, | ||
156 | .nvram_read = beat_nvram_read, | ||
157 | .nvram_write = beat_nvram_write, | ||
158 | .set_dabr = beat_set_xdabr, | ||
159 | .init_IRQ = beatic_init_IRQ, | ||
160 | .get_irq = beatic_get_irq, | ||
161 | .pci_probe_mode = celleb_pci_probe_mode, | 219 | .pci_probe_mode = celleb_pci_probe_mode, |
162 | .pci_setup_phb = celleb_setup_phb, | 220 | .pci_setup_phb = celleb_setup_phb, |
163 | #ifdef CONFIG_KEXEC | 221 | #ifdef CONFIG_KEXEC |
164 | .kexec_cpu_down = beat_kexec_cpu_down, | ||
165 | .machine_kexec = default_machine_kexec, | 222 | .machine_kexec = default_machine_kexec, |
166 | .machine_kexec_prepare = default_machine_kexec_prepare, | 223 | .machine_kexec_prepare = default_machine_kexec_prepare, |
167 | .machine_crash_shutdown = default_machine_crash_shutdown, | 224 | .machine_crash_shutdown = default_machine_crash_shutdown, |