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authorLinus Torvalds <torvalds@linux-foundation.org>2013-01-08 21:53:56 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2013-01-08 21:53:56 -0500
commit974b33586b4bbbdab33c666417f9ba9ef50b62c3 (patch)
tree0ee18a21c5d9fba897903e8505b606793cb8fb27 /arch
parentca5c8a4c2aba577b4cd2f4c3c72a768a80830294 (diff)
parent434fec16948cf5afa3cba31dcb00359bdbf24758 (diff)
Merge tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson: "People are back from the holiday breaks, and it shows. Here are a bunch of fixes for a number of platforms: - A couple of small fixes for Nomadik - A larger set of changes for kirkwood/mvebu - uart driver selection, dt clocks, gpio-poweroff fixups, a few __init annotation fixes and some error handling improvement in their xor dma driver. - i.MX had a couple of minor fixes (and a critical one for flexcan2 clock setup) - MXS has a small board fix and a framebuffer bugfix - A set of fixes for Samsung Exynos, fixing default bootargs and some Exynos5440 clock issues - A set of OMAP changes including PM fixes and a few sparse warning fixups All in all a bit more positive code delta than we'd ideally want to see here, mostly from the OMAP PM changes, but nothing overly crazy." * tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (44 commits) ARM: clps711x: Fix bad merge of clockevents setup ARM: highbank: save and restore L2 cache and GIC on suspend ARM: highbank: add a power request clear ARM: highbank: fix secondary boot and hotplug ARM: highbank: fix typos with hignbank in power request functions ARM: dts: fix highbank cpu mpidr values ARM: dts: add device_type prop to cpu nodes on Calxeda platforms ARM: mx5: Fix MX53 flexcan2 clock ARM: OMAP2+: am33xx-hwmod: Fix wrongly terminated am33xx_usbss_mpu_irqs array pinctrl: mvebu: make pdma clock on dove mandatory ARM: Dove: Add pinctrl clock to DT dma: mv_xor: fix error handling for clocks dma: mv_xor: fix error handling of mv_xor_channel_add() arm: mvebu: Add missing ; for cpu node. arm: mvebu: Armada XP MV78230 has only three Ethernet interfaces arm: mvebu: Armada XP MV78230 has two cores, not one clk: mvebu: Remove inappropriate __init tagging ARM: Kirkwood: Use fixed-regulator instead of board gpio call ARM: Kirkwood: Fix missing sdio clock ARM: Kirkwood: Switch TWSI1 of 88f6282 to DT clock providers ...
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/Kconfig1
-rw-r--r--arch/arm/boot/dts/armada-370-xp.dtsi6
-rw-r--r--arch/arm/boot/dts/armada-xp-mv78230.dtsi9
-rw-r--r--arch/arm/boot/dts/armada-xp-mv78260.dtsi8
-rw-r--r--arch/arm/boot/dts/armada-xp-mv78460.dtsi8
-rw-r--r--arch/arm/boot/dts/armada-xp.dtsi14
-rw-r--r--arch/arm/boot/dts/dove.dtsi1
-rw-r--r--arch/arm/boot/dts/ecx-2000.dts4
-rw-r--r--arch/arm/boot/dts/exynos4210-smdkv310.dts2
-rw-r--r--arch/arm/boot/dts/exynos5250.dtsi2
-rw-r--r--arch/arm/boot/dts/exynos5440-ssdk5440.dts2
-rw-r--r--arch/arm/boot/dts/highbank.dts20
-rw-r--r--arch/arm/boot/dts/imx23-olinuxino.dts8
-rw-r--r--arch/arm/boot/dts/imx31-bug.dts2
-rw-r--r--arch/arm/boot/dts/imx53.dtsi2
-rw-r--r--arch/arm/boot/dts/kirkwood-6282.dtsi1
-rw-r--r--arch/arm/boot/dts/kirkwood-topkick.dts17
-rw-r--r--arch/arm/boot/dts/kirkwood.dtsi1
-rw-r--r--arch/arm/configs/mvebu_defconfig4
-rw-r--r--arch/arm/mach-exynos/Kconfig2
-rw-r--r--arch/arm/mach-exynos/common.c7
-rw-r--r--arch/arm/mach-highbank/highbank.c2
-rw-r--r--arch/arm/mach-highbank/hotplug.c2
-rw-r--r--arch/arm/mach-highbank/platsmp.c12
-rw-r--r--arch/arm/mach-highbank/pm.c19
-rw-r--r--arch/arm/mach-highbank/sysregs.h23
-rw-r--r--arch/arm/mach-highbank/system.c4
-rw-r--r--arch/arm/mach-kirkwood/board-dt.c4
-rw-r--r--arch/arm/mach-kirkwood/board-usi_topkick.c4
-rw-r--r--arch/arm/mach-nomadik/board-nhk8815.c1
-rw-r--r--arch/arm/mach-nomadik/include/mach/irqs.h78
-rw-r--r--arch/arm/mach-omap1/board-ams-delta.c2
-rw-r--r--arch/arm/mach-omap1/usb.c8
-rw-r--r--arch/arm/mach-omap2/cclock3xxx_data.c2
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_33xx_data.c6
-rw-r--r--arch/arm/mach-omap2/prm2xxx.c88
-rw-r--r--arch/arm/mach-omap2/prm2xxx_3xxx.c22
-rw-r--r--arch/arm/mach-omap2/prm3xxx.c28
-rw-r--r--arch/arm/mach-omap2/prm44xx.c6
-rw-r--r--arch/arm/mach-omap2/prm44xx.h4
-rw-r--r--arch/arm/plat-omap/counter_32k.c2
-rw-r--r--arch/arm/plat-omap/sram.c2
-rw-r--r--arch/arm/plat-samsung/include/plat/cpu.h2
43 files changed, 305 insertions, 137 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index f95ba14ae3d0..ab864d9545dd 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -371,7 +371,6 @@ config ARCH_CNS3XXX
371config ARCH_CLPS711X 371config ARCH_CLPS711X
372 bool "Cirrus Logic CLPS711x/EP721x/EP731x-based" 372 bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
373 select ARCH_REQUIRE_GPIOLIB 373 select ARCH_REQUIRE_GPIOLIB
374 select ARCH_USES_GETTIMEOFFSET
375 select AUTO_ZRELADDR 374 select AUTO_ZRELADDR
376 select CLKDEV_LOOKUP 375 select CLKDEV_LOOKUP
377 select COMMON_CLK 376 select COMMON_CLK
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
index cf6c48a09eac..4c0abe85405f 100644
--- a/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -50,17 +50,19 @@
50 ranges; 50 ranges;
51 51
52 serial@d0012000 { 52 serial@d0012000 {
53 compatible = "ns16550"; 53 compatible = "snps,dw-apb-uart";
54 reg = <0xd0012000 0x100>; 54 reg = <0xd0012000 0x100>;
55 reg-shift = <2>; 55 reg-shift = <2>;
56 interrupts = <41>; 56 interrupts = <41>;
57 reg-io-width = <4>;
57 status = "disabled"; 58 status = "disabled";
58 }; 59 };
59 serial@d0012100 { 60 serial@d0012100 {
60 compatible = "ns16550"; 61 compatible = "snps,dw-apb-uart";
61 reg = <0xd0012100 0x100>; 62 reg = <0xd0012100 0x100>;
62 reg-shift = <2>; 63 reg-shift = <2>;
63 interrupts = <42>; 64 interrupts = <42>;
65 reg-io-width = <4>;
64 status = "disabled"; 66 status = "disabled";
65 }; 67 };
66 68
diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
index c45c7b4dc352..271855a6e224 100644
--- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
@@ -34,7 +34,14 @@
34 reg = <0>; 34 reg = <0>;
35 clocks = <&cpuclk 0>; 35 clocks = <&cpuclk 0>;
36 }; 36 };
37 } 37
38 cpu@1 {
39 device_type = "cpu";
40 compatible = "marvell,sheeva-v7";
41 reg = <1>;
42 clocks = <&cpuclk 1>;
43 };
44 };
38 45
39 soc { 46 soc {
40 pinctrl { 47 pinctrl {
diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
index a2aee5707377..1c1937dbce73 100644
--- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
@@ -85,5 +85,13 @@
85 #interrupts-cells = <2>; 85 #interrupts-cells = <2>;
86 interrupts = <24>; 86 interrupts = <24>;
87 }; 87 };
88
89 ethernet@d0034000 {
90 compatible = "marvell,armada-370-neta";
91 reg = <0xd0034000 0x2500>;
92 interrupts = <14>;
93 clocks = <&gateclk 1>;
94 status = "disabled";
95 };
88 }; 96 };
89}; 97};
diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
index da03a129243a..4905cf3a5ef8 100644
--- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
@@ -100,5 +100,13 @@
100 #interrupts-cells = <2>; 100 #interrupts-cells = <2>;
101 interrupts = <24>; 101 interrupts = <24>;
102 }; 102 };
103
104 ethernet@d0034000 {
105 compatible = "marvell,armada-370-neta";
106 reg = <0xd0034000 0x2500>;
107 interrupts = <14>;
108 clocks = <&gateclk 1>;
109 status = "disabled";
110 };
103 }; 111 };
104 }; 112 };
diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi
index 367aa3f94912..2e37ef101c90 100644
--- a/arch/arm/boot/dts/armada-xp.dtsi
+++ b/arch/arm/boot/dts/armada-xp.dtsi
@@ -42,17 +42,19 @@
42 42
43 soc { 43 soc {
44 serial@d0012200 { 44 serial@d0012200 {
45 compatible = "ns16550"; 45 compatible = "snps,dw-apb-uart";
46 reg = <0xd0012200 0x100>; 46 reg = <0xd0012200 0x100>;
47 reg-shift = <2>; 47 reg-shift = <2>;
48 interrupts = <43>; 48 interrupts = <43>;
49 reg-io-width = <4>;
49 status = "disabled"; 50 status = "disabled";
50 }; 51 };
51 serial@d0012300 { 52 serial@d0012300 {
52 compatible = "ns16550"; 53 compatible = "snps,dw-apb-uart";
53 reg = <0xd0012300 0x100>; 54 reg = <0xd0012300 0x100>;
54 reg-shift = <2>; 55 reg-shift = <2>;
55 interrupts = <44>; 56 interrupts = <44>;
57 reg-io-width = <4>;
56 status = "disabled"; 58 status = "disabled";
57 }; 59 };
58 60
@@ -93,14 +95,6 @@
93 status = "disabled"; 95 status = "disabled";
94 }; 96 };
95 97
96 ethernet@d0034000 {
97 compatible = "marvell,armada-370-neta";
98 reg = <0xd0034000 0x2500>;
99 interrupts = <14>;
100 clocks = <&gateclk 1>;
101 status = "disabled";
102 };
103
104 xor@d0060900 { 98 xor@d0060900 {
105 compatible = "marvell,orion-xor"; 99 compatible = "marvell,orion-xor";
106 reg = <0xd0060900 0x100 100 reg = <0xd0060900 0x100
diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi
index f3f7e9d8adca..42eac1ff3cc8 100644
--- a/arch/arm/boot/dts/dove.dtsi
+++ b/arch/arm/boot/dts/dove.dtsi
@@ -117,6 +117,7 @@
117 pinctrl: pinctrl@d0200 { 117 pinctrl: pinctrl@d0200 {
118 compatible = "marvell,dove-pinctrl"; 118 compatible = "marvell,dove-pinctrl";
119 reg = <0xd0200 0x10>; 119 reg = <0xd0200 0x10>;
120 clocks = <&gate_clk 22>;
120 }; 121 };
121 122
122 spi0: spi@10600 { 123 spi0: spi@10600 {
diff --git a/arch/arm/boot/dts/ecx-2000.dts b/arch/arm/boot/dts/ecx-2000.dts
index 46477ac1de99..139b40cc3a23 100644
--- a/arch/arm/boot/dts/ecx-2000.dts
+++ b/arch/arm/boot/dts/ecx-2000.dts
@@ -32,6 +32,7 @@
32 32
33 cpu@0 { 33 cpu@0 {
34 compatible = "arm,cortex-a15"; 34 compatible = "arm,cortex-a15";
35 device_type = "cpu";
35 reg = <0>; 36 reg = <0>;
36 clocks = <&a9pll>; 37 clocks = <&a9pll>;
37 clock-names = "cpu"; 38 clock-names = "cpu";
@@ -39,6 +40,7 @@
39 40
40 cpu@1 { 41 cpu@1 {
41 compatible = "arm,cortex-a15"; 42 compatible = "arm,cortex-a15";
43 device_type = "cpu";
42 reg = <1>; 44 reg = <1>;
43 clocks = <&a9pll>; 45 clocks = <&a9pll>;
44 clock-names = "cpu"; 46 clock-names = "cpu";
@@ -46,6 +48,7 @@
46 48
47 cpu@2 { 49 cpu@2 {
48 compatible = "arm,cortex-a15"; 50 compatible = "arm,cortex-a15";
51 device_type = "cpu";
49 reg = <2>; 52 reg = <2>;
50 clocks = <&a9pll>; 53 clocks = <&a9pll>;
51 clock-names = "cpu"; 54 clock-names = "cpu";
@@ -53,6 +56,7 @@
53 56
54 cpu@3 { 57 cpu@3 {
55 compatible = "arm,cortex-a15"; 58 compatible = "arm,cortex-a15";
59 device_type = "cpu";
56 reg = <3>; 60 reg = <3>;
57 clocks = <&a9pll>; 61 clocks = <&a9pll>;
58 clock-names = "cpu"; 62 clock-names = "cpu";
diff --git a/arch/arm/boot/dts/exynos4210-smdkv310.dts b/arch/arm/boot/dts/exynos4210-smdkv310.dts
index 9b23a8255e39..f63490707f3a 100644
--- a/arch/arm/boot/dts/exynos4210-smdkv310.dts
+++ b/arch/arm/boot/dts/exynos4210-smdkv310.dts
@@ -26,7 +26,7 @@
26 }; 26 };
27 27
28 chosen { 28 chosen {
29 bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC2,115200 init=/linuxrc"; 29 bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc";
30 }; 30 };
31 31
32 sdhci@12530000 { 32 sdhci@12530000 {
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 2e3b6efaf1a2..3acf594ea60b 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -574,7 +574,7 @@
574 574
575 hdmi { 575 hdmi {
576 compatible = "samsung,exynos5-hdmi"; 576 compatible = "samsung,exynos5-hdmi";
577 reg = <0x14530000 0x100000>; 577 reg = <0x14530000 0x70000>;
578 interrupts = <0 95 0>; 578 interrupts = <0 95 0>;
579 }; 579 };
580 580
diff --git a/arch/arm/boot/dts/exynos5440-ssdk5440.dts b/arch/arm/boot/dts/exynos5440-ssdk5440.dts
index 921c83cf694f..81e2c964a900 100644
--- a/arch/arm/boot/dts/exynos5440-ssdk5440.dts
+++ b/arch/arm/boot/dts/exynos5440-ssdk5440.dts
@@ -21,7 +21,7 @@
21 }; 21 };
22 22
23 chosen { 23 chosen {
24 bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x81000000,8M console=ttySAC2,115200 init=/linuxrc"; 24 bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x81000000,8M console=ttySAC0,115200 init=/linuxrc";
25 }; 25 };
26 26
27 spi { 27 spi {
diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts
index a9ae5d32e80d..5927a8df5625 100644
--- a/arch/arm/boot/dts/highbank.dts
+++ b/arch/arm/boot/dts/highbank.dts
@@ -30,33 +30,37 @@
30 #address-cells = <1>; 30 #address-cells = <1>;
31 #size-cells = <0>; 31 #size-cells = <0>;
32 32
33 cpu@0 { 33 cpu@900 {
34 compatible = "arm,cortex-a9"; 34 compatible = "arm,cortex-a9";
35 reg = <0>; 35 device_type = "cpu";
36 reg = <0x900>;
36 next-level-cache = <&L2>; 37 next-level-cache = <&L2>;
37 clocks = <&a9pll>; 38 clocks = <&a9pll>;
38 clock-names = "cpu"; 39 clock-names = "cpu";
39 }; 40 };
40 41
41 cpu@1 { 42 cpu@901 {
42 compatible = "arm,cortex-a9"; 43 compatible = "arm,cortex-a9";
43 reg = <1>; 44 device_type = "cpu";
45 reg = <0x901>;
44 next-level-cache = <&L2>; 46 next-level-cache = <&L2>;
45 clocks = <&a9pll>; 47 clocks = <&a9pll>;
46 clock-names = "cpu"; 48 clock-names = "cpu";
47 }; 49 };
48 50
49 cpu@2 { 51 cpu@902 {
50 compatible = "arm,cortex-a9"; 52 compatible = "arm,cortex-a9";
51 reg = <2>; 53 device_type = "cpu";
54 reg = <0x902>;
52 next-level-cache = <&L2>; 55 next-level-cache = <&L2>;
53 clocks = <&a9pll>; 56 clocks = <&a9pll>;
54 clock-names = "cpu"; 57 clock-names = "cpu";
55 }; 58 };
56 59
57 cpu@3 { 60 cpu@903 {
58 compatible = "arm,cortex-a9"; 61 compatible = "arm,cortex-a9";
59 reg = <3>; 62 device_type = "cpu";
63 reg = <0x903>;
60 next-level-cache = <&L2>; 64 next-level-cache = <&L2>;
61 clocks = <&a9pll>; 65 clocks = <&a9pll>;
62 clock-names = "cpu"; 66 clock-names = "cpu";
diff --git a/arch/arm/boot/dts/imx23-olinuxino.dts b/arch/arm/boot/dts/imx23-olinuxino.dts
index 7c43b8e70b9f..e7484e4ea659 100644
--- a/arch/arm/boot/dts/imx23-olinuxino.dts
+++ b/arch/arm/boot/dts/imx23-olinuxino.dts
@@ -39,17 +39,17 @@
39 hog_pins_a: hog@0 { 39 hog_pins_a: hog@0 {
40 reg = <0>; 40 reg = <0>;
41 fsl,pinmux-ids = < 41 fsl,pinmux-ids = <
42 0x2013 /* MX23_PAD_SSP1_DETECT__GPIO_2_1 */ 42 0x0113 /* MX23_PAD_GPMI_ALE__GPIO_0_17 */
43 >; 43 >;
44 fsl,drive-strength = <0>; 44 fsl,drive-strength = <0>;
45 fsl,voltage = <1>; 45 fsl,voltage = <1>;
46 fsl,pull-up = <0>; 46 fsl,pull-up = <0>;
47 }; 47 };
48 48
49 led_pin_gpio0_17: led_gpio0_17@0 { 49 led_pin_gpio2_1: led_gpio2_1@0 {
50 reg = <0>; 50 reg = <0>;
51 fsl,pinmux-ids = < 51 fsl,pinmux-ids = <
52 0x0113 /* MX23_PAD_GPMI_ALE__GPIO_0_17 */ 52 0x2013 /* MX23_PAD_SSP1_DETECT__GPIO_2_1 */
53 >; 53 >;
54 fsl,drive-strength = <0>; 54 fsl,drive-strength = <0>;
55 fsl,voltage = <1>; 55 fsl,voltage = <1>;
@@ -110,7 +110,7 @@
110 leds { 110 leds {
111 compatible = "gpio-leds"; 111 compatible = "gpio-leds";
112 pinctrl-names = "default"; 112 pinctrl-names = "default";
113 pinctrl-0 = <&led_pin_gpio0_17>; 113 pinctrl-0 = <&led_pin_gpio2_1>;
114 114
115 user { 115 user {
116 label = "green"; 116 label = "green";
diff --git a/arch/arm/boot/dts/imx31-bug.dts b/arch/arm/boot/dts/imx31-bug.dts
index 24731cb78e8e..7f67402328d3 100644
--- a/arch/arm/boot/dts/imx31-bug.dts
+++ b/arch/arm/boot/dts/imx31-bug.dts
@@ -14,7 +14,7 @@
14 14
15/ { 15/ {
16 model = "Buglabs i.MX31 Bug 1.x"; 16 model = "Buglabs i.MX31 Bug 1.x";
17 compatible = "fsl,imx31-bug", "fsl,imx31"; 17 compatible = "buglabs,imx31-bug", "fsl,imx31";
18 18
19 memory { 19 memory {
20 reg = <0x80000000 0x8000000>; /* 128M */ 20 reg = <0x80000000 0x8000000>; /* 128M */
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index 552aed4ff982..edc3f1eb6699 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -492,7 +492,7 @@
492 compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan"; 492 compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan";
493 reg = <0x53fcc000 0x4000>; 493 reg = <0x53fcc000 0x4000>;
494 interrupts = <83>; 494 interrupts = <83>;
495 clocks = <&clks 158>, <&clks 157>; 495 clocks = <&clks 87>, <&clks 86>;
496 clock-names = "ipg", "per"; 496 clock-names = "ipg", "per";
497 status = "disabled"; 497 status = "disabled";
498 }; 498 };
diff --git a/arch/arm/boot/dts/kirkwood-6282.dtsi b/arch/arm/boot/dts/kirkwood-6282.dtsi
index 9ae2004d5675..4ccea2130a6c 100644
--- a/arch/arm/boot/dts/kirkwood-6282.dtsi
+++ b/arch/arm/boot/dts/kirkwood-6282.dtsi
@@ -39,6 +39,7 @@
39 #size-cells = <0>; 39 #size-cells = <0>;
40 interrupts = <32>; 40 interrupts = <32>;
41 clock-frequency = <100000>; 41 clock-frequency = <100000>;
42 clocks = <&gate_clk 7>;
42 status = "disabled"; 43 status = "disabled";
43 }; 44 };
44 }; 45 };
diff --git a/arch/arm/boot/dts/kirkwood-topkick.dts b/arch/arm/boot/dts/kirkwood-topkick.dts
index c0de5a7f660d..cd15452a52a6 100644
--- a/arch/arm/boot/dts/kirkwood-topkick.dts
+++ b/arch/arm/boot/dts/kirkwood-topkick.dts
@@ -82,4 +82,21 @@
82 gpios = <&gpio1 16 1>; 82 gpios = <&gpio1 16 1>;
83 }; 83 };
84 }; 84 };
85 regulators {
86 compatible = "simple-bus";
87 #address-cells = <1>;
88 #size-cells = <0>;
89
90 sata0_power: regulator@1 {
91 compatible = "regulator-fixed";
92 reg = <1>;
93 regulator-name = "SATA0 Power";
94 regulator-min-microvolt = <5000000>;
95 regulator-max-microvolt = <5000000>;
96 enable-active-high;
97 regulator-always-on;
98 regulator-boot-on;
99 gpio = <&gpio1 4 0>;
100 };
101 };
85}; 102};
diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi
index 7735cee4a9c6..110d6cbb795b 100644
--- a/arch/arm/boot/dts/kirkwood.dtsi
+++ b/arch/arm/boot/dts/kirkwood.dtsi
@@ -144,6 +144,7 @@
144 compatible = "marvell,orion-ehci"; 144 compatible = "marvell,orion-ehci";
145 reg = <0x50000 0x1000>; 145 reg = <0x50000 0x1000>;
146 interrupts = <19>; 146 interrupts = <19>;
147 clocks = <&gate_clk 3>;
147 status = "okay"; 148 status = "okay";
148 }; 149 };
149 150
diff --git a/arch/arm/configs/mvebu_defconfig b/arch/arm/configs/mvebu_defconfig
index a702fb345c01..b5bc96cb65a7 100644
--- a/arch/arm/configs/mvebu_defconfig
+++ b/arch/arm/configs/mvebu_defconfig
@@ -33,9 +33,7 @@ CONFIG_MVNETA=y
33CONFIG_MARVELL_PHY=y 33CONFIG_MARVELL_PHY=y
34CONFIG_SERIAL_8250=y 34CONFIG_SERIAL_8250=y
35CONFIG_SERIAL_8250_CONSOLE=y 35CONFIG_SERIAL_8250_CONSOLE=y
36CONFIG_SERIAL_OF_PLATFORM=y 36CONFIG_SERIAL_8250_DW=y
37CONFIG_I2C=y
38CONFIG_I2C_MV64XXX=y
39CONFIG_GPIOLIB=y 37CONFIG_GPIOLIB=y
40CONFIG_GPIO_SYSFS=y 38CONFIG_GPIO_SYSFS=y
41# CONFIG_USB_SUPPORT is not set 39# CONFIG_USB_SUPPORT is not set
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 91d5b6f1d5af..e103c290bc9e 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -74,6 +74,8 @@ config SOC_EXYNOS5440
74 depends on ARCH_EXYNOS5 74 depends on ARCH_EXYNOS5
75 select ARM_ARCH_TIMER 75 select ARM_ARCH_TIMER
76 select AUTO_ZRELADDR 76 select AUTO_ZRELADDR
77 select PINCTRL
78 select PINCTRL_EXYNOS5440
77 help 79 help
78 Enable EXYNOS5440 SoC support 80 Enable EXYNOS5440 SoC support
79 81
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index d6d0dc651089..1a89824a5f78 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -424,11 +424,18 @@ static void __init exynos5_init_clocks(int xtal)
424{ 424{
425 printk(KERN_DEBUG "%s: initializing clocks\n", __func__); 425 printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
426 426
427 /* EXYNOS5440 can support only common clock framework */
428
429 if (soc_is_exynos5440())
430 return;
431
432#ifdef CONFIG_SOC_EXYNOS5250
427 s3c24xx_register_baseclocks(xtal); 433 s3c24xx_register_baseclocks(xtal);
428 s5p_register_clocks(xtal); 434 s5p_register_clocks(xtal);
429 435
430 exynos5_register_clocks(); 436 exynos5_register_clocks();
431 exynos5_setup_clocks(); 437 exynos5_setup_clocks();
438#endif
432} 439}
433 440
434#define COMBINER_ENABLE_SET 0x0 441#define COMBINER_ENABLE_SET 0x0
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index dc248167d206..981dc1e1da51 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -135,7 +135,7 @@ static struct sys_timer highbank_timer = {
135 135
136static void highbank_power_off(void) 136static void highbank_power_off(void)
137{ 137{
138 hignbank_set_pwr_shutdown(); 138 highbank_set_pwr_shutdown();
139 139
140 while (1) 140 while (1)
141 cpu_do_idle(); 141 cpu_do_idle();
diff --git a/arch/arm/mach-highbank/hotplug.c b/arch/arm/mach-highbank/hotplug.c
index 7b60faccd551..f30c52843396 100644
--- a/arch/arm/mach-highbank/hotplug.c
+++ b/arch/arm/mach-highbank/hotplug.c
@@ -30,7 +30,7 @@ void __ref highbank_cpu_die(unsigned int cpu)
30{ 30{
31 flush_cache_all(); 31 flush_cache_all();
32 32
33 highbank_set_cpu_jump(cpu, secondary_startup); 33 highbank_set_cpu_jump(cpu, phys_to_virt(0));
34 highbank_set_core_pwr(); 34 highbank_set_core_pwr();
35 35
36 cpu_do_idle(); 36 cpu_do_idle();
diff --git a/arch/arm/mach-highbank/platsmp.c b/arch/arm/mach-highbank/platsmp.c
index 1129957f6c1d..4ecc864ac8b9 100644
--- a/arch/arm/mach-highbank/platsmp.c
+++ b/arch/arm/mach-highbank/platsmp.c
@@ -32,6 +32,7 @@ static void __cpuinit highbank_secondary_init(unsigned int cpu)
32 32
33static int __cpuinit highbank_boot_secondary(unsigned int cpu, struct task_struct *idle) 33static int __cpuinit highbank_boot_secondary(unsigned int cpu, struct task_struct *idle)
34{ 34{
35 highbank_set_cpu_jump(cpu, secondary_startup);
35 gic_raise_softirq(cpumask_of(cpu), 0); 36 gic_raise_softirq(cpumask_of(cpu), 0);
36 return 0; 37 return 0;
37} 38}
@@ -61,19 +62,8 @@ static void __init highbank_smp_init_cpus(void)
61 62
62static void __init highbank_smp_prepare_cpus(unsigned int max_cpus) 63static void __init highbank_smp_prepare_cpus(unsigned int max_cpus)
63{ 64{
64 int i;
65
66 if (scu_base_addr) 65 if (scu_base_addr)
67 scu_enable(scu_base_addr); 66 scu_enable(scu_base_addr);
68
69 /*
70 * Write the address of secondary startup into the jump table
71 * The cores are in wfi and wait until they receive a soft interrupt
72 * and a non-zero value to jump to. Then the secondary CPU branches
73 * to this address.
74 */
75 for (i = 1; i < max_cpus; i++)
76 highbank_set_cpu_jump(i, secondary_startup);
77} 67}
78 68
79struct smp_operations highbank_smp_ops __initdata = { 69struct smp_operations highbank_smp_ops __initdata = {
diff --git a/arch/arm/mach-highbank/pm.c b/arch/arm/mach-highbank/pm.c
index 74aa135966f0..04eddb4f4380 100644
--- a/arch/arm/mach-highbank/pm.c
+++ b/arch/arm/mach-highbank/pm.c
@@ -14,10 +14,12 @@
14 * this program. If not, see <http://www.gnu.org/licenses/>. 14 * this program. If not, see <http://www.gnu.org/licenses/>.
15 */ 15 */
16 16
17#include <linux/cpu_pm.h>
17#include <linux/init.h> 18#include <linux/init.h>
18#include <linux/io.h> 19#include <linux/io.h>
19#include <linux/suspend.h> 20#include <linux/suspend.h>
20 21
22#include <asm/cacheflush.h>
21#include <asm/proc-fns.h> 23#include <asm/proc-fns.h>
22#include <asm/suspend.h> 24#include <asm/suspend.h>
23 25
@@ -26,16 +28,31 @@
26 28
27static int highbank_suspend_finish(unsigned long val) 29static int highbank_suspend_finish(unsigned long val)
28{ 30{
31 outer_flush_all();
32 outer_disable();
33
34 highbank_set_pwr_suspend();
35
29 cpu_do_idle(); 36 cpu_do_idle();
37
38 highbank_clear_pwr_request();
30 return 0; 39 return 0;
31} 40}
32 41
33static int highbank_pm_enter(suspend_state_t state) 42static int highbank_pm_enter(suspend_state_t state)
34{ 43{
35 hignbank_set_pwr_suspend(); 44 cpu_pm_enter();
45 cpu_cluster_pm_enter();
46
36 highbank_set_cpu_jump(0, cpu_resume); 47 highbank_set_cpu_jump(0, cpu_resume);
37 cpu_suspend(0, highbank_suspend_finish); 48 cpu_suspend(0, highbank_suspend_finish);
38 49
50 cpu_cluster_pm_exit();
51 cpu_pm_exit();
52
53 highbank_smc1(0x102, 0x1);
54 if (scu_base_addr)
55 scu_enable(scu_base_addr);
39 return 0; 56 return 0;
40} 57}
41 58
diff --git a/arch/arm/mach-highbank/sysregs.h b/arch/arm/mach-highbank/sysregs.h
index e13e8ea7c6cb..70af9d13fcef 100644
--- a/arch/arm/mach-highbank/sysregs.h
+++ b/arch/arm/mach-highbank/sysregs.h
@@ -44,28 +44,43 @@ static inline void highbank_set_core_pwr(void)
44 writel_relaxed(1, sregs_base + SREG_CPU_PWR_CTRL(cpu)); 44 writel_relaxed(1, sregs_base + SREG_CPU_PWR_CTRL(cpu));
45} 45}
46 46
47static inline void hignbank_set_pwr_suspend(void) 47static inline void highbank_clear_core_pwr(void)
48{
49 int cpu = cpu_logical_map(smp_processor_id());
50 if (scu_base_addr)
51 scu_power_mode(scu_base_addr, SCU_PM_NORMAL);
52 else
53 writel_relaxed(0, sregs_base + SREG_CPU_PWR_CTRL(cpu));
54}
55
56static inline void highbank_set_pwr_suspend(void)
48{ 57{
49 writel(HB_PWR_SUSPEND, sregs_base + HB_SREG_A9_PWR_REQ); 58 writel(HB_PWR_SUSPEND, sregs_base + HB_SREG_A9_PWR_REQ);
50 highbank_set_core_pwr(); 59 highbank_set_core_pwr();
51} 60}
52 61
53static inline void hignbank_set_pwr_shutdown(void) 62static inline void highbank_set_pwr_shutdown(void)
54{ 63{
55 writel(HB_PWR_SHUTDOWN, sregs_base + HB_SREG_A9_PWR_REQ); 64 writel(HB_PWR_SHUTDOWN, sregs_base + HB_SREG_A9_PWR_REQ);
56 highbank_set_core_pwr(); 65 highbank_set_core_pwr();
57} 66}
58 67
59static inline void hignbank_set_pwr_soft_reset(void) 68static inline void highbank_set_pwr_soft_reset(void)
60{ 69{
61 writel(HB_PWR_SOFT_RESET, sregs_base + HB_SREG_A9_PWR_REQ); 70 writel(HB_PWR_SOFT_RESET, sregs_base + HB_SREG_A9_PWR_REQ);
62 highbank_set_core_pwr(); 71 highbank_set_core_pwr();
63} 72}
64 73
65static inline void hignbank_set_pwr_hard_reset(void) 74static inline void highbank_set_pwr_hard_reset(void)
66{ 75{
67 writel(HB_PWR_HARD_RESET, sregs_base + HB_SREG_A9_PWR_REQ); 76 writel(HB_PWR_HARD_RESET, sregs_base + HB_SREG_A9_PWR_REQ);
68 highbank_set_core_pwr(); 77 highbank_set_core_pwr();
69} 78}
70 79
80static inline void highbank_clear_pwr_request(void)
81{
82 writel(~0UL, sregs_base + HB_SREG_A9_PWR_REQ);
83 highbank_clear_core_pwr();
84}
85
71#endif 86#endif
diff --git a/arch/arm/mach-highbank/system.c b/arch/arm/mach-highbank/system.c
index aed96ad9bd4a..37d8384dcf19 100644
--- a/arch/arm/mach-highbank/system.c
+++ b/arch/arm/mach-highbank/system.c
@@ -22,9 +22,9 @@
22void highbank_restart(char mode, const char *cmd) 22void highbank_restart(char mode, const char *cmd)
23{ 23{
24 if (mode == 'h') 24 if (mode == 'h')
25 hignbank_set_pwr_hard_reset(); 25 highbank_set_pwr_hard_reset();
26 else 26 else
27 hignbank_set_pwr_soft_reset(); 27 highbank_set_pwr_soft_reset();
28 28
29 while (1) 29 while (1)
30 cpu_do_idle(); 30 cpu_do_idle();
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
index ff4150a2ad05..de4fd2bb1e27 100644
--- a/arch/arm/mach-kirkwood/board-dt.c
+++ b/arch/arm/mach-kirkwood/board-dt.c
@@ -67,6 +67,10 @@ static void __init kirkwood_legacy_clk_init(void)
67 orion_clkdev_add(NULL, "mv643xx_eth_port.1", 67 orion_clkdev_add(NULL, "mv643xx_eth_port.1",
68 of_clk_get_from_provider(&clkspec)); 68 of_clk_get_from_provider(&clkspec));
69 69
70 clkspec.args[0] = CGC_BIT_SDIO;
71 orion_clkdev_add(NULL, "mvsdio",
72 of_clk_get_from_provider(&clkspec));
73
70} 74}
71 75
72static void __init kirkwood_of_clk_init(void) 76static void __init kirkwood_of_clk_init(void)
diff --git a/arch/arm/mach-kirkwood/board-usi_topkick.c b/arch/arm/mach-kirkwood/board-usi_topkick.c
index 15e69fcde9f4..23d2dd1b1b1e 100644
--- a/arch/arm/mach-kirkwood/board-usi_topkick.c
+++ b/arch/arm/mach-kirkwood/board-usi_topkick.c
@@ -64,8 +64,6 @@ static unsigned int topkick_mpp_config[] __initdata = {
64 0 64 0
65}; 65};
66 66
67#define TOPKICK_SATA0_PWR_ENABLE 36
68
69void __init usi_topkick_init(void) 67void __init usi_topkick_init(void)
70{ 68{
71 /* 69 /*
@@ -73,8 +71,6 @@ void __init usi_topkick_init(void)
73 */ 71 */
74 kirkwood_mpp_conf(topkick_mpp_config); 72 kirkwood_mpp_conf(topkick_mpp_config);
75 73
76 /* SATA0 power enable */
77 gpio_set_value(TOPKICK_SATA0_PWR_ENABLE, 1);
78 74
79 kirkwood_ge00_init(&topkick_ge00_data); 75 kirkwood_ge00_init(&topkick_ge00_data);
80 kirkwood_sdio_init(&topkick_mvsdio_data); 76 kirkwood_sdio_init(&topkick_mvsdio_data);
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c
index 98167a4319f7..9f19069248da 100644
--- a/arch/arm/mach-nomadik/board-nhk8815.c
+++ b/arch/arm/mach-nomadik/board-nhk8815.c
@@ -27,7 +27,6 @@
27#include <linux/pinctrl/machine.h> 27#include <linux/pinctrl/machine.h>
28#include <linux/platform_data/pinctrl-nomadik.h> 28#include <linux/platform_data/pinctrl-nomadik.h>
29#include <linux/platform_data/clocksource-nomadik-mtu.h> 29#include <linux/platform_data/clocksource-nomadik-mtu.h>
30#include <linux/platform_data/mtd-nomadik-nand.h>
31#include <asm/hardware/vic.h> 30#include <asm/hardware/vic.h>
32#include <asm/sizes.h> 31#include <asm/sizes.h>
33#include <asm/mach-types.h> 32#include <asm/mach-types.h>
diff --git a/arch/arm/mach-nomadik/include/mach/irqs.h b/arch/arm/mach-nomadik/include/mach/irqs.h
index b549d0571548..215f8cdb4004 100644
--- a/arch/arm/mach-nomadik/include/mach/irqs.h
+++ b/arch/arm/mach-nomadik/include/mach/irqs.h
@@ -22,49 +22,49 @@
22 22
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24 24
25#define IRQ_VIC_START 1 /* first VIC interrupt is 1 */ 25#define IRQ_VIC_START 32 /* first VIC interrupt is 1 */
26 26
27/* 27/*
28 * Interrupt numbers generic for all Nomadik Chip cuts 28 * Interrupt numbers generic for all Nomadik Chip cuts
29 */ 29 */
30#define IRQ_WATCHDOG 1 30#define IRQ_WATCHDOG (IRQ_VIC_START+0)
31#define IRQ_SOFTINT 2 31#define IRQ_SOFTINT (IRQ_VIC_START+1)
32#define IRQ_CRYPTO 3 32#define IRQ_CRYPTO (IRQ_VIC_START+2)
33#define IRQ_OWM 4 33#define IRQ_OWM (IRQ_VIC_START+3)
34#define IRQ_MTU0 5 34#define IRQ_MTU0 (IRQ_VIC_START+4)
35#define IRQ_MTU1 6 35#define IRQ_MTU1 (IRQ_VIC_START+5)
36#define IRQ_GPIO0 7 36#define IRQ_GPIO0 (IRQ_VIC_START+6)
37#define IRQ_GPIO1 8 37#define IRQ_GPIO1 (IRQ_VIC_START+7)
38#define IRQ_GPIO2 9 38#define IRQ_GPIO2 (IRQ_VIC_START+8)
39#define IRQ_GPIO3 10 39#define IRQ_GPIO3 (IRQ_VIC_START+9)
40#define IRQ_RTC_RTT 11 40#define IRQ_RTC_RTT (IRQ_VIC_START+10)
41#define IRQ_SSP 12 41#define IRQ_SSP (IRQ_VIC_START+11)
42#define IRQ_UART0 13 42#define IRQ_UART0 (IRQ_VIC_START+12)
43#define IRQ_DMA1 14 43#define IRQ_DMA1 (IRQ_VIC_START+13)
44#define IRQ_CLCD_MDIF 15 44#define IRQ_CLCD_MDIF (IRQ_VIC_START+14)
45#define IRQ_DMA0 16 45#define IRQ_DMA0 (IRQ_VIC_START+15)
46#define IRQ_PWRFAIL 17 46#define IRQ_PWRFAIL (IRQ_VIC_START+16)
47#define IRQ_UART1 18 47#define IRQ_UART1 (IRQ_VIC_START+17)
48#define IRQ_FIRDA 19 48#define IRQ_FIRDA (IRQ_VIC_START+18)
49#define IRQ_MSP0 20 49#define IRQ_MSP0 (IRQ_VIC_START+19)
50#define IRQ_I2C0 21 50#define IRQ_I2C0 (IRQ_VIC_START+20)
51#define IRQ_I2C1 22 51#define IRQ_I2C1 (IRQ_VIC_START+21)
52#define IRQ_SDMMC 23 52#define IRQ_SDMMC (IRQ_VIC_START+22)
53#define IRQ_USBOTG 24 53#define IRQ_USBOTG (IRQ_VIC_START+23)
54#define IRQ_SVA_IT0 25 54#define IRQ_SVA_IT0 (IRQ_VIC_START+24)
55#define IRQ_SVA_IT1 26 55#define IRQ_SVA_IT1 (IRQ_VIC_START+25)
56#define IRQ_SAA_IT0 27 56#define IRQ_SAA_IT0 (IRQ_VIC_START+26)
57#define IRQ_SAA_IT1 28 57#define IRQ_SAA_IT1 (IRQ_VIC_START+27)
58#define IRQ_UART2 29 58#define IRQ_UART2 (IRQ_VIC_START+28)
59#define IRQ_MSP2 30 59#define IRQ_MSP2 (IRQ_VIC_START+29)
60#define IRQ_L2CC 49 60#define IRQ_L2CC (IRQ_VIC_START+30)
61#define IRQ_HPI 50 61#define IRQ_HPI (IRQ_VIC_START+31)
62#define IRQ_SKE 51 62#define IRQ_SKE (IRQ_VIC_START+32)
63#define IRQ_KP 52 63#define IRQ_KP (IRQ_VIC_START+33)
64#define IRQ_MEMST 55 64#define IRQ_MEMST (IRQ_VIC_START+34)
65#define IRQ_SGA_IT 59 65#define IRQ_SGA_IT (IRQ_VIC_START+35)
66#define IRQ_USBM 61 66#define IRQ_USBM (IRQ_VIC_START+36)
67#define IRQ_MSP1 63 67#define IRQ_MSP1 (IRQ_VIC_START+37)
68 68
69#define NOMADIK_GPIO_OFFSET (IRQ_VIC_START+64) 69#define NOMADIK_GPIO_OFFSET (IRQ_VIC_START+64)
70 70
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index a8fce3ccc707..2e98a3ac7c5e 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -160,7 +160,7 @@ static struct omap_lcd_config ams_delta_lcd_config __initdata = {
160 .ctrl_name = "internal", 160 .ctrl_name = "internal",
161}; 161};
162 162
163static struct omap_usb_config ams_delta_usb_config = { 163static struct omap_usb_config ams_delta_usb_config __initdata = {
164 .register_host = 1, 164 .register_host = 1,
165 .hmc_mode = 16, 165 .hmc_mode = 16,
166 .pins[0] = 2, 166 .pins[0] = 2,
diff --git a/arch/arm/mach-omap1/usb.c b/arch/arm/mach-omap1/usb.c
index 104fed366b8f..1a1db5971cd9 100644
--- a/arch/arm/mach-omap1/usb.c
+++ b/arch/arm/mach-omap1/usb.c
@@ -629,8 +629,14 @@ static void __init omap_1510_usb_init(struct omap_usb_config *config)
629static inline void omap_1510_usb_init(struct omap_usb_config *config) {} 629static inline void omap_1510_usb_init(struct omap_usb_config *config) {}
630#endif 630#endif
631 631
632void __init omap1_usb_init(struct omap_usb_config *pdata) 632void __init omap1_usb_init(struct omap_usb_config *_pdata)
633{ 633{
634 struct omap_usb_config *pdata;
635
636 pdata = kmemdup(_pdata, sizeof(*pdata), GFP_KERNEL);
637 if (!pdata)
638 return;
639
634 pdata->usb0_init = omap1_usb0_init; 640 pdata->usb0_init = omap1_usb0_init;
635 pdata->usb1_init = omap1_usb1_init; 641 pdata->usb1_init = omap1_usb1_init;
636 pdata->usb2_init = omap1_usb2_init; 642 pdata->usb2_init = omap1_usb2_init;
diff --git a/arch/arm/mach-omap2/cclock3xxx_data.c b/arch/arm/mach-omap2/cclock3xxx_data.c
index bdf39481fbd6..6ef87580c33f 100644
--- a/arch/arm/mach-omap2/cclock3xxx_data.c
+++ b/arch/arm/mach-omap2/cclock3xxx_data.c
@@ -1167,6 +1167,8 @@ static const struct clk_ops emu_src_ck_ops = {
1167 .recalc_rate = &omap2_clksel_recalc, 1167 .recalc_rate = &omap2_clksel_recalc,
1168 .get_parent = &omap2_clksel_find_parent_index, 1168 .get_parent = &omap2_clksel_find_parent_index,
1169 .set_parent = &omap2_clksel_set_parent, 1169 .set_parent = &omap2_clksel_set_parent,
1170 .enable = &omap2_clkops_enable_clkdm,
1171 .disable = &omap2_clkops_disable_clkdm,
1170}; 1172};
1171 1173
1172static struct clk emu_src_ck; 1174static struct clk emu_src_ck;
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index 081c71edddf4..646c14d9fdb9 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -2070,7 +2070,7 @@ static struct omap_hwmod_irq_info am33xx_usbss_mpu_irqs[] = {
2070 { .name = "usbss-irq", .irq = 17 + OMAP_INTC_START, }, 2070 { .name = "usbss-irq", .irq = 17 + OMAP_INTC_START, },
2071 { .name = "musb0-irq", .irq = 18 + OMAP_INTC_START, }, 2071 { .name = "musb0-irq", .irq = 18 + OMAP_INTC_START, },
2072 { .name = "musb1-irq", .irq = 19 + OMAP_INTC_START, }, 2072 { .name = "musb1-irq", .irq = 19 + OMAP_INTC_START, },
2073 { .irq = -1 + OMAP_INTC_START, }, 2073 { .irq = -1, },
2074}; 2074};
2075 2075
2076static struct omap_hwmod am33xx_usbss_hwmod = { 2076static struct omap_hwmod am33xx_usbss_hwmod = {
@@ -2515,7 +2515,7 @@ static struct omap_hwmod_ocp_if am33xx_l4_hs__cpgmac0 = {
2515 .user = OCP_USER_MPU, 2515 .user = OCP_USER_MPU,
2516}; 2516};
2517 2517
2518struct omap_hwmod_addr_space am33xx_mdio_addr_space[] = { 2518static struct omap_hwmod_addr_space am33xx_mdio_addr_space[] = {
2519 { 2519 {
2520 .pa_start = 0x4A101000, 2520 .pa_start = 0x4A101000,
2521 .pa_end = 0x4A101000 + SZ_256 - 1, 2521 .pa_end = 0x4A101000 + SZ_256 - 1,
@@ -2523,7 +2523,7 @@ struct omap_hwmod_addr_space am33xx_mdio_addr_space[] = {
2523 { } 2523 { }
2524}; 2524};
2525 2525
2526struct omap_hwmod_ocp_if am33xx_cpgmac0__mdio = { 2526static struct omap_hwmod_ocp_if am33xx_cpgmac0__mdio = {
2527 .master = &am33xx_cpgmac0_hwmod, 2527 .master = &am33xx_cpgmac0_hwmod,
2528 .slave = &am33xx_mdio_hwmod, 2528 .slave = &am33xx_mdio_hwmod,
2529 .addr = am33xx_mdio_addr_space, 2529 .addr = am33xx_mdio_addr_space,
diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c
index cc0e71430af1..418de9c3b319 100644
--- a/arch/arm/mach-omap2/prm2xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx.c
@@ -28,6 +28,14 @@
28#include "prm-regbits-24xx.h" 28#include "prm-regbits-24xx.h"
29 29
30/* 30/*
31 * OMAP24xx PM_PWSTCTRL_*.POWERSTATE and PM_PWSTST_*.LASTSTATEENTERED bits -
32 * these are reversed from the bits used on OMAP3+
33 */
34#define OMAP24XX_PWRDM_POWER_ON 0x0
35#define OMAP24XX_PWRDM_POWER_RET 0x1
36#define OMAP24XX_PWRDM_POWER_OFF 0x3
37
38/*
31 * omap2xxx_prm_reset_src_map - map from bits in the PRM_RSTST_WKUP 39 * omap2xxx_prm_reset_src_map - map from bits in the PRM_RSTST_WKUP
32 * hardware register (which are specific to the OMAP2xxx SoCs) to 40 * hardware register (which are specific to the OMAP2xxx SoCs) to
33 * reset source ID bit shifts (which is an OMAP SoC-independent 41 * reset source ID bit shifts (which is an OMAP SoC-independent
@@ -68,6 +76,34 @@ static u32 omap2xxx_prm_read_reset_sources(void)
68} 76}
69 77
70/** 78/**
79 * omap2xxx_pwrst_to_common_pwrst - convert OMAP2xxx pwrst to common pwrst
80 * @omap2xxx_pwrst: OMAP2xxx hardware power state to convert
81 *
82 * Return the common power state bits corresponding to the OMAP2xxx
83 * hardware power state bits @omap2xxx_pwrst, or -EINVAL upon error.
84 */
85static int omap2xxx_pwrst_to_common_pwrst(u8 omap2xxx_pwrst)
86{
87 u8 pwrst;
88
89 switch (omap2xxx_pwrst) {
90 case OMAP24XX_PWRDM_POWER_OFF:
91 pwrst = PWRDM_POWER_OFF;
92 break;
93 case OMAP24XX_PWRDM_POWER_RET:
94 pwrst = PWRDM_POWER_RET;
95 break;
96 case OMAP24XX_PWRDM_POWER_ON:
97 pwrst = PWRDM_POWER_ON;
98 break;
99 default:
100 return -EINVAL;
101 }
102
103 return pwrst;
104}
105
106/**
71 * omap2xxx_prm_dpll_reset - use DPLL reset to reboot the OMAP SoC 107 * omap2xxx_prm_dpll_reset - use DPLL reset to reboot the OMAP SoC
72 * 108 *
73 * Set the DPLL reset bit, which should reboot the SoC. This is the 109 * Set the DPLL reset bit, which should reboot the SoC. This is the
@@ -97,10 +133,56 @@ int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm)
97 return 0; 133 return 0;
98} 134}
99 135
136static int omap2xxx_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
137{
138 u8 omap24xx_pwrst;
139
140 switch (pwrst) {
141 case PWRDM_POWER_OFF:
142 omap24xx_pwrst = OMAP24XX_PWRDM_POWER_OFF;
143 break;
144 case PWRDM_POWER_RET:
145 omap24xx_pwrst = OMAP24XX_PWRDM_POWER_RET;
146 break;
147 case PWRDM_POWER_ON:
148 omap24xx_pwrst = OMAP24XX_PWRDM_POWER_ON;
149 break;
150 default:
151 return -EINVAL;
152 }
153
154 omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
155 (omap24xx_pwrst << OMAP_POWERSTATE_SHIFT),
156 pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
157 return 0;
158}
159
160static int omap2xxx_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
161{
162 u8 omap2xxx_pwrst;
163
164 omap2xxx_pwrst = omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
165 OMAP2_PM_PWSTCTRL,
166 OMAP_POWERSTATE_MASK);
167
168 return omap2xxx_pwrst_to_common_pwrst(omap2xxx_pwrst);
169}
170
171static int omap2xxx_pwrdm_read_pwrst(struct powerdomain *pwrdm)
172{
173 u8 omap2xxx_pwrst;
174
175 omap2xxx_pwrst = omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
176 OMAP2_PM_PWSTST,
177 OMAP_POWERSTATEST_MASK);
178
179 return omap2xxx_pwrst_to_common_pwrst(omap2xxx_pwrst);
180}
181
100struct pwrdm_ops omap2_pwrdm_operations = { 182struct pwrdm_ops omap2_pwrdm_operations = {
101 .pwrdm_set_next_pwrst = omap2_pwrdm_set_next_pwrst, 183 .pwrdm_set_next_pwrst = omap2xxx_pwrdm_set_next_pwrst,
102 .pwrdm_read_next_pwrst = omap2_pwrdm_read_next_pwrst, 184 .pwrdm_read_next_pwrst = omap2xxx_pwrdm_read_next_pwrst,
103 .pwrdm_read_pwrst = omap2_pwrdm_read_pwrst, 185 .pwrdm_read_pwrst = omap2xxx_pwrdm_read_pwrst,
104 .pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst, 186 .pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst,
105 .pwrdm_set_mem_onst = omap2_pwrdm_set_mem_onst, 187 .pwrdm_set_mem_onst = omap2_pwrdm_set_mem_onst,
106 .pwrdm_set_mem_retst = omap2_pwrdm_set_mem_retst, 188 .pwrdm_set_mem_retst = omap2_pwrdm_set_mem_retst,
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index 30517f5af707..a3e121f94a86 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -103,28 +103,6 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift)
103/* Powerdomain low-level functions */ 103/* Powerdomain low-level functions */
104 104
105/* Common functions across OMAP2 and OMAP3 */ 105/* Common functions across OMAP2 and OMAP3 */
106int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
107{
108 omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
109 (pwrst << OMAP_POWERSTATE_SHIFT),
110 pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
111 return 0;
112}
113
114int omap2_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
115{
116 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
117 OMAP2_PM_PWSTCTRL,
118 OMAP_POWERSTATE_MASK);
119}
120
121int omap2_pwrdm_read_pwrst(struct powerdomain *pwrdm)
122{
123 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
124 OMAP2_PM_PWSTST,
125 OMAP_POWERSTATEST_MASK);
126}
127
128int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, 106int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank,
129 u8 pwrst) 107 u8 pwrst)
130{ 108{
diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c
index 39822aabcff3..e648bd55b072 100644
--- a/arch/arm/mach-omap2/prm3xxx.c
+++ b/arch/arm/mach-omap2/prm3xxx.c
@@ -277,6 +277,28 @@ static u32 omap3xxx_prm_read_reset_sources(void)
277 277
278/* Powerdomain low-level functions */ 278/* Powerdomain low-level functions */
279 279
280static int omap3_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
281{
282 omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
283 (pwrst << OMAP_POWERSTATE_SHIFT),
284 pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
285 return 0;
286}
287
288static int omap3_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
289{
290 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
291 OMAP2_PM_PWSTCTRL,
292 OMAP_POWERSTATE_MASK);
293}
294
295static int omap3_pwrdm_read_pwrst(struct powerdomain *pwrdm)
296{
297 return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
298 OMAP2_PM_PWSTST,
299 OMAP_POWERSTATEST_MASK);
300}
301
280/* Applicable only for OMAP3. Not supported on OMAP2 */ 302/* Applicable only for OMAP3. Not supported on OMAP2 */
281static int omap3_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm) 303static int omap3_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
282{ 304{
@@ -355,9 +377,9 @@ static int omap3_pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm)
355} 377}
356 378
357struct pwrdm_ops omap3_pwrdm_operations = { 379struct pwrdm_ops omap3_pwrdm_operations = {
358 .pwrdm_set_next_pwrst = omap2_pwrdm_set_next_pwrst, 380 .pwrdm_set_next_pwrst = omap3_pwrdm_set_next_pwrst,
359 .pwrdm_read_next_pwrst = omap2_pwrdm_read_next_pwrst, 381 .pwrdm_read_next_pwrst = omap3_pwrdm_read_next_pwrst,
360 .pwrdm_read_pwrst = omap2_pwrdm_read_pwrst, 382 .pwrdm_read_pwrst = omap3_pwrdm_read_pwrst,
361 .pwrdm_read_prev_pwrst = omap3_pwrdm_read_prev_pwrst, 383 .pwrdm_read_prev_pwrst = omap3_pwrdm_read_prev_pwrst,
362 .pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst, 384 .pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst,
363 .pwrdm_read_logic_pwrst = omap3_pwrdm_read_logic_pwrst, 385 .pwrdm_read_logic_pwrst = omap3_pwrdm_read_logic_pwrst,
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 7498bc77fe8b..c05a343d465d 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -56,9 +56,9 @@ static struct omap_prcm_irq_setup omap4_prcm_irq_setup = {
56 * enumeration) 56 * enumeration)
57 */ 57 */
58static struct prm_reset_src_map omap44xx_prm_reset_src_map[] = { 58static struct prm_reset_src_map omap44xx_prm_reset_src_map[] = {
59 { OMAP4430_RST_GLOBAL_WARM_SW_SHIFT, 59 { OMAP4430_GLOBAL_WARM_SW_RST_SHIFT,
60 OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT }, 60 OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT },
61 { OMAP4430_RST_GLOBAL_COLD_SW_SHIFT, 61 { OMAP4430_GLOBAL_COLD_RST_SHIFT,
62 OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT }, 62 OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT },
63 { OMAP4430_MPU_SECURITY_VIOL_RST_SHIFT, 63 { OMAP4430_MPU_SECURITY_VIOL_RST_SHIFT,
64 OMAP_SECU_VIOL_RST_SRC_ID_SHIFT }, 64 OMAP_SECU_VIOL_RST_SRC_ID_SHIFT },
@@ -333,7 +333,7 @@ static u32 omap44xx_prm_read_reset_sources(void)
333 u32 r = 0; 333 u32 r = 0;
334 u32 v; 334 u32 v;
335 335
336 v = omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST, 336 v = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST,
337 OMAP4_RM_RSTST); 337 OMAP4_RM_RSTST);
338 338
339 p = omap44xx_prm_reset_src_map; 339 p = omap44xx_prm_reset_src_map;
diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h
index 22b0979206ca..8ee1fbdec561 100644
--- a/arch/arm/mach-omap2/prm44xx.h
+++ b/arch/arm/mach-omap2/prm44xx.h
@@ -62,8 +62,8 @@
62 62
63/* OMAP4 specific register offsets */ 63/* OMAP4 specific register offsets */
64#define OMAP4_RM_RSTCTRL 0x0000 64#define OMAP4_RM_RSTCTRL 0x0000
65#define OMAP4_RM_RSTTIME 0x0004 65#define OMAP4_RM_RSTST 0x0004
66#define OMAP4_RM_RSTST 0x0008 66#define OMAP4_RM_RSTTIME 0x0008
67#define OMAP4_PM_PWSTCTRL 0x0000 67#define OMAP4_PM_PWSTCTRL 0x0000
68#define OMAP4_PM_PWSTST 0x0004 68#define OMAP4_PM_PWSTST 0x0004
69 69
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index f3771cdb9838..5b0b86bb34bb 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -22,6 +22,8 @@
22#include <asm/mach/time.h> 22#include <asm/mach/time.h>
23#include <asm/sched_clock.h> 23#include <asm/sched_clock.h>
24 24
25#include <plat/counter-32k.h>
26
25/* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */ 27/* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */
26#define OMAP2_32KSYNCNT_REV_OFF 0x0 28#define OMAP2_32KSYNCNT_REV_OFF 0x0
27#define OMAP2_32KSYNCNT_REV_SCHEME (0x3 << 30) 29#define OMAP2_32KSYNCNT_REV_SCHEME (0x3 << 30)
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 743fc2836f7a..a5bc92d7e476 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -26,6 +26,8 @@
26 26
27#include <asm/mach/map.h> 27#include <asm/mach/map.h>
28 28
29#include <plat/sram.h>
30
29#define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1))) 31#define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1)))
30 32
31static void __iomem *omap_sram_base; 33static void __iomem *omap_sram_base;
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h
index e0072ce8d6e9..b69e11dc679d 100644
--- a/arch/arm/plat-samsung/include/plat/cpu.h
+++ b/arch/arm/plat-samsung/include/plat/cpu.h
@@ -43,7 +43,7 @@ extern unsigned long samsung_cpu_id;
43#define EXYNOS4_CPU_MASK 0xFFFE0000 43#define EXYNOS4_CPU_MASK 0xFFFE0000
44 44
45#define EXYNOS5250_SOC_ID 0x43520000 45#define EXYNOS5250_SOC_ID 0x43520000
46#define EXYNOS5440_SOC_ID 0x54400000 46#define EXYNOS5440_SOC_ID 0xE5440000
47#define EXYNOS5_SOC_MASK 0xFFFFF000 47#define EXYNOS5_SOC_MASK 0xFFFFF000
48 48
49#define IS_SAMSUNG_CPU(name, id, mask) \ 49#define IS_SAMSUNG_CPU(name, id, mask) \
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-24 08:13:27 -0500