diff options
author | Paul Walmsley <paul@pwsan.com> | 2010-02-23 00:09:14 -0500 |
---|---|---|
committer | Paul Walmsley <paul@pwsan.com> | 2010-02-24 14:15:04 -0500 |
commit | 94297784eec057ca5425d9cd21a845b109fcaebf (patch) | |
tree | 5ee5d7da04fc337dcd361b7b4b2be19b98869b42 /arch | |
parent | c78a05e8e4a81d01135f4a03544d788b3e203d65 (diff) |
OMAP2xxx clock: GFX functional clock rates are not independently changeable
According to the OMAP242x TRM Rev X Figure 5-15 "Clock Output Control
- Functional Clocks 2", the GFX functional clocks should be marked
both DELAYED_APP and CONFIG_PARTICIPANT, meaning that their rates must
be reprogrammed as part of a larger OPP set change.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Richard Woodruff <r-woodruff2@ti.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-omap2/clock2xxx_data.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/clock2xxx_data.c b/arch/arm/mach-omap2/clock2xxx_data.c index f20a4b2bc6fc..d08d545f84f1 100644 --- a/arch/arm/mach-omap2/clock2xxx_data.c +++ b/arch/arm/mach-omap2/clock2xxx_data.c | |||
@@ -737,7 +737,6 @@ static struct clk ssi_l4_ick = { | |||
737 | * divided value of fclk. | 737 | * divided value of fclk. |
738 | * | 738 | * |
739 | */ | 739 | */ |
740 | /* XXX REVISIT: GFX clock is part of CONFIG_PARTICIPANT, no? doublecheck. */ | ||
741 | 740 | ||
742 | /* This clksel struct is shared between gfx_3d_fck and gfx_2d_fck */ | 741 | /* This clksel struct is shared between gfx_3d_fck and gfx_2d_fck */ |
743 | static const struct clksel gfx_fck_clksel[] = { | 742 | static const struct clksel gfx_fck_clksel[] = { |
@@ -764,6 +763,7 @@ static struct clk gfx_2d_fck = { | |||
764 | .name = "gfx_2d_fck", | 763 | .name = "gfx_2d_fck", |
765 | .ops = &clkops_omap2_dflt_wait, | 764 | .ops = &clkops_omap2_dflt_wait, |
766 | .parent = &core_l3_ck, | 765 | .parent = &core_l3_ck, |
766 | .flags = DELAYED_APP | CONFIG_PARTICIPANT, | ||
767 | .clkdm_name = "gfx_clkdm", | 767 | .clkdm_name = "gfx_clkdm", |
768 | .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN), | 768 | .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN), |
769 | .enable_bit = OMAP24XX_EN_2D_SHIFT, | 769 | .enable_bit = OMAP24XX_EN_2D_SHIFT, |
@@ -779,6 +779,7 @@ static struct clk gfx_ick = { | |||
779 | .name = "gfx_ick", /* From l3 */ | 779 | .name = "gfx_ick", /* From l3 */ |
780 | .ops = &clkops_omap2_dflt_wait, | 780 | .ops = &clkops_omap2_dflt_wait, |
781 | .parent = &core_l3_ck, | 781 | .parent = &core_l3_ck, |
782 | .flags = DELAYED_APP | CONFIG_PARTICIPANT, | ||
782 | .clkdm_name = "gfx_clkdm", | 783 | .clkdm_name = "gfx_clkdm", |
783 | .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_ICLKEN), | 784 | .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_ICLKEN), |
784 | .enable_bit = OMAP_EN_GFX_SHIFT, | 785 | .enable_bit = OMAP_EN_GFX_SHIFT, |