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authorThomas Abraham <thomas.abraham@linaro.org>2011-09-27 21:59:34 -0400
committerKukjin Kim <kgene.kim@samsung.com>2011-10-04 06:48:40 -0400
commit909ceef6827c579e767f093b422313945f9cba53 (patch)
tree64291c435f008ee965b7655de87948006ada333d /arch
parent4c59de052e7167a3bcf3f32c5ea4c9a5ef07386a (diff)
ARM: SAMSUNG: remove sdhci default configuration setup platform helper
The sdhci platform helper function that sets up the default controller configuration is removed for all Samsung platforms since such default controller configuration can be handled by the driver. Cc: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-exynos4/setup-sdhci.c47
-rw-r--r--arch/arm/mach-s3c2416/setup-sdhci.c37
-rw-r--r--arch/arm/mach-s3c64xx/setup-sdhci.c48
-rw-r--r--arch/arm/mach-s5pc100/setup-sdhci.c42
-rw-r--r--arch/arm/mach-s5pv210/setup-sdhci.c41
-rw-r--r--arch/arm/plat-samsung/include/plat/sdhci.h57
-rw-r--r--arch/arm/plat-samsung/platformdata.c2
7 files changed, 0 insertions, 274 deletions
diff --git a/arch/arm/mach-exynos4/setup-sdhci.c b/arch/arm/mach-exynos4/setup-sdhci.c
index 1e83f8cf236d..92937b410906 100644
--- a/arch/arm/mach-exynos4/setup-sdhci.c
+++ b/arch/arm/mach-exynos4/setup-sdhci.c
@@ -10,16 +10,7 @@
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11*/ 11*/
12 12
13#include <linux/kernel.h>
14#include <linux/types.h> 13#include <linux/types.h>
15#include <linux/interrupt.h>
16#include <linux/platform_device.h>
17#include <linux/io.h>
18
19#include <linux/mmc/card.h>
20#include <linux/mmc/host.h>
21
22#include <plat/regs-sdhci.h>
23 14
24/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ 15/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
25 16
@@ -29,41 +20,3 @@ char *exynos4_hsmmc_clksrcs[4] = {
29 [2] = "sclk_mmc", /* mmc_bus */ 20 [2] = "sclk_mmc", /* mmc_bus */
30 [3] = NULL, 21 [3] = NULL,
31}; 22};
32
33void exynos4_setup_sdhci_cfg_card(struct platform_device *dev, void __iomem *r,
34 struct mmc_ios *ios, struct mmc_card *card)
35{
36 u32 ctrl2, ctrl3;
37
38 /* don't need to alter anything according to card-type */
39
40 ctrl2 = readl(r + S3C_SDHCI_CONTROL2);
41
42 /* select base clock source to HCLK */
43
44 ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
45
46 /*
47 * clear async mode, enable conflict mask, rx feedback ctrl, SD
48 * clk hold and no use debounce count
49 */
50
51 ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
52 S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
53 S3C_SDHCI_CTRL2_ENFBCLKRX |
54 S3C_SDHCI_CTRL2_DFCNT_NONE |
55 S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
56
57 /* Tx and Rx feedback clock delay control */
58
59 if (ios->clock < 25 * 1000000)
60 ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 |
61 S3C_SDHCI_CTRL3_FCSEL2 |
62 S3C_SDHCI_CTRL3_FCSEL1 |
63 S3C_SDHCI_CTRL3_FCSEL0);
64 else
65 ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
66
67 writel(ctrl2, r + S3C_SDHCI_CONTROL2);
68 writel(ctrl3, r + S3C_SDHCI_CONTROL3);
69}
diff --git a/arch/arm/mach-s3c2416/setup-sdhci.c b/arch/arm/mach-s3c2416/setup-sdhci.c
index ed34fad8f2c6..cee53955eb02 100644
--- a/arch/arm/mach-s3c2416/setup-sdhci.c
+++ b/arch/arm/mach-s3c2416/setup-sdhci.c
@@ -12,17 +12,7 @@
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13*/ 13*/
14 14
15#include <linux/kernel.h>
16#include <linux/types.h> 15#include <linux/types.h>
17#include <linux/interrupt.h>
18#include <linux/platform_device.h>
19#include <linux/io.h>
20
21#include <linux/mmc/card.h>
22#include <linux/mmc/host.h>
23
24#include <plat/regs-sdhci.h>
25#include <plat/sdhci.h>
26 16
27/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ 17/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
28 18
@@ -32,30 +22,3 @@ char *s3c2416_hsmmc_clksrcs[4] = {
32 [2] = "hsmmc-if", 22 [2] = "hsmmc-if",
33 /* [3] = "48m", - note not successfully used yet */ 23 /* [3] = "48m", - note not successfully used yet */
34}; 24};
35
36void s3c2416_setup_sdhci_cfg_card(struct platform_device *dev,
37 void __iomem *r,
38 struct mmc_ios *ios,
39 struct mmc_card *card)
40{
41 u32 ctrl2, ctrl3;
42
43 ctrl2 = __raw_readl(r + S3C_SDHCI_CONTROL2);
44 ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
45 ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
46 S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
47 S3C_SDHCI_CTRL2_ENFBCLKRX |
48 S3C_SDHCI_CTRL2_DFCNT_NONE |
49 S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
50
51 if (ios->clock < 25 * 1000000)
52 ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 |
53 S3C_SDHCI_CTRL3_FCSEL2 |
54 S3C_SDHCI_CTRL3_FCSEL1 |
55 S3C_SDHCI_CTRL3_FCSEL0);
56 else
57 ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
58
59 __raw_writel(ctrl2, r + S3C_SDHCI_CONTROL2);
60 __raw_writel(ctrl3, r + S3C_SDHCI_CONTROL3);
61}
diff --git a/arch/arm/mach-s3c64xx/setup-sdhci.c b/arch/arm/mach-s3c64xx/setup-sdhci.c
index f344a222bc84..c75a71b21165 100644
--- a/arch/arm/mach-s3c64xx/setup-sdhci.c
+++ b/arch/arm/mach-s3c64xx/setup-sdhci.c
@@ -12,17 +12,7 @@
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13*/ 13*/
14 14
15#include <linux/kernel.h>
16#include <linux/types.h> 15#include <linux/types.h>
17#include <linux/interrupt.h>
18#include <linux/platform_device.h>
19#include <linux/io.h>
20
21#include <linux/mmc/card.h>
22#include <linux/mmc/host.h>
23
24#include <plat/regs-sdhci.h>
25#include <plat/sdhci.h>
26 16
27/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ 17/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
28 18
@@ -32,41 +22,3 @@ char *s3c64xx_hsmmc_clksrcs[4] = {
32 [2] = "mmc_bus", 22 [2] = "mmc_bus",
33 /* [3] = "48m", - note not successfully used yet */ 23 /* [3] = "48m", - note not successfully used yet */
34}; 24};
35
36void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev,
37 void __iomem *r,
38 struct mmc_ios *ios,
39 struct mmc_card *card)
40{
41 u32 ctrl2, ctrl3;
42
43 ctrl2 = readl(r + S3C_SDHCI_CONTROL2);
44 ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
45 ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
46 S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
47 S3C_SDHCI_CTRL2_ENFBCLKRX |
48 S3C_SDHCI_CTRL2_DFCNT_NONE |
49 S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
50
51 if (ios->clock < 25 * 1000000)
52 ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 |
53 S3C_SDHCI_CTRL3_FCSEL2 |
54 S3C_SDHCI_CTRL3_FCSEL1 |
55 S3C_SDHCI_CTRL3_FCSEL0);
56 else
57 ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
58
59 pr_debug("%s: CTRL 2=%08x, 3=%08x\n", __func__, ctrl2, ctrl3);
60 writel(ctrl2, r + S3C_SDHCI_CONTROL2);
61 writel(ctrl3, r + S3C_SDHCI_CONTROL3);
62}
63
64void s3c6410_setup_sdhci_cfg_card(struct platform_device *dev,
65 void __iomem *r,
66 struct mmc_ios *ios,
67 struct mmc_card *card)
68{
69 writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4);
70
71 s3c6400_setup_sdhci_cfg_card(dev, r, ios, card);
72}
diff --git a/arch/arm/mach-s5pc100/setup-sdhci.c b/arch/arm/mach-s5pc100/setup-sdhci.c
index be25879bb2ee..6418c6e8a7b7 100644
--- a/arch/arm/mach-s5pc100/setup-sdhci.c
+++ b/arch/arm/mach-s5pc100/setup-sdhci.c
@@ -11,17 +11,7 @@
11 * published by the Free Software Foundation. 11 * published by the Free Software Foundation.
12*/ 12*/
13 13
14#include <linux/kernel.h>
15#include <linux/types.h> 14#include <linux/types.h>
16#include <linux/interrupt.h>
17#include <linux/platform_device.h>
18#include <linux/io.h>
19
20#include <linux/mmc/card.h>
21#include <linux/mmc/host.h>
22
23#include <plat/regs-sdhci.h>
24#include <plat/sdhci.h>
25 15
26/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ 16/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
27 17
@@ -31,35 +21,3 @@ char *s5pc100_hsmmc_clksrcs[4] = {
31 [2] = "sclk_mmc", /* mmc_bus */ 21 [2] = "sclk_mmc", /* mmc_bus */
32 /* [3] = "48m", - note not successfully used yet */ 22 /* [3] = "48m", - note not successfully used yet */
33}; 23};
34
35
36void s5pc100_setup_sdhci0_cfg_card(struct platform_device *dev,
37 void __iomem *r,
38 struct mmc_ios *ios,
39 struct mmc_card *card)
40{
41 u32 ctrl2, ctrl3;
42
43 /* don't need to alter anything according to card-type */
44
45 writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4);
46
47 ctrl2 = readl(r + S3C_SDHCI_CONTROL2);
48 ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
49 ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
50 S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
51 S3C_SDHCI_CTRL2_ENFBCLKRX |
52 S3C_SDHCI_CTRL2_DFCNT_NONE |
53 S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
54
55 if (ios->clock < 25 * 1000000)
56 ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 |
57 S3C_SDHCI_CTRL3_FCSEL2 |
58 S3C_SDHCI_CTRL3_FCSEL1 |
59 S3C_SDHCI_CTRL3_FCSEL0);
60 else
61 ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
62
63 writel(ctrl2, r + S3C_SDHCI_CONTROL2);
64 writel(ctrl3, r + S3C_SDHCI_CONTROL3);
65}
diff --git a/arch/arm/mach-s5pv210/setup-sdhci.c b/arch/arm/mach-s5pv210/setup-sdhci.c
index a83b6c909f6b..6b8ccc4d35fd 100644
--- a/arch/arm/mach-s5pv210/setup-sdhci.c
+++ b/arch/arm/mach-s5pv210/setup-sdhci.c
@@ -10,17 +10,7 @@
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11*/ 11*/
12 12
13#include <linux/kernel.h>
14#include <linux/types.h> 13#include <linux/types.h>
15#include <linux/interrupt.h>
16#include <linux/platform_device.h>
17#include <linux/io.h>
18
19#include <linux/mmc/card.h>
20#include <linux/mmc/host.h>
21
22#include <plat/regs-sdhci.h>
23#include <plat/sdhci.h>
24 14
25/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ 15/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
26 16
@@ -30,34 +20,3 @@ char *s5pv210_hsmmc_clksrcs[4] = {
30 [2] = "sclk_mmc", /* mmc_bus */ 20 [2] = "sclk_mmc", /* mmc_bus */
31 /* [3] = NULL, - reserved */ 21 /* [3] = NULL, - reserved */
32}; 22};
33
34void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev,
35 void __iomem *r,
36 struct mmc_ios *ios,
37 struct mmc_card *card)
38{
39 u32 ctrl2, ctrl3;
40
41 /* don't need to alter anything according to card-type */
42
43 writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA, r + S3C64XX_SDHCI_CONTROL4);
44
45 ctrl2 = readl(r + S3C_SDHCI_CONTROL2);
46 ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
47 ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
48 S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
49 S3C_SDHCI_CTRL2_ENFBCLKRX |
50 S3C_SDHCI_CTRL2_DFCNT_NONE |
51 S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
52
53 if (ios->clock < 25 * 1000000)
54 ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 |
55 S3C_SDHCI_CTRL3_FCSEL2 |
56 S3C_SDHCI_CTRL3_FCSEL1 |
57 S3C_SDHCI_CTRL3_FCSEL0);
58 else
59 ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
60
61 writel(ctrl2, r + S3C_SDHCI_CONTROL2);
62 writel(ctrl3, r + S3C_SDHCI_CONTROL3);
63}
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h
index 4a6552066c7e..e7b3c752e919 100644
--- a/arch/arm/plat-samsung/include/plat/sdhci.h
+++ b/arch/arm/plat-samsung/include/plat/sdhci.h
@@ -55,10 +55,6 @@ enum clk_types {
55 * cd_type == S3C_SDHCI_CD_GPIO 55 * cd_type == S3C_SDHCI_CD_GPIO
56 * @ext_cd_gpio_invert: invert values for external CD gpio line 56 * @ext_cd_gpio_invert: invert values for external CD gpio line
57 * @cfg_gpio: Configure the GPIO for a specific card bit-width 57 * @cfg_gpio: Configure the GPIO for a specific card bit-width
58 * @cfg_card: Configure the interface for a specific card and speed. This
59 * is necessary the controllers and/or GPIO blocks require the
60 * changing of driver-strength and other controls dependent on
61 * the card and speed of operation.
62 * 58 *
63 * Initialisation data specific to either the machine or the platform 59 * Initialisation data specific to either the machine or the platform
64 * for the device driver to use or call-back when configuring gpio or 60 * for the device driver to use or call-back when configuring gpio or
@@ -80,10 +76,6 @@ struct s3c_sdhci_platdata {
80 int state)); 76 int state));
81 77
82 void (*cfg_gpio)(struct platform_device *dev, int width); 78 void (*cfg_gpio)(struct platform_device *dev, int width);
83 void (*cfg_card)(struct platform_device *dev,
84 void __iomem *regbase,
85 struct mmc_ios *ios,
86 struct mmc_card *card);
87}; 79};
88 80
89/* s3c_sdhci_set_platdata() - common helper for setting SDHCI platform data 81/* s3c_sdhci_set_platdata() - common helper for setting SDHCI platform data
@@ -139,17 +131,11 @@ extern void exynos4_setup_sdhci3_cfg_gpio(struct platform_device *, int w);
139#ifdef CONFIG_S3C2416_SETUP_SDHCI 131#ifdef CONFIG_S3C2416_SETUP_SDHCI
140extern char *s3c2416_hsmmc_clksrcs[4]; 132extern char *s3c2416_hsmmc_clksrcs[4];
141 133
142extern void s3c2416_setup_sdhci_cfg_card(struct platform_device *dev,
143 void __iomem *r,
144 struct mmc_ios *ios,
145 struct mmc_card *card);
146
147static inline void s3c2416_default_sdhci0(void) 134static inline void s3c2416_default_sdhci0(void)
148{ 135{
149#ifdef CONFIG_S3C_DEV_HSMMC 136#ifdef CONFIG_S3C_DEV_HSMMC
150 s3c_hsmmc0_def_platdata.clocks = s3c2416_hsmmc_clksrcs; 137 s3c_hsmmc0_def_platdata.clocks = s3c2416_hsmmc_clksrcs;
151 s3c_hsmmc0_def_platdata.cfg_gpio = s3c2416_setup_sdhci0_cfg_gpio; 138 s3c_hsmmc0_def_platdata.cfg_gpio = s3c2416_setup_sdhci0_cfg_gpio;
152 s3c_hsmmc0_def_platdata.cfg_card = s3c2416_setup_sdhci_cfg_card;
153#endif /* CONFIG_S3C_DEV_HSMMC */ 139#endif /* CONFIG_S3C_DEV_HSMMC */
154} 140}
155 141
@@ -158,7 +144,6 @@ static inline void s3c2416_default_sdhci1(void)
158#ifdef CONFIG_S3C_DEV_HSMMC1 144#ifdef CONFIG_S3C_DEV_HSMMC1
159 s3c_hsmmc1_def_platdata.clocks = s3c2416_hsmmc_clksrcs; 145 s3c_hsmmc1_def_platdata.clocks = s3c2416_hsmmc_clksrcs;
160 s3c_hsmmc1_def_platdata.cfg_gpio = s3c2416_setup_sdhci1_cfg_gpio; 146 s3c_hsmmc1_def_platdata.cfg_gpio = s3c2416_setup_sdhci1_cfg_gpio;
161 s3c_hsmmc1_def_platdata.cfg_card = s3c2416_setup_sdhci_cfg_card;
162#endif /* CONFIG_S3C_DEV_HSMMC1 */ 147#endif /* CONFIG_S3C_DEV_HSMMC1 */
163} 148}
164 149
@@ -172,17 +157,11 @@ static inline void s3c2416_default_sdhci1(void) { }
172#ifdef CONFIG_S3C64XX_SETUP_SDHCI 157#ifdef CONFIG_S3C64XX_SETUP_SDHCI
173extern char *s3c64xx_hsmmc_clksrcs[4]; 158extern char *s3c64xx_hsmmc_clksrcs[4];
174 159
175extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev,
176 void __iomem *r,
177 struct mmc_ios *ios,
178 struct mmc_card *card);
179
180static inline void s3c6400_default_sdhci0(void) 160static inline void s3c6400_default_sdhci0(void)
181{ 161{
182#ifdef CONFIG_S3C_DEV_HSMMC 162#ifdef CONFIG_S3C_DEV_HSMMC
183 s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; 163 s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
184 s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; 164 s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio;
185 s3c_hsmmc0_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
186#endif 165#endif
187} 166}
188 167
@@ -191,7 +170,6 @@ static inline void s3c6400_default_sdhci1(void)
191#ifdef CONFIG_S3C_DEV_HSMMC1 170#ifdef CONFIG_S3C_DEV_HSMMC1
192 s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; 171 s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
193 s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; 172 s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio;
194 s3c_hsmmc1_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
195#endif 173#endif
196} 174}
197 175
@@ -200,21 +178,14 @@ static inline void s3c6400_default_sdhci2(void)
200#ifdef CONFIG_S3C_DEV_HSMMC2 178#ifdef CONFIG_S3C_DEV_HSMMC2
201 s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; 179 s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
202 s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; 180 s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
203 s3c_hsmmc2_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
204#endif 181#endif
205} 182}
206 183
207extern void s3c6410_setup_sdhci_cfg_card(struct platform_device *dev,
208 void __iomem *r,
209 struct mmc_ios *ios,
210 struct mmc_card *card);
211
212static inline void s3c6410_default_sdhci0(void) 184static inline void s3c6410_default_sdhci0(void)
213{ 185{
214#ifdef CONFIG_S3C_DEV_HSMMC 186#ifdef CONFIG_S3C_DEV_HSMMC
215 s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; 187 s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
216 s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; 188 s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio;
217 s3c_hsmmc0_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card;
218#endif 189#endif
219} 190}
220 191
@@ -223,7 +194,6 @@ static inline void s3c6410_default_sdhci1(void)
223#ifdef CONFIG_S3C_DEV_HSMMC1 194#ifdef CONFIG_S3C_DEV_HSMMC1
224 s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; 195 s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
225 s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; 196 s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio;
226 s3c_hsmmc1_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card;
227#endif 197#endif
228} 198}
229 199
@@ -232,7 +202,6 @@ static inline void s3c6410_default_sdhci2(void)
232#ifdef CONFIG_S3C_DEV_HSMMC2 202#ifdef CONFIG_S3C_DEV_HSMMC2
233 s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; 203 s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
234 s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; 204 s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
235 s3c_hsmmc2_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card;
236#endif 205#endif
237} 206}
238 207
@@ -251,17 +220,11 @@ static inline void s3c6400_default_sdhci2(void) { }
251#ifdef CONFIG_S5PC100_SETUP_SDHCI 220#ifdef CONFIG_S5PC100_SETUP_SDHCI
252extern char *s5pc100_hsmmc_clksrcs[4]; 221extern char *s5pc100_hsmmc_clksrcs[4];
253 222
254extern void s5pc100_setup_sdhci0_cfg_card(struct platform_device *dev,
255 void __iomem *r,
256 struct mmc_ios *ios,
257 struct mmc_card *card);
258
259static inline void s5pc100_default_sdhci0(void) 223static inline void s5pc100_default_sdhci0(void)
260{ 224{
261#ifdef CONFIG_S3C_DEV_HSMMC 225#ifdef CONFIG_S3C_DEV_HSMMC
262 s3c_hsmmc0_def_platdata.clocks = s5pc100_hsmmc_clksrcs; 226 s3c_hsmmc0_def_platdata.clocks = s5pc100_hsmmc_clksrcs;
263 s3c_hsmmc0_def_platdata.cfg_gpio = s5pc100_setup_sdhci0_cfg_gpio; 227 s3c_hsmmc0_def_platdata.cfg_gpio = s5pc100_setup_sdhci0_cfg_gpio;
264 s3c_hsmmc0_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card;
265#endif 228#endif
266} 229}
267 230
@@ -270,7 +233,6 @@ static inline void s5pc100_default_sdhci1(void)
270#ifdef CONFIG_S3C_DEV_HSMMC1 233#ifdef CONFIG_S3C_DEV_HSMMC1
271 s3c_hsmmc1_def_platdata.clocks = s5pc100_hsmmc_clksrcs; 234 s3c_hsmmc1_def_platdata.clocks = s5pc100_hsmmc_clksrcs;
272 s3c_hsmmc1_def_platdata.cfg_gpio = s5pc100_setup_sdhci1_cfg_gpio; 235 s3c_hsmmc1_def_platdata.cfg_gpio = s5pc100_setup_sdhci1_cfg_gpio;
273 s3c_hsmmc1_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card;
274#endif 236#endif
275} 237}
276 238
@@ -279,7 +241,6 @@ static inline void s5pc100_default_sdhci2(void)
279#ifdef CONFIG_S3C_DEV_HSMMC2 241#ifdef CONFIG_S3C_DEV_HSMMC2
280 s3c_hsmmc2_def_platdata.clocks = s5pc100_hsmmc_clksrcs; 242 s3c_hsmmc2_def_platdata.clocks = s5pc100_hsmmc_clksrcs;
281 s3c_hsmmc2_def_platdata.cfg_gpio = s5pc100_setup_sdhci2_cfg_gpio; 243 s3c_hsmmc2_def_platdata.cfg_gpio = s5pc100_setup_sdhci2_cfg_gpio;
282 s3c_hsmmc2_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card;
283#endif 244#endif
284} 245}
285 246
@@ -295,17 +256,11 @@ static inline void s5pc100_default_sdhci2(void) { }
295#ifdef CONFIG_S5PV210_SETUP_SDHCI 256#ifdef CONFIG_S5PV210_SETUP_SDHCI
296extern char *s5pv210_hsmmc_clksrcs[4]; 257extern char *s5pv210_hsmmc_clksrcs[4];
297 258
298extern void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev,
299 void __iomem *r,
300 struct mmc_ios *ios,
301 struct mmc_card *card);
302
303static inline void s5pv210_default_sdhci0(void) 259static inline void s5pv210_default_sdhci0(void)
304{ 260{
305#ifdef CONFIG_S3C_DEV_HSMMC 261#ifdef CONFIG_S3C_DEV_HSMMC
306 s3c_hsmmc0_def_platdata.clocks = s5pv210_hsmmc_clksrcs; 262 s3c_hsmmc0_def_platdata.clocks = s5pv210_hsmmc_clksrcs;
307 s3c_hsmmc0_def_platdata.cfg_gpio = s5pv210_setup_sdhci0_cfg_gpio; 263 s3c_hsmmc0_def_platdata.cfg_gpio = s5pv210_setup_sdhci0_cfg_gpio;
308 s3c_hsmmc0_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card;
309#endif 264#endif
310} 265}
311 266
@@ -314,7 +269,6 @@ static inline void s5pv210_default_sdhci1(void)
314#ifdef CONFIG_S3C_DEV_HSMMC1 269#ifdef CONFIG_S3C_DEV_HSMMC1
315 s3c_hsmmc1_def_platdata.clocks = s5pv210_hsmmc_clksrcs; 270 s3c_hsmmc1_def_platdata.clocks = s5pv210_hsmmc_clksrcs;
316 s3c_hsmmc1_def_platdata.cfg_gpio = s5pv210_setup_sdhci1_cfg_gpio; 271 s3c_hsmmc1_def_platdata.cfg_gpio = s5pv210_setup_sdhci1_cfg_gpio;
317 s3c_hsmmc1_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card;
318#endif 272#endif
319} 273}
320 274
@@ -323,7 +277,6 @@ static inline void s5pv210_default_sdhci2(void)
323#ifdef CONFIG_S3C_DEV_HSMMC2 277#ifdef CONFIG_S3C_DEV_HSMMC2
324 s3c_hsmmc2_def_platdata.clocks = s5pv210_hsmmc_clksrcs; 278 s3c_hsmmc2_def_platdata.clocks = s5pv210_hsmmc_clksrcs;
325 s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio; 279 s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio;
326 s3c_hsmmc2_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card;
327#endif 280#endif
328} 281}
329 282
@@ -332,7 +285,6 @@ static inline void s5pv210_default_sdhci3(void)
332#ifdef CONFIG_S3C_DEV_HSMMC3 285#ifdef CONFIG_S3C_DEV_HSMMC3
333 s3c_hsmmc3_def_platdata.clocks = s5pv210_hsmmc_clksrcs; 286 s3c_hsmmc3_def_platdata.clocks = s5pv210_hsmmc_clksrcs;
334 s3c_hsmmc3_def_platdata.cfg_gpio = s5pv210_setup_sdhci3_cfg_gpio; 287 s3c_hsmmc3_def_platdata.cfg_gpio = s5pv210_setup_sdhci3_cfg_gpio;
335 s3c_hsmmc3_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card;
336#endif 288#endif
337} 289}
338 290
@@ -348,17 +300,11 @@ static inline void s5pv210_default_sdhci3(void) { }
348#ifdef CONFIG_EXYNOS4_SETUP_SDHCI 300#ifdef CONFIG_EXYNOS4_SETUP_SDHCI
349extern char *exynos4_hsmmc_clksrcs[4]; 301extern char *exynos4_hsmmc_clksrcs[4];
350 302
351extern void exynos4_setup_sdhci_cfg_card(struct platform_device *dev,
352 void __iomem *r,
353 struct mmc_ios *ios,
354 struct mmc_card *card);
355
356static inline void exynos4_default_sdhci0(void) 303static inline void exynos4_default_sdhci0(void)
357{ 304{
358#ifdef CONFIG_S3C_DEV_HSMMC 305#ifdef CONFIG_S3C_DEV_HSMMC
359 s3c_hsmmc0_def_platdata.clocks = exynos4_hsmmc_clksrcs; 306 s3c_hsmmc0_def_platdata.clocks = exynos4_hsmmc_clksrcs;
360 s3c_hsmmc0_def_platdata.cfg_gpio = exynos4_setup_sdhci0_cfg_gpio; 307 s3c_hsmmc0_def_platdata.cfg_gpio = exynos4_setup_sdhci0_cfg_gpio;
361 s3c_hsmmc0_def_platdata.cfg_card = exynos4_setup_sdhci_cfg_card;
362#endif 308#endif
363} 309}
364 310
@@ -367,7 +313,6 @@ static inline void exynos4_default_sdhci1(void)
367#ifdef CONFIG_S3C_DEV_HSMMC1 313#ifdef CONFIG_S3C_DEV_HSMMC1
368 s3c_hsmmc1_def_platdata.clocks = exynos4_hsmmc_clksrcs; 314 s3c_hsmmc1_def_platdata.clocks = exynos4_hsmmc_clksrcs;
369 s3c_hsmmc1_def_platdata.cfg_gpio = exynos4_setup_sdhci1_cfg_gpio; 315 s3c_hsmmc1_def_platdata.cfg_gpio = exynos4_setup_sdhci1_cfg_gpio;
370 s3c_hsmmc1_def_platdata.cfg_card = exynos4_setup_sdhci_cfg_card;
371#endif 316#endif
372} 317}
373 318
@@ -376,7 +321,6 @@ static inline void exynos4_default_sdhci2(void)
376#ifdef CONFIG_S3C_DEV_HSMMC2 321#ifdef CONFIG_S3C_DEV_HSMMC2
377 s3c_hsmmc2_def_platdata.clocks = exynos4_hsmmc_clksrcs; 322 s3c_hsmmc2_def_platdata.clocks = exynos4_hsmmc_clksrcs;
378 s3c_hsmmc2_def_platdata.cfg_gpio = exynos4_setup_sdhci2_cfg_gpio; 323 s3c_hsmmc2_def_platdata.cfg_gpio = exynos4_setup_sdhci2_cfg_gpio;
379 s3c_hsmmc2_def_platdata.cfg_card = exynos4_setup_sdhci_cfg_card;
380#endif 324#endif
381} 325}
382 326
@@ -385,7 +329,6 @@ static inline void exynos4_default_sdhci3(void)
385#ifdef CONFIG_S3C_DEV_HSMMC3 329#ifdef CONFIG_S3C_DEV_HSMMC3
386 s3c_hsmmc3_def_platdata.clocks = exynos4_hsmmc_clksrcs; 330 s3c_hsmmc3_def_platdata.clocks = exynos4_hsmmc_clksrcs;
387 s3c_hsmmc3_def_platdata.cfg_gpio = exynos4_setup_sdhci3_cfg_gpio; 331 s3c_hsmmc3_def_platdata.cfg_gpio = exynos4_setup_sdhci3_cfg_gpio;
388 s3c_hsmmc3_def_platdata.cfg_card = exynos4_setup_sdhci_cfg_card;
389#endif 332#endif
390} 333}
391 334
diff --git a/arch/arm/plat-samsung/platformdata.c b/arch/arm/plat-samsung/platformdata.c
index 6de1a3825927..4c9a20734fe3 100644
--- a/arch/arm/plat-samsung/platformdata.c
+++ b/arch/arm/plat-samsung/platformdata.c
@@ -50,8 +50,6 @@ void s3c_sdhci_set_platdata(struct s3c_sdhci_platdata *pd,
50 set->max_width = pd->max_width; 50 set->max_width = pd->max_width;
51 if (pd->cfg_gpio) 51 if (pd->cfg_gpio)
52 set->cfg_gpio = pd->cfg_gpio; 52 set->cfg_gpio = pd->cfg_gpio;
53 if (pd->cfg_card)
54 set->cfg_card = pd->cfg_card;
55 if (pd->host_caps) 53 if (pd->host_caps)
56 set->host_caps |= pd->host_caps; 54 set->host_caps |= pd->host_caps;
57 if (pd->clk_type) 55 if (pd->clk_type)
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-25 20:12:01 -0500