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authorThomas Gleixner <tglx@linutronix.de>2010-09-28 10:03:54 -0400
committerThomas Gleixner <tglx@linutronix.de>2010-10-12 10:53:37 -0400
commit90297c5fe71d32a2a0ead38bd8f6b1112a2e5ac0 (patch)
treed6ed71c68d5c09918992cf3dbcdd47054be3da49 /arch
parent61a38ce3f59cdb4654e9444329195bd57c3baf74 (diff)
x86: ioapic: Convert mask to new irq_chip function
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/kernel/apic/io_apic.c95
1 files changed, 43 insertions, 52 deletions
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 5ced690b8496..b8b013f0cfdd 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -592,11 +592,9 @@ static void mask_ioapic(struct irq_cfg *cfg)
592 raw_spin_unlock_irqrestore(&ioapic_lock, flags); 592 raw_spin_unlock_irqrestore(&ioapic_lock, flags);
593} 593}
594 594
595static void mask_ioapic_irq(unsigned int irq) 595static void mask_ioapic_irq(struct irq_data *data)
596{ 596{
597 struct irq_cfg *cfg = get_irq_chip_data(irq); 597 mask_ioapic(data->chip_data);
598
599 mask_ioapic(cfg);
600} 598}
601 599
602static void __unmask_ioapic(struct irq_cfg *cfg) 600static void __unmask_ioapic(struct irq_cfg *cfg)
@@ -613,11 +611,9 @@ static void unmask_ioapic(struct irq_cfg *cfg)
613 raw_spin_unlock_irqrestore(&ioapic_lock, flags); 611 raw_spin_unlock_irqrestore(&ioapic_lock, flags);
614} 612}
615 613
616static void unmask_ioapic_irq(unsigned int irq) 614static void unmask_ioapic_irq(struct irq_data *data)
617{ 615{
618 struct irq_cfg *cfg = get_irq_chip_data(irq); 616 unmask_ioapic(data->chip_data);
619
620 unmask_ioapic(cfg);
621} 617}
622 618
623static void clear_IO_APIC_pin(unsigned int apic, unsigned int pin) 619static void clear_IO_APIC_pin(unsigned int apic, unsigned int pin)
@@ -2235,10 +2231,9 @@ static unsigned int startup_ioapic_irq(struct irq_data *data)
2235 return was_pending; 2231 return was_pending;
2236} 2232}
2237 2233
2238static int ioapic_retrigger_irq(unsigned int irq) 2234static int ioapic_retrigger_irq(struct irq_data *data)
2239{ 2235{
2240 2236 struct irq_cfg *cfg = data->chip_data;
2241 struct irq_cfg *cfg = irq_cfg(irq);
2242 unsigned long flags; 2237 unsigned long flags;
2243 2238
2244 raw_spin_lock_irqsave(&vector_lock, flags); 2239 raw_spin_lock_irqsave(&vector_lock, flags);
@@ -2519,12 +2514,10 @@ void irq_force_complete_move(int irq)
2519static inline void irq_complete_move(struct irq_cfg *cfg) { } 2514static inline void irq_complete_move(struct irq_cfg *cfg) { }
2520#endif 2515#endif
2521 2516
2522static void ack_apic_edge(unsigned int irq) 2517static void ack_apic_edge(struct irq_data *data)
2523{ 2518{
2524 struct irq_cfg *cfg = get_irq_chip_data(irq); 2519 irq_complete_move(data->chip_data);
2525 2520 move_native_irq(data->irq);
2526 irq_complete_move(cfg);
2527 move_native_irq(irq);
2528 ack_APIC_irq(); 2521 ack_APIC_irq();
2529} 2522}
2530 2523
@@ -2572,11 +2565,11 @@ static void eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg)
2572 raw_spin_unlock_irqrestore(&ioapic_lock, flags); 2565 raw_spin_unlock_irqrestore(&ioapic_lock, flags);
2573} 2566}
2574 2567
2575static void ack_apic_level(unsigned int irq) 2568static void ack_apic_level(struct irq_data *data)
2576{ 2569{
2570 struct irq_cfg *cfg = data->chip_data;
2571 int i, do_unmask_irq = 0, irq = data->irq;
2577 struct irq_desc *desc = irq_to_desc(irq); 2572 struct irq_desc *desc = irq_to_desc(irq);
2578 struct irq_cfg *cfg = get_irq_desc_chip_data(desc);
2579 int i, do_unmask_irq = 0;
2580 unsigned long v; 2573 unsigned long v;
2581 2574
2582 irq_complete_move(cfg); 2575 irq_complete_move(cfg);
@@ -2677,46 +2670,44 @@ static void ack_apic_level(unsigned int irq)
2677} 2670}
2678 2671
2679#ifdef CONFIG_INTR_REMAP 2672#ifdef CONFIG_INTR_REMAP
2680static void ir_ack_apic_edge(unsigned int irq) 2673static void ir_ack_apic_edge(struct irq_data *data)
2681{ 2674{
2682 ack_APIC_irq(); 2675 ack_APIC_irq();
2683} 2676}
2684 2677
2685static void ir_ack_apic_level(unsigned int irq) 2678static void ir_ack_apic_level(struct irq_data *data)
2686{ 2679{
2687 struct irq_cfg *cfg = get_irq_chip_data(irq);
2688
2689 ack_APIC_irq(); 2680 ack_APIC_irq();
2690 eoi_ioapic_irq(irq, cfg); 2681 eoi_ioapic_irq(data->irq, data->chip_data);
2691} 2682}
2692#endif /* CONFIG_INTR_REMAP */ 2683#endif /* CONFIG_INTR_REMAP */
2693 2684
2694static struct irq_chip ioapic_chip __read_mostly = { 2685static struct irq_chip ioapic_chip __read_mostly = {
2695 .name = "IO-APIC", 2686 .name = "IO-APIC",
2696 .irq_startup = startup_ioapic_irq, 2687 .irq_startup = startup_ioapic_irq,
2697 .mask = mask_ioapic_irq, 2688 .irq_mask = mask_ioapic_irq,
2698 .unmask = unmask_ioapic_irq, 2689 .irq_unmask = unmask_ioapic_irq,
2699 .ack = ack_apic_edge, 2690 .irq_ack = ack_apic_edge,
2700 .eoi = ack_apic_level, 2691 .irq_eoi = ack_apic_level,
2701#ifdef CONFIG_SMP 2692#ifdef CONFIG_SMP
2702 .set_affinity = set_ioapic_affinity_irq, 2693 .set_affinity = set_ioapic_affinity_irq,
2703#endif 2694#endif
2704 .retrigger = ioapic_retrigger_irq, 2695 .irq_retrigger = ioapic_retrigger_irq,
2705}; 2696};
2706 2697
2707static struct irq_chip ir_ioapic_chip __read_mostly = { 2698static struct irq_chip ir_ioapic_chip __read_mostly = {
2708 .name = "IR-IO-APIC", 2699 .name = "IR-IO-APIC",
2709 .irq_startup = startup_ioapic_irq, 2700 .irq_startup = startup_ioapic_irq,
2710 .mask = mask_ioapic_irq, 2701 .irq_mask = mask_ioapic_irq,
2711 .unmask = unmask_ioapic_irq, 2702 .irq_unmask = unmask_ioapic_irq,
2712#ifdef CONFIG_INTR_REMAP 2703#ifdef CONFIG_INTR_REMAP
2713 .ack = ir_ack_apic_edge, 2704 .irq_ack = ir_ack_apic_edge,
2714 .eoi = ir_ack_apic_level, 2705 .irq_eoi = ir_ack_apic_level,
2715#ifdef CONFIG_SMP 2706#ifdef CONFIG_SMP
2716 .set_affinity = set_ir_ioapic_affinity_irq, 2707 .set_affinity = set_ir_ioapic_affinity_irq,
2717#endif 2708#endif
2718#endif 2709#endif
2719 .retrigger = ioapic_retrigger_irq, 2710 .irq_retrigger = ioapic_retrigger_irq,
2720}; 2711};
2721 2712
2722static inline void init_IO_APIC_traps(void) 2713static inline void init_IO_APIC_traps(void)
@@ -2757,7 +2748,7 @@ static inline void init_IO_APIC_traps(void)
2757 * The local APIC irq-chip implementation: 2748 * The local APIC irq-chip implementation:
2758 */ 2749 */
2759 2750
2760static void mask_lapic_irq(unsigned int irq) 2751static void mask_lapic_irq(struct irq_data *data)
2761{ 2752{
2762 unsigned long v; 2753 unsigned long v;
2763 2754
@@ -2765,7 +2756,7 @@ static void mask_lapic_irq(unsigned int irq)
2765 apic_write(APIC_LVT0, v | APIC_LVT_MASKED); 2756 apic_write(APIC_LVT0, v | APIC_LVT_MASKED);
2766} 2757}
2767 2758
2768static void unmask_lapic_irq(unsigned int irq) 2759static void unmask_lapic_irq(struct irq_data *data)
2769{ 2760{
2770 unsigned long v; 2761 unsigned long v;
2771 2762
@@ -2773,16 +2764,16 @@ static void unmask_lapic_irq(unsigned int irq)
2773 apic_write(APIC_LVT0, v & ~APIC_LVT_MASKED); 2764 apic_write(APIC_LVT0, v & ~APIC_LVT_MASKED);
2774} 2765}
2775 2766
2776static void ack_lapic_irq(unsigned int irq) 2767static void ack_lapic_irq(struct irq_data *data)
2777{ 2768{
2778 ack_APIC_irq(); 2769 ack_APIC_irq();
2779} 2770}
2780 2771
2781static struct irq_chip lapic_chip __read_mostly = { 2772static struct irq_chip lapic_chip __read_mostly = {
2782 .name = "local-APIC", 2773 .name = "local-APIC",
2783 .mask = mask_lapic_irq, 2774 .irq_mask = mask_lapic_irq,
2784 .unmask = unmask_lapic_irq, 2775 .irq_unmask = unmask_lapic_irq,
2785 .ack = ack_lapic_irq, 2776 .irq_ack = ack_lapic_irq,
2786}; 2777};
2787 2778
2788static void lapic_register_intr(int irq, struct irq_desc *desc) 2779static void lapic_register_intr(int irq, struct irq_desc *desc)
@@ -3417,11 +3408,11 @@ static struct irq_chip msi_chip = {
3417 .name = "PCI-MSI", 3408 .name = "PCI-MSI",
3418 .irq_unmask = unmask_msi_irq, 3409 .irq_unmask = unmask_msi_irq,
3419 .irq_mask = mask_msi_irq, 3410 .irq_mask = mask_msi_irq,
3420 .ack = ack_apic_edge, 3411 .irq_ack = ack_apic_edge,
3421#ifdef CONFIG_SMP 3412#ifdef CONFIG_SMP
3422 .set_affinity = set_msi_irq_affinity, 3413 .set_affinity = set_msi_irq_affinity,
3423#endif 3414#endif
3424 .retrigger = ioapic_retrigger_irq, 3415 .irq_retrigger = ioapic_retrigger_irq,
3425}; 3416};
3426 3417
3427static struct irq_chip msi_ir_chip = { 3418static struct irq_chip msi_ir_chip = {
@@ -3429,12 +3420,12 @@ static struct irq_chip msi_ir_chip = {
3429 .irq_unmask = unmask_msi_irq, 3420 .irq_unmask = unmask_msi_irq,
3430 .irq_mask = mask_msi_irq, 3421 .irq_mask = mask_msi_irq,
3431#ifdef CONFIG_INTR_REMAP 3422#ifdef CONFIG_INTR_REMAP
3432 .ack = ir_ack_apic_edge, 3423 .irq_ack = ir_ack_apic_edge,
3433#ifdef CONFIG_SMP 3424#ifdef CONFIG_SMP
3434 .set_affinity = ir_set_msi_irq_affinity, 3425 .set_affinity = ir_set_msi_irq_affinity,
3435#endif 3426#endif
3436#endif 3427#endif
3437 .retrigger = ioapic_retrigger_irq, 3428 .irq_retrigger = ioapic_retrigger_irq,
3438}; 3429};
3439 3430
3440/* 3431/*
@@ -3589,11 +3580,11 @@ static struct irq_chip dmar_msi_type = {
3589 .name = "DMAR_MSI", 3580 .name = "DMAR_MSI",
3590 .unmask = dmar_msi_unmask, 3581 .unmask = dmar_msi_unmask,
3591 .mask = dmar_msi_mask, 3582 .mask = dmar_msi_mask,
3592 .ack = ack_apic_edge, 3583 .irq_ack = ack_apic_edge,
3593#ifdef CONFIG_SMP 3584#ifdef CONFIG_SMP
3594 .set_affinity = dmar_msi_set_affinity, 3585 .set_affinity = dmar_msi_set_affinity,
3595#endif 3586#endif
3596 .retrigger = ioapic_retrigger_irq, 3587 .irq_retrigger = ioapic_retrigger_irq,
3597}; 3588};
3598 3589
3599int arch_setup_dmar_msi(unsigned int irq) 3590int arch_setup_dmar_msi(unsigned int irq)
@@ -3645,23 +3636,23 @@ static struct irq_chip ir_hpet_msi_type = {
3645 .unmask = hpet_msi_unmask, 3636 .unmask = hpet_msi_unmask,
3646 .mask = hpet_msi_mask, 3637 .mask = hpet_msi_mask,
3647#ifdef CONFIG_INTR_REMAP 3638#ifdef CONFIG_INTR_REMAP
3648 .ack = ir_ack_apic_edge, 3639 .irq_ack = ir_ack_apic_edge,
3649#ifdef CONFIG_SMP 3640#ifdef CONFIG_SMP
3650 .set_affinity = ir_set_msi_irq_affinity, 3641 .set_affinity = ir_set_msi_irq_affinity,
3651#endif 3642#endif
3652#endif 3643#endif
3653 .retrigger = ioapic_retrigger_irq, 3644 .irq_retrigger = ioapic_retrigger_irq,
3654}; 3645};
3655 3646
3656static struct irq_chip hpet_msi_type = { 3647static struct irq_chip hpet_msi_type = {
3657 .name = "HPET_MSI", 3648 .name = "HPET_MSI",
3658 .unmask = hpet_msi_unmask, 3649 .unmask = hpet_msi_unmask,
3659 .mask = hpet_msi_mask, 3650 .mask = hpet_msi_mask,
3660 .ack = ack_apic_edge, 3651 .irq_ack = ack_apic_edge,
3661#ifdef CONFIG_SMP 3652#ifdef CONFIG_SMP
3662 .set_affinity = hpet_msi_set_affinity, 3653 .set_affinity = hpet_msi_set_affinity,
3663#endif 3654#endif
3664 .retrigger = ioapic_retrigger_irq, 3655 .irq_retrigger = ioapic_retrigger_irq,
3665}; 3656};
3666 3657
3667int arch_setup_hpet_msi(unsigned int irq, unsigned int id) 3658int arch_setup_hpet_msi(unsigned int irq, unsigned int id)
@@ -3743,11 +3734,11 @@ static struct irq_chip ht_irq_chip = {
3743 .name = "PCI-HT", 3734 .name = "PCI-HT",
3744 .mask = mask_ht_irq, 3735 .mask = mask_ht_irq,
3745 .unmask = unmask_ht_irq, 3736 .unmask = unmask_ht_irq,
3746 .ack = ack_apic_edge, 3737 .irq_ack = ack_apic_edge,
3747#ifdef CONFIG_SMP 3738#ifdef CONFIG_SMP
3748 .set_affinity = set_ht_irq_affinity, 3739 .set_affinity = set_ht_irq_affinity,
3749#endif 3740#endif
3750 .retrigger = ioapic_retrigger_irq, 3741 .irq_retrigger = ioapic_retrigger_irq,
3751}; 3742};
3752 3743
3753int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev) 3744int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev)