diff options
| author | Andre Przywara <andre.przywara@arm.com> | 2015-04-20 06:14:19 -0400 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2015-04-27 06:39:04 -0400 |
| commit | 878a84d5a8a18a4ab241d40cebb791d6aedf5605 (patch) | |
| tree | 6b1cdd047b75849c2e70ccc73643d4147500c26d /arch | |
| parent | b787f68c36d49bb1d9236f403813641efa74a031 (diff) | |
arm64: add missing data types in smp_load_acquire/smp_store_release
Commit 8053871d0f7f ("smp: Fix smp_call_function_single_async()
locking") introduced a call to smp_load_acquire() with a u16 argument,
but we only cared about u32 and u64 types in that function so far.
This resulted in a compiler warning fortunately, pointing at an
uninitialized use. Due to the implementation structure the compiler
misses that bug in the smp_store_release(), though.
Add the u16 and u8 variants using ldarh/stlrh and ldarb/stlrb,
respectively. Together with the compiletime_assert_atomic_type() check
this should cover all cases now.
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm64/include/asm/barrier.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/barrier.h b/arch/arm64/include/asm/barrier.h index a5abb0062d6e..71f19c4dc0de 100644 --- a/arch/arm64/include/asm/barrier.h +++ b/arch/arm64/include/asm/barrier.h | |||
| @@ -65,6 +65,14 @@ do { \ | |||
| 65 | do { \ | 65 | do { \ |
| 66 | compiletime_assert_atomic_type(*p); \ | 66 | compiletime_assert_atomic_type(*p); \ |
| 67 | switch (sizeof(*p)) { \ | 67 | switch (sizeof(*p)) { \ |
| 68 | case 1: \ | ||
| 69 | asm volatile ("stlrb %w1, %0" \ | ||
| 70 | : "=Q" (*p) : "r" (v) : "memory"); \ | ||
| 71 | break; \ | ||
| 72 | case 2: \ | ||
| 73 | asm volatile ("stlrh %w1, %0" \ | ||
| 74 | : "=Q" (*p) : "r" (v) : "memory"); \ | ||
| 75 | break; \ | ||
| 68 | case 4: \ | 76 | case 4: \ |
| 69 | asm volatile ("stlr %w1, %0" \ | 77 | asm volatile ("stlr %w1, %0" \ |
| 70 | : "=Q" (*p) : "r" (v) : "memory"); \ | 78 | : "=Q" (*p) : "r" (v) : "memory"); \ |
| @@ -81,6 +89,14 @@ do { \ | |||
| 81 | typeof(*p) ___p1; \ | 89 | typeof(*p) ___p1; \ |
| 82 | compiletime_assert_atomic_type(*p); \ | 90 | compiletime_assert_atomic_type(*p); \ |
| 83 | switch (sizeof(*p)) { \ | 91 | switch (sizeof(*p)) { \ |
| 92 | case 1: \ | ||
| 93 | asm volatile ("ldarb %w0, %1" \ | ||
| 94 | : "=r" (___p1) : "Q" (*p) : "memory"); \ | ||
| 95 | break; \ | ||
| 96 | case 2: \ | ||
| 97 | asm volatile ("ldarh %w0, %1" \ | ||
| 98 | : "=r" (___p1) : "Q" (*p) : "memory"); \ | ||
| 99 | break; \ | ||
| 84 | case 4: \ | 100 | case 4: \ |
| 85 | asm volatile ("ldar %w0, %1" \ | 101 | asm volatile ("ldar %w0, %1" \ |
| 86 | : "=r" (___p1) : "Q" (*p) : "memory"); \ | 102 | : "=r" (___p1) : "Q" (*p) : "memory"); \ |