diff options
author | Will Deacon <will.deacon@arm.com> | 2011-08-03 07:37:04 -0400 |
---|---|---|
committer | Will Deacon <will.deacon@arm.com> | 2011-08-12 10:41:15 -0400 |
commit | 72dc53acd50db066a5a5ebe1f39fae73d7e62aa8 (patch) | |
tree | cbdc3bdbd0802992d6f4db26ffa4a5a61354226d /arch | |
parent | dfc40b24c0a37593724f3317cd485c73ee878c18 (diff) |
ARM: cache: detect VIPT aliasing I-cache on ARMv6
The current cache detection code does not check for an aliasing
I-cache if the D-cache is found to be VIPT aliasing.
This patch fixes the problem by always checking for an aliasing
I-cache on v6 and later.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/kernel/setup.c | 15 |
1 files changed, 8 insertions, 7 deletions
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index 70bca649e925..e514c76043b4 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c | |||
@@ -280,18 +280,19 @@ static void __init cacheid_init(void) | |||
280 | if (arch >= CPU_ARCH_ARMv6) { | 280 | if (arch >= CPU_ARCH_ARMv6) { |
281 | if ((cachetype & (7 << 29)) == 4 << 29) { | 281 | if ((cachetype & (7 << 29)) == 4 << 29) { |
282 | /* ARMv7 register format */ | 282 | /* ARMv7 register format */ |
283 | arch = CPU_ARCH_ARMv7; | ||
283 | cacheid = CACHEID_VIPT_NONALIASING; | 284 | cacheid = CACHEID_VIPT_NONALIASING; |
284 | if ((cachetype & (3 << 14)) == 1 << 14) | 285 | if ((cachetype & (3 << 14)) == 1 << 14) |
285 | cacheid |= CACHEID_ASID_TAGGED; | 286 | cacheid |= CACHEID_ASID_TAGGED; |
286 | else if (cpu_has_aliasing_icache(CPU_ARCH_ARMv7)) | ||
287 | cacheid |= CACHEID_VIPT_I_ALIASING; | ||
288 | } else if (cachetype & (1 << 23)) { | ||
289 | cacheid = CACHEID_VIPT_ALIASING; | ||
290 | } else { | 287 | } else { |
291 | cacheid = CACHEID_VIPT_NONALIASING; | 288 | arch = CPU_ARCH_ARMv6; |
292 | if (cpu_has_aliasing_icache(CPU_ARCH_ARMv6)) | 289 | if (cachetype & (1 << 23)) |
293 | cacheid |= CACHEID_VIPT_I_ALIASING; | 290 | cacheid = CACHEID_VIPT_ALIASING; |
291 | else | ||
292 | cacheid = CACHEID_VIPT_NONALIASING; | ||
294 | } | 293 | } |
294 | if (cpu_has_aliasing_icache(arch)) | ||
295 | cacheid |= CACHEID_VIPT_I_ALIASING; | ||
295 | } else { | 296 | } else { |
296 | cacheid = CACHEID_VIVT; | 297 | cacheid = CACHEID_VIVT; |
297 | } | 298 | } |