diff options
author | Avi Kivity <avi@redhat.com> | 2011-04-20 06:12:27 -0400 |
---|---|---|
committer | Avi Kivity <avi@redhat.com> | 2011-05-11 07:57:10 -0400 |
commit | 7295261cdd42e6d41666df38d1b613cdd9e95f46 (patch) | |
tree | 309b5ee25fd2da10b94a7e565b9475b1a4069a18 /arch | |
parent | 3d9b938eefb7d91a1ae13e425931bd5ac103b762 (diff) |
KVM: x86 emulator: whitespace cleanups
Clean up lines longer than 80 columns. No code changes.
Signed-off-by: Avi Kivity <avi@redhat.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/x86/kvm/emulate.c | 96 |
1 files changed, 54 insertions, 42 deletions
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c index e1f77de95404..4a5b61ff0ae9 100644 --- a/arch/x86/kvm/emulate.c +++ b/arch/x86/kvm/emulate.c | |||
@@ -262,42 +262,42 @@ struct gprefix { | |||
262 | "w", "r", _LO32, "r", "", "r") | 262 | "w", "r", _LO32, "r", "", "r") |
263 | 263 | ||
264 | /* Instruction has three operands and one operand is stored in ECX register */ | 264 | /* Instruction has three operands and one operand is stored in ECX register */ |
265 | #define __emulate_2op_cl(_op, _cl, _src, _dst, _eflags, _suffix, _type) \ | 265 | #define __emulate_2op_cl(_op, _cl, _src, _dst, _eflags, _suffix, _type) \ |
266 | do { \ | 266 | do { \ |
267 | unsigned long _tmp; \ | 267 | unsigned long _tmp; \ |
268 | _type _clv = (_cl).val; \ | 268 | _type _clv = (_cl).val; \ |
269 | _type _srcv = (_src).val; \ | 269 | _type _srcv = (_src).val; \ |
270 | _type _dstv = (_dst).val; \ | 270 | _type _dstv = (_dst).val; \ |
271 | \ | 271 | \ |
272 | __asm__ __volatile__ ( \ | 272 | __asm__ __volatile__ ( \ |
273 | _PRE_EFLAGS("0", "5", "2") \ | 273 | _PRE_EFLAGS("0", "5", "2") \ |
274 | _op _suffix " %4,%1 \n" \ | 274 | _op _suffix " %4,%1 \n" \ |
275 | _POST_EFLAGS("0", "5", "2") \ | 275 | _POST_EFLAGS("0", "5", "2") \ |
276 | : "=m" (_eflags), "+r" (_dstv), "=&r" (_tmp) \ | 276 | : "=m" (_eflags), "+r" (_dstv), "=&r" (_tmp) \ |
277 | : "c" (_clv) , "r" (_srcv), "i" (EFLAGS_MASK) \ | 277 | : "c" (_clv) , "r" (_srcv), "i" (EFLAGS_MASK) \ |
278 | ); \ | 278 | ); \ |
279 | \ | 279 | \ |
280 | (_cl).val = (unsigned long) _clv; \ | 280 | (_cl).val = (unsigned long) _clv; \ |
281 | (_src).val = (unsigned long) _srcv; \ | 281 | (_src).val = (unsigned long) _srcv; \ |
282 | (_dst).val = (unsigned long) _dstv; \ | 282 | (_dst).val = (unsigned long) _dstv; \ |
283 | } while (0) | 283 | } while (0) |
284 | 284 | ||
285 | #define emulate_2op_cl(_op, _cl, _src, _dst, _eflags) \ | 285 | #define emulate_2op_cl(_op, _cl, _src, _dst, _eflags) \ |
286 | do { \ | 286 | do { \ |
287 | switch ((_dst).bytes) { \ | 287 | switch ((_dst).bytes) { \ |
288 | case 2: \ | 288 | case 2: \ |
289 | __emulate_2op_cl(_op, _cl, _src, _dst, _eflags, \ | 289 | __emulate_2op_cl(_op, _cl, _src, _dst, _eflags, \ |
290 | "w", unsigned short); \ | 290 | "w", unsigned short); \ |
291 | break; \ | 291 | break; \ |
292 | case 4: \ | 292 | case 4: \ |
293 | __emulate_2op_cl(_op, _cl, _src, _dst, _eflags, \ | 293 | __emulate_2op_cl(_op, _cl, _src, _dst, _eflags, \ |
294 | "l", unsigned int); \ | 294 | "l", unsigned int); \ |
295 | break; \ | 295 | break; \ |
296 | case 8: \ | 296 | case 8: \ |
297 | ON64(__emulate_2op_cl(_op, _cl, _src, _dst, _eflags, \ | 297 | ON64(__emulate_2op_cl(_op, _cl, _src, _dst, _eflags, \ |
298 | "q", unsigned long)); \ | 298 | "q", unsigned long)); \ |
299 | break; \ | 299 | break; \ |
300 | } \ | 300 | } \ |
301 | } while (0) | 301 | } while (0) |
302 | 302 | ||
303 | #define __emulate_1op(_op, _dst, _eflags, _suffix) \ | 303 | #define __emulate_1op(_op, _dst, _eflags, _suffix) \ |
@@ -360,13 +360,25 @@ struct gprefix { | |||
360 | } while (0) | 360 | } while (0) |
361 | 361 | ||
362 | /* instruction has only one source operand, destination is implicit (e.g. mul, div, imul, idiv) */ | 362 | /* instruction has only one source operand, destination is implicit (e.g. mul, div, imul, idiv) */ |
363 | #define emulate_1op_rax_rdx(_op, _src, _rax, _rdx, _eflags) \ | 363 | #define emulate_1op_rax_rdx(_op, _src, _rax, _rdx, _eflags) \ |
364 | do { \ | 364 | do { \ |
365 | switch((_src).bytes) { \ | 365 | switch((_src).bytes) { \ |
366 | case 1: __emulate_1op_rax_rdx(_op, _src, _rax, _rdx, _eflags, "b"); break; \ | 366 | case 1: \ |
367 | case 2: __emulate_1op_rax_rdx(_op, _src, _rax, _rdx, _eflags, "w"); break; \ | 367 | __emulate_1op_rax_rdx(_op, _src, _rax, _rdx, \ |
368 | case 4: __emulate_1op_rax_rdx(_op, _src, _rax, _rdx, _eflags, "l"); break; \ | 368 | _eflags, "b"); \ |
369 | case 8: ON64(__emulate_1op_rax_rdx(_op, _src, _rax, _rdx, _eflags, "q")); break; \ | 369 | break; \ |
370 | case 2: \ | ||
371 | __emulate_1op_rax_rdx(_op, _src, _rax, _rdx, \ | ||
372 | _eflags, "w"); \ | ||
373 | break; \ | ||
374 | case 4: \ | ||
375 | __emulate_1op_rax_rdx(_op, _src, _rax, _rdx, \ | ||
376 | _eflags, "l"); \ | ||
377 | break; \ | ||
378 | case 8: \ | ||
379 | ON64(__emulate_1op_rax_rdx(_op, _src, _rax, _rdx, \ | ||
380 | _eflags, "q")); \ | ||
381 | break; \ | ||
370 | } \ | 382 | } \ |
371 | } while (0) | 383 | } while (0) |
372 | 384 | ||
@@ -402,7 +414,7 @@ struct gprefix { | |||
402 | (_type)_x; \ | 414 | (_type)_x; \ |
403 | }) | 415 | }) |
404 | 416 | ||
405 | #define insn_fetch_arr(_arr, _size, _eip) \ | 417 | #define insn_fetch_arr(_arr, _size, _eip) \ |
406 | ({ rc = do_insn_fetch(ctxt, ops, (_eip), _arr, (_size)); \ | 418 | ({ rc = do_insn_fetch(ctxt, ops, (_eip), _arr, (_size)); \ |
407 | if (rc != X86EMUL_CONTINUE) \ | 419 | if (rc != X86EMUL_CONTINUE) \ |
408 | goto done; \ | 420 | goto done; \ |