diff options
author | Arnd Bergmann <arnd@arndb.de> | 2013-04-11 10:55:29 -0400 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2013-04-11 10:55:29 -0400 |
commit | 71bd98aff05a644a2cfc3ac6ca848a586fa210b9 (patch) | |
tree | 684205cbeee855f673eec247057ce31bebb4a946 /arch | |
parent | b94db2ac9e6aad2bdb51ae086b2806c2ceabd5b3 (diff) | |
parent | 600468d0686096ddc1000c8a2e69475931084414 (diff) |
Merge tag 'mvebu_fixes_for_v3.9_round3' of git://git.infradead.org/users/jcooper/linux into fixes
From Jason Cooper <jason@lakedaemon.net>:
mvebu fixes for v3.9 round 3
- Kirkwood
- a couple of small fixes for the Iomega ix2-200 board (ether and led)
- mvebu
- allow GPIO button to work on Mirabox when running SMP
* tag 'mvebu_fixes_for_v3.9_round3' of git://git.infradead.org/users/jcooper/linux:
arm: mvebu: Fix the irq map function in SMP mode
Fix GE0/GE1 init on ix2-200 as GE0 has no PHY
ARM: Kirkwood: Fix typo in the definition of ix2-200 rebuild LED
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts | 14 | ||||
-rw-r--r-- | arch/arm/mach-kirkwood/board-iomega_ix2_200.c | 7 | ||||
-rw-r--r-- | arch/arm/mach-mvebu/irq-armada-370-xp.c | 16 |
3 files changed, 18 insertions, 19 deletions
diff --git a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts index 93c3afbef9ee..3694e94f6e99 100644 --- a/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts +++ b/arch/arm/boot/dts/kirkwood-iomega_ix2_200.dts | |||
@@ -96,11 +96,11 @@ | |||
96 | marvell,function = "gpio"; | 96 | marvell,function = "gpio"; |
97 | }; | 97 | }; |
98 | pmx_led_rebuild_brt_ctrl_1: pmx-led-rebuild-brt-ctrl-1 { | 98 | pmx_led_rebuild_brt_ctrl_1: pmx-led-rebuild-brt-ctrl-1 { |
99 | marvell,pins = "mpp44"; | 99 | marvell,pins = "mpp46"; |
100 | marvell,function = "gpio"; | 100 | marvell,function = "gpio"; |
101 | }; | 101 | }; |
102 | pmx_led_rebuild_brt_ctrl_2: pmx-led-rebuild-brt-ctrl-2 { | 102 | pmx_led_rebuild_brt_ctrl_2: pmx-led-rebuild-brt-ctrl-2 { |
103 | marvell,pins = "mpp45"; | 103 | marvell,pins = "mpp47"; |
104 | marvell,function = "gpio"; | 104 | marvell,function = "gpio"; |
105 | }; | 105 | }; |
106 | 106 | ||
@@ -157,14 +157,14 @@ | |||
157 | gpios = <&gpio0 16 0>; | 157 | gpios = <&gpio0 16 0>; |
158 | linux,default-trigger = "default-on"; | 158 | linux,default-trigger = "default-on"; |
159 | }; | 159 | }; |
160 | health_led1 { | 160 | rebuild_led { |
161 | label = "status:white:rebuild_led"; | ||
162 | gpios = <&gpio1 4 0>; | ||
163 | }; | ||
164 | health_led { | ||
161 | label = "status:red:health_led"; | 165 | label = "status:red:health_led"; |
162 | gpios = <&gpio1 5 0>; | 166 | gpios = <&gpio1 5 0>; |
163 | }; | 167 | }; |
164 | health_led2 { | ||
165 | label = "status:white:health_led"; | ||
166 | gpios = <&gpio1 4 0>; | ||
167 | }; | ||
168 | backup_led { | 168 | backup_led { |
169 | label = "status:blue:backup_led"; | 169 | label = "status:blue:backup_led"; |
170 | gpios = <&gpio0 15 0>; | 170 | gpios = <&gpio0 15 0>; |
diff --git a/arch/arm/mach-kirkwood/board-iomega_ix2_200.c b/arch/arm/mach-kirkwood/board-iomega_ix2_200.c index f655b2637b0e..e5f70415905a 100644 --- a/arch/arm/mach-kirkwood/board-iomega_ix2_200.c +++ b/arch/arm/mach-kirkwood/board-iomega_ix2_200.c | |||
@@ -20,10 +20,15 @@ static struct mv643xx_eth_platform_data iomega_ix2_200_ge00_data = { | |||
20 | .duplex = DUPLEX_FULL, | 20 | .duplex = DUPLEX_FULL, |
21 | }; | 21 | }; |
22 | 22 | ||
23 | static struct mv643xx_eth_platform_data iomega_ix2_200_ge01_data = { | ||
24 | .phy_addr = MV643XX_ETH_PHY_ADDR(11), | ||
25 | }; | ||
26 | |||
23 | void __init iomega_ix2_200_init(void) | 27 | void __init iomega_ix2_200_init(void) |
24 | { | 28 | { |
25 | /* | 29 | /* |
26 | * Basic setup. Needs to be called early. | 30 | * Basic setup. Needs to be called early. |
27 | */ | 31 | */ |
28 | kirkwood_ge01_init(&iomega_ix2_200_ge00_data); | 32 | kirkwood_ge00_init(&iomega_ix2_200_ge00_data); |
33 | kirkwood_ge01_init(&iomega_ix2_200_ge01_data); | ||
29 | } | 34 | } |
diff --git a/arch/arm/mach-mvebu/irq-armada-370-xp.c b/arch/arm/mach-mvebu/irq-armada-370-xp.c index 6a9195e10579..d5970f5a1e8d 100644 --- a/arch/arm/mach-mvebu/irq-armada-370-xp.c +++ b/arch/arm/mach-mvebu/irq-armada-370-xp.c | |||
@@ -61,7 +61,6 @@ static struct irq_domain *armada_370_xp_mpic_domain; | |||
61 | */ | 61 | */ |
62 | static void armada_370_xp_irq_mask(struct irq_data *d) | 62 | static void armada_370_xp_irq_mask(struct irq_data *d) |
63 | { | 63 | { |
64 | #ifdef CONFIG_SMP | ||
65 | irq_hw_number_t hwirq = irqd_to_hwirq(d); | 64 | irq_hw_number_t hwirq = irqd_to_hwirq(d); |
66 | 65 | ||
67 | if (hwirq != ARMADA_370_XP_TIMER0_PER_CPU_IRQ) | 66 | if (hwirq != ARMADA_370_XP_TIMER0_PER_CPU_IRQ) |
@@ -70,15 +69,10 @@ static void armada_370_xp_irq_mask(struct irq_data *d) | |||
70 | else | 69 | else |
71 | writel(hwirq, per_cpu_int_base + | 70 | writel(hwirq, per_cpu_int_base + |
72 | ARMADA_370_XP_INT_SET_MASK_OFFS); | 71 | ARMADA_370_XP_INT_SET_MASK_OFFS); |
73 | #else | ||
74 | writel(irqd_to_hwirq(d), | ||
75 | per_cpu_int_base + ARMADA_370_XP_INT_SET_MASK_OFFS); | ||
76 | #endif | ||
77 | } | 72 | } |
78 | 73 | ||
79 | static void armada_370_xp_irq_unmask(struct irq_data *d) | 74 | static void armada_370_xp_irq_unmask(struct irq_data *d) |
80 | { | 75 | { |
81 | #ifdef CONFIG_SMP | ||
82 | irq_hw_number_t hwirq = irqd_to_hwirq(d); | 76 | irq_hw_number_t hwirq = irqd_to_hwirq(d); |
83 | 77 | ||
84 | if (hwirq != ARMADA_370_XP_TIMER0_PER_CPU_IRQ) | 78 | if (hwirq != ARMADA_370_XP_TIMER0_PER_CPU_IRQ) |
@@ -87,10 +81,6 @@ static void armada_370_xp_irq_unmask(struct irq_data *d) | |||
87 | else | 81 | else |
88 | writel(hwirq, per_cpu_int_base + | 82 | writel(hwirq, per_cpu_int_base + |
89 | ARMADA_370_XP_INT_CLEAR_MASK_OFFS); | 83 | ARMADA_370_XP_INT_CLEAR_MASK_OFFS); |
90 | #else | ||
91 | writel(irqd_to_hwirq(d), | ||
92 | per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK_OFFS); | ||
93 | #endif | ||
94 | } | 84 | } |
95 | 85 | ||
96 | #ifdef CONFIG_SMP | 86 | #ifdef CONFIG_SMP |
@@ -146,7 +136,11 @@ static int armada_370_xp_mpic_irq_map(struct irq_domain *h, | |||
146 | unsigned int virq, irq_hw_number_t hw) | 136 | unsigned int virq, irq_hw_number_t hw) |
147 | { | 137 | { |
148 | armada_370_xp_irq_mask(irq_get_irq_data(virq)); | 138 | armada_370_xp_irq_mask(irq_get_irq_data(virq)); |
149 | writel(hw, main_int_base + ARMADA_370_XP_INT_SET_ENABLE_OFFS); | 139 | if (hw != ARMADA_370_XP_TIMER0_PER_CPU_IRQ) |
140 | writel(hw, per_cpu_int_base + | ||
141 | ARMADA_370_XP_INT_CLEAR_MASK_OFFS); | ||
142 | else | ||
143 | writel(hw, main_int_base + ARMADA_370_XP_INT_SET_ENABLE_OFFS); | ||
150 | irq_set_status_flags(virq, IRQ_LEVEL); | 144 | irq_set_status_flags(virq, IRQ_LEVEL); |
151 | 145 | ||
152 | if (hw == ARMADA_370_XP_TIMER0_PER_CPU_IRQ) { | 146 | if (hw == ARMADA_370_XP_TIMER0_PER_CPU_IRQ) { |