diff options
author | Max Schwarz <max.schwarz@online.de> | 2014-03-09 15:43:11 -0400 |
---|---|---|
committer | Heiko Stuebner <heiko@sntech.de> | 2014-04-15 05:00:11 -0400 |
commit | 6faff9b6bd3d2a279b806d721bb2257fdd2e6bf2 (patch) | |
tree | 3252607a819f7bcc39c21187ae264a01fde16bee /arch | |
parent | c9eaa447e77efe77b7fa4c953bd62de8297fd6c5 (diff) |
ARM: rockchip: rk3188: enable pull-ups on UART RX pins
The default behaviour of the uart-rx pins on the rk3188 is to be pulled up and
a lot of designs use diodes to even prevent them from being raised from the
outside.
Therefore change the rx-pin settings accordingly.
This also fixes a uart receive problem on mass production Radxa Rock boards.
Signed-off-by: Max Schwarz <max.schwarz@online.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/boot/dts/rk3188.dtsi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index bb36596ea205..ed9a70af3e3f 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi | |||
@@ -149,7 +149,7 @@ | |||
149 | 149 | ||
150 | uart0 { | 150 | uart0 { |
151 | uart0_xfer: uart0-xfer { | 151 | uart0_xfer: uart0-xfer { |
152 | rockchip,pins = <RK_GPIO1 0 RK_FUNC_1 &pcfg_pull_none>, | 152 | rockchip,pins = <RK_GPIO1 0 RK_FUNC_1 &pcfg_pull_up>, |
153 | <RK_GPIO1 1 RK_FUNC_1 &pcfg_pull_none>; | 153 | <RK_GPIO1 1 RK_FUNC_1 &pcfg_pull_none>; |
154 | }; | 154 | }; |
155 | 155 | ||
@@ -164,7 +164,7 @@ | |||
164 | 164 | ||
165 | uart1 { | 165 | uart1 { |
166 | uart1_xfer: uart1-xfer { | 166 | uart1_xfer: uart1-xfer { |
167 | rockchip,pins = <RK_GPIO1 4 RK_FUNC_1 &pcfg_pull_none>, | 167 | rockchip,pins = <RK_GPIO1 4 RK_FUNC_1 &pcfg_pull_up>, |
168 | <RK_GPIO1 5 RK_FUNC_1 &pcfg_pull_none>; | 168 | <RK_GPIO1 5 RK_FUNC_1 &pcfg_pull_none>; |
169 | }; | 169 | }; |
170 | 170 | ||
@@ -179,7 +179,7 @@ | |||
179 | 179 | ||
180 | uart2 { | 180 | uart2 { |
181 | uart2_xfer: uart2-xfer { | 181 | uart2_xfer: uart2-xfer { |
182 | rockchip,pins = <RK_GPIO1 8 RK_FUNC_1 &pcfg_pull_none>, | 182 | rockchip,pins = <RK_GPIO1 8 RK_FUNC_1 &pcfg_pull_up>, |
183 | <RK_GPIO1 9 RK_FUNC_1 &pcfg_pull_none>; | 183 | <RK_GPIO1 9 RK_FUNC_1 &pcfg_pull_none>; |
184 | }; | 184 | }; |
185 | /* no rts / cts for uart2 */ | 185 | /* no rts / cts for uart2 */ |
@@ -187,7 +187,7 @@ | |||
187 | 187 | ||
188 | uart3 { | 188 | uart3 { |
189 | uart3_xfer: uart3-xfer { | 189 | uart3_xfer: uart3-xfer { |
190 | rockchip,pins = <RK_GPIO1 10 RK_FUNC_1 &pcfg_pull_none>, | 190 | rockchip,pins = <RK_GPIO1 10 RK_FUNC_1 &pcfg_pull_up>, |
191 | <RK_GPIO1 11 RK_FUNC_1 &pcfg_pull_none>; | 191 | <RK_GPIO1 11 RK_FUNC_1 &pcfg_pull_none>; |
192 | }; | 192 | }; |
193 | 193 | ||