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authorJack Steiner <steiner@sgi.com>2005-12-06 09:05:24 -0500
committerTony Luck <tony.luck@intel.com>2005-12-06 12:13:42 -0500
commit590711b7dd731bb04e7892c0451566d788985e79 (patch)
treeaa5f23e68992eaaeec13b80e13b546ff56d1e316 /arch
parentbd1d6e2451f2bb0132416fda4d129c4f57a827bc (diff)
[IA64-SGI] Fix SN PTC deadlock recovery
The patch that added support for a new platform chipset (shub2) broke PTC deadlock recovery on older versions of the chipset. (PTCs are the SN platform-specific method for doing a global TLB purge). This patch fixes deadlock recovery so that it works on both the old & new chipsets. Signed-off-by: Jack Steiner <steiner@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/ia64/sn/kernel/sn2/ptc_deadlock.S8
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/ia64/sn/kernel/sn2/ptc_deadlock.S b/arch/ia64/sn/kernel/sn2/ptc_deadlock.S
index 3fa95065a446..bebbcc4f8dd4 100644
--- a/arch/ia64/sn/kernel/sn2/ptc_deadlock.S
+++ b/arch/ia64/sn/kernel/sn2/ptc_deadlock.S
@@ -39,9 +39,13 @@ sn2_ptc_deadlock_recovery_core:
39 mov r8=r0 39 mov r8=r0
40 40
411: 411:
42 cmp.ne p8,p9=r0,ptc1 // Test for shub type (ptc1 non-null on shub1)
43 // p8 = 1 if shub1, p9 = 1 if shub2
44
42 add scr2=ALIAS_OFFSET,piowc // Address of WRITE_STATUS alias register 45 add scr2=ALIAS_OFFSET,piowc // Address of WRITE_STATUS alias register
43 ;; 46 mov scr1=7;; // Clear DEADLOCK, WRITE_ERROR, MULTI_WRITE_ERROR
44 ld8.acq scr1=[scr2];; 47(p8) st8.rel [scr2]=scr1;;
48(p9) ld8.acq scr1=[scr2];;
45 49
465: ld8.acq scr1=[piowc];; // Wait for PIOs to complete. 505: ld8.acq scr1=[piowc];; // Wait for PIOs to complete.
47 hint @pause 51 hint @pause