diff options
author | Grant Likely <grant.likely@secretlab.ca> | 2011-05-04 01:02:15 -0400 |
---|---|---|
committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2011-05-04 01:02:15 -0400 |
commit | 476eb4912601a8c01e6702b9a029f476b4b131d2 (patch) | |
tree | 2ed0b8c166c7cb46174318fe187f5edc062829be /arch | |
parent | 65f47f1339dfcffcd5837a307172fb41aa39e479 (diff) |
powerpc/irq: Stop exporting irq_map
First step in eliminating irq_map[] table entirely
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch')
30 files changed, 148 insertions, 222 deletions
diff --git a/arch/powerpc/include/asm/irq.h b/arch/powerpc/include/asm/irq.h index 47b7905a6369..e1983d577688 100644 --- a/arch/powerpc/include/asm/irq.h +++ b/arch/powerpc/include/asm/irq.h | |||
@@ -128,25 +128,10 @@ struct irq_host { | |||
128 | struct device_node *of_node; | 128 | struct device_node *of_node; |
129 | }; | 129 | }; |
130 | 130 | ||
131 | /* The main irq map itself is an array of NR_IRQ entries containing the | 131 | struct irq_data; |
132 | * associate host and irq number. An entry with a host of NULL is free. | 132 | extern irq_hw_number_t irqd_to_hwirq(struct irq_data *d); |
133 | * An entry can be allocated if it's free, the allocator always then sets | ||
134 | * hwirq first to the host's invalid irq number and then fills ops. | ||
135 | */ | ||
136 | struct irq_map_entry { | ||
137 | irq_hw_number_t hwirq; | ||
138 | struct irq_host *host; | ||
139 | }; | ||
140 | |||
141 | extern struct irq_map_entry irq_map[NR_IRQS]; | ||
142 | |||
143 | extern irq_hw_number_t virq_to_hw(unsigned int virq); | 133 | extern irq_hw_number_t virq_to_hw(unsigned int virq); |
144 | 134 | extern struct irq_host *virq_to_host(unsigned int virq); | |
145 | /* This will eventually -replace- virq_to_hw if/when we stash the | ||
146 | * HW number in the irq_data itself. We use a macro so we can inline | ||
147 | * it as irq_data isn't defined yet | ||
148 | */ | ||
149 | #define irq_data_to_hw(d) (irq_map[(d)->irq].hwirq) | ||
150 | 135 | ||
151 | /** | 136 | /** |
152 | * irq_alloc_host - Allocate a new irq_host data structure | 137 | * irq_alloc_host - Allocate a new irq_host data structure |
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c index 4f5d6e751a65..a81dd74414bf 100644 --- a/arch/powerpc/kernel/irq.c +++ b/arch/powerpc/kernel/irq.c | |||
@@ -481,20 +481,42 @@ void do_softirq(void) | |||
481 | * IRQ controller and virtual interrupts | 481 | * IRQ controller and virtual interrupts |
482 | */ | 482 | */ |
483 | 483 | ||
484 | /* The main irq map itself is an array of NR_IRQ entries containing the | ||
485 | * associate host and irq number. An entry with a host of NULL is free. | ||
486 | * An entry can be allocated if it's free, the allocator always then sets | ||
487 | * hwirq first to the host's invalid irq number and then fills ops. | ||
488 | */ | ||
489 | struct irq_map_entry { | ||
490 | irq_hw_number_t hwirq; | ||
491 | struct irq_host *host; | ||
492 | }; | ||
493 | |||
484 | static LIST_HEAD(irq_hosts); | 494 | static LIST_HEAD(irq_hosts); |
485 | static DEFINE_RAW_SPINLOCK(irq_big_lock); | 495 | static DEFINE_RAW_SPINLOCK(irq_big_lock); |
486 | static unsigned int revmap_trees_allocated; | 496 | static unsigned int revmap_trees_allocated; |
487 | static DEFINE_MUTEX(revmap_trees_mutex); | 497 | static DEFINE_MUTEX(revmap_trees_mutex); |
488 | struct irq_map_entry irq_map[NR_IRQS]; | 498 | static struct irq_map_entry irq_map[NR_IRQS]; |
489 | static unsigned int irq_virq_count = NR_IRQS; | 499 | static unsigned int irq_virq_count = NR_IRQS; |
490 | static struct irq_host *irq_default_host; | 500 | static struct irq_host *irq_default_host; |
491 | 501 | ||
502 | irq_hw_number_t irqd_to_hwirq(struct irq_data *d) | ||
503 | { | ||
504 | return irq_map[d->irq].hwirq; | ||
505 | } | ||
506 | EXPORT_SYMBOL_GPL(irqd_to_hwirq); | ||
507 | |||
492 | irq_hw_number_t virq_to_hw(unsigned int virq) | 508 | irq_hw_number_t virq_to_hw(unsigned int virq) |
493 | { | 509 | { |
494 | return irq_map[virq].hwirq; | 510 | return irq_map[virq].hwirq; |
495 | } | 511 | } |
496 | EXPORT_SYMBOL_GPL(virq_to_hw); | 512 | EXPORT_SYMBOL_GPL(virq_to_hw); |
497 | 513 | ||
514 | struct irq_host *virq_to_host(unsigned int virq) | ||
515 | { | ||
516 | return irq_map[virq].host; | ||
517 | } | ||
518 | EXPORT_SYMBOL_GPL(virq_to_host); | ||
519 | |||
498 | static int default_irq_host_match(struct irq_host *h, struct device_node *np) | 520 | static int default_irq_host_match(struct irq_host *h, struct device_node *np) |
499 | { | 521 | { |
500 | return h->of_node != NULL && h->of_node == np; | 522 | return h->of_node != NULL && h->of_node == np; |
@@ -1103,7 +1125,7 @@ static int virq_debug_show(struct seq_file *m, void *private) | |||
1103 | struct irq_chip *chip; | 1125 | struct irq_chip *chip; |
1104 | 1126 | ||
1105 | seq_printf(m, "%5d ", i); | 1127 | seq_printf(m, "%5d ", i); |
1106 | seq_printf(m, "0x%05lx ", virq_to_hw(i)); | 1128 | seq_printf(m, "0x%05lx ", irq_map[i].hwirq); |
1107 | 1129 | ||
1108 | chip = irq_desc_get_chip(desc); | 1130 | chip = irq_desc_get_chip(desc); |
1109 | if (chip && chip->name) | 1131 | if (chip && chip->name) |
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c b/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c index cfc4b2009982..a8bc0d443934 100644 --- a/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c +++ b/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c | |||
@@ -61,7 +61,7 @@ irq_to_pic_bit(unsigned int irq) | |||
61 | static void | 61 | static void |
62 | cpld_mask_irq(struct irq_data *d) | 62 | cpld_mask_irq(struct irq_data *d) |
63 | { | 63 | { |
64 | unsigned int cpld_irq = (unsigned int)irq_map[d->irq].hwirq; | 64 | unsigned int cpld_irq = (unsigned int)irqd_to_hwirq(d); |
65 | void __iomem *pic_mask = irq_to_pic_mask(cpld_irq); | 65 | void __iomem *pic_mask = irq_to_pic_mask(cpld_irq); |
66 | 66 | ||
67 | out_8(pic_mask, | 67 | out_8(pic_mask, |
@@ -71,7 +71,7 @@ cpld_mask_irq(struct irq_data *d) | |||
71 | static void | 71 | static void |
72 | cpld_unmask_irq(struct irq_data *d) | 72 | cpld_unmask_irq(struct irq_data *d) |
73 | { | 73 | { |
74 | unsigned int cpld_irq = (unsigned int)irq_map[d->irq].hwirq; | 74 | unsigned int cpld_irq = (unsigned int)irqd_to_hwirq(d); |
75 | void __iomem *pic_mask = irq_to_pic_mask(cpld_irq); | 75 | void __iomem *pic_mask = irq_to_pic_mask(cpld_irq); |
76 | 76 | ||
77 | out_8(pic_mask, | 77 | out_8(pic_mask, |
diff --git a/arch/powerpc/platforms/52xx/media5200.c b/arch/powerpc/platforms/52xx/media5200.c index 57a6a349e932..96f85e5e0cd3 100644 --- a/arch/powerpc/platforms/52xx/media5200.c +++ b/arch/powerpc/platforms/52xx/media5200.c | |||
@@ -56,7 +56,7 @@ static void media5200_irq_unmask(struct irq_data *d) | |||
56 | 56 | ||
57 | spin_lock_irqsave(&media5200_irq.lock, flags); | 57 | spin_lock_irqsave(&media5200_irq.lock, flags); |
58 | val = in_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE); | 58 | val = in_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE); |
59 | val |= 1 << (MEDIA5200_IRQ_SHIFT + irq_map[d->irq].hwirq); | 59 | val |= 1 << (MEDIA5200_IRQ_SHIFT + irqd_to_hwirq(d)); |
60 | out_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE, val); | 60 | out_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE, val); |
61 | spin_unlock_irqrestore(&media5200_irq.lock, flags); | 61 | spin_unlock_irqrestore(&media5200_irq.lock, flags); |
62 | } | 62 | } |
@@ -68,7 +68,7 @@ static void media5200_irq_mask(struct irq_data *d) | |||
68 | 68 | ||
69 | spin_lock_irqsave(&media5200_irq.lock, flags); | 69 | spin_lock_irqsave(&media5200_irq.lock, flags); |
70 | val = in_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE); | 70 | val = in_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE); |
71 | val &= ~(1 << (MEDIA5200_IRQ_SHIFT + irq_map[d->irq].hwirq)); | 71 | val &= ~(1 << (MEDIA5200_IRQ_SHIFT + irqd_to_hwirq(d))); |
72 | out_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE, val); | 72 | out_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE, val); |
73 | spin_unlock_irqrestore(&media5200_irq.lock, flags); | 73 | spin_unlock_irqrestore(&media5200_irq.lock, flags); |
74 | } | 74 | } |
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c b/arch/powerpc/platforms/52xx/mpc52xx_pic.c index 1dd15400f6f0..bb611819b832 100644 --- a/arch/powerpc/platforms/52xx/mpc52xx_pic.c +++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.c | |||
@@ -157,48 +157,30 @@ static inline void io_be_clrbit(u32 __iomem *addr, int bitno) | |||
157 | */ | 157 | */ |
158 | static void mpc52xx_extirq_mask(struct irq_data *d) | 158 | static void mpc52xx_extirq_mask(struct irq_data *d) |
159 | { | 159 | { |
160 | int irq; | 160 | int l2irq = irqd_to_hwirq(d) & MPC52xx_IRQ_L2_MASK; |
161 | int l2irq; | ||
162 | |||
163 | irq = irq_map[d->irq].hwirq; | ||
164 | l2irq = irq & MPC52xx_IRQ_L2_MASK; | ||
165 | |||
166 | io_be_clrbit(&intr->ctrl, 11 - l2irq); | 161 | io_be_clrbit(&intr->ctrl, 11 - l2irq); |
167 | } | 162 | } |
168 | 163 | ||
169 | static void mpc52xx_extirq_unmask(struct irq_data *d) | 164 | static void mpc52xx_extirq_unmask(struct irq_data *d) |
170 | { | 165 | { |
171 | int irq; | 166 | int l2irq = irqd_to_hwirq(d) & MPC52xx_IRQ_L2_MASK; |
172 | int l2irq; | ||
173 | |||
174 | irq = irq_map[d->irq].hwirq; | ||
175 | l2irq = irq & MPC52xx_IRQ_L2_MASK; | ||
176 | |||
177 | io_be_setbit(&intr->ctrl, 11 - l2irq); | 167 | io_be_setbit(&intr->ctrl, 11 - l2irq); |
178 | } | 168 | } |
179 | 169 | ||
180 | static void mpc52xx_extirq_ack(struct irq_data *d) | 170 | static void mpc52xx_extirq_ack(struct irq_data *d) |
181 | { | 171 | { |
182 | int irq; | 172 | int l2irq = irqd_to_hwirq(d) & MPC52xx_IRQ_L2_MASK; |
183 | int l2irq; | ||
184 | |||
185 | irq = irq_map[d->irq].hwirq; | ||
186 | l2irq = irq & MPC52xx_IRQ_L2_MASK; | ||
187 | |||
188 | io_be_setbit(&intr->ctrl, 27-l2irq); | 173 | io_be_setbit(&intr->ctrl, 27-l2irq); |
189 | } | 174 | } |
190 | 175 | ||
191 | static int mpc52xx_extirq_set_type(struct irq_data *d, unsigned int flow_type) | 176 | static int mpc52xx_extirq_set_type(struct irq_data *d, unsigned int flow_type) |
192 | { | 177 | { |
193 | u32 ctrl_reg, type; | 178 | u32 ctrl_reg, type; |
194 | int irq; | 179 | int l2irq = irqd_to_hwirq(d) & MPC52xx_IRQ_L2_MASK; |
195 | int l2irq; | ||
196 | void *handler = handle_level_irq; | 180 | void *handler = handle_level_irq; |
197 | 181 | ||
198 | irq = irq_map[d->irq].hwirq; | 182 | pr_debug("%s: irq=%x. l2=%d flow_type=%d\n", __func__, |
199 | l2irq = irq & MPC52xx_IRQ_L2_MASK; | 183 | (int) irqd_to_hwirq(d), l2irq, flow_type); |
200 | |||
201 | pr_debug("%s: irq=%x. l2=%d flow_type=%d\n", __func__, irq, l2irq, flow_type); | ||
202 | 184 | ||
203 | switch (flow_type) { | 185 | switch (flow_type) { |
204 | case IRQF_TRIGGER_HIGH: type = 0; break; | 186 | case IRQF_TRIGGER_HIGH: type = 0; break; |
@@ -237,23 +219,13 @@ static int mpc52xx_null_set_type(struct irq_data *d, unsigned int flow_type) | |||
237 | 219 | ||
238 | static void mpc52xx_main_mask(struct irq_data *d) | 220 | static void mpc52xx_main_mask(struct irq_data *d) |
239 | { | 221 | { |
240 | int irq; | 222 | int l2irq = irqd_to_hwirq(d) & MPC52xx_IRQ_L2_MASK; |
241 | int l2irq; | ||
242 | |||
243 | irq = irq_map[d->irq].hwirq; | ||
244 | l2irq = irq & MPC52xx_IRQ_L2_MASK; | ||
245 | |||
246 | io_be_setbit(&intr->main_mask, 16 - l2irq); | 223 | io_be_setbit(&intr->main_mask, 16 - l2irq); |
247 | } | 224 | } |
248 | 225 | ||
249 | static void mpc52xx_main_unmask(struct irq_data *d) | 226 | static void mpc52xx_main_unmask(struct irq_data *d) |
250 | { | 227 | { |
251 | int irq; | 228 | int l2irq = irqd_to_hwirq(d) & MPC52xx_IRQ_L2_MASK; |
252 | int l2irq; | ||
253 | |||
254 | irq = irq_map[d->irq].hwirq; | ||
255 | l2irq = irq & MPC52xx_IRQ_L2_MASK; | ||
256 | |||
257 | io_be_clrbit(&intr->main_mask, 16 - l2irq); | 229 | io_be_clrbit(&intr->main_mask, 16 - l2irq); |
258 | } | 230 | } |
259 | 231 | ||
@@ -270,23 +242,13 @@ static struct irq_chip mpc52xx_main_irqchip = { | |||
270 | */ | 242 | */ |
271 | static void mpc52xx_periph_mask(struct irq_data *d) | 243 | static void mpc52xx_periph_mask(struct irq_data *d) |
272 | { | 244 | { |
273 | int irq; | 245 | int l2irq = irqd_to_hwirq(d) & MPC52xx_IRQ_L2_MASK; |
274 | int l2irq; | ||
275 | |||
276 | irq = irq_map[d->irq].hwirq; | ||
277 | l2irq = irq & MPC52xx_IRQ_L2_MASK; | ||
278 | |||
279 | io_be_setbit(&intr->per_mask, 31 - l2irq); | 246 | io_be_setbit(&intr->per_mask, 31 - l2irq); |
280 | } | 247 | } |
281 | 248 | ||
282 | static void mpc52xx_periph_unmask(struct irq_data *d) | 249 | static void mpc52xx_periph_unmask(struct irq_data *d) |
283 | { | 250 | { |
284 | int irq; | 251 | int l2irq = irqd_to_hwirq(d) & MPC52xx_IRQ_L2_MASK; |
285 | int l2irq; | ||
286 | |||
287 | irq = irq_map[d->irq].hwirq; | ||
288 | l2irq = irq & MPC52xx_IRQ_L2_MASK; | ||
289 | |||
290 | io_be_clrbit(&intr->per_mask, 31 - l2irq); | 252 | io_be_clrbit(&intr->per_mask, 31 - l2irq); |
291 | } | 253 | } |
292 | 254 | ||
@@ -303,34 +265,19 @@ static struct irq_chip mpc52xx_periph_irqchip = { | |||
303 | */ | 265 | */ |
304 | static void mpc52xx_sdma_mask(struct irq_data *d) | 266 | static void mpc52xx_sdma_mask(struct irq_data *d) |
305 | { | 267 | { |
306 | int irq; | 268 | int l2irq = irqd_to_hwirq(d) & MPC52xx_IRQ_L2_MASK; |
307 | int l2irq; | ||
308 | |||
309 | irq = irq_map[d->irq].hwirq; | ||
310 | l2irq = irq & MPC52xx_IRQ_L2_MASK; | ||
311 | |||
312 | io_be_setbit(&sdma->IntMask, l2irq); | 269 | io_be_setbit(&sdma->IntMask, l2irq); |
313 | } | 270 | } |
314 | 271 | ||
315 | static void mpc52xx_sdma_unmask(struct irq_data *d) | 272 | static void mpc52xx_sdma_unmask(struct irq_data *d) |
316 | { | 273 | { |
317 | int irq; | 274 | int l2irq = irqd_to_hwirq(d) & MPC52xx_IRQ_L2_MASK; |
318 | int l2irq; | ||
319 | |||
320 | irq = irq_map[d->irq].hwirq; | ||
321 | l2irq = irq & MPC52xx_IRQ_L2_MASK; | ||
322 | |||
323 | io_be_clrbit(&sdma->IntMask, l2irq); | 275 | io_be_clrbit(&sdma->IntMask, l2irq); |
324 | } | 276 | } |
325 | 277 | ||
326 | static void mpc52xx_sdma_ack(struct irq_data *d) | 278 | static void mpc52xx_sdma_ack(struct irq_data *d) |
327 | { | 279 | { |
328 | int irq; | 280 | int l2irq = irqd_to_hwirq(d) & MPC52xx_IRQ_L2_MASK; |
329 | int l2irq; | ||
330 | |||
331 | irq = irq_map[d->irq].hwirq; | ||
332 | l2irq = irq & MPC52xx_IRQ_L2_MASK; | ||
333 | |||
334 | out_be32(&sdma->IntPend, 1 << l2irq); | 281 | out_be32(&sdma->IntPend, 1 << l2irq); |
335 | } | 282 | } |
336 | 283 | ||
diff --git a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c index 4a4eb6ffa12f..5d6c34ce0cba 100644 --- a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c +++ b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c | |||
@@ -42,7 +42,7 @@ struct pq2ads_pci_pic { | |||
42 | static void pq2ads_pci_mask_irq(struct irq_data *d) | 42 | static void pq2ads_pci_mask_irq(struct irq_data *d) |
43 | { | 43 | { |
44 | struct pq2ads_pci_pic *priv = irq_data_get_irq_chip_data(d); | 44 | struct pq2ads_pci_pic *priv = irq_data_get_irq_chip_data(d); |
45 | int irq = NUM_IRQS - virq_to_hw(d->irq) - 1; | 45 | int irq = NUM_IRQS - irqd_to_hwirq(d) - 1; |
46 | 46 | ||
47 | if (irq != -1) { | 47 | if (irq != -1) { |
48 | unsigned long flags; | 48 | unsigned long flags; |
@@ -58,7 +58,7 @@ static void pq2ads_pci_mask_irq(struct irq_data *d) | |||
58 | static void pq2ads_pci_unmask_irq(struct irq_data *d) | 58 | static void pq2ads_pci_unmask_irq(struct irq_data *d) |
59 | { | 59 | { |
60 | struct pq2ads_pci_pic *priv = irq_data_get_irq_chip_data(d); | 60 | struct pq2ads_pci_pic *priv = irq_data_get_irq_chip_data(d); |
61 | int irq = NUM_IRQS - virq_to_hw(d->irq) - 1; | 61 | int irq = NUM_IRQS - irqd_to_hwirq(d) - 1; |
62 | 62 | ||
63 | if (irq != -1) { | 63 | if (irq != -1) { |
64 | unsigned long flags; | 64 | unsigned long flags; |
diff --git a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c index db864623b4ae..12cb9bb2cc68 100644 --- a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c +++ b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c | |||
@@ -48,8 +48,6 @@ static struct socrates_fpga_irq_info fpga_irqs[SOCRATES_FPGA_NUM_IRQS] = { | |||
48 | [8] = {0, IRQ_TYPE_LEVEL_HIGH}, | 48 | [8] = {0, IRQ_TYPE_LEVEL_HIGH}, |
49 | }; | 49 | }; |
50 | 50 | ||
51 | #define socrates_fpga_irq_to_hw(virq) ((unsigned int)irq_map[virq].hwirq) | ||
52 | |||
53 | static DEFINE_RAW_SPINLOCK(socrates_fpga_pic_lock); | 51 | static DEFINE_RAW_SPINLOCK(socrates_fpga_pic_lock); |
54 | 52 | ||
55 | static void __iomem *socrates_fpga_pic_iobase; | 53 | static void __iomem *socrates_fpga_pic_iobase; |
@@ -110,11 +108,9 @@ void socrates_fpga_pic_cascade(unsigned int irq, struct irq_desc *desc) | |||
110 | static void socrates_fpga_pic_ack(struct irq_data *d) | 108 | static void socrates_fpga_pic_ack(struct irq_data *d) |
111 | { | 109 | { |
112 | unsigned long flags; | 110 | unsigned long flags; |
113 | unsigned int hwirq, irq_line; | 111 | unsigned int irq_line, hwirq = irqd_to_hwirq(d); |
114 | uint32_t mask; | 112 | uint32_t mask; |
115 | 113 | ||
116 | hwirq = socrates_fpga_irq_to_hw(d->irq); | ||
117 | |||
118 | irq_line = fpga_irqs[hwirq].irq_line; | 114 | irq_line = fpga_irqs[hwirq].irq_line; |
119 | raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags); | 115 | raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags); |
120 | mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line)) | 116 | mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line)) |
@@ -127,12 +123,10 @@ static void socrates_fpga_pic_ack(struct irq_data *d) | |||
127 | static void socrates_fpga_pic_mask(struct irq_data *d) | 123 | static void socrates_fpga_pic_mask(struct irq_data *d) |
128 | { | 124 | { |
129 | unsigned long flags; | 125 | unsigned long flags; |
130 | unsigned int hwirq; | 126 | unsigned int hwirq = irqd_to_hwirq(d); |
131 | int irq_line; | 127 | int irq_line; |
132 | u32 mask; | 128 | u32 mask; |
133 | 129 | ||
134 | hwirq = socrates_fpga_irq_to_hw(d->irq); | ||
135 | |||
136 | irq_line = fpga_irqs[hwirq].irq_line; | 130 | irq_line = fpga_irqs[hwirq].irq_line; |
137 | raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags); | 131 | raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags); |
138 | mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line)) | 132 | mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line)) |
@@ -145,12 +139,10 @@ static void socrates_fpga_pic_mask(struct irq_data *d) | |||
145 | static void socrates_fpga_pic_mask_ack(struct irq_data *d) | 139 | static void socrates_fpga_pic_mask_ack(struct irq_data *d) |
146 | { | 140 | { |
147 | unsigned long flags; | 141 | unsigned long flags; |
148 | unsigned int hwirq; | 142 | unsigned int hwirq = irqd_to_hwirq(d); |
149 | int irq_line; | 143 | int irq_line; |
150 | u32 mask; | 144 | u32 mask; |
151 | 145 | ||
152 | hwirq = socrates_fpga_irq_to_hw(d->irq); | ||
153 | |||
154 | irq_line = fpga_irqs[hwirq].irq_line; | 146 | irq_line = fpga_irqs[hwirq].irq_line; |
155 | raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags); | 147 | raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags); |
156 | mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line)) | 148 | mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line)) |
@@ -164,12 +156,10 @@ static void socrates_fpga_pic_mask_ack(struct irq_data *d) | |||
164 | static void socrates_fpga_pic_unmask(struct irq_data *d) | 156 | static void socrates_fpga_pic_unmask(struct irq_data *d) |
165 | { | 157 | { |
166 | unsigned long flags; | 158 | unsigned long flags; |
167 | unsigned int hwirq; | 159 | unsigned int hwirq = irqd_to_hwirq(d); |
168 | int irq_line; | 160 | int irq_line; |
169 | u32 mask; | 161 | u32 mask; |
170 | 162 | ||
171 | hwirq = socrates_fpga_irq_to_hw(d->irq); | ||
172 | |||
173 | irq_line = fpga_irqs[hwirq].irq_line; | 163 | irq_line = fpga_irqs[hwirq].irq_line; |
174 | raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags); | 164 | raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags); |
175 | mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line)) | 165 | mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line)) |
@@ -182,12 +172,10 @@ static void socrates_fpga_pic_unmask(struct irq_data *d) | |||
182 | static void socrates_fpga_pic_eoi(struct irq_data *d) | 172 | static void socrates_fpga_pic_eoi(struct irq_data *d) |
183 | { | 173 | { |
184 | unsigned long flags; | 174 | unsigned long flags; |
185 | unsigned int hwirq; | 175 | unsigned int hwirq = irqd_to_hwirq(d); |
186 | int irq_line; | 176 | int irq_line; |
187 | u32 mask; | 177 | u32 mask; |
188 | 178 | ||
189 | hwirq = socrates_fpga_irq_to_hw(d->irq); | ||
190 | |||
191 | irq_line = fpga_irqs[hwirq].irq_line; | 179 | irq_line = fpga_irqs[hwirq].irq_line; |
192 | raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags); | 180 | raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags); |
193 | mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line)) | 181 | mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line)) |
@@ -201,12 +189,10 @@ static int socrates_fpga_pic_set_type(struct irq_data *d, | |||
201 | unsigned int flow_type) | 189 | unsigned int flow_type) |
202 | { | 190 | { |
203 | unsigned long flags; | 191 | unsigned long flags; |
204 | unsigned int hwirq; | 192 | unsigned int hwirq = irqd_to_hwirq(d); |
205 | int polarity; | 193 | int polarity; |
206 | u32 mask; | 194 | u32 mask; |
207 | 195 | ||
208 | hwirq = socrates_fpga_irq_to_hw(d->irq); | ||
209 | |||
210 | if (fpga_irqs[hwirq].type != IRQ_TYPE_NONE) | 196 | if (fpga_irqs[hwirq].type != IRQ_TYPE_NONE) |
211 | return -EINVAL; | 197 | return -EINVAL; |
212 | 198 | ||
diff --git a/arch/powerpc/platforms/86xx/gef_pic.c b/arch/powerpc/platforms/86xx/gef_pic.c index 0beec7d5566b..94594e58594c 100644 --- a/arch/powerpc/platforms/86xx/gef_pic.c +++ b/arch/powerpc/platforms/86xx/gef_pic.c | |||
@@ -46,8 +46,6 @@ | |||
46 | #define GEF_PIC_CPU0_MCP_MASK GEF_PIC_MCP_MASK(0) | 46 | #define GEF_PIC_CPU0_MCP_MASK GEF_PIC_MCP_MASK(0) |
47 | #define GEF_PIC_CPU1_MCP_MASK GEF_PIC_MCP_MASK(1) | 47 | #define GEF_PIC_CPU1_MCP_MASK GEF_PIC_MCP_MASK(1) |
48 | 48 | ||
49 | #define gef_irq_to_hw(virq) ((unsigned int)irq_map[virq].hwirq) | ||
50 | |||
51 | 49 | ||
52 | static DEFINE_RAW_SPINLOCK(gef_pic_lock); | 50 | static DEFINE_RAW_SPINLOCK(gef_pic_lock); |
53 | 51 | ||
@@ -113,11 +111,9 @@ void gef_pic_cascade(unsigned int irq, struct irq_desc *desc) | |||
113 | static void gef_pic_mask(struct irq_data *d) | 111 | static void gef_pic_mask(struct irq_data *d) |
114 | { | 112 | { |
115 | unsigned long flags; | 113 | unsigned long flags; |
116 | unsigned int hwirq; | 114 | unsigned int hwirq = irqd_to_hwirq(d); |
117 | u32 mask; | 115 | u32 mask; |
118 | 116 | ||
119 | hwirq = gef_irq_to_hw(d->irq); | ||
120 | |||
121 | raw_spin_lock_irqsave(&gef_pic_lock, flags); | 117 | raw_spin_lock_irqsave(&gef_pic_lock, flags); |
122 | mask = in_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0)); | 118 | mask = in_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0)); |
123 | mask &= ~(1 << hwirq); | 119 | mask &= ~(1 << hwirq); |
@@ -136,11 +132,9 @@ static void gef_pic_mask_ack(struct irq_data *d) | |||
136 | static void gef_pic_unmask(struct irq_data *d) | 132 | static void gef_pic_unmask(struct irq_data *d) |
137 | { | 133 | { |
138 | unsigned long flags; | 134 | unsigned long flags; |
139 | unsigned int hwirq; | 135 | unsigned int hwirq = irqd_to_hwirq(d); |
140 | u32 mask; | 136 | u32 mask; |
141 | 137 | ||
142 | hwirq = gef_irq_to_hw(d->irq); | ||
143 | |||
144 | raw_spin_lock_irqsave(&gef_pic_lock, flags); | 138 | raw_spin_lock_irqsave(&gef_pic_lock, flags); |
145 | mask = in_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0)); | 139 | mask = in_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0)); |
146 | mask |= (1 << hwirq); | 140 | mask |= (1 << hwirq); |
diff --git a/arch/powerpc/platforms/8xx/m8xx_setup.c b/arch/powerpc/platforms/8xx/m8xx_setup.c index 9ecce995dd4b..1e121088826f 100644 --- a/arch/powerpc/platforms/8xx/m8xx_setup.c +++ b/arch/powerpc/platforms/8xx/m8xx_setup.c | |||
@@ -150,7 +150,7 @@ void __init mpc8xx_calibrate_decr(void) | |||
150 | */ | 150 | */ |
151 | cpu = of_find_node_by_type(NULL, "cpu"); | 151 | cpu = of_find_node_by_type(NULL, "cpu"); |
152 | virq= irq_of_parse_and_map(cpu, 0); | 152 | virq= irq_of_parse_and_map(cpu, 0); |
153 | irq = irq_map[virq].hwirq; | 153 | irq = virq_to_hw(virq); |
154 | 154 | ||
155 | sys_tmr2 = immr_map(im_sit); | 155 | sys_tmr2 = immr_map(im_sit); |
156 | out_be16(&sys_tmr2->sit_tbscr, ((1 << (7 - (irq/2))) << 8) | | 156 | out_be16(&sys_tmr2->sit_tbscr, ((1 << (7 - (irq/2))) << 8) | |
diff --git a/arch/powerpc/platforms/cell/axon_msi.c b/arch/powerpc/platforms/cell/axon_msi.c index bb5ebf8fa80b..1e3329e8578b 100644 --- a/arch/powerpc/platforms/cell/axon_msi.c +++ b/arch/powerpc/platforms/cell/axon_msi.c | |||
@@ -113,7 +113,7 @@ static void axon_msi_cascade(unsigned int irq, struct irq_desc *desc) | |||
113 | pr_devel("axon_msi: woff %x roff %x msi %x\n", | 113 | pr_devel("axon_msi: woff %x roff %x msi %x\n", |
114 | write_offset, msic->read_offset, msi); | 114 | write_offset, msic->read_offset, msi); |
115 | 115 | ||
116 | if (msi < NR_IRQS && irq_map[msi].host == msic->irq_host) { | 116 | if (msi < NR_IRQS && virq_to_host(msi) == msic->irq_host) { |
117 | generic_handle_irq(msi); | 117 | generic_handle_irq(msi); |
118 | msic->fifo_virt[idx] = cpu_to_le32(0xffffffff); | 118 | msic->fifo_virt[idx] = cpu_to_le32(0xffffffff); |
119 | } else { | 119 | } else { |
diff --git a/arch/powerpc/platforms/cell/spider-pic.c b/arch/powerpc/platforms/cell/spider-pic.c index c5cf50e6b45a..34d2b99d10c3 100644 --- a/arch/powerpc/platforms/cell/spider-pic.c +++ b/arch/powerpc/platforms/cell/spider-pic.c | |||
@@ -70,7 +70,7 @@ static struct spider_pic spider_pics[SPIDER_CHIP_COUNT]; | |||
70 | 70 | ||
71 | static struct spider_pic *spider_virq_to_pic(unsigned int virq) | 71 | static struct spider_pic *spider_virq_to_pic(unsigned int virq) |
72 | { | 72 | { |
73 | return irq_map[virq].host->host_data; | 73 | return virq_to_host(virq)->host_data; |
74 | } | 74 | } |
75 | 75 | ||
76 | static void __iomem *spider_get_irq_config(struct spider_pic *pic, | 76 | static void __iomem *spider_get_irq_config(struct spider_pic *pic, |
@@ -82,7 +82,7 @@ static void __iomem *spider_get_irq_config(struct spider_pic *pic, | |||
82 | static void spider_unmask_irq(struct irq_data *d) | 82 | static void spider_unmask_irq(struct irq_data *d) |
83 | { | 83 | { |
84 | struct spider_pic *pic = spider_virq_to_pic(d->irq); | 84 | struct spider_pic *pic = spider_virq_to_pic(d->irq); |
85 | void __iomem *cfg = spider_get_irq_config(pic, irq_map[d->irq].hwirq); | 85 | void __iomem *cfg = spider_get_irq_config(pic, irqd_to_hwirq(d)); |
86 | 86 | ||
87 | out_be32(cfg, in_be32(cfg) | 0x30000000u); | 87 | out_be32(cfg, in_be32(cfg) | 0x30000000u); |
88 | } | 88 | } |
@@ -90,7 +90,7 @@ static void spider_unmask_irq(struct irq_data *d) | |||
90 | static void spider_mask_irq(struct irq_data *d) | 90 | static void spider_mask_irq(struct irq_data *d) |
91 | { | 91 | { |
92 | struct spider_pic *pic = spider_virq_to_pic(d->irq); | 92 | struct spider_pic *pic = spider_virq_to_pic(d->irq); |
93 | void __iomem *cfg = spider_get_irq_config(pic, irq_map[d->irq].hwirq); | 93 | void __iomem *cfg = spider_get_irq_config(pic, irqd_to_hwirq(d)); |
94 | 94 | ||
95 | out_be32(cfg, in_be32(cfg) & ~0x30000000u); | 95 | out_be32(cfg, in_be32(cfg) & ~0x30000000u); |
96 | } | 96 | } |
@@ -98,7 +98,7 @@ static void spider_mask_irq(struct irq_data *d) | |||
98 | static void spider_ack_irq(struct irq_data *d) | 98 | static void spider_ack_irq(struct irq_data *d) |
99 | { | 99 | { |
100 | struct spider_pic *pic = spider_virq_to_pic(d->irq); | 100 | struct spider_pic *pic = spider_virq_to_pic(d->irq); |
101 | unsigned int src = irq_map[d->irq].hwirq; | 101 | unsigned int src = irqd_to_hwirq(d); |
102 | 102 | ||
103 | /* Reset edge detection logic if necessary | 103 | /* Reset edge detection logic if necessary |
104 | */ | 104 | */ |
@@ -117,7 +117,7 @@ static int spider_set_irq_type(struct irq_data *d, unsigned int type) | |||
117 | { | 117 | { |
118 | unsigned int sense = type & IRQ_TYPE_SENSE_MASK; | 118 | unsigned int sense = type & IRQ_TYPE_SENSE_MASK; |
119 | struct spider_pic *pic = spider_virq_to_pic(d->irq); | 119 | struct spider_pic *pic = spider_virq_to_pic(d->irq); |
120 | unsigned int hw = irq_map[d->irq].hwirq; | 120 | unsigned int hw = irqd_to_hwirq(d); |
121 | void __iomem *cfg = spider_get_irq_config(pic, hw); | 121 | void __iomem *cfg = spider_get_irq_config(pic, hw); |
122 | u32 old_mask; | 122 | u32 old_mask; |
123 | u32 ic; | 123 | u32 ic; |
diff --git a/arch/powerpc/platforms/embedded6xx/flipper-pic.c b/arch/powerpc/platforms/embedded6xx/flipper-pic.c index 12aa62b6f227..77cbe4c8f953 100644 --- a/arch/powerpc/platforms/embedded6xx/flipper-pic.c +++ b/arch/powerpc/platforms/embedded6xx/flipper-pic.c | |||
@@ -48,7 +48,7 @@ | |||
48 | 48 | ||
49 | static void flipper_pic_mask_and_ack(struct irq_data *d) | 49 | static void flipper_pic_mask_and_ack(struct irq_data *d) |
50 | { | 50 | { |
51 | int irq = virq_to_hw(d->irq); | 51 | int irq = irqd_to_hwirq(d); |
52 | void __iomem *io_base = irq_data_get_irq_chip_data(d); | 52 | void __iomem *io_base = irq_data_get_irq_chip_data(d); |
53 | u32 mask = 1 << irq; | 53 | u32 mask = 1 << irq; |
54 | 54 | ||
@@ -59,7 +59,7 @@ static void flipper_pic_mask_and_ack(struct irq_data *d) | |||
59 | 59 | ||
60 | static void flipper_pic_ack(struct irq_data *d) | 60 | static void flipper_pic_ack(struct irq_data *d) |
61 | { | 61 | { |
62 | int irq = virq_to_hw(d->irq); | 62 | int irq = irqd_to_hwirq(d); |
63 | void __iomem *io_base = irq_data_get_irq_chip_data(d); | 63 | void __iomem *io_base = irq_data_get_irq_chip_data(d); |
64 | 64 | ||
65 | /* this is at least needed for RSW */ | 65 | /* this is at least needed for RSW */ |
@@ -68,7 +68,7 @@ static void flipper_pic_ack(struct irq_data *d) | |||
68 | 68 | ||
69 | static void flipper_pic_mask(struct irq_data *d) | 69 | static void flipper_pic_mask(struct irq_data *d) |
70 | { | 70 | { |
71 | int irq = virq_to_hw(d->irq); | 71 | int irq = irqd_to_hwirq(d); |
72 | void __iomem *io_base = irq_data_get_irq_chip_data(d); | 72 | void __iomem *io_base = irq_data_get_irq_chip_data(d); |
73 | 73 | ||
74 | clrbits32(io_base + FLIPPER_IMR, 1 << irq); | 74 | clrbits32(io_base + FLIPPER_IMR, 1 << irq); |
@@ -76,7 +76,7 @@ static void flipper_pic_mask(struct irq_data *d) | |||
76 | 76 | ||
77 | static void flipper_pic_unmask(struct irq_data *d) | 77 | static void flipper_pic_unmask(struct irq_data *d) |
78 | { | 78 | { |
79 | int irq = virq_to_hw(d->irq); | 79 | int irq = irqd_to_hwirq(d); |
80 | void __iomem *io_base = irq_data_get_irq_chip_data(d); | 80 | void __iomem *io_base = irq_data_get_irq_chip_data(d); |
81 | 81 | ||
82 | setbits32(io_base + FLIPPER_IMR, 1 << irq); | 82 | setbits32(io_base + FLIPPER_IMR, 1 << irq); |
diff --git a/arch/powerpc/platforms/embedded6xx/hlwd-pic.c b/arch/powerpc/platforms/embedded6xx/hlwd-pic.c index 2bdddfc9d520..44b398b0a2fd 100644 --- a/arch/powerpc/platforms/embedded6xx/hlwd-pic.c +++ b/arch/powerpc/platforms/embedded6xx/hlwd-pic.c | |||
@@ -43,7 +43,7 @@ | |||
43 | 43 | ||
44 | static void hlwd_pic_mask_and_ack(struct irq_data *d) | 44 | static void hlwd_pic_mask_and_ack(struct irq_data *d) |
45 | { | 45 | { |
46 | int irq = virq_to_hw(d->irq); | 46 | int irq = irqd_to_hwirq(d); |
47 | void __iomem *io_base = irq_data_get_irq_chip_data(d); | 47 | void __iomem *io_base = irq_data_get_irq_chip_data(d); |
48 | u32 mask = 1 << irq; | 48 | u32 mask = 1 << irq; |
49 | 49 | ||
@@ -53,7 +53,7 @@ static void hlwd_pic_mask_and_ack(struct irq_data *d) | |||
53 | 53 | ||
54 | static void hlwd_pic_ack(struct irq_data *d) | 54 | static void hlwd_pic_ack(struct irq_data *d) |
55 | { | 55 | { |
56 | int irq = virq_to_hw(d->irq); | 56 | int irq = irqd_to_hwirq(d); |
57 | void __iomem *io_base = irq_data_get_irq_chip_data(d); | 57 | void __iomem *io_base = irq_data_get_irq_chip_data(d); |
58 | 58 | ||
59 | out_be32(io_base + HW_BROADWAY_ICR, 1 << irq); | 59 | out_be32(io_base + HW_BROADWAY_ICR, 1 << irq); |
@@ -61,7 +61,7 @@ static void hlwd_pic_ack(struct irq_data *d) | |||
61 | 61 | ||
62 | static void hlwd_pic_mask(struct irq_data *d) | 62 | static void hlwd_pic_mask(struct irq_data *d) |
63 | { | 63 | { |
64 | int irq = virq_to_hw(d->irq); | 64 | int irq = irqd_to_hwirq(d); |
65 | void __iomem *io_base = irq_data_get_irq_chip_data(d); | 65 | void __iomem *io_base = irq_data_get_irq_chip_data(d); |
66 | 66 | ||
67 | clrbits32(io_base + HW_BROADWAY_IMR, 1 << irq); | 67 | clrbits32(io_base + HW_BROADWAY_IMR, 1 << irq); |
@@ -69,7 +69,7 @@ static void hlwd_pic_mask(struct irq_data *d) | |||
69 | 69 | ||
70 | static void hlwd_pic_unmask(struct irq_data *d) | 70 | static void hlwd_pic_unmask(struct irq_data *d) |
71 | { | 71 | { |
72 | int irq = virq_to_hw(d->irq); | 72 | int irq = irqd_to_hwirq(d); |
73 | void __iomem *io_base = irq_data_get_irq_chip_data(d); | 73 | void __iomem *io_base = irq_data_get_irq_chip_data(d); |
74 | 74 | ||
75 | setbits32(io_base + HW_BROADWAY_IMR, 1 << irq); | 75 | setbits32(io_base + HW_BROADWAY_IMR, 1 << irq); |
diff --git a/arch/powerpc/platforms/iseries/irq.c b/arch/powerpc/platforms/iseries/irq.c index 52a6889832c7..375c21ca6602 100644 --- a/arch/powerpc/platforms/iseries/irq.c +++ b/arch/powerpc/platforms/iseries/irq.c | |||
@@ -171,7 +171,7 @@ static void iseries_enable_IRQ(struct irq_data *d) | |||
171 | { | 171 | { |
172 | u32 bus, dev_id, function, mask; | 172 | u32 bus, dev_id, function, mask; |
173 | const u32 sub_bus = 0; | 173 | const u32 sub_bus = 0; |
174 | unsigned int rirq = (unsigned int)irq_map[d->irq].hwirq; | 174 | unsigned int rirq = (unsigned int)irqd_to_hwirq(d); |
175 | 175 | ||
176 | /* The IRQ has already been locked by the caller */ | 176 | /* The IRQ has already been locked by the caller */ |
177 | bus = REAL_IRQ_TO_BUS(rirq); | 177 | bus = REAL_IRQ_TO_BUS(rirq); |
@@ -188,7 +188,7 @@ static unsigned int iseries_startup_IRQ(struct irq_data *d) | |||
188 | { | 188 | { |
189 | u32 bus, dev_id, function, mask; | 189 | u32 bus, dev_id, function, mask; |
190 | const u32 sub_bus = 0; | 190 | const u32 sub_bus = 0; |
191 | unsigned int rirq = (unsigned int)irq_map[d->irq].hwirq; | 191 | unsigned int rirq = (unsigned int)irqd_to_hwirq(d); |
192 | 192 | ||
193 | bus = REAL_IRQ_TO_BUS(rirq); | 193 | bus = REAL_IRQ_TO_BUS(rirq); |
194 | function = REAL_IRQ_TO_FUNC(rirq); | 194 | function = REAL_IRQ_TO_FUNC(rirq); |
@@ -234,7 +234,7 @@ static void iseries_shutdown_IRQ(struct irq_data *d) | |||
234 | { | 234 | { |
235 | u32 bus, dev_id, function, mask; | 235 | u32 bus, dev_id, function, mask; |
236 | const u32 sub_bus = 0; | 236 | const u32 sub_bus = 0; |
237 | unsigned int rirq = (unsigned int)irq_map[d->irq].hwirq; | 237 | unsigned int rirq = (unsigned int)irqd_to_hwirq(d); |
238 | 238 | ||
239 | /* irq should be locked by the caller */ | 239 | /* irq should be locked by the caller */ |
240 | bus = REAL_IRQ_TO_BUS(rirq); | 240 | bus = REAL_IRQ_TO_BUS(rirq); |
@@ -257,7 +257,7 @@ static void iseries_disable_IRQ(struct irq_data *d) | |||
257 | { | 257 | { |
258 | u32 bus, dev_id, function, mask; | 258 | u32 bus, dev_id, function, mask; |
259 | const u32 sub_bus = 0; | 259 | const u32 sub_bus = 0; |
260 | unsigned int rirq = (unsigned int)irq_map[d->irq].hwirq; | 260 | unsigned int rirq = (unsigned int)irqd_to_hwirq(d); |
261 | 261 | ||
262 | /* The IRQ has already been locked by the caller */ | 262 | /* The IRQ has already been locked by the caller */ |
263 | bus = REAL_IRQ_TO_BUS(rirq); | 263 | bus = REAL_IRQ_TO_BUS(rirq); |
@@ -271,7 +271,7 @@ static void iseries_disable_IRQ(struct irq_data *d) | |||
271 | 271 | ||
272 | static void iseries_end_IRQ(struct irq_data *d) | 272 | static void iseries_end_IRQ(struct irq_data *d) |
273 | { | 273 | { |
274 | unsigned int rirq = (unsigned int)irq_map[d->irq].hwirq; | 274 | unsigned int rirq = (unsigned int)irqd_to_hwirq(d); |
275 | 275 | ||
276 | HvCallPci_eoi(REAL_IRQ_TO_BUS(rirq), REAL_IRQ_TO_SUBBUS(rirq), | 276 | HvCallPci_eoi(REAL_IRQ_TO_BUS(rirq), REAL_IRQ_TO_SUBBUS(rirq), |
277 | (REAL_IRQ_TO_IDSEL(rirq) << 4) + REAL_IRQ_TO_FUNC(rirq)); | 277 | (REAL_IRQ_TO_IDSEL(rirq) << 4) + REAL_IRQ_TO_FUNC(rirq)); |
diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c index 023f24086a0a..2f34ad04029f 100644 --- a/arch/powerpc/platforms/powermac/pic.c +++ b/arch/powerpc/platforms/powermac/pic.c | |||
@@ -84,7 +84,7 @@ static void __pmac_retrigger(unsigned int irq_nr) | |||
84 | 84 | ||
85 | static void pmac_mask_and_ack_irq(struct irq_data *d) | 85 | static void pmac_mask_and_ack_irq(struct irq_data *d) |
86 | { | 86 | { |
87 | unsigned int src = irq_map[d->irq].hwirq; | 87 | unsigned int src = irqd_to_hwirq(d); |
88 | unsigned long bit = 1UL << (src & 0x1f); | 88 | unsigned long bit = 1UL << (src & 0x1f); |
89 | int i = src >> 5; | 89 | int i = src >> 5; |
90 | unsigned long flags; | 90 | unsigned long flags; |
@@ -106,7 +106,7 @@ static void pmac_mask_and_ack_irq(struct irq_data *d) | |||
106 | 106 | ||
107 | static void pmac_ack_irq(struct irq_data *d) | 107 | static void pmac_ack_irq(struct irq_data *d) |
108 | { | 108 | { |
109 | unsigned int src = irq_map[d->irq].hwirq; | 109 | unsigned int src = irqd_to_hwirq(d); |
110 | unsigned long bit = 1UL << (src & 0x1f); | 110 | unsigned long bit = 1UL << (src & 0x1f); |
111 | int i = src >> 5; | 111 | int i = src >> 5; |
112 | unsigned long flags; | 112 | unsigned long flags; |
@@ -152,7 +152,7 @@ static void __pmac_set_irq_mask(unsigned int irq_nr, int nokicklost) | |||
152 | static unsigned int pmac_startup_irq(struct irq_data *d) | 152 | static unsigned int pmac_startup_irq(struct irq_data *d) |
153 | { | 153 | { |
154 | unsigned long flags; | 154 | unsigned long flags; |
155 | unsigned int src = irq_map[d->irq].hwirq; | 155 | unsigned int src = irqd_to_hwirq(d); |
156 | unsigned long bit = 1UL << (src & 0x1f); | 156 | unsigned long bit = 1UL << (src & 0x1f); |
157 | int i = src >> 5; | 157 | int i = src >> 5; |
158 | 158 | ||
@@ -169,7 +169,7 @@ static unsigned int pmac_startup_irq(struct irq_data *d) | |||
169 | static void pmac_mask_irq(struct irq_data *d) | 169 | static void pmac_mask_irq(struct irq_data *d) |
170 | { | 170 | { |
171 | unsigned long flags; | 171 | unsigned long flags; |
172 | unsigned int src = irq_map[d->irq].hwirq; | 172 | unsigned int src = irqd_to_hwirq(d); |
173 | 173 | ||
174 | raw_spin_lock_irqsave(&pmac_pic_lock, flags); | 174 | raw_spin_lock_irqsave(&pmac_pic_lock, flags); |
175 | __clear_bit(src, ppc_cached_irq_mask); | 175 | __clear_bit(src, ppc_cached_irq_mask); |
@@ -180,7 +180,7 @@ static void pmac_mask_irq(struct irq_data *d) | |||
180 | static void pmac_unmask_irq(struct irq_data *d) | 180 | static void pmac_unmask_irq(struct irq_data *d) |
181 | { | 181 | { |
182 | unsigned long flags; | 182 | unsigned long flags; |
183 | unsigned int src = irq_map[d->irq].hwirq; | 183 | unsigned int src = irqd_to_hwirq(d); |
184 | 184 | ||
185 | raw_spin_lock_irqsave(&pmac_pic_lock, flags); | 185 | raw_spin_lock_irqsave(&pmac_pic_lock, flags); |
186 | __set_bit(src, ppc_cached_irq_mask); | 186 | __set_bit(src, ppc_cached_irq_mask); |
@@ -193,7 +193,7 @@ static int pmac_retrigger(struct irq_data *d) | |||
193 | unsigned long flags; | 193 | unsigned long flags; |
194 | 194 | ||
195 | raw_spin_lock_irqsave(&pmac_pic_lock, flags); | 195 | raw_spin_lock_irqsave(&pmac_pic_lock, flags); |
196 | __pmac_retrigger(irq_map[d->irq].hwirq); | 196 | __pmac_retrigger(irqd_to_hwirq(d)); |
197 | raw_spin_unlock_irqrestore(&pmac_pic_lock, flags); | 197 | raw_spin_unlock_irqrestore(&pmac_pic_lock, flags); |
198 | return 1; | 198 | return 1; |
199 | } | 199 | } |
diff --git a/arch/powerpc/platforms/pseries/ras.c b/arch/powerpc/platforms/pseries/ras.c index c55d7ad9c648..164a8eb45923 100644 --- a/arch/powerpc/platforms/pseries/ras.c +++ b/arch/powerpc/platforms/pseries/ras.c | |||
@@ -122,7 +122,7 @@ static irqreturn_t ras_epow_interrupt(int irq, void *dev_id) | |||
122 | 122 | ||
123 | status = rtas_call(ras_check_exception_token, 6, 1, NULL, | 123 | status = rtas_call(ras_check_exception_token, 6, 1, NULL, |
124 | RTAS_VECTOR_EXTERNAL_INTERRUPT, | 124 | RTAS_VECTOR_EXTERNAL_INTERRUPT, |
125 | irq_map[irq].hwirq, | 125 | virq_to_hw(irq), |
126 | RTAS_EPOW_WARNING | RTAS_POWERMGM_EVENTS, | 126 | RTAS_EPOW_WARNING | RTAS_POWERMGM_EVENTS, |
127 | critical, __pa(&ras_log_buf), | 127 | critical, __pa(&ras_log_buf), |
128 | rtas_get_error_log_max()); | 128 | rtas_get_error_log_max()); |
@@ -157,7 +157,7 @@ static irqreturn_t ras_error_interrupt(int irq, void *dev_id) | |||
157 | 157 | ||
158 | status = rtas_call(ras_check_exception_token, 6, 1, NULL, | 158 | status = rtas_call(ras_check_exception_token, 6, 1, NULL, |
159 | RTAS_VECTOR_EXTERNAL_INTERRUPT, | 159 | RTAS_VECTOR_EXTERNAL_INTERRUPT, |
160 | irq_map[irq].hwirq, | 160 | virq_to_hw(irq), |
161 | RTAS_INTERNAL_ERROR, 1 /*Time Critical */, | 161 | RTAS_INTERNAL_ERROR, 1 /*Time Critical */, |
162 | __pa(&ras_log_buf), | 162 | __pa(&ras_log_buf), |
163 | rtas_get_error_log_max()); | 163 | rtas_get_error_log_max()); |
diff --git a/arch/powerpc/sysdev/cpm1.c b/arch/powerpc/sysdev/cpm1.c index e0bc944eb23f..350787c83e22 100644 --- a/arch/powerpc/sysdev/cpm1.c +++ b/arch/powerpc/sysdev/cpm1.c | |||
@@ -58,21 +58,21 @@ static struct irq_host *cpm_pic_host; | |||
58 | 58 | ||
59 | static void cpm_mask_irq(struct irq_data *d) | 59 | static void cpm_mask_irq(struct irq_data *d) |
60 | { | 60 | { |
61 | unsigned int cpm_vec = (unsigned int)irq_map[d->irq].hwirq; | 61 | unsigned int cpm_vec = (unsigned int)irqd_to_hwirq(d); |
62 | 62 | ||
63 | clrbits32(&cpic_reg->cpic_cimr, (1 << cpm_vec)); | 63 | clrbits32(&cpic_reg->cpic_cimr, (1 << cpm_vec)); |
64 | } | 64 | } |
65 | 65 | ||
66 | static void cpm_unmask_irq(struct irq_data *d) | 66 | static void cpm_unmask_irq(struct irq_data *d) |
67 | { | 67 | { |
68 | unsigned int cpm_vec = (unsigned int)irq_map[d->irq].hwirq; | 68 | unsigned int cpm_vec = (unsigned int)irqd_to_hwirq(d); |
69 | 69 | ||
70 | setbits32(&cpic_reg->cpic_cimr, (1 << cpm_vec)); | 70 | setbits32(&cpic_reg->cpic_cimr, (1 << cpm_vec)); |
71 | } | 71 | } |
72 | 72 | ||
73 | static void cpm_end_irq(struct irq_data *d) | 73 | static void cpm_end_irq(struct irq_data *d) |
74 | { | 74 | { |
75 | unsigned int cpm_vec = (unsigned int)irq_map[d->irq].hwirq; | 75 | unsigned int cpm_vec = (unsigned int)irqd_to_hwirq(d); |
76 | 76 | ||
77 | out_be32(&cpic_reg->cpic_cisr, (1 << cpm_vec)); | 77 | out_be32(&cpic_reg->cpic_cisr, (1 << cpm_vec)); |
78 | } | 78 | } |
@@ -157,7 +157,7 @@ unsigned int cpm_pic_init(void) | |||
157 | goto end; | 157 | goto end; |
158 | 158 | ||
159 | /* Initialize the CPM interrupt controller. */ | 159 | /* Initialize the CPM interrupt controller. */ |
160 | hwirq = (unsigned int)irq_map[sirq].hwirq; | 160 | hwirq = (unsigned int)virq_to_hw(sirq); |
161 | out_be32(&cpic_reg->cpic_cicr, | 161 | out_be32(&cpic_reg->cpic_cicr, |
162 | (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) | | 162 | (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) | |
163 | ((hwirq/2) << 13) | CICR_HP_MASK); | 163 | ((hwirq/2) << 13) | CICR_HP_MASK); |
diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c index 5495c1be472b..bcab50e2a9eb 100644 --- a/arch/powerpc/sysdev/cpm2_pic.c +++ b/arch/powerpc/sysdev/cpm2_pic.c | |||
@@ -81,7 +81,7 @@ static const u_char irq_to_siubit[] = { | |||
81 | static void cpm2_mask_irq(struct irq_data *d) | 81 | static void cpm2_mask_irq(struct irq_data *d) |
82 | { | 82 | { |
83 | int bit, word; | 83 | int bit, word; |
84 | unsigned int irq_nr = virq_to_hw(d->irq); | 84 | unsigned int irq_nr = irqd_to_hwirq(d); |
85 | 85 | ||
86 | bit = irq_to_siubit[irq_nr]; | 86 | bit = irq_to_siubit[irq_nr]; |
87 | word = irq_to_siureg[irq_nr]; | 87 | word = irq_to_siureg[irq_nr]; |
@@ -93,7 +93,7 @@ static void cpm2_mask_irq(struct irq_data *d) | |||
93 | static void cpm2_unmask_irq(struct irq_data *d) | 93 | static void cpm2_unmask_irq(struct irq_data *d) |
94 | { | 94 | { |
95 | int bit, word; | 95 | int bit, word; |
96 | unsigned int irq_nr = virq_to_hw(d->irq); | 96 | unsigned int irq_nr = irqd_to_hwirq(d); |
97 | 97 | ||
98 | bit = irq_to_siubit[irq_nr]; | 98 | bit = irq_to_siubit[irq_nr]; |
99 | word = irq_to_siureg[irq_nr]; | 99 | word = irq_to_siureg[irq_nr]; |
@@ -105,7 +105,7 @@ static void cpm2_unmask_irq(struct irq_data *d) | |||
105 | static void cpm2_ack(struct irq_data *d) | 105 | static void cpm2_ack(struct irq_data *d) |
106 | { | 106 | { |
107 | int bit, word; | 107 | int bit, word; |
108 | unsigned int irq_nr = virq_to_hw(d->irq); | 108 | unsigned int irq_nr = irqd_to_hwirq(d); |
109 | 109 | ||
110 | bit = irq_to_siubit[irq_nr]; | 110 | bit = irq_to_siubit[irq_nr]; |
111 | word = irq_to_siureg[irq_nr]; | 111 | word = irq_to_siureg[irq_nr]; |
@@ -116,7 +116,7 @@ static void cpm2_ack(struct irq_data *d) | |||
116 | static void cpm2_end_irq(struct irq_data *d) | 116 | static void cpm2_end_irq(struct irq_data *d) |
117 | { | 117 | { |
118 | int bit, word; | 118 | int bit, word; |
119 | unsigned int irq_nr = virq_to_hw(d->irq); | 119 | unsigned int irq_nr = irqd_to_hwirq(d); |
120 | 120 | ||
121 | bit = irq_to_siubit[irq_nr]; | 121 | bit = irq_to_siubit[irq_nr]; |
122 | word = irq_to_siureg[irq_nr]; | 122 | word = irq_to_siureg[irq_nr]; |
@@ -133,7 +133,7 @@ static void cpm2_end_irq(struct irq_data *d) | |||
133 | 133 | ||
134 | static int cpm2_set_irq_type(struct irq_data *d, unsigned int flow_type) | 134 | static int cpm2_set_irq_type(struct irq_data *d, unsigned int flow_type) |
135 | { | 135 | { |
136 | unsigned int src = virq_to_hw(d->irq); | 136 | unsigned int src = irqd_to_hwirq(d); |
137 | unsigned int vold, vnew, edibit; | 137 | unsigned int vold, vnew, edibit; |
138 | 138 | ||
139 | /* Port C interrupts are either IRQ_TYPE_EDGE_FALLING or | 139 | /* Port C interrupts are either IRQ_TYPE_EDGE_FALLING or |
diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c index fa438be962b7..f0ece79f9be5 100644 --- a/arch/powerpc/sysdev/ipic.c +++ b/arch/powerpc/sysdev/ipic.c | |||
@@ -521,12 +521,10 @@ static inline struct ipic * ipic_from_irq(unsigned int virq) | |||
521 | return primary_ipic; | 521 | return primary_ipic; |
522 | } | 522 | } |
523 | 523 | ||
524 | #define ipic_irq_to_hw(virq) ((unsigned int)irq_map[virq].hwirq) | ||
525 | |||
526 | static void ipic_unmask_irq(struct irq_data *d) | 524 | static void ipic_unmask_irq(struct irq_data *d) |
527 | { | 525 | { |
528 | struct ipic *ipic = ipic_from_irq(d->irq); | 526 | struct ipic *ipic = ipic_from_irq(d->irq); |
529 | unsigned int src = ipic_irq_to_hw(d->irq); | 527 | unsigned int src = irqd_to_hwirq(d); |
530 | unsigned long flags; | 528 | unsigned long flags; |
531 | u32 temp; | 529 | u32 temp; |
532 | 530 | ||
@@ -542,7 +540,7 @@ static void ipic_unmask_irq(struct irq_data *d) | |||
542 | static void ipic_mask_irq(struct irq_data *d) | 540 | static void ipic_mask_irq(struct irq_data *d) |
543 | { | 541 | { |
544 | struct ipic *ipic = ipic_from_irq(d->irq); | 542 | struct ipic *ipic = ipic_from_irq(d->irq); |
545 | unsigned int src = ipic_irq_to_hw(d->irq); | 543 | unsigned int src = irqd_to_hwirq(d); |
546 | unsigned long flags; | 544 | unsigned long flags; |
547 | u32 temp; | 545 | u32 temp; |
548 | 546 | ||
@@ -562,7 +560,7 @@ static void ipic_mask_irq(struct irq_data *d) | |||
562 | static void ipic_ack_irq(struct irq_data *d) | 560 | static void ipic_ack_irq(struct irq_data *d) |
563 | { | 561 | { |
564 | struct ipic *ipic = ipic_from_irq(d->irq); | 562 | struct ipic *ipic = ipic_from_irq(d->irq); |
565 | unsigned int src = ipic_irq_to_hw(d->irq); | 563 | unsigned int src = irqd_to_hwirq(d); |
566 | unsigned long flags; | 564 | unsigned long flags; |
567 | u32 temp; | 565 | u32 temp; |
568 | 566 | ||
@@ -581,7 +579,7 @@ static void ipic_ack_irq(struct irq_data *d) | |||
581 | static void ipic_mask_irq_and_ack(struct irq_data *d) | 579 | static void ipic_mask_irq_and_ack(struct irq_data *d) |
582 | { | 580 | { |
583 | struct ipic *ipic = ipic_from_irq(d->irq); | 581 | struct ipic *ipic = ipic_from_irq(d->irq); |
584 | unsigned int src = ipic_irq_to_hw(d->irq); | 582 | unsigned int src = irqd_to_hwirq(d); |
585 | unsigned long flags; | 583 | unsigned long flags; |
586 | u32 temp; | 584 | u32 temp; |
587 | 585 | ||
@@ -604,7 +602,7 @@ static void ipic_mask_irq_and_ack(struct irq_data *d) | |||
604 | static int ipic_set_irq_type(struct irq_data *d, unsigned int flow_type) | 602 | static int ipic_set_irq_type(struct irq_data *d, unsigned int flow_type) |
605 | { | 603 | { |
606 | struct ipic *ipic = ipic_from_irq(d->irq); | 604 | struct ipic *ipic = ipic_from_irq(d->irq); |
607 | unsigned int src = ipic_irq_to_hw(d->irq); | 605 | unsigned int src = irqd_to_hwirq(d); |
608 | unsigned int vold, vnew, edibit; | 606 | unsigned int vold, vnew, edibit; |
609 | 607 | ||
610 | if (flow_type == IRQ_TYPE_NONE) | 608 | if (flow_type == IRQ_TYPE_NONE) |
@@ -793,7 +791,7 @@ struct ipic * __init ipic_init(struct device_node *node, unsigned int flags) | |||
793 | int ipic_set_priority(unsigned int virq, unsigned int priority) | 791 | int ipic_set_priority(unsigned int virq, unsigned int priority) |
794 | { | 792 | { |
795 | struct ipic *ipic = ipic_from_irq(virq); | 793 | struct ipic *ipic = ipic_from_irq(virq); |
796 | unsigned int src = ipic_irq_to_hw(virq); | 794 | unsigned int src = virq_to_hw(virq); |
797 | u32 temp; | 795 | u32 temp; |
798 | 796 | ||
799 | if (priority > 7) | 797 | if (priority > 7) |
@@ -821,7 +819,7 @@ int ipic_set_priority(unsigned int virq, unsigned int priority) | |||
821 | void ipic_set_highest_priority(unsigned int virq) | 819 | void ipic_set_highest_priority(unsigned int virq) |
822 | { | 820 | { |
823 | struct ipic *ipic = ipic_from_irq(virq); | 821 | struct ipic *ipic = ipic_from_irq(virq); |
824 | unsigned int src = ipic_irq_to_hw(virq); | 822 | unsigned int src = virq_to_hw(virq); |
825 | u32 temp; | 823 | u32 temp; |
826 | 824 | ||
827 | temp = ipic_read(ipic->regs, IPIC_SICFR); | 825 | temp = ipic_read(ipic->regs, IPIC_SICFR); |
diff --git a/arch/powerpc/sysdev/mpc8xx_pic.c b/arch/powerpc/sysdev/mpc8xx_pic.c index a88800ff4d01..20924f2246f0 100644 --- a/arch/powerpc/sysdev/mpc8xx_pic.c +++ b/arch/powerpc/sysdev/mpc8xx_pic.c | |||
@@ -28,7 +28,7 @@ int cpm_get_irq(struct pt_regs *regs); | |||
28 | static void mpc8xx_unmask_irq(struct irq_data *d) | 28 | static void mpc8xx_unmask_irq(struct irq_data *d) |
29 | { | 29 | { |
30 | int bit, word; | 30 | int bit, word; |
31 | unsigned int irq_nr = (unsigned int)irq_map[d->irq].hwirq; | 31 | unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d); |
32 | 32 | ||
33 | bit = irq_nr & 0x1f; | 33 | bit = irq_nr & 0x1f; |
34 | word = irq_nr >> 5; | 34 | word = irq_nr >> 5; |
@@ -40,7 +40,7 @@ static void mpc8xx_unmask_irq(struct irq_data *d) | |||
40 | static void mpc8xx_mask_irq(struct irq_data *d) | 40 | static void mpc8xx_mask_irq(struct irq_data *d) |
41 | { | 41 | { |
42 | int bit, word; | 42 | int bit, word; |
43 | unsigned int irq_nr = (unsigned int)irq_map[d->irq].hwirq; | 43 | unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d); |
44 | 44 | ||
45 | bit = irq_nr & 0x1f; | 45 | bit = irq_nr & 0x1f; |
46 | word = irq_nr >> 5; | 46 | word = irq_nr >> 5; |
@@ -52,7 +52,7 @@ static void mpc8xx_mask_irq(struct irq_data *d) | |||
52 | static void mpc8xx_ack(struct irq_data *d) | 52 | static void mpc8xx_ack(struct irq_data *d) |
53 | { | 53 | { |
54 | int bit; | 54 | int bit; |
55 | unsigned int irq_nr = (unsigned int)irq_map[d->irq].hwirq; | 55 | unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d); |
56 | 56 | ||
57 | bit = irq_nr & 0x1f; | 57 | bit = irq_nr & 0x1f; |
58 | out_be32(&siu_reg->sc_sipend, 1 << (31-bit)); | 58 | out_be32(&siu_reg->sc_sipend, 1 << (31-bit)); |
@@ -61,7 +61,7 @@ static void mpc8xx_ack(struct irq_data *d) | |||
61 | static void mpc8xx_end_irq(struct irq_data *d) | 61 | static void mpc8xx_end_irq(struct irq_data *d) |
62 | { | 62 | { |
63 | int bit, word; | 63 | int bit, word; |
64 | unsigned int irq_nr = (unsigned int)irq_map[d->irq].hwirq; | 64 | unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d); |
65 | 65 | ||
66 | bit = irq_nr & 0x1f; | 66 | bit = irq_nr & 0x1f; |
67 | word = irq_nr >> 5; | 67 | word = irq_nr >> 5; |
@@ -73,7 +73,7 @@ static void mpc8xx_end_irq(struct irq_data *d) | |||
73 | static int mpc8xx_set_irq_type(struct irq_data *d, unsigned int flow_type) | 73 | static int mpc8xx_set_irq_type(struct irq_data *d, unsigned int flow_type) |
74 | { | 74 | { |
75 | if (flow_type & IRQ_TYPE_EDGE_FALLING) { | 75 | if (flow_type & IRQ_TYPE_EDGE_FALLING) { |
76 | irq_hw_number_t hw = (unsigned int)irq_map[d->irq].hwirq; | 76 | irq_hw_number_t hw = (unsigned int)irqd_to_hwirq(d); |
77 | unsigned int siel = in_be32(&siu_reg->sc_siel); | 77 | unsigned int siel = in_be32(&siu_reg->sc_siel); |
78 | 78 | ||
79 | /* only external IRQ senses are programmable */ | 79 | /* only external IRQ senses are programmable */ |
diff --git a/arch/powerpc/sysdev/mpc8xxx_gpio.c b/arch/powerpc/sysdev/mpc8xxx_gpio.c index 0892a2841c2b..fb4963abdf55 100644 --- a/arch/powerpc/sysdev/mpc8xxx_gpio.c +++ b/arch/powerpc/sysdev/mpc8xxx_gpio.c | |||
@@ -163,7 +163,7 @@ static void mpc8xxx_irq_unmask(struct irq_data *d) | |||
163 | 163 | ||
164 | spin_lock_irqsave(&mpc8xxx_gc->lock, flags); | 164 | spin_lock_irqsave(&mpc8xxx_gc->lock, flags); |
165 | 165 | ||
166 | setbits32(mm->regs + GPIO_IMR, mpc8xxx_gpio2mask(virq_to_hw(d->irq))); | 166 | setbits32(mm->regs + GPIO_IMR, mpc8xxx_gpio2mask(irqd_to_hwirq(d))); |
167 | 167 | ||
168 | spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); | 168 | spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); |
169 | } | 169 | } |
@@ -176,7 +176,7 @@ static void mpc8xxx_irq_mask(struct irq_data *d) | |||
176 | 176 | ||
177 | spin_lock_irqsave(&mpc8xxx_gc->lock, flags); | 177 | spin_lock_irqsave(&mpc8xxx_gc->lock, flags); |
178 | 178 | ||
179 | clrbits32(mm->regs + GPIO_IMR, mpc8xxx_gpio2mask(virq_to_hw(d->irq))); | 179 | clrbits32(mm->regs + GPIO_IMR, mpc8xxx_gpio2mask(irqd_to_hwirq(d))); |
180 | 180 | ||
181 | spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); | 181 | spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); |
182 | } | 182 | } |
@@ -186,7 +186,7 @@ static void mpc8xxx_irq_ack(struct irq_data *d) | |||
186 | struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d); | 186 | struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d); |
187 | struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc; | 187 | struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc; |
188 | 188 | ||
189 | out_be32(mm->regs + GPIO_IER, mpc8xxx_gpio2mask(virq_to_hw(d->irq))); | 189 | out_be32(mm->regs + GPIO_IER, mpc8xxx_gpio2mask(irqd_to_hwirq(d))); |
190 | } | 190 | } |
191 | 191 | ||
192 | static int mpc8xxx_irq_set_type(struct irq_data *d, unsigned int flow_type) | 192 | static int mpc8xxx_irq_set_type(struct irq_data *d, unsigned int flow_type) |
@@ -199,14 +199,14 @@ static int mpc8xxx_irq_set_type(struct irq_data *d, unsigned int flow_type) | |||
199 | case IRQ_TYPE_EDGE_FALLING: | 199 | case IRQ_TYPE_EDGE_FALLING: |
200 | spin_lock_irqsave(&mpc8xxx_gc->lock, flags); | 200 | spin_lock_irqsave(&mpc8xxx_gc->lock, flags); |
201 | setbits32(mm->regs + GPIO_ICR, | 201 | setbits32(mm->regs + GPIO_ICR, |
202 | mpc8xxx_gpio2mask(virq_to_hw(d->irq))); | 202 | mpc8xxx_gpio2mask(irqd_to_hwirq(d))); |
203 | spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); | 203 | spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); |
204 | break; | 204 | break; |
205 | 205 | ||
206 | case IRQ_TYPE_EDGE_BOTH: | 206 | case IRQ_TYPE_EDGE_BOTH: |
207 | spin_lock_irqsave(&mpc8xxx_gc->lock, flags); | 207 | spin_lock_irqsave(&mpc8xxx_gc->lock, flags); |
208 | clrbits32(mm->regs + GPIO_ICR, | 208 | clrbits32(mm->regs + GPIO_ICR, |
209 | mpc8xxx_gpio2mask(virq_to_hw(d->irq))); | 209 | mpc8xxx_gpio2mask(irqd_to_hwirq(d))); |
210 | spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); | 210 | spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags); |
211 | break; | 211 | break; |
212 | 212 | ||
@@ -221,7 +221,7 @@ static int mpc512x_irq_set_type(struct irq_data *d, unsigned int flow_type) | |||
221 | { | 221 | { |
222 | struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d); | 222 | struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d); |
223 | struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc; | 223 | struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc; |
224 | unsigned long gpio = virq_to_hw(d->irq); | 224 | unsigned long gpio = irqd_to_hwirq(d); |
225 | void __iomem *reg; | 225 | void __iomem *reg; |
226 | unsigned int shift; | 226 | unsigned int shift; |
227 | unsigned long flags; | 227 | unsigned long flags; |
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c index f91c065bed5a..824a94fc413b 100644 --- a/arch/powerpc/sysdev/mpic.c +++ b/arch/powerpc/sysdev/mpic.c | |||
@@ -607,8 +607,6 @@ static int irq_choose_cpu(const struct cpumask *mask) | |||
607 | } | 607 | } |
608 | #endif | 608 | #endif |
609 | 609 | ||
610 | #define mpic_irq_to_hw(virq) ((unsigned int)irq_map[virq].hwirq) | ||
611 | |||
612 | /* Find an mpic associated with a given linux interrupt */ | 610 | /* Find an mpic associated with a given linux interrupt */ |
613 | static struct mpic *mpic_find(unsigned int irq) | 611 | static struct mpic *mpic_find(unsigned int irq) |
614 | { | 612 | { |
@@ -621,7 +619,7 @@ static struct mpic *mpic_find(unsigned int irq) | |||
621 | /* Determine if the linux irq is an IPI */ | 619 | /* Determine if the linux irq is an IPI */ |
622 | static unsigned int mpic_is_ipi(struct mpic *mpic, unsigned int irq) | 620 | static unsigned int mpic_is_ipi(struct mpic *mpic, unsigned int irq) |
623 | { | 621 | { |
624 | unsigned int src = mpic_irq_to_hw(irq); | 622 | unsigned int src = virq_to_hw(irq); |
625 | 623 | ||
626 | return (src >= mpic->ipi_vecs[0] && src <= mpic->ipi_vecs[3]); | 624 | return (src >= mpic->ipi_vecs[0] && src <= mpic->ipi_vecs[3]); |
627 | } | 625 | } |
@@ -674,7 +672,7 @@ void mpic_unmask_irq(struct irq_data *d) | |||
674 | { | 672 | { |
675 | unsigned int loops = 100000; | 673 | unsigned int loops = 100000; |
676 | struct mpic *mpic = mpic_from_irq_data(d); | 674 | struct mpic *mpic = mpic_from_irq_data(d); |
677 | unsigned int src = mpic_irq_to_hw(d->irq); | 675 | unsigned int src = irqd_to_hwirq(d); |
678 | 676 | ||
679 | DBG("%p: %s: enable_irq: %d (src %d)\n", mpic, mpic->name, d->irq, src); | 677 | DBG("%p: %s: enable_irq: %d (src %d)\n", mpic, mpic->name, d->irq, src); |
680 | 678 | ||
@@ -695,7 +693,7 @@ void mpic_mask_irq(struct irq_data *d) | |||
695 | { | 693 | { |
696 | unsigned int loops = 100000; | 694 | unsigned int loops = 100000; |
697 | struct mpic *mpic = mpic_from_irq_data(d); | 695 | struct mpic *mpic = mpic_from_irq_data(d); |
698 | unsigned int src = mpic_irq_to_hw(d->irq); | 696 | unsigned int src = irqd_to_hwirq(d); |
699 | 697 | ||
700 | DBG("%s: disable_irq: %d (src %d)\n", mpic->name, d->irq, src); | 698 | DBG("%s: disable_irq: %d (src %d)\n", mpic->name, d->irq, src); |
701 | 699 | ||
@@ -733,7 +731,7 @@ void mpic_end_irq(struct irq_data *d) | |||
733 | static void mpic_unmask_ht_irq(struct irq_data *d) | 731 | static void mpic_unmask_ht_irq(struct irq_data *d) |
734 | { | 732 | { |
735 | struct mpic *mpic = mpic_from_irq_data(d); | 733 | struct mpic *mpic = mpic_from_irq_data(d); |
736 | unsigned int src = mpic_irq_to_hw(d->irq); | 734 | unsigned int src = irqd_to_hwirq(d); |
737 | 735 | ||
738 | mpic_unmask_irq(d); | 736 | mpic_unmask_irq(d); |
739 | 737 | ||
@@ -744,7 +742,7 @@ static void mpic_unmask_ht_irq(struct irq_data *d) | |||
744 | static unsigned int mpic_startup_ht_irq(struct irq_data *d) | 742 | static unsigned int mpic_startup_ht_irq(struct irq_data *d) |
745 | { | 743 | { |
746 | struct mpic *mpic = mpic_from_irq_data(d); | 744 | struct mpic *mpic = mpic_from_irq_data(d); |
747 | unsigned int src = mpic_irq_to_hw(d->irq); | 745 | unsigned int src = irqd_to_hwirq(d); |
748 | 746 | ||
749 | mpic_unmask_irq(d); | 747 | mpic_unmask_irq(d); |
750 | mpic_startup_ht_interrupt(mpic, src, irqd_is_level_type(d)); | 748 | mpic_startup_ht_interrupt(mpic, src, irqd_is_level_type(d)); |
@@ -755,7 +753,7 @@ static unsigned int mpic_startup_ht_irq(struct irq_data *d) | |||
755 | static void mpic_shutdown_ht_irq(struct irq_data *d) | 753 | static void mpic_shutdown_ht_irq(struct irq_data *d) |
756 | { | 754 | { |
757 | struct mpic *mpic = mpic_from_irq_data(d); | 755 | struct mpic *mpic = mpic_from_irq_data(d); |
758 | unsigned int src = mpic_irq_to_hw(d->irq); | 756 | unsigned int src = irqd_to_hwirq(d); |
759 | 757 | ||
760 | mpic_shutdown_ht_interrupt(mpic, src); | 758 | mpic_shutdown_ht_interrupt(mpic, src); |
761 | mpic_mask_irq(d); | 759 | mpic_mask_irq(d); |
@@ -764,7 +762,7 @@ static void mpic_shutdown_ht_irq(struct irq_data *d) | |||
764 | static void mpic_end_ht_irq(struct irq_data *d) | 762 | static void mpic_end_ht_irq(struct irq_data *d) |
765 | { | 763 | { |
766 | struct mpic *mpic = mpic_from_irq_data(d); | 764 | struct mpic *mpic = mpic_from_irq_data(d); |
767 | unsigned int src = mpic_irq_to_hw(d->irq); | 765 | unsigned int src = irqd_to_hwirq(d); |
768 | 766 | ||
769 | #ifdef DEBUG_IRQ | 767 | #ifdef DEBUG_IRQ |
770 | DBG("%s: end_irq: %d\n", mpic->name, d->irq); | 768 | DBG("%s: end_irq: %d\n", mpic->name, d->irq); |
@@ -785,7 +783,7 @@ static void mpic_end_ht_irq(struct irq_data *d) | |||
785 | static void mpic_unmask_ipi(struct irq_data *d) | 783 | static void mpic_unmask_ipi(struct irq_data *d) |
786 | { | 784 | { |
787 | struct mpic *mpic = mpic_from_ipi(d); | 785 | struct mpic *mpic = mpic_from_ipi(d); |
788 | unsigned int src = mpic_irq_to_hw(d->irq) - mpic->ipi_vecs[0]; | 786 | unsigned int src = virq_to_hw(d->irq) - mpic->ipi_vecs[0]; |
789 | 787 | ||
790 | DBG("%s: enable_ipi: %d (ipi %d)\n", mpic->name, d->irq, src); | 788 | DBG("%s: enable_ipi: %d (ipi %d)\n", mpic->name, d->irq, src); |
791 | mpic_ipi_write(src, mpic_ipi_read(src) & ~MPIC_VECPRI_MASK); | 789 | mpic_ipi_write(src, mpic_ipi_read(src) & ~MPIC_VECPRI_MASK); |
@@ -816,7 +814,7 @@ int mpic_set_affinity(struct irq_data *d, const struct cpumask *cpumask, | |||
816 | bool force) | 814 | bool force) |
817 | { | 815 | { |
818 | struct mpic *mpic = mpic_from_irq_data(d); | 816 | struct mpic *mpic = mpic_from_irq_data(d); |
819 | unsigned int src = mpic_irq_to_hw(d->irq); | 817 | unsigned int src = irqd_to_hwirq(d); |
820 | 818 | ||
821 | if (mpic->flags & MPIC_SINGLE_DEST_CPU) { | 819 | if (mpic->flags & MPIC_SINGLE_DEST_CPU) { |
822 | int cpuid = irq_choose_cpu(cpumask); | 820 | int cpuid = irq_choose_cpu(cpumask); |
@@ -862,7 +860,7 @@ static unsigned int mpic_type_to_vecpri(struct mpic *mpic, unsigned int type) | |||
862 | int mpic_set_irq_type(struct irq_data *d, unsigned int flow_type) | 860 | int mpic_set_irq_type(struct irq_data *d, unsigned int flow_type) |
863 | { | 861 | { |
864 | struct mpic *mpic = mpic_from_irq_data(d); | 862 | struct mpic *mpic = mpic_from_irq_data(d); |
865 | unsigned int src = mpic_irq_to_hw(d->irq); | 863 | unsigned int src = irqd_to_hwirq(d); |
866 | unsigned int vecpri, vold, vnew; | 864 | unsigned int vecpri, vold, vnew; |
867 | 865 | ||
868 | DBG("mpic: set_irq_type(mpic:@%p,virq:%d,src:0x%x,type:0x%x)\n", | 866 | DBG("mpic: set_irq_type(mpic:@%p,virq:%d,src:0x%x,type:0x%x)\n", |
@@ -898,7 +896,7 @@ int mpic_set_irq_type(struct irq_data *d, unsigned int flow_type) | |||
898 | void mpic_set_vector(unsigned int virq, unsigned int vector) | 896 | void mpic_set_vector(unsigned int virq, unsigned int vector) |
899 | { | 897 | { |
900 | struct mpic *mpic = mpic_from_irq(virq); | 898 | struct mpic *mpic = mpic_from_irq(virq); |
901 | unsigned int src = mpic_irq_to_hw(virq); | 899 | unsigned int src = virq_to_hw(virq); |
902 | unsigned int vecpri; | 900 | unsigned int vecpri; |
903 | 901 | ||
904 | DBG("mpic: set_vector(mpic:@%p,virq:%d,src:%d,vector:0x%x)\n", | 902 | DBG("mpic: set_vector(mpic:@%p,virq:%d,src:%d,vector:0x%x)\n", |
@@ -916,7 +914,7 @@ void mpic_set_vector(unsigned int virq, unsigned int vector) | |||
916 | void mpic_set_destination(unsigned int virq, unsigned int cpuid) | 914 | void mpic_set_destination(unsigned int virq, unsigned int cpuid) |
917 | { | 915 | { |
918 | struct mpic *mpic = mpic_from_irq(virq); | 916 | struct mpic *mpic = mpic_from_irq(virq); |
919 | unsigned int src = mpic_irq_to_hw(virq); | 917 | unsigned int src = virq_to_hw(virq); |
920 | 918 | ||
921 | DBG("mpic: set_destination(mpic:@%p,virq:%d,src:%d,cpuid:0x%x)\n", | 919 | DBG("mpic: set_destination(mpic:@%p,virq:%d,src:%d,cpuid:0x%x)\n", |
922 | mpic, virq, src, cpuid); | 920 | mpic, virq, src, cpuid); |
@@ -1427,7 +1425,7 @@ void __init mpic_set_serial_int(struct mpic *mpic, int enable) | |||
1427 | void mpic_irq_set_priority(unsigned int irq, unsigned int pri) | 1425 | void mpic_irq_set_priority(unsigned int irq, unsigned int pri) |
1428 | { | 1426 | { |
1429 | struct mpic *mpic = mpic_find(irq); | 1427 | struct mpic *mpic = mpic_find(irq); |
1430 | unsigned int src = mpic_irq_to_hw(irq); | 1428 | unsigned int src = virq_to_hw(irq); |
1431 | unsigned long flags; | 1429 | unsigned long flags; |
1432 | u32 reg; | 1430 | u32 reg; |
1433 | 1431 | ||
diff --git a/arch/powerpc/sysdev/mv64x60_pic.c b/arch/powerpc/sysdev/mv64x60_pic.c index e9c633c7c083..14d130268e7a 100644 --- a/arch/powerpc/sysdev/mv64x60_pic.c +++ b/arch/powerpc/sysdev/mv64x60_pic.c | |||
@@ -78,7 +78,7 @@ static struct irq_host *mv64x60_irq_host; | |||
78 | 78 | ||
79 | static void mv64x60_mask_low(struct irq_data *d) | 79 | static void mv64x60_mask_low(struct irq_data *d) |
80 | { | 80 | { |
81 | int level2 = irq_map[d->irq].hwirq & MV64x60_LEVEL2_MASK; | 81 | int level2 = irqd_to_hwirq(d) & MV64x60_LEVEL2_MASK; |
82 | unsigned long flags; | 82 | unsigned long flags; |
83 | 83 | ||
84 | spin_lock_irqsave(&mv64x60_lock, flags); | 84 | spin_lock_irqsave(&mv64x60_lock, flags); |
@@ -91,7 +91,7 @@ static void mv64x60_mask_low(struct irq_data *d) | |||
91 | 91 | ||
92 | static void mv64x60_unmask_low(struct irq_data *d) | 92 | static void mv64x60_unmask_low(struct irq_data *d) |
93 | { | 93 | { |
94 | int level2 = irq_map[d->irq].hwirq & MV64x60_LEVEL2_MASK; | 94 | int level2 = irqd_to_hwirq(d) & MV64x60_LEVEL2_MASK; |
95 | unsigned long flags; | 95 | unsigned long flags; |
96 | 96 | ||
97 | spin_lock_irqsave(&mv64x60_lock, flags); | 97 | spin_lock_irqsave(&mv64x60_lock, flags); |
@@ -115,7 +115,7 @@ static struct irq_chip mv64x60_chip_low = { | |||
115 | 115 | ||
116 | static void mv64x60_mask_high(struct irq_data *d) | 116 | static void mv64x60_mask_high(struct irq_data *d) |
117 | { | 117 | { |
118 | int level2 = irq_map[d->irq].hwirq & MV64x60_LEVEL2_MASK; | 118 | int level2 = irqd_to_hwirq(d) & MV64x60_LEVEL2_MASK; |
119 | unsigned long flags; | 119 | unsigned long flags; |
120 | 120 | ||
121 | spin_lock_irqsave(&mv64x60_lock, flags); | 121 | spin_lock_irqsave(&mv64x60_lock, flags); |
@@ -128,7 +128,7 @@ static void mv64x60_mask_high(struct irq_data *d) | |||
128 | 128 | ||
129 | static void mv64x60_unmask_high(struct irq_data *d) | 129 | static void mv64x60_unmask_high(struct irq_data *d) |
130 | { | 130 | { |
131 | int level2 = irq_map[d->irq].hwirq & MV64x60_LEVEL2_MASK; | 131 | int level2 = irqd_to_hwirq(d) & MV64x60_LEVEL2_MASK; |
132 | unsigned long flags; | 132 | unsigned long flags; |
133 | 133 | ||
134 | spin_lock_irqsave(&mv64x60_lock, flags); | 134 | spin_lock_irqsave(&mv64x60_lock, flags); |
@@ -152,7 +152,7 @@ static struct irq_chip mv64x60_chip_high = { | |||
152 | 152 | ||
153 | static void mv64x60_mask_gpp(struct irq_data *d) | 153 | static void mv64x60_mask_gpp(struct irq_data *d) |
154 | { | 154 | { |
155 | int level2 = irq_map[d->irq].hwirq & MV64x60_LEVEL2_MASK; | 155 | int level2 = irqd_to_hwirq(d) & MV64x60_LEVEL2_MASK; |
156 | unsigned long flags; | 156 | unsigned long flags; |
157 | 157 | ||
158 | spin_lock_irqsave(&mv64x60_lock, flags); | 158 | spin_lock_irqsave(&mv64x60_lock, flags); |
@@ -165,7 +165,7 @@ static void mv64x60_mask_gpp(struct irq_data *d) | |||
165 | 165 | ||
166 | static void mv64x60_mask_ack_gpp(struct irq_data *d) | 166 | static void mv64x60_mask_ack_gpp(struct irq_data *d) |
167 | { | 167 | { |
168 | int level2 = irq_map[d->irq].hwirq & MV64x60_LEVEL2_MASK; | 168 | int level2 = irqd_to_hwirq(d) & MV64x60_LEVEL2_MASK; |
169 | unsigned long flags; | 169 | unsigned long flags; |
170 | 170 | ||
171 | spin_lock_irqsave(&mv64x60_lock, flags); | 171 | spin_lock_irqsave(&mv64x60_lock, flags); |
@@ -180,7 +180,7 @@ static void mv64x60_mask_ack_gpp(struct irq_data *d) | |||
180 | 180 | ||
181 | static void mv64x60_unmask_gpp(struct irq_data *d) | 181 | static void mv64x60_unmask_gpp(struct irq_data *d) |
182 | { | 182 | { |
183 | int level2 = irq_map[d->irq].hwirq & MV64x60_LEVEL2_MASK; | 183 | int level2 = irqd_to_hwirq(d) & MV64x60_LEVEL2_MASK; |
184 | unsigned long flags; | 184 | unsigned long flags; |
185 | 185 | ||
186 | spin_lock_irqsave(&mv64x60_lock, flags); | 186 | spin_lock_irqsave(&mv64x60_lock, flags); |
diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.c b/arch/powerpc/sysdev/qe_lib/qe_ic.c index 832d6924ad1c..b2acda07220d 100644 --- a/arch/powerpc/sysdev/qe_lib/qe_ic.c +++ b/arch/powerpc/sysdev/qe_lib/qe_ic.c | |||
@@ -197,12 +197,10 @@ static inline struct qe_ic *qe_ic_from_irq_data(struct irq_data *d) | |||
197 | return irq_data_get_irq_chip_data(d); | 197 | return irq_data_get_irq_chip_data(d); |
198 | } | 198 | } |
199 | 199 | ||
200 | #define virq_to_hw(virq) ((unsigned int)irq_map[virq].hwirq) | ||
201 | |||
202 | static void qe_ic_unmask_irq(struct irq_data *d) | 200 | static void qe_ic_unmask_irq(struct irq_data *d) |
203 | { | 201 | { |
204 | struct qe_ic *qe_ic = qe_ic_from_irq_data(d); | 202 | struct qe_ic *qe_ic = qe_ic_from_irq_data(d); |
205 | unsigned int src = virq_to_hw(d->irq); | 203 | unsigned int src = irqd_to_hwirq(d); |
206 | unsigned long flags; | 204 | unsigned long flags; |
207 | u32 temp; | 205 | u32 temp; |
208 | 206 | ||
@@ -218,7 +216,7 @@ static void qe_ic_unmask_irq(struct irq_data *d) | |||
218 | static void qe_ic_mask_irq(struct irq_data *d) | 216 | static void qe_ic_mask_irq(struct irq_data *d) |
219 | { | 217 | { |
220 | struct qe_ic *qe_ic = qe_ic_from_irq_data(d); | 218 | struct qe_ic *qe_ic = qe_ic_from_irq_data(d); |
221 | unsigned int src = virq_to_hw(d->irq); | 219 | unsigned int src = irqd_to_hwirq(d); |
222 | unsigned long flags; | 220 | unsigned long flags; |
223 | u32 temp; | 221 | u32 temp; |
224 | 222 | ||
diff --git a/arch/powerpc/sysdev/uic.c b/arch/powerpc/sysdev/uic.c index 5d9138516628..984cd2029158 100644 --- a/arch/powerpc/sysdev/uic.c +++ b/arch/powerpc/sysdev/uic.c | |||
@@ -41,8 +41,6 @@ | |||
41 | #define UIC_VR 0x7 | 41 | #define UIC_VR 0x7 |
42 | #define UIC_VCR 0x8 | 42 | #define UIC_VCR 0x8 |
43 | 43 | ||
44 | #define uic_irq_to_hw(virq) (irq_map[virq].hwirq) | ||
45 | |||
46 | struct uic *primary_uic; | 44 | struct uic *primary_uic; |
47 | 45 | ||
48 | struct uic { | 46 | struct uic { |
@@ -58,7 +56,7 @@ struct uic { | |||
58 | static void uic_unmask_irq(struct irq_data *d) | 56 | static void uic_unmask_irq(struct irq_data *d) |
59 | { | 57 | { |
60 | struct uic *uic = irq_data_get_irq_chip_data(d); | 58 | struct uic *uic = irq_data_get_irq_chip_data(d); |
61 | unsigned int src = uic_irq_to_hw(d->irq); | 59 | unsigned int src = irqd_to_hwirq(d); |
62 | unsigned long flags; | 60 | unsigned long flags; |
63 | u32 er, sr; | 61 | u32 er, sr; |
64 | 62 | ||
@@ -76,7 +74,7 @@ static void uic_unmask_irq(struct irq_data *d) | |||
76 | static void uic_mask_irq(struct irq_data *d) | 74 | static void uic_mask_irq(struct irq_data *d) |
77 | { | 75 | { |
78 | struct uic *uic = irq_data_get_irq_chip_data(d); | 76 | struct uic *uic = irq_data_get_irq_chip_data(d); |
79 | unsigned int src = uic_irq_to_hw(d->irq); | 77 | unsigned int src = irqd_to_hwirq(d); |
80 | unsigned long flags; | 78 | unsigned long flags; |
81 | u32 er; | 79 | u32 er; |
82 | 80 | ||
@@ -90,7 +88,7 @@ static void uic_mask_irq(struct irq_data *d) | |||
90 | static void uic_ack_irq(struct irq_data *d) | 88 | static void uic_ack_irq(struct irq_data *d) |
91 | { | 89 | { |
92 | struct uic *uic = irq_data_get_irq_chip_data(d); | 90 | struct uic *uic = irq_data_get_irq_chip_data(d); |
93 | unsigned int src = uic_irq_to_hw(d->irq); | 91 | unsigned int src = irqd_to_hwirq(d); |
94 | unsigned long flags; | 92 | unsigned long flags; |
95 | 93 | ||
96 | spin_lock_irqsave(&uic->lock, flags); | 94 | spin_lock_irqsave(&uic->lock, flags); |
@@ -101,7 +99,7 @@ static void uic_ack_irq(struct irq_data *d) | |||
101 | static void uic_mask_ack_irq(struct irq_data *d) | 99 | static void uic_mask_ack_irq(struct irq_data *d) |
102 | { | 100 | { |
103 | struct uic *uic = irq_data_get_irq_chip_data(d); | 101 | struct uic *uic = irq_data_get_irq_chip_data(d); |
104 | unsigned int src = uic_irq_to_hw(d->irq); | 102 | unsigned int src = irqd_to_hwirq(d); |
105 | unsigned long flags; | 103 | unsigned long flags; |
106 | u32 er, sr; | 104 | u32 er, sr; |
107 | 105 | ||
@@ -126,7 +124,7 @@ static void uic_mask_ack_irq(struct irq_data *d) | |||
126 | static int uic_set_irq_type(struct irq_data *d, unsigned int flow_type) | 124 | static int uic_set_irq_type(struct irq_data *d, unsigned int flow_type) |
127 | { | 125 | { |
128 | struct uic *uic = irq_data_get_irq_chip_data(d); | 126 | struct uic *uic = irq_data_get_irq_chip_data(d); |
129 | unsigned int src = uic_irq_to_hw(d->irq); | 127 | unsigned int src = irqd_to_hwirq(d); |
130 | unsigned long flags; | 128 | unsigned long flags; |
131 | int trigger, polarity; | 129 | int trigger, polarity; |
132 | u32 tr, pr, mask; | 130 | u32 tr, pr, mask; |
diff --git a/arch/powerpc/sysdev/xics/icp-hv.c b/arch/powerpc/sysdev/xics/icp-hv.c index b03d348b19a5..76e87245bbfe 100644 --- a/arch/powerpc/sysdev/xics/icp-hv.c +++ b/arch/powerpc/sysdev/xics/icp-hv.c | |||
@@ -58,7 +58,7 @@ static inline void icp_hv_set_qirr(int n_cpu , u8 value) | |||
58 | 58 | ||
59 | static void icp_hv_eoi(struct irq_data *d) | 59 | static void icp_hv_eoi(struct irq_data *d) |
60 | { | 60 | { |
61 | unsigned int hw_irq = (unsigned int)irq_data_to_hw(d); | 61 | unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d); |
62 | 62 | ||
63 | iosync(); | 63 | iosync(); |
64 | icp_hv_set_xirr((xics_pop_cppr() << 24) | hw_irq); | 64 | icp_hv_set_xirr((xics_pop_cppr() << 24) | hw_irq); |
diff --git a/arch/powerpc/sysdev/xics/icp-native.c b/arch/powerpc/sysdev/xics/icp-native.c index be5e3d748edb..d9e0515592c4 100644 --- a/arch/powerpc/sysdev/xics/icp-native.c +++ b/arch/powerpc/sysdev/xics/icp-native.c | |||
@@ -80,7 +80,7 @@ static void icp_native_set_cpu_priority(unsigned char cppr) | |||
80 | 80 | ||
81 | static void icp_native_eoi(struct irq_data *d) | 81 | static void icp_native_eoi(struct irq_data *d) |
82 | { | 82 | { |
83 | unsigned int hw_irq = (unsigned int)irq_data_to_hw(d); | 83 | unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d); |
84 | 84 | ||
85 | iosync(); | 85 | iosync(); |
86 | icp_native_set_xirr((xics_pop_cppr() << 24) | hw_irq); | 86 | icp_native_set_xirr((xics_pop_cppr() << 24) | hw_irq); |
diff --git a/arch/powerpc/sysdev/xics/ics-rtas.c b/arch/powerpc/sysdev/xics/ics-rtas.c index 610c148fedcc..c782f85cf7e4 100644 --- a/arch/powerpc/sysdev/xics/ics-rtas.c +++ b/arch/powerpc/sysdev/xics/ics-rtas.c | |||
@@ -38,7 +38,7 @@ static struct ics ics_rtas = { | |||
38 | 38 | ||
39 | static void ics_rtas_unmask_irq(struct irq_data *d) | 39 | static void ics_rtas_unmask_irq(struct irq_data *d) |
40 | { | 40 | { |
41 | unsigned int hw_irq = (unsigned int)irq_data_to_hw(d); | 41 | unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d); |
42 | int call_status; | 42 | int call_status; |
43 | int server; | 43 | int server; |
44 | 44 | ||
@@ -109,7 +109,7 @@ static void ics_rtas_mask_real_irq(unsigned int hw_irq) | |||
109 | 109 | ||
110 | static void ics_rtas_mask_irq(struct irq_data *d) | 110 | static void ics_rtas_mask_irq(struct irq_data *d) |
111 | { | 111 | { |
112 | unsigned int hw_irq = (unsigned int)irq_data_to_hw(d); | 112 | unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d); |
113 | 113 | ||
114 | pr_devel("xics: mask virq %d [hw 0x%x]\n", d->irq, hw_irq); | 114 | pr_devel("xics: mask virq %d [hw 0x%x]\n", d->irq, hw_irq); |
115 | 115 | ||
@@ -122,7 +122,7 @@ static int ics_rtas_set_affinity(struct irq_data *d, | |||
122 | const struct cpumask *cpumask, | 122 | const struct cpumask *cpumask, |
123 | bool force) | 123 | bool force) |
124 | { | 124 | { |
125 | unsigned int hw_irq = (unsigned int)irq_data_to_hw(d); | 125 | unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d); |
126 | int status; | 126 | int status; |
127 | int xics_status[2]; | 127 | int xics_status[2]; |
128 | int irq_server; | 128 | int irq_server; |
@@ -171,7 +171,7 @@ static struct irq_chip ics_rtas_irq_chip = { | |||
171 | 171 | ||
172 | static int ics_rtas_map(struct ics *ics, unsigned int virq) | 172 | static int ics_rtas_map(struct ics *ics, unsigned int virq) |
173 | { | 173 | { |
174 | unsigned int hw_irq = (unsigned int)irq_map[virq].hwirq; | 174 | unsigned int hw_irq = (unsigned int)virq_to_hw(virq); |
175 | int status[2]; | 175 | int status[2]; |
176 | int rc; | 176 | int rc; |
177 | 177 | ||
diff --git a/arch/powerpc/sysdev/xics/xics-common.c b/arch/powerpc/sysdev/xics/xics-common.c index c58844d72426..a0576b705ddd 100644 --- a/arch/powerpc/sysdev/xics/xics-common.c +++ b/arch/powerpc/sysdev/xics/xics-common.c | |||
@@ -240,9 +240,9 @@ void xics_migrate_irqs_away(void) | |||
240 | /* We can't set affinity on ISA interrupts */ | 240 | /* We can't set affinity on ISA interrupts */ |
241 | if (virq < NUM_ISA_INTERRUPTS) | 241 | if (virq < NUM_ISA_INTERRUPTS) |
242 | continue; | 242 | continue; |
243 | if (irq_map[virq].host != xics_host) | 243 | if (virq_to_host(virq) != xics_host) |
244 | continue; | 244 | continue; |
245 | irq = (unsigned int)irq_map[virq].hwirq; | 245 | irq = (unsigned int)virq_to_hw(virq); |
246 | /* We need to get IPIs still. */ | 246 | /* We need to get IPIs still. */ |
247 | if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS) | 247 | if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS) |
248 | continue; | 248 | continue; |
diff --git a/arch/powerpc/sysdev/xilinx_intc.c b/arch/powerpc/sysdev/xilinx_intc.c index 0a13fc19e287..6183799754af 100644 --- a/arch/powerpc/sysdev/xilinx_intc.c +++ b/arch/powerpc/sysdev/xilinx_intc.c | |||
@@ -71,7 +71,7 @@ static unsigned char xilinx_intc_map_senses[] = { | |||
71 | */ | 71 | */ |
72 | static void xilinx_intc_mask(struct irq_data *d) | 72 | static void xilinx_intc_mask(struct irq_data *d) |
73 | { | 73 | { |
74 | int irq = virq_to_hw(d->irq); | 74 | int irq = irqd_to_hwirq(d); |
75 | void * regs = irq_data_get_irq_chip_data(d); | 75 | void * regs = irq_data_get_irq_chip_data(d); |
76 | pr_debug("mask: %d\n", irq); | 76 | pr_debug("mask: %d\n", irq); |
77 | out_be32(regs + XINTC_CIE, 1 << irq); | 77 | out_be32(regs + XINTC_CIE, 1 << irq); |
@@ -87,7 +87,7 @@ static int xilinx_intc_set_type(struct irq_data *d, unsigned int flow_type) | |||
87 | */ | 87 | */ |
88 | static void xilinx_intc_level_unmask(struct irq_data *d) | 88 | static void xilinx_intc_level_unmask(struct irq_data *d) |
89 | { | 89 | { |
90 | int irq = virq_to_hw(d->irq); | 90 | int irq = irqd_to_hwirq(d); |
91 | void * regs = irq_data_get_irq_chip_data(d); | 91 | void * regs = irq_data_get_irq_chip_data(d); |
92 | pr_debug("unmask: %d\n", irq); | 92 | pr_debug("unmask: %d\n", irq); |
93 | out_be32(regs + XINTC_SIE, 1 << irq); | 93 | out_be32(regs + XINTC_SIE, 1 << irq); |
@@ -112,7 +112,7 @@ static struct irq_chip xilinx_intc_level_irqchip = { | |||
112 | */ | 112 | */ |
113 | static void xilinx_intc_edge_unmask(struct irq_data *d) | 113 | static void xilinx_intc_edge_unmask(struct irq_data *d) |
114 | { | 114 | { |
115 | int irq = virq_to_hw(d->irq); | 115 | int irq = irqd_to_hwirq(d); |
116 | void *regs = irq_data_get_irq_chip_data(d); | 116 | void *regs = irq_data_get_irq_chip_data(d); |
117 | pr_debug("unmask: %d\n", irq); | 117 | pr_debug("unmask: %d\n", irq); |
118 | out_be32(regs + XINTC_SIE, 1 << irq); | 118 | out_be32(regs + XINTC_SIE, 1 << irq); |
@@ -120,7 +120,7 @@ static void xilinx_intc_edge_unmask(struct irq_data *d) | |||
120 | 120 | ||
121 | static void xilinx_intc_edge_ack(struct irq_data *d) | 121 | static void xilinx_intc_edge_ack(struct irq_data *d) |
122 | { | 122 | { |
123 | int irq = virq_to_hw(d->irq); | 123 | int irq = irqd_to_hwirq(d); |
124 | void * regs = irq_data_get_irq_chip_data(d); | 124 | void * regs = irq_data_get_irq_chip_data(d); |
125 | pr_debug("ack: %d\n", irq); | 125 | pr_debug("ack: %d\n", irq); |
126 | out_be32(regs + XINTC_IAR, 1 << irq); | 126 | out_be32(regs + XINTC_IAR, 1 << irq); |