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authorSergey Ryazanov <ryazanov.s.a@gmail.com>2014-10-28 19:18:38 -0400
committerRalf Baechle <ralf@linux-mips.org>2014-11-24 01:45:26 -0500
commit43cc739fd98b8c517ad45756d869f866e746ba04 (patch)
treec358c406d9e102d83da4e7f1951b09b8ecb0ac91 /arch
parent484c344985ddf8e9ed12b8cf540eba0b1d869236 (diff)
MIPS: ath25: add common parts
Add common code for Atheros AR5312 and Atheros AR2315 SoCs families. Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> Cc: Linux MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/8237 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/Kbuild.platforms1
-rw-r--r--arch/mips/Kconfig12
-rw-r--r--arch/mips/ath25/Makefile11
-rw-r--r--arch/mips/ath25/Platform6
-rw-r--r--arch/mips/ath25/board.c51
-rw-r--r--arch/mips/ath25/devices.c10
-rw-r--r--arch/mips/ath25/devices.h18
-rw-r--r--arch/mips/ath25/prom.c26
-rw-r--r--arch/mips/include/asm/mach-ath25/cpu-feature-overrides.h56
-rw-r--r--arch/mips/include/asm/mach-ath25/dma-coherence.h64
-rw-r--r--arch/mips/include/asm/mach-ath25/gpio.h16
-rw-r--r--arch/mips/include/asm/mach-ath25/war.h25
12 files changed, 296 insertions, 0 deletions
diff --git a/arch/mips/Kbuild.platforms b/arch/mips/Kbuild.platforms
index 7c507212025a..e5fc463b36d0 100644
--- a/arch/mips/Kbuild.platforms
+++ b/arch/mips/Kbuild.platforms
@@ -2,6 +2,7 @@
2 2
3platforms += alchemy 3platforms += alchemy
4platforms += ar7 4platforms += ar7
5platforms += ath25
5platforms += ath79 6platforms += ath79
6platforms += bcm3384 7platforms += bcm3384
7platforms += bcm47xx 8platforms += bcm47xx
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 9e8317e9b567..7db1bfb80f0a 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -97,6 +97,18 @@ config AR7
97 Support for the Texas Instruments AR7 System-on-a-Chip 97 Support for the Texas Instruments AR7 System-on-a-Chip
98 family: TNETD7100, 7200 and 7300. 98 family: TNETD7100, 7200 and 7300.
99 99
100config ATH25
101 bool "Atheros AR231x/AR531x SoC support"
102 select CEVT_R4K
103 select CSRC_R4K
104 select DMA_NONCOHERENT
105 select IRQ_CPU
106 select SYS_HAS_CPU_MIPS32_R1
107 select SYS_SUPPORTS_BIG_ENDIAN
108 select SYS_SUPPORTS_32BIT_KERNEL
109 help
110 Support for Atheros AR231x and Atheros AR531x based boards
111
100config ATH79 112config ATH79
101 bool "Atheros AR71XX/AR724X/AR913X based boards" 113 bool "Atheros AR71XX/AR724X/AR913X based boards"
102 select ARCH_REQUIRE_GPIOLIB 114 select ARCH_REQUIRE_GPIOLIB
diff --git a/arch/mips/ath25/Makefile b/arch/mips/ath25/Makefile
new file mode 100644
index 000000000000..9199fa1508d2
--- /dev/null
+++ b/arch/mips/ath25/Makefile
@@ -0,0 +1,11 @@
1#
2# This file is subject to the terms and conditions of the GNU General Public
3# License. See the file "COPYING" in the main directory of this archive
4# for more details.
5#
6# Copyright (C) 2006 FON Technology, SL.
7# Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
8# Copyright (C) 2006-2009 Felix Fietkau <nbd@openwrt.org>
9#
10
11obj-y += board.o prom.o devices.o
diff --git a/arch/mips/ath25/Platform b/arch/mips/ath25/Platform
new file mode 100644
index 000000000000..ef3f81fa080b
--- /dev/null
+++ b/arch/mips/ath25/Platform
@@ -0,0 +1,6 @@
1#
2# Atheros AR531X/AR231X WiSoC
3#
4platform-$(CONFIG_ATH25) += ath25/
5cflags-$(CONFIG_ATH25) += -I$(srctree)/arch/mips/include/asm/mach-ath25
6load-$(CONFIG_ATH25) += 0xffffffff80041000
diff --git a/arch/mips/ath25/board.c b/arch/mips/ath25/board.c
new file mode 100644
index 000000000000..dd70327fd801
--- /dev/null
+++ b/arch/mips/ath25/board.c
@@ -0,0 +1,51 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2003 Atheros Communications, Inc., All Rights Reserved.
7 * Copyright (C) 2006 FON Technology, SL.
8 * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
9 * Copyright (C) 2006-2009 Felix Fietkau <nbd@openwrt.org>
10 */
11
12#include <linux/init.h>
13#include <linux/interrupt.h>
14#include <asm/irq_cpu.h>
15#include <asm/reboot.h>
16#include <asm/bootinfo.h>
17#include <asm/time.h>
18
19static void ath25_halt(void)
20{
21 local_irq_disable();
22 unreachable();
23}
24
25void __init plat_mem_setup(void)
26{
27 _machine_halt = ath25_halt;
28 pm_power_off = ath25_halt;
29
30 /* Disable data watchpoints */
31 write_c0_watchlo0(0);
32}
33
34asmlinkage void plat_irq_dispatch(void)
35{
36}
37
38void __init plat_time_init(void)
39{
40}
41
42unsigned int __cpuinit get_c0_compare_int(void)
43{
44 return CP0_LEGACY_COMPARE_IRQ;
45}
46
47void __init arch_init_irq(void)
48{
49 clear_c0_status(ST0_IM);
50 mips_cpu_irq_init();
51}
diff --git a/arch/mips/ath25/devices.c b/arch/mips/ath25/devices.c
new file mode 100644
index 000000000000..049ab4477954
--- /dev/null
+++ b/arch/mips/ath25/devices.c
@@ -0,0 +1,10 @@
1#include <linux/kernel.h>
2#include <linux/init.h>
3#include <asm/bootinfo.h>
4
5#include "devices.h"
6
7const char *get_system_type(void)
8{
9 return "Atheros (unknown)";
10}
diff --git a/arch/mips/ath25/devices.h b/arch/mips/ath25/devices.h
new file mode 100644
index 000000000000..e25a3262256d
--- /dev/null
+++ b/arch/mips/ath25/devices.h
@@ -0,0 +1,18 @@
1#ifndef __ATH25_DEVICES_H
2#define __ATH25_DEVICES_H
3
4#include <linux/cpu.h>
5
6#define ATH25_REG_MS(_val, _field) (((_val) & _field##_M) >> _field##_S)
7
8static inline bool is_ar2315(void)
9{
10 return (current_cpu_data.cputype == CPU_4KEC);
11}
12
13static inline bool is_ar5312(void)
14{
15 return !is_ar2315();
16}
17
18#endif
diff --git a/arch/mips/ath25/prom.c b/arch/mips/ath25/prom.c
new file mode 100644
index 000000000000..edf82be8870d
--- /dev/null
+++ b/arch/mips/ath25/prom.c
@@ -0,0 +1,26 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright MontaVista Software Inc
7 * Copyright (C) 2003 Atheros Communications, Inc., All Rights Reserved.
8 * Copyright (C) 2006 FON Technology, SL.
9 * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
10 * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
11 */
12
13/*
14 * Prom setup file for AR5312/AR231x SoCs
15 */
16
17#include <linux/init.h>
18#include <asm/bootinfo.h>
19
20void __init prom_init(void)
21{
22}
23
24void __init prom_free_prom_memory(void)
25{
26}
diff --git a/arch/mips/include/asm/mach-ath25/cpu-feature-overrides.h b/arch/mips/include/asm/mach-ath25/cpu-feature-overrides.h
new file mode 100644
index 000000000000..5fd82d890843
--- /dev/null
+++ b/arch/mips/include/asm/mach-ath25/cpu-feature-overrides.h
@@ -0,0 +1,56 @@
1/*
2 * Atheros AR231x/AR531x SoC specific CPU feature overrides
3 *
4 * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
5 *
6 * This file was derived from: include/asm-mips/cpu-features.h
7 * Copyright (C) 2003, 2004 Ralf Baechle
8 * Copyright (C) 2004 Maciej W. Rozycki
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published
12 * by the Free Software Foundation.
13 *
14 */
15#ifndef __ASM_MACH_ATH25_CPU_FEATURE_OVERRIDES_H
16#define __ASM_MACH_ATH25_CPU_FEATURE_OVERRIDES_H
17
18/*
19 * The Atheros AR531x/AR231x SoCs have MIPS 4Kc/4KEc core.
20 */
21#define cpu_has_tlb 1
22#define cpu_has_4kex 1
23#define cpu_has_3k_cache 0
24#define cpu_has_4k_cache 1
25#define cpu_has_tx39_cache 0
26#define cpu_has_sb1_cache 0
27#define cpu_has_fpu 0
28#define cpu_has_32fpr 0
29#define cpu_has_counter 1
30#define cpu_has_ejtag 1
31
32/*
33 * The MIPS 4Kc V0.9 core in the AR5312/AR2312 have problems with the
34 * ll/sc instructions.
35 */
36#define cpu_has_llsc 0
37
38#define cpu_has_mips16 0
39#define cpu_has_mdmx 0
40#define cpu_has_mips3d 0
41#define cpu_has_smartmips 0
42
43#define cpu_has_mips32r1 1
44
45#define cpu_has_mips64r1 0
46#define cpu_has_mips64r2 0
47
48#define cpu_has_dsp 0
49#define cpu_has_mipsmt 0
50
51#define cpu_has_64bits 0
52#define cpu_has_64bit_zero_reg 0
53#define cpu_has_64bit_gp_regs 0
54#define cpu_has_64bit_addresses 0
55
56#endif /* __ASM_MACH_ATH25_CPU_FEATURE_OVERRIDES_H */
diff --git a/arch/mips/include/asm/mach-ath25/dma-coherence.h b/arch/mips/include/asm/mach-ath25/dma-coherence.h
new file mode 100644
index 000000000000..8b3d0cca4505
--- /dev/null
+++ b/arch/mips/include/asm/mach-ath25/dma-coherence.h
@@ -0,0 +1,64 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2006 Ralf Baechle <ralf@linux-mips.org>
7 * Copyright (C) 2007 Felix Fietkau <nbd@openwrt.org>
8 *
9 */
10#ifndef __ASM_MACH_ATH25_DMA_COHERENCE_H
11#define __ASM_MACH_ATH25_DMA_COHERENCE_H
12
13#include <linux/device.h>
14
15static inline dma_addr_t
16plat_map_dma_mem(struct device *dev, void *addr, size_t size)
17{
18 return virt_to_phys(addr);
19}
20
21static inline dma_addr_t
22plat_map_dma_mem_page(struct device *dev, struct page *page)
23{
24 return page_to_phys(page);
25}
26
27static inline unsigned long
28plat_dma_addr_to_phys(struct device *dev, dma_addr_t dma_addr)
29{
30 return dma_addr;
31}
32
33static inline void
34plat_unmap_dma_mem(struct device *dev, dma_addr_t dma_addr, size_t size,
35 enum dma_data_direction direction)
36{
37}
38
39static inline int plat_dma_supported(struct device *dev, u64 mask)
40{
41 return 1;
42}
43
44static inline void plat_extra_sync_for_device(struct device *dev)
45{
46}
47
48static inline int plat_dma_mapping_error(struct device *dev,
49 dma_addr_t dma_addr)
50{
51 return 0;
52}
53
54static inline int plat_device_is_coherent(struct device *dev)
55{
56#ifdef CONFIG_DMA_COHERENT
57 return 1;
58#endif
59#ifdef CONFIG_DMA_NONCOHERENT
60 return 0;
61#endif
62}
63
64#endif /* __ASM_MACH_ATH25_DMA_COHERENCE_H */
diff --git a/arch/mips/include/asm/mach-ath25/gpio.h b/arch/mips/include/asm/mach-ath25/gpio.h
new file mode 100644
index 000000000000..713564b8e8ef
--- /dev/null
+++ b/arch/mips/include/asm/mach-ath25/gpio.h
@@ -0,0 +1,16 @@
1#ifndef __ASM_MACH_ATH25_GPIO_H
2#define __ASM_MACH_ATH25_GPIO_H
3
4#include <asm-generic/gpio.h>
5
6#define gpio_get_value __gpio_get_value
7#define gpio_set_value __gpio_set_value
8#define gpio_cansleep __gpio_cansleep
9#define gpio_to_irq __gpio_to_irq
10
11static inline int irq_to_gpio(unsigned irq)
12{
13 return -EINVAL;
14}
15
16#endif /* __ASM_MACH_ATH25_GPIO_H */
diff --git a/arch/mips/include/asm/mach-ath25/war.h b/arch/mips/include/asm/mach-ath25/war.h
new file mode 100644
index 000000000000..e3a5250ebd67
--- /dev/null
+++ b/arch/mips/include/asm/mach-ath25/war.h
@@ -0,0 +1,25 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2008 Felix Fietkau <nbd@openwrt.org>
7 */
8#ifndef __ASM_MACH_ATH25_WAR_H
9#define __ASM_MACH_ATH25_WAR_H
10
11#define R4600_V1_INDEX_ICACHEOP_WAR 0
12#define R4600_V1_HIT_CACHEOP_WAR 0
13#define R4600_V2_HIT_CACHEOP_WAR 0
14#define R5432_CP0_INTERRUPT_WAR 0
15#define BCM1250_M3_WAR 0
16#define SIBYTE_1956_WAR 0
17#define MIPS4K_ICACHE_REFILL_WAR 0
18#define MIPS_CACHE_SYNC_WAR 0
19#define TX49XX_ICACHE_INDEX_INV_WAR 0
20#define RM9000_CDEX_SMP_WAR 0
21#define ICACHE_REFILLS_WORKAROUND_WAR 0
22#define R10000_LLSC_WAR 0
23#define MIPS34K_MISSED_ITLB_WAR 0
24
25#endif /* __ASM_MACH_ATH25_WAR_H */