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authorWill Deacon <will.deacon@arm.com>2012-07-06 10:45:00 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2012-07-09 12:41:10 -0400
commit4295b898f5a5c7e62ae68e7a4ecc4b414622ffe6 (patch)
treeb05cc5adefe9e4a42ccbbe31c7a771934e064a35 /arch
parent881ccccb6bd3f0e1fff8b9addbe0de90e0b16166 (diff)
ARM: 7448/1: perf: remove arm_perf_pmu_ids global enumeration
In order to provide PMU name strings compatible with the OProfile user ABI, an enumeration of all PMUs is currently used by perf to identify each PMU uniquely. Unfortunately, this does not scale well in the presence of multiple PMUs and creates a single, global namespace across all PMUs in the system. This patch removes the enumeration and instead uses the name string for the PMU to map onto the OProfile variant. perf_pmu_name is implemented for CPU PMUs, which is all that OProfile cares about anyway. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/include/asm/perf_event.h17
-rw-r--r--arch/arm/include/asm/pmu.h3
-rw-r--r--arch/arm/kernel/perf_event.c15
-rw-r--r--arch/arm/kernel/perf_event_v6.c2
-rw-r--r--arch/arm/kernel/perf_event_v7.c5
-rw-r--r--arch/arm/kernel/perf_event_xscale.c2
-rw-r--r--arch/arm/oprofile/common.c45
7 files changed, 36 insertions, 53 deletions
diff --git a/arch/arm/include/asm/perf_event.h b/arch/arm/include/asm/perf_event.h
index 00cbe10a50e3..e074948d8143 100644
--- a/arch/arm/include/asm/perf_event.h
+++ b/arch/arm/include/asm/perf_event.h
@@ -12,21 +12,6 @@
12#ifndef __ARM_PERF_EVENT_H__ 12#ifndef __ARM_PERF_EVENT_H__
13#define __ARM_PERF_EVENT_H__ 13#define __ARM_PERF_EVENT_H__
14 14
15/* ARM perf PMU IDs for use by internal perf clients. */ 15/* Nothing to see here... */
16enum arm_perf_pmu_ids {
17 ARM_PERF_PMU_ID_XSCALE1 = 0,
18 ARM_PERF_PMU_ID_XSCALE2,
19 ARM_PERF_PMU_ID_V6,
20 ARM_PERF_PMU_ID_V6MP,
21 ARM_PERF_PMU_ID_CA8,
22 ARM_PERF_PMU_ID_CA9,
23 ARM_PERF_PMU_ID_CA5,
24 ARM_PERF_PMU_ID_CA15,
25 ARM_PERF_PMU_ID_CA7,
26 ARM_NUM_PMU_IDS,
27};
28
29extern enum arm_perf_pmu_ids
30armpmu_get_pmu_id(void);
31 16
32#endif /* __ARM_PERF_EVENT_H__ */ 17#endif /* __ARM_PERF_EVENT_H__ */
diff --git a/arch/arm/include/asm/pmu.h b/arch/arm/include/asm/pmu.h
index 90114faa9f3c..4432305f4a2a 100644
--- a/arch/arm/include/asm/pmu.h
+++ b/arch/arm/include/asm/pmu.h
@@ -103,10 +103,9 @@ struct pmu_hw_events {
103 103
104struct arm_pmu { 104struct arm_pmu {
105 struct pmu pmu; 105 struct pmu pmu;
106 enum arm_perf_pmu_ids id;
107 enum arm_pmu_type type; 106 enum arm_pmu_type type;
108 cpumask_t active_irqs; 107 cpumask_t active_irqs;
109 const char *name; 108 char *name;
110 irqreturn_t (*handle_irq)(int irq_num, void *dev); 109 irqreturn_t (*handle_irq)(int irq_num, void *dev);
111 void (*enable)(struct hw_perf_event *evt, int idx); 110 void (*enable)(struct hw_perf_event *evt, int idx);
112 void (*disable)(struct hw_perf_event *evt, int idx); 111 void (*disable)(struct hw_perf_event *evt, int idx);
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 186c8cb982c5..df85eda3add3 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -47,17 +47,14 @@ static DEFINE_PER_CPU(struct pmu_hw_events, cpu_hw_events);
47/* Set at runtime when we know what CPU type we are. */ 47/* Set at runtime when we know what CPU type we are. */
48static struct arm_pmu *cpu_pmu; 48static struct arm_pmu *cpu_pmu;
49 49
50enum arm_perf_pmu_ids 50const char *perf_pmu_name(void)
51armpmu_get_pmu_id(void)
52{ 51{
53 int id = -ENODEV; 52 if (!cpu_pmu)
54 53 return NULL;
55 if (cpu_pmu != NULL)
56 id = cpu_pmu->id;
57 54
58 return id; 55 return cpu_pmu->pmu.name;
59} 56}
60EXPORT_SYMBOL_GPL(armpmu_get_pmu_id); 57EXPORT_SYMBOL_GPL(perf_pmu_name);
61 58
62int perf_num_counters(void) 59int perf_num_counters(void)
63{ 60{
@@ -760,7 +757,7 @@ init_hw_perf_events(void)
760 cpu_pmu->name, cpu_pmu->num_events); 757 cpu_pmu->name, cpu_pmu->num_events);
761 cpu_pmu_init(cpu_pmu); 758 cpu_pmu_init(cpu_pmu);
762 register_cpu_notifier(&pmu_cpu_notifier); 759 register_cpu_notifier(&pmu_cpu_notifier);
763 armpmu_register(cpu_pmu, "cpu", PERF_TYPE_RAW); 760 armpmu_register(cpu_pmu, cpu_pmu->name, PERF_TYPE_RAW);
764 } else { 761 } else {
765 pr_info("no hardware support available\n"); 762 pr_info("no hardware support available\n");
766 } 763 }
diff --git a/arch/arm/kernel/perf_event_v6.c b/arch/arm/kernel/perf_event_v6.c
index ab627a740fa3..c90fcb2b6967 100644
--- a/arch/arm/kernel/perf_event_v6.c
+++ b/arch/arm/kernel/perf_event_v6.c
@@ -650,7 +650,6 @@ static int armv6_map_event(struct perf_event *event)
650} 650}
651 651
652static struct arm_pmu armv6pmu = { 652static struct arm_pmu armv6pmu = {
653 .id = ARM_PERF_PMU_ID_V6,
654 .name = "v6", 653 .name = "v6",
655 .handle_irq = armv6pmu_handle_irq, 654 .handle_irq = armv6pmu_handle_irq,
656 .enable = armv6pmu_enable_event, 655 .enable = armv6pmu_enable_event,
@@ -685,7 +684,6 @@ static int armv6mpcore_map_event(struct perf_event *event)
685} 684}
686 685
687static struct arm_pmu armv6mpcore_pmu = { 686static struct arm_pmu armv6mpcore_pmu = {
688 .id = ARM_PERF_PMU_ID_V6MP,
689 .name = "v6mpcore", 687 .name = "v6mpcore",
690 .handle_irq = armv6pmu_handle_irq, 688 .handle_irq = armv6pmu_handle_irq,
691 .enable = armv6pmu_enable_event, 689 .enable = armv6pmu_enable_event,
diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c
index d3c536068162..f04070bd2183 100644
--- a/arch/arm/kernel/perf_event_v7.c
+++ b/arch/arm/kernel/perf_event_v7.c
@@ -1258,7 +1258,6 @@ static u32 __init armv7_read_num_pmnc_events(void)
1258 1258
1259static struct arm_pmu *__init armv7_a8_pmu_init(void) 1259static struct arm_pmu *__init armv7_a8_pmu_init(void)
1260{ 1260{
1261 armv7pmu.id = ARM_PERF_PMU_ID_CA8;
1262 armv7pmu.name = "ARMv7 Cortex-A8"; 1261 armv7pmu.name = "ARMv7 Cortex-A8";
1263 armv7pmu.map_event = armv7_a8_map_event; 1262 armv7pmu.map_event = armv7_a8_map_event;
1264 armv7pmu.num_events = armv7_read_num_pmnc_events(); 1263 armv7pmu.num_events = armv7_read_num_pmnc_events();
@@ -1267,7 +1266,6 @@ static struct arm_pmu *__init armv7_a8_pmu_init(void)
1267 1266
1268static struct arm_pmu *__init armv7_a9_pmu_init(void) 1267static struct arm_pmu *__init armv7_a9_pmu_init(void)
1269{ 1268{
1270 armv7pmu.id = ARM_PERF_PMU_ID_CA9;
1271 armv7pmu.name = "ARMv7 Cortex-A9"; 1269 armv7pmu.name = "ARMv7 Cortex-A9";
1272 armv7pmu.map_event = armv7_a9_map_event; 1270 armv7pmu.map_event = armv7_a9_map_event;
1273 armv7pmu.num_events = armv7_read_num_pmnc_events(); 1271 armv7pmu.num_events = armv7_read_num_pmnc_events();
@@ -1276,7 +1274,6 @@ static struct arm_pmu *__init armv7_a9_pmu_init(void)
1276 1274
1277static struct arm_pmu *__init armv7_a5_pmu_init(void) 1275static struct arm_pmu *__init armv7_a5_pmu_init(void)
1278{ 1276{
1279 armv7pmu.id = ARM_PERF_PMU_ID_CA5;
1280 armv7pmu.name = "ARMv7 Cortex-A5"; 1277 armv7pmu.name = "ARMv7 Cortex-A5";
1281 armv7pmu.map_event = armv7_a5_map_event; 1278 armv7pmu.map_event = armv7_a5_map_event;
1282 armv7pmu.num_events = armv7_read_num_pmnc_events(); 1279 armv7pmu.num_events = armv7_read_num_pmnc_events();
@@ -1285,7 +1282,6 @@ static struct arm_pmu *__init armv7_a5_pmu_init(void)
1285 1282
1286static struct arm_pmu *__init armv7_a15_pmu_init(void) 1283static struct arm_pmu *__init armv7_a15_pmu_init(void)
1287{ 1284{
1288 armv7pmu.id = ARM_PERF_PMU_ID_CA15;
1289 armv7pmu.name = "ARMv7 Cortex-A15"; 1285 armv7pmu.name = "ARMv7 Cortex-A15";
1290 armv7pmu.map_event = armv7_a15_map_event; 1286 armv7pmu.map_event = armv7_a15_map_event;
1291 armv7pmu.num_events = armv7_read_num_pmnc_events(); 1287 armv7pmu.num_events = armv7_read_num_pmnc_events();
@@ -1295,7 +1291,6 @@ static struct arm_pmu *__init armv7_a15_pmu_init(void)
1295 1291
1296static struct arm_pmu *__init armv7_a7_pmu_init(void) 1292static struct arm_pmu *__init armv7_a7_pmu_init(void)
1297{ 1293{
1298 armv7pmu.id = ARM_PERF_PMU_ID_CA7;
1299 armv7pmu.name = "ARMv7 Cortex-A7"; 1294 armv7pmu.name = "ARMv7 Cortex-A7";
1300 armv7pmu.map_event = armv7_a7_map_event; 1295 armv7pmu.map_event = armv7_a7_map_event;
1301 armv7pmu.num_events = armv7_read_num_pmnc_events(); 1296 armv7pmu.num_events = armv7_read_num_pmnc_events();
diff --git a/arch/arm/kernel/perf_event_xscale.c b/arch/arm/kernel/perf_event_xscale.c
index e34e7254e652..f759fe0bab63 100644
--- a/arch/arm/kernel/perf_event_xscale.c
+++ b/arch/arm/kernel/perf_event_xscale.c
@@ -435,7 +435,6 @@ static int xscale_map_event(struct perf_event *event)
435} 435}
436 436
437static struct arm_pmu xscale1pmu = { 437static struct arm_pmu xscale1pmu = {
438 .id = ARM_PERF_PMU_ID_XSCALE1,
439 .name = "xscale1", 438 .name = "xscale1",
440 .handle_irq = xscale1pmu_handle_irq, 439 .handle_irq = xscale1pmu_handle_irq,
441 .enable = xscale1pmu_enable_event, 440 .enable = xscale1pmu_enable_event,
@@ -803,7 +802,6 @@ xscale2pmu_write_counter(int counter, u32 val)
803} 802}
804 803
805static struct arm_pmu xscale2pmu = { 804static struct arm_pmu xscale2pmu = {
806 .id = ARM_PERF_PMU_ID_XSCALE2,
807 .name = "xscale2", 805 .name = "xscale2",
808 .handle_irq = xscale2pmu_handle_irq, 806 .handle_irq = xscale2pmu_handle_irq,
809 .enable = xscale2pmu_enable_event, 807 .enable = xscale2pmu_enable_event,
diff --git a/arch/arm/oprofile/common.c b/arch/arm/oprofile/common.c
index 4e0a371630b3..99c63d4b6af8 100644
--- a/arch/arm/oprofile/common.c
+++ b/arch/arm/oprofile/common.c
@@ -23,26 +23,37 @@
23#include <asm/ptrace.h> 23#include <asm/ptrace.h>
24 24
25#ifdef CONFIG_HW_PERF_EVENTS 25#ifdef CONFIG_HW_PERF_EVENTS
26
27/*
28 * OProfile has a curious naming scheme for the ARM PMUs, but they are
29 * part of the user ABI so we need to map from the perf PMU name for
30 * supported PMUs.
31 */
32static struct op_perf_name {
33 char *perf_name;
34 char *op_name;
35} op_perf_name_map[] = {
36 { "xscale1", "arm/xscale1" },
37 { "xscale1", "arm/xscale2" },
38 { "v6", "arm/armv6" },
39 { "v6mpcore", "arm/mpcore" },
40 { "ARMv7 Cortex-A8", "arm/armv7" },
41 { "ARMv7 Cortex-A9", "arm/armv7-ca9" },
42};
43
26char *op_name_from_perf_id(void) 44char *op_name_from_perf_id(void)
27{ 45{
28 enum arm_perf_pmu_ids id = armpmu_get_pmu_id(); 46 int i;
29 47 struct op_perf_name names;
30 switch (id) { 48 const char *perf_name = perf_pmu_name();
31 case ARM_PERF_PMU_ID_XSCALE1: 49
32 return "arm/xscale1"; 50 for (i = 0; i < ARRAY_SIZE(op_perf_name_map); ++i) {
33 case ARM_PERF_PMU_ID_XSCALE2: 51 names = op_perf_name_map[i];
34 return "arm/xscale2"; 52 if (!strcmp(names.perf_name, perf_name))
35 case ARM_PERF_PMU_ID_V6: 53 return names.op_name;
36 return "arm/armv6";
37 case ARM_PERF_PMU_ID_V6MP:
38 return "arm/mpcore";
39 case ARM_PERF_PMU_ID_CA8:
40 return "arm/armv7";
41 case ARM_PERF_PMU_ID_CA9:
42 return "arm/armv7-ca9";
43 default:
44 return NULL;
45 } 54 }
55
56 return NULL;
46} 57}
47#endif 58#endif
48 59