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authorThomas Gleixner <tglx@linutronix.de>2011-03-23 17:08:47 -0400
committerRalf Baechle <ralf@linux-mips.org>2011-03-25 13:45:15 -0400
commit3fb8818bd2ed2030f00678da090adff36739bf20 (patch)
tree081fe2aa87edb5dabb5d8462d8656fb8bbcad8b3 /arch
parent41d735e8705c5a2cffe64bc56624a4bb0519c1da (diff)
MIPS: ath79: Convert to new irq_chip functions
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2175/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/ath79/irq.c23
1 files changed, 10 insertions, 13 deletions
diff --git a/arch/mips/ath79/irq.c b/arch/mips/ath79/irq.c
index 040762abdcd1..7c02bc948a31 100644
--- a/arch/mips/ath79/irq.c
+++ b/arch/mips/ath79/irq.c
@@ -62,13 +62,12 @@ static void ath79_misc_irq_handler(unsigned int irq, struct irq_desc *desc)
62 spurious_interrupt(); 62 spurious_interrupt();
63} 63}
64 64
65static void ar71xx_misc_irq_unmask(unsigned int irq) 65static void ar71xx_misc_irq_unmask(struct irq_data *d)
66{ 66{
67 unsigned int irq = d->irq - ATH79_MISC_IRQ_BASE;
67 void __iomem *base = ath79_reset_base; 68 void __iomem *base = ath79_reset_base;
68 u32 t; 69 u32 t;
69 70
70 irq -= ATH79_MISC_IRQ_BASE;
71
72 t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE); 71 t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
73 __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE); 72 __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE);
74 73
@@ -76,13 +75,12 @@ static void ar71xx_misc_irq_unmask(unsigned int irq)
76 __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE); 75 __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
77} 76}
78 77
79static void ar71xx_misc_irq_mask(unsigned int irq) 78static void ar71xx_misc_irq_mask(struct irq_data *d)
80{ 79{
80 unsigned int irq = d->irq - ATH79_MISC_IRQ_BASE;
81 void __iomem *base = ath79_reset_base; 81 void __iomem *base = ath79_reset_base;
82 u32 t; 82 u32 t;
83 83
84 irq -= ATH79_MISC_IRQ_BASE;
85
86 t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE); 84 t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
87 __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE); 85 __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE);
88 86
@@ -90,13 +88,12 @@ static void ar71xx_misc_irq_mask(unsigned int irq)
90 __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE); 88 __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
91} 89}
92 90
93static void ar724x_misc_irq_ack(unsigned int irq) 91static void ar724x_misc_irq_ack(struct irq_data *d)
94{ 92{
93 unsigned int irq = d->irq - ATH79_MISC_IRQ_BASE;
95 void __iomem *base = ath79_reset_base; 94 void __iomem *base = ath79_reset_base;
96 u32 t; 95 u32 t;
97 96
98 irq -= ATH79_MISC_IRQ_BASE;
99
100 t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_STATUS); 97 t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_STATUS);
101 __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_MISC_INT_STATUS); 98 __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_MISC_INT_STATUS);
102 99
@@ -106,8 +103,8 @@ static void ar724x_misc_irq_ack(unsigned int irq)
106 103
107static struct irq_chip ath79_misc_irq_chip = { 104static struct irq_chip ath79_misc_irq_chip = {
108 .name = "MISC", 105 .name = "MISC",
109 .unmask = ar71xx_misc_irq_unmask, 106 .irq_unmask = ar71xx_misc_irq_unmask,
110 .mask = ar71xx_misc_irq_mask, 107 .irq_mask = ar71xx_misc_irq_mask,
111}; 108};
112 109
113static void __init ath79_misc_irq_init(void) 110static void __init ath79_misc_irq_init(void)
@@ -119,9 +116,9 @@ static void __init ath79_misc_irq_init(void)
119 __raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_STATUS); 116 __raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_STATUS);
120 117
121 if (soc_is_ar71xx() || soc_is_ar913x()) 118 if (soc_is_ar71xx() || soc_is_ar913x())
122 ath79_misc_irq_chip.mask_ack = ar71xx_misc_irq_mask; 119 ath79_misc_irq_chip.irq_mask_ack = ar71xx_misc_irq_mask;
123 else if (soc_is_ar724x()) 120 else if (soc_is_ar724x())
124 ath79_misc_irq_chip.ack = ar724x_misc_irq_ack; 121 ath79_misc_irq_chip.irq_ack = ar724x_misc_irq_ack;
125 else 122 else
126 BUG(); 123 BUG();
127 124