diff options
author | Peter Zijlstra <a.p.zijlstra@chello.nl> | 2010-05-04 10:30:21 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2010-05-07 05:31:01 -0400 |
commit | 1e9a6d8d44cb6dcd2799b36ceb23007e6a423bfe (patch) | |
tree | cc6f1becf1b2807827aea206918648bc2d7b567a /arch | |
parent | a1f2b70a942b8d858a0ab02567da3999b60a99b2 (diff) |
perf, x86: Remove PEBS SAMPLE_RAW support
Its broken, we really should get PERF_SAMPLE_REGS sorted.
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/x86/kernel/cpu/perf_event_intel_ds.c | 14 |
1 files changed, 0 insertions, 14 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c index ec8b2e12e104..080b9b065bdd 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_ds.c +++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c | |||
@@ -459,7 +459,6 @@ static void intel_pmu_drain_pebs_core(struct pt_regs *iregs) | |||
459 | struct perf_event *event = cpuc->events[0]; /* PMC0 only */ | 459 | struct perf_event *event = cpuc->events[0]; /* PMC0 only */ |
460 | struct pebs_record_core *at, *top; | 460 | struct pebs_record_core *at, *top; |
461 | struct perf_sample_data data; | 461 | struct perf_sample_data data; |
462 | struct perf_raw_record raw; | ||
463 | struct pt_regs regs; | 462 | struct pt_regs regs; |
464 | int n; | 463 | int n; |
465 | 464 | ||
@@ -499,12 +498,6 @@ static void intel_pmu_drain_pebs_core(struct pt_regs *iregs) | |||
499 | perf_sample_data_init(&data, 0); | 498 | perf_sample_data_init(&data, 0); |
500 | data.period = event->hw.last_period; | 499 | data.period = event->hw.last_period; |
501 | 500 | ||
502 | if (event->attr.sample_type & PERF_SAMPLE_RAW) { | ||
503 | raw.size = x86_pmu.pebs_record_size; | ||
504 | raw.data = at; | ||
505 | data.raw = &raw; | ||
506 | } | ||
507 | |||
508 | /* | 501 | /* |
509 | * We use the interrupt regs as a base because the PEBS record | 502 | * We use the interrupt regs as a base because the PEBS record |
510 | * does not contain a full regs set, specifically it seems to | 503 | * does not contain a full regs set, specifically it seems to |
@@ -536,7 +529,6 @@ static void intel_pmu_drain_pebs_nhm(struct pt_regs *iregs) | |||
536 | struct pebs_record_nhm *at, *top; | 529 | struct pebs_record_nhm *at, *top; |
537 | struct perf_sample_data data; | 530 | struct perf_sample_data data; |
538 | struct perf_event *event = NULL; | 531 | struct perf_event *event = NULL; |
539 | struct perf_raw_record raw; | ||
540 | struct pt_regs regs; | 532 | struct pt_regs regs; |
541 | u64 status = 0; | 533 | u64 status = 0; |
542 | int bit, n; | 534 | int bit, n; |
@@ -585,12 +577,6 @@ static void intel_pmu_drain_pebs_nhm(struct pt_regs *iregs) | |||
585 | perf_sample_data_init(&data, 0); | 577 | perf_sample_data_init(&data, 0); |
586 | data.period = event->hw.last_period; | 578 | data.period = event->hw.last_period; |
587 | 579 | ||
588 | if (event->attr.sample_type & PERF_SAMPLE_RAW) { | ||
589 | raw.size = x86_pmu.pebs_record_size; | ||
590 | raw.data = at; | ||
591 | data.raw = &raw; | ||
592 | } | ||
593 | |||
594 | /* | 580 | /* |
595 | * See the comment in intel_pmu_drain_pebs_core() | 581 | * See the comment in intel_pmu_drain_pebs_core() |
596 | */ | 582 | */ |