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authorAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>2013-06-20 05:00:27 -0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2013-06-21 02:01:58 -0400
commit1a5272866f87d7fbf04dc8060f8da3e8456490ab (patch)
treecaaff51d526d91200d9463d6d5e6f22c37ee11ce /arch
parent437d496457a30ce9ccccb94b2373c201b2558392 (diff)
powerpc: Optimize hugepage invalidate
Hugepage invalidate involves invalidating multiple hpte entries. Optimize the operation using H_BULK_REMOVE on lpar platforms. On native, reduce the number of tlb flush. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/include/asm/machdep.h3
-rw-r--r--arch/powerpc/mm/hash_native_64.c73
-rw-r--r--arch/powerpc/mm/pgtable_64.c12
-rw-r--r--arch/powerpc/platforms/pseries/lpar.c122
4 files changed, 201 insertions, 9 deletions
diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h
index 801e3c61395f..8b480901165a 100644
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -57,6 +57,9 @@ struct machdep_calls {
57 void (*hpte_removebolted)(unsigned long ea, 57 void (*hpte_removebolted)(unsigned long ea,
58 int psize, int ssize); 58 int psize, int ssize);
59 void (*flush_hash_range)(unsigned long number, int local); 59 void (*flush_hash_range)(unsigned long number, int local);
60 void (*hugepage_invalidate)(struct mm_struct *mm,
61 unsigned char *hpte_slot_array,
62 unsigned long addr, int psize);
60 63
61 /* special for kexec, to be called in real mode, linear mapping is 64 /* special for kexec, to be called in real mode, linear mapping is
62 * destroyed as well */ 65 * destroyed as well */
diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c
index 6d152bc993e5..3f0c30ae4791 100644
--- a/arch/powerpc/mm/hash_native_64.c
+++ b/arch/powerpc/mm/hash_native_64.c
@@ -407,6 +407,78 @@ static void native_hpte_invalidate(unsigned long slot, unsigned long vpn,
407 local_irq_restore(flags); 407 local_irq_restore(flags);
408} 408}
409 409
410static void native_hugepage_invalidate(struct mm_struct *mm,
411 unsigned char *hpte_slot_array,
412 unsigned long addr, int psize)
413{
414 int ssize = 0, i;
415 int lock_tlbie;
416 struct hash_pte *hptep;
417 int actual_psize = MMU_PAGE_16M;
418 unsigned int max_hpte_count, valid;
419 unsigned long flags, s_addr = addr;
420 unsigned long hpte_v, want_v, shift;
421 unsigned long hidx, vpn = 0, vsid, hash, slot;
422
423 shift = mmu_psize_defs[psize].shift;
424 max_hpte_count = 1U << (PMD_SHIFT - shift);
425
426 local_irq_save(flags);
427 for (i = 0; i < max_hpte_count; i++) {
428 valid = hpte_valid(hpte_slot_array, i);
429 if (!valid)
430 continue;
431 hidx = hpte_hash_index(hpte_slot_array, i);
432
433 /* get the vpn */
434 addr = s_addr + (i * (1ul << shift));
435 if (!is_kernel_addr(addr)) {
436 ssize = user_segment_size(addr);
437 vsid = get_vsid(mm->context.id, addr, ssize);
438 WARN_ON(vsid == 0);
439 } else {
440 vsid = get_kernel_vsid(addr, mmu_kernel_ssize);
441 ssize = mmu_kernel_ssize;
442 }
443
444 vpn = hpt_vpn(addr, vsid, ssize);
445 hash = hpt_hash(vpn, shift, ssize);
446 if (hidx & _PTEIDX_SECONDARY)
447 hash = ~hash;
448
449 slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
450 slot += hidx & _PTEIDX_GROUP_IX;
451
452 hptep = htab_address + slot;
453 want_v = hpte_encode_avpn(vpn, psize, ssize);
454 native_lock_hpte(hptep);
455 hpte_v = hptep->v;
456
457 /* Even if we miss, we need to invalidate the TLB */
458 if (!HPTE_V_COMPARE(hpte_v, want_v) || !(hpte_v & HPTE_V_VALID))
459 native_unlock_hpte(hptep);
460 else
461 /* Invalidate the hpte. NOTE: this also unlocks it */
462 hptep->v = 0;
463 }
464 /*
465 * Since this is a hugepage, we just need a single tlbie.
466 * use the last vpn.
467 */
468 lock_tlbie = !mmu_has_feature(MMU_FTR_LOCKLESS_TLBIE);
469 if (lock_tlbie)
470 raw_spin_lock(&native_tlbie_lock);
471
472 asm volatile("ptesync":::"memory");
473 __tlbie(vpn, psize, actual_psize, ssize);
474 asm volatile("eieio; tlbsync; ptesync":::"memory");
475
476 if (lock_tlbie)
477 raw_spin_unlock(&native_tlbie_lock);
478
479 local_irq_restore(flags);
480}
481
410static inline int __hpte_actual_psize(unsigned int lp, int psize) 482static inline int __hpte_actual_psize(unsigned int lp, int psize)
411{ 483{
412 int i, shift; 484 int i, shift;
@@ -640,4 +712,5 @@ void __init hpte_init_native(void)
640 ppc_md.hpte_remove = native_hpte_remove; 712 ppc_md.hpte_remove = native_hpte_remove;
641 ppc_md.hpte_clear_all = native_hpte_clear; 713 ppc_md.hpte_clear_all = native_hpte_clear;
642 ppc_md.flush_hash_range = native_flush_hash_range; 714 ppc_md.flush_hash_range = native_flush_hash_range;
715 ppc_md.hugepage_invalidate = native_hugepage_invalidate;
643} 716}
diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c
index 074a4a225054..536eec72c0f7 100644
--- a/arch/powerpc/mm/pgtable_64.c
+++ b/arch/powerpc/mm/pgtable_64.c
@@ -708,6 +708,7 @@ void hpte_do_hugepage_flush(struct mm_struct *mm, unsigned long addr,
708{ 708{
709 int ssize, i; 709 int ssize, i;
710 unsigned long s_addr; 710 unsigned long s_addr;
711 int max_hpte_count;
711 unsigned int psize, valid; 712 unsigned int psize, valid;
712 unsigned char *hpte_slot_array; 713 unsigned char *hpte_slot_array;
713 unsigned long hidx, vpn, vsid, hash, shift, slot; 714 unsigned long hidx, vpn, vsid, hash, shift, slot;
@@ -727,9 +728,16 @@ void hpte_do_hugepage_flush(struct mm_struct *mm, unsigned long addr,
727 728
728 /* get the base page size */ 729 /* get the base page size */
729 psize = get_slice_psize(mm, s_addr); 730 psize = get_slice_psize(mm, s_addr);
730 shift = mmu_psize_defs[psize].shift;
731 731
732 for (i = 0; i < (HPAGE_PMD_SIZE >> shift); i++) { 732 if (ppc_md.hugepage_invalidate)
733 return ppc_md.hugepage_invalidate(mm, hpte_slot_array,
734 s_addr, psize);
735 /*
736 * No bluk hpte removal support, invalidate each entry
737 */
738 shift = mmu_psize_defs[psize].shift;
739 max_hpte_count = HPAGE_PMD_SIZE >> shift;
740 for (i = 0; i < max_hpte_count; i++) {
733 /* 741 /*
734 * 8 bits per each hpte entries 742 * 8 bits per each hpte entries
735 * 000| [ secondary group (one bit) | hidx (3 bits) | valid bit] 743 * 000| [ secondary group (one bit) | hidx (3 bits) | valid bit]
diff --git a/arch/powerpc/platforms/pseries/lpar.c b/arch/powerpc/platforms/pseries/lpar.c
index ca45c8f3c0ba..fd0f2f2a9b90 100644
--- a/arch/powerpc/platforms/pseries/lpar.c
+++ b/arch/powerpc/platforms/pseries/lpar.c
@@ -45,6 +45,13 @@
45#include "plpar_wrappers.h" 45#include "plpar_wrappers.h"
46#include "pseries.h" 46#include "pseries.h"
47 47
48/* Flag bits for H_BULK_REMOVE */
49#define HBR_REQUEST 0x4000000000000000UL
50#define HBR_RESPONSE 0x8000000000000000UL
51#define HBR_END 0xc000000000000000UL
52#define HBR_AVPN 0x0200000000000000UL
53#define HBR_ANDCOND 0x0100000000000000UL
54
48 55
49/* in hvCall.S */ 56/* in hvCall.S */
50EXPORT_SYMBOL(plpar_hcall); 57EXPORT_SYMBOL(plpar_hcall);
@@ -347,6 +354,113 @@ static void pSeries_lpar_hpte_invalidate(unsigned long slot, unsigned long vpn,
347 BUG_ON(lpar_rc != H_SUCCESS); 354 BUG_ON(lpar_rc != H_SUCCESS);
348} 355}
349 356
357/*
358 * Limit iterations holding pSeries_lpar_tlbie_lock to 3. We also need
359 * to make sure that we avoid bouncing the hypervisor tlbie lock.
360 */
361#define PPC64_HUGE_HPTE_BATCH 12
362
363static void __pSeries_lpar_hugepage_invalidate(unsigned long *slot,
364 unsigned long *vpn, int count,
365 int psize, int ssize)
366{
367 unsigned long param[8];
368 int i = 0, pix = 0, rc;
369 unsigned long flags = 0;
370 int lock_tlbie = !mmu_has_feature(MMU_FTR_LOCKLESS_TLBIE);
371
372 if (lock_tlbie)
373 spin_lock_irqsave(&pSeries_lpar_tlbie_lock, flags);
374
375 for (i = 0; i < count; i++) {
376
377 if (!firmware_has_feature(FW_FEATURE_BULK_REMOVE)) {
378 pSeries_lpar_hpte_invalidate(slot[i], vpn[i], psize, 0,
379 ssize, 0);
380 } else {
381 param[pix] = HBR_REQUEST | HBR_AVPN | slot[i];
382 param[pix+1] = hpte_encode_avpn(vpn[i], psize, ssize);
383 pix += 2;
384 if (pix == 8) {
385 rc = plpar_hcall9(H_BULK_REMOVE, param,
386 param[0], param[1], param[2],
387 param[3], param[4], param[5],
388 param[6], param[7]);
389 BUG_ON(rc != H_SUCCESS);
390 pix = 0;
391 }
392 }
393 }
394 if (pix) {
395 param[pix] = HBR_END;
396 rc = plpar_hcall9(H_BULK_REMOVE, param, param[0], param[1],
397 param[2], param[3], param[4], param[5],
398 param[6], param[7]);
399 BUG_ON(rc != H_SUCCESS);
400 }
401
402 if (lock_tlbie)
403 spin_unlock_irqrestore(&pSeries_lpar_tlbie_lock, flags);
404}
405
406static void pSeries_lpar_hugepage_invalidate(struct mm_struct *mm,
407 unsigned char *hpte_slot_array,
408 unsigned long addr, int psize)
409{
410 int ssize = 0, i, index = 0;
411 unsigned long s_addr = addr;
412 unsigned int max_hpte_count, valid;
413 unsigned long vpn_array[PPC64_HUGE_HPTE_BATCH];
414 unsigned long slot_array[PPC64_HUGE_HPTE_BATCH];
415 unsigned long shift, hidx, vpn = 0, vsid, hash, slot;
416
417 shift = mmu_psize_defs[psize].shift;
418 max_hpte_count = 1U << (PMD_SHIFT - shift);
419
420 for (i = 0; i < max_hpte_count; i++) {
421 valid = hpte_valid(hpte_slot_array, i);
422 if (!valid)
423 continue;
424 hidx = hpte_hash_index(hpte_slot_array, i);
425
426 /* get the vpn */
427 addr = s_addr + (i * (1ul << shift));
428 if (!is_kernel_addr(addr)) {
429 ssize = user_segment_size(addr);
430 vsid = get_vsid(mm->context.id, addr, ssize);
431 WARN_ON(vsid == 0);
432 } else {
433 vsid = get_kernel_vsid(addr, mmu_kernel_ssize);
434 ssize = mmu_kernel_ssize;
435 }
436
437 vpn = hpt_vpn(addr, vsid, ssize);
438 hash = hpt_hash(vpn, shift, ssize);
439 if (hidx & _PTEIDX_SECONDARY)
440 hash = ~hash;
441
442 slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
443 slot += hidx & _PTEIDX_GROUP_IX;
444
445 slot_array[index] = slot;
446 vpn_array[index] = vpn;
447 if (index == PPC64_HUGE_HPTE_BATCH - 1) {
448 /*
449 * Now do a bluk invalidate
450 */
451 __pSeries_lpar_hugepage_invalidate(slot_array,
452 vpn_array,
453 PPC64_HUGE_HPTE_BATCH,
454 psize, ssize);
455 index = 0;
456 } else
457 index++;
458 }
459 if (index)
460 __pSeries_lpar_hugepage_invalidate(slot_array, vpn_array,
461 index, psize, ssize);
462}
463
350static void pSeries_lpar_hpte_removebolted(unsigned long ea, 464static void pSeries_lpar_hpte_removebolted(unsigned long ea,
351 int psize, int ssize) 465 int psize, int ssize)
352{ 466{
@@ -364,13 +478,6 @@ static void pSeries_lpar_hpte_removebolted(unsigned long ea,
364 pSeries_lpar_hpte_invalidate(slot, vpn, psize, 0, ssize, 0); 478 pSeries_lpar_hpte_invalidate(slot, vpn, psize, 0, ssize, 0);
365} 479}
366 480
367/* Flag bits for H_BULK_REMOVE */
368#define HBR_REQUEST 0x4000000000000000UL
369#define HBR_RESPONSE 0x8000000000000000UL
370#define HBR_END 0xc000000000000000UL
371#define HBR_AVPN 0x0200000000000000UL
372#define HBR_ANDCOND 0x0100000000000000UL
373
374/* 481/*
375 * Take a spinlock around flushes to avoid bouncing the hypervisor tlbie 482 * Take a spinlock around flushes to avoid bouncing the hypervisor tlbie
376 * lock. 483 * lock.
@@ -459,6 +566,7 @@ void __init hpte_init_lpar(void)
459 ppc_md.hpte_removebolted = pSeries_lpar_hpte_removebolted; 566 ppc_md.hpte_removebolted = pSeries_lpar_hpte_removebolted;
460 ppc_md.flush_hash_range = pSeries_lpar_flush_hash_range; 567 ppc_md.flush_hash_range = pSeries_lpar_flush_hash_range;
461 ppc_md.hpte_clear_all = pSeries_lpar_hptab_clear; 568 ppc_md.hpte_clear_all = pSeries_lpar_hptab_clear;
569 ppc_md.hugepage_invalidate = pSeries_lpar_hugepage_invalidate;
462} 570}
463 571
464#ifdef CONFIG_PPC_SMLPAR 572#ifdef CONFIG_PPC_SMLPAR