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authorTejun Heo <tj@kernel.org>2010-12-09 05:47:21 -0500
committerThomas Gleixner <tglx@linutronix.de>2010-12-10 07:46:26 -0500
commit0aa002fe602939370e9476e5ec32b562000a0425 (patch)
tree9328b22674ec6eab144e464274f9f635fef37666 /arch
parent0e3fa13f4ee110de007bca3bf395b77997319fc8 (diff)
x86: apic: Cleanup and simplify setup_local_APIC()
setup_local_APIC() is used to setup local APIC early during CPU initialization and already assumes that preemption is disabled on entry. However, The function unnecessarily disables and enables preemption and uses smp_processor_id() multiple times in and out of the nested preemption disabled section. This gives the wrong impression that the function might be able to handle being called with preemption enabled and/or migrated to another processor in the middle. Make it clear that the function is always called with preemption disabled, drop the confusing preemption disable block and call smp_processor_id() once at the beginning of the function. Signed-off-by: Tejun Heo <tj@kernel.org> Acked-by: Cyrill Gorcunov <gorcunov@gmail.com> Reviewed-by: Pekka Enberg <penberg@kernel.org> Cc: Yinghai Lu <yinghai@kernel.org> Cc: brgerst@gmail.com LKML-Reference: <4D00B3B9.7060702@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/kernel/apic/apic.c21
1 files changed, 9 insertions, 12 deletions
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 89339360b3d8..c0f6426cd337 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -1195,12 +1195,15 @@ static void __cpuinit lapic_setup_esr(void)
1195 oldvalue, value); 1195 oldvalue, value);
1196} 1196}
1197 1197
1198
1199/** 1198/**
1200 * setup_local_APIC - setup the local APIC 1199 * setup_local_APIC - setup the local APIC
1200 *
1201 * Used to setup local APIC while initializing BSP or bringin up APs.
1202 * Always called with preemption disabled.
1201 */ 1203 */
1202void __cpuinit setup_local_APIC(void) 1204void __cpuinit setup_local_APIC(void)
1203{ 1205{
1206 int cpu = smp_processor_id();
1204 unsigned int value, queued; 1207 unsigned int value, queued;
1205 int i, j, acked = 0; 1208 int i, j, acked = 0;
1206 unsigned long long tsc = 0, ntsc; 1209 unsigned long long tsc = 0, ntsc;
@@ -1225,8 +1228,6 @@ void __cpuinit setup_local_APIC(void)
1225#endif 1228#endif
1226 perf_events_lapic_init(); 1229 perf_events_lapic_init();
1227 1230
1228 preempt_disable();
1229
1230 /* 1231 /*
1231 * Double-check whether this APIC is really registered. 1232 * Double-check whether this APIC is really registered.
1232 * This is meaningless in clustered apic mode, so we skip it. 1233 * This is meaningless in clustered apic mode, so we skip it.
@@ -1342,21 +1343,19 @@ void __cpuinit setup_local_APIC(void)
1342 * TODO: set up through-local-APIC from through-I/O-APIC? --macro 1343 * TODO: set up through-local-APIC from through-I/O-APIC? --macro
1343 */ 1344 */
1344 value = apic_read(APIC_LVT0) & APIC_LVT_MASKED; 1345 value = apic_read(APIC_LVT0) & APIC_LVT_MASKED;
1345 if (!smp_processor_id() && (pic_mode || !value)) { 1346 if (!cpu && (pic_mode || !value)) {
1346 value = APIC_DM_EXTINT; 1347 value = APIC_DM_EXTINT;
1347 apic_printk(APIC_VERBOSE, "enabled ExtINT on CPU#%d\n", 1348 apic_printk(APIC_VERBOSE, "enabled ExtINT on CPU#%d\n", cpu);
1348 smp_processor_id());
1349 } else { 1349 } else {
1350 value = APIC_DM_EXTINT | APIC_LVT_MASKED; 1350 value = APIC_DM_EXTINT | APIC_LVT_MASKED;
1351 apic_printk(APIC_VERBOSE, "masked ExtINT on CPU#%d\n", 1351 apic_printk(APIC_VERBOSE, "masked ExtINT on CPU#%d\n", cpu);
1352 smp_processor_id());
1353 } 1352 }
1354 apic_write(APIC_LVT0, value); 1353 apic_write(APIC_LVT0, value);
1355 1354
1356 /* 1355 /*
1357 * only the BP should see the LINT1 NMI signal, obviously. 1356 * only the BP should see the LINT1 NMI signal, obviously.
1358 */ 1357 */
1359 if (!smp_processor_id()) 1358 if (!cpu)
1360 value = APIC_DM_NMI; 1359 value = APIC_DM_NMI;
1361 else 1360 else
1362 value = APIC_DM_NMI | APIC_LVT_MASKED; 1361 value = APIC_DM_NMI | APIC_LVT_MASKED;
@@ -1364,11 +1363,9 @@ void __cpuinit setup_local_APIC(void)
1364 value |= APIC_LVT_LEVEL_TRIGGER; 1363 value |= APIC_LVT_LEVEL_TRIGGER;
1365 apic_write(APIC_LVT1, value); 1364 apic_write(APIC_LVT1, value);
1366 1365
1367 preempt_enable();
1368
1369#ifdef CONFIG_X86_MCE_INTEL 1366#ifdef CONFIG_X86_MCE_INTEL
1370 /* Recheck CMCI information after local APIC is up on CPU #0 */ 1367 /* Recheck CMCI information after local APIC is up on CPU #0 */
1371 if (smp_processor_id() == 0) 1368 if (!cpu)
1372 cmci_recheck(); 1369 cmci_recheck();
1373#endif 1370#endif
1374} 1371}