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authorRobert Richter <robert.richter@amd.com>2009-07-07 13:25:39 -0400
committerRobert Richter <robert.richter@amd.com>2009-07-14 10:44:51 -0400
commit6e63ea4b0b14ff5fb8a3ca704fcda7d28b95f079 (patch)
tree7cab2df807793495239c4264ee742628b904e01d /arch
parent44ab9a6b0e909145d42615493952fe986b1ce5c2 (diff)
x86/oprofile: Whitespaces changes only
This patch fixes whitespace changes of code that will be touched in follow-on patches. Signed-off-by: Robert Richter <robert.richter@amd.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/oprofile/nmi_int.c12
-rw-r--r--arch/x86/oprofile/op_model_amd.c12
-rw-r--r--arch/x86/oprofile/op_model_p4.c8
-rw-r--r--arch/x86/oprofile/op_model_ppro.c8
4 files changed, 20 insertions, 20 deletions
diff --git a/arch/x86/oprofile/nmi_int.c b/arch/x86/oprofile/nmi_int.c
index 25da1e17815d..fca8dc94531e 100644
--- a/arch/x86/oprofile/nmi_int.c
+++ b/arch/x86/oprofile/nmi_int.c
@@ -516,12 +516,12 @@ int __init op_nmi_init(struct oprofile_operations *ops)
516 register_cpu_notifier(&oprofile_cpu_nb); 516 register_cpu_notifier(&oprofile_cpu_nb);
517#endif 517#endif
518 /* default values, can be overwritten by model */ 518 /* default values, can be overwritten by model */
519 ops->create_files = nmi_create_files; 519 ops->create_files = nmi_create_files;
520 ops->setup = nmi_setup; 520 ops->setup = nmi_setup;
521 ops->shutdown = nmi_shutdown; 521 ops->shutdown = nmi_shutdown;
522 ops->start = nmi_start; 522 ops->start = nmi_start;
523 ops->stop = nmi_stop; 523 ops->stop = nmi_stop;
524 ops->cpu_type = cpu_type; 524 ops->cpu_type = cpu_type;
525 525
526 if (model->init) 526 if (model->init)
527 ret = model->init(ops); 527 ret = model->init(ops);
diff --git a/arch/x86/oprofile/op_model_amd.c b/arch/x86/oprofile/op_model_amd.c
index 7ca8306aefae..f676f8825a3f 100644
--- a/arch/x86/oprofile/op_model_amd.c
+++ b/arch/x86/oprofile/op_model_amd.c
@@ -91,7 +91,7 @@ static void op_amd_setup_ctrs(struct op_x86_model_spec const *model,
91 int i; 91 int i;
92 92
93 /* clear all counters */ 93 /* clear all counters */
94 for (i = 0 ; i < NUM_CONTROLS; ++i) { 94 for (i = 0; i < NUM_CONTROLS; ++i) {
95 if (unlikely(!msrs->controls[i].addr)) 95 if (unlikely(!msrs->controls[i].addr))
96 continue; 96 continue;
97 rdmsrl(msrs->controls[i].addr, val); 97 rdmsrl(msrs->controls[i].addr, val);
@@ -229,7 +229,7 @@ static int op_amd_check_ctrs(struct pt_regs * const regs,
229 u64 val; 229 u64 val;
230 int i; 230 int i;
231 231
232 for (i = 0 ; i < NUM_COUNTERS; ++i) { 232 for (i = 0; i < NUM_COUNTERS; ++i) {
233 if (!reset_value[i]) 233 if (!reset_value[i])
234 continue; 234 continue;
235 rdmsrl(msrs->counters[i].addr, val); 235 rdmsrl(msrs->counters[i].addr, val);
@@ -250,7 +250,7 @@ static void op_amd_start(struct op_msrs const * const msrs)
250{ 250{
251 u64 val; 251 u64 val;
252 int i; 252 int i;
253 for (i = 0 ; i < NUM_COUNTERS ; ++i) { 253 for (i = 0; i < NUM_COUNTERS; ++i) {
254 if (reset_value[i]) { 254 if (reset_value[i]) {
255 rdmsrl(msrs->controls[i].addr, val); 255 rdmsrl(msrs->controls[i].addr, val);
256 val |= ARCH_PERFMON_EVENTSEL0_ENABLE; 256 val |= ARCH_PERFMON_EVENTSEL0_ENABLE;
@@ -270,7 +270,7 @@ static void op_amd_stop(struct op_msrs const * const msrs)
270 * Subtle: stop on all counters to avoid race with setting our 270 * Subtle: stop on all counters to avoid race with setting our
271 * pm callback 271 * pm callback
272 */ 272 */
273 for (i = 0 ; i < NUM_COUNTERS ; ++i) { 273 for (i = 0; i < NUM_COUNTERS; ++i) {
274 if (!reset_value[i]) 274 if (!reset_value[i])
275 continue; 275 continue;
276 rdmsrl(msrs->controls[i].addr, val); 276 rdmsrl(msrs->controls[i].addr, val);
@@ -285,11 +285,11 @@ static void op_amd_shutdown(struct op_msrs const * const msrs)
285{ 285{
286 int i; 286 int i;
287 287
288 for (i = 0 ; i < NUM_COUNTERS ; ++i) { 288 for (i = 0; i < NUM_COUNTERS; ++i) {
289 if (msrs->counters[i].addr) 289 if (msrs->counters[i].addr)
290 release_perfctr_nmi(MSR_K7_PERFCTR0 + i); 290 release_perfctr_nmi(MSR_K7_PERFCTR0 + i);
291 } 291 }
292 for (i = 0 ; i < NUM_CONTROLS ; ++i) { 292 for (i = 0; i < NUM_CONTROLS; ++i) {
293 if (msrs->controls[i].addr) 293 if (msrs->controls[i].addr)
294 release_evntsel_nmi(MSR_K7_EVNTSEL0 + i); 294 release_evntsel_nmi(MSR_K7_EVNTSEL0 + i);
295 } 295 }
diff --git a/arch/x86/oprofile/op_model_p4.c b/arch/x86/oprofile/op_model_p4.c
index 9db9e361182c..5921b7fc724b 100644
--- a/arch/x86/oprofile/op_model_p4.c
+++ b/arch/x86/oprofile/op_model_p4.c
@@ -558,7 +558,7 @@ static void p4_setup_ctrs(struct op_x86_model_spec const *model,
558 } 558 }
559 559
560 /* clear the cccrs we will use */ 560 /* clear the cccrs we will use */
561 for (i = 0 ; i < num_counters ; i++) { 561 for (i = 0; i < num_counters; i++) {
562 if (unlikely(!msrs->controls[i].addr)) 562 if (unlikely(!msrs->controls[i].addr))
563 continue; 563 continue;
564 rdmsr(p4_counters[VIRT_CTR(stag, i)].cccr_address, low, high); 564 rdmsr(p4_counters[VIRT_CTR(stag, i)].cccr_address, low, high);
@@ -575,7 +575,7 @@ static void p4_setup_ctrs(struct op_x86_model_spec const *model,
575 } 575 }
576 576
577 /* setup all counters */ 577 /* setup all counters */
578 for (i = 0 ; i < num_counters ; ++i) { 578 for (i = 0; i < num_counters; ++i) {
579 if (counter_config[i].enabled && msrs->controls[i].addr) { 579 if (counter_config[i].enabled && msrs->controls[i].addr) {
580 reset_value[i] = counter_config[i].count; 580 reset_value[i] = counter_config[i].count;
581 pmc_setup_one_p4_counter(i); 581 pmc_setup_one_p4_counter(i);
@@ -678,7 +678,7 @@ static void p4_shutdown(struct op_msrs const * const msrs)
678{ 678{
679 int i; 679 int i;
680 680
681 for (i = 0 ; i < num_counters ; ++i) { 681 for (i = 0; i < num_counters; ++i) {
682 if (msrs->counters[i].addr) 682 if (msrs->counters[i].addr)
683 release_perfctr_nmi(msrs->counters[i].addr); 683 release_perfctr_nmi(msrs->counters[i].addr);
684 } 684 }
@@ -687,7 +687,7 @@ static void p4_shutdown(struct op_msrs const * const msrs)
687 * conjunction with the counter registers (hence the starting offset). 687 * conjunction with the counter registers (hence the starting offset).
688 * This saves a few bits. 688 * This saves a few bits.
689 */ 689 */
690 for (i = num_counters ; i < num_controls ; ++i) { 690 for (i = num_counters; i < num_controls; ++i) {
691 if (msrs->controls[i].addr) 691 if (msrs->controls[i].addr)
692 release_evntsel_nmi(msrs->controls[i].addr); 692 release_evntsel_nmi(msrs->controls[i].addr);
693 } 693 }
diff --git a/arch/x86/oprofile/op_model_ppro.c b/arch/x86/oprofile/op_model_ppro.c
index cd72d5c73b49..570d717c3308 100644
--- a/arch/x86/oprofile/op_model_ppro.c
+++ b/arch/x86/oprofile/op_model_ppro.c
@@ -81,7 +81,7 @@ static void ppro_setup_ctrs(struct op_x86_model_spec const *model,
81 } 81 }
82 82
83 /* clear all counters */ 83 /* clear all counters */
84 for (i = 0 ; i < num_counters; ++i) { 84 for (i = 0; i < num_counters; ++i) {
85 if (unlikely(!msrs->controls[i].addr)) 85 if (unlikely(!msrs->controls[i].addr))
86 continue; 86 continue;
87 rdmsrl(msrs->controls[i].addr, val); 87 rdmsrl(msrs->controls[i].addr, val);
@@ -125,7 +125,7 @@ static int ppro_check_ctrs(struct pt_regs * const regs,
125 if (unlikely(!reset_value)) 125 if (unlikely(!reset_value))
126 goto out; 126 goto out;
127 127
128 for (i = 0 ; i < num_counters; ++i) { 128 for (i = 0; i < num_counters; ++i) {
129 if (!reset_value[i]) 129 if (!reset_value[i])
130 continue; 130 continue;
131 rdmsrl(msrs->counters[i].addr, val); 131 rdmsrl(msrs->counters[i].addr, val);
@@ -188,11 +188,11 @@ static void ppro_shutdown(struct op_msrs const * const msrs)
188{ 188{
189 int i; 189 int i;
190 190
191 for (i = 0 ; i < num_counters ; ++i) { 191 for (i = 0; i < num_counters; ++i) {
192 if (msrs->counters[i].addr) 192 if (msrs->counters[i].addr)
193 release_perfctr_nmi(MSR_P6_PERFCTR0 + i); 193 release_perfctr_nmi(MSR_P6_PERFCTR0 + i);
194 } 194 }
195 for (i = 0 ; i < num_counters ; ++i) { 195 for (i = 0; i < num_counters; ++i) {
196 if (msrs->controls[i].addr) 196 if (msrs->controls[i].addr)
197 release_evntsel_nmi(MSR_P6_EVNTSEL0 + i); 197 release_evntsel_nmi(MSR_P6_EVNTSEL0 + i);
198 } 198 }