diff options
author | Ralf Baechle <ralf@linux-mips.org> | 2006-10-30 09:19:37 -0500 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2006-10-30 16:41:29 -0500 |
commit | 408d3258f99458f2dabcb1aa33918250e4864f00 (patch) | |
tree | d2e097dc0317b928e23a53fb39c7500c0369e0a6 /arch | |
parent | 6ceb6d3ab2d402cea326320a4143db90a66fd216 (diff) |
[MIPS] EMMA 2 / Markeins: Fix build wreckage due to genirq wreckage.
I wonder if the original contributor still cares ...
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/mips/emma2rh/common/irq_emma2rh.c | 2 | ||||
-rw-r--r-- | arch/mips/emma2rh/markeins/irq_markeins.c | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/arch/mips/emma2rh/common/irq_emma2rh.c b/arch/mips/emma2rh/common/irq_emma2rh.c index 7c930860c921..197ed4c2ba04 100644 --- a/arch/mips/emma2rh/common/irq_emma2rh.c +++ b/arch/mips/emma2rh/common/irq_emma2rh.c | |||
@@ -97,7 +97,7 @@ void emma2rh_irq_init(u32 irq_base) | |||
97 | irq_desc[i].status = IRQ_DISABLED; | 97 | irq_desc[i].status = IRQ_DISABLED; |
98 | irq_desc[i].action = NULL; | 98 | irq_desc[i].action = NULL; |
99 | irq_desc[i].depth = 1; | 99 | irq_desc[i].depth = 1; |
100 | irq_desc[i].handler = &emma2rh_irq_controller; | 100 | irq_desc[i].chip = &emma2rh_irq_controller; |
101 | } | 101 | } |
102 | 102 | ||
103 | emma2rh_irq_base = irq_base; | 103 | emma2rh_irq_base = irq_base; |
diff --git a/arch/mips/emma2rh/markeins/irq_markeins.c b/arch/mips/emma2rh/markeins/irq_markeins.c index f23ae9fcffa0..0b36eb001e62 100644 --- a/arch/mips/emma2rh/markeins/irq_markeins.c +++ b/arch/mips/emma2rh/markeins/irq_markeins.c | |||
@@ -86,7 +86,7 @@ void emma2rh_sw_irq_init(u32 irq_base) | |||
86 | irq_desc[i].status = IRQ_DISABLED; | 86 | irq_desc[i].status = IRQ_DISABLED; |
87 | irq_desc[i].action = NULL; | 87 | irq_desc[i].action = NULL; |
88 | irq_desc[i].depth = 2; | 88 | irq_desc[i].depth = 2; |
89 | irq_desc[i].handler = &emma2rh_sw_irq_controller; | 89 | irq_desc[i].chip = &emma2rh_sw_irq_controller; |
90 | } | 90 | } |
91 | 91 | ||
92 | emma2rh_sw_irq_base = irq_base; | 92 | emma2rh_sw_irq_base = irq_base; |
@@ -166,7 +166,7 @@ void emma2rh_gpio_irq_init(u32 irq_base) | |||
166 | irq_desc[i].status = IRQ_DISABLED; | 166 | irq_desc[i].status = IRQ_DISABLED; |
167 | irq_desc[i].action = NULL; | 167 | irq_desc[i].action = NULL; |
168 | irq_desc[i].depth = 2; | 168 | irq_desc[i].depth = 2; |
169 | irq_desc[i].handler = &emma2rh_gpio_irq_controller; | 169 | irq_desc[i].chip = &emma2rh_gpio_irq_controller; |
170 | } | 170 | } |
171 | 171 | ||
172 | emma2rh_gpio_irq_base = irq_base; | 172 | emma2rh_gpio_irq_base = irq_base; |