diff options
author | Yinghai Lu <yhlu.kernel@gmail.com> | 2008-08-19 23:50:02 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2008-10-16 10:52:08 -0400 |
commit | 301e619020dd67bde7e7e64bb9ffb7f30d26c979 (patch) | |
tree | 0abae161010dbee1c3aa4ea2c0411cfc0fbeee5c /arch | |
parent | d17a55ded3393ad3878010bb3a8243a15a8d8df5 (diff) |
x86: use dyn_array in io_apic_xx.c
Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/x86/kernel/io_apic_32.c | 54 | ||||
-rw-r--r-- | arch/x86/kernel/io_apic_64.c | 28 | ||||
-rw-r--r-- | arch/x86/kernel/setup.c | 6 |
3 files changed, 70 insertions, 18 deletions
diff --git a/arch/x86/kernel/io_apic_32.c b/arch/x86/kernel/io_apic_32.c index d382990244f0..7f2bcc3dad82 100644 --- a/arch/x86/kernel/io_apic_32.c +++ b/arch/x86/kernel/io_apic_32.c | |||
@@ -70,7 +70,7 @@ int timer_through_8259 __initdata; | |||
70 | */ | 70 | */ |
71 | int sis_apic_bug = -1; | 71 | int sis_apic_bug = -1; |
72 | 72 | ||
73 | int first_free_entry = NR_IRQS; | 73 | int first_free_entry; |
74 | /* | 74 | /* |
75 | * # of IRQ routing registers | 75 | * # of IRQ routing registers |
76 | */ | 76 | */ |
@@ -98,10 +98,7 @@ static int disable_timer_pin_1 __initdata; | |||
98 | * Rough estimation of how many shared IRQs there are, can | 98 | * Rough estimation of how many shared IRQs there are, can |
99 | * be changed anytime. | 99 | * be changed anytime. |
100 | */ | 100 | */ |
101 | #define MAX_PLUS_SHARED_IRQS NR_IRQS | 101 | int pin_map_size; |
102 | #define PIN_MAP_SIZE (MAX_PLUS_SHARED_IRQS + NR_IRQS) | ||
103 | |||
104 | int pin_map_size = PIN_MAP_SIZE; | ||
105 | 102 | ||
106 | /* | 103 | /* |
107 | * This is performance-critical, we want to do it O(1) | 104 | * This is performance-critical, we want to do it O(1) |
@@ -112,7 +109,9 @@ int pin_map_size = PIN_MAP_SIZE; | |||
112 | 109 | ||
113 | static struct irq_pin_list { | 110 | static struct irq_pin_list { |
114 | int apic, pin, next; | 111 | int apic, pin, next; |
115 | } irq_2_pin[PIN_MAP_SIZE]; | 112 | } *irq_2_pin; |
113 | |||
114 | DEFINE_DYN_ARRAY(irq_2_pin, sizeof(struct irq_pin_list), pin_map_size, 16, NULL); | ||
116 | 115 | ||
117 | struct io_apic { | 116 | struct io_apic { |
118 | unsigned int index; | 117 | unsigned int index; |
@@ -403,9 +402,28 @@ static struct irq_cpu_info { | |||
403 | 402 | ||
404 | #define CPU_TO_PACKAGEINDEX(i) (first_cpu(per_cpu(cpu_sibling_map, i))) | 403 | #define CPU_TO_PACKAGEINDEX(i) (first_cpu(per_cpu(cpu_sibling_map, i))) |
405 | 404 | ||
406 | static cpumask_t balance_irq_affinity[NR_IRQS] = { | 405 | static cpumask_t balance_irq_affinity_init __initdata = CPU_MASK_ALL; |
407 | [0 ... NR_IRQS-1] = CPU_MASK_ALL | 406 | |
408 | }; | 407 | static cpumask_t *balance_irq_affinity; |
408 | |||
409 | |||
410 | static void __init irq_affinity_init_work(void *data) | ||
411 | { | ||
412 | struct dyn_array *da = data; | ||
413 | |||
414 | int i; | ||
415 | struct balance_irq_affinity *affinity; | ||
416 | |||
417 | affinity = *da->name; | ||
418 | |||
419 | for (i = 0; i < *da->nr; i++) | ||
420 | memcpy(&affinity[i], &balance_irq_affinity_init, | ||
421 | sizeof(struct balance_irq_affinity)); | ||
422 | |||
423 | } | ||
424 | |||
425 | DEFINE_DYN_ARRAY(balance_irq_affinity, sizeof(struct balance_irq_affinity), nr_irqs, PAGE_SIZE, irq_affinity_init_work); | ||
426 | |||
409 | 427 | ||
410 | void set_balance_irq_affinity(unsigned int irq, cpumask_t mask) | 428 | void set_balance_irq_affinity(unsigned int irq, cpumask_t mask) |
411 | { | 429 | { |
@@ -1170,14 +1188,28 @@ static inline int IO_APIC_irq_trigger(int irq) | |||
1170 | } | 1188 | } |
1171 | 1189 | ||
1172 | /* irq_vectors is indexed by the sum of all RTEs in all I/O APICs. */ | 1190 | /* irq_vectors is indexed by the sum of all RTEs in all I/O APICs. */ |
1173 | static u8 irq_vector[NR_IRQ_VECTORS] __read_mostly = { FIRST_DEVICE_VECTOR , 0 }; | 1191 | static u8 irq_vector_init_first __initdata = FIRST_DEVICE_VECTOR; |
1192 | static u8 *irq_vector; | ||
1193 | |||
1194 | static void __init irq_vector_init_work(void *data) | ||
1195 | { | ||
1196 | struct dyn_array *da = data; | ||
1197 | |||
1198 | u8 *irq_vec; | ||
1199 | |||
1200 | irq_vec = *da->name; | ||
1201 | |||
1202 | irq_vec[0] = irq_vector_init_first; | ||
1203 | } | ||
1204 | |||
1205 | DEFINE_DYN_ARRAY(irq_vector, sizeof(u8), nr_irqs, PAGE_SIZE, irq_vector_init_work); | ||
1174 | 1206 | ||
1175 | static int __assign_irq_vector(int irq) | 1207 | static int __assign_irq_vector(int irq) |
1176 | { | 1208 | { |
1177 | static int current_vector = FIRST_DEVICE_VECTOR, current_offset; | 1209 | static int current_vector = FIRST_DEVICE_VECTOR, current_offset; |
1178 | int vector, offset; | 1210 | int vector, offset; |
1179 | 1211 | ||
1180 | BUG_ON((unsigned)irq >= NR_IRQ_VECTORS); | 1212 | BUG_ON((unsigned)irq >= nr_irqs); |
1181 | 1213 | ||
1182 | if (irq_vector[irq] > 0) | 1214 | if (irq_vector[irq] > 0) |
1183 | return irq_vector[irq]; | 1215 | return irq_vector[irq]; |
diff --git a/arch/x86/kernel/io_apic_64.c b/arch/x86/kernel/io_apic_64.c index 448384c7c1e8..93a3ffabfe6a 100644 --- a/arch/x86/kernel/io_apic_64.c +++ b/arch/x86/kernel/io_apic_64.c | |||
@@ -66,7 +66,7 @@ struct irq_cfg { | |||
66 | }; | 66 | }; |
67 | 67 | ||
68 | /* irq_cfg is indexed by the sum of all RTEs in all I/O APICs. */ | 68 | /* irq_cfg is indexed by the sum of all RTEs in all I/O APICs. */ |
69 | static struct irq_cfg irq_cfg[NR_IRQS] __read_mostly = { | 69 | static struct irq_cfg irq_cfg_legacy[] __initdata = { |
70 | [0] = { .domain = CPU_MASK_ALL, .vector = IRQ0_VECTOR, }, | 70 | [0] = { .domain = CPU_MASK_ALL, .vector = IRQ0_VECTOR, }, |
71 | [1] = { .domain = CPU_MASK_ALL, .vector = IRQ1_VECTOR, }, | 71 | [1] = { .domain = CPU_MASK_ALL, .vector = IRQ1_VECTOR, }, |
72 | [2] = { .domain = CPU_MASK_ALL, .vector = IRQ2_VECTOR, }, | 72 | [2] = { .domain = CPU_MASK_ALL, .vector = IRQ2_VECTOR, }, |
@@ -85,6 +85,17 @@ static struct irq_cfg irq_cfg[NR_IRQS] __read_mostly = { | |||
85 | [15] = { .domain = CPU_MASK_ALL, .vector = IRQ15_VECTOR, }, | 85 | [15] = { .domain = CPU_MASK_ALL, .vector = IRQ15_VECTOR, }, |
86 | }; | 86 | }; |
87 | 87 | ||
88 | static struct irq_cfg *irq_cfg; | ||
89 | |||
90 | static void __init init_work(void *data) | ||
91 | { | ||
92 | struct dyn_array *da = data; | ||
93 | |||
94 | memcpy(*da->name, irq_cfg_legacy, sizeof(irq_cfg_legacy)); | ||
95 | } | ||
96 | |||
97 | DEFINE_DYN_ARRAY(irq_cfg, sizeof(struct irq_cfg), nr_irqs, PAGE_SIZE, init_work); | ||
98 | |||
88 | static int assign_irq_vector(int irq, cpumask_t mask); | 99 | static int assign_irq_vector(int irq, cpumask_t mask); |
89 | 100 | ||
90 | int first_system_vector = 0xfe; | 101 | int first_system_vector = 0xfe; |
@@ -129,10 +140,9 @@ DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES); | |||
129 | * Rough estimation of how many shared IRQs there are, can | 140 | * Rough estimation of how many shared IRQs there are, can |
130 | * be changed anytime. | 141 | * be changed anytime. |
131 | */ | 142 | */ |
132 | #define MAX_PLUS_SHARED_IRQS NR_IRQS | ||
133 | #define PIN_MAP_SIZE (MAX_PLUS_SHARED_IRQS + NR_IRQS) | ||
134 | 143 | ||
135 | int pin_map_size = PIN_MAP_SIZE; | 144 | int pin_map_size; |
145 | |||
136 | /* | 146 | /* |
137 | * This is performance-critical, we want to do it O(1) | 147 | * This is performance-critical, we want to do it O(1) |
138 | * | 148 | * |
@@ -141,8 +151,12 @@ int pin_map_size = PIN_MAP_SIZE; | |||
141 | */ | 151 | */ |
142 | 152 | ||
143 | static struct irq_pin_list { | 153 | static struct irq_pin_list { |
144 | short apic, pin, next; | 154 | short apic, pin; |
145 | } irq_2_pin[PIN_MAP_SIZE]; | 155 | int next; |
156 | } *irq_2_pin; | ||
157 | |||
158 | DEFINE_DYN_ARRAY(irq_2_pin, sizeof(struct irq_pin_list), pin_map_size, sizeof(struct irq_pin_list), NULL); | ||
159 | |||
146 | 160 | ||
147 | struct io_apic { | 161 | struct io_apic { |
148 | unsigned int index; | 162 | unsigned int index; |
@@ -359,7 +373,7 @@ static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t mask) | |||
359 | * shared ISA-space IRQs, so we have to support them. We are super | 373 | * shared ISA-space IRQs, so we have to support them. We are super |
360 | * fast in the common case, and fast for shared ISA-space IRQs. | 374 | * fast in the common case, and fast for shared ISA-space IRQs. |
361 | */ | 375 | */ |
362 | int first_free_entry = NR_IRQS; | 376 | int first_free_entry; |
363 | static void add_pin_to_irq(unsigned int irq, int apic, int pin) | 377 | static void add_pin_to_irq(unsigned int irq, int apic, int pin) |
364 | { | 378 | { |
365 | struct irq_pin_list *entry = irq_2_pin + irq; | 379 | struct irq_pin_list *entry = irq_2_pin + irq; |
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c index 2255782e8d4b..558ec26b08e2 100644 --- a/arch/x86/kernel/setup.c +++ b/arch/x86/kernel/setup.c | |||
@@ -1067,9 +1067,15 @@ void __init setup_arch(char **cmdline_p) | |||
1067 | #endif | 1067 | #endif |
1068 | 1068 | ||
1069 | prefill_possible_map(); | 1069 | prefill_possible_map(); |
1070 | |||
1070 | #ifdef CONFIG_X86_64 | 1071 | #ifdef CONFIG_X86_64 |
1072 | /* need to wait for nr_cpu_ids settle down */ | ||
1073 | if (nr_irqs == NR_IRQS) | ||
1074 | nr_irqs = 32 * nr_cpu_ids + 224; | ||
1071 | init_cpu_to_node(); | 1075 | init_cpu_to_node(); |
1072 | #endif | 1076 | #endif |
1077 | pin_map_size = nr_irqs * 2; | ||
1078 | first_free_entry = nr_irqs; | ||
1073 | 1079 | ||
1074 | init_apic_mappings(); | 1080 | init_apic_mappings(); |
1075 | ioapic_init_mappings(); | 1081 | ioapic_init_mappings(); |