Merge branch 'linus' into x86/core

363 files changed, 19618 insertions, 4878 deletions

diff --git a/arch/alpha/include/asm/socket.h b/arch/alpha/include/asm/socket.h
index a1057c2d95e7..3641ec1452f4 100644
--- a/arch/alpha/include/asm/socket.h
+++ b/arch/alpha/include/asm/socket.h
@@ -62,6 +62,9 @@
 
 #define SO_MARK                 36
 
+#define SO_TIMESTAMPING         37
+#define SCM_TIMESTAMPING        SO_TIMESTAMPING
+
 /* O_NONBLOCK clashes with the bits used for socket types.  Therefore we
  * have to define SOCK_NONBLOCK to a different value here.
  */
diff --git a/arch/alpha/kernel/entry.S b/arch/alpha/kernel/entry.S
index e4a54b615894..b45d913a51c3 100644
--- a/arch/alpha/kernel/entry.S
+++ b/arch/alpha/kernel/entry.S
@@ -903,8 +903,9 @@ sys_alpha_pipe:
         stq     $26, 0($sp)
         .prologue 0
 
+        mov     $31, $17
         lda     $16, 8($sp)
-        jsr     $26, do_pipe
+        jsr     $26, do_pipe_flags
 
         ldq     $26, 0($sp)
         bne     $0, 1f
diff --git a/arch/alpha/kernel/irq.c b/arch/alpha/kernel/irq.c
index 7bc7489223f3..cc7834661427 100644
--- a/arch/alpha/kernel/irq.c
+++ b/arch/alpha/kernel/irq.c
@@ -90,7 +90,7 @@ show_interrupts(struct seq_file *p, void *v)
                 seq_printf(p, "%10u ", kstat_irqs(irq));
 #else
                 for_each_online_cpu(j)
-                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[irq]);
+                        seq_printf(p, "%10u ", kstat_irqs_cpu(irq, j));
 #endif
                 seq_printf(p, " %14s", irq_desc[irq].chip->typename);
                 seq_printf(p, "  %c%s",
diff --git a/arch/alpha/kernel/irq_alpha.c b/arch/alpha/kernel/irq_alpha.c
index e16aeb6e79ef..67c19f8a9944 100644
--- a/arch/alpha/kernel/irq_alpha.c
+++ b/arch/alpha/kernel/irq_alpha.c
@@ -64,7 +64,7 @@ do_entInt(unsigned long type, unsigned long vector,
                 smp_percpu_timer_interrupt(regs);
                 cpu = smp_processor_id();
                 if (cpu != boot_cpuid) {
-                        kstat_cpu(cpu).irqs[RTC_IRQ]++;
+                        kstat_incr_irqs_this_cpu(RTC_IRQ, irq_to_desc(RTC_IRQ));
                 } else {
                         handle_irq(RTC_IRQ);
                 }
diff --git a/arch/alpha/kernel/osf_sys.c b/arch/alpha/kernel/osf_sys.c
index ae41f097864b..42ee05981e71 100644
--- a/arch/alpha/kernel/osf_sys.c
+++ b/arch/alpha/kernel/osf_sys.c
@@ -46,8 +46,6 @@
 #include <asm/hwrpb.h>
 #include <asm/processor.h>
 
-extern int do_pipe(int *);
-
 /*
  * Brk needs to return an error.  Still support Linux's brk(0) query idiom,
  * which OSF programs just shouldn't be doing.  We're still not quite
diff --git a/arch/arm/include/asm/socket.h b/arch/arm/include/asm/socket.h
index 6817be9573a6..537de4e0ef50 100644
--- a/arch/arm/include/asm/socket.h
+++ b/arch/arm/include/asm/socket.h
@@ -54,4 +54,7 @@
 
 #define SO_MARK                 36
 
+#define SO_TIMESTAMPING         37
+#define SCM_TIMESTAMPING        SO_TIMESTAMPING
+
 #endif /* _ASM_SOCKET_H */
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 45eacb5a2ecd..6874c7dca75a 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -76,7 +76,7 @@ int show_interrupts(struct seq_file *p, void *v)
 
                 seq_printf(p, "%3d: ", i);
                 for_each_present_cpu(cpu)
-                        seq_printf(p, "%10u ", kstat_cpu(cpu).irqs[i]);
+                        seq_printf(p, "%10u ", kstat_irqs_cpu(i, cpu));
                 seq_printf(p, " %10s", irq_desc[i].chip->name ? : "-");
                 seq_printf(p, "  %s", action->name);
                 for (action = action->next; action; action = action->next)
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index b3404b7775b3..0d2074f51a59 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -231,14 +231,17 @@ static struct platform_device kirkwood_switch_device = {
 
 void __init kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq)
 {
+        int i;
+
         if (irq != NO_IRQ) {
                 kirkwood_switch_resources[0].start = irq;
                 kirkwood_switch_resources[0].end = irq;
                 kirkwood_switch_device.num_resources = 1;
         }
 
-        d->mii_bus = &kirkwood_ge00_shared.dev;
         d->netdev = &kirkwood_ge00.dev;
+        for (i = 0; i < d->nr_chips; i++)
+                d->chip[i].mii_bus = &kirkwood_ge00_shared.dev;
         kirkwood_switch_device.dev.platform_data = d;
 
         platform_device_register(&kirkwood_switch_device);
diff --git a/arch/arm/mach-kirkwood/rd88f6281-setup.c b/arch/arm/mach-kirkwood/rd88f6281-setup.c
index 9a0e905d10cd..e1c0516c4df3 100644
--- a/arch/arm/mach-kirkwood/rd88f6281-setup.c
+++ b/arch/arm/mach-kirkwood/rd88f6281-setup.c
@@ -75,7 +75,7 @@ static struct mv643xx_eth_platform_data rd88f6281_ge00_data = {
         .duplex         = DUPLEX_FULL,
 };
 
-static struct dsa_platform_data rd88f6281_switch_data = {
+static struct dsa_chip_data rd88f6281_switch_chip_data = {
         .port_names[0]  = "lan1",
         .port_names[1]  = "lan2",
         .port_names[2]  = "lan3",
@@ -83,6 +83,11 @@ static struct dsa_platform_data rd88f6281_switch_data = {
         .port_names[5]  = "cpu",
 };
 
+static struct dsa_platform_data rd88f6281_switch_plat_data = {
+        .nr_chips       = 1,
+        .chip           = &rd88f6281_switch_chip_data,
+};
+
 static struct mv643xx_eth_platform_data rd88f6281_ge01_data = {
         .phy_addr       = MV643XX_ETH_PHY_ADDR(11),
 };
@@ -105,12 +110,12 @@ static void __init rd88f6281_init(void)
         kirkwood_ge00_init(&rd88f6281_ge00_data);
         kirkwood_pcie_id(&dev, &rev);
         if (rev == MV88F6281_REV_A0) {
-                rd88f6281_switch_data.sw_addr = 10;
+                rd88f6281_switch_chip_data.sw_addr = 10;
                 kirkwood_ge01_init(&rd88f6281_ge01_data);
         } else {
-                rd88f6281_switch_data.port_names[4] = "wan";
+                rd88f6281_switch_chip_data.port_names[4] = "wan";
         }
-        kirkwood_ge00_switch_init(&rd88f6281_switch_data, NO_IRQ);
+        kirkwood_ge00_switch_init(&rd88f6281_switch_plat_data, NO_IRQ);
 
         kirkwood_rtc_init();
         kirkwood_sata_init(&rd88f6281_sata_data);
diff --git a/arch/arm/mach-ns9xxx/irq.c b/arch/arm/mach-ns9xxx/irq.c
index 22e0eb6e9ec4..feb0e54a91de 100644
--- a/arch/arm/mach-ns9xxx/irq.c
+++ b/arch/arm/mach-ns9xxx/irq.c
@@ -63,7 +63,6 @@ static struct irq_chip ns9xxx_chip = {
 #else
 static void handle_prio_irq(unsigned int irq, struct irq_desc *desc)
 {
-        unsigned int cpu = smp_processor_id();
         struct irqaction *action;
         irqreturn_t action_ret;
 
@@ -72,7 +71,7 @@ static void handle_prio_irq(unsigned int irq, struct irq_desc *desc)
         BUG_ON(desc->status & IRQ_INPROGRESS);
 
         desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
-        kstat_cpu(cpu).irqs[irq]++;
+        kstat_incr_irqs_this_cpu(irq, desc);
 
         action = desc->action;
         if (unlikely(!action || (desc->status & IRQ_DISABLED)))
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 8a0e49d84256..68cc3efae567 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -31,6 +31,7 @@
 #include <plat/ehci-orion.h>
 #include <plat/mv_xor.h>
 #include <plat/orion_nand.h>
+#include <plat/orion5x_wdt.h>
 #include <plat/time.h>
 #include "common.h"
 
@@ -219,14 +220,17 @@ static struct platform_device orion5x_switch_device = {
 
 void __init orion5x_eth_switch_init(struct dsa_platform_data *d, int irq)
 {
+        int i;
+
         if (irq != NO_IRQ) {
                 orion5x_switch_resources[0].start = irq;
                 orion5x_switch_resources[0].end = irq;
                 orion5x_switch_device.num_resources = 1;
         }
 
-        d->mii_bus = &orion5x_eth_shared.dev;
         d->netdev = &orion5x_eth.dev;
+        for (i = 0; i < d->nr_chips; i++)
+                d->chip[i].mii_bus = &orion5x_eth_shared.dev;
         orion5x_switch_device.dev.platform_data = d;
 
         platform_device_register(&orion5x_switch_device);
@@ -533,6 +537,29 @@ void __init orion5x_xor_init(void)
 
 
 /*****************************************************************************
+ * Watchdog
+ ****************************************************************************/
+static struct orion5x_wdt_platform_data orion5x_wdt_data = {
+        .tclk                   = 0,
+};
+
+static struct platform_device orion5x_wdt_device = {
+        .name           = "orion5x_wdt",
+        .id             = -1,
+        .dev            = {
+                .platform_data  = &orion5x_wdt_data,
+        },
+        .num_resources  = 0,
+};
+
+void __init orion5x_wdt_init(void)
+{
+        orion5x_wdt_data.tclk = orion5x_tclk;
+        platform_device_register(&orion5x_wdt_device);
+}
+
+
+/*****************************************************************************
  * Time handling
  ****************************************************************************/
 int orion5x_tclk;
@@ -631,6 +658,11 @@ void __init orion5x_init(void)
                 printk(KERN_INFO "Orion: Applying 5281 D0 WFI workaround.\n");
                 disable_hlt();
         }
+
+        /*
+         * Register watchdog driver
+         */
+        orion5x_wdt_init();
 }
 
 /*
diff --git a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
index 15f53235ee30..9c1ca41730ba 100644
--- a/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
@@ -94,7 +94,7 @@ static struct mv643xx_eth_platform_data rd88f5181l_fxo_eth_data = {
         .duplex         = DUPLEX_FULL,
 };
 
-static struct dsa_platform_data rd88f5181l_fxo_switch_data = {
+static struct dsa_chip_data rd88f5181l_fxo_switch_chip_data = {
         .port_names[0]  = "lan2",
         .port_names[1]  = "lan1",
         .port_names[2]  = "wan",
@@ -103,6 +103,11 @@ static struct dsa_platform_data rd88f5181l_fxo_switch_data = {
         .port_names[7]  = "lan3",
 };
 
+static struct dsa_platform_data rd88f5181l_fxo_switch_plat_data = {
+        .nr_chips       = 1,
+        .chip           = &rd88f5181l_fxo_switch_chip_data,
+};
+
 static void __init rd88f5181l_fxo_init(void)
 {
         /*
@@ -117,7 +122,7 @@ static void __init rd88f5181l_fxo_init(void)
          */
         orion5x_ehci0_init();
         orion5x_eth_init(&rd88f5181l_fxo_eth_data);
-        orion5x_eth_switch_init(&rd88f5181l_fxo_switch_data, NO_IRQ);
+        orion5x_eth_switch_init(&rd88f5181l_fxo_switch_plat_data, NO_IRQ);
         orion5x_uart0_init();
 
         orion5x_setup_dev_boot_win(RD88F5181L_FXO_NOR_BOOT_BASE,
diff --git a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
index 8ad3934399d4..ee1399ff0ced 100644
--- a/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
+++ b/arch/arm/mach-orion5x/rd88f5181l-ge-setup.c
@@ -95,7 +95,7 @@ static struct mv643xx_eth_platform_data rd88f5181l_ge_eth_data = {
         .duplex         = DUPLEX_FULL,
 };
 
-static struct dsa_platform_data rd88f5181l_ge_switch_data = {
+static struct dsa_chip_data rd88f5181l_ge_switch_chip_data = {
         .port_names[0]  = "lan2",
         .port_names[1]  = "lan1",
         .port_names[2]  = "wan",
@@ -104,6 +104,11 @@ static struct dsa_platform_data rd88f5181l_ge_switch_data = {
         .port_names[7]  = "lan3",
 };
 
+static struct dsa_platform_data rd88f5181l_ge_switch_plat_data = {
+        .nr_chips       = 1,
+        .chip           = &rd88f5181l_ge_switch_chip_data,
+};
+
 static struct i2c_board_info __initdata rd88f5181l_ge_i2c_rtc = {
         I2C_BOARD_INFO("ds1338", 0x68),
 };
@@ -122,7 +127,8 @@ static void __init rd88f5181l_ge_init(void)
          */
         orion5x_ehci0_init();
         orion5x_eth_init(&rd88f5181l_ge_eth_data);
-        orion5x_eth_switch_init(&rd88f5181l_ge_switch_data, gpio_to_irq(8));
+        orion5x_eth_switch_init(&rd88f5181l_ge_switch_plat_data,
+                                gpio_to_irq(8));
         orion5x_i2c_init();
         orion5x_uart0_init();
 
diff --git a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
index 262e25e4dace..7737cf9a8f50 100644
--- a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
+++ b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
@@ -35,7 +35,7 @@ static struct mv643xx_eth_platform_data rd88f6183ap_ge_eth_data = {
         .duplex         = DUPLEX_FULL,
 };
 
-static struct dsa_platform_data rd88f6183ap_ge_switch_data = {
+static struct dsa_chip_data rd88f6183ap_ge_switch_chip_data = {
         .port_names[0]  = "lan1",
         .port_names[1]  = "lan2",
         .port_names[2]  = "lan3",
@@ -44,6 +44,11 @@ static struct dsa_platform_data rd88f6183ap_ge_switch_data = {
         .port_names[5]  = "cpu",
 };
 
+static struct dsa_platform_data rd88f6183ap_ge_switch_plat_data = {
+        .nr_chips       = 1,
+        .chip           = &rd88f6183ap_ge_switch_chip_data,
+};
+
 static struct mtd_partition rd88f6183ap_ge_partitions[] = {
         {
                 .name   = "kernel",
@@ -89,7 +94,8 @@ static void __init rd88f6183ap_ge_init(void)
          */
         orion5x_ehci0_init();
         orion5x_eth_init(&rd88f6183ap_ge_eth_data);
-        orion5x_eth_switch_init(&rd88f6183ap_ge_switch_data, gpio_to_irq(3));
+        orion5x_eth_switch_init(&rd88f6183ap_ge_switch_plat_data,
+                                gpio_to_irq(3));
         spi_register_board_info(rd88f6183ap_ge_spi_slave_info,
                                 ARRAY_SIZE(rd88f6183ap_ge_spi_slave_info));
         orion5x_spi_init();
diff --git a/arch/arm/mach-orion5x/wrt350n-v2-setup.c b/arch/arm/mach-orion5x/wrt350n-v2-setup.c
index cc8f89200865..1b4ad9d5e2eb 100644
--- a/arch/arm/mach-orion5x/wrt350n-v2-setup.c
+++ b/arch/arm/mach-orion5x/wrt350n-v2-setup.c
@@ -106,7 +106,7 @@ static struct mv643xx_eth_platform_data wrt350n_v2_eth_data = {
         .duplex         = DUPLEX_FULL,
 };
 
-static struct dsa_platform_data wrt350n_v2_switch_data = {
+static struct dsa_chip_data wrt350n_v2_switch_chip_data = {
         .port_names[0]  = "lan2",
         .port_names[1]  = "lan1",
         .port_names[2]  = "wan",
@@ -115,6 +115,11 @@ static struct dsa_platform_data wrt350n_v2_switch_data = {
         .port_names[7]  = "lan4",
 };
 
+static struct dsa_platform_data wrt350n_v2_switch_plat_data = {
+        .nr_chips       = 1,
+        .chip           = &wrt350n_v2_switch_chip_data,
+};
+
 static void __init wrt350n_v2_init(void)
 {
         /*
@@ -129,7 +134,7 @@ static void __init wrt350n_v2_init(void)
          */
         orion5x_ehci0_init();
         orion5x_eth_init(&wrt350n_v2_eth_data);
-        orion5x_eth_switch_init(&wrt350n_v2_switch_data, NO_IRQ);
+        orion5x_eth_switch_init(&wrt350n_v2_switch_plat_data, NO_IRQ);
         orion5x_uart0_init();
 
         orion5x_setup_dev_boot_win(WRT350N_V2_NOR_BOOT_BASE,
diff --git a/arch/arm/mach-pxa/e740.c b/arch/arm/mach-pxa/e740.c
index 6d48e00f4f0b..a6fff782e7a8 100644
--- a/arch/arm/mach-pxa/e740.c
+++ b/arch/arm/mach-pxa/e740.c
@@ -135,6 +135,11 @@ static unsigned long e740_pin_config[] __initdata = {
         /* IrDA */
         GPIO38_GPIO | MFP_LPM_DRIVE_HIGH,
 
+        /* Audio power control */
+        GPIO16_GPIO,  /* AC97 codec AVDD2 supply (analogue power) */
+        GPIO40_GPIO,  /* Mic amp power */
+        GPIO41_GPIO,  /* Headphone amp power */
+
         /* PC Card */
         GPIO8_GPIO,   /* CD0 */
         GPIO44_GPIO,  /* CD1 */
diff --git a/arch/arm/mach-pxa/e750.c b/arch/arm/mach-pxa/e750.c
index be1ab8edb973..665066fd280e 100644
--- a/arch/arm/mach-pxa/e750.c
+++ b/arch/arm/mach-pxa/e750.c
@@ -133,6 +133,11 @@ static unsigned long e750_pin_config[] __initdata = {
         /* IrDA */
         GPIO38_GPIO | MFP_LPM_DRIVE_HIGH,
 
+        /* Audio power control */
+        GPIO4_GPIO,  /* Headphone amp power */
+        GPIO7_GPIO,  /* Speaker amp power */
+        GPIO37_GPIO, /* Headphone detect */
+
         /* PC Card */
         GPIO8_GPIO,   /* CD0 */
         GPIO44_GPIO,  /* CD1 */
diff --git a/arch/arm/mach-pxa/h5000.c b/arch/arm/mach-pxa/h5000.c
index da6e4422c0f3..295ec413d804 100644
--- a/arch/arm/mach-pxa/h5000.c
+++ b/arch/arm/mach-pxa/h5000.c
@@ -153,6 +153,13 @@ static unsigned long h5000_pin_config[] __initdata = {
         GPIO23_SSP1_SCLK,
         GPIO25_SSP1_TXD,
         GPIO26_SSP1_RXD,
+
+        /* I2S */
+        GPIO28_I2S_BITCLK_OUT,
+        GPIO29_I2S_SDATA_IN,
+        GPIO30_I2S_SDATA_OUT,
+        GPIO31_I2S_SYNC,
+        GPIO32_I2S_SYSCLK,
 };
 
 /*
diff --git a/arch/arm/mach-pxa/include/mach/eseries-gpio.h b/arch/arm/mach-pxa/include/mach/eseries-gpio.h
index efbd2aa9ecec..f3e5509820d7 100644
--- a/arch/arm/mach-pxa/include/mach/eseries-gpio.h
+++ b/arch/arm/mach-pxa/include/mach/eseries-gpio.h
@@ -45,6 +45,21 @@
 /* e7xx IrDA power control */
 #define GPIO_E7XX_IR_OFF         38
 
+/* e740 audio control GPIOs */
+#define GPIO_E740_WM9705_nAVDD2  16
+#define GPIO_E740_MIC_ON         40
+#define GPIO_E740_AMP_ON         41
+
+/* e750 audio control GPIOs */
+#define GPIO_E750_HP_AMP_OFF      4
+#define GPIO_E750_SPK_AMP_OFF     7
+#define GPIO_E750_HP_DETECT      37
+
+/* e800 audio control GPIOs */
+#define GPIO_E800_HP_DETECT      81
+#define GPIO_E800_HP_AMP_OFF     82
+#define GPIO_E800_SPK_AMP_ON     83
+
 /* ASIC related GPIOs */
 #define GPIO_ESERIES_TMIO_IRQ        5
 #define GPIO_ESERIES_TMIO_PCLR      19
diff --git a/arch/arm/mach-pxa/include/mach/regs-ssp.h b/arch/arm/mach-pxa/include/mach/regs-ssp.h
index cf31986f6f05..018f6d65b57b 100644
--- a/arch/arm/mach-pxa/include/mach/regs-ssp.h
+++ b/arch/arm/mach-pxa/include/mach/regs-ssp.h
@@ -50,7 +50,7 @@
 #define SSCR0_TUM       (1 << 23)       /* Transmit FIFO underrun interrupt mask */
 #define SSCR0_FRDC      (0x07000000)    /* Frame rate divider control (mask) */
 #define SSCR0_SlotsPerFrm(x) (((x) - 1) << 24)  /* Time slots per frame [1..8] */
-#define SSCR0_ADC       (1 << 30)       /* Audio clock select */
+#define SSCR0_ACS       (1 << 30)       /* Audio clock select */
 #define SSCR0_MOD       (1 << 31)       /* Mode (normal or network) */
 #endif
 
@@ -109,6 +109,11 @@
 #define SSSR_TINT               (1 << 19)       /* Receiver Time-out Interrupt */
 #define SSSR_PINT               (1 << 18)       /* Peripheral Trailing Byte Interrupt */
 
+#if defined(CONFIG_PXA3xx)
+#define SSPSP_EDMYSTOP(x)       ((x) << 28)     /* Extended Dummy Stop */
+#define SSPSP_EDMYSTRT(x)       ((x) << 26)     /* Extended Dummy Start */
+#endif
+
 #define SSPSP_FSRT              (1 << 25)       /* Frame Sync Relative Timing */
 #define SSPSP_DMYSTOP(x)        ((x) << 23)     /* Dummy Stop */
 #define SSPSP_SFRMWDTH(x)       ((x) << 16)     /* Serial Frame Width */
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 6d447c9ce8ab..0d62d311d41a 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -105,6 +105,12 @@ static unsigned long spitz_pin_config[] __initdata = {
         GPIO57_nIOIS16,
         GPIO104_PSKTSEL,
 
+        /* I2S */
+        GPIO28_I2S_BITCLK_OUT,
+        GPIO29_I2S_SDATA_IN,
+        GPIO30_I2S_SDATA_OUT,
+        GPIO31_I2S_SYNC,
+
         /* MMC */
         GPIO32_MMC_CLK,
         GPIO112_MMC_CMD,
diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c
index 552b4c778fdc..440c014e24b3 100644
--- a/arch/arm/mach-s3c2410/dma.c
+++ b/arch/arm/mach-s3c2410/dma.c
@@ -28,7 +28,7 @@
 #include <mach/regs-mem.h>
 #include <mach/regs-lcd.h>
 #include <mach/regs-sdi.h>
-#include <asm/plat-s3c24xx/regs-iis.h>
+#include <plat/regs-iis.h>
 #include <plat/regs-spi.h>
 
 static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = {
diff --git a/arch/arm/mach-s3c2410/usb-simtec.c b/arch/arm/mach-s3c2410/usb-simtec.c
index 6078f09b7df5..8331e8d97e20 100644
--- a/arch/arm/mach-s3c2410/usb-simtec.c
+++ b/arch/arm/mach-s3c2410/usb-simtec.c
@@ -29,13 +29,14 @@
 
 #include <mach/bast-map.h>
 #include <mach/bast-irq.h>
-#include <mach/usb-control.h>
 #include <mach/regs-gpio.h>
 
 #include <mach/hardware.h>
 #include <asm/irq.h>
 
+#include <plat/usb-control.h>
 #include <plat/devs.h>
+
 #include "usb-simtec.h"
 
 /* control power and monitor over-current events on various Simtec
diff --git a/arch/arm/mach-s3c2412/dma.c b/arch/arm/mach-s3c2412/dma.c
index 919856c9433f..9e3478506c6f 100644
--- a/arch/arm/mach-s3c2412/dma.c
+++ b/arch/arm/mach-s3c2412/dma.c
@@ -29,8 +29,8 @@
 #include <mach/regs-mem.h>
 #include <mach/regs-lcd.h>
 #include <mach/regs-sdi.h>
-#include <asm/plat-s3c24xx/regs-s3c2412-iis.h>
-#include <asm/plat-s3c24xx/regs-iis.h>
+#include <plat/regs-s3c2412-iis.h>
+#include <plat/regs-iis.h>
 #include <plat/regs-spi.h>
 
 #define MAP(x) { (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID }
diff --git a/arch/arm/mach-s3c2440/dma.c b/arch/arm/mach-s3c2440/dma.c
index 5b5ee0b8f4e0..69b6cf34df47 100644
--- a/arch/arm/mach-s3c2440/dma.c
+++ b/arch/arm/mach-s3c2440/dma.c
@@ -28,7 +28,7 @@
 #include <mach/regs-mem.h>
 #include <mach/regs-lcd.h>
 #include <mach/regs-sdi.h>
-#include <asm/plat-s3c24xx/regs-iis.h>
+#include <plat/regs-iis.h>
 #include <plat/regs-spi.h>
 
 static struct s3c24xx_dma_map __initdata s3c2440_dma_mappings[] = {
diff --git a/arch/arm/mach-s3c2443/dma.c b/arch/arm/mach-s3c2443/dma.c
index 2a58a4d5aa5a..8430e5829186 100644
--- a/arch/arm/mach-s3c2443/dma.c
+++ b/arch/arm/mach-s3c2443/dma.c
@@ -29,7 +29,7 @@
 #include <mach/regs-mem.h>
 #include <mach/regs-lcd.h>
 #include <mach/regs-sdi.h>
-#include <asm/plat-s3c24xx/regs-iis.h>
+#include <plat/regs-iis.h>
 #include <plat/regs-spi.h>
 
 #define MAP(x) { \
diff --git a/arch/arm/plat-orion/include/plat/orion5x_wdt.h b/arch/arm/plat-orion/include/plat/orion5x_wdt.h
new file mode 100644
index 000000000000..3c9cf6a305ef
--- /dev/null
+++ b/arch/arm/plat-orion/include/plat/orion5x_wdt.h
@@ -0,0 +1,18 @@
+/*
+ * arch/arm/plat-orion/include/plat/orion5x_wdt.h
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __PLAT_ORION5X_WDT_H
+#define __PLAT_ORION5X_WDT_H
+
+struct orion5x_wdt_platform_data {
+        u32     tclk;           /* no <linux/clk.h> support yet */
+};
+
+
+#endif
+
diff --git a/arch/arm/mach-s3c2410/include/mach/audio.h b/arch/arm/plat-s3c/include/plat/audio.h
index de0e8da48bc3..de0e8da48bc3 100644
--- a/arch/arm/mach-s3c2410/include/mach/audio.h
+++ b/arch/arm/plat-s3c/include/plat/audio.h
diff --git a/arch/arm/plat-s3c/include/plat/regs-s3c2412-iis.h b/arch/arm/plat-s3c/include/plat/regs-s3c2412-iis.h
new file mode 100644
index 000000000000..0fad7571030e
--- /dev/null
+++ b/arch/arm/plat-s3c/include/plat/regs-s3c2412-iis.h
@@ -0,0 +1,75 @@
+/* linux/include/asm-arm/plat-s3c24xx/regs-s3c2412-iis.h
+ *
+ * Copyright 2007 Simtec Electronics <linux@simtec.co.uk>
+ *      http://armlinux.simtec.co.uk/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C2412 IIS register definition
+*/
+
+#ifndef __ASM_ARCH_REGS_S3C2412_IIS_H
+#define __ASM_ARCH_REGS_S3C2412_IIS_H
+
+#define S3C2412_IISCON                  (0x00)
+#define S3C2412_IISMOD                  (0x04)
+#define S3C2412_IISFIC                  (0x08)
+#define S3C2412_IISPSR                  (0x0C)
+#define S3C2412_IISTXD                  (0x10)
+#define S3C2412_IISRXD                  (0x14)
+
+#define S3C2412_IISCON_LRINDEX          (1 << 11)
+#define S3C2412_IISCON_TXFIFO_EMPTY     (1 << 10)
+#define S3C2412_IISCON_RXFIFO_EMPTY     (1 << 9)
+#define S3C2412_IISCON_TXFIFO_FULL      (1 << 8)
+#define S3C2412_IISCON_RXFIFO_FULL      (1 << 7)
+#define S3C2412_IISCON_TXDMA_PAUSE      (1 << 6)
+#define S3C2412_IISCON_RXDMA_PAUSE      (1 << 5)
+#define S3C2412_IISCON_TXCH_PAUSE       (1 << 4)
+#define S3C2412_IISCON_RXCH_PAUSE       (1 << 3)
+#define S3C2412_IISCON_TXDMA_ACTIVE     (1 << 2)
+#define S3C2412_IISCON_RXDMA_ACTIVE     (1 << 1)
+#define S3C2412_IISCON_IIS_ACTIVE       (1 << 0)
+
+#define S3C64XX_IISMOD_IMS_PCLK         (0 << 10)
+#define S3C64XX_IISMOD_IMS_SYSMUX       (1 << 10)
+
+#define S3C2412_IISMOD_MASTER_INTERNAL  (0 << 10)
+#define S3C2412_IISMOD_MASTER_EXTERNAL  (1 << 10)
+#define S3C2412_IISMOD_SLAVE            (2 << 10)
+#define S3C2412_IISMOD_MASTER_MASK      (3 << 10)
+#define S3C2412_IISMOD_MODE_TXONLY      (0 << 8)
+#define S3C2412_IISMOD_MODE_RXONLY      (1 << 8)
+#define S3C2412_IISMOD_MODE_TXRX        (2 << 8)
+#define S3C2412_IISMOD_MODE_MASK        (3 << 8)
+#define S3C2412_IISMOD_LR_LLOW          (0 << 7)
+#define S3C2412_IISMOD_LR_RLOW          (1 << 7)
+#define S3C2412_IISMOD_SDF_IIS          (0 << 5)
+#define S3C2412_IISMOD_SDF_MSB          (1 << 5)
+#define S3C2412_IISMOD_SDF_LSB          (2 << 5)
+#define S3C2412_IISMOD_SDF_MASK         (3 << 5)
+#define S3C2412_IISMOD_RCLK_256FS       (0 << 3)
+#define S3C2412_IISMOD_RCLK_512FS       (1 << 3)
+#define S3C2412_IISMOD_RCLK_384FS       (2 << 3)
+#define S3C2412_IISMOD_RCLK_768FS       (3 << 3)
+#define S3C2412_IISMOD_RCLK_MASK        (3 << 3)
+#define S3C2412_IISMOD_BCLK_32FS        (0 << 1)
+#define S3C2412_IISMOD_BCLK_48FS        (1 << 1)
+#define S3C2412_IISMOD_BCLK_16FS        (2 << 1)
+#define S3C2412_IISMOD_BCLK_24FS        (3 << 1)
+#define S3C2412_IISMOD_BCLK_MASK        (3 << 1)
+#define S3C2412_IISMOD_8BIT             (1 << 0)
+
+#define S3C2412_IISPSR_PSREN            (1 << 15)
+
+#define S3C2412_IISFIC_TXFLUSH          (1 << 15)
+#define S3C2412_IISFIC_RXFLUSH          (1 << 7)
+#define S3C2412_IISFIC_TXCOUNT(x)       (((x) >>  8) & 0xf)
+#define S3C2412_IISFIC_RXCOUNT(x)       (((x) >>  0) & 0xf)
+
+
+
+#endif /* __ASM_ARCH_REGS_S3C2412_IIS_H */
+
diff --git a/arch/arm/mach-s3c2410/include/mach/usb-control.h b/arch/arm/plat-s3c/include/plat/usb-control.h
index cd91d1591f31..822c87fe948e 100644
--- a/arch/arm/mach-s3c2410/include/mach/usb-control.h
+++ b/arch/arm/plat-s3c/include/plat/usb-control.h
@@ -1,9 +1,9 @@
-/* arch/arm/mach-s3c2410/include/mach/usb-control.h
+/* arch/arm/plat-s3c/include/plat/usb-control.h
  *
  * Copyright (c) 2004 Simtec Electronics
  *      Ben Dooks <ben@simtec.co.uk>
  *
- * S3C2410 - usb port information
+ * S3C - USB host port information
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -11,7 +11,7 @@
 */
 
 #ifndef __ASM_ARCH_USBCONTROL_H
-#define __ASM_ARCH_USBCONTROL_H "arch/arm/mach-s3c2410/include/mach/usb-control.h"
+#define __ASM_ARCH_USBCONTROL_H
 
 #define S3C_HCDFLG_USED (1)
 
diff --git a/arch/arm/plat-s3c24xx/include/plat/regs-iis.h b/arch/arm/plat-s3c24xx/include/plat/regs-iis.h
new file mode 100644
index 000000000000..a6f1d5df13b4
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/include/plat/regs-iis.h
@@ -0,0 +1,77 @@
+/* arch/arm/mach-s3c2410/include/mach/regs-iis.h
+ *
+ * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
+ *                    http://www.simtec.co.uk/products/SWLINUX/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * S3C2410 IIS register definition
+*/
+
+#ifndef __ASM_ARCH_REGS_IIS_H
+#define __ASM_ARCH_REGS_IIS_H
+
+#define S3C2410_IISCON   (0x00)
+
+#define S3C2410_IISCON_LRINDEX    (1<<8)
+#define S3C2410_IISCON_TXFIFORDY  (1<<7)
+#define S3C2410_IISCON_RXFIFORDY  (1<<6)
+#define S3C2410_IISCON_TXDMAEN    (1<<5)
+#define S3C2410_IISCON_RXDMAEN    (1<<4)
+#define S3C2410_IISCON_TXIDLE     (1<<3)
+#define S3C2410_IISCON_RXIDLE     (1<<2)
+#define S3C2410_IISCON_PSCEN      (1<<1)
+#define S3C2410_IISCON_IISEN      (1<<0)
+
+#define S3C2410_IISMOD   (0x04)
+
+#define S3C2440_IISMOD_MPLL       (1<<9)
+#define S3C2410_IISMOD_SLAVE      (1<<8)
+#define S3C2410_IISMOD_NOXFER     (0<<6)
+#define S3C2410_IISMOD_RXMODE     (1<<6)
+#define S3C2410_IISMOD_TXMODE     (2<<6)
+#define S3C2410_IISMOD_TXRXMODE   (3<<6)
+#define S3C2410_IISMOD_LR_LLOW    (0<<5)
+#define S3C2410_IISMOD_LR_RLOW    (1<<5)
+#define S3C2410_IISMOD_IIS        (0<<4)
+#define S3C2410_IISMOD_MSB        (1<<4)
+#define S3C2410_IISMOD_8BIT       (0<<3)
+#define S3C2410_IISMOD_16BIT      (1<<3)
+#define S3C2410_IISMOD_BITMASK    (1<<3)
+#define S3C2410_IISMOD_256FS      (0<<2)
+#define S3C2410_IISMOD_384FS      (1<<2)
+#define S3C2410_IISMOD_16FS       (0<<0)
+#define S3C2410_IISMOD_32FS       (1<<0)
+#define S3C2410_IISMOD_48FS       (2<<0)
+#define S3C2410_IISMOD_FS_MASK    (3<<0)
+
+#define S3C2410_IISPSR          (0x08)
+#define S3C2410_IISPSR_INTMASK  (31<<5)
+#define S3C2410_IISPSR_INTSHIFT (5)
+#define S3C2410_IISPSR_EXTMASK  (31<<0)
+#define S3C2410_IISPSR_EXTSHFIT (0)
+
+#define S3C2410_IISFCON  (0x0c)
+
+#define S3C2410_IISFCON_TXDMA     (1<<15)
+#define S3C2410_IISFCON_RXDMA     (1<<14)
+#define S3C2410_IISFCON_TXENABLE  (1<<13)
+#define S3C2410_IISFCON_RXENABLE  (1<<12)
+#define S3C2410_IISFCON_TXMASK    (0x3f << 6)
+#define S3C2410_IISFCON_TXSHIFT   (6)
+#define S3C2410_IISFCON_RXMASK    (0x3f)
+#define S3C2410_IISFCON_RXSHIFT   (0)
+
+#define S3C2400_IISFCON_TXDMA     (1<<11)
+#define S3C2400_IISFCON_RXDMA     (1<<10)
+#define S3C2400_IISFCON_TXENABLE  (1<<9)
+#define S3C2400_IISFCON_RXENABLE  (1<<8)
+#define S3C2400_IISFCON_TXMASK    (0x07 << 4)
+#define S3C2400_IISFCON_TXSHIFT   (4)
+#define S3C2400_IISFCON_RXMASK    (0x07)
+#define S3C2400_IISFCON_RXSHIFT   (0)
+
+#define S3C2410_IISFIFO  (0x10)
+#endif /* __ASM_ARCH_REGS_IIS_H */
diff --git a/arch/avr32/boards/hammerhead/flash.c b/arch/avr32/boards/hammerhead/flash.c
index a98c6dd3a028..559bbcb03f9b 100644
--- a/arch/avr32/boards/hammerhead/flash.c
+++ b/arch/avr32/boards/hammerhead/flash.c
@@ -15,7 +15,6 @@
 #include <linux/mtd/physmap.h>
 #include <linux/usb/isp116x.h>
 #include <linux/dma-mapping.h>
-#include <linux/platform_device.h>
 #include <linux/delay.h>
 
 #include <mach/portmux.h>
diff --git a/arch/avr32/include/asm/socket.h b/arch/avr32/include/asm/socket.h
index 35863f260929..04c860619700 100644
--- a/arch/avr32/include/asm/socket.h
+++ b/arch/avr32/include/asm/socket.h
@@ -54,4 +54,7 @@
 
 #define SO_MARK                 36
 
+#define SO_TIMESTAMPING         37
+#define SCM_TIMESTAMPING        SO_TIMESTAMPING
+
 #endif /* __ASM_AVR32_SOCKET_H */
diff --git a/arch/avr32/include/asm/uaccess.h b/arch/avr32/include/asm/uaccess.h
index ed092395215e..245b2ee213c9 100644
--- a/arch/avr32/include/asm/uaccess.h
+++ b/arch/avr32/include/asm/uaccess.h
@@ -230,10 +230,10 @@ extern int __put_user_bad(void);
         asm volatile(                                                   \
                 "1:     ld." suffix "   %1, %3                  \n"     \
                 "2:                                             \n"     \
-                "       .section .fixup, \"ax\"                 \n"     \
+                "       .subsection 1                           \n"     \
                 "3:     mov     %0, %4                          \n"     \
                 "       rjmp    2b                              \n"     \
-                "       .previous                               \n"     \
+                "       .subsection 0                           \n"     \
                 "       .section __ex_table, \"a\"              \n"     \
                 "       .long   1b, 3b                          \n"     \
                 "       .previous                               \n"     \
@@ -295,10 +295,10 @@ extern int __put_user_bad(void);
         asm volatile(                                                   \
                 "1:     st." suffix "   %1, %3                  \n"     \
                 "2:                                             \n"     \
-                "       .section .fixup, \"ax\"                 \n"     \
+                "       .subsection 1                           \n"     \
                 "3:     mov     %0, %4                          \n"     \
                 "       rjmp    2b                              \n"     \
-                "       .previous                               \n"     \
+                "       .subsection 0                           \n"     \
                 "       .section __ex_table, \"a\"              \n"     \
                 "       .long   1b, 3b                          \n"     \
                 "       .previous                               \n"     \
diff --git a/arch/avr32/kernel/entry-avr32b.S b/arch/avr32/kernel/entry-avr32b.S
index 33d49377b8be..009a80155d67 100644
--- a/arch/avr32/kernel/entry-avr32b.S
+++ b/arch/avr32/kernel/entry-avr32b.S
@@ -150,10 +150,10 @@ page_not_present:
         tlbmiss_restore
         sub     sp, 4
         stmts   --sp, r0-lr
-        rcall   save_full_context_ex
+        call    save_full_context_ex
         mfsr    r12, SYSREG_ECR
         mov     r11, sp
-        rcall   do_page_fault
+        call    do_page_fault
         rjmp    ret_from_exception
 
         .align  2
@@ -250,7 +250,7 @@ syscall_badsys:
 
         .global ret_from_fork
 ret_from_fork:
-        rcall   schedule_tail
+        call   schedule_tail
 
         /* check for syscall tracing */
         get_thread_info r0
@@ -261,7 +261,7 @@ ret_from_fork:
 
 syscall_trace_enter:
         pushm   r8-r12
-        rcall   syscall_trace
+        call    syscall_trace
         popm    r8-r12
         rjmp    syscall_trace_cont
 
@@ -269,14 +269,14 @@ syscall_exit_work:
         bld     r1, TIF_SYSCALL_TRACE
         brcc    1f
         unmask_interrupts
-        rcall   syscall_trace
+        call    syscall_trace
         mask_interrupts
         ld.w    r1, r0[TI_flags]
 
 1:      bld     r1, TIF_NEED_RESCHED
         brcc    2f
         unmask_interrupts
-        rcall   schedule
+        call    schedule
         mask_interrupts
         ld.w    r1, r0[TI_flags]
         rjmp    1b
@@ -287,7 +287,7 @@ syscall_exit_work:
         unmask_interrupts
         mov     r12, sp
         mov     r11, r0
-        rcall   do_notify_resume
+        call    do_notify_resume
         mask_interrupts
         ld.w    r1, r0[TI_flags]
         rjmp    1b
@@ -394,7 +394,7 @@ handle_critical:
 
         mfsr    r12, SYSREG_ECR
         mov     r11, sp
-        rcall   do_critical_exception
+        call    do_critical_exception
 
         /* We should never get here... */
 bad_return:
@@ -407,18 +407,18 @@ bad_return:
 do_bus_error_write:
         sub     sp, 4
         stmts   --sp, r0-lr
-        rcall   save_full_context_ex
+        call    save_full_context_ex
         mov     r11, 1
         rjmp    1f
 
 do_bus_error_read:
         sub     sp, 4
         stmts   --sp, r0-lr
-        rcall   save_full_context_ex
+        call    save_full_context_ex
         mov     r11, 0
 1:      mfsr    r12, SYSREG_BEAR
         mov     r10, sp
-        rcall   do_bus_error
+        call    do_bus_error
         rjmp    ret_from_exception
 
         .align  1
@@ -433,7 +433,7 @@ do_nmi_ll:
 1:      pushm   r8, r9  /* PC and SR */
         mfsr    r12, SYSREG_ECR
         mov     r11, sp
-        rcall   do_nmi
+        call    do_nmi
         popm    r8-r9
         mtsr    SYSREG_RAR_NMI, r8
         tst     r0, r0
@@ -457,29 +457,29 @@ do_nmi_ll:
 handle_address_fault:
         sub     sp, 4
         stmts   --sp, r0-lr
-        rcall   save_full_context_ex
+        call    save_full_context_ex
         mfsr    r12, SYSREG_ECR
         mov     r11, sp
-        rcall   do_address_exception
+        call    do_address_exception
         rjmp    ret_from_exception
 
 handle_protection_fault:
         sub     sp, 4
         stmts   --sp, r0-lr
-        rcall   save_full_context_ex
+        call    save_full_context_ex
         mfsr    r12, SYSREG_ECR
         mov     r11, sp
-        rcall   do_page_fault
+        call    do_page_fault
         rjmp    ret_from_exception
 
         .align  1
 do_illegal_opcode_ll:
         sub     sp, 4
         stmts   --sp, r0-lr
-        rcall   save_full_context_ex
+        call    save_full_context_ex
         mfsr    r12, SYSREG_ECR
         mov     r11, sp
-        rcall   do_illegal_opcode
+        call    do_illegal_opcode
         rjmp    ret_from_exception
 
 do_dtlb_modified:
@@ -513,11 +513,11 @@ do_dtlb_modified:
 do_fpe_ll:
         sub     sp, 4
         stmts   --sp, r0-lr
-        rcall   save_full_context_ex
+        call    save_full_context_ex
         unmask_interrupts
         mov     r12, 26
         mov     r11, sp
-        rcall   do_fpe
+        call    do_fpe
         rjmp    ret_from_exception
 
 ret_from_exception:
@@ -553,7 +553,7 @@ fault_resume_kernel:
         lddsp   r4, sp[REG_SR]
         bld     r4, SYSREG_GM_OFFSET
         brcs    1f
-        rcall   preempt_schedule_irq
+        call    preempt_schedule_irq
 1:
 #endif
 
@@ -582,7 +582,7 @@ fault_exit_work:
         bld     r1, TIF_NEED_RESCHED
         brcc    1f
         unmask_interrupts
-        rcall   schedule
+        call    schedule
         mask_interrupts
         ld.w    r1, r0[TI_flags]
         rjmp    fault_exit_work
@@ -593,7 +593,7 @@ fault_exit_work:
         unmask_interrupts
         mov     r12, sp
         mov     r11, r0
-        rcall   do_notify_resume
+        call    do_notify_resume
         mask_interrupts
         ld.w    r1, r0[TI_flags]
         rjmp    fault_exit_work
@@ -616,10 +616,10 @@ handle_debug:
 
 .Ldebug_fixup_cont:
 #ifdef CONFIG_TRACE_IRQFLAGS
-        rcall   trace_hardirqs_off
+        call    trace_hardirqs_off
 #endif
         mov     r12, sp
-        rcall   do_debug
+        call    do_debug
         mov     sp, r12
 
         lddsp   r2, sp[REG_SR]
@@ -643,7 +643,7 @@ handle_debug:
         mtsr    SYSREG_RSR_DBG, r11
         mtsr    SYSREG_RAR_DBG, r10
 #ifdef CONFIG_TRACE_IRQFLAGS
-        rcall   trace_hardirqs_on
+        call    trace_hardirqs_on
 1:
 #endif
         ldmts   sp++, r0-lr
@@ -676,7 +676,7 @@ debug_resume_kernel:
 #ifdef CONFIG_TRACE_IRQFLAGS
         bld     r11, SYSREG_GM_OFFSET
         brcc    1f
-        rcall   trace_hardirqs_on
+        call    trace_hardirqs_on
 1:
 #endif
         mfsr    r2, SYSREG_SR
@@ -747,7 +747,7 @@ irq_level\level:
         mov     r11, sp
         mov     r12, \level
 
-        rcall   do_IRQ
+        call    do_IRQ
 
         lddsp   r4, sp[REG_SR]
         bfextu  r4, r4, SYSREG_M0_OFFSET, 3
@@ -767,7 +767,7 @@ irq_level\level:
 
 1:
 #ifdef CONFIG_TRACE_IRQFLAGS
-        rcall   trace_hardirqs_on
+        call    trace_hardirqs_on
 #endif
         popm    r8-r9
         mtsr    rar_int\level, r8
@@ -807,7 +807,7 @@ irq_level\level:
         lddsp   r4, sp[REG_SR]
         bld     r4, SYSREG_GM_OFFSET
         brcs    1b
-        rcall   preempt_schedule_irq
+        call    preempt_schedule_irq
 #endif
         rjmp    1b
         .endm
diff --git a/arch/avr32/kernel/irq.c b/arch/avr32/kernel/irq.c
index a8e767d836aa..9f572229d318 100644
--- a/arch/avr32/kernel/irq.c
+++ b/arch/avr32/kernel/irq.c
@@ -58,7 +58,7 @@ int show_interrupts(struct seq_file *p, void *v)
 
                 seq_printf(p, "%3d: ", i);
                 for_each_online_cpu(cpu)
-                        seq_printf(p, "%10u ", kstat_cpu(cpu).irqs[i]);
+                        seq_printf(p, "%10u ", kstat_irqs_cpu(i, cpu));
                 seq_printf(p, " %8s", irq_desc[i].chip->name ? : "-");
                 seq_printf(p, "  %s", action->name);
                 for (action = action->next; action; action = action->next)
diff --git a/arch/avr32/kernel/syscall-stubs.S b/arch/avr32/kernel/syscall-stubs.S
index 673178e235f3..f7244cd02fbb 100644
--- a/arch/avr32/kernel/syscall-stubs.S
+++ b/arch/avr32/kernel/syscall-stubs.S
@@ -61,7 +61,7 @@ __sys_execve:
 __sys_mmap2:
         pushm   lr
         st.w    --sp, ARG6
-        rcall   sys_mmap2
+        call    sys_mmap2
         sub     sp, -4
         popm    pc
 
@@ -70,7 +70,7 @@ __sys_mmap2:
 __sys_sendto:
         pushm   lr
         st.w    --sp, ARG6
-        rcall   sys_sendto
+        call    sys_sendto
         sub     sp, -4
         popm    pc
 
@@ -79,7 +79,7 @@ __sys_sendto:
 __sys_recvfrom:
         pushm   lr
         st.w    --sp, ARG6
-        rcall   sys_recvfrom
+        call    sys_recvfrom
         sub     sp, -4
         popm    pc
 
@@ -88,7 +88,7 @@ __sys_recvfrom:
 __sys_pselect6:
         pushm   lr
         st.w    --sp, ARG6
-        rcall   sys_pselect6
+        call    sys_pselect6
         sub     sp, -4
         popm    pc
 
@@ -97,7 +97,7 @@ __sys_pselect6:
 __sys_splice:
         pushm   lr
         st.w    --sp, ARG6
-        rcall   sys_splice
+        call    sys_splice
         sub     sp, -4
         popm    pc
 
@@ -106,7 +106,7 @@ __sys_splice:
 __sys_epoll_pwait:
         pushm   lr
         st.w    --sp, ARG6
-        rcall   sys_epoll_pwait
+        call    sys_epoll_pwait
         sub     sp, -4
         popm    pc
 
@@ -115,6 +115,6 @@ __sys_epoll_pwait:
 __sys_sync_file_range:
         pushm   lr
         st.w    --sp, ARG6
-        rcall   sys_sync_file_range
+        call    sys_sync_file_range
         sub     sp, -4
         popm    pc
diff --git a/arch/avr32/lib/strnlen_user.S b/arch/avr32/lib/strnlen_user.S
index 65ce11afa66a..e46f4724962b 100644
--- a/arch/avr32/lib/strnlen_user.S
+++ b/arch/avr32/lib/strnlen_user.S
@@ -48,7 +48,7 @@ adjust_length:
         lddpc   lr, _task_size
         sub     r11, lr, r12
         mov     r9, r11
-        rcall   __strnlen_user
+        call    __strnlen_user
         cp.w    r12, r9
         brgt    1f
         popm    pc
diff --git a/arch/blackfin/include/asm/socket.h b/arch/blackfin/include/asm/socket.h
index 2ca702e44d47..fac7fe9e1f8a 100644
--- a/arch/blackfin/include/asm/socket.h
+++ b/arch/blackfin/include/asm/socket.h
@@ -53,4 +53,7 @@
 
 #define SO_MARK                 36
 
+#define SO_TIMESTAMPING         37
+#define SCM_TIMESTAMPING        SO_TIMESTAMPING
+
 #endif                          /* _ASM_SOCKET_H */
diff --git a/arch/blackfin/kernel/irqchip.c b/arch/blackfin/kernel/irqchip.c
index 1ab5b532ec72..401bd32aa499 100644
--- a/arch/blackfin/kernel/irqchip.c
+++ b/arch/blackfin/kernel/irqchip.c
@@ -88,7 +88,7 @@ int show_interrupts(struct seq_file *p, void *v)
                         goto skip;
                 seq_printf(p, "%3d: ", i);
                 for_each_online_cpu(j)
-                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
+                        seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
                 seq_printf(p, " %8s", irq_desc[i].chip->name);
                 seq_printf(p, "  %s", action->name);
                 for (action = action->next; action; action = action->next)
diff --git a/arch/cris/include/asm/socket.h b/arch/cris/include/asm/socket.h
index 9df0ca82f5de..d5cf74005408 100644
--- a/arch/cris/include/asm/socket.h
+++ b/arch/cris/include/asm/socket.h
@@ -56,6 +56,9 @@
 
 #define SO_MARK                 36
 
+#define SO_TIMESTAMPING         37
+#define SCM_TIMESTAMPING        SO_TIMESTAMPING
+
 #endif /* _ASM_SOCKET_H */
 
 
diff --git a/arch/cris/kernel/irq.c b/arch/cris/kernel/irq.c
index 2dfac8c79090..7f642fcffbfc 100644
--- a/arch/cris/kernel/irq.c
+++ b/arch/cris/kernel/irq.c
@@ -66,7 +66,7 @@ int show_interrupts(struct seq_file *p, void *v)
                 seq_printf(p, "%10u ", kstat_irqs(i));
 #else
                 for_each_online_cpu(j)
-                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
+                        seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
 #endif
                 seq_printf(p, " %14s", irq_desc[i].chip->typename);
                 seq_printf(p, "  %s", action->name);
diff --git a/arch/frv/kernel/irq.c b/arch/frv/kernel/irq.c
index 73abae767fdc..af3e824b91b3 100644
--- a/arch/frv/kernel/irq.c
+++ b/arch/frv/kernel/irq.c
@@ -74,7 +74,7 @@ int show_interrupts(struct seq_file *p, void *v)
                 if (action) {
                         seq_printf(p, "%3d: ", i);
                         for_each_present_cpu(cpu)
-                                seq_printf(p, "%10u ", kstat_cpu(cpu).irqs[i]);
+                                seq_printf(p, "%10u ", kstat_irqs_cpu(i, cpu));
                         seq_printf(p, " %10s", irq_desc[i].chip->name ? : "-");
                         seq_printf(p, "  %s", action->name);
                         for (action = action->next;
diff --git a/arch/h8300/include/asm/socket.h b/arch/h8300/include/asm/socket.h
index da2520dbf254..602518a70a1a 100644
--- a/arch/h8300/include/asm/socket.h
+++ b/arch/h8300/include/asm/socket.h
@@ -54,4 +54,7 @@
 
 #define SO_MARK                 36
 
+#define SO_TIMESTAMPING         37
+#define SCM_TIMESTAMPING        SO_TIMESTAMPING
+
 #endif /* _ASM_SOCKET_H */
diff --git a/arch/h8300/kernel/irq.c b/arch/h8300/kernel/irq.c
index ef4f0047067d..74f8dd7b34d2 100644
--- a/arch/h8300/kernel/irq.c
+++ b/arch/h8300/kernel/irq.c
@@ -183,7 +183,7 @@ asmlinkage void do_IRQ(int irq)
 #if defined(CONFIG_PROC_FS)
 int show_interrupts(struct seq_file *p, void *v)
 {
-        int i = *(loff_t *) v, j;
+        int i = *(loff_t *) v;
         struct irqaction * action;
         unsigned long flags;
 
@@ -196,7 +196,7 @@ int show_interrupts(struct seq_file *p, void *v)
                 if (!action)
                         goto unlock;
                 seq_printf(p, "%3d: ",i);
-                seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
+                seq_printf(p, "%10u ", kstat_irqs(i));
                 seq_printf(p, " %14s", irq_desc[i].chip->name);
                 seq_printf(p, "-%-8s", irq_desc[i].name);
                 seq_printf(p, "  %s", action->name);
diff --git a/arch/ia64/ia32/ia32_entry.S b/arch/ia64/ia32/ia32_entry.S
index a46f8395e9a5..af9405cd70e5 100644
--- a/arch/ia64/ia32/ia32_entry.S
+++ b/arch/ia64/ia32/ia32_entry.S
@@ -240,7 +240,7 @@ ia32_syscall_table:
         data8 sys_ni_syscall
         data8 sys_umask           /* 60 */
         data8 sys_chroot
-        data8 sys_ustat
+        data8 compat_sys_ustat
         data8 sys_dup2
         data8 sys_getppid
         data8 sys_getpgrp         /* 65 */
diff --git a/arch/ia64/include/asm/kvm.h b/arch/ia64/include/asm/kvm.h
index 2b0a38e84705..18a7e49abbc5 100644
--- a/arch/ia64/include/asm/kvm.h
+++ b/arch/ia64/include/asm/kvm.h
@@ -165,7 +165,40 @@ struct saved_vpd {
         unsigned long  vcpuid[5];
         unsigned long  vpsr;
         unsigned long  vpr;
-        unsigned long  vcr[128];
+        union {
+                unsigned long  vcr[128];
+                struct {
+                        unsigned long dcr;
+                        unsigned long itm;
+                        unsigned long iva;
+                        unsigned long rsv1[5];
+                        unsigned long pta;
+                        unsigned long rsv2[7];
+                        unsigned long ipsr;
+                        unsigned long isr;
+                        unsigned long rsv3;
+                        unsigned long iip;
+                        unsigned long ifa;
+                        unsigned long itir;
+                        unsigned long iipa;
+                        unsigned long ifs;
+                        unsigned long iim;
+                        unsigned long iha;
+                        unsigned long rsv4[38];
+                        unsigned long lid;
+                        unsigned long ivr;
+                        unsigned long tpr;
+                        unsigned long eoi;
+                        unsigned long irr[4];
+                        unsigned long itv;
+                        unsigned long pmv;
+                        unsigned long cmcv;
+                        unsigned long rsv5[5];
+                        unsigned long lrr0;
+                        unsigned long lrr1;
+                        unsigned long rsv6[46];
+                };
+        };
 };
 
 struct kvm_regs {
@@ -213,4 +246,18 @@ struct kvm_sregs {
 struct kvm_fpu {
 };
 
+#define KVM_IA64_VCPU_STACK_SHIFT       16
+#define KVM_IA64_VCPU_STACK_SIZE        (1UL << KVM_IA64_VCPU_STACK_SHIFT)
+
+struct kvm_ia64_vcpu_stack {
+        unsigned char stack[KVM_IA64_VCPU_STACK_SIZE];
+};
+
+struct kvm_debug_exit_arch {
+};
+
+/* for KVM_SET_GUEST_DEBUG */
+struct kvm_guest_debug_arch {
+};
+
 #endif
diff --git a/arch/ia64/include/asm/kvm_host.h b/arch/ia64/include/asm/kvm_host.h
index 348663661659..4542651e6acb 100644
--- a/arch/ia64/include/asm/kvm_host.h
+++ b/arch/ia64/include/asm/kvm_host.h
@@ -112,7 +112,11 @@
 #define VCPU_STRUCT_SHIFT       16
 #define VCPU_STRUCT_SIZE        (__IA64_UL_CONST(1) << VCPU_STRUCT_SHIFT)
 
-#define KVM_STK_OFFSET          VCPU_STRUCT_SIZE
+/*
+ * This must match KVM_IA64_VCPU_STACK_{SHIFT,SIZE} arch/ia64/include/asm/kvm.h
+ */
+#define KVM_STK_SHIFT           16
+#define KVM_STK_OFFSET          (__IA64_UL_CONST(1)<< KVM_STK_SHIFT)
 
 #define KVM_VM_STRUCT_SHIFT     19
 #define KVM_VM_STRUCT_SIZE      (__IA64_UL_CONST(1) << KVM_VM_STRUCT_SHIFT)
@@ -153,10 +157,10 @@ struct kvm_vm_data {
         struct kvm_vcpu_data vcpu_data[KVM_MAX_VCPUS];
 };
 
-#define VCPU_BASE(n)    KVM_VM_DATA_BASE + \
-                                offsetof(struct kvm_vm_data, vcpu_data[n])
-#define VM_BASE         KVM_VM_DATA_BASE + \
-                                offsetof(struct kvm_vm_data, kvm_vm_struct)
+#define VCPU_BASE(n)    (KVM_VM_DATA_BASE + \
+                                offsetof(struct kvm_vm_data, vcpu_data[n]))
+#define KVM_VM_BASE     (KVM_VM_DATA_BASE + \
+                                offsetof(struct kvm_vm_data, kvm_vm_struct))
 #define KVM_MEM_DIRTY_LOG_BASE  KVM_VM_DATA_BASE + \
                                 offsetof(struct kvm_vm_data, kvm_mem_dirty_log)
 
@@ -235,8 +239,6 @@ struct kvm_vm_data {
 
 struct kvm;
 struct kvm_vcpu;
-struct kvm_guest_debug{
-};
 
 struct kvm_mmio_req {
         uint64_t addr;          /*  physical address            */
@@ -462,6 +464,8 @@ struct kvm_arch {
         unsigned long   metaphysical_rr4;
         unsigned long   vmm_init_rr;
 
+        int             online_vcpus;
+
         struct kvm_ioapic *vioapic;
         struct kvm_vm_stat stat;
         struct kvm_sal_data rdv_sal_data;
diff --git a/arch/ia64/include/asm/msidef.h b/arch/ia64/include/asm/msidef.h
new file mode 100644
index 000000000000..592c1047a0c5
--- /dev/null
+++ b/arch/ia64/include/asm/msidef.h
@@ -0,0 +1,42 @@
+#ifndef _IA64_MSI_DEF_H
+#define _IA64_MSI_DEF_H
+
+/*
+ * Shifts for APIC-based data
+ */
+
+#define     MSI_DATA_VECTOR_SHIFT       0
+#define     MSI_DATA_VECTOR(v)          (((u8)v) << MSI_DATA_VECTOR_SHIFT)
+#define     MSI_DATA_VECTOR_MASK        0xffffff00
+
+#define     MSI_DATA_DELIVERY_MODE_SHIFT        8
+#define     MSI_DATA_DELIVERY_FIXED     (0 << MSI_DATA_DELIVERY_MODE_SHIFT)
+#define     MSI_DATA_DELIVERY_LOWPRI    (1 << MSI_DATA_DELIVERY_MODE_SHIFT)
+
+#define     MSI_DATA_LEVEL_SHIFT        14
+#define     MSI_DATA_LEVEL_DEASSERT     (0 << MSI_DATA_LEVEL_SHIFT)
+#define     MSI_DATA_LEVEL_ASSERT       (1 << MSI_DATA_LEVEL_SHIFT)
+
+#define     MSI_DATA_TRIGGER_SHIFT      15
+#define     MSI_DATA_TRIGGER_EDGE       (0 << MSI_DATA_TRIGGER_SHIFT)
+#define     MSI_DATA_TRIGGER_LEVEL      (1 << MSI_DATA_TRIGGER_SHIFT)
+
+/*
+ * Shift/mask fields for APIC-based bus address
+ */
+
+#define     MSI_ADDR_DEST_ID_SHIFT      4
+#define     MSI_ADDR_HEADER             0xfee00000
+
+#define     MSI_ADDR_DEST_ID_MASK       0xfff0000f
+#define     MSI_ADDR_DEST_ID_CPU(cpu)   ((cpu) << MSI_ADDR_DEST_ID_SHIFT)
+
+#define     MSI_ADDR_DEST_MODE_SHIFT    2
+#define     MSI_ADDR_DEST_MODE_PHYS     (0 << MSI_ADDR_DEST_MODE_SHIFT)
+#define     MSI_ADDR_DEST_MODE_LOGIC    (1 << MSI_ADDR_DEST_MODE_SHIFT)
+
+#define     MSI_ADDR_REDIRECTION_SHIFT  3
+#define     MSI_ADDR_REDIRECTION_CPU    (0 << MSI_ADDR_REDIRECTION_SHIFT)
+#define     MSI_ADDR_REDIRECTION_LOWPRI (1 << MSI_ADDR_REDIRECTION_SHIFT)
+
+#endif/* _IA64_MSI_DEF_H */
diff --git a/arch/ia64/include/asm/socket.h b/arch/ia64/include/asm/socket.h
index d5ef0aa3e312..745421225ec6 100644
--- a/arch/ia64/include/asm/socket.h
+++ b/arch/ia64/include/asm/socket.h
@@ -63,4 +63,7 @@
 
 #define SO_MARK                 36
 
+#define SO_TIMESTAMPING         37
+#define SCM_TIMESTAMPING        SO_TIMESTAMPING
+
 #endif /* _ASM_IA64_SOCKET_H */
diff --git a/arch/ia64/kernel/irq.c b/arch/ia64/kernel/irq.c
index 226233a6fa19..7429752ef5ad 100644
--- a/arch/ia64/kernel/irq.c
+++ b/arch/ia64/kernel/irq.c
@@ -80,7 +80,7 @@ int show_interrupts(struct seq_file *p, void *v)
                 seq_printf(p, "%10u ", kstat_irqs(i));
 #else
                 for_each_online_cpu(j) {
-                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
+                        seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
                 }
 #endif
                 seq_printf(p, " %14s", irq_desc[i].chip->name);
diff --git a/arch/ia64/kernel/irq_ia64.c b/arch/ia64/kernel/irq_ia64.c
index 927ad027820c..acc4d19ae62a 100644
--- a/arch/ia64/kernel/irq_ia64.c
+++ b/arch/ia64/kernel/irq_ia64.c
@@ -493,16 +493,15 @@ ia64_handle_irq (ia64_vector vector, struct pt_regs *regs)
         saved_tpr = ia64_getreg(_IA64_REG_CR_TPR);
         ia64_srlz_d();
         while (vector != IA64_SPURIOUS_INT_VECTOR) {
-                struct irq_desc *desc = irq_to_desc(vector);
+                int irq = local_vector_to_irq(vector);
+                struct irq_desc *desc = irq_to_desc(irq);
 
                 if (unlikely(IS_LOCAL_TLB_FLUSH(vector))) {
                         smp_local_flush_tlb();
-                        kstat_incr_irqs_this_cpu(vector, desc);
-                } else if (unlikely(IS_RESCHEDULE(vector)))
-                        kstat_incr_irqs_this_cpu(vector, desc);
-                else {
-                        int irq = local_vector_to_irq(vector);
-
+                        kstat_incr_irqs_this_cpu(irq, desc);
+                } else if (unlikely(IS_RESCHEDULE(vector))) {
+                        kstat_incr_irqs_this_cpu(irq, desc);
+                } else {
                         ia64_setreg(_IA64_REG_CR_TPR, vector);
                         ia64_srlz_d();
 
@@ -545,24 +544,24 @@ void ia64_process_pending_intr(void)
 
         vector = ia64_get_ivr();
 
-         irq_enter();
-         saved_tpr = ia64_getreg(_IA64_REG_CR_TPR);
-         ia64_srlz_d();
+        irq_enter();
+        saved_tpr = ia64_getreg(_IA64_REG_CR_TPR);
+        ia64_srlz_d();
 
          /*
           * Perform normal interrupt style processing
           */
         while (vector != IA64_SPURIOUS_INT_VECTOR) {
-                struct irq_desc *desc = irq_to_desc(vector);
+                int irq = local_vector_to_irq(vector);
+                struct irq_desc *desc = irq_to_desc(irq);
 
                 if (unlikely(IS_LOCAL_TLB_FLUSH(vector))) {
                         smp_local_flush_tlb();
-                        kstat_incr_irqs_this_cpu(vector, desc);
-                } else if (unlikely(IS_RESCHEDULE(vector)))
-                        kstat_incr_irqs_this_cpu(vector, desc);
-                else {
+                        kstat_incr_irqs_this_cpu(irq, desc);
+                } else if (unlikely(IS_RESCHEDULE(vector))) {
+                        kstat_incr_irqs_this_cpu(irq, desc);
+                } else {
                         struct pt_regs *old_regs = set_irq_regs(NULL);
-                        int irq = local_vector_to_irq(vector);
 
                         ia64_setreg(_IA64_REG_CR_TPR, vector);
                         ia64_srlz_d();
diff --git a/arch/ia64/kernel/msi_ia64.c b/arch/ia64/kernel/msi_ia64.c
index dcb6b7c51ea7..2b15e233f7fe 100644
--- a/arch/ia64/kernel/msi_ia64.c
+++ b/arch/ia64/kernel/msi_ia64.c
@@ -7,44 +7,7 @@
 #include <linux/msi.h>
 #include <linux/dmar.h>
 #include <asm/smp.h>
-
-/*
- * Shifts for APIC-based data
- */
-
-#define MSI_DATA_VECTOR_SHIFT           0
-#define     MSI_DATA_VECTOR(v)          (((u8)v) << MSI_DATA_VECTOR_SHIFT)
-#define MSI_DATA_VECTOR_MASK            0xffffff00
-
-#define MSI_DATA_DELIVERY_SHIFT         8
-#define     MSI_DATA_DELIVERY_FIXED     (0 << MSI_DATA_DELIVERY_SHIFT)
-#define     MSI_DATA_DELIVERY_LOWPRI    (1 << MSI_DATA_DELIVERY_SHIFT)
-
-#define MSI_DATA_LEVEL_SHIFT            14
-#define     MSI_DATA_LEVEL_DEASSERT     (0 << MSI_DATA_LEVEL_SHIFT)
-#define     MSI_DATA_LEVEL_ASSERT       (1 << MSI_DATA_LEVEL_SHIFT)
-
-#define MSI_DATA_TRIGGER_SHIFT          15
-#define     MSI_DATA_TRIGGER_EDGE       (0 << MSI_DATA_TRIGGER_SHIFT)
-#define     MSI_DATA_TRIGGER_LEVEL      (1 << MSI_DATA_TRIGGER_SHIFT)
-
-/*
- * Shift/mask fields for APIC-based bus address
- */
-
-#define MSI_TARGET_CPU_SHIFT            4
-#define MSI_ADDR_HEADER                 0xfee00000
-
-#define MSI_ADDR_DESTID_MASK            0xfff0000f
-#define     MSI_ADDR_DESTID_CPU(cpu)    ((cpu) << MSI_TARGET_CPU_SHIFT)
-
-#define MSI_ADDR_DESTMODE_SHIFT         2
-#define     MSI_ADDR_DESTMODE_PHYS      (0 << MSI_ADDR_DESTMODE_SHIFT)
-#define     MSI_ADDR_DESTMODE_LOGIC     (1 << MSI_ADDR_DESTMODE_SHIFT)
-
-#define MSI_ADDR_REDIRECTION_SHIFT      3
-#define     MSI_ADDR_REDIRECTION_CPU    (0 << MSI_ADDR_REDIRECTION_SHIFT)
-#define     MSI_ADDR_REDIRECTION_LOWPRI (1 << MSI_ADDR_REDIRECTION_SHIFT)
+#include <asm/msidef.h>
 
 static struct irq_chip  ia64_msi_chip;
 
@@ -65,8 +28,8 @@ static void ia64_set_msi_irq_affinity(unsigned int irq,
         read_msi_msg(irq, &msg);
 
         addr = msg.address_lo;
-        addr &= MSI_ADDR_DESTID_MASK;
-        addr |= MSI_ADDR_DESTID_CPU(cpu_physical_id(cpu));
+        addr &= MSI_ADDR_DEST_ID_MASK;
+        addr |= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu));
         msg.address_lo = addr;
 
         data = msg.data;
@@ -98,9 +61,9 @@ int ia64_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
         msg.address_hi = 0;
         msg.address_lo =
                 MSI_ADDR_HEADER |
-                MSI_ADDR_DESTMODE_PHYS |
+                MSI_ADDR_DEST_MODE_PHYS |
                 MSI_ADDR_REDIRECTION_CPU |
-                MSI_ADDR_DESTID_CPU(dest_phys_id);
+                MSI_ADDR_DEST_ID_CPU(dest_phys_id);
 
         msg.data =
                 MSI_DATA_TRIGGER_EDGE |
@@ -183,8 +146,8 @@ static void dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask)
 
         msg.data &= ~MSI_DATA_VECTOR_MASK;
         msg.data |= MSI_DATA_VECTOR(cfg->vector);
-        msg.address_lo &= ~MSI_ADDR_DESTID_MASK;
-        msg.address_lo |= MSI_ADDR_DESTID_CPU(cpu_physical_id(cpu));
+        msg.address_lo &= ~MSI_ADDR_DEST_ID_MASK;
+        msg.address_lo |= MSI_ADDR_DEST_ID_CPU(cpu_physical_id(cpu));
 
         dmar_msi_write(irq, &msg);
         cpumask_copy(irq_desc[irq].affinity, mask);
@@ -215,9 +178,9 @@ msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_msg *msg)
         msg->address_hi = 0;
         msg->address_lo =
                 MSI_ADDR_HEADER |
-                MSI_ADDR_DESTMODE_PHYS |
+                MSI_ADDR_DEST_MODE_PHYS |
                 MSI_ADDR_REDIRECTION_CPU |
-                MSI_ADDR_DESTID_CPU(dest);
+                MSI_ADDR_DEST_ID_CPU(dest);
 
         msg->data =
                 MSI_DATA_TRIGGER_EDGE |
diff --git a/arch/ia64/kernel/perfmon.c b/arch/ia64/kernel/perfmon.c
index 0e499757309b..5c0f408cfd71 100644
--- a/arch/ia64/kernel/perfmon.c
+++ b/arch/ia64/kernel/perfmon.c
@@ -2196,7 +2196,7 @@ pfmfs_delete_dentry(struct dentry *dentry)
         return 1;
 }
 
-static struct dentry_operations pfmfs_dentry_operations = {
+static const struct dentry_operations pfmfs_dentry_operations = {
         .d_delete = pfmfs_delete_dentry,
 };
 
diff --git a/arch/ia64/kvm/Kconfig b/arch/ia64/kvm/Kconfig
index f833a0b4188d..0a2d6b86075a 100644
--- a/arch/ia64/kvm/Kconfig
+++ b/arch/ia64/kvm/Kconfig
@@ -4,6 +4,10 @@
 config HAVE_KVM
         bool
 
+config HAVE_KVM_IRQCHIP
+       bool
+       default y
+
 menuconfig VIRTUALIZATION
         bool "Virtualization"
         depends on HAVE_KVM || IA64
diff --git a/arch/ia64/kvm/irq.h b/arch/ia64/kvm/irq.h
index c6786e8b1bf4..c0785a728271 100644
--- a/arch/ia64/kvm/irq.h
+++ b/arch/ia64/kvm/irq.h
@@ -23,6 +23,8 @@
 #ifndef __IRQ_H
 #define __IRQ_H
 
+#include "lapic.h"
+
 static inline int irqchip_in_kernel(struct kvm *kvm)
 {
         return 1;
diff --git a/arch/ia64/kvm/kvm-ia64.c b/arch/ia64/kvm/kvm-ia64.c
index 28f982045f29..076b00d1dbff 100644
--- a/arch/ia64/kvm/kvm-ia64.c
+++ b/arch/ia64/kvm/kvm-ia64.c
@@ -182,7 +182,7 @@ int kvm_dev_ioctl_check_extension(long ext)
         switch (ext) {
         case KVM_CAP_IRQCHIP:
         case KVM_CAP_MP_STATE:
-
+        case KVM_CAP_IRQ_INJECT_STATUS:
                 r = 1;
                 break;
         case KVM_CAP_COALESCED_MMIO:
@@ -314,7 +314,7 @@ static struct kvm_vcpu *lid_to_vcpu(struct kvm *kvm, unsigned long id,
         union ia64_lid lid;
         int i;
 
-        for (i = 0; i < KVM_MAX_VCPUS; i++) {
+        for (i = 0; i < kvm->arch.online_vcpus; i++) {
                 if (kvm->vcpus[i]) {
                         lid.val = VCPU_LID(kvm->vcpus[i]);
                         if (lid.id == id && lid.eid == eid)
@@ -388,7 +388,7 @@ static int handle_global_purge(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 
         call_data.ptc_g_data = p->u.ptc_g_data;
 
-        for (i = 0; i < KVM_MAX_VCPUS; i++) {
+        for (i = 0; i < kvm->arch.online_vcpus; i++) {
                 if (!kvm->vcpus[i] || kvm->vcpus[i]->arch.mp_state ==
                                                 KVM_MP_STATE_UNINITIALIZED ||
                                         vcpu == kvm->vcpus[i])
@@ -788,6 +788,8 @@ struct  kvm *kvm_arch_create_vm(void)
                 return ERR_PTR(-ENOMEM);
         kvm_init_vm(kvm);
 
+        kvm->arch.online_vcpus = 0;
+
         return kvm;
 
 }
@@ -919,7 +921,13 @@ long kvm_arch_vm_ioctl(struct file *filp,
                 r = kvm_ioapic_init(kvm);
                 if (r)
                         goto out;
+                r = kvm_setup_default_irq_routing(kvm);
+                if (r) {
+                        kfree(kvm->arch.vioapic);
+                        goto out;
+                }
                 break;
+        case KVM_IRQ_LINE_STATUS:
         case KVM_IRQ_LINE: {
                 struct kvm_irq_level irq_event;
 
@@ -927,10 +935,17 @@ long kvm_arch_vm_ioctl(struct file *filp,
                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
                         goto out;
                 if (irqchip_in_kernel(kvm)) {
+                        __s32 status;
                         mutex_lock(&kvm->lock);
-                        kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
+                        status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
                                     irq_event.irq, irq_event.level);
                         mutex_unlock(&kvm->lock);
+                        if (ioctl == KVM_IRQ_LINE_STATUS) {
+                                irq_event.status = status;
+                                if (copy_to_user(argp, &irq_event,
+                                                        sizeof irq_event))
+                                        goto out;
+                        }
                         r = 0;
                 }
                 break;
@@ -1149,7 +1164,7 @@ int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
 
                 /*Initialize itc offset for vcpus*/
                 itc_offset = 0UL - ia64_getreg(_IA64_REG_AR_ITC);
-                for (i = 0; i < KVM_MAX_VCPUS; i++) {
+                for (i = 0; i < kvm->arch.online_vcpus; i++) {
                         v = (struct kvm_vcpu *)((char *)vcpu +
                                         sizeof(struct kvm_vcpu_data) * i);
                         v->arch.itc_offset = itc_offset;
@@ -1283,6 +1298,8 @@ struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
                 goto fail;
         }
 
+        kvm->arch.online_vcpus++;
+
         return vcpu;
 fail:
         return ERR_PTR(r);
@@ -1303,8 +1320,8 @@ int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
         return -EINVAL;
 }
 
-int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
-                struct kvm_debug_guest *dbg)
+int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
+                                        struct kvm_guest_debug *dbg)
 {
         return -EINVAL;
 }
@@ -1421,6 +1438,23 @@ int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
         return 0;
 }
 
+int kvm_arch_vcpu_ioctl_get_stack(struct kvm_vcpu *vcpu,
+                                  struct kvm_ia64_vcpu_stack *stack)
+{
+        memcpy(stack, vcpu, sizeof(struct kvm_ia64_vcpu_stack));
+        return 0;
+}
+
+int kvm_arch_vcpu_ioctl_set_stack(struct kvm_vcpu *vcpu,
+                                  struct kvm_ia64_vcpu_stack *stack)
+{
+        memcpy(vcpu + 1, &stack->stack[0] + sizeof(struct kvm_vcpu),
+               sizeof(struct kvm_ia64_vcpu_stack) - sizeof(struct kvm_vcpu));
+
+        vcpu->arch.exit_data = ((struct kvm_vcpu *)stack)->arch.exit_data;
+        return 0;
+}
+
 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
 {
 
@@ -1430,9 +1464,78 @@ void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
 
 
 long kvm_arch_vcpu_ioctl(struct file *filp,
-                unsigned int ioctl, unsigned long arg)
+                         unsigned int ioctl, unsigned long arg)
 {
-        return -EINVAL;
+        struct kvm_vcpu *vcpu = filp->private_data;
+        void __user *argp = (void __user *)arg;
+        struct kvm_ia64_vcpu_stack *stack = NULL;
+        long r;
+
+        switch (ioctl) {
+        case KVM_IA64_VCPU_GET_STACK: {
+                struct kvm_ia64_vcpu_stack __user *user_stack;
+                void __user *first_p = argp;
+
+                r = -EFAULT;
+                if (copy_from_user(&user_stack, first_p, sizeof(void *)))
+                        goto out;
+
+                if (!access_ok(VERIFY_WRITE, user_stack,
+                               sizeof(struct kvm_ia64_vcpu_stack))) {
+                        printk(KERN_INFO "KVM_IA64_VCPU_GET_STACK: "
+                               "Illegal user destination address for stack\n");
+                        goto out;
+                }
+                stack = kzalloc(sizeof(struct kvm_ia64_vcpu_stack), GFP_KERNEL);
+                if (!stack) {
+                        r = -ENOMEM;
+                        goto out;
+                }
+
+                r = kvm_arch_vcpu_ioctl_get_stack(vcpu, stack);
+                if (r)
+                        goto out;
+
+                if (copy_to_user(user_stack, stack,
+                                 sizeof(struct kvm_ia64_vcpu_stack)))
+                        goto out;
+
+                break;
+        }
+        case KVM_IA64_VCPU_SET_STACK: {
+                struct kvm_ia64_vcpu_stack __user *user_stack;
+                void __user *first_p = argp;
+
+                r = -EFAULT;
+                if (copy_from_user(&user_stack, first_p, sizeof(void *)))
+                        goto out;
+
+                if (!access_ok(VERIFY_READ, user_stack,
+                            sizeof(struct kvm_ia64_vcpu_stack))) {
+                        printk(KERN_INFO "KVM_IA64_VCPU_SET_STACK: "
+                               "Illegal user address for stack\n");
+                        goto out;
+                }
+                stack = kmalloc(sizeof(struct kvm_ia64_vcpu_stack), GFP_KERNEL);
+                if (!stack) {
+                        r = -ENOMEM;
+                        goto out;
+                }
+                if (copy_from_user(stack, user_stack,
+                                   sizeof(struct kvm_ia64_vcpu_stack)))
+                        goto out;
+
+                r = kvm_arch_vcpu_ioctl_set_stack(vcpu, stack);
+                break;
+        }
+
+        default:
+                r = -EINVAL;
+        }
+
+out:
+        kfree(stack);
+        return r;
 }
 
 int kvm_arch_set_memory_region(struct kvm *kvm,
@@ -1472,7 +1575,7 @@ void kvm_arch_flush_shadow(struct kvm *kvm)
 }
 
 long kvm_arch_dev_ioctl(struct file *filp,
-                unsigned int ioctl, unsigned long arg)
+                        unsigned int ioctl, unsigned long arg)
 {
         return -EINVAL;
 }
@@ -1737,7 +1840,7 @@ struct kvm_vcpu *kvm_get_lowest_prio_vcpu(struct kvm *kvm, u8 vector,
         struct kvm_vcpu *lvcpu = kvm->vcpus[0];
         int i;
 
-        for (i = 1; i < KVM_MAX_VCPUS; i++) {
+        for (i = 1; i < kvm->arch.online_vcpus; i++) {
                 if (!kvm->vcpus[i])
                         continue;
                 if (lvcpu->arch.xtp > kvm->vcpus[i]->arch.xtp)
diff --git a/arch/ia64/kvm/kvm_fw.c b/arch/ia64/kvm/kvm_fw.c
index cb7600bdff9d..a8ae52ed5635 100644
--- a/arch/ia64/kvm/kvm_fw.c
+++ b/arch/ia64/kvm/kvm_fw.c
@@ -227,6 +227,18 @@ static struct ia64_pal_retval pal_proc_get_features(struct kvm_vcpu *vcpu)
         return result;
 }
 
+static struct ia64_pal_retval pal_register_info(struct kvm_vcpu *vcpu)
+{
+
+        struct ia64_pal_retval result = {0, 0, 0, 0};
+        long in0, in1, in2, in3;
+
+        kvm_get_pal_call_data(vcpu, &in0, &in1, &in2, &in3);
+        result.status = ia64_pal_register_info(in1, &result.v1, &result.v2);
+
+        return result;
+}
+
 static struct ia64_pal_retval pal_cache_info(struct kvm_vcpu *vcpu)
 {
 
@@ -268,8 +280,12 @@ static struct ia64_pal_retval pal_vm_summary(struct kvm_vcpu *vcpu)
 static struct ia64_pal_retval pal_vm_info(struct kvm_vcpu *vcpu)
 {
         struct ia64_pal_retval result;
+        unsigned long in0, in1, in2, in3;
 
-        INIT_PAL_STATUS_UNIMPLEMENTED(result);
+        kvm_get_pal_call_data(vcpu, &in0, &in1, &in2, &in3);
+
+        result.status = ia64_pal_vm_info(in1, in2,
+                        (pal_tc_info_u_t *)&result.v1, &result.v2);
 
         return result;
 }
@@ -292,6 +308,108 @@ static void prepare_for_halt(struct kvm_vcpu *vcpu)
         vcpu->arch.timer_fired = 0;
 }
 
+static struct ia64_pal_retval pal_perf_mon_info(struct kvm_vcpu *vcpu)
+{
+        long status;
+        unsigned long in0, in1, in2, in3, r9;
+        unsigned long pm_buffer[16];
+
+        kvm_get_pal_call_data(vcpu, &in0, &in1, &in2, &in3);
+        status = ia64_pal_perf_mon_info(pm_buffer,
+                                (pal_perf_mon_info_u_t *) &r9);
+        if (status != 0) {
+                printk(KERN_DEBUG"PAL_PERF_MON_INFO fails ret=%ld\n", status);
+        } else {
+                if (in1)
+                        memcpy((void *)in1, pm_buffer, sizeof(pm_buffer));
+                else {
+                        status = PAL_STATUS_EINVAL;
+                        printk(KERN_WARNING"Invalid parameters "
+                                                "for PAL call:0x%lx!\n", in0);
+                }
+        }
+        return (struct ia64_pal_retval){status, r9, 0, 0};
+}
+
+static struct ia64_pal_retval pal_halt_info(struct kvm_vcpu *vcpu)
+{
+        unsigned long in0, in1, in2, in3;
+        long status;
+        unsigned long res = 1000UL | (1000UL << 16) | (10UL << 32)
+                                        | (1UL << 61) | (1UL << 60);
+
+        kvm_get_pal_call_data(vcpu, &in0, &in1, &in2, &in3);
+        if (in1) {
+                memcpy((void *)in1, &res, sizeof(res));
+                status = 0;
+        } else{
+                status = PAL_STATUS_EINVAL;
+                printk(KERN_WARNING"Invalid parameters "
+                                        "for PAL call:0x%lx!\n", in0);
+        }
+
+        return (struct ia64_pal_retval){status, 0, 0, 0};
+}
+
+static struct ia64_pal_retval pal_mem_attrib(struct kvm_vcpu *vcpu)
+{
+        unsigned long r9;
+        long status;
+
+        status = ia64_pal_mem_attrib(&r9);
+
+        return (struct ia64_pal_retval){status, r9, 0, 0};
+}
+
+static void remote_pal_prefetch_visibility(void *v)
+{
+        s64 trans_type = (s64)v;
+        ia64_pal_prefetch_visibility(trans_type);
+}
+
+static struct ia64_pal_retval pal_prefetch_visibility(struct kvm_vcpu *vcpu)
+{
+        struct ia64_pal_retval result = {0, 0, 0, 0};
+        unsigned long in0, in1, in2, in3;
+        kvm_get_pal_call_data(vcpu, &in0, &in1, &in2, &in3);
+        result.status = ia64_pal_prefetch_visibility(in1);
+        if (result.status == 0) {
+                /* Must be performed on all remote processors
+                in the coherence domain. */
+                smp_call_function(remote_pal_prefetch_visibility,
+                                        (void *)in1, 1);
+                /* Unnecessary on remote processor for other vcpus!*/
+                result.status = 1;
+        }
+        return result;
+}
+
+static void remote_pal_mc_drain(void *v)
+{
+        ia64_pal_mc_drain();
+}
+
+static struct ia64_pal_retval pal_get_brand_info(struct kvm_vcpu *vcpu)
+{
+        struct ia64_pal_retval result = {0, 0, 0, 0};
+        unsigned long in0, in1, in2, in3;
+
+        kvm_get_pal_call_data(vcpu, &in0, &in1, &in2, &in3);
+
+        if (in1 == 0 && in2) {
+                char brand_info[128];
+                result.status = ia64_pal_get_brand_info(brand_info);
+                if (result.status == PAL_STATUS_SUCCESS)
+                        memcpy((void *)in2, brand_info, 128);
+        } else {
+                result.status = PAL_STATUS_REQUIRES_MEMORY;
+                printk(KERN_WARNING"Invalid parameters for "
+                                        "PAL call:0x%lx!\n", in0);
+        }
+
+        return result;
+}
+
 int kvm_pal_emul(struct kvm_vcpu *vcpu, struct kvm_run *run)
 {
 
@@ -300,14 +418,22 @@ int kvm_pal_emul(struct kvm_vcpu *vcpu, struct kvm_run *run)
         int ret = 1;
 
         gr28 = kvm_get_pal_call_index(vcpu);
-        /*printk("pal_call index:%lx\n",gr28);*/
         switch (gr28) {
         case PAL_CACHE_FLUSH:
                 result = pal_cache_flush(vcpu);
                 break;
+        case PAL_MEM_ATTRIB:
+                result = pal_mem_attrib(vcpu);
+                break;
         case PAL_CACHE_SUMMARY:
                 result = pal_cache_summary(vcpu);
                 break;
+        case PAL_PERF_MON_INFO:
+                result = pal_perf_mon_info(vcpu);
+                break;
+        case PAL_HALT_INFO:
+                result = pal_halt_info(vcpu);
+                break;
         case PAL_HALT_LIGHT:
         {
                 INIT_PAL_STATUS_SUCCESS(result);
@@ -317,6 +443,16 @@ int kvm_pal_emul(struct kvm_vcpu *vcpu, struct kvm_run *run)
         }
                 break;
 
+        case PAL_PREFETCH_VISIBILITY:
+                result = pal_prefetch_visibility(vcpu);
+                break;
+        case PAL_MC_DRAIN:
+                result.status = ia64_pal_mc_drain();
+                /* FIXME: All vcpus likely call PAL_MC_DRAIN.
+                   That causes the congestion. */
+                smp_call_function(remote_pal_mc_drain, NULL, 1);
+                break;
+
         case PAL_FREQ_RATIOS:
                 result = pal_freq_ratios(vcpu);
                 break;
@@ -346,6 +482,9 @@ int kvm_pal_emul(struct kvm_vcpu *vcpu, struct kvm_run *run)
                 INIT_PAL_STATUS_SUCCESS(result);
                 result.v1 = (1L << 32) | 1L;
                 break;
+        case PAL_REGISTER_INFO:
+                result = pal_register_info(vcpu);
+                break;
         case PAL_VM_PAGE_SIZE:
                 result.status = ia64_pal_vm_page_size(&result.v0,
                                                         &result.v1);
@@ -365,12 +504,18 @@ int kvm_pal_emul(struct kvm_vcpu *vcpu, struct kvm_run *run)
                 result.status = ia64_pal_version(
                                 (pal_version_u_t *)&result.v0,
                                 (pal_version_u_t *)&result.v1);
-
                 break;
         case PAL_FIXED_ADDR:
                 result.status = PAL_STATUS_SUCCESS;
                 result.v0 = vcpu->vcpu_id;
                 break;
+        case PAL_BRAND_INFO:
+                result = pal_get_brand_info(vcpu);
+                break;
+        case PAL_GET_PSTATE:
+        case PAL_CACHE_SHARED_INFO:
+                INIT_PAL_STATUS_UNIMPLEMENTED(result);
+                break;
         default:
                 INIT_PAL_STATUS_UNIMPLEMENTED(result);
                 printk(KERN_WARNING"kvm: Unsupported pal call,"
diff --git a/arch/ia64/kvm/process.c b/arch/ia64/kvm/process.c
index 230eae482f32..b1dc80952d91 100644
--- a/arch/ia64/kvm/process.c
+++ b/arch/ia64/kvm/process.c
@@ -167,7 +167,6 @@ static u64 vcpu_get_itir_on_fault(struct kvm_vcpu *vcpu, u64 ifa)
         return (rr1.val);
 }
 
-
 /*
  * Set vIFA & vITIR & vIHA, when vPSR.ic =1
  * Parameter:
@@ -222,8 +221,6 @@ void itlb_fault(struct kvm_vcpu *vcpu, u64 vadr)
         inject_guest_interruption(vcpu, IA64_INST_TLB_VECTOR);
 }
 
-
-
 /*
  * Data Nested TLB Fault
  *  @ Data Nested TLB Vector
@@ -245,7 +242,6 @@ void alt_dtlb(struct kvm_vcpu *vcpu, u64 vadr)
         inject_guest_interruption(vcpu, IA64_ALT_DATA_TLB_VECTOR);
 }
 
-
 /*
  * Data TLB Fault
  *  @ Data TLB vector
@@ -265,8 +261,6 @@ static void _vhpt_fault(struct kvm_vcpu *vcpu, u64 vadr)
         /* If vPSR.ic, IFA, ITIR, IHA*/
         set_ifa_itir_iha(vcpu, vadr, 1, 1, 1);
         inject_guest_interruption(vcpu, IA64_VHPT_TRANS_VECTOR);
-
-
 }
 
 /*
@@ -279,7 +273,6 @@ void ivhpt_fault(struct kvm_vcpu *vcpu, u64 vadr)
         _vhpt_fault(vcpu, vadr);
 }
 
-
 /*
  * VHPT Data Fault
  *  @ VHPT Translation vector
@@ -290,8 +283,6 @@ void dvhpt_fault(struct kvm_vcpu *vcpu, u64 vadr)
         _vhpt_fault(vcpu, vadr);
 }
 
-
-
 /*
  * Deal with:
  *  General Exception vector
@@ -301,7 +292,6 @@ void _general_exception(struct kvm_vcpu *vcpu)
         inject_guest_interruption(vcpu, IA64_GENEX_VECTOR);
 }
 
-
 /*
  * Illegal Operation Fault
  *  @ General Exception Vector
@@ -419,19 +409,16 @@ static void __page_not_present(struct kvm_vcpu *vcpu, u64 vadr)
         inject_guest_interruption(vcpu, IA64_PAGE_NOT_PRESENT_VECTOR);
 }
 
-
 void data_page_not_present(struct kvm_vcpu *vcpu, u64 vadr)
 {
         __page_not_present(vcpu, vadr);
 }
 
-
 void inst_page_not_present(struct kvm_vcpu *vcpu, u64 vadr)
 {
         __page_not_present(vcpu, vadr);
 }
 
-
 /* Deal with
  *  Data access rights vector
  */
@@ -563,22 +550,64 @@ void reflect_interruption(u64 ifa, u64 isr, u64 iim,
         inject_guest_interruption(vcpu, vector);
 }
 
+static unsigned long kvm_trans_pal_call_args(struct kvm_vcpu *vcpu,
+                                                unsigned long arg)
+{
+        struct thash_data *data;
+        unsigned long gpa, poff;
+
+        if (!is_physical_mode(vcpu)) {
+                /* Depends on caller to provide the DTR or DTC mapping.*/
+                data = vtlb_lookup(vcpu, arg, D_TLB);
+                if (data)
+                        gpa = data->page_flags & _PAGE_PPN_MASK;
+                else {
+                        data = vhpt_lookup(arg);
+                        if (!data)
+                                return 0;
+                        gpa = data->gpaddr & _PAGE_PPN_MASK;
+                }
+
+                poff = arg & (PSIZE(data->ps) - 1);
+                arg = PAGEALIGN(gpa, data->ps) | poff;
+        }
+        arg = kvm_gpa_to_mpa(arg << 1 >> 1);
+
+        return (unsigned long)__va(arg);
+}
+
 static void set_pal_call_data(struct kvm_vcpu *vcpu)
 {
         struct exit_ctl_data *p = &vcpu->arch.exit_data;
+        unsigned long gr28 = vcpu_get_gr(vcpu, 28);
+        unsigned long gr29 = vcpu_get_gr(vcpu, 29);
+        unsigned long gr30 = vcpu_get_gr(vcpu, 30);
 
         /*FIXME:For static and stacked convention, firmware
          * has put the parameters in gr28-gr31 before
          * break to vmm  !!*/
 
-        p->u.pal_data.gr28 = vcpu_get_gr(vcpu, 28);
-        p->u.pal_data.gr29 = vcpu_get_gr(vcpu, 29);
-        p->u.pal_data.gr30 = vcpu_get_gr(vcpu, 30);
+        switch (gr28) {
+        case PAL_PERF_MON_INFO:
+        case PAL_HALT_INFO:
+                p->u.pal_data.gr29 =  kvm_trans_pal_call_args(vcpu, gr29);
+                p->u.pal_data.gr30 = vcpu_get_gr(vcpu, 30);
+                break;
+        case PAL_BRAND_INFO:
+                p->u.pal_data.gr29 = gr29;;
+                p->u.pal_data.gr30 = kvm_trans_pal_call_args(vcpu, gr30);
+                break;
+        default:
+                p->u.pal_data.gr29 = gr29;;
+                p->u.pal_data.gr30 = vcpu_get_gr(vcpu, 30);
+        }
+        p->u.pal_data.gr28 = gr28;
         p->u.pal_data.gr31 = vcpu_get_gr(vcpu, 31);
+
         p->exit_reason = EXIT_REASON_PAL_CALL;
 }
 
-static void set_pal_call_result(struct kvm_vcpu *vcpu)
+static void get_pal_call_result(struct kvm_vcpu *vcpu)
 {
         struct exit_ctl_data *p = &vcpu->arch.exit_data;
 
@@ -606,7 +635,7 @@ static void set_sal_call_data(struct kvm_vcpu *vcpu)
         p->exit_reason = EXIT_REASON_SAL_CALL;
 }
 
-static void set_sal_call_result(struct kvm_vcpu *vcpu)
+static void get_sal_call_result(struct kvm_vcpu *vcpu)
 {
         struct exit_ctl_data *p = &vcpu->arch.exit_data;
 
@@ -629,13 +658,13 @@ void  kvm_ia64_handle_break(unsigned long ifa, struct kvm_pt_regs *regs,
                 if (iim == DOMN_PAL_REQUEST) {
                         set_pal_call_data(v);
                         vmm_transition(v);
-                        set_pal_call_result(v);
+                        get_pal_call_result(v);
                         vcpu_increment_iip(v);
                         return;
                 } else if (iim == DOMN_SAL_REQUEST) {
                         set_sal_call_data(v);
                         vmm_transition(v);
-                        set_sal_call_result(v);
+                        get_sal_call_result(v);
                         vcpu_increment_iip(v);
                         return;
                 }
@@ -703,7 +732,6 @@ void vhpi_detection(struct kvm_vcpu *vcpu)
         }
 }
 
-
 void leave_hypervisor_tail(void)
 {
         struct kvm_vcpu *v = current_vcpu;
@@ -737,7 +765,6 @@ void leave_hypervisor_tail(void)
         }
 }
 
-
 static inline void handle_lds(struct kvm_pt_regs *regs)
 {
         regs->cr_ipsr |= IA64_PSR_ED;
diff --git a/arch/ia64/kvm/vcpu.c b/arch/ia64/kvm/vcpu.c
index ecd526b55323..d4d280505878 100644
--- a/arch/ia64/kvm/vcpu.c
+++ b/arch/ia64/kvm/vcpu.c
@@ -112,7 +112,6 @@ void switch_to_physical_rid(struct kvm_vcpu *vcpu)
         return;
 }
 
-
 void switch_to_virtual_rid(struct kvm_vcpu *vcpu)
 {
         unsigned long psr;
@@ -166,8 +165,6 @@ void switch_mm_mode(struct kvm_vcpu *vcpu, struct ia64_psr old_psr,
         return;
 }
 
-
-
 /*
  * In physical mode, insert tc/tr for region 0 and 4 uses
  * RID[0] and RID[4] which is for physical mode emulation.
@@ -269,7 +266,6 @@ static inline unsigned long fph_index(struct kvm_pt_regs *regs,
         return rotate_reg(96, rrb_fr, (regnum - IA64_FIRST_ROTATING_FR));
 }
 
-
 /*
  * The inverse of the above: given bspstore and the number of
  * registers, calculate ar.bsp.
@@ -811,12 +807,15 @@ static inline void vcpu_set_itm(struct kvm_vcpu *vcpu, u64 val);
 static void vcpu_set_itc(struct kvm_vcpu *vcpu, u64 val)
 {
         struct kvm_vcpu *v;
+        struct kvm *kvm;
         int i;
         long itc_offset = val - ia64_getreg(_IA64_REG_AR_ITC);
         unsigned long vitv = VCPU(vcpu, itv);
 
+        kvm = (struct kvm *)KVM_VM_BASE;
+
         if (vcpu->vcpu_id == 0) {
-                for (i = 0; i < KVM_MAX_VCPUS; i++) {
+                for (i = 0; i < kvm->arch.online_vcpus; i++) {
                         v = (struct kvm_vcpu *)((char *)vcpu +
                                         sizeof(struct kvm_vcpu_data) * i);
                         VMX(v, itc_offset) = itc_offset;
@@ -1039,8 +1038,6 @@ u64 vcpu_tak(struct kvm_vcpu *vcpu, u64 vadr)
         return key;
 }
 
-
-
 void kvm_thash(struct kvm_vcpu *vcpu, INST64 inst)
 {
         unsigned long thash, vadr;
@@ -1050,7 +1047,6 @@ void kvm_thash(struct kvm_vcpu *vcpu, INST64 inst)
         vcpu_set_gr(vcpu, inst.M46.r1, thash, 0);
 }
 
-
 void kvm_ttag(struct kvm_vcpu *vcpu, INST64 inst)
 {
         unsigned long tag, vadr;
@@ -1131,7 +1127,6 @@ int vcpu_tpa(struct kvm_vcpu *vcpu, u64 vadr, u64 *padr)
         return IA64_NO_FAULT;
 }
 
-
 int kvm_tpa(struct kvm_vcpu *vcpu, INST64 inst)
 {
         unsigned long r1, r3;
@@ -1154,7 +1149,6 @@ void kvm_tak(struct kvm_vcpu *vcpu, INST64 inst)
         vcpu_set_gr(vcpu, inst.M46.r1, r1, 0);
 }
 
-
 /************************************
  * Insert/Purge translation register/cache
  ************************************/
@@ -1385,7 +1379,6 @@ void kvm_mov_to_ar_reg(struct kvm_vcpu *vcpu, INST64 inst)
         vcpu_set_itc(vcpu, r2);
 }
 
-
 void kvm_mov_from_ar_reg(struct kvm_vcpu *vcpu, INST64 inst)
 {
         unsigned long r1;
@@ -1393,8 +1386,9 @@ void kvm_mov_from_ar_reg(struct kvm_vcpu *vcpu, INST64 inst)
         r1 = vcpu_get_itc(vcpu);
         vcpu_set_gr(vcpu, inst.M31.r1, r1, 0);
 }
+
 /**************************************************************************
-  struct kvm_vcpu*protection key register access routines
+  struct kvm_vcpu protection key register access routines
  **************************************************************************/
 
 unsigned long vcpu_get_pkr(struct kvm_vcpu *vcpu, unsigned long reg)
@@ -1407,20 +1401,6 @@ void vcpu_set_pkr(struct kvm_vcpu *vcpu, unsigned long reg, unsigned long val)
         ia64_set_pkr(reg, val);
 }
 
-
-unsigned long vcpu_get_itir_on_fault(struct kvm_vcpu *vcpu, unsigned long ifa)
-{
-        union ia64_rr rr, rr1;
-
-        rr.val = vcpu_get_rr(vcpu, ifa);
-        rr1.val = 0;
-        rr1.ps = rr.ps;
-        rr1.rid = rr.rid;
-        return (rr1.val);
-}
-
-
-
 /********************************
  * Moves to privileged registers
  ********************************/
@@ -1464,8 +1444,6 @@ unsigned long vcpu_set_rr(struct kvm_vcpu *vcpu, unsigned long reg,
         return (IA64_NO_FAULT);
 }
 
-
-
 void kvm_mov_to_rr(struct kvm_vcpu *vcpu, INST64 inst)
 {
         unsigned long r3, r2;
@@ -1510,8 +1488,6 @@ void kvm_mov_to_pkr(struct kvm_vcpu *vcpu, INST64 inst)
         vcpu_set_pkr(vcpu, r3, r2);
 }
 
-
-
 void kvm_mov_from_rr(struct kvm_vcpu *vcpu, INST64 inst)
 {
         unsigned long r3, r1;
@@ -1557,7 +1533,6 @@ void kvm_mov_from_pmc(struct kvm_vcpu *vcpu, INST64 inst)
         vcpu_set_gr(vcpu, inst.M43.r1, r1, 0);
 }
 
-
 unsigned long vcpu_get_cpuid(struct kvm_vcpu *vcpu, unsigned long reg)
 {
         /* FIXME: This could get called as a result of a rsvd-reg fault */
@@ -1609,7 +1584,6 @@ unsigned long kvm_mov_to_cr(struct kvm_vcpu *vcpu, INST64 inst)
         return 0;
 }
 
-
 unsigned long kvm_mov_from_cr(struct kvm_vcpu *vcpu, INST64 inst)
 {
         unsigned long tgt = inst.M33.r1;
@@ -1633,8 +1607,6 @@ unsigned long kvm_mov_from_cr(struct kvm_vcpu *vcpu, INST64 inst)
         return 0;
 }
 
-
-
 void vcpu_set_psr(struct kvm_vcpu *vcpu, unsigned long val)
 {
 
@@ -1776,9 +1748,6 @@ void vcpu_bsw1(struct kvm_vcpu *vcpu)
         }
 }
 
-
-
-
 void vcpu_rfi(struct kvm_vcpu *vcpu)
 {
         unsigned long ifs, psr;
@@ -1796,7 +1765,6 @@ void vcpu_rfi(struct kvm_vcpu *vcpu)
         regs->cr_iip = VCPU(vcpu, iip);
 }
 
-
 /*
    VPSR can't keep track of below bits of guest PSR
    This function gets guest PSR
diff --git a/arch/ia64/kvm/vcpu.h b/arch/ia64/kvm/vcpu.h
index b2f12a562bdf..042af92ced83 100644
--- a/arch/ia64/kvm/vcpu.h
+++ b/arch/ia64/kvm/vcpu.h
@@ -703,7 +703,7 @@ extern u64 guest_vhpt_lookup(u64 iha, u64 *pte);
 extern void thash_purge_entries(struct kvm_vcpu *v, u64 va, u64 ps);
 extern void thash_purge_entries_remote(struct kvm_vcpu *v, u64 va, u64 ps);
 extern u64 translate_phy_pte(u64 *pte, u64 itir, u64 va);
-extern int thash_purge_and_insert(struct kvm_vcpu *v, u64 pte,
+extern void thash_purge_and_insert(struct kvm_vcpu *v, u64 pte,
                 u64 itir, u64 ifa, int type);
 extern void thash_purge_all(struct kvm_vcpu *v);
 extern struct thash_data *vtlb_lookup(struct kvm_vcpu *v,
@@ -738,7 +738,7 @@ void kvm_init_vhpt(struct kvm_vcpu *v);
 void thash_init(struct thash_cb *hcb, u64 sz);
 
 void panic_vm(struct kvm_vcpu *v, const char *fmt, ...);
-
+u64 kvm_gpa_to_mpa(u64 gpa);
 extern u64 ia64_call_vsa(u64 proc, u64 arg1, u64 arg2, u64 arg3,
                 u64 arg4, u64 arg5, u64 arg6, u64 arg7);
 
diff --git a/arch/ia64/kvm/vtlb.c b/arch/ia64/kvm/vtlb.c
index 6b6307a3bd55..38232b37668b 100644
--- a/arch/ia64/kvm/vtlb.c
+++ b/arch/ia64/kvm/vtlb.c
@@ -164,11 +164,11 @@ static void vhpt_insert(u64 pte, u64 itir, u64 ifa, u64 gpte)
         unsigned long ps, gpaddr;
 
         ps = itir_ps(itir);
+        rr.val = ia64_get_rr(ifa);
 
-        gpaddr = ((gpte & _PAGE_PPN_MASK) >> ps << ps) |
-                (ifa & ((1UL << ps) - 1));
+         gpaddr = ((gpte & _PAGE_PPN_MASK) >> ps << ps) |
+                                        (ifa & ((1UL << ps) - 1));
 
-        rr.val = ia64_get_rr(ifa);
         head = (struct thash_data *)ia64_thash(ifa);
         head->etag = INVALID_TI_TAG;
         ia64_mf();
@@ -412,16 +412,14 @@ u64 translate_phy_pte(u64 *pte, u64 itir, u64 va)
 
 /*
  * Purge overlap TCs and then insert the new entry to emulate itc ops.
- *    Notes: Only TC entry can purge and insert.
- *    1 indicates this is MMIO
+ * Notes: Only TC entry can purge and insert.
  */
-int thash_purge_and_insert(struct kvm_vcpu *v, u64 pte, u64 itir,
+void  thash_purge_and_insert(struct kvm_vcpu *v, u64 pte, u64 itir,
                                                 u64 ifa, int type)
 {
         u64 ps;
         u64 phy_pte, io_mask, index;
         union ia64_rr vrr, mrr;
-        int ret = 0;
 
         ps = itir_ps(itir);
         vrr.val = vcpu_get_rr(v, ifa);
@@ -441,25 +439,19 @@ int thash_purge_and_insert(struct kvm_vcpu *v, u64 pte, u64 itir,
                 phy_pte &= ~_PAGE_MA_MASK;
         }
 
-        if (pte & VTLB_PTE_IO)
-                ret = 1;
-
         vtlb_purge(v, ifa, ps);
         vhpt_purge(v, ifa, ps);
 
-        if (ps == mrr.ps) {
-                if (!(pte&VTLB_PTE_IO)) {
-                        vhpt_insert(phy_pte, itir, ifa, pte);
-                } else {
-                        vtlb_insert(v, pte, itir, ifa);
-                        vcpu_quick_region_set(VMX(v, tc_regions), ifa);
-                }
-        } else if (ps > mrr.ps) {
+        if ((ps != mrr.ps) || (pte & VTLB_PTE_IO)) {
                 vtlb_insert(v, pte, itir, ifa);
                 vcpu_quick_region_set(VMX(v, tc_regions), ifa);
-                if (!(pte&VTLB_PTE_IO))
-                        vhpt_insert(phy_pte, itir, ifa, pte);
-        } else {
+        }
+        if (pte & VTLB_PTE_IO)
+                return;
+
+        if (ps >= mrr.ps)
+                vhpt_insert(phy_pte, itir, ifa, pte);
+        else {
                 u64 psr;
                 phy_pte  &= ~PAGE_FLAGS_RV_MASK;
                 psr = ia64_clear_ic();
@@ -469,7 +461,6 @@ int thash_purge_and_insert(struct kvm_vcpu *v, u64 pte, u64 itir,
         if (!(pte&VTLB_PTE_IO))
                 mark_pages_dirty(v, pte, ps);
 
-        return ret;
 }
 
 /*
@@ -509,7 +500,6 @@ void thash_purge_all(struct kvm_vcpu *v)
         local_flush_tlb_all();
 }
 
-
 /*
  * Lookup the hash table and its collision chain to find an entry
  * covering this address rid:va or the entry.
@@ -517,7 +507,6 @@ void thash_purge_all(struct kvm_vcpu *v)
  * INPUT:
  *  in: TLB format for both VHPT & TLB.
  */
-
 struct thash_data *vtlb_lookup(struct kvm_vcpu *v, u64 va, int is_data)
 {
         struct thash_data  *cch;
@@ -547,7 +536,6 @@ struct thash_data *vtlb_lookup(struct kvm_vcpu *v, u64 va, int is_data)
         return NULL;
 }
 
-
 /*
  * Initialize internal control data before service.
  */
@@ -573,6 +561,10 @@ void thash_init(struct thash_cb *hcb, u64 sz)
 u64 kvm_get_mpt_entry(u64 gpfn)
 {
         u64 *base = (u64 *) KVM_P2M_BASE;
+
+        if (gpfn >= (KVM_P2M_SIZE >> 3))
+                panic_vm(current_vcpu, "Invalid gpfn =%lx\n", gpfn);
+
         return *(base + gpfn);
 }
 
@@ -589,7 +581,6 @@ u64 kvm_gpa_to_mpa(u64 gpa)
         return (pte >> PAGE_SHIFT << PAGE_SHIFT) | (gpa & ~PAGE_MASK);
 }
 
-
 /*
  * Fetch guest bundle code.
  * INPUT:
@@ -631,7 +622,6 @@ int fetch_code(struct kvm_vcpu *vcpu, u64 gip, IA64_BUNDLE *pbundle)
         return IA64_NO_FAULT;
 }
 
-
 void kvm_init_vhpt(struct kvm_vcpu *v)
 {
         v->arch.vhpt.num = VHPT_NUM_ENTRIES;
diff --git a/arch/m32r/kernel/irq.c b/arch/m32r/kernel/irq.c
index 2aeae4670098..8dfd31e87c4c 100644
--- a/arch/m32r/kernel/irq.c
+++ b/arch/m32r/kernel/irq.c
@@ -49,7 +49,7 @@ int show_interrupts(struct seq_file *p, void *v)
                 seq_printf(p, "%10u ", kstat_irqs(i));
 #else
                 for_each_online_cpu(j)
-                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
+                        seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
 #endif
                 seq_printf(p, " %14s", irq_desc[i].chip->typename);
                 seq_printf(p, "  %s", action->name);
diff --git a/arch/m68k/Makefile b/arch/m68k/Makefile
index 8133dbc44964..570d85c3f97f 100644
--- a/arch/m68k/Makefile
+++ b/arch/m68k/Makefile
@@ -117,3 +117,6 @@ endif
 
 archclean:
         rm -f vmlinux.gz vmlinux.bz2
+
+install:
+        sh $(srctree)/arch/m68k/install.sh $(KERNELRELEASE) vmlinux.gz System.map "$(INSTALL_PATH)"
diff --git a/arch/m68k/include/asm/irq_mm.h b/arch/m68k/include/asm/irq_mm.h
index 226bfc0f21b1..0cab42cad79e 100644
--- a/arch/m68k/include/asm/irq_mm.h
+++ b/arch/m68k/include/asm/irq_mm.h
@@ -3,6 +3,7 @@
 
 #include <linux/linkage.h>
 #include <linux/hardirq.h>
+#include <linux/irqreturn.h>
 #include <linux/spinlock_types.h>
 
 /*
@@ -80,7 +81,7 @@ struct pt_regs;
  * interrupt source (if it supports chaining).
  */
 typedef struct irq_node {
-        int             (*handler)(int, void *);
+        irqreturn_t     (*handler)(int, void *);
         void            *dev_id;
         struct irq_node *next;
         unsigned long   flags;
diff --git a/arch/m68k/include/asm/macintosh.h b/arch/m68k/include/asm/macintosh.h
index 05309f7e3d06..50db3591ca15 100644
--- a/arch/m68k/include/asm/macintosh.h
+++ b/arch/m68k/include/asm/macintosh.h
@@ -34,6 +34,7 @@ struct mac_model
         char scc_type;
         char ether_type;
         char nubus_type;
+        char floppy_type;
 };
 
 #define MAC_ADB_NONE            0
@@ -71,6 +72,12 @@ struct mac_model
 #define MAC_NO_NUBUS            0
 #define MAC_NUBUS               1
 
+#define MAC_FLOPPY_IWM          0
+#define MAC_FLOPPY_SWIM_ADDR1   1
+#define MAC_FLOPPY_SWIM_ADDR2   2
+#define MAC_FLOPPY_SWIM_IOP     3
+#define MAC_FLOPPY_AV           4
+
 /*
  *      Gestalt numbers
  */
diff --git a/arch/m68k/include/asm/socket.h b/arch/m68k/include/asm/socket.h
index dbc64e92c41a..ca87f938b03f 100644
--- a/arch/m68k/include/asm/socket.h
+++ b/arch/m68k/include/asm/socket.h
@@ -54,4 +54,7 @@
 
 #define SO_MARK                 36
 
+#define SO_TIMESTAMPING         37
+#define SCM_TIMESTAMPING        SO_TIMESTAMPING
+
 #endif /* _ASM_SOCKET_H */
diff --git a/arch/m68k/install.sh b/arch/m68k/install.sh
new file mode 100644
index 000000000000..9c6bae6112e3
--- /dev/null
+++ b/arch/m68k/install.sh
@@ -0,0 +1,52 @@
+#!/bin/sh
+#
+# This file is subject to the terms and conditions of the GNU General Public
+# License.  See the file "COPYING" in the main directory of this archive
+# for more details.
+#
+# Copyright (C) 1995 by Linus Torvalds
+#
+# Adapted from code in arch/i386/boot/Makefile by H. Peter Anvin
+#
+# "make install" script for m68k architecture
+#
+# Arguments:
+#   $1 - kernel version
+#   $2 - kernel image file
+#   $3 - kernel map file
+#   $4 - default install path (blank if root directory)
+#
+
+verify () {
+        if [ ! -f "$1" ]; then
+                echo ""                                                   1>&2
+                echo " *** Missing file: $1"                              1>&2
+                echo ' *** You need to run "make" before "make install".' 1>&2
+                echo ""                                                   1>&2
+                exit 1
+        fi
+}
+
+# Make sure the files actually exist
+verify "$2"
+verify "$3"
+
+# User may have a custom install script
+
+if [ -x ~/bin/${CROSS_COMPILE}installkernel ]; then exec ~/bin/${CROSS_COMPILE}installkernel "$@"; fi
+if [ -x /sbin/${CROSS_COMPILE}installkernel ]; then exec /sbin/${CROSS_COMPILE}installkernel "$@"; fi
+
+# Default install - same as make zlilo
+
+if [ -f $4/vmlinuz ]; then
+        mv $4/vmlinuz $4/vmlinuz.old
+fi
+
+if [ -f $4/System.map ]; then
+        mv $4/System.map $4/System.old
+fi
+
+cat $2 > $4/vmlinuz
+cp $3 $4/System.map
+
+sync
diff --git a/arch/m68k/mac/config.c b/arch/m68k/mac/config.c
index 98b6bcfb37bf..be017984a456 100644
--- a/arch/m68k/mac/config.c
+++ b/arch/m68k/mac/config.c
@@ -22,6 +22,7 @@
 /* keyb */
 #include <linux/init.h>
 #include <linux/vt_kern.h>
+#include <linux/platform_device.h>
 
 #define BOOTINFO_COMPAT_1_0
 #include <asm/setup.h>
@@ -43,6 +44,10 @@
 #include <asm/mac_oss.h>
 #include <asm/mac_psc.h>
 
+/* platform device info */
+
+#define SWIM_IO_SIZE 0x2000     /* SWIM IO resource size */
+
 /* Mac bootinfo struct */
 
 struct mac_booter_data mac_bi_data;
@@ -224,7 +229,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_II,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_IWM
         },
 
         /*
@@ -239,7 +245,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_II,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_IWM
         }, {
                 .ident          = MAC_MODEL_IIX,
                 .name           = "IIx",
@@ -247,7 +254,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_II,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_IICX,
                 .name           = "IIcx",
@@ -255,7 +263,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_II,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_SE30,
                 .name           = "SE/30",
@@ -263,7 +272,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_II,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         },
 
         /*
@@ -280,7 +290,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_IIFX,
                 .name           = "IIfx",
@@ -288,7 +299,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_IOP,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_IOP
         }, {
                 .ident          = MAC_MODEL_IISI,
                 .name           = "IIsi",
@@ -296,7 +308,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_IIVI,
                 .name           = "IIvi",
@@ -304,7 +317,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_IIVX,
                 .name           = "IIvx",
@@ -312,7 +326,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         },
 
         /*
@@ -326,7 +341,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_CCL,
                 .name           = "Color Classic",
@@ -334,7 +350,9 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS},
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
+        },
 
         /*
          *      Some Mac LC machines. Basically the same as the IIci, ADB like IIsi
@@ -347,7 +365,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_LCII,
                 .name           = "LC II",
@@ -355,7 +374,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_LCIII,
                 .name           = "LC III",
@@ -363,7 +383,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         },
 
         /*
@@ -383,7 +404,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_QUADRA,
                 .scsi_type      = MAC_SCSI_QUADRA,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR1
         }, {
                 .ident          = MAC_MODEL_Q605_ACC,
                 .name           = "Quadra 605",
@@ -391,7 +413,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_QUADRA,
                 .scsi_type      = MAC_SCSI_QUADRA,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR1
         }, {
                 .ident          = MAC_MODEL_Q610,
                 .name           = "Quadra 610",
@@ -400,7 +423,8 @@ static struct mac_model mac_data_table[] = {
                 .scsi_type      = MAC_SCSI_QUADRA,
                 .scc_type       = MAC_SCC_QUADRA,
                 .ether_type     = MAC_ETHER_SONIC,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR1
         }, {
                 .ident          = MAC_MODEL_Q630,
                 .name           = "Quadra 630",
@@ -410,7 +434,8 @@ static struct mac_model mac_data_table[] = {
                 .ide_type       = MAC_IDE_QUADRA,
                 .scc_type       = MAC_SCC_QUADRA,
                 .ether_type     = MAC_ETHER_SONIC,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR1
         }, {
                 .ident          = MAC_MODEL_Q650,
                 .name           = "Quadra 650",
@@ -419,7 +444,8 @@ static struct mac_model mac_data_table[] = {
                 .scsi_type      = MAC_SCSI_QUADRA,
                 .scc_type       = MAC_SCC_QUADRA,
                 .ether_type     = MAC_ETHER_SONIC,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR1
         },
         /*      The Q700 does have a NS Sonic */
         {
@@ -430,7 +456,8 @@ static struct mac_model mac_data_table[] = {
                 .scsi_type      = MAC_SCSI_QUADRA2,
                 .scc_type       = MAC_SCC_QUADRA,
                 .ether_type     = MAC_ETHER_SONIC,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR1
         }, {
                 .ident          = MAC_MODEL_Q800,
                 .name           = "Quadra 800",
@@ -439,7 +466,8 @@ static struct mac_model mac_data_table[] = {
                 .scsi_type      = MAC_SCSI_QUADRA,
                 .scc_type       = MAC_SCC_QUADRA,
                 .ether_type     = MAC_ETHER_SONIC,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR1
         }, {
                 .ident          = MAC_MODEL_Q840,
                 .name           = "Quadra 840AV",
@@ -448,7 +476,8 @@ static struct mac_model mac_data_table[] = {
                 .scsi_type      = MAC_SCSI_QUADRA3,
                 .scc_type       = MAC_SCC_PSC,
                 .ether_type     = MAC_ETHER_MACE,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_AV
         }, {
                 .ident          = MAC_MODEL_Q900,
                 .name           = "Quadra 900",
@@ -457,7 +486,8 @@ static struct mac_model mac_data_table[] = {
                 .scsi_type      = MAC_SCSI_QUADRA2,
                 .scc_type       = MAC_SCC_IOP,
                 .ether_type     = MAC_ETHER_SONIC,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_IOP
         }, {
                 .ident          = MAC_MODEL_Q950,
                 .name           = "Quadra 950",
@@ -466,7 +496,8 @@ static struct mac_model mac_data_table[] = {
                 .scsi_type      = MAC_SCSI_QUADRA2,
                 .scc_type       = MAC_SCC_IOP,
                 .ether_type     = MAC_ETHER_SONIC,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_IOP
         },
 
         /*
@@ -480,7 +511,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_P475,
                 .name           =  "Performa 475",
@@ -488,7 +520,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_QUADRA,
                 .scsi_type      = MAC_SCSI_QUADRA,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR1
         }, {
                 .ident          = MAC_MODEL_P475F,
                 .name           =  "Performa 475",
@@ -496,7 +529,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_QUADRA,
                 .scsi_type      = MAC_SCSI_QUADRA,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR1
         }, {
                 .ident          = MAC_MODEL_P520,
                 .name           =  "Performa 520",
@@ -504,7 +538,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_P550,
                 .name           =  "Performa 550",
@@ -512,7 +547,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         },
         /* These have the comm slot, and therefore the possibility of SONIC ethernet */
         {
@@ -523,7 +559,8 @@ static struct mac_model mac_data_table[] = {
                 .scsi_type      = MAC_SCSI_QUADRA,
                 .scc_type       = MAC_SCC_II,
                 .ether_type     = MAC_ETHER_SONIC,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR1
         }, {
                 .ident          = MAC_MODEL_P588,
                 .name           = "Performa 588",
@@ -533,7 +570,8 @@ static struct mac_model mac_data_table[] = {
                 .ide_type       = MAC_IDE_QUADRA,
                 .scc_type       = MAC_SCC_II,
                 .ether_type     = MAC_ETHER_SONIC,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR1
         }, {
                 .ident          = MAC_MODEL_TV,
                 .name           = "TV",
@@ -541,7 +579,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_QUADRA,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_P600,
                 .name           = "Performa 600",
@@ -549,7 +588,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_II,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         },
 
         /*
@@ -565,7 +605,8 @@ static struct mac_model mac_data_table[] = {
                 .scsi_type      = MAC_SCSI_QUADRA,
                 .scc_type       = MAC_SCC_QUADRA,
                 .ether_type     = MAC_ETHER_SONIC,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR1
         }, {
                 .ident          = MAC_MODEL_C650,
                 .name           = "Centris 650",
@@ -574,7 +615,8 @@ static struct mac_model mac_data_table[] = {
                 .scsi_type      = MAC_SCSI_QUADRA,
                 .scc_type       = MAC_SCC_QUADRA,
                 .ether_type     = MAC_ETHER_SONIC,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR1
         }, {
                 .ident          = MAC_MODEL_C660,
                 .name           = "Centris 660AV",
@@ -583,7 +625,8 @@ static struct mac_model mac_data_table[] = {
                 .scsi_type      = MAC_SCSI_QUADRA3,
                 .scc_type       = MAC_SCC_PSC,
                 .ether_type     = MAC_ETHER_MACE,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_AV
         },
 
         /*
@@ -599,7 +642,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_QUADRA,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_PB145,
                 .name           = "PowerBook 145",
@@ -607,7 +651,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_QUADRA,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_PB150,
                 .name           = "PowerBook 150",
@@ -616,7 +661,8 @@ static struct mac_model mac_data_table[] = {
                 .scsi_type      = MAC_SCSI_OLD,
                 .ide_type       = MAC_IDE_PB,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_PB160,
                 .name           = "PowerBook 160",
@@ -624,7 +670,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_QUADRA,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_PB165,
                 .name           = "PowerBook 165",
@@ -632,7 +679,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_QUADRA,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_PB165C,
                 .name           = "PowerBook 165c",
@@ -640,7 +688,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_QUADRA,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_PB170,
                 .name           = "PowerBook 170",
@@ -648,7 +697,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_QUADRA,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_PB180,
                 .name           = "PowerBook 180",
@@ -656,7 +706,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_QUADRA,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_PB180C,
                 .name           = "PowerBook 180c",
@@ -664,7 +715,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_QUADRA,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_PB190,
                 .name           = "PowerBook 190",
@@ -673,7 +725,8 @@ static struct mac_model mac_data_table[] = {
                 .scsi_type      = MAC_SCSI_OLD,
                 .ide_type       = MAC_IDE_BABOON,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_PB520,
                 .name           = "PowerBook 520",
@@ -682,7 +735,8 @@ static struct mac_model mac_data_table[] = {
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
                 .ether_type     = MAC_ETHER_SONIC,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         },
 
         /*
@@ -702,7 +756,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_PB230,
                 .name           = "PowerBook Duo 230",
@@ -710,7 +765,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_PB250,
                 .name           = "PowerBook Duo 250",
@@ -718,7 +774,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_PB270C,
                 .name           = "PowerBook Duo 270c",
@@ -726,7 +783,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_PB280,
                 .name           = "PowerBook Duo 280",
@@ -734,7 +792,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         }, {
                 .ident          = MAC_MODEL_PB280C,
                 .name           = "PowerBook Duo 280c",
@@ -742,7 +801,8 @@ static struct mac_model mac_data_table[] = {
                 .via_type       = MAC_VIA_IIci,
                 .scsi_type      = MAC_SCSI_OLD,
                 .scc_type       = MAC_SCC_QUADRA,
-                .nubus_type     = MAC_NUBUS
+                .nubus_type     = MAC_NUBUS,
+                .floppy_type    = MAC_FLOPPY_SWIM_ADDR2
         },
 
         /*
@@ -815,3 +875,42 @@ static void mac_get_model(char *str)
         strcpy(str, "Macintosh ");
         strcat(str, macintosh_config->name);
 }
+
+static struct resource swim_resources[1];
+
+static struct platform_device swim_device = {
+        .name           = "swim",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(swim_resources),
+        .resource       = swim_resources,
+};
+
+static struct platform_device *mac_platform_devices[] __initdata = {
+        &swim_device
+};
+
+int __init mac_platform_init(void)
+{
+        u8 *swim_base;
+
+        switch (macintosh_config->floppy_type) {
+        case MAC_FLOPPY_SWIM_ADDR1:
+                swim_base = (u8 *)(VIA1_BASE + 0x1E000);
+                break;
+        case MAC_FLOPPY_SWIM_ADDR2:
+                swim_base = (u8 *)(VIA1_BASE + 0x16000);
+                break;
+        default:
+                return 0;
+        }
+
+        swim_resources[0].name = "swim-regs";
+        swim_resources[0].start = (resource_size_t)swim_base;
+        swim_resources[0].end = (resource_size_t)(swim_base + SWIM_IO_SIZE);
+        swim_resources[0].flags = IORESOURCE_MEM;
+
+        return platform_add_devices(mac_platform_devices,
+                                    ARRAY_SIZE(mac_platform_devices));
+}
+
+arch_initcall(mac_platform_init);
diff --git a/arch/m68k/mac/via.c b/arch/m68k/mac/via.c
index 7d97ba54536e..11bce3cb6482 100644
--- a/arch/m68k/mac/via.c
+++ b/arch/m68k/mac/via.c
@@ -645,3 +645,12 @@ int via_irq_pending(int irq)
         }
         return 0;
 }
+
+void via1_set_head(int head)
+{
+        if (head == 0)
+                via1[vBufA] &= ~VIA1A_vHeadSel;
+        else
+                via1[vBufA] |= VIA1A_vHeadSel;
+}
+EXPORT_SYMBOL(via1_set_head);
diff --git a/arch/m68knommu/platform/520x/config.c b/arch/m68knommu/platform/520x/config.c
index 06d887cdcbfb..855fc6a79d72 100644
--- a/arch/m68knommu/platform/520x/config.c
+++ b/arch/m68knommu/platform/520x/config.c
@@ -49,8 +49,39 @@ static struct platform_device m520x_uart = {
         .dev.platform_data      = m520x_uart_platform,
 };
 
+static struct resource m520x_fec_resources[] = {
+        {
+                .start          = MCF_MBAR + 0x30000,
+                .end            = MCF_MBAR + 0x30000 + 0x7ff,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = 64 + 36,
+                .end            = 64 + 36,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 64 + 40,
+                .end            = 64 + 40,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 64 + 42,
+                .end            = 64 + 42,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device m520x_fec = {
+        .name                   = "fec",
+        .id                     = 0,
+        .num_resources          = ARRAY_SIZE(m520x_fec_resources),
+        .resource               = m520x_fec_resources,
+};
+
 static struct platform_device *m520x_devices[] __initdata = {
         &m520x_uart,
+        &m520x_fec,
 };
 
 /***************************************************************************/
@@ -103,6 +134,30 @@ static void __init m520x_uarts_init(void)
 
 /***************************************************************************/
 
+static void __init m520x_fec_init(void)
+{
+        u32 imr;
+        u8 v;
+
+        /* Unmask FEC interrupts at ColdFire interrupt controller */
+        writeb(0x4, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 36);
+        writeb(0x4, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 40);
+        writeb(0x4, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 42);
+
+        imr = readl(MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
+        imr &= ~0x0001FFF0;
+        writel(imr, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
+
+        /* Set multi-function pins to ethernet mode */
+        v = readb(MCF_IPSBAR + MCF_GPIO_PAR_FEC);
+        writeb(v | 0xf0, MCF_IPSBAR + MCF_GPIO_PAR_FEC);
+
+        v = readb(MCF_IPSBAR + MCF_GPIO_PAR_FECI2C);
+        writeb(v | 0x0f, MCF_IPSBAR + MCF_GPIO_PAR_FECI2C);
+}
+
+/***************************************************************************/
+
 /*
  *  Program the vector to be an auto-vectored.
  */
@@ -118,6 +173,7 @@ void __init config_BSP(char *commandp, int size)
 {
         mach_reset = coldfire_reset;
         m520x_uarts_init();
+        m520x_fec_init();
 }
 
 /***************************************************************************/
diff --git a/arch/m68knommu/platform/523x/config.c b/arch/m68knommu/platform/523x/config.c
index 13f02611ea23..74133f27b30c 100644
--- a/arch/m68knommu/platform/523x/config.c
+++ b/arch/m68knommu/platform/523x/config.c
@@ -50,8 +50,39 @@ static struct platform_device m523x_uart = {
         .dev.platform_data      = m523x_uart_platform,
 };
 
+static struct resource m523x_fec_resources[] = {
+        {
+                .start          = MCF_MBAR + 0x1000,
+                .end            = MCF_MBAR + 0x1000 + 0x7ff,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = 64 + 23,
+                .end            = 64 + 23,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 64 + 27,
+                .end            = 64 + 27,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 64 + 29,
+                .end            = 64 + 29,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device m523x_fec = {
+        .name                   = "fec",
+        .id                     = 0,
+        .num_resources          = ARRAY_SIZE(m523x_fec_resources),
+        .resource               = m523x_fec_resources,
+};
+
 static struct platform_device *m523x_devices[] __initdata = {
         &m523x_uart,
+        &m523x_fec,
 };
 
 /***************************************************************************/
@@ -83,6 +114,25 @@ static void __init m523x_uarts_init(void)
 
 /***************************************************************************/
 
+static void __init m523x_fec_init(void)
+{
+        u32 imr;
+
+        /* Unmask FEC interrupts at ColdFire interrupt controller */
+        writeb(0x28, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 23);
+        writeb(0x27, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 27);
+        writeb(0x26, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 29);
+
+        imr = readl(MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
+        imr &= ~0xf;
+        writel(imr, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
+        imr = readl(MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL);
+        imr &= ~0xff800001;
+        writel(imr, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL);
+}
+
+/***************************************************************************/
+
 void mcf_disableall(void)
 {
         *((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH)) = 0xffffffff;
@@ -103,6 +153,7 @@ void __init config_BSP(char *commandp, int size)
         mcf_disableall();
         mach_reset = coldfire_reset;
         m523x_uarts_init();
+        m523x_fec_init();
 }
 
 /***************************************************************************/
diff --git a/arch/m68knommu/platform/5272/config.c b/arch/m68knommu/platform/5272/config.c
index 230bae691a7f..e049245f4092 100644
--- a/arch/m68knommu/platform/5272/config.c
+++ b/arch/m68knommu/platform/5272/config.c
@@ -55,8 +55,39 @@ static struct platform_device m5272_uart = {
         .dev.platform_data      = m5272_uart_platform,
 };
 
+static struct resource m5272_fec_resources[] = {
+        {
+                .start          = MCF_MBAR + 0x840,
+                .end            = MCF_MBAR + 0x840 + 0x1cf,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = 86,
+                .end            = 86,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 87,
+                .end            = 87,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 88,
+                .end            = 88,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device m5272_fec = {
+        .name                   = "fec",
+        .id                     = 0,
+        .num_resources          = ARRAY_SIZE(m5272_fec_resources),
+        .resource               = m5272_fec_resources,
+};
+
 static struct platform_device *m5272_devices[] __initdata = {
         &m5272_uart,
+        &m5272_fec,
 };
 
 /***************************************************************************/
@@ -91,6 +122,22 @@ static void __init m5272_uarts_init(void)
 
 /***************************************************************************/
 
+static void __init m5272_fec_init(void)
+{
+        u32 imr;
+
+        /* Unmask FEC interrupts at ColdFire interrupt controller */
+        imr = readl(MCF_MBAR + MCFSIM_ICR3);
+        imr = (imr & ~0x00000fff) | 0x00000ddd;
+        writel(imr, MCF_MBAR + MCFSIM_ICR3);
+
+        imr = readl(MCF_MBAR + MCFSIM_ICR1);
+        imr = (imr & ~0x0f000000) | 0x0d000000;
+        writel(imr, MCF_MBAR + MCFSIM_ICR1);
+}
+
+/***************************************************************************/
+
 void mcf_disableall(void)
 {
         volatile unsigned long  *icrp;
@@ -155,6 +202,7 @@ void __init config_BSP(char *commandp, int size)
 static int __init init_BSP(void)
 {
         m5272_uarts_init();
+        m5272_fec_init();
         platform_add_devices(m5272_devices, ARRAY_SIZE(m5272_devices));
         return 0;
 }
diff --git a/arch/m68knommu/platform/527x/config.c b/arch/m68knommu/platform/527x/config.c
index 73cd1aef4a90..49343fb157b0 100644
--- a/arch/m68knommu/platform/527x/config.c
+++ b/arch/m68knommu/platform/527x/config.c
@@ -50,8 +50,73 @@ static struct platform_device m527x_uart = {
         .dev.platform_data      = m527x_uart_platform,
 };
 
+static struct resource m527x_fec0_resources[] = {
+        {
+                .start          = MCF_MBAR + 0x1000,
+                .end            = MCF_MBAR + 0x1000 + 0x7ff,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = 64 + 23,
+                .end            = 64 + 23,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 64 + 27,
+                .end            = 64 + 27,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 64 + 29,
+                .end            = 64 + 29,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct resource m527x_fec1_resources[] = {
+        {
+                .start          = MCF_MBAR + 0x1800,
+                .end            = MCF_MBAR + 0x1800 + 0x7ff,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = 128 + 23,
+                .end            = 128 + 23,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 128 + 27,
+                .end            = 128 + 27,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 128 + 29,
+                .end            = 128 + 29,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device m527x_fec[] = {
+        {
+                .name           = "fec",
+                .id             = 0,
+                .num_resources  = ARRAY_SIZE(m527x_fec0_resources),
+                .resource       = m527x_fec0_resources,
+        },
+        {
+                .name           = "fec",
+                .id             = 1,
+                .num_resources  = ARRAY_SIZE(m527x_fec1_resources),
+                .resource       = m527x_fec1_resources,
+        },
+};
+
 static struct platform_device *m527x_devices[] __initdata = {
         &m527x_uart,
+        &m527x_fec[0],
+#ifdef CONFIG_FEC2
+        &m527x_fec[1],
+#endif
 };
 
 /***************************************************************************/
@@ -97,6 +162,51 @@ static void __init m527x_uarts_init(void)
 
 /***************************************************************************/
 
+static void __init m527x_fec_irq_init(int nr)
+{
+        unsigned long base;
+        u32 imr;
+
+        base = MCF_IPSBAR + (nr ? MCFICM_INTC1 : MCFICM_INTC0);
+
+        writeb(0x28, base + MCFINTC_ICR0 + 23);
+        writeb(0x27, base + MCFINTC_ICR0 + 27);
+        writeb(0x26, base + MCFINTC_ICR0 + 29);
+
+        imr = readl(base + MCFINTC_IMRH);
+        imr &= ~0xf;
+        writel(imr, base + MCFINTC_IMRH);
+        imr = readl(base + MCFINTC_IMRL);
+        imr &= ~0xff800001;
+        writel(imr, base + MCFINTC_IMRL);
+}
+
+static void __init m527x_fec_init(void)
+{
+        u16 par;
+        u8 v;
+
+        m527x_fec_irq_init(0);
+
+        /* Set multi-function pins to ethernet mode for fec0 */
+        par = readw(MCF_IPSBAR + 0x100082);
+        writew(par | 0xf00, MCF_IPSBAR + 0x100082);
+        v = readb(MCF_IPSBAR + 0x100078);
+        writeb(v | 0xc0, MCF_IPSBAR + 0x100078);
+
+#ifdef CONFIG_FEC2
+        m527x_fec_irq_init(1);
+
+        /* Set multi-function pins to ethernet mode for fec1 */
+        par = readw(MCF_IPSBAR + 0x100082);
+        writew(par | 0xa0, MCF_IPSBAR + 0x100082);
+        v = readb(MCF_IPSBAR + 0x100079);
+        writeb(v | 0xc0, MCF_IPSBAR + 0x100079);
+#endif
+}
+
+/***************************************************************************/
+
 void mcf_disableall(void)
 {
         *((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH)) = 0xffffffff;
@@ -116,13 +226,14 @@ void __init config_BSP(char *commandp, int size)
 {
         mcf_disableall();
         mach_reset = coldfire_reset;
+        m527x_uarts_init();
+        m527x_fec_init();
 }
 
 /***************************************************************************/
 
 static int __init init_BSP(void)
 {
-        m527x_uarts_init();
         platform_add_devices(m527x_devices, ARRAY_SIZE(m527x_devices));
         return 0;
 }
diff --git a/arch/m68knommu/platform/528x/config.c b/arch/m68knommu/platform/528x/config.c
index 44baeb225dc7..bee526f4d1af 100644
--- a/arch/m68knommu/platform/528x/config.c
+++ b/arch/m68knommu/platform/528x/config.c
@@ -57,8 +57,40 @@ static struct platform_device m528x_uart = {
         .dev.platform_data      = m528x_uart_platform,
 };
 
+static struct resource m528x_fec_resources[] = {
+        {
+                .start          = MCF_MBAR + 0x1000,
+                .end            = MCF_MBAR + 0x1000 + 0x7ff,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = 64 + 23,
+                .end            = 64 + 23,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 64 + 27,
+                .end            = 64 + 27,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 64 + 29,
+                .end            = 64 + 29,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device m528x_fec = {
+        .name                   = "fec",
+        .id                     = 0,
+        .num_resources          = ARRAY_SIZE(m528x_fec_resources),
+        .resource               = m528x_fec_resources,
+};
+
+
 static struct platform_device *m528x_devices[] __initdata = {
         &m528x_uart,
+        &m528x_fec,
 };
 
 /***************************************************************************/
@@ -99,6 +131,31 @@ static void __init m528x_uarts_init(void)
 
 /***************************************************************************/
 
+static void __init m528x_fec_init(void)
+{
+        u32 imr;
+        u16 v16;
+
+        /* Unmask FEC interrupts at ColdFire interrupt controller */
+        writeb(0x28, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 23);
+        writeb(0x27, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 27);
+        writeb(0x26, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 29);
+
+        imr = readl(MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
+        imr &= ~0xf;
+        writel(imr, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
+        imr = readl(MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL);
+        imr &= ~0xff800001;
+        writel(imr, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL);
+
+        /* Set multi-function pins to ethernet mode for fec0 */
+        v16 = readw(MCF_IPSBAR + 0x100056);
+        writew(v16 | 0xf00, MCF_IPSBAR + 0x100056);
+        writeb(0xc0, MCF_IPSBAR + 0x100058);
+}
+
+/***************************************************************************/
+
 void mcf_disableall(void)
 {
         *((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH)) = 0xffffffff;
@@ -158,6 +215,7 @@ void __init config_BSP(char *commandp, int size)
 static int __init init_BSP(void)
 {
         m528x_uarts_init();
+        m528x_fec_init();
         platform_add_devices(m528x_devices, ARRAY_SIZE(m528x_devices));
         return 0;
 }
diff --git a/arch/m68knommu/platform/532x/config.c b/arch/m68knommu/platform/532x/config.c
index a347623d6ee6..591f2f801134 100644
--- a/arch/m68knommu/platform/532x/config.c
+++ b/arch/m68knommu/platform/532x/config.c
@@ -61,8 +61,38 @@ static struct platform_device m532x_uart = {
         .dev.platform_data      = m532x_uart_platform,
 };
 
+static struct resource m532x_fec_resources[] = {
+        {
+                .start          = 0xfc030000,
+                .end            = 0xfc0307ff,
+                .flags          = IORESOURCE_MEM,
+        },
+        {
+                .start          = 64 + 36,
+                .end            = 64 + 36,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 64 + 40,
+                .end            = 64 + 40,
+                .flags          = IORESOURCE_IRQ,
+        },
+        {
+                .start          = 64 + 42,
+                .end            = 64 + 42,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device m532x_fec = {
+        .name                   = "fec",
+        .id                     = 0,
+        .num_resources          = ARRAY_SIZE(m532x_fec_resources),
+        .resource               = m532x_fec_resources,
+};
 static struct platform_device *m532x_devices[] __initdata = {
         &m532x_uart,
+        &m532x_fec,
 };
 
 /***************************************************************************/
@@ -93,6 +123,24 @@ static void __init m532x_uarts_init(void)
         for (line = 0; (line < nrlines); line++)
                 m532x_uart_init_line(line, m532x_uart_platform[line].irq);
 }
+/***************************************************************************/
+
+static void __init m532x_fec_init(void)
+{
+        /* Unmask FEC interrupts at ColdFire interrupt controller */
+        MCF_INTC0_ICR36 = 0x2;
+        MCF_INTC0_ICR40 = 0x2;
+        MCF_INTC0_ICR42 = 0x2;
+
+        MCF_INTC0_IMRH &= ~(MCF_INTC_IMRH_INT_MASK36 |
+                MCF_INTC_IMRH_INT_MASK40 | MCF_INTC_IMRH_INT_MASK42);
+
+        /* Set multi-function pins to ethernet mode for fec0 */
+        MCF_GPIO_PAR_FECI2C |= (MCF_GPIO_PAR_FECI2C_PAR_MDC_EMDC |
+                MCF_GPIO_PAR_FECI2C_PAR_MDIO_EMDIO);
+        MCF_GPIO_PAR_FEC = (MCF_GPIO_PAR_FEC_PAR_FEC_7W_FEC |
+                MCF_GPIO_PAR_FEC_PAR_FEC_MII_FEC);
+}
 
 /***************************************************************************/
 
@@ -150,6 +198,7 @@ void __init config_BSP(char *commandp, int size)
 static int __init init_BSP(void)
 {
         m532x_uarts_init();
+        m532x_fec_init();
         platform_add_devices(m532x_devices, ARRAY_SIZE(m532x_devices));
         return 0;
 }
diff --git a/arch/mips/basler/excite/excite_iodev.c b/arch/mips/basler/excite/excite_iodev.c
index a1e3526b4a94..dfbfd7e2ac08 100644
--- a/arch/mips/basler/excite/excite_iodev.c
+++ b/arch/mips/basler/excite/excite_iodev.c
@@ -33,8 +33,8 @@
 
 
 static const struct resource *iodev_get_resource(struct platform_device *, const char *, unsigned int);
-static int __init iodev_probe(struct device *);
-static int __exit iodev_remove(struct device *);
+static int __init iodev_probe(struct platform_device *);
+static int __exit iodev_remove(struct platform_device *);
 static int iodev_open(struct inode *, struct file *);
 static int iodev_release(struct inode *, struct file *);
 static ssize_t iodev_read(struct file *, char __user *, size_t s, loff_t *);
@@ -65,13 +65,13 @@ static struct miscdevice miscdev =
         .fops           = &fops
 };
 
-static struct device_driver iodev_driver =
-{
-        .name           = (char *) iodev_name,
-        .bus            = &platform_bus_type,
-        .owner          = THIS_MODULE,
+static struct platform_driver iodev_driver = {
+        .driver = {
+                .name           = iodev_name,
+                .owner          = THIS_MODULE,
+        },
         .probe          = iodev_probe,
-        .remove         = __exit_p(iodev_remove)
+        .remove         = __devexit_p(iodev_remove),
 };
 
 
@@ -89,11 +89,10 @@ iodev_get_resource(struct platform_device *pdv, const char *name,
 
 
 /* No hotplugging on the platform bus - use __init */
-static int __init iodev_probe(struct device *dev)
+static int __init iodev_probe(struct platform_device *dev)
 {
-        struct platform_device * const pdv = to_platform_device(dev);
         const struct resource * const ri =
-                iodev_get_resource(pdv, IODEV_RESOURCE_IRQ, IORESOURCE_IRQ);
+                iodev_get_resource(dev, IODEV_RESOURCE_IRQ, IORESOURCE_IRQ);
 
         if (unlikely(!ri))
                 return -ENXIO;
@@ -104,7 +103,7 @@ static int __init iodev_probe(struct device *dev)
 
 
 
-static int __exit iodev_remove(struct device *dev)
+static int __exit iodev_remove(struct platform_device *dev)
 {
         return misc_deregister(&miscdev);
 }
@@ -160,14 +159,14 @@ static irqreturn_t iodev_irqhdl(int irq, void *ctxt)
 
 static int __init iodev_init_module(void)
 {
-        return driver_register(&iodev_driver);
+        return platform_driver_register(&iodev_driver);
 }
 
 
 
 static void __exit iodev_cleanup_module(void)
 {
-        driver_unregister(&iodev_driver);
+        platform_driver_unregister(&iodev_driver);
 }
 
 module_init(iodev_init_module);
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index 0417516503f6..526f327475ce 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -1391,11 +1391,11 @@ static inline void tlb_write_random(void)
 static inline unsigned int                                      \
 set_c0_##name(unsigned int set)                                 \
 {                                                               \
-        unsigned int res;                                       \
+        unsigned int res, new;                                  \
                                                                 \
         res = read_c0_##name();                                 \
-        res |= set;                                             \
-        write_c0_##name(res);                                   \
+        new = res | set;                                        \
+        write_c0_##name(new);                                   \
                                                                 \
         return res;                                             \
 }                                                               \
@@ -1403,24 +1403,24 @@ set_c0_##name(unsigned int set)					\
 static inline unsigned int                                      \
 clear_c0_##name(unsigned int clear)                             \
 {                                                               \
-        unsigned int res;                                       \
+        unsigned int res, new;                                  \
                                                                 \
         res = read_c0_##name();                                 \
-        res &= ~clear;                                          \
-        write_c0_##name(res);                                   \
+        new = res & ~clear;                                     \
+        write_c0_##name(new);                                   \
                                                                 \
         return res;                                             \
 }                                                               \
                                                                 \
 static inline unsigned int                                      \
-change_c0_##name(unsigned int change, unsigned int new)         \
+change_c0_##name(unsigned int change, unsigned int val)         \
 {                                                               \
-        unsigned int res;                                       \
+        unsigned int res, new;                                  \
                                                                 \
         res = read_c0_##name();                                 \
-        res &= ~change;                                         \
-        res |= (new & change);                                  \
-        write_c0_##name(res);                                   \
+        new = res & ~change;                                    \
+        new |= (val & change);                                  \
+        write_c0_##name(new);                                   \
                                                                 \
         return res;                                             \
 }
diff --git a/arch/mips/include/asm/socket.h b/arch/mips/include/asm/socket.h
index facc2d7a87ca..2abca1780169 100644
--- a/arch/mips/include/asm/socket.h
+++ b/arch/mips/include/asm/socket.h
@@ -75,6 +75,9 @@ To add: #define SO_REUSEPORT 0x0200	/* Allow local address and port reuse.  */
 
 #define SO_MARK                 36
 
+#define SO_TIMESTAMPING         37
+#define SCM_TIMESTAMPING        SO_TIMESTAMPING
+
 #ifdef __KERNEL__
 
 /** sock_type - Socket types
diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c
index 4b4007b3083a..7b845ba9dff4 100644
--- a/arch/mips/kernel/irq.c
+++ b/arch/mips/kernel/irq.c
@@ -108,7 +108,7 @@ int show_interrupts(struct seq_file *p, void *v)
                 seq_printf(p, "%10u ", kstat_irqs(i));
 #else
                 for_each_online_cpu(j)
-                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
+                        seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
 #endif
                 seq_printf(p, " %14s", irq_desc[i].chip->name);
                 seq_printf(p, "  %s", action->name);
diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c
index 1a86f84fa947..2a472713de8e 100644
--- a/arch/mips/kernel/linux32.c
+++ b/arch/mips/kernel/linux32.c
@@ -32,7 +32,6 @@
 #include <linux/module.h>
 #include <linux/binfmts.h>
 #include <linux/security.h>
-#include <linux/syscalls.h>
 #include <linux/compat.h>
 #include <linux/vfs.h>
 #include <linux/ipc.h>
@@ -356,40 +355,6 @@ SYSCALL_DEFINE1(32_personality, unsigned long, personality)
         return ret;
 }
 
-/* ustat compatibility */
-struct ustat32 {
-        compat_daddr_t  f_tfree;
-        compat_ino_t    f_tinode;
-        char            f_fname[6];
-        char            f_fpack[6];
-};
-
-extern asmlinkage long sys_ustat(dev_t dev, struct ustat __user * ubuf);
-
-SYSCALL_DEFINE2(32_ustat, dev_t, dev, struct ustat32 __user *, ubuf32)
-{
-        int err;
-        struct ustat tmp;
-        struct ustat32 tmp32;
-        mm_segment_t old_fs = get_fs();
-
-        set_fs(KERNEL_DS);
-        err = sys_ustat(dev, (struct ustat __user *)&tmp);
-        set_fs(old_fs);
-
-        if (err)
-                goto out;
-
-        memset(&tmp32, 0, sizeof(struct ustat32));
-        tmp32.f_tfree = tmp.f_tfree;
-        tmp32.f_tinode = tmp.f_tinode;
-
-        err = copy_to_user(ubuf32, &tmp32, sizeof(struct ustat32)) ? -EFAULT : 0;
-
-out:
-        return err;
-}
-
 SYSCALL_DEFINE4(32_sendfile, long, out_fd, long, in_fd,
         compat_off_t __user *, offset, s32, count)
 {
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index 7438e92f8a01..f61d6b0e5731 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -253,7 +253,7 @@ EXPORT(sysn32_call_table)
         PTR     compat_sys_utime                /* 6130 */
         PTR     sys_mknod
         PTR     sys_32_personality
-        PTR     sys_32_ustat
+        PTR     compat_sys_ustat
         PTR     compat_sys_statfs
         PTR     compat_sys_fstatfs              /* 6135 */
         PTR     sys_sysfs
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index b0fef4ff9827..60997f1f69d4 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -265,7 +265,7 @@ sys_call_table:
         PTR     sys_olduname
         PTR     sys_umask                       /* 4060 */
         PTR     sys_chroot
-        PTR     sys_32_ustat
+        PTR     compat_sys_ustat
         PTR     sys_dup2
         PTR     sys_getppid
         PTR     sys_getpgrp                     /* 4065 */
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index b2d7041341b8..29fadaccecdd 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1520,7 +1520,9 @@ void __cpuinit per_cpu_trap_init(void)
 #endif /* CONFIG_MIPS_MT_SMTC */
 
         if (cpu_has_veic || cpu_has_vint) {
+                unsigned long sr = set_c0_status(ST0_BEV);
                 write_c0_ebase(ebase);
+                write_c0_status(sr);
                 /* Setting vector spacing enables EI/VI mode  */
                 change_c0_intctl(0x3e0, VECTORSPACING);
         }
@@ -1602,8 +1604,6 @@ void __cpuinit set_uncached_handler(unsigned long offset, void *addr,
 #ifdef CONFIG_64BIT
         unsigned long uncached_ebase = TO_UNCAC(ebase);
 #endif
-        if (cpu_has_mips_r2)
-                uncached_ebase += (read_c0_ebase() & 0x3ffff000);
 
         if (!addr)
                 panic(panic_null_cerr);
@@ -1635,9 +1635,11 @@ void __init trap_init(void)
                 return; /* Already done */
 #endif
 
-        if (cpu_has_veic || cpu_has_vint)
-                ebase = (unsigned long) alloc_bootmem_low_pages(0x200 + VECTORSPACING*64);
-        else {
+        if (cpu_has_veic || cpu_has_vint) {
+                unsigned long size = 0x200 + VECTORSPACING*64;
+                ebase = (unsigned long)
+                        __alloc_bootmem(size, 1 << fls(size), 0);
+        } else {
                 ebase = CAC_BASE;
                 if (cpu_has_mips_r2)
                         ebase += (read_c0_ebase() & 0x3ffff000);
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index c43f4b26a690..871e828bc62a 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -780,7 +780,7 @@ static void __cpuinit probe_pcache(void)
                 c->dcache.ways = 2;
                 c->dcache.waybit = 0;
 
-                c->options |= MIPS_CPU_CACHE_CDEX_P;
+                c->options |= MIPS_CPU_CACHE_CDEX_P | MIPS_CPU_PREFETCH;
                 break;
 
         case CPU_TX49XX:
diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c
index 546e6977d4ff..bed56f1ac837 100644
--- a/arch/mips/mm/dma-default.c
+++ b/arch/mips/mm/dma-default.c
@@ -225,7 +225,7 @@ void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
         if (!plat_device_is_coherent(dev) && direction != DMA_TO_DEVICE) {
                 unsigned long addr;
 
-                addr = plat_dma_addr_to_phys(dma_address);
+                addr = dma_addr_to_virt(dma_address);
                 dma_cache_wback_inv(addr, size);
         }
 
diff --git a/arch/mn10300/kernel/irq.c b/arch/mn10300/kernel/irq.c
index 56c64ccc9c21..50fdb5c16e0c 100644
--- a/arch/mn10300/kernel/irq.c
+++ b/arch/mn10300/kernel/irq.c
@@ -221,7 +221,7 @@ int show_interrupts(struct seq_file *p, void *v)
                 if (action) {
                         seq_printf(p, "%3d: ", i);
                         for_each_present_cpu(cpu)
-                                seq_printf(p, "%10u ", kstat_cpu(cpu).irqs[i]);
+                                seq_printf(p, "%10u ", kstat_irqs_cpu(i, cpu));
                         seq_printf(p, " %14s.%u", irq_desc[i].chip->name,
                                    (GxICR(i) & GxICR_LEVEL) >>
                                    GxICR_LEVEL_SHIFT);
diff --git a/arch/parisc/include/asm/socket.h b/arch/parisc/include/asm/socket.h
index fba402c95ac2..885472bf7b78 100644
--- a/arch/parisc/include/asm/socket.h
+++ b/arch/parisc/include/asm/socket.h
@@ -54,6 +54,9 @@
 
 #define SO_MARK                 0x401f
 
+#define SO_TIMESTAMPING         0x4020
+#define SCM_TIMESTAMPING        SO_TIMESTAMPING
+
 /* O_NONBLOCK clashes with the bits used for socket types.  Therefore we
  * have to define SOCK_NONBLOCK to a different value here.
  */
diff --git a/arch/parisc/kernel/irq.c b/arch/parisc/kernel/irq.c
index 2b5f5915dd1d..1c740f5cbd63 100644
--- a/arch/parisc/kernel/irq.c
+++ b/arch/parisc/kernel/irq.c
@@ -185,7 +185,7 @@ int show_interrupts(struct seq_file *p, void *v)
                 seq_printf(p, "%3d: ", i);
 #ifdef CONFIG_SMP
                 for_each_online_cpu(j)
-                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
+                        seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
 #else
                 seq_printf(p, "%10u ", kstat_irqs(i));
 #endif
diff --git a/arch/parisc/kernel/syscall_table.S b/arch/parisc/kernel/syscall_table.S
index 303d2b647e41..03b9a01bc16c 100644
--- a/arch/parisc/kernel/syscall_table.S
+++ b/arch/parisc/kernel/syscall_table.S
@@ -130,7 +130,7 @@
         ENTRY_OURS(newuname)
         ENTRY_SAME(umask)               /* 60 */
         ENTRY_SAME(chroot)
-        ENTRY_SAME(ustat)
+        ENTRY_COMP(ustat)
         ENTRY_SAME(dup2)
         ENTRY_SAME(getppid)
         ENTRY_SAME(getpgrp)             /* 65 */
diff --git a/arch/powerpc/boot/dts/canyonlands.dts b/arch/powerpc/boot/dts/canyonlands.dts
index 8b5ba8261a36..4447def69dc5 100644
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -127,6 +127,13 @@
                         dcr-reg = <0x010 0x002>;
                 };
 
+                CRYPTO: crypto@180000 {
+                        compatible = "amcc,ppc460ex-crypto", "amcc,ppc4xx-crypto";
+                        reg = <4 0x00180000 0x80400>;
+                        interrupt-parent = <&UIC0>;
+                        interrupts = <0x1d 0x4>;
+                };
+
                 MAL0: mcmal {
                         compatible = "ibm,mcmal-460ex", "ibm,mcmal2";
                         dcr-reg = <0x180 0x062>;
diff --git a/arch/powerpc/boot/dts/kilauea.dts b/arch/powerpc/boot/dts/kilauea.dts
index 2804444812e5..5e6b08ff6f67 100644
--- a/arch/powerpc/boot/dts/kilauea.dts
+++ b/arch/powerpc/boot/dts/kilauea.dts
@@ -97,6 +97,13 @@
                                       0x6 0x4>; /* ECC SEC Error */ 
                 };
 
+                CRYPTO: crypto@ef700000 {
+                        compatible = "amcc,ppc405ex-crypto", "amcc,ppc4xx-crypto";
+                        reg = <0xef700000 0x80400>;
+                        interrupt-parent = <&UIC0>;
+                        interrupts = <0x17 0x2>;
+                };
+
                 MAL0: mcmal {
                         compatible = "ibm,mcmal-405ex", "ibm,mcmal2";
                         dcr-reg = <0x180 0x062>;
diff --git a/arch/powerpc/include/asm/kvm.h b/arch/powerpc/include/asm/kvm.h
index 4e0cf65f7f5a..bb2de6aa5ce0 100644
--- a/arch/powerpc/include/asm/kvm.h
+++ b/arch/powerpc/include/asm/kvm.h
@@ -52,4 +52,11 @@ struct kvm_fpu {
         __u64 fpr[32];
 };
 
+struct kvm_debug_exit_arch {
+};
+
+/* for KVM_SET_GUEST_DEBUG */
+struct kvm_guest_debug_arch {
+};
+
 #endif /* __LINUX_KVM_POWERPC_H */
diff --git a/arch/powerpc/include/asm/kvm_44x.h b/arch/powerpc/include/asm/kvm_44x.h
index f49031b632ca..d22d39942a92 100644
--- a/arch/powerpc/include/asm/kvm_44x.h
+++ b/arch/powerpc/include/asm/kvm_44x.h
@@ -28,6 +28,13 @@
  * need to find some way of advertising it. */
 #define KVM44x_GUEST_TLB_SIZE 64
 
+struct kvmppc_44x_tlbe {
+        u32 tid; /* Only the low 8 bits are used. */
+        u32 word0;
+        u32 word1;
+        u32 word2;
+};
+
 struct kvmppc_44x_shadow_ref {
         struct page *page;
         u16 gtlb_index;
diff --git a/arch/powerpc/include/asm/kvm_asm.h b/arch/powerpc/include/asm/kvm_asm.h
index 2197764796d9..56bfae59837f 100644
--- a/arch/powerpc/include/asm/kvm_asm.h
+++ b/arch/powerpc/include/asm/kvm_asm.h
@@ -42,7 +42,12 @@
 #define BOOKE_INTERRUPT_DTLB_MISS 13
 #define BOOKE_INTERRUPT_ITLB_MISS 14
 #define BOOKE_INTERRUPT_DEBUG 15
-#define BOOKE_MAX_INTERRUPT 15
+
+/* E500 */
+#define BOOKE_INTERRUPT_SPE_UNAVAIL 32
+#define BOOKE_INTERRUPT_SPE_FP_DATA 33
+#define BOOKE_INTERRUPT_SPE_FP_ROUND 34
+#define BOOKE_INTERRUPT_PERFORMANCE_MONITOR 35
 
 #define RESUME_FLAG_NV          (1<<0)  /* Reload guest nonvolatile state? */
 #define RESUME_FLAG_HOST        (1<<1)  /* Resume host? */
diff --git a/arch/powerpc/include/asm/kvm_e500.h b/arch/powerpc/include/asm/kvm_e500.h
new file mode 100644
index 000000000000..9d497ce49726
--- /dev/null
+++ b/arch/powerpc/include/asm/kvm_e500.h
@@ -0,0 +1,67 @@
+/*
+ * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: Yu Liu, <yu.liu@freescale.com>
+ *
+ * Description:
+ * This file is derived from arch/powerpc/include/asm/kvm_44x.h,
+ * by Hollis Blanchard <hollisb@us.ibm.com>.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_KVM_E500_H__
+#define __ASM_KVM_E500_H__
+
+#include <linux/kvm_host.h>
+
+#define BOOKE_INTERRUPT_SIZE 36
+
+#define E500_PID_NUM   3
+#define E500_TLB_NUM   2
+
+struct tlbe{
+        u32 mas1;
+        u32 mas2;
+        u32 mas3;
+        u32 mas7;
+};
+
+struct kvmppc_vcpu_e500 {
+        /* Unmodified copy of the guest's TLB. */
+        struct tlbe *guest_tlb[E500_TLB_NUM];
+        /* TLB that's actually used when the guest is running. */
+        struct tlbe *shadow_tlb[E500_TLB_NUM];
+        /* Pages which are referenced in the shadow TLB. */
+        struct page **shadow_pages[E500_TLB_NUM];
+
+        unsigned int guest_tlb_size[E500_TLB_NUM];
+        unsigned int shadow_tlb_size[E500_TLB_NUM];
+        unsigned int guest_tlb_nv[E500_TLB_NUM];
+
+        u32 host_pid[E500_PID_NUM];
+        u32 pid[E500_PID_NUM];
+
+        u32 mas0;
+        u32 mas1;
+        u32 mas2;
+        u32 mas3;
+        u32 mas4;
+        u32 mas5;
+        u32 mas6;
+        u32 mas7;
+        u32 l1csr1;
+        u32 hid0;
+        u32 hid1;
+
+        struct kvm_vcpu vcpu;
+};
+
+static inline struct kvmppc_vcpu_e500 *to_e500(struct kvm_vcpu *vcpu)
+{
+        return container_of(vcpu, struct kvmppc_vcpu_e500, vcpu);
+}
+
+#endif /* __ASM_KVM_E500_H__ */
diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h
index c1e436fe7738..dfdf13c9fefd 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -64,13 +64,6 @@ struct kvm_vcpu_stat {
         u32 halt_wakeup;
 };
 
-struct kvmppc_44x_tlbe {
-        u32 tid; /* Only the low 8 bits are used. */
-        u32 word0;
-        u32 word1;
-        u32 word2;
-};
-
 enum kvm_exit_types {
         MMIO_EXITS,
         DCR_EXITS,
@@ -118,11 +111,6 @@ struct kvm_arch {
 struct kvm_vcpu_arch {
         u32 host_stack;
         u32 host_pid;
-        u32 host_dbcr0;
-        u32 host_dbcr1;
-        u32 host_dbcr2;
-        u32 host_iac[4];
-        u32 host_msr;
 
         u64 fpr[32];
         ulong gpr[32];
@@ -157,7 +145,7 @@ struct kvm_vcpu_arch {
         u32 tbu;
         u32 tcr;
         u32 tsr;
-        u32 ivor[16];
+        u32 ivor[64];
         ulong ivpr;
         u32 pir;
 
@@ -170,6 +158,7 @@ struct kvm_vcpu_arch {
         u32 ccr1;
         u32 dbcr0;
         u32 dbcr1;
+        u32 dbsr;
 
 #ifdef CONFIG_KVM_EXIT_TIMING
         struct kvmppc_exit_timing timing_exit;
@@ -200,10 +189,4 @@ struct kvm_vcpu_arch {
         unsigned long pending_exceptions;
 };
 
-struct kvm_guest_debug {
-        int enabled;
-        unsigned long bp[4];
-        int singlestep;
-};
-
 #endif /* __POWERPC_KVM_HOST_H__ */
diff --git a/arch/powerpc/include/asm/kvm_ppc.h b/arch/powerpc/include/asm/kvm_ppc.h
index 36d2a50a8487..2c6ee349df5e 100644
--- a/arch/powerpc/include/asm/kvm_ppc.h
+++ b/arch/powerpc/include/asm/kvm_ppc.h
@@ -52,13 +52,19 @@ extern int kvmppc_emulate_instruction(struct kvm_run *run,
 extern int kvmppc_emulate_mmio(struct kvm_run *run, struct kvm_vcpu *vcpu);
 extern void kvmppc_emulate_dec(struct kvm_vcpu *vcpu);
 
+/* Core-specific hooks */
+
 extern void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gpa_t gpaddr,
-                           u64 asid, u32 flags, u32 max_bytes,
                            unsigned int gtlb_idx);
 extern void kvmppc_mmu_priv_switch(struct kvm_vcpu *vcpu, int usermode);
 extern void kvmppc_mmu_switch_pid(struct kvm_vcpu *vcpu, u32 pid);
-
-/* Core-specific hooks */
+extern void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu);
+extern int kvmppc_mmu_dtlb_index(struct kvm_vcpu *vcpu, gva_t eaddr);
+extern int kvmppc_mmu_itlb_index(struct kvm_vcpu *vcpu, gva_t eaddr);
+extern gpa_t kvmppc_mmu_xlate(struct kvm_vcpu *vcpu, unsigned int gtlb_index,
+                              gva_t eaddr);
+extern void kvmppc_mmu_dtlb_miss(struct kvm_vcpu *vcpu);
+extern void kvmppc_mmu_itlb_miss(struct kvm_vcpu *vcpu);
 
 extern struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm,
                                                 unsigned int id);
@@ -71,9 +77,6 @@ extern int kvmppc_core_vcpu_translate(struct kvm_vcpu *vcpu,
 extern void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu);
 extern void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu);
 
-extern void kvmppc_core_load_guest_debugstate(struct kvm_vcpu *vcpu);
-extern void kvmppc_core_load_host_debugstate(struct kvm_vcpu *vcpu);
-
 extern void kvmppc_core_deliver_interrupts(struct kvm_vcpu *vcpu);
 extern int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu);
 extern void kvmppc_core_queue_program(struct kvm_vcpu *vcpu);
diff --git a/arch/powerpc/include/asm/mmu-fsl-booke.h b/arch/powerpc/include/asm/mmu-fsl-booke.h
index 3f941c0f7e8e..4285b64a65e0 100644
--- a/arch/powerpc/include/asm/mmu-fsl-booke.h
+++ b/arch/powerpc/include/asm/mmu-fsl-booke.h
@@ -75,6 +75,8 @@
 
 #ifndef __ASSEMBLY__
 
+extern unsigned int tlbcam_index;
+
 typedef struct {
         unsigned int    id;
         unsigned int    active;
diff --git a/arch/powerpc/include/asm/socket.h b/arch/powerpc/include/asm/socket.h
index f5a4e168e498..1e5cfad0e3f7 100644
--- a/arch/powerpc/include/asm/socket.h
+++ b/arch/powerpc/include/asm/socket.h
@@ -61,4 +61,7 @@
 
 #define SO_MARK                 36
 
+#define SO_TIMESTAMPING         37
+#define SCM_TIMESTAMPING        SO_TIMESTAMPING
+
 #endif  /* _ASM_POWERPC_SOCKET_H */
diff --git a/arch/powerpc/include/asm/systbl.h b/arch/powerpc/include/asm/systbl.h
index 72353f6070a4..fe166491e9dc 100644
--- a/arch/powerpc/include/asm/systbl.h
+++ b/arch/powerpc/include/asm/systbl.h
@@ -65,7 +65,7 @@ SYSCALL(ni_syscall)
 SYSX(sys_ni_syscall,sys_olduname, sys_olduname)
 COMPAT_SYS_SPU(umask)
 SYSCALL_SPU(chroot)
-SYSCALL(ustat)
+COMPAT_SYS(ustat)
 SYSCALL_SPU(dup2)
 SYSCALL_SPU(getppid)
 SYSCALL_SPU(getpgrp)
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index 19ee491e9e23..42fe4da4e8ae 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -49,7 +49,7 @@
 #include <asm/iseries/alpaca.h>
 #endif
 #ifdef CONFIG_KVM
-#include <asm/kvm_44x.h>
+#include <linux/kvm_host.h>
 #endif
 
 #if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
@@ -361,8 +361,6 @@ int main(void)
         DEFINE(PTE_SIZE, sizeof(pte_t));
 
 #ifdef CONFIG_KVM
-        DEFINE(TLBE_BYTES, sizeof(struct kvmppc_44x_tlbe));
-
         DEFINE(VCPU_HOST_STACK, offsetof(struct kvm_vcpu, arch.host_stack));
         DEFINE(VCPU_HOST_PID, offsetof(struct kvm_vcpu, arch.host_pid));
         DEFINE(VCPU_GPRS, offsetof(struct kvm_vcpu, arch.gpr));
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index ad1e5ac721d8..1b55ffdf0026 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -190,7 +190,7 @@ int show_interrupts(struct seq_file *p, void *v)
                 seq_printf(p, "%3d: ", i);
 #ifdef CONFIG_SMP
                 for_each_online_cpu(j)
-                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
+                        seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
 #else
                 seq_printf(p, "%10u ", kstat_irqs(i));
 #endif /* CONFIG_SMP */
diff --git a/arch/powerpc/kvm/44x.c b/arch/powerpc/kvm/44x.c
index a66bec57265a..0cef809cec21 100644
--- a/arch/powerpc/kvm/44x.c
+++ b/arch/powerpc/kvm/44x.c
@@ -28,72 +28,6 @@
 
 #include "44x_tlb.h"
 
-/* Note: clearing MSR[DE] just means that the debug interrupt will not be
- * delivered *immediately*. Instead, it simply sets the appropriate DBSR bits.
- * If those DBSR bits are still set when MSR[DE] is re-enabled, the interrupt
- * will be delivered as an "imprecise debug event" (which is indicated by
- * DBSR[IDE].
- */
-static void kvm44x_disable_debug_interrupts(void)
-{
-        mtmsr(mfmsr() & ~MSR_DE);
-}
-
-void kvmppc_core_load_host_debugstate(struct kvm_vcpu *vcpu)
-{
-        kvm44x_disable_debug_interrupts();
-
-        mtspr(SPRN_IAC1, vcpu->arch.host_iac[0]);
-        mtspr(SPRN_IAC2, vcpu->arch.host_iac[1]);
-        mtspr(SPRN_IAC3, vcpu->arch.host_iac[2]);
-        mtspr(SPRN_IAC4, vcpu->arch.host_iac[3]);
-        mtspr(SPRN_DBCR1, vcpu->arch.host_dbcr1);
-        mtspr(SPRN_DBCR2, vcpu->arch.host_dbcr2);
-        mtspr(SPRN_DBCR0, vcpu->arch.host_dbcr0);
-        mtmsr(vcpu->arch.host_msr);
-}
-
-void kvmppc_core_load_guest_debugstate(struct kvm_vcpu *vcpu)
-{
-        struct kvm_guest_debug *dbg = &vcpu->guest_debug;
-        u32 dbcr0 = 0;
-
-        vcpu->arch.host_msr = mfmsr();
-        kvm44x_disable_debug_interrupts();
-
-        /* Save host debug register state. */
-        vcpu->arch.host_iac[0] = mfspr(SPRN_IAC1);
-        vcpu->arch.host_iac[1] = mfspr(SPRN_IAC2);
-        vcpu->arch.host_iac[2] = mfspr(SPRN_IAC3);
-        vcpu->arch.host_iac[3] = mfspr(SPRN_IAC4);
-        vcpu->arch.host_dbcr0 = mfspr(SPRN_DBCR0);
-        vcpu->arch.host_dbcr1 = mfspr(SPRN_DBCR1);
-        vcpu->arch.host_dbcr2 = mfspr(SPRN_DBCR2);
-
-        /* set registers up for guest */
-
-        if (dbg->bp[0]) {
-                mtspr(SPRN_IAC1, dbg->bp[0]);
-                dbcr0 |= DBCR0_IAC1 | DBCR0_IDM;
-        }
-        if (dbg->bp[1]) {
-                mtspr(SPRN_IAC2, dbg->bp[1]);
-                dbcr0 |= DBCR0_IAC2 | DBCR0_IDM;
-        }
-        if (dbg->bp[2]) {
-                mtspr(SPRN_IAC3, dbg->bp[2]);
-                dbcr0 |= DBCR0_IAC3 | DBCR0_IDM;
-        }
-        if (dbg->bp[3]) {
-                mtspr(SPRN_IAC4, dbg->bp[3]);
-                dbcr0 |= DBCR0_IAC4 | DBCR0_IDM;
-        }
-
-        mtspr(SPRN_DBCR0, dbcr0);
-        mtspr(SPRN_DBCR1, 0);
-        mtspr(SPRN_DBCR2, 0);
-}
-
 void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
 {
         kvmppc_44x_tlb_load(vcpu);
@@ -149,8 +83,6 @@ int kvmppc_core_vcpu_setup(struct kvm_vcpu *vcpu)
 int kvmppc_core_vcpu_translate(struct kvm_vcpu *vcpu,
                                struct kvm_translation *tr)
 {
-        struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
-        struct kvmppc_44x_tlbe *gtlbe;
         int index;
         gva_t eaddr;
         u8 pid;
@@ -166,9 +98,7 @@ int kvmppc_core_vcpu_translate(struct kvm_vcpu *vcpu,
                 return 0;
         }
 
-        gtlbe = &vcpu_44x->guest_tlb[index];
-
-        tr->physical_address = tlb_xlate(gtlbe, eaddr);
+        tr->physical_address = kvmppc_mmu_xlate(vcpu, index, eaddr);
         /* XXX what does "writeable" and "usermode" even mean? */
         tr->valid = 1;
 
diff --git a/arch/powerpc/kvm/44x_emulate.c b/arch/powerpc/kvm/44x_emulate.c
index 82489a743a6f..61af58fcecee 100644
--- a/arch/powerpc/kvm/44x_emulate.c
+++ b/arch/powerpc/kvm/44x_emulate.c
@@ -27,25 +27,12 @@
 #include "booke.h"
 #include "44x_tlb.h"
 
-#define OP_RFI      19
-
-#define XOP_RFI     50
-#define XOP_MFMSR   83
-#define XOP_WRTEE   131
-#define XOP_MTMSR   146
-#define XOP_WRTEEI  163
 #define XOP_MFDCR   323
 #define XOP_MTDCR   451
 #define XOP_TLBSX   914
 #define XOP_ICCCI   966
 #define XOP_TLBWE   978
 
-static void kvmppc_emul_rfi(struct kvm_vcpu *vcpu)
-{
-        vcpu->arch.pc = vcpu->arch.srr0;
-        kvmppc_set_msr(vcpu, vcpu->arch.srr1);
-}
-
 int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
                            unsigned int inst, int *advance)
 {
@@ -59,48 +46,9 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
         int ws;
 
         switch (get_op(inst)) {
-        case OP_RFI:
-                switch (get_xop(inst)) {
-                case XOP_RFI:
-                        kvmppc_emul_rfi(vcpu);
-                        kvmppc_set_exit_type(vcpu, EMULATED_RFI_EXITS);
-                        *advance = 0;
-                        break;
-
-                default:
-                        emulated = EMULATE_FAIL;
-                        break;
-                }
-                break;
-
         case 31:
                 switch (get_xop(inst)) {
 
-                case XOP_MFMSR:
-                        rt = get_rt(inst);
-                        vcpu->arch.gpr[rt] = vcpu->arch.msr;
-                        kvmppc_set_exit_type(vcpu, EMULATED_MFMSR_EXITS);
-                        break;
-
-                case XOP_MTMSR:
-                        rs = get_rs(inst);
-                        kvmppc_set_exit_type(vcpu, EMULATED_MTMSR_EXITS);
-                        kvmppc_set_msr(vcpu, vcpu->arch.gpr[rs]);
-                        break;
-
-                case XOP_WRTEE:
-                        rs = get_rs(inst);
-                        vcpu->arch.msr = (vcpu->arch.msr & ~MSR_EE)
-                                                         | (vcpu->arch.gpr[rs] & MSR_EE);
-                        kvmppc_set_exit_type(vcpu, EMULATED_WRTEE_EXITS);
-                        break;
-
-                case XOP_WRTEEI:
-                        vcpu->arch.msr = (vcpu->arch.msr & ~MSR_EE)
-                                                         | (inst & MSR_EE);
-                        kvmppc_set_exit_type(vcpu, EMULATED_WRTEE_EXITS);
-                        break;
-
                 case XOP_MFDCR:
                         dcrn = get_dcrn(inst);
                         rt = get_rt(inst);
@@ -186,186 +134,51 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
                 emulated = EMULATE_FAIL;
         }
 
+        if (emulated == EMULATE_FAIL)
+                emulated = kvmppc_booke_emulate_op(run, vcpu, inst, advance);
+
         return emulated;
 }
 
 int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
 {
+        int emulated = EMULATE_DONE;
+
         switch (sprn) {
-        case SPRN_MMUCR:
-                vcpu->arch.mmucr = vcpu->arch.gpr[rs]; break;
         case SPRN_PID:
                 kvmppc_set_pid(vcpu, vcpu->arch.gpr[rs]); break;
+        case SPRN_MMUCR:
+                vcpu->arch.mmucr = vcpu->arch.gpr[rs]; break;
         case SPRN_CCR0:
                 vcpu->arch.ccr0 = vcpu->arch.gpr[rs]; break;
         case SPRN_CCR1:
                 vcpu->arch.ccr1 = vcpu->arch.gpr[rs]; break;
-        case SPRN_DEAR:
-                vcpu->arch.dear = vcpu->arch.gpr[rs]; break;
-        case SPRN_ESR:
-                vcpu->arch.esr = vcpu->arch.gpr[rs]; break;
-        case SPRN_DBCR0:
-                vcpu->arch.dbcr0 = vcpu->arch.gpr[rs]; break;
-        case SPRN_DBCR1:
-                vcpu->arch.dbcr1 = vcpu->arch.gpr[rs]; break;
-        case SPRN_TSR:
-                vcpu->arch.tsr &= ~vcpu->arch.gpr[rs]; break;
-        case SPRN_TCR:
-                vcpu->arch.tcr = vcpu->arch.gpr[rs];
-                kvmppc_emulate_dec(vcpu);
-                break;
-
-        /* Note: SPRG4-7 are user-readable. These values are
-         * loaded into the real SPRGs when resuming the
-         * guest. */
-        case SPRN_SPRG4:
-                vcpu->arch.sprg4 = vcpu->arch.gpr[rs]; break;
-        case SPRN_SPRG5:
-                vcpu->arch.sprg5 = vcpu->arch.gpr[rs]; break;
-        case SPRN_SPRG6:
-                vcpu->arch.sprg6 = vcpu->arch.gpr[rs]; break;
-        case SPRN_SPRG7:
-                vcpu->arch.sprg7 = vcpu->arch.gpr[rs]; break;
-
-        case SPRN_IVPR:
-                vcpu->arch.ivpr = vcpu->arch.gpr[rs];
-                break;
-        case SPRN_IVOR0:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = vcpu->arch.gpr[rs];
-                break;
-        case SPRN_IVOR1:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = vcpu->arch.gpr[rs];
-                break;
-        case SPRN_IVOR2:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = vcpu->arch.gpr[rs];
-                break;
-        case SPRN_IVOR3:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = vcpu->arch.gpr[rs];
-                break;
-        case SPRN_IVOR4:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = vcpu->arch.gpr[rs];
-                break;
-        case SPRN_IVOR5:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = vcpu->arch.gpr[rs];
-                break;
-        case SPRN_IVOR6:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = vcpu->arch.gpr[rs];
-                break;
-        case SPRN_IVOR7:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = vcpu->arch.gpr[rs];
-                break;
-        case SPRN_IVOR8:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = vcpu->arch.gpr[rs];
-                break;
-        case SPRN_IVOR9:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = vcpu->arch.gpr[rs];
-                break;
-        case SPRN_IVOR10:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = vcpu->arch.gpr[rs];
-                break;
-        case SPRN_IVOR11:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = vcpu->arch.gpr[rs];
-                break;
-        case SPRN_IVOR12:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = vcpu->arch.gpr[rs];
-                break;
-        case SPRN_IVOR13:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = vcpu->arch.gpr[rs];
-                break;
-        case SPRN_IVOR14:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = vcpu->arch.gpr[rs];
-                break;
-        case SPRN_IVOR15:
-                vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = vcpu->arch.gpr[rs];
-                break;
-
         default:
-                return EMULATE_FAIL;
+                emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, rs);
         }
 
         kvmppc_set_exit_type(vcpu, EMULATED_MTSPR_EXITS);
-        return EMULATE_DONE;
+        return emulated;
 }
 
 int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
 {
+        int emulated = EMULATE_DONE;
+
         switch (sprn) {
-        /* 440 */
+        case SPRN_PID:
+                vcpu->arch.gpr[rt] = vcpu->arch.pid; break;
         case SPRN_MMUCR:
                 vcpu->arch.gpr[rt] = vcpu->arch.mmucr; break;
         case SPRN_CCR0:
                 vcpu->arch.gpr[rt] = vcpu->arch.ccr0; break;
         case SPRN_CCR1:
                 vcpu->arch.gpr[rt] = vcpu->arch.ccr1; break;
-
-        /* Book E */
-        case SPRN_PID:
-                vcpu->arch.gpr[rt] = vcpu->arch.pid; break;
-        case SPRN_IVPR:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivpr; break;
-        case SPRN_DEAR:
-                vcpu->arch.gpr[rt] = vcpu->arch.dear; break;
-        case SPRN_ESR:
-                vcpu->arch.gpr[rt] = vcpu->arch.esr; break;
-        case SPRN_DBCR0:
-                vcpu->arch.gpr[rt] = vcpu->arch.dbcr0; break;
-        case SPRN_DBCR1:
-                vcpu->arch.gpr[rt] = vcpu->arch.dbcr1; break;
-
-        case SPRN_IVOR0:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
-                break;
-        case SPRN_IVOR1:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
-                break;
-        case SPRN_IVOR2:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
-                break;
-        case SPRN_IVOR3:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
-                break;
-        case SPRN_IVOR4:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
-                break;
-        case SPRN_IVOR5:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
-                break;
-        case SPRN_IVOR6:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
-                break;
-        case SPRN_IVOR7:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
-                break;
-        case SPRN_IVOR8:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
-                break;
-        case SPRN_IVOR9:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
-                break;
-        case SPRN_IVOR10:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
-                break;
-        case SPRN_IVOR11:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
-                break;
-        case SPRN_IVOR12:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
-                break;
-        case SPRN_IVOR13:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
-                break;
-        case SPRN_IVOR14:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
-                break;
-        case SPRN_IVOR15:
-                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
-                break;
-
         default:
-                return EMULATE_FAIL;
+                emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, rt);
         }
 
         kvmppc_set_exit_type(vcpu, EMULATED_MFSPR_EXITS);
-        return EMULATE_DONE;
+        return emulated;
 }
 
diff --git a/arch/powerpc/kvm/44x_tlb.c b/arch/powerpc/kvm/44x_tlb.c
index 9a34b8edb9e2..4a16f472cc18 100644
--- a/arch/powerpc/kvm/44x_tlb.c
+++ b/arch/powerpc/kvm/44x_tlb.c
@@ -208,20 +208,38 @@ int kvmppc_44x_tlb_index(struct kvm_vcpu *vcpu, gva_t eaddr, unsigned int pid,
         return -1;
 }
 
-int kvmppc_44x_itlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
+gpa_t kvmppc_mmu_xlate(struct kvm_vcpu *vcpu, unsigned int gtlb_index,
+                       gva_t eaddr)
+{
+        struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
+        struct kvmppc_44x_tlbe *gtlbe = &vcpu_44x->guest_tlb[gtlb_index];
+        unsigned int pgmask = get_tlb_bytes(gtlbe) - 1;
+
+        return get_tlb_raddr(gtlbe) | (eaddr & pgmask);
+}
+
+int kvmppc_mmu_itlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
 {
         unsigned int as = !!(vcpu->arch.msr & MSR_IS);
 
         return kvmppc_44x_tlb_index(vcpu, eaddr, vcpu->arch.pid, as);
 }
 
-int kvmppc_44x_dtlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
+int kvmppc_mmu_dtlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
 {
         unsigned int as = !!(vcpu->arch.msr & MSR_DS);
 
         return kvmppc_44x_tlb_index(vcpu, eaddr, vcpu->arch.pid, as);
 }
 
+void kvmppc_mmu_itlb_miss(struct kvm_vcpu *vcpu)
+{
+}
+
+void kvmppc_mmu_dtlb_miss(struct kvm_vcpu *vcpu)
+{
+}
+
 static void kvmppc_44x_shadow_release(struct kvmppc_vcpu_44x *vcpu_44x,
                                       unsigned int stlb_index)
 {
@@ -248,7 +266,7 @@ static void kvmppc_44x_shadow_release(struct kvmppc_vcpu_44x *vcpu_44x,
         KVMTRACE_1D(STLB_INVAL, &vcpu_44x->vcpu, stlb_index, handler);
 }
 
-void kvmppc_core_destroy_mmu(struct kvm_vcpu *vcpu)
+void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
 {
         struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
         int i;
@@ -269,15 +287,19 @@ void kvmppc_core_destroy_mmu(struct kvm_vcpu *vcpu)
  * Caller must ensure that the specified guest TLB entry is safe to insert into
  * the shadow TLB.
  */
-void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gpa_t gpaddr, u64 asid,
-                    u32 flags, u32 max_bytes, unsigned int gtlb_index)
+void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gpa_t gpaddr,
+                    unsigned int gtlb_index)
 {
         struct kvmppc_44x_tlbe stlbe;
         struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
+        struct kvmppc_44x_tlbe *gtlbe = &vcpu_44x->guest_tlb[gtlb_index];
         struct kvmppc_44x_shadow_ref *ref;
         struct page *new_page;
         hpa_t hpaddr;
         gfn_t gfn;
+        u32 asid = gtlbe->tid;
+        u32 flags = gtlbe->word2;
+        u32 max_bytes = get_tlb_bytes(gtlbe);
         unsigned int victim;
 
         /* Select TLB entry to clobber. Indirectly guard against races with the TLB
@@ -448,10 +470,8 @@ int kvmppc_44x_emul_tlbwe(struct kvm_vcpu *vcpu, u8 ra, u8 rs, u8 ws)
         }
 
         if (tlbe_is_host_safe(vcpu, tlbe)) {
-                u64 asid;
                 gva_t eaddr;
                 gpa_t gpaddr;
-                u32 flags;
                 u32 bytes;
 
                 eaddr = get_tlb_eaddr(tlbe);
@@ -462,10 +482,7 @@ int kvmppc_44x_emul_tlbwe(struct kvm_vcpu *vcpu, u8 ra, u8 rs, u8 ws)
                 eaddr &= ~(bytes - 1);
                 gpaddr &= ~(bytes - 1);
 
-                asid = (tlbe->word0 & PPC44x_TLB_TS) | tlbe->tid;
-                flags = tlbe->word2 & 0xffff;
-
-                kvmppc_mmu_map(vcpu, eaddr, gpaddr, asid, flags, bytes, gtlb_index);
+                kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
         }
 
         KVMTRACE_5D(GTLB_WRITE, vcpu, gtlb_index, tlbe->tid, tlbe->word0,
diff --git a/arch/powerpc/kvm/44x_tlb.h b/arch/powerpc/kvm/44x_tlb.h
index 772191f29e62..a9ff80e51526 100644
--- a/arch/powerpc/kvm/44x_tlb.h
+++ b/arch/powerpc/kvm/44x_tlb.h
@@ -25,8 +25,6 @@
 
 extern int kvmppc_44x_tlb_index(struct kvm_vcpu *vcpu, gva_t eaddr,
                                 unsigned int pid, unsigned int as);
-extern int kvmppc_44x_dtlb_index(struct kvm_vcpu *vcpu, gva_t eaddr);
-extern int kvmppc_44x_itlb_index(struct kvm_vcpu *vcpu, gva_t eaddr);
 
 extern int kvmppc_44x_emul_tlbsx(struct kvm_vcpu *vcpu, u8 rt, u8 ra, u8 rb,
                                  u8 rc);
@@ -85,11 +83,4 @@ static inline unsigned int get_mmucr_sts(const struct kvm_vcpu *vcpu)
         return (vcpu->arch.mmucr >> 16) & 0x1;
 }
 
-static inline gpa_t tlb_xlate(struct kvmppc_44x_tlbe *tlbe, gva_t eaddr)
-{
-        unsigned int pgmask = get_tlb_bytes(tlbe) - 1;
-
-        return get_tlb_raddr(tlbe) | (eaddr & pgmask);
-}
-
 #endif /* __KVM_POWERPC_TLB_H__ */
diff --git a/arch/powerpc/kvm/Kconfig b/arch/powerpc/kvm/Kconfig
index 6dbdc4817d80..5a152a52796f 100644
--- a/arch/powerpc/kvm/Kconfig
+++ b/arch/powerpc/kvm/Kconfig
@@ -2,6 +2,9 @@
 # KVM configuration
 #
 
+config HAVE_KVM_IRQCHIP
+       bool
+
 menuconfig VIRTUALIZATION
         bool "Virtualization"
         ---help---
@@ -43,6 +46,19 @@ config KVM_EXIT_TIMING
 
           If unsure, say N.
 
+config KVM_E500
+        bool "KVM support for PowerPC E500 processors"
+        depends on EXPERIMENTAL && E500
+        select KVM
+        ---help---
+          Support running unmodified E500 guest kernels in virtual machines on
+          E500 host processors.
+
+          This module provides access to the hardware capabilities through
+          a character device node named /dev/kvm.
+
+          If unsure, say N.
+
 config KVM_TRACE
         bool "KVM trace support"
         depends on KVM && MARKERS && SYSFS
diff --git a/arch/powerpc/kvm/Makefile b/arch/powerpc/kvm/Makefile
index df7ba59e6d53..4b2df66c79d8 100644
--- a/arch/powerpc/kvm/Makefile
+++ b/arch/powerpc/kvm/Makefile
@@ -16,8 +16,18 @@ AFLAGS_booke_interrupts.o := -I$(obj)
 
 kvm-440-objs := \
         booke.o \
+        booke_emulate.o \
         booke_interrupts.o \
         44x.o \
         44x_tlb.o \
         44x_emulate.o
 obj-$(CONFIG_KVM_440) += kvm-440.o
+
+kvm-e500-objs := \
+        booke.o \
+        booke_emulate.o \
+        booke_interrupts.o \
+        e500.o \
+        e500_tlb.o \
+        e500_emulate.o
+obj-$(CONFIG_KVM_E500) += kvm-e500.o
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index 35485dd6927e..642e4204cf25 100644
--- a/arch/powerpc/kvm/booke.c
+++ b/arch/powerpc/kvm/booke.c
@@ -30,10 +30,8 @@
 #include <asm/kvm_ppc.h>
 #include "timing.h"
 #include <asm/cacheflush.h>
-#include <asm/kvm_44x.h>
 
 #include "booke.h"
-#include "44x_tlb.h"
 
 unsigned long kvmppc_booke_handlers;
 
@@ -120,6 +118,9 @@ static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
         case BOOKE_IRQPRIO_DATA_STORAGE:
         case BOOKE_IRQPRIO_INST_STORAGE:
         case BOOKE_IRQPRIO_FP_UNAVAIL:
+        case BOOKE_IRQPRIO_SPE_UNAVAIL:
+        case BOOKE_IRQPRIO_SPE_FP_DATA:
+        case BOOKE_IRQPRIO_SPE_FP_ROUND:
         case BOOKE_IRQPRIO_AP_UNAVAIL:
         case BOOKE_IRQPRIO_ALIGNMENT:
                 allowed = 1;
@@ -165,7 +166,7 @@ void kvmppc_core_deliver_interrupts(struct kvm_vcpu *vcpu)
         unsigned int priority;
 
         priority = __ffs(*pending);
-        while (priority <= BOOKE_MAX_INTERRUPT) {
+        while (priority <= BOOKE_IRQPRIO_MAX) {
                 if (kvmppc_booke_irqprio_deliver(vcpu, priority))
                         break;
 
@@ -263,6 +264,21 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
                 r = RESUME_GUEST;
                 break;
 
+        case BOOKE_INTERRUPT_SPE_UNAVAIL:
+                kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_UNAVAIL);
+                r = RESUME_GUEST;
+                break;
+
+        case BOOKE_INTERRUPT_SPE_FP_DATA:
+                kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA);
+                r = RESUME_GUEST;
+                break;
+
+        case BOOKE_INTERRUPT_SPE_FP_ROUND:
+                kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND);
+                r = RESUME_GUEST;
+                break;
+
         case BOOKE_INTERRUPT_DATA_STORAGE:
                 vcpu->arch.dear = vcpu->arch.fault_dear;
                 vcpu->arch.esr = vcpu->arch.fault_esr;
@@ -284,29 +300,27 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
                 r = RESUME_GUEST;
                 break;
 
-        /* XXX move to a 440-specific file. */
         case BOOKE_INTERRUPT_DTLB_MISS: {
-                struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
-                struct kvmppc_44x_tlbe *gtlbe;
                 unsigned long eaddr = vcpu->arch.fault_dear;
                 int gtlb_index;
+                gpa_t gpaddr;
                 gfn_t gfn;
 
                 /* Check the guest TLB. */
-                gtlb_index = kvmppc_44x_dtlb_index(vcpu, eaddr);
+                gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
                 if (gtlb_index < 0) {
                         /* The guest didn't have a mapping for it. */
                         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
                         vcpu->arch.dear = vcpu->arch.fault_dear;
                         vcpu->arch.esr = vcpu->arch.fault_esr;
+                        kvmppc_mmu_dtlb_miss(vcpu);
                         kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS);
                         r = RESUME_GUEST;
                         break;
                 }
 
-                gtlbe = &vcpu_44x->guest_tlb[gtlb_index];
-                vcpu->arch.paddr_accessed = tlb_xlate(gtlbe, eaddr);
-                gfn = vcpu->arch.paddr_accessed >> PAGE_SHIFT;
+                gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
+                gfn = gpaddr >> PAGE_SHIFT;
 
                 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
                         /* The guest TLB had a mapping, but the shadow TLB
@@ -315,13 +329,13 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
                          * b) the guest used a large mapping which we're faking
                          * Either way, we need to satisfy the fault without
                          * invoking the guest. */
-                        kvmppc_mmu_map(vcpu, eaddr, vcpu->arch.paddr_accessed, gtlbe->tid,
-                                       gtlbe->word2, get_tlb_bytes(gtlbe), gtlb_index);
+                        kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
                         kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
                         r = RESUME_GUEST;
                 } else {
                         /* Guest has mapped and accessed a page which is not
                          * actually RAM. */
+                        vcpu->arch.paddr_accessed = gpaddr;
                         r = kvmppc_emulate_mmio(run, vcpu);
                         kvmppc_account_exit(vcpu, MMIO_EXITS);
                 }
@@ -329,10 +343,7 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
                 break;
         }
 
-        /* XXX move to a 440-specific file. */
         case BOOKE_INTERRUPT_ITLB_MISS: {
-                struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
-                struct kvmppc_44x_tlbe *gtlbe;
                 unsigned long eaddr = vcpu->arch.pc;
                 gpa_t gpaddr;
                 gfn_t gfn;
@@ -341,18 +352,18 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
                 r = RESUME_GUEST;
 
                 /* Check the guest TLB. */
-                gtlb_index = kvmppc_44x_itlb_index(vcpu, eaddr);
+                gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
                 if (gtlb_index < 0) {
                         /* The guest didn't have a mapping for it. */
                         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
+                        kvmppc_mmu_itlb_miss(vcpu);
                         kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS);
                         break;
                 }
 
                 kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS);
 
-                gtlbe = &vcpu_44x->guest_tlb[gtlb_index];
-                gpaddr = tlb_xlate(gtlbe, eaddr);
+                gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
                 gfn = gpaddr >> PAGE_SHIFT;
 
                 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
@@ -362,8 +373,7 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
                          * b) the guest used a large mapping which we're faking
                          * Either way, we need to satisfy the fault without
                          * invoking the guest. */
-                        kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlbe->tid,
-                                       gtlbe->word2, get_tlb_bytes(gtlbe), gtlb_index);
+                        kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
                 } else {
                         /* Guest mapped and leaped at non-RAM! */
                         kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK);
diff --git a/arch/powerpc/kvm/booke.h b/arch/powerpc/kvm/booke.h
index cf7c94ca24bf..d59bcca1f9d8 100644
--- a/arch/powerpc/kvm/booke.h
+++ b/arch/powerpc/kvm/booke.h
@@ -22,6 +22,7 @@
 
 #include <linux/types.h>
 #include <linux/kvm_host.h>
+#include <asm/kvm_ppc.h>
 #include "timing.h"
 
 /* interrupt priortity ordering */
@@ -30,17 +31,24 @@
 #define BOOKE_IRQPRIO_ALIGNMENT 2
 #define BOOKE_IRQPRIO_PROGRAM 3
 #define BOOKE_IRQPRIO_FP_UNAVAIL 4
-#define BOOKE_IRQPRIO_SYSCALL 5
-#define BOOKE_IRQPRIO_AP_UNAVAIL 6
-#define BOOKE_IRQPRIO_DTLB_MISS 7
-#define BOOKE_IRQPRIO_ITLB_MISS 8
-#define BOOKE_IRQPRIO_MACHINE_CHECK 9
-#define BOOKE_IRQPRIO_DEBUG 10
-#define BOOKE_IRQPRIO_CRITICAL 11
-#define BOOKE_IRQPRIO_WATCHDOG 12
-#define BOOKE_IRQPRIO_EXTERNAL 13
-#define BOOKE_IRQPRIO_FIT 14
-#define BOOKE_IRQPRIO_DECREMENTER 15
+#define BOOKE_IRQPRIO_SPE_UNAVAIL 5
+#define BOOKE_IRQPRIO_SPE_FP_DATA 6
+#define BOOKE_IRQPRIO_SPE_FP_ROUND 7
+#define BOOKE_IRQPRIO_SYSCALL 8
+#define BOOKE_IRQPRIO_AP_UNAVAIL 9
+#define BOOKE_IRQPRIO_DTLB_MISS 10
+#define BOOKE_IRQPRIO_ITLB_MISS 11
+#define BOOKE_IRQPRIO_MACHINE_CHECK 12
+#define BOOKE_IRQPRIO_DEBUG 13
+#define BOOKE_IRQPRIO_CRITICAL 14
+#define BOOKE_IRQPRIO_WATCHDOG 15
+#define BOOKE_IRQPRIO_EXTERNAL 16
+#define BOOKE_IRQPRIO_FIT 17
+#define BOOKE_IRQPRIO_DECREMENTER 18
+#define BOOKE_IRQPRIO_PERFORMANCE_MONITOR 19
+#define BOOKE_IRQPRIO_MAX 19
+
+extern unsigned long kvmppc_booke_handlers;
 
 /* Helper function for "full" MSR writes. No need to call this if only EE is
  * changing. */
@@ -57,4 +65,9 @@ static inline void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
         };
 }
 
+int kvmppc_booke_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
+                            unsigned int inst, int *advance);
+int kvmppc_booke_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt);
+int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs);
+
 #endif /* __KVM_BOOKE_H__ */
diff --git a/arch/powerpc/kvm/booke_emulate.c b/arch/powerpc/kvm/booke_emulate.c
new file mode 100644
index 000000000000..aebc65e93f4b
--- /dev/null
+++ b/arch/powerpc/kvm/booke_emulate.c
@@ -0,0 +1,266 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ *
+ * Copyright IBM Corp. 2008
+ *
+ * Authors: Hollis Blanchard <hollisb@us.ibm.com>
+ */
+
+#include <linux/kvm_host.h>
+#include <asm/disassemble.h>
+
+#include "booke.h"
+
+#define OP_19_XOP_RFI     50
+
+#define OP_31_XOP_MFMSR   83
+#define OP_31_XOP_WRTEE   131
+#define OP_31_XOP_MTMSR   146
+#define OP_31_XOP_WRTEEI  163
+
+static void kvmppc_emul_rfi(struct kvm_vcpu *vcpu)
+{
+        vcpu->arch.pc = vcpu->arch.srr0;
+        kvmppc_set_msr(vcpu, vcpu->arch.srr1);
+}
+
+int kvmppc_booke_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
+                            unsigned int inst, int *advance)
+{
+        int emulated = EMULATE_DONE;
+        int rs;
+        int rt;
+
+        switch (get_op(inst)) {
+        case 19:
+                switch (get_xop(inst)) {
+                case OP_19_XOP_RFI:
+                        kvmppc_emul_rfi(vcpu);
+                        kvmppc_set_exit_type(vcpu, EMULATED_RFI_EXITS);
+                        *advance = 0;
+                        break;
+
+                default:
+                        emulated = EMULATE_FAIL;
+                        break;
+                }
+                break;
+
+        case 31:
+                switch (get_xop(inst)) {
+
+                case OP_31_XOP_MFMSR:
+                        rt = get_rt(inst);
+                        vcpu->arch.gpr[rt] = vcpu->arch.msr;
+                        kvmppc_set_exit_type(vcpu, EMULATED_MFMSR_EXITS);
+                        break;
+
+                case OP_31_XOP_MTMSR:
+                        rs = get_rs(inst);
+                        kvmppc_set_exit_type(vcpu, EMULATED_MTMSR_EXITS);
+                        kvmppc_set_msr(vcpu, vcpu->arch.gpr[rs]);
+                        break;
+
+                case OP_31_XOP_WRTEE:
+                        rs = get_rs(inst);
+                        vcpu->arch.msr = (vcpu->arch.msr & ~MSR_EE)
+                                                         | (vcpu->arch.gpr[rs] & MSR_EE);
+                        kvmppc_set_exit_type(vcpu, EMULATED_WRTEE_EXITS);
+                        break;
+
+                case OP_31_XOP_WRTEEI:
+                        vcpu->arch.msr = (vcpu->arch.msr & ~MSR_EE)
+                                                         | (inst & MSR_EE);
+                        kvmppc_set_exit_type(vcpu, EMULATED_WRTEE_EXITS);
+                        break;
+
+                default:
+                        emulated = EMULATE_FAIL;
+                }
+
+                break;
+
+        default:
+                emulated = EMULATE_FAIL;
+        }
+
+        return emulated;
+}
+
+int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
+{
+        int emulated = EMULATE_DONE;
+
+        switch (sprn) {
+        case SPRN_DEAR:
+                vcpu->arch.dear = vcpu->arch.gpr[rs]; break;
+        case SPRN_ESR:
+                vcpu->arch.esr = vcpu->arch.gpr[rs]; break;
+        case SPRN_DBCR0:
+                vcpu->arch.dbcr0 = vcpu->arch.gpr[rs]; break;
+        case SPRN_DBCR1:
+                vcpu->arch.dbcr1 = vcpu->arch.gpr[rs]; break;
+        case SPRN_DBSR:
+                vcpu->arch.dbsr &= ~vcpu->arch.gpr[rs]; break;
+        case SPRN_TSR:
+                vcpu->arch.tsr &= ~vcpu->arch.gpr[rs]; break;
+        case SPRN_TCR:
+                vcpu->arch.tcr = vcpu->arch.gpr[rs];
+                kvmppc_emulate_dec(vcpu);
+                break;
+
+        /* Note: SPRG4-7 are user-readable. These values are
+         * loaded into the real SPRGs when resuming the
+         * guest. */
+        case SPRN_SPRG4:
+                vcpu->arch.sprg4 = vcpu->arch.gpr[rs]; break;
+        case SPRN_SPRG5:
+                vcpu->arch.sprg5 = vcpu->arch.gpr[rs]; break;
+        case SPRN_SPRG6:
+                vcpu->arch.sprg6 = vcpu->arch.gpr[rs]; break;
+        case SPRN_SPRG7:
+                vcpu->arch.sprg7 = vcpu->arch.gpr[rs]; break;
+
+        case SPRN_IVPR:
+                vcpu->arch.ivpr = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR0:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR1:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR2:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR3:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR4:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR5:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR6:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR7:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR8:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR9:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR10:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR11:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR12:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR13:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR14:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR15:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = vcpu->arch.gpr[rs];
+                break;
+
+        default:
+                emulated = EMULATE_FAIL;
+        }
+
+        return emulated;
+}
+
+int kvmppc_booke_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
+{
+        int emulated = EMULATE_DONE;
+
+        switch (sprn) {
+        case SPRN_IVPR:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivpr; break;
+        case SPRN_DEAR:
+                vcpu->arch.gpr[rt] = vcpu->arch.dear; break;
+        case SPRN_ESR:
+                vcpu->arch.gpr[rt] = vcpu->arch.esr; break;
+        case SPRN_DBCR0:
+                vcpu->arch.gpr[rt] = vcpu->arch.dbcr0; break;
+        case SPRN_DBCR1:
+                vcpu->arch.gpr[rt] = vcpu->arch.dbcr1; break;
+        case SPRN_DBSR:
+                vcpu->arch.gpr[rt] = vcpu->arch.dbsr; break;
+
+        case SPRN_IVOR0:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
+                break;
+        case SPRN_IVOR1:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
+                break;
+        case SPRN_IVOR2:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
+                break;
+        case SPRN_IVOR3:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
+                break;
+        case SPRN_IVOR4:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
+                break;
+        case SPRN_IVOR5:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
+                break;
+        case SPRN_IVOR6:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
+                break;
+        case SPRN_IVOR7:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
+                break;
+        case SPRN_IVOR8:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
+                break;
+        case SPRN_IVOR9:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
+                break;
+        case SPRN_IVOR10:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
+                break;
+        case SPRN_IVOR11:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
+                break;
+        case SPRN_IVOR12:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
+                break;
+        case SPRN_IVOR13:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
+                break;
+        case SPRN_IVOR14:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
+                break;
+        case SPRN_IVOR15:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
+                break;
+
+        default:
+                emulated = EMULATE_FAIL;
+        }
+
+        return emulated;
+}
diff --git a/arch/powerpc/kvm/booke_interrupts.S b/arch/powerpc/kvm/booke_interrupts.S
index 084ebcd7dd83..d0c6f841bbd1 100644
--- a/arch/powerpc/kvm/booke_interrupts.S
+++ b/arch/powerpc/kvm/booke_interrupts.S
@@ -86,6 +86,9 @@ KVM_HANDLER BOOKE_INTERRUPT_WATCHDOG
 KVM_HANDLER BOOKE_INTERRUPT_DTLB_MISS
 KVM_HANDLER BOOKE_INTERRUPT_ITLB_MISS
 KVM_HANDLER BOOKE_INTERRUPT_DEBUG
+KVM_HANDLER BOOKE_INTERRUPT_SPE_UNAVAIL
+KVM_HANDLER BOOKE_INTERRUPT_SPE_FP_DATA
+KVM_HANDLER BOOKE_INTERRUPT_SPE_FP_ROUND
 
 _GLOBAL(kvmppc_handler_len)
         .long kvmppc_handler_1 - kvmppc_handler_0
@@ -347,7 +350,9 @@ lightweight_exit:
         lwz     r3, VCPU_SHADOW_PID(r4)
         mtspr   SPRN_PID, r3
 
+#ifdef CONFIG_44x
         iccci   0, 0 /* XXX hack */
+#endif
 
         /* Load some guest volatiles. */
         lwz     r0, VCPU_GPR(r0)(r4)
diff --git a/arch/powerpc/kvm/e500.c b/arch/powerpc/kvm/e500.c
new file mode 100644
index 000000000000..d8067fd81cdd
--- /dev/null
+++ b/arch/powerpc/kvm/e500.c
@@ -0,0 +1,169 @@
+/*
+ * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: Yu Liu, <yu.liu@freescale.com>
+ *
+ * Description:
+ * This file is derived from arch/powerpc/kvm/44x.c,
+ * by Hollis Blanchard <hollisb@us.ibm.com>.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kvm_host.h>
+#include <linux/err.h>
+
+#include <asm/reg.h>
+#include <asm/cputable.h>
+#include <asm/tlbflush.h>
+#include <asm/kvm_e500.h>
+#include <asm/kvm_ppc.h>
+
+#include "booke.h"
+#include "e500_tlb.h"
+
+void kvmppc_core_load_host_debugstate(struct kvm_vcpu *vcpu)
+{
+}
+
+void kvmppc_core_load_guest_debugstate(struct kvm_vcpu *vcpu)
+{
+}
+
+void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
+{
+        kvmppc_e500_tlb_load(vcpu, cpu);
+}
+
+void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
+{
+        kvmppc_e500_tlb_put(vcpu);
+}
+
+int kvmppc_core_check_processor_compat(void)
+{
+        int r;
+
+        if (strcmp(cur_cpu_spec->cpu_name, "e500v2") == 0)
+                r = 0;
+        else
+                r = -ENOTSUPP;
+
+        return r;
+}
+
+int kvmppc_core_vcpu_setup(struct kvm_vcpu *vcpu)
+{
+        struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+
+        kvmppc_e500_tlb_setup(vcpu_e500);
+
+        /* Use the same core vertion as host's */
+        vcpu->arch.pvr = mfspr(SPRN_PVR);
+
+        return 0;
+}
+
+/* 'linear_address' is actually an encoding of AS|PID|EADDR . */
+int kvmppc_core_vcpu_translate(struct kvm_vcpu *vcpu,
+                               struct kvm_translation *tr)
+{
+        int index;
+        gva_t eaddr;
+        u8 pid;
+        u8 as;
+
+        eaddr = tr->linear_address;
+        pid = (tr->linear_address >> 32) & 0xff;
+        as = (tr->linear_address >> 40) & 0x1;
+
+        index = kvmppc_e500_tlb_search(vcpu, eaddr, pid, as);
+        if (index < 0) {
+                tr->valid = 0;
+                return 0;
+        }
+
+        tr->physical_address = kvmppc_mmu_xlate(vcpu, index, eaddr);
+        /* XXX what does "writeable" and "usermode" even mean? */
+        tr->valid = 1;
+
+        return 0;
+}
+
+struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
+{
+        struct kvmppc_vcpu_e500 *vcpu_e500;
+        struct kvm_vcpu *vcpu;
+        int err;
+
+        vcpu_e500 = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
+        if (!vcpu_e500) {
+                err = -ENOMEM;
+                goto out;
+        }
+
+        vcpu = &vcpu_e500->vcpu;
+        err = kvm_vcpu_init(vcpu, kvm, id);
+        if (err)
+                goto free_vcpu;
+
+        err = kvmppc_e500_tlb_init(vcpu_e500);
+        if (err)
+                goto uninit_vcpu;
+
+        return vcpu;
+
+uninit_vcpu:
+        kvm_vcpu_uninit(vcpu);
+free_vcpu:
+        kmem_cache_free(kvm_vcpu_cache, vcpu_e500);
+out:
+        return ERR_PTR(err);
+}
+
+void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
+{
+        struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+
+        kvmppc_e500_tlb_uninit(vcpu_e500);
+        kvm_vcpu_uninit(vcpu);
+        kmem_cache_free(kvm_vcpu_cache, vcpu_e500);
+}
+
+static int kvmppc_e500_init(void)
+{
+        int r, i;
+        unsigned long ivor[3];
+        unsigned long max_ivor = 0;
+
+        r = kvmppc_booke_init();
+        if (r)
+                return r;
+
+        /* copy extra E500 exception handlers */
+        ivor[0] = mfspr(SPRN_IVOR32);
+        ivor[1] = mfspr(SPRN_IVOR33);
+        ivor[2] = mfspr(SPRN_IVOR34);
+        for (i = 0; i < 3; i++) {
+                if (ivor[i] > max_ivor)
+                        max_ivor = ivor[i];
+
+                memcpy((void *)kvmppc_booke_handlers + ivor[i],
+                       kvmppc_handlers_start + (i + 16) * kvmppc_handler_len,
+                       kvmppc_handler_len);
+        }
+        flush_icache_range(kvmppc_booke_handlers,
+                        kvmppc_booke_handlers + max_ivor + kvmppc_handler_len);
+
+        return kvm_init(NULL, sizeof(struct kvmppc_vcpu_e500), THIS_MODULE);
+}
+
+static void kvmppc_e500_exit(void)
+{
+        kvmppc_booke_exit();
+}
+
+module_init(kvmppc_e500_init);
+module_exit(kvmppc_e500_exit);
diff --git a/arch/powerpc/kvm/e500_emulate.c b/arch/powerpc/kvm/e500_emulate.c
new file mode 100644
index 000000000000..3f760414b9f8
--- /dev/null
+++ b/arch/powerpc/kvm/e500_emulate.c
@@ -0,0 +1,202 @@
+/*
+ * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: Yu Liu, <yu.liu@freescale.com>
+ *
+ * Description:
+ * This file is derived from arch/powerpc/kvm/44x_emulate.c,
+ * by Hollis Blanchard <hollisb@us.ibm.com>.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ */
+
+#include <asm/kvm_ppc.h>
+#include <asm/disassemble.h>
+#include <asm/kvm_e500.h>
+
+#include "booke.h"
+#include "e500_tlb.h"
+
+#define XOP_TLBIVAX 786
+#define XOP_TLBSX   914
+#define XOP_TLBRE   946
+#define XOP_TLBWE   978
+
+int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
+                           unsigned int inst, int *advance)
+{
+        int emulated = EMULATE_DONE;
+        int ra;
+        int rb;
+
+        switch (get_op(inst)) {
+        case 31:
+                switch (get_xop(inst)) {
+
+                case XOP_TLBRE:
+                        emulated = kvmppc_e500_emul_tlbre(vcpu);
+                        break;
+
+                case XOP_TLBWE:
+                        emulated = kvmppc_e500_emul_tlbwe(vcpu);
+                        break;
+
+                case XOP_TLBSX:
+                        rb = get_rb(inst);
+                        emulated = kvmppc_e500_emul_tlbsx(vcpu,rb);
+                        break;
+
+                case XOP_TLBIVAX:
+                        ra = get_ra(inst);
+                        rb = get_rb(inst);
+                        emulated = kvmppc_e500_emul_tlbivax(vcpu, ra, rb);
+                        break;
+
+                default:
+                        emulated = EMULATE_FAIL;
+                }
+
+                break;
+
+        default:
+                emulated = EMULATE_FAIL;
+        }
+
+        if (emulated == EMULATE_FAIL)
+                emulated = kvmppc_booke_emulate_op(run, vcpu, inst, advance);
+
+        return emulated;
+}
+
+int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
+{
+        struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+        int emulated = EMULATE_DONE;
+
+        switch (sprn) {
+        case SPRN_PID:
+                vcpu_e500->pid[0] = vcpu->arch.shadow_pid =
+                        vcpu->arch.pid = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_PID1:
+                vcpu_e500->pid[1] = vcpu->arch.gpr[rs]; break;
+        case SPRN_PID2:
+                vcpu_e500->pid[2] = vcpu->arch.gpr[rs]; break;
+        case SPRN_MAS0:
+                vcpu_e500->mas0 = vcpu->arch.gpr[rs]; break;
+        case SPRN_MAS1:
+                vcpu_e500->mas1 = vcpu->arch.gpr[rs]; break;
+        case SPRN_MAS2:
+                vcpu_e500->mas2 = vcpu->arch.gpr[rs]; break;
+        case SPRN_MAS3:
+                vcpu_e500->mas3 = vcpu->arch.gpr[rs]; break;
+        case SPRN_MAS4:
+                vcpu_e500->mas4 = vcpu->arch.gpr[rs]; break;
+        case SPRN_MAS6:
+                vcpu_e500->mas6 = vcpu->arch.gpr[rs]; break;
+        case SPRN_MAS7:
+                vcpu_e500->mas7 = vcpu->arch.gpr[rs]; break;
+        case SPRN_L1CSR1:
+                vcpu_e500->l1csr1 = vcpu->arch.gpr[rs]; break;
+        case SPRN_HID0:
+                vcpu_e500->hid0 = vcpu->arch.gpr[rs]; break;
+        case SPRN_HID1:
+                vcpu_e500->hid1 = vcpu->arch.gpr[rs]; break;
+
+        case SPRN_MMUCSR0:
+                emulated = kvmppc_e500_emul_mt_mmucsr0(vcpu_e500,
+                                vcpu->arch.gpr[rs]);
+                break;
+
+        /* extra exceptions */
+        case SPRN_IVOR32:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR33:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR34:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND] = vcpu->arch.gpr[rs];
+                break;
+        case SPRN_IVOR35:
+                vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] = vcpu->arch.gpr[rs];
+                break;
+
+        default:
+                emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, rs);
+        }
+
+        return emulated;
+}
+
+int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
+{
+        struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+        int emulated = EMULATE_DONE;
+
+        switch (sprn) {
+        case SPRN_PID:
+                vcpu->arch.gpr[rt] = vcpu_e500->pid[0]; break;
+        case SPRN_PID1:
+                vcpu->arch.gpr[rt] = vcpu_e500->pid[1]; break;
+        case SPRN_PID2:
+                vcpu->arch.gpr[rt] = vcpu_e500->pid[2]; break;
+        case SPRN_MAS0:
+                vcpu->arch.gpr[rt] = vcpu_e500->mas0; break;
+        case SPRN_MAS1:
+                vcpu->arch.gpr[rt] = vcpu_e500->mas1; break;
+        case SPRN_MAS2:
+                vcpu->arch.gpr[rt] = vcpu_e500->mas2; break;
+        case SPRN_MAS3:
+                vcpu->arch.gpr[rt] = vcpu_e500->mas3; break;
+        case SPRN_MAS4:
+                vcpu->arch.gpr[rt] = vcpu_e500->mas4; break;
+        case SPRN_MAS6:
+                vcpu->arch.gpr[rt] = vcpu_e500->mas6; break;
+        case SPRN_MAS7:
+                vcpu->arch.gpr[rt] = vcpu_e500->mas7; break;
+
+        case SPRN_TLB0CFG:
+                vcpu->arch.gpr[rt] = mfspr(SPRN_TLB0CFG);
+                vcpu->arch.gpr[rt] &= ~0xfffUL;
+                vcpu->arch.gpr[rt] |= vcpu_e500->guest_tlb_size[0];
+                break;
+
+        case SPRN_TLB1CFG:
+                vcpu->arch.gpr[rt] = mfspr(SPRN_TLB1CFG);
+                vcpu->arch.gpr[rt] &= ~0xfffUL;
+                vcpu->arch.gpr[rt] |= vcpu_e500->guest_tlb_size[1];
+                break;
+
+        case SPRN_L1CSR1:
+                vcpu->arch.gpr[rt] = vcpu_e500->l1csr1; break;
+        case SPRN_HID0:
+                vcpu->arch.gpr[rt] = vcpu_e500->hid0; break;
+        case SPRN_HID1:
+                vcpu->arch.gpr[rt] = vcpu_e500->hid1; break;
+
+        case SPRN_MMUCSR0:
+                vcpu->arch.gpr[rt] = 0; break;
+
+        /* extra exceptions */
+        case SPRN_IVOR32:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL];
+                break;
+        case SPRN_IVOR33:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA];
+                break;
+        case SPRN_IVOR34:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND];
+                break;
+        case SPRN_IVOR35:
+                vcpu->arch.gpr[rt] = vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR];
+                break;
+        default:
+                emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, rt);
+        }
+
+        return emulated;
+}
+
diff --git a/arch/powerpc/kvm/e500_tlb.c b/arch/powerpc/kvm/e500_tlb.c
new file mode 100644
index 000000000000..0e773fc2d5e4
--- /dev/null
+++ b/arch/powerpc/kvm/e500_tlb.c
@@ -0,0 +1,757 @@
+/*
+ * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: Yu Liu, yu.liu@freescale.com
+ *
+ * Description:
+ * This file is based on arch/powerpc/kvm/44x_tlb.c,
+ * by Hollis Blanchard <hollisb@us.ibm.com>.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/types.h>
+#include <linux/string.h>
+#include <linux/kvm.h>
+#include <linux/kvm_host.h>
+#include <linux/highmem.h>
+#include <asm/kvm_ppc.h>
+#include <asm/kvm_e500.h>
+
+#include "../mm/mmu_decl.h"
+#include "e500_tlb.h"
+
+#define to_htlb1_esel(esel) (tlb1_entry_num - (esel) - 1)
+
+static unsigned int tlb1_entry_num;
+
+void kvmppc_dump_tlbs(struct kvm_vcpu *vcpu)
+{
+        struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+        struct tlbe *tlbe;
+        int i, tlbsel;
+
+        printk("| %8s | %8s | %8s | %8s | %8s |\n",
+                        "nr", "mas1", "mas2", "mas3", "mas7");
+
+        for (tlbsel = 0; tlbsel < 2; tlbsel++) {
+                printk("Guest TLB%d:\n", tlbsel);
+                for (i = 0; i < vcpu_e500->guest_tlb_size[tlbsel]; i++) {
+                        tlbe = &vcpu_e500->guest_tlb[tlbsel][i];
+                        if (tlbe->mas1 & MAS1_VALID)
+                                printk(" G[%d][%3d] |  %08X | %08X | %08X | %08X |\n",
+                                        tlbsel, i, tlbe->mas1, tlbe->mas2,
+                                        tlbe->mas3, tlbe->mas7);
+                }
+        }
+
+        for (tlbsel = 0; tlbsel < 2; tlbsel++) {
+                printk("Shadow TLB%d:\n", tlbsel);
+                for (i = 0; i < vcpu_e500->shadow_tlb_size[tlbsel]; i++) {
+                        tlbe = &vcpu_e500->shadow_tlb[tlbsel][i];
+                        if (tlbe->mas1 & MAS1_VALID)
+                                printk(" S[%d][%3d] |  %08X | %08X | %08X | %08X |\n",
+                                        tlbsel, i, tlbe->mas1, tlbe->mas2,
+                                        tlbe->mas3, tlbe->mas7);
+                }
+        }
+}
+
+static inline unsigned int tlb0_get_next_victim(
+                struct kvmppc_vcpu_e500 *vcpu_e500)
+{
+        unsigned int victim;
+
+        victim = vcpu_e500->guest_tlb_nv[0]++;
+        if (unlikely(vcpu_e500->guest_tlb_nv[0] >= KVM_E500_TLB0_WAY_NUM))
+                vcpu_e500->guest_tlb_nv[0] = 0;
+
+        return victim;
+}
+
+static inline unsigned int tlb1_max_shadow_size(void)
+{
+        return tlb1_entry_num - tlbcam_index;
+}
+
+static inline int tlbe_is_writable(struct tlbe *tlbe)
+{
+        return tlbe->mas3 & (MAS3_SW|MAS3_UW);
+}
+
+static inline u32 e500_shadow_mas3_attrib(u32 mas3, int usermode)
+{
+        /* Mask off reserved bits. */
+        mas3 &= MAS3_ATTRIB_MASK;
+
+        if (!usermode) {
+                /* Guest is in supervisor mode,
+                 * so we need to translate guest
+                 * supervisor permissions into user permissions. */
+                mas3 &= ~E500_TLB_USER_PERM_MASK;
+                mas3 |= (mas3 & E500_TLB_SUPER_PERM_MASK) << 1;
+        }
+
+        return mas3 | E500_TLB_SUPER_PERM_MASK;
+}
+
+static inline u32 e500_shadow_mas2_attrib(u32 mas2, int usermode)
+{
+#ifdef CONFIG_SMP
+        return (mas2 & MAS2_ATTRIB_MASK) | MAS2_M;
+#else
+        return mas2 & MAS2_ATTRIB_MASK;
+#endif
+}
+
+/*
+ * writing shadow tlb entry to host TLB
+ */
+static inline void __write_host_tlbe(struct tlbe *stlbe)
+{
+        mtspr(SPRN_MAS1, stlbe->mas1);
+        mtspr(SPRN_MAS2, stlbe->mas2);
+        mtspr(SPRN_MAS3, stlbe->mas3);
+        mtspr(SPRN_MAS7, stlbe->mas7);
+        __asm__ __volatile__ ("tlbwe\n" : : );
+}
+
+static inline void write_host_tlbe(struct kvmppc_vcpu_e500 *vcpu_e500,
+                int tlbsel, int esel)
+{
+        struct tlbe *stlbe = &vcpu_e500->shadow_tlb[tlbsel][esel];
+
+        local_irq_disable();
+        if (tlbsel == 0) {
+                __write_host_tlbe(stlbe);
+        } else {
+                unsigned register mas0;
+
+                mas0 = mfspr(SPRN_MAS0);
+
+                mtspr(SPRN_MAS0, MAS0_TLBSEL(1) | MAS0_ESEL(to_htlb1_esel(esel)));
+                __write_host_tlbe(stlbe);
+
+                mtspr(SPRN_MAS0, mas0);
+        }
+        local_irq_enable();
+}
+
+void kvmppc_e500_tlb_load(struct kvm_vcpu *vcpu, int cpu)
+{
+        struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+        int i;
+        unsigned register mas0;
+
+        /* Load all valid TLB1 entries to reduce guest tlb miss fault */
+        local_irq_disable();
+        mas0 = mfspr(SPRN_MAS0);
+        for (i = 0; i < tlb1_max_shadow_size(); i++) {
+                struct tlbe *stlbe = &vcpu_e500->shadow_tlb[1][i];
+
+                if (get_tlb_v(stlbe)) {
+                        mtspr(SPRN_MAS0, MAS0_TLBSEL(1)
+                                        | MAS0_ESEL(to_htlb1_esel(i)));
+                        __write_host_tlbe(stlbe);
+                }
+        }
+        mtspr(SPRN_MAS0, mas0);
+        local_irq_enable();
+}
+
+void kvmppc_e500_tlb_put(struct kvm_vcpu *vcpu)
+{
+        _tlbil_all();
+}
+
+/* Search the guest TLB for a matching entry. */
+static int kvmppc_e500_tlb_index(struct kvmppc_vcpu_e500 *vcpu_e500,
+                gva_t eaddr, int tlbsel, unsigned int pid, int as)
+{
+        int i;
+
+        /* XXX Replace loop with fancy data structures. */
+        for (i = 0; i < vcpu_e500->guest_tlb_size[tlbsel]; i++) {
+                struct tlbe *tlbe = &vcpu_e500->guest_tlb[tlbsel][i];
+                unsigned int tid;
+
+                if (eaddr < get_tlb_eaddr(tlbe))
+                        continue;
+
+                if (eaddr > get_tlb_end(tlbe))
+                        continue;
+
+                tid = get_tlb_tid(tlbe);
+                if (tid && (tid != pid))
+                        continue;
+
+                if (!get_tlb_v(tlbe))
+                        continue;
+
+                if (get_tlb_ts(tlbe) != as && as != -1)
+                        continue;
+
+                return i;
+        }
+
+        return -1;
+}
+
+static void kvmppc_e500_shadow_release(struct kvmppc_vcpu_e500 *vcpu_e500,
+                int tlbsel, int esel)
+{
+        struct tlbe *stlbe = &vcpu_e500->shadow_tlb[tlbsel][esel];
+        struct page *page = vcpu_e500->shadow_pages[tlbsel][esel];
+
+        if (page) {
+                vcpu_e500->shadow_pages[tlbsel][esel] = NULL;
+
+                if (get_tlb_v(stlbe)) {
+                        if (tlbe_is_writable(stlbe))
+                                kvm_release_page_dirty(page);
+                        else
+                                kvm_release_page_clean(page);
+                }
+        }
+}
+
+static void kvmppc_e500_stlbe_invalidate(struct kvmppc_vcpu_e500 *vcpu_e500,
+                int tlbsel, int esel)
+{
+        struct tlbe *stlbe = &vcpu_e500->shadow_tlb[tlbsel][esel];
+
+        kvmppc_e500_shadow_release(vcpu_e500, tlbsel, esel);
+        stlbe->mas1 = 0;
+        KVMTRACE_5D(STLB_INVAL, &vcpu_e500->vcpu, index_of(tlbsel, esel),
+                        stlbe->mas1, stlbe->mas2, stlbe->mas3, stlbe->mas7,
+                        handler);
+}
+
+static void kvmppc_e500_tlb1_invalidate(struct kvmppc_vcpu_e500 *vcpu_e500,
+                gva_t eaddr, gva_t eend, u32 tid)
+{
+        unsigned int pid = tid & 0xff;
+        unsigned int i;
+
+        /* XXX Replace loop with fancy data structures. */
+        for (i = 0; i < vcpu_e500->guest_tlb_size[1]; i++) {
+                struct tlbe *stlbe = &vcpu_e500->shadow_tlb[1][i];
+                unsigned int tid;
+
+                if (!get_tlb_v(stlbe))
+                        continue;
+
+                if (eend < get_tlb_eaddr(stlbe))
+                        continue;
+
+                if (eaddr > get_tlb_end(stlbe))
+                        continue;
+
+                tid = get_tlb_tid(stlbe);
+                if (tid && (tid != pid))
+                        continue;
+
+                kvmppc_e500_stlbe_invalidate(vcpu_e500, 1, i);
+                write_host_tlbe(vcpu_e500, 1, i);
+        }
+}
+
+static inline void kvmppc_e500_deliver_tlb_miss(struct kvm_vcpu *vcpu,
+                unsigned int eaddr, int as)
+{
+        struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+        unsigned int victim, pidsel, tsized;
+        int tlbsel;
+
+        /* since we only have two TLBs, only lower bit is used. */
+        tlbsel = (vcpu_e500->mas4 >> 28) & 0x1;
+        victim = (tlbsel == 0) ? tlb0_get_next_victim(vcpu_e500) : 0;
+        pidsel = (vcpu_e500->mas4 >> 16) & 0xf;
+        tsized = (vcpu_e500->mas4 >> 8) & 0xf;
+
+        vcpu_e500->mas0 = MAS0_TLBSEL(tlbsel) | MAS0_ESEL(victim)
+                | MAS0_NV(vcpu_e500->guest_tlb_nv[tlbsel]);
+        vcpu_e500->mas1 = MAS1_VALID | (as ? MAS1_TS : 0)
+                | MAS1_TID(vcpu_e500->pid[pidsel])
+                | MAS1_TSIZE(tsized);
+        vcpu_e500->mas2 = (eaddr & MAS2_EPN)
+                | (vcpu_e500->mas4 & MAS2_ATTRIB_MASK);
+        vcpu_e500->mas3 &= MAS3_U0 | MAS3_U1 | MAS3_U2 | MAS3_U3;
+        vcpu_e500->mas6 = (vcpu_e500->mas6 & MAS6_SPID1)
+                | (get_cur_pid(vcpu) << 16)
+                | (as ? MAS6_SAS : 0);
+        vcpu_e500->mas7 = 0;
+}
+
+static inline void kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,
+        u64 gvaddr, gfn_t gfn, struct tlbe *gtlbe, int tlbsel, int esel)
+{
+        struct page *new_page;
+        struct tlbe *stlbe;
+        hpa_t hpaddr;
+
+        stlbe = &vcpu_e500->shadow_tlb[tlbsel][esel];
+
+        /* Get reference to new page. */
+        new_page = gfn_to_page(vcpu_e500->vcpu.kvm, gfn);
+        if (is_error_page(new_page)) {
+                printk(KERN_ERR "Couldn't get guest page for gfn %lx!\n", gfn);
+                kvm_release_page_clean(new_page);
+                return;
+        }
+        hpaddr = page_to_phys(new_page);
+
+        /* Drop reference to old page. */
+        kvmppc_e500_shadow_release(vcpu_e500, tlbsel, esel);
+
+        vcpu_e500->shadow_pages[tlbsel][esel] = new_page;
+
+        /* Force TS=1 IPROT=0 TSIZE=4KB for all guest mappings. */
+        stlbe->mas1 = MAS1_TSIZE(BOOKE_PAGESZ_4K)
+                | MAS1_TID(get_tlb_tid(gtlbe)) | MAS1_TS | MAS1_VALID;
+        stlbe->mas2 = (gvaddr & MAS2_EPN)
+                | e500_shadow_mas2_attrib(gtlbe->mas2,
+                                vcpu_e500->vcpu.arch.msr & MSR_PR);
+        stlbe->mas3 = (hpaddr & MAS3_RPN)
+                | e500_shadow_mas3_attrib(gtlbe->mas3,
+                                vcpu_e500->vcpu.arch.msr & MSR_PR);
+        stlbe->mas7 = (hpaddr >> 32) & MAS7_RPN;
+
+        KVMTRACE_5D(STLB_WRITE, &vcpu_e500->vcpu, index_of(tlbsel, esel),
+                        stlbe->mas1, stlbe->mas2, stlbe->mas3, stlbe->mas7,
+                        handler);
+}
+
+/* XXX only map the one-one case, for now use TLB0 */
+static int kvmppc_e500_stlbe_map(struct kvmppc_vcpu_e500 *vcpu_e500,
+                int tlbsel, int esel)
+{
+        struct tlbe *gtlbe;
+
+        gtlbe = &vcpu_e500->guest_tlb[tlbsel][esel];
+
+        kvmppc_e500_shadow_map(vcpu_e500, get_tlb_eaddr(gtlbe),
+                        get_tlb_raddr(gtlbe) >> PAGE_SHIFT,
+                        gtlbe, tlbsel, esel);
+
+        return esel;
+}
+
+/* Caller must ensure that the specified guest TLB entry is safe to insert into
+ * the shadow TLB. */
+/* XXX for both one-one and one-to-many , for now use TLB1 */
+static int kvmppc_e500_tlb1_map(struct kvmppc_vcpu_e500 *vcpu_e500,
+                u64 gvaddr, gfn_t gfn, struct tlbe *gtlbe)
+{
+        unsigned int victim;
+
+        victim = vcpu_e500->guest_tlb_nv[1]++;
+
+        if (unlikely(vcpu_e500->guest_tlb_nv[1] >= tlb1_max_shadow_size()))
+                vcpu_e500->guest_tlb_nv[1] = 0;
+
+        kvmppc_e500_shadow_map(vcpu_e500, gvaddr, gfn, gtlbe, 1, victim);
+
+        return victim;
+}
+
+/* Invalidate all guest kernel mappings when enter usermode,
+ * so that when they fault back in they will get the
+ * proper permission bits. */
+void kvmppc_mmu_priv_switch(struct kvm_vcpu *vcpu, int usermode)
+{
+        if (usermode) {
+                struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+                int i;
+
+                /* XXX Replace loop with fancy data structures. */
+                for (i = 0; i < tlb1_max_shadow_size(); i++)
+                        kvmppc_e500_stlbe_invalidate(vcpu_e500, 1, i);
+
+                _tlbil_all();
+        }
+}
+
+static int kvmppc_e500_gtlbe_invalidate(struct kvmppc_vcpu_e500 *vcpu_e500,
+                int tlbsel, int esel)
+{
+        struct tlbe *gtlbe = &vcpu_e500->guest_tlb[tlbsel][esel];
+
+        if (unlikely(get_tlb_iprot(gtlbe)))
+                return -1;
+
+        if (tlbsel == 1) {
+                kvmppc_e500_tlb1_invalidate(vcpu_e500, get_tlb_eaddr(gtlbe),
+                                get_tlb_end(gtlbe),
+                                get_tlb_tid(gtlbe));
+        } else {
+                kvmppc_e500_stlbe_invalidate(vcpu_e500, tlbsel, esel);
+        }
+
+        gtlbe->mas1 = 0;
+
+        return 0;
+}
+
+int kvmppc_e500_emul_mt_mmucsr0(struct kvmppc_vcpu_e500 *vcpu_e500, ulong value)
+{
+        int esel;
+
+        if (value & MMUCSR0_TLB0FI)
+                for (esel = 0; esel < vcpu_e500->guest_tlb_size[0]; esel++)
+                        kvmppc_e500_gtlbe_invalidate(vcpu_e500, 0, esel);
+        if (value & MMUCSR0_TLB1FI)
+                for (esel = 0; esel < vcpu_e500->guest_tlb_size[1]; esel++)
+                        kvmppc_e500_gtlbe_invalidate(vcpu_e500, 1, esel);
+
+        _tlbil_all();
+
+        return EMULATE_DONE;
+}
+
+int kvmppc_e500_emul_tlbivax(struct kvm_vcpu *vcpu, int ra, int rb)
+{
+        struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+        unsigned int ia;
+        int esel, tlbsel;
+        gva_t ea;
+
+        ea = ((ra) ? vcpu->arch.gpr[ra] : 0) + vcpu->arch.gpr[rb];
+
+        ia = (ea >> 2) & 0x1;
+
+        /* since we only have two TLBs, only lower bit is used. */
+        tlbsel = (ea >> 3) & 0x1;
+
+        if (ia) {
+                /* invalidate all entries */
+                for (esel = 0; esel < vcpu_e500->guest_tlb_size[tlbsel]; esel++)
+                        kvmppc_e500_gtlbe_invalidate(vcpu_e500, tlbsel, esel);
+        } else {
+                ea &= 0xfffff000;
+                esel = kvmppc_e500_tlb_index(vcpu_e500, ea, tlbsel,
+                                get_cur_pid(vcpu), -1);
+                if (esel >= 0)
+                        kvmppc_e500_gtlbe_invalidate(vcpu_e500, tlbsel, esel);
+        }
+
+        _tlbil_all();
+
+        return EMULATE_DONE;
+}
+
+int kvmppc_e500_emul_tlbre(struct kvm_vcpu *vcpu)
+{
+        struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+        int tlbsel, esel;
+        struct tlbe *gtlbe;
+
+        tlbsel = get_tlb_tlbsel(vcpu_e500);
+        esel = get_tlb_esel(vcpu_e500, tlbsel);
+
+        gtlbe = &vcpu_e500->guest_tlb[tlbsel][esel];
+        vcpu_e500->mas0 &= ~MAS0_NV(~0);
+        vcpu_e500->mas0 |= MAS0_NV(vcpu_e500->guest_tlb_nv[tlbsel]);
+        vcpu_e500->mas1 = gtlbe->mas1;
+        vcpu_e500->mas2 = gtlbe->mas2;
+        vcpu_e500->mas3 = gtlbe->mas3;
+        vcpu_e500->mas7 = gtlbe->mas7;
+
+        return EMULATE_DONE;
+}
+
+int kvmppc_e500_emul_tlbsx(struct kvm_vcpu *vcpu, int rb)
+{
+        struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+        int as = !!get_cur_sas(vcpu_e500);
+        unsigned int pid = get_cur_spid(vcpu_e500);
+        int esel, tlbsel;
+        struct tlbe *gtlbe = NULL;
+        gva_t ea;
+
+        ea = vcpu->arch.gpr[rb];
+
+        for (tlbsel = 0; tlbsel < 2; tlbsel++) {
+                esel = kvmppc_e500_tlb_index(vcpu_e500, ea, tlbsel, pid, as);
+                if (esel >= 0) {
+                        gtlbe = &vcpu_e500->guest_tlb[tlbsel][esel];
+                        break;
+                }
+        }
+
+        if (gtlbe) {
+                vcpu_e500->mas0 = MAS0_TLBSEL(tlbsel) | MAS0_ESEL(esel)
+                        | MAS0_NV(vcpu_e500->guest_tlb_nv[tlbsel]);
+                vcpu_e500->mas1 = gtlbe->mas1;
+                vcpu_e500->mas2 = gtlbe->mas2;
+                vcpu_e500->mas3 = gtlbe->mas3;
+                vcpu_e500->mas7 = gtlbe->mas7;
+        } else {
+                int victim;
+
+                /* since we only have two TLBs, only lower bit is used. */
+                tlbsel = vcpu_e500->mas4 >> 28 & 0x1;
+                victim = (tlbsel == 0) ? tlb0_get_next_victim(vcpu_e500) : 0;
+
+                vcpu_e500->mas0 = MAS0_TLBSEL(tlbsel) | MAS0_ESEL(victim)
+                        | MAS0_NV(vcpu_e500->guest_tlb_nv[tlbsel]);
+                vcpu_e500->mas1 = (vcpu_e500->mas6 & MAS6_SPID0)
+                        | (vcpu_e500->mas6 & (MAS6_SAS ? MAS1_TS : 0))
+                        | (vcpu_e500->mas4 & MAS4_TSIZED(~0));
+                vcpu_e500->mas2 &= MAS2_EPN;
+                vcpu_e500->mas2 |= vcpu_e500->mas4 & MAS2_ATTRIB_MASK;
+                vcpu_e500->mas3 &= MAS3_U0 | MAS3_U1 | MAS3_U2 | MAS3_U3;
+                vcpu_e500->mas7 = 0;
+        }
+
+        return EMULATE_DONE;
+}
+
+int kvmppc_e500_emul_tlbwe(struct kvm_vcpu *vcpu)
+{
+        struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+        u64 eaddr;
+        u64 raddr;
+        u32 tid;
+        struct tlbe *gtlbe;
+        int tlbsel, esel, stlbsel, sesel;
+
+        tlbsel = get_tlb_tlbsel(vcpu_e500);
+        esel = get_tlb_esel(vcpu_e500, tlbsel);
+
+        gtlbe = &vcpu_e500->guest_tlb[tlbsel][esel];
+
+        if (get_tlb_v(gtlbe) && tlbsel == 1) {
+                eaddr = get_tlb_eaddr(gtlbe);
+                tid = get_tlb_tid(gtlbe);
+                kvmppc_e500_tlb1_invalidate(vcpu_e500, eaddr,
+                                get_tlb_end(gtlbe), tid);
+        }
+
+        gtlbe->mas1 = vcpu_e500->mas1;
+        gtlbe->mas2 = vcpu_e500->mas2;
+        gtlbe->mas3 = vcpu_e500->mas3;
+        gtlbe->mas7 = vcpu_e500->mas7;
+
+        KVMTRACE_5D(GTLB_WRITE, vcpu, vcpu_e500->mas0,
+                        gtlbe->mas1, gtlbe->mas2, gtlbe->mas3, gtlbe->mas7,
+                        handler);
+
+        /* Invalidate shadow mappings for the about-to-be-clobbered TLBE. */
+        if (tlbe_is_host_safe(vcpu, gtlbe)) {
+                switch (tlbsel) {
+                case 0:
+                        /* TLB0 */
+                        gtlbe->mas1 &= ~MAS1_TSIZE(~0);
+                        gtlbe->mas1 |= MAS1_TSIZE(BOOKE_PAGESZ_4K);
+
+                        stlbsel = 0;
+                        sesel = kvmppc_e500_stlbe_map(vcpu_e500, 0, esel);
+
+                        break;
+
+                case 1:
+                        /* TLB1 */
+                        eaddr = get_tlb_eaddr(gtlbe);
+                        raddr = get_tlb_raddr(gtlbe);
+
+                        /* Create a 4KB mapping on the host.
+                         * If the guest wanted a large page,
+                         * only the first 4KB is mapped here and the rest
+                         * are mapped on the fly. */
+                        stlbsel = 1;
+                        sesel = kvmppc_e500_tlb1_map(vcpu_e500, eaddr,
+                                        raddr >> PAGE_SHIFT, gtlbe);
+                        break;
+
+                default:
+                        BUG();
+                }
+                write_host_tlbe(vcpu_e500, stlbsel, sesel);
+        }
+
+        return EMULATE_DONE;
+}
+
+int kvmppc_mmu_itlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
+{
+        unsigned int as = !!(vcpu->arch.msr & MSR_IS);
+
+        return kvmppc_e500_tlb_search(vcpu, eaddr, get_cur_pid(vcpu), as);
+}
+
+int kvmppc_mmu_dtlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
+{
+        unsigned int as = !!(vcpu->arch.msr & MSR_DS);
+
+        return kvmppc_e500_tlb_search(vcpu, eaddr, get_cur_pid(vcpu), as);
+}
+
+void kvmppc_mmu_itlb_miss(struct kvm_vcpu *vcpu)
+{
+        unsigned int as = !!(vcpu->arch.msr & MSR_IS);
+
+        kvmppc_e500_deliver_tlb_miss(vcpu, vcpu->arch.pc, as);
+}
+
+void kvmppc_mmu_dtlb_miss(struct kvm_vcpu *vcpu)
+{
+        unsigned int as = !!(vcpu->arch.msr & MSR_DS);
+
+        kvmppc_e500_deliver_tlb_miss(vcpu, vcpu->arch.fault_dear, as);
+}
+
+gpa_t kvmppc_mmu_xlate(struct kvm_vcpu *vcpu, unsigned int index,
+                        gva_t eaddr)
+{
+        struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+        struct tlbe *gtlbe =
+                &vcpu_e500->guest_tlb[tlbsel_of(index)][esel_of(index)];
+        u64 pgmask = get_tlb_bytes(gtlbe) - 1;
+
+        return get_tlb_raddr(gtlbe) | (eaddr & pgmask);
+}
+
+void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
+{
+        struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+        int tlbsel, i;
+
+        for (tlbsel = 0; tlbsel < 2; tlbsel++)
+                for (i = 0; i < vcpu_e500->guest_tlb_size[tlbsel]; i++)
+                        kvmppc_e500_shadow_release(vcpu_e500, tlbsel, i);
+
+        /* discard all guest mapping */
+        _tlbil_all();
+}
+
+void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 eaddr, gpa_t gpaddr,
+                        unsigned int index)
+{
+        struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+        int tlbsel = tlbsel_of(index);
+        int esel = esel_of(index);
+        int stlbsel, sesel;
+
+        switch (tlbsel) {
+        case 0:
+                stlbsel = 0;
+                sesel = esel;
+                break;
+
+        case 1: {
+                gfn_t gfn = gpaddr >> PAGE_SHIFT;
+                struct tlbe *gtlbe
+                        = &vcpu_e500->guest_tlb[tlbsel][esel];
+
+                stlbsel = 1;
+                sesel = kvmppc_e500_tlb1_map(vcpu_e500, eaddr, gfn, gtlbe);
+                break;
+        }
+
+        default:
+                BUG();
+                break;
+        }
+        write_host_tlbe(vcpu_e500, stlbsel, sesel);
+}
+
+int kvmppc_e500_tlb_search(struct kvm_vcpu *vcpu,
+                                gva_t eaddr, unsigned int pid, int as)
+{
+        struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+        int esel, tlbsel;
+
+        for (tlbsel = 0; tlbsel < 2; tlbsel++) {
+                esel = kvmppc_e500_tlb_index(vcpu_e500, eaddr, tlbsel, pid, as);
+                if (esel >= 0)
+                        return index_of(tlbsel, esel);
+        }
+
+        return -1;
+}
+
+void kvmppc_e500_tlb_setup(struct kvmppc_vcpu_e500 *vcpu_e500)
+{
+        struct tlbe *tlbe;
+
+        /* Insert large initial mapping for guest. */
+        tlbe = &vcpu_e500->guest_tlb[1][0];
+        tlbe->mas1 = MAS1_VALID | MAS1_TSIZE(BOOKE_PAGESZ_256M);
+        tlbe->mas2 = 0;
+        tlbe->mas3 = E500_TLB_SUPER_PERM_MASK;
+        tlbe->mas7 = 0;
+
+        /* 4K map for serial output. Used by kernel wrapper. */
+        tlbe = &vcpu_e500->guest_tlb[1][1];
+        tlbe->mas1 = MAS1_VALID | MAS1_TSIZE(BOOKE_PAGESZ_4K);
+        tlbe->mas2 = (0xe0004500 & 0xFFFFF000) | MAS2_I | MAS2_G;
+        tlbe->mas3 = (0xe0004500 & 0xFFFFF000) | E500_TLB_SUPER_PERM_MASK;
+        tlbe->mas7 = 0;
+}
+
+int kvmppc_e500_tlb_init(struct kvmppc_vcpu_e500 *vcpu_e500)
+{
+        tlb1_entry_num = mfspr(SPRN_TLB1CFG) & 0xFFF;
+
+        vcpu_e500->guest_tlb_size[0] = KVM_E500_TLB0_SIZE;
+        vcpu_e500->guest_tlb[0] =
+                kzalloc(sizeof(struct tlbe) * KVM_E500_TLB0_SIZE, GFP_KERNEL);
+        if (vcpu_e500->guest_tlb[0] == NULL)
+                goto err_out;
+
+        vcpu_e500->shadow_tlb_size[0] = KVM_E500_TLB0_SIZE;
+        vcpu_e500->shadow_tlb[0] =
+                kzalloc(sizeof(struct tlbe) * KVM_E500_TLB0_SIZE, GFP_KERNEL);
+        if (vcpu_e500->shadow_tlb[0] == NULL)
+                goto err_out_guest0;
+
+        vcpu_e500->guest_tlb_size[1] = KVM_E500_TLB1_SIZE;
+        vcpu_e500->guest_tlb[1] =
+                kzalloc(sizeof(struct tlbe) * KVM_E500_TLB1_SIZE, GFP_KERNEL);
+        if (vcpu_e500->guest_tlb[1] == NULL)
+                goto err_out_shadow0;
+
+        vcpu_e500->shadow_tlb_size[1] = tlb1_entry_num;
+        vcpu_e500->shadow_tlb[1] =
+                kzalloc(sizeof(struct tlbe) * tlb1_entry_num, GFP_KERNEL);
+        if (vcpu_e500->shadow_tlb[1] == NULL)
+                goto err_out_guest1;
+
+        vcpu_e500->shadow_pages[0] = (struct page **)
+                kzalloc(sizeof(struct page *) * KVM_E500_TLB0_SIZE, GFP_KERNEL);
+        if (vcpu_e500->shadow_pages[0] == NULL)
+                goto err_out_shadow1;
+
+        vcpu_e500->shadow_pages[1] = (struct page **)
+                kzalloc(sizeof(struct page *) * tlb1_entry_num, GFP_KERNEL);
+        if (vcpu_e500->shadow_pages[1] == NULL)
+                goto err_out_page0;
+
+        return 0;
+
+err_out_page0:
+        kfree(vcpu_e500->shadow_pages[0]);
+err_out_shadow1:
+        kfree(vcpu_e500->shadow_tlb[1]);
+err_out_guest1:
+        kfree(vcpu_e500->guest_tlb[1]);
+err_out_shadow0:
+        kfree(vcpu_e500->shadow_tlb[0]);
+err_out_guest0:
+        kfree(vcpu_e500->guest_tlb[0]);
+err_out:
+        return -1;
+}
+
+void kvmppc_e500_tlb_uninit(struct kvmppc_vcpu_e500 *vcpu_e500)
+{
+        kfree(vcpu_e500->shadow_pages[1]);
+        kfree(vcpu_e500->shadow_pages[0]);
+        kfree(vcpu_e500->shadow_tlb[1]);
+        kfree(vcpu_e500->guest_tlb[1]);
+        kfree(vcpu_e500->shadow_tlb[0]);
+        kfree(vcpu_e500->guest_tlb[0]);
+}
diff --git a/arch/powerpc/kvm/e500_tlb.h b/arch/powerpc/kvm/e500_tlb.h
new file mode 100644
index 000000000000..45b064b76906
--- /dev/null
+++ b/arch/powerpc/kvm/e500_tlb.h
@@ -0,0 +1,185 @@
+/*
+ * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: Yu Liu, yu.liu@freescale.com
+ *
+ * Description:
+ * This file is based on arch/powerpc/kvm/44x_tlb.h,
+ * by Hollis Blanchard <hollisb@us.ibm.com>.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __KVM_E500_TLB_H__
+#define __KVM_E500_TLB_H__
+
+#include <linux/kvm_host.h>
+#include <asm/mmu-fsl-booke.h>
+#include <asm/tlb.h>
+#include <asm/kvm_e500.h>
+
+#define KVM_E500_TLB0_WAY_SIZE_BIT      7       /* Fixed */
+#define KVM_E500_TLB0_WAY_SIZE          (1UL << KVM_E500_TLB0_WAY_SIZE_BIT)
+#define KVM_E500_TLB0_WAY_SIZE_MASK     (KVM_E500_TLB0_WAY_SIZE - 1)
+
+#define KVM_E500_TLB0_WAY_NUM_BIT       1       /* No greater than 7 */
+#define KVM_E500_TLB0_WAY_NUM           (1UL << KVM_E500_TLB0_WAY_NUM_BIT)
+#define KVM_E500_TLB0_WAY_NUM_MASK      (KVM_E500_TLB0_WAY_NUM - 1)
+
+#define KVM_E500_TLB0_SIZE  (KVM_E500_TLB0_WAY_SIZE * KVM_E500_TLB0_WAY_NUM)
+#define KVM_E500_TLB1_SIZE  16
+
+#define index_of(tlbsel, esel)  (((tlbsel) << 16) | ((esel) & 0xFFFF))
+#define tlbsel_of(index)        ((index) >> 16)
+#define esel_of(index)          ((index) & 0xFFFF)
+
+#define E500_TLB_USER_PERM_MASK (MAS3_UX|MAS3_UR|MAS3_UW)
+#define E500_TLB_SUPER_PERM_MASK (MAS3_SX|MAS3_SR|MAS3_SW)
+#define MAS2_ATTRIB_MASK \
+          (MAS2_X0 | MAS2_X1)
+#define MAS3_ATTRIB_MASK \
+          (MAS3_U0 | MAS3_U1 | MAS3_U2 | MAS3_U3 \
+           | E500_TLB_USER_PERM_MASK | E500_TLB_SUPER_PERM_MASK)
+
+extern void kvmppc_dump_tlbs(struct kvm_vcpu *);
+extern int kvmppc_e500_emul_mt_mmucsr0(struct kvmppc_vcpu_e500 *, ulong);
+extern int kvmppc_e500_emul_tlbwe(struct kvm_vcpu *);
+extern int kvmppc_e500_emul_tlbre(struct kvm_vcpu *);
+extern int kvmppc_e500_emul_tlbivax(struct kvm_vcpu *, int, int);
+extern int kvmppc_e500_emul_tlbsx(struct kvm_vcpu *, int);
+extern int kvmppc_e500_tlb_search(struct kvm_vcpu *, gva_t, unsigned int, int);
+extern void kvmppc_e500_tlb_put(struct kvm_vcpu *);
+extern void kvmppc_e500_tlb_load(struct kvm_vcpu *, int);
+extern int kvmppc_e500_tlb_init(struct kvmppc_vcpu_e500 *);
+extern void kvmppc_e500_tlb_uninit(struct kvmppc_vcpu_e500 *);
+extern void kvmppc_e500_tlb_setup(struct kvmppc_vcpu_e500 *);
+
+/* TLB helper functions */
+static inline unsigned int get_tlb_size(const struct tlbe *tlbe)
+{
+        return (tlbe->mas1 >> 8) & 0xf;
+}
+
+static inline gva_t get_tlb_eaddr(const struct tlbe *tlbe)
+{
+        return tlbe->mas2 & 0xfffff000;
+}
+
+static inline u64 get_tlb_bytes(const struct tlbe *tlbe)
+{
+        unsigned int pgsize = get_tlb_size(tlbe);
+        return 1ULL << 10 << (pgsize << 1);
+}
+
+static inline gva_t get_tlb_end(const struct tlbe *tlbe)
+{
+        u64 bytes = get_tlb_bytes(tlbe);
+        return get_tlb_eaddr(tlbe) + bytes - 1;
+}
+
+static inline u64 get_tlb_raddr(const struct tlbe *tlbe)
+{
+        u64 rpn = tlbe->mas7;
+        return (rpn << 32) | (tlbe->mas3 & 0xfffff000);
+}
+
+static inline unsigned int get_tlb_tid(const struct tlbe *tlbe)
+{
+        return (tlbe->mas1 >> 16) & 0xff;
+}
+
+static inline unsigned int get_tlb_ts(const struct tlbe *tlbe)
+{
+        return (tlbe->mas1 >> 12) & 0x1;
+}
+
+static inline unsigned int get_tlb_v(const struct tlbe *tlbe)
+{
+        return (tlbe->mas1 >> 31) & 0x1;
+}
+
+static inline unsigned int get_tlb_iprot(const struct tlbe *tlbe)
+{
+        return (tlbe->mas1 >> 30) & 0x1;
+}
+
+static inline unsigned int get_cur_pid(struct kvm_vcpu *vcpu)
+{
+        return vcpu->arch.pid & 0xff;
+}
+
+static inline unsigned int get_cur_spid(
+                const struct kvmppc_vcpu_e500 *vcpu_e500)
+{
+        return (vcpu_e500->mas6 >> 16) & 0xff;
+}
+
+static inline unsigned int get_cur_sas(
+                const struct kvmppc_vcpu_e500 *vcpu_e500)
+{
+        return vcpu_e500->mas6 & 0x1;
+}
+
+static inline unsigned int get_tlb_tlbsel(
+                const struct kvmppc_vcpu_e500 *vcpu_e500)
+{
+        /*
+         * Manual says that tlbsel has 2 bits wide.
+         * Since we only have two TLBs, only lower bit is used.
+         */
+        return (vcpu_e500->mas0 >> 28) & 0x1;
+}
+
+static inline unsigned int get_tlb_nv_bit(
+                const struct kvmppc_vcpu_e500 *vcpu_e500)
+{
+        return vcpu_e500->mas0 & 0xfff;
+}
+
+static inline unsigned int get_tlb_esel_bit(
+                const struct kvmppc_vcpu_e500 *vcpu_e500)
+{
+        return (vcpu_e500->mas0 >> 16) & 0xfff;
+}
+
+static inline unsigned int get_tlb_esel(
+                const struct kvmppc_vcpu_e500 *vcpu_e500,
+                int tlbsel)
+{
+        unsigned int esel = get_tlb_esel_bit(vcpu_e500);
+
+        if (tlbsel == 0) {
+                esel &= KVM_E500_TLB0_WAY_NUM_MASK;
+                esel |= ((vcpu_e500->mas2 >> 12) & KVM_E500_TLB0_WAY_SIZE_MASK)
+                                << KVM_E500_TLB0_WAY_NUM_BIT;
+        } else {
+                esel &= KVM_E500_TLB1_SIZE - 1;
+        }
+
+        return esel;
+}
+
+static inline int tlbe_is_host_safe(const struct kvm_vcpu *vcpu,
+                        const struct tlbe *tlbe)
+{
+        gpa_t gpa;
+
+        if (!get_tlb_v(tlbe))
+                return 0;
+
+        /* Does it match current guest AS? */
+        /* XXX what about IS != DS? */
+        if (get_tlb_ts(tlbe) != !!(vcpu->arch.msr & MSR_IS))
+                return 0;
+
+        gpa = get_tlb_raddr(tlbe);
+        if (!gfn_to_memslot(vcpu->kvm, gpa >> PAGE_SHIFT))
+                /* Mapping is not for RAM. */
+                return 0;
+
+        return 1;
+}
+
+#endif /* __KVM_E500_TLB_H__ */
diff --git a/arch/powerpc/kvm/emulate.c b/arch/powerpc/kvm/emulate.c
index d1d38daa93fb..a561d6e8da1c 100644
--- a/arch/powerpc/kvm/emulate.c
+++ b/arch/powerpc/kvm/emulate.c
@@ -30,6 +30,39 @@
 #include <asm/disassemble.h>
 #include "timing.h"
 
+#define OP_TRAP 3
+
+#define OP_31_XOP_LWZX      23
+#define OP_31_XOP_LBZX      87
+#define OP_31_XOP_STWX      151
+#define OP_31_XOP_STBX      215
+#define OP_31_XOP_STBUX     247
+#define OP_31_XOP_LHZX      279
+#define OP_31_XOP_LHZUX     311
+#define OP_31_XOP_MFSPR     339
+#define OP_31_XOP_STHX      407
+#define OP_31_XOP_STHUX     439
+#define OP_31_XOP_MTSPR     467
+#define OP_31_XOP_DCBI      470
+#define OP_31_XOP_LWBRX     534
+#define OP_31_XOP_TLBSYNC   566
+#define OP_31_XOP_STWBRX    662
+#define OP_31_XOP_LHBRX     790
+#define OP_31_XOP_STHBRX    918
+
+#define OP_LWZ  32
+#define OP_LWZU 33
+#define OP_LBZ  34
+#define OP_LBZU 35
+#define OP_STW  36
+#define OP_STWU 37
+#define OP_STB  38
+#define OP_STBU 39
+#define OP_LHZ  40
+#define OP_LHZU 41
+#define OP_STH  44
+#define OP_STHU 45
+
 void kvmppc_emulate_dec(struct kvm_vcpu *vcpu)
 {
         if (vcpu->arch.tcr & TCR_DIE) {
@@ -78,7 +111,7 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
         kvmppc_set_exit_type(vcpu, EMULATED_INST_EXITS);
 
         switch (get_op(inst)) {
-        case 3:                                             /* trap */
+        case OP_TRAP:
                 vcpu->arch.esr |= ESR_PTR;
                 kvmppc_core_queue_program(vcpu);
                 advance = 0;
@@ -87,31 +120,31 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
         case 31:
                 switch (get_xop(inst)) {
 
-                case 23:                                        /* lwzx */
+                case OP_31_XOP_LWZX:
                         rt = get_rt(inst);
                         emulated = kvmppc_handle_load(run, vcpu, rt, 4, 1);
                         break;
 
-                case 87:                                        /* lbzx */
+                case OP_31_XOP_LBZX:
                         rt = get_rt(inst);
                         emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1);
                         break;
 
-                case 151:                                       /* stwx */
+                case OP_31_XOP_STWX:
                         rs = get_rs(inst);
                         emulated = kvmppc_handle_store(run, vcpu,
                                                        vcpu->arch.gpr[rs],
                                                        4, 1);
                         break;
 
-                case 215:                                       /* stbx */
+                case OP_31_XOP_STBX:
                         rs = get_rs(inst);
                         emulated = kvmppc_handle_store(run, vcpu,
                                                        vcpu->arch.gpr[rs],
                                                        1, 1);
                         break;
 
-                case 247:                                       /* stbux */
+                case OP_31_XOP_STBUX:
                         rs = get_rs(inst);
                         ra = get_ra(inst);
                         rb = get_rb(inst);
@@ -126,12 +159,12 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                         vcpu->arch.gpr[rs] = ea;
                         break;
 
-                case 279:                                       /* lhzx */
+                case OP_31_XOP_LHZX:
                         rt = get_rt(inst);
                         emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1);
                         break;
 
-                case 311:                                       /* lhzux */
+                case OP_31_XOP_LHZUX:
                         rt = get_rt(inst);
                         ra = get_ra(inst);
                         rb = get_rb(inst);
@@ -144,7 +177,7 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                         vcpu->arch.gpr[ra] = ea;
                         break;
 
-                case 339:                                       /* mfspr */
+                case OP_31_XOP_MFSPR:
                         sprn = get_sprn(inst);
                         rt = get_rt(inst);
 
@@ -185,7 +218,7 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                         }
                         break;
 
-                case 407:                                       /* sthx */
+                case OP_31_XOP_STHX:
                         rs = get_rs(inst);
                         ra = get_ra(inst);
                         rb = get_rb(inst);
@@ -195,7 +228,7 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                                                        2, 1);
                         break;
 
-                case 439:                                       /* sthux */
+                case OP_31_XOP_STHUX:
                         rs = get_rs(inst);
                         ra = get_ra(inst);
                         rb = get_rb(inst);
@@ -210,7 +243,7 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                         vcpu->arch.gpr[ra] = ea;
                         break;
 
-                case 467:                                       /* mtspr */
+                case OP_31_XOP_MTSPR:
                         sprn = get_sprn(inst);
                         rs = get_rs(inst);
                         switch (sprn) {
@@ -246,7 +279,7 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                         }
                         break;
 
-                case 470:                                       /* dcbi */
+                case OP_31_XOP_DCBI:
                         /* Do nothing. The guest is performing dcbi because
                          * hardware DMA is not snooped by the dcache, but
                          * emulated DMA either goes through the dcache as
@@ -254,15 +287,15 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                          * coherence. */
                         break;
 
-                case 534:                                       /* lwbrx */
+                case OP_31_XOP_LWBRX:
                         rt = get_rt(inst);
                         emulated = kvmppc_handle_load(run, vcpu, rt, 4, 0);
                         break;
 
-                case 566:                                       /* tlbsync */
+                case OP_31_XOP_TLBSYNC:
                         break;
 
-                case 662:                                       /* stwbrx */
+                case OP_31_XOP_STWBRX:
                         rs = get_rs(inst);
                         ra = get_ra(inst);
                         rb = get_rb(inst);
@@ -272,12 +305,12 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                                                        4, 0);
                         break;
 
-                case 790:                                       /* lhbrx */
+                case OP_31_XOP_LHBRX:
                         rt = get_rt(inst);
                         emulated = kvmppc_handle_load(run, vcpu, rt, 2, 0);
                         break;
 
-                case 918:                                       /* sthbrx */
+                case OP_31_XOP_STHBRX:
                         rs = get_rs(inst);
                         ra = get_ra(inst);
                         rb = get_rb(inst);
@@ -293,37 +326,37 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                 }
                 break;
 
-        case 32:                                                /* lwz */
+        case OP_LWZ:
                 rt = get_rt(inst);
                 emulated = kvmppc_handle_load(run, vcpu, rt, 4, 1);
                 break;
 
-        case 33:                                                /* lwzu */
+        case OP_LWZU:
                 ra = get_ra(inst);
                 rt = get_rt(inst);
                 emulated = kvmppc_handle_load(run, vcpu, rt, 4, 1);
                 vcpu->arch.gpr[ra] = vcpu->arch.paddr_accessed;
                 break;
 
-        case 34:                                                /* lbz */
+        case OP_LBZ:
                 rt = get_rt(inst);
                 emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1);
                 break;
 
-        case 35:                                                /* lbzu */
+        case OP_LBZU:
                 ra = get_ra(inst);
                 rt = get_rt(inst);
                 emulated = kvmppc_handle_load(run, vcpu, rt, 1, 1);
                 vcpu->arch.gpr[ra] = vcpu->arch.paddr_accessed;
                 break;
 
-        case 36:                                                /* stw */
+        case OP_STW:
                 rs = get_rs(inst);
                 emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs],
                                                4, 1);
                 break;
 
-        case 37:                                                /* stwu */
+        case OP_STWU:
                 ra = get_ra(inst);
                 rs = get_rs(inst);
                 emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs],
@@ -331,13 +364,13 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                 vcpu->arch.gpr[ra] = vcpu->arch.paddr_accessed;
                 break;
 
-        case 38:                                                /* stb */
+        case OP_STB:
                 rs = get_rs(inst);
                 emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs],
                                                1, 1);
                 break;
 
-        case 39:                                                /* stbu */
+        case OP_STBU:
                 ra = get_ra(inst);
                 rs = get_rs(inst);
                 emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs],
@@ -345,25 +378,25 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                 vcpu->arch.gpr[ra] = vcpu->arch.paddr_accessed;
                 break;
 
-        case 40:                                                /* lhz */
+        case OP_LHZ:
                 rt = get_rt(inst);
                 emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1);
                 break;
 
-        case 41:                                                /* lhzu */
+        case OP_LHZU:
                 ra = get_ra(inst);
                 rt = get_rt(inst);
                 emulated = kvmppc_handle_load(run, vcpu, rt, 2, 1);
                 vcpu->arch.gpr[ra] = vcpu->arch.paddr_accessed;
                 break;
 
-        case 44:                                                /* sth */
+        case OP_STH:
                 rs = get_rs(inst);
                 emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs],
                                                2, 1);
                 break;
 
-        case 45:                                                /* sthu */
+        case OP_STHU:
                 ra = get_ra(inst);
                 rs = get_rs(inst);
                 emulated = kvmppc_handle_store(run, vcpu, vcpu->arch.gpr[rs],
diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c
index 5f81256287f5..9057335fdc61 100644
--- a/arch/powerpc/kvm/powerpc.c
+++ b/arch/powerpc/kvm/powerpc.c
@@ -216,46 +216,23 @@ int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
 
 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
 {
-        kvmppc_core_destroy_mmu(vcpu);
+        kvmppc_mmu_destroy(vcpu);
 }
 
 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
 {
-        if (vcpu->guest_debug.enabled)
-                kvmppc_core_load_guest_debugstate(vcpu);
-
         kvmppc_core_vcpu_load(vcpu, cpu);
 }
 
 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
 {
-        if (vcpu->guest_debug.enabled)
-                kvmppc_core_load_host_debugstate(vcpu);
-
-        /* Don't leave guest TLB entries resident when being de-scheduled. */
-        /* XXX It would be nice to differentiate between heavyweight exit and
-         * sched_out here, since we could avoid the TLB flush for heavyweight
-         * exits. */
-        _tlbil_all();
         kvmppc_core_vcpu_put(vcpu);
 }
 
-int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
-                                    struct kvm_debug_guest *dbg)
+int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
+                                        struct kvm_guest_debug *dbg)
 {
-        int i;
-
-        vcpu->guest_debug.enabled = dbg->enabled;
-        if (vcpu->guest_debug.enabled) {
-                for (i=0; i < ARRAY_SIZE(vcpu->guest_debug.bp); i++) {
-                        if (dbg->breakpoints[i].enabled)
-                                vcpu->guest_debug.bp[i] = dbg->breakpoints[i].address;
-                        else
-                                vcpu->guest_debug.bp[i] = 0;
-                }
-        }
-
-        return 0;
+        return -EINVAL;
 }
 
 static void kvmppc_complete_dcr_load(struct kvm_vcpu *vcpu,
diff --git a/arch/powerpc/platforms/cell/interrupt.c b/arch/powerpc/platforms/cell/interrupt.c
index 28c04dab2633..882e47080e74 100644
--- a/arch/powerpc/platforms/cell/interrupt.c
+++ b/arch/powerpc/platforms/cell/interrupt.c
@@ -237,8 +237,6 @@ extern int noirqdebug;
 
 static void handle_iic_irq(unsigned int irq, struct irq_desc *desc)
 {
-        const unsigned int cpu = smp_processor_id();
-
         spin_lock(&desc->lock);
 
         desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
@@ -254,7 +252,7 @@ static void handle_iic_irq(unsigned int irq, struct irq_desc *desc)
                 goto out_eoi;
         }
 
-        kstat_cpu(cpu).irqs[irq]++;
+        kstat_incr_irqs_this_cpu(irq, desc);
 
         /* Mark the IRQ currently in progress.*/
         desc->status |= IRQ_INPROGRESS;
diff --git a/arch/powerpc/platforms/cell/spufs/sched.c b/arch/powerpc/platforms/cell/spufs/sched.c
index 6a0ad196aeb3..f085369301b1 100644
--- a/arch/powerpc/platforms/cell/spufs/sched.c
+++ b/arch/powerpc/platforms/cell/spufs/sched.c
@@ -508,7 +508,7 @@ static void __spu_add_to_rq(struct spu_context *ctx)
                 list_add_tail(&ctx->rq, &spu_prio->runq[ctx->prio]);
                 set_bit(ctx->prio, spu_prio->bitmap);
                 if (!spu_prio->nr_waiting++)
-                        __mod_timer(&spusched_timer, jiffies + SPUSCHED_TICK);
+                        mod_timer(&spusched_timer, jiffies + SPUSCHED_TICK);
         }
 }
 
diff --git a/arch/powerpc/platforms/ps3/system-bus.c b/arch/powerpc/platforms/ps3/system-bus.c
index 58311a867851..a705fffbb498 100644
--- a/arch/powerpc/platforms/ps3/system-bus.c
+++ b/arch/powerpc/platforms/ps3/system-bus.c
@@ -376,7 +376,7 @@ static int ps3_system_bus_probe(struct device *_dev)
         struct ps3_system_bus_driver *drv;
 
         BUG_ON(!dev);
-        pr_debug(" -> %s:%d: %s\n", __func__, __LINE__, _dev->bus_id);
+        dev_dbg(_dev, "%s:%d\n", __func__, __LINE__);
 
         drv = ps3_system_bus_dev_to_system_bus_drv(dev);
         BUG_ON(!drv);
@@ -398,7 +398,7 @@ static int ps3_system_bus_remove(struct device *_dev)
         struct ps3_system_bus_driver *drv;
 
         BUG_ON(!dev);
-        pr_debug(" -> %s:%d: %s\n", __func__, __LINE__, _dev->bus_id);
+        dev_dbg(_dev, "%s:%d\n", __func__, __LINE__);
 
         drv = ps3_system_bus_dev_to_system_bus_drv(dev);
         BUG_ON(!drv);
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index 6b0a3538dc63..2a8af5e16345 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -343,13 +343,6 @@ source "mm/Kconfig"
 
 comment "I/O subsystem configuration"
 
-config MACHCHK_WARNING
-        bool "Process warning machine checks"
-        help
-          Select this option if you want the machine check handler on IBM S/390 or
-          zSeries to process warning machine checks (e.g. on power failures).
-          If unsure, say "Y".
-
 config QDIO
         tristate "QDIO support"
         ---help---
@@ -521,7 +514,7 @@ config APPLDATA_OS
 
 config APPLDATA_NET_SUM
         tristate "Monitor overall network statistics"
-        depends on APPLDATA_BASE
+        depends on APPLDATA_BASE && NET
         help
           This provides network related data to the Linux - VM Monitor Stream,
           currently there is only a total sum of network I/O statistics, no
@@ -552,7 +545,7 @@ config KEXEC
           but is independent of hardware/microcode support.
 
 config ZFCPDUMP
-        tristate "zfcpdump support"
+        bool "zfcpdump support"
         select SMP
         default n
         help
diff --git a/arch/s390/crypto/prng.c b/arch/s390/crypto/prng.c
index eca724d229ec..b49c00ce65e9 100644
--- a/arch/s390/crypto/prng.c
+++ b/arch/s390/crypto/prng.c
@@ -201,8 +201,7 @@ out_free:
 static void __exit prng_exit(void)
 {
         /* wipe me */
-        memset(p->buf, 0, prng_chunk_size);
-        kfree(p->buf);
+        kzfree(p->buf);
         kfree(p);
 
         misc_deregister(&prng_dev);
diff --git a/arch/s390/crypto/sha.h b/arch/s390/crypto/sha.h
index 1ceafa571eab..f4e9dc71675f 100644
--- a/arch/s390/crypto/sha.h
+++ b/arch/s390/crypto/sha.h
@@ -29,7 +29,9 @@ struct s390_sha_ctx {
         int func;               /* KIMD function to use */
 };
 
-void s390_sha_update(struct crypto_tfm *tfm, const u8 *data, unsigned int len);
-void s390_sha_final(struct crypto_tfm *tfm, u8 *out);
+struct shash_desc;
+
+int s390_sha_update(struct shash_desc *desc, const u8 *data, unsigned int len);
+int s390_sha_final(struct shash_desc *desc, u8 *out);
 
 #endif
diff --git a/arch/s390/crypto/sha1_s390.c b/arch/s390/crypto/sha1_s390.c
index b3cb5a89b00d..e85ba348722a 100644
--- a/arch/s390/crypto/sha1_s390.c
+++ b/arch/s390/crypto/sha1_s390.c
@@ -23,17 +23,17 @@
  * any later version.
  *
  */
+#include <crypto/internal/hash.h>
 #include <linux/init.h>
 #include <linux/module.h>
-#include <linux/crypto.h>
 #include <crypto/sha.h>
 
 #include "crypt_s390.h"
 #include "sha.h"
 
-static void sha1_init(struct crypto_tfm *tfm)
+static int sha1_init(struct shash_desc *desc)
 {
-        struct s390_sha_ctx *sctx = crypto_tfm_ctx(tfm);
+        struct s390_sha_ctx *sctx = shash_desc_ctx(desc);
 
         sctx->state[0] = SHA1_H0;
         sctx->state[1] = SHA1_H1;
@@ -42,34 +42,36 @@ static void sha1_init(struct crypto_tfm *tfm)
         sctx->state[4] = SHA1_H4;
         sctx->count = 0;
         sctx->func = KIMD_SHA_1;
+
+        return 0;
 }
 
-static struct crypto_alg alg = {
-        .cra_name       =       "sha1",
-        .cra_driver_name=       "sha1-s390",
-        .cra_priority   =       CRYPT_S390_PRIORITY,
-        .cra_flags      =       CRYPTO_ALG_TYPE_DIGEST,
-        .cra_blocksize  =       SHA1_BLOCK_SIZE,
-        .cra_ctxsize    =       sizeof(struct s390_sha_ctx),
-        .cra_module     =       THIS_MODULE,
-        .cra_list       =       LIST_HEAD_INIT(alg.cra_list),
-        .cra_u          =       { .digest = {
-        .dia_digestsize =       SHA1_DIGEST_SIZE,
-        .dia_init       =       sha1_init,
-        .dia_update     =       s390_sha_update,
-        .dia_final      =       s390_sha_final } }
+static struct shash_alg alg = {
+        .digestsize     =       SHA1_DIGEST_SIZE,
+        .init           =       sha1_init,
+        .update         =       s390_sha_update,
+        .final          =       s390_sha_final,
+        .descsize       =       sizeof(struct s390_sha_ctx),
+        .base           =       {
+                .cra_name       =       "sha1",
+                .cra_driver_name=       "sha1-s390",
+                .cra_priority   =       CRYPT_S390_PRIORITY,
+                .cra_flags      =       CRYPTO_ALG_TYPE_SHASH,
+                .cra_blocksize  =       SHA1_BLOCK_SIZE,
+                .cra_module     =       THIS_MODULE,
+        }
 };
 
 static int __init sha1_s390_init(void)
 {
         if (!crypt_s390_func_available(KIMD_SHA_1))
                 return -EOPNOTSUPP;
-        return crypto_register_alg(&alg);
+        return crypto_register_shash(&alg);
 }
 
 static void __exit sha1_s390_fini(void)
 {
-        crypto_unregister_alg(&alg);
+        crypto_unregister_shash(&alg);
 }
 
 module_init(sha1_s390_init);
diff --git a/arch/s390/crypto/sha256_s390.c b/arch/s390/crypto/sha256_s390.c
index 19c03fb6ba7e..f9fefc569632 100644
--- a/arch/s390/crypto/sha256_s390.c
+++ b/arch/s390/crypto/sha256_s390.c
@@ -16,17 +16,17 @@
  * any later version.
  *
  */
+#include <crypto/internal/hash.h>
 #include <linux/init.h>
 #include <linux/module.h>
-#include <linux/crypto.h>
 #include <crypto/sha.h>
 
 #include "crypt_s390.h"
 #include "sha.h"
 
-static void sha256_init(struct crypto_tfm *tfm)
+static int sha256_init(struct shash_desc *desc)
 {
-        struct s390_sha_ctx *sctx = crypto_tfm_ctx(tfm);
+        struct s390_sha_ctx *sctx = shash_desc_ctx(desc);
 
         sctx->state[0] = SHA256_H0;
         sctx->state[1] = SHA256_H1;
@@ -38,22 +38,24 @@ static void sha256_init(struct crypto_tfm *tfm)
         sctx->state[7] = SHA256_H7;
         sctx->count = 0;
         sctx->func = KIMD_SHA_256;
+
+        return 0;
 }
 
-static struct crypto_alg alg = {
-        .cra_name       =       "sha256",
-        .cra_driver_name =      "sha256-s390",
-        .cra_priority   =       CRYPT_S390_PRIORITY,
-        .cra_flags      =       CRYPTO_ALG_TYPE_DIGEST,
-        .cra_blocksize  =       SHA256_BLOCK_SIZE,
-        .cra_ctxsize    =       sizeof(struct s390_sha_ctx),
-        .cra_module     =       THIS_MODULE,
-        .cra_list       =       LIST_HEAD_INIT(alg.cra_list),
-        .cra_u          =       { .digest = {
-        .dia_digestsize =       SHA256_DIGEST_SIZE,
-        .dia_init       =       sha256_init,
-        .dia_update     =       s390_sha_update,
-        .dia_final      =       s390_sha_final } }
+static struct shash_alg alg = {
+        .digestsize     =       SHA256_DIGEST_SIZE,
+        .init           =       sha256_init,
+        .update         =       s390_sha_update,
+        .final          =       s390_sha_final,
+        .descsize       =       sizeof(struct s390_sha_ctx),
+        .base           =       {
+                .cra_name       =       "sha256",
+                .cra_driver_name=       "sha256-s390",
+                .cra_priority   =       CRYPT_S390_PRIORITY,
+                .cra_flags      =       CRYPTO_ALG_TYPE_SHASH,
+                .cra_blocksize  =       SHA256_BLOCK_SIZE,
+                .cra_module     =       THIS_MODULE,
+        }
 };
 
 static int sha256_s390_init(void)
@@ -61,12 +63,12 @@ static int sha256_s390_init(void)
         if (!crypt_s390_func_available(KIMD_SHA_256))
                 return -EOPNOTSUPP;
 
-        return crypto_register_alg(&alg);
+        return crypto_register_shash(&alg);
 }
 
 static void __exit sha256_s390_fini(void)
 {
-        crypto_unregister_alg(&alg);
+        crypto_unregister_shash(&alg);
 }
 
 module_init(sha256_s390_init);
diff --git a/arch/s390/crypto/sha512_s390.c b/arch/s390/crypto/sha512_s390.c
index 23c7861f6aeb..83192bfc8048 100644
--- a/arch/s390/crypto/sha512_s390.c
+++ b/arch/s390/crypto/sha512_s390.c
@@ -12,16 +12,16 @@
  * any later version.
  *
  */
+#include <crypto/internal/hash.h>
 #include <linux/init.h>
 #include <linux/module.h>
-#include <linux/crypto.h>
 
 #include "sha.h"
 #include "crypt_s390.h"
 
-static void sha512_init(struct crypto_tfm *tfm)
+static int sha512_init(struct shash_desc *desc)
 {
-        struct s390_sha_ctx *ctx = crypto_tfm_ctx(tfm);
+        struct s390_sha_ctx *ctx = shash_desc_ctx(desc);
 
         *(__u64 *)&ctx->state[0] = 0x6a09e667f3bcc908ULL;
         *(__u64 *)&ctx->state[2] = 0xbb67ae8584caa73bULL;
@@ -33,29 +33,31 @@ static void sha512_init(struct crypto_tfm *tfm)
         *(__u64 *)&ctx->state[14] = 0x5be0cd19137e2179ULL;
         ctx->count = 0;
         ctx->func = KIMD_SHA_512;
+
+        return 0;
 }
 
-static struct crypto_alg sha512_alg = {
-        .cra_name       =       "sha512",
-        .cra_driver_name =      "sha512-s390",
-        .cra_priority   =       CRYPT_S390_PRIORITY,
-        .cra_flags      =       CRYPTO_ALG_TYPE_DIGEST,
-        .cra_blocksize  =       SHA512_BLOCK_SIZE,
-        .cra_ctxsize    =       sizeof(struct s390_sha_ctx),
-        .cra_module     =       THIS_MODULE,
-        .cra_list       =       LIST_HEAD_INIT(sha512_alg.cra_list),
-        .cra_u          =       { .digest = {
-        .dia_digestsize =       SHA512_DIGEST_SIZE,
-        .dia_init       =       sha512_init,
-        .dia_update     =       s390_sha_update,
-        .dia_final      =       s390_sha_final } }
+static struct shash_alg sha512_alg = {
+        .digestsize     =       SHA512_DIGEST_SIZE,
+        .init           =       sha512_init,
+        .update         =       s390_sha_update,
+        .final          =       s390_sha_final,
+        .descsize       =       sizeof(struct s390_sha_ctx),
+        .base           =       {
+                .cra_name       =       "sha512",
+                .cra_driver_name=       "sha512-s390",
+                .cra_priority   =       CRYPT_S390_PRIORITY,
+                .cra_flags      =       CRYPTO_ALG_TYPE_SHASH,
+                .cra_blocksize  =       SHA512_BLOCK_SIZE,
+                .cra_module     =       THIS_MODULE,
+        }
 };
 
 MODULE_ALIAS("sha512");
 
-static void sha384_init(struct crypto_tfm *tfm)
+static int sha384_init(struct shash_desc *desc)
 {
-        struct s390_sha_ctx *ctx = crypto_tfm_ctx(tfm);
+        struct s390_sha_ctx *ctx = shash_desc_ctx(desc);
 
         *(__u64 *)&ctx->state[0] = 0xcbbb9d5dc1059ed8ULL;
         *(__u64 *)&ctx->state[2] = 0x629a292a367cd507ULL;
@@ -67,22 +69,25 @@ static void sha384_init(struct crypto_tfm *tfm)
         *(__u64 *)&ctx->state[14] = 0x47b5481dbefa4fa4ULL;
         ctx->count = 0;
         ctx->func = KIMD_SHA_512;
+
+        return 0;
 }
 
-static struct crypto_alg sha384_alg = {
-        .cra_name       =       "sha384",
-        .cra_driver_name =      "sha384-s390",
-        .cra_priority   =       CRYPT_S390_PRIORITY,
-        .cra_flags      =       CRYPTO_ALG_TYPE_DIGEST,
-        .cra_blocksize  =       SHA384_BLOCK_SIZE,
-        .cra_ctxsize    =       sizeof(struct s390_sha_ctx),
-        .cra_module     =       THIS_MODULE,
-        .cra_list       =       LIST_HEAD_INIT(sha384_alg.cra_list),
-        .cra_u          =       { .digest = {
-        .dia_digestsize =       SHA384_DIGEST_SIZE,
-        .dia_init       =       sha384_init,
-        .dia_update     =       s390_sha_update,
-        .dia_final      =       s390_sha_final } }
+static struct shash_alg sha384_alg = {
+        .digestsize     =       SHA384_DIGEST_SIZE,
+        .init           =       sha384_init,
+        .update         =       s390_sha_update,
+        .final          =       s390_sha_final,
+        .descsize       =       sizeof(struct s390_sha_ctx),
+        .base           =       {
+                .cra_name       =       "sha384",
+                .cra_driver_name=       "sha384-s390",
+                .cra_priority   =       CRYPT_S390_PRIORITY,
+                .cra_flags      =       CRYPTO_ALG_TYPE_SHASH,
+                .cra_blocksize  =       SHA384_BLOCK_SIZE,
+                .cra_ctxsize    =       sizeof(struct s390_sha_ctx),
+                .cra_module     =       THIS_MODULE,
+        }
 };
 
 MODULE_ALIAS("sha384");
@@ -93,18 +98,18 @@ static int __init init(void)
 
         if (!crypt_s390_func_available(KIMD_SHA_512))
                 return -EOPNOTSUPP;
-        if ((ret = crypto_register_alg(&sha512_alg)) < 0)
+        if ((ret = crypto_register_shash(&sha512_alg)) < 0)
                 goto out;
-        if ((ret = crypto_register_alg(&sha384_alg)) < 0)
-                crypto_unregister_alg(&sha512_alg);
+        if ((ret = crypto_register_shash(&sha384_alg)) < 0)
+                crypto_unregister_shash(&sha512_alg);
 out:
         return ret;
 }
 
 static void __exit fini(void)
 {
-        crypto_unregister_alg(&sha512_alg);
-        crypto_unregister_alg(&sha384_alg);
+        crypto_unregister_shash(&sha512_alg);
+        crypto_unregister_shash(&sha384_alg);
 }
 
 module_init(init);
diff --git a/arch/s390/crypto/sha_common.c b/arch/s390/crypto/sha_common.c
index 9d6eb8c3d37e..7903ec47e6b9 100644
--- a/arch/s390/crypto/sha_common.c
+++ b/arch/s390/crypto/sha_common.c
@@ -13,14 +13,14 @@
  *
  */
 
-#include <linux/crypto.h>
+#include <crypto/internal/hash.h>
 #include "sha.h"
 #include "crypt_s390.h"
 
-void s390_sha_update(struct crypto_tfm *tfm, const u8 *data, unsigned int len)
+int s390_sha_update(struct shash_desc *desc, const u8 *data, unsigned int len)
 {
-        struct s390_sha_ctx *ctx = crypto_tfm_ctx(tfm);
-        unsigned int bsize = crypto_tfm_alg_blocksize(tfm);
+        struct s390_sha_ctx *ctx = shash_desc_ctx(desc);
+        unsigned int bsize = crypto_shash_blocksize(desc->tfm);
         unsigned int index;
         int ret;
 
@@ -51,13 +51,15 @@ void s390_sha_update(struct crypto_tfm *tfm, const u8 *data, unsigned int len)
 store:
         if (len)
                 memcpy(ctx->buf + index , data, len);
+
+        return 0;
 }
 EXPORT_SYMBOL_GPL(s390_sha_update);
 
-void s390_sha_final(struct crypto_tfm *tfm, u8 *out)
+int s390_sha_final(struct shash_desc *desc, u8 *out)
 {
-        struct s390_sha_ctx *ctx = crypto_tfm_ctx(tfm);
-        unsigned int bsize = crypto_tfm_alg_blocksize(tfm);
+        struct s390_sha_ctx *ctx = shash_desc_ctx(desc);
+        unsigned int bsize = crypto_shash_blocksize(desc->tfm);
         u64 bits;
         unsigned int index, end, plen;
         int ret;
@@ -87,9 +89,11 @@ void s390_sha_final(struct crypto_tfm *tfm, u8 *out)
         BUG_ON(ret != end);
 
         /* copy digest to out */
-        memcpy(out, ctx->state, crypto_hash_digestsize(crypto_hash_cast(tfm)));
+        memcpy(out, ctx->state, crypto_shash_digestsize(desc->tfm));
         /* wipe context */
         memset(ctx, 0, sizeof *ctx);
+
+        return 0;
 }
 EXPORT_SYMBOL_GPL(s390_sha_final);
 
diff --git a/arch/s390/include/asm/bitops.h b/arch/s390/include/asm/bitops.h
index 8e9243ae0c19..b30606f6d523 100644
--- a/arch/s390/include/asm/bitops.h
+++ b/arch/s390/include/asm/bitops.h
@@ -57,7 +57,7 @@
  * with operation of the form "set_bit(bitnr, flags)".
  */
 
-/* bitmap tables from arch/S390/kernel/bitmap.S */
+/* bitmap tables from arch/s390/kernel/bitmap.c */
 extern const char _oi_bitmap[];
 extern const char _ni_bitmap[];
 extern const char _zb_findmap[];
@@ -525,16 +525,16 @@ static inline unsigned long __ffs_word_loop(const unsigned long *addr,
 static inline unsigned long __ffz_word(unsigned long nr, unsigned long word)
 {
 #ifdef __s390x__
-        if (likely((word & 0xffffffff) == 0xffffffff)) {
+        if ((word & 0xffffffff) == 0xffffffff) {
                 word >>= 32;
                 nr += 32;
         }
 #endif
-        if (likely((word & 0xffff) == 0xffff)) {
+        if ((word & 0xffff) == 0xffff) {
                 word >>= 16;
                 nr += 16;
         }
-        if (likely((word & 0xff) == 0xff)) {
+        if ((word & 0xff) == 0xff) {
                 word >>= 8;
                 nr += 8;
         }
@@ -549,16 +549,16 @@ static inline unsigned long __ffz_word(unsigned long nr, unsigned long word)
 static inline unsigned long __ffs_word(unsigned long nr, unsigned long word)
 {
 #ifdef __s390x__
-        if (likely((word & 0xffffffff) == 0)) {
+        if ((word & 0xffffffff) == 0) {
                 word >>= 32;
                 nr += 32;
         }
 #endif
-        if (likely((word & 0xffff) == 0)) {
+        if ((word & 0xffff) == 0) {
                 word >>= 16;
                 nr += 16;
         }
-        if (likely((word & 0xff) == 0)) {
+        if ((word & 0xff) == 0) {
                 word >>= 8;
                 nr += 8;
         }
diff --git a/arch/s390/include/asm/crw.h b/arch/s390/include/asm/crw.h
new file mode 100644
index 000000000000..2185a6d619d3
--- /dev/null
+++ b/arch/s390/include/asm/crw.h
@@ -0,0 +1,68 @@
+/*
+ *   Data definitions for channel report processing
+ *    Copyright IBM Corp. 2000,2009
+ *    Author(s): Ingo Adlung <adlung@de.ibm.com>,
+ *               Martin Schwidefsky <schwidefsky@de.ibm.com>,
+ *               Cornelia Huck <cornelia.huck@de.ibm.com>,
+ *               Heiko Carstens <heiko.carstens@de.ibm.com>,
+ */
+
+#ifndef _ASM_S390_CRW_H
+#define _ASM_S390_CRW_H
+
+#include <linux/types.h>
+
+/*
+ * Channel Report Word
+ */
+struct crw {
+        __u32 res1 :  1;   /* reserved zero */
+        __u32 slct :  1;   /* solicited */
+        __u32 oflw :  1;   /* overflow */
+        __u32 chn  :  1;   /* chained */
+        __u32 rsc  :  4;   /* reporting source code */
+        __u32 anc  :  1;   /* ancillary report */
+        __u32 res2 :  1;   /* reserved zero */
+        __u32 erc  :  6;   /* error-recovery code */
+        __u32 rsid : 16;   /* reporting-source ID */
+} __attribute__ ((packed));
+
+typedef void (*crw_handler_t)(struct crw *, struct crw *, int);
+
+extern int crw_register_handler(int rsc, crw_handler_t handler);
+extern void crw_unregister_handler(int rsc);
+extern void crw_handle_channel_report(void);
+
+#define NR_RSCS 16
+
+#define CRW_RSC_MONITOR  0x2  /* monitoring facility */
+#define CRW_RSC_SCH      0x3  /* subchannel */
+#define CRW_RSC_CPATH    0x4  /* channel path */
+#define CRW_RSC_CONFIG   0x9  /* configuration-alert facility */
+#define CRW_RSC_CSS      0xB  /* channel subsystem */
+
+#define CRW_ERC_EVENT    0x00 /* event information pending */
+#define CRW_ERC_AVAIL    0x01 /* available */
+#define CRW_ERC_INIT     0x02 /* initialized */
+#define CRW_ERC_TERROR   0x03 /* temporary error */
+#define CRW_ERC_IPARM    0x04 /* installed parm initialized */
+#define CRW_ERC_TERM     0x05 /* terminal */
+#define CRW_ERC_PERRN    0x06 /* perm. error, fac. not init */
+#define CRW_ERC_PERRI    0x07 /* perm. error, facility init */
+#define CRW_ERC_PMOD     0x08 /* installed parameters modified */
+
+static inline int stcrw(struct crw *pcrw)
+{
+        int ccode;
+
+        asm volatile(
+                "       stcrw   0(%2)\n"
+                "       ipm     %0\n"
+                "       srl     %0,28\n"
+                : "=d" (ccode), "=m" (*pcrw)
+                : "a" (pcrw)
+                : "cc" );
+        return ccode;
+}
+
+#endif /* _ASM_S390_CRW_H */
diff --git a/arch/s390/include/asm/dasd.h b/arch/s390/include/asm/dasd.h
index e2db6f16d9c8..218bce81ec70 100644
--- a/arch/s390/include/asm/dasd.h
+++ b/arch/s390/include/asm/dasd.h
@@ -162,15 +162,15 @@ typedef struct dasd_profile_info_t {
         unsigned int dasd_io_nr_req[32]; /* histogram of # of requests in chanq */
 } dasd_profile_info_t;
 
-/* 
+/*
  * struct format_data_t
  * represents all data necessary to format a dasd
  */
 typedef struct format_data_t {
-        int start_unit; /* from track */
-        int stop_unit;  /* to track */
-        int blksize;    /* sectorsize */
-        int intensity;  
+        unsigned int start_unit; /* from track */
+        unsigned int stop_unit;  /* to track */
+        unsigned int blksize;    /* sectorsize */
+        unsigned int intensity;
 } format_data_t;
 
 /*
diff --git a/arch/s390/include/asm/idals.h b/arch/s390/include/asm/idals.h
index e82c10efe65a..aae276d00383 100644
--- a/arch/s390/include/asm/idals.h
+++ b/arch/s390/include/asm/idals.h
@@ -44,24 +44,18 @@ idal_is_needed(void *vaddr, unsigned int length)
 /*
  * Return the number of idal words needed for an address/length pair.
  */
-static inline unsigned int
-idal_nr_words(void *vaddr, unsigned int length)
+static inline unsigned int idal_nr_words(void *vaddr, unsigned int length)
 {
-#ifdef __s390x__
-        if (idal_is_needed(vaddr, length))
-                return ((__pa(vaddr) & (IDA_BLOCK_SIZE-1)) + length + 
-                        (IDA_BLOCK_SIZE-1)) >> IDA_SIZE_LOG;
-#endif
-        return 0;
+        return ((__pa(vaddr) & (IDA_BLOCK_SIZE-1)) + length +
+                (IDA_BLOCK_SIZE-1)) >> IDA_SIZE_LOG;
 }
 
 /*
  * Create the list of idal words for an address/length pair.
  */
-static inline unsigned long *
-idal_create_words(unsigned long *idaws, void *vaddr, unsigned int length)
+static inline unsigned long *idal_create_words(unsigned long *idaws,
+                                               void *vaddr, unsigned int length)
 {
-#ifdef __s390x__
         unsigned long paddr;
         unsigned int cidaw;
 
@@ -74,7 +68,6 @@ idal_create_words(unsigned long *idaws, void *vaddr, unsigned int length)
                 paddr += IDA_BLOCK_SIZE;
                 *idaws++ = paddr;
         }
-#endif
         return idaws;
 }
 
diff --git a/arch/s390/include/asm/kvm.h b/arch/s390/include/asm/kvm.h
index e1f54654e3ae..0b2f829f6d50 100644
--- a/arch/s390/include/asm/kvm.h
+++ b/arch/s390/include/asm/kvm.h
@@ -42,4 +42,11 @@ struct kvm_fpu {
         __u64 fprs[16];
 };
 
+struct kvm_debug_exit_arch {
+};
+
+/* for KVM_SET_GUEST_DEBUG */
+struct kvm_guest_debug_arch {
+};
+
 #endif
diff --git a/arch/s390/include/asm/kvm_host.h b/arch/s390/include/asm/kvm_host.h
index 3c55e4107dcc..c6e674f5fca9 100644
--- a/arch/s390/include/asm/kvm_host.h
+++ b/arch/s390/include/asm/kvm_host.h
@@ -21,9 +21,6 @@
 /* memory slots that does not exposed to userspace */
 #define KVM_PRIVATE_MEM_SLOTS 4
 
-struct kvm_guest_debug {
-};
-
 struct sca_entry {
         atomic_t scn;
         __u64   reserved;
diff --git a/arch/s390/include/asm/lowcore.h b/arch/s390/include/asm/lowcore.h
index f3720defdd16..b349f1c7fdfa 100644
--- a/arch/s390/include/asm/lowcore.h
+++ b/arch/s390/include/asm/lowcore.h
@@ -11,129 +11,118 @@
 #ifndef _ASM_S390_LOWCORE_H
 #define _ASM_S390_LOWCORE_H
 
-#ifndef __s390x__
-#define __LC_EXT_OLD_PSW                0x018
-#define __LC_SVC_OLD_PSW                0x020
-#define __LC_PGM_OLD_PSW                0x028
-#define __LC_MCK_OLD_PSW                0x030
-#define __LC_IO_OLD_PSW                 0x038
-#define __LC_EXT_NEW_PSW                0x058
-#define __LC_SVC_NEW_PSW                0x060
-#define __LC_PGM_NEW_PSW                0x068
-#define __LC_MCK_NEW_PSW                0x070
-#define __LC_IO_NEW_PSW                 0x078
-#else /* !__s390x__ */
-#define __LC_EXT_OLD_PSW                0x0130
-#define __LC_SVC_OLD_PSW                0x0140
-#define __LC_PGM_OLD_PSW                0x0150
-#define __LC_MCK_OLD_PSW                0x0160
-#define __LC_IO_OLD_PSW                 0x0170
-#define __LC_EXT_NEW_PSW                0x01b0
-#define __LC_SVC_NEW_PSW                0x01c0
-#define __LC_PGM_NEW_PSW                0x01d0
-#define __LC_MCK_NEW_PSW                0x01e0
-#define __LC_IO_NEW_PSW                 0x01f0
-#endif /* !__s390x__ */
-
-#define __LC_IPL_PARMBLOCK_PTR          0x014
-#define __LC_EXT_PARAMS                 0x080
-#define __LC_CPU_ADDRESS                0x084
-#define __LC_EXT_INT_CODE               0x086
-
-#define __LC_SVC_ILC                    0x088
-#define __LC_SVC_INT_CODE               0x08A
-#define __LC_PGM_ILC                    0x08C
-#define __LC_PGM_INT_CODE               0x08E
+#define __LC_IPL_PARMBLOCK_PTR          0x0014
+#define __LC_EXT_PARAMS                 0x0080
+#define __LC_CPU_ADDRESS                0x0084
+#define __LC_EXT_INT_CODE               0x0086
 
-#define __LC_PER_ATMID                  0x096
-#define __LC_PER_ADDRESS                0x098
-#define __LC_PER_ACCESS_ID              0x0A1
-#define __LC_AR_MODE_ID                 0x0A3
+#define __LC_SVC_ILC                    0x0088
+#define __LC_SVC_INT_CODE               0x008a
+#define __LC_PGM_ILC                    0x008c
+#define __LC_PGM_INT_CODE               0x008e
 
-#define __LC_SUBCHANNEL_ID              0x0B8
-#define __LC_SUBCHANNEL_NR              0x0BA
-#define __LC_IO_INT_PARM                0x0BC
-#define __LC_IO_INT_WORD                0x0C0
-#define __LC_MCCK_CODE                  0x0E8
+#define __LC_PER_ATMID                  0x0096
+#define __LC_PER_ADDRESS                0x0098
+#define __LC_PER_ACCESS_ID              0x00a1
+#define __LC_AR_MODE_ID                 0x00a3
 
-#define __LC_LAST_BREAK                 0x110
-
-#define __LC_RETURN_PSW                 0x200
-
-#define __LC_SAVE_AREA                  0xC00
-
-#ifndef __s390x__
-#define __LC_IRB                        0x208
-#define __LC_SYNC_ENTER_TIMER           0x248
-#define __LC_ASYNC_ENTER_TIMER          0x250
-#define __LC_EXIT_TIMER                 0x258
-#define __LC_USER_TIMER                 0x260
-#define __LC_SYSTEM_TIMER               0x268
-#define __LC_STEAL_TIMER                0x270
-#define __LC_LAST_UPDATE_TIMER          0x278
-#define __LC_LAST_UPDATE_CLOCK          0x280
-#define __LC_RETURN_MCCK_PSW            0x288
-#define __LC_KERNEL_STACK               0xC40
-#define __LC_THREAD_INFO                0xC44
-#define __LC_ASYNC_STACK                0xC48
-#define __LC_KERNEL_ASCE                0xC4C
-#define __LC_USER_ASCE                  0xC50
-#define __LC_PANIC_STACK                0xC54
-#define __LC_CPUID                      0xC60
-#define __LC_CPUADDR                    0xC68
-#define __LC_IPLDEV                     0xC7C
-#define __LC_CURRENT                    0xC90
-#define __LC_INT_CLOCK                  0xC98
-#else /* __s390x__ */
-#define __LC_IRB                        0x210
-#define __LC_SYNC_ENTER_TIMER           0x250
-#define __LC_ASYNC_ENTER_TIMER          0x258
-#define __LC_EXIT_TIMER                 0x260
-#define __LC_USER_TIMER                 0x268
-#define __LC_SYSTEM_TIMER               0x270
-#define __LC_STEAL_TIMER                0x278
-#define __LC_LAST_UPDATE_TIMER          0x280
-#define __LC_LAST_UPDATE_CLOCK          0x288
-#define __LC_RETURN_MCCK_PSW            0x290
-#define __LC_KERNEL_STACK               0xD40
-#define __LC_THREAD_INFO                0xD48
-#define __LC_ASYNC_STACK                0xD50
-#define __LC_KERNEL_ASCE                0xD58
-#define __LC_USER_ASCE                  0xD60
-#define __LC_PANIC_STACK                0xD68
-#define __LC_CPUID                      0xD80
-#define __LC_CPUADDR                    0xD88
-#define __LC_IPLDEV                     0xDB8
-#define __LC_CURRENT                    0xDD8
-#define __LC_INT_CLOCK                  0xDE8
-#define __LC_VDSO_PER_CPU               0xE38
-#endif /* __s390x__ */
+#define __LC_SUBCHANNEL_ID              0x00b8
+#define __LC_SUBCHANNEL_NR              0x00ba
+#define __LC_IO_INT_PARM                0x00bc
+#define __LC_IO_INT_WORD                0x00c0
+#define __LC_MCCK_CODE                  0x00e8
 
-#define __LC_PASTE                      0xE40
+#define __LC_DUMP_REIPL                 0x0e00
 
-#define __LC_PANIC_MAGIC                0xE00
 #ifndef __s390x__
-#define __LC_PFAULT_INTPARM             0x080
-#define __LC_CPU_TIMER_SAVE_AREA        0x0D8
-#define __LC_CLOCK_COMP_SAVE_AREA       0x0E0
-#define __LC_PSW_SAVE_AREA              0x100
-#define __LC_PREFIX_SAVE_AREA           0x108
-#define __LC_AREGS_SAVE_AREA            0x120
-#define __LC_FPREGS_SAVE_AREA           0x160
-#define __LC_GPREGS_SAVE_AREA           0x180
-#define __LC_CREGS_SAVE_AREA            0x1C0
+#define __LC_EXT_OLD_PSW                0x0018
+#define __LC_SVC_OLD_PSW                0x0020
+#define __LC_PGM_OLD_PSW                0x0028
+#define __LC_MCK_OLD_PSW                0x0030
+#define __LC_IO_OLD_PSW                 0x0038
+#define __LC_EXT_NEW_PSW                0x0058
+#define __LC_SVC_NEW_PSW                0x0060
+#define __LC_PGM_NEW_PSW                0x0068
+#define __LC_MCK_NEW_PSW                0x0070
+#define __LC_IO_NEW_PSW                 0x0078
+#define __LC_SAVE_AREA                  0x0200
+#define __LC_RETURN_PSW                 0x0240
+#define __LC_RETURN_MCCK_PSW            0x0248
+#define __LC_SYNC_ENTER_TIMER           0x0250
+#define __LC_ASYNC_ENTER_TIMER          0x0258
+#define __LC_EXIT_TIMER                 0x0260
+#define __LC_USER_TIMER                 0x0268
+#define __LC_SYSTEM_TIMER               0x0270
+#define __LC_STEAL_TIMER                0x0278
+#define __LC_LAST_UPDATE_TIMER          0x0280
+#define __LC_LAST_UPDATE_CLOCK          0x0288
+#define __LC_CURRENT                    0x0290
+#define __LC_THREAD_INFO                0x0294
+#define __LC_KERNEL_STACK               0x0298
+#define __LC_ASYNC_STACK                0x029c
+#define __LC_PANIC_STACK                0x02a0
+#define __LC_KERNEL_ASCE                0x02a4
+#define __LC_USER_ASCE                  0x02a8
+#define __LC_USER_EXEC_ASCE             0x02ac
+#define __LC_CPUID                      0x02b0
+#define __LC_INT_CLOCK                  0x02c8
+#define __LC_IRB                        0x0300
+#define __LC_PFAULT_INTPARM             0x0080
+#define __LC_CPU_TIMER_SAVE_AREA        0x00d8
+#define __LC_CLOCK_COMP_SAVE_AREA       0x00e0
+#define __LC_PSW_SAVE_AREA              0x0100
+#define __LC_PREFIX_SAVE_AREA           0x0108
+#define __LC_AREGS_SAVE_AREA            0x0120
+#define __LC_FPREGS_SAVE_AREA           0x0160
+#define __LC_GPREGS_SAVE_AREA           0x0180
+#define __LC_CREGS_SAVE_AREA            0x01c0
 #else /* __s390x__ */
-#define __LC_PFAULT_INTPARM             0x11B8
+#define __LC_LAST_BREAK                 0x0110
+#define __LC_EXT_OLD_PSW                0x0130
+#define __LC_SVC_OLD_PSW                0x0140
+#define __LC_PGM_OLD_PSW                0x0150
+#define __LC_MCK_OLD_PSW                0x0160
+#define __LC_IO_OLD_PSW                 0x0170
+#define __LC_EXT_NEW_PSW                0x01b0
+#define __LC_SVC_NEW_PSW                0x01c0
+#define __LC_PGM_NEW_PSW                0x01d0
+#define __LC_MCK_NEW_PSW                0x01e0
+#define __LC_IO_NEW_PSW                 0x01f0
+#define __LC_SAVE_AREA                  0x0200
+#define __LC_RETURN_PSW                 0x0280
+#define __LC_RETURN_MCCK_PSW            0x0290
+#define __LC_SYNC_ENTER_TIMER           0x02a0
+#define __LC_ASYNC_ENTER_TIMER          0x02a8
+#define __LC_EXIT_TIMER                 0x02b0
+#define __LC_USER_TIMER                 0x02b8
+#define __LC_SYSTEM_TIMER               0x02c0
+#define __LC_STEAL_TIMER                0x02c8
+#define __LC_LAST_UPDATE_TIMER          0x02d0
+#define __LC_LAST_UPDATE_CLOCK          0x02d8
+#define __LC_CURRENT                    0x02e0
+#define __LC_THREAD_INFO                0x02e8
+#define __LC_KERNEL_STACK               0x02f0
+#define __LC_ASYNC_STACK                0x02f8
+#define __LC_PANIC_STACK                0x0300
+#define __LC_KERNEL_ASCE                0x0308
+#define __LC_USER_ASCE                  0x0310
+#define __LC_USER_EXEC_ASCE             0x0318
+#define __LC_CPUID                      0x0320
+#define __LC_INT_CLOCK                  0x0340
+#define __LC_VDSO_PER_CPU               0x0350
+#define __LC_IRB                        0x0380
+#define __LC_PASTE                      0x03c0
+#define __LC_PFAULT_INTPARM             0x11b8
 #define __LC_FPREGS_SAVE_AREA           0x1200
-#define __LC_GPREGS_SAVE_AREA           0x1280
+#define __LC_GPREGS_SAVE_AREA           0x1280
 #define __LC_PSW_SAVE_AREA              0x1300
 #define __LC_PREFIX_SAVE_AREA           0x1318
-#define __LC_FP_CREG_SAVE_AREA          0x131C
+#define __LC_FP_CREG_SAVE_AREA          0x131c
 #define __LC_TODREG_SAVE_AREA           0x1324
-#define __LC_CPU_TIMER_SAVE_AREA        0x1328
+#define __LC_CPU_TIMER_SAVE_AREA        0x1328
 #define __LC_CLOCK_COMP_SAVE_AREA       0x1331
-#define __LC_AREGS_SAVE_AREA            0x1340
-#define __LC_CREGS_SAVE_AREA            0x1380
+#define __LC_AREGS_SAVE_AREA            0x1340
+#define __LC_CREGS_SAVE_AREA            0x1380
 #endif /* __s390x__ */
 
 #ifndef __ASSEMBLY__
@@ -198,222 +187,240 @@ union save_area {
 struct _lowcore
 {
 #ifndef __s390x__
-        /* prefix area: defined by architecture */
-        psw_t        restart_psw;              /* 0x000 */
-        __u32        ccw2[4];                  /* 0x008 */
-        psw_t        external_old_psw;         /* 0x018 */
-        psw_t        svc_old_psw;              /* 0x020 */
-        psw_t        program_old_psw;          /* 0x028 */
-        psw_t        mcck_old_psw;             /* 0x030 */
-        psw_t        io_old_psw;               /* 0x038 */
-        __u8         pad1[0x58-0x40];          /* 0x040 */
-        psw_t        external_new_psw;         /* 0x058 */
-        psw_t        svc_new_psw;              /* 0x060 */
-        psw_t        program_new_psw;          /* 0x068 */
-        psw_t        mcck_new_psw;             /* 0x070 */
-        psw_t        io_new_psw;               /* 0x078 */
-        __u32        ext_params;               /* 0x080 */
-        __u16        cpu_addr;                 /* 0x084 */
-        __u16        ext_int_code;             /* 0x086 */
-        __u16        svc_ilc;                  /* 0x088 */
-        __u16        svc_code;                 /* 0x08a */
-        __u16        pgm_ilc;                  /* 0x08c */
-        __u16        pgm_code;                 /* 0x08e */
-        __u32        trans_exc_code;           /* 0x090 */
-        __u16        mon_class_num;            /* 0x094 */
-        __u16        per_perc_atmid;           /* 0x096 */
-        __u32        per_address;              /* 0x098 */
-        __u32        monitor_code;             /* 0x09c */
-        __u8         exc_access_id;            /* 0x0a0 */
-        __u8         per_access_id;            /* 0x0a1 */
-        __u8         pad2[0xB8-0xA2];          /* 0x0a2 */
-        __u16        subchannel_id;            /* 0x0b8 */
-        __u16        subchannel_nr;            /* 0x0ba */
-        __u32        io_int_parm;              /* 0x0bc */
-        __u32        io_int_word;              /* 0x0c0 */
-        __u8         pad3[0xc8-0xc4];          /* 0x0c4 */
-        __u32        stfl_fac_list;            /* 0x0c8 */
-        __u8         pad4[0xd4-0xcc];          /* 0x0cc */
-        __u32        extended_save_area_addr;  /* 0x0d4 */
-        __u32        cpu_timer_save_area[2];   /* 0x0d8 */
-        __u32        clock_comp_save_area[2];  /* 0x0e0 */
-        __u32        mcck_interruption_code[2]; /* 0x0e8 */
-        __u8         pad5[0xf4-0xf0];          /* 0x0f0 */
-        __u32        external_damage_code;     /* 0x0f4 */
-        __u32        failing_storage_address;  /* 0x0f8 */
-        __u8         pad6[0x100-0xfc];         /* 0x0fc */
-        __u32        st_status_fixed_logout[4];/* 0x100 */
-        __u8         pad7[0x120-0x110];        /* 0x110 */
-        __u32        access_regs_save_area[16];/* 0x120 */
-        __u32        floating_pt_save_area[8]; /* 0x160 */
-        __u32        gpregs_save_area[16];     /* 0x180 */
-        __u32        cregs_save_area[16];      /* 0x1c0 */      
-
-        psw_t        return_psw;               /* 0x200 */
-        __u8         irb[64];                  /* 0x208 */
-        __u64        sync_enter_timer;         /* 0x248 */
-        __u64        async_enter_timer;        /* 0x250 */
-        __u64        exit_timer;               /* 0x258 */
-        __u64        user_timer;               /* 0x260 */
-        __u64        system_timer;             /* 0x268 */
-        __u64        steal_timer;              /* 0x270 */
-        __u64        last_update_timer;        /* 0x278 */
-        __u64        last_update_clock;        /* 0x280 */
-        psw_t        return_mcck_psw;          /* 0x288 */
-        __u8         pad8[0xc00-0x290];        /* 0x290 */
-
-        /* System info area */
-        __u32        save_area[16];            /* 0xc00 */
-        __u32        kernel_stack;             /* 0xc40 */
-        __u32        thread_info;              /* 0xc44 */
-        __u32        async_stack;              /* 0xc48 */
-        __u32        kernel_asce;              /* 0xc4c */
-        __u32        user_asce;                /* 0xc50 */
-        __u32        panic_stack;              /* 0xc54 */
-        __u32        user_exec_asce;           /* 0xc58 */
-        __u8         pad10[0xc60-0xc5c];       /* 0xc5c */
-        /* entry.S sensitive area start */
-        struct       cpuinfo_S390 cpu_data;    /* 0xc60 */
-        __u32        ipl_device;               /* 0xc7c */
-        /* entry.S sensitive area end */
-
-        /* SMP info area: defined by DJB */
-        __u64        clock_comparator;         /* 0xc80 */
-        __u32        ext_call_fast;            /* 0xc88 */
-        __u32        percpu_offset;            /* 0xc8c */
-        __u32        current_task;             /* 0xc90 */
-        __u32        softirq_pending;          /* 0xc94 */
-        __u64        int_clock;                /* 0xc98 */
-        __u8         pad11[0xe00-0xca0];       /* 0xca0 */
-
-        /* 0xe00 is used as indicator for dump tools */
-        /* whether the kernel died with panic() or not */
-        __u32        panic_magic;              /* 0xe00 */
-
-        /* Align to the top 1k of prefix area */
-        __u8         pad12[0x1000-0xe04];      /* 0xe04 */
+        /* 0x0000 - 0x01ff: defined by architecture */
+        psw_t   restart_psw;                    /* 0x0000 */
+        __u32   ccw2[4];                        /* 0x0008 */
+        psw_t   external_old_psw;               /* 0x0018 */
+        psw_t   svc_old_psw;                    /* 0x0020 */
+        psw_t   program_old_psw;                /* 0x0028 */
+        psw_t   mcck_old_psw;                   /* 0x0030 */
+        psw_t   io_old_psw;                     /* 0x0038 */
+        __u8    pad_0x0040[0x0058-0x0040];      /* 0x0040 */
+        psw_t   external_new_psw;               /* 0x0058 */
+        psw_t   svc_new_psw;                    /* 0x0060 */
+        psw_t   program_new_psw;                /* 0x0068 */
+        psw_t   mcck_new_psw;                   /* 0x0070 */
+        psw_t   io_new_psw;                     /* 0x0078 */
+        __u32   ext_params;                     /* 0x0080 */
+        __u16   cpu_addr;                       /* 0x0084 */
+        __u16   ext_int_code;                   /* 0x0086 */
+        __u16   svc_ilc;                        /* 0x0088 */
+        __u16   svc_code;                       /* 0x008a */
+        __u16   pgm_ilc;                        /* 0x008c */
+        __u16   pgm_code;                       /* 0x008e */
+        __u32   trans_exc_code;                 /* 0x0090 */
+        __u16   mon_class_num;                  /* 0x0094 */
+        __u16   per_perc_atmid;                 /* 0x0096 */
+        __u32   per_address;                    /* 0x0098 */
+        __u32   monitor_code;                   /* 0x009c */
+        __u8    exc_access_id;                  /* 0x00a0 */
+        __u8    per_access_id;                  /* 0x00a1 */
+        __u8    pad_0x00a2[0x00b8-0x00a2];      /* 0x00a2 */
+        __u16   subchannel_id;                  /* 0x00b8 */
+        __u16   subchannel_nr;                  /* 0x00ba */
+        __u32   io_int_parm;                    /* 0x00bc */
+        __u32   io_int_word;                    /* 0x00c0 */
+        __u8    pad_0x00c4[0x00c8-0x00c4];      /* 0x00c4 */
+        __u32   stfl_fac_list;                  /* 0x00c8 */
+        __u8    pad_0x00cc[0x00d4-0x00cc];      /* 0x00cc */
+        __u32   extended_save_area_addr;        /* 0x00d4 */
+        __u32   cpu_timer_save_area[2];         /* 0x00d8 */
+        __u32   clock_comp_save_area[2];        /* 0x00e0 */
+        __u32   mcck_interruption_code[2];      /* 0x00e8 */
+        __u8    pad_0x00f0[0x00f4-0x00f0];      /* 0x00f0 */
+        __u32   external_damage_code;           /* 0x00f4 */
+        __u32   failing_storage_address;        /* 0x00f8 */
+        __u8    pad_0x00fc[0x0100-0x00fc];      /* 0x00fc */
+        __u32   st_status_fixed_logout[4];      /* 0x0100 */
+        __u8    pad_0x0110[0x0120-0x0110];      /* 0x0110 */
+
+        /* CPU register save area: defined by architecture */
+        __u32   access_regs_save_area[16];      /* 0x0120 */
+        __u32   floating_pt_save_area[8];       /* 0x0160 */
+        __u32   gpregs_save_area[16];           /* 0x0180 */
+        __u32   cregs_save_area[16];            /* 0x01c0 */
+
+        /* Return psws. */
+        __u32   save_area[16];                  /* 0x0200 */
+        psw_t   return_psw;                     /* 0x0240 */
+        psw_t   return_mcck_psw;                /* 0x0248 */
+
+        /* CPU time accounting values */
+        __u64   sync_enter_timer;               /* 0x0250 */
+        __u64   async_enter_timer;              /* 0x0258 */
+        __u64   exit_timer;                     /* 0x0260 */
+        __u64   user_timer;                     /* 0x0268 */
+        __u64   system_timer;                   /* 0x0270 */
+        __u64   steal_timer;                    /* 0x0278 */
+        __u64   last_update_timer;              /* 0x0280 */
+        __u64   last_update_clock;              /* 0x0288 */
+
+        /* Current process. */
+        __u32   current_task;                   /* 0x0290 */
+        __u32   thread_info;                    /* 0x0294 */
+        __u32   kernel_stack;                   /* 0x0298 */
+
+        /* Interrupt and panic stack. */
+        __u32   async_stack;                    /* 0x029c */
+        __u32   panic_stack;                    /* 0x02a0 */
+
+        /* Address space pointer. */
+        __u32   kernel_asce;                    /* 0x02a4 */
+        __u32   user_asce;                      /* 0x02a8 */
+        __u32   user_exec_asce;                 /* 0x02ac */
+
+        /* SMP info area */
+        cpuid_t cpu_id;                         /* 0x02b0 */
+        __u32   cpu_nr;                         /* 0x02b8 */
+        __u32   softirq_pending;                /* 0x02bc */
+        __u32   percpu_offset;                  /* 0x02c0 */
+        __u32   ext_call_fast;                  /* 0x02c4 */
+        __u64   int_clock;                      /* 0x02c8 */
+        __u64   clock_comparator;               /* 0x02d0 */
+        __u8    pad_0x02d8[0x0300-0x02d8];      /* 0x02d8 */
+
+        /* Interrupt response block */
+        __u8    irb[64];                        /* 0x0300 */
+
+        __u8    pad_0x0400[0x0e00-0x0400];      /* 0x0400 */
+
+        /*
+         * 0xe00 contains the address of the IPL Parameter Information
+         * block. Dump tools need IPIB for IPL after dump.
+         * Note: do not change the position of any fields in 0x0e00-0x0f00
+         */
+        __u32   ipib;                           /* 0x0e00 */
+        __u32   ipib_checksum;                  /* 0x0e04 */
+
+        /* Align to the top 1k of prefix area */
+        __u8    pad_0x0e08[0x1000-0x0e08];      /* 0x0e08 */
 #else /* !__s390x__ */
-        /* prefix area: defined by architecture */
-        __u32        ccw1[2];                  /* 0x000 */
-        __u32        ccw2[4];                  /* 0x008 */
-        __u8         pad1[0x80-0x18];          /* 0x018 */
-        __u32        ext_params;               /* 0x080 */
-        __u16        cpu_addr;                 /* 0x084 */
-        __u16        ext_int_code;             /* 0x086 */
-        __u16        svc_ilc;                  /* 0x088 */
-        __u16        svc_code;                 /* 0x08a */
-        __u16        pgm_ilc;                  /* 0x08c */
-        __u16        pgm_code;                 /* 0x08e */
-        __u32        data_exc_code;            /* 0x090 */
-        __u16        mon_class_num;            /* 0x094 */
-        __u16        per_perc_atmid;           /* 0x096 */
-        addr_t       per_address;              /* 0x098 */
-        __u8         exc_access_id;            /* 0x0a0 */
-        __u8         per_access_id;            /* 0x0a1 */
-        __u8         op_access_id;             /* 0x0a2 */
-        __u8         ar_access_id;             /* 0x0a3 */
-        __u8         pad2[0xA8-0xA4];          /* 0x0a4 */
-        addr_t       trans_exc_code;           /* 0x0A0 */
-        addr_t       monitor_code;             /* 0x09c */
-        __u16        subchannel_id;            /* 0x0b8 */
-        __u16        subchannel_nr;            /* 0x0ba */
-        __u32        io_int_parm;              /* 0x0bc */
-        __u32        io_int_word;              /* 0x0c0 */
-        __u8         pad3[0xc8-0xc4];          /* 0x0c4 */
-        __u32        stfl_fac_list;            /* 0x0c8 */
-        __u8         pad4[0xe8-0xcc];          /* 0x0cc */
-        __u32        mcck_interruption_code[2]; /* 0x0e8 */
-        __u8         pad5[0xf4-0xf0];          /* 0x0f0 */
-        __u32        external_damage_code;     /* 0x0f4 */
-        addr_t       failing_storage_address;  /* 0x0f8 */
-        __u8         pad6[0x120-0x100];        /* 0x100 */
-        psw_t        restart_old_psw;          /* 0x120 */
-        psw_t        external_old_psw;         /* 0x130 */
-        psw_t        svc_old_psw;              /* 0x140 */
-        psw_t        program_old_psw;          /* 0x150 */
-        psw_t        mcck_old_psw;             /* 0x160 */
-        psw_t        io_old_psw;               /* 0x170 */
-        __u8         pad7[0x1a0-0x180];        /* 0x180 */
-        psw_t        restart_psw;              /* 0x1a0 */
-        psw_t        external_new_psw;         /* 0x1b0 */
-        psw_t        svc_new_psw;              /* 0x1c0 */
-        psw_t        program_new_psw;          /* 0x1d0 */
-        psw_t        mcck_new_psw;             /* 0x1e0 */
-        psw_t        io_new_psw;               /* 0x1f0 */
-        psw_t        return_psw;               /* 0x200 */
-        __u8         irb[64];                  /* 0x210 */
-        __u64        sync_enter_timer;         /* 0x250 */
-        __u64        async_enter_timer;        /* 0x258 */
-        __u64        exit_timer;               /* 0x260 */
-        __u64        user_timer;               /* 0x268 */
-        __u64        system_timer;             /* 0x270 */
-        __u64        steal_timer;              /* 0x278 */
-        __u64        last_update_timer;        /* 0x280 */
-        __u64        last_update_clock;        /* 0x288 */
-        psw_t        return_mcck_psw;          /* 0x290 */
-        __u8         pad8[0xc00-0x2a0];        /* 0x2a0 */
-        /* System info area */
-        __u64        save_area[16];            /* 0xc00 */
-        __u8         pad9[0xd40-0xc80];        /* 0xc80 */
-        __u64        kernel_stack;             /* 0xd40 */
-        __u64        thread_info;              /* 0xd48 */
-        __u64        async_stack;              /* 0xd50 */
-        __u64        kernel_asce;              /* 0xd58 */
-        __u64        user_asce;                /* 0xd60 */
-        __u64        panic_stack;              /* 0xd68 */
-        __u64        user_exec_asce;           /* 0xd70 */
-        __u8         pad10[0xd80-0xd78];       /* 0xd78 */
-        /* entry.S sensitive area start */
-        struct       cpuinfo_S390 cpu_data;    /* 0xd80 */
-        __u32        ipl_device;               /* 0xdb8 */
-        __u32        pad11;                    /* 0xdbc */
-        /* entry.S sensitive area end */
-
-        /* SMP info area: defined by DJB */
-        __u64        clock_comparator;         /* 0xdc0 */
-        __u64        ext_call_fast;            /* 0xdc8 */
-        __u64        percpu_offset;            /* 0xdd0 */
-        __u64        current_task;             /* 0xdd8 */
-        __u32        softirq_pending;          /* 0xde0 */
-        __u32        pad_0x0de4;               /* 0xde4 */
-        __u64        int_clock;                /* 0xde8 */
-        __u8         pad12[0xe00-0xdf0];       /* 0xdf0 */
-
-        /* 0xe00 is used as indicator for dump tools */
-        /* whether the kernel died with panic() or not */
-        __u32        panic_magic;              /* 0xe00 */
+        /* 0x0000 - 0x01ff: defined by architecture */
+        __u32   ccw1[2];                        /* 0x0000 */
+        __u32   ccw2[4];                        /* 0x0008 */
+        __u8    pad_0x0018[0x0080-0x0018];      /* 0x0018 */
+        __u32   ext_params;                     /* 0x0080 */
+        __u16   cpu_addr;                       /* 0x0084 */
+        __u16   ext_int_code;                   /* 0x0086 */
+        __u16   svc_ilc;                        /* 0x0088 */
+        __u16   svc_code;                       /* 0x008a */
+        __u16   pgm_ilc;                        /* 0x008c */
+        __u16   pgm_code;                       /* 0x008e */
+        __u32   data_exc_code;                  /* 0x0090 */
+        __u16   mon_class_num;                  /* 0x0094 */
+        __u16   per_perc_atmid;                 /* 0x0096 */
+        addr_t  per_address;                    /* 0x0098 */
+        __u8    exc_access_id;                  /* 0x00a0 */
+        __u8    per_access_id;                  /* 0x00a1 */
+        __u8    op_access_id;                   /* 0x00a2 */
+        __u8    ar_access_id;                   /* 0x00a3 */
+        __u8    pad_0x00a4[0x00a8-0x00a4];      /* 0x00a4 */
+        addr_t  trans_exc_code;                 /* 0x00a8 */
+        addr_t  monitor_code;                   /* 0x00b0 */
+        __u16   subchannel_id;                  /* 0x00b8 */
+        __u16   subchannel_nr;                  /* 0x00ba */
+        __u32   io_int_parm;                    /* 0x00bc */
+        __u32   io_int_word;                    /* 0x00c0 */
+        __u8    pad_0x00c4[0x00c8-0x00c4];      /* 0x00c4 */
+        __u32   stfl_fac_list;                  /* 0x00c8 */
+        __u8    pad_0x00cc[0x00e8-0x00cc];      /* 0x00cc */
+        __u32   mcck_interruption_code[2];      /* 0x00e8 */
+        __u8    pad_0x00f0[0x00f4-0x00f0];      /* 0x00f0 */
+        __u32   external_damage_code;           /* 0x00f4 */
+        addr_t  failing_storage_address;        /* 0x00f8 */
+        __u8    pad_0x0100[0x0120-0x0100];      /* 0x0100 */
+        psw_t   restart_old_psw;                /* 0x0120 */
+        psw_t   external_old_psw;               /* 0x0130 */
+        psw_t   svc_old_psw;                    /* 0x0140 */
+        psw_t   program_old_psw;                /* 0x0150 */
+        psw_t   mcck_old_psw;                   /* 0x0160 */
+        psw_t   io_old_psw;                     /* 0x0170 */
+        __u8    pad_0x0180[0x01a0-0x0180];      /* 0x0180 */
+        psw_t   restart_psw;                    /* 0x01a0 */
+        psw_t   external_new_psw;               /* 0x01b0 */
+        psw_t   svc_new_psw;                    /* 0x01c0 */
+        psw_t   program_new_psw;                /* 0x01d0 */
+        psw_t   mcck_new_psw;                   /* 0x01e0 */
+        psw_t   io_new_psw;                     /* 0x01f0 */
+
+        /* Entry/exit save area & return psws. */
+        __u64   save_area[16];                  /* 0x0200 */
+        psw_t   return_psw;                     /* 0x0280 */
+        psw_t   return_mcck_psw;                /* 0x0290 */
+
+        /* CPU accounting and timing values. */
+        __u64   sync_enter_timer;               /* 0x02a0 */
+        __u64   async_enter_timer;              /* 0x02a8 */
+        __u64   exit_timer;                     /* 0x02b0 */
+        __u64   user_timer;                     /* 0x02b8 */
+        __u64   system_timer;                   /* 0x02c0 */
+        __u64   steal_timer;                    /* 0x02c8 */
+        __u64   last_update_timer;              /* 0x02d0 */
+        __u64   last_update_clock;              /* 0x02d8 */
+
+        /* Current process. */
+        __u64   current_task;                   /* 0x02e0 */
+        __u64   thread_info;                    /* 0x02e8 */
+        __u64   kernel_stack;                   /* 0x02f0 */
+
+        /* Interrupt and panic stack. */
+        __u64   async_stack;                    /* 0x02f8 */
+        __u64   panic_stack;                    /* 0x0300 */
+
+        /* Address space pointer. */
+        __u64   kernel_asce;                    /* 0x0308 */
+        __u64   user_asce;                      /* 0x0310 */
+        __u64   user_exec_asce;                 /* 0x0318 */
+
+        /* SMP info area */
+        cpuid_t cpu_id;                         /* 0x0320 */
+        __u32   cpu_nr;                         /* 0x0328 */
+        __u32   softirq_pending;                /* 0x032c */
+        __u64   percpu_offset;                  /* 0x0330 */
+        __u64   ext_call_fast;                  /* 0x0338 */
+        __u64   int_clock;                      /* 0x0340 */
+        __u64   clock_comparator;               /* 0x0348 */
+        __u64   vdso_per_cpu_data;              /* 0x0350 */
+        __u8    pad_0x0358[0x0380-0x0358];      /* 0x0358 */
+
+        /* Interrupt response block. */
+        __u8    irb[64];                        /* 0x0380 */
 
         /* Per cpu primary space access list */
-        __u8         pad_0xe04[0xe38-0xe04];   /* 0xe04 */
-        __u64        vdso_per_cpu_data;        /* 0xe38 */
-        __u32        paste[16];                /* 0xe40 */
-
-        __u8         pad13[0x11b8-0xe80];      /* 0xe80 */
-
-        /* 64 bit extparam used for pfault, diag 250 etc  */
-        __u64        ext_params2;               /* 0x11B8 */
-
-        __u8         pad14[0x1200-0x11C0];      /* 0x11C0 */
-
-        /* System info area */ 
-
-        __u64        floating_pt_save_area[16]; /* 0x1200 */
-        __u64        gpregs_save_area[16];      /* 0x1280 */
-        __u32        st_status_fixed_logout[4]; /* 0x1300 */
-        __u8         pad15[0x1318-0x1310];      /* 0x1310 */
-        __u32        prefixreg_save_area;       /* 0x1318 */
-        __u32        fpt_creg_save_area;        /* 0x131c */
-        __u8         pad16[0x1324-0x1320];      /* 0x1320 */
-        __u32        tod_progreg_save_area;     /* 0x1324 */
-        __u32        cpu_timer_save_area[2];    /* 0x1328 */
-        __u32        clock_comp_save_area[2];   /* 0x1330 */
-        __u8         pad17[0x1340-0x1338];      /* 0x1338 */
-        __u32        access_regs_save_area[16]; /* 0x1340 */ 
-        __u64        cregs_save_area[16];       /* 0x1380 */
+        __u32   paste[16];                      /* 0x03c0 */
+
+        __u8    pad_0x0400[0x0e00-0x0400];      /* 0x0400 */
+
+        /*
+         * 0xe00 contains the address of the IPL Parameter Information
+         * block. Dump tools need IPIB for IPL after dump.
+         * Note: do not change the position of any fields in 0x0e00-0x0f00
+         */
+        __u64   ipib;                           /* 0x0e00 */
+        __u32   ipib_checksum;                  /* 0x0e08 */
+        __u8    pad_0x0e0c[0x11b8-0x0e0c];      /* 0x0e0c */
+
+        /* 64 bit extparam used for pfault/diag 250: defined by architecture */
+        __u64   ext_params2;                    /* 0x11B8 */
+        __u8    pad_0x11c0[0x1200-0x11C0];      /* 0x11C0 */
+
+        /* CPU register save area: defined by architecture */
+        __u64   floating_pt_save_area[16];      /* 0x1200 */
+        __u64   gpregs_save_area[16];           /* 0x1280 */
+        __u32   st_status_fixed_logout[4];      /* 0x1300 */
+        __u8    pad_0x1310[0x1318-0x1310];      /* 0x1310 */
+        __u32   prefixreg_save_area;            /* 0x1318 */
+        __u32   fpt_creg_save_area;             /* 0x131c */
+        __u8    pad_0x1320[0x1324-0x1320];      /* 0x1320 */
+        __u32   tod_progreg_save_area;          /* 0x1324 */
+        __u32   cpu_timer_save_area[2];         /* 0x1328 */
+        __u32   clock_comp_save_area[2];        /* 0x1330 */
+        __u8    pad_0x1338[0x1340-0x1338];      /* 0x1338 */
+        __u32   access_regs_save_area[16];      /* 0x1340 */
+        __u64   cregs_save_area[16];            /* 0x1380 */
 
         /* align to the top of the prefix area */
-
-        __u8         pad18[0x2000-0x1400];      /* 0x1400 */
+        __u8    pad_0x1400[0x2000-0x1400];      /* 0x1400 */
 #endif /* !__s390x__ */
 } __attribute__((packed)); /* End structure*/
 
@@ -433,8 +440,6 @@ static inline __u32 store_prefix(void)
         return address;
 }
 
-#define __PANIC_MAGIC           0xDEADC0DE
-
 #endif
 
 #endif
diff --git a/arch/s390/include/asm/mmu_context.h b/arch/s390/include/asm/mmu_context.h
index 28ec870655af..fc7edd6f41b6 100644
--- a/arch/s390/include/asm/mmu_context.h
+++ b/arch/s390/include/asm/mmu_context.h
@@ -74,7 +74,7 @@ static inline void update_mm(struct mm_struct *mm, struct task_struct *tsk)
 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
                              struct task_struct *tsk)
 {
-        cpu_set(smp_processor_id(), next->cpu_vm_mask);
+        cpumask_set_cpu(smp_processor_id(), mm_cpumask(next));
         update_mm(next, tsk);
 }
 
diff --git a/arch/s390/include/asm/nmi.h b/arch/s390/include/asm/nmi.h
new file mode 100644
index 000000000000..f4b60441adca
--- /dev/null
+++ b/arch/s390/include/asm/nmi.h
@@ -0,0 +1,66 @@
+/*
+ *   Machine check handler definitions
+ *
+ *    Copyright IBM Corp. 2000,2009
+ *    Author(s): Ingo Adlung <adlung@de.ibm.com>,
+ *               Martin Schwidefsky <schwidefsky@de.ibm.com>,
+ *               Cornelia Huck <cornelia.huck@de.ibm.com>,
+ *               Heiko Carstens <heiko.carstens@de.ibm.com>,
+ */
+
+#ifndef _ASM_S390_NMI_H
+#define _ASM_S390_NMI_H
+
+#include <linux/types.h>
+
+struct mci {
+        __u32 sd :  1; /* 00 system damage */
+        __u32 pd :  1; /* 01 instruction-processing damage */
+        __u32 sr :  1; /* 02 system recovery */
+        __u32    :  1; /* 03 */
+        __u32 cd :  1; /* 04 timing-facility damage */
+        __u32 ed :  1; /* 05 external damage */
+        __u32    :  1; /* 06 */
+        __u32 dg :  1; /* 07 degradation */
+        __u32 w  :  1; /* 08 warning pending */
+        __u32 cp :  1; /* 09 channel-report pending */
+        __u32 sp :  1; /* 10 service-processor damage */
+        __u32 ck :  1; /* 11 channel-subsystem damage */
+        __u32    :  2; /* 12-13 */
+        __u32 b  :  1; /* 14 backed up */
+        __u32    :  1; /* 15 */
+        __u32 se :  1; /* 16 storage error uncorrected */
+        __u32 sc :  1; /* 17 storage error corrected */
+        __u32 ke :  1; /* 18 storage-key error uncorrected */
+        __u32 ds :  1; /* 19 storage degradation */
+        __u32 wp :  1; /* 20 psw mwp validity */
+        __u32 ms :  1; /* 21 psw mask and key validity */
+        __u32 pm :  1; /* 22 psw program mask and cc validity */
+        __u32 ia :  1; /* 23 psw instruction address validity */
+        __u32 fa :  1; /* 24 failing storage address validity */
+        __u32    :  1; /* 25 */
+        __u32 ec :  1; /* 26 external damage code validity */
+        __u32 fp :  1; /* 27 floating point register validity */
+        __u32 gr :  1; /* 28 general register validity */
+        __u32 cr :  1; /* 29 control register validity */
+        __u32    :  1; /* 30 */
+        __u32 st :  1; /* 31 storage logical validity */
+        __u32 ie :  1; /* 32 indirect storage error */
+        __u32 ar :  1; /* 33 access register validity */
+        __u32 da :  1; /* 34 delayed access exception */
+        __u32    :  7; /* 35-41 */
+        __u32 pr :  1; /* 42 tod programmable register validity */
+        __u32 fc :  1; /* 43 fp control register validity */
+        __u32 ap :  1; /* 44 ancillary report */
+        __u32    :  1; /* 45 */
+        __u32 ct :  1; /* 46 cpu timer validity */
+        __u32 cc :  1; /* 47 clock comparator validity */
+        __u32    : 16; /* 47-63 */
+};
+
+struct pt_regs;
+
+extern void s390_handle_mcck(void);
+extern void s390_do_machine_check(struct pt_regs *regs);
+
+#endif /* _ASM_S390_NMI_H */
diff --git a/arch/s390/include/asm/processor.h b/arch/s390/include/asm/processor.h
index db4523fe38ac..61862b3ac794 100644
--- a/arch/s390/include/asm/processor.h
+++ b/arch/s390/include/asm/processor.h
@@ -42,22 +42,8 @@ static inline void get_cpu_id(cpuid_t *ptr)
         asm volatile("stidp 0(%1)" : "=m" (*ptr) : "a" (ptr));
 }
 
-struct cpuinfo_S390
-{
-        cpuid_t  cpu_id;
-        __u16    cpu_addr;
-        __u16    cpu_nr;
-        unsigned long loops_per_jiffy;
-        unsigned long *pgd_quick;
-#ifdef __s390x__
-        unsigned long *pmd_quick;
-#endif /* __s390x__ */
-        unsigned long *pte_quick;
-        unsigned long pgtable_cache_sz;
-};
-
 extern void s390_adjust_jiffies(void);
-extern void print_cpu_info(struct cpuinfo_S390 *);
+extern void print_cpu_info(void);
 extern int get_cpu_capability(unsigned int *);
 
 /*
diff --git a/arch/s390/include/asm/ptrace.h b/arch/s390/include/asm/ptrace.h
index 8920025c3c02..f1b051630c50 100644
--- a/arch/s390/include/asm/ptrace.h
+++ b/arch/s390/include/asm/ptrace.h
@@ -172,6 +172,8 @@
 #define NUM_CRS         16
 #define NUM_ACRS        16
 
+#define NUM_CR_WORDS    3
+
 #define FPR_SIZE        8
 #define FPC_SIZE        4
 #define FPC_PAD_SIZE    4 /* gcc insists on aligning the fpregs */
@@ -334,7 +336,7 @@ struct pt_regs
  */
 typedef struct
 {
-        unsigned long cr[3];
+        unsigned long cr[NUM_CR_WORDS];
 } per_cr_words;
 
 #define PER_EM_MASK 0xE8000000UL
diff --git a/arch/s390/include/asm/qdio.h b/arch/s390/include/asm/qdio.h
index 27fc1746de15..402d6dcf0d26 100644
--- a/arch/s390/include/asm/qdio.h
+++ b/arch/s390/include/asm/qdio.h
@@ -314,6 +314,7 @@ typedef void qdio_handler_t(struct ccw_device *, unsigned int, int,
                             int, int, unsigned long);
 
 /* qdio errors reported to the upper-layer program */
+#define QDIO_ERROR_SIGA_TARGET                  0x02
 #define QDIO_ERROR_SIGA_ACCESS_EXCEPTION        0x10
 #define QDIO_ERROR_SIGA_BUSY                    0x20
 #define QDIO_ERROR_ACTIVATE_CHECK_CONDITION     0x40
diff --git a/arch/s390/include/asm/smp.h b/arch/s390/include/asm/smp.h
index 024b91e06239..2009158a4502 100644
--- a/arch/s390/include/asm/smp.h
+++ b/arch/s390/include/asm/smp.h
@@ -50,12 +50,7 @@ extern void machine_power_off_smp(void);
  
 #define PROC_CHANGE_PENALTY     20              /* Schedule penalty */
 
-#define raw_smp_processor_id()  (S390_lowcore.cpu_data.cpu_nr)
-
-static inline __u16 hard_smp_processor_id(void)
-{
-        return stap();
-}
+#define raw_smp_processor_id()  (S390_lowcore.cpu_nr)
 
 /*
  * returns 1 if cpu is in stopped/check stopped state or not operational
diff --git a/arch/s390/include/asm/socket.h b/arch/s390/include/asm/socket.h
index c786ab623b2d..02330c50241b 100644
--- a/arch/s390/include/asm/socket.h
+++ b/arch/s390/include/asm/socket.h
@@ -62,4 +62,7 @@
 
 #define SO_MARK                 36
 
+#define SO_TIMESTAMPING         37
+#define SCM_TIMESTAMPING        SO_TIMESTAMPING
+
 #endif /* _ASM_SOCKET_H */
diff --git a/arch/s390/include/asm/string.h b/arch/s390/include/asm/string.h
index d074673a6d9b..cd0241db5a46 100644
--- a/arch/s390/include/asm/string.h
+++ b/arch/s390/include/asm/string.h
@@ -100,6 +100,7 @@ static inline char *strcat(char *dst, const char *src)
 
 static inline char *strcpy(char *dst, const char *src)
 {
+#if __GNUC__ < 4
         register int r0 asm("0") = 0;
         char *ret = dst;
 
@@ -109,10 +110,14 @@ static inline char *strcpy(char *dst, const char *src)
                 : "+&a" (dst), "+&a" (src) : "d" (r0)
                 : "cc", "memory");
         return ret;
+#else
+        return __builtin_strcpy(dst, src);
+#endif
 }
 
 static inline size_t strlen(const char *s)
 {
+#if __GNUC__ < 4
         register unsigned long r0 asm("0") = 0;
         const char *tmp = s;
 
@@ -121,6 +126,9 @@ static inline size_t strlen(const char *s)
                 "       jo      0b"
                 : "+d" (r0), "+a" (tmp) :  : "cc");
         return r0 - (unsigned long) s;
+#else
+        return __builtin_strlen(s);
+#endif
 }
 
 static inline size_t strnlen(const char * s, size_t n)
@@ -135,7 +143,13 @@ static inline size_t strnlen(const char * s, size_t n)
                 : "+a" (end), "+a" (tmp) : "d" (r0)  : "cc");
         return end - s;
 }
-
+#else /* IN_ARCH_STRING_C */
+void *memchr(const void * s, int c, size_t n);
+void *memscan(void *s, int c, size_t n);
+char *strcat(char *dst, const char *src);
+char *strcpy(char *dst, const char *src);
+size_t strlen(const char *s);
+size_t strnlen(const char * s, size_t n);
 #endif /* !IN_ARCH_STRING_C */
 
 #endif /* __KERNEL__ */
diff --git a/arch/s390/include/asm/sysinfo.h b/arch/s390/include/asm/sysinfo.h
index ad93212d9e16..9d70057d828c 100644
--- a/arch/s390/include/asm/sysinfo.h
+++ b/arch/s390/include/asm/sysinfo.h
@@ -100,6 +100,7 @@ struct sysinfo_3_2_2 {
                 char reserved_1[24];
 
         } vm[8];
+        char reserved_544[3552];
 };
 
 static inline int stsi(void *sysinfo, int fc, int sel1, int sel2)
diff --git a/arch/s390/include/asm/tlbflush.h b/arch/s390/include/asm/tlbflush.h
index d60394b9745e..304cffa623e1 100644
--- a/arch/s390/include/asm/tlbflush.h
+++ b/arch/s390/include/asm/tlbflush.h
@@ -51,7 +51,7 @@ static inline void __tlb_flush_full(struct mm_struct *mm)
          * If the process only ran on the local cpu, do a local flush.
          */
         local_cpumask = cpumask_of_cpu(smp_processor_id());
-        if (cpus_equal(mm->cpu_vm_mask, local_cpumask))
+        if (cpumask_equal(mm_cpumask(mm), &local_cpumask))
                 __tlb_flush_local();
         else
                 __tlb_flush_global();
@@ -73,7 +73,7 @@ static inline void __tlb_flush_idte(unsigned long asce)
 
 static inline void __tlb_flush_mm(struct mm_struct * mm)
 {
-        if (unlikely(cpus_empty(mm->cpu_vm_mask)))
+        if (unlikely(cpumask_empty(mm_cpumask(mm))))
                 return;
         /*
          * If the machine has IDTE we prefer to do a per mm flush
diff --git a/arch/s390/include/asm/topology.h b/arch/s390/include/asm/topology.h
index c979c3b56ab0..5e0ad618dc45 100644
--- a/arch/s390/include/asm/topology.h
+++ b/arch/s390/include/asm/topology.h
@@ -5,7 +5,6 @@
 
 #define mc_capable()    (1)
 
-cpumask_t cpu_coregroup_map(unsigned int cpu);
 const struct cpumask *cpu_coregroup_mask(unsigned int cpu);
 
 extern cpumask_t cpu_core_map[NR_CPUS];
diff --git a/arch/s390/include/asm/vtoc.h b/arch/s390/include/asm/vtoc.h
index 3a5267d90d29..8406a2b3157a 100644
--- a/arch/s390/include/asm/vtoc.h
+++ b/arch/s390/include/asm/vtoc.h
@@ -39,7 +39,7 @@ struct vtoc_labeldate
         __u16 day;
 } __attribute__ ((packed));
 
-struct vtoc_volume_label
+struct vtoc_volume_label_cdl
 {
         char volkey[4];         /* volume key = volume label */
         char vollbl[4];         /* volume label */
@@ -56,6 +56,14 @@ struct vtoc_volume_label
         char res3[29];          /* reserved */
 } __attribute__ ((packed));
 
+struct vtoc_volume_label_ldl {
+        char vollbl[4];         /* volume label */
+        char volid[6];          /* volume identifier */
+        char res3[69];          /* reserved */
+        char ldl_version;       /* version number, valid for ldl format */
+        __u64 formatted_blocks; /* valid when ldl_version >= f2  */
+} __attribute__ ((packed));
+
 struct vtoc_extent
 {
         __u8 typeind;                   /* extent type indicator */
@@ -140,7 +148,11 @@ struct vtoc_format4_label
         char res2[10];          /* reserved */
         __u8 DS4EFLVL;          /* extended free-space management level */
         struct vtoc_cchhb DS4EFPTR; /* pointer to extended free-space info */
-        char res3[9];           /* reserved */
+        char res3;              /* reserved */
+        __u32 DS4DCYL;          /* number of logical cyls */
+        char res4[2];           /* reserved */
+        __u8 DS4DEVF2;          /* device flags */
+        char res5;              /* reserved */
 } __attribute__ ((packed));
 
 struct vtoc_ds5ext
diff --git a/arch/s390/kernel/Makefile b/arch/s390/kernel/Makefile
index 3edc6c6f258b..228e3105ded7 100644
--- a/arch/s390/kernel/Makefile
+++ b/arch/s390/kernel/Makefile
@@ -17,10 +17,12 @@ CFLAGS_smp.o	:= -Wno-nonnull
 #
 CFLAGS_ptrace.o         += -DUTS_MACHINE='"$(UTS_MACHINE)"'
 
+CFLAGS_sysinfo.o += -Iinclude/math-emu -Iarch/s390/math-emu -w
+
 obj-y   :=  bitmap.o traps.o time.o process.o base.o early.o setup.o \
             processor.o sys_s390.o ptrace.o signal.o cpcmd.o ebcdic.o \
             s390_ext.o debug.o irq.o ipl.o dis.o diag.o mem_detect.o \
-            vdso.o vtime.o
+            vdso.o vtime.o sysinfo.o nmi.o
 
 obj-y   += $(if $(CONFIG_64BIT),entry64.o,entry.o)
 obj-y   += $(if $(CONFIG_64BIT),reipl64.o,reipl.o)
diff --git a/arch/s390/kernel/bitmap.S b/arch/s390/kernel/bitmap.S
deleted file mode 100644
index dfb41f946e23..000000000000
--- a/arch/s390/kernel/bitmap.S
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- *  arch/s390/kernel/bitmap.S
- *    Bitmaps for set_bit, clear_bit, test_and_set_bit, ...
- *    See include/asm-s390/{bitops.h|posix_types.h} for details
- *
- *  S390 version
- *    Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
- *    Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
- */
-
-         .globl _oi_bitmap
-_oi_bitmap:
-         .byte  0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80
-
-         .globl _ni_bitmap
-_ni_bitmap:
-         .byte  0xFE,0xFD,0xFB,0xF7,0xEF,0xDF,0xBF,0x7F
-
-         .globl _zb_findmap
-_zb_findmap:
-         .byte  0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,4
-         .byte  0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,5
-         .byte  0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,4 
-         .byte  0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,6
-         .byte  0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,4
-         .byte  0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,5
-         .byte  0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,4
-         .byte  0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,7
-         .byte  0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,4
-         .byte  0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,5
-         .byte  0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,4
-         .byte  0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,6
-         .byte  0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,4
-         .byte  0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,5
-         .byte  0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,4
-         .byte  0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,8
-
-         .globl _sb_findmap
-_sb_findmap:
-         .byte  8,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0
-         .byte  4,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0
-         .byte  5,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0
-         .byte  4,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0
-         .byte  6,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0
-         .byte  4,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0
-         .byte  5,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0
-         .byte  4,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0
-         .byte  7,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0
-         .byte  4,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0
-         .byte  5,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0
-         .byte  4,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0
-         .byte  6,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0
-         .byte  4,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0
-         .byte  5,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0
-         .byte  4,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0
-
diff --git a/arch/s390/kernel/bitmap.c b/arch/s390/kernel/bitmap.c
new file mode 100644
index 000000000000..3ae4757b006a
--- /dev/null
+++ b/arch/s390/kernel/bitmap.c
@@ -0,0 +1,54 @@
+/*
+ *    Bitmaps for set_bit, clear_bit, test_and_set_bit, ...
+ *    See include/asm/{bitops.h|posix_types.h} for details
+ *
+ *    Copyright IBM Corp. 1999,2009
+ *    Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>,
+ */
+
+#include <linux/bitops.h>
+#include <linux/module.h>
+
+const char _oi_bitmap[] = { 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80 };
+EXPORT_SYMBOL(_oi_bitmap);
+
+const char _ni_bitmap[] = { 0xfe, 0xfd, 0xfb, 0xf7, 0xef, 0xdf, 0xbf, 0x7f };
+EXPORT_SYMBOL(_ni_bitmap);
+
+const char _zb_findmap[] = {
+        0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,4,
+        0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,5,
+        0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,4,
+        0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,6,
+        0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,4,
+        0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,5,
+        0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,4,
+        0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,7,
+        0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,4,
+        0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,5,
+        0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,4,
+        0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,6,
+        0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,4,
+        0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,5,
+        0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,4,
+        0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,8 };
+EXPORT_SYMBOL(_zb_findmap);
+
+const char _sb_findmap[] = {
+        8,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,
+        4,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,
+        5,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,
+        4,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,
+        6,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,
+        4,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,
+        5,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,
+        4,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,
+        7,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,
+        4,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,
+        5,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,
+        4,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,
+        6,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,
+        4,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,
+        5,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0,
+        4,0,1,0,2,0,1,0,3,0,1,0,2,0,1,0 };
+EXPORT_SYMBOL(_sb_findmap);
diff --git a/arch/s390/kernel/compat_ptrace.h b/arch/s390/kernel/compat_ptrace.h
index a2be3a978d5c..123dd660d7fb 100644
--- a/arch/s390/kernel/compat_ptrace.h
+++ b/arch/s390/kernel/compat_ptrace.h
@@ -1,10 +1,11 @@
 #ifndef _PTRACE32_H
 #define _PTRACE32_H
 
+#include <asm/ptrace.h>    /* needed for NUM_CR_WORDS */
 #include "compat_linux.h"  /* needed for psw_compat_t */
 
 typedef struct {
-        __u32 cr[3];
+        __u32 cr[NUM_CR_WORDS];
 } per_cr_words32;
 
 typedef struct {
diff --git a/arch/s390/kernel/compat_wrapper.S b/arch/s390/kernel/compat_wrapper.S
index 62c706eb0de6..87cf5a79a351 100644
--- a/arch/s390/kernel/compat_wrapper.S
+++ b/arch/s390/kernel/compat_wrapper.S
@@ -252,7 +252,7 @@ sys32_chroot_wrapper:
 sys32_ustat_wrapper:
         llgfr   %r2,%r2                 # dev_t
         llgtr   %r3,%r3                 # struct ustat *
-        jg      sys_ustat
+        jg      compat_sys_ustat
 
         .globl  sys32_dup2_wrapper
 sys32_dup2_wrapper:
diff --git a/arch/s390/kernel/debug.c b/arch/s390/kernel/debug.c
index ba03fc0a3a56..be8bceaf37d9 100644
--- a/arch/s390/kernel/debug.c
+++ b/arch/s390/kernel/debug.c
@@ -603,7 +603,7 @@ debug_input(struct file *file, const char __user *user_buf, size_t length,
 static int
 debug_open(struct inode *inode, struct file *file)
 {
-        int i = 0, rc = 0;
+        int i, rc = 0;
         file_private_info_t *p_info;
         debug_info_t *debug_info, *debug_info_snapshot;
 
@@ -642,8 +642,7 @@ found:
         p_info = kmalloc(sizeof(file_private_info_t),
                                                 GFP_KERNEL);
         if(!p_info){
-                if(debug_info_snapshot)
-                        debug_info_free(debug_info_snapshot);
+                debug_info_free(debug_info_snapshot);
                 rc = -ENOMEM;
                 goto out;
         }
@@ -698,8 +697,7 @@ debug_info_t *debug_register_mode(const char *name, int pages_per_area,
         if ((uid != 0) || (gid != 0))
                 pr_warning("Root becomes the owner of all s390dbf files "
                            "in sysfs\n");
-        if (!initialized)
-                BUG();
+        BUG_ON(!initialized);
         mutex_lock(&debug_mutex);
 
         /* create new debug_info */
@@ -1156,7 +1154,6 @@ debug_unregister_view(debug_info_t * id, struct debug_view *view)
         else {
                 debugfs_remove(id->debugfs_entries[i]);
                 id->views[i] = NULL;
-                rc = 0;
         }
         spin_unlock_irqrestore(&id->lock, flags);
 out:
diff --git a/arch/s390/kernel/early.c b/arch/s390/kernel/early.c
index 2a2ca268b1dd..4d221c81c849 100644
--- a/arch/s390/kernel/early.c
+++ b/arch/s390/kernel/early.c
@@ -6,6 +6,7 @@
  *               Heiko Carstens <heiko.carstens@de.ibm.com>
  */
 
+#include <linux/compiler.h>
 #include <linux/init.h>
 #include <linux/errno.h>
 #include <linux/string.h>
@@ -20,6 +21,7 @@
 #include <asm/processor.h>
 #include <asm/sections.h>
 #include <asm/setup.h>
+#include <asm/sysinfo.h>
 #include <asm/cpcmd.h>
 #include <asm/sclp.h>
 #include "entry.h"
@@ -173,19 +175,21 @@ static noinline __init void init_kernel_storage_key(void)
                 page_set_storage_key(init_pfn << PAGE_SHIFT, PAGE_DEFAULT_KEY);
 }
 
+static __initdata struct sysinfo_3_2_2 vmms __aligned(PAGE_SIZE);
+
 static noinline __init void detect_machine_type(void)
 {
-        struct cpuinfo_S390 *cpuinfo = &S390_lowcore.cpu_data;
-
-        get_cpu_id(&S390_lowcore.cpu_data.cpu_id);
-
-        /* Running under z/VM ? */
-        if (cpuinfo->cpu_id.version == 0xff)
-                machine_flags |= MACHINE_FLAG_VM;
+        /* No VM information? Looks like LPAR */
+        if (stsi(&vmms, 3, 2, 2) == -ENOSYS)
+                return;
+        if (!vmms.count)
+                return;
 
-        /* Running under KVM ? */
-        if (cpuinfo->cpu_id.version == 0xfe)
+        /* Running under KVM? If not we assume z/VM */
+        if (!memcmp(vmms.vm[0].cpi, "\xd2\xe5\xd4", 3))
                 machine_flags |= MACHINE_FLAG_KVM;
+        else
+                machine_flags |= MACHINE_FLAG_VM;
 }
 
 static __init void early_pgm_check_handler(void)
@@ -348,7 +352,6 @@ static void __init setup_boot_command_line(void)
 
         /* copy arch command line */
         strlcpy(boot_command_line, COMMAND_LINE, ARCH_COMMAND_LINE_SIZE);
-        boot_command_line[ARCH_COMMAND_LINE_SIZE - 1] = 0;
 
         /* append IPL PARM data to the boot command line */
         if (MACHINE_IS_VM) {
diff --git a/arch/s390/kernel/head.S b/arch/s390/kernel/head.S
index ec7e35f6055b..1046c2c9f8d1 100644
--- a/arch/s390/kernel/head.S
+++ b/arch/s390/kernel/head.S
@@ -469,6 +469,8 @@ start:
         .org    0x10000
 startup:basr    %r13,0                  # get base
 .LPG0:
+        xc      0x200(256),0x200        # partially clear lowcore
+        xc      0x300(256),0x300
 
 #ifndef CONFIG_MARCH_G5
         # check processor version against MARCH_{G5,Z900,Z990,Z9_109,Z10}
diff --git a/arch/s390/kernel/head31.S b/arch/s390/kernel/head31.S
index db476d114caa..2ced846065b7 100644
--- a/arch/s390/kernel/head31.S
+++ b/arch/s390/kernel/head31.S
@@ -20,7 +20,6 @@ startup_continue:
         lctl    %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
         l       %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area
                                         # move IPL device to lowcore
-        mvc     __LC_IPLDEV(4),IPL_DEVICE-PARMAREA(%r12)
 #
 # Setup stack
 #
diff --git a/arch/s390/kernel/head64.S b/arch/s390/kernel/head64.S
index f9f70aa15244..65667b2e65ce 100644
--- a/arch/s390/kernel/head64.S
+++ b/arch/s390/kernel/head64.S
@@ -86,7 +86,6 @@ startup_continue:
         lctlg   %c0,%c15,.Lctl-.LPG1(%r13)      # load control registers
         lg      %r12,.Lparmaddr-.LPG1(%r13)     # pointer to parameter area
                                         # move IPL device to lowcore
-        mvc     __LC_IPLDEV(4),IPL_DEVICE+4-PARMAREA(%r12)
         lghi    %r0,__LC_PASTE
         stg     %r0,__LC_VDSO_PER_CPU
 #
diff --git a/arch/s390/kernel/ipl.c b/arch/s390/kernel/ipl.c
index 2dcf590faba6..6f3711a0eaaa 100644
--- a/arch/s390/kernel/ipl.c
+++ b/arch/s390/kernel/ipl.c
@@ -23,7 +23,7 @@
 #include <asm/ebcdic.h>
 #include <asm/reset.h>
 #include <asm/sclp.h>
-#include <asm/setup.h>
+#include <asm/checksum.h>
 
 #define IPL_PARM_BLOCK_VERSION 0
 
@@ -56,13 +56,14 @@ struct shutdown_trigger {
 };
 
 /*
- * Five shutdown action types are supported:
+ * The following shutdown action types are supported:
  */
 #define SHUTDOWN_ACTION_IPL_STR         "ipl"
 #define SHUTDOWN_ACTION_REIPL_STR       "reipl"
 #define SHUTDOWN_ACTION_DUMP_STR        "dump"
 #define SHUTDOWN_ACTION_VMCMD_STR       "vmcmd"
 #define SHUTDOWN_ACTION_STOP_STR        "stop"
+#define SHUTDOWN_ACTION_DUMP_REIPL_STR  "dump_reipl"
 
 struct shutdown_action {
         char *name;
@@ -146,6 +147,7 @@ static enum ipl_method reipl_method = REIPL_METHOD_DEFAULT;
 static struct ipl_parameter_block *reipl_block_fcp;
 static struct ipl_parameter_block *reipl_block_ccw;
 static struct ipl_parameter_block *reipl_block_nss;
+static struct ipl_parameter_block *reipl_block_actual;
 
 static int dump_capabilities = DUMP_TYPE_NONE;
 static enum dump_type dump_type = DUMP_TYPE_NONE;
@@ -835,6 +837,7 @@ static int reipl_set_type(enum ipl_type type)
                         reipl_method = REIPL_METHOD_CCW_VM;
                 else
                         reipl_method = REIPL_METHOD_CCW_CIO;
+                reipl_block_actual = reipl_block_ccw;
                 break;
         case IPL_TYPE_FCP:
                 if (diag308_set_works)
@@ -843,6 +846,7 @@ static int reipl_set_type(enum ipl_type type)
                         reipl_method = REIPL_METHOD_FCP_RO_VM;
                 else
                         reipl_method = REIPL_METHOD_FCP_RO_DIAG;
+                reipl_block_actual = reipl_block_fcp;
                 break;
         case IPL_TYPE_FCP_DUMP:
                 reipl_method = REIPL_METHOD_FCP_DUMP;
@@ -852,6 +856,7 @@ static int reipl_set_type(enum ipl_type type)
                         reipl_method = REIPL_METHOD_NSS_DIAG;
                 else
                         reipl_method = REIPL_METHOD_NSS;
+                reipl_block_actual = reipl_block_nss;
                 break;
         case IPL_TYPE_UNKNOWN:
                 reipl_method = REIPL_METHOD_DEFAULT;
@@ -960,7 +965,6 @@ static void reipl_run(struct shutdown_trigger *trigger)
                 diag308(DIAG308_IPL, NULL);
                 break;
         case REIPL_METHOD_FCP_DUMP:
-        default:
                 break;
         }
         disabled_wait((unsigned long) __builtin_return_address(0));
@@ -1069,10 +1073,12 @@ static int __init reipl_fcp_init(void)
 {
         int rc;
 
-        if ((!diag308_set_works) && (ipl_info.type != IPL_TYPE_FCP))
-                return 0;
-        if ((!diag308_set_works) && (ipl_info.type == IPL_TYPE_FCP))
-                make_attrs_ro(reipl_fcp_attrs);
+        if (!diag308_set_works) {
+                if (ipl_info.type == IPL_TYPE_FCP)
+                        make_attrs_ro(reipl_fcp_attrs);
+                else
+                        return 0;
+        }
 
         reipl_block_fcp = (void *) get_zeroed_page(GFP_KERNEL);
         if (!reipl_block_fcp)
@@ -1253,7 +1259,6 @@ static void dump_run(struct shutdown_trigger *trigger)
                 diag308(DIAG308_DUMP, NULL);
                 break;
         case DUMP_METHOD_NONE:
-        default:
                 return;
         }
         printk(KERN_EMERG "Dump failed!\n");
@@ -1332,6 +1337,49 @@ static struct shutdown_action __refdata dump_action = {
         .init   = dump_init,
 };
 
+static void dump_reipl_run(struct shutdown_trigger *trigger)
+{
+        preempt_disable();
+        /*
+         * Bypass dynamic address translation (DAT) when storing IPL parameter
+         * information block address and checksum into the prefix area
+         * (corresponding to absolute addresses 0-8191).
+         * When enhanced DAT applies and the STE format control in one,
+         * the absolute address is formed without prefixing. In this case a
+         * normal store (stg/st) into the prefix area would no more match to
+         * absolute addresses 0-8191.
+         */
+#ifdef CONFIG_64BIT
+        asm volatile("sturg %0,%1"
+                :: "a" ((unsigned long) reipl_block_actual),
+                "a" (&lowcore_ptr[smp_processor_id()]->ipib));
+#else
+        asm volatile("stura %0,%1"
+                :: "a" ((unsigned long) reipl_block_actual),
+                "a" (&lowcore_ptr[smp_processor_id()]->ipib));
+#endif
+        asm volatile("stura %0,%1"
+                :: "a" (csum_partial(reipl_block_actual,
+                                     reipl_block_actual->hdr.len, 0)),
+                "a" (&lowcore_ptr[smp_processor_id()]->ipib_checksum));
+        preempt_enable();
+        dump_run(trigger);
+}
+
+static int __init dump_reipl_init(void)
+{
+        if (!diag308_set_works)
+                return -EOPNOTSUPP;
+        else
+                return 0;
+}
+
+static struct shutdown_action __refdata dump_reipl_action = {
+        .name   = SHUTDOWN_ACTION_DUMP_REIPL_STR,
+        .fn     = dump_reipl_run,
+        .init   = dump_reipl_init,
+};
+
 /*
  * vmcmd shutdown action: Trigger vm command on shutdown.
  */
@@ -1421,7 +1469,8 @@ static struct shutdown_action stop_action = {SHUTDOWN_ACTION_STOP_STR,
 /* action list */
 
 static struct shutdown_action *shutdown_actions_list[] = {
-        &ipl_action, &reipl_action, &dump_action, &vmcmd_action, &stop_action};
+        &ipl_action, &reipl_action, &dump_reipl_action, &dump_action,
+        &vmcmd_action, &stop_action};
 #define SHUTDOWN_ACTIONS_COUNT (sizeof(shutdown_actions_list) / sizeof(void *))
 
 /*
@@ -1434,11 +1483,11 @@ static int set_trigger(const char *buf, struct shutdown_trigger *trigger,
                        size_t len)
 {
         int i;
+
         for (i = 0; i < SHUTDOWN_ACTIONS_COUNT; i++) {
                 if (!shutdown_actions_list[i])
                         continue;
-                if (strncmp(buf, shutdown_actions_list[i]->name,
-                            strlen(shutdown_actions_list[i]->name)) == 0) {
+                if (sysfs_streq(buf, shutdown_actions_list[i]->name)) {
                         trigger->action = shutdown_actions_list[i];
                         return len;
                 }
@@ -1672,7 +1721,7 @@ static int on_panic_notify(struct notifier_block *self,
 
 static struct notifier_block on_panic_nb = {
         .notifier_call = on_panic_notify,
-        .priority = 0,
+        .priority = INT_MIN,
 };
 
 void __init setup_ipl(void)
@@ -1696,7 +1745,6 @@ void __init setup_ipl(void)
                         sizeof(ipl_info.data.nss.name));
                 break;
         case IPL_TYPE_UNKNOWN:
-        default:
                 /* We have no info to copy */
                 break;
         }
diff --git a/arch/s390/kernel/module.c b/arch/s390/kernel/module.c
index 59b4e796680a..eed4a00cb676 100644
--- a/arch/s390/kernel/module.c
+++ b/arch/s390/kernel/module.c
@@ -310,15 +310,20 @@ apply_rela(Elf_Rela *rela, Elf_Addr base, Elf_Sym *symtab,
                         info->plt_initialized = 1;
                 }
                 if (r_type == R_390_PLTOFF16 ||
-                    r_type == R_390_PLTOFF32
-                    || r_type == R_390_PLTOFF64
-                        )
+                    r_type == R_390_PLTOFF32 ||
+                    r_type == R_390_PLTOFF64)
                         val = me->arch.plt_offset - me->arch.got_offset +
                                 info->plt_offset + rela->r_addend;
-                else
-                        val =  (Elf_Addr) me->module_core +
-                                me->arch.plt_offset + info->plt_offset + 
-                                rela->r_addend - loc;
+                else {
+                        if (!((r_type == R_390_PLT16DBL &&
+                               val - loc + 0xffffUL < 0x1ffffeUL) ||
+                              (r_type == R_390_PLT32DBL &&
+                               val - loc + 0xffffffffULL < 0x1fffffffeULL)))
+                                val = (Elf_Addr) me->module_core +
+                                        me->arch.plt_offset +
+                                        info->plt_offset;
+                        val += rela->r_addend - loc;
+                }
                 if (r_type == R_390_PLT16DBL)
                         *(unsigned short *) loc = val >> 1;
                 else if (r_type == R_390_PLTOFF16)
diff --git a/arch/s390/kernel/nmi.c b/arch/s390/kernel/nmi.c
new file mode 100644
index 000000000000..4bfdc421d7e9
--- /dev/null
+++ b/arch/s390/kernel/nmi.c
@@ -0,0 +1,376 @@
+/*
+ *   Machine check handler
+ *
+ *    Copyright IBM Corp. 2000,2009
+ *    Author(s): Ingo Adlung <adlung@de.ibm.com>,
+ *               Martin Schwidefsky <schwidefsky@de.ibm.com>,
+ *               Cornelia Huck <cornelia.huck@de.ibm.com>,
+ *               Heiko Carstens <heiko.carstens@de.ibm.com>,
+ */
+
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/time.h>
+#include <linux/module.h>
+#include <asm/lowcore.h>
+#include <asm/smp.h>
+#include <asm/etr.h>
+#include <asm/cpu.h>
+#include <asm/nmi.h>
+#include <asm/crw.h>
+
+struct mcck_struct {
+        int kill_task;
+        int channel_report;
+        int warning;
+        unsigned long long mcck_code;
+};
+
+static DEFINE_PER_CPU(struct mcck_struct, cpu_mcck);
+
+static NORET_TYPE void s390_handle_damage(char *msg)
+{
+        smp_send_stop();
+        disabled_wait((unsigned long) __builtin_return_address(0));
+        while (1);
+}
+
+/*
+ * Main machine check handler function. Will be called with interrupts enabled
+ * or disabled and machine checks enabled or disabled.
+ */
+void s390_handle_mcck(void)
+{
+        unsigned long flags;
+        struct mcck_struct mcck;
+
+        /*
+         * Disable machine checks and get the current state of accumulated
+         * machine checks. Afterwards delete the old state and enable machine
+         * checks again.
+         */
+        local_irq_save(flags);
+        local_mcck_disable();
+        mcck = __get_cpu_var(cpu_mcck);
+        memset(&__get_cpu_var(cpu_mcck), 0, sizeof(struct mcck_struct));
+        clear_thread_flag(TIF_MCCK_PENDING);
+        local_mcck_enable();
+        local_irq_restore(flags);
+
+        if (mcck.channel_report)
+                crw_handle_channel_report();
+        /*
+         * A warning may remain for a prolonged period on the bare iron.
+         * (actually until the machine is powered off, or the problem is gone)
+         * So we just stop listening for the WARNING MCH and avoid continuously
+         * being interrupted.  One caveat is however, that we must do this per
+         * processor and cannot use the smp version of ctl_clear_bit().
+         * On VM we only get one interrupt per virtally presented machinecheck.
+         * Though one suffices, we may get one interrupt per (virtual) cpu.
+         */
+        if (mcck.warning) {     /* WARNING pending ? */
+                static int mchchk_wng_posted = 0;
+
+                /* Use single cpu clear, as we cannot handle smp here. */
+                __ctl_clear_bit(14, 24);        /* Disable WARNING MCH */
+                if (xchg(&mchchk_wng_posted, 1) == 0)
+                        kill_cad_pid(SIGPWR, 1);
+        }
+        if (mcck.kill_task) {
+                local_irq_enable();
+                printk(KERN_EMERG "mcck: Terminating task because of machine "
+                       "malfunction (code 0x%016llx).\n", mcck.mcck_code);
+                printk(KERN_EMERG "mcck: task: %s, pid: %d.\n",
+                       current->comm, current->pid);
+                do_exit(SIGSEGV);
+        }
+}
+EXPORT_SYMBOL_GPL(s390_handle_mcck);
+
+/*
+ * returns 0 if all registers could be validated
+ * returns 1 otherwise
+ */
+static int notrace s390_revalidate_registers(struct mci *mci)
+{
+        int kill_task;
+        u64 tmpclock;
+        u64 zero;
+        void *fpt_save_area, *fpt_creg_save_area;
+
+        kill_task = 0;
+        zero = 0;
+
+        if (!mci->gr) {
+                /*
+                 * General purpose registers couldn't be restored and have
+                 * unknown contents. Process needs to be terminated.
+                 */
+                kill_task = 1;
+        }
+        if (!mci->fp) {
+                /*
+                 * Floating point registers can't be restored and
+                 * therefore the process needs to be terminated.
+                 */
+                kill_task = 1;
+        }
+#ifndef CONFIG_64BIT
+        asm volatile(
+                "       ld      0,0(%0)\n"
+                "       ld      2,8(%0)\n"
+                "       ld      4,16(%0)\n"
+                "       ld      6,24(%0)"
+                : : "a" (&S390_lowcore.floating_pt_save_area));
+#endif
+
+        if (MACHINE_HAS_IEEE) {
+#ifdef CONFIG_64BIT
+                fpt_save_area = &S390_lowcore.floating_pt_save_area;
+                fpt_creg_save_area = &S390_lowcore.fpt_creg_save_area;
+#else
+                fpt_save_area = (void *) S390_lowcore.extended_save_area_addr;
+                fpt_creg_save_area = fpt_save_area + 128;
+#endif
+                if (!mci->fc) {
+                        /*
+                         * Floating point control register can't be restored.
+                         * Task will be terminated.
+                         */
+                        asm volatile("lfpc 0(%0)" : : "a" (&zero), "m" (zero));
+                        kill_task = 1;
+
+                } else
+                        asm volatile("lfpc 0(%0)" : : "a" (fpt_creg_save_area));
+
+                asm volatile(
+                        "       ld      0,0(%0)\n"
+                        "       ld      1,8(%0)\n"
+                        "       ld      2,16(%0)\n"
+                        "       ld      3,24(%0)\n"
+                        "       ld      4,32(%0)\n"
+                        "       ld      5,40(%0)\n"
+                        "       ld      6,48(%0)\n"
+                        "       ld      7,56(%0)\n"
+                        "       ld      8,64(%0)\n"
+                        "       ld      9,72(%0)\n"
+                        "       ld      10,80(%0)\n"
+                        "       ld      11,88(%0)\n"
+                        "       ld      12,96(%0)\n"
+                        "       ld      13,104(%0)\n"
+                        "       ld      14,112(%0)\n"
+                        "       ld      15,120(%0)\n"
+                        : : "a" (fpt_save_area));
+        }
+        /* Revalidate access registers */
+        asm volatile(
+                "       lam     0,15,0(%0)"
+                : : "a" (&S390_lowcore.access_regs_save_area));
+        if (!mci->ar) {
+                /*
+                 * Access registers have unknown contents.
+                 * Terminating task.
+                 */
+                kill_task = 1;
+        }
+        /* Revalidate control registers */
+        if (!mci->cr) {
+                /*
+                 * Control registers have unknown contents.
+                 * Can't recover and therefore stopping machine.
+                 */
+                s390_handle_damage("invalid control registers.");
+        } else {
+#ifdef CONFIG_64BIT
+                asm volatile(
+                        "       lctlg   0,15,0(%0)"
+                        : : "a" (&S390_lowcore.cregs_save_area));
+#else
+                asm volatile(
+                        "       lctl    0,15,0(%0)"
+                        : : "a" (&S390_lowcore.cregs_save_area));
+#endif
+        }
+        /*
+         * We don't even try to revalidate the TOD register, since we simply
+         * can't write something sensible into that register.
+         */
+#ifdef CONFIG_64BIT
+        /*
+         * See if we can revalidate the TOD programmable register with its
+         * old contents (should be zero) otherwise set it to zero.
+         */
+        if (!mci->pr)
+                asm volatile(
+                        "       sr      0,0\n"
+                        "       sckpf"
+                        : : : "0", "cc");
+        else
+                asm volatile(
+                        "       l       0,0(%0)\n"
+                        "       sckpf"
+                        : : "a" (&S390_lowcore.tod_progreg_save_area)
+                        : "0", "cc");
+#endif
+        /* Revalidate clock comparator register */
+        asm volatile(
+                "       stck    0(%1)\n"
+                "       sckc    0(%1)"
+                : "=m" (tmpclock) : "a" (&(tmpclock)) : "cc", "memory");
+
+        /* Check if old PSW is valid */
+        if (!mci->wp)
+                /*
+                 * Can't tell if we come from user or kernel mode
+                 * -> stopping machine.
+                 */
+                s390_handle_damage("old psw invalid.");
+
+        if (!mci->ms || !mci->pm || !mci->ia)
+                kill_task = 1;
+
+        return kill_task;
+}
+
+#define MAX_IPD_COUNT   29
+#define MAX_IPD_TIME    (5 * 60 * USEC_PER_SEC) /* 5 minutes */
+
+#define ED_STP_ISLAND   6       /* External damage STP island check */
+#define ED_STP_SYNC     7       /* External damage STP sync check */
+#define ED_ETR_SYNC     12      /* External damage ETR sync check */
+#define ED_ETR_SWITCH   13      /* External damage ETR switch to local */
+
+/*
+ * machine check handler.
+ */
+void notrace s390_do_machine_check(struct pt_regs *regs)
+{
+        static int ipd_count;
+        static DEFINE_SPINLOCK(ipd_lock);
+        static unsigned long long last_ipd;
+        struct mcck_struct *mcck;
+        unsigned long long tmp;
+        struct mci *mci;
+        int umode;
+
+        lockdep_off();
+        s390_idle_check();
+
+        mci = (struct mci *) &S390_lowcore.mcck_interruption_code;
+        mcck = &__get_cpu_var(cpu_mcck);
+        umode = user_mode(regs);
+
+        if (mci->sd) {
+                /* System damage -> stopping machine */
+                s390_handle_damage("received system damage machine check.");
+        }
+        if (mci->pd) {
+                if (mci->b) {
+                        /* Processing backup -> verify if we can survive this */
+                        u64 z_mcic, o_mcic, t_mcic;
+#ifdef CONFIG_64BIT
+                        z_mcic = (1ULL<<63 | 1ULL<<59 | 1ULL<<29);
+                        o_mcic = (1ULL<<43 | 1ULL<<42 | 1ULL<<41 | 1ULL<<40 |
+                                  1ULL<<36 | 1ULL<<35 | 1ULL<<34 | 1ULL<<32 |
+                                  1ULL<<30 | 1ULL<<21 | 1ULL<<20 | 1ULL<<17 |
+                                  1ULL<<16);
+#else
+                        z_mcic = (1ULL<<63 | 1ULL<<59 | 1ULL<<57 | 1ULL<<50 |
+                                  1ULL<<29);
+                        o_mcic = (1ULL<<43 | 1ULL<<42 | 1ULL<<41 | 1ULL<<40 |
+                                  1ULL<<36 | 1ULL<<35 | 1ULL<<34 | 1ULL<<32 |
+                                  1ULL<<30 | 1ULL<<20 | 1ULL<<17 | 1ULL<<16);
+#endif
+                        t_mcic = *(u64 *)mci;
+
+                        if (((t_mcic & z_mcic) != 0) ||
+                            ((t_mcic & o_mcic) != o_mcic)) {
+                                s390_handle_damage("processing backup machine "
+                                                   "check with damage.");
+                        }
+
+                        /*
+                         * Nullifying exigent condition, therefore we might
+                         * retry this instruction.
+                         */
+                        spin_lock(&ipd_lock);
+                        tmp = get_clock();
+                        if (((tmp - last_ipd) >> 12) < MAX_IPD_TIME)
+                                ipd_count++;
+                        else
+                                ipd_count = 1;
+                        last_ipd = tmp;
+                        if (ipd_count == MAX_IPD_COUNT)
+                                s390_handle_damage("too many ipd retries.");
+                        spin_unlock(&ipd_lock);
+                } else {
+                        /* Processing damage -> stopping machine */
+                        s390_handle_damage("received instruction processing "
+                                           "damage machine check.");
+                }
+        }
+        if (s390_revalidate_registers(mci)) {
+                if (umode) {
+                        /*
+                         * Couldn't restore all register contents while in
+                         * user mode -> mark task for termination.
+                         */
+                        mcck->kill_task = 1;
+                        mcck->mcck_code = *(unsigned long long *) mci;
+                        set_thread_flag(TIF_MCCK_PENDING);
+                } else {
+                        /*
+                         * Couldn't restore all register contents while in
+                         * kernel mode -> stopping machine.
+                         */
+                        s390_handle_damage("unable to revalidate registers.");
+                }
+        }
+        if (mci->cd) {
+                /* Timing facility damage */
+                s390_handle_damage("TOD clock damaged");
+        }
+        if (mci->ed && mci->ec) {
+                /* External damage */
+                if (S390_lowcore.external_damage_code & (1U << ED_ETR_SYNC))
+                        etr_sync_check();
+                if (S390_lowcore.external_damage_code & (1U << ED_ETR_SWITCH))
+                        etr_switch_to_local();
+                if (S390_lowcore.external_damage_code & (1U << ED_STP_SYNC))
+                        stp_sync_check();
+                if (S390_lowcore.external_damage_code & (1U << ED_STP_ISLAND))
+                        stp_island_check();
+        }
+        if (mci->se)
+                /* Storage error uncorrected */
+                s390_handle_damage("received storage error uncorrected "
+                                   "machine check.");
+        if (mci->ke)
+                /* Storage key-error uncorrected */
+                s390_handle_damage("received storage key-error uncorrected "
+                                   "machine check.");
+        if (mci->ds && mci->fa)
+                /* Storage degradation */
+                s390_handle_damage("received storage degradation machine "
+                                   "check.");
+        if (mci->cp) {
+                /* Channel report word pending */
+                mcck->channel_report = 1;
+                set_thread_flag(TIF_MCCK_PENDING);
+        }
+        if (mci->w) {
+                /* Warning pending */
+                mcck->warning = 1;
+                set_thread_flag(TIF_MCCK_PENDING);
+        }
+        lockdep_on();
+}
+
+static int __init machine_check_init(void)
+{
+        ctl_set_bit(14, 25);    /* enable external damage MCH */
+        ctl_set_bit(14, 27);    /* enable system recovery MCH */
+        ctl_set_bit(14, 24);    /* enable warning MCH */
+        return 0;
+}
+arch_initcall(machine_check_init);
diff --git a/arch/s390/kernel/process.c b/arch/s390/kernel/process.c
index 5cd38a90e64d..b48e961a38f6 100644
--- a/arch/s390/kernel/process.c
+++ b/arch/s390/kernel/process.c
@@ -1,18 +1,10 @@
 /*
- *  arch/s390/kernel/process.c
+ * This file handles the architecture dependent parts of process handling.
  *
- *  S390 version
- *    Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
- *    Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
- *               Hartmut Penner (hp@de.ibm.com),
- *               Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
- *
- *  Derived from "arch/i386/kernel/process.c"
- *    Copyright (C) 1995, Linus Torvalds
- */
-
-/*
- * This file handles the architecture-dependent parts of process handling..
+ *    Copyright IBM Corp. 1999,2009
+ *    Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>,
+ *               Hartmut Penner <hp@de.ibm.com>,
+ *               Denis Joseph Barrow,
  */
 
 #include <linux/compiler.h>
@@ -47,6 +39,7 @@
 #include <asm/processor.h>
 #include <asm/irq.h>
 #include <asm/timer.h>
+#include <asm/nmi.h>
 #include "entry.h"
 
 asmlinkage void ret_from_fork(void) asm ("ret_from_fork");
@@ -76,7 +69,6 @@ unsigned long thread_saved_pc(struct task_struct *tsk)
         return sf->gprs[8];
 }
 
-extern void s390_handle_mcck(void);
 /*
  * The idle loop on a S390...
  */
@@ -149,6 +141,7 @@ int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
         return do_fork(flags | CLONE_VM | CLONE_UNTRACED,
                        0, &regs, 0, NULL, NULL);
 }
+EXPORT_SYMBOL(kernel_thread);
 
 /*
  * Free current thread data structures etc..
@@ -168,34 +161,35 @@ void release_thread(struct task_struct *dead_task)
 }
 
 int copy_thread(int nr, unsigned long clone_flags, unsigned long new_stackp,
-        unsigned long unused,
-        struct task_struct * p, struct pt_regs * regs)
+                unsigned long unused,
+                struct task_struct *p, struct pt_regs *regs)
 {
-        struct fake_frame
-          {
-            struct stack_frame sf;
-            struct pt_regs childregs;
-          } *frame;
-
-        frame = container_of(task_pt_regs(p), struct fake_frame, childregs);
-        p->thread.ksp = (unsigned long) frame;
+        struct thread_info *ti;
+        struct fake_frame
+        {
+                struct stack_frame sf;
+                struct pt_regs childregs;
+        } *frame;
+
+        frame = container_of(task_pt_regs(p), struct fake_frame, childregs);
+        p->thread.ksp = (unsigned long) frame;
         /* Store access registers to kernel stack of new process. */
-        frame->childregs = *regs;
+        frame->childregs = *regs;
         frame->childregs.gprs[2] = 0;   /* child returns 0 on fork. */
-        frame->childregs.gprs[15] = new_stackp;
-        frame->sf.back_chain = 0;
+        frame->childregs.gprs[15] = new_stackp;
+        frame->sf.back_chain = 0;
 
-        /* new return point is ret_from_fork */
-        frame->sf.gprs[8] = (unsigned long) ret_from_fork;
+        /* new return point is ret_from_fork */
+        frame->sf.gprs[8] = (unsigned long) ret_from_fork;
 
-        /* fake return stack for resume(), don't go back to schedule */
-        frame->sf.gprs[9] = (unsigned long) frame;
+        /* fake return stack for resume(), don't go back to schedule */
+        frame->sf.gprs[9] = (unsigned long) frame;
 
         /* Save access registers to new thread structure. */
         save_access_regs(&p->thread.acrs[0]);
 
 #ifndef CONFIG_64BIT
-        /*
+        /*
          * save fprs to current->thread.fp_regs to merge them with
          * the emulated registers and then copy the result to the child.
          */
@@ -220,10 +214,13 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long new_stackp,
 #endif /* CONFIG_64BIT */
         /* start new process with ar4 pointing to the correct address space */
         p->thread.mm_segment = get_fs();
-        /* Don't copy debug registers */
-        memset(&p->thread.per_info,0,sizeof(p->thread.per_info));
-
-        return 0;
+        /* Don't copy debug registers */
+        memset(&p->thread.per_info, 0, sizeof(p->thread.per_info));
+        /* Initialize per thread user and system timer values */
+        ti = task_thread_info(p);
+        ti->user_timer = 0;
+        ti->system_timer = 0;
+        return 0;
 }
 
 SYSCALL_DEFINE0(fork)
@@ -311,7 +308,7 @@ out:
 int dump_fpu (struct pt_regs * regs, s390_fp_regs *fpregs)
 {
 #ifndef CONFIG_64BIT
-        /*
+        /*
          * save fprs to current->thread.fp_regs to merge them with
          * the emulated registers and then copy the result to the dump.
          */
@@ -322,6 +319,7 @@ int dump_fpu (struct pt_regs * regs, s390_fp_regs *fpregs)
 #endif /* CONFIG_64BIT */
         return 1;
 }
+EXPORT_SYMBOL(dump_fpu);
 
 unsigned long get_wchan(struct task_struct *p)
 {
@@ -346,4 +344,3 @@ unsigned long get_wchan(struct task_struct *p)
         }
         return 0;
 }
-
diff --git a/arch/s390/kernel/processor.c b/arch/s390/kernel/processor.c
index 82c1872cfe80..802c8ab247f3 100644
--- a/arch/s390/kernel/processor.c
+++ b/arch/s390/kernel/processor.c
@@ -18,10 +18,11 @@
 #include <asm/lowcore.h>
 #include <asm/param.h>
 
-void __cpuinit print_cpu_info(struct cpuinfo_S390 *cpuinfo)
+void __cpuinit print_cpu_info(void)
 {
         pr_info("Processor %d started, address %d, identification %06X\n",
-                cpuinfo->cpu_nr, cpuinfo->cpu_addr, cpuinfo->cpu_id.ident);
+                S390_lowcore.cpu_nr, S390_lowcore.cpu_addr,
+                S390_lowcore.cpu_id.ident);
 }
 
 /*
@@ -30,48 +31,46 @@ void __cpuinit print_cpu_info(struct cpuinfo_S390 *cpuinfo)
 
 static int show_cpuinfo(struct seq_file *m, void *v)
 {
-        static const char *hwcap_str[8] = {
+        static const char *hwcap_str[9] = {
                 "esan3", "zarch", "stfle", "msa", "ldisp", "eimm", "dfp",
-                "edat"
+                "edat", "etf3eh"
         };
-       struct cpuinfo_S390 *cpuinfo;
-       unsigned long n = (unsigned long) v - 1;
-       int i;
+        struct _lowcore *lc;
+        unsigned long n = (unsigned long) v - 1;
+        int i;
 
-       s390_adjust_jiffies();
-       preempt_disable();
-       if (!n) {
-               seq_printf(m, "vendor_id       : IBM/S390\n"
-                          "# processors    : %i\n"
-                          "bogomips per cpu: %lu.%02lu\n",
-                          num_online_cpus(), loops_per_jiffy/(500000/HZ),
-                          (loops_per_jiffy/(5000/HZ))%100);
-               seq_puts(m, "features\t: ");
-               for (i = 0; i < 8; i++)
-                       if (hwcap_str[i] && (elf_hwcap & (1UL << i)))
-                               seq_printf(m, "%s ", hwcap_str[i]);
-               seq_puts(m, "\n");
-       }
+        s390_adjust_jiffies();
+        preempt_disable();
+        if (!n) {
+                seq_printf(m, "vendor_id       : IBM/S390\n"
+                           "# processors    : %i\n"
+                           "bogomips per cpu: %lu.%02lu\n",
+                           num_online_cpus(), loops_per_jiffy/(500000/HZ),
+                           (loops_per_jiffy/(5000/HZ))%100);
+                seq_puts(m, "features\t: ");
+                for (i = 0; i < 9; i++)
+                        if (hwcap_str[i] && (elf_hwcap & (1UL << i)))
+                                seq_printf(m, "%s ", hwcap_str[i]);
+                seq_puts(m, "\n");
+        }
 
-       if (cpu_online(n)) {
+        if (cpu_online(n)) {
 #ifdef CONFIG_SMP
-               if (smp_processor_id() == n)
-                       cpuinfo = &S390_lowcore.cpu_data;
-               else
-                       cpuinfo = &lowcore_ptr[n]->cpu_data;
+                lc = (smp_processor_id() == n) ?
+                        &S390_lowcore : lowcore_ptr[n];
 #else
-               cpuinfo = &S390_lowcore.cpu_data;
+                lc = &S390_lowcore;
 #endif
-               seq_printf(m, "processor %li: "
-                          "version = %02X,  "
-                          "identification = %06X,  "
-                          "machine = %04X\n",
-                          n, cpuinfo->cpu_id.version,
-                          cpuinfo->cpu_id.ident,
-                          cpuinfo->cpu_id.machine);
-       }
-       preempt_enable();
-       return 0;
+                seq_printf(m, "processor %li: "
+                           "version = %02X,  "
+                           "identification = %06X,  "
+                           "machine = %04X\n",
+                           n, lc->cpu_id.version,
+                           lc->cpu_id.ident,
+                           lc->cpu_id.machine);
+        }
+        preempt_enable();
+        return 0;
 }
 
 static void *c_start(struct seq_file *m, loff_t *pos)
diff --git a/arch/s390/kernel/reipl64.S b/arch/s390/kernel/reipl64.S
index c41930499a5f..774147824c3d 100644
--- a/arch/s390/kernel/reipl64.S
+++ b/arch/s390/kernel/reipl64.S
@@ -1,10 +1,7 @@
 /*
- *  arch/s390/kernel/reipl.S
- *
- *  S390 version
- *    Copyright (C) 2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
- *    Author(s): Holger Smolinski (Holger.Smolinski@de.ibm.com)
-                 Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
+ *    Copyright IBM Corp 2000,2009
+ *    Author(s): Holger Smolinski <Holger.Smolinski@de.ibm.com>,
+ *               Denis Joseph Barrow,
  */
 
 #include <asm/lowcore.h>
@@ -30,7 +27,7 @@ do_reipl_asm:	basr	%r13,0
                 mvc     __LC_PREFIX_SAVE_AREA-0x1000(4,%r1),0(%r10)
                 stfpc   __LC_FP_CREG_SAVE_AREA-0x1000(%r1)
                 stckc   .Lclkcmp-.Lpg0(%r13)
-                mvc     __LC_CLOCK_COMP_SAVE_AREA-0x1000(8,%r1),.Lclkcmp-.Lpg0(%r13)
+                mvc     __LC_CLOCK_COMP_SAVE_AREA-0x1000(7,%r1),.Lclkcmp-.Lpg0(%r13)
                 stpt    __LC_CPU_TIMER_SAVE_AREA-0x1000(%r1)
                 stg     %r13, __LC_PSW_SAVE_AREA-0x1000+8(%r1)
 
diff --git a/arch/s390/kernel/s390_ksyms.c b/arch/s390/kernel/s390_ksyms.c
index 46b90cb03707..656fcbb9bd83 100644
--- a/arch/s390/kernel/s390_ksyms.c
+++ b/arch/s390/kernel/s390_ksyms.c
@@ -1,49 +1,5 @@
-/*
- *  arch/s390/kernel/s390_ksyms.c
- *
- *  S390 version
- */
-#include <linux/highuid.h>
 #include <linux/module.h>
-#include <linux/mm.h>
-#include <linux/smp.h>
-#include <linux/syscalls.h>
-#include <linux/interrupt.h>
-#include <asm/checksum.h>
-#include <asm/cpcmd.h>
-#include <asm/delay.h>
-#include <asm/pgalloc.h>
-#include <asm/setup.h>
 #include <asm/ftrace.h>
-#ifdef CONFIG_IP_MULTICAST
-#include <net/arp.h>
-#endif
-
-/*
- * memory management
- */
-EXPORT_SYMBOL(_oi_bitmap);
-EXPORT_SYMBOL(_ni_bitmap);
-EXPORT_SYMBOL(_zb_findmap);
-EXPORT_SYMBOL(_sb_findmap);
-
-/*
- * binfmt_elf loader 
- */
-extern int dump_fpu (struct pt_regs * regs, s390_fp_regs *fpregs);
-EXPORT_SYMBOL(dump_fpu);
-EXPORT_SYMBOL(empty_zero_page);
-
-/*
- * misc.
- */
-EXPORT_SYMBOL(machine_flags);
-EXPORT_SYMBOL(__udelay);
-EXPORT_SYMBOL(kernel_thread);
-EXPORT_SYMBOL(csum_fold);
-EXPORT_SYMBOL(console_mode);
-EXPORT_SYMBOL(console_devno);
-EXPORT_SYMBOL(console_irq);
 
 #ifdef CONFIG_FUNCTION_TRACER
 EXPORT_SYMBOL(_mcount);
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c
index c5cfb6185eac..06201b93cbbf 100644
--- a/arch/s390/kernel/setup.c
+++ b/arch/s390/kernel/setup.c
@@ -74,9 +74,17 @@ EXPORT_SYMBOL(uaccess);
  * Machine setup..
  */
 unsigned int console_mode = 0;
+EXPORT_SYMBOL(console_mode);
+
 unsigned int console_devno = -1;
+EXPORT_SYMBOL(console_devno);
+
 unsigned int console_irq = -1;
+EXPORT_SYMBOL(console_irq);
+
 unsigned long machine_flags;
+EXPORT_SYMBOL(machine_flags);
+
 unsigned long elf_hwcap = 0;
 char elf_platform[ELF_PLATFORM_SIZE];
 
@@ -86,6 +94,10 @@ volatile int __cpu_logical_map[NR_CPUS]; /* logical cpu to cpu address */
 int __initdata memory_end_set;
 unsigned long __initdata memory_end;
 
+/* An array with a pointer to the lowcore of every CPU. */
+struct _lowcore *lowcore_ptr[NR_CPUS];
+EXPORT_SYMBOL(lowcore_ptr);
+
 /*
  * This is set up by the setup-routine at boot-time
  * for S390 need to find out, what we have to setup
@@ -109,13 +121,10 @@ static struct resource data_resource = {
  */
 void __cpuinit cpu_init(void)
 {
-        int addr = hard_smp_processor_id();
-
         /*
          * Store processor id in lowcore (used e.g. in timer_interrupt)
          */
-        get_cpu_id(&S390_lowcore.cpu_data.cpu_id);
-        S390_lowcore.cpu_data.cpu_addr = addr;
+        get_cpu_id(&S390_lowcore.cpu_id);
 
         /*
          * Force FPU initialization:
@@ -125,8 +134,7 @@ void __cpuinit cpu_init(void)
 
         atomic_inc(&init_mm.mm_count);
         current->active_mm = &init_mm;
-        if (current->mm)
-                BUG();
+        BUG_ON(current->mm);
         enter_lazy_tlb(&init_mm, current);
 }
 
@@ -217,7 +225,7 @@ static void __init conmode_default(void)
         }
 }
 
-#if defined(CONFIG_ZFCPDUMP) || defined(CONFIG_ZFCPDUMP_MODULE)
+#ifdef CONFIG_ZFCPDUMP
 static void __init setup_zfcpdump(unsigned int console_devno)
 {
         static char str[41];
@@ -289,11 +297,7 @@ static int __init early_parse_mem(char *p)
 early_param("mem", early_parse_mem);
 
 #ifdef CONFIG_S390_SWITCH_AMODE
-#ifdef CONFIG_PGSTE
-unsigned int switch_amode = 1;
-#else
 unsigned int switch_amode = 0;
-#endif
 EXPORT_SYMBOL_GPL(switch_amode);
 
 static int set_amode_and_uaccess(unsigned long user_amode,
@@ -414,7 +418,6 @@ setup_lowcore(void)
                 PSW_ADDR_AMODE | (unsigned long) mcck_int_handler;
         lc->io_new_psw.mask = psw_kernel_bits;
         lc->io_new_psw.addr = PSW_ADDR_AMODE | (unsigned long) io_int_handler;
-        lc->ipl_device = S390_lowcore.ipl_device;
         lc->clock_comparator = -1ULL;
         lc->kernel_stack = ((unsigned long) &init_thread_union) + THREAD_SIZE;
         lc->async_stack = (unsigned long)
@@ -434,6 +437,7 @@ setup_lowcore(void)
         lc->vdso_per_cpu_data = (unsigned long) &lc->paste[0];
 #endif
         set_prefix((u32)(unsigned long) lc);
+        lowcore_ptr[0] = lc;
 }
 
 static void __init
@@ -510,7 +514,7 @@ static void __init setup_memory_end(void)
         unsigned long max_mem;
         int i;
 
-#if defined(CONFIG_ZFCPDUMP) || defined(CONFIG_ZFCPDUMP_MODULE)
+#ifdef CONFIG_ZFCPDUMP
         if (ipl_info.type == IPL_TYPE_FCP_DUMP) {
                 memory_end = ZFCPDUMP_HSA_SIZE;
                 memory_end_set = 1;
@@ -677,7 +681,6 @@ setup_memory(void)
 static void __init setup_hwcaps(void)
 {
         static const int stfl_bits[6] = { 0, 2, 7, 17, 19, 21 };
-        struct cpuinfo_S390 *cpuinfo = &S390_lowcore.cpu_data;
         unsigned long long facility_list_extended;
         unsigned int facility_list;
         int i;
@@ -693,15 +696,22 @@ static void __init setup_hwcaps(void)
          *   Bit 17: the message-security assist is installed
          *   Bit 19: the long-displacement facility is installed
          *   Bit 21: the extended-immediate facility is installed
+         *   Bit 22: extended-translation facility 3 is installed
+         *   Bit 30: extended-translation facility 3 enhancement facility
          * These get translated to:
          *   HWCAP_S390_ESAN3 bit 0, HWCAP_S390_ZARCH bit 1,
          *   HWCAP_S390_STFLE bit 2, HWCAP_S390_MSA bit 3,
-         *   HWCAP_S390_LDISP bit 4, and HWCAP_S390_EIMM bit 5.
+         *   HWCAP_S390_LDISP bit 4, HWCAP_S390_EIMM bit 5 and
+         *   HWCAP_S390_ETF3EH bit 8 (22 && 30).
          */
         for (i = 0; i < 6; i++)
                 if (facility_list & (1UL << (31 - stfl_bits[i])))
                         elf_hwcap |= 1UL << i;
 
+        if ((facility_list & (1UL << (31 - 22)))
+            && (facility_list & (1UL << (31 - 30))))
+                elf_hwcap |= 1UL << 8;
+
         /*
          * Check for additional facilities with store-facility-list-extended.
          * stfle stores doublewords (8 byte) with bit 1ULL<<63 as bit 0
@@ -710,20 +720,22 @@ static void __init setup_hwcaps(void)
          * How many facility words are stored depends on the number of
          * doublewords passed to the instruction. The additional facilites
          * are:
-         *   Bit 43: decimal floating point facility is installed
+         *   Bit 42: decimal floating point facility is installed
+         *   Bit 44: perform floating point operation facility is installed
          * translated to:
-         *   HWCAP_S390_DFP bit 6.
+         *   HWCAP_S390_DFP bit 6 (42 && 44).
          */
         if ((elf_hwcap & (1UL << 2)) &&
             __stfle(&facility_list_extended, 1) > 0) {
-                if (facility_list_extended & (1ULL << (64 - 43)))
+                if ((facility_list_extended & (1ULL << (63 - 42)))
+                    && (facility_list_extended & (1ULL << (63 - 44))))
                         elf_hwcap |= 1UL << 6;
         }
 
         if (MACHINE_HAS_HPAGE)
                 elf_hwcap |= 1UL << 7;
 
-        switch (cpuinfo->cpu_id.machine) {
+        switch (S390_lowcore.cpu_id.machine) {
         case 0x9672:
 #if !defined(CONFIG_64BIT)
         default:        /* Use "g5" as default for 31 bit kernels. */
@@ -816,7 +828,7 @@ setup_arch(char **cmdline_p)
         setup_lowcore();
 
         cpu_init();
-        __cpu_logical_map[0] = S390_lowcore.cpu_data.cpu_addr;
+        __cpu_logical_map[0] = stap();
         s390_init_cpu_topology();
 
         /*
diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c
index 2d337cbb9329..006ed5016eb4 100644
--- a/arch/s390/kernel/smp.c
+++ b/arch/s390/kernel/smp.c
@@ -32,6 +32,7 @@
 #include <linux/delay.h>
 #include <linux/cache.h>
 #include <linux/interrupt.h>
+#include <linux/irqflags.h>
 #include <linux/cpu.h>
 #include <linux/timex.h>
 #include <linux/bootmem.h>
@@ -50,12 +51,6 @@
 #include <asm/vdso.h>
 #include "entry.h"
 
-/*
- * An array with a pointer the lowcore of every CPU.
- */
-struct _lowcore *lowcore_ptr[NR_CPUS];
-EXPORT_SYMBOL(lowcore_ptr);
-
 static struct task_struct *current_set[NR_CPUS];
 
 static u8 smp_cpu_type;
@@ -81,9 +76,7 @@ void smp_send_stop(void)
 
         /* Disable all interrupts/machine checks */
         __load_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK);
-
-        /* write magic number to zero page (absolute 0) */
-        lowcore_ptr[smp_processor_id()]->panic_magic = __PANIC_MAGIC;
+        trace_hardirqs_off();
 
         /* stop all processors */
         for_each_online_cpu(cpu) {
@@ -233,7 +226,7 @@ EXPORT_SYMBOL(smp_ctl_clear_bit);
  */
 #define CPU_INIT_NO     1
 
-#if defined(CONFIG_ZFCPDUMP) || defined(CONFIG_ZFCPDUMP_MODULE)
+#ifdef CONFIG_ZFCPDUMP
 
 /*
  * zfcpdump_prefix_array holds prefix registers for the following scenario:
@@ -274,7 +267,7 @@ EXPORT_SYMBOL_GPL(zfcpdump_save_areas);
 
 static inline void smp_get_save_area(unsigned int cpu, unsigned int phy_cpu) { }
 
-#endif /* CONFIG_ZFCPDUMP || CONFIG_ZFCPDUMP_MODULE */
+#endif /* CONFIG_ZFCPDUMP */
 
 static int cpu_stopped(int cpu)
 {
@@ -304,8 +297,8 @@ static int smp_rescan_cpus_sigp(cpumask_t avail)
 {
         int cpu_id, logical_cpu;
 
-        logical_cpu = first_cpu(avail);
-        if (logical_cpu == NR_CPUS)
+        logical_cpu = cpumask_first(&avail);
+        if (logical_cpu >= nr_cpu_ids)
                 return 0;
         for (cpu_id = 0; cpu_id <= 65535; cpu_id++) {
                 if (cpu_known(cpu_id))
@@ -316,8 +309,8 @@ static int smp_rescan_cpus_sigp(cpumask_t avail)
                         continue;
                 cpu_set(logical_cpu, cpu_present_map);
                 smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED;
-                logical_cpu = next_cpu(logical_cpu, avail);
-                if (logical_cpu == NR_CPUS)
+                logical_cpu = cpumask_next(logical_cpu, &avail);
+                if (logical_cpu >= nr_cpu_ids)
                         break;
         }
         return 0;
@@ -329,8 +322,8 @@ static int smp_rescan_cpus_sclp(cpumask_t avail)
         int cpu_id, logical_cpu, cpu;
         int rc;
 
-        logical_cpu = first_cpu(avail);
-        if (logical_cpu == NR_CPUS)
+        logical_cpu = cpumask_first(&avail);
+        if (logical_cpu >= nr_cpu_ids)
                 return 0;
         info = kmalloc(sizeof(*info), GFP_KERNEL);
         if (!info)
@@ -351,8 +344,8 @@ static int smp_rescan_cpus_sclp(cpumask_t avail)
                         smp_cpu_state[logical_cpu] = CPU_STATE_STANDBY;
                 else
                         smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED;
-                logical_cpu = next_cpu(logical_cpu, avail);
-                if (logical_cpu == NR_CPUS)
+                logical_cpu = cpumask_next(logical_cpu, &avail);
+                if (logical_cpu >= nr_cpu_ids)
                         break;
         }
 out:
@@ -379,7 +372,7 @@ static void __init smp_detect_cpus(void)
 
         c_cpus = 1;
         s_cpus = 0;
-        boot_cpu_addr = S390_lowcore.cpu_data.cpu_addr;
+        boot_cpu_addr = __cpu_logical_map[0];
         info = kmalloc(sizeof(*info), GFP_KERNEL);
         if (!info)
                 panic("smp_detect_cpus failed to allocate memory\n");
@@ -453,7 +446,7 @@ int __cpuinit start_secondary(void *cpuvoid)
         /* Switch on interrupts */
         local_irq_enable();
         /* Print info about this processor */
-        print_cpu_info(&S390_lowcore.cpu_data);
+        print_cpu_info();
         /* cpu_idle will call schedule for us */
         cpu_idle();
         return 0;
@@ -515,7 +508,6 @@ out:
         return -ENOMEM;
 }
 
-#ifdef CONFIG_HOTPLUG_CPU
 static void smp_free_lowcore(int cpu)
 {
         struct _lowcore *lowcore;
@@ -534,7 +526,6 @@ static void smp_free_lowcore(int cpu)
         free_pages((unsigned long) lowcore, lc_order);
         lowcore_ptr[cpu] = NULL;
 }
-#endif /* CONFIG_HOTPLUG_CPU */
 
 /* Upping and downing of CPUs */
 int __cpuinit __cpu_up(unsigned int cpu)
@@ -543,16 +534,23 @@ int __cpuinit __cpu_up(unsigned int cpu)
         struct _lowcore *cpu_lowcore;
         struct stack_frame *sf;
         sigp_ccode ccode;
+        u32 lowcore;
 
         if (smp_cpu_state[cpu] != CPU_STATE_CONFIGURED)
                 return -EIO;
         if (smp_alloc_lowcore(cpu))
                 return -ENOMEM;
-
-        ccode = signal_processor_p((__u32)(unsigned long)(lowcore_ptr[cpu]),
-                                   cpu, sigp_set_prefix);
-        if (ccode)
-                return -EIO;
+        do {
+                ccode = signal_processor(cpu, sigp_initial_cpu_reset);
+                if (ccode == sigp_busy)
+                        udelay(10);
+                if (ccode == sigp_not_operational)
+                        goto err_out;
+        } while (ccode == sigp_busy);
+
+        lowcore = (u32)(unsigned long)lowcore_ptr[cpu];
+        while (signal_processor_p(lowcore, cpu, sigp_set_prefix) == sigp_busy)
+                udelay(10);
 
         idle = current_set[cpu];
         cpu_lowcore = lowcore_ptr[cpu];
@@ -571,9 +569,8 @@ int __cpuinit __cpu_up(unsigned int cpu)
                 : : "a" (&cpu_lowcore->access_regs_save_area) : "memory");
         cpu_lowcore->percpu_offset = __per_cpu_offset[cpu];
         cpu_lowcore->current_task = (unsigned long) idle;
-        cpu_lowcore->cpu_data.cpu_nr = cpu;
+        cpu_lowcore->cpu_nr = cpu;
         cpu_lowcore->kernel_asce = S390_lowcore.kernel_asce;
-        cpu_lowcore->ipl_device = S390_lowcore.ipl_device;
         eieio();
 
         while (signal_processor(cpu, sigp_restart) == sigp_busy)
@@ -582,6 +579,10 @@ int __cpuinit __cpu_up(unsigned int cpu)
         while (!cpu_online(cpu))
                 cpu_relax();
         return 0;
+
+err_out:
+        smp_free_lowcore(cpu);
+        return -EIO;
 }
 
 static int __init setup_possible_cpus(char *s)
@@ -589,9 +590,8 @@ static int __init setup_possible_cpus(char *s)
         int pcpus, cpu;
 
         pcpus = simple_strtoul(s, NULL, 0);
-        cpu_possible_map = cpumask_of_cpu(0);
-        for (cpu = 1; cpu < pcpus && cpu < NR_CPUS; cpu++)
-                cpu_set(cpu, cpu_possible_map);
+        for (cpu = 0; cpu < pcpus && cpu < nr_cpu_ids; cpu++)
+                set_cpu_possible(cpu, true);
         return 0;
 }
 early_param("possible_cpus", setup_possible_cpus);
@@ -663,7 +663,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
         /* request the 0x1201 emergency signal external interrupt */
         if (register_external_interrupt(0x1201, do_ext_call_interrupt) != 0)
                 panic("Couldn't request external interrupt 0x1201");
-        print_cpu_info(&S390_lowcore.cpu_data);
+        print_cpu_info();
 
         /* Reallocate current lowcore, but keep its contents. */
         lc_order = sizeof(long) == 8 ? 1 : 0;
diff --git a/arch/s390/kernel/sysinfo.c b/arch/s390/kernel/sysinfo.c
new file mode 100644
index 000000000000..b5e75e1061c8
--- /dev/null
+++ b/arch/s390/kernel/sysinfo.c
@@ -0,0 +1,428 @@
+/*
+ *  Copyright IBM Corp. 2001, 2009
+ *  Author(s): Ulrich Weigand <Ulrich.Weigand@de.ibm.com>,
+ *             Martin Schwidefsky <schwidefsky@de.ibm.com>,
+ */
+
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/proc_fs.h>
+#include <linux/seq_file.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/module.h>
+#include <asm/ebcdic.h>
+#include <asm/sysinfo.h>
+#include <asm/cpcmd.h>
+
+/* Sigh, math-emu. Don't ask. */
+#include <asm/sfp-util.h>
+#include <math-emu/soft-fp.h>
+#include <math-emu/single.h>
+
+static inline int stsi_0(void)
+{
+        int rc = stsi(NULL, 0, 0, 0);
+        return rc == -ENOSYS ? rc : (((unsigned int) rc) >> 28);
+}
+
+static int stsi_1_1_1(struct sysinfo_1_1_1 *info, char *page, int len)
+{
+        if (stsi(info, 1, 1, 1) == -ENOSYS)
+                return len;
+
+        EBCASC(info->manufacturer, sizeof(info->manufacturer));
+        EBCASC(info->type, sizeof(info->type));
+        EBCASC(info->model, sizeof(info->model));
+        EBCASC(info->sequence, sizeof(info->sequence));
+        EBCASC(info->plant, sizeof(info->plant));
+        EBCASC(info->model_capacity, sizeof(info->model_capacity));
+        EBCASC(info->model_perm_cap, sizeof(info->model_perm_cap));
+        EBCASC(info->model_temp_cap, sizeof(info->model_temp_cap));
+        len += sprintf(page + len, "Manufacturer:         %-16.16s\n",
+                       info->manufacturer);
+        len += sprintf(page + len, "Type:                 %-4.4s\n",
+                       info->type);
+        if (info->model[0] != '\0')
+                /*
+                 * Sigh: the model field has been renamed with System z9
+                 * to model_capacity and a new model field has been added
+                 * after the plant field. To avoid confusing older programs
+                 * the "Model:" prints "model_capacity model" or just
+                 * "model_capacity" if the model string is empty .
+                 */
+                len += sprintf(page + len,
+                               "Model:                %-16.16s %-16.16s\n",
+                               info->model_capacity, info->model);
+        else
+                len += sprintf(page + len, "Model:                %-16.16s\n",
+                               info->model_capacity);
+        len += sprintf(page + len, "Sequence Code:        %-16.16s\n",
+                       info->sequence);
+        len += sprintf(page + len, "Plant:                %-4.4s\n",
+                       info->plant);
+        len += sprintf(page + len, "Model Capacity:       %-16.16s %08u\n",
+                       info->model_capacity, *(u32 *) info->model_cap_rating);
+        if (info->model_perm_cap[0] != '\0')
+                len += sprintf(page + len,
+                               "Model Perm. Capacity: %-16.16s %08u\n",
+                               info->model_perm_cap,
+                               *(u32 *) info->model_perm_cap_rating);
+        if (info->model_temp_cap[0] != '\0')
+                len += sprintf(page + len,
+                               "Model Temp. Capacity: %-16.16s %08u\n",
+                               info->model_temp_cap,
+                               *(u32 *) info->model_temp_cap_rating);
+        return len;
+}
+
+static int stsi_1_2_2(struct sysinfo_1_2_2 *info, char *page, int len)
+{
+        struct sysinfo_1_2_2_extension *ext;
+        int i;
+
+        if (stsi(info, 1, 2, 2) == -ENOSYS)
+                return len;
+        ext = (struct sysinfo_1_2_2_extension *)
+                ((unsigned long) info + info->acc_offset);
+
+        len += sprintf(page + len, "\n");
+        len += sprintf(page + len, "CPUs Total:           %d\n",
+                       info->cpus_total);
+        len += sprintf(page + len, "CPUs Configured:      %d\n",
+                       info->cpus_configured);
+        len += sprintf(page + len, "CPUs Standby:         %d\n",
+                       info->cpus_standby);
+        len += sprintf(page + len, "CPUs Reserved:        %d\n",
+                       info->cpus_reserved);
+
+        if (info->format == 1) {
+                /*
+                 * Sigh 2. According to the specification the alternate
+                 * capability field is a 32 bit floating point number
+                 * if the higher order 8 bits are not zero. Printing
+                 * a floating point number in the kernel is a no-no,
+                 * always print the number as 32 bit unsigned integer.
+                 * The user-space needs to know about the strange
+                 * encoding of the alternate cpu capability.
+                 */
+                len += sprintf(page + len, "Capability:           %u %u\n",
+                               info->capability, ext->alt_capability);
+                for (i = 2; i <= info->cpus_total; i++)
+                        len += sprintf(page + len,
+                                       "Adjustment %02d-way:    %u %u\n",
+                                       i, info->adjustment[i-2],
+                                       ext->alt_adjustment[i-2]);
+
+        } else {
+                len += sprintf(page + len, "Capability:           %u\n",
+                               info->capability);
+                for (i = 2; i <= info->cpus_total; i++)
+                        len += sprintf(page + len,
+                                       "Adjustment %02d-way:    %u\n",
+                                       i, info->adjustment[i-2]);
+        }
+
+        if (info->secondary_capability != 0)
+                len += sprintf(page + len, "Secondary Capability: %d\n",
+                               info->secondary_capability);
+        return len;
+}
+
+static int stsi_2_2_2(struct sysinfo_2_2_2 *info, char *page, int len)
+{
+        if (stsi(info, 2, 2, 2) == -ENOSYS)
+                return len;
+
+        EBCASC(info->name, sizeof(info->name));
+
+        len += sprintf(page + len, "\n");
+        len += sprintf(page + len, "LPAR Number:          %d\n",
+                       info->lpar_number);
+
+        len += sprintf(page + len, "LPAR Characteristics: ");
+        if (info->characteristics & LPAR_CHAR_DEDICATED)
+                len += sprintf(page + len, "Dedicated ");
+        if (info->characteristics & LPAR_CHAR_SHARED)
+                len += sprintf(page + len, "Shared ");
+        if (info->characteristics & LPAR_CHAR_LIMITED)
+                len += sprintf(page + len, "Limited ");
+        len += sprintf(page + len, "\n");
+
+        len += sprintf(page + len, "LPAR Name:            %-8.8s\n",
+                       info->name);
+
+        len += sprintf(page + len, "LPAR Adjustment:      %d\n",
+                       info->caf);
+
+        len += sprintf(page + len, "LPAR CPUs Total:      %d\n",
+                       info->cpus_total);
+        len += sprintf(page + len, "LPAR CPUs Configured: %d\n",
+                       info->cpus_configured);
+        len += sprintf(page + len, "LPAR CPUs Standby:    %d\n",
+                       info->cpus_standby);
+        len += sprintf(page + len, "LPAR CPUs Reserved:   %d\n",
+                       info->cpus_reserved);
+        len += sprintf(page + len, "LPAR CPUs Dedicated:  %d\n",
+                       info->cpus_dedicated);
+        len += sprintf(page + len, "LPAR CPUs Shared:     %d\n",
+                       info->cpus_shared);
+        return len;
+}
+
+static int stsi_3_2_2(struct sysinfo_3_2_2 *info, char *page, int len)
+{
+        int i;
+
+        if (stsi(info, 3, 2, 2) == -ENOSYS)
+                return len;
+        for (i = 0; i < info->count; i++) {
+                EBCASC(info->vm[i].name, sizeof(info->vm[i].name));
+                EBCASC(info->vm[i].cpi, sizeof(info->vm[i].cpi));
+                len += sprintf(page + len, "\n");
+                len += sprintf(page + len, "VM%02d Name:            %-8.8s\n",
+                               i, info->vm[i].name);
+                len += sprintf(page + len, "VM%02d Control Program: %-16.16s\n",
+                               i, info->vm[i].cpi);
+
+                len += sprintf(page + len, "VM%02d Adjustment:      %d\n",
+                               i, info->vm[i].caf);
+
+                len += sprintf(page + len, "VM%02d CPUs Total:      %d\n",
+                               i, info->vm[i].cpus_total);
+                len += sprintf(page + len, "VM%02d CPUs Configured: %d\n",
+                               i, info->vm[i].cpus_configured);
+                len += sprintf(page + len, "VM%02d CPUs Standby:    %d\n",
+                               i, info->vm[i].cpus_standby);
+                len += sprintf(page + len, "VM%02d CPUs Reserved:   %d\n",
+                               i, info->vm[i].cpus_reserved);
+        }
+        return len;
+}
+
+static int proc_read_sysinfo(char *page, char **start,
+                             off_t off, int count,
+                             int *eof, void *data)
+{
+        unsigned long info = get_zeroed_page(GFP_KERNEL);
+        int level, len;
+
+        if (!info)
+                return 0;
+
+        len = 0;
+        level = stsi_0();
+        if (level >= 1)
+                len = stsi_1_1_1((struct sysinfo_1_1_1 *) info, page, len);
+
+        if (level >= 1)
+                len = stsi_1_2_2((struct sysinfo_1_2_2 *) info, page, len);
+
+        if (level >= 2)
+                len = stsi_2_2_2((struct sysinfo_2_2_2 *) info, page, len);
+
+        if (level >= 3)
+                len = stsi_3_2_2((struct sysinfo_3_2_2 *) info, page, len);
+
+        free_page(info);
+        return len;
+}
+
+static __init int create_proc_sysinfo(void)
+{
+        create_proc_read_entry("sysinfo", 0444, NULL,
+                               proc_read_sysinfo, NULL);
+        return 0;
+}
+device_initcall(create_proc_sysinfo);
+
+/*
+ * Service levels interface.
+ */
+
+static DECLARE_RWSEM(service_level_sem);
+static LIST_HEAD(service_level_list);
+
+int register_service_level(struct service_level *slr)
+{
+        struct service_level *ptr;
+
+        down_write(&service_level_sem);
+        list_for_each_entry(ptr, &service_level_list, list)
+                if (ptr == slr) {
+                        up_write(&service_level_sem);
+                        return -EEXIST;
+                }
+        list_add_tail(&slr->list, &service_level_list);
+        up_write(&service_level_sem);
+        return 0;
+}
+EXPORT_SYMBOL(register_service_level);
+
+int unregister_service_level(struct service_level *slr)
+{
+        struct service_level *ptr, *next;
+        int rc = -ENOENT;
+
+        down_write(&service_level_sem);
+        list_for_each_entry_safe(ptr, next, &service_level_list, list) {
+                if (ptr != slr)
+                        continue;
+                list_del(&ptr->list);
+                rc = 0;
+                break;
+        }
+        up_write(&service_level_sem);
+        return rc;
+}
+EXPORT_SYMBOL(unregister_service_level);
+
+static void *service_level_start(struct seq_file *m, loff_t *pos)
+{
+        down_read(&service_level_sem);
+        return seq_list_start(&service_level_list, *pos);
+}
+
+static void *service_level_next(struct seq_file *m, void *p, loff_t *pos)
+{
+        return seq_list_next(p, &service_level_list, pos);
+}
+
+static void service_level_stop(struct seq_file *m, void *p)
+{
+        up_read(&service_level_sem);
+}
+
+static int service_level_show(struct seq_file *m, void *p)
+{
+        struct service_level *slr;
+
+        slr = list_entry(p, struct service_level, list);
+        slr->seq_print(m, slr);
+        return 0;
+}
+
+static const struct seq_operations service_level_seq_ops = {
+        .start          = service_level_start,
+        .next           = service_level_next,
+        .stop           = service_level_stop,
+        .show           = service_level_show
+};
+
+static int service_level_open(struct inode *inode, struct file *file)
+{
+        return seq_open(file, &service_level_seq_ops);
+}
+
+static const struct file_operations service_level_ops = {
+        .open           = service_level_open,
+        .read           = seq_read,
+        .llseek         = seq_lseek,
+        .release        = seq_release
+};
+
+static void service_level_vm_print(struct seq_file *m,
+                                   struct service_level *slr)
+{
+        char *query_buffer, *str;
+
+        query_buffer = kmalloc(1024, GFP_KERNEL | GFP_DMA);
+        if (!query_buffer)
+                return;
+        cpcmd("QUERY CPLEVEL", query_buffer, 1024, NULL);
+        str = strchr(query_buffer, '\n');
+        if (str)
+                *str = 0;
+        seq_printf(m, "VM: %s\n", query_buffer);
+        kfree(query_buffer);
+}
+
+static struct service_level service_level_vm = {
+        .seq_print = service_level_vm_print
+};
+
+static __init int create_proc_service_level(void)
+{
+        proc_create("service_levels", 0, NULL, &service_level_ops);
+        if (MACHINE_IS_VM)
+                register_service_level(&service_level_vm);
+        return 0;
+}
+subsys_initcall(create_proc_service_level);
+
+/*
+ * Bogomips calculation based on cpu capability.
+ */
+int get_cpu_capability(unsigned int *capability)
+{
+        struct sysinfo_1_2_2 *info;
+        int rc;
+
+        info = (void *) get_zeroed_page(GFP_KERNEL);
+        if (!info)
+                return -ENOMEM;
+        rc = stsi(info, 1, 2, 2);
+        if (rc == -ENOSYS)
+                goto out;
+        rc = 0;
+        *capability = info->capability;
+out:
+        free_page((unsigned long) info);
+        return rc;
+}
+
+/*
+ * CPU capability might have changed. Therefore recalculate loops_per_jiffy.
+ */
+void s390_adjust_jiffies(void)
+{
+        struct sysinfo_1_2_2 *info;
+        const unsigned int fmil = 0x4b189680;   /* 1e7 as 32-bit float. */
+        FP_DECL_S(SA); FP_DECL_S(SB); FP_DECL_S(SR);
+        FP_DECL_EX;
+        unsigned int capability;
+
+        info = (void *) get_zeroed_page(GFP_KERNEL);
+        if (!info)
+                return;
+
+        if (stsi(info, 1, 2, 2) != -ENOSYS) {
+                /*
+                 * Major sigh. The cpu capability encoding is "special".
+                 * If the first 9 bits of info->capability are 0 then it
+                 * is a 32 bit unsigned integer in the range 0 .. 2^23.
+                 * If the first 9 bits are != 0 then it is a 32 bit float.
+                 * In addition a lower value indicates a proportionally
+                 * higher cpu capacity. Bogomips are the other way round.
+                 * To get to a halfway suitable number we divide 1e7
+                 * by the cpu capability number. Yes, that means a floating
+                 * point division .. math-emu here we come :-)
+                 */
+                FP_UNPACK_SP(SA, &fmil);
+                if ((info->capability >> 23) == 0)
+                        FP_FROM_INT_S(SB, info->capability, 32, int);
+                else
+                        FP_UNPACK_SP(SB, &info->capability);
+                FP_DIV_S(SR, SA, SB);
+                FP_TO_INT_S(capability, SR, 32, 0);
+        } else
+                /*
+                 * Really old machine without stsi block for basic
+                 * cpu information. Report 42.0 bogomips.
+                 */
+                capability = 42;
+        loops_per_jiffy = capability * (500000/HZ);
+        free_page((unsigned long) info);
+}
+
+/*
+ * calibrate the delay loop
+ */
+void __cpuinit calibrate_delay(void)
+{
+        s390_adjust_jiffies();
+        /* Print the good old Bogomips line .. */
+        printk(KERN_DEBUG "Calibrating delay loop (skipped)... "
+               "%lu.%02lu BogoMIPS preset\n", loops_per_jiffy/(500000/HZ),
+               (loops_per_jiffy/(5000/HZ)) % 100);
+}
diff --git a/arch/s390/kernel/time.c b/arch/s390/kernel/time.c
index fc468cae4460..f72d41068dc2 100644
--- a/arch/s390/kernel/time.c
+++ b/arch/s390/kernel/time.c
@@ -331,6 +331,7 @@ static unsigned long long adjust_time(unsigned long long old,
 }
 
 static DEFINE_PER_CPU(atomic_t, clock_sync_word);
+static DEFINE_MUTEX(clock_sync_mutex);
 static unsigned long clock_sync_flags;
 
 #define CLOCK_SYNC_HAS_ETR      0
@@ -394,6 +395,20 @@ static void enable_sync_clock(void)
         atomic_set_mask(0x80000000, sw_ptr);
 }
 
+/*
+ * Function to check if the clock is in sync.
+ */
+static inline int check_sync_clock(void)
+{
+        atomic_t *sw_ptr;
+        int rc;
+
+        sw_ptr = &get_cpu_var(clock_sync_word);
+        rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
+        put_cpu_var(clock_sync_sync);
+        return rc;
+}
+
 /* Single threaded workqueue used for etr and stp sync events */
 static struct workqueue_struct *time_sync_wq;
 
@@ -485,6 +500,8 @@ static void etr_reset(void)
         if (etr_setr(&etr_eacr) == 0) {
                 etr_tolec = get_clock();
                 set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
+                if (etr_port0_online && etr_port1_online)
+                        set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
         } else if (etr_port0_online || etr_port1_online) {
                 pr_warning("The real or virtual hardware system does "
                            "not provide an ETR interface\n");
@@ -533,8 +550,7 @@ void etr_switch_to_local(void)
 {
         if (!etr_eacr.sl)
                 return;
-        if (test_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
-                disable_sync_clock(NULL);
+        disable_sync_clock(NULL);
         set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events);
         queue_work(time_sync_wq, &etr_work);
 }
@@ -549,8 +565,7 @@ void etr_sync_check(void)
 {
         if (!etr_eacr.es)
                 return;
-        if (test_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
-                disable_sync_clock(NULL);
+        disable_sync_clock(NULL);
         set_bit(ETR_EVENT_SYNC_CHECK, &etr_events);
         queue_work(time_sync_wq, &etr_work);
 }
@@ -914,7 +929,7 @@ static struct etr_eacr etr_handle_update(struct etr_aib *aib,
          * Do not try to get the alternate port aib if the clock
          * is not in sync yet.
          */
-        if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags) && !eacr.es)
+        if (!check_sync_clock())
                 return eacr;
 
         /*
@@ -997,7 +1012,6 @@ static void etr_work_fn(struct work_struct *work)
                 on_each_cpu(disable_sync_clock, NULL, 1);
                 del_timer_sync(&etr_timer);
                 etr_update_eacr(eacr);
-                clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
                 goto out_unlock;
         }
 
@@ -1071,18 +1085,13 @@ static void etr_work_fn(struct work_struct *work)
                 /* Both ports not usable. */
                 eacr.es = eacr.sl = 0;
                 sync_port = -1;
-                clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
         }
 
-        if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
-                eacr.es = 0;
-
         /*
          * If the clock is in sync just update the eacr and return.
          * If there is no valid sync port wait for a port update.
          */
-        if (test_bit(CLOCK_SYNC_STP, &clock_sync_flags) ||
-            eacr.es || sync_port < 0) {
+        if (check_sync_clock() || sync_port < 0) {
                 etr_update_eacr(eacr);
                 etr_set_tolec_timeout(now);
                 goto out_unlock;
@@ -1103,13 +1112,11 @@ static void etr_work_fn(struct work_struct *work)
          * and set up a timer to try again after 0.5 seconds
          */
         etr_update_eacr(eacr);
-        set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
         if (now < etr_tolec + (1600000 << 12) ||
             etr_sync_clock_stop(&aib, sync_port) != 0) {
                 /* Sync failed. Try again in 1/2 second. */
                 eacr.es = 0;
                 etr_update_eacr(eacr);
-                clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
                 etr_set_sync_timeout();
         } else
                 etr_set_tolec_timeout(now);
@@ -1191,19 +1198,30 @@ static ssize_t etr_online_store(struct sys_device *dev,
                 return -EINVAL;
         if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
                 return -EOPNOTSUPP;
+        mutex_lock(&clock_sync_mutex);
         if (dev == &etr_port0_dev) {
                 if (etr_port0_online == value)
-                        return count;   /* Nothing to do. */
+                        goto out;       /* Nothing to do. */
                 etr_port0_online = value;
+                if (etr_port0_online && etr_port1_online)
+                        set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
+                else
+                        clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
                 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
                 queue_work(time_sync_wq, &etr_work);
         } else {
                 if (etr_port1_online == value)
-                        return count;   /* Nothing to do. */
+                        goto out;       /* Nothing to do. */
                 etr_port1_online = value;
+                if (etr_port0_online && etr_port1_online)
+                        set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
+                else
+                        clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
                 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
                 queue_work(time_sync_wq, &etr_work);
         }
+out:
+        mutex_unlock(&clock_sync_mutex);
         return count;
 }
 
@@ -1471,8 +1489,6 @@ static void stp_timing_alert(struct stp_irq_parm *intparm)
  */
 void stp_sync_check(void)
 {
-        if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
-                return;
         disable_sync_clock(NULL);
         queue_work(time_sync_wq, &stp_work);
 }
@@ -1485,8 +1501,6 @@ void stp_sync_check(void)
  */
 void stp_island_check(void)
 {
-        if (!test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
-                return;
         disable_sync_clock(NULL);
         queue_work(time_sync_wq, &stp_work);
 }
@@ -1513,10 +1527,6 @@ static int stp_sync_clock(void *data)
 
         enable_sync_clock();
 
-        set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
-        if (test_and_clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags))
-                queue_work(time_sync_wq, &etr_work);
-
         rc = 0;
         if (stp_info.todoff[0] || stp_info.todoff[1] ||
             stp_info.todoff[2] || stp_info.todoff[3] ||
@@ -1535,9 +1545,6 @@ static int stp_sync_clock(void *data)
         if (rc) {
                 disable_sync_clock(NULL);
                 stp_sync->in_sync = -EAGAIN;
-                clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
-                if (etr_port0_online || etr_port1_online)
-                        queue_work(time_sync_wq, &etr_work);
         } else
                 stp_sync->in_sync = 1;
         xchg(&first, 0);
@@ -1569,6 +1576,10 @@ static void stp_work_fn(struct work_struct *work)
         if (rc || stp_info.c == 0)
                 goto out_unlock;
 
+        /* Skip synchronization if the clock is already in sync. */
+        if (check_sync_clock())
+                goto out_unlock;
+
         memset(&stp_sync, 0, sizeof(stp_sync));
         get_online_cpus();
         atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
@@ -1684,8 +1695,14 @@ static ssize_t stp_online_store(struct sysdev_class *class,
                 return -EINVAL;
         if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
                 return -EOPNOTSUPP;
+        mutex_lock(&clock_sync_mutex);
         stp_online = value;
+        if (stp_online)
+                set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
+        else
+                clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
         queue_work(time_sync_wq, &stp_work);
+        mutex_unlock(&clock_sync_mutex);
         return count;
 }
 
diff --git a/arch/s390/kernel/topology.c b/arch/s390/kernel/topology.c
index cc362c9ea8f1..3c72c9cf22b6 100644
--- a/arch/s390/kernel/topology.c
+++ b/arch/s390/kernel/topology.c
@@ -74,7 +74,7 @@ static DEFINE_SPINLOCK(topology_lock);
 
 cpumask_t cpu_core_map[NR_CPUS];
 
-cpumask_t cpu_coregroup_map(unsigned int cpu)
+static cpumask_t cpu_coregroup_map(unsigned int cpu)
 {
         struct core_info *core = &core_info;
         unsigned long flags;
diff --git a/arch/s390/kernel/traps.c b/arch/s390/kernel/traps.c
index 4584d81984c0..c2e42cc65ce7 100644
--- a/arch/s390/kernel/traps.c
+++ b/arch/s390/kernel/traps.c
@@ -61,9 +61,11 @@ extern pgm_check_handler_t do_asce_exception;
 #define stack_pointer ({ void **sp; asm("la %0,0(15)" : "=&d" (sp)); sp; })
 
 #ifndef CONFIG_64BIT
+#define LONG "%08lx "
 #define FOURLONG "%08lx %08lx %08lx %08lx\n"
 static int kstack_depth_to_print = 12;
 #else /* CONFIG_64BIT */
+#define LONG "%016lx "
 #define FOURLONG "%016lx %016lx %016lx %016lx\n"
 static int kstack_depth_to_print = 20;
 #endif /* CONFIG_64BIT */
@@ -155,7 +157,7 @@ void show_stack(struct task_struct *task, unsigned long *sp)
                         break;
                 if (i && ((i * sizeof (long) % 32) == 0))
                         printk("\n       ");
-                printk("%p ", (void *)*stack++);
+                printk(LONG, *stack++);
         }
         printk("\n");
         show_trace(task, sp);
diff --git a/arch/s390/kernel/vdso.c b/arch/s390/kernel/vdso.c
index 690e17819686..89b2e7f1b7a9 100644
--- a/arch/s390/kernel/vdso.c
+++ b/arch/s390/kernel/vdso.c
@@ -144,7 +144,6 @@ out:
         return -ENOMEM;
 }
 
-#ifdef CONFIG_HOTPLUG_CPU
 void vdso_free_per_cpu(int cpu, struct _lowcore *lowcore)
 {
         unsigned long segment_table, page_table, page_frame;
@@ -163,7 +162,6 @@ void vdso_free_per_cpu(int cpu, struct _lowcore *lowcore)
         free_page(page_table);
         free_pages(segment_table, SEGMENT_ORDER);
 }
-#endif /* CONFIG_HOTPLUG_CPU */
 
 static void __vdso_init_cr5(void *dummy)
 {
diff --git a/arch/s390/kernel/vmlinux.lds.S b/arch/s390/kernel/vmlinux.lds.S
index d796d05c9c01..7a2063eb88f0 100644
--- a/arch/s390/kernel/vmlinux.lds.S
+++ b/arch/s390/kernel/vmlinux.lds.S
@@ -108,6 +108,8 @@ SECTIONS
                 EXIT_TEXT
         }
 
+        /* early.c uses stsi, which requires page aligned data. */
+        . = ALIGN(PAGE_SIZE);
         .init.data : {
                 INIT_DATA
         }
diff --git a/arch/s390/kvm/Kconfig b/arch/s390/kvm/Kconfig
index e051cad1f1e0..3e260b7e37b2 100644
--- a/arch/s390/kvm/Kconfig
+++ b/arch/s390/kvm/Kconfig
@@ -4,6 +4,9 @@
 config HAVE_KVM
        bool
 
+config HAVE_KVM_IRQCHIP
+       bool
+
 menuconfig VIRTUALIZATION
         bool "Virtualization"
         default y
diff --git a/arch/s390/kvm/intercept.c b/arch/s390/kvm/intercept.c
index 61236102203e..9d19803111ba 100644
--- a/arch/s390/kvm/intercept.c
+++ b/arch/s390/kvm/intercept.c
@@ -103,7 +103,7 @@ static int handle_lctl(struct kvm_vcpu *vcpu)
 static intercept_handler_t instruction_handlers[256] = {
         [0x83] = kvm_s390_handle_diag,
         [0xae] = kvm_s390_handle_sigp,
-        [0xb2] = kvm_s390_handle_priv,
+        [0xb2] = kvm_s390_handle_b2,
         [0xb7] = handle_lctl,
         [0xeb] = handle_lctlg,
 };
diff --git a/arch/s390/kvm/interrupt.c b/arch/s390/kvm/interrupt.c
index f4fe28a2521a..0189356fe209 100644
--- a/arch/s390/kvm/interrupt.c
+++ b/arch/s390/kvm/interrupt.c
@@ -555,9 +555,14 @@ int kvm_s390_inject_vcpu(struct kvm_vcpu *vcpu,
                 VCPU_EVENT(vcpu, 3, "inject: program check %d (from user)",
                            s390int->parm);
                 break;
+        case KVM_S390_SIGP_SET_PREFIX:
+                inti->prefix.address = s390int->parm;
+                inti->type = s390int->type;
+                VCPU_EVENT(vcpu, 3, "inject: set prefix to %x (from user)",
+                           s390int->parm);
+                break;
         case KVM_S390_SIGP_STOP:
         case KVM_S390_RESTART:
-        case KVM_S390_SIGP_SET_PREFIX:
         case KVM_S390_INT_EMERGENCY:
                 VCPU_EVENT(vcpu, 3, "inject: type %x", s390int->type);
                 inti->type = s390int->type;
diff --git a/arch/s390/kvm/kvm-s390.c b/arch/s390/kvm/kvm-s390.c
index 0d33893e1e89..f4d56e9939c9 100644
--- a/arch/s390/kvm/kvm-s390.c
+++ b/arch/s390/kvm/kvm-s390.c
@@ -23,7 +23,7 @@
 #include <linux/timer.h>
 #include <asm/lowcore.h>
 #include <asm/pgtable.h>
-
+#include <asm/nmi.h>
 #include "kvm-s390.h"
 #include "gaccess.h"
 
@@ -286,7 +286,7 @@ int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
         setup_timer(&vcpu->arch.ckc_timer, kvm_s390_idle_wakeup,
                  (unsigned long) vcpu);
         get_cpu_id(&vcpu->arch.cpu_id);
-        vcpu->arch.cpu_id.version = 0xfe;
+        vcpu->arch.cpu_id.version = 0xff;
         return 0;
 }
 
@@ -422,8 +422,8 @@ int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
         return -EINVAL; /* not implemented yet */
 }
 
-int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
-                                    struct kvm_debug_guest *dbg)
+int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
+                                        struct kvm_guest_debug *dbg)
 {
         return -EINVAL; /* not implemented yet */
 }
@@ -440,8 +440,6 @@ int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
         return -EINVAL; /* not implemented yet */
 }
 
-extern void s390_handle_mcck(void);
-
 static void __vcpu_run(struct kvm_vcpu *vcpu)
 {
         memcpy(&vcpu->arch.sie_block->gg14, &vcpu->arch.guest_gprs[14], 16);
diff --git a/arch/s390/kvm/kvm-s390.h b/arch/s390/kvm/kvm-s390.h
index 3893cf12eacf..00bbe69b78da 100644
--- a/arch/s390/kvm/kvm-s390.h
+++ b/arch/s390/kvm/kvm-s390.h
@@ -50,7 +50,7 @@ int kvm_s390_inject_vcpu(struct kvm_vcpu *vcpu,
 int kvm_s390_inject_program_int(struct kvm_vcpu *vcpu, u16 code);
 
 /* implemented in priv.c */
-int kvm_s390_handle_priv(struct kvm_vcpu *vcpu);
+int kvm_s390_handle_b2(struct kvm_vcpu *vcpu);
 
 /* implemented in sigp.c */
 int kvm_s390_handle_sigp(struct kvm_vcpu *vcpu);
diff --git a/arch/s390/kvm/priv.c b/arch/s390/kvm/priv.c
index 3605df45dd41..4b88834b8dd8 100644
--- a/arch/s390/kvm/priv.c
+++ b/arch/s390/kvm/priv.c
@@ -304,12 +304,24 @@ static intercept_handler_t priv_handlers[256] = {
         [0xb1] = handle_stfl,
 };
 
-int kvm_s390_handle_priv(struct kvm_vcpu *vcpu)
+int kvm_s390_handle_b2(struct kvm_vcpu *vcpu)
 {
         intercept_handler_t handler;
 
+        /*
+         * a lot of B2 instructions are priviledged. We first check for
+         * the priviledges ones, that we can handle in the kernel. If the
+         * kernel can handle this instruction, we check for the problem
+         * state bit and (a) handle the instruction or (b) send a code 2
+         * program check.
+         * Anything else goes to userspace.*/
         handler = priv_handlers[vcpu->arch.sie_block->ipa & 0x00ff];
-        if (handler)
-                return handler(vcpu);
+        if (handler) {
+                if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
+                        return kvm_s390_inject_program_int(vcpu,
+                                                   PGM_PRIVILEGED_OPERATION);
+                else
+                        return handler(vcpu);
+        }
         return -ENOTSUPP;
 }
diff --git a/arch/s390/kvm/sigp.c b/arch/s390/kvm/sigp.c
index 2a01b9e02801..f27dbedf0866 100644
--- a/arch/s390/kvm/sigp.c
+++ b/arch/s390/kvm/sigp.c
@@ -153,8 +153,6 @@ static int __sigp_set_arch(struct kvm_vcpu *vcpu, u32 parameter)
 
         switch (parameter & 0xff) {
         case 0:
-                printk(KERN_WARNING "kvm: request to switch to ESA/390 mode"
-                                                        " not supported");
                 rc = 3; /* not operational */
                 break;
         case 1:
diff --git a/arch/s390/lib/delay.c b/arch/s390/lib/delay.c
index 6ccb9fab055a..3f5f680726ed 100644
--- a/arch/s390/lib/delay.c
+++ b/arch/s390/lib/delay.c
@@ -9,6 +9,7 @@
 #include <linux/sched.h>
 #include <linux/delay.h>
 #include <linux/timex.h>
+#include <linux/module.h>
 #include <linux/irqflags.h>
 #include <linux/interrupt.h>
 
@@ -92,6 +93,7 @@ out:
         local_irq_restore(flags);
         preempt_enable();
 }
+EXPORT_SYMBOL(__udelay);
 
 /*
  * Simple udelay variant. To be used on startup and reboot
diff --git a/arch/s390/lib/string.c b/arch/s390/lib/string.c
index ae5cf5d03d41..4143b7c19096 100644
--- a/arch/s390/lib/string.c
+++ b/arch/s390/lib/string.c
@@ -44,7 +44,11 @@ static inline char *__strnend(const char *s, size_t n)
  */
 size_t strlen(const char *s)
 {
+#if __GNUC__ < 4
         return __strend(s) - s;
+#else
+        return __builtin_strlen(s);
+#endif
 }
 EXPORT_SYMBOL(strlen);
 
@@ -70,6 +74,7 @@ EXPORT_SYMBOL(strnlen);
  */
 char *strcpy(char *dest, const char *src)
 {
+#if __GNUC__ < 4
         register int r0 asm("0") = 0;
         char *ret = dest;
 
@@ -78,6 +83,9 @@ char *strcpy(char *dest, const char *src)
                       : "+&a" (dest), "+&a" (src) : "d" (r0)
                       : "cc", "memory" );
         return ret;
+#else
+        return __builtin_strcpy(dest, src);
+#endif
 }
 EXPORT_SYMBOL(strcpy);
 
diff --git a/arch/s390/mm/fault.c b/arch/s390/mm/fault.c
index 4d537205e83c..833e8366c351 100644
--- a/arch/s390/mm/fault.c
+++ b/arch/s390/mm/fault.c
@@ -200,29 +200,6 @@ static void do_low_address(struct pt_regs *regs, unsigned long error_code)
         do_no_context(regs, error_code, 0);
 }
 
-/*
- * We ran out of memory, or some other thing happened to us that made
- * us unable to handle the page fault gracefully.
- */
-static int do_out_of_memory(struct pt_regs *regs, unsigned long error_code,
-                            unsigned long address)
-{
-        struct task_struct *tsk = current;
-        struct mm_struct *mm = tsk->mm;
-
-        up_read(&mm->mmap_sem);
-        if (is_global_init(tsk)) {
-                yield();
-                down_read(&mm->mmap_sem);
-                return 1;
-        }
-        printk("VM: killing process %s\n", tsk->comm);
-        if (regs->psw.mask & PSW_MASK_PSTATE)
-                do_group_exit(SIGKILL);
-        do_no_context(regs, error_code, address);
-        return 0;
-}
-
 static void do_sigbus(struct pt_regs *regs, unsigned long error_code,
                       unsigned long address)
 {
@@ -367,7 +344,6 @@ good_area:
                         goto bad_area;
         }
 
-survive:
         if (is_vm_hugetlb_page(vma))
                 address &= HPAGE_MASK;
         /*
@@ -378,8 +354,8 @@ survive:
         fault = handle_mm_fault(mm, vma, address, write);
         if (unlikely(fault & VM_FAULT_ERROR)) {
                 if (fault & VM_FAULT_OOM) {
-                        if (do_out_of_memory(regs, error_code, address))
-                                goto survive;
+                        up_read(&mm->mmap_sem);
+                        pagefault_out_of_memory();
                         return;
                 } else if (fault & VM_FAULT_SIGBUS) {
                         do_sigbus(regs, error_code, address);
diff --git a/arch/s390/mm/init.c b/arch/s390/mm/init.c
index f0258ca3b17e..c634dfbe92e9 100644
--- a/arch/s390/mm/init.c
+++ b/arch/s390/mm/init.c
@@ -40,7 +40,9 @@
 DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
 
 pgd_t swapper_pg_dir[PTRS_PER_PGD] __attribute__((__aligned__(PAGE_SIZE)));
+
 char  empty_zero_page[PAGE_SIZE] __attribute__((__aligned__(PAGE_SIZE)));
+EXPORT_SYMBOL(empty_zero_page);
 
 /*
  * paging_init() sets up the page tables
diff --git a/arch/s390/mm/pgtable.c b/arch/s390/mm/pgtable.c
index 6b6ddc4ea02b..be6c1cf4ad5a 100644
--- a/arch/s390/mm/pgtable.c
+++ b/arch/s390/mm/pgtable.c
@@ -258,6 +258,10 @@ int s390_enable_sie(void)
         struct task_struct *tsk = current;
         struct mm_struct *mm, *old_mm;
 
+        /* Do we have switched amode? If no, we cannot do sie */
+        if (!switch_amode)
+                return -EINVAL;
+
         /* Do we have pgstes? if yes, we are done */
         if (tsk->mm->context.has_pgste)
                 return 0;
@@ -292,7 +296,7 @@ int s390_enable_sie(void)
         tsk->mm = tsk->active_mm = mm;
         preempt_disable();
         update_mm(mm, tsk);
-        cpu_set(smp_processor_id(), mm->cpu_vm_mask);
+        cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm));
         preempt_enable();
         task_unlock(tsk);
         mmput(old_mm);
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index ebabe518e729..8d50d527c595 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -107,6 +107,9 @@ config SYS_SUPPORTS_NUMA
 config SYS_SUPPORTS_PCI
         bool
 
+config SYS_SUPPORTS_CMT
+        bool
+
 config STACKTRACE_SUPPORT
         def_bool y
 
@@ -176,6 +179,10 @@ config CPU_SHX2
 config CPU_SHX3
         bool
 
+config ARCH_SHMOBILE
+        bool
+        select ARCH_SUSPEND_POSSIBLE
+
 choice
         prompt "Processor sub-type selection"
 
@@ -188,6 +195,7 @@ choice
 config CPU_SUBTYPE_SH7619
         bool "Support SH7619 processor"
         select CPU_SH2
+        select SYS_SUPPORTS_CMT
 
 # SH-2A Processor Support
 
@@ -200,15 +208,18 @@ config CPU_SUBTYPE_SH7203
         bool "Support SH7203 processor"
         select CPU_SH2A
         select CPU_HAS_FPU
+        select SYS_SUPPORTS_CMT
 
 config CPU_SUBTYPE_SH7206
         bool "Support SH7206 processor"
         select CPU_SH2A
+        select SYS_SUPPORTS_CMT
 
 config CPU_SUBTYPE_SH7263
         bool "Support SH7263 processor"
         select CPU_SH2A
         select CPU_HAS_FPU
+        select SYS_SUPPORTS_CMT
 
 config CPU_SUBTYPE_MXG
         bool "Support MX-G processor"
@@ -323,7 +334,9 @@ config CPU_SUBTYPE_SH7723
         bool "Support SH7723 processor"
         select CPU_SH4A
         select CPU_SHX2
+        select ARCH_SHMOBILE
         select ARCH_SPARSEMEM_ENABLE
+        select SYS_SUPPORTS_CMT
         help
           Select SH7723 if you have an SH-MobileR2 CPU.
 
@@ -348,6 +361,14 @@ config CPU_SUBTYPE_SH7785
         select ARCH_SPARSEMEM_ENABLE
         select SYS_SUPPORTS_NUMA
 
+config CPU_SUBTYPE_SH7786
+        bool "Support SH7786 processor"
+        select CPU_SH4A
+        select CPU_SHX3
+        select CPU_HAS_PTEAEX
+        select ARCH_SPARSEMEM_ENABLE
+        select SYS_SUPPORTS_NUMA
+
 config CPU_SUBTYPE_SHX3
         bool "Support SH-X3 processor"
         select CPU_SH4A
@@ -362,20 +383,26 @@ config CPU_SUBTYPE_SHX3
 config CPU_SUBTYPE_SH7343
         bool "Support SH7343 processor"
         select CPU_SH4AL_DSP
+        select ARCH_SHMOBILE
+        select SYS_SUPPORTS_CMT
 
 config CPU_SUBTYPE_SH7722
         bool "Support SH7722 processor"
         select CPU_SH4AL_DSP
         select CPU_SHX2
+        select ARCH_SHMOBILE
         select ARCH_SPARSEMEM_ENABLE
         select SYS_SUPPORTS_NUMA
+        select SYS_SUPPORTS_CMT
 
 config CPU_SUBTYPE_SH7366
         bool "Support SH7366 processor"
         select CPU_SH4AL_DSP
         select CPU_SHX2
+        select ARCH_SHMOBILE
         select ARCH_SPARSEMEM_ENABLE
         select SYS_SUPPORTS_NUMA
+        select SYS_SUPPORTS_CMT
 
 # SH-5 Processor Support
 
@@ -398,25 +425,34 @@ source "arch/sh/boards/Kconfig"
 menu "Timer and clock configuration"
 
 config SH_TMU
-        def_bool y
-        prompt "TMU timer support"
+        bool "TMU timer support"
         depends on CPU_SH3 || CPU_SH4
+        default y
         select GENERIC_TIME
         select GENERIC_CLOCKEVENTS
         help
           This enables the use of the TMU as the system timer.
 
 config SH_CMT
-        def_bool y
-        prompt "CMT timer support"
-        depends on CPU_SH2 && !CPU_SUBTYPE_MXG
+        bool "CMT timer support"
+        depends on SYS_SUPPORTS_CMT && CPU_SH2
+        default y
         help
           This enables the use of the CMT as the system timer.
 
+#
+# Support for the new-style CMT driver. This will replace SH_CMT
+# once its other dependencies are merged.
+#
+config SH_TIMER_CMT
+        bool "CMT clockevents driver"
+        depends on SYS_SUPPORTS_CMT && !SH_CMT
+        select GENERIC_CLOCKEVENTS
+
 config SH_MTU2
-        def_bool n
-        prompt "MTU2 timer support"
+        bool "MTU2 timer support"
         depends on CPU_SH2A
+        default y
         help
           This enables the use of the MTU2 as the system timer.
 
@@ -426,7 +462,8 @@ config SH_TIMER_IRQ
                         CPU_SUBTYPE_SH7763
         default "86" if CPU_SUBTYPE_SH7619
         default "140" if CPU_SUBTYPE_SH7206
-        default "142" if CPU_SUBTYPE_SH7203
+        default "142" if CPU_SUBTYPE_SH7203 && SH_CMT
+        default "153" if CPU_SUBTYPE_SH7203 && SH_MTU2
         default "238" if CPU_SUBTYPE_MXG
         default "16"
 
@@ -438,7 +475,8 @@ config SH_PCLK_FREQ
         default "33333333" if CPU_SUBTYPE_SH7770 || CPU_SUBTYPE_SH7723 || \
                               CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \
                               CPU_SUBTYPE_SH7203 || CPU_SUBTYPE_SH7206 || \
-                              CPU_SUBTYPE_SH7263 || CPU_SUBTYPE_MXG
+                              CPU_SUBTYPE_SH7263 || CPU_SUBTYPE_MXG    || \
+                              CPU_SUBTYPE_SH7786
         default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
         default "66000000" if CPU_SUBTYPE_SH4_202
         default "50000000"
@@ -521,6 +559,13 @@ config CRASH_DUMP
 
           For more details see Documentation/kdump/kdump.txt
 
+config KEXEC_JUMP
+        bool "kexec jump (EXPERIMENTAL)"
+        depends on SUPERH32 && KEXEC && HIBERNATION && EXPERIMENTAL
+        help
+          Jump between original kernel and kexeced kernel and invoke
+          code via KEXEC
+
 config SECCOMP
         bool "Enable seccomp to safely compute untrusted bytecode"
         depends on PROC_FS
diff --git a/arch/sh/Kconfig.cpu b/arch/sh/Kconfig.cpu
index 0e27fe3b182b..c7d704381a6d 100644
--- a/arch/sh/Kconfig.cpu
+++ b/arch/sh/Kconfig.cpu
@@ -104,6 +104,9 @@ config CPU_HAS_SR_RB
 config CPU_HAS_PTEA
         bool
 
+config CPU_HAS_PTEAEX
+        bool
+
 config CPU_HAS_DSP
         bool
 
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index 4067b0d9287b..bece1f7535f2 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -80,6 +80,7 @@ OBJCOPYFLAGS	:= -O binary -R .note -R .note.gnu.build-id -R .comment \
 defaultimage-$(CONFIG_SUPERH32)                 := zImage
 defaultimage-$(CONFIG_SH_SH7785LCR)             := uImage
 defaultimage-$(CONFIG_SH_RSK)                   := uImage
+defaultimage-$(CONFIG_SH_URQUELL)               := uImage
 defaultimage-$(CONFIG_SH_7206_SOLUTION_ENGINE)  := vmlinux
 defaultimage-$(CONFIG_SH_7619_SOLUTION_ENGINE)  := vmlinux
 
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index 861914747e4e..dcc1af8a2cfe 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -155,17 +155,22 @@ config SH_SH7785LCR
 
 config SH_SH7785LCR_29BIT_PHYSMAPS
         bool "SH7785LCR 29bit physmaps"
-        depends on SH_SH7785LCR
+        depends on SH_SH7785LCR && 29BIT
         default y
         help
           This board has 2 physical memory maps. It can be changed with
           DIP switch(S2-5). If you set the DIP switch for S2-5 = ON,
           you can access all on-board device in 29bit address mode.
 
+config SH_URQUELL
+        bool "Urquell"
+        depends on CPU_SUBTYPE_SH7786
+        select ARCH_REQUIRE_GPIOLIB
+
 config SH_MIGOR
         bool "Migo-R"
         depends on CPU_SUBTYPE_SH7722
-        select GENERIC_GPIO
+        select ARCH_REQUIRE_GPIOLIB
         help
           Select Migo-R if configuring for the SH7722 Migo-R platform
           by Renesas System Solutions Asia Pte. Ltd.
@@ -173,7 +178,7 @@ config SH_MIGOR
 config SH_AP325RXA
         bool "AP-325RXA"
         depends on CPU_SUBTYPE_SH7723
-        select GENERIC_GPIO
+        select ARCH_REQUIRE_GPIOLIB
         help
           Renesas "AP-325RXA" support.
           Compatible with ALGO SYSTEM CO.,LTD. "AP-320A"
@@ -185,6 +190,13 @@ config SH_SH7763RDP
           Select SH7763RDP if configuring for a Renesas SH7763
           evaluation board.
 
+config SH_ESPT
+        bool "ESPT"
+        depends on CPU_SUBTYPE_SH7763
+        help
+          Select ESPT if configuring for a Renesas SH7763
+          with gigabit ether evaluation board.
+
 config SH_EDOSK7705
         bool "EDOSK7705"
         depends on CPU_SUBTYPE_SH7705
@@ -240,7 +252,7 @@ config SH_X3PROTO
 config SH_MAGIC_PANEL_R2
         bool "Magic Panel R2"
         depends on CPU_SUBTYPE_SH7720
-        select GENERIC_GPIO
+        select ARCH_REQUIRE_GPIOLIB
         help
           Select Magic Panel R2 if configuring for Magic Panel R2.
 
@@ -249,6 +261,13 @@ config SH_CAYMAN
         depends on CPU_SUBTYPE_SH5_101 || CPU_SUBTYPE_SH5_103
         select SYS_SUPPORTS_PCI
 
+config SH_POLARIS
+        bool "SMSC Polaris"
+        select CPU_HAS_IPR_IRQ
+        depends on CPU_SUBTYPE_SH7709
+        help
+          Select if configuring for an SMSC Polaris development board
+
 endmenu
 
 source "arch/sh/boards/mach-r2d/Kconfig"
diff --git a/arch/sh/boards/Makefile b/arch/sh/boards/Makefile
index 269ae2be49ef..7baa21090231 100644
--- a/arch/sh/boards/Makefile
+++ b/arch/sh/boards/Makefile
@@ -4,5 +4,8 @@
 obj-$(CONFIG_SH_AP325RXA)       += board-ap325rxa.o
 obj-$(CONFIG_SH_MAGIC_PANEL_R2) += board-magicpanelr2.o
 obj-$(CONFIG_SH_SH7785LCR)      += board-sh7785lcr.o
+obj-$(CONFIG_SH_URQUELL)        += board-urquell.o
 obj-$(CONFIG_SH_SHMIN)          += board-shmin.o
 obj-$(CONFIG_SH_EDOSK7760)      += board-edosk7760.o
+obj-$(CONFIG_SH_ESPT)           += board-espt.o
+obj-$(CONFIG_SH_POLARIS)        += board-polaris.o
diff --git a/arch/sh/boards/board-ap325rxa.c b/arch/sh/boards/board-ap325rxa.c
index 15b6d450fbf0..a64e38841c49 100644
--- a/arch/sh/boards/board-ap325rxa.c
+++ b/arch/sh/boards/board-ap325rxa.c
@@ -166,6 +166,16 @@ static void ap320_wvga_power_on(void *board_data)
         ctrl_outw(0x100, FPGA_BKLREG);
 }
 
+static void ap320_wvga_power_off(void *board_data)
+{
+        /* backlight */
+        ctrl_outw(0, FPGA_BKLREG);
+        gpio_set_value(GPIO_PTS3, 1);
+
+        /* ASD AP-320/325 LCD OFF */
+        ctrl_outw(0, FPGA_LCDREG);
+}
+
 static struct sh_mobile_lcdc_info lcdc_info = {
         .clock_source = LCDC_CLK_EXTERNAL,
         .ch[0] = {
@@ -191,6 +201,7 @@ static struct sh_mobile_lcdc_info lcdc_info = {
                 },
                 .board_cfg = {
                         .display_on = ap320_wvga_power_on,
+                        .display_off = ap320_wvga_power_off,
                 },
         }
 };
diff --git a/arch/sh/boards/board-espt.c b/arch/sh/boards/board-espt.c
new file mode 100644
index 000000000000..d5ce5e18eb37
--- /dev/null
+++ b/arch/sh/boards/board-espt.c
@@ -0,0 +1,102 @@
+/*
+ * Data Technology Inc. ESPT-GIGA board suport
+ *
+ * Copyright (C) 2008, 2009 Renesas Solutions Corp.
+ * Copyright (C) 2008, 2009 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/interrupt.h>
+#include <linux/mtd/physmap.h>
+#include <linux/io.h>
+#include <asm/machvec.h>
+#include <asm/sizes.h>
+#include <asm/sh_eth.h>
+
+/* NOR Flash */
+static struct mtd_partition espt_nor_flash_partitions[] = {
+        {
+                .name = "U-Boot",
+                .offset = 0,
+                .size = (2 * SZ_128K),
+                .mask_flags = MTD_WRITEABLE,    /* Read-only */
+        }, {
+                .name = "Linux-Kernel",
+                .offset = MTDPART_OFS_APPEND,
+                .size = (20 * SZ_128K),
+        }, {
+                .name = "Root Filesystem",
+                .offset = MTDPART_OFS_APPEND,
+                .size = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct physmap_flash_data espt_nor_flash_data = {
+        .width = 2,
+        .parts = espt_nor_flash_partitions,
+        .nr_parts = ARRAY_SIZE(espt_nor_flash_partitions),
+};
+
+static struct resource espt_nor_flash_resources[] = {
+        [0] = {
+                .name = "NOR Flash",
+                .start = 0,
+                .end = SZ_8M - 1,
+                .flags = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device espt_nor_flash_device = {
+        .name = "physmap-flash",
+        .resource = espt_nor_flash_resources,
+        .num_resources = ARRAY_SIZE(espt_nor_flash_resources),
+        .dev = {
+                .platform_data = &espt_nor_flash_data,
+        },
+};
+
+/* SH-Ether */
+static struct resource sh_eth_resources[] = {
+        {
+                .start  = 0xFEE00800,   /* use eth1 */
+                .end    = 0xFEE00F7C - 1,
+                .flags  = IORESOURCE_MEM,
+        }, {
+                .start  = 57,   /* irq number */
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct sh_eth_plat_data sh7763_eth_pdata = {
+        .phy = 0,
+        .edmac_endian = EDMAC_LITTLE_ENDIAN,
+};
+
+static struct platform_device espt_eth_device = {
+        .name       = "sh-eth",
+        .resource   = sh_eth_resources,
+        .num_resources  = ARRAY_SIZE(sh_eth_resources),
+        .dev        = {
+                .platform_data = &sh7763_eth_pdata,
+        },
+};
+
+static struct platform_device *espt_devices[] __initdata = {
+        &espt_nor_flash_device,
+        &espt_eth_device,
+};
+
+static int __init espt_devices_setup(void)
+{
+        return platform_add_devices(espt_devices,
+                                    ARRAY_SIZE(espt_devices));
+}
+device_initcall(espt_devices_setup);
+
+static struct sh_machine_vector mv_espt __initmv = {
+        .mv_name = "ESPT-GIGA",
+};
diff --git a/arch/sh/boards/board-polaris.c b/arch/sh/boards/board-polaris.c
new file mode 100644
index 000000000000..62607eb51004
--- /dev/null
+++ b/arch/sh/boards/board-polaris.c
@@ -0,0 +1,149 @@
+/*
+ * June 2006 steve.glendinning@smsc.com
+ *
+ * Polaris-specific resource declaration
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/platform_device.h>
+#include <linux/smsc911x.h>
+#include <linux/io.h>
+#include <asm/irq.h>
+#include <asm/machvec.h>
+#include <asm/heartbeat.h>
+#include <cpu/gpio.h>
+#include <mach-se/mach/se.h>
+
+#define BCR2            (0xFFFFFF62)
+#define WCR2            (0xFFFFFF66)
+#define AREA5_WAIT_CTRL (0x1C00)
+#define WAIT_STATES_10  (0x7)
+
+static struct resource smsc911x_resources[] = {
+        [0] = {
+                .name           = "smsc911x-memory",
+                .start          = PA_EXT5,
+                .end            = PA_EXT5 + 0x1fff,
+                .flags          = IORESOURCE_MEM,
+        },
+        [1] = {
+                .name           = "smsc911x-irq",
+                .start          = IRQ0_IRQ,
+                .end            = IRQ0_IRQ,
+                .flags          = IORESOURCE_IRQ,
+        },
+};
+
+static struct smsc911x_platform_config smsc911x_config = {
+        .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
+        .irq_type       = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
+        .flags          = SMSC911X_USE_32BIT,
+        .phy_interface  = PHY_INTERFACE_MODE_MII,
+};
+
+static struct platform_device smsc911x_device = {
+        .name           = "smsc911x",
+        .id             = 0,
+        .num_resources  = ARRAY_SIZE(smsc911x_resources),
+        .resource       = smsc911x_resources,
+        .dev = {
+                .platform_data = &smsc911x_config,
+        },
+};
+
+static unsigned char heartbeat_bit_pos[] = { 0, 1, 2, 3 };
+
+static struct heartbeat_data heartbeat_data = {
+        .bit_pos        = heartbeat_bit_pos,
+        .nr_bits        = ARRAY_SIZE(heartbeat_bit_pos),
+        .regsize        = 8,
+};
+
+static struct resource heartbeat_resources[] = {
+        [0] = {
+                .start  = PORT_PCDR,
+                .end    = PORT_PCDR,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device heartbeat_device = {
+        .name           = "heartbeat",
+        .id             = -1,
+        .dev    = {
+                .platform_data  = &heartbeat_data,
+        },
+        .num_resources  = ARRAY_SIZE(heartbeat_resources),
+        .resource       = heartbeat_resources,
+};
+
+static struct platform_device *polaris_devices[] __initdata = {
+        &smsc911x_device,
+        &heartbeat_device,
+};
+
+static int __init polaris_initialise(void)
+{
+        u16 wcr, bcr_mask;
+
+        printk(KERN_INFO "Configuring Polaris external bus\n");
+
+        /* Configure area 5 with 2 wait states */
+        wcr = ctrl_inw(WCR2);
+        wcr &= (~AREA5_WAIT_CTRL);
+        wcr |= (WAIT_STATES_10 << 10);
+        ctrl_outw(wcr, WCR2);
+
+        /* Configure area 5 for 32-bit access */
+        bcr_mask = ctrl_inw(BCR2);
+        bcr_mask |= 1 << 10;
+        ctrl_outw(bcr_mask, BCR2);
+
+        return platform_add_devices(polaris_devices,
+                                    ARRAY_SIZE(polaris_devices));
+}
+arch_initcall(polaris_initialise);
+
+static struct ipr_data ipr_irq_table[] = {
+        /* External IRQs */
+        { IRQ0_IRQ, 0,  0,  1, },       /* IRQ0 */
+        { IRQ1_IRQ, 0,  4,  1, },       /* IRQ1 */
+};
+
+static unsigned long ipr_offsets[] = {
+        INTC_IPRC
+};
+
+static struct ipr_desc ipr_irq_desc = {
+        .ipr_offsets    = ipr_offsets,
+        .nr_offsets     = ARRAY_SIZE(ipr_offsets),
+
+        .ipr_data       = ipr_irq_table,
+        .nr_irqs        = ARRAY_SIZE(ipr_irq_table),
+        .chip = {
+                .name   = "sh7709-ext",
+        },
+};
+
+static void __init init_polaris_irq(void)
+{
+        /* Disable all interrupts */
+        ctrl_outw(0, BCR_ILCRA);
+        ctrl_outw(0, BCR_ILCRB);
+        ctrl_outw(0, BCR_ILCRC);
+        ctrl_outw(0, BCR_ILCRD);
+        ctrl_outw(0, BCR_ILCRE);
+        ctrl_outw(0, BCR_ILCRF);
+        ctrl_outw(0, BCR_ILCRG);
+
+        register_ipr_controller(&ipr_irq_desc);
+}
+
+static struct sh_machine_vector mv_polaris __initmv = {
+        .mv_name                = "Polaris",
+        .mv_nr_irqs             = 61,
+        .mv_init_irq            = init_polaris_irq,
+};
diff --git a/arch/sh/boards/board-sh7785lcr.c b/arch/sh/boards/board-sh7785lcr.c
index 38a64968d7bf..94c0296bc35d 100644
--- a/arch/sh/boards/board-sh7785lcr.c
+++ b/arch/sh/boards/board-sh7785lcr.c
@@ -275,7 +275,18 @@ void __init init_sh7785lcr_IRQ(void)
 
 static void sh7785lcr_power_off(void)
 {
-        ctrl_outb(0x01, P2SEGADDR(PLD_POFCR));
+        unsigned char *p;
+
+        p = ioremap(PLD_POFCR, PLD_POFCR + 1);
+        if (!p) {
+                printk(KERN_ERR "%s: ioremap error.\n", __func__);
+                return;
+        }
+        *p = 0x01;
+        iounmap(p);
+        set_bl_bit();
+        while (1)
+                cpu_relax();
 }
 
 /* Initialize the board */
diff --git a/arch/sh/boards/board-urquell.c b/arch/sh/boards/board-urquell.c
new file mode 100644
index 000000000000..17036ce20086
--- /dev/null
+++ b/arch/sh/boards/board-urquell.c
@@ -0,0 +1,162 @@
+/*
+ * Renesas Technology Corp. SH7786 Urquell Support.
+ *
+ * Copyright (C) 2008  Kuninori Morimoto <morimoto.kuninori@renesas.com>
+ * Copyright (C) 2008  Yoshihiro Shimoda
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/fb.h>
+#include <linux/smc91x.h>
+#include <linux/mtd/physmap.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/irq.h>
+#include <mach/urquell.h>
+#include <cpu/sh7786.h>
+#include <asm/heartbeat.h>
+#include <asm/sizes.h>
+
+static struct resource heartbeat_resources[] = {
+        [0] = {
+                .start  = BOARDREG(SLEDR),
+                .end    = BOARDREG(SLEDR),
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct heartbeat_data heartbeat_data = {
+        .regsize = 16,
+};
+
+static struct platform_device heartbeat_device = {
+        .name           = "heartbeat",
+        .id             = -1,
+        .dev    = {
+                .platform_data  = &heartbeat_data,
+        },
+        .num_resources  = ARRAY_SIZE(heartbeat_resources),
+        .resource       = heartbeat_resources,
+};
+
+static struct smc91x_platdata smc91x_info = {
+        .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
+};
+
+static struct resource smc91x_eth_resources[] = {
+        [0] = {
+                .name   = "SMC91C111" ,
+                .start  = 0x05800300,
+                .end    = 0x0580030f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 11,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device smc91x_eth_device = {
+        .name           = "smc91x",
+        .num_resources  = ARRAY_SIZE(smc91x_eth_resources),
+        .resource       = smc91x_eth_resources,
+        .dev    = {
+                .platform_data  = &smc91x_info,
+        },
+};
+
+static struct mtd_partition nor_flash_partitions[] = {
+        {
+                .name           = "loader",
+                .offset         = 0x00000000,
+                .size           = SZ_512K,
+                .mask_flags     = MTD_WRITEABLE,        /* Read-only */
+        },
+        {
+                .name           = "bootenv",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = SZ_512K,
+                .mask_flags     = MTD_WRITEABLE,        /* Read-only */
+        },
+        {
+                .name           = "kernel",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = SZ_4M,
+        },
+        {
+                .name           = "data",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct physmap_flash_data nor_flash_data = {
+        .width          = 2,
+        .parts          = nor_flash_partitions,
+        .nr_parts       = ARRAY_SIZE(nor_flash_partitions),
+};
+
+static struct resource nor_flash_resources[] = {
+        [0] = {
+                .start  = NOR_FLASH_ADDR,
+                .end    = NOR_FLASH_ADDR + NOR_FLASH_SIZE - 1,
+                .flags  = IORESOURCE_MEM,
+        }
+};
+
+static struct platform_device nor_flash_device = {
+        .name           = "physmap-flash",
+        .dev            = {
+                .platform_data  = &nor_flash_data,
+        },
+        .num_resources  = ARRAY_SIZE(nor_flash_resources),
+        .resource       = nor_flash_resources,
+};
+
+static struct platform_device *urquell_devices[] __initdata = {
+        &heartbeat_device,
+        &smc91x_eth_device,
+        &nor_flash_device,
+};
+
+static int __init urquell_devices_setup(void)
+{
+        /* USB */
+        gpio_request(GPIO_FN_USB_OVC0,  NULL);
+        gpio_request(GPIO_FN_USB_PENC0, NULL);
+
+        return platform_add_devices(urquell_devices,
+                                    ARRAY_SIZE(urquell_devices));
+}
+device_initcall(urquell_devices_setup);
+
+static void urquell_power_off(void)
+{
+        __raw_writew(0xa5a5, UBOARDREG(SRSTR));
+}
+
+static void __init urquell_init_irq(void)
+{
+        plat_irq_setup_pins(IRQ_MODE_IRL3210_MASK);
+}
+
+/* Initialize the board */
+static void __init urquell_setup(char **cmdline_p)
+{
+        printk(KERN_INFO "Renesas Technology Corp. Urquell support.\n");
+
+        pm_power_off = urquell_power_off;
+}
+
+/*
+ * The Machine Vector
+ */
+static struct sh_machine_vector mv_urquell __initmv = {
+        .mv_name        = "Urquell",
+        .mv_setup       = urquell_setup,
+        .mv_init_irq    = urquell_init_irq,
+};
diff --git a/arch/sh/boards/mach-highlander/Kconfig b/arch/sh/boards/mach-highlander/Kconfig
index 08057f62687b..def49cc0a7b9 100644
--- a/arch/sh/boards/mach-highlander/Kconfig
+++ b/arch/sh/boards/mach-highlander/Kconfig
@@ -18,7 +18,7 @@ config SH_R7780MP
 config SH_R7785RP
         bool "R7785RP board support"
         depends on CPU_SUBTYPE_SH7785
-        select GENERIC_GPIO
+        select ARCH_REQUIRE_GPIOLIB
 
 endchoice
 
diff --git a/arch/sh/boards/mach-hp6xx/pm_wakeup.S b/arch/sh/boards/mach-hp6xx/pm_wakeup.S
index 44b648cf6f23..4f18d44e0541 100644
--- a/arch/sh/boards/mach-hp6xx/pm_wakeup.S
+++ b/arch/sh/boards/mach-hp6xx/pm_wakeup.S
@@ -10,47 +10,32 @@
 #include <linux/linkage.h>
 #include <cpu/mmu_context.h>
 
-#define k0      r0
-#define k1      r1
-#define k2      r2
-#define k3      r3
-#define k4      r4
-
 /*
  * Kernel mode register usage:
  *      k0      scratch
  *      k1      scratch
- *      k2      scratch (Exception code)
- *      k3      scratch (Return address)
- *      k4      scratch
- *      k5      reserved
- *      k6      Global Interrupt Mask (0--15 << 4)
- *      k7      CURRENT_THREAD_INFO (pointer to current thread info)
+ * For more details, please have a look at entry.S
  */
 
+#define k0      r0
+#define k1      r1
+
 ENTRY(wakeup_start)
 ! clear STBY bit
-        mov     #-126, k2
+        mov     #-126, k1
         and     #127, k0
-        mov.b   k0, @k2
+        mov.b   k0, @k1
 ! enable refresh
         mov.l   5f, k1
         mov.w   6f, k0
         mov.w   k0, @k1
 ! jump to handler
-        mov.l   2f, k2
-        mov.l   3f, k3
-        mov.l   @k2, k2
-
         mov.l   4f, k1
         jmp     @k1
-        nop
+         nop
 
         .align  2
-1:      .long   EXPEVT
-2:      .long   INTEVT
-3:      .long   ret_from_irq
-4:      .long   handle_exception
+4:      .long   handle_interrupt
 5:      .long   0xffffff68
 6:      .word   0x0524
 
diff --git a/arch/sh/boards/mach-hp6xx/setup.c b/arch/sh/boards/mach-hp6xx/setup.c
index 746742bdc014..8f305b36358b 100644
--- a/arch/sh/boards/mach-hp6xx/setup.c
+++ b/arch/sh/boards/mach-hp6xx/setup.c
@@ -115,7 +115,6 @@ static struct sh_machine_vector mv_hp6xx __initmv = {
         .mv_setup = hp6xx_setup,
         /* IRQ's : CPU(64) + CCHIP(16) + FREE_TO_USE(6) */
         .mv_nr_irqs = HD64461_IRQBASE + HD64461_IRQ_NUM + 6,
-        .mv_irq_demux = hd64461_irq_demux,
         /* Enable IRQ0 -> IRQ3 in IRQ_MODE */
         .mv_init_irq = hp6xx_init_irq,
 };
diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c
index 28e56c5809a2..bc35b4cae6b3 100644
--- a/arch/sh/boards/mach-migor/setup.c
+++ b/arch/sh/boards/mach-migor/setup.c
@@ -450,6 +450,14 @@ static struct spi_board_info migor_spi_devices[] = {
 
 static int __init migor_devices_setup(void)
 {
+
+#ifdef CONFIG_PM
+        /* Let D11 LED show STATUS0 */
+        gpio_request(GPIO_FN_STATUS0, NULL);
+
+        /* Lit D12 LED show PDSTATUS */
+        gpio_request(GPIO_FN_PDSTATUS, NULL);
+#else
         /* Lit D11 LED */
         gpio_request(GPIO_PTJ7, NULL);
         gpio_direction_output(GPIO_PTJ7, 1);
@@ -459,6 +467,7 @@ static int __init migor_devices_setup(void)
         gpio_request(GPIO_PTJ5, NULL);
         gpio_direction_output(GPIO_PTJ5, 1);
         gpio_export(GPIO_PTJ5, 0);
+#endif
 
         /* SMC91C111 - Enable IRQ0, Setup CS4 for 16-bit fast access */
         gpio_request(GPIO_FN_IRQ0, NULL);
diff --git a/arch/sh/boards/mach-rsk/Kconfig b/arch/sh/boards/mach-rsk/Kconfig
index bff095dffc02..aeff3b042205 100644
--- a/arch/sh/boards/mach-rsk/Kconfig
+++ b/arch/sh/boards/mach-rsk/Kconfig
@@ -10,7 +10,7 @@ config SH_RSK7201
 
 config SH_RSK7203
         bool "RSK7203"
-        select GENERIC_GPIO
+        select ARCH_REQUIRE_GPIOLIB
         depends on CPU_SUBTYPE_SH7203
 
 endchoice
diff --git a/arch/sh/boards/mach-sh7763rdp/setup.c b/arch/sh/boards/mach-sh7763rdp/setup.c
index 6f926fd2162b..390534a0b35c 100644
--- a/arch/sh/boards/mach-sh7763rdp/setup.c
+++ b/arch/sh/boards/mach-sh7763rdp/setup.c
@@ -63,15 +63,19 @@ static struct platform_device sh7763rdp_nor_flash_device = {
         },
 };
 
-/* SH-Ether */
+/*
+ * SH-Ether
+ *
+ * SH Ether of SH7763 has multi IRQ handling.
+ * (57,58,59 -> 57)
+ */
 static struct resource sh_eth_resources[] = {
         {
                 .start  = 0xFEE00800,   /* use eth1 */
                 .end    = 0xFEE00F7C - 1,
                 .flags  = IORESOURCE_MEM,
         }, {
-                .start  = 58,   /* irq number */
-                .end    = 58,
+                .start  = 57,   /* irq number */
                 .flags  = IORESOURCE_IRQ,
         },
 };
diff --git a/arch/sh/boot/Makefile b/arch/sh/boot/Makefile
index c16ccd4bfa16..95483d161258 100644
--- a/arch/sh/boot/Makefile
+++ b/arch/sh/boot/Makefile
@@ -33,20 +33,24 @@ $(obj)/zImage: $(obj)/compressed/vmlinux FORCE
 $(obj)/compressed/vmlinux: FORCE
         $(Q)$(MAKE) $(build)=$(obj)/compressed $@
 
-ifeq ($(CONFIG_32BIT),y)
-KERNEL_LOAD     := $(shell /bin/bash -c 'printf "0x%08x" \
-                     $$[$(CONFIG_PAGE_OFFSET)  + \
-                        $(CONFIG_ZERO_PAGE_OFFSET)]')
-else
+KERNEL_MEMORY := 0x00000000
+ifeq ($(CONFIG_PMB_FIXED),y)
+KERNEL_MEMORY := $(shell /bin/bash -c 'printf "0x%08x" \
+                     $$[$(CONFIG_MEMORY_START) & 0x1fffffff]')
+endif
+ifeq ($(CONFIG_29BIT),y)
+KERNEL_MEMORY := $(shell /bin/bash -c 'printf "0x%08x" \
+                     $$[$(CONFIG_MEMORY_START)]')
+endif
+
 KERNEL_LOAD     := $(shell /bin/bash -c 'printf "0x%08x" \
                      $$[$(CONFIG_PAGE_OFFSET)  + \
-                        $(CONFIG_MEMORY_START) + \
+                        $(KERNEL_MEMORY) + \
                         $(CONFIG_ZERO_PAGE_OFFSET)]')
-endif
 
 KERNEL_ENTRY    := $(shell /bin/bash -c 'printf "0x%08x" \
                      $$[$(CONFIG_PAGE_OFFSET)  + \
-                        $(CONFIG_MEMORY_START) + \
+                        $(KERNEL_MEMORY) + \
                         $(CONFIG_ZERO_PAGE_OFFSET) + $(CONFIG_ENTRY_OFFSET)]')
 
 quiet_cmd_uimage = UIMAGE  $@
diff --git a/arch/sh/cchips/hd6446x/hd64461.c b/arch/sh/cchips/hd6446x/hd64461.c
index 27ceeb948bb1..25ef91061521 100644
--- a/arch/sh/cchips/hd6446x/hd64461.c
+++ b/arch/sh/cchips/hd6446x/hd64461.c
@@ -53,21 +53,22 @@ static struct irq_chip hd64461_irq_chip = {
         .unmask         = hd64461_unmask_irq,
 };
 
-int hd64461_irq_demux(int irq)
+static void hd64461_irq_demux(unsigned int irq, struct irq_desc *desc)
 {
-        if (irq == CONFIG_HD64461_IRQ) {
-                unsigned short bit;
-                unsigned short nirr = inw(HD64461_NIRR);
-                unsigned short nimr = inw(HD64461_NIMR);
-                int i;
-
-                nirr &= ~nimr;
-                for (bit = 1, i = 0; i < 16; bit <<= 1, i++)
-                        if (nirr & bit)
-                                break;
-                irq = HD64461_IRQBASE + i;
+        unsigned short intv = ctrl_inw(HD64461_NIRR);
+        struct irq_desc *ext_desc;
+        unsigned int ext_irq = HD64461_IRQBASE;
+
+        intv &= (1 << HD64461_IRQ_NUM) - 1;
+
+        while (intv) {
+                if (intv & 1) {
+                        ext_desc = irq_desc + ext_irq;
+                        handle_level_irq(ext_irq, ext_desc);
+                }
+                intv >>= 1;
+                ext_irq++;
         }
-        return irq;
 }
 
 int __init setup_hd64461(void)
@@ -93,6 +94,9 @@ int __init setup_hd64461(void)
                 set_irq_chip_and_handler(i, &hd64461_irq_chip,
                                          handle_level_irq);
 
+        set_irq_chained_handler(CONFIG_HD64461_IRQ, hd64461_irq_demux);
+        set_irq_type(CONFIG_HD64461_IRQ, IRQ_TYPE_LEVEL_LOW);
+
 #ifdef CONFIG_HD64461_ENABLER
         printk(KERN_INFO "HD64461: enabling PCMCIA devices\n");
         __raw_writeb(0x4c, HD64461_PCC1CSCIER);
diff --git a/arch/sh/configs/espt_defconfig b/arch/sh/configs/espt_defconfig
new file mode 100644
index 000000000000..873ec42c6e69
--- /dev/null
+++ b/arch/sh/configs/espt_defconfig
@@ -0,0 +1,1190 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.29-rc7
+# Tue Mar 17 13:25:58 2009
+#
+CONFIG_SUPERH=y
+CONFIG_SUPERH32=y
+CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_GENERIC_IRQ_PROBE=y
+# CONFIG_GENERIC_GPIO is not set
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
+# CONFIG_ARCH_HIBERNATION_POSSIBLE is not set
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_NO_VIRT_TO_BUS=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+CONFIG_UTS_NS=y
+CONFIG_IPC_NS=y
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_NET_NS is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+# CONFIG_SYSCTL_SYSCALL is not set
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+CONFIG_PROFILING=y
+CONFIG_TRACEPOINTS=y
+# CONFIG_MARKERS is not set
+CONFIG_OPROFILE=y
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_IOREMAP_PROT=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+# CONFIG_MODULE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+# CONFIG_FREEZER is not set
+
+#
+# System type
+#
+CONFIG_CPU_SH4=y
+CONFIG_CPU_SH4A=y
+# CONFIG_CPU_SUBTYPE_SH7619 is not set
+# CONFIG_CPU_SUBTYPE_SH7201 is not set
+# CONFIG_CPU_SUBTYPE_SH7203 is not set
+# CONFIG_CPU_SUBTYPE_SH7206 is not set
+# CONFIG_CPU_SUBTYPE_SH7263 is not set
+# CONFIG_CPU_SUBTYPE_MXG is not set
+# CONFIG_CPU_SUBTYPE_SH7705 is not set
+# CONFIG_CPU_SUBTYPE_SH7706 is not set
+# CONFIG_CPU_SUBTYPE_SH7707 is not set
+# CONFIG_CPU_SUBTYPE_SH7708 is not set
+# CONFIG_CPU_SUBTYPE_SH7709 is not set
+# CONFIG_CPU_SUBTYPE_SH7710 is not set
+# CONFIG_CPU_SUBTYPE_SH7712 is not set
+# CONFIG_CPU_SUBTYPE_SH7720 is not set
+# CONFIG_CPU_SUBTYPE_SH7721 is not set
+# CONFIG_CPU_SUBTYPE_SH7750 is not set
+# CONFIG_CPU_SUBTYPE_SH7091 is not set
+# CONFIG_CPU_SUBTYPE_SH7750R is not set
+# CONFIG_CPU_SUBTYPE_SH7750S is not set
+# CONFIG_CPU_SUBTYPE_SH7751 is not set
+# CONFIG_CPU_SUBTYPE_SH7751R is not set
+# CONFIG_CPU_SUBTYPE_SH7760 is not set
+# CONFIG_CPU_SUBTYPE_SH4_202 is not set
+# CONFIG_CPU_SUBTYPE_SH7723 is not set
+CONFIG_CPU_SUBTYPE_SH7763=y
+# CONFIG_CPU_SUBTYPE_SH7770 is not set
+# CONFIG_CPU_SUBTYPE_SH7780 is not set
+# CONFIG_CPU_SUBTYPE_SH7785 is not set
+# CONFIG_CPU_SUBTYPE_SH7786 is not set
+# CONFIG_CPU_SUBTYPE_SHX3 is not set
+# CONFIG_CPU_SUBTYPE_SH7343 is not set
+# CONFIG_CPU_SUBTYPE_SH7722 is not set
+# CONFIG_CPU_SUBTYPE_SH7366 is not set
+# CONFIG_CPU_SUBTYPE_SH5_101 is not set
+# CONFIG_CPU_SUBTYPE_SH5_103 is not set
+
+#
+# Memory management options
+#
+CONFIG_QUICKLIST=y
+CONFIG_MMU=y
+CONFIG_PAGE_OFFSET=0x80000000
+CONFIG_MEMORY_START=0x0c000000
+CONFIG_MEMORY_SIZE=0x04000000
+CONFIG_29BIT=y
+CONFIG_VSYSCALL=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_DEFAULT=y
+CONFIG_MAX_ACTIVE_REGIONS=1
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_8KB is not set
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_ENTRY_OFFSET=0x00001000
+CONFIG_SELECT_MEMORY_MODEL=y
+# CONFIG_FLATMEM_MANUAL is not set
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+CONFIG_SPARSEMEM_MANUAL=y
+CONFIG_SPARSEMEM=y
+CONFIG_HAVE_MEMORY_PRESENT=y
+CONFIG_SPARSEMEM_STATIC=y
+# CONFIG_MEMORY_HOTPLUG is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_MIGRATION=y
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_NR_QUICK=2
+CONFIG_UNEVICTABLE_LRU=y
+
+#
+# Cache configuration
+#
+# CONFIG_SH_DIRECT_MAPPED is not set
+CONFIG_CACHE_WRITEBACK=y
+# CONFIG_CACHE_WRITETHROUGH is not set
+# CONFIG_CACHE_OFF is not set
+
+#
+# Processor features
+#
+CONFIG_CPU_LITTLE_ENDIAN=y
+# CONFIG_CPU_BIG_ENDIAN is not set
+CONFIG_SH_FPU=y
+# CONFIG_SH_STORE_QUEUES is not set
+CONFIG_CPU_HAS_INTEVT=y
+CONFIG_CPU_HAS_SR_RB=y
+CONFIG_CPU_HAS_FPU=y
+
+#
+# Board support
+#
+# CONFIG_SH_SH7763RDP is not set
+CONFIG_SH_ESPT=y
+
+#
+# Timer and clock configuration
+#
+CONFIG_SH_TMU=y
+CONFIG_SH_TIMER_IRQ=28
+CONFIG_SH_PCLK_FREQ=66666666
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+
+#
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+
+#
+# DMA support
+#
+# CONFIG_SH_DMA is not set
+
+#
+# Companion Chips
+#
+
+#
+# Additional SuperH Device Drivers
+#
+# CONFIG_HEARTBEAT is not set
+# CONFIG_PUSH_SWITCH is not set
+
+#
+# Kernel features
+#
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+# CONFIG_SCHED_HRTICK is not set
+# CONFIG_KEXEC is not set
+# CONFIG_CRASH_DUMP is not set
+CONFIG_SECCOMP=y
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_GUSA=y
+
+#
+# Boot options
+#
+CONFIG_ZERO_PAGE_OFFSET=0x00001000
+CONFIG_BOOT_LINK_OFFSET=0x00800000
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE="console=ttySC0,115200 root=/dev/nfs ip=bootp"
+
+#
+# Bus options
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options (EXPERIMENTAL)
+#
+# CONFIG_PM is not set
+# CONFIG_CPU_IDLE is not set
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_COMPAT_NET_DEV_OPS=y
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_PHONET is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+CONFIG_MTD_CFI_GEOMETRY=y
+# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_OTP is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+CONFIG_MTD_COMPLEX_MAPPINGS=y
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_LIBFC is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_FIXED_PHY is not set
+CONFIG_MDIO_BITBANG=y
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
+# CONFIG_STNIC is not set
+CONFIG_SH_ETH=y
+# CONFIG_SMC91X is not set
+# CONFIG_SMC911X is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_SH_SCI_NR_UARTS=3
+CONFIG_SERIAL_SH_SCI_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_REGULATOR is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+CONFIG_FB_FOREIGN_ENDIAN=y
+CONFIG_FB_BOTH_ENDIAN=y
+# CONFIG_FB_BIG_ENDIAN is not set
+# CONFIG_FB_LITTLE_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_SH_MOBILE_LCDC is not set
+CONFIG_FB_SH7760=y
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
+CONFIG_LOGO_SUPERH_MONO=y
+CONFIG_LOGO_SUPERH_VGA16=y
+CONFIG_LOGO_SUPERH_CLUT224=y
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+# CONFIG_USB_DEVICEFS is not set
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+CONFIG_USB_MON=y
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
+#
+
+#
+# see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+# CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_FILE_LOCKING=y
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=y
+CONFIG_AUTOFS4_FS=y
+# CONFIG_FUSE_FS is not set
+CONFIG_GENERIC_ACL=y
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+CONFIG_TMPFS_POSIX_ACL=y
+# CONFIG_HUGETLBFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+CONFIG_CRAMFS=y
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+CONFIG_ROMFS_FS=y
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_REGISTER_V4 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_737=y
+CONFIG_NLS_CODEPAGE_775=y
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_CODEPAGE_852=y
+CONFIG_NLS_CODEPAGE_855=y
+CONFIG_NLS_CODEPAGE_857=y
+CONFIG_NLS_CODEPAGE_860=y
+CONFIG_NLS_CODEPAGE_861=y
+CONFIG_NLS_CODEPAGE_862=y
+CONFIG_NLS_CODEPAGE_863=y
+CONFIG_NLS_CODEPAGE_864=y
+CONFIG_NLS_CODEPAGE_865=y
+CONFIG_NLS_CODEPAGE_866=y
+CONFIG_NLS_CODEPAGE_869=y
+CONFIG_NLS_CODEPAGE_936=y
+CONFIG_NLS_CODEPAGE_950=y
+CONFIG_NLS_CODEPAGE_932=y
+CONFIG_NLS_CODEPAGE_949=y
+CONFIG_NLS_CODEPAGE_874=y
+CONFIG_NLS_ISO8859_8=y
+CONFIG_NLS_CODEPAGE_1250=y
+CONFIG_NLS_CODEPAGE_1251=y
+CONFIG_NLS_ASCII=y
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_ISO8859_2=y
+CONFIG_NLS_ISO8859_3=y
+CONFIG_NLS_ISO8859_4=y
+CONFIG_NLS_ISO8859_5=y
+CONFIG_NLS_ISO8859_6=y
+CONFIG_NLS_ISO8859_7=y
+CONFIG_NLS_ISO8859_9=y
+CONFIG_NLS_ISO8859_13=y
+CONFIG_NLS_ISO8859_14=y
+CONFIG_NLS_ISO8859_15=y
+CONFIG_NLS_KOI8_R=y
+CONFIG_NLS_KOI8_U=y
+CONFIG_NLS_UTF8=y
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+CONFIG_STACKTRACE=y
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_NOP_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_RING_BUFFER=y
+CONFIG_TRACING=y
+
+#
+# Tracers
+#
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_SH_STANDARD_BIOS is not set
+# CONFIG_EARLY_SCIF_CONSOLE is not set
+# CONFIG_MORE_COMPILE_OPTIONS is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+# CONFIG_CRYPTO_MANAGER is not set
+# CONFIG_CRYPTO_MANAGER2 is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_HW=y
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+CONFIG_CRC_T10DIF=y
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/sh/configs/polaris_defconfig b/arch/sh/configs/polaris_defconfig
new file mode 100644
index 000000000000..320def233b2f
--- /dev/null
+++ b/arch/sh/configs/polaris_defconfig
@@ -0,0 +1,969 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.29-rc4
+# Wed Feb 11 18:41:59 2009
+#
+CONFIG_SUPERH=y
+CONFIG_SUPERH32=y
+CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_GENERIC_IRQ_PROBE=y
+# CONFIG_GENERIC_GPIO is not set
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
+# CONFIG_ARCH_HIBERNATION_POSSIBLE is not set
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_NO_VIRT_TO_BUS=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_BSD_PROCESS_ACCT_V3=y
+# CONFIG_TASKSTATS is not set
+CONFIG_AUDIT=y
+# CONFIG_AUDITSYSCALL is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_BLK_DEV_INITRD is not set
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_ALL=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_IOREMAP_PROT=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_MODVERSIONS=y
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_FREEZER is not set
+
+#
+# System type
+#
+CONFIG_CPU_SH3=y
+# CONFIG_CPU_SUBTYPE_SH7619 is not set
+# CONFIG_CPU_SUBTYPE_SH7201 is not set
+# CONFIG_CPU_SUBTYPE_SH7203 is not set
+# CONFIG_CPU_SUBTYPE_SH7206 is not set
+# CONFIG_CPU_SUBTYPE_SH7263 is not set
+# CONFIG_CPU_SUBTYPE_MXG is not set
+# CONFIG_CPU_SUBTYPE_SH7705 is not set
+# CONFIG_CPU_SUBTYPE_SH7706 is not set
+# CONFIG_CPU_SUBTYPE_SH7707 is not set
+# CONFIG_CPU_SUBTYPE_SH7708 is not set
+CONFIG_CPU_SUBTYPE_SH7709=y
+# CONFIG_CPU_SUBTYPE_SH7710 is not set
+# CONFIG_CPU_SUBTYPE_SH7712 is not set
+# CONFIG_CPU_SUBTYPE_SH7720 is not set
+# CONFIG_CPU_SUBTYPE_SH7721 is not set
+# CONFIG_CPU_SUBTYPE_SH7750 is not set
+# CONFIG_CPU_SUBTYPE_SH7091 is not set
+# CONFIG_CPU_SUBTYPE_SH7750R is not set
+# CONFIG_CPU_SUBTYPE_SH7750S is not set
+# CONFIG_CPU_SUBTYPE_SH7751 is not set
+# CONFIG_CPU_SUBTYPE_SH7751R is not set
+# CONFIG_CPU_SUBTYPE_SH7760 is not set
+# CONFIG_CPU_SUBTYPE_SH4_202 is not set
+# CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7763 is not set
+# CONFIG_CPU_SUBTYPE_SH7770 is not set
+# CONFIG_CPU_SUBTYPE_SH7780 is not set
+# CONFIG_CPU_SUBTYPE_SH7785 is not set
+# CONFIG_CPU_SUBTYPE_SHX3 is not set
+# CONFIG_CPU_SUBTYPE_SH7343 is not set
+# CONFIG_CPU_SUBTYPE_SH7722 is not set
+# CONFIG_CPU_SUBTYPE_SH7366 is not set
+# CONFIG_CPU_SUBTYPE_SH5_101 is not set
+# CONFIG_CPU_SUBTYPE_SH5_103 is not set
+
+#
+# Memory management options
+#
+CONFIG_QUICKLIST=y
+CONFIG_MMU=y
+CONFIG_PAGE_OFFSET=0x80000000
+CONFIG_MEMORY_START=0x0C000000
+CONFIG_MEMORY_SIZE=0x04000000
+CONFIG_29BIT=y
+CONFIG_VSYSCALL=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_DEFAULT=y
+CONFIG_MAX_ACTIVE_REGIONS=1
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_8KB is not set
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_ENTRY_OFFSET=0x00001000
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_SPARSEMEM_STATIC=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_NR_QUICK=2
+CONFIG_UNEVICTABLE_LRU=y
+
+#
+# Cache configuration
+#
+# CONFIG_SH_DIRECT_MAPPED is not set
+CONFIG_CACHE_WRITEBACK=y
+# CONFIG_CACHE_WRITETHROUGH is not set
+# CONFIG_CACHE_OFF is not set
+
+#
+# Processor features
+#
+CONFIG_CPU_LITTLE_ENDIAN=y
+# CONFIG_CPU_BIG_ENDIAN is not set
+CONFIG_SH_FPU_EMU=y
+CONFIG_SH_ADC=y
+CONFIG_CPU_HAS_INTEVT=y
+CONFIG_CPU_HAS_IPR_IRQ=y
+CONFIG_CPU_HAS_SR_RB=y
+
+#
+# Board support
+#
+# CONFIG_SH_SOLUTION_ENGINE is not set
+# CONFIG_SH_HP6XX is not set
+CONFIG_SH_POLARIS=y
+
+#
+# Timer and clock configuration
+#
+CONFIG_SH_TMU=y
+CONFIG_SH_TIMER_IRQ=16
+CONFIG_SH_PCLK_FREQ=33000000
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+
+#
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+
+#
+# DMA support
+#
+CONFIG_SH_DMA_API=y
+CONFIG_SH_DMA=y
+CONFIG_NR_ONCHIP_DMA_CHANNELS=4
+# CONFIG_NR_DMA_CHANNELS_BOOL is not set
+
+#
+# Companion Chips
+#
+
+#
+# Additional SuperH Device Drivers
+#
+CONFIG_HEARTBEAT=y
+# CONFIG_PUSH_SWITCH is not set
+
+#
+# Kernel features
+#
+CONFIG_HZ_100=y
+# CONFIG_HZ_250 is not set
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=100
+CONFIG_SCHED_HRTICK=y
+# CONFIG_KEXEC is not set
+# CONFIG_CRASH_DUMP is not set
+# CONFIG_SECCOMP is not set
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+CONFIG_GUSA=y
+# CONFIG_GUSA_RB is not set
+
+#
+# Boot options
+#
+CONFIG_ZERO_PAGE_OFFSET=0x00001000
+CONFIG_BOOT_LINK_OFFSET=0x00800000
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE="console=ttySC1,115200 root=/dev/mtdblock2 rootfstype=jffs2 mem=63M mtdparts=physmap-flash.0:0x00100000(bootloader)ro,0x00500000(Kernel)ro,0x00A00000(Filesystem)"
+
+#
+# Bus options
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options (EXPERIMENTAL)
+#
+# CONFIG_PM is not set
+# CONFIG_CPU_IDLE is not set
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_COMPAT_NET_DEV_OPS=y
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_PHONET is not set
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+# CONFIG_FIRMWARE_IN_KERNEL is not set
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_GEOMETRY is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_OTP is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_COMPAT=y
+CONFIG_MTD_PHYSMAP_START=0x00000000
+CONFIG_MTD_PHYSMAP_LEN=0x01000000
+CONFIG_MTD_PHYSMAP_BANKWIDTH=2
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+# CONFIG_MTD_QINFO_PROBE is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_93CX6 is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+CONFIG_SMSC_PHY=y
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
+# CONFIG_STNIC is not set
+# CONFIG_SMC91X is not set
+# CONFIG_SMC911X is not set
+CONFIG_SMSC911X=y
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+CONFIG_DEVKMEM=y
+CONFIG_SERIAL_NONSTANDARD=y
+# CONFIG_N_HDLC is not set
+# CONFIG_RISCOM8 is not set
+# CONFIG_SPECIALIX is not set
+# CONFIG_RIO is not set
+# CONFIG_STALDRV is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_SH_SCI_NR_UARTS=3
+CONFIG_SERIAL_SH_SCI_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+# CONFIG_SPI is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_REGULATOR is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_SH=y
+# CONFIG_DMADEVICES is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLBFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+# CONFIG_JFFS2_FS_WRITEBUFFER is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFSD is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_REGISTER_V4 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_NLS is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+CONFIG_DEBUG_SHIRQ=y
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+# CONFIG_SCHED_DEBUG is not set
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+CONFIG_DEBUG_PREEMPT=y
+CONFIG_DEBUG_RT_MUTEXES=y
+CONFIG_DEBUG_PI_LIST=y
+# CONFIG_RT_MUTEX_TESTER is not set
+CONFIG_DEBUG_SPINLOCK=y
+CONFIG_DEBUG_MUTEXES=y
+CONFIG_DEBUG_LOCK_ALLOC=y
+# CONFIG_PROVE_LOCKING is not set
+CONFIG_LOCKDEP=y
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_LOCKDEP is not set
+CONFIG_DEBUG_SPINLOCK_SLEEP=y
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+CONFIG_STACKTRACE=y
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+CONFIG_DEBUG_SG=y
+# CONFIG_DEBUG_NOTIFIERS is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+
+#
+# Tracers
+#
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_PREEMPT_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+# CONFIG_SH_STANDARD_BIOS is not set
+CONFIG_EARLY_SCIF_CONSOLE=y
+CONFIG_EARLY_SCIF_CONSOLE_PORT=0x00000000
+CONFIG_EARLY_PRINTK=y
+# CONFIG_DEBUG_BOOTMEM is not set
+# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_4KSTACKS is not set
+# CONFIG_IRQSTACKS is not set
+CONFIG_DUMP_CODE=y
+# CONFIG_SH_NO_BSS_INIT is not set
+# CONFIG_MORE_COMPILE_OPTIONS is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_CRYPTO is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_AUDIT_GENERIC=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/sh/configs/sh7785lcr_32bit_defconfig b/arch/sh/configs/sh7785lcr_32bit_defconfig
new file mode 100644
index 000000000000..54e1dee8e24a
--- /dev/null
+++ b/arch/sh/configs/sh7785lcr_32bit_defconfig
@@ -0,0 +1,1553 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.29-rc4
+# Fri Feb 20 18:25:29 2009
+#
+CONFIG_SUPERH=y
+CONFIG_SUPERH32=y
+CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_GENERIC_IRQ_PROBE=y
+# CONFIG_GENERIC_GPIO is not set
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
+# CONFIG_ARCH_HIBERNATION_POSSIBLE is not set
+CONFIG_SYS_SUPPORTS_NUMA=y
+CONFIG_SYS_SUPPORTS_PCI=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_NO_VIRT_TO_BUS=y
+CONFIG_IO_TRAPPED=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+CONFIG_BSD_PROCESS_ACCT=y
+# CONFIG_BSD_PROCESS_ACCT_V3 is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_PCI_QUIRKS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+CONFIG_PROFILING=y
+# CONFIG_OPROFILE is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_IOREMAP_PROT=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_FREEZER is not set
+
+#
+# System type
+#
+CONFIG_CPU_SH4=y
+CONFIG_CPU_SH4A=y
+CONFIG_CPU_SHX2=y
+# CONFIG_CPU_SUBTYPE_SH7619 is not set
+# CONFIG_CPU_SUBTYPE_SH7201 is not set
+# CONFIG_CPU_SUBTYPE_SH7203 is not set
+# CONFIG_CPU_SUBTYPE_SH7206 is not set
+# CONFIG_CPU_SUBTYPE_SH7263 is not set
+# CONFIG_CPU_SUBTYPE_MXG is not set
+# CONFIG_CPU_SUBTYPE_SH7705 is not set
+# CONFIG_CPU_SUBTYPE_SH7706 is not set
+# CONFIG_CPU_SUBTYPE_SH7707 is not set
+# CONFIG_CPU_SUBTYPE_SH7708 is not set
+# CONFIG_CPU_SUBTYPE_SH7709 is not set
+# CONFIG_CPU_SUBTYPE_SH7710 is not set
+# CONFIG_CPU_SUBTYPE_SH7712 is not set
+# CONFIG_CPU_SUBTYPE_SH7720 is not set
+# CONFIG_CPU_SUBTYPE_SH7721 is not set
+# CONFIG_CPU_SUBTYPE_SH7750 is not set
+# CONFIG_CPU_SUBTYPE_SH7091 is not set
+# CONFIG_CPU_SUBTYPE_SH7750R is not set
+# CONFIG_CPU_SUBTYPE_SH7750S is not set
+# CONFIG_CPU_SUBTYPE_SH7751 is not set
+# CONFIG_CPU_SUBTYPE_SH7751R is not set
+# CONFIG_CPU_SUBTYPE_SH7760 is not set
+# CONFIG_CPU_SUBTYPE_SH4_202 is not set
+# CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7763 is not set
+# CONFIG_CPU_SUBTYPE_SH7770 is not set
+# CONFIG_CPU_SUBTYPE_SH7780 is not set
+CONFIG_CPU_SUBTYPE_SH7785=y
+# CONFIG_CPU_SUBTYPE_SHX3 is not set
+# CONFIG_CPU_SUBTYPE_SH7343 is not set
+# CONFIG_CPU_SUBTYPE_SH7722 is not set
+# CONFIG_CPU_SUBTYPE_SH7366 is not set
+# CONFIG_CPU_SUBTYPE_SH5_101 is not set
+# CONFIG_CPU_SUBTYPE_SH5_103 is not set
+
+#
+# Memory management options
+#
+CONFIG_QUICKLIST=y
+CONFIG_MMU=y
+CONFIG_PAGE_OFFSET=0x80000000
+CONFIG_MEMORY_START=0x40000000
+CONFIG_MEMORY_SIZE=0x20000000
+# CONFIG_29BIT is not set
+CONFIG_32BIT=y
+CONFIG_PMB_ENABLE=y
+# CONFIG_PMB is not set
+CONFIG_PMB_FIXED=y
+# CONFIG_X2TLB is not set
+CONFIG_VSYSCALL=y
+# CONFIG_NUMA is not set
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_DEFAULT=y
+CONFIG_MAX_ACTIVE_REGIONS=2
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_8KB is not set
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_ENTRY_OFFSET=0x00001000
+CONFIG_SELECT_MEMORY_MODEL=y
+# CONFIG_FLATMEM_MANUAL is not set
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+CONFIG_SPARSEMEM_MANUAL=y
+CONFIG_SPARSEMEM=y
+CONFIG_HAVE_MEMORY_PRESENT=y
+CONFIG_SPARSEMEM_STATIC=y
+# CONFIG_MEMORY_HOTPLUG is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_MIGRATION=y
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_NR_QUICK=2
+CONFIG_UNEVICTABLE_LRU=y
+
+#
+# Cache configuration
+#
+# CONFIG_SH_DIRECT_MAPPED is not set
+CONFIG_CACHE_WRITEBACK=y
+# CONFIG_CACHE_WRITETHROUGH is not set
+# CONFIG_CACHE_OFF is not set
+
+#
+# Processor features
+#
+CONFIG_CPU_LITTLE_ENDIAN=y
+# CONFIG_CPU_BIG_ENDIAN is not set
+CONFIG_SH_FPU=y
+CONFIG_SH_STORE_QUEUES=y
+CONFIG_CPU_HAS_INTEVT=y
+CONFIG_CPU_HAS_SR_RB=y
+CONFIG_CPU_HAS_PTEA=y
+CONFIG_CPU_HAS_FPU=y
+
+#
+# Board support
+#
+# CONFIG_SH_HIGHLANDER is not set
+CONFIG_SH_SH7785LCR=y
+
+#
+# Timer and clock configuration
+#
+CONFIG_SH_TMU=y
+CONFIG_SH_TIMER_IRQ=28
+CONFIG_SH_PCLK_FREQ=50000000
+CONFIG_TICK_ONESHOT=y
+# CONFIG_NO_HZ is not set
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+
+#
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+
+#
+# DMA support
+#
+# CONFIG_SH_DMA is not set
+
+#
+# Companion Chips
+#
+
+#
+# Additional SuperH Device Drivers
+#
+CONFIG_HEARTBEAT=y
+# CONFIG_PUSH_SWITCH is not set
+
+#
+# Kernel features
+#
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+CONFIG_SCHED_HRTICK=y
+CONFIG_KEXEC=y
+# CONFIG_CRASH_DUMP is not set
+# CONFIG_SECCOMP is not set
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+CONFIG_GUSA=y
+
+#
+# Boot options
+#
+CONFIG_ZERO_PAGE_OFFSET=0x00001000
+CONFIG_BOOT_LINK_OFFSET=0x00800000
+# CONFIG_CMDLINE_BOOL is not set
+
+#
+# Bus options
+#
+CONFIG_PCI=y
+CONFIG_SH_PCIDMA_NONCOHERENT=y
+CONFIG_PCI_AUTO=y
+CONFIG_PCI_AUTO_UPDATE_RESOURCES=y
+# CONFIG_PCIEPORTBUS is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_PCI_LEGACY=y
+# CONFIG_PCI_DEBUG is not set
+# CONFIG_PCI_STUB is not set
+# CONFIG_PCCARD is not set
+# CONFIG_HOTPLUG_PCI is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options (EXPERIMENTAL)
+#
+# CONFIG_PM is not set
+# CONFIG_CPU_IDLE is not set
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_COMPAT_NET_DEV_OPS=y
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_ASK_IP_FIB_HASH=y
+# CONFIG_IP_FIB_TRIE is not set
+CONFIG_IP_FIB_HASH=y
+# CONFIG_IP_MULTIPLE_TABLES is not set
+# CONFIG_IP_ROUTE_MULTIPATH is not set
+# CONFIG_IP_ROUTE_VERBOSE is not set
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_PHONET is not set
+CONFIG_WIRELESS=y
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_OLD_REGULATORY is not set
+CONFIG_WIRELESS_EXT=y
+CONFIG_WIRELESS_EXT_SYSFS=y
+# CONFIG_LIB80211 is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_INTEL_VR_NOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+# CONFIG_MTD_QINFO_PROBE is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# CONFIG_SCSI_LOWLEVEL is not set
+# CONFIG_SCSI_DH is not set
+CONFIG_ATA=y
+# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_SATA_PMP=y
+# CONFIG_SATA_AHCI is not set
+# CONFIG_SATA_SIL24 is not set
+CONFIG_ATA_SFF=y
+# CONFIG_SATA_SVW is not set
+# CONFIG_ATA_PIIX is not set
+# CONFIG_SATA_MV is not set
+# CONFIG_SATA_NV is not set
+# CONFIG_PDC_ADMA is not set
+# CONFIG_SATA_QSTOR is not set
+# CONFIG_SATA_PROMISE is not set
+# CONFIG_SATA_SX4 is not set
+CONFIG_SATA_SIL=y
+# CONFIG_SATA_SIS is not set
+# CONFIG_SATA_ULI is not set
+# CONFIG_SATA_VIA is not set
+# CONFIG_SATA_VITESSE is not set
+# CONFIG_SATA_INIC162X is not set
+# CONFIG_PATA_ALI is not set
+# CONFIG_PATA_AMD is not set
+# CONFIG_PATA_ARTOP is not set
+# CONFIG_PATA_ATIIXP is not set
+# CONFIG_PATA_CMD640_PCI is not set
+# CONFIG_PATA_CMD64X is not set
+# CONFIG_PATA_CS5520 is not set
+# CONFIG_PATA_CS5530 is not set
+# CONFIG_PATA_CYPRESS is not set
+# CONFIG_PATA_EFAR is not set
+# CONFIG_ATA_GENERIC is not set
+# CONFIG_PATA_HPT366 is not set
+# CONFIG_PATA_HPT37X is not set
+# CONFIG_PATA_HPT3X2N is not set
+# CONFIG_PATA_HPT3X3 is not set
+# CONFIG_PATA_IT821X is not set
+# CONFIG_PATA_IT8213 is not set
+# CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_TRIFLEX is not set
+# CONFIG_PATA_MARVELL is not set
+# CONFIG_PATA_MPIIX is not set
+# CONFIG_PATA_OLDPIIX is not set
+# CONFIG_PATA_NETCELL is not set
+# CONFIG_PATA_NINJA32 is not set
+# CONFIG_PATA_NS87410 is not set
+# CONFIG_PATA_NS87415 is not set
+# CONFIG_PATA_OPTI is not set
+# CONFIG_PATA_OPTIDMA is not set
+# CONFIG_PATA_PDC_OLD is not set
+# CONFIG_PATA_RADISYS is not set
+# CONFIG_PATA_RZ1000 is not set
+# CONFIG_PATA_SC1200 is not set
+# CONFIG_PATA_SERVERWORKS is not set
+# CONFIG_PATA_PDC2027X is not set
+# CONFIG_PATA_SIL680 is not set
+# CONFIG_PATA_SIS is not set
+# CONFIG_PATA_VIA is not set
+# CONFIG_PATA_WINBOND is not set
+# CONFIG_PATA_PLATFORM is not set
+# CONFIG_PATA_SCH is not set
+# CONFIG_MD is not set
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+
+#
+# Enable only one of the two stacks, unless you know what you are doing
+#
+# CONFIG_FIREWIRE is not set
+# CONFIG_IEEE1394 is not set
+# CONFIG_I2O is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_ARCNET is not set
+# CONFIG_NET_ETHERNET is not set
+CONFIG_MII=y
+CONFIG_NETDEV_1000=y
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_E1000E is not set
+# CONFIG_IP1000 is not set
+# CONFIG_IGB is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+CONFIG_R8169=y
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SKY2 is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+# CONFIG_QLA3XXX is not set
+# CONFIG_ATL1 is not set
+# CONFIG_ATL1E is not set
+# CONFIG_JME is not set
+# CONFIG_NETDEV_10000 is not set
+# CONFIG_TR is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NET_FC is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+CONFIG_INPUT_FF_MEMLESS=m
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SH_KEYSC is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_NOZOMI is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_SH_SCI_NR_UARTS=6
+CONFIG_SERIAL_SH_SCI_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DEVPORT=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+# CONFIG_I2C_CHARDEV is not set
+CONFIG_I2C_HELPER_AUTO=y
+CONFIG_I2C_ALGOPCA=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# PC SMBus host controller drivers
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_ISCH is not set
+# CONFIG_I2C_PIIX4 is not set
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_SH_MOBILE is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Graphics adapter I2C/DDC channel drivers
+#
+# CONFIG_I2C_VOODOO3 is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+CONFIG_I2C_PCA_PLATFORM=y
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_SPI is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+CONFIG_MFD_SM501=y
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_REGULATOR is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+CONFIG_FB_SYS_FILLRECT=m
+CONFIG_FB_SYS_COPYAREA=m
+CONFIG_FB_SYS_IMAGEBLIT=m
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+CONFIG_FB_SYS_FOPS=m
+CONFIG_FB_DEFERRED_IO=y
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_CIRRUS is not set
+# CONFIG_FB_PM2 is not set
+# CONFIG_FB_CYBER2000 is not set
+# CONFIG_FB_ASILIANT is not set
+# CONFIG_FB_IMSTT is not set
+# CONFIG_FB_S1D13XXX is not set
+# CONFIG_FB_NVIDIA is not set
+# CONFIG_FB_RIVA is not set
+# CONFIG_FB_MATROX is not set
+# CONFIG_FB_RADEON is not set
+# CONFIG_FB_ATY128 is not set
+# CONFIG_FB_ATY is not set
+# CONFIG_FB_S3 is not set
+# CONFIG_FB_SAVAGE is not set
+# CONFIG_FB_SIS is not set
+# CONFIG_FB_VIA is not set
+# CONFIG_FB_NEOMAGIC is not set
+# CONFIG_FB_KYRO is not set
+# CONFIG_FB_3DFX is not set
+# CONFIG_FB_VOODOO1 is not set
+# CONFIG_FB_VT8623 is not set
+# CONFIG_FB_TRIDENT is not set
+# CONFIG_FB_ARK is not set
+# CONFIG_FB_PM3 is not set
+# CONFIG_FB_CARMINE is not set
+CONFIG_FB_SH_MOBILE_LCDC=m
+CONFIG_FB_SM501=y
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_LOGO_LINUX_CLUT224=y
+# CONFIG_LOGO_SUPERH_MONO is not set
+# CONFIG_LOGO_SUPERH_VGA16 is not set
+# CONFIG_LOGO_SUPERH_CLUT224 is not set
+# CONFIG_SOUND is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_HID_PID is not set
+# CONFIG_USB_HIDDEV is not set
+
+#
+# Special HID drivers
+#
+CONFIG_HID_COMPAT=y
+CONFIG_HID_A4TECH=y
+CONFIG_HID_APPLE=y
+CONFIG_HID_BELKIN=y
+CONFIG_HID_CHERRY=y
+CONFIG_HID_CHICONY=y
+CONFIG_HID_CYPRESS=y
+CONFIG_HID_EZKEY=y
+CONFIG_HID_GYRATION=y
+CONFIG_HID_LOGITECH=y
+# CONFIG_LOGITECH_FF is not set
+# CONFIG_LOGIRUMBLEPAD2_FF is not set
+CONFIG_HID_MICROSOFT=y
+CONFIG_HID_MONTEREY=y
+# CONFIG_HID_NTRIG is not set
+CONFIG_HID_PANTHERLORD=y
+# CONFIG_PANTHERLORD_FF is not set
+CONFIG_HID_PETALYNX=y
+CONFIG_HID_SAMSUNG=y
+CONFIG_HID_SONY=y
+CONFIG_HID_SUNPLUS=y
+# CONFIG_GREENASIA_FF is not set
+# CONFIG_HID_TOPSEED is not set
+CONFIG_THRUSTMASTER_FF=m
+CONFIG_ZEROPLUS_FF=m
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+CONFIG_USB_MON=y
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+CONFIG_USB_EHCI_HCD=m
+# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
+# CONFIG_USB_EHCI_TT_NEWSCHED is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+CONFIG_USB_OHCI_HCD=m
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_UHCI_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+CONFIG_USB_R8A66597_HCD=y
+# CONFIG_USB_WHCI_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
+#
+
+#
+# see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+CONFIG_USB_TEST=m
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+# CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_UWB is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_INFINIBAND is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+CONFIG_RTC_DRV_RS5C372=y
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_RTC_DRV_SH is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_FILE_LOCKING=y
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+CONFIG_NTFS_FS=y
+# CONFIG_NTFS_DEBUG is not set
+CONFIG_NTFS_RW=y
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLBFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+CONFIG_MINIX_FS=y
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+CONFIG_NFSD=y
+CONFIG_NFSD_V3=y
+# CONFIG_NFSD_V3_ACL is not set
+CONFIG_NFSD_V4=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+# CONFIG_SUNRPC_REGISTER_V4 is not set
+CONFIG_RPCSEC_GSS_KRB5=y
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+CONFIG_NLS_CODEPAGE_932=y
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+CONFIG_DEBUG_PREEMPT=y
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_FRAME_POINTER is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+
+#
+# Tracers
+#
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_PREEMPT_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+# CONFIG_SH_STANDARD_BIOS is not set
+# CONFIG_EARLY_SCIF_CONSOLE is not set
+# CONFIG_DEBUG_BOOTMEM is not set
+# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_4KSTACKS is not set
+# CONFIG_IRQSTACKS is not set
+# CONFIG_DUMP_CODE is not set
+# CONFIG_SH_NO_BSS_INIT is not set
+# CONFIG_MORE_COMPILE_OPTIONS is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+CONFIG_CRYPTO_HMAC=y
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/sh/configs/urquell_defconfig b/arch/sh/configs/urquell_defconfig
new file mode 100644
index 000000000000..be726c7cdf91
--- /dev/null
+++ b/arch/sh/configs/urquell_defconfig
@@ -0,0 +1,1332 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.29-rc4
+# Thu Mar  5 17:28:13 2009
+#
+CONFIG_SUPERH=y
+CONFIG_SUPERH32=y
+CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
+# CONFIG_ARCH_HIBERNATION_POSSIBLE is not set
+CONFIG_SYS_SUPPORTS_NUMA=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_NO_VIRT_TO_BUS=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+CONFIG_BSD_PROCESS_ACCT=y
+# CONFIG_BSD_PROCESS_ACCT_V3 is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+CONFIG_PROFILING=y
+# CONFIG_OPROFILE is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_IOREMAP_PROT=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_FREEZER is not set
+
+#
+# System type
+#
+CONFIG_CPU_SH4=y
+CONFIG_CPU_SH4A=y
+CONFIG_CPU_SHX3=y
+# CONFIG_CPU_SUBTYPE_SH7619 is not set
+# CONFIG_CPU_SUBTYPE_SH7201 is not set
+# CONFIG_CPU_SUBTYPE_SH7203 is not set
+# CONFIG_CPU_SUBTYPE_SH7206 is not set
+# CONFIG_CPU_SUBTYPE_SH7263 is not set
+# CONFIG_CPU_SUBTYPE_MXG is not set
+# CONFIG_CPU_SUBTYPE_SH7705 is not set
+# CONFIG_CPU_SUBTYPE_SH7706 is not set
+# CONFIG_CPU_SUBTYPE_SH7707 is not set
+# CONFIG_CPU_SUBTYPE_SH7708 is not set
+# CONFIG_CPU_SUBTYPE_SH7709 is not set
+# CONFIG_CPU_SUBTYPE_SH7710 is not set
+# CONFIG_CPU_SUBTYPE_SH7712 is not set
+# CONFIG_CPU_SUBTYPE_SH7720 is not set
+# CONFIG_CPU_SUBTYPE_SH7721 is not set
+# CONFIG_CPU_SUBTYPE_SH7750 is not set
+# CONFIG_CPU_SUBTYPE_SH7091 is not set
+# CONFIG_CPU_SUBTYPE_SH7750R is not set
+# CONFIG_CPU_SUBTYPE_SH7750S is not set
+# CONFIG_CPU_SUBTYPE_SH7751 is not set
+# CONFIG_CPU_SUBTYPE_SH7751R is not set
+# CONFIG_CPU_SUBTYPE_SH7760 is not set
+# CONFIG_CPU_SUBTYPE_SH4_202 is not set
+# CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7763 is not set
+# CONFIG_CPU_SUBTYPE_SH7770 is not set
+# CONFIG_CPU_SUBTYPE_SH7780 is not set
+# CONFIG_CPU_SUBTYPE_SH7785 is not set
+CONFIG_CPU_SUBTYPE_SH7786=y
+# CONFIG_CPU_SUBTYPE_SHX3 is not set
+# CONFIG_CPU_SUBTYPE_SH7343 is not set
+# CONFIG_CPU_SUBTYPE_SH7722 is not set
+# CONFIG_CPU_SUBTYPE_SH7366 is not set
+# CONFIG_CPU_SUBTYPE_SH5_101 is not set
+# CONFIG_CPU_SUBTYPE_SH5_103 is not set
+
+#
+# Memory management options
+#
+CONFIG_QUICKLIST=y
+CONFIG_MMU=y
+CONFIG_PAGE_OFFSET=0x80000000
+CONFIG_MEMORY_START=0x08000000
+CONFIG_MEMORY_SIZE=0x08000000
+CONFIG_29BIT=y
+# CONFIG_X2TLB is not set
+CONFIG_VSYSCALL=y
+# CONFIG_NUMA is not set
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_DEFAULT=y
+CONFIG_MAX_ACTIVE_REGIONS=1
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_8KB is not set
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_ENTRY_OFFSET=0x00001000
+CONFIG_SELECT_MEMORY_MODEL=y
+# CONFIG_FLATMEM_MANUAL is not set
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+CONFIG_SPARSEMEM_MANUAL=y
+CONFIG_SPARSEMEM=y
+CONFIG_HAVE_MEMORY_PRESENT=y
+CONFIG_SPARSEMEM_STATIC=y
+# CONFIG_MEMORY_HOTPLUG is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_MIGRATION=y
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_NR_QUICK=2
+CONFIG_UNEVICTABLE_LRU=y
+
+#
+# Cache configuration
+#
+# CONFIG_SH_DIRECT_MAPPED is not set
+CONFIG_CACHE_WRITEBACK=y
+# CONFIG_CACHE_WRITETHROUGH is not set
+# CONFIG_CACHE_OFF is not set
+
+#
+# Processor features
+#
+CONFIG_CPU_LITTLE_ENDIAN=y
+# CONFIG_CPU_BIG_ENDIAN is not set
+CONFIG_SH_FPU=y
+CONFIG_SH_STORE_QUEUES=y
+CONFIG_CPU_HAS_INTEVT=y
+CONFIG_CPU_HAS_SR_RB=y
+CONFIG_CPU_HAS_FPU=y
+
+#
+# Board support
+#
+CONFIG_SH_URQUELL=y
+
+#
+# Timer and clock configuration
+#
+CONFIG_SH_TMU=y
+CONFIG_SH_TIMER_IRQ=16
+CONFIG_SH_PCLK_FREQ=33333333
+CONFIG_TICK_ONESHOT=y
+# CONFIG_NO_HZ is not set
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+
+#
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+
+#
+# DMA support
+#
+# CONFIG_SH_DMA is not set
+
+#
+# Companion Chips
+#
+
+#
+# Additional SuperH Device Drivers
+#
+CONFIG_HEARTBEAT=y
+# CONFIG_PUSH_SWITCH is not set
+
+#
+# Kernel features
+#
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+CONFIG_SCHED_HRTICK=y
+CONFIG_KEXEC=y
+# CONFIG_CRASH_DUMP is not set
+# CONFIG_SECCOMP is not set
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+CONFIG_GUSA=y
+
+#
+# Boot options
+#
+CONFIG_ZERO_PAGE_OFFSET=0x00001000
+CONFIG_BOOT_LINK_OFFSET=0x00800000
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE="console=ttySC1, 38400 earlyprintk=serial ip=on ignore_loglevel root=/dev/nfs ip=dhcp memchunk.vpu=4m"
+
+#
+# Bus options
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options (EXPERIMENTAL)
+#
+# CONFIG_PM is not set
+# CONFIG_CPU_IDLE is not set
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_COMPAT_NET_DEV_OPS=y
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_ASK_IP_FIB_HASH=y
+# CONFIG_IP_FIB_TRIE is not set
+CONFIG_IP_FIB_HASH=y
+# CONFIG_IP_MULTIPLE_TABLES is not set
+# CONFIG_IP_ROUTE_MULTIPATH is not set
+# CONFIG_IP_ROUTE_VERBOSE is not set
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_PHONET is not set
+CONFIG_WIRELESS=y
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_OLD_REGULATORY is not set
+CONFIG_WIRELESS_EXT=y
+CONFIG_WIRELESS_EXT_SYSFS=y
+# CONFIG_LIB80211 is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+# CONFIG_MTD_QINFO_PROBE is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# CONFIG_SCSI_LOWLEVEL is not set
+# CONFIG_SCSI_DH is not set
+CONFIG_ATA=y
+# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_SATA_PMP=y
+CONFIG_ATA_SFF=y
+# CONFIG_SATA_MV is not set
+# CONFIG_PATA_PLATFORM is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
+# CONFIG_STNIC is not set
+CONFIG_SMC91X=y
+# CONFIG_SMC911X is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+CONFIG_INPUT_FF_MEMLESS=m
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_GPIO is not set
+# CONFIG_KEYBOARD_SH_KEYSC is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_SH_SCI_NR_UARTS=6
+CONFIG_SERIAL_SH_SCI_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+# CONFIG_I2C_CHARDEV is not set
+CONFIG_I2C_HELPER_AUTO=y
+CONFIG_I2C_ALGOPCA=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_SH_MOBILE is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+CONFIG_I2C_PCA_PLATFORM=y
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_SPI is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+CONFIG_MFD_SM501=y
+# CONFIG_MFD_SM501_GPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_REGULATOR is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+CONFIG_FB_SYS_FILLRECT=m
+CONFIG_FB_SYS_COPYAREA=m
+CONFIG_FB_SYS_IMAGEBLIT=m
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+CONFIG_FB_SYS_FOPS=m
+CONFIG_FB_DEFERRED_IO=y
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_SH_MOBILE_LCDC=m
+CONFIG_FB_SM501=y
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+CONFIG_LOGO_LINUX_CLUT224=y
+# CONFIG_LOGO_SUPERH_MONO is not set
+# CONFIG_LOGO_SUPERH_VGA16 is not set
+# CONFIG_LOGO_SUPERH_CLUT224 is not set
+# CONFIG_SOUND is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_HID_PID is not set
+# CONFIG_USB_HIDDEV is not set
+
+#
+# Special HID drivers
+#
+CONFIG_HID_COMPAT=y
+CONFIG_HID_A4TECH=y
+CONFIG_HID_APPLE=y
+CONFIG_HID_BELKIN=y
+CONFIG_HID_CHERRY=y
+CONFIG_HID_CHICONY=y
+CONFIG_HID_CYPRESS=y
+CONFIG_HID_EZKEY=y
+CONFIG_HID_GYRATION=y
+CONFIG_HID_LOGITECH=y
+# CONFIG_LOGITECH_FF is not set
+# CONFIG_LOGIRUMBLEPAD2_FF is not set
+CONFIG_HID_MICROSOFT=y
+CONFIG_HID_MONTEREY=y
+# CONFIG_HID_NTRIG is not set
+CONFIG_HID_PANTHERLORD=y
+# CONFIG_PANTHERLORD_FF is not set
+CONFIG_HID_PETALYNX=y
+CONFIG_HID_SAMSUNG=y
+CONFIG_HID_SONY=y
+CONFIG_HID_SUNPLUS=y
+# CONFIG_GREENASIA_FF is not set
+# CONFIG_HID_TOPSEED is not set
+CONFIG_THRUSTMASTER_FF=m
+CONFIG_ZEROPLUS_FF=m
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+CONFIG_USB_MON=y
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
+#
+
+#
+# see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+# CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_FILE_LOCKING=y
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+CONFIG_NTFS_FS=y
+# CONFIG_NTFS_DEBUG is not set
+CONFIG_NTFS_RW=y
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLBFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+CONFIG_MINIX_FS=y
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+CONFIG_NFS_V4=y
+CONFIG_ROOT_NFS=y
+CONFIG_NFSD=y
+CONFIG_NFSD_V3=y
+# CONFIG_NFSD_V3_ACL is not set
+CONFIG_NFSD_V4=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+# CONFIG_SUNRPC_REGISTER_V4 is not set
+CONFIG_RPCSEC_GSS_KRB5=y
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+CONFIG_NLS_CODEPAGE_932=y
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+
+#
+# Tracers
+#
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_SH_STANDARD_BIOS is not set
+# CONFIG_EARLY_SCIF_CONSOLE is not set
+# CONFIG_MORE_COMPILE_OPTIONS is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+CONFIG_CRYPTO_HMAC=y
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/sh/drivers/dma/Kconfig b/arch/sh/drivers/dma/Kconfig
index 01936368b8b0..f13a05285a9d 100644
--- a/arch/sh/drivers/dma/Kconfig
+++ b/arch/sh/drivers/dma/Kconfig
@@ -9,13 +9,21 @@ config SH_DMA
         select SH_DMA_API
         default n
 
+config SH_DMA_IRQ_MULTI
+        bool
+        depends on SH_DMA
+        default y if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7751 || \
+                CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R || \
+                CPU_SUBTYPE_SH7091 || CPU_SUBTYPE_SH7763 || CPU_SUBTYPE_SH7764 || \
+                CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785
+
 config NR_ONCHIP_DMA_CHANNELS
         int
         depends on SH_DMA
-        default "6" if CPU_SUBTYPE_SH7720 || CPU_SUBTYPE_SH7721
-        default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R
-        default "12" if CPU_SUBTYPE_SH7780
-        default "4"
+        default "4" if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7750S
+        default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R || CPU_SUBTYPE_SH7760
+        default "12" if CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785
+        default "6"
         help
           This allows you to specify the number of channels that the on-chip
           DMAC supports. This will be 4 for SH7750/SH7751 and 8 for the
@@ -46,4 +54,28 @@ config SH_DMABRG
           of the SH7760.
           Say Y if you want to use Audio/USB DMA on your SH7760 board.
 
+config PVR2_DMA
+        tristate "PowerVR 2 DMAC support"
+        depends on SH_DREAMCAST && SH_DMA
+        help
+          Selecting this will enable support for the PVR2 DMA controller.
+          As this chains off of the on-chip DMAC, that must also be
+          enabled by default.
+
+          This is primarily used by the pvr2fb framebuffer driver for
+          certain optimizations, but is not necessary for functionality.
+
+          If in doubt, say N.
+
+config G2_DMA
+        tristate "G2 Bus DMA support"
+        depends on SH_DREAMCAST
+        select SH_DMA_API
+        help
+          This enables support for the DMA controller for the Dreamcast's
+          G2 bus. Drivers that want this will generally enable this on
+          their own.
+
+          If in doubt, say N.
+
 endmenu
diff --git a/arch/sh/drivers/dma/Makefile b/arch/sh/drivers/dma/Makefile
index ab956adacb47..c6068137b46f 100644
--- a/arch/sh/drivers/dma/Makefile
+++ b/arch/sh/drivers/dma/Makefile
@@ -4,5 +4,6 @@
 
 obj-$(CONFIG_SH_DMA_API)        += dma-api.o dma-sysfs.o
 obj-$(CONFIG_SH_DMA)            += dma-sh.o
-obj-$(CONFIG_SH_DREAMCAST)      += dma-pvr2.o dma-g2.o
+obj-$(CONFIG_PVR2_DMA)          += dma-pvr2.o
+obj-$(CONFIG_G2_DMA)            += dma-g2.o
 obj-$(CONFIG_SH_DMABRG)         += dmabrg.o
diff --git a/arch/sh/drivers/dma/dma-sh.c b/arch/sh/drivers/dma/dma-sh.c
index 50887a592dd0..37fb5b8bbc3f 100644
--- a/arch/sh/drivers/dma/dma-sh.c
+++ b/arch/sh/drivers/dma/dma-sh.c
@@ -17,28 +17,16 @@
 #include <mach-dreamcast/mach/dma.h>
 #include <asm/dma.h>
 #include <asm/io.h>
-#include "dma-sh.h"
-
-static int dmte_irq_map[] = {
-        DMTE0_IRQ,
-        DMTE1_IRQ,
-        DMTE2_IRQ,
-        DMTE3_IRQ,
-#if defined(CONFIG_CPU_SUBTYPE_SH7720)  ||      \
-    defined(CONFIG_CPU_SUBTYPE_SH7721)  ||      \
-    defined(CONFIG_CPU_SUBTYPE_SH7751R) ||      \
-    defined(CONFIG_CPU_SUBTYPE_SH7760)  ||      \
-    defined(CONFIG_CPU_SUBTYPE_SH7709)  ||      \
-    defined(CONFIG_CPU_SUBTYPE_SH7780)
-        DMTE4_IRQ,
-        DMTE5_IRQ,
-#endif
-#if defined(CONFIG_CPU_SUBTYPE_SH7751R) ||      \
-    defined(CONFIG_CPU_SUBTYPE_SH7760)  ||      \
-    defined(CONFIG_CPU_SUBTYPE_SH7780)
-        DMTE6_IRQ,
-        DMTE7_IRQ,
+#include <asm/dma-sh.h>
+
+#if defined(DMAE1_IRQ)
+#define NR_DMAE         2
+#else
+#define NR_DMAE         1
 #endif
+
+static const char *dmae_name[] = {
+        "DMAC Address Error0", "DMAC Address Error1"
 };
 
 static inline unsigned int get_dmte_irq(unsigned int chan)
@@ -46,7 +34,14 @@ static inline unsigned int get_dmte_irq(unsigned int chan)
         unsigned int irq = 0;
         if (chan < ARRAY_SIZE(dmte_irq_map))
                 irq = dmte_irq_map[chan];
+
+#if defined(CONFIG_SH_DMA_IRQ_MULTI)
+        if (irq > DMTE6_IRQ)
+                return DMTE6_IRQ;
+        return DMTE0_IRQ;
+#else
         return irq;
+#endif
 }
 
 /*
@@ -59,7 +54,7 @@ static inline unsigned int get_dmte_irq(unsigned int chan)
  */
 static inline unsigned int calc_xmit_shift(struct dma_channel *chan)
 {
-        u32 chcr = ctrl_inl(CHCR[chan->chan]);
+        u32 chcr = ctrl_inl(dma_base_addr[chan->chan] + CHCR);
 
         return ts_shift[(chcr & CHCR_TS_MASK)>>CHCR_TS_SHIFT];
 }
@@ -75,13 +70,13 @@ static irqreturn_t dma_tei(int irq, void *dev_id)
         struct dma_channel *chan = dev_id;
         u32 chcr;
 
-        chcr = ctrl_inl(CHCR[chan->chan]);
+        chcr = ctrl_inl(dma_base_addr[chan->chan] + CHCR);
 
         if (!(chcr & CHCR_TE))
                 return IRQ_NONE;
 
         chcr &= ~(CHCR_IE | CHCR_DE);
-        ctrl_outl(chcr, CHCR[chan->chan]);
+        ctrl_outl(chcr, (dma_base_addr[chan->chan] + CHCR));
 
         wake_up(&chan->wait_queue);
 
@@ -94,7 +89,12 @@ static int sh_dmac_request_dma(struct dma_channel *chan)
                 return 0;
 
         return request_irq(get_dmte_irq(chan->chan), dma_tei,
-                           IRQF_DISABLED, chan->dev_id, chan);
+#if defined(CONFIG_SH_DMA_IRQ_MULTI)
+                                IRQF_SHARED,
+#else
+                                IRQF_DISABLED,
+#endif
+                                chan->dev_id, chan);
 }
 
 static void sh_dmac_free_dma(struct dma_channel *chan)
@@ -115,7 +115,7 @@ sh_dmac_configure_channel(struct dma_channel *chan, unsigned long chcr)
                 chan->flags &= ~DMA_TEI_CAPABLE;
         }
 
-        ctrl_outl(chcr, CHCR[chan->chan]);
+        ctrl_outl(chcr, (dma_base_addr[chan->chan] + CHCR));
 
         chan->flags |= DMA_CONFIGURED;
         return 0;
@@ -126,13 +126,13 @@ static void sh_dmac_enable_dma(struct dma_channel *chan)
         int irq;
         u32 chcr;
 
-        chcr = ctrl_inl(CHCR[chan->chan]);
+        chcr = ctrl_inl(dma_base_addr[chan->chan] + CHCR);
         chcr |= CHCR_DE;
 
         if (chan->flags & DMA_TEI_CAPABLE)
                 chcr |= CHCR_IE;
 
-        ctrl_outl(chcr, CHCR[chan->chan]);
+        ctrl_outl(chcr, (dma_base_addr[chan->chan] + CHCR));
 
         if (chan->flags & DMA_TEI_CAPABLE) {
                 irq = get_dmte_irq(chan->chan);
@@ -150,9 +150,9 @@ static void sh_dmac_disable_dma(struct dma_channel *chan)
                 disable_irq(irq);
         }
 
-        chcr = ctrl_inl(CHCR[chan->chan]);
+        chcr = ctrl_inl(dma_base_addr[chan->chan] + CHCR);
         chcr &= ~(CHCR_DE | CHCR_TE | CHCR_IE);
-        ctrl_outl(chcr, CHCR[chan->chan]);
+        ctrl_outl(chcr, (dma_base_addr[chan->chan] + CHCR));
 }
 
 static int sh_dmac_xfer_dma(struct dma_channel *chan)
@@ -183,12 +183,13 @@ static int sh_dmac_xfer_dma(struct dma_channel *chan)
          */
         if (chan->sar || (mach_is_dreamcast() &&
                           chan->chan == PVR2_CASCADE_CHAN))
-                ctrl_outl(chan->sar, SAR[chan->chan]);
+                ctrl_outl(chan->sar, (dma_base_addr[chan->chan]+SAR));
         if (chan->dar || (mach_is_dreamcast() &&
                           chan->chan == PVR2_CASCADE_CHAN))
-                ctrl_outl(chan->dar, DAR[chan->chan]);
+                ctrl_outl(chan->dar, (dma_base_addr[chan->chan] + DAR));
 
-        ctrl_outl(chan->count >> calc_xmit_shift(chan), DMATCR[chan->chan]);
+        ctrl_outl(chan->count >> calc_xmit_shift(chan),
+                (dma_base_addr[chan->chan] + TCR));
 
         sh_dmac_enable_dma(chan);
 
@@ -197,36 +198,26 @@ static int sh_dmac_xfer_dma(struct dma_channel *chan)
 
 static int sh_dmac_get_dma_residue(struct dma_channel *chan)
 {
-        if (!(ctrl_inl(CHCR[chan->chan]) & CHCR_DE))
+        if (!(ctrl_inl(dma_base_addr[chan->chan] + CHCR) & CHCR_DE))
                 return 0;
 
-        return ctrl_inl(DMATCR[chan->chan]) << calc_xmit_shift(chan);
+        return ctrl_inl(dma_base_addr[chan->chan] + TCR)
+                 << calc_xmit_shift(chan);
 }
 
-#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
-    defined(CONFIG_CPU_SUBTYPE_SH7721) || \
-    defined(CONFIG_CPU_SUBTYPE_SH7780) || \
-    defined(CONFIG_CPU_SUBTYPE_SH7709)
-#define dmaor_read_reg()        ctrl_inw(DMAOR)
-#define dmaor_write_reg(data)   ctrl_outw(data, DMAOR)
-#else
-#define dmaor_read_reg()        ctrl_inl(DMAOR)
-#define dmaor_write_reg(data)   ctrl_outl(data, DMAOR)
-#endif
-
-static inline int dmaor_reset(void)
+static inline int dmaor_reset(int no)
 {
-        unsigned long dmaor = dmaor_read_reg();
+        unsigned long dmaor = dmaor_read_reg(no);
 
         /* Try to clear the error flags first, incase they are set */
         dmaor &= ~(DMAOR_NMIF | DMAOR_AE);
-        dmaor_write_reg(dmaor);
+        dmaor_write_reg(no, dmaor);
 
         dmaor |= DMAOR_INIT;
-        dmaor_write_reg(dmaor);
+        dmaor_write_reg(no, dmaor);
 
         /* See if we got an error again */
-        if ((dmaor_read_reg() & (DMAOR_AE | DMAOR_NMIF))) {
+        if ((dmaor_read_reg(no) & (DMAOR_AE | DMAOR_NMIF))) {
                 printk(KERN_ERR "dma-sh: Can't initialize DMAOR.\n");
                 return -EINVAL;
         }
@@ -237,10 +228,33 @@ static inline int dmaor_reset(void)
 #if defined(CONFIG_CPU_SH4)
 static irqreturn_t dma_err(int irq, void *dummy)
 {
-        dmaor_reset();
+#if defined(CONFIG_SH_DMA_IRQ_MULTI)
+        int cnt = 0;
+        switch (irq) {
+#if defined(DMTE6_IRQ) && defined(DMAE1_IRQ)
+        case DMTE6_IRQ:
+                cnt++;
+#endif
+        case DMTE0_IRQ:
+                if (dmaor_read_reg(cnt) & (DMAOR_NMIF | DMAOR_AE)) {
+                        disable_irq(irq);
+                        /* DMA multi and error IRQ */
+                        return IRQ_HANDLED;
+                }
+        default:
+                return IRQ_NONE;
+        }
+#else
+        dmaor_reset(0);
+#if defined(CONFIG_CPU_SUBTYPE_SH7723)  || \
+                defined(CONFIG_CPU_SUBTYPE_SH7780)      || \
+                defined(CONFIG_CPU_SUBTYPE_SH7785)
+        dmaor_reset(1);
+#endif
         disable_irq(irq);
 
         return IRQ_HANDLED;
+#endif
 }
 #endif
 
@@ -259,24 +273,59 @@ static struct dma_info sh_dmac_info = {
         .flags          = DMAC_CHANNELS_TEI_CAPABLE,
 };
 
+#ifdef CONFIG_CPU_SH4
+static unsigned int get_dma_error_irq(int n)
+{
+#if defined(CONFIG_SH_DMA_IRQ_MULTI)
+        return (n == 0) ? get_dmte_irq(0) : get_dmte_irq(6);
+#else
+        return (n == 0) ? DMAE0_IRQ :
+#if defined(DMAE1_IRQ)
+                                DMAE1_IRQ;
+#else
+                                -1;
+#endif
+#endif
+}
+#endif
+
 static int __init sh_dmac_init(void)
 {
         struct dma_info *info = &sh_dmac_info;
         int i;
 
 #ifdef CONFIG_CPU_SH4
-        i = request_irq(DMAE_IRQ, dma_err, IRQF_DISABLED, "DMAC Address Error", 0);
-        if (unlikely(i < 0))
-                return i;
+        int n;
+
+        for (n = 0; n < NR_DMAE; n++) {
+                i = request_irq(get_dma_error_irq(n), dma_err,
+#if defined(CONFIG_SH_DMA_IRQ_MULTI)
+                                IRQF_SHARED,
+#else
+                                IRQF_DISABLED,
 #endif
+                                dmae_name[n], (void *)dmae_name[n]);
+                if (unlikely(i < 0)) {
+                        printk(KERN_ERR "%s request_irq fail\n", dmae_name[n]);
+                        return i;
+                }
+        }
+#endif /* CONFIG_CPU_SH4 */
 
         /*
          * Initialize DMAOR, and clean up any error flags that may have
          * been set.
          */
-        i = dmaor_reset();
+        i = dmaor_reset(0);
+        if (unlikely(i != 0))
+                return i;
+#if defined(CONFIG_CPU_SUBTYPE_SH7723)  || \
+                defined(CONFIG_CPU_SUBTYPE_SH7780)      || \
+                defined(CONFIG_CPU_SUBTYPE_SH7785)
+        i = dmaor_reset(1);
         if (unlikely(i != 0))
                 return i;
+#endif
 
         return register_dmac(info);
 }
@@ -284,8 +333,12 @@ static int __init sh_dmac_init(void)
 static void __exit sh_dmac_exit(void)
 {
 #ifdef CONFIG_CPU_SH4
-        free_irq(DMAE_IRQ, 0);
-#endif
+        int n;
+
+        for (n = 0; n < NR_DMAE; n++) {
+                free_irq(get_dma_error_irq(n), (void *)dmae_name[n]);
+        }
+#endif /* CONFIG_CPU_SH4 */
         unregister_dmac(&sh_dmac_info);
 }
 
diff --git a/arch/sh/drivers/dma/dma-sh.h b/arch/sh/drivers/dma/dma-sh.h
deleted file mode 100644
index 05fecd5428e4..000000000000
--- a/arch/sh/drivers/dma/dma-sh.h
+++ /dev/null
@@ -1,75 +0,0 @@
-/*
- * arch/sh/drivers/dma/dma-sh.h
- *
- * Copyright (C) 2000  Takashi YOSHII
- * Copyright (C) 2003  Paul Mundt
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef __DMA_SH_H
-#define __DMA_SH_H
-
-#include <cpu/dma.h>
-
-/* Definitions for the SuperH DMAC */
-#define REQ_L   0x00000000
-#define REQ_E   0x00080000
-#define RACK_H  0x00000000
-#define RACK_L  0x00040000
-#define ACK_R   0x00000000
-#define ACK_W   0x00020000
-#define ACK_H   0x00000000
-#define ACK_L   0x00010000
-#define DM_INC  0x00004000
-#define DM_DEC  0x00008000
-#define SM_INC  0x00001000
-#define SM_DEC  0x00002000
-#define RS_IN   0x00000200
-#define RS_OUT  0x00000300
-#define TS_BLK  0x00000040
-#define TM_BUR  0x00000020
-#define CHCR_DE 0x00000001
-#define CHCR_TE 0x00000002
-#define CHCR_IE 0x00000004
-
-/* DMAOR definitions */
-#define DMAOR_AE        0x00000004
-#define DMAOR_NMIF      0x00000002
-#define DMAOR_DME       0x00000001
-
-/*
- * Define the default configuration for dual address memory-memory transfer.
- * The 0x400 value represents auto-request, external->external.
- */
-#define RS_DUAL (DM_INC | SM_INC | 0x400 | TS_32)
-
-#define MAX_DMAC_CHANNELS       (CONFIG_NR_ONCHIP_DMA_CHANNELS)
-
-/*
- * Subtypes that have fewer channels than this simply need to change
- * CONFIG_NR_ONCHIP_DMA_CHANNELS. Likewise, subtypes with a larger number
- * of channels should expand on this.
- *
- * For most subtypes we can easily figure these values out with some
- * basic calculation, unfortunately on other subtypes these are more
- * scattered, so we just leave it unrolled for simplicity.
- */
-#define SAR     ((unsigned long[]){SH_DMAC_BASE + 0x00, SH_DMAC_BASE + 0x10, \
-                                   SH_DMAC_BASE + 0x20, SH_DMAC_BASE + 0x30, \
-                                   SH_DMAC_BASE + 0x50, SH_DMAC_BASE + 0x60})
-#define DAR     ((unsigned long[]){SH_DMAC_BASE + 0x04, SH_DMAC_BASE + 0x14, \
-                                   SH_DMAC_BASE + 0x24, SH_DMAC_BASE + 0x34, \
-                                   SH_DMAC_BASE + 0x54, SH_DMAC_BASE + 0x64})
-#define DMATCR  ((unsigned long[]){SH_DMAC_BASE + 0x08, SH_DMAC_BASE + 0x18, \
-                                   SH_DMAC_BASE + 0x28, SH_DMAC_BASE + 0x38, \
-                                   SH_DMAC_BASE + 0x58, SH_DMAC_BASE + 0x68})
-#define CHCR    ((unsigned long[]){SH_DMAC_BASE + 0x0c, SH_DMAC_BASE + 0x1c, \
-                                   SH_DMAC_BASE + 0x2c, SH_DMAC_BASE + 0x3c, \
-                                   SH_DMAC_BASE + 0x5c, SH_DMAC_BASE + 0x6c})
-
-#define DMAOR   (SH_DMAC_BASE + 0x40)
-
-#endif /* __DMA_SH_H */
-
diff --git a/arch/sh/drivers/pci/pci-sh7780.c b/arch/sh/drivers/pci/pci-sh7780.c
index 078dc44d6b08..773d575a04b9 100644
--- a/arch/sh/drivers/pci/pci-sh7780.c
+++ b/arch/sh/drivers/pci/pci-sh7780.c
@@ -127,8 +127,8 @@ int __init sh7780_pcic_init(struct sh4_pci_address_map *map)
         pci_write_reg(word, SH4_PCILSR0);
         pci_write_reg(0x00000001, SH4_PCILSR1);
         /* Set the values on window 0 PCI config registers */
-        word = (CONFIG_MEMORY_SIZE > 0x08000000) ? 0x10000000 : 0x08000000;
-        pci_write_reg(word | 0xa0000000, SH4_PCILAR0);
+        word = CONFIG_MEMORY_START | (CONFIG_MEMORY_SIZE - 0x01000000);
+        pci_write_reg(word, SH4_PCILAR0);
         pci_write_reg(word, SH7780_PCIMBAR0);
         /* Set the values on window 1 PCI config registers */
         pci_write_reg(0x00000000, SH4_PCILAR1);
diff --git a/arch/sh/include/asm/addrspace.h b/arch/sh/include/asm/addrspace.h
index 36736c7e93db..80d40813e057 100644
--- a/arch/sh/include/asm/addrspace.h
+++ b/arch/sh/include/asm/addrspace.h
@@ -31,7 +31,7 @@
 /* Returns the physical address of a PnSEG (n=1,2) address   */
 #define PHYSADDR(a)     (((unsigned long)(a)) & 0x1fffffff)
 
-#ifdef CONFIG_29BIT
+#if defined(CONFIG_29BIT) || defined(CONFIG_PMB_FIXED)
 /*
  * Map an address to a certain privileged segment
  */
@@ -43,7 +43,7 @@
         ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG))
 #define P4SEGADDR(a)    \
         ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG))
-#endif /* 29BIT */
+#endif /* 29BIT || PMB_FIXED */
 #endif /* P1SEG */
 
 /* Check if an address can be reached in 29 bits */
diff --git a/arch/sh/include/asm/atomic-irq.h b/arch/sh/include/asm/atomic-irq.h
index 74f7943cff6f..a0b348068cae 100644
--- a/arch/sh/include/asm/atomic-irq.h
+++ b/arch/sh/include/asm/atomic-irq.h
@@ -11,7 +11,7 @@ static inline void atomic_add(int i, atomic_t *v)
         unsigned long flags;
 
         local_irq_save(flags);
-        *(long *)v += i;
+        v->counter += i;
         local_irq_restore(flags);
 }
 
@@ -20,7 +20,7 @@ static inline void atomic_sub(int i, atomic_t *v)
         unsigned long flags;
 
         local_irq_save(flags);
-        *(long *)v -= i;
+        v->counter -= i;
         local_irq_restore(flags);
 }
 
@@ -29,9 +29,9 @@ static inline int atomic_add_return(int i, atomic_t *v)
         unsigned long temp, flags;
 
         local_irq_save(flags);
-        temp = *(long *)v;
+        temp = v->counter;
         temp += i;
-        *(long *)v = temp;
+        v->counter = temp;
         local_irq_restore(flags);
 
         return temp;
@@ -42,9 +42,9 @@ static inline int atomic_sub_return(int i, atomic_t *v)
         unsigned long temp, flags;
 
         local_irq_save(flags);
-        temp = *(long *)v;
+        temp = v->counter;
         temp -= i;
-        *(long *)v = temp;
+        v->counter = temp;
         local_irq_restore(flags);
 
         return temp;
@@ -55,7 +55,7 @@ static inline void atomic_clear_mask(unsigned int mask, atomic_t *v)
         unsigned long flags;
 
         local_irq_save(flags);
-        *(long *)v &= ~mask;
+        v->counter &= ~mask;
         local_irq_restore(flags);
 }
 
@@ -64,7 +64,7 @@ static inline void atomic_set_mask(unsigned int mask, atomic_t *v)
         unsigned long flags;
 
         local_irq_save(flags);
-        *(long *)v |= mask;
+        v->counter |= mask;
         local_irq_restore(flags);
 }
 
diff --git a/arch/sh/include/asm/bitops-llsc.h b/arch/sh/include/asm/bitops-llsc.h
index 1d2fc0b010ad..d8328be06191 100644
--- a/arch/sh/include/asm/bitops-llsc.h
+++ b/arch/sh/include/asm/bitops-llsc.h
@@ -1,7 +1,7 @@
 #ifndef __ASM_SH_BITOPS_LLSC_H
 #define __ASM_SH_BITOPS_LLSC_H
 
-static inline void set_bit(int nr, volatile void * addr)
+static inline void set_bit(int nr, volatile void *addr)
 {
         int     mask;
         volatile unsigned int *a = addr;
@@ -13,16 +13,16 @@ static inline void set_bit(int nr, volatile void * addr)
         __asm__ __volatile__ (
                 "1:                                             \n\t"
                 "movli.l        @%1, %0 ! set_bit               \n\t"
-                "or             %3, %0                          \n\t"
+                "or             %2, %0                          \n\t"
                 "movco.l        %0, @%1                         \n\t"
                 "bf             1b                              \n\t"
-                : "=&z" (tmp), "=r" (a)
-                : "1" (a), "r" (mask)
+                : "=&z" (tmp)
+                : "r" (a), "r" (mask)
                 : "t", "memory"
         );
 }
 
-static inline void clear_bit(int nr, volatile void * addr)
+static inline void clear_bit(int nr, volatile void *addr)
 {
         int     mask;
         volatile unsigned int *a = addr;
@@ -34,16 +34,16 @@ static inline void clear_bit(int nr, volatile void * addr)
         __asm__ __volatile__ (
                 "1:                                             \n\t"
                 "movli.l        @%1, %0 ! clear_bit             \n\t"
-                "and            %3, %0                          \n\t"
+                "and            %2, %0                          \n\t"
                 "movco.l        %0, @%1                         \n\t"
                 "bf             1b                              \n\t"
-                : "=&z" (tmp), "=r" (a)
-                : "1" (a), "r" (~mask)
+                : "=&z" (tmp)
+                : "r" (a), "r" (~mask)
                 : "t", "memory"
         );
 }
 
-static inline void change_bit(int nr, volatile void * addr)
+static inline void change_bit(int nr, volatile void *addr)
 {
         int     mask;
         volatile unsigned int *a = addr;
@@ -55,16 +55,16 @@ static inline void change_bit(int nr, volatile void * addr)
         __asm__ __volatile__ (
                 "1:                                             \n\t"
                 "movli.l        @%1, %0 ! change_bit            \n\t"
-                "xor            %3, %0                          \n\t"
+                "xor            %2, %0                          \n\t"
                 "movco.l        %0, @%1                         \n\t"
                 "bf             1b                              \n\t"
-                : "=&z" (tmp), "=r" (a)
-                : "1" (a), "r" (mask)
+                : "=&z" (tmp)
+                : "r" (a), "r" (mask)
                 : "t", "memory"
         );
 }
 
-static inline int test_and_set_bit(int nr, volatile void * addr)
+static inline int test_and_set_bit(int nr, volatile void *addr)
 {
         int     mask, retval;
         volatile unsigned int *a = addr;
@@ -75,21 +75,21 @@ static inline int test_and_set_bit(int nr, volatile void * addr)
 
         __asm__ __volatile__ (
                 "1:                                             \n\t"
-                "movli.l        @%1, %0 ! test_and_set_bit      \n\t"
-                "mov            %0, %2                          \n\t"
-                "or             %4, %0                          \n\t"
-                "movco.l        %0, @%1                         \n\t"
+                "movli.l        @%2, %0 ! test_and_set_bit      \n\t"
+                "mov            %0, %1                          \n\t"
+                "or             %3, %0                          \n\t"
+                "movco.l        %0, @%2                         \n\t"
                 "bf             1b                              \n\t"
-                "and            %4, %2                          \n\t"
-                : "=&z" (tmp), "=r" (a), "=&r" (retval)
-                : "1" (a), "r" (mask)
+                "and            %3, %1                          \n\t"
+                : "=&z" (tmp), "=&r" (retval)
+                : "r" (a), "r" (mask)
                 : "t", "memory"
         );
 
         return retval != 0;
 }
 
-static inline int test_and_clear_bit(int nr, volatile void * addr)
+static inline int test_and_clear_bit(int nr, volatile void *addr)
 {
         int     mask, retval;
         volatile unsigned int *a = addr;
@@ -100,22 +100,22 @@ static inline int test_and_clear_bit(int nr, volatile void * addr)
 
         __asm__ __volatile__ (
                 "1:                                             \n\t"
-                "movli.l        @%1, %0 ! test_and_clear_bit    \n\t"
-                "mov            %0, %2                          \n\t"
-                "and            %5, %0                          \n\t"
-                "movco.l        %0, @%1                         \n\t"
+                "movli.l        @%2, %0 ! test_and_clear_bit    \n\t"
+                "mov            %0, %1                          \n\t"
+                "and            %4, %0                          \n\t"
+                "movco.l        %0, @%2                         \n\t"
                 "bf             1b                              \n\t"
-                "and            %4, %2                          \n\t"
+                "and            %3, %1                          \n\t"
                 "synco                                          \n\t"
-                : "=&z" (tmp), "=r" (a), "=&r" (retval)
-                : "1" (a), "r" (mask), "r" (~mask)
+                : "=&z" (tmp), "=&r" (retval)
+                : "r" (a), "r" (mask), "r" (~mask)
                 : "t", "memory"
         );
 
         return retval != 0;
 }
 
-static inline int test_and_change_bit(int nr, volatile void * addr)
+static inline int test_and_change_bit(int nr, volatile void *addr)
 {
         int     mask, retval;
         volatile unsigned int *a = addr;
@@ -126,15 +126,15 @@ static inline int test_and_change_bit(int nr, volatile void * addr)
 
         __asm__ __volatile__ (
                 "1:                                             \n\t"
-                "movli.l        @%1, %0 ! test_and_change_bit   \n\t"
-                "mov            %0, %2                          \n\t"
-                "xor            %4, %0                          \n\t"
-                "movco.l        %0, @%1                         \n\t"
+                "movli.l        @%2, %0 ! test_and_change_bit   \n\t"
+                "mov            %0, %1                          \n\t"
+                "xor            %3, %0                          \n\t"
+                "movco.l        %0, @%2                         \n\t"
                 "bf             1b                              \n\t"
-                "and            %4, %2                          \n\t"
+                "and            %3, %1                          \n\t"
                 "synco                                          \n\t"
-                : "=&z" (tmp), "=r" (a), "=&r" (retval)
-                : "1" (a), "r" (mask)
+                : "=&z" (tmp), "=&r" (retval)
+                : "r" (a), "r" (mask)
                 : "t", "memory"
         );
 
diff --git a/arch/sh/include/asm/clock.h b/arch/sh/include/asm/clock.h
index f9c88583d90a..2f6c9627bc1f 100644
--- a/arch/sh/include/asm/clock.h
+++ b/arch/sh/include/asm/clock.h
@@ -15,6 +15,7 @@ struct clk_ops {
         void (*disable)(struct clk *clk);
         void (*recalc)(struct clk *clk);
         int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id);
+        int (*set_parent)(struct clk *clk, struct clk *parent);
         long (*round_rate)(struct clk *clk, unsigned long rate);
 };
 
diff --git a/arch/sh/include/asm/cmpxchg-llsc.h b/arch/sh/include/asm/cmpxchg-llsc.h
index aee3bf286581..0fac3da536ca 100644
--- a/arch/sh/include/asm/cmpxchg-llsc.h
+++ b/arch/sh/include/asm/cmpxchg-llsc.h
@@ -8,14 +8,14 @@ static inline unsigned long xchg_u32(volatile u32 *m, unsigned long val)
 
         __asm__ __volatile__ (
                 "1:                                     \n\t"
-                "movli.l        @%1, %0 ! xchg_u32      \n\t"
-                "mov            %0, %2                  \n\t"
-                "mov            %4, %0                  \n\t"
-                "movco.l        %0, @%1                 \n\t"
+                "movli.l        @%2, %0 ! xchg_u32      \n\t"
+                "mov            %0, %1                  \n\t"
+                "mov            %3, %0                  \n\t"
+                "movco.l        %0, @%2                 \n\t"
                 "bf             1b                      \n\t"
                 "synco                                  \n\t"
-                : "=&z"(tmp), "=r" (m), "=&r" (retval)
-                : "1" (m), "r" (val)
+                : "=&z"(tmp), "=&r" (retval)
+                : "r" (m), "r" (val)
                 : "t", "memory"
         );
 
@@ -29,14 +29,14 @@ static inline unsigned long xchg_u8(volatile u8 *m, unsigned long val)
 
         __asm__ __volatile__ (
                 "1:                                     \n\t"
-                "movli.l        @%1, %0 ! xchg_u8       \n\t"
-                "mov            %0, %2                  \n\t"
-                "mov            %4, %0                  \n\t"
-                "movco.l        %0, @%1                 \n\t"
+                "movli.l        @%2, %0 ! xchg_u8       \n\t"
+                "mov            %0, %1                  \n\t"
+                "mov            %3, %0                  \n\t"
+                "movco.l        %0, @%2                 \n\t"
                 "bf             1b                      \n\t"
                 "synco                                  \n\t"
-                : "=&z"(tmp), "=r" (m), "=&r" (retval)
-                : "1" (m), "r" (val & 0xff)
+                : "=&z"(tmp), "=&r" (retval)
+                : "r" (m), "r" (val & 0xff)
                 : "t", "memory"
         );
 
@@ -51,17 +51,17 @@ __cmpxchg_u32(volatile int *m, unsigned long old, unsigned long new)
 
         __asm__ __volatile__ (
                 "1:                                             \n\t"
-                "movli.l        @%1, %0 ! __cmpxchg_u32         \n\t"
-                "mov            %0, %2                          \n\t"
-                "cmp/eq         %2, %4                          \n\t"
+                "movli.l        @%2, %0 ! __cmpxchg_u32         \n\t"
+                "mov            %0, %1                          \n\t"
+                "cmp/eq         %1, %3                          \n\t"
                 "bf             2f                              \n\t"
-                "mov            %5, %0                          \n\t"
+                "mov            %3, %0                          \n\t"
                 "2:                                             \n\t"
-                "movco.l        %0, @%1                         \n\t"
+                "movco.l        %0, @%2                         \n\t"
                 "bf             1b                              \n\t"
                 "synco                                          \n\t"
-                : "=&z" (tmp), "=r" (m), "=&r" (retval)
-                : "1" (m), "r" (old), "r" (new)
+                : "=&z" (tmp), "=&r" (retval)
+                : "r" (m), "r" (old), "r" (new)
                 : "t", "memory"
         );
 
diff --git a/arch/sh/include/asm/cpu-features.h b/arch/sh/include/asm/cpu-features.h
index 86308aa39731..694abe490edb 100644
--- a/arch/sh/include/asm/cpu-features.h
+++ b/arch/sh/include/asm/cpu-features.h
@@ -21,5 +21,6 @@
 #define CPU_HAS_LLSC            0x0040  /* movli.l/movco.l */
 #define CPU_HAS_L2_CACHE        0x0080  /* Secondary cache / URAM */
 #define CPU_HAS_OP32            0x0100  /* 32-bit instruction support */
+#define CPU_HAS_PTEAEX          0x0200  /* PTE ASID Extension support */
 
 #endif /* __ASM_SH_CPU_FEATURES_H */
diff --git a/arch/sh/include/asm/dma-sh.h b/arch/sh/include/asm/dma-sh.h
new file mode 100644
index 000000000000..0c8f8e14622a
--- /dev/null
+++ b/arch/sh/include/asm/dma-sh.h
@@ -0,0 +1,118 @@
+/*
+ * arch/sh/include/asm/dma-sh.h
+ *
+ * Copyright (C) 2000  Takashi YOSHII
+ * Copyright (C) 2003  Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef __DMA_SH_H
+#define __DMA_SH_H
+
+#include <asm/dma.h>
+#include <cpu/dma.h>
+
+/* DMAOR contorl: The DMAOR access size is different by CPU.*/
+#if defined(CONFIG_CPU_SUBTYPE_SH7723)  || \
+    defined(CONFIG_CPU_SUBTYPE_SH7780)  || \
+    defined(CONFIG_CPU_SUBTYPE_SH7785)
+#define dmaor_read_reg(n) \
+    (n ? ctrl_inw(SH_DMAC_BASE1 + DMAOR) \
+        : ctrl_inw(SH_DMAC_BASE0 + DMAOR))
+#define dmaor_write_reg(n, data) \
+    (n ? ctrl_outw(data, SH_DMAC_BASE1 + DMAOR) \
+    : ctrl_outw(data, SH_DMAC_BASE0 + DMAOR))
+#else /* Other CPU */
+#define dmaor_read_reg(n) ctrl_inw(SH_DMAC_BASE0 + DMAOR)
+#define dmaor_write_reg(n, data) ctrl_outw(data, SH_DMAC_BASE0 + DMAOR)
+#endif
+
+static int dmte_irq_map[] __maybe_unused = {
+#if (MAX_DMA_CHANNELS >= 4)
+    DMTE0_IRQ,
+    DMTE0_IRQ + 1,
+    DMTE0_IRQ + 2,
+    DMTE0_IRQ + 3,
+#endif
+#if (MAX_DMA_CHANNELS >= 6)
+    DMTE4_IRQ,
+    DMTE4_IRQ + 1,
+#endif
+#if (MAX_DMA_CHANNELS >= 8)
+    DMTE6_IRQ,
+    DMTE6_IRQ + 1,
+#endif
+#if (MAX_DMA_CHANNELS >= 12)
+    DMTE8_IRQ,
+    DMTE9_IRQ,
+    DMTE10_IRQ,
+    DMTE11_IRQ,
+#endif
+};
+
+/* Definitions for the SuperH DMAC */
+#define REQ_L   0x00000000
+#define REQ_E   0x00080000
+#define RACK_H  0x00000000
+#define RACK_L  0x00040000
+#define ACK_R   0x00000000
+#define ACK_W   0x00020000
+#define ACK_H   0x00000000
+#define ACK_L   0x00010000
+#define DM_INC  0x00004000
+#define DM_DEC  0x00008000
+#define SM_INC  0x00001000
+#define SM_DEC  0x00002000
+#define RS_IN   0x00000200
+#define RS_OUT  0x00000300
+#define TS_BLK  0x00000040
+#define TM_BUR  0x00000020
+#define CHCR_DE 0x00000001
+#define CHCR_TE 0x00000002
+#define CHCR_IE 0x00000004
+
+/* DMAOR definitions */
+#define DMAOR_AE        0x00000004
+#define DMAOR_NMIF      0x00000002
+#define DMAOR_DME       0x00000001
+
+/*
+ * Define the default configuration for dual address memory-memory transfer.
+ * The 0x400 value represents auto-request, external->external.
+ */
+#define RS_DUAL (DM_INC | SM_INC | 0x400 | TS_32)
+
+/* DMA base address */
+static u32 dma_base_addr[] __maybe_unused = {
+#if (MAX_DMA_CHANNELS >= 4)
+        SH_DMAC_BASE0 + 0x00,   /* channel 0 */
+        SH_DMAC_BASE0 + 0x10,
+        SH_DMAC_BASE0 + 0x20,
+        SH_DMAC_BASE0 + 0x30,
+#endif
+#if (MAX_DMA_CHANNELS >= 6)
+        SH_DMAC_BASE0 + 0x50,
+        SH_DMAC_BASE0 + 0x60,
+#endif
+#if (MAX_DMA_CHANNELS >= 8)
+        SH_DMAC_BASE1 + 0x00,
+        SH_DMAC_BASE1 + 0x10,
+#endif
+#if (MAX_DMA_CHANNELS >= 12)
+        SH_DMAC_BASE1 + 0x20,
+        SH_DMAC_BASE1 + 0x30,
+        SH_DMAC_BASE1 + 0x50,
+        SH_DMAC_BASE1 + 0x60, /* channel 11 */
+#endif
+};
+
+/* DMA register */
+#define SAR     0x00
+#define DAR     0x04
+#define TCR     0x08
+#define CHCR    0x0C
+#define DMAOR   0x40
+
+#endif /* __DMA_SH_H */
diff --git a/arch/sh/include/asm/dma.h b/arch/sh/include/asm/dma.h
index beca7128e2ab..6bd178473878 100644
--- a/arch/sh/include/asm/dma.h
+++ b/arch/sh/include/asm/dma.h
@@ -25,9 +25,9 @@
 #define MAX_DMA_ADDRESS         (PAGE_OFFSET+0x10000000)
 
 #ifdef CONFIG_NR_DMA_CHANNELS
-#  define MAX_DMA_CHANNELS      (CONFIG_NR_DMA_CHANNELS)
+#  define MAX_DMA_CHANNELS   (CONFIG_NR_DMA_CHANNELS)
 #else
-#  define MAX_DMA_CHANNELS      (CONFIG_NR_ONCHIP_DMA_CHANNELS)
+#  define MAX_DMA_CHANNELS   (CONFIG_NR_ONCHIP_DMA_CHANNELS)
 #endif
 
 /*
diff --git a/arch/sh/include/asm/entry-macros.S b/arch/sh/include/asm/entry-macros.S
index 2dab0b8d9454..3a4752a65722 100644
--- a/arch/sh/include/asm/entry-macros.S
+++ b/arch/sh/include/asm/entry-macros.S
@@ -31,3 +31,8 @@
 #endif  
         .endm
 
+#if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH4)
+# define PREF(x)        pref    @x
+#else
+# define PREF(x)        nop
+#endif
diff --git a/arch/sh/include/asm/gpio.h b/arch/sh/include/asm/gpio.h
index 90673658eb14..61f93da2c62e 100644
--- a/arch/sh/include/asm/gpio.h
+++ b/arch/sh/include/asm/gpio.h
@@ -19,8 +19,42 @@
 #include <cpu/gpio.h>
 #endif
 
+#define ARCH_NR_GPIOS 512
+#include <asm-generic/gpio.h>
+
+#ifdef CONFIG_GPIOLIB
+
+static inline int gpio_get_value(unsigned gpio)
+{
+        return __gpio_get_value(gpio);
+}
+
+static inline void gpio_set_value(unsigned gpio, int value)
+{
+        __gpio_set_value(gpio, value);
+}
+
+static inline int gpio_cansleep(unsigned gpio)
+{
+        return __gpio_cansleep(gpio);
+}
+
+static inline int gpio_to_irq(unsigned gpio)
+{
+        WARN_ON(1);
+        return -ENOSYS;
+}
+
+static inline int irq_to_gpio(unsigned int irq)
+{
+        WARN_ON(1);
+        return -EINVAL;
+}
+
+#endif /* CONFIG_GPIOLIB */
+
 typedef unsigned short pinmux_enum_t;
-typedef unsigned char pinmux_flag_t;
+typedef unsigned short pinmux_flag_t;
 
 #define PINMUX_TYPE_NONE            0
 #define PINMUX_TYPE_FUNCTION        1
@@ -34,6 +68,11 @@ typedef unsigned char pinmux_flag_t;
 #define PINMUX_FLAG_WANT_PULLUP     (1 << 3)
 #define PINMUX_FLAG_WANT_PULLDOWN   (1 << 4)
 
+#define PINMUX_FLAG_DBIT_SHIFT      5
+#define PINMUX_FLAG_DBIT            (0x1f << PINMUX_FLAG_DBIT_SHIFT)
+#define PINMUX_FLAG_DREG_SHIFT      10
+#define PINMUX_FLAG_DREG            (0x3f << PINMUX_FLAG_DREG_SHIFT)
+
 struct pinmux_gpio {
         pinmux_enum_t enum_id;
         pinmux_flag_t flags;
@@ -54,7 +93,7 @@ struct pinmux_cfg_reg {
         .enum_ids = (pinmux_enum_t [(r_width / f_width) * (1 << f_width)]) \
 
 struct pinmux_data_reg {
-        unsigned long reg, reg_width;
+        unsigned long reg, reg_width, reg_shadow;
         pinmux_enum_t *enum_ids;
 };
 
@@ -89,34 +128,9 @@ struct pinmux_info {
         unsigned int gpio_data_size;
 
         unsigned long *gpio_in_use;
+        struct gpio_chip chip;
 };
 
 int register_pinmux(struct pinmux_info *pip);
 
-int __gpio_request(unsigned gpio);
-static inline int gpio_request(unsigned gpio, const char *label)
-{
-        return __gpio_request(gpio);
-}
-void gpio_free(unsigned gpio);
-int gpio_direction_input(unsigned gpio);
-int gpio_direction_output(unsigned gpio, int value);
-int gpio_get_value(unsigned gpio);
-void gpio_set_value(unsigned gpio, int value);
-
-/* IRQ modes are unspported */
-static inline int gpio_to_irq(unsigned gpio)
-{
-        WARN_ON(1);
-        return -EINVAL;
-}
-
-static inline int irq_to_gpio(unsigned irq)
-{
-        WARN_ON(1);
-        return -EINVAL;
-}
-
-#include <asm-generic/gpio.h>
-
 #endif /* __ASM_SH_GPIO_H */
diff --git a/arch/sh/include/asm/hd64461.h b/arch/sh/include/asm/hd64461.h
index 8c1353baf00f..52b4b6238277 100644
--- a/arch/sh/include/asm/hd64461.h
+++ b/arch/sh/include/asm/hd64461.h
@@ -242,7 +242,6 @@
 #include <asm/io_generic.h>
 
 /* arch/sh/cchips/hd6446x/hd64461/setup.c */
-int hd64461_irq_demux(int irq);
 void hd64461_register_irq_demux(int irq,
                                 int (*demux) (int irq, void *dev), void *dev);
 void hd64461_unregister_irq_demux(int irq);
diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h
index 61f6dae40534..0454f8d68059 100644
--- a/arch/sh/include/asm/io.h
+++ b/arch/sh/include/asm/io.h
@@ -238,7 +238,7 @@ extern void onchip_unmap(unsigned long vaddr);
 static inline void __iomem *
 __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags)
 {
-#ifdef CONFIG_SUPERH32
+#if defined(CONFIG_SUPERH32) && !defined(CONFIG_PMB_FIXED)
         unsigned long last_addr = offset + size - 1;
 #endif
         void __iomem *ret;
@@ -247,7 +247,7 @@ __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags)
         if (ret)
                 return ret;
 
-#ifdef CONFIG_SUPERH32
+#if defined(CONFIG_SUPERH32) && !defined(CONFIG_PMB_FIXED)
         /*
          * For P1 and P2 space this is trivial, as everything is already
          * mapped. Uncached access for P1 addresses are done through P2.
diff --git a/arch/sh/include/asm/kprobes.h b/arch/sh/include/asm/kprobes.h
index 6078d8e551d4..613644a758e8 100644
--- a/arch/sh/include/asm/kprobes.h
+++ b/arch/sh/include/asm/kprobes.h
@@ -16,7 +16,7 @@ typedef u16 kprobe_opcode_t;
         ? (MAX_STACK_SIZE) \
         : (((unsigned long)current_thread_info()) + THREAD_SIZE - (ADDR)))
 
-#define regs_return_value(regs)         ((regs)->regs[0])
+#define regs_return_value(_regs)                ((_regs)->regs[0])
 #define flush_insn_slot(p)              do { } while (0)
 #define kretprobe_blacklist_size        0
 
diff --git a/arch/sh/include/asm/mmu_context.h b/arch/sh/include/asm/mmu_context.h
index 5d9157bd474d..2a9c55f1a83f 100644
--- a/arch/sh/include/asm/mmu_context.h
+++ b/arch/sh/include/asm/mmu_context.h
@@ -19,13 +19,18 @@
  *    (a) TLB cache version (or round, cycle whatever expression you like)
  *    (b) ASID (Address Space IDentifier)
  */
+#ifdef CONFIG_CPU_HAS_PTEAEX
+#define MMU_CONTEXT_ASID_MASK           0x0000ffff
+#else
 #define MMU_CONTEXT_ASID_MASK           0x000000ff
-#define MMU_CONTEXT_VERSION_MASK        0xffffff00
-#define MMU_CONTEXT_FIRST_VERSION       0x00000100
-#define NO_CONTEXT                      0UL
+#endif
 
-/* ASID is 8-bit value, so it can't be 0x100 */
-#define MMU_NO_ASID                     0x100
+#define MMU_CONTEXT_VERSION_MASK        (~0UL & ~MMU_CONTEXT_ASID_MASK)
+#define MMU_CONTEXT_FIRST_VERSION       (MMU_CONTEXT_ASID_MASK + 1)
+
+/* Impossible ASID value, to differentiate from NO_CONTEXT. */
+#define MMU_NO_ASID                     MMU_CONTEXT_FIRST_VERSION
+#define NO_CONTEXT                      0UL
 
 #define asid_cache(cpu)         (cpu_data[cpu].asid_cache)
 
diff --git a/arch/sh/include/asm/mmu_context_32.h b/arch/sh/include/asm/mmu_context_32.h
index f4f9aebd68b7..8ef800c549ab 100644
--- a/arch/sh/include/asm/mmu_context_32.h
+++ b/arch/sh/include/asm/mmu_context_32.h
@@ -10,6 +10,17 @@ static inline void destroy_context(struct mm_struct *mm)
         /* Do nothing */
 }
 
+#ifdef CONFIG_CPU_HAS_PTEAEX
+static inline void set_asid(unsigned long asid)
+{
+        __raw_writel(asid, MMU_PTEAEX);
+}
+
+static inline unsigned long get_asid(void)
+{
+        return __raw_readl(MMU_PTEAEX) & MMU_CONTEXT_ASID_MASK;
+}
+#else
 static inline void set_asid(unsigned long asid)
 {
         unsigned long __dummy;
@@ -33,6 +44,7 @@ static inline unsigned long get_asid(void)
         asid &= MMU_CONTEXT_ASID_MASK;
         return asid;
 }
+#endif /* CONFIG_CPU_HAS_PTEAEX */
 
 /* MMU_TTB is used for optimizing the fault handling. */
 static inline void set_TTB(pgd_t *pgd)
diff --git a/arch/sh/include/asm/page.h b/arch/sh/include/asm/page.h
index 5871d78e47e5..9c6d21ec0240 100644
--- a/arch/sh/include/asm/page.h
+++ b/arch/sh/include/asm/page.h
@@ -129,7 +129,12 @@ typedef struct page *pgtable_t;
  * is not visible (it is part of the PMB mapping) and so needs to be
  * added or subtracted as required.
  */
-#ifdef CONFIG_32BIT
+#if defined(CONFIG_PMB_FIXED)
+/* phys = virt - PAGE_OFFSET - (__MEMORY_START & 0xe0000000) */
+#define PMB_OFFSET      (PAGE_OFFSET - PXSEG(__MEMORY_START))
+#define __pa(x) ((unsigned long)(x) - PMB_OFFSET)
+#define __va(x) ((void *)((unsigned long)(x) + PMB_OFFSET))
+#elif defined(CONFIG_32BIT)
 #define __pa(x) ((unsigned long)(x)-PAGE_OFFSET+__MEMORY_START)
 #define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET-__MEMORY_START))
 #else
diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h
index 1ef4b24d7619..1fd58b421438 100644
--- a/arch/sh/include/asm/processor.h
+++ b/arch/sh/include/asm/processor.h
@@ -31,7 +31,7 @@ enum cpu_type {
         CPU_SH7760, CPU_SH4_202, CPU_SH4_501,
 
         /* SH-4A types */
-        CPU_SH7763, CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785,
+        CPU_SH7763, CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785, CPU_SH7786,
         CPU_SH7723, CPU_SHX3,
 
         /* SH4AL-DSP types */
diff --git a/arch/sh/include/asm/processor_32.h b/arch/sh/include/asm/processor_32.h
index d79063c5eb9c..efdd78a53b11 100644
--- a/arch/sh/include/asm/processor_32.h
+++ b/arch/sh/include/asm/processor_32.h
@@ -108,12 +108,12 @@ extern int ubc_usercnt;
 /*
  * Do necessary setup to start up a newly executed thread.
  */
-#define start_thread(regs, new_pc, new_sp)       \
+#define start_thread(_regs, new_pc, new_sp)      \
         set_fs(USER_DS);                         \
-        regs->pr = 0;                            \
-        regs->sr = SR_FD;       /* User mode. */ \
-        regs->pc = new_pc;                       \
-        regs->regs[15] = new_sp
+        _regs->pr = 0;                           \
+        _regs->sr = SR_FD;      /* User mode. */ \
+        _regs->pc = new_pc;                      \
+        _regs->regs[15] = new_sp
 
 /* Forward declaration, a strange C thing */
 struct task_struct;
@@ -189,10 +189,9 @@ extern unsigned long get_wchan(struct task_struct *p);
 #define KSTK_EIP(tsk)  (task_pt_regs(tsk)->pc)
 #define KSTK_ESP(tsk)  (task_pt_regs(tsk)->regs[15])
 
-#define user_stack_pointer(regs)        ((regs)->regs[15])
+#define user_stack_pointer(_regs)       ((_regs)->regs[15])
 
-#if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH3) || \
-    defined(CONFIG_CPU_SH4)
+#if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH4)
 #define PREFETCH_STRIDE         L1_CACHE_BYTES
 #define ARCH_HAS_PREFETCH
 #define ARCH_HAS_PREFETCHW
diff --git a/arch/sh/include/asm/processor_64.h b/arch/sh/include/asm/processor_64.h
index 803177fcf086..5727d31b0ccf 100644
--- a/arch/sh/include/asm/processor_64.h
+++ b/arch/sh/include/asm/processor_64.h
@@ -145,13 +145,13 @@ struct thread_struct {
  */
 #define SR_USER (SR_MMU | SR_FD)
 
-#define start_thread(regs, new_pc, new_sp)                      \
+#define start_thread(_regs, new_pc, new_sp)                     \
         set_fs(USER_DS);                                        \
-        regs->sr = SR_USER;     /* User mode. */                \
-        regs->pc = new_pc - 4;  /* Compensate syscall exit */   \
-        regs->pc |= 1;          /* Set SHmedia ! */             \
-        regs->regs[18] = 0;                                     \
-        regs->regs[15] = new_sp
+        _regs->sr = SR_USER;    /* User mode. */                \
+        _regs->pc = new_pc - 4; /* Compensate syscall exit */   \
+        _regs->pc |= 1;         /* Set SHmedia ! */             \
+        _regs->regs[18] = 0;                                    \
+        _regs->regs[15] = new_sp
 
 /* Forward declaration, a strange C thing */
 struct task_struct;
@@ -226,7 +226,7 @@ extern unsigned long get_wchan(struct task_struct *p);
 #define KSTK_EIP(tsk)  ((tsk)->thread.pc)
 #define KSTK_ESP(tsk)  ((tsk)->thread.sp)
 
-#define user_stack_pointer(regs)        ((regs)->regs[15])
+#define user_stack_pointer(_regs)       ((_regs)->regs[15])
 
 #endif  /* __ASSEMBLY__ */
 #endif /* __ASM_SH_PROCESSOR_64_H */
diff --git a/arch/sh/include/asm/ptrace.h b/arch/sh/include/asm/ptrace.h
index 12912ab80c15..81c6568fdb3e 100644
--- a/arch/sh/include/asm/ptrace.h
+++ b/arch/sh/include/asm/ptrace.h
@@ -122,14 +122,12 @@ extern void user_disable_single_step(struct task_struct *);
 #ifdef CONFIG_SH_DSP
 #define task_pt_regs(task) \
         ((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE \
-                 - sizeof(struct pt_dspregs) - sizeof(unsigned long)) - 1)
+                 - sizeof(struct pt_dspregs)) - 1)
 #define task_pt_dspregs(task) \
-        ((struct pt_dspregs *) (task_stack_page(task) + THREAD_SIZE \
-                 - sizeof(unsigned long)) - 1)
+        ((struct pt_dspregs *) (task_stack_page(task) + THREAD_SIZE) - 1)
 #else
 #define task_pt_regs(task) \
-        ((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE \
-                 - sizeof(unsigned long)) - 1)
+        ((struct pt_regs *) (task_stack_page(task) + THREAD_SIZE) - 1)
 #endif
 
 static inline unsigned long profile_pc(struct pt_regs *regs)
diff --git a/arch/sh/include/asm/sections.h b/arch/sh/include/asm/sections.h
index 8f8f4ad400df..01a4076a3719 100644
--- a/arch/sh/include/asm/sections.h
+++ b/arch/sh/include/asm/sections.h
@@ -3,6 +3,7 @@
 
 #include <asm-generic/sections.h>
 
+extern void __nosave_begin, __nosave_end;
 extern long __machvec_start, __machvec_end;
 extern char __uncached_start, __uncached_end;
 extern char _ebss[];
diff --git a/arch/sh/include/asm/socket.h b/arch/sh/include/asm/socket.h
index 6d4bf6512959..345653b96826 100644
--- a/arch/sh/include/asm/socket.h
+++ b/arch/sh/include/asm/socket.h
@@ -54,4 +54,7 @@
 
 #define SO_MARK                 36
 
+#define SO_TIMESTAMPING         37
+#define SCM_TIMESTAMPING        SO_TIMESTAMPING
+
 #endif /* __ASM_SH_SOCKET_H */
diff --git a/arch/sh/include/asm/suspend.h b/arch/sh/include/asm/suspend.h
new file mode 100644
index 000000000000..b1b995370e79
--- /dev/null
+++ b/arch/sh/include/asm/suspend.h
@@ -0,0 +1,22 @@
+#ifndef _ASM_SH_SUSPEND_H
+#define _ASM_SH_SUSPEND_H
+
+#ifndef __ASSEMBLY__
+static inline int arch_prepare_suspend(void) { return 0; }
+
+#include <asm/ptrace.h>
+
+struct swsusp_arch_regs {
+        struct pt_regs user_regs;
+        unsigned long bank1_regs[8];
+};
+#endif
+
+/* flags passed to assembly suspend code */
+#define SUSP_SH_SLEEP           (1 << 0) /* Regular sleep mode */
+#define SUSP_SH_STANDBY         (1 << 1) /* SH-Mobile Software standby mode */
+#define SUSP_SH_RSTANDBY        (1 << 2) /* SH-Mobile R-standby mode */
+#define SUSP_SH_USTANDBY        (1 << 3) /* SH-Mobile U-standby mode */
+#define SUSP_SH_SF              (1 << 4) /* Enable self-refresh */
+
+#endif /* _ASM_SH_SUSPEND_H */
diff --git a/arch/sh/include/asm/timer.h b/arch/sh/include/asm/timer.h
index a7ca3a195bb5..4c3b66e30af2 100644
--- a/arch/sh/include/asm/timer.h
+++ b/arch/sh/include/asm/timer.h
@@ -9,7 +9,6 @@ struct sys_timer_ops {
         int (*init)(void);
         int (*start)(void);
         int (*stop)(void);
-        cycle_t (*read)(void);
 #ifndef CONFIG_GENERIC_TIME
         unsigned long (*get_offset)(void);
 #endif
@@ -39,6 +38,7 @@ struct sys_timer *get_sys_timer(void);
 
 /* arch/sh/kernel/time.c */
 void handle_timer_tick(void);
-extern unsigned long sh_hpt_frequency;
+
+extern struct clocksource clocksource_sh;
 
 #endif /* __ASM_SH_TIMER_H */
diff --git a/arch/sh/include/asm/tlb.h b/arch/sh/include/asm/tlb.h
index 88ff1ae8a6b8..9c16f737074a 100644
--- a/arch/sh/include/asm/tlb.h
+++ b/arch/sh/include/asm/tlb.h
@@ -6,22 +6,106 @@
 #endif
 
 #ifndef __ASSEMBLY__
+#include <linux/pagemap.h>
+
+#ifdef CONFIG_MMU
+#include <asm/pgalloc.h>
+#include <asm/tlbflush.h>
+
+/*
+ * TLB handling.  This allows us to remove pages from the page
+ * tables, and efficiently handle the TLB issues.
+ */
+struct mmu_gather {
+        struct mm_struct        *mm;
+        unsigned int            fullmm;
+        unsigned long           start, end;
+};
 
-#define tlb_start_vma(tlb, vma) \
-        flush_cache_range(vma, vma->vm_start, vma->vm_end)
+DECLARE_PER_CPU(struct mmu_gather, mmu_gathers);
 
-#define tlb_end_vma(tlb, vma)   \
-        flush_tlb_range(vma, vma->vm_start, vma->vm_end)
+static inline void init_tlb_gather(struct mmu_gather *tlb)
+{
+        tlb->start = TASK_SIZE;
+        tlb->end = 0;
 
-#define __tlb_remove_tlb_entry(tlb, pte, address)       do { } while (0)
+        if (tlb->fullmm) {
+                tlb->start = 0;
+                tlb->end = TASK_SIZE;
+        }
+}
+
+static inline struct mmu_gather *
+tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush)
+{
+        struct mmu_gather *tlb = &get_cpu_var(mmu_gathers);
+
+        tlb->mm = mm;
+        tlb->fullmm = full_mm_flush;
+
+        init_tlb_gather(tlb);
+
+        return tlb;
+}
+
+static inline void
+tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end)
+{
+        if (tlb->fullmm)
+                flush_tlb_mm(tlb->mm);
+
+        /* keep the page table cache within bounds */
+        check_pgt_cache();
+
+        put_cpu_var(mmu_gathers);
+}
+
+static inline void
+tlb_remove_tlb_entry(struct mmu_gather *tlb, pte_t *ptep, unsigned long address)
+{
+        if (tlb->start > address)
+                tlb->start = address;
+        if (tlb->end < address + PAGE_SIZE)
+                tlb->end = address + PAGE_SIZE;
+}
 
 /*
- * Flush whole TLBs for MM
+ * In the case of tlb vma handling, we can optimise these away in the
+ * case where we're doing a full MM flush.  When we're doing a munmap,
+ * the vmas are adjusted to only cover the region to be torn down.
  */
-#define tlb_flush(tlb)                          flush_tlb_mm((tlb)->mm)
+static inline void
+tlb_start_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
+{
+        if (!tlb->fullmm)
+                flush_cache_range(vma, vma->vm_start, vma->vm_end);
+}
+
+static inline void
+tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma)
+{
+        if (!tlb->fullmm && tlb->end) {
+                flush_tlb_range(vma, tlb->start, tlb->end);
+                init_tlb_gather(tlb);
+        }
+}
+
+#define tlb_remove_page(tlb,page)       free_page_and_swap_cache(page)
+#define pte_free_tlb(tlb, ptep)         pte_free((tlb)->mm, ptep)
+#define pmd_free_tlb(tlb, pmdp)         pmd_free((tlb)->mm, pmdp)
+#define pud_free_tlb(tlb, pudp)         pud_free((tlb)->mm, pudp)
+
+#define tlb_migrate_finish(mm)          do { } while (0)
+
+#else /* CONFIG_MMU */
+
+#define tlb_start_vma(tlb, vma)                         do { } while (0)
+#define tlb_end_vma(tlb, vma)                           do { } while (0)
+#define __tlb_remove_tlb_entry(tlb, pte, address)       do { } while (0)
+#define tlb_flush(tlb)                                  do { } while (0)
 
-#include <linux/pagemap.h>
 #include <asm-generic/tlb.h>
 
+#endif /* CONFIG_MMU */
 #endif /* __ASSEMBLY__ */
 #endif /* __ASM_SH_TLB_H */
diff --git a/arch/sh/include/cpu-sh3/cpu/dma.h b/arch/sh/include/cpu-sh3/cpu/dma.h
index 6813c3220a1d..0ea15f3f2363 100644
--- a/arch/sh/include/cpu-sh3/cpu/dma.h
+++ b/arch/sh/include/cpu-sh3/cpu/dma.h
@@ -1,22 +1,17 @@
 #ifndef __ASM_CPU_SH3_DMA_H
 #define __ASM_CPU_SH3_DMA_H
 
-
 #if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
-    defined(CONFIG_CPU_SUBTYPE_SH7721)
-#define SH_DMAC_BASE    0xa4010020
-#else
-#define SH_DMAC_BASE    0xa4000020
+    defined(CONFIG_CPU_SUBTYPE_SH7721) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7710) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7712)
+#define SH_DMAC_BASE0   0xa4010020
+#else /* SH7705/06/07/09 */
+#define SH_DMAC_BASE0   0xa4000020
 #endif
 
-#if defined(CONFIG_CPU_SUBTYPE_SH7720) || defined(CONFIG_CPU_SUBTYPE_SH7709)
 #define DMTE0_IRQ       48
-#define DMTE1_IRQ       49
-#define DMTE2_IRQ       50
-#define DMTE3_IRQ       51
 #define DMTE4_IRQ       76
-#define DMTE5_IRQ       77
-#endif
 
 /* Definitions for the SuperH DMAC */
 #define TM_BURST        0x00000020
diff --git a/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h b/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h
new file mode 100644
index 000000000000..0ed5178fed69
--- /dev/null
+++ b/arch/sh/include/cpu-sh4/cpu/dma-sh4a.h
@@ -0,0 +1,94 @@
+#ifndef __ASM_SH_CPU_SH4_DMA_SH7780_H
+#define __ASM_SH_CPU_SH4_DMA_SH7780_H
+
+#if defined(CONFIG_CPU_SUBTYPE_SH7343) || \
+        defined(CONFIG_CPU_SUBTYPE_SH7722) || \
+        defined(CONFIG_CPU_SUBTYPE_SH7730)
+#define DMTE0_IRQ       48
+#define DMTE4_IRQ       76
+#define DMAE0_IRQ       78      /* DMA Error IRQ*/
+#define SH_DMAC_BASE0   0xFE008020
+#define SH_DMARS_BASE   0xFE009000
+#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \
+        defined(CONFIG_CPU_SUBTYPE_SH7764)
+#define DMTE0_IRQ       34
+#define DMTE4_IRQ       44
+#define DMAE0_IRQ       38
+#define SH_DMAC_BASE0   0xFF608020
+#define SH_DMARS_BASE   0xFF609000
+#elif defined(CONFIG_CPU_SUBTYPE_SH7723)
+#define DMTE0_IRQ       48      /* DMAC0A*/
+#define DMTE4_IRQ       40      /* DMAC0B */
+#define DMTE6_IRQ       42
+#define DMTE8_IRQ       76      /* DMAC1A */
+#define DMTE9_IRQ       77
+#define DMTE10_IRQ      72      /* DMAC1B */
+#define DMTE11_IRQ      73
+#define DMAE0_IRQ       78      /* DMA Error IRQ*/
+#define DMAE1_IRQ       74      /* DMA Error IRQ*/
+#define SH_DMAC_BASE0   0xFE008020
+#define SH_DMAC_BASE1   0xFDC08020
+#define SH_DMARS_BASE   0xFDC09000
+#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
+#define DMTE0_IRQ       34
+#define DMTE4_IRQ       44
+#define DMTE6_IRQ       46
+#define DMTE8_IRQ       92
+#define DMTE9_IRQ       93
+#define DMTE10_IRQ      94
+#define DMTE11_IRQ      95
+#define DMAE0_IRQ       38      /* DMA Error IRQ */
+#define SH_DMAC_BASE0   0xFC808020
+#define SH_DMAC_BASE1   0xFC818020
+#define SH_DMARS_BASE   0xFC809000
+#else /* SH7785 */
+#define DMTE0_IRQ       33
+#define DMTE4_IRQ       37
+#define DMTE6_IRQ       52
+#define DMTE8_IRQ       54
+#define DMTE9_IRQ       55
+#define DMTE10_IRQ      56
+#define DMTE11_IRQ      57
+#define DMAE0_IRQ       39      /* DMA Error IRQ0 */
+#define DMAE1_IRQ       58      /* DMA Error IRQ1 */
+#define SH_DMAC_BASE0   0xFC808020
+#define SH_DMAC_BASE1   0xFCC08020
+#define SH_DMARS_BASE   0xFC809000
+#endif
+
+#define REQ_HE  0x000000C0
+#define REQ_H   0x00000080
+#define REQ_LE  0x00000040
+#define TM_BURST 0x0000020
+#define TS_8    0x00000000
+#define TS_16   0x00000008
+#define TS_32   0x00000010
+#define TS_16BLK        0x00000018
+#define TS_32BLK        0x00100000
+
+/*
+ * The SuperH DMAC supports a number of transmit sizes, we list them here,
+ * with their respective values as they appear in the CHCR registers.
+ *
+ * Defaults to a 64-bit transfer size.
+ */
+enum {
+        XMIT_SZ_8BIT,
+        XMIT_SZ_16BIT,
+        XMIT_SZ_32BIT,
+        XMIT_SZ_128BIT,
+        XMIT_SZ_256BIT,
+};
+
+/*
+ * The DMA count is defined as the number of bytes to transfer.
+ */
+static unsigned int ts_shift[] __maybe_unused = {
+        [XMIT_SZ_8BIT]          = 0,
+        [XMIT_SZ_16BIT]         = 1,
+        [XMIT_SZ_32BIT]         = 2,
+        [XMIT_SZ_128BIT]        = 4,
+        [XMIT_SZ_256BIT]        = 5,
+};
+
+#endif /* __ASM_SH_CPU_SH4_DMA_SH7780_H */
diff --git a/arch/sh/include/cpu-sh4/cpu/dma-sh7780.h b/arch/sh/include/cpu-sh4/cpu/dma-sh7780.h
deleted file mode 100644
index 71b426a6e482..000000000000
--- a/arch/sh/include/cpu-sh4/cpu/dma-sh7780.h
+++ /dev/null
@@ -1,39 +0,0 @@
-#ifndef __ASM_SH_CPU_SH4_DMA_SH7780_H
-#define __ASM_SH_CPU_SH4_DMA_SH7780_H
-
-#define REQ_HE  0x000000C0
-#define REQ_H   0x00000080
-#define REQ_LE  0x00000040
-#define TM_BURST 0x0000020
-#define TS_8    0x00000000
-#define TS_16   0x00000008
-#define TS_32   0x00000010
-#define TS_16BLK        0x00000018
-#define TS_32BLK        0x00100000
-
-/*
- * The SuperH DMAC supports a number of transmit sizes, we list them here,
- * with their respective values as they appear in the CHCR registers.
- *
- * Defaults to a 64-bit transfer size.
- */
-enum {
-        XMIT_SZ_8BIT,
-        XMIT_SZ_16BIT,
-        XMIT_SZ_32BIT,
-        XMIT_SZ_128BIT,
-        XMIT_SZ_256BIT,
-};
-
-/*
- * The DMA count is defined as the number of bytes to transfer.
- */
-static unsigned int ts_shift[] __maybe_unused = {
-        [XMIT_SZ_8BIT]          = 0,
-        [XMIT_SZ_16BIT]         = 1,
-        [XMIT_SZ_32BIT]         = 2,
-        [XMIT_SZ_128BIT]        = 4,
-        [XMIT_SZ_256BIT]        = 5,
-};
-
-#endif /* __ASM_SH_CPU_SH4_DMA_SH7780_H */
diff --git a/arch/sh/include/cpu-sh4/cpu/dma.h b/arch/sh/include/cpu-sh4/cpu/dma.h
index 235b7cd1fc9a..bcb30246e85c 100644
--- a/arch/sh/include/cpu-sh4/cpu/dma.h
+++ b/arch/sh/include/cpu-sh4/cpu/dma.h
@@ -1,31 +1,29 @@
 #ifndef __ASM_CPU_SH4_DMA_H
 #define __ASM_CPU_SH4_DMA_H
 
-#define DMAOR_INIT      ( 0x8000 | DMAOR_DME )
-
 /* SH7751/7760/7780 DMA IRQ sources */
-#define DMTE0_IRQ       34
-#define DMTE1_IRQ       35
-#define DMTE2_IRQ       36
-#define DMTE3_IRQ       37
-#define DMTE4_IRQ       44
-#define DMTE5_IRQ       45
-#define DMTE6_IRQ       46
-#define DMTE7_IRQ       47
-#define DMAE_IRQ        38
 
 #ifdef CONFIG_CPU_SH4A
-#define SH_DMAC_BASE    0xfc808020
 
+#define DMAOR_INIT      (DMAOR_DME)
 #define CHCR_TS_MASK    0x18
 #define CHCR_TS_SHIFT   3
 
-#include <cpu/dma-sh7780.h>
-#else
-#define SH_DMAC_BASE    0xffa00000
+#include <cpu/dma-sh4a.h>
+#else /* CONFIG_CPU_SH4A */
+/*
+ * SH7750/SH7751/SH7760
+ */
+#define DMTE0_IRQ       34
+#define DMTE4_IRQ       44
+#define DMTE6_IRQ       46
+#define DMAE0_IRQ       38
 
+#define DMAOR_INIT      (0x8000|DMAOR_DME)
+#define SH_DMAC_BASE0   0xffa00000
+#define SH_DMAC_BASE1   0xffa00070
 /* Definitions for the SuperH DMAC */
-#define TM_BURST        0x0000080
+#define TM_BURST        0x00000080
 #define TS_8            0x00000010
 #define TS_16           0x00000020
 #define TS_32           0x00000030
diff --git a/arch/sh/include/cpu-sh4/cpu/freq.h b/arch/sh/include/cpu-sh4/cpu/freq.h
index c23af81c2e70..749d1c434337 100644
--- a/arch/sh/include/cpu-sh4/cpu/freq.h
+++ b/arch/sh/include/cpu-sh4/cpu/freq.h
@@ -29,6 +29,10 @@
 #define FRQCR0                  0xffc80000
 #define FRQCR1                  0xffc80004
 #define FRQMR1                  0xffc80014
+#elif defined(CONFIG_CPU_SUBTYPE_SH7786)
+#define FRQCR0                  0xffc40000
+#define FRQCR1                  0xffc40004
+#define FRQMR1                  0xffc40014
 #elif defined(CONFIG_CPU_SUBTYPE_SHX3)
 #define FRQCR                   0xffc00014
 #else
diff --git a/arch/sh/include/cpu-sh4/cpu/mmu_context.h b/arch/sh/include/cpu-sh4/cpu/mmu_context.h
index 9ea8eb27b18e..3ce7ef6c2978 100644
--- a/arch/sh/include/cpu-sh4/cpu/mmu_context.h
+++ b/arch/sh/include/cpu-sh4/cpu/mmu_context.h
@@ -14,28 +14,35 @@
 #define MMU_PTEL        0xFF000004      /* Page table entry register LOW */
 #define MMU_TTB         0xFF000008      /* Translation table base register */
 #define MMU_TEA         0xFF00000C      /* TLB Exception Address */
-#define MMU_PTEA        0xFF000034      /* Page table entry assistance register */
+#define MMU_PTEA        0xFF000034      /* PTE assistance register */
+#define MMU_PTEAEX      0xFF00007C      /* PTE ASID extension register */
 
 #define MMUCR           0xFF000010      /* MMU Control Register */
 
-#define MMU_ITLB_ADDRESS_ARRAY  0xF2000000
 #define MMU_UTLB_ADDRESS_ARRAY  0xF6000000
+#define MMU_UTLB_ADDRESS_ARRAY2 0xF6800000
 #define MMU_PAGE_ASSOC_BIT      0x80
 
 #define MMUCR_TI                (1<<2)
 
-#ifdef CONFIG_X2TLB
-#define MMUCR_ME                (1 << 7)
-#else
-#define MMUCR_ME                (0)
-#endif
-
 #if defined(CONFIG_32BIT) && defined(CONFIG_CPU_SUBTYPE_ST40)
 #define MMUCR_SE                (1 << 4)
 #else
 #define MMUCR_SE                (0)
 #endif
 
+#ifdef CONFIG_CPU_HAS_PTEAEX
+#define MMUCR_AEX               (1 << 6)
+#else
+#define MMUCR_AEX               (0)
+#endif
+
+#ifdef CONFIG_X2TLB
+#define MMUCR_ME                (1 << 7)
+#else
+#define MMUCR_ME                (0)
+#endif
+
 #ifdef CONFIG_SH_STORE_QUEUES
 #define MMUCR_SQMD              (1 << 9)
 #else
@@ -43,17 +50,7 @@
 #endif
 
 #define MMU_NTLB_ENTRIES        64
-#define MMU_CONTROL_INIT        (0x05|MMUCR_SQMD|MMUCR_ME|MMUCR_SE)
-
-#define MMU_ITLB_DATA_ARRAY     0xF3000000
-#define MMU_UTLB_DATA_ARRAY     0xF7000000
-
-#define MMU_UTLB_ENTRIES           64
-#define MMU_U_ENTRY_SHIFT           8
-#define MMU_UTLB_VALID          0x100
-#define MMU_ITLB_ENTRIES            4
-#define MMU_I_ENTRY_SHIFT           8
-#define MMU_ITLB_VALID          0x100
+#define MMU_CONTROL_INIT        (0x05|MMUCR_SQMD|MMUCR_ME|MMUCR_SE|MMUCR_AEX)
 
 #define TRA     0xff000020
 #define EXPEVT  0xff000024
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7786.h b/arch/sh/include/cpu-sh4/cpu/sh7786.h
new file mode 100644
index 000000000000..48688adc0c84
--- /dev/null
+++ b/arch/sh/include/cpu-sh4/cpu/sh7786.h
@@ -0,0 +1,192 @@
+/*
+ * SH7786 Pinmux
+ *
+ * Copyright (C) 2008, 2009  Renesas Solutions Corp.
+ * Kuninori Morimoto <morimoto.kuninori@renesas.com>
+ *
+ *  Based on sh7785.h
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef __CPU_SH7786_H__
+#define __CPU_SH7786_H__
+
+enum {
+        /* PA */
+        GPIO_PA7, GPIO_PA6, GPIO_PA5, GPIO_PA4,
+        GPIO_PA3, GPIO_PA2, GPIO_PA1, GPIO_PA0,
+
+        /* PB */
+        GPIO_PB7, GPIO_PB6, GPIO_PB5, GPIO_PB4,
+        GPIO_PB3, GPIO_PB2, GPIO_PB1, GPIO_PB0,
+
+        /* PC */
+        GPIO_PC7, GPIO_PC6, GPIO_PC5, GPIO_PC4,
+        GPIO_PC3, GPIO_PC2, GPIO_PC1, GPIO_PC0,
+
+        /* PD */
+        GPIO_PD7, GPIO_PD6, GPIO_PD5, GPIO_PD4,
+        GPIO_PD3, GPIO_PD2, GPIO_PD1, GPIO_PD0,
+
+        /* PE */
+        GPIO_PE5, GPIO_PE4, GPIO_PE3, GPIO_PE2,
+        GPIO_PE1, GPIO_PE0,
+
+        /* PF */
+        GPIO_PF7, GPIO_PF6, GPIO_PF5, GPIO_PF4,
+        GPIO_PF3, GPIO_PF2, GPIO_PF1, GPIO_PF0,
+
+        /* PG */
+        GPIO_PG7, GPIO_PG6, GPIO_PG5, GPIO_PG4,
+        GPIO_PG3, GPIO_PG2, GPIO_PG1, GPIO_PG0,
+
+        /* PH */
+        GPIO_PH7, GPIO_PH6, GPIO_PH5, GPIO_PH4,
+        GPIO_PH3, GPIO_PH2, GPIO_PH1, GPIO_PH0,
+
+        /* PJ */
+        GPIO_PJ7, GPIO_PJ6, GPIO_PJ5, GPIO_PJ4,
+        GPIO_PJ3, GPIO_PJ2, GPIO_PJ1, GPIO_PJ0,
+
+        GPIO_FN_CDE,
+        GPIO_FN_ETH_MAGIC,
+        GPIO_FN_DISP,
+        GPIO_FN_ETH_LINK,
+        GPIO_FN_DR5,
+        GPIO_FN_ETH_TX_ER,
+        GPIO_FN_DR4,
+        GPIO_FN_ETH_TX_EN,
+        GPIO_FN_DR3,
+        GPIO_FN_ETH_TXD3,
+        GPIO_FN_DR2,
+        GPIO_FN_ETH_TXD2,
+        GPIO_FN_DR1,
+        GPIO_FN_ETH_TXD1,
+        GPIO_FN_DR0,
+        GPIO_FN_ETH_TXD0,
+        GPIO_FN_VSYNC,
+        GPIO_FN_HSPI_CLK,
+        GPIO_FN_ODDF,
+        GPIO_FN_HSPI_CS,
+        GPIO_FN_DG5,
+        GPIO_FN_ETH_MDIO,
+        GPIO_FN_DG4,
+        GPIO_FN_ETH_RX_CLK,
+        GPIO_FN_DG3,
+        GPIO_FN_ETH_MDC,
+        GPIO_FN_DG2,
+        GPIO_FN_ETH_COL,
+        GPIO_FN_DG1,
+        GPIO_FN_ETH_TX_CLK,
+        GPIO_FN_DG0,
+        GPIO_FN_ETH_CRS,
+        GPIO_FN_DCLKIN,
+        GPIO_FN_HSPI_RX,
+        GPIO_FN_HSYNC,
+        GPIO_FN_HSPI_TX,
+        GPIO_FN_DB5,
+        GPIO_FN_ETH_RXD3,
+        GPIO_FN_DB4,
+        GPIO_FN_ETH_RXD2,
+        GPIO_FN_DB3,
+        GPIO_FN_ETH_RXD1,
+        GPIO_FN_DB2,
+        GPIO_FN_ETH_RXD0,
+        GPIO_FN_DB1,
+        GPIO_FN_ETH_RX_DV,
+        GPIO_FN_DB0,
+        GPIO_FN_ETH_RX_ER,
+        GPIO_FN_DCLKOUT,
+        GPIO_FN_SCIF1_SLK,
+        GPIO_FN_SCIF1_RXD,
+        GPIO_FN_SCIF1_TXD,
+        GPIO_FN_DACK1,
+        GPIO_FN_BACK,
+        GPIO_FN_FALE,
+        GPIO_FN_DACK0,
+        GPIO_FN_FCLE,
+        GPIO_FN_DREQ1,
+        GPIO_FN_BREQ,
+        GPIO_FN_USB_OVC1,
+        GPIO_FN_DREQ0,
+        GPIO_FN_USB_OVC0,
+        GPIO_FN_USB_PENC1,
+        GPIO_FN_USB_PENC0,
+        GPIO_FN_HAC1_SDOUT,
+        GPIO_FN_SSI1_SDATA,
+        GPIO_FN_SDIF1CMD,
+        GPIO_FN_HAC1_SDIN,
+        GPIO_FN_SSI1_SCK,
+        GPIO_FN_SDIF1CD,
+        GPIO_FN_HAC1_SYNC,
+        GPIO_FN_SSI1_WS,
+        GPIO_FN_SDIF1WP,
+        GPIO_FN_HAC1_BITCLK,
+        GPIO_FN_SSI1_CLK,
+        GPIO_FN_SDIF1CLK,
+        GPIO_FN_HAC0_SDOUT,
+        GPIO_FN_SSI0_SDATA,
+        GPIO_FN_SDIF1D3,
+        GPIO_FN_HAC0_SDIN,
+        GPIO_FN_SSI0_SCK,
+        GPIO_FN_SDIF1D2,
+        GPIO_FN_HAC0_SYNC,
+        GPIO_FN_SSI0_WS,
+        GPIO_FN_SDIF1D1,
+        GPIO_FN_HAC0_BITCLK,
+        GPIO_FN_SSI0_CLK,
+        GPIO_FN_SDIF1D0,
+        GPIO_FN_SCIF3_SCK,
+        GPIO_FN_SSI2_SDATA,
+        GPIO_FN_SCIF3_RXD,
+        GPIO_FN_TCLK,
+        GPIO_FN_SSI2_SCK,
+        GPIO_FN_SCIF3_TXD,
+        GPIO_FN_HAC_RES,
+        GPIO_FN_SSI2_WS,
+        GPIO_FN_DACK3,
+        GPIO_FN_SDIF0CMD,
+        GPIO_FN_DACK2,
+        GPIO_FN_SDIF0CD,
+        GPIO_FN_DREQ3,
+        GPIO_FN_SDIF0WP,
+        GPIO_FN_SCIF0_CTS,
+        GPIO_FN_DREQ2,
+        GPIO_FN_SDIF0CLK,
+        GPIO_FN_SCIF0_RTS,
+        GPIO_FN_IRL7,
+        GPIO_FN_SDIF0D3,
+        GPIO_FN_SCIF0_SCK,
+        GPIO_FN_IRL6,
+        GPIO_FN_SDIF0D2,
+        GPIO_FN_SCIF0_RXD,
+        GPIO_FN_IRL5,
+        GPIO_FN_SDIF0D1,
+        GPIO_FN_SCIF0_TXD,
+        GPIO_FN_IRL4,
+        GPIO_FN_SDIF0D0,
+        GPIO_FN_SCIF5_SCK,
+        GPIO_FN_FRB,
+        GPIO_FN_SCIF5_RXD,
+        GPIO_FN_IOIS16,
+        GPIO_FN_SCIF5_TXD,
+        GPIO_FN_CE2B,
+        GPIO_FN_DRAK3,
+        GPIO_FN_CE2A,
+        GPIO_FN_SCIF4_SCK,
+        GPIO_FN_DRAK2,
+        GPIO_FN_SSI3_WS,
+        GPIO_FN_SCIF4_RXD,
+        GPIO_FN_DRAK1,
+        GPIO_FN_SSI3_SDATA,
+        GPIO_FN_FSTATUS,
+        GPIO_FN_SCIF4_TXD,
+        GPIO_FN_DRAK0,
+        GPIO_FN_SSI3_SCK,
+        GPIO_FN_FSE,
+};
+
+#endif /* __CPU_SH7786_H__ */
diff --git a/arch/sh/include/mach-common/mach/urquell.h b/arch/sh/include/mach-common/mach/urquell.h
new file mode 100644
index 000000000000..14b3e1d01777
--- /dev/null
+++ b/arch/sh/include/mach-common/mach/urquell.h
@@ -0,0 +1,68 @@
+#ifndef __MACH_URQUELL_H
+#define __MACH_URQUELL_H
+
+/*
+ * ------ 0x00000000 ------------------------------------
+ *  CS0 | (SW1,SW47)    EEPROM, SRAM, NOR FLASH
+ * -----+ 0x04000000 ------------------------------------
+ *  CS1 | (SW47)        SRAM, SRAM-LAN-PCMCIA, NOR FLASH
+ * -----+ 0x08000000 ------------------------------------
+ *  CS2 |               DDR3
+ *  CS3 |
+ * -----+ 0x10000000 ------------------------------------
+ *  CS4 |               PCIe
+ * -----+ 0x14000000 ------------------------------------
+ *  CS5 | (SW47)        LRAM/URAM, SRAM-LAN-PCMCIA
+ * -----+ 0x18000000 ------------------------------------
+ *  CS6 |               ATA, NAND FLASH
+ * -----+ 0x1c000000 ------------------------------------
+ *  CS7 |               SH7786 register
+ * -----+------------------------------------------------
+ */
+
+#define NOR_FLASH_ADDR  0x00000000
+#define NOR_FLASH_SIZE  0x04000000
+
+#define CS1_BASE        0x05000000
+#define CS5_BASE        0x15000000
+#define FPGA_BASE       CS1_BASE
+
+#define BOARDREG(ofs)   (FPGA_BASE + ofs##_OFS)
+#define UBOARDREG(ofs)  (0xa0000000 + FPGA_BASE + ofs##_OFS)
+
+#define SRSTR_OFS       0x0000 /* System reset register */
+#define BDMR_OFS        0x0010 /* Board operating mode resister */
+#define IRL0SR_OFS      0x0020 /* IRL0 Status register */
+#define IRL0MSKR_OFS    0x0030 /* IRL0 Mask register */
+#define IRL1SR_OFS      0x0040 /* IRL1 Status register */
+#define IRL1MSKR_OFS    0x0050 /* IRL1 Mask register */
+#define IRL2SR_OFS      0x0060 /* IRL2 Status register */
+#define IRL2MSKR_OFS    0x0070 /* IRL2 Mask register */
+#define IRL3SR_OFS      0x0080 /* IRL3 Status register */
+#define IRL3MSKR_OFS    0x0090 /* IRL3 Mask register */
+#define SOFTINTR_OFS    0x0120 /* Softwear Interrupt register */
+#define SLEDR_OFS       0x0130 /* LED control resister */
+#define MAPSCIFSWR_OFS  0x0140 /* Map/SCIF Switch register */
+#define FPVERR_OFS      0x0150 /* FPGA Version register */
+#define FPDATER_OFS     0x0160 /* FPGA Date register */
+#define FPYEARR_OFS     0x0170 /* FPGA Year register */
+#define TCLKCR_OFS      0x0180 /* TCLK Control register */
+#define DIPSWMR_OFS     0x1000 /* DIPSW monitor register */
+#define FPODR_OFS       0x1010 /* Output port data register */
+#define ATACNR_OFS      0x1020 /* ATA-CN Control/status register */
+#define FPINDR_OFS      0x1030 /* Input port data register */
+#define MDSWMR_OFS      0x1040 /* MODE SW monitor register */
+#define DDR3BUPCR_OFS   0x1050 /* DDR3 Backup control register */
+#define SSICODECCR_OFS  0x1060 /* SSI-CODEC control register */
+#define PCIESLOTSR_OFS  0x1070 /* PCIexpress Slot status register */
+#define ETHERPORTSR_OFS 0x1080 /* EtherPhy Port status register */
+#define LATCHCR_OFS     0x3000 /* Latch control register */
+#define LATCUAR_OFS     0x3010 /* Latch upper address register */
+#define LATCLAR_OFS     0x3012 /* Latch lower address register */
+#define LATCLUDR_OFS    0x3024 /* Latch D31-16 register */
+#define LATCLLDR_OFS    0x3026 /* Latch D15-0 register */
+
+#define CHARLED_OFS     0x2000 /* Character LED */
+
+#endif  /* __MACH_URQUELL_H */
+
diff --git a/arch/sh/kernel/Makefile_32 b/arch/sh/kernel/Makefile_32
index 2e1b86e16ab5..82a3a150c00d 100644
--- a/arch/sh/kernel/Makefile_32
+++ b/arch/sh/kernel/Makefile_32
@@ -30,5 +30,6 @@ obj-$(CONFIG_KPROBES)		+= kprobes.o
 obj-$(CONFIG_GENERIC_GPIO)      += gpio.o
 obj-$(CONFIG_DYNAMIC_FTRACE)    += ftrace.o
 obj-$(CONFIG_DUMP_CODE)         += disassemble.o
+obj-$(CONFIG_HIBERNATION)       += swsusp.o
 
 EXTRA_CFLAGS += -Werror
diff --git a/arch/sh/kernel/asm-offsets.c b/arch/sh/kernel/asm-offsets.c
index 57cf0e0680f3..99aceb28ee24 100644
--- a/arch/sh/kernel/asm-offsets.c
+++ b/arch/sh/kernel/asm-offsets.c
@@ -12,8 +12,10 @@
 #include <linux/types.h>
 #include <linux/mm.h>
 #include <linux/kbuild.h>
+#include <linux/suspend.h>
 
 #include <asm/thread_info.h>
+#include <asm/suspend.h>
 
 int main(void)
 {
@@ -25,5 +27,11 @@ int main(void)
         DEFINE(TI_PRE_COUNT,    offsetof(struct thread_info, preempt_count));
         DEFINE(TI_RESTART_BLOCK,offsetof(struct thread_info, restart_block));
 
+#ifdef CONFIG_HIBERNATION
+        DEFINE(PBE_ADDRESS, offsetof(struct pbe, address));
+        DEFINE(PBE_ORIG_ADDRESS, offsetof(struct pbe, orig_address));
+        DEFINE(PBE_NEXT, offsetof(struct pbe, next));
+        DEFINE(SWSUSP_ARCH_REGS_SIZE, sizeof(struct swsusp_arch_regs));
+#endif
         return 0;
 }
diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile
index f471d242774e..2600641a483f 100644
--- a/arch/sh/kernel/cpu/Makefile
+++ b/arch/sh/kernel/cpu/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_CPU_SH5)		= sh5/
 # Special cases for family ancestry.
 
 obj-$(CONFIG_CPU_SH4A)          += sh4a/
+obj-$(CONFIG_ARCH_SHMOBILE)     += shmobile/
 
 # Common interfaces.
 
diff --git a/arch/sh/kernel/cpu/clock.c b/arch/sh/kernel/cpu/clock.c
index 7b17137536d6..1dc896483b59 100644
--- a/arch/sh/kernel/cpu/clock.c
+++ b/arch/sh/kernel/cpu/clock.c
@@ -20,6 +20,8 @@
 #include <linux/mutex.h>
 #include <linux/list.h>
 #include <linux/kref.h>
+#include <linux/kobject.h>
+#include <linux/sysdev.h>
 #include <linux/seq_file.h>
 #include <linux/err.h>
 #include <linux/platform_device.h>
@@ -239,6 +241,35 @@ void clk_recalc_rate(struct clk *clk)
 }
 EXPORT_SYMBOL_GPL(clk_recalc_rate);
 
+int clk_set_parent(struct clk *clk, struct clk *parent)
+{
+        int ret = -EINVAL;
+        struct clk *old;
+
+        if (!parent || !clk)
+                return ret;
+
+        old = clk->parent;
+        if (likely(clk->ops && clk->ops->set_parent)) {
+                unsigned long flags;
+                spin_lock_irqsave(&clock_lock, flags);
+                ret = clk->ops->set_parent(clk, parent);
+                spin_unlock_irqrestore(&clock_lock, flags);
+                clk->parent = (ret ? old : parent);
+        }
+
+        if (unlikely(clk->flags & CLK_RATE_PROPAGATES))
+                propagate_rate(clk);
+        return ret;
+}
+EXPORT_SYMBOL_GPL(clk_set_parent);
+
+struct clk *clk_get_parent(struct clk *clk)
+{
+        return clk->parent;
+}
+EXPORT_SYMBOL_GPL(clk_get_parent);
+
 long clk_round_rate(struct clk *clk, unsigned long rate)
 {
         if (likely(clk->ops && clk->ops->round_rate)) {
@@ -329,6 +360,70 @@ static int show_clocks(char *buf, char **start, off_t off,
         return p - buf;
 }
 
+#ifdef CONFIG_PM
+static int clks_sysdev_suspend(struct sys_device *dev, pm_message_t state)
+{
+        static pm_message_t prev_state;
+        struct clk *clkp;
+
+        switch (state.event) {
+        case PM_EVENT_ON:
+                /* Resumeing from hibernation */
+                if (prev_state.event == PM_EVENT_FREEZE) {
+                        list_for_each_entry(clkp, &clock_list, node)
+                                if (likely(clkp->ops)) {
+                                        unsigned long rate = clkp->rate;
+
+                                        if (likely(clkp->ops->set_parent))
+                                                clkp->ops->set_parent(clkp,
+                                                        clkp->parent);
+                                        if (likely(clkp->ops->set_rate))
+                                                clkp->ops->set_rate(clkp,
+                                                        rate, NO_CHANGE);
+                                        else if (likely(clkp->ops->recalc))
+                                                clkp->ops->recalc(clkp);
+                                        }
+                }
+                break;
+        case PM_EVENT_FREEZE:
+                break;
+        case PM_EVENT_SUSPEND:
+                break;
+        }
+
+        prev_state = state;
+        return 0;
+}
+
+static int clks_sysdev_resume(struct sys_device *dev)
+{
+        return clks_sysdev_suspend(dev, PMSG_ON);
+}
+
+static struct sysdev_class clks_sysdev_class = {
+        .name = "clks",
+};
+
+static struct sysdev_driver clks_sysdev_driver = {
+        .suspend = clks_sysdev_suspend,
+        .resume = clks_sysdev_resume,
+};
+
+static struct sys_device clks_sysdev_dev = {
+        .cls = &clks_sysdev_class,
+};
+
+static int __init clk_sysdev_init(void)
+{
+        sysdev_class_register(&clks_sysdev_class);
+        sysdev_driver_register(&clks_sysdev_class, &clks_sysdev_driver);
+        sysdev_register(&clks_sysdev_dev);
+
+        return 0;
+}
+subsys_initcall(clk_sysdev_init);
+#endif
+
 int __init clk_init(void)
 {
         int i, ret = 0;
diff --git a/arch/sh/kernel/cpu/sh2/setup-sh7619.c b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
index 56e5878e5516..0e32d8e448ca 100644
--- a/arch/sh/kernel/cpu/sh2/setup-sh7619.c
+++ b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
@@ -2,6 +2,7 @@
  * SH7619 Setup
  *
  *  Copyright (C) 2006  Yoshinori Sato
+ *  Copyright (C) 2009  Paul Mundt
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -18,15 +19,10 @@ enum {
         /* interrupt sources */
         IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
         WDT, EDMAC, CMT0, CMT1,
-        SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI,
-        SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI,
-        SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI,
+        SCIF0, SCIF1, SCIF2,
         HIF_HIFI, HIF_HIFBI,
         DMAC0, DMAC1, DMAC2, DMAC3,
         SIOF,
-
-        /* interrupt groups */
-        SCIF0, SCIF1, SCIF2,
 };
 
 static struct intc_vect vectors[] __initdata = {
@@ -36,24 +32,18 @@ static struct intc_vect vectors[] __initdata = {
         INTC_IRQ(IRQ6, 82), INTC_IRQ(IRQ7, 83),
         INTC_IRQ(WDT, 84), INTC_IRQ(EDMAC, 85),
         INTC_IRQ(CMT0, 86), INTC_IRQ(CMT1, 87),
-        INTC_IRQ(SCIF0_ERI, 88), INTC_IRQ(SCIF0_RXI, 89),
-        INTC_IRQ(SCIF0_BRI, 90), INTC_IRQ(SCIF0_TXI, 91),
-        INTC_IRQ(SCIF1_ERI, 92), INTC_IRQ(SCIF1_RXI, 93),
-        INTC_IRQ(SCIF1_BRI, 94), INTC_IRQ(SCIF1_TXI, 95),
-        INTC_IRQ(SCIF2_ERI, 96), INTC_IRQ(SCIF2_RXI, 97),
-        INTC_IRQ(SCIF2_BRI, 98), INTC_IRQ(SCIF2_TXI, 99),
+        INTC_IRQ(SCIF0, 88), INTC_IRQ(SCIF0, 89),
+        INTC_IRQ(SCIF0, 90), INTC_IRQ(SCIF0, 91),
+        INTC_IRQ(SCIF1, 92), INTC_IRQ(SCIF1, 93),
+        INTC_IRQ(SCIF1, 94), INTC_IRQ(SCIF1, 95),
+        INTC_IRQ(SCIF2, 96), INTC_IRQ(SCIF2, 97),
+        INTC_IRQ(SCIF2, 98), INTC_IRQ(SCIF2, 99),
         INTC_IRQ(HIF_HIFI, 100), INTC_IRQ(HIF_HIFBI, 101),
         INTC_IRQ(DMAC0, 104), INTC_IRQ(DMAC1, 105),
         INTC_IRQ(DMAC2, 106), INTC_IRQ(DMAC3, 107),
         INTC_IRQ(SIOF, 108),
 };
 
-static struct intc_group groups[] __initdata = {
-        INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
-        INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI),
-        INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI),
-};
-
 static struct intc_prio_reg prio_registers[] __initdata = {
         { 0xf8140006, 0, 16, 4, /* IPRA */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
         { 0xf8140008, 0, 16, 4, /* IPRB */ { IRQ4, IRQ5, IRQ6, IRQ7 } },
@@ -64,7 +54,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
         { 0xf8080008, 0, 16, 4, /* IPRG */ { SIOF } },
 };
 
-static DECLARE_INTC_DESC(intc_desc, "sh7619", vectors, groups,
+static DECLARE_INTC_DESC(intc_desc, "sh7619", vectors, NULL,
                          NULL, prio_registers, NULL);
 
 static struct plat_sci_port sci_platform_data[] = {
@@ -72,17 +62,17 @@ static struct plat_sci_port sci_platform_data[] = {
                 .mapbase        = 0xf8400000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           =  { 88, 89, 91, 90},
+                .irqs           = { 88, 88, 88, 88 },
         }, {
                 .mapbase        = 0xf8410000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           =  { 92, 93, 95, 94},
+                .irqs           = { 92, 92, 92, 92 },
         }, {
                 .mapbase        = 0xf8420000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           =  { 96, 97, 99, 98},
+                .irqs           = { 96, 96, 96, 96 },
         }, {
                 .flags = 0,
         }
diff --git a/arch/sh/kernel/cpu/sh2a/setup-mxg.c b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
index e611d79fac4c..844293723cfc 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-mxg.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
@@ -1,7 +1,7 @@
 /*
  * Renesas MX-G (R8A03022BG) Setup
  *
- *  Copyright (C) 2008  Paul Mundt
+ *  Copyright (C) 2008, 2009  Paul Mundt
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -20,23 +20,15 @@ enum {
         IRQ8, IRQ9, IRQ10, IRQ11, IRQ12, IRQ13, IRQ14, IRQ15,
 
         PINT0, PINT1, PINT2, PINT3, PINT4, PINT5, PINT6, PINT7,
-
         SINT8, SINT7, SINT6, SINT5, SINT4, SINT3, SINT2, SINT1,
 
-        SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI,
-        SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI,
+        SCIF0, SCIF1,
 
-        MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D,
-        MTU2_TCI0V, MTU2_TGI0E, MTU2_TGI0F,
-        MTU2_TGI1A, MTU2_TGI1B, MTU2_TCI1V, MTU2_TCI1U,
-        MTU2_TGI2A, MTU2_TGI2B, MTU2_TCI2V, MTU2_TCI2U,
-        MTU2_TGI3A, MTU2_TGI3B, MTU2_TGI3C, MTU2_TGI3D, MTU2_TCI3V,
-        MTU2_TGI4A, MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D, MTU2_TCI4V,
-        MTU2_TGI5U, MTU2_TGI5V, MTU2_TGI5W,
+        MTU2_GROUP1, MTU2_GROUP2, MTU2_GROUP3, MTU2_GROUP4, MTU2_GROUP5
+        MTU2_TGI3B, MTU2_TGI3C,
 
         /* interrupt groups */
-        PINT, SCIF0, SCIF1,
-        MTU2_GROUP1, MTU2_GROUP2, MTU2_GROUP3, MTU2_GROUP4, MTU2_GROUP5
+        PINT,
 };
 
 static struct intc_vect vectors[] __initdata = {
@@ -59,47 +51,36 @@ static struct intc_vect vectors[] __initdata = {
         INTC_IRQ(SINT4, 98), INTC_IRQ(SINT3, 99),
         INTC_IRQ(SINT2, 100), INTC_IRQ(SINT1, 101),
 
-        INTC_IRQ(SCIF0_RXI, 220), INTC_IRQ(SCIF0_TXI, 221),
-        INTC_IRQ(SCIF0_BRI, 222), INTC_IRQ(SCIF0_ERI, 223),
-        INTC_IRQ(SCIF1_RXI, 224), INTC_IRQ(SCIF1_TXI, 225),
-        INTC_IRQ(SCIF1_BRI, 226), INTC_IRQ(SCIF1_ERI, 227),
+        INTC_IRQ(SCIF0, 220), INTC_IRQ(SCIF0, 221),
+        INTC_IRQ(SCIF0, 222), INTC_IRQ(SCIF0, 223),
+        INTC_IRQ(SCIF1, 224), INTC_IRQ(SCIF1, 225),
+        INTC_IRQ(SCIF1, 226), INTC_IRQ(SCIF1, 227),
 
-        INTC_IRQ(MTU2_TGI0A, 228), INTC_IRQ(MTU2_TGI0B, 229),
-        INTC_IRQ(MTU2_TGI0C, 230), INTC_IRQ(MTU2_TGI0D, 231),
-        INTC_IRQ(MTU2_TCI0V, 232), INTC_IRQ(MTU2_TGI0E, 233),
+        INTC_IRQ(MTU2_GROUP1, 228), INTC_IRQ(MTU2_GROUP1, 229),
+        INTC_IRQ(MTU2_GROUP1, 230), INTC_IRQ(MTU2_GROUP1, 231),
+        INTC_IRQ(MTU2_GROUP1, 232), INTC_IRQ(MTU2_GROUP1, 233),
 
-        INTC_IRQ(MTU2_TGI0F, 234), INTC_IRQ(MTU2_TGI1A, 235),
-        INTC_IRQ(MTU2_TGI1B, 236), INTC_IRQ(MTU2_TCI1V, 237),
-        INTC_IRQ(MTU2_TCI1U, 238), INTC_IRQ(MTU2_TGI2A, 239),
+        INTC_IRQ(MTU2_GROUP2, 234), INTC_IRQ(MTU2_GROUP2, 235),
+        INTC_IRQ(MTU2_GROUP2, 236), INTC_IRQ(MTU2_GROUP2, 237),
+        INTC_IRQ(MTU2_GROUP2, 238), INTC_IRQ(MTU2_GROUP2, 239),
 
-        INTC_IRQ(MTU2_TGI2B, 240), INTC_IRQ(MTU2_TCI2V, 241),
-        INTC_IRQ(MTU2_TCI2U, 242), INTC_IRQ(MTU2_TGI3A, 243),
+        INTC_IRQ(MTU2_GROUP3, 240), INTC_IRQ(MTU2_GROUP3, 241),
+        INTC_IRQ(MTU2_GROUP3, 242), INTC_IRQ(MTU2_GROUP3, 243),
 
         INTC_IRQ(MTU2_TGI3B, 244),
         INTC_IRQ(MTU2_TGI3C, 245),
 
-        INTC_IRQ(MTU2_TGI3D, 246), INTC_IRQ(MTU2_TCI3V, 247),
-        INTC_IRQ(MTU2_TGI4A, 248), INTC_IRQ(MTU2_TGI4B, 249),
-        INTC_IRQ(MTU2_TGI4C, 250), INTC_IRQ(MTU2_TGI4D, 251),
+        INTC_IRQ(MTU2_GROUP4, 246), INTC_IRQ(MTU2_GROUP4, 247),
+        INTC_IRQ(MTU2_GROUP4, 248), INTC_IRQ(MTU2_GROUP4, 249),
+        INTC_IRQ(MTU2_GROUP4, 250), INTC_IRQ(MTU2_GROUP4, 251),
 
-        INTC_IRQ(MTU2_TCI4V, 252), INTC_IRQ(MTU2_TGI5U, 253),
-        INTC_IRQ(MTU2_TGI5V, 254), INTC_IRQ(MTU2_TGI5W, 255),
+        INTC_IRQ(MTU2_GROUP5, 252), INTC_IRQ(MTU2_GROUP5, 253),
+        INTC_IRQ(MTU2_GROUP5, 254), INTC_IRQ(MTU2_GROUP5, 255),
 };
 
 static struct intc_group groups[] __initdata = {
         INTC_GROUP(PINT, PINT0, PINT1, PINT2, PINT3,
                    PINT4, PINT5, PINT6, PINT7),
-        INTC_GROUP(MTU2_GROUP1, MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D,
-                   MTU2_TCI0V, MTU2_TGI0E),
-        INTC_GROUP(MTU2_GROUP2, MTU2_TGI0F, MTU2_TGI1A, MTU2_TGI1B,
-                   MTU2_TCI1V, MTU2_TCI1U, MTU2_TGI2A),
-        INTC_GROUP(MTU2_GROUP3, MTU2_TGI2B, MTU2_TCI2V, MTU2_TCI2U,
-                   MTU2_TGI3A),
-        INTC_GROUP(MTU2_GROUP4, MTU2_TGI3D, MTU2_TCI3V, MTU2_TGI4A,
-                   MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D),
-        INTC_GROUP(MTU2_GROUP5, MTU2_TCI4V, MTU2_TGI5U, MTU2_TGI5V, MTU2_TGI5W),
-        INTC_GROUP(SCIF0, SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI),
-        INTC_GROUP(SCIF1, SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI),
 };
 
 static struct intc_prio_reg prio_registers[] __initdata = {
@@ -137,7 +118,7 @@ static struct plat_sci_port sci_platform_data[] = {
                 .mapbase        = 0xff804000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 223, 220, 221, 222 },
+                .irqs           = { 220, 220, 220, 220 },
         }, {
                 .flags = 0,
         }
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
index 0631e421c022..00f42f9e3f5c 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
@@ -2,6 +2,7 @@
  *  SH7201 setup
  *
  *  Copyright (C) 2008  Peter Griffin pgriffin@mpc-data.co.uk
+ *  Copyright (C) 2009  Paul Mundt
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -18,57 +19,32 @@ enum {
         /* interrupt sources */
         IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
         PINT0, PINT1, PINT2, PINT3, PINT4, PINT5, PINT6, PINT7,
+
         ADC_ADI,
-        MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D,
-        MTU2_TCI0V, MTU2_TGI0E, MTU2_TGI0F,
-        MTU2_TGI1A, MTU2_TGI1B, MTU2_TCI1V, MTU2_TCI1U,
-        MTU2_TGI2A, MTU2_TGI2B, MTU2_TCI2V, MTU2_TCI2U,
-        MTU2_TGI3A, MTU2_TGI3B, MTU2_TGI3C, MTU2_TGI3D, MTU2_TCI3V,
-        MTU2_TGI4A, MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D, MTU2_TCI4V,
-        MTU2_TGI5U, MTU2_TGI5V, MTU2_TGI5W,
-        RTC_ARM, RTC_PRD, RTC_CUP,
-        WDT,
-        IIC30_STPI, IIC30_NAKI, IIC30_RXI, IIC30_TXI, IIC30_TEI,
-        IIC31_STPI, IIC31_NAKI, IIC31_RXI, IIC31_TXI, IIC31_TEI,
-        IIC32_STPI, IIC32_NAKI, IIC32_RXI, IIC32_TXI, IIC32_TEI,
+
+        MTU20_ABCD, MTU20_VEF, MTU21_AB, MTU21_VU, MTU22_AB, MTU22_VU,
+        MTU23_ABCD, MTU24_ABCD, MTU25_UVW, MTU2_TCI3V, MTU2_TCI4V,
+
+        RTC, WDT,
+
+        IIC30, IIC31, IIC32,
 
         DMAC0_DMINT0, DMAC1_DMINT1,
         DMAC2_DMINT2, DMAC3_DMINT3,
 
-        SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI,
-        SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI,
-        SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI,
-        SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI,
-        SCIF4_BRI, SCIF4_ERI, SCIF4_RXI, SCIF4_TXI,
-        SCIF5_BRI, SCIF5_ERI, SCIF5_RXI, SCIF5_TXI,
-        SCIF6_BRI, SCIF6_ERI, SCIF6_RXI, SCIF6_TXI,
-        SCIF7_BRI, SCIF7_ERI, SCIF7_RXI, SCIF7_TXI,
+        SCIF0, SCIF1, SCIF2, SCIF3, SCIF4, SCIF5, SCIF6, SCIF7,
 
         DMAC0_DMINTA, DMAC4_DMINT4, DMAC5_DMINT5, DMAC6_DMINT6,
         DMAC7_DMINT7,
 
-        RCAN0_ERS, RCAN0_OVR,
-        RCAN0_SLE,
-        RCAN0_RM0, RCAN0_RM1,
-
-        RCAN1_ERS, RCAN1_OVR,
-        RCAN1_SLE,
-        RCAN1_RM0, RCAN1_RM1,
+        RCAN0, RCAN1,
 
         SSI0_SSII, SSI1_SSII,
 
-        TMR0_CMIA0, TMR0_CMIB0, TMR0_OVI0,
-        TMR1_CMIA1, TMR1_CMIB1, TMR1_OVI1,
+        TMR0, TMR1,
 
         /* interrupt groups */
-
-        IRQ, PINT, ADC,
-        MTU20_ABCD, MTU20_VEF, MTU21_AB, MTU21_VU, MTU22_AB, MTU22_VU,
-        MTU23_ABCD, MTU24_ABCD, MTU25_UVW,
-        RTC, IIC30, IIC31, IIC32,
-        SCIF0, SCIF1, SCIF2, SCIF3, SCIF4, SCIF5, SCIF6, SCIF7,
-        RCAN0, RCAN1, TMR0, TMR1
-
+        PINT,
 };
 
 static struct intc_vect vectors[] __initdata = {
@@ -76,6 +52,7 @@ static struct intc_vect vectors[] __initdata = {
         INTC_IRQ(IRQ2, 66), INTC_IRQ(IRQ3, 67),
         INTC_IRQ(IRQ4, 68), INTC_IRQ(IRQ5, 69),
         INTC_IRQ(IRQ6, 70), INTC_IRQ(IRQ7, 71),
+
         INTC_IRQ(PINT0, 80), INTC_IRQ(PINT1, 81),
         INTC_IRQ(PINT2, 82), INTC_IRQ(PINT3, 83),
         INTC_IRQ(PINT4, 84), INTC_IRQ(PINT5, 85),
@@ -83,123 +60,92 @@ static struct intc_vect vectors[] __initdata = {
 
         INTC_IRQ(ADC_ADI, 92),
 
-        INTC_IRQ(MTU2_TGI0A, 108), INTC_IRQ(MTU2_TGI0B, 109),
-        INTC_IRQ(MTU2_TGI0C, 110), INTC_IRQ(MTU2_TGI0D, 111),
-        INTC_IRQ(MTU2_TCI0V, 112),
-        INTC_IRQ(MTU2_TGI0E, 113), INTC_IRQ(MTU2_TGI0F, 114),
+        INTC_IRQ(MTU20_ABCD, 108), INTC_IRQ(MTU20_ABCD, 109),
+        INTC_IRQ(MTU20_ABCD, 110), INTC_IRQ(MTU20_ABCD, 111),
+
+        INTC_IRQ(MTU20_VEF, 112), INTC_IRQ(MTU20_VEF, 113),
+        INTC_IRQ(MTU20_VEF, 114),
+
+        INTC_IRQ(MTU21_AB, 116), INTC_IRQ(MTU21_AB, 117),
+        INTC_IRQ(MTU21_VU, 120), INTC_IRQ(MTU21_VU, 121),
 
-        INTC_IRQ(MTU2_TGI1A, 116), INTC_IRQ(MTU2_TGI1B, 117),
-        INTC_IRQ(MTU2_TCI1V, 120), INTC_IRQ(MTU2_TCI1U, 121),
+        INTC_IRQ(MTU22_AB, 124), INTC_IRQ(MTU22_AB, 125),
+        INTC_IRQ(MTU22_VU, 128), INTC_IRQ(MTU22_VU, 129),
 
-        INTC_IRQ(MTU2_TGI2A, 124), INTC_IRQ(MTU2_TGI2B, 125),
-        INTC_IRQ(MTU2_TCI2V, 128), INTC_IRQ(MTU2_TCI2U, 129),
+        INTC_IRQ(MTU23_ABCD, 132), INTC_IRQ(MTU23_ABCD, 133),
+        INTC_IRQ(MTU23_ABCD, 134), INTC_IRQ(MTU23_ABCD, 135),
 
-        INTC_IRQ(MTU2_TGI3A, 132), INTC_IRQ(MTU2_TGI3B, 133),
-        INTC_IRQ(MTU2_TGI3C, 134), INTC_IRQ(MTU2_TGI3D, 135),
         INTC_IRQ(MTU2_TCI3V, 136),
 
-        INTC_IRQ(MTU2_TGI4A, 140), INTC_IRQ(MTU2_TGI4B, 141),
-        INTC_IRQ(MTU2_TGI4C, 142), INTC_IRQ(MTU2_TGI4D, 143),
+        INTC_IRQ(MTU24_ABCD, 140), INTC_IRQ(MTU24_ABCD, 141),
+        INTC_IRQ(MTU24_ABCD, 142), INTC_IRQ(MTU24_ABCD, 143),
+
         INTC_IRQ(MTU2_TCI4V, 144),
 
-        INTC_IRQ(MTU2_TGI5U, 148), INTC_IRQ(MTU2_TGI5V, 149),
-        INTC_IRQ(MTU2_TGI5W, 150),
+        INTC_IRQ(MTU25_UVW, 148), INTC_IRQ(MTU25_UVW, 149),
+        INTC_IRQ(MTU25_UVW, 150),
+
+        INTC_IRQ(RTC, 152), INTC_IRQ(RTC, 153),
+        INTC_IRQ(RTC, 154),
 
-        INTC_IRQ(RTC_ARM, 152), INTC_IRQ(RTC_PRD, 153),
-        INTC_IRQ(RTC_CUP, 154), INTC_IRQ(WDT, 156),
+        INTC_IRQ(WDT, 156),
 
-        INTC_IRQ(IIC30_STPI, 157), INTC_IRQ(IIC30_NAKI, 158),
-        INTC_IRQ(IIC30_RXI, 159), INTC_IRQ(IIC30_TXI, 160),
-        INTC_IRQ(IIC30_TEI, 161),
+        INTC_IRQ(IIC30, 157), INTC_IRQ(IIC30, 158),
+        INTC_IRQ(IIC30, 159), INTC_IRQ(IIC30, 160),
+        INTC_IRQ(IIC30, 161),
 
-        INTC_IRQ(IIC31_STPI, 164), INTC_IRQ(IIC31_NAKI, 165),
-        INTC_IRQ(IIC31_RXI, 166), INTC_IRQ(IIC31_TXI, 167),
-        INTC_IRQ(IIC31_TEI, 168),
+        INTC_IRQ(IIC31, 164), INTC_IRQ(IIC31, 165),
+        INTC_IRQ(IIC31, 166), INTC_IRQ(IIC31, 167),
+        INTC_IRQ(IIC31, 168),
 
-        INTC_IRQ(IIC32_STPI, 170), INTC_IRQ(IIC32_NAKI, 171),
-        INTC_IRQ(IIC32_RXI, 172), INTC_IRQ(IIC32_TXI, 173),
-        INTC_IRQ(IIC32_TEI, 174),
+        INTC_IRQ(IIC32, 170), INTC_IRQ(IIC32, 171),
+        INTC_IRQ(IIC32, 172), INTC_IRQ(IIC32, 173),
+        INTC_IRQ(IIC32, 174),
 
         INTC_IRQ(DMAC0_DMINT0, 176), INTC_IRQ(DMAC1_DMINT1, 177),
         INTC_IRQ(DMAC2_DMINT2, 178), INTC_IRQ(DMAC3_DMINT3, 179),
 
-        INTC_IRQ(SCIF0_BRI, 180), INTC_IRQ(SCIF0_ERI, 181),
-        INTC_IRQ(SCIF0_RXI, 182), INTC_IRQ(SCIF0_TXI, 183),
-        INTC_IRQ(SCIF1_BRI, 184), INTC_IRQ(SCIF1_ERI, 185),
-        INTC_IRQ(SCIF1_RXI, 186), INTC_IRQ(SCIF1_TXI, 187),
-        INTC_IRQ(SCIF2_BRI, 188), INTC_IRQ(SCIF2_ERI, 189),
-        INTC_IRQ(SCIF2_RXI, 190), INTC_IRQ(SCIF2_TXI, 191),
-        INTC_IRQ(SCIF3_BRI, 192), INTC_IRQ(SCIF3_ERI, 193),
-        INTC_IRQ(SCIF3_RXI, 194), INTC_IRQ(SCIF3_TXI, 195),
-        INTC_IRQ(SCIF4_BRI, 196), INTC_IRQ(SCIF4_ERI, 197),
-        INTC_IRQ(SCIF4_RXI, 198), INTC_IRQ(SCIF4_TXI, 199),
-        INTC_IRQ(SCIF5_BRI, 200), INTC_IRQ(SCIF5_ERI, 201),
-        INTC_IRQ(SCIF5_RXI, 202), INTC_IRQ(SCIF5_TXI, 203),
-        INTC_IRQ(SCIF6_BRI, 204), INTC_IRQ(SCIF6_ERI, 205),
-        INTC_IRQ(SCIF6_RXI, 206), INTC_IRQ(SCIF6_TXI, 207),
-        INTC_IRQ(SCIF7_BRI, 208), INTC_IRQ(SCIF7_ERI, 209),
-        INTC_IRQ(SCIF7_RXI, 210), INTC_IRQ(SCIF7_TXI, 211),
+        INTC_IRQ(SCIF0, 180), INTC_IRQ(SCIF0, 181),
+        INTC_IRQ(SCIF0, 182), INTC_IRQ(SCIF0, 183),
+        INTC_IRQ(SCIF1, 184), INTC_IRQ(SCIF1, 185),
+        INTC_IRQ(SCIF1, 186), INTC_IRQ(SCIF1, 187),
+        INTC_IRQ(SCIF2, 188), INTC_IRQ(SCIF2, 189),
+        INTC_IRQ(SCIF2, 190), INTC_IRQ(SCIF2, 191),
+        INTC_IRQ(SCIF3, 192), INTC_IRQ(SCIF3, 193),
+        INTC_IRQ(SCIF3, 194), INTC_IRQ(SCIF3, 195),
+        INTC_IRQ(SCIF4, 196), INTC_IRQ(SCIF4, 197),
+        INTC_IRQ(SCIF4, 198), INTC_IRQ(SCIF4, 199),
+        INTC_IRQ(SCIF5, 200), INTC_IRQ(SCIF5, 201),
+        INTC_IRQ(SCIF5, 202), INTC_IRQ(SCIF5, 203),
+        INTC_IRQ(SCIF6, 204), INTC_IRQ(SCIF6, 205),
+        INTC_IRQ(SCIF6, 206), INTC_IRQ(SCIF6, 207),
+        INTC_IRQ(SCIF7, 208), INTC_IRQ(SCIF7, 209),
+        INTC_IRQ(SCIF7, 210), INTC_IRQ(SCIF7, 211),
 
         INTC_IRQ(DMAC0_DMINTA, 212), INTC_IRQ(DMAC4_DMINT4, 216),
         INTC_IRQ(DMAC5_DMINT5, 217), INTC_IRQ(DMAC6_DMINT6, 218),
         INTC_IRQ(DMAC7_DMINT7, 219),
 
-        INTC_IRQ(RCAN0_ERS, 228), INTC_IRQ(RCAN0_OVR, 229),
-        INTC_IRQ(RCAN0_SLE, 230),
-        INTC_IRQ(RCAN0_RM0, 231), INTC_IRQ(RCAN0_RM1, 232),
+        INTC_IRQ(RCAN0, 228), INTC_IRQ(RCAN0, 229),
+        INTC_IRQ(RCAN0, 230),
+        INTC_IRQ(RCAN0, 231), INTC_IRQ(RCAN0, 232),
 
-        INTC_IRQ(RCAN1_ERS, 234), INTC_IRQ(RCAN1_OVR, 235),
-        INTC_IRQ(RCAN1_SLE, 236),
-        INTC_IRQ(RCAN1_RM0, 237), INTC_IRQ(RCAN1_RM1, 238),
+        INTC_IRQ(RCAN1, 234), INTC_IRQ(RCAN1, 235),
+        INTC_IRQ(RCAN1, 236),
+        INTC_IRQ(RCAN1, 237), INTC_IRQ(RCAN1, 238),
 
         INTC_IRQ(SSI0_SSII, 244), INTC_IRQ(SSI1_SSII, 245),
 
-        INTC_IRQ(TMR0_CMIA0, 246), INTC_IRQ(TMR0_CMIB0, 247),
-        INTC_IRQ(TMR0_OVI0, 248),
-
-        INTC_IRQ(TMR1_CMIA1, 252), INTC_IRQ(TMR1_CMIB1, 253),
-        INTC_IRQ(TMR1_OVI1, 254),
+        INTC_IRQ(TMR0, 246), INTC_IRQ(TMR0, 247),
+        INTC_IRQ(TMR0, 248),
 
+        INTC_IRQ(TMR1, 252), INTC_IRQ(TMR1, 253),
+        INTC_IRQ(TMR1, 254),
 };
 
 static struct intc_group groups[] __initdata = {
         INTC_GROUP(PINT, PINT0, PINT1, PINT2, PINT3,
                    PINT4, PINT5, PINT6, PINT7),
-        INTC_GROUP(MTU20_ABCD, MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D),
-        INTC_GROUP(MTU20_VEF, MTU2_TCI0V, MTU2_TGI0E, MTU2_TGI0F),
-
-        INTC_GROUP(MTU21_AB, MTU2_TGI1A, MTU2_TGI1B),
-        INTC_GROUP(MTU21_VU, MTU2_TCI1V, MTU2_TCI1U),
-        INTC_GROUP(MTU22_AB, MTU2_TGI2A, MTU2_TGI2B),
-        INTC_GROUP(MTU22_VU, MTU2_TCI2V, MTU2_TCI2U),
-        INTC_GROUP(MTU23_ABCD, MTU2_TGI3A, MTU2_TGI3B, MTU2_TGI3C, MTU2_TGI3D),
-        INTC_GROUP(MTU24_ABCD, MTU2_TGI4A, MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D),
-        INTC_GROUP(MTU25_UVW, MTU2_TGI5U, MTU2_TGI5V, MTU2_TGI5W),
-        INTC_GROUP(RTC, RTC_ARM, RTC_PRD, RTC_CUP ),
-
-        INTC_GROUP(IIC30, IIC30_STPI, IIC30_NAKI, IIC30_RXI, IIC30_TXI,
-                   IIC30_TEI),
-        INTC_GROUP(IIC31, IIC31_STPI, IIC31_NAKI, IIC31_RXI, IIC31_TXI,
-                   IIC31_TEI),
-        INTC_GROUP(IIC32, IIC32_STPI, IIC32_NAKI, IIC32_RXI, IIC32_TXI,
-                   IIC32_TEI),
-
-        INTC_GROUP(SCIF0, SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI),
-        INTC_GROUP(SCIF1, SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI),
-        INTC_GROUP(SCIF2, SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI),
-        INTC_GROUP(SCIF3, SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI),
-        INTC_GROUP(SCIF4, SCIF4_BRI, SCIF4_ERI, SCIF4_RXI, SCIF4_TXI),
-        INTC_GROUP(SCIF5, SCIF5_BRI, SCIF5_ERI, SCIF5_RXI, SCIF5_TXI),
-        INTC_GROUP(SCIF6, SCIF6_BRI, SCIF6_ERI, SCIF6_RXI, SCIF6_TXI),
-        INTC_GROUP(SCIF7, SCIF7_BRI, SCIF7_ERI, SCIF7_RXI, SCIF7_TXI),
-
-        INTC_GROUP(RCAN0, RCAN0_ERS, RCAN0_OVR, RCAN0_RM0, RCAN0_RM1,
-                   RCAN0_SLE),
-        INTC_GROUP(RCAN1, RCAN1_ERS, RCAN1_OVR, RCAN1_RM0, RCAN1_RM1,
-                   RCAN1_SLE),
-
-        INTC_GROUP(TMR0, TMR0_CMIA0, TMR0_CMIB0, TMR0_OVI0),
-        INTC_GROUP(TMR1, TMR1_CMIA1, TMR1_CMIB1, TMR1_OVI1),
 };
 
 static struct intc_prio_reg prio_registers[] __initdata = {
@@ -212,7 +158,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
 
         { 0xfffe9806, 0, 16, 4, /* IPR09 */ { RTC, WDT, IIC30, 0 } },
         { 0xfffe9808, 0, 16, 4, /* IPR10 */ { IIC31, IIC32, DMAC0_DMINT0, DMAC1_DMINT1 } },
-        { 0xfffe980a, 0, 16, 4, /* IPR11 */ { DMAC2_DMINT2, DMAC3_DMINT3, SCIF0 , SCIF1 } },
+        { 0xfffe980a, 0, 16, 4, /* IPR11 */ { DMAC2_DMINT2, DMAC3_DMINT3, SCIF0, SCIF1 } },
         { 0xfffe980c, 0, 16, 4, /* IPR12 */ { SCIF2, SCIF3, SCIF4, SCIF5 } },
         { 0xfffe980e, 0, 16, 4, /* IPR13 */ { SCIF6, SCIF7, DMAC0_DMINTA, DMAC4_DMINT4  } },
         { 0xfffe9810, 0, 16, 4, /* IPR14 */ { DMAC5_DMINT5, DMAC6_DMINT6, DMAC7_DMINT7, 0 } },
@@ -234,42 +180,42 @@ static struct plat_sci_port sci_platform_data[] = {
                 .mapbase        = 0xfffe8000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 181, 182, 183, 180}
+                .irqs           = { 180, 180, 180, 180 }
         }, {
                 .mapbase        = 0xfffe8800,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 185, 186, 187, 184}
+                .irqs           = { 184, 184, 184, 184 }
         }, {
                 .mapbase        = 0xfffe9000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 189, 186, 187, 188}
+                .irqs           = { 188, 188, 188, 188 }
         }, {
                 .mapbase        = 0xfffe9800,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 193, 194, 195, 192}
+                .irqs           = { 192, 192, 192, 192 }
         }, {
                 .mapbase        = 0xfffea000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 196, 198, 199, 196}
+                .irqs           = { 196, 196, 196, 196 }
         }, {
                 .mapbase        = 0xfffea800,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 201, 202, 203, 200}
+                .irqs           = { 200, 200, 200, 200 }
         }, {
                 .mapbase        = 0xfffeb000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 205, 206, 207, 204}
+                .irqs           = { 204, 204, 204, 204 }
         }, {
                 .mapbase        = 0xfffeb800,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 209, 210, 211, 208}
+                .irqs           = { 208, 208, 208, 208 }
         }, {
                 .flags = 0,
         }
@@ -290,17 +236,7 @@ static struct resource rtc_resources[] = {
                 .flags  = IORESOURCE_IO,
         },
         [1] = {
-                /* Period IRQ */
-                .start  = 153,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [2] = {
-                /* Carry IRQ */
-                .start  = 154,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [3] = {
-                /* Alarm IRQ */
+                /* Shared Period/Carry/Alarm IRQ */
                 .start  = 152,
                 .flags  = IORESOURCE_IRQ,
         },
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
index e98dc4450352..820dfb2e8656 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
@@ -1,7 +1,7 @@
 /*
  * SH7203 and SH7263 Setup
  *
- *  Copyright (C) 2007  Paul Mundt
+ *  Copyright (C) 2007 - 2009  Paul Mundt
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -18,50 +18,27 @@ enum {
         /* interrupt sources */
         IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
         PINT0, PINT1, PINT2, PINT3, PINT4, PINT5, PINT6, PINT7,
-        DMAC0_DEI, DMAC0_HEI, DMAC1_DEI, DMAC1_HEI,
-        DMAC2_DEI, DMAC2_HEI, DMAC3_DEI, DMAC3_HEI,
-        DMAC4_DEI, DMAC4_HEI, DMAC5_DEI, DMAC5_HEI,
-        DMAC6_DEI, DMAC6_HEI, DMAC7_DEI, DMAC7_HEI,
+        DMAC0, DMAC1, DMAC2, DMAC3, DMAC4, DMAC5, DMAC6, DMAC7,
         USB, LCDC, CMT0, CMT1, BSC, WDT,
-        MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D,
-        MTU2_TCI0V, MTU2_TGI0E, MTU2_TGI0F,
-        MTU2_TGI1A, MTU2_TGI1B, MTU2_TCI1V, MTU2_TCI1U,
-        MTU2_TGI2A, MTU2_TGI2B, MTU2_TCI2V, MTU2_TCI2U,
-        MTU2_TGI3A, MTU2_TGI3B, MTU2_TGI3C, MTU2_TGI3D, MTU2_TCI3V,
-        MTU2_TGI4A, MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D, MTU2_TCI4V,
-        ADC_ADI,
-        IIC30_STPI, IIC30_NAKI, IIC30_RXI, IIC30_TXI, IIC30_TEI,
-        IIC31_STPI, IIC31_NAKI, IIC31_RXI, IIC31_TXI, IIC31_TEI,
-        IIC32_STPI, IIC32_NAKI, IIC32_RXI, IIC32_TXI, IIC32_TEI,
-        IIC33_STPI, IIC33_NAKI, IIC33_RXI, IIC33_TXI, IIC33_TEI,
-        SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI,
-        SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI,
-        SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI,
-        SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI,
-        SSU0_SSERI, SSU0_SSRXI, SSU0_SSTXI,
-        SSU1_SSERI, SSU1_SSRXI, SSU1_SSTXI,
-        SSI0_SSII, SSI1_SSII, SSI2_SSII, SSI3_SSII,
 
-        /* ROM-DEC, SDHI, SRC, and IEB are SH7263 specific */
-        ROMDEC_ISY, ROMDEC_IERR, ROMDEC_IARG, ROMDEC_ISEC, ROMDEC_IBUF,
-        ROMDEC_IREADY,
+        MTU0_ABCD, MTU0_VEF, MTU1_AB, MTU1_VU, MTU2_AB, MTU2_VU,
+        MTU3_ABCD, MTU4_ABCD, MTU2_TCI3V, MTU2_TCI4V,
 
-        FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I,
+        ADC_ADI,
+
+        IIC30, IIC31, IIC32, IIC33,
+        SCIF0, SCIF1, SCIF2, SCIF3,
 
-        SDHI3, SDHI0, SDHI1,
+        SSU0, SSU1,
 
-        RTC_ARM, RTC_PRD, RTC_CUP,
-        RCAN0_ERS, RCAN0_OVR, RCAN0_RM0, RCAN0_RM1, RCAN0_SLE,
-        RCAN1_ERS, RCAN1_OVR, RCAN1_RM0, RCAN1_RM1, RCAN1_SLE,
+        SSI0_SSII, SSI1_SSII, SSI2_SSII, SSI3_SSII,
 
-        SRC_OVF, SRC_ODFI, SRC_IDEI, IEBI,
+        /* ROM-DEC, SDHI, SRC, and IEB are SH7263 specific */
+        ROMDEC, FLCTL, SDHI, RTC, RCAN0, RCAN1,
+        SRC, IEBI,
 
         /* interrupt groups */
-        PINT, DMAC0, DMAC1, DMAC2, DMAC3, DMAC4, DMAC5, DMAC6, DMAC7,
-        MTU0_ABCD, MTU0_VEF, MTU1_AB, MTU1_VU, MTU2_AB, MTU2_VU,
-        MTU3_ABCD, MTU4_ABCD,
-        IIC30, IIC31, IIC32, IIC33, SCIF0, SCIF1, SCIF2, SCIF3,
-        SSU0, SSU1, ROMDEC, SDHI, FLCTL, RTC, RCAN0, RCAN1, SRC
+        PINT,
 };
 
 static struct intc_vect vectors[] __initdata = {
@@ -73,79 +50,80 @@ static struct intc_vect vectors[] __initdata = {
         INTC_IRQ(PINT2, 82), INTC_IRQ(PINT3, 83),
         INTC_IRQ(PINT4, 84), INTC_IRQ(PINT5, 85),
         INTC_IRQ(PINT6, 86), INTC_IRQ(PINT7, 87),
-        INTC_IRQ(DMAC0_DEI, 108), INTC_IRQ(DMAC0_HEI, 109),
-        INTC_IRQ(DMAC1_DEI, 112), INTC_IRQ(DMAC1_HEI, 113),
-        INTC_IRQ(DMAC2_DEI, 116), INTC_IRQ(DMAC2_HEI, 117),
-        INTC_IRQ(DMAC3_DEI, 120), INTC_IRQ(DMAC3_HEI, 121),
-        INTC_IRQ(DMAC4_DEI, 124), INTC_IRQ(DMAC4_HEI, 125),
-        INTC_IRQ(DMAC5_DEI, 128), INTC_IRQ(DMAC5_HEI, 129),
-        INTC_IRQ(DMAC6_DEI, 132), INTC_IRQ(DMAC6_HEI, 133),
-        INTC_IRQ(DMAC7_DEI, 136), INTC_IRQ(DMAC7_HEI, 137),
+        INTC_IRQ(DMAC0, 108), INTC_IRQ(DMAC0, 109),
+        INTC_IRQ(DMAC1, 112), INTC_IRQ(DMAC1, 113),
+        INTC_IRQ(DMAC2, 116), INTC_IRQ(DMAC2, 117),
+        INTC_IRQ(DMAC3, 120), INTC_IRQ(DMAC3, 121),
+        INTC_IRQ(DMAC4, 124), INTC_IRQ(DMAC4, 125),
+        INTC_IRQ(DMAC5, 128), INTC_IRQ(DMAC5, 129),
+        INTC_IRQ(DMAC6, 132), INTC_IRQ(DMAC6, 133),
+        INTC_IRQ(DMAC7, 136), INTC_IRQ(DMAC7, 137),
         INTC_IRQ(USB, 140), INTC_IRQ(LCDC, 141),
         INTC_IRQ(CMT0, 142), INTC_IRQ(CMT1, 143),
         INTC_IRQ(BSC, 144), INTC_IRQ(WDT, 145),
-        INTC_IRQ(MTU2_TGI0A, 146), INTC_IRQ(MTU2_TGI0B, 147),
-        INTC_IRQ(MTU2_TGI0C, 148), INTC_IRQ(MTU2_TGI0D, 149),
-        INTC_IRQ(MTU2_TCI0V, 150),
-        INTC_IRQ(MTU2_TGI0E, 151), INTC_IRQ(MTU2_TGI0F, 152),
-        INTC_IRQ(MTU2_TGI1A, 153), INTC_IRQ(MTU2_TGI1B, 154),
-        INTC_IRQ(MTU2_TCI1V, 155), INTC_IRQ(MTU2_TCI1U, 156),
-        INTC_IRQ(MTU2_TGI2A, 157), INTC_IRQ(MTU2_TGI2B, 158),
-        INTC_IRQ(MTU2_TCI2V, 159), INTC_IRQ(MTU2_TCI2U, 160),
-        INTC_IRQ(MTU2_TGI3A, 161), INTC_IRQ(MTU2_TGI3B, 162),
-        INTC_IRQ(MTU2_TGI3C, 163), INTC_IRQ(MTU2_TGI3D, 164),
+        INTC_IRQ(MTU0_ABCD, 146), INTC_IRQ(MTU0_ABCD, 147),
+        INTC_IRQ(MTU0_ABCD, 148), INTC_IRQ(MTU0_ABCD, 149),
+        INTC_IRQ(MTU0_VEF, 150),
+        INTC_IRQ(MTU0_VEF, 151), INTC_IRQ(MTU0_VEF, 152),
+        INTC_IRQ(MTU1_AB, 153), INTC_IRQ(MTU1_AB, 154),
+        INTC_IRQ(MTU1_VU, 155), INTC_IRQ(MTU1_VU, 156),
+        INTC_IRQ(MTU2_AB, 157), INTC_IRQ(MTU2_AB, 158),
+        INTC_IRQ(MTU2_VU, 159), INTC_IRQ(MTU2_VU, 160),
+        INTC_IRQ(MTU3_ABCD, 161), INTC_IRQ(MTU3_ABCD, 162),
+        INTC_IRQ(MTU3_ABCD, 163), INTC_IRQ(MTU3_ABCD, 164),
         INTC_IRQ(MTU2_TCI3V, 165),
-        INTC_IRQ(MTU2_TGI4A, 166), INTC_IRQ(MTU2_TGI4B, 167),
-        INTC_IRQ(MTU2_TGI4C, 168), INTC_IRQ(MTU2_TGI4D, 169),
+        INTC_IRQ(MTU4_ABCD, 166), INTC_IRQ(MTU4_ABCD, 167),
+        INTC_IRQ(MTU4_ABCD, 168), INTC_IRQ(MTU4_ABCD, 169),
         INTC_IRQ(MTU2_TCI4V, 170),
         INTC_IRQ(ADC_ADI, 171),
-        INTC_IRQ(IIC30_STPI, 172), INTC_IRQ(IIC30_NAKI, 173),
-        INTC_IRQ(IIC30_RXI, 174), INTC_IRQ(IIC30_TXI, 175),
-        INTC_IRQ(IIC30_TEI, 176),
-        INTC_IRQ(IIC31_STPI, 177), INTC_IRQ(IIC31_NAKI, 178),
-        INTC_IRQ(IIC31_RXI, 179), INTC_IRQ(IIC31_TXI, 180),
-        INTC_IRQ(IIC31_TEI, 181),
-        INTC_IRQ(IIC32_STPI, 182), INTC_IRQ(IIC32_NAKI, 183),
-        INTC_IRQ(IIC32_RXI, 184), INTC_IRQ(IIC32_TXI, 185),
-        INTC_IRQ(IIC32_TEI, 186),
-        INTC_IRQ(IIC33_STPI, 187), INTC_IRQ(IIC33_NAKI, 188),
-        INTC_IRQ(IIC33_RXI, 189), INTC_IRQ(IIC33_TXI, 190),
-        INTC_IRQ(IIC33_TEI, 191),
-        INTC_IRQ(SCIF0_BRI, 192), INTC_IRQ(SCIF0_ERI, 193),
-        INTC_IRQ(SCIF0_RXI, 194), INTC_IRQ(SCIF0_TXI, 195),
-        INTC_IRQ(SCIF1_BRI, 196), INTC_IRQ(SCIF1_ERI, 197),
-        INTC_IRQ(SCIF1_RXI, 198), INTC_IRQ(SCIF1_TXI, 199),
-        INTC_IRQ(SCIF2_BRI, 200), INTC_IRQ(SCIF2_ERI, 201),
-        INTC_IRQ(SCIF2_RXI, 202), INTC_IRQ(SCIF2_TXI, 203),
-        INTC_IRQ(SCIF3_BRI, 204), INTC_IRQ(SCIF3_ERI, 205),
-        INTC_IRQ(SCIF3_RXI, 206), INTC_IRQ(SCIF3_TXI, 207),
-        INTC_IRQ(SSU0_SSERI, 208), INTC_IRQ(SSU0_SSRXI, 209),
-        INTC_IRQ(SSU0_SSTXI, 210),
-        INTC_IRQ(SSU1_SSERI, 211), INTC_IRQ(SSU1_SSRXI, 212),
-        INTC_IRQ(SSU1_SSTXI, 213),
+        INTC_IRQ(IIC30, 172), INTC_IRQ(IIC30, 173),
+        INTC_IRQ(IIC30, 174), INTC_IRQ(IIC30, 175),
+        INTC_IRQ(IIC30, 176),
+        INTC_IRQ(IIC31, 177), INTC_IRQ(IIC31, 178),
+        INTC_IRQ(IIC31, 179), INTC_IRQ(IIC31, 180),
+        INTC_IRQ(IIC31, 181),
+        INTC_IRQ(IIC32, 182), INTC_IRQ(IIC32, 183),
+        INTC_IRQ(IIC32, 184), INTC_IRQ(IIC32, 185),
+        INTC_IRQ(IIC32, 186),
+        INTC_IRQ(IIC33, 187), INTC_IRQ(IIC33, 188),
+        INTC_IRQ(IIC33, 189), INTC_IRQ(IIC33, 190),
+        INTC_IRQ(IIC33, 191),
+        INTC_IRQ(SCIF0, 192), INTC_IRQ(SCIF0, 193),
+        INTC_IRQ(SCIF0, 194), INTC_IRQ(SCIF0, 195),
+        INTC_IRQ(SCIF1, 196), INTC_IRQ(SCIF1, 197),
+        INTC_IRQ(SCIF1, 198), INTC_IRQ(SCIF1, 199),
+        INTC_IRQ(SCIF2, 200), INTC_IRQ(SCIF2, 201),
+        INTC_IRQ(SCIF2, 202), INTC_IRQ(SCIF2, 203),
+        INTC_IRQ(SCIF3, 204), INTC_IRQ(SCIF3, 205),
+        INTC_IRQ(SCIF3, 206), INTC_IRQ(SCIF3, 207),
+        INTC_IRQ(SSU0, 208), INTC_IRQ(SSU0, 209),
+        INTC_IRQ(SSU0, 210),
+        INTC_IRQ(SSU1, 211), INTC_IRQ(SSU1, 212),
+        INTC_IRQ(SSU1, 213),
         INTC_IRQ(SSI0_SSII, 214), INTC_IRQ(SSI1_SSII, 215),
         INTC_IRQ(SSI2_SSII, 216), INTC_IRQ(SSI3_SSII, 217),
-        INTC_IRQ(FLCTL_FLSTEI, 224), INTC_IRQ(FLCTL_FLTENDI, 225),
-        INTC_IRQ(FLCTL_FLTREQ0I, 226), INTC_IRQ(FLCTL_FLTREQ1I, 227),
-        INTC_IRQ(RTC_ARM, 231), INTC_IRQ(RTC_PRD, 232),
-        INTC_IRQ(RTC_CUP, 233),
-        INTC_IRQ(RCAN0_ERS, 234), INTC_IRQ(RCAN0_OVR, 235),
-        INTC_IRQ(RCAN0_RM0, 236), INTC_IRQ(RCAN0_RM1, 237),
-        INTC_IRQ(RCAN0_SLE, 238),
-        INTC_IRQ(RCAN1_ERS, 239), INTC_IRQ(RCAN1_OVR, 240),
-        INTC_IRQ(RCAN1_RM0, 241), INTC_IRQ(RCAN1_RM1, 242),
-        INTC_IRQ(RCAN1_SLE, 243),
+        INTC_IRQ(FLCTL, 224), INTC_IRQ(FLCTL, 225),
+        INTC_IRQ(FLCTL, 226), INTC_IRQ(FLCTL, 227),
+        INTC_IRQ(RTC, 231), INTC_IRQ(RTC, 232),
+        INTC_IRQ(RTC, 233),
+        INTC_IRQ(RCAN0, 234), INTC_IRQ(RCAN0, 235),
+        INTC_IRQ(RCAN0, 236), INTC_IRQ(RCAN0, 237),
+        INTC_IRQ(RCAN0, 238),
+        INTC_IRQ(RCAN1, 239), INTC_IRQ(RCAN1, 240),
+        INTC_IRQ(RCAN1, 241), INTC_IRQ(RCAN1, 242),
+        INTC_IRQ(RCAN1, 243),
 
         /* SH7263-specific trash */
 #ifdef CONFIG_CPU_SUBTYPE_SH7263
-        INTC_IRQ(ROMDEC_ISY, 218), INTC_IRQ(ROMDEC_IERR, 219),
-        INTC_IRQ(ROMDEC_IARG, 220), INTC_IRQ(ROMDEC_ISEC, 221),
-        INTC_IRQ(ROMDEC_IBUF, 222), INTC_IRQ(ROMDEC_IREADY, 223),
+        INTC_IRQ(ROMDEC, 218), INTC_IRQ(ROMDEC, 219),
+        INTC_IRQ(ROMDEC, 220), INTC_IRQ(ROMDEC, 221),
+        INTC_IRQ(ROMDEC, 222), INTC_IRQ(ROMDEC, 223),
 
-        INTC_IRQ(SDHI3, 228), INTC_IRQ(SDHI0, 229), INTC_IRQ(SDHI1, 230),
+        INTC_IRQ(SDHI, 228), INTC_IRQ(SDHI, 229),
+        INTC_IRQ(SDHI, 230),
 
-        INTC_IRQ(SRC_OVF, 244), INTC_IRQ(SRC_ODFI, 245),
-        INTC_IRQ(SRC_IDEI, 246),
+        INTC_IRQ(SRC, 244), INTC_IRQ(SRC, 245),
+        INTC_IRQ(SRC, 246),
 
         INTC_IRQ(IEBI, 247),
 #endif
@@ -154,50 +132,6 @@ static struct intc_vect vectors[] __initdata = {
 static struct intc_group groups[] __initdata = {
         INTC_GROUP(PINT, PINT0, PINT1, PINT2, PINT3,
                    PINT4, PINT5, PINT6, PINT7),
-        INTC_GROUP(DMAC0, DMAC0_DEI, DMAC0_HEI),
-        INTC_GROUP(DMAC1, DMAC1_DEI, DMAC1_HEI),
-        INTC_GROUP(DMAC2, DMAC2_DEI, DMAC2_HEI),
-        INTC_GROUP(DMAC3, DMAC3_DEI, DMAC3_HEI),
-        INTC_GROUP(DMAC4, DMAC4_DEI, DMAC4_HEI),
-        INTC_GROUP(DMAC5, DMAC5_DEI, DMAC5_HEI),
-        INTC_GROUP(DMAC6, DMAC6_DEI, DMAC6_HEI),
-        INTC_GROUP(DMAC7, DMAC7_DEI, DMAC7_HEI),
-        INTC_GROUP(MTU0_ABCD, MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D),
-        INTC_GROUP(MTU0_VEF, MTU2_TCI0V, MTU2_TGI0E, MTU2_TGI0F),
-        INTC_GROUP(MTU1_AB, MTU2_TGI1A, MTU2_TGI1B),
-        INTC_GROUP(MTU1_VU, MTU2_TCI1V, MTU2_TCI1U),
-        INTC_GROUP(MTU2_AB, MTU2_TGI2A, MTU2_TGI2B),
-        INTC_GROUP(MTU2_VU, MTU2_TCI2V, MTU2_TCI2U),
-        INTC_GROUP(MTU3_ABCD, MTU2_TGI3A, MTU2_TGI3B, MTU2_TGI3C, MTU2_TGI3D),
-        INTC_GROUP(MTU4_ABCD, MTU2_TGI4A, MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D),
-        INTC_GROUP(IIC30, IIC30_STPI, IIC30_NAKI, IIC30_RXI, IIC30_TXI,
-                   IIC30_TEI),
-        INTC_GROUP(IIC31, IIC31_STPI, IIC31_NAKI, IIC31_RXI, IIC31_TXI,
-                   IIC31_TEI),
-        INTC_GROUP(IIC32, IIC32_STPI, IIC32_NAKI, IIC32_RXI, IIC32_TXI,
-                   IIC32_TEI),
-        INTC_GROUP(IIC33, IIC33_STPI, IIC33_NAKI, IIC33_RXI, IIC33_TXI,
-                   IIC33_TEI),
-        INTC_GROUP(SCIF0, SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI),
-        INTC_GROUP(SCIF1, SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI),
-        INTC_GROUP(SCIF2, SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI),
-        INTC_GROUP(SCIF3, SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI),
-        INTC_GROUP(SSU0, SSU0_SSERI, SSU0_SSRXI, SSU0_SSTXI),
-        INTC_GROUP(SSU1, SSU1_SSERI, SSU1_SSRXI, SSU1_SSTXI),
-        INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I,
-                   FLCTL_FLTREQ1I),
-        INTC_GROUP(RTC, RTC_ARM, RTC_PRD, RTC_CUP),
-        INTC_GROUP(RCAN0, RCAN0_ERS, RCAN0_OVR, RCAN0_RM0, RCAN0_RM1,
-                   RCAN0_SLE),
-        INTC_GROUP(RCAN1, RCAN1_ERS, RCAN1_OVR, RCAN1_RM0, RCAN1_RM1,
-                   RCAN1_SLE),
-
-#ifdef CONFIG_CPU_SUBTYPE_SH7263
-        INTC_GROUP(ROMDEC, ROMDEC_ISY, ROMDEC_IERR, ROMDEC_IARG,
-                   ROMDEC_ISEC, ROMDEC_IBUF, ROMDEC_IREADY),
-        INTC_GROUP(SDHI, SDHI3, SDHI0, SDHI1),
-        INTC_GROUP(SRC, SRC_OVF, SRC_ODFI, SRC_IDEI),
-#endif
 };
 
 static struct intc_prio_reg prio_registers[] __initdata = {
@@ -242,22 +176,22 @@ static struct plat_sci_port sci_platform_data[] = {
                 .mapbase        = 0xfffe8000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           =  { 193, 194, 195, 192 },
+                .irqs           =  { 192, 192, 192, 192 },
         }, {
                 .mapbase        = 0xfffe8800,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           =  { 197, 198, 199, 196 },
+                .irqs           =  { 196, 196, 196, 196 },
         }, {
                 .mapbase        = 0xfffe9000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           =  { 201, 202, 203, 200 },
+                .irqs           =  { 200, 200, 200, 200 },
         }, {
                 .mapbase        = 0xfffe9800,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           =  { 205, 206, 207, 204 },
+                .irqs           =  { 204, 204, 204, 204 },
         }, {
                 .flags = 0,
         }
@@ -278,17 +212,7 @@ static struct resource rtc_resources[] = {
                 .flags  = IORESOURCE_IO,
         },
         [1] = {
-                /* Period IRQ */
-                .start  = 232,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [2] = {
-                /* Carry IRQ */
-                .start  = 233,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [3] = {
-                /* Alarm IRQ */
+                /* Shared Period/Carry/Alarm IRQ */
                 .start  = 231,
                 .flags  = IORESOURCE_IRQ,
         },
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
index e6d4ec445dd8..c46a8355726d 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
@@ -2,6 +2,7 @@
  * SH7206 Setup
  *
  *  Copyright (C) 2006  Yoshinori Sato
+ *  Copyright (C) 2009  Paul Mundt
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -19,34 +20,23 @@ enum {
         IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
         PINT0, PINT1, PINT2, PINT3, PINT4, PINT5, PINT6, PINT7,
         ADC_ADI0, ADC_ADI1,
-        DMAC0_DEI, DMAC0_HEI, DMAC1_DEI, DMAC1_HEI,
-        DMAC2_DEI, DMAC2_HEI, DMAC3_DEI, DMAC3_HEI,
-        DMAC4_DEI, DMAC4_HEI, DMAC5_DEI, DMAC5_HEI,
-        DMAC6_DEI, DMAC6_HEI, DMAC7_DEI, DMAC7_HEI,
+
+        DMAC0, DMAC1, DMAC2, DMAC3, DMAC4, DMAC5, DMAC6, DMAC7,
+
+        MTU0_ABCD, MTU0_VEF, MTU1_AB, MTU1_VU, MTU2_AB, MTU2_VU,
+        MTU3_ABCD, MTU4_ABCD, MTU5, POE2_12, MTU3S_ABCD, MTU4S_ABCD, MTU5S,
+        IIC3,
+
         CMT0, CMT1, BSC, WDT,
-        MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D,
-        MTU2_TCI0V, MTU2_TGI0E, MTU2_TGI0F,
-        MTU2_TGI1A, MTU2_TGI1B, MTU2_TCI1V, MTU2_TCI1U,
-        MTU2_TGI2A, MTU2_TGI2B, MTU2_TCI2V, MTU2_TCI2U,
-        MTU2_TGI3A, MTU2_TGI3B, MTU2_TGI3C, MTU2_TGI3D, MTU2_TCI3V,
-        MTU2_TGI4A, MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D, MTU2_TCI4V,
-        MTU2_TGI5U, MTU2_TGI5V, MTU2_TGI5W,
-        POE2_OEI1, POE2_OEI2,
-        MTU2S_TGI3A, MTU2S_TGI3B, MTU2S_TGI3C, MTU2S_TGI3D, MTU2S_TCI3V,
-        MTU2S_TGI4A, MTU2S_TGI4B, MTU2S_TGI4C, MTU2S_TGI4D, MTU2S_TCI4V,
-        MTU2S_TGI5U, MTU2S_TGI5V, MTU2S_TGI5W,
+
+        MTU2_TCI3V, MTU2_TCI4V, MTU2S_TCI3V, MTU2S_TCI4V,
+
         POE2_OEI3,
-        IIC3_STPI, IIC3_NAKI, IIC3_RXI, IIC3_TXI, IIC3_TEI,
-        SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI,
-        SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI,
-        SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI,
-        SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI,
+
+        SCIF0, SCIF1, SCIF2, SCIF3,
 
         /* interrupt groups */
-        PINT, DMAC0, DMAC1, DMAC2, DMAC3, DMAC4, DMAC5, DMAC6, DMAC7,
-        MTU0_ABCD, MTU0_VEF, MTU1_AB, MTU1_VU, MTU2_AB, MTU2_VU,
-        MTU3_ABCD, MTU4_ABCD, MTU5, POE2_12, MTU3S_ABCD, MTU4S_ABCD, MTU5S,
-        IIC3, SCIF0, SCIF1, SCIF2, SCIF3,
+        PINT,
 };
 
 static struct intc_vect vectors[] __initdata = {
@@ -59,86 +49,58 @@ static struct intc_vect vectors[] __initdata = {
         INTC_IRQ(PINT4, 84), INTC_IRQ(PINT5, 85),
         INTC_IRQ(PINT6, 86), INTC_IRQ(PINT7, 87),
         INTC_IRQ(ADC_ADI0, 92), INTC_IRQ(ADC_ADI1, 96),
-        INTC_IRQ(DMAC0_DEI, 108), INTC_IRQ(DMAC0_HEI, 109),
-        INTC_IRQ(DMAC1_DEI, 112), INTC_IRQ(DMAC1_HEI, 113),
-        INTC_IRQ(DMAC2_DEI, 116), INTC_IRQ(DMAC2_HEI, 117),
-        INTC_IRQ(DMAC3_DEI, 120), INTC_IRQ(DMAC3_HEI, 121),
-        INTC_IRQ(DMAC4_DEI, 124), INTC_IRQ(DMAC4_HEI, 125),
-        INTC_IRQ(DMAC5_DEI, 128), INTC_IRQ(DMAC5_HEI, 129),
-        INTC_IRQ(DMAC6_DEI, 132), INTC_IRQ(DMAC6_HEI, 133),
-        INTC_IRQ(DMAC7_DEI, 136), INTC_IRQ(DMAC7_HEI, 137),
+        INTC_IRQ(DMAC0, 108), INTC_IRQ(DMAC0, 109),
+        INTC_IRQ(DMAC1, 112), INTC_IRQ(DMAC1, 113),
+        INTC_IRQ(DMAC2, 116), INTC_IRQ(DMAC2, 117),
+        INTC_IRQ(DMAC3, 120), INTC_IRQ(DMAC3, 121),
+        INTC_IRQ(DMAC4, 124), INTC_IRQ(DMAC4, 125),
+        INTC_IRQ(DMAC5, 128), INTC_IRQ(DMAC5, 129),
+        INTC_IRQ(DMAC6, 132), INTC_IRQ(DMAC6, 133),
+        INTC_IRQ(DMAC7, 136), INTC_IRQ(DMAC7, 137),
         INTC_IRQ(CMT0, 140), INTC_IRQ(CMT1, 144),
         INTC_IRQ(BSC, 148), INTC_IRQ(WDT, 152),
-        INTC_IRQ(MTU2_TGI0A, 156), INTC_IRQ(MTU2_TGI0B, 157),
-        INTC_IRQ(MTU2_TGI0C, 158), INTC_IRQ(MTU2_TGI0D, 159),
-        INTC_IRQ(MTU2_TCI0V, 160),
-        INTC_IRQ(MTU2_TGI0E, 161), INTC_IRQ(MTU2_TGI0F, 162),
-        INTC_IRQ(MTU2_TGI1A, 164), INTC_IRQ(MTU2_TGI1B, 165),
-        INTC_IRQ(MTU2_TCI1V, 168), INTC_IRQ(MTU2_TCI1U, 169),
-        INTC_IRQ(MTU2_TGI2A, 172), INTC_IRQ(MTU2_TGI2B, 173),
-        INTC_IRQ(MTU2_TCI2V, 176), INTC_IRQ(MTU2_TCI2U, 177),
-        INTC_IRQ(MTU2_TGI3A, 180), INTC_IRQ(MTU2_TGI3B, 181),
-        INTC_IRQ(MTU2_TGI3C, 182), INTC_IRQ(MTU2_TGI3D, 183),
+        INTC_IRQ(MTU0_ABCD, 156), INTC_IRQ(MTU0_ABCD, 157),
+        INTC_IRQ(MTU0_ABCD, 158), INTC_IRQ(MTU0_ABCD, 159),
+        INTC_IRQ(MTU0_VEF, 160), INTC_IRQ(MTU0_VEF, 161),
+        INTC_IRQ(MTU0_VEF, 162),
+        INTC_IRQ(MTU1_AB, 164), INTC_IRQ(MTU1_AB, 165),
+        INTC_IRQ(MTU1_VU, 168), INTC_IRQ(MTU1_VU, 169),
+        INTC_IRQ(MTU2_AB, 172), INTC_IRQ(MTU2_AB, 173),
+        INTC_IRQ(MTU2_VU, 176), INTC_IRQ(MTU2_VU, 177),
+        INTC_IRQ(MTU3_ABCD, 180), INTC_IRQ(MTU3_ABCD, 181),
+        INTC_IRQ(MTU3_ABCD, 182), INTC_IRQ(MTU3_ABCD, 183),
         INTC_IRQ(MTU2_TCI3V, 184),
-        INTC_IRQ(MTU2_TGI4A, 188), INTC_IRQ(MTU2_TGI4B, 189),
-        INTC_IRQ(MTU2_TGI4C, 190), INTC_IRQ(MTU2_TGI4D, 191),
+        INTC_IRQ(MTU4_ABCD, 188), INTC_IRQ(MTU4_ABCD, 189),
+        INTC_IRQ(MTU4_ABCD, 190), INTC_IRQ(MTU4_ABCD, 191),
         INTC_IRQ(MTU2_TCI4V, 192),
-        INTC_IRQ(MTU2_TGI5U, 196), INTC_IRQ(MTU2_TGI5V, 197),
-        INTC_IRQ(MTU2_TGI5W, 198),
-        INTC_IRQ(POE2_OEI1, 200), INTC_IRQ(POE2_OEI2, 201),
-        INTC_IRQ(MTU2S_TGI3A, 204), INTC_IRQ(MTU2S_TGI3B, 205),
-        INTC_IRQ(MTU2S_TGI3C, 206), INTC_IRQ(MTU2S_TGI3D, 207),
+        INTC_IRQ(MTU5, 196), INTC_IRQ(MTU5, 197),
+        INTC_IRQ(MTU5, 198),
+        INTC_IRQ(POE2_12, 200), INTC_IRQ(POE2_12, 201),
+        INTC_IRQ(MTU3S_ABCD, 204), INTC_IRQ(MTU3S_ABCD, 205),
+        INTC_IRQ(MTU3S_ABCD, 206), INTC_IRQ(MTU3S_ABCD, 207),
         INTC_IRQ(MTU2S_TCI3V, 208),
-        INTC_IRQ(MTU2S_TGI4A, 212), INTC_IRQ(MTU2S_TGI4B, 213),
-        INTC_IRQ(MTU2S_TGI4C, 214), INTC_IRQ(MTU2S_TGI4D, 215),
+        INTC_IRQ(MTU4S_ABCD, 212), INTC_IRQ(MTU4S_ABCD, 213),
+        INTC_IRQ(MTU4S_ABCD, 214), INTC_IRQ(MTU4S_ABCD, 215),
         INTC_IRQ(MTU2S_TCI4V, 216),
-        INTC_IRQ(MTU2S_TGI5U, 220), INTC_IRQ(MTU2S_TGI5V, 221),
-        INTC_IRQ(MTU2S_TGI5W, 222),
+        INTC_IRQ(MTU5S, 220), INTC_IRQ(MTU5S, 221),
+        INTC_IRQ(MTU5S, 222),
         INTC_IRQ(POE2_OEI3, 224),
-        INTC_IRQ(IIC3_STPI, 228), INTC_IRQ(IIC3_NAKI, 229),
-        INTC_IRQ(IIC3_RXI, 230), INTC_IRQ(IIC3_TXI, 231),
-        INTC_IRQ(IIC3_TEI, 232),
-        INTC_IRQ(SCIF0_BRI, 240), INTC_IRQ(SCIF0_ERI, 241),
-        INTC_IRQ(SCIF0_RXI, 242), INTC_IRQ(SCIF0_TXI, 243),
-        INTC_IRQ(SCIF1_BRI, 244), INTC_IRQ(SCIF1_ERI, 245),
-        INTC_IRQ(SCIF1_RXI, 246), INTC_IRQ(SCIF1_TXI, 247),
-        INTC_IRQ(SCIF2_BRI, 248), INTC_IRQ(SCIF2_ERI, 249),
-        INTC_IRQ(SCIF2_RXI, 250), INTC_IRQ(SCIF2_TXI, 251),
-        INTC_IRQ(SCIF3_BRI, 252), INTC_IRQ(SCIF3_ERI, 253),
-        INTC_IRQ(SCIF3_RXI, 254), INTC_IRQ(SCIF3_TXI, 255),
+        INTC_IRQ(IIC3, 228), INTC_IRQ(IIC3, 229),
+        INTC_IRQ(IIC3, 230), INTC_IRQ(IIC3, 231),
+        INTC_IRQ(IIC3, 232),
+        INTC_IRQ(SCIF0, 240), INTC_IRQ(SCIF0, 241),
+        INTC_IRQ(SCIF0, 242), INTC_IRQ(SCIF0, 243),
+        INTC_IRQ(SCIF1, 244), INTC_IRQ(SCIF1, 245),
+        INTC_IRQ(SCIF1, 246), INTC_IRQ(SCIF1, 247),
+        INTC_IRQ(SCIF2, 248), INTC_IRQ(SCIF2, 249),
+        INTC_IRQ(SCIF2, 250), INTC_IRQ(SCIF2, 251),
+        INTC_IRQ(SCIF3, 252), INTC_IRQ(SCIF3, 253),
+        INTC_IRQ(SCIF3, 254), INTC_IRQ(SCIF3, 255),
 };
 
 static struct intc_group groups[] __initdata = {
         INTC_GROUP(PINT, PINT0, PINT1, PINT2, PINT3,
                    PINT4, PINT5, PINT6, PINT7),
-        INTC_GROUP(DMAC0, DMAC0_DEI, DMAC0_HEI),
-        INTC_GROUP(DMAC1, DMAC1_DEI, DMAC1_HEI),
-        INTC_GROUP(DMAC2, DMAC2_DEI, DMAC2_HEI),
-        INTC_GROUP(DMAC3, DMAC3_DEI, DMAC3_HEI),
-        INTC_GROUP(DMAC4, DMAC4_DEI, DMAC4_HEI),
-        INTC_GROUP(DMAC5, DMAC5_DEI, DMAC5_HEI),
-        INTC_GROUP(DMAC6, DMAC6_DEI, DMAC6_HEI),
-        INTC_GROUP(DMAC7, DMAC7_DEI, DMAC7_HEI),
-        INTC_GROUP(MTU0_ABCD, MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D),
-        INTC_GROUP(MTU0_VEF, MTU2_TCI0V, MTU2_TGI0E, MTU2_TGI0F),
-        INTC_GROUP(MTU1_AB, MTU2_TGI1A, MTU2_TGI1B),
-        INTC_GROUP(MTU1_VU, MTU2_TCI1V, MTU2_TCI1U),
-        INTC_GROUP(MTU2_AB, MTU2_TGI2A, MTU2_TGI2B),
-        INTC_GROUP(MTU2_VU, MTU2_TCI2V, MTU2_TCI2U),
-        INTC_GROUP(MTU3_ABCD, MTU2_TGI3A, MTU2_TGI3B, MTU2_TGI3C, MTU2_TGI3D),
-        INTC_GROUP(MTU4_ABCD, MTU2_TGI4A, MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D),
-        INTC_GROUP(MTU5, MTU2_TGI5U, MTU2_TGI5V, MTU2_TGI5W),
-        INTC_GROUP(POE2_12, POE2_OEI1, POE2_OEI2),
-        INTC_GROUP(MTU3S_ABCD, MTU2S_TGI3A, MTU2S_TGI3B,
-                   MTU2S_TGI3C, MTU2S_TGI3D),
-        INTC_GROUP(MTU4S_ABCD, MTU2S_TGI4A, MTU2S_TGI4B,
-                   MTU2S_TGI4C, MTU2S_TGI4D),
-        INTC_GROUP(MTU5S, MTU2S_TGI5U, MTU2S_TGI5V, MTU2S_TGI5W),
-        INTC_GROUP(IIC3, IIC3_STPI, IIC3_NAKI, IIC3_RXI, IIC3_TXI, IIC3_TEI),
-        INTC_GROUP(SCIF0, SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI),
-        INTC_GROUP(SCIF1, SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI),
-        INTC_GROUP(SCIF2, SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI),
-        INTC_GROUP(SCIF3, SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI),
 };
 
 static struct intc_prio_reg prio_registers[] __initdata = {
@@ -174,22 +136,22 @@ static struct plat_sci_port sci_platform_data[] = {
                 .mapbase        = 0xfffe8000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           =  { 241, 242, 243, 240 },
+                .irqs           = { 240, 240, 240, 240 },
         }, {
                 .mapbase        = 0xfffe8800,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           =  { 245, 246, 247, 244 },
+                .irqs           = { 244, 244, 244, 244 },
         }, {
                 .mapbase        = 0xfffe9000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           =  { 249, 250, 251, 248 },
+                .irqs           = { 248, 248, 248, 248 },
         }, {
                 .mapbase        = 0xfffe9800,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           =  { 253, 254, 255, 252 },
+                .irqs           = { 252, 252, 252, 252 },
         }, {
                 .flags = 0,
         }
diff --git a/arch/sh/kernel/cpu/sh3/Makefile b/arch/sh/kernel/cpu/sh3/Makefile
index e07c69e16d9b..ecab274141a8 100644
--- a/arch/sh/kernel/cpu/sh3/Makefile
+++ b/arch/sh/kernel/cpu/sh3/Makefile
@@ -4,6 +4,8 @@
 
 obj-y   := ex.o probe.o entry.o setup-sh3.o
 
+obj-$(CONFIG_HIBERNATION)               += swsusp.o
+
 # CPU subtype setup
 obj-$(CONFIG_CPU_SUBTYPE_SH7705)        += setup-sh7705.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7706)        += setup-sh770x.o
diff --git a/arch/sh/kernel/cpu/sh3/entry.S b/arch/sh/kernel/cpu/sh3/entry.S
index b4106d0c68ec..55da0ff9848d 100644
--- a/arch/sh/kernel/cpu/sh3/entry.S
+++ b/arch/sh/kernel/cpu/sh3/entry.S
@@ -16,6 +16,7 @@
 #include <asm/unistd.h>
 #include <cpu/mmu_context.h>
 #include <asm/page.h>
+#include <asm/cache.h>
 
 ! NOTE:
 ! GNU as (as of 2.9.1) changes bf/s into bt/s and bra, when the address
@@ -187,44 +188,35 @@ call_dae:
 #if defined(CONFIG_SH_STANDARD_BIOS)
         /* Unwind the stack and jmp to the debug entry */
 ENTRY(sh_bios_handler)
-        mov.l   @r15+, r0
-        mov.l   @r15+, r1
-        mov.l   @r15+, r2
-        mov.l   @r15+, r3
-        mov.l   @r15+, r4
-        mov.l   @r15+, r5
-        mov.l   @r15+, r6
-        mov.l   @r15+, r7
-        stc     sr, r8
-        mov.l   1f, r9                  ! BL =1, RB=1, IMASK=0x0F
-        or      r9, r8
-        ldc     r8, sr                  ! here, change the register bank
-        mov.l   @r15+, r8
-        mov.l   @r15+, r9
-        mov.l   @r15+, r10
-        mov.l   @r15+, r11
-        mov.l   @r15+, r12
-        mov.l   @r15+, r13
-        mov.l   @r15+, r14
-        mov.l   @r15+, k0
-        ldc.l   @r15+, spc
-        lds.l   @r15+, pr
-        mov.l   @r15+, k1
-        ldc.l   @r15+, gbr
-        lds.l   @r15+, mach
-        lds.l   @r15+, macl
-        mov     k0, r15
+        mov.l   1f, r8
+        bsr     restore_regs
+         nop
+
+        lds     k2, pr                  ! restore pr
+        mov     k4, r15
         !
         mov.l   2f, k0
         mov.l   @k0, k0
         jmp     @k0
-         ldc    k1, ssr
+         ldc    k3, ssr
         .align  2
 1:      .long   0x300000f0
 2:      .long   gdb_vbr_vector
 #endif /* CONFIG_SH_STANDARD_BIOS */
 
-restore_all:
+! restore_regs()
+! - restore r0, r1, r2, r3, r4, r5, r6, r7 from the stack
+! - switch bank
+! - restore r8, r9, r10, r11, r12, r13, r14, r15 from the stack
+! - restore spc, pr*, ssr, gbr, mach, macl, skip default tra
+! k2 returns original pr
+! k3 returns original sr
+! k4 returns original stack pointer
+! r8 passes SR bitmask, overwritten with restored data on return
+! r9 trashed
+! BL=0 on entry, on exit BL=1 (depending on r8).
+
+ENTRY(restore_regs)
         mov.l   @r15+, r0
         mov.l   @r15+, r1
         mov.l   @r15+, r2
@@ -234,10 +226,9 @@ restore_all:
         mov.l   @r15+, r6
         mov.l   @r15+, r7
         !
-        stc     sr, r8
-        mov.l   7f, r9
-        or      r9, r8                  ! BL =1, RB=1
-        ldc     r8, sr                  ! here, change the register bank
+        stc     sr, r9
+        or      r8, r9
+        ldc     r9, sr
         !
         mov.l   @r15+, r8
         mov.l   @r15+, r9
@@ -248,12 +239,20 @@ restore_all:
         mov.l   @r15+, r14
         mov.l   @r15+, k4               ! original stack pointer
         ldc.l   @r15+, spc
-        lds.l   @r15+, pr
+        mov.l   @r15+, k2               ! original PR
         mov.l   @r15+, k3               ! original SR
         ldc.l   @r15+, gbr
         lds.l   @r15+, mach
         lds.l   @r15+, macl
-        add     #4, r15                 ! Skip syscall number
+        rts
+         add    #4, r15                 ! Skip syscall number
+
+restore_all:
+        mov.l   7f, r8
+        bsr     restore_regs
+         nop
+
+        lds     k2, pr                  ! restore pr
         !
 #ifdef CONFIG_SH_DSP
         mov.l   @r15+, k0               ! DSP mode marker
@@ -294,7 +293,7 @@ skip_restore:
         mov     #0xf0, k1
         extu.b  k1, k1
         not     k1, k1
-        and     k1, k2                  ! Mask orignal SR value
+        and     k1, k2                  ! Mask original SR value
         !
         mov     k3, k0                  ! Calculate IMASK-bits
         shlr2   k0
@@ -313,7 +312,6 @@ skip_restore:
         mov     #0, k1
         mov.b   k1, @k0
 #endif
-        mov.l   @r15+, k2               ! restore EXPEVT
         mov     k4, r15
         rte
          nop
@@ -336,81 +334,55 @@ skip_restore:
 ENTRY(vbr_base)
         .long   0
 !
+! 0x100: General exception vector
+!
         .balign         256,0,256
 general_exception:
-        mov.l   1f, k2
-        mov.l   2f, k3
-#ifdef CONFIG_CPU_SUBTYPE_SHX3
-        mov.l   @k2, k2
+#ifndef CONFIG_CPU_SUBTYPE_SHX3
+        bra     handle_exception
+         sts    pr, k3          ! save original pr value in k3
+#else
+        mov.l   1f, k4
+        mov.l   @k4, k4
 
         ! Is EXPEVT larger than 0x800?
         mov     #0x8, k0
         shll8   k0
-        cmp/hs  k0, k2
+        cmp/hs  k0, k4
         bf      0f
 
         ! then add 0x580 (k2 is 0xd80 or 0xda0)
         mov     #0x58, k0
         shll2   k0
         shll2   k0
-        add     k0, k2
+        add     k0, k4
 0:
-        bra     handle_exception
+        ! Setup stack and save DSP context (k0 contains original r15 on return)
+        bsr     prepare_stack_save_dsp
          nop
-#else
-        bra     handle_exception
-         mov.l  @k2, k2
-#endif
-        .align  2
-1:      .long   EXPEVT
-2:      .long   ret_from_exception
-!
-!
 
-        .balign         1024,0,1024
-tlb_miss:
-        mov.l   1f, k2
-        mov.l   4f, k3
-        bra     handle_exception
-         mov.l  @k2, k2
-!
-        .balign         512,0,512
-interrupt:
-        mov.l   3f, k3
-#if defined(CONFIG_KGDB)
-        mov.l   2f, k2
-        ! Debounce (filter nested NMI)
-        mov.l   @k2, k0
-        mov.l   5f, k1
-        cmp/eq  k1, k0
-        bf      0f
-        mov.l   6f, k1
-        tas.b   @k1
-        bt      0f
-        rte
+        ! Save registers / Switch to bank 0
+        mov             k4, k2          ! keep vector in k2
+        mov.l   1f, k4          ! SR bits to clear in k4
+        bsr     save_regs       ! needs original pr value in k3
+         nop
+
+        bra     handle_exception_special
          nop
-        .align  2
-2:      .long   INTEVT
-5:      .long   NMI_VEC
-6:      .long   in_nmi
-0:
-#endif /* defined(CONFIG_KGDB) */
-        bra     handle_exception
-         mov    #-1, k2         ! interrupt exception marker
 
         .align  2
 1:      .long   EXPEVT
-3:      .long   ret_from_irq
-4:      .long   ret_from_exception
+#endif
 
-!
-!
-        .align  2
-ENTRY(handle_exception)
-        ! Using k0, k1 for scratch registers (r0_bank1, r1_bank),
-        ! save all registers onto stack.
-        !
+! prepare_stack_save_dsp()
+! - roll back gRB
+! - switch to kernel stack
+! - save DSP
+! k0 returns original sp (after roll back)
+! k1 trashed
+! k2 trashed
 
+prepare_stack_save_dsp:
 #ifdef CONFIG_GUSA
         ! Check for roll back gRB (User and Kernel)
         mov     r15, k0
@@ -430,7 +402,7 @@ ENTRY(handle_exception)
 2:      mov     k1, r15         ! SP = r1
 1:
 #endif
-
+        ! Switch to kernel stack if needed
         stc     ssr, k0         ! Is it from kernel space?
         shll    k0              ! Check MD bit (bit30) by shifting it into...
         shll    k0              !       ...the T bit
@@ -443,18 +415,17 @@ ENTRY(handle_exception)
         add     current, k1
         mov     k1, r15         ! change to kernel stack
         !
-1:      mov.l   2f, k1
-        !
+1:
 #ifdef CONFIG_SH_DSP
-        mov.l   r2, @-r15               ! Save r2, we need another reg
-        stc     sr, k4
-        mov.l   1f, r2
-        tst     r2, k4                  ! Check if in DSP mode
-        mov.l   @r15+, r2               ! Restore r2 now
+        ! Save DSP context if needed
+        stc     sr, k1
+        mov     #0x10, k2
+        shll8   k2                      ! DSP=1 (0x00001000)
+        tst     k2, k1                  ! Check if in DSP mode (passed in k2)
         bt/s    skip_save
-         mov    #0, k4                  ! Set marker for no stack frame
+         mov    #0, k1                  ! Set marker for no stack frame
 
-        mov     r2, k4                  ! Backup r2 (in k4) for later
+        mov     k2, k1                  ! Save has-frame marker
 
         ! Save DSP registers on stack
         stc.l   mod, @-r15
@@ -473,35 +444,74 @@ ENTRY(handle_exception)
         ! as we're not at all interested in supporting ancient toolchains at
         ! this point. -- PFM.
 
-        mov     r15, r2
+        mov     r15, k2
         .word   0xf653                  ! movs.l        a1, @-r2
         .word   0xf6f3                  ! movs.l        a0g, @-r2
         .word   0xf6d3                  ! movs.l        a1g, @-r2
         .word   0xf6c3                  ! movs.l        m0, @-r2
         .word   0xf6e3                  ! movs.l        m1, @-r2
-        mov     r2, r15
+        mov     k2, r15
 
-        mov     k4, r2                  ! Restore r2
-        mov.l   1f, k4                  ! Force DSP stack frame
 skip_save:
-        mov.l   k4, @-r15               ! Push DSP mode marker onto stack
+        mov.l   k1, @-r15               ! Push DSP mode marker onto stack
 #endif
-        ! Save the user registers on the stack.
-        mov.l   k2, @-r15       ! EXPEVT
-
-        mov     #-1, k4
-        mov.l   k4, @-r15       ! set TRA (default: -1)
-        !
+        rts
+         nop
+!
+! 0x400: Instruction and Data TLB miss exception vector
+!
+        .balign         1024,0,1024
+tlb_miss:
+        sts     pr, k3          ! save original pr value in k3
+
+handle_exception:
+        mova    exception_data, k0
+
+        ! Setup stack and save DSP context (k0 contains original r15 on return)
+        bsr     prepare_stack_save_dsp
+         PREF(k0)
+
+        ! Save registers / Switch to bank 0
+        mov.l   5f, k2          ! vector register address
+        mov.l   1f, k4          ! SR bits to clear in k4
+        bsr     save_regs       ! needs original pr value in k3
+         mov.l  @k2, k2         ! read out vector and keep in k2
+
+handle_exception_special:
+        ! Setup return address and jump to exception handler
+        mov.l   7f, r9          ! fetch return address
+        stc     r2_bank, r0     ! k2 (vector)
+        mov.l   6f, r10
+        shlr2   r0
+        shlr    r0
+        mov.l   @(r0, r10), r10
+        jmp     @r10
+         lds    r9, pr          ! put return address in pr
+
+        .align  L1_CACHE_SHIFT
+
+! save_regs()
+! - save default tra, macl, mach, gbr, ssr, pr* and spc on the stack
+! - save r15*, r14, r13, r12, r11, r10, r9, r8 on the stack
+! - switch bank
+! - save r7, r6, r5, r4, r3, r2, r1, r0 on the stack
+! k0 contains original stack pointer*
+! k1 trashed
+! k3 passes original pr*
+! k4 passes SR bitmask
+! BL=1 on entry, on exit BL=0.
+
+ENTRY(save_regs)
+        mov     #-1, r1
+        mov.l   k1, @-r15       ! set TRA (default: -1)
         sts.l   macl, @-r15
         sts.l   mach, @-r15
         stc.l   gbr, @-r15
         stc.l   ssr, @-r15
-        sts.l   pr, @-r15
+        mov.l   k3, @-r15       ! original pr in k3
         stc.l   spc, @-r15
-        !
-        lds     k3, pr          ! Set the return address to pr
-        !
-        mov.l   k0, @-r15       ! save orignal stack
+
+        mov.l   k0, @-r15       ! original stack pointer in k0
         mov.l   r14, @-r15
         mov.l   r13, @-r15
         mov.l   r12, @-r15
@@ -509,13 +519,23 @@ skip_save:
         mov.l   r10, @-r15
         mov.l   r9, @-r15
         mov.l   r8, @-r15
-        !
-        stc     sr, r8          ! Back to normal register bank, and
-        or      k1, r8          ! Block all interrupts
-        mov.l   3f, k1
-        and     k1, r8          ! ...
-        ldc     r8, sr          ! ...changed here.
-        !
+
+        mov.l   0f, k3          ! SR bits to set in k3
+
+        ! fall-through
+
+! save_low_regs()
+! - modify SR for bank switch
+! - save r7, r6, r5, r4, r3, r2, r1, r0 on the stack
+! k3 passes bits to set in SR
+! k4 passes bits to clear in SR
+
+ENTRY(save_low_regs)
+        stc     sr, r8
+        or      k3, r8
+        and     k4, r8
+        ldc     r8, sr
+
         mov.l   r7, @-r15
         mov.l   r6, @-r15
         mov.l   r5, @-r15
@@ -523,52 +543,63 @@ skip_save:
         mov.l   r3, @-r15
         mov.l   r2, @-r15
         mov.l   r1, @-r15
-        mov.l   r0, @-r15
-
-        /*
-         * This gets a bit tricky.. in the INTEVT case we don't want to use
-         * the VBR offset as a destination in the jump call table, since all
-         * of the destinations are the same. In this case, (interrupt) sets
-         * a marker in r2 (now r2_bank since SR.RB changed), which we check
-         * to determine the exception type. For all other exceptions, we
-         * forcibly read EXPEVT from memory and fix up the jump address, in
-         * the interrupt exception case we jump to do_IRQ() and defer the
-         * INTEVT read until there. As a bonus, we can also clean up the SR.RB
-         * checks that do_IRQ() was doing..
-         */
-        stc     r2_bank, r8
-        cmp/pz  r8
-        bf      interrupt_exception
-        shlr2   r8
-        shlr    r8
-        mov.l   4f, r9
-        add     r8, r9
-        mov.l   @r9, r9
-        jmp     @r9
-         nop
         rts
-         nop
+         mov.l  r0, @-r15
 
+!
+! 0x600: Interrupt / NMI vector
+!
+        .balign         512,0,512
+ENTRY(handle_interrupt)
+#if defined(CONFIG_KGDB)
+        mov.l   2f, k2
+        ! Debounce (filter nested NMI)
+        mov.l   @k2, k0
+        mov.l   9f, k1
+        cmp/eq  k1, k0
+        bf      11f
+        mov.l   10f, k1
+        tas.b   @k1
+        bt      11f
+        rte
+         nop
         .align  2
-1:      .long   0x00001000      ! DSP=1
-2:      .long   0x000080f0      ! FD=1, IMASK=15
-3:      .long   0xcfffffff      ! RB=0, BL=0
-4:      .long   exception_handling_table
+9:      .long   NMI_VEC
+10:     .long   in_nmi
+11:
+#endif /* defined(CONFIG_KGDB) */
+        sts     pr, k3          ! save original pr value in k3
+        mova    exception_data, k0
 
-interrupt_exception:
-        mov.l   1f, r9
+        ! Setup stack and save DSP context (k0 contains original r15 on return)
+        bsr     prepare_stack_save_dsp
+         PREF(k0)
+
+        ! Save registers / Switch to bank 0
+        mov.l   1f, k4          ! SR bits to clear in k4
+        bsr     save_regs       ! needs original pr value in k3
+         mov    #-1, k2         ! default vector kept in k2
+
+        ! Setup return address and jump to do_IRQ
+        mov.l   4f, r9          ! fetch return address
+        lds     r9, pr          ! put return address in pr
         mov.l   2f, r4
-        mov.l   @r4, r4
+        mov.l   3f, r9
+        mov.l   @r4, r4         ! pass INTEVT vector as arg0
         jmp     @r9
-         mov    r15, r5
-        rts
-         nop
-
-        .align 2
-1:      .long   do_IRQ
-2:      .long   INTEVT
+         mov    r15, r5         ! pass saved registers as arg1
 
-        .align  2
 ENTRY(exception_none)
         rts
          nop
+
+        .align  L1_CACHE_SHIFT
+exception_data:
+0:      .long   0x000080f0      ! FD=1, IMASK=15
+1:      .long   0xcfffffff      ! RB=0, BL=0
+2:      .long   INTEVT
+3:      .long   do_IRQ
+4:      .long   ret_from_irq
+5:      .long   EXPEVT
+6:      .long   exception_handling_table
+7:      .long   ret_from_exception
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
index 6468ae86b944..63b67badd67e 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
@@ -1,7 +1,7 @@
 /*
  * SH7705 Setup
  *
- *  Copyright (C) 2006, 2007  Paul Mundt
+ *  Copyright (C) 2006 - 2009  Paul Mundt
  *  Copyright (C) 2007  Nobuhiro Iwamatsu
  *
  * This file is subject to the terms and conditions of the GNU General Public
@@ -21,51 +21,36 @@ enum {
         /* interrupt sources */
         IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
         PINT07, PINT815,
-        DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3,
-        SCIF0_ERI, SCIF0_RXI, SCIF0_TXI,
-        SCIF2_ERI, SCIF2_RXI, SCIF2_TXI,
-        ADC_ADI,
-        USB_USI0, USB_USI1,
+
+        DMAC, SCIF0, SCIF2, ADC_ADI, USB,
+
         TPU0, TPU1, TPU2, TPU3,
-        TMU0, TMU1, TMU2_TUNI, TMU2_TICPI,
-        RTC_ATI, RTC_PRI, RTC_CUI,
-        WDT,
-        REF_RCMI,
+        TMU0, TMU1, TMU2,
 
-        /* interrupt groups */
-        RTC, TMU2, DMAC, USB, SCIF2, SCIF0,
+        RTC, WDT, REF_RCMI,
 };
 
 static struct intc_vect vectors[] __initdata = {
         /* IRQ0->5 are handled in setup-sh3.c */
         INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720),
-        INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820),
-        INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860),
-        INTC_VECT(SCIF0_ERI, 0x880), INTC_VECT(SCIF0_RXI, 0x8a0),
-        INTC_VECT(SCIF0_TXI, 0x8e0),
-        INTC_VECT(SCIF2_ERI, 0x900), INTC_VECT(SCIF2_RXI, 0x920),
-        INTC_VECT(SCIF2_TXI, 0x960),
+        INTC_VECT(DMAC, 0x800), INTC_VECT(DMAC, 0x820),
+        INTC_VECT(DMAC, 0x840), INTC_VECT(DMAC, 0x860),
+        INTC_VECT(SCIF0, 0x880), INTC_VECT(SCIF0, 0x8a0),
+        INTC_VECT(SCIF0, 0x8e0),
+        INTC_VECT(SCIF2, 0x900), INTC_VECT(SCIF2, 0x920),
+        INTC_VECT(SCIF2, 0x960),
         INTC_VECT(ADC_ADI, 0x980),
-        INTC_VECT(USB_USI0, 0xa20), INTC_VECT(USB_USI1, 0xa40),
+        INTC_VECT(USB, 0xa20), INTC_VECT(USB, 0xa40),
         INTC_VECT(TPU0, 0xc00), INTC_VECT(TPU1, 0xc20),
         INTC_VECT(TPU2, 0xc80), INTC_VECT(TPU3, 0xca0),
         INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
-        INTC_VECT(TMU2_TUNI, 0x440), INTC_VECT(TMU2_TICPI, 0x460),
-        INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0),
-        INTC_VECT(RTC_CUI, 0x4c0),
+        INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460),
+        INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
+        INTC_VECT(RTC, 0x4c0),
         INTC_VECT(WDT, 0x560),
         INTC_VECT(REF_RCMI, 0x580),
 };
 
-static struct intc_group groups[] __initdata = {
-        INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),
-        INTC_GROUP(TMU2, TMU2_TUNI, TMU2_TICPI),
-        INTC_GROUP(DMAC, DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3),
-        INTC_GROUP(USB, USB_USI0, USB_USI1),
-        INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI),
-        INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI),
-};
-
 static struct intc_prio_reg prio_registers[] __initdata = {
         { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
         { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, 0, 0 } },
@@ -78,7 +63,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
 
 };
 
-static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, groups,
+static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, NULL,
                          NULL, prio_registers, NULL);
 
 static struct plat_sci_port sci_platform_data[] = {
@@ -86,12 +71,12 @@ static struct plat_sci_port sci_platform_data[] = {
                 .mapbase        = 0xa4410000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 56, 57, 59 },
+                .irqs           = { 56, 56, 56 },
         }, {
                 .mapbase        = 0xa4400000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 52, 53, 55 },
+                .irqs           = { 52, 52, 52 },
         }, {
                 .flags = 0,
         }
@@ -115,14 +100,6 @@ static struct resource rtc_resources[] = {
                 .start  = 20,
                 .flags  = IORESOURCE_IRQ,
         },
-        [2] =   {
-                .start  = 21,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [3] =   {
-                .start  = 22,
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 
 static struct sh_rtc_platform_info rtc_info = {
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
index 93c55e2ed952..a74f960b5e79 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh770x.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
@@ -2,6 +2,7 @@
  * SH3 Setup code for SH7706, SH7707, SH7708, SH7709
  *
  *  Copyright (C) 2007  Magnus Damm
+ *  Copyright (C) 2009  Paul Mundt
  *
  * Based on setup-sh7709.c
  *
@@ -24,46 +25,37 @@ enum {
         /* interrupt sources */
         IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
         PINT07, PINT815,
-        DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3,
-        SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI,
-        SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI,
-        SCI_ERI, SCI_RXI, SCI_TXI, SCI_TEI,
-        ADC_ADI,
+        DMAC, SCIF0, SCIF2, SCI, ADC_ADI,
         LCDC, PCC0, PCC1,
-        TMU0, TMU1, TMU2_TUNI, TMU2_TICPI,
-        RTC_ATI, RTC_PRI, RTC_CUI,
-        WDT,
-        REF_RCMI, REF_ROVI,
-
-        /* interrupt groups */
-        RTC, REF, TMU2, DMAC, SCI, SCIF2, SCIF0,
+        TMU0, TMU1, TMU2,
+        RTC, WDT, REF,
 };
 
 static struct intc_vect vectors[] __initdata = {
         INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
-        INTC_VECT(TMU2_TUNI, 0x440), INTC_VECT(TMU2_TICPI, 0x460),
-        INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0),
-        INTC_VECT(RTC_CUI, 0x4c0),
-        INTC_VECT(SCI_ERI, 0x4e0), INTC_VECT(SCI_RXI, 0x500),
-        INTC_VECT(SCI_TXI, 0x520), INTC_VECT(SCI_TEI, 0x540),
+        INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460),
+        INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
+        INTC_VECT(RTC, 0x4c0),
+        INTC_VECT(SCI, 0x4e0), INTC_VECT(SCI, 0x500),
+        INTC_VECT(SCI, 0x520), INTC_VECT(SCI, 0x540),
         INTC_VECT(WDT, 0x560),
-        INTC_VECT(REF_RCMI, 0x580),
-        INTC_VECT(REF_ROVI, 0x5a0),
+        INTC_VECT(REF, 0x580),
+        INTC_VECT(REF, 0x5a0),
 #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
     defined(CONFIG_CPU_SUBTYPE_SH7707) || \
     defined(CONFIG_CPU_SUBTYPE_SH7709)
         /* IRQ0->5 are handled in setup-sh3.c */
-        INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820),
-        INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860),
+        INTC_VECT(DMAC, 0x800), INTC_VECT(DMAC, 0x820),
+        INTC_VECT(DMAC, 0x840), INTC_VECT(DMAC, 0x860),
         INTC_VECT(ADC_ADI, 0x980),
-        INTC_VECT(SCIF2_ERI, 0x900), INTC_VECT(SCIF2_RXI, 0x920),
-        INTC_VECT(SCIF2_BRI, 0x940), INTC_VECT(SCIF2_TXI, 0x960),
+        INTC_VECT(SCIF2, 0x900), INTC_VECT(SCIF2, 0x920),
+        INTC_VECT(SCIF2, 0x940), INTC_VECT(SCIF2, 0x960),
 #endif
 #if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
     defined(CONFIG_CPU_SUBTYPE_SH7709)
         INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720),
-        INTC_VECT(SCIF0_ERI, 0x880), INTC_VECT(SCIF0_RXI, 0x8a0),
-        INTC_VECT(SCIF0_BRI, 0x8c0), INTC_VECT(SCIF0_TXI, 0x8e0),
+        INTC_VECT(SCIF0, 0x880), INTC_VECT(SCIF0, 0x8a0),
+        INTC_VECT(SCIF0, 0x8c0), INTC_VECT(SCIF0, 0x8e0),
 #endif
 #if defined(CONFIG_CPU_SUBTYPE_SH7707)
         INTC_VECT(LCDC, 0x9a0),
@@ -71,16 +63,6 @@ static struct intc_vect vectors[] __initdata = {
 #endif
 };
 
-static struct intc_group groups[] __initdata = {
-        INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),
-        INTC_GROUP(TMU2, TMU2_TUNI, TMU2_TICPI),
-        INTC_GROUP(REF, REF_RCMI, REF_ROVI),
-        INTC_GROUP(DMAC, DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3),
-        INTC_GROUP(SCI, SCI_ERI, SCI_RXI, SCI_TXI, SCI_TEI),
-        INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
-        INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI),
-};
-
 static struct intc_prio_reg prio_registers[] __initdata = {
         { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
         { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF, SCI, 0 } },
@@ -101,7 +83,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
 #endif
 };
 
-static DECLARE_INTC_DESC(intc_desc, "sh770x", vectors, groups,
+static DECLARE_INTC_DESC(intc_desc, "sh770x", vectors, NULL,
                          NULL, prio_registers, NULL);
 
 static struct resource rtc_resources[] = {
@@ -111,14 +93,6 @@ static struct resource rtc_resources[] = {
                 .flags  = IORESOURCE_IO,
         },
         [1] =   {
-                .start  = 21,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [2] =   {
-                .start  = 22,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [3] =   {
                 .start  = 20,
                 .flags  = IORESOURCE_IRQ,
         },
@@ -136,7 +110,7 @@ static struct plat_sci_port sci_platform_data[] = {
                 .mapbase        = 0xfffffe80,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCI,
-                .irqs           = { 23, 24, 25, 0 },
+                .irqs           = { 23, 23, 23, 0 },
         },
 #if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
     defined(CONFIG_CPU_SUBTYPE_SH7707) || \
@@ -145,7 +119,7 @@ static struct plat_sci_port sci_platform_data[] = {
                 .mapbase        = 0xa4000150,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 56, 57, 59, 58 },
+                .irqs           = { 56, 56, 56, 56 },
         },
 #endif
 #if defined(CONFIG_CPU_SUBTYPE_SH7707) || \
@@ -154,7 +128,7 @@ static struct plat_sci_port sci_platform_data[] = {
                 .mapbase        = 0xa4000140,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_IRDA,
-                .irqs           = { 52, 53, 55, 54 },
+                .irqs           = { 52, 52, 52, 52 },
         },
 #endif
         {
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
index 77eee481de47..335098b66e2f 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7710.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
@@ -1,7 +1,7 @@
 /*
  * SH3 Setup code for SH7710, SH7712
  *
- *  Copyright (C) 2006, 2007  Paul Mundt
+ *  Copyright (C) 2006 - 2009  Paul Mundt
  *  Copyright (C) 2007  Nobuhiro Iwamatsu
  *
  * This file is subject to the terms and conditions of the GNU General Public
@@ -20,59 +20,40 @@ enum {
 
         /* interrupt sources */
         IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
-        DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3,
-        SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI,
-        SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI,
-        DMAC_DEI4, DMAC_DEI5,
-        IPSEC,
+        DMAC1, SCIF0, SCIF1, DMAC2, IPSEC,
         EDMAC0, EDMAC1, EDMAC2,
-        SIOF0_ERI, SIOF0_TXI, SIOF0_RXI, SIOF0_CCI,
-        SIOF1_ERI, SIOF1_TXI, SIOF1_RXI, SIOF1_CCI,
-        TMU0, TMU1, TMU2,
-        RTC_ATI, RTC_PRI, RTC_CUI,
-        WDT,
-        REF,
+        SIOF0, SIOF1,
 
-        /* interrupt groups */
-        RTC, DMAC1, SCIF0, SCIF1, DMAC2, SIOF0, SIOF1,
+        TMU0, TMU1, TMU2,
+        RTC, WDT, REF,
 };
 
 static struct intc_vect vectors[] __initdata = {
         /* IRQ0->5 are handled in setup-sh3.c */
-        INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820),
-        INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860),
-        INTC_VECT(SCIF0_ERI, 0x880), INTC_VECT(SCIF0_RXI, 0x8a0),
-        INTC_VECT(SCIF0_BRI, 0x8c0), INTC_VECT(SCIF0_TXI, 0x8e0),
-        INTC_VECT(SCIF1_ERI, 0x900), INTC_VECT(SCIF1_RXI, 0x920),
-        INTC_VECT(SCIF1_BRI, 0x940), INTC_VECT(SCIF1_TXI, 0x960),
-        INTC_VECT(DMAC_DEI4, 0xb80), INTC_VECT(DMAC_DEI5, 0xba0),
+        INTC_VECT(DMAC1, 0x800), INTC_VECT(DMAC1, 0x820),
+        INTC_VECT(DMAC1, 0x840), INTC_VECT(DMAC1, 0x860),
+        INTC_VECT(SCIF0, 0x880), INTC_VECT(SCIF0, 0x8a0),
+        INTC_VECT(SCIF0, 0x8c0), INTC_VECT(SCIF0, 0x8e0),
+        INTC_VECT(SCIF1, 0x900), INTC_VECT(SCIF1, 0x920),
+        INTC_VECT(SCIF1, 0x940), INTC_VECT(SCIF1, 0x960),
+        INTC_VECT(DMAC2, 0xb80), INTC_VECT(DMAC2, 0xba0),
 #ifdef CONFIG_CPU_SUBTYPE_SH7710
         INTC_VECT(IPSEC, 0xbe0),
 #endif
         INTC_VECT(EDMAC0, 0xc00), INTC_VECT(EDMAC1, 0xc20),
         INTC_VECT(EDMAC2, 0xc40),
-        INTC_VECT(SIOF0_ERI, 0xe00), INTC_VECT(SIOF0_TXI, 0xe20),
-        INTC_VECT(SIOF0_RXI, 0xe40), INTC_VECT(SIOF0_CCI, 0xe60),
-        INTC_VECT(SIOF1_ERI, 0xe80), INTC_VECT(SIOF1_TXI, 0xea0),
-        INTC_VECT(SIOF1_RXI, 0xec0), INTC_VECT(SIOF1_CCI, 0xee0),
+        INTC_VECT(SIOF0, 0xe00), INTC_VECT(SIOF0, 0xe20),
+        INTC_VECT(SIOF0, 0xe40), INTC_VECT(SIOF0, 0xe60),
+        INTC_VECT(SIOF1, 0xe80), INTC_VECT(SIOF1, 0xea0),
+        INTC_VECT(SIOF1, 0xec0), INTC_VECT(SIOF1, 0xee0),
         INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
         INTC_VECT(TMU2, 0x440),
-        INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0),
-        INTC_VECT(RTC_CUI, 0x4c0),
+        INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
+        INTC_VECT(RTC, 0x4c0),
         INTC_VECT(WDT, 0x560),
         INTC_VECT(REF, 0x580),
 };
 
-static struct intc_group groups[] __initdata = {
-        INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),
-        INTC_GROUP(DMAC1, DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3),
-        INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
-        INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI),
-        INTC_GROUP(DMAC2, DMAC_DEI4, DMAC_DEI5),
-        INTC_GROUP(SIOF0, SIOF0_ERI, SIOF0_TXI, SIOF0_RXI, SIOF0_CCI),
-        INTC_GROUP(SIOF1, SIOF1_ERI, SIOF1_TXI, SIOF1_RXI, SIOF1_CCI),
-};
-
 static struct intc_prio_reg prio_registers[] __initdata = {
         { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
         { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF, 0, 0 } },
@@ -85,7 +66,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
         { 0xa4080006, 0, 16, 4, /* IPRI */ { 0, 0, SIOF1 } },
 };
 
-static DECLARE_INTC_DESC(intc_desc, "sh7710", vectors, groups,
+static DECLARE_INTC_DESC(intc_desc, "sh7710", vectors, NULL,
                          NULL, prio_registers, NULL);
 
 static struct resource rtc_resources[] = {
@@ -98,14 +79,6 @@ static struct resource rtc_resources[] = {
                 .start  = 20,
                 .flags  = IORESOURCE_IRQ,
         },
-        [2] =   {
-                .start  = 21,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [3] =   {
-                .start  = 22,
-                .flags  = IORESOURCE_IRQ,
-        },
 };
 
 static struct sh_rtc_platform_info rtc_info = {
@@ -127,12 +100,12 @@ static struct plat_sci_port sci_platform_data[] = {
                 .mapbase        = 0xa4400000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 52, 53, 55, 54 },
+                .irqs           = { 52, 52, 52, 52 },
         }, {
                 .mapbase        = 0xa4410000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 56, 57, 59, 58 },
+                .irqs           = { 56, 56, 56, 56 },
         }, {
 
                 .flags = 0,
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
index f807a21b066c..003874a2fd2a 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7720.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
@@ -2,6 +2,7 @@
  * SH7720 Setup
  *
  *  Copyright (C) 2007  Markus Brunner, Mark Jonas
+ *  Copyright (C) 2009  Paul Mundt
  *
  *  Based on arch/sh/kernel/cpu/sh4/setup-sh7750.c:
  *
@@ -26,17 +27,7 @@ static struct resource rtc_resources[] = {
                 .flags  = IORESOURCE_IO,
         },
         [1] = {
-                /* Period IRQ */
-                .start  = 21,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [2] = {
-                /* Carry IRQ */
-                .start  = 22,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [3] = {
-                /* Alarm IRQ */
+                /* Shared Period/Carry/Alarm IRQ */
                 .start  = 20,
                 .flags  = IORESOURCE_IRQ,
         },
@@ -150,62 +141,49 @@ enum {
         UNUSED = 0,
 
         /* interrupt sources */
-        TMU0, TMU1, TMU2, RTC_ATI, RTC_PRI, RTC_CUI,
-        WDT, REF_RCMI, SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEND,
+        TMU0, TMU1, TMU2, RTC,
+        WDT, REF_RCMI, SIM,
         IRQ0, IRQ1, IRQ2, IRQ3,
         USBF_SPD, TMU_SUNI, IRQ5, IRQ4,
-        DMAC1_DEI0, DMAC1_DEI1, DMAC1_DEI2, DMAC1_DEI3, LCDC, SSL,
-        ADC, DMAC2_DEI4, DMAC2_DEI5, USBFI0, USBFI1, CMT,
+        DMAC1, LCDC, SSL,
+        ADC, DMAC2, USBFI, CMT,
         SCIF0, SCIF1,
-        PINT07, PINT815, TPU0, TPU1, TPU2, TPU3, IIC,
-        SIOF0, SIOF1, MMCI0, MMCI1, MMCI2, MMCI3, PCC,
+        PINT07, PINT815, TPU, IIC,
+        SIOF0, SIOF1, MMC, PCC,
         USBHI, AFEIF,
         H_UDI,
-        /* interrupt groups */
-        TMU, RTC, SIM, DMAC1, USBFI, DMAC2, USB, TPU, MMC,
 };
 
 static struct intc_vect vectors[] __initdata = {
         /* IRQ0->5 are handled in setup-sh3.c */
         INTC_VECT(TMU0, 0x400),       INTC_VECT(TMU1, 0x420),
-        INTC_VECT(TMU2, 0x440),       INTC_VECT(RTC_ATI, 0x480),
-        INTC_VECT(RTC_PRI, 0x4a0),    INTC_VECT(RTC_CUI, 0x4c0),
-        INTC_VECT(SIM_ERI, 0x4e0),    INTC_VECT(SIM_RXI, 0x500),
-        INTC_VECT(SIM_TXI, 0x520),    INTC_VECT(SIM_TEND, 0x540),
+        INTC_VECT(TMU2, 0x440),       INTC_VECT(RTC, 0x480),
+        INTC_VECT(RTC, 0x4a0),        INTC_VECT(RTC, 0x4c0),
+        INTC_VECT(SIM, 0x4e0),        INTC_VECT(SIM, 0x500),
+        INTC_VECT(SIM, 0x520),        INTC_VECT(SIM, 0x540),
         INTC_VECT(WDT, 0x560),        INTC_VECT(REF_RCMI, 0x580),
         /* H_UDI cannot be masked */  INTC_VECT(TMU_SUNI, 0x6c0),
-        INTC_VECT(USBF_SPD, 0x6e0),   INTC_VECT(DMAC1_DEI0, 0x800),
-        INTC_VECT(DMAC1_DEI1, 0x820), INTC_VECT(DMAC1_DEI2, 0x840),
-        INTC_VECT(DMAC1_DEI3, 0x860), INTC_VECT(LCDC, 0x900),
+        INTC_VECT(USBF_SPD, 0x6e0),   INTC_VECT(DMAC1, 0x800),
+        INTC_VECT(DMAC1, 0x820),      INTC_VECT(DMAC1, 0x840),
+        INTC_VECT(DMAC1, 0x860),      INTC_VECT(LCDC, 0x900),
 #if defined(CONFIG_CPU_SUBTYPE_SH7720)
         INTC_VECT(SSL, 0x980),
 #endif
-        INTC_VECT(USBFI0, 0xa20),     INTC_VECT(USBFI1, 0xa40),
+        INTC_VECT(USBFI, 0xa20),      INTC_VECT(USBFI, 0xa40),
         INTC_VECT(USBHI, 0xa60),
-        INTC_VECT(DMAC2_DEI4, 0xb80), INTC_VECT(DMAC2_DEI5, 0xba0),
+        INTC_VECT(DMAC2, 0xb80),      INTC_VECT(DMAC2, 0xba0),
         INTC_VECT(ADC, 0xbe0),        INTC_VECT(SCIF0, 0xc00),
         INTC_VECT(SCIF1, 0xc20),      INTC_VECT(PINT07, 0xc80),
         INTC_VECT(PINT815, 0xca0),    INTC_VECT(SIOF0, 0xd00),
-        INTC_VECT(SIOF1, 0xd20),      INTC_VECT(TPU0, 0xd80),
-        INTC_VECT(TPU1, 0xda0),       INTC_VECT(TPU2, 0xdc0),
-        INTC_VECT(TPU3, 0xde0),       INTC_VECT(IIC, 0xe00),
-        INTC_VECT(MMCI0, 0xe80),      INTC_VECT(MMCI1, 0xea0),
-        INTC_VECT(MMCI2, 0xec0),      INTC_VECT(MMCI3, 0xee0),
+        INTC_VECT(SIOF1, 0xd20),      INTC_VECT(TPU, 0xd80),
+        INTC_VECT(TPU, 0xda0),        INTC_VECT(TPU, 0xdc0),
+        INTC_VECT(TPU, 0xde0),        INTC_VECT(IIC, 0xe00),
+        INTC_VECT(MMC, 0xe80),        INTC_VECT(MMC, 0xea0),
+        INTC_VECT(MMC, 0xec0),        INTC_VECT(MMC, 0xee0),
         INTC_VECT(CMT, 0xf00),        INTC_VECT(PCC, 0xf60),
         INTC_VECT(AFEIF, 0xfe0),
 };
 
-static struct intc_group groups[] __initdata = {
-        INTC_GROUP(TMU, TMU0, TMU1, TMU2),
-        INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),
-        INTC_GROUP(SIM, SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEND),
-        INTC_GROUP(DMAC1, DMAC1_DEI0, DMAC1_DEI1, DMAC1_DEI2, DMAC1_DEI3),
-        INTC_GROUP(USBFI, USBFI0, USBFI1),
-        INTC_GROUP(DMAC2, DMAC2_DEI4, DMAC2_DEI5),
-        INTC_GROUP(TPU, TPU0, TPU1, TPU2, TPU3),
-        INTC_GROUP(MMC, MMCI0, MMCI1, MMCI2, MMCI3),
-};
-
 static struct intc_prio_reg prio_registers[] __initdata = {
         { 0xA414FEE2UL, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
         { 0xA414FEE4UL, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, SIM, 0 } },
@@ -219,7 +197,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
         { 0xA4080008UL, 0, 16, 4, /* IPRJ */ { 0, USBHI, 0, AFEIF } },
 };
 
-static DECLARE_INTC_DESC(intc_desc, "sh7720", vectors, groups,
+static DECLARE_INTC_DESC(intc_desc, "sh7720", vectors, NULL,
                 NULL, prio_registers, NULL);
 
 void __init plat_irq_setup(void)
diff --git a/arch/sh/kernel/cpu/sh3/swsusp.S b/arch/sh/kernel/cpu/sh3/swsusp.S
new file mode 100644
index 000000000000..01145426a2b8
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh3/swsusp.S
@@ -0,0 +1,147 @@
+/*
+ * arch/sh/kernel/cpu/sh3/swsusp.S
+ *
+ * Copyright (C) 2009 Magnus Damm
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/sys.h>
+#include <linux/errno.h>
+#include <linux/linkage.h>
+#include <asm/asm-offsets.h>
+#include <asm/page.h>
+
+#define k0      r0
+#define k1      r1
+#define k2      r2
+#define k3      r3
+#define k4      r4
+
+! swsusp_arch_resume()
+! - copy restore_pblist pages
+! - restore registers from swsusp_arch_regs_cpu0
+
+ENTRY(swsusp_arch_resume)
+        mov.l   1f, r15
+        mov.l   2f, r4
+        mov.l   @r4, r4
+
+swsusp_copy_loop:
+        mov     r4, r0
+        cmp/eq  #0, r0
+        bt      swsusp_restore_regs
+
+        mov.l   @(PBE_ADDRESS, r4), r2
+        mov.l   @(PBE_ORIG_ADDRESS, r4), r5
+
+        mov     #(PAGE_SIZE >> 10), r3
+        shll8   r3
+        shlr2   r3 /* PAGE_SIZE / 16 */
+swsusp_copy_page:
+        dt      r3
+        mov.l   @r2+,r1   /*  16n+0 */
+        mov.l   r1,@r5
+        add     #4,r5
+        mov.l   @r2+,r1   /*  16n+4 */
+        mov.l   r1,@r5
+        add     #4,r5
+        mov.l   @r2+,r1   /*  16n+8 */
+        mov.l   r1,@r5
+        add     #4,r5
+        mov.l   @r2+,r1   /*  16n+12 */
+        mov.l   r1,@r5
+        bf/s    swsusp_copy_page
+         add    #4,r5
+
+        bra     swsusp_copy_loop
+         mov.l  @(PBE_NEXT, r4), r4
+
+swsusp_restore_regs:
+        ! BL=0: R7->R0 is bank0
+        mov.l   3f, r8
+        mov.l   4f, r5
+        jsr     @r5
+         nop
+
+        ! BL=1: R7->R0 is bank1
+        lds     k2, pr
+        ldc     k3, ssr
+
+        mov.l   @r15+, r0
+        mov.l   @r15+, r1
+        mov.l   @r15+, r2
+        mov.l   @r15+, r3
+        mov.l   @r15+, r4
+        mov.l   @r15+, r5
+        mov.l   @r15+, r6
+        mov.l   @r15+, r7
+
+        rte
+         nop
+        ! BL=0: R7->R0 is bank0
+
+        .align  2
+1:      .long   swsusp_arch_regs_cpu0
+2:      .long   restore_pblist
+3:      .long   0x20000000 ! RB=1
+4:      .long   restore_regs
+
+! swsusp_arch_suspend()
+! - prepare pc for resume, return from function without swsusp_save on resume
+! - save registers in swsusp_arch_regs_cpu0
+! - call swsusp_save write suspend image
+
+ENTRY(swsusp_arch_suspend)
+        sts     pr, r0          ! save pr in r0
+        mov     r15, r2         ! save sp in r2
+        mov     r8, r5          ! save r8 in r5
+        stc     sr, r1
+        ldc     r1, ssr         ! save sr in ssr
+        mov.l   1f, r1
+        ldc     r1, spc         ! setup pc value for resuming
+        mov.l   5f, r15         ! use swsusp_arch_regs_cpu0 as stack
+        mov.l   6f, r3
+        add     r3, r15         ! save from top of structure
+
+        ! BL=0: R7->R0 is bank0
+        mov.l   2f, r3          ! get new SR value for bank1
+        mov     #0, r4
+        mov.l   7f, r1
+        jsr     @r1             ! switch to bank1 and save bank1 r7->r0
+         not    r4, r4
+
+        ! BL=1: R7->R0 is bank1
+        stc     r2_bank, k0     ! fetch old sp from r2_bank0
+        mov.l   3f, k4          ! SR bits to clear in k4
+        mov.l   8f, k1
+        jsr     @k1             ! switch to bank0 and save all regs
+         stc    r0_bank, k3     ! fetch old pr from r0_bank0
+
+        ! BL=0: R7->R0 is bank0
+        mov     r2, r15         ! restore old sp
+        mov     r5, r8          ! restore old r8
+        stc     ssr, r1
+        ldc     r1, sr          ! restore old sr
+        lds     r0, pr          ! restore old pr
+        mov.l   4f, r0
+        jmp     @r0
+         nop
+
+swsusp_call_save:
+        mov     r2, r15         ! restore old sp
+        mov     r5, r8          ! restore old r8
+        lds     r0, pr          ! restore old pr
+        rts
+         mov    #0, r0
+
+        .align  2
+1:      .long   swsusp_call_save
+2:      .long   0x20000000 ! RB=1
+3:      .long   0xdfffffff ! RB=0
+4:      .long   swsusp_save
+5:      .long   swsusp_arch_regs_cpu0
+6:      .long   SWSUSP_ARCH_REGS_SIZE
+7:      .long   save_low_regs
+8:      .long   save_regs
diff --git a/arch/sh/kernel/cpu/sh4/Makefile b/arch/sh/kernel/cpu/sh4/Makefile
index d608557c7a3f..203b18347b83 100644
--- a/arch/sh/kernel/cpu/sh4/Makefile
+++ b/arch/sh/kernel/cpu/sh4/Makefile
@@ -5,6 +5,7 @@
 obj-y   := probe.o common.o
 common-y        += $(addprefix ../sh3/, entry.o ex.o)
 
+obj-$(CONFIG_HIBERNATION)               += $(addprefix ../sh3/, swsusp.o)
 obj-$(CONFIG_SH_FPU)                    += fpu.o softfloat.o
 obj-$(CONFIG_SH_STORE_QUEUES)           += sq.o
 
diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c
index 2e42572b1b11..3d3a3c4425a9 100644
--- a/arch/sh/kernel/cpu/sh4/probe.c
+++ b/arch/sh/kernel/cpu/sh4/probe.c
@@ -129,6 +129,13 @@ int __init detect_cpu_and_cache_system(void)
                 boot_cpu_data.flags |= CPU_HAS_FPU | CPU_HAS_PERF_COUNTER |
                                           CPU_HAS_LLSC;
                 break;
+        case 0x4004:
+                boot_cpu_data.type = CPU_SH7786;
+                boot_cpu_data.icache.ways = 4;
+                boot_cpu_data.dcache.ways = 4;
+                boot_cpu_data.flags |= CPU_HAS_FPU | CPU_HAS_PERF_COUNTER |
+                        CPU_HAS_LLSC | CPU_HAS_PTEAEX;
+                break;
         case 0x3008:
                 boot_cpu_data.icache.ways = 4;
                 boot_cpu_data.dcache.ways = 4;
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
index ec884039b914..a1c80d909cd6 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
@@ -21,17 +21,7 @@ static struct resource rtc_resources[] = {
                 .flags  = IORESOURCE_IO,
         },
         [1] = {
-                /* Period IRQ */
-                .start  = 21,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [2] = {
-                /* Carry IRQ */
-                .start  = 22,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [3] = {
-                /* Alarm IRQ */
+                /* Shared Period/Carry/Alarm IRQ */
                 .start  = 20,
                 .flags  = IORESOURCE_IRQ,
         },
@@ -50,13 +40,13 @@ static struct plat_sci_port sci_platform_data[] = {
                 .mapbase        = 0xffe00000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCI,
-                .irqs           = { 23, 24, 25, 0 },
+                .irqs           = { 23, 23, 23, 0 },
         }, {
 #endif
                 .mapbase        = 0xffe80000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 40, 41, 43, 42 },
+                .irqs           = { 40, 40, 40, 40 },
         }, {
                 .flags = 0,
         }
@@ -87,43 +77,27 @@ enum {
 
         /* interrupt sources */
         IRL0, IRL1, IRL2, IRL3, /* only IRLM mode supported */
-        HUDI, GPIOI,
-        DMAC_DMTE0, DMAC_DMTE1, DMAC_DMTE2, DMAC_DMTE3,
-        DMAC_DMTE4, DMAC_DMTE5, DMAC_DMTE6, DMAC_DMTE7,
-        DMAC_DMAE,
+        HUDI, GPIOI, DMAC,
         PCIC0_PCISERR, PCIC1_PCIERR, PCIC1_PCIPWDWN, PCIC1_PCIPWON,
         PCIC1_PCIDMA0, PCIC1_PCIDMA1, PCIC1_PCIDMA2, PCIC1_PCIDMA3,
-        TMU3, TMU4, TMU0, TMU1, TMU2_TUNI, TMU2_TICPI,
-        RTC_ATI, RTC_PRI, RTC_CUI,
-        SCI1_ERI, SCI1_RXI, SCI1_TXI, SCI1_TEI,
-        SCIF_ERI, SCIF_RXI, SCIF_BRI, SCIF_TXI,
-        WDT,
-        REF_RCMI, REF_ROVI,
+        TMU3, TMU4, TMU0, TMU1, TMU2, RTC, SCI1, SCIF, WDT, REF,
 
         /* interrupt groups */
-        DMAC, PCIC1, TMU2, RTC, SCI1, SCIF, REF,
+        PCIC1,
 };
 
 static struct intc_vect vectors[] __initdata = {
         INTC_VECT(HUDI, 0x600), INTC_VECT(GPIOI, 0x620),
         INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
-        INTC_VECT(TMU2_TUNI, 0x440), INTC_VECT(TMU2_TICPI, 0x460),
-        INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0),
-        INTC_VECT(RTC_CUI, 0x4c0),
-        INTC_VECT(SCI1_ERI, 0x4e0), INTC_VECT(SCI1_RXI, 0x500),
-        INTC_VECT(SCI1_TXI, 0x520), INTC_VECT(SCI1_TEI, 0x540),
-        INTC_VECT(SCIF_ERI, 0x700), INTC_VECT(SCIF_RXI, 0x720),
-        INTC_VECT(SCIF_BRI, 0x740), INTC_VECT(SCIF_TXI, 0x760),
+        INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460),
+        INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
+        INTC_VECT(RTC, 0x4c0),
+        INTC_VECT(SCI1, 0x4e0), INTC_VECT(SCI1, 0x500),
+        INTC_VECT(SCI1, 0x520), INTC_VECT(SCI1, 0x540),
+        INTC_VECT(SCIF, 0x700), INTC_VECT(SCIF, 0x720),
+        INTC_VECT(SCIF, 0x740), INTC_VECT(SCIF, 0x760),
         INTC_VECT(WDT, 0x560),
-        INTC_VECT(REF_RCMI, 0x580), INTC_VECT(REF_ROVI, 0x5a0),
-};
-
-static struct intc_group groups[] __initdata = {
-        INTC_GROUP(TMU2, TMU2_TUNI, TMU2_TICPI),
-        INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),
-        INTC_GROUP(SCI1, SCI1_ERI, SCI1_RXI, SCI1_TXI, SCI1_TEI),
-        INTC_GROUP(SCIF, SCIF_ERI, SCIF_RXI, SCIF_BRI, SCIF_TXI),
-        INTC_GROUP(REF, REF_RCMI, REF_ROVI),
+        INTC_VECT(REF, 0x580), INTC_VECT(REF, 0x5a0),
 };
 
 static struct intc_prio_reg prio_registers[] __initdata = {
@@ -136,7 +110,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
                                                  PCIC1, PCIC0_PCISERR } },
 };
 
-static DECLARE_INTC_DESC(intc_desc, "sh7750", vectors, groups,
+static DECLARE_INTC_DESC(intc_desc, "sh7750", vectors, NULL,
                          NULL, prio_registers, NULL);
 
 /* SH7750, SH7750S, SH7751 and SH7091 all have 4-channel DMA controllers */
@@ -145,39 +119,28 @@ static DECLARE_INTC_DESC(intc_desc, "sh7750", vectors, groups,
         defined(CONFIG_CPU_SUBTYPE_SH7751) || \
         defined(CONFIG_CPU_SUBTYPE_SH7091)
 static struct intc_vect vectors_dma4[] __initdata = {
-        INTC_VECT(DMAC_DMTE0, 0x640), INTC_VECT(DMAC_DMTE1, 0x660),
-        INTC_VECT(DMAC_DMTE2, 0x680), INTC_VECT(DMAC_DMTE3, 0x6a0),
-        INTC_VECT(DMAC_DMAE, 0x6c0),
-};
-
-static struct intc_group groups_dma4[] __initdata = {
-        INTC_GROUP(DMAC, DMAC_DMTE0, DMAC_DMTE1, DMAC_DMTE2,
-                   DMAC_DMTE3, DMAC_DMAE),
+        INTC_VECT(DMAC, 0x640), INTC_VECT(DMAC, 0x660),
+        INTC_VECT(DMAC, 0x680), INTC_VECT(DMAC, 0x6a0),
+        INTC_VECT(DMAC, 0x6c0),
 };
 
 static DECLARE_INTC_DESC(intc_desc_dma4, "sh7750_dma4",
-                         vectors_dma4, groups_dma4,
+                         vectors_dma4, NULL,
                          NULL, prio_registers, NULL);
 #endif
 
 /* SH7750R and SH7751R both have 8-channel DMA controllers */
 #if defined(CONFIG_CPU_SUBTYPE_SH7750R) || defined(CONFIG_CPU_SUBTYPE_SH7751R)
 static struct intc_vect vectors_dma8[] __initdata = {
-        INTC_VECT(DMAC_DMTE0, 0x640), INTC_VECT(DMAC_DMTE1, 0x660),
-        INTC_VECT(DMAC_DMTE2, 0x680), INTC_VECT(DMAC_DMTE3, 0x6a0),
-        INTC_VECT(DMAC_DMTE4, 0x780), INTC_VECT(DMAC_DMTE5, 0x7a0),
-        INTC_VECT(DMAC_DMTE6, 0x7c0), INTC_VECT(DMAC_DMTE7, 0x7e0),
-        INTC_VECT(DMAC_DMAE, 0x6c0),
-};
-
-static struct intc_group groups_dma8[] __initdata = {
-        INTC_GROUP(DMAC, DMAC_DMTE0, DMAC_DMTE1, DMAC_DMTE2,
-                   DMAC_DMTE3, DMAC_DMTE4, DMAC_DMTE5,
-                   DMAC_DMTE6, DMAC_DMTE7, DMAC_DMAE),
+        INTC_VECT(DMAC, 0x640), INTC_VECT(DMAC, 0x660),
+        INTC_VECT(DMAC, 0x680), INTC_VECT(DMAC, 0x6a0),
+        INTC_VECT(DMAC, 0x780), INTC_VECT(DMAC, 0x7a0),
+        INTC_VECT(DMAC, 0x7c0), INTC_VECT(DMAC, 0x7e0),
+        INTC_VECT(DMAC, 0x6c0),
 };
 
 static DECLARE_INTC_DESC(intc_desc_dma8, "sh7750_dma8",
-                         vectors_dma8, groups_dma8,
+                         vectors_dma8, NULL,
                          NULL, prio_registers, NULL);
 #endif
 
diff --git a/arch/sh/kernel/cpu/sh4a/Makefile b/arch/sh/kernel/cpu/sh4a/Makefile
index 8e344ec5847e..1a92361feeb9 100644
--- a/arch/sh/kernel/cpu/sh4a/Makefile
+++ b/arch/sh/kernel/cpu/sh4a/Makefile
@@ -7,6 +7,7 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7763)	+= setup-sh7763.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7770)        += setup-sh7770.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7780)        += setup-sh7780.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7785)        += setup-sh7785.o
+obj-$(CONFIG_CPU_SUBTYPE_SH7786)        += setup-sh7786.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7343)        += setup-sh7343.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7722)        += setup-sh7722.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7723)        += setup-sh7723.o
@@ -21,6 +22,7 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7763)	:= clock-sh7763.o
 clock-$(CONFIG_CPU_SUBTYPE_SH7770)      := clock-sh7770.o
 clock-$(CONFIG_CPU_SUBTYPE_SH7780)      := clock-sh7780.o
 clock-$(CONFIG_CPU_SUBTYPE_SH7785)      := clock-sh7785.o
+clock-$(CONFIG_CPU_SUBTYPE_SH7786)      := clock-sh7786.o
 clock-$(CONFIG_CPU_SUBTYPE_SH7343)      := clock-sh7722.o
 clock-$(CONFIG_CPU_SUBTYPE_SH7722)      := clock-sh7722.o
 clock-$(CONFIG_CPU_SUBTYPE_SH7723)      := clock-sh7722.o
@@ -31,6 +33,7 @@ clock-$(CONFIG_CPU_SUBTYPE_SHX3)	:= clock-shx3.o
 pinmux-$(CONFIG_CPU_SUBTYPE_SH7722)     := pinmux-sh7722.o
 pinmux-$(CONFIG_CPU_SUBTYPE_SH7723)     := pinmux-sh7723.o
 pinmux-$(CONFIG_CPU_SUBTYPE_SH7785)     := pinmux-sh7785.o
+pinmux-$(CONFIG_CPU_SUBTYPE_SH7786)     := pinmux-sh7786.o
 
 obj-y                   += $(clock-y)
 obj-$(CONFIG_SMP)       += $(smp-y)
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
new file mode 100644
index 000000000000..f84a9c134471
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
@@ -0,0 +1,148 @@
+/*
+ * arch/sh/kernel/cpu/sh4a/clock-sh7786.c
+ *
+ * SH7786 support for the clock framework
+ *
+ * Copyright (C) 2008, 2009  Renesas Solutions Corp.
+ * Kuninori Morimoto <morimoto.kuninori@renesas.com>
+ *
+ * Based on SH7785
+ *  Copyright (C) 2007  Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <asm/clock.h>
+#include <asm/freq.h>
+#include <asm/io.h>
+
+static int ifc_divisors[] = { 1, 2, 4, 1 };
+static int sfc_divisors[] = { 1, 1, 4, 1 };
+static int bfc_divisors[] = { 1, 1, 1, 1, 1, 12, 16, 1,
+                             24, 32, 1, 1, 1, 1, 1, 1 };
+static int mfc_divisors[] = { 1, 1, 4, 1 };
+static int pfc_divisors[] = { 1, 1, 1, 1, 1, 1, 16, 1,
+                              24, 32, 1, 48, 1, 1, 1, 1 };
+
+static void master_clk_init(struct clk *clk)
+{
+        clk->rate *= pfc_divisors[ctrl_inl(FRQMR1) & 0x000f];
+}
+
+static struct clk_ops sh7786_master_clk_ops = {
+        .init           = master_clk_init,
+};
+
+static void module_clk_recalc(struct clk *clk)
+{
+        int idx = (ctrl_inl(FRQMR1) & 0x000f);
+        clk->rate = clk->parent->rate / pfc_divisors[idx];
+}
+
+static struct clk_ops sh7786_module_clk_ops = {
+        .recalc         = module_clk_recalc,
+};
+
+static void bus_clk_recalc(struct clk *clk)
+{
+        int idx = ((ctrl_inl(FRQMR1) >> 16) & 0x000f);
+        clk->rate = clk->parent->rate / bfc_divisors[idx];
+}
+
+static struct clk_ops sh7786_bus_clk_ops = {
+        .recalc         = bus_clk_recalc,
+};
+
+static void cpu_clk_recalc(struct clk *clk)
+{
+        int idx = ((ctrl_inl(FRQMR1) >> 28) & 0x0003);
+        clk->rate = clk->parent->rate / ifc_divisors[idx];
+}
+
+static struct clk_ops sh7786_cpu_clk_ops = {
+        .recalc         = cpu_clk_recalc,
+};
+
+static struct clk_ops *sh7786_clk_ops[] = {
+        &sh7786_master_clk_ops,
+        &sh7786_module_clk_ops,
+        &sh7786_bus_clk_ops,
+        &sh7786_cpu_clk_ops,
+};
+
+void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
+{
+        if (idx < ARRAY_SIZE(sh7786_clk_ops))
+                *ops = sh7786_clk_ops[idx];
+}
+
+static void shyway_clk_recalc(struct clk *clk)
+{
+        int idx = ((ctrl_inl(FRQMR1) >> 20) & 0x0003);
+        clk->rate = clk->parent->rate / sfc_divisors[idx];
+}
+
+static struct clk_ops sh7786_shyway_clk_ops = {
+        .recalc         = shyway_clk_recalc,
+};
+
+static struct clk sh7786_shyway_clk = {
+        .name           = "shyway_clk",
+        .flags          = CLK_ALWAYS_ENABLED,
+        .ops            = &sh7786_shyway_clk_ops,
+};
+
+static void ddr_clk_recalc(struct clk *clk)
+{
+        int idx = ((ctrl_inl(FRQMR1) >> 12) & 0x0003);
+        clk->rate = clk->parent->rate / mfc_divisors[idx];
+}
+
+static struct clk_ops sh7786_ddr_clk_ops = {
+        .recalc         = ddr_clk_recalc,
+};
+
+static struct clk sh7786_ddr_clk = {
+        .name           = "ddr_clk",
+        .flags          = CLK_ALWAYS_ENABLED,
+        .ops            = &sh7786_ddr_clk_ops,
+};
+
+/*
+ * Additional SH7786-specific on-chip clocks that aren't already part of the
+ * clock framework
+ */
+static struct clk *sh7786_onchip_clocks[] = {
+        &sh7786_shyway_clk,
+        &sh7786_ddr_clk,
+};
+
+static int __init sh7786_clk_init(void)
+{
+        struct clk *clk = clk_get(NULL, "master_clk");
+        int i;
+
+        for (i = 0; i < ARRAY_SIZE(sh7786_onchip_clocks); i++) {
+                struct clk *clkp = sh7786_onchip_clocks[i];
+
+                clkp->parent = clk;
+                clk_register(clkp);
+                clk_enable(clkp);
+        }
+
+        /*
+         * Now that we have the rest of the clocks registered, we need to
+         * force the parent clock to propagate so that these clocks will
+         * automatically figure out their rate. We cheat by handing the
+         * parent clock its current rate and forcing child propagation.
+         */
+        clk_set_rate(clk, clk_get_rate(clk));
+
+        clk_put(clk);
+
+        return 0;
+}
+arch_initcall(sh7786_clk_init);
diff --git a/arch/sh/kernel/cpu/sh4a/pinmux-sh7786.c b/arch/sh/kernel/cpu/sh4a/pinmux-sh7786.c
new file mode 100644
index 000000000000..373b3447bfdf
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/pinmux-sh7786.c
@@ -0,0 +1,950 @@
+/*
+ * SH7786 Pinmux
+ *
+ * Copyright (C) 2008, 2009  Renesas Solutions Corp.
+ * Kuninori Morimoto <morimoto.kuninori@renesas.com>
+ *
+ *  Based on SH7785 pinmux
+ *
+ *  Copyright (C) 2008  Magnus Damm
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/gpio.h>
+#include <cpu/sh7786.h>
+
+enum {
+        PINMUX_RESERVED = 0,
+
+        PINMUX_DATA_BEGIN,
+        PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
+        PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA,
+        PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
+        PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA,
+        PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
+        PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA,
+        PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
+        PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA,
+        PE7_DATA, PE6_DATA,
+        PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
+        PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA,
+        PG7_DATA, PG6_DATA, PG5_DATA,
+        PH7_DATA, PH6_DATA, PH5_DATA, PH4_DATA,
+        PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA,
+        PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,
+        PJ3_DATA, PJ2_DATA, PJ1_DATA,
+        PINMUX_DATA_END,
+
+        PINMUX_INPUT_BEGIN,
+        PA7_IN, PA6_IN, PA5_IN, PA4_IN,
+        PA3_IN, PA2_IN, PA1_IN, PA0_IN,
+        PB7_IN, PB6_IN, PB5_IN, PB4_IN,
+        PB3_IN, PB2_IN, PB1_IN, PB0_IN,
+        PC7_IN, PC6_IN, PC5_IN, PC4_IN,
+        PC3_IN, PC2_IN, PC1_IN, PC0_IN,
+        PD7_IN, PD6_IN, PD5_IN, PD4_IN,
+        PD3_IN, PD2_IN, PD1_IN, PD0_IN,
+        PE7_IN, PE6_IN,
+        PF7_IN, PF6_IN, PF5_IN, PF4_IN,
+        PF3_IN, PF2_IN, PF1_IN, PF0_IN,
+        PG7_IN, PG6_IN, PG5_IN,
+        PH7_IN, PH6_IN, PH5_IN, PH4_IN,
+        PH3_IN, PH2_IN, PH1_IN, PH0_IN,
+        PJ7_IN, PJ6_IN, PJ5_IN, PJ4_IN,
+        PJ3_IN, PJ2_IN, PJ1_IN,
+        PINMUX_INPUT_END,
+
+        PINMUX_INPUT_PULLUP_BEGIN,
+        PA7_IN_PU, PA6_IN_PU, PA5_IN_PU, PA4_IN_PU,
+        PA3_IN_PU, PA2_IN_PU, PA1_IN_PU, PA0_IN_PU,
+        PB7_IN_PU, PB6_IN_PU, PB5_IN_PU, PB4_IN_PU,
+        PB3_IN_PU, PB2_IN_PU, PB1_IN_PU, PB0_IN_PU,
+        PC7_IN_PU, PC6_IN_PU, PC5_IN_PU, PC4_IN_PU,
+        PC3_IN_PU, PC2_IN_PU, PC1_IN_PU, PC0_IN_PU,
+        PD7_IN_PU, PD6_IN_PU, PD5_IN_PU, PD4_IN_PU,
+        PD3_IN_PU, PD2_IN_PU, PD1_IN_PU, PD0_IN_PU,
+        PE7_IN_PU, PE6_IN_PU,
+        PF7_IN_PU, PF6_IN_PU, PF5_IN_PU, PF4_IN_PU,
+        PF3_IN_PU, PF2_IN_PU, PF1_IN_PU, PF0_IN_PU,
+        PG7_IN_PU, PG6_IN_PU, PG5_IN_PU,
+        PH7_IN_PU, PH6_IN_PU, PH5_IN_PU, PH4_IN_PU,
+        PH3_IN_PU, PH2_IN_PU, PH1_IN_PU, PH0_IN_PU,
+        PJ7_IN_PU, PJ6_IN_PU, PJ5_IN_PU, PJ4_IN_PU,
+        PJ3_IN_PU, PJ2_IN_PU, PJ1_IN_PU,
+        PINMUX_INPUT_PULLUP_END,
+
+        PINMUX_OUTPUT_BEGIN,
+        PA7_OUT, PA6_OUT, PA5_OUT, PA4_OUT,
+        PA3_OUT, PA2_OUT, PA1_OUT, PA0_OUT,
+        PB7_OUT, PB6_OUT, PB5_OUT, PB4_OUT,
+        PB3_OUT, PB2_OUT, PB1_OUT, PB0_OUT,
+        PC7_OUT, PC6_OUT, PC5_OUT, PC4_OUT,
+        PC3_OUT, PC2_OUT, PC1_OUT, PC0_OUT,
+        PD7_OUT, PD6_OUT, PD5_OUT, PD4_OUT,
+        PD3_OUT, PD2_OUT, PD1_OUT, PD0_OUT,
+        PE7_OUT, PE6_OUT,
+        PF7_OUT, PF6_OUT, PF5_OUT, PF4_OUT,
+        PF3_OUT, PF2_OUT, PF1_OUT, PF0_OUT,
+        PG7_OUT, PG6_OUT, PG5_OUT,
+        PH7_OUT, PH6_OUT, PH5_OUT, PH4_OUT,
+        PH3_OUT, PH2_OUT, PH1_OUT, PH0_OUT,
+        PJ7_OUT, PJ6_OUT, PJ5_OUT, PJ4_OUT,
+        PJ3_OUT, PJ2_OUT, PJ1_OUT,
+        PINMUX_OUTPUT_END,
+
+        PINMUX_FUNCTION_BEGIN,
+        PA7_FN, PA6_FN, PA5_FN, PA4_FN,
+        PA3_FN, PA2_FN, PA1_FN, PA0_FN,
+        PB7_FN, PB6_FN, PB5_FN, PB4_FN,
+        PB3_FN, PB2_FN, PB1_FN, PB0_FN,
+        PC7_FN, PC6_FN, PC5_FN, PC4_FN,
+        PC3_FN, PC2_FN, PC1_FN, PC0_FN,
+        PD7_FN, PD6_FN, PD5_FN, PD4_FN,
+        PD3_FN, PD2_FN, PD1_FN, PD0_FN,
+        PE7_FN, PE6_FN,
+        PF7_FN, PF6_FN, PF5_FN, PF4_FN,
+        PF3_FN, PF2_FN, PF1_FN, PF0_FN,
+        PG7_FN, PG6_FN, PG5_FN,
+        PH7_FN, PH6_FN, PH5_FN, PH4_FN,
+        PH3_FN, PH2_FN, PH1_FN, PH0_FN,
+        PJ7_FN, PJ6_FN, PJ5_FN, PJ4_FN,
+        PJ3_FN, PJ2_FN, PJ1_FN,
+        P1MSEL14_0, P1MSEL14_1,
+        P1MSEL13_0, P1MSEL13_1,
+        P1MSEL12_0, P1MSEL12_1,
+        P1MSEL11_0, P1MSEL11_1,
+        P1MSEL10_0, P1MSEL10_1,
+        P1MSEL9_0, P1MSEL9_1,
+        P1MSEL8_0, P1MSEL8_1,
+        P1MSEL7_0, P1MSEL7_1,
+        P1MSEL6_0, P1MSEL6_1,
+        P1MSEL5_0, P1MSEL5_1,
+        P1MSEL4_0, P1MSEL4_1,
+        P1MSEL3_0, P1MSEL3_1,
+        P1MSEL2_0, P1MSEL2_1,
+        P1MSEL1_0, P1MSEL1_1,
+        P1MSEL0_0, P1MSEL0_1,
+
+        P2MSEL15_0, P2MSEL15_1,
+        P2MSEL14_0, P2MSEL14_1,
+        P2MSEL13_0, P2MSEL13_1,
+        P2MSEL12_0, P2MSEL12_1,
+        P2MSEL11_0, P2MSEL11_1,
+        P2MSEL10_0, P2MSEL10_1,
+        P2MSEL9_0, P2MSEL9_1,
+        P2MSEL8_0, P2MSEL8_1,
+        P2MSEL7_0, P2MSEL7_1,
+        P2MSEL6_0, P2MSEL6_1,
+        P2MSEL5_0, P2MSEL5_1,
+        P2MSEL4_0, P2MSEL4_1,
+        P2MSEL3_0, P2MSEL3_1,
+        P2MSEL2_0, P2MSEL2_1,
+        P2MSEL1_0, P2MSEL1_1,
+        P2MSEL0_0, P2MSEL0_1,
+        PINMUX_FUNCTION_END,
+
+        PINMUX_MARK_BEGIN,
+        CDE_MARK,
+        ETH_MAGIC_MARK,
+        DISP_MARK,
+        ETH_LINK_MARK,
+        DR5_MARK,
+        ETH_TX_ER_MARK,
+        DR4_MARK,
+        ETH_TX_EN_MARK,
+        DR3_MARK,
+        ETH_TXD3_MARK,
+        DR2_MARK,
+        ETH_TXD2_MARK,
+        DR1_MARK,
+        ETH_TXD1_MARK,
+        DR0_MARK,
+        ETH_TXD0_MARK,
+
+        VSYNC_MARK,
+        HSPI_CLK_MARK,
+        ODDF_MARK,
+        HSPI_CS_MARK,
+        DG5_MARK,
+        ETH_MDIO_MARK,
+        DG4_MARK,
+        ETH_RX_CLK_MARK,
+        DG3_MARK,
+        ETH_MDC_MARK,
+        DG2_MARK,
+        ETH_COL_MARK,
+        DG1_MARK,
+        ETH_TX_CLK_MARK,
+        DG0_MARK,
+        ETH_CRS_MARK,
+
+        DCLKIN_MARK,
+        HSPI_RX_MARK,
+        HSYNC_MARK,
+        HSPI_TX_MARK,
+        DB5_MARK,
+        ETH_RXD3_MARK,
+        DB4_MARK,
+        ETH_RXD2_MARK,
+        DB3_MARK,
+        ETH_RXD1_MARK,
+        DB2_MARK,
+        ETH_RXD0_MARK,
+        DB1_MARK,
+        ETH_RX_DV_MARK,
+        DB0_MARK,
+        ETH_RX_ER_MARK,
+
+        DCLKOUT_MARK,
+        SCIF1_SLK_MARK,
+        SCIF1_RXD_MARK,
+        SCIF1_TXD_MARK,
+        DACK1_MARK,
+        BACK_MARK,
+        FALE_MARK,
+        DACK0_MARK,
+        FCLE_MARK,
+        DREQ1_MARK,
+        BREQ_MARK,
+        USB_OVC1_MARK,
+        DREQ0_MARK,
+        USB_OVC0_MARK,
+
+        USB_PENC1_MARK,
+        USB_PENC0_MARK,
+
+        HAC1_SDOUT_MARK,
+        SSI1_SDATA_MARK,
+        SDIF1CMD_MARK,
+        HAC1_SDIN_MARK,
+        SSI1_SCK_MARK,
+        SDIF1CD_MARK,
+        HAC1_SYNC_MARK,
+        SSI1_WS_MARK,
+        SDIF1WP_MARK,
+        HAC1_BITCLK_MARK,
+        SSI1_CLK_MARK,
+        SDIF1CLK_MARK,
+        HAC0_SDOUT_MARK,
+        SSI0_SDATA_MARK,
+        SDIF1D3_MARK,
+        HAC0_SDIN_MARK,
+        SSI0_SCK_MARK,
+        SDIF1D2_MARK,
+        HAC0_SYNC_MARK,
+        SSI0_WS_MARK,
+        SDIF1D1_MARK,
+        HAC0_BITCLK_MARK,
+        SSI0_CLK_MARK,
+        SDIF1D0_MARK,
+
+        SCIF3_SCK_MARK,
+        SSI2_SDATA_MARK,
+        SCIF3_RXD_MARK,
+        TCLK_MARK,
+        SSI2_SCK_MARK,
+        SCIF3_TXD_MARK,
+        HAC_RES_MARK,
+        SSI2_WS_MARK,
+
+        DACK3_MARK,
+        SDIF0CMD_MARK,
+        DACK2_MARK,
+        SDIF0CD_MARK,
+        DREQ3_MARK,
+        SDIF0WP_MARK,
+        SCIF0_CTS_MARK,
+        DREQ2_MARK,
+        SDIF0CLK_MARK,
+        SCIF0_RTS_MARK,
+        IRL7_MARK,
+        SDIF0D3_MARK,
+        SCIF0_SCK_MARK,
+        IRL6_MARK,
+        SDIF0D2_MARK,
+        SCIF0_RXD_MARK,
+        IRL5_MARK,
+        SDIF0D1_MARK,
+        SCIF0_TXD_MARK,
+        IRL4_MARK,
+        SDIF0D0_MARK,
+
+        SCIF5_SCK_MARK,
+        FRB_MARK,
+        SCIF5_RXD_MARK,
+        IOIS16_MARK,
+        SCIF5_TXD_MARK,
+        CE2B_MARK,
+        DRAK3_MARK,
+        CE2A_MARK,
+        SCIF4_SCK_MARK,
+        DRAK2_MARK,
+        SSI3_WS_MARK,
+        SCIF4_RXD_MARK,
+        DRAK1_MARK,
+        SSI3_SDATA_MARK,
+        FSTATUS_MARK,
+        SCIF4_TXD_MARK,
+        DRAK0_MARK,
+        SSI3_SCK_MARK,
+        FSE_MARK,
+        PINMUX_MARK_END,
+};
+
+static pinmux_enum_t pinmux_data[] = {
+
+        /* PA GPIO */
+        PINMUX_DATA(PA7_DATA, PA7_IN, PA7_OUT, PA7_IN_PU),
+        PINMUX_DATA(PA6_DATA, PA6_IN, PA6_OUT, PA6_IN_PU),
+        PINMUX_DATA(PA5_DATA, PA5_IN, PA5_OUT, PA5_IN_PU),
+        PINMUX_DATA(PA4_DATA, PA4_IN, PA4_OUT, PA4_IN_PU),
+        PINMUX_DATA(PA3_DATA, PA3_IN, PA3_OUT, PA3_IN_PU),
+        PINMUX_DATA(PA2_DATA, PA2_IN, PA2_OUT, PA2_IN_PU),
+        PINMUX_DATA(PA1_DATA, PA1_IN, PA1_OUT, PA1_IN_PU),
+        PINMUX_DATA(PA0_DATA, PA0_IN, PA0_OUT, PA0_IN_PU),
+
+        /* PB GPIO */
+        PINMUX_DATA(PB7_DATA, PB7_IN, PB7_OUT, PB7_IN_PU),
+        PINMUX_DATA(PB6_DATA, PB6_IN, PB6_OUT, PB6_IN_PU),
+        PINMUX_DATA(PB5_DATA, PB5_IN, PB5_OUT, PB5_IN_PU),
+        PINMUX_DATA(PB4_DATA, PB4_IN, PB4_OUT, PB4_IN_PU),
+        PINMUX_DATA(PB3_DATA, PB3_IN, PB3_OUT, PB3_IN_PU),
+        PINMUX_DATA(PB2_DATA, PB2_IN, PB2_OUT, PB2_IN_PU),
+        PINMUX_DATA(PB1_DATA, PB1_IN, PB1_OUT, PB1_IN_PU),
+        PINMUX_DATA(PB0_DATA, PB0_IN, PB0_OUT, PB0_IN_PU),
+
+        /* PC GPIO */
+        PINMUX_DATA(PC7_DATA, PC7_IN, PC7_OUT, PC7_IN_PU),
+        PINMUX_DATA(PC6_DATA, PC6_IN, PC6_OUT, PC6_IN_PU),
+        PINMUX_DATA(PC5_DATA, PC5_IN, PC5_OUT, PC5_IN_PU),
+        PINMUX_DATA(PC4_DATA, PC4_IN, PC4_OUT, PC4_IN_PU),
+        PINMUX_DATA(PC3_DATA, PC3_IN, PC3_OUT, PC3_IN_PU),
+        PINMUX_DATA(PC2_DATA, PC2_IN, PC2_OUT, PC2_IN_PU),
+        PINMUX_DATA(PC1_DATA, PC1_IN, PC1_OUT, PC1_IN_PU),
+        PINMUX_DATA(PC0_DATA, PC0_IN, PC0_OUT, PC0_IN_PU),
+
+        /* PD GPIO */
+        PINMUX_DATA(PD7_DATA, PD7_IN, PD7_OUT, PD7_IN_PU),
+        PINMUX_DATA(PD6_DATA, PD6_IN, PD6_OUT, PD6_IN_PU),
+        PINMUX_DATA(PD5_DATA, PD5_IN, PD5_OUT, PD5_IN_PU),
+        PINMUX_DATA(PD4_DATA, PD4_IN, PD4_OUT, PD4_IN_PU),
+        PINMUX_DATA(PD3_DATA, PD3_IN, PD3_OUT, PD3_IN_PU),
+        PINMUX_DATA(PD2_DATA, PD2_IN, PD2_OUT, PD2_IN_PU),
+        PINMUX_DATA(PD1_DATA, PD1_IN, PD1_OUT, PD1_IN_PU),
+        PINMUX_DATA(PD0_DATA, PD0_IN, PD0_OUT, PD0_IN_PU),
+
+        /* PE GPIO */
+        PINMUX_DATA(PE7_DATA, PE7_IN, PE7_OUT, PE7_IN_PU),
+        PINMUX_DATA(PE6_DATA, PE6_IN, PE6_OUT, PE6_IN_PU),
+
+        /* PF GPIO */
+        PINMUX_DATA(PF7_DATA, PF7_IN, PF7_OUT, PF7_IN_PU),
+        PINMUX_DATA(PF6_DATA, PF6_IN, PF6_OUT, PF6_IN_PU),
+        PINMUX_DATA(PF5_DATA, PF5_IN, PF5_OUT, PF5_IN_PU),
+        PINMUX_DATA(PF4_DATA, PF4_IN, PF4_OUT, PF4_IN_PU),
+        PINMUX_DATA(PF3_DATA, PF3_IN, PF3_OUT, PF3_IN_PU),
+        PINMUX_DATA(PF2_DATA, PF2_IN, PF2_OUT, PF2_IN_PU),
+        PINMUX_DATA(PF1_DATA, PF1_IN, PF1_OUT, PF1_IN_PU),
+        PINMUX_DATA(PF0_DATA, PF0_IN, PF0_OUT, PF0_IN_PU),
+
+        /* PG GPIO */
+        PINMUX_DATA(PG7_DATA, PG7_IN, PG7_OUT, PG7_IN_PU),
+        PINMUX_DATA(PG6_DATA, PG6_IN, PG6_OUT, PG6_IN_PU),
+        PINMUX_DATA(PG5_DATA, PG5_IN, PG5_OUT, PG5_IN_PU),
+
+        /* PH GPIO */
+        PINMUX_DATA(PH7_DATA, PH7_IN, PH7_OUT, PH7_IN_PU),
+        PINMUX_DATA(PH6_DATA, PH6_IN, PH6_OUT, PH6_IN_PU),
+        PINMUX_DATA(PH5_DATA, PH5_IN, PH5_OUT, PH5_IN_PU),
+        PINMUX_DATA(PH4_DATA, PH4_IN, PH4_OUT, PH4_IN_PU),
+        PINMUX_DATA(PH3_DATA, PH3_IN, PH3_OUT, PH3_IN_PU),
+        PINMUX_DATA(PH2_DATA, PH2_IN, PH2_OUT, PH2_IN_PU),
+        PINMUX_DATA(PH1_DATA, PH1_IN, PH1_OUT, PH1_IN_PU),
+        PINMUX_DATA(PH0_DATA, PH0_IN, PH0_OUT, PH0_IN_PU),
+
+        /* PJ GPIO */
+        PINMUX_DATA(PJ7_DATA, PJ7_IN, PJ7_OUT, PJ7_IN_PU),
+        PINMUX_DATA(PJ6_DATA, PJ6_IN, PJ6_OUT, PJ6_IN_PU),
+        PINMUX_DATA(PJ5_DATA, PJ5_IN, PJ5_OUT, PJ5_IN_PU),
+        PINMUX_DATA(PJ4_DATA, PJ4_IN, PJ4_OUT, PJ4_IN_PU),
+        PINMUX_DATA(PJ3_DATA, PJ3_IN, PJ3_OUT, PJ3_IN_PU),
+        PINMUX_DATA(PJ2_DATA, PJ2_IN, PJ2_OUT, PJ2_IN_PU),
+        PINMUX_DATA(PJ1_DATA, PJ1_IN, PJ1_OUT, PJ1_IN_PU),
+
+        /* PA FN */
+        PINMUX_MARK_BEGIN,
+        PINMUX_DATA(CDE_MARK,           P1MSEL2_0, PA7_FN),
+        PINMUX_DATA(DISP_MARK,          P1MSEL2_0, PA6_FN),
+        PINMUX_DATA(DR5_MARK,           P1MSEL2_0, PA5_FN),
+        PINMUX_DATA(DR4_MARK,           P1MSEL2_0, PA4_FN),
+        PINMUX_DATA(DR3_MARK,           P1MSEL2_0, PA3_FN),
+        PINMUX_DATA(DR2_MARK,           P1MSEL2_0, PA2_FN),
+        PINMUX_DATA(DR1_MARK,           P1MSEL2_0, PA1_FN),
+        PINMUX_DATA(DR0_MARK,           P1MSEL2_0, PA0_FN),
+        PINMUX_DATA(ETH_MAGIC_MARK,     P1MSEL2_1, PA7_FN),
+        PINMUX_DATA(ETH_LINK_MARK,      P1MSEL2_1, PA6_FN),
+        PINMUX_DATA(ETH_TX_ER_MARK,     P1MSEL2_1, PA5_FN),
+        PINMUX_DATA(ETH_TX_EN_MARK,     P1MSEL2_1, PA4_FN),
+        PINMUX_DATA(ETH_TXD3_MARK,      P1MSEL2_1, PA3_FN),
+        PINMUX_DATA(ETH_TXD2_MARK,      P1MSEL2_1, PA2_FN),
+        PINMUX_DATA(ETH_TXD1_MARK,      P1MSEL2_1, PA1_FN),
+        PINMUX_DATA(ETH_TXD0_MARK,      P1MSEL2_1, PA0_FN),
+
+        /* PB FN */
+        PINMUX_DATA(VSYNC_MARK,         P1MSEL3_0, PB7_FN),
+        PINMUX_DATA(ODDF_MARK,          P1MSEL3_0, PB6_FN),
+        PINMUX_DATA(DG5_MARK,           P1MSEL2_0, PB5_FN),
+        PINMUX_DATA(DG4_MARK,           P1MSEL2_0, PB4_FN),
+        PINMUX_DATA(DG3_MARK,           P1MSEL2_0, PB3_FN),
+        PINMUX_DATA(DG2_MARK,           P1MSEL2_0, PB2_FN),
+        PINMUX_DATA(DG1_MARK,           P1MSEL2_0, PB1_FN),
+        PINMUX_DATA(DG0_MARK,           P1MSEL2_0, PB0_FN),
+        PINMUX_DATA(HSPI_CLK_MARK,      P1MSEL3_1, PB7_FN),
+        PINMUX_DATA(HSPI_CS_MARK,       P1MSEL3_1, PB6_FN),
+        PINMUX_DATA(ETH_MDIO_MARK,      P1MSEL2_1, PB5_FN),
+        PINMUX_DATA(ETH_RX_CLK_MARK,    P1MSEL2_1, PB4_FN),
+        PINMUX_DATA(ETH_MDC_MARK,       P1MSEL2_1, PB3_FN),
+        PINMUX_DATA(ETH_COL_MARK,       P1MSEL2_1, PB2_FN),
+        PINMUX_DATA(ETH_TX_CLK_MARK,    P1MSEL2_1, PB1_FN),
+        PINMUX_DATA(ETH_CRS_MARK,       P1MSEL2_1, PB0_FN),
+
+        /* PC FN */
+        PINMUX_DATA(DCLKIN_MARK,        P1MSEL3_0, PC7_FN),
+        PINMUX_DATA(HSYNC_MARK,         P1MSEL3_0, PC6_FN),
+        PINMUX_DATA(DB5_MARK,           P1MSEL2_0, PC5_FN),
+        PINMUX_DATA(DB4_MARK,           P1MSEL2_0, PC4_FN),
+        PINMUX_DATA(DB3_MARK,           P1MSEL2_0, PC3_FN),
+        PINMUX_DATA(DB2_MARK,           P1MSEL2_0, PC2_FN),
+        PINMUX_DATA(DB1_MARK,           P1MSEL2_0, PC1_FN),
+        PINMUX_DATA(DB0_MARK,           P1MSEL2_0, PC0_FN),
+
+        PINMUX_DATA(HSPI_RX_MARK,       P1MSEL3_1, PC7_FN),
+        PINMUX_DATA(HSPI_TX_MARK,       P1MSEL3_1, PC6_FN),
+        PINMUX_DATA(ETH_RXD3_MARK,      P1MSEL2_1, PC5_FN),
+        PINMUX_DATA(ETH_RXD2_MARK,      P1MSEL2_1, PC4_FN),
+        PINMUX_DATA(ETH_RXD1_MARK,      P1MSEL2_1, PC3_FN),
+        PINMUX_DATA(ETH_RXD0_MARK,      P1MSEL2_1, PC2_FN),
+        PINMUX_DATA(ETH_RX_DV_MARK,     P1MSEL2_1, PC1_FN),
+        PINMUX_DATA(ETH_RX_ER_MARK,     P1MSEL2_1, PC0_FN),
+
+        /* PD FN */
+        PINMUX_DATA(DCLKOUT_MARK,       PD7_FN),
+        PINMUX_DATA(SCIF1_SLK_MARK,     PD6_FN),
+        PINMUX_DATA(SCIF1_RXD_MARK,     PD5_FN),
+        PINMUX_DATA(SCIF1_TXD_MARK,     PD4_FN),
+        PINMUX_DATA(DACK1_MARK,         P1MSEL13_1, P1MSEL12_0, PD3_FN),
+        PINMUX_DATA(BACK_MARK,          P1MSEL13_0, P1MSEL12_1, PD3_FN),
+        PINMUX_DATA(FALE_MARK,          P1MSEL13_0, P1MSEL12_0, PD3_FN),
+        PINMUX_DATA(DACK0_MARK,         P1MSEL14_1, PD2_FN),
+        PINMUX_DATA(FCLE_MARK,          P1MSEL14_0, PD2_FN),
+        PINMUX_DATA(DREQ1_MARK,         P1MSEL10_0, P1MSEL9_1, PD1_FN),
+        PINMUX_DATA(BREQ_MARK,          P1MSEL10_1, P1MSEL9_0, PD1_FN),
+        PINMUX_DATA(USB_OVC1_MARK,      P1MSEL10_0, P1MSEL9_0, PD1_FN),
+        PINMUX_DATA(DREQ0_MARK,         P1MSEL11_1, PD0_FN),
+        PINMUX_DATA(USB_OVC0_MARK,      P1MSEL11_0, PD0_FN),
+
+        /* PE FN */
+        PINMUX_DATA(USB_PENC1_MARK,     PE7_FN),
+        PINMUX_DATA(USB_PENC0_MARK,     PE6_FN),
+
+        /* PF FN */
+        PINMUX_DATA(HAC1_SDOUT_MARK,    P2MSEL15_0, P2MSEL14_0, PF7_FN),
+        PINMUX_DATA(HAC1_SDIN_MARK,     P2MSEL15_0, P2MSEL14_0, PF6_FN),
+        PINMUX_DATA(HAC1_SYNC_MARK,     P2MSEL15_0, P2MSEL14_0, PF5_FN),
+        PINMUX_DATA(HAC1_BITCLK_MARK,   P2MSEL15_0, P2MSEL14_0, PF4_FN),
+        PINMUX_DATA(HAC0_SDOUT_MARK,    P2MSEL13_0, P2MSEL12_0, PF3_FN),
+        PINMUX_DATA(HAC0_SDIN_MARK,     P2MSEL13_0, P2MSEL12_0, PF2_FN),
+        PINMUX_DATA(HAC0_SYNC_MARK,     P2MSEL13_0, P2MSEL12_0, PF1_FN),
+        PINMUX_DATA(HAC0_BITCLK_MARK,   P2MSEL13_0, P2MSEL12_0, PF0_FN),
+        PINMUX_DATA(SSI1_SDATA_MARK,    P2MSEL15_0, P2MSEL14_1, PF7_FN),
+        PINMUX_DATA(SSI1_SCK_MARK,      P2MSEL15_0, P2MSEL14_1, PF6_FN),
+        PINMUX_DATA(SSI1_WS_MARK,       P2MSEL15_0, P2MSEL14_1, PF5_FN),
+        PINMUX_DATA(SSI1_CLK_MARK,      P2MSEL15_0, P2MSEL14_1, PF4_FN),
+        PINMUX_DATA(SSI0_SDATA_MARK,    P2MSEL13_0, P2MSEL12_1, PF3_FN),
+        PINMUX_DATA(SSI0_SCK_MARK,      P2MSEL13_0, P2MSEL12_1, PF2_FN),
+        PINMUX_DATA(SSI0_WS_MARK,       P2MSEL13_0, P2MSEL12_1, PF1_FN),
+        PINMUX_DATA(SSI0_CLK_MARK,      P2MSEL13_0, P2MSEL12_1, PF0_FN),
+        PINMUX_DATA(SDIF1CMD_MARK,      P2MSEL15_1, P2MSEL14_0, PF7_FN),
+        PINMUX_DATA(SDIF1CD_MARK,       P2MSEL15_1, P2MSEL14_0, PF6_FN),
+        PINMUX_DATA(SDIF1WP_MARK,       P2MSEL15_1, P2MSEL14_0, PF5_FN),
+        PINMUX_DATA(SDIF1CLK_MARK,      P2MSEL15_1, P2MSEL14_0, PF4_FN),
+        PINMUX_DATA(SDIF1D3_MARK,       P2MSEL13_1, P2MSEL12_0, PF3_FN),
+        PINMUX_DATA(SDIF1D2_MARK,       P2MSEL13_1, P2MSEL12_0, PF2_FN),
+        PINMUX_DATA(SDIF1D1_MARK,       P2MSEL13_1, P2MSEL12_0, PF1_FN),
+        PINMUX_DATA(SDIF1D0_MARK,       P2MSEL13_1, P2MSEL12_0, PF0_FN),
+
+        /* PG FN */
+        PINMUX_DATA(SCIF3_SCK_MARK,     P1MSEL8_0, PG7_FN),
+        PINMUX_DATA(SSI2_SDATA_MARK,    P1MSEL8_1, PG7_FN),
+        PINMUX_DATA(SCIF3_RXD_MARK,     P1MSEL7_0, P1MSEL6_0, PG6_FN),
+        PINMUX_DATA(SSI2_SCK_MARK,      P1MSEL7_1, P1MSEL6_0, PG6_FN),
+        PINMUX_DATA(TCLK_MARK,          P1MSEL7_0, P1MSEL6_1, PG6_FN),
+        PINMUX_DATA(SCIF3_TXD_MARK,     P1MSEL5_0, P1MSEL4_0, PG5_FN),
+        PINMUX_DATA(SSI2_WS_MARK,       P1MSEL5_1, P1MSEL4_0, PG5_FN),
+        PINMUX_DATA(HAC_RES_MARK,       P1MSEL5_0, P1MSEL4_1, PG5_FN),
+
+        /* PH FN */
+        PINMUX_DATA(DACK3_MARK,         P2MSEL4_0, PH7_FN),
+        PINMUX_DATA(SDIF0CMD_MARK,      P2MSEL4_1, PH7_FN),
+        PINMUX_DATA(DACK2_MARK,         P2MSEL4_0, PH6_FN),
+        PINMUX_DATA(SDIF0CD_MARK,       P2MSEL4_1, PH6_FN),
+        PINMUX_DATA(DREQ3_MARK,         P2MSEL4_0, PH5_FN),
+        PINMUX_DATA(SDIF0WP_MARK,       P2MSEL4_1, PH5_FN),
+        PINMUX_DATA(DREQ2_MARK,         P2MSEL3_0, P2MSEL2_1, PH4_FN),
+        PINMUX_DATA(SDIF0CLK_MARK,      P2MSEL3_1, P2MSEL2_0, PH4_FN),
+        PINMUX_DATA(SCIF0_CTS_MARK,     P2MSEL3_0, P2MSEL2_0, PH4_FN),
+        PINMUX_DATA(SDIF0D3_MARK,       P2MSEL1_1, P2MSEL0_0, PH3_FN),
+        PINMUX_DATA(SCIF0_RTS_MARK,     P2MSEL1_0, P2MSEL0_0, PH3_FN),
+        PINMUX_DATA(IRL7_MARK,          P2MSEL1_0, P2MSEL0_1, PH3_FN),
+        PINMUX_DATA(SDIF0D2_MARK,       P2MSEL1_1, P2MSEL0_0, PH2_FN),
+        PINMUX_DATA(SCIF0_SCK_MARK,     P2MSEL1_0, P2MSEL0_0, PH2_FN),
+        PINMUX_DATA(IRL6_MARK,          P2MSEL1_0, P2MSEL0_1, PH2_FN),
+        PINMUX_DATA(SDIF0D1_MARK,       P2MSEL1_1, P2MSEL0_0, PH1_FN),
+        PINMUX_DATA(SCIF0_RXD_MARK,     P2MSEL1_0, P2MSEL0_0, PH1_FN),
+        PINMUX_DATA(IRL5_MARK,          P2MSEL1_0, P2MSEL0_1, PH1_FN),
+        PINMUX_DATA(SDIF0D0_MARK,       P2MSEL1_1, P2MSEL0_0, PH0_FN),
+        PINMUX_DATA(SCIF0_TXD_MARK,     P2MSEL1_0, P2MSEL0_0, PH0_FN),
+        PINMUX_DATA(IRL4_MARK,          P2MSEL1_0, P2MSEL0_1, PH0_FN),
+
+        /* PJ FN */
+        PINMUX_DATA(SCIF5_SCK_MARK,     P2MSEL11_1, PJ7_FN),
+        PINMUX_DATA(FRB_MARK,           P2MSEL11_0, PJ7_FN),
+        PINMUX_DATA(SCIF5_RXD_MARK,     P2MSEL10_0, PJ6_FN),
+        PINMUX_DATA(IOIS16_MARK,        P2MSEL10_1, PJ6_FN),
+        PINMUX_DATA(SCIF5_TXD_MARK,     P2MSEL10_0, PJ5_FN),
+        PINMUX_DATA(CE2B_MARK,          P2MSEL10_1, PJ5_FN),
+        PINMUX_DATA(DRAK3_MARK,         P2MSEL7_0, PJ4_FN),
+        PINMUX_DATA(CE2A_MARK,          P2MSEL7_1, PJ4_FN),
+        PINMUX_DATA(SCIF4_SCK_MARK,     P2MSEL9_0, P2MSEL8_0, PJ3_FN),
+        PINMUX_DATA(DRAK2_MARK,         P2MSEL9_0, P2MSEL8_1, PJ3_FN),
+        PINMUX_DATA(SSI3_WS_MARK,       P2MSEL9_1, P2MSEL8_0, PJ3_FN),
+        PINMUX_DATA(SCIF4_RXD_MARK,     P2MSEL6_1, P2MSEL5_0, PJ2_FN),
+        PINMUX_DATA(DRAK1_MARK,         P2MSEL6_0, P2MSEL5_1, PJ2_FN),
+        PINMUX_DATA(FSTATUS_MARK,       P2MSEL6_0, P2MSEL5_0, PJ2_FN),
+        PINMUX_DATA(SSI3_SDATA_MARK,    P2MSEL6_1, P2MSEL5_1, PJ2_FN),
+        PINMUX_DATA(SCIF4_TXD_MARK,     P2MSEL6_1, P2MSEL5_0, PJ1_FN),
+        PINMUX_DATA(DRAK0_MARK,         P2MSEL6_0, P2MSEL5_1, PJ1_FN),
+        PINMUX_DATA(FSE_MARK,           P2MSEL6_0, P2MSEL5_0, PJ1_FN),
+        PINMUX_DATA(SSI3_SCK_MARK,      P2MSEL6_1, P2MSEL5_1, PJ1_FN),
+};
+
+static struct pinmux_gpio pinmux_gpios[] = {
+        /* PA */
+        PINMUX_GPIO(GPIO_PA7, PA7_DATA),
+        PINMUX_GPIO(GPIO_PA6, PA6_DATA),
+        PINMUX_GPIO(GPIO_PA5, PA5_DATA),
+        PINMUX_GPIO(GPIO_PA4, PA4_DATA),
+        PINMUX_GPIO(GPIO_PA3, PA3_DATA),
+        PINMUX_GPIO(GPIO_PA2, PA2_DATA),
+        PINMUX_GPIO(GPIO_PA1, PA1_DATA),
+        PINMUX_GPIO(GPIO_PA0, PA0_DATA),
+
+        /* PB */
+        PINMUX_GPIO(GPIO_PB7, PB7_DATA),
+        PINMUX_GPIO(GPIO_PB6, PB6_DATA),
+        PINMUX_GPIO(GPIO_PB5, PB5_DATA),
+        PINMUX_GPIO(GPIO_PB4, PB4_DATA),
+        PINMUX_GPIO(GPIO_PB3, PB3_DATA),
+        PINMUX_GPIO(GPIO_PB2, PB2_DATA),
+        PINMUX_GPIO(GPIO_PB1, PB1_DATA),
+        PINMUX_GPIO(GPIO_PB0, PB0_DATA),
+
+        /* PC */
+        PINMUX_GPIO(GPIO_PC7, PC7_DATA),
+        PINMUX_GPIO(GPIO_PC6, PC6_DATA),
+        PINMUX_GPIO(GPIO_PC5, PC5_DATA),
+        PINMUX_GPIO(GPIO_PC4, PC4_DATA),
+        PINMUX_GPIO(GPIO_PC3, PC3_DATA),
+        PINMUX_GPIO(GPIO_PC2, PC2_DATA),
+        PINMUX_GPIO(GPIO_PC1, PC1_DATA),
+        PINMUX_GPIO(GPIO_PC0, PC0_DATA),
+
+        /* PD */
+        PINMUX_GPIO(GPIO_PD7, PD7_DATA),
+        PINMUX_GPIO(GPIO_PD6, PD6_DATA),
+        PINMUX_GPIO(GPIO_PD5, PD5_DATA),
+        PINMUX_GPIO(GPIO_PD4, PD4_DATA),
+        PINMUX_GPIO(GPIO_PD3, PD3_DATA),
+        PINMUX_GPIO(GPIO_PD2, PD2_DATA),
+        PINMUX_GPIO(GPIO_PD1, PD1_DATA),
+        PINMUX_GPIO(GPIO_PD0, PD0_DATA),
+
+        /* PE */
+        PINMUX_GPIO(GPIO_PE5, PE7_DATA),
+        PINMUX_GPIO(GPIO_PE4, PE6_DATA),
+
+        /* PF */
+        PINMUX_GPIO(GPIO_PF7, PF7_DATA),
+        PINMUX_GPIO(GPIO_PF6, PF6_DATA),
+        PINMUX_GPIO(GPIO_PF5, PF5_DATA),
+        PINMUX_GPIO(GPIO_PF4, PF4_DATA),
+        PINMUX_GPIO(GPIO_PF3, PF3_DATA),
+        PINMUX_GPIO(GPIO_PF2, PF2_DATA),
+        PINMUX_GPIO(GPIO_PF1, PF1_DATA),
+        PINMUX_GPIO(GPIO_PF0, PF0_DATA),
+
+        /* PG */
+        PINMUX_GPIO(GPIO_PG7, PG7_DATA),
+        PINMUX_GPIO(GPIO_PG6, PG6_DATA),
+        PINMUX_GPIO(GPIO_PG5, PG5_DATA),
+
+        /* PH */
+        PINMUX_GPIO(GPIO_PH7, PH7_DATA),
+        PINMUX_GPIO(GPIO_PH6, PH6_DATA),
+        PINMUX_GPIO(GPIO_PH5, PH5_DATA),
+        PINMUX_GPIO(GPIO_PH4, PH4_DATA),
+        PINMUX_GPIO(GPIO_PH3, PH3_DATA),
+        PINMUX_GPIO(GPIO_PH2, PH2_DATA),
+        PINMUX_GPIO(GPIO_PH1, PH1_DATA),
+        PINMUX_GPIO(GPIO_PH0, PH0_DATA),
+
+        /* PJ */
+        PINMUX_GPIO(GPIO_PJ7, PJ7_DATA),
+        PINMUX_GPIO(GPIO_PJ6, PJ6_DATA),
+        PINMUX_GPIO(GPIO_PJ5, PJ5_DATA),
+        PINMUX_GPIO(GPIO_PJ4, PJ4_DATA),
+        PINMUX_GPIO(GPIO_PJ3, PJ3_DATA),
+        PINMUX_GPIO(GPIO_PJ2, PJ2_DATA),
+        PINMUX_GPIO(GPIO_PJ1, PJ1_DATA),
+
+        /* FN */
+        PINMUX_GPIO(GPIO_FN_CDE,                CDE_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_MAGIC,          ETH_MAGIC_MARK),
+        PINMUX_GPIO(GPIO_FN_DISP,               DISP_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_LINK,           ETH_LINK_MARK),
+        PINMUX_GPIO(GPIO_FN_DR5,                DR5_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_TX_ER,          ETH_TX_ER_MARK),
+        PINMUX_GPIO(GPIO_FN_DR4,                DR4_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_TX_EN,          ETH_TX_EN_MARK),
+        PINMUX_GPIO(GPIO_FN_DR3,                DR3_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_TXD3,           ETH_TXD3_MARK),
+        PINMUX_GPIO(GPIO_FN_DR2,                DR2_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_TXD2,           ETH_TXD2_MARK),
+        PINMUX_GPIO(GPIO_FN_DR1,                DR1_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_TXD1,           ETH_TXD1_MARK),
+        PINMUX_GPIO(GPIO_FN_DR0,                DR0_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_TXD0,           ETH_TXD0_MARK),
+        PINMUX_GPIO(GPIO_FN_VSYNC,              VSYNC_MARK),
+        PINMUX_GPIO(GPIO_FN_HSPI_CLK,           HSPI_CLK_MARK),
+        PINMUX_GPIO(GPIO_FN_ODDF,               ODDF_MARK),
+        PINMUX_GPIO(GPIO_FN_HSPI_CS,            HSPI_CS_MARK),
+        PINMUX_GPIO(GPIO_FN_DG5,                DG5_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_MDIO,           ETH_MDIO_MARK),
+        PINMUX_GPIO(GPIO_FN_DG4,                DG4_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_RX_CLK,         ETH_RX_CLK_MARK),
+        PINMUX_GPIO(GPIO_FN_DG3,                DG3_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_MDC,            ETH_MDC_MARK),
+        PINMUX_GPIO(GPIO_FN_DG2,                DG2_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_COL,            ETH_COL_MARK),
+        PINMUX_GPIO(GPIO_FN_DG1,                DG1_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_TX_CLK,         ETH_TX_CLK_MARK),
+        PINMUX_GPIO(GPIO_FN_DG0,                DG0_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_CRS,            ETH_CRS_MARK),
+        PINMUX_GPIO(GPIO_FN_DCLKIN,             DCLKIN_MARK),
+        PINMUX_GPIO(GPIO_FN_HSPI_RX,            HSPI_RX_MARK),
+        PINMUX_GPIO(GPIO_FN_HSYNC,              HSYNC_MARK),
+        PINMUX_GPIO(GPIO_FN_HSPI_TX,            HSPI_TX_MARK),
+        PINMUX_GPIO(GPIO_FN_DB5,                DB5_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_RXD3,           ETH_RXD3_MARK),
+        PINMUX_GPIO(GPIO_FN_DB4,                DB4_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_RXD2,           ETH_RXD2_MARK),
+        PINMUX_GPIO(GPIO_FN_DB3,                DB3_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_RXD1,           ETH_RXD1_MARK),
+        PINMUX_GPIO(GPIO_FN_DB2,                DB2_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_RXD0,           ETH_RXD0_MARK),
+        PINMUX_GPIO(GPIO_FN_DB1,                DB1_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_RX_DV,          ETH_RX_DV_MARK),
+        PINMUX_GPIO(GPIO_FN_DB0,                DB0_MARK),
+        PINMUX_GPIO(GPIO_FN_ETH_RX_ER,          ETH_RX_ER_MARK),
+        PINMUX_GPIO(GPIO_FN_DCLKOUT,            DCLKOUT_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF1_SLK,          SCIF1_SLK_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF1_RXD,          SCIF1_RXD_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF1_TXD,          SCIF1_TXD_MARK),
+        PINMUX_GPIO(GPIO_FN_DACK1,              DACK1_MARK),
+        PINMUX_GPIO(GPIO_FN_BACK,               BACK_MARK),
+        PINMUX_GPIO(GPIO_FN_FALE,               FALE_MARK),
+        PINMUX_GPIO(GPIO_FN_DACK0,              DACK0_MARK),
+        PINMUX_GPIO(GPIO_FN_FCLE,               FCLE_MARK),
+        PINMUX_GPIO(GPIO_FN_DREQ1,              DREQ1_MARK),
+        PINMUX_GPIO(GPIO_FN_BREQ,               BREQ_MARK),
+        PINMUX_GPIO(GPIO_FN_USB_OVC1,           USB_OVC1_MARK),
+        PINMUX_GPIO(GPIO_FN_DREQ0,              DREQ0_MARK),
+        PINMUX_GPIO(GPIO_FN_USB_OVC0,           USB_OVC0_MARK),
+        PINMUX_GPIO(GPIO_FN_USB_PENC1,          USB_PENC1_MARK),
+        PINMUX_GPIO(GPIO_FN_USB_PENC0,          USB_PENC0_MARK),
+        PINMUX_GPIO(GPIO_FN_HAC1_SDOUT,         HAC1_SDOUT_MARK),
+        PINMUX_GPIO(GPIO_FN_SSI1_SDATA,         SSI1_SDATA_MARK),
+        PINMUX_GPIO(GPIO_FN_SDIF1CMD,           SDIF1CMD_MARK),
+        PINMUX_GPIO(GPIO_FN_HAC1_SDIN,          HAC1_SDIN_MARK),
+        PINMUX_GPIO(GPIO_FN_SSI1_SCK,           SSI1_SCK_MARK),
+        PINMUX_GPIO(GPIO_FN_SDIF1CD,            SDIF1CD_MARK),
+        PINMUX_GPIO(GPIO_FN_HAC1_SYNC,          HAC1_SYNC_MARK),
+        PINMUX_GPIO(GPIO_FN_SSI1_WS,            SSI1_WS_MARK),
+        PINMUX_GPIO(GPIO_FN_SDIF1WP,            SDIF1WP_MARK),
+        PINMUX_GPIO(GPIO_FN_HAC1_BITCLK,        HAC1_BITCLK_MARK),
+        PINMUX_GPIO(GPIO_FN_SSI1_CLK,           SSI1_CLK_MARK),
+        PINMUX_GPIO(GPIO_FN_SDIF1CLK,           SDIF1CLK_MARK),
+        PINMUX_GPIO(GPIO_FN_HAC0_SDOUT,         HAC0_SDOUT_MARK),
+        PINMUX_GPIO(GPIO_FN_SSI0_SDATA,         SSI0_SDATA_MARK),
+        PINMUX_GPIO(GPIO_FN_SDIF1D3,            SDIF1D3_MARK),
+        PINMUX_GPIO(GPIO_FN_HAC0_SDIN,          HAC0_SDIN_MARK),
+        PINMUX_GPIO(GPIO_FN_SSI0_SCK,           SSI0_SCK_MARK),
+        PINMUX_GPIO(GPIO_FN_SDIF1D2,            SDIF1D2_MARK),
+        PINMUX_GPIO(GPIO_FN_HAC0_SYNC,          HAC0_SYNC_MARK),
+        PINMUX_GPIO(GPIO_FN_SSI0_WS,            SSI0_WS_MARK),
+        PINMUX_GPIO(GPIO_FN_SDIF1D1,            SDIF1D1_MARK),
+        PINMUX_GPIO(GPIO_FN_HAC0_BITCLK,        HAC0_BITCLK_MARK),
+        PINMUX_GPIO(GPIO_FN_SSI0_CLK,           SSI0_CLK_MARK),
+        PINMUX_GPIO(GPIO_FN_SDIF1D0,            SDIF1D0_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF3_SCK,          SCIF3_SCK_MARK),
+        PINMUX_GPIO(GPIO_FN_SSI2_SDATA,         SSI2_SDATA_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF3_RXD,          SCIF3_RXD_MARK),
+        PINMUX_GPIO(GPIO_FN_TCLK,               TCLK_MARK),
+        PINMUX_GPIO(GPIO_FN_SSI2_SCK,           SSI2_SCK_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF3_TXD,          SCIF3_TXD_MARK),
+        PINMUX_GPIO(GPIO_FN_HAC_RES,            HAC_RES_MARK),
+        PINMUX_GPIO(GPIO_FN_SSI2_WS,            SSI2_WS_MARK),
+        PINMUX_GPIO(GPIO_FN_DACK3,              DACK3_MARK),
+        PINMUX_GPIO(GPIO_FN_SDIF0CMD,           SDIF0CMD_MARK),
+        PINMUX_GPIO(GPIO_FN_DACK2,              DACK2_MARK),
+        PINMUX_GPIO(GPIO_FN_SDIF0CD,            SDIF0CD_MARK),
+        PINMUX_GPIO(GPIO_FN_DREQ3,              DREQ3_MARK),
+        PINMUX_GPIO(GPIO_FN_SDIF0WP,            SDIF0WP_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF0_CTS,          SCIF0_CTS_MARK),
+        PINMUX_GPIO(GPIO_FN_DREQ2,              DREQ2_MARK),
+        PINMUX_GPIO(GPIO_FN_SDIF0CLK,           SDIF0CLK_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF0_RTS,          SCIF0_RTS_MARK),
+        PINMUX_GPIO(GPIO_FN_IRL7,               IRL7_MARK),
+        PINMUX_GPIO(GPIO_FN_SDIF0D3,            SDIF0D3_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF0_SCK,          SCIF0_SCK_MARK),
+        PINMUX_GPIO(GPIO_FN_IRL6,               IRL6_MARK),
+        PINMUX_GPIO(GPIO_FN_SDIF0D2,            SDIF0D2_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF0_RXD,          SCIF0_RXD_MARK),
+        PINMUX_GPIO(GPIO_FN_IRL5,               IRL5_MARK),
+        PINMUX_GPIO(GPIO_FN_SDIF0D1,            SDIF0D1_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF0_TXD,          SCIF0_TXD_MARK),
+        PINMUX_GPIO(GPIO_FN_IRL4,               IRL4_MARK),
+        PINMUX_GPIO(GPIO_FN_SDIF0D0,            SDIF0D0_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF5_SCK,          SCIF5_SCK_MARK),
+        PINMUX_GPIO(GPIO_FN_FRB,                FRB_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF5_RXD,          SCIF5_RXD_MARK),
+        PINMUX_GPIO(GPIO_FN_IOIS16,             IOIS16_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF5_TXD,          SCIF5_TXD_MARK),
+        PINMUX_GPIO(GPIO_FN_CE2B,               CE2B_MARK),
+        PINMUX_GPIO(GPIO_FN_DRAK3,              DRAK3_MARK),
+        PINMUX_GPIO(GPIO_FN_CE2A,               CE2A_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF4_SCK,          SCIF4_SCK_MARK),
+        PINMUX_GPIO(GPIO_FN_DRAK2,              DRAK2_MARK),
+        PINMUX_GPIO(GPIO_FN_SSI3_WS,            SSI3_WS_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF4_RXD,          SCIF4_RXD_MARK),
+        PINMUX_GPIO(GPIO_FN_DRAK1,              DRAK1_MARK),
+        PINMUX_GPIO(GPIO_FN_SSI3_SDATA,         SSI3_SDATA_MARK),
+        PINMUX_GPIO(GPIO_FN_FSTATUS,            FSTATUS_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF4_TXD,          SCIF4_TXD_MARK),
+        PINMUX_GPIO(GPIO_FN_DRAK0,              DRAK0_MARK),
+        PINMUX_GPIO(GPIO_FN_SSI3_SCK,           SSI3_SCK_MARK),
+        PINMUX_GPIO(GPIO_FN_FSE,                FSE_MARK),
+};
+
+static struct pinmux_cfg_reg pinmux_config_regs[] = {
+        { PINMUX_CFG_REG("PACR", 0xffcc0000, 16, 2) {
+                PA7_FN, PA7_OUT, PA7_IN, PA7_IN_PU,
+                PA6_FN, PA6_OUT, PA6_IN, PA6_IN_PU,
+                PA5_FN, PA5_OUT, PA5_IN, PA5_IN_PU,
+                PA4_FN, PA4_OUT, PA4_IN, PA4_IN_PU,
+                PA3_FN, PA3_OUT, PA3_IN, PA3_IN_PU,
+                PA2_FN, PA2_OUT, PA2_IN, PA2_IN_PU,
+                PA1_FN, PA1_OUT, PA1_IN, PA1_IN_PU,
+                PA0_FN, PA0_OUT, PA0_IN, PA0_IN_PU }
+        },
+        { PINMUX_CFG_REG("PBCR", 0xffcc0002, 16, 2) {
+                PB7_FN, PB7_OUT, PB7_IN, PB7_IN_PU,
+                PB6_FN, PB6_OUT, PB6_IN, PB6_IN_PU,
+                PB5_FN, PB5_OUT, PB5_IN, PB5_IN_PU,
+                PB4_FN, PB4_OUT, PB4_IN, PB4_IN_PU,
+                PB3_FN, PB3_OUT, PB3_IN, PB3_IN_PU,
+                PB2_FN, PB2_OUT, PB2_IN, PB2_IN_PU,
+                PB1_FN, PB1_OUT, PB1_IN, PB1_IN_PU,
+                PB0_FN, PB0_OUT, PB0_IN, PB0_IN_PU }
+        },
+        { PINMUX_CFG_REG("PCCR", 0xffcc0004, 16, 2) {
+                PC7_FN, PC7_OUT, PC7_IN, PC7_IN_PU,
+                PC6_FN, PC6_OUT, PC6_IN, PC6_IN_PU,
+                PC5_FN, PC5_OUT, PC5_IN, PC5_IN_PU,
+                PC4_FN, PC4_OUT, PC4_IN, PC4_IN_PU,
+                PC3_FN, PC3_OUT, PC3_IN, PC3_IN_PU,
+                PC2_FN, PC2_OUT, PC2_IN, PC2_IN_PU,
+                PC1_FN, PC1_OUT, PC1_IN, PC1_IN_PU,
+                PC0_FN, PC0_OUT, PC0_IN, PC0_IN_PU }
+        },
+        { PINMUX_CFG_REG("PDCR", 0xffcc0006, 16, 2) {
+                PD7_FN, PD7_OUT, PD7_IN, PD7_IN_PU,
+                PD6_FN, PD6_OUT, PD6_IN, PD6_IN_PU,
+                PD5_FN, PD5_OUT, PD5_IN, PD5_IN_PU,
+                PD4_FN, PD4_OUT, PD4_IN, PD4_IN_PU,
+                PD3_FN, PD3_OUT, PD3_IN, PD3_IN_PU,
+                PD2_FN, PD2_OUT, PD2_IN, PD2_IN_PU,
+                PD1_FN, PD1_OUT, PD1_IN, PD1_IN_PU,
+                PD0_FN, PD0_OUT, PD0_IN, PD0_IN_PU }
+        },
+        { PINMUX_CFG_REG("PECR", 0xffcc0008, 16, 2) {
+                PE7_FN, PE7_OUT, PE7_IN, PE7_IN_PU,
+                PE6_FN, PE6_OUT, PE6_IN, PE6_IN_PU,
+                0, 0, 0, 0,
+                0, 0, 0, 0,
+                0, 0, 0, 0,
+                0, 0, 0, 0,
+                0, 0, 0, 0,
+                0, 0, 0, 0, }
+        },
+        { PINMUX_CFG_REG("PFCR", 0xffcc000a, 16, 2) {
+                PF7_FN, PF7_OUT, PF7_IN, PF7_IN_PU,
+                PF6_FN, PF6_OUT, PF6_IN, PF6_IN_PU,
+                PF5_FN, PF5_OUT, PF5_IN, PF5_IN_PU,
+                PF4_FN, PF4_OUT, PF4_IN, PF4_IN_PU,
+                PF3_FN, PF3_OUT, PF3_IN, PF3_IN_PU,
+                PF2_FN, PF2_OUT, PF2_IN, PF2_IN_PU,
+                PF1_FN, PF1_OUT, PF1_IN, PF1_IN_PU,
+                PF0_FN, PF0_OUT, PF0_IN, PF0_IN_PU }
+        },
+        { PINMUX_CFG_REG("PGCR", 0xffcc000c, 16, 2) {
+                PG7_FN, PG7_OUT, PG7_IN, PG7_IN_PU,
+                PG6_FN, PG6_OUT, PG6_IN, PG6_IN_PU,
+                PG5_FN, PG5_OUT, PG5_IN, PG5_IN_PU,
+                0, 0, 0, 0,
+                0, 0, 0, 0,
+                0, 0, 0, 0,
+                0, 0, 0, 0,
+                0, 0, 0, 0, }
+        },
+        { PINMUX_CFG_REG("PHCR", 0xffcc000e, 16, 2) {
+                PH7_FN, PH7_OUT, PH7_IN, PH7_IN_PU,
+                PH6_FN, PH6_OUT, PH6_IN, PH6_IN_PU,
+                PH5_FN, PH5_OUT, PH5_IN, PH5_IN_PU,
+                PH4_FN, PH4_OUT, PH4_IN, PH4_IN_PU,
+                PH3_FN, PH3_OUT, PH3_IN, PH3_IN_PU,
+                PH2_FN, PH2_OUT, PH2_IN, PH2_IN_PU,
+                PH1_FN, PH1_OUT, PH1_IN, PH1_IN_PU,
+                PH0_FN, PH0_OUT, PH0_IN, PH0_IN_PU }
+        },
+        { PINMUX_CFG_REG("PJCR", 0xffcc0010, 16, 2) {
+                PJ7_FN, PJ7_OUT, PJ7_IN, PJ7_IN_PU,
+                PJ6_FN, PJ6_OUT, PJ6_IN, PJ6_IN_PU,
+                PJ5_FN, PJ5_OUT, PJ5_IN, PJ5_IN_PU,
+                PJ4_FN, PJ4_OUT, PJ4_IN, PJ4_IN_PU,
+                PJ3_FN, PJ3_OUT, PJ3_IN, PJ3_IN_PU,
+                PJ2_FN, PJ2_OUT, PJ2_IN, PJ2_IN_PU,
+                PJ1_FN, PJ1_OUT, PJ1_IN, PJ1_IN_PU,
+                0, 0, 0, 0, }
+        },
+        { PINMUX_CFG_REG("P1MSELR", 0xffcc0080, 16, 1) {
+                0, 0,
+                P1MSEL14_0, P1MSEL14_1,
+                P1MSEL13_0, P1MSEL13_1,
+                P1MSEL12_0, P1MSEL12_1,
+                P1MSEL11_0, P1MSEL11_1,
+                P1MSEL10_0, P1MSEL10_1,
+                P1MSEL9_0,  P1MSEL9_1,
+                P1MSEL8_0,  P1MSEL8_1,
+                P1MSEL7_0,  P1MSEL7_1,
+                P1MSEL6_0,  P1MSEL6_1,
+                P1MSEL5_0,  P1MSEL5_1,
+                P1MSEL4_0,  P1MSEL4_1,
+                P1MSEL3_0,  P1MSEL3_1,
+                P1MSEL2_0,  P1MSEL2_1,
+                P1MSEL1_0,  P1MSEL1_1,
+                P1MSEL0_0,  P1MSEL0_1 }
+        },
+        { PINMUX_CFG_REG("P2MSELR", 0xffcc0082, 16, 1) {
+                P2MSEL15_0, P2MSEL15_1,
+                P2MSEL14_0, P2MSEL14_1,
+                P2MSEL13_0, P2MSEL13_1,
+                P2MSEL12_0, P2MSEL12_1,
+                P2MSEL11_0, P2MSEL11_1,
+                P2MSEL10_0, P2MSEL10_1,
+                P2MSEL9_0,  P2MSEL9_1,
+                P2MSEL8_0,  P2MSEL8_1,
+                P2MSEL7_0,  P2MSEL7_1,
+                P2MSEL6_0,  P2MSEL6_1,
+                P2MSEL5_0,  P2MSEL5_1,
+                P2MSEL4_0,  P2MSEL4_1,
+                P2MSEL3_0,  P2MSEL3_1,
+                P2MSEL2_0,  P2MSEL2_1,
+                P2MSEL1_0,  P2MSEL1_1,
+                P2MSEL0_0,  P2MSEL0_1 }
+        },
+        {}
+};
+
+static struct pinmux_data_reg pinmux_data_regs[] = {
+        { PINMUX_DATA_REG("PADR", 0xffcc0020, 8) {
+                PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
+                PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA }
+        },
+        { PINMUX_DATA_REG("PBDR", 0xffcc0022, 8) {
+                PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
+                PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA }
+        },
+        { PINMUX_DATA_REG("PCDR", 0xffcc0024, 8) {
+                PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
+                PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA }
+        },
+        { PINMUX_DATA_REG("PDDR", 0xffcc0026, 8) {
+                PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
+                PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA }
+        },
+        { PINMUX_DATA_REG("PEDR", 0xffcc0028, 8) {
+                PE7_DATA, PE6_DATA,
+                0, 0, 0, 0, 0, 0 }
+        },
+        { PINMUX_DATA_REG("PFDR", 0xffcc002a, 8) {
+                PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
+                PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA }
+        },
+        { PINMUX_DATA_REG("PGDR", 0xffcc002c, 8) {
+                PG7_DATA, PG6_DATA, PG5_DATA, 0,
+                0, 0, 0, 0 }
+        },
+        { PINMUX_DATA_REG("PHDR", 0xffcc002e, 8) {
+                PH7_DATA, PH6_DATA, PH5_DATA, PH4_DATA,
+                PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA }
+        },
+        { PINMUX_DATA_REG("PJDR", 0xffcc0030, 8) {
+                PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,
+                PJ3_DATA, PJ2_DATA, PJ1_DATA, 0 }
+        },
+        { },
+};
+
+static struct pinmux_info sh7786_pinmux_info = {
+        .name = "sh7786_pfc",
+        .reserved_id = PINMUX_RESERVED,
+        .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
+        .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
+        .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
+        .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
+        .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
+        .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
+
+        .first_gpio = GPIO_PA7,
+        .last_gpio = GPIO_FN_FSE,
+
+        .gpios = pinmux_gpios,
+        .cfg_regs = pinmux_config_regs,
+        .data_regs = pinmux_data_regs,
+
+        .gpio_data = pinmux_data,
+        .gpio_data_size = ARRAY_SIZE(pinmux_data),
+};
+
+static int __init plat_pinmux_setup(void)
+{
+        return register_pinmux(&sh7786_pinmux_info);
+}
+
+arch_initcall(plat_pinmux_setup);
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
index 4ff4dc64520c..c1549382c87c 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
@@ -12,6 +12,7 @@
 #include <linux/serial.h>
 #include <linux/serial_sci.h>
 #include <linux/uio_driver.h>
+#include <linux/sh_cmt.h>
 #include <asm/clock.h>
 
 static struct resource iic0_resources[] = {
@@ -140,6 +141,38 @@ static struct platform_device jpu_device = {
         .num_resources  = ARRAY_SIZE(jpu_resources),
 };
 
+static struct sh_cmt_config cmt_platform_data = {
+        .name = "CMT",
+        .channel_offset = 0x60,
+        .timer_bit = 5,
+        .clk = "cmt0",
+        .clockevent_rating = 125,
+        .clocksource_rating = 200,
+};
+
+static struct resource cmt_resources[] = {
+        [0] = {
+                .name   = "CMT",
+                .start  = 0x044a0060,
+                .end    = 0x044a006b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 104,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device cmt_device = {
+        .name           = "sh_cmt",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &cmt_platform_data,
+        },
+        .resource       = cmt_resources,
+        .num_resources  = ARRAY_SIZE(cmt_resources),
+};
+
 static struct plat_sci_port sci_platform_data[] = {
         {
                 .mapbase        = 0xffe00000,
@@ -175,6 +208,7 @@ static struct platform_device sci_device = {
 };
 
 static struct platform_device *sh7343_devices[] __initdata = {
+        &cmt_device,
         &iic0_device,
         &iic1_device,
         &sci_device,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
index 839ae97a7fd2..93ecf8ed5c6c 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
@@ -14,6 +14,7 @@
 #include <linux/serial.h>
 #include <linux/serial_sci.h>
 #include <linux/uio_driver.h>
+#include <linux/sh_cmt.h>
 #include <asm/clock.h>
 
 static struct resource iic_resources[] = {
@@ -147,6 +148,38 @@ static struct platform_device veu1_device = {
         .num_resources  = ARRAY_SIZE(veu1_resources),
 };
 
+static struct sh_cmt_config cmt_platform_data = {
+        .name = "CMT",
+        .channel_offset = 0x60,
+        .timer_bit = 5,
+        .clk = "cmt0",
+        .clockevent_rating = 125,
+        .clocksource_rating = 200,
+};
+
+static struct resource cmt_resources[] = {
+        [0] = {
+                .name   = "CMT",
+                .start  = 0x044a0060,
+                .end    = 0x044a006b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 104,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device cmt_device = {
+        .name           = "sh_cmt",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &cmt_platform_data,
+        },
+        .resource       = cmt_resources,
+        .num_resources  = ARRAY_SIZE(cmt_resources),
+};
+
 static struct plat_sci_port sci_platform_data[] = {
         {
                 .mapbase        = 0xffe00000,
@@ -167,6 +200,7 @@ static struct platform_device sci_device = {
 };
 
 static struct platform_device *sh7366_devices[] __initdata = {
+        &cmt_device,
         &iic_device,
         &sci_device,
         &usb_host_device,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
index 5146afc156e0..0e5d204bc792 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -13,6 +13,7 @@
 #include <linux/serial_sci.h>
 #include <linux/mm.h>
 #include <linux/uio_driver.h>
+#include <linux/sh_cmt.h>
 #include <asm/clock.h>
 #include <asm/mmzone.h>
 
@@ -176,6 +177,38 @@ static struct platform_device jpu_device = {
         .num_resources  = ARRAY_SIZE(jpu_resources),
 };
 
+static struct sh_cmt_config cmt_platform_data = {
+        .name = "CMT",
+        .channel_offset = 0x60,
+        .timer_bit = 5,
+        .clk = "cmt0",
+        .clockevent_rating = 125,
+        .clocksource_rating = 200,
+};
+
+static struct resource cmt_resources[] = {
+        [0] = {
+                .name   = "CMT",
+                .start  = 0x044a0060,
+                .end    = 0x044a006b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 104,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device cmt_device = {
+        .name           = "sh_cmt",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &cmt_platform_data,
+        },
+        .resource       = cmt_resources,
+        .num_resources  = ARRAY_SIZE(cmt_resources),
+};
+
 static struct plat_sci_port sci_platform_data[] = {
         {
                 .mapbase        = 0xffe00000,
@@ -209,6 +242,7 @@ static struct platform_device sci_device = {
 };
 
 static struct platform_device *sh7722_devices[] __initdata = {
+        &cmt_device,
         &rtc_device,
         &usbf_device,
         &iic_device,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
index 849770d780ae..5338dacbcfba 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
@@ -13,6 +13,7 @@
 #include <linux/mm.h>
 #include <linux/serial_sci.h>
 #include <linux/uio_driver.h>
+#include <linux/sh_cmt.h>
 #include <asm/clock.h>
 #include <asm/mmzone.h>
 
@@ -100,6 +101,38 @@ static struct platform_device veu1_device = {
         .num_resources  = ARRAY_SIZE(veu1_resources),
 };
 
+static struct sh_cmt_config cmt_platform_data = {
+        .name = "CMT",
+        .channel_offset = 0x60,
+        .timer_bit = 5,
+        .clk = "cmt0",
+        .clockevent_rating = 125,
+        .clocksource_rating = 200,
+};
+
+static struct resource cmt_resources[] = {
+        [0] = {
+                .name   = "CMT",
+                .start  = 0x044a0060,
+                .end    = 0x044a006b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 104,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device cmt_device = {
+        .name           = "sh_cmt",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &cmt_platform_data,
+        },
+        .resource       = cmt_resources,
+        .num_resources  = ARRAY_SIZE(cmt_resources),
+};
+
 static struct plat_sci_port sci_platform_data[] = {
         {
                 .mapbase        = 0xffe00000,
@@ -221,6 +254,7 @@ static struct platform_device iic_device = {
 };
 
 static struct platform_device *sh7723_devices[] __initdata = {
+        &cmt_device,
         &sci_device,
         &rtc_device,
         &iic_device,
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
index 3c5b629887a8..bdf0f61ae1ed 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
@@ -3,7 +3,7 @@
  *
  *  Copyright (C) 2006  Paul Mundt
  *  Copyright (C) 2007  Yoshihiro Shimoda
- *  Copyright (C) 2008  Nobuhiro Iwamatsu
+ *  Copyright (C) 2008, 2009  Nobuhiro Iwamatsu
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -22,18 +22,8 @@ static struct resource rtc_resources[] = {
                 .flags  = IORESOURCE_IO,
         },
         [1] = {
-                /* Period IRQ */
-                .start  = 21,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [2] = {
-                /* Carry IRQ */
-                .start  = 22,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [3] = {
-                /* Alarm IRQ */
-                .start  = 20,
+                /* Shared Period/Carry/Alarm IRQ */
+                .start  = 20,
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -50,17 +40,17 @@ static struct plat_sci_port sci_platform_data[] = {
                 .mapbase        = 0xffe00000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 40, 41, 43, 42 },
+                .irqs           = { 40, 40, 40, 40 },
         }, {
                 .mapbase        = 0xffe08000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 76, 77, 79, 78 },
+                .irqs           = { 76, 76, 76, 76 },
         }, {
                 .mapbase        = 0xffe10000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 104, 105, 107, 106 },
+                .irqs           = { 104, 104, 104, 104 },
         }, {
                 .flags = 0,
         }
@@ -148,93 +138,65 @@ enum {
         IRL_HHLL, IRL_HHLH, IRL_HHHL,
 
         IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
-        RTC_ATI, RTC_PRI, RTC_CUI,
-        WDT, TMU0, TMU1, TMU2, TMU2_TICPI,
-        HUDI, LCDC,
-        DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2, DMAC0_DMINT3, DMAC0_DMAE,
-        SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI,
-        DMAC0_DMINT4, DMAC0_DMINT5,
-        IIC0, IIC1,
-        CMT,
-        GEINT0, GEINT1, GEINT2,
-        HAC,
-        PCISERR, PCIINTA, PCIINTB, PCIINTC, PCIINTD,
-        PCIERR, PCIPWD3, PCIPWD2, PCIPWD1, PCIPWD0,
-        STIF0, STIF1,
-        SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI,
-        SIOF0, SIOF1, SIOF2,
-        USBH, USBFI0, USBFI1,
-        TPU, PCC,
-        MMCIF_FSTAT, MMCIF_TRAN, MMCIF_ERR, MMCIF_FRDY,
-        SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEND,
+        RTC, WDT, TMU0, TMU1, TMU2, TMU2_TICPI,
+        HUDI, LCDC, DMAC, SCIF0, IIC0, IIC1, CMT, GETHER, HAC,
+        PCISERR, PCIINTA, PCIINTB, PCIINTC, PCIINTD, PCIC5,
+        STIF0, STIF1, SCIF1, SIOF0, SIOF1, SIOF2,
+        USBH, USBF, TPU, PCC, MMCIF, SIM,
         TMU3, TMU4, TMU5, ADC, SSI0, SSI1, SSI2, SSI3,
-        SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI,
-        GPIO_CH0, GPIO_CH1, GPIO_CH2, GPIO_CH3,
+        SCIF2, GPIO,
 
         /* interrupt groups */
 
-        TMU012, TMU345, RTC, DMAC, SCIF0, GETHER, PCIC5,
-        SCIF1, USBF, MMCIF, SIM, SCIF2, GPIO,
+        TMU012, TMU345,
 };
 
 static struct intc_vect vectors[] __initdata = {
-        INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0),
-        INTC_VECT(RTC_CUI, 0x4c0),
+        INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
+        INTC_VECT(RTC, 0x4c0),
         INTC_VECT(WDT, 0x560), INTC_VECT(TMU0, 0x580),
         INTC_VECT(TMU1, 0x5a0), INTC_VECT(TMU2, 0x5c0),
         INTC_VECT(TMU2_TICPI, 0x5e0), INTC_VECT(HUDI, 0x600),
         INTC_VECT(LCDC, 0x620),
-        INTC_VECT(DMAC0_DMINT0, 0x640), INTC_VECT(DMAC0_DMINT1, 0x660),
-        INTC_VECT(DMAC0_DMINT2, 0x680), INTC_VECT(DMAC0_DMINT3, 0x6a0),
-        INTC_VECT(DMAC0_DMAE, 0x6c0),
-        INTC_VECT(SCIF0_ERI, 0x700), INTC_VECT(SCIF0_RXI, 0x720),
-        INTC_VECT(SCIF0_BRI, 0x740), INTC_VECT(SCIF0_TXI, 0x760),
-        INTC_VECT(DMAC0_DMINT4, 0x780), INTC_VECT(DMAC0_DMINT5, 0x7a0),
+        INTC_VECT(DMAC, 0x640), INTC_VECT(DMAC, 0x660),
+        INTC_VECT(DMAC, 0x680), INTC_VECT(DMAC, 0x6a0),
+        INTC_VECT(DMAC, 0x6c0),
+        INTC_VECT(SCIF0, 0x700), INTC_VECT(SCIF0, 0x720),
+        INTC_VECT(SCIF0, 0x740), INTC_VECT(SCIF0, 0x760),
+        INTC_VECT(DMAC, 0x780), INTC_VECT(DMAC, 0x7a0),
         INTC_VECT(IIC0, 0x8A0), INTC_VECT(IIC1, 0x8C0),
-        INTC_VECT(CMT, 0x900), INTC_VECT(GEINT0, 0x920),
-        INTC_VECT(GEINT1, 0x940), INTC_VECT(GEINT2, 0x960),
+        INTC_VECT(CMT, 0x900), INTC_VECT(GETHER, 0x920),
+        INTC_VECT(GETHER, 0x940), INTC_VECT(GETHER, 0x960),
         INTC_VECT(HAC, 0x980),
         INTC_VECT(PCISERR, 0xa00), INTC_VECT(PCIINTA, 0xa20),
         INTC_VECT(PCIINTB, 0xa40), INTC_VECT(PCIINTC, 0xa60),
-        INTC_VECT(PCIINTD, 0xa80), INTC_VECT(PCIERR, 0xaa0),
-        INTC_VECT(PCIPWD3, 0xac0), INTC_VECT(PCIPWD2, 0xae0),
-        INTC_VECT(PCIPWD1, 0xb00), INTC_VECT(PCIPWD0, 0xb20),
+        INTC_VECT(PCIINTD, 0xa80), INTC_VECT(PCIC5, 0xaa0),
+        INTC_VECT(PCIC5, 0xac0), INTC_VECT(PCIC5, 0xae0),
+        INTC_VECT(PCIC5, 0xb00), INTC_VECT(PCIC5, 0xb20),
         INTC_VECT(STIF0, 0xb40), INTC_VECT(STIF1, 0xb60),
-        INTC_VECT(SCIF1_ERI, 0xb80), INTC_VECT(SCIF1_RXI, 0xba0),
-        INTC_VECT(SCIF1_BRI, 0xbc0), INTC_VECT(SCIF1_TXI, 0xbe0),
+        INTC_VECT(SCIF1, 0xb80), INTC_VECT(SCIF1, 0xba0),
+        INTC_VECT(SCIF1, 0xbc0), INTC_VECT(SCIF1, 0xbe0),
         INTC_VECT(SIOF0, 0xc00), INTC_VECT(SIOF1, 0xc20),
-        INTC_VECT(USBH, 0xc60), INTC_VECT(USBFI0, 0xc80),
-        INTC_VECT(USBFI1, 0xca0),
+        INTC_VECT(USBH, 0xc60), INTC_VECT(USBF, 0xc80),
+        INTC_VECT(USBF, 0xca0),
         INTC_VECT(TPU, 0xcc0), INTC_VECT(PCC, 0xce0),
-        INTC_VECT(MMCIF_FSTAT, 0xd00), INTC_VECT(MMCIF_TRAN, 0xd20),
-        INTC_VECT(MMCIF_ERR, 0xd40), INTC_VECT(MMCIF_FRDY, 0xd60),
-        INTC_VECT(SIM_ERI, 0xd80), INTC_VECT(SIM_RXI, 0xda0),
-        INTC_VECT(SIM_TXI, 0xdc0), INTC_VECT(SIM_TEND, 0xde0),
+        INTC_VECT(MMCIF, 0xd00), INTC_VECT(MMCIF, 0xd20),
+        INTC_VECT(MMCIF, 0xd40), INTC_VECT(MMCIF, 0xd60),
+        INTC_VECT(SIM, 0xd80), INTC_VECT(SIM, 0xda0),
+        INTC_VECT(SIM, 0xdc0), INTC_VECT(SIM, 0xde0),
         INTC_VECT(TMU3, 0xe00), INTC_VECT(TMU4, 0xe20),
         INTC_VECT(TMU5, 0xe40), INTC_VECT(ADC, 0xe60),
         INTC_VECT(SSI0, 0xe80), INTC_VECT(SSI1, 0xea0),
         INTC_VECT(SSI2, 0xec0), INTC_VECT(SSI3, 0xee0),
-        INTC_VECT(SCIF2_ERI, 0xf00), INTC_VECT(SCIF2_RXI, 0xf20),
-        INTC_VECT(SCIF2_BRI, 0xf40), INTC_VECT(SCIF2_TXI, 0xf60),
-        INTC_VECT(GPIO_CH0, 0xf80), INTC_VECT(GPIO_CH1, 0xfa0),
-        INTC_VECT(GPIO_CH2, 0xfc0), INTC_VECT(GPIO_CH3, 0xfe0),
+        INTC_VECT(SCIF2, 0xf00), INTC_VECT(SCIF2, 0xf20),
+        INTC_VECT(SCIF2, 0xf40), INTC_VECT(SCIF2, 0xf60),
+        INTC_VECT(GPIO, 0xf80), INTC_VECT(GPIO, 0xfa0),
+        INTC_VECT(GPIO, 0xfc0), INTC_VECT(GPIO, 0xfe0),
 };
 
 static struct intc_group groups[] __initdata = {
         INTC_GROUP(TMU012, TMU0, TMU1, TMU2, TMU2_TICPI),
         INTC_GROUP(TMU345, TMU3, TMU4, TMU5),
-        INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),
-        INTC_GROUP(DMAC, DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2,
-                   DMAC0_DMINT3, DMAC0_DMINT4, DMAC0_DMINT5, DMAC0_DMAE),
-        INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
-        INTC_GROUP(GETHER, GEINT0, GEINT1, GEINT2),
-        INTC_GROUP(PCIC5, PCIERR, PCIPWD3, PCIPWD2, PCIPWD1, PCIPWD0),
-        INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI),
-        INTC_GROUP(USBF, USBFI0, USBFI1),
-        INTC_GROUP(MMCIF, MMCIF_FSTAT, MMCIF_TRAN, MMCIF_ERR, MMCIF_FRDY),
-        INTC_GROUP(SIM, SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEND),
-        INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI),
-        INTC_GROUP(GPIO, GPIO_CH0, GPIO_CH1, GPIO_CH2, GPIO_CH3),
 };
 
 static struct intc_mask_reg mask_registers[] __initdata = {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
index fb8200cc7440..6f7227cd65bf 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
@@ -20,17 +20,7 @@ static struct resource rtc_resources[] = {
                 .flags  = IORESOURCE_IO,
         },
         [1] = {
-                /* Period IRQ */
-                .start  = 21,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [2] = {
-                /* Carry IRQ */
-                .start  = 22,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [3] = {
-                /* Alarm IRQ */
+                /* Shared Period/Carry/Alarm IRQ */
                 .start  = 20,
                 .flags  = IORESOURCE_IRQ,
         },
@@ -48,12 +38,12 @@ static struct plat_sci_port sci_platform_data[] = {
                 .mapbase        = 0xffe00000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 40, 41, 43, 42 },
+                .irqs           = { 40, 40, 40, 40 },
         }, {
                 .mapbase        = 0xffe10000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 76, 77, 79, 78 },
+                .irqs           = { 76, 76, 76, 76 },
         }, {
                 .flags = 0,
         }
@@ -90,82 +80,55 @@ enum {
         IRL_HHLL, IRL_HHLH, IRL_HHHL,
 
         IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
-        RTC_ATI, RTC_PRI, RTC_CUI,
-        WDT,
-        TMU0, TMU1, TMU2, TMU2_TICPI,
-        HUDI,
-        DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2, DMAC0_DMINT3, DMAC0_DMAE,
-        SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI,
-        DMAC0_DMINT4, DMAC0_DMINT5, DMAC1_DMINT6, DMAC1_DMINT7,
-        CMT, HAC,
-        PCISERR, PCIINTA, PCIINTB, PCIINTC, PCIINTD,
-        PCIERR, PCIPWD3, PCIPWD2, PCIPWD1, PCIPWD0,
-        SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI,
-        SIOF, HSPI,
-        MMCIF_FSTAT, MMCIF_TRAN, MMCIF_ERR, MMCIF_FRDY,
-        DMAC1_DMINT8, DMAC1_DMINT9, DMAC1_DMINT10, DMAC1_DMINT11,
-        TMU3, TMU4, TMU5,
-        SSI,
-        FLCTL_FLSTE, FLCTL_FLEND, FLCTL_FLTRQ0, FLCTL_FLTRQ1,
-        GPIOI0, GPIOI1, GPIOI2, GPIOI3,
+        RTC, WDT, TMU0, TMU1, TMU2, TMU2_TICPI,
+        HUDI, DMAC0, SCIF0, DMAC1, CMT, HAC,
+        PCISERR, PCIINTA, PCIINTB, PCIINTC, PCIINTD, PCIC5,
+        SCIF1, SIOF, HSPI, MMCIF, TMU3, TMU4, TMU5, SSI, FLCTL, GPIO,
 
         /* interrupt groups */
 
-        RTC, TMU012, DMAC0, SCIF0, DMAC45, DMAC1,
-        PCIC5, SCIF1, MMCIF, TMU345, FLCTL, GPIO,
+        TMU012, TMU345,
 };
 
 static struct intc_vect vectors[] __initdata = {
-        INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0),
-        INTC_VECT(RTC_CUI, 0x4c0),
+        INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
+        INTC_VECT(RTC, 0x4c0),
         INTC_VECT(WDT, 0x560),
         INTC_VECT(TMU0, 0x580), INTC_VECT(TMU1, 0x5a0),
         INTC_VECT(TMU2, 0x5c0), INTC_VECT(TMU2_TICPI, 0x5e0),
         INTC_VECT(HUDI, 0x600),
-        INTC_VECT(DMAC0_DMINT0, 0x640), INTC_VECT(DMAC0_DMINT1, 0x660),
-        INTC_VECT(DMAC0_DMINT2, 0x680), INTC_VECT(DMAC0_DMINT3, 0x6a0),
-        INTC_VECT(DMAC0_DMAE, 0x6c0),
-        INTC_VECT(SCIF0_ERI, 0x700), INTC_VECT(SCIF0_RXI, 0x720),
-        INTC_VECT(SCIF0_BRI, 0x740), INTC_VECT(SCIF0_TXI, 0x760),
-        INTC_VECT(DMAC0_DMINT4, 0x780), INTC_VECT(DMAC0_DMINT5, 0x7a0),
-        INTC_VECT(DMAC1_DMINT6, 0x7c0), INTC_VECT(DMAC1_DMINT7, 0x7e0),
+        INTC_VECT(DMAC0, 0x640), INTC_VECT(DMAC0, 0x660),
+        INTC_VECT(DMAC0, 0x680), INTC_VECT(DMAC0, 0x6a0),
+        INTC_VECT(DMAC0, 0x6c0),
+        INTC_VECT(SCIF0, 0x700), INTC_VECT(SCIF0, 0x720),
+        INTC_VECT(SCIF0, 0x740), INTC_VECT(SCIF0, 0x760),
+        INTC_VECT(DMAC0, 0x780), INTC_VECT(DMAC0, 0x7a0),
+        INTC_VECT(DMAC1, 0x7c0), INTC_VECT(DMAC1, 0x7e0),
         INTC_VECT(CMT, 0x900), INTC_VECT(HAC, 0x980),
         INTC_VECT(PCISERR, 0xa00), INTC_VECT(PCIINTA, 0xa20),
         INTC_VECT(PCIINTB, 0xa40), INTC_VECT(PCIINTC, 0xa60),
-        INTC_VECT(PCIINTD, 0xa80), INTC_VECT(PCIERR, 0xaa0),
-        INTC_VECT(PCIPWD3, 0xac0), INTC_VECT(PCIPWD2, 0xae0),
-        INTC_VECT(PCIPWD1, 0xb00), INTC_VECT(PCIPWD0, 0xb20),
-        INTC_VECT(SCIF1_ERI, 0xb80), INTC_VECT(SCIF1_RXI, 0xba0),
-        INTC_VECT(SCIF1_BRI, 0xbc0), INTC_VECT(SCIF1_TXI, 0xbe0),
+        INTC_VECT(PCIINTD, 0xa80), INTC_VECT(PCIC5, 0xaa0),
+        INTC_VECT(PCIC5, 0xac0), INTC_VECT(PCIC5, 0xae0),
+        INTC_VECT(PCIC5, 0xb00), INTC_VECT(PCIC5, 0xb20),
+        INTC_VECT(SCIF1, 0xb80), INTC_VECT(SCIF1, 0xba0),
+        INTC_VECT(SCIF1, 0xbc0), INTC_VECT(SCIF1, 0xbe0),
         INTC_VECT(SIOF, 0xc00), INTC_VECT(HSPI, 0xc80),
-        INTC_VECT(MMCIF_FSTAT, 0xd00), INTC_VECT(MMCIF_TRAN, 0xd20),
-        INTC_VECT(MMCIF_ERR, 0xd40), INTC_VECT(MMCIF_FRDY, 0xd60),
-        INTC_VECT(DMAC1_DMINT8, 0xd80), INTC_VECT(DMAC1_DMINT9, 0xda0),
-        INTC_VECT(DMAC1_DMINT10, 0xdc0), INTC_VECT(DMAC1_DMINT11, 0xde0),
+        INTC_VECT(MMCIF, 0xd00), INTC_VECT(MMCIF, 0xd20),
+        INTC_VECT(MMCIF, 0xd40), INTC_VECT(MMCIF, 0xd60),
+        INTC_VECT(DMAC1, 0xd80), INTC_VECT(DMAC1, 0xda0),
+        INTC_VECT(DMAC1, 0xdc0), INTC_VECT(DMAC1, 0xde0),
         INTC_VECT(TMU3, 0xe00), INTC_VECT(TMU4, 0xe20),
         INTC_VECT(TMU5, 0xe40),
         INTC_VECT(SSI, 0xe80),
-        INTC_VECT(FLCTL_FLSTE, 0xf00), INTC_VECT(FLCTL_FLEND, 0xf20),
-        INTC_VECT(FLCTL_FLTRQ0, 0xf40), INTC_VECT(FLCTL_FLTRQ1, 0xf60),
-        INTC_VECT(GPIOI0, 0xf80), INTC_VECT(GPIOI1, 0xfa0),
-        INTC_VECT(GPIOI2, 0xfc0), INTC_VECT(GPIOI3, 0xfe0),
+        INTC_VECT(FLCTL, 0xf00), INTC_VECT(FLCTL, 0xf20),
+        INTC_VECT(FLCTL, 0xf40), INTC_VECT(FLCTL, 0xf60),
+        INTC_VECT(GPIO, 0xf80), INTC_VECT(GPIO, 0xfa0),
+        INTC_VECT(GPIO, 0xfc0), INTC_VECT(GPIO, 0xfe0),
 };
 
 static struct intc_group groups[] __initdata = {
-        INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),
         INTC_GROUP(TMU012, TMU0, TMU1, TMU2, TMU2_TICPI),
-        INTC_GROUP(DMAC0, DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2,
-                   DMAC0_DMINT3, DMAC0_DMINT4, DMAC0_DMINT5, DMAC0_DMAE),
-        INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
-        INTC_GROUP(DMAC1, DMAC1_DMINT6, DMAC1_DMINT7, DMAC1_DMINT8,
-                   DMAC1_DMINT9, DMAC1_DMINT10, DMAC1_DMINT11),
-        INTC_GROUP(PCIC5, PCIERR, PCIPWD3, PCIPWD2, PCIPWD1, PCIPWD0),
-        INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI),
-        INTC_GROUP(MMCIF, MMCIF_FSTAT, MMCIF_TRAN, MMCIF_ERR, MMCIF_FRDY),
         INTC_GROUP(TMU345, TMU3, TMU4, TMU5),
-        INTC_GROUP(FLCTL, FLCTL_FLSTE, FLCTL_FLEND,
-                   FLCTL_FLTRQ0, FLCTL_FLTRQ1),
-        INTC_GROUP(GPIO, GPIOI0, GPIOI1, GPIOI2, GPIOI3),
 };
 
 static struct intc_mask_reg mask_registers[] __initdata = {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
index 30baa63b24c8..d80802a49dbd 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
@@ -20,18 +20,13 @@ static struct plat_sci_port sci_platform_data[] = {
                 .mapbase        = 0xffea0000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 40, 41, 43, 42 },
+                .irqs           = { 40, 40, 40, 40 },
         }, {
                 .mapbase        = 0xffeb0000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
-                .irqs           = { 44, 45, 47, 46 },
-        },
-
-        /*
-         * The rest of these all have multiplexed IRQs
-         */
-        {
+                .irqs           = { 44, 44, 44, 44 },
+        }, {
                 .mapbase        = 0xffec0000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
@@ -91,33 +86,19 @@ enum {
         IRL4_HHLL, IRL4_HHLH, IRL4_HHHL,
 
         IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
-        WDT,
-        TMU0, TMU1, TMU2, TMU2_TICPI,
-        HUDI,
-        DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2, DMAC0_DMINT3,
-        DMAC0_DMINT4, DMAC0_DMINT5, DMAC0_DMAE,
-        SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI,
-        SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI,
-        DMAC1_DMINT6, DMAC1_DMINT7, DMAC1_DMINT8, DMAC1_DMINT9,
-        DMAC1_DMINT10, DMAC1_DMINT11, DMAC1_DMAE,
-        HSPI,
+        WDT, TMU0, TMU1, TMU2, TMU2_TICPI,
+        HUDI, DMAC0, SCIF0, SCIF1, DMAC1, HSPI,
         SCIF2, SCIF3, SCIF4, SCIF5,
-        PCISERR, PCIINTA, PCIINTB, PCIINTC, PCIINTD,
-        PCIERR, PCIPWD3, PCIPWD2, PCIPWD1, PCIPWD0,
-        SIOF,
-        MMCIF_FSTAT, MMCIF_TRAN, MMCIF_ERR, MMCIF_FRDY,
-        DU,
-        GDTA_GACLI, GDTA_GAMCI, GDTA_GAERI,
+        PCISERR, PCIINTA, PCIINTB, PCIINTC, PCIINTD, PCIC5,
+        SIOF, MMCIF, DU, GDTA,
         TMU3, TMU4, TMU5,
         SSI0, SSI1,
         HAC0, HAC1,
-        FLCTL_FLSTE, FLCTL_FLEND, FLCTL_FLTRQ0, FLCTL_FLTRQ1,
-        GPIOI0, GPIOI1, GPIOI2, GPIOI3,
+        FLCTL, GPIO,
 
         /* interrupt groups */
 
-        TMU012, DMAC0, SCIF0, SCIF1, DMAC1,
-        PCIC5, MMCIF, GDTA, TMU345, FLCTL, GPIO
+        TMU012, TMU345
 };
 
 static struct intc_vect vectors[] __initdata = {
@@ -125,57 +106,45 @@ static struct intc_vect vectors[] __initdata = {
         INTC_VECT(TMU0, 0x580), INTC_VECT(TMU1, 0x5a0),
         INTC_VECT(TMU2, 0x5c0), INTC_VECT(TMU2_TICPI, 0x5e0),
         INTC_VECT(HUDI, 0x600),
-        INTC_VECT(DMAC0_DMINT0, 0x620), INTC_VECT(DMAC0_DMINT1, 0x640),
-        INTC_VECT(DMAC0_DMINT2, 0x660), INTC_VECT(DMAC0_DMINT3, 0x680),
-        INTC_VECT(DMAC0_DMINT4, 0x6a0), INTC_VECT(DMAC0_DMINT5, 0x6c0),
-        INTC_VECT(DMAC0_DMAE, 0x6e0),
-        INTC_VECT(SCIF0_ERI, 0x700), INTC_VECT(SCIF0_RXI, 0x720),
-        INTC_VECT(SCIF0_BRI, 0x740), INTC_VECT(SCIF0_TXI, 0x760),
-        INTC_VECT(SCIF1_ERI, 0x780), INTC_VECT(SCIF1_RXI, 0x7a0),
-        INTC_VECT(SCIF1_BRI, 0x7c0), INTC_VECT(SCIF1_TXI, 0x7e0),
-        INTC_VECT(DMAC1_DMINT6, 0x880), INTC_VECT(DMAC1_DMINT7, 0x8a0),
-        INTC_VECT(DMAC1_DMINT8, 0x8c0), INTC_VECT(DMAC1_DMINT9, 0x8e0),
-        INTC_VECT(DMAC1_DMINT10, 0x900), INTC_VECT(DMAC1_DMINT11, 0x920),
-        INTC_VECT(DMAC1_DMAE, 0x940),
+        INTC_VECT(DMAC0, 0x620), INTC_VECT(DMAC0, 0x640),
+        INTC_VECT(DMAC0, 0x660), INTC_VECT(DMAC0, 0x680),
+        INTC_VECT(DMAC0, 0x6a0), INTC_VECT(DMAC0, 0x6c0),
+        INTC_VECT(DMAC0, 0x6e0),
+        INTC_VECT(SCIF0, 0x700), INTC_VECT(SCIF0, 0x720),
+        INTC_VECT(SCIF0, 0x740), INTC_VECT(SCIF0, 0x760),
+        INTC_VECT(SCIF1, 0x780), INTC_VECT(SCIF1, 0x7a0),
+        INTC_VECT(SCIF1, 0x7c0), INTC_VECT(SCIF1, 0x7e0),
+        INTC_VECT(DMAC1, 0x880), INTC_VECT(DMAC1, 0x8a0),
+        INTC_VECT(DMAC1, 0x8c0), INTC_VECT(DMAC1, 0x8e0),
+        INTC_VECT(DMAC1, 0x900), INTC_VECT(DMAC1, 0x920),
+        INTC_VECT(DMAC1, 0x940),
         INTC_VECT(HSPI, 0x960),
         INTC_VECT(SCIF2, 0x980), INTC_VECT(SCIF3, 0x9a0),
         INTC_VECT(SCIF4, 0x9c0), INTC_VECT(SCIF5, 0x9e0),
         INTC_VECT(PCISERR, 0xa00), INTC_VECT(PCIINTA, 0xa20),
         INTC_VECT(PCIINTB, 0xa40), INTC_VECT(PCIINTC, 0xa60),
-        INTC_VECT(PCIINTD, 0xa80), INTC_VECT(PCIERR, 0xaa0),
-        INTC_VECT(PCIPWD3, 0xac0), INTC_VECT(PCIPWD2, 0xae0),
-        INTC_VECT(PCIPWD1, 0xb00), INTC_VECT(PCIPWD0, 0xb20),
+        INTC_VECT(PCIINTD, 0xa80), INTC_VECT(PCIC5, 0xaa0),
+        INTC_VECT(PCIC5, 0xac0), INTC_VECT(PCIC5, 0xae0),
+        INTC_VECT(PCIC5, 0xb00), INTC_VECT(PCIC5, 0xb20),
         INTC_VECT(SIOF, 0xc00),
-        INTC_VECT(MMCIF_FSTAT, 0xd00), INTC_VECT(MMCIF_TRAN, 0xd20),
-        INTC_VECT(MMCIF_ERR, 0xd40), INTC_VECT(MMCIF_FRDY, 0xd60),
+        INTC_VECT(MMCIF, 0xd00), INTC_VECT(MMCIF, 0xd20),
+        INTC_VECT(MMCIF, 0xd40), INTC_VECT(MMCIF, 0xd60),
         INTC_VECT(DU, 0xd80),
-        INTC_VECT(GDTA_GACLI, 0xda0), INTC_VECT(GDTA_GAMCI, 0xdc0),
-        INTC_VECT(GDTA_GAERI, 0xde0),
+        INTC_VECT(GDTA, 0xda0), INTC_VECT(GDTA, 0xdc0),
+        INTC_VECT(GDTA, 0xde0),
         INTC_VECT(TMU3, 0xe00), INTC_VECT(TMU4, 0xe20),
         INTC_VECT(TMU5, 0xe40),
         INTC_VECT(SSI0, 0xe80), INTC_VECT(SSI1, 0xea0),
         INTC_VECT(HAC0, 0xec0), INTC_VECT(HAC1, 0xee0),
-        INTC_VECT(FLCTL_FLSTE, 0xf00), INTC_VECT(FLCTL_FLEND, 0xf20),
-        INTC_VECT(FLCTL_FLTRQ0, 0xf40), INTC_VECT(FLCTL_FLTRQ1, 0xf60),
-        INTC_VECT(GPIOI0, 0xf80), INTC_VECT(GPIOI1, 0xfa0),
-        INTC_VECT(GPIOI2, 0xfc0), INTC_VECT(GPIOI3, 0xfe0),
+        INTC_VECT(FLCTL, 0xf00), INTC_VECT(FLCTL, 0xf20),
+        INTC_VECT(FLCTL, 0xf40), INTC_VECT(FLCTL, 0xf60),
+        INTC_VECT(GPIO, 0xf80), INTC_VECT(GPIO, 0xfa0),
+        INTC_VECT(GPIO, 0xfc0), INTC_VECT(GPIO, 0xfe0),
 };
 
 static struct intc_group groups[] __initdata = {
         INTC_GROUP(TMU012, TMU0, TMU1, TMU2, TMU2_TICPI),
-        INTC_GROUP(DMAC0, DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2,
-                   DMAC0_DMINT3, DMAC0_DMINT4, DMAC0_DMINT5, DMAC0_DMAE),
-        INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
-        INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI),
-        INTC_GROUP(DMAC1, DMAC1_DMINT6, DMAC1_DMINT7, DMAC1_DMINT8,
-                   DMAC1_DMINT9, DMAC1_DMINT10, DMAC1_DMINT11, DMAC1_DMAE),
-        INTC_GROUP(PCIC5, PCIERR, PCIPWD3, PCIPWD2, PCIPWD1, PCIPWD0),
-        INTC_GROUP(MMCIF, MMCIF_FSTAT, MMCIF_TRAN, MMCIF_ERR, MMCIF_FRDY),
-        INTC_GROUP(GDTA, GDTA_GACLI, GDTA_GAMCI, GDTA_GAERI),
         INTC_GROUP(TMU345, TMU3, TMU4, TMU5),
-        INTC_GROUP(FLCTL, FLCTL_FLSTE, FLCTL_FLEND,
-                   FLCTL_FLTRQ0, FLCTL_FLTRQ1),
-        INTC_GROUP(GPIO, GPIOI0, GPIOI1, GPIOI2, GPIOI3),
 };
 
 static struct intc_mask_reg mask_registers[] __initdata = {
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
new file mode 100644
index 000000000000..5a47e1cf442e
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
@@ -0,0 +1,490 @@
+/*
+ * SH7786 Setup
+ *
+ * Copyright (C) 2009  Renesas Solutions Corp.
+ * Kuninori Morimoto <morimoto.kuninori@renesas.com>
+ *
+ * Based on SH7785 Setup
+ *
+ *  Copyright (C) 2007  Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/platform_device.h>
+#include <linux/init.h>
+#include <linux/serial.h>
+#include <linux/serial_sci.h>
+#include <linux/io.h>
+#include <linux/mm.h>
+#include <linux/dma-mapping.h>
+#include <asm/mmzone.h>
+
+static struct plat_sci_port sci_platform_data[] = {
+        {
+                .mapbase        = 0xffea0000,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .type           = PORT_SCIF,
+                .irqs           = { 40, 41, 43, 42 },
+        },
+        /*
+         * The rest of these all have multiplexed IRQs
+         */
+        {
+                .mapbase        = 0xffeb0000,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .type           = PORT_SCIF,
+                .irqs           = { 44, 44, 44, 44 },
+        }, {
+                .mapbase        = 0xffec0000,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .type           = PORT_SCIF,
+                .irqs           = { 50, 50, 50, 50 },
+        }, {
+                .mapbase        = 0xffed0000,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .type           = PORT_SCIF,
+                .irqs           = { 51, 51, 51, 51 },
+        }, {
+                .mapbase        = 0xffee0000,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .type           = PORT_SCIF,
+                .irqs           = { 52, 52, 52, 52 },
+        }, {
+                .mapbase        = 0xffef0000,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .type           = PORT_SCIF,
+                .irqs           = { 53, 53, 53, 53 },
+        }, {
+                .flags = 0,
+        }
+};
+
+static struct platform_device sci_device = {
+        .name           = "sh-sci",
+        .id             = -1,
+        .dev            = {
+                .platform_data  = sci_platform_data,
+        },
+};
+
+static struct resource usb_ohci_resources[] = {
+        [0] = {
+                .start  = 0xffe70400,
+                .end    = 0xffe704ff,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 77,
+                .end    = 77,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static u64 usb_ohci_dma_mask = DMA_BIT_MASK(32);
+static struct platform_device usb_ohci_device = {
+        .name           = "sh_ohci",
+        .id             = -1,
+        .dev = {
+                .dma_mask               = &usb_ohci_dma_mask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+        .num_resources  = ARRAY_SIZE(usb_ohci_resources),
+        .resource       = usb_ohci_resources,
+};
+
+static struct platform_device *sh7786_devices[] __initdata = {
+        &sci_device,
+        &usb_ohci_device,
+};
+
+
+/*
+ * Please call this function if your platform board
+ * use external clock for USB
+ * */
+#define USBCTL0         0xffe70858
+#define CLOCK_MODE_MASK 0xffffff7f
+#define EXT_CLOCK_MODE  0x00000080
+void __init sh7786_usb_use_exclock(void)
+{
+        u32 val = __raw_readl(USBCTL0) & CLOCK_MODE_MASK;
+        __raw_writel(val | EXT_CLOCK_MODE, USBCTL0);
+}
+
+#define USBINITREG1     0xffe70094
+#define USBINITREG2     0xffe7009c
+#define USBINITVAL1     0x00ff0040
+#define USBINITVAL2     0x00000001
+
+#define USBPCTL1        0xffe70804
+#define USBST           0xffe70808
+#define PHY_ENB         0x00000001
+#define PLL_ENB         0x00000002
+#define PHY_RST         0x00000004
+#define ACT_PLL_STATUS  0xc0000000
+static void __init sh7786_usb_setup(void)
+{
+        int i = 1000000;
+
+        /*
+         * USB initial settings
+         *
+         * The following settings are necessary
+         * for using the USB modules.
+         *
+         * see "USB Inital Settings" for detail
+         */
+        __raw_writel(USBINITVAL1, USBINITREG1);
+        __raw_writel(USBINITVAL2, USBINITREG2);
+
+        /*
+         * Set the PHY and PLL enable bit
+         */
+        __raw_writel(PHY_ENB | PLL_ENB, USBPCTL1);
+        while (i-- &&
+               ((__raw_readl(USBST) & ACT_PLL_STATUS) != ACT_PLL_STATUS))
+                cpu_relax();
+
+        if (i) {
+                /* Set the PHY RST bit */
+                __raw_writel(PHY_ENB | PLL_ENB | PHY_RST, USBPCTL1);
+                printk(KERN_INFO "sh7786 usb setup done\n");
+        }
+}
+
+static int __init sh7786_devices_setup(void)
+{
+        sh7786_usb_setup();
+        return platform_add_devices(sh7786_devices,
+                                    ARRAY_SIZE(sh7786_devices));
+}
+device_initcall(sh7786_devices_setup);
+
+enum {
+        UNUSED = 0,
+
+        /* interrupt sources */
+
+        IRL0_LLLL, IRL0_LLLH, IRL0_LLHL, IRL0_LLHH,
+        IRL0_LHLL, IRL0_LHLH, IRL0_LHHL, IRL0_LHHH,
+        IRL0_HLLL, IRL0_HLLH, IRL0_HLHL, IRL0_HLHH,
+        IRL0_HHLL, IRL0_HHLH, IRL0_HHHL,
+
+        IRL4_LLLL, IRL4_LLLH, IRL4_LLHL, IRL4_LLHH,
+        IRL4_LHLL, IRL4_LHLH, IRL4_LHHL, IRL4_LHHH,
+        IRL4_HLLL, IRL4_HLLH, IRL4_HLHL, IRL4_HLHH,
+        IRL4_HHLL, IRL4_HHLH, IRL4_HHHL,
+
+        IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
+        WDT,
+        TMU0_0, TMU0_1, TMU0_2, TMU0_3,
+        TMU1_0, TMU1_1, TMU1_2,
+        DMAC0_0, DMAC0_1, DMAC0_2, DMAC0_3, DMAC0_4, DMAC0_5, DMAC0_6,
+        HUDI1, HUDI0,
+        DMAC1_0, DMAC1_1, DMAC1_2, DMAC1_3,
+        HPB_0, HPB_1, HPB_2,
+        SCIF0_0, SCIF0_1, SCIF0_2, SCIF0_3,
+        SCIF1,
+        TMU2, TMU3,
+        SCIF2, SCIF3, SCIF4, SCIF5,
+        Eth_0, Eth_1,
+        PCIeC0_0, PCIeC0_1, PCIeC0_2,
+        PCIeC1_0, PCIeC1_1, PCIeC1_2,
+        USB,
+        I2C0, I2C1,
+        DU,
+        SSI0, SSI1, SSI2, SSI3,
+        PCIeC2_0, PCIeC2_1, PCIeC2_2,
+        HAC0, HAC1,
+        FLCTL,
+        HSPI,
+        GPIO0, GPIO1,
+        Thermal,
+        INTC0, INTC1, INTC2, INTC3, INTC4, INTC5, INTC6, INTC7,
+
+        /* interrupt groups */
+};
+
+static struct intc_vect vectors[] __initdata = {
+        INTC_VECT(WDT, 0x3e0),
+        INTC_VECT(TMU0_0, 0x400), INTC_VECT(TMU0_1, 0x420),
+        INTC_VECT(TMU0_2, 0x440), INTC_VECT(TMU0_3, 0x460),
+        INTC_VECT(TMU1_0, 0x480), INTC_VECT(TMU1_1, 0x4a0),
+        INTC_VECT(TMU1_2, 0x4c0),
+        INTC_VECT(DMAC0_0, 0x500), INTC_VECT(DMAC0_1, 0x520),
+        INTC_VECT(DMAC0_2, 0x540), INTC_VECT(DMAC0_3, 0x560),
+        INTC_VECT(DMAC0_4, 0x580), INTC_VECT(DMAC0_5, 0x5a0),
+        INTC_VECT(DMAC0_6, 0x5c0),
+        INTC_VECT(HUDI1, 0x5e0), INTC_VECT(HUDI0, 0x600),
+        INTC_VECT(DMAC1_0, 0x620), INTC_VECT(DMAC1_1, 0x640),
+        INTC_VECT(DMAC1_2, 0x660), INTC_VECT(DMAC1_3, 0x680),
+        INTC_VECT(HPB_0, 0x6a0), INTC_VECT(HPB_1, 0x6c0),
+        INTC_VECT(HPB_2, 0x6e0),
+        INTC_VECT(SCIF0_0, 0x700), INTC_VECT(SCIF0_1, 0x720),
+        INTC_VECT(SCIF0_2, 0x740), INTC_VECT(SCIF0_3, 0x760),
+        INTC_VECT(SCIF1, 0x780),
+        INTC_VECT(TMU2, 0x7a0), INTC_VECT(TMU3, 0x7c0),
+        INTC_VECT(SCIF2, 0x840), INTC_VECT(SCIF3, 0x860),
+        INTC_VECT(SCIF4, 0x880), INTC_VECT(SCIF5, 0x8a0),
+        INTC_VECT(Eth_0, 0x8c0), INTC_VECT(Eth_1, 0x8e0),
+        INTC_VECT(PCIeC0_0, 0xae0), INTC_VECT(PCIeC0_1, 0xb00),
+        INTC_VECT(PCIeC0_2, 0xb20),
+        INTC_VECT(PCIeC1_0, 0xb40), INTC_VECT(PCIeC1_1, 0xb60),
+        INTC_VECT(PCIeC1_2, 0xb80),
+        INTC_VECT(USB, 0xba0),
+        INTC_VECT(I2C0, 0xcc0), INTC_VECT(I2C1, 0xce0),
+        INTC_VECT(DU, 0xd00),
+        INTC_VECT(SSI0, 0xd20), INTC_VECT(SSI1, 0xd40),
+        INTC_VECT(SSI2, 0xd60), INTC_VECT(SSI3, 0xd80),
+        INTC_VECT(PCIeC2_0, 0xda0), INTC_VECT(PCIeC2_1, 0xdc0),
+        INTC_VECT(PCIeC2_2, 0xde0),
+        INTC_VECT(HAC0, 0xe00), INTC_VECT(HAC1, 0xe20),
+        INTC_VECT(FLCTL, 0xe40),
+        INTC_VECT(HSPI, 0xe80),
+        INTC_VECT(GPIO0, 0xea0), INTC_VECT(GPIO1, 0xec0),
+        INTC_VECT(Thermal, 0xee0),
+};
+
+/* FIXME: Main CPU support only now */
+#if 1 /* Main CPU */
+#define CnINTMSK0       0xfe410030
+#define CnINTMSK1       0xfe410040
+#define CnINTMSKCLR0    0xfe410050
+#define CnINTMSKCLR1    0xfe410060
+#define CnINT2MSKR0     0xfe410a20
+#define CnINT2MSKR1     0xfe410a24
+#define CnINT2MSKR2     0xfe410a28
+#define CnINT2MSKR3     0xfe410a2c
+#define CnINT2MSKCR0    0xfe410a30
+#define CnINT2MSKCR1    0xfe410a34
+#define CnINT2MSKCR2    0xfe410a38
+#define CnINT2MSKCR3    0xfe410a3c
+#else /* Sub CPU */
+#define CnINTMSK0       0xfe410034
+#define CnINTMSK1       0xfe410044
+#define CnINTMSKCLR0    0xfe410054
+#define CnINTMSKCLR1    0xfe410064
+#define CnINT2MSKR0     0xfe410b20
+#define CnINT2MSKR1     0xfe410b24
+#define CnINT2MSKR2     0xfe410b28
+#define CnINT2MSKR3     0xfe410b2c
+#define CnINT2MSKCR0    0xfe410b30
+#define CnINT2MSKCR1    0xfe410b34
+#define CnINT2MSKCR2    0xfe410b38
+#define CnINT2MSKCR3    0xfe410b3c
+#endif
+
+#define INTMSK2         0xfe410068
+#define INTMSKCLR2      0xfe41006c
+
+static struct intc_mask_reg mask_registers[] __initdata = {
+        { CnINTMSK0, CnINTMSKCLR0, 32,
+          { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
+        { INTMSK2, INTMSKCLR2, 32,
+          { IRL0_LLLL, IRL0_LLLH, IRL0_LLHL, IRL0_LLHH,
+            IRL0_LHLL, IRL0_LHLH, IRL0_LHHL, IRL0_LHHH,
+            IRL0_HLLL, IRL0_HLLH, IRL0_HLHL, IRL0_HLHH,
+            IRL0_HHLL, IRL0_HHLH, IRL0_HHHL, 0,
+            IRL4_LLLL, IRL4_LLLH, IRL4_LLHL, IRL4_LLHH,
+            IRL4_LHLL, IRL4_LHLH, IRL4_LHHL, IRL4_LHHH,
+            IRL4_HLLL, IRL4_HLLH, IRL4_HLHL, IRL4_HLHH,
+            IRL4_HHLL, IRL4_HHLH, IRL4_HHHL, 0, } },
+        { CnINT2MSKR0, CnINT2MSKCR0 , 32,
+          { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+            0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, WDT } },
+        { CnINT2MSKR1, CnINT2MSKCR1, 32,
+          { TMU0_0, TMU0_1, TMU0_2, TMU0_3, TMU1_0, TMU1_1, TMU1_2, 0,
+            DMAC0_0, DMAC0_1, DMAC0_2, DMAC0_3, DMAC0_4, DMAC0_5, DMAC0_6,
+            HUDI1, HUDI0,
+            DMAC1_0, DMAC1_1, DMAC1_2, DMAC1_3,
+            HPB_0, HPB_1, HPB_2,
+            SCIF0_0, SCIF0_1, SCIF0_2, SCIF0_3,
+            SCIF1,
+            TMU2, TMU3, 0, } },
+        { CnINT2MSKR2, CnINT2MSKCR2, 32,
+          { 0, 0, SCIF2, SCIF3, SCIF4, SCIF5,
+            Eth_0, Eth_1,
+            0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+            PCIeC0_0, PCIeC0_1, PCIeC0_2,
+            PCIeC1_0, PCIeC1_1, PCIeC1_2,
+            USB, 0, 0 } },
+        { CnINT2MSKR3, CnINT2MSKCR3, 32,
+          { 0, 0, 0, 0, 0, 0,
+            I2C0, I2C1,
+            DU, SSI0, SSI1, SSI2, SSI3,
+            PCIeC2_0, PCIeC2_1, PCIeC2_2,
+            HAC0, HAC1,
+            FLCTL, 0,
+            HSPI, GPIO0, GPIO1, Thermal,
+            0, 0, 0, 0, 0, 0, 0, 0 } },
+};
+
+static struct intc_prio_reg prio_registers[] __initdata = {
+        { 0xfe410010, 0, 32, 4, /* INTPRI */   { IRQ0, IRQ1, IRQ2, IRQ3,
+                                                 IRQ4, IRQ5, IRQ6, IRQ7 } },
+        { 0xfe410800, 0, 32, 8, /* INT2PRI0 */ { 0, 0, 0, WDT } },
+        { 0xfe410804, 0, 32, 8, /* INT2PRI1 */ { TMU0_0, TMU0_1,
+                                                 TMU0_2, TMU0_3 } },
+        { 0xfe410808, 0, 32, 8, /* INT2PRI2 */ { TMU1_0, TMU1_1,
+                                                 TMU1_2, 0 } },
+        { 0xfe41080c, 0, 32, 8, /* INT2PRI3 */ { DMAC0_0, DMAC0_1,
+                                                 DMAC0_2, DMAC0_3 } },
+        { 0xfe410810, 0, 32, 8, /* INT2PRI4 */ { DMAC0_4, DMAC0_5,
+                                                 DMAC0_6, HUDI1 } },
+        { 0xfe410814, 0, 32, 8, /* INT2PRI5 */ { HUDI0, DMAC1_0,
+                                                 DMAC1_1, DMAC1_2 } },
+        { 0xfe410818, 0, 32, 8, /* INT2PRI6 */ { DMAC1_3, HPB_0,
+                                                 HPB_1, HPB_2 } },
+        { 0xfe41081c, 0, 32, 8, /* INT2PRI7 */ { SCIF0_0, SCIF0_1,
+                                                 SCIF0_2, SCIF0_3 } },
+        { 0xfe410820, 0, 32, 8, /* INT2PRI8 */ { SCIF1, TMU2, TMU3, 0 } },
+        { 0xfe410824, 0, 32, 8, /* INT2PRI9 */ { 0, 0, SCIF2, SCIF3 } },
+        { 0xfe410828, 0, 32, 8, /* INT2PRI10 */ { SCIF4, SCIF5,
+                                                  Eth_0, Eth_1 } },
+        { 0xfe41082c, 0, 32, 8, /* INT2PRI11 */ { 0, 0, 0, 0 } },
+        { 0xfe410830, 0, 32, 8, /* INT2PRI12 */ { 0, 0, 0, 0 } },
+        { 0xfe410834, 0, 32, 8, /* INT2PRI13 */ { 0, 0, 0, 0 } },
+        { 0xfe410838, 0, 32, 8, /* INT2PRI14 */ { 0, 0, 0, PCIeC0_0 } },
+        { 0xfe41083c, 0, 32, 8, /* INT2PRI15 */ { PCIeC0_1, PCIeC0_2,
+                                                  PCIeC1_0, PCIeC1_1 } },
+        { 0xfe410840, 0, 32, 8, /* INT2PRI16 */ { PCIeC1_2, USB, 0, 0 } },
+        { 0xfe410844, 0, 32, 8, /* INT2PRI17 */ { 0, 0, 0, 0 } },
+        { 0xfe410848, 0, 32, 8, /* INT2PRI18 */ { 0, 0, I2C0, I2C1 } },
+        { 0xfe41084c, 0, 32, 8, /* INT2PRI19 */ { DU, SSI0, SSI1, SSI2 } },
+        { 0xfe410850, 0, 32, 8, /* INT2PRI20 */ { SSI3, PCIeC2_0,
+                                                  PCIeC2_1, PCIeC2_2 } },
+        { 0xfe410854, 0, 32, 8, /* INT2PRI21 */ { HAC0, HAC1, FLCTL, 0 } },
+        { 0xfe410858, 0, 32, 8, /* INT2PRI22 */ { HSPI, GPIO0,
+                                                  GPIO1, Thermal } },
+        { 0xfe41085c, 0, 32, 8, /* INT2PRI23 */ { 0, 0, 0, 0 } },
+        { 0xfe410860, 0, 32, 8, /* INT2PRI24 */ { 0, 0, 0, 0 } },
+};
+
+static DECLARE_INTC_DESC(intc_desc, "sh7786", vectors, NULL,
+                         mask_registers, prio_registers, NULL);
+
+/* Support for external interrupt pins in IRQ mode */
+
+static struct intc_vect vectors_irq0123[] __initdata = {
+        INTC_VECT(IRQ0, 0x200), INTC_VECT(IRQ1, 0x240),
+        INTC_VECT(IRQ2, 0x280), INTC_VECT(IRQ3, 0x2c0),
+};
+
+static struct intc_vect vectors_irq4567[] __initdata = {
+        INTC_VECT(IRQ4, 0x300), INTC_VECT(IRQ5, 0x340),
+        INTC_VECT(IRQ6, 0x380), INTC_VECT(IRQ7, 0x3c0),
+};
+
+static struct intc_sense_reg sense_registers[] __initdata = {
+        { 0xfe41001c, 32, 2, /* ICR1 */   { IRQ0, IRQ1, IRQ2, IRQ3,
+                                            IRQ4, IRQ5, IRQ6, IRQ7 } },
+};
+
+static struct intc_mask_reg ack_registers[] __initdata = {
+        { 0xfe410024, 0, 32, /* INTREQ */
+          { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
+};
+
+static DECLARE_INTC_DESC_ACK(intc_desc_irq0123, "sh7786-irq0123",
+                             vectors_irq0123, NULL, mask_registers,
+                             prio_registers, sense_registers, ack_registers);
+
+static DECLARE_INTC_DESC_ACK(intc_desc_irq4567, "sh7786-irq4567",
+                             vectors_irq4567, NULL, mask_registers,
+                             prio_registers, sense_registers, ack_registers);
+
+/* External interrupt pins in IRL mode */
+
+static struct intc_vect vectors_irl0123[] __initdata = {
+        INTC_VECT(IRL0_LLLL, 0x200), INTC_VECT(IRL0_LLLH, 0x220),
+        INTC_VECT(IRL0_LLHL, 0x240), INTC_VECT(IRL0_LLHH, 0x260),
+        INTC_VECT(IRL0_LHLL, 0x280), INTC_VECT(IRL0_LHLH, 0x2a0),
+        INTC_VECT(IRL0_LHHL, 0x2c0), INTC_VECT(IRL0_LHHH, 0x2e0),
+        INTC_VECT(IRL0_HLLL, 0x300), INTC_VECT(IRL0_HLLH, 0x320),
+        INTC_VECT(IRL0_HLHL, 0x340), INTC_VECT(IRL0_HLHH, 0x360),
+        INTC_VECT(IRL0_HHLL, 0x380), INTC_VECT(IRL0_HHLH, 0x3a0),
+        INTC_VECT(IRL0_HHHL, 0x3c0),
+};
+
+static struct intc_vect vectors_irl4567[] __initdata = {
+        INTC_VECT(IRL4_LLLL, 0x900), INTC_VECT(IRL4_LLLH, 0x920),
+        INTC_VECT(IRL4_LLHL, 0x940), INTC_VECT(IRL4_LLHH, 0x960),
+        INTC_VECT(IRL4_LHLL, 0x980), INTC_VECT(IRL4_LHLH, 0x9a0),
+        INTC_VECT(IRL4_LHHL, 0x9c0), INTC_VECT(IRL4_LHHH, 0x9e0),
+        INTC_VECT(IRL4_HLLL, 0xa00), INTC_VECT(IRL4_HLLH, 0xa20),
+        INTC_VECT(IRL4_HLHL, 0xa40), INTC_VECT(IRL4_HLHH, 0xa60),
+        INTC_VECT(IRL4_HHLL, 0xa80), INTC_VECT(IRL4_HHLH, 0xaa0),
+        INTC_VECT(IRL4_HHHL, 0xac0),
+};
+
+static DECLARE_INTC_DESC(intc_desc_irl0123, "sh7786-irl0123", vectors_irl0123,
+                         NULL, mask_registers, NULL, NULL);
+
+static DECLARE_INTC_DESC(intc_desc_irl4567, "sh7786-irl4567", vectors_irl4567,
+                         NULL, mask_registers, NULL, NULL);
+
+#define INTC_ICR0       0xfe410000
+#define INTC_INTMSK0    CnINTMSK0
+#define INTC_INTMSK1    CnINTMSK1
+#define INTC_INTMSK2    INTMSK2
+#define INTC_INTMSKCLR1 CnINTMSKCLR1
+#define INTC_INTMSKCLR2 INTMSKCLR2
+
+void __init plat_irq_setup(void)
+{
+        /* disable IRQ3-0 + IRQ7-4 */
+        ctrl_outl(0xff000000, INTC_INTMSK0);
+
+        /* disable IRL3-0 + IRL7-4 */
+        ctrl_outl(0xc0000000, INTC_INTMSK1);
+        ctrl_outl(0xfffefffe, INTC_INTMSK2);
+
+        /* select IRL mode for IRL3-0 + IRL7-4 */
+        ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
+
+        register_intc_controller(&intc_desc);
+}
+
+void __init plat_irq_setup_pins(int mode)
+{
+        switch (mode) {
+        case IRQ_MODE_IRQ7654:
+                /* select IRQ mode for IRL7-4 */
+                ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00400000, INTC_ICR0);
+                register_intc_controller(&intc_desc_irq4567);
+                break;
+        case IRQ_MODE_IRQ3210:
+                /* select IRQ mode for IRL3-0 */
+                ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00800000, INTC_ICR0);
+                register_intc_controller(&intc_desc_irq0123);
+                break;
+        case IRQ_MODE_IRL7654:
+                /* enable IRL7-4 but don't provide any masking */
+                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
+                ctrl_outl(0x0000fffe, INTC_INTMSKCLR2);
+                break;
+        case IRQ_MODE_IRL3210:
+                /* enable IRL0-3 but don't provide any masking */
+                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
+                ctrl_outl(0xfffe0000, INTC_INTMSKCLR2);
+                break;
+        case IRQ_MODE_IRL7654_MASK:
+                /* enable IRL7-4 and mask using cpu intc controller */
+                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
+                register_intc_controller(&intc_desc_irl4567);
+                break;
+        case IRQ_MODE_IRL3210_MASK:
+                /* enable IRL0-3 and mask using cpu intc controller */
+                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
+                register_intc_controller(&intc_desc_irl0123);
+                break;
+        default:
+                BUG();
+        }
+}
+
+void __init plat_mem_setup(void)
+{
+}
diff --git a/arch/sh/kernel/cpu/shmobile/Makefile b/arch/sh/kernel/cpu/shmobile/Makefile
new file mode 100644
index 000000000000..08bfa7c7db29
--- /dev/null
+++ b/arch/sh/kernel/cpu/shmobile/Makefile
@@ -0,0 +1,6 @@
+#
+# Makefile for the Linux/SuperH SH-Mobile backends.
+#
+
+# Power Management & Sleep mode
+obj-$(CONFIG_PM)        += pm.o sleep.o
diff --git a/arch/sh/kernel/cpu/shmobile/pm.c b/arch/sh/kernel/cpu/shmobile/pm.c
new file mode 100644
index 000000000000..8c067adf6830
--- /dev/null
+++ b/arch/sh/kernel/cpu/shmobile/pm.c
@@ -0,0 +1,92 @@
+/*
+ * arch/sh/kernel/cpu/sh4a/pm-sh_mobile.c
+ *
+ * Power management support code for SuperH Mobile
+ *
+ *  Copyright (C) 2009 Magnus Damm
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <linux/suspend.h>
+#include <asm/suspend.h>
+#include <asm/uaccess.h>
+
+/*
+ * Sleep modes available on SuperH Mobile:
+ *
+ * Sleep mode is just plain "sleep" instruction
+ * Sleep Self-Refresh mode is above plus RAM put in Self-Refresh
+ * Standby Self-Refresh mode is above plus stopped clocks
+ */
+#define SUSP_MODE_SLEEP         (SUSP_SH_SLEEP)
+#define SUSP_MODE_SLEEP_SF      (SUSP_SH_SLEEP | SUSP_SH_SF)
+#define SUSP_MODE_STANDBY_SF    (SUSP_SH_STANDBY | SUSP_SH_SF)
+
+/*
+ * The following modes are not there yet:
+ *
+ * R-standby mode is unsupported, but will be added in the future
+ * U-standby mode is low priority since it needs bootloader hacks
+ *
+ * All modes should be tied in with cpuidle. But before that can
+ * happen we need to keep track of enabled hardware blocks so we
+ * can avoid entering sleep modes that stop clocks to hardware
+ * blocks that are in use even though the cpu core is idle.
+ */
+
+extern const unsigned char sh_mobile_standby[];
+extern const unsigned int sh_mobile_standby_size;
+
+static void sh_mobile_call_standby(unsigned long mode)
+{
+        extern void *vbr_base;
+        void *onchip_mem = (void *)0xe5200000; /* ILRAM */
+        void (*standby_onchip_mem)(unsigned long) = onchip_mem;
+
+        /* Note: Wake up from sleep may generate exceptions!
+         * Setup VBR to point to on-chip ram if self-refresh is
+         * going to be used.
+         */
+        if (mode & SUSP_SH_SF)
+                asm volatile("ldc %0, vbr" : : "r" (onchip_mem) : "memory");
+
+        /* Copy the assembly snippet to the otherwise ununsed ILRAM */
+        memcpy(onchip_mem, sh_mobile_standby, sh_mobile_standby_size);
+        wmb();
+        ctrl_barrier();
+
+        /* Let assembly snippet in on-chip memory handle the rest */
+        standby_onchip_mem(mode);
+
+        /* Put VBR back in System RAM again */
+        if (mode & SUSP_SH_SF)
+                asm volatile("ldc %0, vbr" : : "r" (&vbr_base) : "memory");
+}
+
+static int sh_pm_enter(suspend_state_t state)
+{
+        local_irq_disable();
+        set_bl_bit();
+        sh_mobile_call_standby(SUSP_MODE_STANDBY_SF);
+        local_irq_disable();
+        clear_bl_bit();
+        return 0;
+}
+
+static struct platform_suspend_ops sh_pm_ops = {
+        .enter          = sh_pm_enter,
+        .valid          = suspend_valid_only_mem,
+};
+
+static int __init sh_pm_init(void)
+{
+        suspend_set_ops(&sh_pm_ops);
+        return 0;
+}
+
+late_initcall(sh_pm_init);
diff --git a/arch/sh/kernel/cpu/shmobile/sleep.S b/arch/sh/kernel/cpu/shmobile/sleep.S
new file mode 100644
index 000000000000..5d888ef53d82
--- /dev/null
+++ b/arch/sh/kernel/cpu/shmobile/sleep.S
@@ -0,0 +1,125 @@
+/*
+ * arch/sh/kernel/cpu/sh4a/sleep-sh_mobile.S
+ *
+ * Sleep mode and Standby modes support for SuperH Mobile
+ *
+ *  Copyright (C) 2009 Magnus Damm
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/sys.h>
+#include <linux/errno.h>
+#include <linux/linkage.h>
+#include <asm/asm-offsets.h>
+#include <asm/suspend.h>
+
+/* manage self-refresh and enter standby mode.
+ * this code will be copied to on-chip memory and executed from there.
+ */
+
+        .balign         4096,0,4096
+ENTRY(sh_mobile_standby)
+        mov     r4, r0
+
+        tst     #SUSP_SH_SF, r0
+        bt      skip_set_sf
+
+        /* SDRAM: disable power down and put in self-refresh mode */
+        mov.l   1f, r4
+        mov.l   2f, r1
+        mov.l   @r4, r2
+        or      r1, r2
+        mov.l   3f, r3
+        and     r3, r2
+        mov.l   r2, @r4
+
+skip_set_sf:
+        tst     #SUSP_SH_SLEEP, r0
+        bt      test_standby
+
+        /* set mode to "sleep mode" */
+        bra     do_sleep
+         mov    #0x00, r1
+
+test_standby:
+        tst     #SUSP_SH_STANDBY, r0
+        bt      test_rstandby
+
+        /* set mode to "software standby mode" */
+        bra     do_sleep
+         mov    #0x80, r1
+
+test_rstandby:
+        tst     #SUSP_SH_RSTANDBY, r0
+        bt      test_ustandby
+
+        /* set mode to "r-standby mode" */
+        bra     do_sleep
+         mov    #0x20, r1
+
+test_ustandby:
+        tst     #SUSP_SH_USTANDBY, r0
+        bt      done_sleep
+
+        /* set mode to "u-standby mode" */
+        mov     #0x10, r1
+
+        /* fall-through */
+
+do_sleep:
+        /* setup and enter selected standby mode */
+        mov.l   5f, r4
+        mov.l   r1, @r4
+        sleep
+
+done_sleep:
+        /* reset standby mode to sleep mode */
+        mov.l   5f, r4
+        mov     #0x00, r1
+        mov.l   r1, @r4
+
+        tst     #SUSP_SH_SF, r0
+        bt      skip_restore_sf
+
+        /* SDRAM: set auto-refresh mode */
+        mov.l   1f, r4
+        mov.l   @r4, r2
+        mov.l   4f, r3
+        and     r3, r2
+        mov.l   r2, @r4
+        mov.l   6f, r4
+        mov.l   7f, r1
+        mov.l   8f, r2
+        mov.l   @r4, r3
+        mov     #-1, r4
+        add     r4, r3
+        or      r2, r3
+        mov.l   r3, @r1
+skip_restore_sf:
+        rts
+         nop
+
+        .balign 4
+1:      .long   0xfe400008 /* SDCR0 */
+2:      .long   0x00000400
+3:      .long   0xffff7fff
+4:      .long   0xfffffbff
+5:      .long   0xa4150020 /* STBCR */
+6:      .long   0xfe40001c /* RTCOR */
+7:      .long   0xfe400018 /* RTCNT */
+8:      .long   0xa55a0000
+
+/* interrupt vector @ 0x600 */
+        .balign         0x400,0,0x400
+        .long   0xdeadbeef
+        .balign         0x200,0,0x200
+        /* sh7722 will end up here in sleep mode */
+        rte
+         nop
+sh_mobile_standby_end:
+
+ENTRY(sh_mobile_standby_size)
+        .long sh_mobile_standby_end - sh_mobile_standby
diff --git a/arch/sh/kernel/gpio.c b/arch/sh/kernel/gpio.c
index d37165361034..d22e5af699f9 100644
--- a/arch/sh/kernel/gpio.c
+++ b/arch/sh/kernel/gpio.c
@@ -19,36 +19,75 @@
 #include <linux/bitops.h>
 #include <linux/gpio.h>
 
-static struct pinmux_info *registered_gpio;
+static int enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r)
+{
+        if (enum_id < r->begin)
+                return 0;
 
-static struct pinmux_info *gpio_controller(unsigned gpio)
+        if (enum_id > r->end)
+                return 0;
+
+        return 1;
+}
+
+static unsigned long gpio_read_raw_reg(unsigned long reg,
+                                       unsigned long reg_width)
 {
-        if (!registered_gpio)
-                return NULL;
+        switch (reg_width) {
+        case 8:
+                return ctrl_inb(reg);
+        case 16:
+                return ctrl_inw(reg);
+        case 32:
+                return ctrl_inl(reg);
+        }
 
-        if (gpio < registered_gpio->first_gpio)
-                return NULL;
+        BUG();
+        return 0;
+}
 
-        if (gpio > registered_gpio->last_gpio)
-                return NULL;
+static void gpio_write_raw_reg(unsigned long reg,
+                               unsigned long reg_width,
+                               unsigned long data)
+{
+        switch (reg_width) {
+        case 8:
+                ctrl_outb(data, reg);
+                return;
+        case 16:
+                ctrl_outw(data, reg);
+                return;
+        case 32:
+                ctrl_outl(data, reg);
+                return;
+        }
 
-        return registered_gpio;
+        BUG();
 }
 
-static int enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r)
+static void gpio_write_bit(struct pinmux_data_reg *dr,
+                           unsigned long in_pos, unsigned long value)
 {
-        if (enum_id < r->begin)
-                return 0;
+        unsigned long pos;
 
-        if (enum_id > r->end)
-                return 0;
+        pos = dr->reg_width - (in_pos + 1);
 
-        return 1;
+#ifdef DEBUG
+        pr_info("write_bit addr = %lx, value = %ld, pos = %ld, "
+                "r_width = %ld\n",
+                dr->reg, !!value, pos, dr->reg_width);
+#endif
+
+        if (value)
+                set_bit(pos, &dr->reg_shadow);
+        else
+                clear_bit(pos, &dr->reg_shadow);
+
+        gpio_write_raw_reg(dr->reg, dr->reg_width, dr->reg_shadow);
 }
 
-static int read_write_reg(unsigned long reg, unsigned long reg_width,
-                          unsigned long field_width, unsigned long in_pos,
-                          unsigned long value, int do_write)
+static int gpio_read_reg(unsigned long reg, unsigned long reg_width,
+                         unsigned long field_width, unsigned long in_pos)
 {
         unsigned long data, mask, pos;
 
@@ -57,52 +96,53 @@ static int read_write_reg(unsigned long reg, unsigned long reg_width,
         pos = reg_width - ((in_pos + 1) * field_width);
 
 #ifdef DEBUG
-        pr_info("%s, addr = %lx, value = %ld, pos = %ld, "
+        pr_info("read_reg: addr = %lx, pos = %ld, "
                 "r_width = %ld, f_width = %ld\n",
-                do_write ? "write" : "read", reg, value, pos,
-                reg_width, field_width);
+                reg, pos, reg_width, field_width);
 #endif
 
-        switch (reg_width) {
-        case 8:
-                data = ctrl_inb(reg);
-                break;
-        case 16:
-                data = ctrl_inw(reg);
-                break;
-        case 32:
-                data = ctrl_inl(reg);
-                break;
-        }
+        data = gpio_read_raw_reg(reg, reg_width);
+        return (data >> pos) & mask;
+}
 
-        if (!do_write)
-                return (data >> pos) & mask;
+static void gpio_write_reg(unsigned long reg, unsigned long reg_width,
+                           unsigned long field_width, unsigned long in_pos,
+                           unsigned long value)
+{
+        unsigned long mask, pos;
 
-        data &= ~(mask << pos);
-        data |= value << pos;
+        mask = (1 << field_width) - 1;
+        pos = reg_width - ((in_pos + 1) * field_width);
+
+#ifdef DEBUG
+        pr_info("write_reg addr = %lx, value = %ld, pos = %ld, "
+                "r_width = %ld, f_width = %ld\n",
+                reg, value, pos, reg_width, field_width);
+#endif
+
+        mask = ~(mask << pos);
+        value = value << pos;
 
         switch (reg_width) {
         case 8:
-                ctrl_outb(data, reg);
+                ctrl_outb((ctrl_inb(reg) & mask) | value, reg);
                 break;
         case 16:
-                ctrl_outw(data, reg);
+                ctrl_outw((ctrl_inw(reg) & mask) | value, reg);
                 break;
         case 32:
-                ctrl_outl(data, reg);
+                ctrl_outl((ctrl_inl(reg) & mask) | value, reg);
                 break;
         }
-        return 0;
 }
 
-static int get_data_reg(struct pinmux_info *gpioc, unsigned gpio,
-                        struct pinmux_data_reg **drp, int *bitp)
+static int setup_data_reg(struct pinmux_info *gpioc, unsigned gpio)
 {
-        pinmux_enum_t enum_id = gpioc->gpios[gpio].enum_id;
+        struct pinmux_gpio *gpiop = &gpioc->gpios[gpio];
         struct pinmux_data_reg *data_reg;
         int k, n;
 
-        if (!enum_in_range(enum_id, &gpioc->data))
+        if (!enum_in_range(gpiop->enum_id, &gpioc->data))
                 return -1;
 
         k = 0;
@@ -113,19 +153,58 @@ static int get_data_reg(struct pinmux_info *gpioc, unsigned gpio,
                         break;
 
                 for (n = 0; n < data_reg->reg_width; n++) {
-                        if (data_reg->enum_ids[n] == enum_id) {
-                                *drp = data_reg;
-                                *bitp = n;
+                        if (data_reg->enum_ids[n] == gpiop->enum_id) {
+                                gpiop->flags &= ~PINMUX_FLAG_DREG;
+                                gpiop->flags |= (k << PINMUX_FLAG_DREG_SHIFT);
+                                gpiop->flags &= ~PINMUX_FLAG_DBIT;
+                                gpiop->flags |= (n << PINMUX_FLAG_DBIT_SHIFT);
                                 return 0;
-
                         }
                 }
                 k++;
         }
 
+        BUG();
+
         return -1;
 }
 
+static void setup_data_regs(struct pinmux_info *gpioc)
+{
+        struct pinmux_data_reg *drp;
+        int k;
+
+        for (k = gpioc->first_gpio; k <= gpioc->last_gpio; k++)
+                setup_data_reg(gpioc, k);
+
+        k = 0;
+        while (1) {
+                drp = gpioc->data_regs + k;
+
+                if (!drp->reg_width)
+                        break;
+
+                drp->reg_shadow = gpio_read_raw_reg(drp->reg, drp->reg_width);
+                k++;
+        }
+}
+
+static int get_data_reg(struct pinmux_info *gpioc, unsigned gpio,
+                        struct pinmux_data_reg **drp, int *bitp)
+{
+        struct pinmux_gpio *gpiop = &gpioc->gpios[gpio];
+        int k, n;
+
+        if (!enum_in_range(gpiop->enum_id, &gpioc->data))
+                return -1;
+
+        k = (gpiop->flags & PINMUX_FLAG_DREG) >> PINMUX_FLAG_DREG_SHIFT;
+        n = (gpiop->flags & PINMUX_FLAG_DBIT) >> PINMUX_FLAG_DBIT_SHIFT;
+        *drp = gpioc->data_regs + k;
+        *bitp = n;
+        return 0;
+}
+
 static int get_config_reg(struct pinmux_info *gpioc, pinmux_enum_t enum_id,
                           struct pinmux_cfg_reg **crp, int *indexp,
                           unsigned long **cntp)
@@ -187,9 +266,9 @@ static int get_gpio_enum_id(struct pinmux_info *gpioc, unsigned gpio,
         return -1;
 }
 
-static int write_config_reg(struct pinmux_info *gpioc,
-                            struct pinmux_cfg_reg *crp,
-                            int index)
+static void write_config_reg(struct pinmux_info *gpioc,
+                             struct pinmux_cfg_reg *crp,
+                             int index)
 {
         unsigned long ncomb, pos, value;
 
@@ -197,8 +276,7 @@ static int write_config_reg(struct pinmux_info *gpioc,
         pos = index / ncomb;
         value = index % ncomb;
 
-        return read_write_reg(crp->reg, crp->reg_width,
-                              crp->field_width, pos, value, 1);
+        gpio_write_reg(crp->reg, crp->reg_width, crp->field_width, pos, value);
 }
 
 static int check_config_reg(struct pinmux_info *gpioc,
@@ -211,8 +289,8 @@ static int check_config_reg(struct pinmux_info *gpioc,
         pos = index / ncomb;
         value = index % ncomb;
 
-        if (read_write_reg(crp->reg, crp->reg_width,
-                           crp->field_width, pos, 0, 0) == value)
+        if (gpio_read_reg(crp->reg, crp->reg_width,
+                          crp->field_width, pos) == value)
                 return 0;
 
         return -1;
@@ -220,8 +298,8 @@ static int check_config_reg(struct pinmux_info *gpioc,
 
 enum { GPIO_CFG_DRYRUN, GPIO_CFG_REQ, GPIO_CFG_FREE };
 
-int pinmux_config_gpio(struct pinmux_info *gpioc, unsigned gpio,
-                       int pinmux_type, int cfg_mode)
+static int pinmux_config_gpio(struct pinmux_info *gpioc, unsigned gpio,
+                              int pinmux_type, int cfg_mode)
 {
         struct pinmux_cfg_reg *cr = NULL;
         pinmux_enum_t enum_id;
@@ -287,8 +365,7 @@ int pinmux_config_gpio(struct pinmux_info *gpioc, unsigned gpio,
                         break;
 
                 case GPIO_CFG_REQ:
-                        if (write_config_reg(gpioc, cr, index) != 0)
-                                goto out_err;
+                        write_config_reg(gpioc, cr, index);
                         *cntp = *cntp + 1;
                         break;
 
@@ -305,9 +382,14 @@ int pinmux_config_gpio(struct pinmux_info *gpioc, unsigned gpio,
 
 static DEFINE_SPINLOCK(gpio_lock);
 
-int __gpio_request(unsigned gpio)
+static struct pinmux_info *chip_to_pinmux(struct gpio_chip *chip)
 {
-        struct pinmux_info *gpioc = gpio_controller(gpio);
+        return container_of(chip, struct pinmux_info, chip);
+}
+
+static int sh_gpio_request(struct gpio_chip *chip, unsigned offset)
+{
+        struct pinmux_info *gpioc = chip_to_pinmux(chip);
         struct pinmux_data_reg *dummy;
         unsigned long flags;
         int i, ret, pinmux_type;
@@ -319,29 +401,30 @@ int __gpio_request(unsigned gpio)
 
         spin_lock_irqsave(&gpio_lock, flags);
 
-        if ((gpioc->gpios[gpio].flags & PINMUX_FLAG_TYPE) != PINMUX_TYPE_NONE)
+        if ((gpioc->gpios[offset].flags & PINMUX_FLAG_TYPE) != PINMUX_TYPE_NONE)
                 goto err_unlock;
 
         /* setup pin function here if no data is associated with pin */
 
-        if (get_data_reg(gpioc, gpio, &dummy, &i) != 0)
+        if (get_data_reg(gpioc, offset, &dummy, &i) != 0)
                 pinmux_type = PINMUX_TYPE_FUNCTION;
         else
                 pinmux_type = PINMUX_TYPE_GPIO;
 
         if (pinmux_type == PINMUX_TYPE_FUNCTION) {
-                if (pinmux_config_gpio(gpioc, gpio,
+                if (pinmux_config_gpio(gpioc, offset,
                                        pinmux_type,
                                        GPIO_CFG_DRYRUN) != 0)
                         goto err_unlock;
 
-                if (pinmux_config_gpio(gpioc, gpio,
+                if (pinmux_config_gpio(gpioc, offset,
                                        pinmux_type,
                                        GPIO_CFG_REQ) != 0)
                         BUG();
         }
 
-        gpioc->gpios[gpio].flags = pinmux_type;
+        gpioc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
+        gpioc->gpios[offset].flags |= pinmux_type;
 
         ret = 0;
  err_unlock:
@@ -349,11 +432,10 @@ int __gpio_request(unsigned gpio)
  err_out:
         return ret;
 }
-EXPORT_SYMBOL(__gpio_request);
 
-void gpio_free(unsigned gpio)
+static void sh_gpio_free(struct gpio_chip *chip, unsigned offset)
 {
-        struct pinmux_info *gpioc = gpio_controller(gpio);
+        struct pinmux_info *gpioc = chip_to_pinmux(chip);
         unsigned long flags;
         int pinmux_type;
 
@@ -362,20 +444,23 @@ void gpio_free(unsigned gpio)
 
         spin_lock_irqsave(&gpio_lock, flags);
 
-        pinmux_type = gpioc->gpios[gpio].flags & PINMUX_FLAG_TYPE;
-        pinmux_config_gpio(gpioc, gpio, pinmux_type, GPIO_CFG_FREE);
-        gpioc->gpios[gpio].flags = PINMUX_TYPE_NONE;
+        pinmux_type = gpioc->gpios[offset].flags & PINMUX_FLAG_TYPE;
+        pinmux_config_gpio(gpioc, offset, pinmux_type, GPIO_CFG_FREE);
+        gpioc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
+        gpioc->gpios[offset].flags |= PINMUX_TYPE_NONE;
 
         spin_unlock_irqrestore(&gpio_lock, flags);
 }
-EXPORT_SYMBOL(gpio_free);
 
 static int pinmux_direction(struct pinmux_info *gpioc,
                             unsigned gpio, int new_pinmux_type)
 {
-        int ret, pinmux_type;
+        int pinmux_type;
+        int ret = -EINVAL;
+
+        if (!gpioc)
+                goto err_out;
 
-        ret = -EINVAL;
         pinmux_type = gpioc->gpios[gpio].flags & PINMUX_FLAG_TYPE;
 
         switch (pinmux_type) {
@@ -401,102 +486,99 @@ static int pinmux_direction(struct pinmux_info *gpioc,
                                GPIO_CFG_REQ) != 0)
                 BUG();
 
-        gpioc->gpios[gpio].flags = new_pinmux_type;
+        gpioc->gpios[gpio].flags &= ~PINMUX_FLAG_TYPE;
+        gpioc->gpios[gpio].flags |= new_pinmux_type;
 
         ret = 0;
  err_out:
         return ret;
 }
 
-int gpio_direction_input(unsigned gpio)
+static int sh_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
 {
-        struct pinmux_info *gpioc = gpio_controller(gpio);
+        struct pinmux_info *gpioc = chip_to_pinmux(chip);
         unsigned long flags;
-        int ret = -EINVAL;
-
-        if (!gpioc)
-                goto err_out;
+        int ret;
 
         spin_lock_irqsave(&gpio_lock, flags);
-        ret = pinmux_direction(gpioc, gpio, PINMUX_TYPE_INPUT);
+        ret = pinmux_direction(gpioc, offset, PINMUX_TYPE_INPUT);
         spin_unlock_irqrestore(&gpio_lock, flags);
- err_out:
+
         return ret;
 }
-EXPORT_SYMBOL(gpio_direction_input);
 
-static int __gpio_get_set_value(struct pinmux_info *gpioc,
-                                unsigned gpio, int value,
-                                int do_write)
+static void sh_gpio_set_value(struct pinmux_info *gpioc,
+                             unsigned gpio, int value)
 {
         struct pinmux_data_reg *dr = NULL;
         int bit = 0;
 
-        if (get_data_reg(gpioc, gpio, &dr, &bit) != 0)
+        if (!gpioc || get_data_reg(gpioc, gpio, &dr, &bit) != 0)
                 BUG();
         else
-                value = read_write_reg(dr->reg, dr->reg_width,
-                                       1, bit, !!value, do_write);
-
-        return value;
+                gpio_write_bit(dr, bit, value);
 }
 
-int gpio_direction_output(unsigned gpio, int value)
+static int sh_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
+                                    int value)
 {
-        struct pinmux_info *gpioc = gpio_controller(gpio);
+        struct pinmux_info *gpioc = chip_to_pinmux(chip);
         unsigned long flags;
-        int ret = -EINVAL;
-
-        if (!gpioc)
-                goto err_out;
+        int ret;
 
+        sh_gpio_set_value(gpioc, offset, value);
         spin_lock_irqsave(&gpio_lock, flags);
-        __gpio_get_set_value(gpioc, gpio, value, 1);
-        ret = pinmux_direction(gpioc, gpio, PINMUX_TYPE_OUTPUT);
+        ret = pinmux_direction(gpioc, offset, PINMUX_TYPE_OUTPUT);
         spin_unlock_irqrestore(&gpio_lock, flags);
- err_out:
+
         return ret;
 }
-EXPORT_SYMBOL(gpio_direction_output);
 
-int gpio_get_value(unsigned gpio)
+static int sh_gpio_get_value(struct pinmux_info *gpioc, unsigned gpio)
 {
-        struct pinmux_info *gpioc = gpio_controller(gpio);
-        unsigned long flags;
-        int value = 0;
+        struct pinmux_data_reg *dr = NULL;
+        int bit = 0;
 
-        if (!gpioc)
+        if (!gpioc || get_data_reg(gpioc, gpio, &dr, &bit) != 0) {
                 BUG();
-        else {
-                spin_lock_irqsave(&gpio_lock, flags);
-                value = __gpio_get_set_value(gpioc, gpio, 0, 0);
-                spin_unlock_irqrestore(&gpio_lock, flags);
+                return 0;
         }
 
-        return value;
+        return gpio_read_reg(dr->reg, dr->reg_width, 1, bit);
 }
-EXPORT_SYMBOL(gpio_get_value);
 
-void gpio_set_value(unsigned gpio, int value)
+static int sh_gpio_get(struct gpio_chip *chip, unsigned offset)
 {
-        struct pinmux_info *gpioc = gpio_controller(gpio);
-        unsigned long flags;
+        return sh_gpio_get_value(chip_to_pinmux(chip), offset);
+}
 
-        if (!gpioc)
-                BUG();
-        else {
-                spin_lock_irqsave(&gpio_lock, flags);
-                __gpio_get_set_value(gpioc, gpio, value, 1);
-                spin_unlock_irqrestore(&gpio_lock, flags);
-        }
+static void sh_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
+{
+        sh_gpio_set_value(chip_to_pinmux(chip), offset, value);
 }
-EXPORT_SYMBOL(gpio_set_value);
 
 int register_pinmux(struct pinmux_info *pip)
 {
-        registered_gpio = pip;
-        pr_info("pinmux: %s handling gpio %d -> %d\n",
+        struct gpio_chip *chip = &pip->chip;
+
+        pr_info("sh pinmux: %s handling gpio %d -> %d\n",
                 pip->name, pip->first_gpio, pip->last_gpio);
 
-        return 0;
+        setup_data_regs(pip);
+
+        chip->request = sh_gpio_request;
+        chip->free = sh_gpio_free;
+        chip->direction_input = sh_gpio_direction_input;
+        chip->get = sh_gpio_get;
+        chip->direction_output = sh_gpio_direction_output;
+        chip->set = sh_gpio_set;
+
+        WARN_ON(pip->first_gpio != 0); /* needs testing */
+
+        chip->label = pip->name;
+        chip->owner = THIS_MODULE;
+        chip->base = pip->first_gpio;
+        chip->ngpio = (pip->last_gpio - pip->first_gpio) + 1;
+
+        return gpiochip_add(chip);
 }
diff --git a/arch/sh/kernel/irq.c b/arch/sh/kernel/irq.c
index 64b7690c664c..3f1372eb0091 100644
--- a/arch/sh/kernel/irq.c
+++ b/arch/sh/kernel/irq.c
@@ -51,7 +51,7 @@ int show_interrupts(struct seq_file *p, void *v)
                         goto unlock;
                 seq_printf(p, "%3d: ",i);
                 for_each_online_cpu(j)
-                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
+                        seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
                 seq_printf(p, " %14s", irq_desc[i].chip->name);
                 seq_printf(p, "-%-8s", irq_desc[i].name);
                 seq_printf(p, "  %s", action->name);
@@ -106,7 +106,7 @@ asmlinkage int do_IRQ(unsigned int irq, struct pt_regs *regs)
         }
 #endif
 
-        irq = irq_demux(evt2irq(irq));
+        irq = irq_demux(intc_evt2irq(irq));
 
 #ifdef CONFIG_IRQSTACKS
         curctx = (union irq_ctx *)current_thread_info();
diff --git a/arch/sh/kernel/machine_kexec.c b/arch/sh/kernel/machine_kexec.c
index 94df56b0d1f6..7ea2704ea033 100644
--- a/arch/sh/kernel/machine_kexec.c
+++ b/arch/sh/kernel/machine_kexec.c
@@ -14,21 +14,22 @@
 #include <linux/delay.h>
 #include <linux/reboot.h>
 #include <linux/numa.h>
+#include <linux/ftrace.h>
+#include <linux/suspend.h>
 #include <asm/pgtable.h>
 #include <asm/pgalloc.h>
 #include <asm/mmu_context.h>
 #include <asm/io.h>
 #include <asm/cacheflush.h>
 
-typedef NORET_TYPE void (*relocate_new_kernel_t)(
-                                unsigned long indirection_page,
-                                unsigned long reboot_code_buffer,
-                                unsigned long start_address,
-                                unsigned long vbr_reg) ATTRIB_NORET;
+typedef void (*relocate_new_kernel_t)(unsigned long indirection_page,
+                                      unsigned long reboot_code_buffer,
+                                      unsigned long start_address);
 
 extern const unsigned char relocate_new_kernel[];
 extern const unsigned int relocate_new_kernel_size;
 extern void *gdb_vbr_vector;
+extern void *vbr_base;
 
 void machine_shutdown(void)
 {
@@ -45,6 +46,12 @@ void machine_crash_shutdown(struct pt_regs *regs)
  */
 int machine_kexec_prepare(struct kimage *image)
 {
+        /* older versions of kexec-tools are passing
+         * the zImage entry point as a virtual address.
+         */
+        if (image->start != PHYSADDR(image->start))
+                return -EINVAL; /* upgrade your kexec-tools */
+
         return 0;
 }
 
@@ -73,17 +80,33 @@ static void kexec_info(struct kimage *image)
  */
 void machine_kexec(struct kimage *image)
 {
-
         unsigned long page_list;
         unsigned long reboot_code_buffer;
-        unsigned long vbr_reg;
         relocate_new_kernel_t rnk;
+        unsigned long entry;
+        unsigned long *ptr;
+        int save_ftrace_enabled;
+
+        /*
+         * Nicked from the mips version of machine_kexec():
+         * The generic kexec code builds a page list with physical
+         * addresses. Use phys_to_virt() to convert them to virtual.
+         */
+        for (ptr = &image->head; (entry = *ptr) && !(entry & IND_DONE);
+             ptr = (entry & IND_INDIRECTION) ?
+               phys_to_virt(entry & PAGE_MASK) : ptr + 1) {
+                if (*ptr & IND_SOURCE || *ptr & IND_INDIRECTION ||
+                    *ptr & IND_DESTINATION)
+                        *ptr = (unsigned long) phys_to_virt(*ptr);
+        }
 
-#if defined(CONFIG_SH_STANDARD_BIOS)
-        vbr_reg = ((unsigned long )gdb_vbr_vector) - 0x100;
-#else
-        vbr_reg = 0x80000000;  // dummy
+#ifdef CONFIG_KEXEC_JUMP
+        if (image->preserve_context)
+                save_processor_state();
 #endif
+
+        save_ftrace_enabled = __ftrace_enabled_save();
+
         /* Interrupts aren't acceptable while we reboot */
         local_irq_disable();
 
@@ -97,12 +120,37 @@ void machine_kexec(struct kimage *image)
         memcpy((void *)reboot_code_buffer, relocate_new_kernel,
                                                 relocate_new_kernel_size);
 
-        kexec_info(image);
+        kexec_info(image);
         flush_cache_all();
 
+#if defined(CONFIG_SH_STANDARD_BIOS)
+        asm volatile("ldc %0, vbr" :
+                     : "r" (((unsigned long) gdb_vbr_vector) - 0x100)
+                     : "memory");
+#endif
+
         /* now call it */
         rnk = (relocate_new_kernel_t) reboot_code_buffer;
-        (*rnk)(page_list, reboot_code_buffer, P2SEGADDR(image->start), vbr_reg);
+        (*rnk)(page_list, reboot_code_buffer,
+               (unsigned long)phys_to_virt(image->start));
+
+#ifdef CONFIG_KEXEC_JUMP
+        asm volatile("ldc %0, vbr" : : "r" (&vbr_base) : "memory");
+
+        if (image->preserve_context)
+                restore_processor_state();
+
+        /* Convert page list back to physical addresses, what a mess. */
+        for (ptr = &image->head; (entry = *ptr) && !(entry & IND_DONE);
+             ptr = (*ptr & IND_INDIRECTION) ?
+               phys_to_virt(*ptr & PAGE_MASK) : ptr + 1) {
+                if (*ptr & IND_SOURCE || *ptr & IND_INDIRECTION ||
+                    *ptr & IND_DESTINATION)
+                        *ptr = virt_to_phys(*ptr);
+        }
+#endif
+
+        __ftrace_enabled_restore(save_ftrace_enabled);
 }
 
 void arch_crash_save_vmcoreinfo(void)
diff --git a/arch/sh/kernel/relocate_kernel.S b/arch/sh/kernel/relocate_kernel.S
index c66cb3209db5..fcc9934fb97b 100644
--- a/arch/sh/kernel/relocate_kernel.S
+++ b/arch/sh/kernel/relocate_kernel.S
@@ -4,6 +4,8 @@
  *
  * LANDISK/sh4 is supported. Maybe, SH archtecture works well.
  *
+ * 2009-03-18 Magnus Damm - Added Kexec Jump support
+ *
  * This source code is licensed under the GNU General Public License,
  * Version 2.  See the file COPYING for more details.
  */
@@ -16,23 +18,141 @@ relocate_new_kernel:
         /* r4 = indirection_page   */
         /* r5 = reboot_code_buffer */
         /* r6 = start_address      */
-        /* r7 = vbr_reg            */
 
-        mov.l   10f,r8    /* PAGE_SIZE */
-        mov.l   11f,r9    /* P2SEG */
+        mov.l   10f, r0         /* PAGE_SIZE */
+        add     r5, r0          /* setup new stack at end of control page */
+
+        /* save r15->r8 to new stack */
+        mov.l   r15, @-r0
+        mov     r0, r15
+        mov.l   r14, @-r15
+        mov.l   r13, @-r15
+        mov.l   r12, @-r15
+        mov.l   r11, @-r15
+        mov.l   r10, @-r15
+        mov.l   r9, @-r15
+        mov.l   r8, @-r15
+
+        /* save other random registers */
+        sts.l   macl, @-r15
+        sts.l   mach, @-r15
+        stc.l   gbr, @-r15
+        stc.l   ssr, @-r15
+        stc.l   sr, @-r15
+        sts.l   pr, @-r15
+        stc.l   spc, @-r15
+
+        /* switch to bank1 and save r7->r0 */
+        mov.l   12f, r9
+        stc     sr, r8
+        or      r9, r8
+        ldc     r8, sr
+        mov.l   r7, @-r15
+        mov.l   r6, @-r15
+        mov.l   r5, @-r15
+        mov.l   r4, @-r15
+        mov.l   r3, @-r15
+        mov.l   r2, @-r15
+        mov.l   r1, @-r15
+        mov.l   r0, @-r15
+
+        /* switch to bank0 and save r7->r0 */
+        mov.l   12f, r9
+        not     r9, r9
+        stc     sr, r8
+        and     r9, r8
+        ldc     r8, sr
+        mov.l   r7, @-r15
+        mov.l   r6, @-r15
+        mov.l   r5, @-r15
+        mov.l   r4, @-r15
+        mov.l   r3, @-r15
+        mov.l   r2, @-r15
+        mov.l   r1, @-r15
+        mov.l   r0, @-r15
+
+        mov.l   r4, @-r15       /* save indirection page again */
+
+        bsr     swap_pages      /* swap pages before jumping to new kernel */
+         nop
+
+        mova    11f, r0
+        mov.l   r15, @r0        /* save pointer to stack */
+
+        jsr     @r6             /* hand over control to new kernel */
+         nop
+
+        mov.l   11f, r15        /* get pointer to stack */
+        mov.l   @r15+, r4       /* restore r4 to get indirection page */
 
-        /*  stack setting */
-        add     r8,r5
-        mov     r5,r15
+        bsr     swap_pages      /* swap pages back to previous state */
+         nop
 
+        /* make sure bank0 is active and restore r0->r7 */
+        mov.l   12f, r9
+        not     r9, r9
+        stc     sr, r8
+        and     r9, r8
+        ldc     r8, sr
+        mov.l   @r15+, r0
+        mov.l   @r15+, r1
+        mov.l   @r15+, r2
+        mov.l   @r15+, r3
+        mov.l   @r15+, r4
+        mov.l   @r15+, r5
+        mov.l   @r15+, r6
+        mov.l   @r15+, r7
+
+        /* switch to bank1 and restore r0->r7 */
+        mov.l   12f, r9
+        stc     sr, r8
+        or      r9, r8
+        ldc     r8, sr
+        mov.l   @r15+, r0
+        mov.l   @r15+, r1
+        mov.l   @r15+, r2
+        mov.l   @r15+, r3
+        mov.l   @r15+, r4
+        mov.l   @r15+, r5
+        mov.l   @r15+, r6
+        mov.l   @r15+, r7
+
+        /* switch back to bank0 */
+        mov.l   12f, r9
+        not     r9, r9
+        stc     sr, r8
+        and     r9, r8
+        ldc     r8, sr
+
+        /* restore other random registers */
+        ldc.l   @r15+, spc
+        lds.l   @r15+, pr
+        ldc.l   @r15+, sr
+        ldc.l   @r15+, ssr
+        ldc.l   @r15+, gbr
+        lds.l   @r15+, mach
+        lds.l   @r15+, macl
+
+        /* restore r8->r15 */
+        mov.l   @r15+, r8
+        mov.l   @r15+, r9
+        mov.l   @r15+, r10
+        mov.l   @r15+, r11
+        mov.l   @r15+, r12
+        mov.l   @r15+, r13
+        mov.l   @r15+, r14
+        mov.l   @r15+, r15
+        rts
+         nop
+
+swap_pages:
         bra     1f
-        mov     r4,r0     /* cmd = indirection_page */
+         mov    r4,r0     /* cmd = indirection_page */
 0:
         mov.l   @r4+,r0   /* cmd = *ind++ */
 
-1:      /* addr = (cmd | P2SEG) & 0xfffffff0 */
+1:      /* addr = cmd & 0xfffffff0 */
         mov     r0,r2
-        or      r9,r2
         mov     #-16,r1
         and     r1,r2
 
@@ -40,57 +160,70 @@ relocate_new_kernel:
         tst     #1,r0
         bt      2f
         bra     0b
-        mov     r2,r5
+         mov    r2,r5
 
 2:      /* else if(cmd & IND_INDIRECTION) ind = addr  */
         tst     #2,r0
         bt      3f
         bra     0b
-        mov     r2,r4
+         mov    r2,r4
 
-3:      /* else if(cmd & IND_DONE) goto 6  */
+3:      /* else if(cmd & IND_DONE) return */
         tst     #4,r0
         bt      4f
-        bra     6f
-        nop
+        rts
+         nop
 
 4:      /* else if(cmd & IND_SOURCE) memcpy(dst,addr,PAGE_SIZE) */
         tst     #8,r0
         bt      0b
 
-        mov     r8,r3
+        mov.l   10f,r3    /* PAGE_SIZE */
         shlr2   r3
         shlr2   r3
 5:
         dt      r3
-        mov.l   @r2+,r1   /*  16n+0 */
-        mov.l   r1,@r5
-        add     #4,r5
-        mov.l   @r2+,r1   /*  16n+4 */
-        mov.l   r1,@r5
-        add     #4,r5
-        mov.l   @r2+,r1   /*  16n+8 */
-        mov.l   r1,@r5
-        add     #4,r5
-        mov.l   @r2+,r1   /*  16n+12 */
-        mov.l   r1,@r5
-        add     #4,r5
+
+        /* regular kexec just overwrites the destination page
+         * with the contents of the source page.
+         * for the kexec jump case we need to swap the contents
+         * of the pages.
+         * to keep it simple swap the contents for both cases.
+         */
+        mov.l   @(0, r2), r8
+        mov.l   @(0, r5), r1
+        mov.l   r8, @(0, r5)
+        mov.l   r1, @(0, r2)
+
+        mov.l   @(4, r2), r8
+        mov.l   @(4, r5), r1
+        mov.l   r8, @(4, r5)
+        mov.l   r1, @(4, r2)
+
+        mov.l   @(8, r2), r8
+        mov.l   @(8, r5), r1
+        mov.l   r8, @(8, r5)
+        mov.l   r1, @(8, r2)
+
+        mov.l   @(12, r2), r8
+        mov.l   @(12, r5), r1
+        mov.l   r8, @(12, r5)
+        mov.l   r1, @(12, r2)
+
+        add     #16,r5
+        add     #16,r2
         bf      5b
 
         bra     0b
-        nop
-6:
-#ifdef CONFIG_SH_STANDARD_BIOS
-        ldc   r7, vbr
-#endif
-        jmp @r6
-        nop
+         nop
 
         .align 2
 10:
         .long   PAGE_SIZE
 11:
-        .long   P2SEG
+        .long   0
+12:
+        .long   0x20000000 ! RB=1
 
 relocate_new_kernel_end:
 
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index 370d2cfa34eb..24c60251f680 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -432,6 +432,7 @@ static const char *cpu_name[] = {
         [CPU_SH7763]    = "SH7763",     [CPU_SH7770]    = "SH7770",
         [CPU_SH7780]    = "SH7780",     [CPU_SH7781]    = "SH7781",
         [CPU_SH7343]    = "SH7343",     [CPU_SH7785]    = "SH7785",
+        [CPU_SH7786]    = "SH7786",
         [CPU_SH7722]    = "SH7722",     [CPU_SHX3]      = "SH-X3",
         [CPU_SH5_101]   = "SH5-101",    [CPU_SH5_103]   = "SH5-103",
         [CPU_MXG]       = "MX-G",       [CPU_SH7723]    = "SH7723",
@@ -448,7 +449,7 @@ EXPORT_SYMBOL(get_cpu_subtype);
 /* Symbolic CPU flags, keep in sync with asm/cpu-features.h */
 static const char *cpu_flags[] = {
         "none", "fpu", "p2flush", "mmuassoc", "dsp", "perfctr",
-        "ptea", "llsc", "l2", "op32", NULL
+        "ptea", "llsc", "l2", "op32", "pteaex", NULL
 };
 
 static void show_cpuflags(struct seq_file *m, struct sh_cpuinfo *c)
diff --git a/arch/sh/kernel/swsusp.c b/arch/sh/kernel/swsusp.c
new file mode 100644
index 000000000000..12b64a0f2f01
--- /dev/null
+++ b/arch/sh/kernel/swsusp.c
@@ -0,0 +1,38 @@
+/*
+ * swsusp.c - SuperH hibernation support
+ *
+ * Copyright (C) 2009 Magnus Damm
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/mm.h>
+#include <linux/sched.h>
+#include <linux/suspend.h>
+#include <asm/suspend.h>
+#include <asm/sections.h>
+#include <asm/tlbflush.h>
+#include <asm/page.h>
+#include <asm/fpu.h>
+
+struct swsusp_arch_regs swsusp_arch_regs_cpu0;
+
+int pfn_is_nosave(unsigned long pfn)
+{
+        unsigned long begin_pfn = __pa(&__nosave_begin) >> PAGE_SHIFT;
+        unsigned long end_pfn = PAGE_ALIGN(__pa(&__nosave_end)) >> PAGE_SHIFT;
+
+        return (pfn >= begin_pfn) && (pfn < end_pfn);
+}
+
+void save_processor_state(void)
+{
+        init_fpu(current);
+}
+
+void restore_processor_state(void)
+{
+        local_flush_tlb_all();
+}
diff --git a/arch/sh/kernel/time_32.c b/arch/sh/kernel/time_32.c
index 8457f83242c5..c34e1e0f9b02 100644
--- a/arch/sh/kernel/time_32.c
+++ b/arch/sh/kernel/time_32.c
@@ -41,14 +41,6 @@ static int null_rtc_set_time(const time_t secs)
         return 0;
 }
 
-/*
- * Null high precision timer functions for systems lacking one.
- */
-static cycle_t null_hpt_read(void)
-{
-        return 0;
-}
-
 void (*rtc_sh_get_time)(struct timespec *) = null_rtc_get_time;
 int (*rtc_sh_set_time)(const time_t) = null_rtc_set_time;
 
@@ -112,7 +104,6 @@ int do_settimeofday(struct timespec *tv)
 EXPORT_SYMBOL(do_settimeofday);
 #endif /* !CONFIG_GENERIC_TIME */
 
-#ifndef CONFIG_GENERIC_CLOCKEVENTS
 /* last time the RTC clock got updated */
 static long last_rtc_update;
 
@@ -156,7 +147,6 @@ void handle_timer_tick(void)
         update_process_times(user_mode(get_irq_regs()));
 #endif
 }
-#endif /* !CONFIG_GENERIC_CLOCKEVENTS */
 
 #ifdef CONFIG_PM
 int timer_suspend(struct sys_device *dev, pm_message_t state)
@@ -189,7 +179,12 @@ static struct sysdev_class timer_sysclass = {
 
 static int __init timer_init_sysfs(void)
 {
-        int ret = sysdev_class_register(&timer_sysclass);
+        int ret;
+
+        if (!sys_timer)
+                return 0;
+
+        ret = sysdev_class_register(&timer_sysclass);
         if (ret != 0)
                 return ret;
 
@@ -200,42 +195,21 @@ device_initcall(timer_init_sysfs);
 
 void (*board_time_init)(void);
 
-/*
- * Shamelessly based on the MIPS and Sparc64 work.
- */
-static unsigned long timer_ticks_per_nsec_quotient __read_mostly;
-unsigned long sh_hpt_frequency = 0;
-
-#define NSEC_PER_CYC_SHIFT      10
-
-static struct clocksource clocksource_sh = {
+struct clocksource clocksource_sh = {
         .name           = "SuperH",
-        .rating         = 200,
-        .mask           = CLOCKSOURCE_MASK(32),
-        .read           = null_hpt_read,
-        .shift          = 16,
-        .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
-static void __init init_sh_clocksource(void)
-{
-        if (!sh_hpt_frequency || clocksource_sh.read == null_hpt_read)
-                return;
-
-        clocksource_sh.mult = clocksource_hz2mult(sh_hpt_frequency,
-                                                  clocksource_sh.shift);
-
-        timer_ticks_per_nsec_quotient =
-                clocksource_hz2mult(sh_hpt_frequency, NSEC_PER_CYC_SHIFT);
-
-        clocksource_register(&clocksource_sh);
-}
-
 #ifdef CONFIG_GENERIC_TIME
 unsigned long long sched_clock(void)
 {
-        unsigned long long ticks = clocksource_sh.read();
-        return (ticks * timer_ticks_per_nsec_quotient) >> NSEC_PER_CYC_SHIFT;
+        unsigned long long cycles;
+
+        /* jiffies based sched_clock if no clocksource is installed */
+        if (!clocksource_sh.rating)
+                return (unsigned long long)jiffies * (NSEC_PER_SEC / HZ);
+
+        cycles = clocksource_sh.read();
+        return cyc2ns(&clocksource_sh, cycles);
 }
 #endif
 
@@ -259,17 +233,8 @@ void __init time_init(void)
          * initialized for us.
          */
         sys_timer = get_sys_timer();
-        printk(KERN_INFO "Using %s for system timer\n", sys_timer->name);
-
-
-        if (sys_timer->ops->read)
-                clocksource_sh.read = sys_timer->ops->read;
-
-        init_sh_clocksource();
-
-        if (sh_hpt_frequency)
-                printk("Using %lu.%03lu MHz high precision timer.\n",
-                       ((sh_hpt_frequency + 500) / 1000) / 1000,
-                       ((sh_hpt_frequency + 500) / 1000) % 1000);
+        if (unlikely(!sys_timer))
+                panic("System timer missing.\n");
 
+        printk(KERN_INFO "Using %s for system timer\n", sys_timer->name);
 }
diff --git a/arch/sh/kernel/timers/timer-mtu2.c b/arch/sh/kernel/timers/timer-mtu2.c
index c3d237e1d566..9a77ae86b403 100644
--- a/arch/sh/kernel/timers/timer-mtu2.c
+++ b/arch/sh/kernel/timers/timer-mtu2.c
@@ -35,7 +35,8 @@
 #define MTU2_TSR_1      0xfffe4385
 #define MTU2_TCNT_1     0xfffe4386      /* 16-bit counter */
 
-#if defined(CONFIG_CPU_SUBTYPE_SH7201)
+#if defined(CONFIG_CPU_SUBTYPE_SH7201) || \
+    defined(CONFIG_CPU_SUBTYPE_SH7203)
 #define MTU2_TGRA_1     0xfffe4388
 #else
 #define MTU2_TGRA_1     0xfffe438a
diff --git a/arch/sh/kernel/timers/timer-tmu.c b/arch/sh/kernel/timers/timer-tmu.c
index 0db3f9510336..10b5a6f17cc0 100644
--- a/arch/sh/kernel/timers/timer-tmu.c
+++ b/arch/sh/kernel/timers/timer-tmu.c
@@ -146,7 +146,14 @@ static irqreturn_t tmu_timer_interrupt(int irq, void *dummy)
         _tmu_clear_status(TMU0);
         _tmu_set_irq(TMU0,tmu0_clockevent.mode != CLOCK_EVT_MODE_ONESHOT);
 
-        evt->event_handler(evt);
+        switch (tmu0_clockevent.mode) {
+        case CLOCK_EVT_MODE_ONESHOT:
+        case CLOCK_EVT_MODE_PERIODIC:
+                evt->event_handler(evt);
+                break;
+        default:
+                break;
+        }
 
         return IRQ_HANDLED;
 }
@@ -237,6 +244,7 @@ static int tmu_timer_init(void)
     !defined(CONFIG_CPU_SUBTYPE_SH7721) && \
     !defined(CONFIG_CPU_SUBTYPE_SH7760) && \
     !defined(CONFIG_CPU_SUBTYPE_SH7785) && \
+    !defined(CONFIG_CPU_SUBTYPE_SH7786) && \
     !defined(CONFIG_CPU_SUBTYPE_SHX3)
         ctrl_outb(TMU_TOCR_INIT, TMU_TOCR);
 #endif
@@ -254,7 +262,14 @@ static int tmu_timer_init(void)
 
         _tmu_start(TMU1);
 
-        sh_hpt_frequency = clk_get_rate(&tmu1_clk);
+        clocksource_sh.rating = 200;
+        clocksource_sh.mask = CLOCKSOURCE_MASK(32);
+        clocksource_sh.read = tmu_timer_read;
+        clocksource_sh.shift = 10;
+        clocksource_sh.mult = clocksource_hz2mult(clk_get_rate(&tmu1_clk),
+                                                  clocksource_sh.shift);
+        clocksource_sh.flags = CLOCK_SOURCE_IS_CONTINUOUS;
+        clocksource_register(&clocksource_sh);
 
         tmu0_clockevent.mult = div_sc(frequency, NSEC_PER_SEC,
                                       tmu0_clockevent.shift);
@@ -264,6 +279,7 @@ static int tmu_timer_init(void)
                         clockevent_delta2ns(1, &tmu0_clockevent);
 
         tmu0_clockevent.cpumask = cpumask_of(0);
+        tmu0_clockevent.rating = 100;
 
         clockevents_register_device(&tmu0_clockevent);
 
@@ -274,7 +290,6 @@ static struct sys_timer_ops tmu_timer_ops = {
         .init           = tmu_timer_init,
         .start          = tmu_timer_start,
         .stop           = tmu_timer_stop,
-        .read           = tmu_timer_read,
 };
 
 struct sys_timer tmu_timer = {
diff --git a/arch/sh/kernel/vmlinux_32.lds.S b/arch/sh/kernel/vmlinux_32.lds.S
index 7b4b82bd1156..d0b2a715cd14 100644
--- a/arch/sh/kernel/vmlinux_32.lds.S
+++ b/arch/sh/kernel/vmlinux_32.lds.S
@@ -15,7 +15,10 @@ OUTPUT_ARCH(sh)
 ENTRY(_start)
 SECTIONS
 {
-#ifdef CONFIG_32BIT
+#ifdef CONFIG_PMB_FIXED
+        . = CONFIG_PAGE_OFFSET + (CONFIG_MEMORY_START & 0x1fffffff) +
+            CONFIG_ZERO_PAGE_OFFSET;
+#elif defined(CONFIG_32BIT)
         . = CONFIG_PAGE_OFFSET + CONFIG_ZERO_PAGE_OFFSET;
 #else
         . = CONFIG_PAGE_OFFSET + CONFIG_MEMORY_START + CONFIG_ZERO_PAGE_OFFSET;
diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig
index 555ec9714b9e..10c24356d2d5 100644
--- a/arch/sh/mm/Kconfig
+++ b/arch/sh/mm/Kconfig
@@ -57,7 +57,7 @@ config 32BIT
         bool
         default y if CPU_SH5
 
-config PMB
+config PMB_ENABLE
         bool "Support 32-bit physical addressing through PMB"
         depends on MMU && EXPERIMENTAL && (CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785)
         select 32BIT
@@ -67,6 +67,33 @@ config PMB
           32-bits through the SH-4A PMB. If this is not set, legacy
           29-bit physical addressing will be used.
 
+choice
+        prompt "PMB handling type"
+        depends on PMB_ENABLE
+        default PMB_FIXED
+
+config PMB
+        bool "PMB"
+        depends on MMU && EXPERIMENTAL && (CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785)
+        select 32BIT
+        help
+          If you say Y here, physical addressing will be extended to
+          32-bits through the SH-4A PMB. If this is not set, legacy
+          29-bit physical addressing will be used.
+
+config PMB_FIXED
+        bool "fixed PMB"
+        depends on MMU && EXPERIMENTAL && (CPU_SUBTYPE_SH7780 || \
+                                           CPU_SUBTYPE_SH7785)
+        select 32BIT
+        help
+          If this option is enabled, fixed PMB mappings are inherited
+          from the boot loader, and the kernel does not attempt dynamic
+          management. This is the closest to legacy 29-bit physical mode,
+          and allows systems to support up to 512MiB of system memory.
+
+endchoice
+
 config X2TLB
         bool "Enable extended TLB mode"
         depends on (CPU_SHX2 || CPU_SHX3) && MMU && EXPERIMENTAL
diff --git a/arch/sh/mm/Makefile_32 b/arch/sh/mm/Makefile_32
index cb2f3f299591..986a1e055834 100644
--- a/arch/sh/mm/Makefile_32
+++ b/arch/sh/mm/Makefile_32
@@ -25,8 +25,10 @@ obj-$(CONFIG_CPU_SH4)	+= cache-debugfs.o
 endif
 
 ifdef CONFIG_MMU
-obj-$(CONFIG_CPU_SH3)   += tlb-sh3.o
-obj-$(CONFIG_CPU_SH4)   += tlb-sh4.o
+tlb-$(CONFIG_CPU_SH3)           := tlb-sh3.o
+tlb-$(CONFIG_CPU_SH4)           := tlb-sh4.o
+tlb-$(CONFIG_CPU_HAS_PTEAEX)    := tlb-pteaex.o
+obj-y                           += $(tlb-y)
 ifndef CONFIG_CACHE_OFF
 obj-$(CONFIG_CPU_SH4)           += pg-sh4.o
 obj-$(CONFIG_SH7705_CACHE_32KB) += pg-sh7705.o
@@ -35,6 +37,7 @@ endif
 
 obj-$(CONFIG_HUGETLB_PAGE)      += hugetlbpage.o
 obj-$(CONFIG_PMB)               += pmb.o
+obj-$(CONFIG_PMB_FIXED)         += pmb-fixed.o
 obj-$(CONFIG_NUMA)              += numa.o
 
 EXTRA_CFLAGS += -Werror
diff --git a/arch/sh/mm/asids-debugfs.c b/arch/sh/mm/asids-debugfs.c
index 8e912a15e94f..cd8c3bf39b5a 100644
--- a/arch/sh/mm/asids-debugfs.c
+++ b/arch/sh/mm/asids-debugfs.c
@@ -37,10 +37,8 @@ static int asids_seq_show(struct seq_file *file, void *iter)
                         continue;
 
                 if (p->mm)
-                        seq_printf(file, "%5d : %02lx\n", pid,
+                        seq_printf(file, "%5d : %04lx\n", pid,
                                    cpu_asid(smp_processor_id(), p->mm));
-                else
-                        seq_printf(file, "%5d : (none)\n", pid);
         }
 
         read_unlock(&tasklist_lock);
diff --git a/arch/sh/mm/ioremap_32.c b/arch/sh/mm/ioremap_32.c
index 32946fba123e..60cc486d2c2c 100644
--- a/arch/sh/mm/ioremap_32.c
+++ b/arch/sh/mm/ioremap_32.c
@@ -59,11 +59,13 @@ void __iomem *__ioremap(unsigned long phys_addr, unsigned long size,
         if (is_pci_memaddr(phys_addr) && is_pci_memaddr(last_addr))
                 return (void __iomem *)phys_addr;
 
+#if !defined(CONFIG_PMB_FIXED)
         /*
          * Don't allow anybody to remap normal RAM that we're using..
          */
         if (phys_addr < virt_to_phys(high_memory))
                 return NULL;
+#endif
 
         /*
          * Mappings have to be page-aligned
@@ -81,7 +83,7 @@ void __iomem *__ioremap(unsigned long phys_addr, unsigned long size,
         area->phys_addr = phys_addr;
         orig_addr = addr = (unsigned long)area->addr;
 
-#ifdef CONFIG_32BIT
+#ifdef CONFIG_PMB
         /*
          * First try to remap through the PMB once a valid VMA has been
          * established. Smaller allocations (or the rest of the size
@@ -119,10 +121,10 @@ void __iounmap(void __iomem *addr)
         unsigned long seg = PXSEG(vaddr);
         struct vm_struct *p;
 
-        if (seg < P3SEG || seg >= P3_ADDR_MAX || is_pci_memaddr(vaddr))
+        if (seg < P3SEG || vaddr >= P3_ADDR_MAX || is_pci_memaddr(vaddr))
                 return;
 
-#ifdef CONFIG_32BIT
+#ifdef CONFIG_PMB
         /*
          * Purge any PMB entries that may have been established for this
          * mapping, then proceed with conventional VMA teardown.
diff --git a/arch/sh/mm/pmb-fixed.c b/arch/sh/mm/pmb-fixed.c
new file mode 100644
index 000000000000..43c8eac4d8a1
--- /dev/null
+++ b/arch/sh/mm/pmb-fixed.c
@@ -0,0 +1,45 @@
+/*
+ * arch/sh/mm/fixed_pmb.c
+ *
+ * Copyright (C) 2009  Renesas Solutions Corp.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/mm.h>
+#include <linux/io.h>
+#include <asm/mmu.h>
+#include <asm/mmu_context.h>
+
+static int __uses_jump_to_uncached fixed_pmb_init(void)
+{
+        int i;
+        unsigned long addr, data;
+
+        jump_to_uncached();
+
+        for (i = 0; i < PMB_ENTRY_MAX; i++) {
+                addr = PMB_DATA + (i << PMB_E_SHIFT);
+                data = ctrl_inl(addr);
+                if (!(data & PMB_V))
+                        continue;
+
+                if (data & PMB_C) {
+#if defined(CONFIG_CACHE_WRITETHROUGH)
+                        data |= PMB_WT;
+#elif defined(CONFIG_CACHE_WRITEBACK)
+                        data &= ~PMB_WT;
+#else
+                        data &= ~(PMB_C | PMB_WT);
+#endif
+                }
+                ctrl_outl(data, addr);
+        }
+
+        back_to_cached();
+
+        return 0;
+}
+arch_initcall(fixed_pmb_init);
diff --git a/arch/sh/mm/pmb.c b/arch/sh/mm/pmb.c
index 84241676265e..b1a714a92b14 100644
--- a/arch/sh/mm/pmb.c
+++ b/arch/sh/mm/pmb.c
@@ -15,6 +15,8 @@
  */
 #include <linux/init.h>
 #include <linux/kernel.h>
+#include <linux/sysdev.h>
+#include <linux/cpu.h>
 #include <linux/module.h>
 #include <linux/slab.h>
 #include <linux/bitops.h>
@@ -402,3 +404,39 @@ static int __init pmb_debugfs_init(void)
         return 0;
 }
 postcore_initcall(pmb_debugfs_init);
+
+#ifdef CONFIG_PM
+static int pmb_sysdev_suspend(struct sys_device *dev, pm_message_t state)
+{
+        static pm_message_t prev_state;
+
+        /* Restore the PMB after a resume from hibernation */
+        if (state.event == PM_EVENT_ON &&
+            prev_state.event == PM_EVENT_FREEZE) {
+                struct pmb_entry *pmbe;
+                spin_lock_irq(&pmb_list_lock);
+                for (pmbe = pmb_list; pmbe; pmbe = pmbe->next)
+                        set_pmb_entry(pmbe);
+                spin_unlock_irq(&pmb_list_lock);
+        }
+        prev_state = state;
+        return 0;
+}
+
+static int pmb_sysdev_resume(struct sys_device *dev)
+{
+        return pmb_sysdev_suspend(dev, PMSG_ON);
+}
+
+static struct sysdev_driver pmb_sysdev_driver = {
+        .suspend = pmb_sysdev_suspend,
+        .resume = pmb_sysdev_resume,
+};
+
+static int __init pmb_sysdev_init(void)
+{
+        return sysdev_driver_register(&cpu_sysdev_class, &pmb_sysdev_driver);
+}
+
+subsys_initcall(pmb_sysdev_init);
+#endif
diff --git a/arch/sh/mm/tlb-pteaex.c b/arch/sh/mm/tlb-pteaex.c
new file mode 100644
index 000000000000..2aab3ea934d7
--- /dev/null
+++ b/arch/sh/mm/tlb-pteaex.c
@@ -0,0 +1,96 @@
+/*
+ * arch/sh/mm/tlb-pteaex.c
+ *
+ * TLB operations for SH-X3 CPUs featuring PTE ASID Extensions.
+ *
+ * Copyright (C) 2009 Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/io.h>
+#include <asm/system.h>
+#include <asm/mmu_context.h>
+#include <asm/cacheflush.h>
+
+void update_mmu_cache(struct vm_area_struct * vma,
+                      unsigned long address, pte_t pte)
+{
+        unsigned long flags;
+        unsigned long pteval;
+        unsigned long vpn;
+
+        /* Ptrace may call this routine. */
+        if (vma && current->active_mm != vma->vm_mm)
+                return;
+
+#ifndef CONFIG_CACHE_OFF
+        {
+                unsigned long pfn = pte_pfn(pte);
+
+                if (pfn_valid(pfn)) {
+                        struct page *page = pfn_to_page(pfn);
+
+                        if (!test_bit(PG_mapped, &page->flags)) {
+                                unsigned long phys = pte_val(pte) & PTE_PHYS_MASK;
+                                __flush_wback_region((void *)P1SEGADDR(phys),
+                                                     PAGE_SIZE);
+                                __set_bit(PG_mapped, &page->flags);
+                        }
+                }
+        }
+#endif
+
+        local_irq_save(flags);
+
+        /* Set PTEH register */
+        vpn = address & MMU_VPN_MASK;
+        __raw_writel(vpn, MMU_PTEH);
+
+        /* Set PTEAEX */
+        __raw_writel(get_asid(), MMU_PTEAEX);
+
+        pteval = pte.pte_low;
+
+        /* Set PTEA register */
+#ifdef CONFIG_X2TLB
+        /*
+         * For the extended mode TLB this is trivial, only the ESZ and
+         * EPR bits need to be written out to PTEA, with the remainder of
+         * the protection bits (with the exception of the compat-mode SZ
+         * and PR bits, which are cleared) being written out in PTEL.
+         */
+        __raw_writel(pte.pte_high, MMU_PTEA);
+#endif
+
+        /* Set PTEL register */
+        pteval &= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */
+#ifdef CONFIG_CACHE_WRITETHROUGH
+        pteval |= _PAGE_WT;
+#endif
+        /* conveniently, we want all the software flags to be 0 anyway */
+        __raw_writel(pteval, MMU_PTEL);
+
+        /* Load the TLB */
+        asm volatile("ldtlb": /* no output */ : /* no input */ : "memory");
+        local_irq_restore(flags);
+}
+
+/*
+ * While SH-X2 extended TLB mode splits out the memory-mapped I/UTLB
+ * data arrays, SH-X3 cores with PTEAEX split out the memory-mapped
+ * address arrays. In compat mode the second array is inaccessible, while
+ * in extended mode, the legacy 8-bit ASID field in address array 1 has
+ * undefined behaviour.
+ */
+void __uses_jump_to_uncached local_flush_tlb_one(unsigned long asid,
+                                                 unsigned long page)
+{
+        jump_to_uncached();
+        __raw_writel(page, MMU_UTLB_ADDRESS_ARRAY | MMU_PAGE_ASSOC_BIT);
+        __raw_writel(asid, MMU_UTLB_ADDRESS_ARRAY2 | MMU_PAGE_ASSOC_BIT);
+        back_to_cached();
+}
diff --git a/arch/sh/oprofile/common.c b/arch/sh/oprofile/common.c
index 1d97d64cb95f..1b9d4304b3bf 100644
--- a/arch/sh/oprofile/common.c
+++ b/arch/sh/oprofile/common.c
@@ -107,6 +107,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
         case CPU_SH7780:
         case CPU_SH7781:
         case CPU_SH7785:
+        case CPU_SH7786:
         case CPU_SH7723:
         case CPU_SHX3:
                 lmodel = &op_model_sh4a_ops;
diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types
index 284b7e867496..8477b5d884fd 100644
--- a/arch/sh/tools/mach-types
+++ b/arch/sh/tools/mach-types
@@ -52,3 +52,6 @@ RSK7203			SH_RSK7203
 AP325RXA                SH_AP325RXA
 SH7763RDP               SH_SH7763RDP
 SH7785LCR               SH_SH7785LCR
+URQUELL                 SH_URQUELL
+ESPT                    SH_ESPT
+POLARIS                 SH_POLARIS
diff --git a/arch/sparc/include/asm/socket.h b/arch/sparc/include/asm/socket.h
index bf50d0c2d583..982a12f959f4 100644
--- a/arch/sparc/include/asm/socket.h
+++ b/arch/sparc/include/asm/socket.h
@@ -50,6 +50,9 @@
 
 #define SO_MARK                 0x0022
 
+#define SO_TIMESTAMPING         0x0023
+#define SCM_TIMESTAMPING        SO_TIMESTAMPING
+
 /* Security levels - as per NRL IPv6 - don't actually do anything */
 #define SO_SECURITY_AUTHENTICATION              0x5001
 #define SO_SECURITY_ENCRYPTION_TRANSPORT        0x5002
diff --git a/arch/sparc/include/asm/tlb_64.h b/arch/sparc/include/asm/tlb_64.h
index ec81cdedef2c..ee38e731bfa6 100644
--- a/arch/sparc/include/asm/tlb_64.h
+++ b/arch/sparc/include/asm/tlb_64.h
@@ -57,6 +57,8 @@ static inline struct mmu_gather *tlb_gather_mmu(struct mm_struct *mm, unsigned i
 
 static inline void tlb_flush_mmu(struct mmu_gather *mp)
 {
+        if (!mp->fullmm)
+                flush_tlb_pending();
         if (mp->need_flush) {
                 free_pages_and_swap_cache(mp->pages, mp->pages_nr);
                 mp->pages_nr = 0;
@@ -78,8 +80,6 @@ static inline void tlb_finish_mmu(struct mmu_gather *mp, unsigned long start, un
 
         if (mp->fullmm)
                 mp->fullmm = 0;
-        else
-                flush_tlb_pending();
 
         /* keep the page table cache within bounds */
         check_pgt_cache();
diff --git a/arch/sparc/kernel/irq_64.c b/arch/sparc/kernel/irq_64.c
index 233bd87a9637..d0d6a515499a 100644
--- a/arch/sparc/kernel/irq_64.c
+++ b/arch/sparc/kernel/irq_64.c
@@ -185,7 +185,7 @@ int show_interrupts(struct seq_file *p, void *v)
                 seq_printf(p, "%10u ", kstat_irqs(i));
 #else
                 for_each_online_cpu(j)
-                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
+                        seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
 #endif
                 seq_printf(p, " %9s", irq_desc[i].chip->typename);
                 seq_printf(p, "  %s", action->name);
diff --git a/arch/sparc/kernel/smp_64.c b/arch/sparc/kernel/smp_64.c
index 6cd1a5b65067..79457f682b5a 100644
--- a/arch/sparc/kernel/smp_64.c
+++ b/arch/sparc/kernel/smp_64.c
@@ -1031,7 +1031,7 @@ void smp_fetch_global_regs(void)
  *    If the address space is non-shared (ie. mm->count == 1) we avoid
  *    cross calls when we want to flush the currently running process's
  *    tlb state.  This is done by clearing all cpu bits except the current
- *    processor's in current->active_mm->cpu_vm_mask and performing the
+ *    processor's in current->mm->cpu_vm_mask and performing the
  *    flush locally only.  This will force any subsequent cpus which run
  *    this task to flush the context from the local tlb if the process
  *    migrates to another cpu (again).
@@ -1074,7 +1074,7 @@ void smp_flush_tlb_pending(struct mm_struct *mm, unsigned long nr, unsigned long
         u32 ctx = CTX_HWBITS(mm->context);
         int cpu = get_cpu();
 
-        if (mm == current->active_mm && atomic_read(&mm->mm_users) == 1)
+        if (mm == current->mm && atomic_read(&mm->mm_users) == 1)
                 mm->cpu_vm_mask = cpumask_of_cpu(cpu);
         else
                 smp_cross_call_masked(&xcall_flush_tlb_pending,
diff --git a/arch/sparc/kernel/systbls_64.S b/arch/sparc/kernel/systbls_64.S
index f93c42a2b522..a8000b1cda74 100644
--- a/arch/sparc/kernel/systbls_64.S
+++ b/arch/sparc/kernel/systbls_64.S
@@ -51,7 +51,7 @@ sys_call_table32:
 /*150*/ .word sys_nis_syscall, sys_inotify_init, sys_inotify_add_watch, sys_poll, sys_getdents64
         .word compat_sys_fcntl64, sys_inotify_rm_watch, compat_sys_statfs, compat_sys_fstatfs, sys_oldumount
 /*160*/ .word compat_sys_sched_setaffinity, compat_sys_sched_getaffinity, sys32_getdomainname, sys32_setdomainname, sys_nis_syscall
-        .word sys_quotactl, sys_set_tid_address, compat_sys_mount, sys_ustat, sys32_setxattr
+        .word sys_quotactl, sys_set_tid_address, compat_sys_mount, compat_sys_ustat, sys32_setxattr
 /*170*/ .word sys32_lsetxattr, sys32_fsetxattr, sys_getxattr, sys_lgetxattr, compat_sys_getdents
         .word sys_setsid, sys_fchdir, sys32_fgetxattr, sys_listxattr, sys_llistxattr
 /*180*/ .word sys32_flistxattr, sys_removexattr, sys_lremovexattr, compat_sys_sigpending, sys_ni_syscall
diff --git a/arch/um/drivers/net_kern.c b/arch/um/drivers/net_kern.c
index fde510b664d3..434224e2229f 100644
--- a/arch/um/drivers/net_kern.c
+++ b/arch/um/drivers/net_kern.c
@@ -86,7 +86,7 @@ static int uml_net_rx(struct net_device *dev)
                 drop_skb->dev = dev;
                 /* Read a packet into drop_skb and don't do anything with it. */
                 (*lp->read)(lp->fd, drop_skb, lp);
-                lp->stats.rx_dropped++;
+                dev->stats.rx_dropped++;
                 return 0;
         }
 
@@ -99,8 +99,8 @@ static int uml_net_rx(struct net_device *dev)
                 skb_trim(skb, pkt_len);
                 skb->protocol = (*lp->protocol)(skb);
 
-                lp->stats.rx_bytes += skb->len;
-                lp->stats.rx_packets++;
+                dev->stats.rx_bytes += skb->len;
+                dev->stats.rx_packets++;
                 netif_rx(skb);
                 return pkt_len;
         }
@@ -224,8 +224,8 @@ static int uml_net_start_xmit(struct sk_buff *skb, struct net_device *dev)
         len = (*lp->write)(lp->fd, skb, lp);
 
         if (len == skb->len) {
-                lp->stats.tx_packets++;
-                lp->stats.tx_bytes += skb->len;
+                dev->stats.tx_packets++;
+                dev->stats.tx_bytes += skb->len;
                 dev->trans_start = jiffies;
                 netif_start_queue(dev);
 
@@ -234,7 +234,7 @@ static int uml_net_start_xmit(struct sk_buff *skb, struct net_device *dev)
         }
         else if (len == 0) {
                 netif_start_queue(dev);
-                lp->stats.tx_dropped++;
+                dev->stats.tx_dropped++;
         }
         else {
                 netif_start_queue(dev);
@@ -248,12 +248,6 @@ static int uml_net_start_xmit(struct sk_buff *skb, struct net_device *dev)
         return 0;
 }
 
-static struct net_device_stats *uml_net_get_stats(struct net_device *dev)
-{
-        struct uml_net_private *lp = netdev_priv(dev);
-        return &lp->stats;
-}
-
 static void uml_net_set_multicast_list(struct net_device *dev)
 {
         return;
@@ -377,6 +371,18 @@ static void net_device_release(struct device *dev)
         free_netdev(netdev);
 }
 
+static const struct net_device_ops uml_netdev_ops = {
+        .ndo_open               = uml_net_open,
+        .ndo_stop               = uml_net_close,
+        .ndo_start_xmit         = uml_net_start_xmit,
+        .ndo_set_multicast_list = uml_net_set_multicast_list,
+        .ndo_tx_timeout         = uml_net_tx_timeout,
+        .ndo_set_mac_address    = uml_net_set_mac,
+        .ndo_change_mtu         = uml_net_change_mtu,
+        .ndo_set_mac_address    = eth_mac_addr,
+        .ndo_validate_addr      = eth_validate_addr,
+};
+
 /*
  * Ensures that platform_driver_register is called only once by
  * eth_configure.  Will be set in an initcall.
@@ -473,14 +479,7 @@ static void eth_configure(int n, void *init, char *mac,
 
         set_ether_mac(dev, device->mac);
         dev->mtu = transport->user->mtu;
-        dev->open = uml_net_open;
-        dev->hard_start_xmit = uml_net_start_xmit;
-        dev->stop = uml_net_close;
-        dev->get_stats = uml_net_get_stats;
-        dev->set_multicast_list = uml_net_set_multicast_list;
-        dev->tx_timeout = uml_net_tx_timeout;
-        dev->set_mac_address = uml_net_set_mac;
-        dev->change_mtu = uml_net_change_mtu;
+        dev->netdev_ops = &uml_netdev_ops;
         dev->ethtool_ops = &uml_net_ethtool_ops;
         dev->watchdog_timeo = (HZ >> 1);
         dev->irq = UM_ETH_IRQ;
diff --git a/arch/um/include/shared/net_kern.h b/arch/um/include/shared/net_kern.h
index d843c7924a7c..5c367f22595b 100644
--- a/arch/um/include/shared/net_kern.h
+++ b/arch/um/include/shared/net_kern.h
@@ -26,7 +26,7 @@ struct uml_net_private {
         spinlock_t lock;
         struct net_device *dev;
         struct timer_list tl;
-        struct net_device_stats stats;
+
         struct work_struct work;
         int fd;
         unsigned char mac[ETH_ALEN];
diff --git a/arch/um/kernel/irq.c b/arch/um/kernel/irq.c
index 3d7aad09b171..336b61569072 100644
--- a/arch/um/kernel/irq.c
+++ b/arch/um/kernel/irq.c
@@ -42,7 +42,7 @@ int show_interrupts(struct seq_file *p, void *v)
                 seq_printf(p, "%10u ", kstat_irqs(i));
 #else
                 for_each_online_cpu(j)
-                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
+                        seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
 #endif
                 seq_printf(p, " %14s", irq_desc[i].chip->typename);
                 seq_printf(p, "  %s", action->name);
diff --git a/arch/x86/crypto/Makefile b/arch/x86/crypto/Makefile
index 903de4aa5094..ebe7deedd5b4 100644
--- a/arch/x86/crypto/Makefile
+++ b/arch/x86/crypto/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_CRYPTO_SALSA20_586) += salsa20-i586.o
 obj-$(CONFIG_CRYPTO_AES_X86_64) += aes-x86_64.o
 obj-$(CONFIG_CRYPTO_TWOFISH_X86_64) += twofish-x86_64.o
 obj-$(CONFIG_CRYPTO_SALSA20_X86_64) += salsa20-x86_64.o
+obj-$(CONFIG_CRYPTO_AES_NI_INTEL) += aesni-intel.o
 
 obj-$(CONFIG_CRYPTO_CRC32C_INTEL) += crc32c-intel.o
 
@@ -19,3 +20,5 @@ salsa20-i586-y := salsa20-i586-asm_32.o salsa20_glue.o
 aes-x86_64-y := aes-x86_64-asm_64.o aes_glue.o
 twofish-x86_64-y := twofish-x86_64-asm_64.o twofish_glue.o
 salsa20-x86_64-y := salsa20-x86_64-asm_64.o salsa20_glue.o
+
+aesni-intel-y := aesni-intel_asm.o aesni-intel_glue.o
diff --git a/arch/x86/crypto/aes-i586-asm_32.S b/arch/x86/crypto/aes-i586-asm_32.S
index e41b147f4509..b949ec2f9af4 100644
--- a/arch/x86/crypto/aes-i586-asm_32.S
+++ b/arch/x86/crypto/aes-i586-asm_32.S
@@ -41,14 +41,14 @@
 #define tlen 1024   // length of each of 4 'xor' arrays (256 32-bit words)
 
 /* offsets to parameters with one register pushed onto stack */
-#define tfm 8
+#define ctx 8
 #define out_blk 12
 #define in_blk 16
 
-/* offsets in crypto_tfm structure */
-#define klen (crypto_tfm_ctx_offset + 0)
-#define ekey (crypto_tfm_ctx_offset + 4)
-#define dkey (crypto_tfm_ctx_offset + 244)
+/* offsets in crypto_aes_ctx structure */
+#define klen (480)
+#define ekey (0)
+#define dkey (240)
 
 // register mapping for encrypt and decrypt subroutines
 
@@ -217,7 +217,7 @@
         do_col (table, r5,r0,r1,r4, r2,r3);             /* idx=r5 */
 
 // AES (Rijndael) Encryption Subroutine
-/* void aes_enc_blk(struct crypto_tfm *tfm, u8 *out_blk, const u8 *in_blk) */
+/* void aes_enc_blk(struct crypto_aes_ctx *ctx, u8 *out_blk, const u8 *in_blk) */
 
 .global  aes_enc_blk
 
@@ -228,7 +228,7 @@
 
 aes_enc_blk:
         push    %ebp
-        mov     tfm(%esp),%ebp
+        mov     ctx(%esp),%ebp
 
 // CAUTION: the order and the values used in these assigns 
 // rely on the register mappings
@@ -292,7 +292,7 @@ aes_enc_blk:
         ret
 
 // AES (Rijndael) Decryption Subroutine
-/* void aes_dec_blk(struct crypto_tfm *tfm, u8 *out_blk, const u8 *in_blk) */
+/* void aes_dec_blk(struct crypto_aes_ctx *ctx, u8 *out_blk, const u8 *in_blk) */
 
 .global  aes_dec_blk
 
@@ -303,7 +303,7 @@ aes_enc_blk:
 
 aes_dec_blk:
         push    %ebp
-        mov     tfm(%esp),%ebp
+        mov     ctx(%esp),%ebp
 
 // CAUTION: the order and the values used in these assigns 
 // rely on the register mappings
diff --git a/arch/x86/crypto/aes-x86_64-asm_64.S b/arch/x86/crypto/aes-x86_64-asm_64.S
index a120f526c3df..5b577d5a059b 100644
--- a/arch/x86/crypto/aes-x86_64-asm_64.S
+++ b/arch/x86/crypto/aes-x86_64-asm_64.S
@@ -17,8 +17,6 @@
 
 #include <asm/asm-offsets.h>
 
-#define BASE crypto_tfm_ctx_offset
-
 #define R1      %rax
 #define R1E     %eax
 #define R1X     %ax
@@ -56,13 +54,13 @@
         .align  8;                      \
 FUNC:   movq    r1,r2;                  \
         movq    r3,r4;                  \
-        leaq    BASE+KEY+48+4(r8),r9;   \
+        leaq    KEY+48(r8),r9;          \
         movq    r10,r11;                \
         movl    (r7),r5 ## E;           \
         movl    4(r7),r1 ## E;          \
         movl    8(r7),r6 ## E;          \
         movl    12(r7),r7 ## E;         \
-        movl    BASE+0(r8),r10 ## E;    \
+        movl    480(r8),r10 ## E;       \
         xorl    -48(r9),r5 ## E;        \
         xorl    -44(r9),r1 ## E;        \
         xorl    -40(r9),r6 ## E;        \
diff --git a/arch/x86/crypto/aes_glue.c b/arch/x86/crypto/aes_glue.c
index 71f457827116..49ae9fe32b22 100644
--- a/arch/x86/crypto/aes_glue.c
+++ b/arch/x86/crypto/aes_glue.c
@@ -5,17 +5,29 @@
 
 #include <crypto/aes.h>
 
-asmlinkage void aes_enc_blk(struct crypto_tfm *tfm, u8 *out, const u8 *in);
-asmlinkage void aes_dec_blk(struct crypto_tfm *tfm, u8 *out, const u8 *in);
+asmlinkage void aes_enc_blk(struct crypto_aes_ctx *ctx, u8 *out, const u8 *in);
+asmlinkage void aes_dec_blk(struct crypto_aes_ctx *ctx, u8 *out, const u8 *in);
+
+void crypto_aes_encrypt_x86(struct crypto_aes_ctx *ctx, u8 *dst, const u8 *src)
+{
+        aes_enc_blk(ctx, dst, src);
+}
+EXPORT_SYMBOL_GPL(crypto_aes_encrypt_x86);
+
+void crypto_aes_decrypt_x86(struct crypto_aes_ctx *ctx, u8 *dst, const u8 *src)
+{
+        aes_dec_blk(ctx, dst, src);
+}
+EXPORT_SYMBOL_GPL(crypto_aes_decrypt_x86);
 
 static void aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
 {
-        aes_enc_blk(tfm, dst, src);
+        aes_enc_blk(crypto_tfm_ctx(tfm), dst, src);
 }
 
 static void aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
 {
-        aes_dec_blk(tfm, dst, src);
+        aes_dec_blk(crypto_tfm_ctx(tfm), dst, src);
 }
 
 static struct crypto_alg aes_alg = {
diff --git a/arch/x86/crypto/aesni-intel_asm.S b/arch/x86/crypto/aesni-intel_asm.S
new file mode 100644
index 000000000000..caba99601703
--- /dev/null
+++ b/arch/x86/crypto/aesni-intel_asm.S
@@ -0,0 +1,896 @@
+/*
+ * Implement AES algorithm in Intel AES-NI instructions.
+ *
+ * The white paper of AES-NI instructions can be downloaded from:
+ *   http://softwarecommunity.intel.com/isn/downloads/intelavx/AES-Instructions-Set_WP.pdf
+ *
+ * Copyright (C) 2008, Intel Corp.
+ *    Author: Huang Ying <ying.huang@intel.com>
+ *            Vinodh Gopal <vinodh.gopal@intel.com>
+ *            Kahraman Akdemir
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/linkage.h>
+
+.text
+
+#define STATE1  %xmm0
+#define STATE2  %xmm4
+#define STATE3  %xmm5
+#define STATE4  %xmm6
+#define STATE   STATE1
+#define IN1     %xmm1
+#define IN2     %xmm7
+#define IN3     %xmm8
+#define IN4     %xmm9
+#define IN      IN1
+#define KEY     %xmm2
+#define IV      %xmm3
+
+#define KEYP    %rdi
+#define OUTP    %rsi
+#define INP     %rdx
+#define LEN     %rcx
+#define IVP     %r8
+#define KLEN    %r9d
+#define T1      %r10
+#define TKEYP   T1
+#define T2      %r11
+
+_key_expansion_128:
+_key_expansion_256a:
+        pshufd $0b11111111, %xmm1, %xmm1
+        shufps $0b00010000, %xmm0, %xmm4
+        pxor %xmm4, %xmm0
+        shufps $0b10001100, %xmm0, %xmm4
+        pxor %xmm4, %xmm0
+        pxor %xmm1, %xmm0
+        movaps %xmm0, (%rcx)
+        add $0x10, %rcx
+        ret
+
+_key_expansion_192a:
+        pshufd $0b01010101, %xmm1, %xmm1
+        shufps $0b00010000, %xmm0, %xmm4
+        pxor %xmm4, %xmm0
+        shufps $0b10001100, %xmm0, %xmm4
+        pxor %xmm4, %xmm0
+        pxor %xmm1, %xmm0
+
+        movaps %xmm2, %xmm5
+        movaps %xmm2, %xmm6
+        pslldq $4, %xmm5
+        pshufd $0b11111111, %xmm0, %xmm3
+        pxor %xmm3, %xmm2
+        pxor %xmm5, %xmm2
+
+        movaps %xmm0, %xmm1
+        shufps $0b01000100, %xmm0, %xmm6
+        movaps %xmm6, (%rcx)
+        shufps $0b01001110, %xmm2, %xmm1
+        movaps %xmm1, 16(%rcx)
+        add $0x20, %rcx
+        ret
+
+_key_expansion_192b:
+        pshufd $0b01010101, %xmm1, %xmm1
+        shufps $0b00010000, %xmm0, %xmm4
+        pxor %xmm4, %xmm0
+        shufps $0b10001100, %xmm0, %xmm4
+        pxor %xmm4, %xmm0
+        pxor %xmm1, %xmm0
+
+        movaps %xmm2, %xmm5
+        pslldq $4, %xmm5
+        pshufd $0b11111111, %xmm0, %xmm3
+        pxor %xmm3, %xmm2
+        pxor %xmm5, %xmm2
+
+        movaps %xmm0, (%rcx)
+        add $0x10, %rcx
+        ret
+
+_key_expansion_256b:
+        pshufd $0b10101010, %xmm1, %xmm1
+        shufps $0b00010000, %xmm2, %xmm4
+        pxor %xmm4, %xmm2
+        shufps $0b10001100, %xmm2, %xmm4
+        pxor %xmm4, %xmm2
+        pxor %xmm1, %xmm2
+        movaps %xmm2, (%rcx)
+        add $0x10, %rcx
+        ret
+
+/*
+ * int aesni_set_key(struct crypto_aes_ctx *ctx, const u8 *in_key,
+ *                   unsigned int key_len)
+ */
+ENTRY(aesni_set_key)
+        movups (%rsi), %xmm0            # user key (first 16 bytes)
+        movaps %xmm0, (%rdi)
+        lea 0x10(%rdi), %rcx            # key addr
+        movl %edx, 480(%rdi)
+        pxor %xmm4, %xmm4               # xmm4 is assumed 0 in _key_expansion_x
+        cmp $24, %dl
+        jb .Lenc_key128
+        je .Lenc_key192
+        movups 0x10(%rsi), %xmm2        # other user key
+        movaps %xmm2, (%rcx)
+        add $0x10, %rcx
+        # aeskeygenassist $0x1, %xmm2, %xmm1    # round 1
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x01
+        call _key_expansion_256a
+        # aeskeygenassist $0x1, %xmm0, %xmm1
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x01
+        call _key_expansion_256b
+        # aeskeygenassist $0x2, %xmm2, %xmm1    # round 2
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x02
+        call _key_expansion_256a
+        # aeskeygenassist $0x2, %xmm0, %xmm1
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x02
+        call _key_expansion_256b
+        # aeskeygenassist $0x4, %xmm2, %xmm1    # round 3
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x04
+        call _key_expansion_256a
+        # aeskeygenassist $0x4, %xmm0, %xmm1
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x04
+        call _key_expansion_256b
+        # aeskeygenassist $0x8, %xmm2, %xmm1    # round 4
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x08
+        call _key_expansion_256a
+        # aeskeygenassist $0x8, %xmm0, %xmm1
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x08
+        call _key_expansion_256b
+        # aeskeygenassist $0x10, %xmm2, %xmm1   # round 5
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x10
+        call _key_expansion_256a
+        # aeskeygenassist $0x10, %xmm0, %xmm1
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x10
+        call _key_expansion_256b
+        # aeskeygenassist $0x20, %xmm2, %xmm1   # round 6
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x20
+        call _key_expansion_256a
+        # aeskeygenassist $0x20, %xmm0, %xmm1
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x20
+        call _key_expansion_256b
+        # aeskeygenassist $0x40, %xmm2, %xmm1   # round 7
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x40
+        call _key_expansion_256a
+        jmp .Ldec_key
+.Lenc_key192:
+        movq 0x10(%rsi), %xmm2          # other user key
+        # aeskeygenassist $0x1, %xmm2, %xmm1    # round 1
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x01
+        call _key_expansion_192a
+        # aeskeygenassist $0x2, %xmm2, %xmm1    # round 2
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x02
+        call _key_expansion_192b
+        # aeskeygenassist $0x4, %xmm2, %xmm1    # round 3
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x04
+        call _key_expansion_192a
+        # aeskeygenassist $0x8, %xmm2, %xmm1    # round 4
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x08
+        call _key_expansion_192b
+        # aeskeygenassist $0x10, %xmm2, %xmm1   # round 5
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x10
+        call _key_expansion_192a
+        # aeskeygenassist $0x20, %xmm2, %xmm1   # round 6
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x20
+        call _key_expansion_192b
+        # aeskeygenassist $0x40, %xmm2, %xmm1   # round 7
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x40
+        call _key_expansion_192a
+        # aeskeygenassist $0x80, %xmm2, %xmm1   # round 8
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xca, 0x80
+        call _key_expansion_192b
+        jmp .Ldec_key
+.Lenc_key128:
+        # aeskeygenassist $0x1, %xmm0, %xmm1    # round 1
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x01
+        call _key_expansion_128
+        # aeskeygenassist $0x2, %xmm0, %xmm1    # round 2
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x02
+        call _key_expansion_128
+        # aeskeygenassist $0x4, %xmm0, %xmm1    # round 3
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x04
+        call _key_expansion_128
+        # aeskeygenassist $0x8, %xmm0, %xmm1    # round 4
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x08
+        call _key_expansion_128
+        # aeskeygenassist $0x10, %xmm0, %xmm1   # round 5
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x10
+        call _key_expansion_128
+        # aeskeygenassist $0x20, %xmm0, %xmm1   # round 6
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x20
+        call _key_expansion_128
+        # aeskeygenassist $0x40, %xmm0, %xmm1   # round 7
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x40
+        call _key_expansion_128
+        # aeskeygenassist $0x80, %xmm0, %xmm1   # round 8
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x80
+        call _key_expansion_128
+        # aeskeygenassist $0x1b, %xmm0, %xmm1   # round 9
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x1b
+        call _key_expansion_128
+        # aeskeygenassist $0x36, %xmm0, %xmm1   # round 10
+        .byte 0x66, 0x0f, 0x3a, 0xdf, 0xc8, 0x36
+        call _key_expansion_128
+.Ldec_key:
+        sub $0x10, %rcx
+        movaps (%rdi), %xmm0
+        movaps (%rcx), %xmm1
+        movaps %xmm0, 240(%rcx)
+        movaps %xmm1, 240(%rdi)
+        add $0x10, %rdi
+        lea 240-16(%rcx), %rsi
+.align 4
+.Ldec_key_loop:
+        movaps (%rdi), %xmm0
+        # aesimc %xmm0, %xmm1
+        .byte 0x66, 0x0f, 0x38, 0xdb, 0xc8
+        movaps %xmm1, (%rsi)
+        add $0x10, %rdi
+        sub $0x10, %rsi
+        cmp %rcx, %rdi
+        jb .Ldec_key_loop
+        xor %rax, %rax
+        ret
+
+/*
+ * void aesni_enc(struct crypto_aes_ctx *ctx, u8 *dst, const u8 *src)
+ */
+ENTRY(aesni_enc)
+        movl 480(KEYP), KLEN            # key length
+        movups (INP), STATE             # input
+        call _aesni_enc1
+        movups STATE, (OUTP)            # output
+        ret
+
+/*
+ * _aesni_enc1:         internal ABI
+ * input:
+ *      KEYP:           key struct pointer
+ *      KLEN:           round count
+ *      STATE:          initial state (input)
+ * output:
+ *      STATE:          finial state (output)
+ * changed:
+ *      KEY
+ *      TKEYP (T1)
+ */
+_aesni_enc1:
+        movaps (KEYP), KEY              # key
+        mov KEYP, TKEYP
+        pxor KEY, STATE         # round 0
+        add $0x30, TKEYP
+        cmp $24, KLEN
+        jb .Lenc128
+        lea 0x20(TKEYP), TKEYP
+        je .Lenc192
+        add $0x20, TKEYP
+        movaps -0x60(TKEYP), KEY
+        # aesenc KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        movaps -0x50(TKEYP), KEY
+        # aesenc KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+.align 4
+.Lenc192:
+        movaps -0x40(TKEYP), KEY
+        # aesenc KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        movaps -0x30(TKEYP), KEY
+        # aesenc KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+.align 4
+.Lenc128:
+        movaps -0x20(TKEYP), KEY
+        # aesenc KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        movaps -0x10(TKEYP), KEY
+        # aesenc KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        movaps (TKEYP), KEY
+        # aesenc KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        movaps 0x10(TKEYP), KEY
+        # aesenc KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        movaps 0x20(TKEYP), KEY
+        # aesenc KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        movaps 0x30(TKEYP), KEY
+        # aesenc KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        movaps 0x40(TKEYP), KEY
+        # aesenc KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        movaps 0x50(TKEYP), KEY
+        # aesenc KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        movaps 0x60(TKEYP), KEY
+        # aesenc KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        movaps 0x70(TKEYP), KEY
+        # aesenclast KEY, STATE # last round
+        .byte 0x66, 0x0f, 0x38, 0xdd, 0xc2
+        ret
+
+/*
+ * _aesni_enc4: internal ABI
+ * input:
+ *      KEYP:           key struct pointer
+ *      KLEN:           round count
+ *      STATE1:         initial state (input)
+ *      STATE2
+ *      STATE3
+ *      STATE4
+ * output:
+ *      STATE1:         finial state (output)
+ *      STATE2
+ *      STATE3
+ *      STATE4
+ * changed:
+ *      KEY
+ *      TKEYP (T1)
+ */
+_aesni_enc4:
+        movaps (KEYP), KEY              # key
+        mov KEYP, TKEYP
+        pxor KEY, STATE1                # round 0
+        pxor KEY, STATE2
+        pxor KEY, STATE3
+        pxor KEY, STATE4
+        add $0x30, TKEYP
+        cmp $24, KLEN
+        jb .L4enc128
+        lea 0x20(TKEYP), TKEYP
+        je .L4enc192
+        add $0x20, TKEYP
+        movaps -0x60(TKEYP), KEY
+        # aesenc KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        # aesenc KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2
+        # aesenc KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
+        # aesenc KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
+        movaps -0x50(TKEYP), KEY
+        # aesenc KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        # aesenc KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2
+        # aesenc KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
+        # aesenc KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
+#.align 4
+.L4enc192:
+        movaps -0x40(TKEYP), KEY
+        # aesenc KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        # aesenc KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2
+        # aesenc KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
+        # aesenc KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
+        movaps -0x30(TKEYP), KEY
+        # aesenc KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        # aesenc KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2
+        # aesenc KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
+        # aesenc KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
+#.align 4
+.L4enc128:
+        movaps -0x20(TKEYP), KEY
+        # aesenc KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        # aesenc KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2
+        # aesenc KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
+        # aesenc KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
+        movaps -0x10(TKEYP), KEY
+        # aesenc KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        # aesenc KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2
+        # aesenc KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
+        # aesenc KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
+        movaps (TKEYP), KEY
+        # aesenc KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        # aesenc KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2
+        # aesenc KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
+        # aesenc KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
+        movaps 0x10(TKEYP), KEY
+        # aesenc KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        # aesenc KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2
+        # aesenc KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
+        # aesenc KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
+        movaps 0x20(TKEYP), KEY
+        # aesenc KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        # aesenc KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2
+        # aesenc KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
+        # aesenc KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
+        movaps 0x30(TKEYP), KEY
+        # aesenc KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        # aesenc KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2
+        # aesenc KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
+        # aesenc KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
+        movaps 0x40(TKEYP), KEY
+        # aesenc KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        # aesenc KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2
+        # aesenc KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
+        # aesenc KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
+        movaps 0x50(TKEYP), KEY
+        # aesenc KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        # aesenc KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2
+        # aesenc KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
+        # aesenc KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
+        movaps 0x60(TKEYP), KEY
+        # aesenc KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xc2
+        # aesenc KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xe2
+        # aesenc KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xea
+        # aesenc KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xdc, 0xf2
+        movaps 0x70(TKEYP), KEY
+        # aesenclast KEY, STATE1        # last round
+        .byte 0x66, 0x0f, 0x38, 0xdd, 0xc2
+        # aesenclast KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xdd, 0xe2
+        # aesenclast KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xdd, 0xea
+        # aesenclast KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xdd, 0xf2
+        ret
+
+/*
+ * void aesni_dec (struct crypto_aes_ctx *ctx, u8 *dst, const u8 *src)
+ */
+ENTRY(aesni_dec)
+        mov 480(KEYP), KLEN             # key length
+        add $240, KEYP
+        movups (INP), STATE             # input
+        call _aesni_dec1
+        movups STATE, (OUTP)            #output
+        ret
+
+/*
+ * _aesni_dec1:         internal ABI
+ * input:
+ *      KEYP:           key struct pointer
+ *      KLEN:           key length
+ *      STATE:          initial state (input)
+ * output:
+ *      STATE:          finial state (output)
+ * changed:
+ *      KEY
+ *      TKEYP (T1)
+ */
+_aesni_dec1:
+        movaps (KEYP), KEY              # key
+        mov KEYP, TKEYP
+        pxor KEY, STATE         # round 0
+        add $0x30, TKEYP
+        cmp $24, KLEN
+        jb .Ldec128
+        lea 0x20(TKEYP), TKEYP
+        je .Ldec192
+        add $0x20, TKEYP
+        movaps -0x60(TKEYP), KEY
+        # aesdec KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        movaps -0x50(TKEYP), KEY
+        # aesdec KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+.align 4
+.Ldec192:
+        movaps -0x40(TKEYP), KEY
+        # aesdec KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        movaps -0x30(TKEYP), KEY
+        # aesdec KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+.align 4
+.Ldec128:
+        movaps -0x20(TKEYP), KEY
+        # aesdec KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        movaps -0x10(TKEYP), KEY
+        # aesdec KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        movaps (TKEYP), KEY
+        # aesdec KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        movaps 0x10(TKEYP), KEY
+        # aesdec KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        movaps 0x20(TKEYP), KEY
+        # aesdec KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        movaps 0x30(TKEYP), KEY
+        # aesdec KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        movaps 0x40(TKEYP), KEY
+        # aesdec KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        movaps 0x50(TKEYP), KEY
+        # aesdec KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        movaps 0x60(TKEYP), KEY
+        # aesdec KEY, STATE
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        movaps 0x70(TKEYP), KEY
+        # aesdeclast KEY, STATE         # last round
+        .byte 0x66, 0x0f, 0x38, 0xdf, 0xc2
+        ret
+
+/*
+ * _aesni_dec4: internal ABI
+ * input:
+ *      KEYP:           key struct pointer
+ *      KLEN:           key length
+ *      STATE1:         initial state (input)
+ *      STATE2
+ *      STATE3
+ *      STATE4
+ * output:
+ *      STATE1:         finial state (output)
+ *      STATE2
+ *      STATE3
+ *      STATE4
+ * changed:
+ *      KEY
+ *      TKEYP (T1)
+ */
+_aesni_dec4:
+        movaps (KEYP), KEY              # key
+        mov KEYP, TKEYP
+        pxor KEY, STATE1                # round 0
+        pxor KEY, STATE2
+        pxor KEY, STATE3
+        pxor KEY, STATE4
+        add $0x30, TKEYP
+        cmp $24, KLEN
+        jb .L4dec128
+        lea 0x20(TKEYP), TKEYP
+        je .L4dec192
+        add $0x20, TKEYP
+        movaps -0x60(TKEYP), KEY
+        # aesdec KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        # aesdec KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
+        # aesdec KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xea
+        # aesdec KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
+        movaps -0x50(TKEYP), KEY
+        # aesdec KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        # aesdec KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
+        # aesdec KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xea
+        # aesdec KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
+.align 4
+.L4dec192:
+        movaps -0x40(TKEYP), KEY
+        # aesdec KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        # aesdec KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
+        # aesdec KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xea
+        # aesdec KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
+        movaps -0x30(TKEYP), KEY
+        # aesdec KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        # aesdec KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
+        # aesdec KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xea
+        # aesdec KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
+.align 4
+.L4dec128:
+        movaps -0x20(TKEYP), KEY
+        # aesdec KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        # aesdec KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
+        # aesdec KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xea
+        # aesdec KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
+        movaps -0x10(TKEYP), KEY
+        # aesdec KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        # aesdec KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
+        # aesdec KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xea
+        # aesdec KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
+        movaps (TKEYP), KEY
+        # aesdec KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        # aesdec KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
+        # aesdec KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xea
+        # aesdec KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
+        movaps 0x10(TKEYP), KEY
+        # aesdec KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        # aesdec KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
+        # aesdec KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xea
+        # aesdec KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
+        movaps 0x20(TKEYP), KEY
+        # aesdec KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        # aesdec KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
+        # aesdec KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xea
+        # aesdec KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
+        movaps 0x30(TKEYP), KEY
+        # aesdec KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        # aesdec KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
+        # aesdec KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xea
+        # aesdec KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
+        movaps 0x40(TKEYP), KEY
+        # aesdec KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        # aesdec KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
+        # aesdec KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xea
+        # aesdec KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
+        movaps 0x50(TKEYP), KEY
+        # aesdec KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        # aesdec KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
+        # aesdec KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xea
+        # aesdec KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
+        movaps 0x60(TKEYP), KEY
+        # aesdec KEY, STATE1
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xc2
+        # aesdec KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xe2
+        # aesdec KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xea
+        # aesdec KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xde, 0xf2
+        movaps 0x70(TKEYP), KEY
+        # aesdeclast KEY, STATE1        # last round
+        .byte 0x66, 0x0f, 0x38, 0xdf, 0xc2
+        # aesdeclast KEY, STATE2
+        .byte 0x66, 0x0f, 0x38, 0xdf, 0xe2
+        # aesdeclast KEY, STATE3
+        .byte 0x66, 0x0f, 0x38, 0xdf, 0xea
+        # aesdeclast KEY, STATE4
+        .byte 0x66, 0x0f, 0x38, 0xdf, 0xf2
+        ret
+
+/*
+ * void aesni_ecb_enc(struct crypto_aes_ctx *ctx, const u8 *dst, u8 *src,
+ *                    size_t len)
+ */
+ENTRY(aesni_ecb_enc)
+        test LEN, LEN           # check length
+        jz .Lecb_enc_ret
+        mov 480(KEYP), KLEN
+        cmp $16, LEN
+        jb .Lecb_enc_ret
+        cmp $64, LEN
+        jb .Lecb_enc_loop1
+.align 4
+.Lecb_enc_loop4:
+        movups (INP), STATE1
+        movups 0x10(INP), STATE2
+        movups 0x20(INP), STATE3
+        movups 0x30(INP), STATE4
+        call _aesni_enc4
+        movups STATE1, (OUTP)
+        movups STATE2, 0x10(OUTP)
+        movups STATE3, 0x20(OUTP)
+        movups STATE4, 0x30(OUTP)
+        sub $64, LEN
+        add $64, INP
+        add $64, OUTP
+        cmp $64, LEN
+        jge .Lecb_enc_loop4
+        cmp $16, LEN
+        jb .Lecb_enc_ret
+.align 4
+.Lecb_enc_loop1:
+        movups (INP), STATE1
+        call _aesni_enc1
+        movups STATE1, (OUTP)
+        sub $16, LEN
+        add $16, INP
+        add $16, OUTP
+        cmp $16, LEN
+        jge .Lecb_enc_loop1
+.Lecb_enc_ret:
+        ret
+
+/*
+ * void aesni_ecb_dec(struct crypto_aes_ctx *ctx, const u8 *dst, u8 *src,
+ *                    size_t len);
+ */
+ENTRY(aesni_ecb_dec)
+        test LEN, LEN
+        jz .Lecb_dec_ret
+        mov 480(KEYP), KLEN
+        add $240, KEYP
+        cmp $16, LEN
+        jb .Lecb_dec_ret
+        cmp $64, LEN
+        jb .Lecb_dec_loop1
+.align 4
+.Lecb_dec_loop4:
+        movups (INP), STATE1
+        movups 0x10(INP), STATE2
+        movups 0x20(INP), STATE3
+        movups 0x30(INP), STATE4
+        call _aesni_dec4
+        movups STATE1, (OUTP)
+        movups STATE2, 0x10(OUTP)
+        movups STATE3, 0x20(OUTP)
+        movups STATE4, 0x30(OUTP)
+        sub $64, LEN
+        add $64, INP
+        add $64, OUTP
+        cmp $64, LEN
+        jge .Lecb_dec_loop4
+        cmp $16, LEN
+        jb .Lecb_dec_ret
+.align 4
+.Lecb_dec_loop1:
+        movups (INP), STATE1
+        call _aesni_dec1
+        movups STATE1, (OUTP)
+        sub $16, LEN
+        add $16, INP
+        add $16, OUTP
+        cmp $16, LEN
+        jge .Lecb_dec_loop1
+.Lecb_dec_ret:
+        ret
+
+/*
+ * void aesni_cbc_enc(struct crypto_aes_ctx *ctx, const u8 *dst, u8 *src,
+ *                    size_t len, u8 *iv)
+ */
+ENTRY(aesni_cbc_enc)
+        cmp $16, LEN
+        jb .Lcbc_enc_ret
+        mov 480(KEYP), KLEN
+        movups (IVP), STATE     # load iv as initial state
+.align 4
+.Lcbc_enc_loop:
+        movups (INP), IN        # load input
+        pxor IN, STATE
+        call _aesni_enc1
+        movups STATE, (OUTP)    # store output
+        sub $16, LEN
+        add $16, INP
+        add $16, OUTP
+        cmp $16, LEN
+        jge .Lcbc_enc_loop
+        movups STATE, (IVP)
+.Lcbc_enc_ret:
+        ret
+
+/*
+ * void aesni_cbc_dec(struct crypto_aes_ctx *ctx, const u8 *dst, u8 *src,
+ *                    size_t len, u8 *iv)
+ */
+ENTRY(aesni_cbc_dec)
+        cmp $16, LEN
+        jb .Lcbc_dec_ret
+        mov 480(KEYP), KLEN
+        add $240, KEYP
+        movups (IVP), IV
+        cmp $64, LEN
+        jb .Lcbc_dec_loop1
+.align 4
+.Lcbc_dec_loop4:
+        movups (INP), IN1
+        movaps IN1, STATE1
+        movups 0x10(INP), IN2
+        movaps IN2, STATE2
+        movups 0x20(INP), IN3
+        movaps IN3, STATE3
+        movups 0x30(INP), IN4
+        movaps IN4, STATE4
+        call _aesni_dec4
+        pxor IV, STATE1
+        pxor IN1, STATE2
+        pxor IN2, STATE3
+        pxor IN3, STATE4
+        movaps IN4, IV
+        movups STATE1, (OUTP)
+        movups STATE2, 0x10(OUTP)
+        movups STATE3, 0x20(OUTP)
+        movups STATE4, 0x30(OUTP)
+        sub $64, LEN
+        add $64, INP
+        add $64, OUTP
+        cmp $64, LEN
+        jge .Lcbc_dec_loop4
+        cmp $16, LEN
+        jb .Lcbc_dec_ret
+.align 4
+.Lcbc_dec_loop1:
+        movups (INP), IN
+        movaps IN, STATE
+        call _aesni_dec1
+        pxor IV, STATE
+        movups STATE, (OUTP)
+        movaps IN, IV
+        sub $16, LEN
+        add $16, INP
+        add $16, OUTP
+        cmp $16, LEN
+        jge .Lcbc_dec_loop1
+        movups IV, (IVP)
+.Lcbc_dec_ret:
+        ret
diff --git a/arch/x86/crypto/aesni-intel_glue.c b/arch/x86/crypto/aesni-intel_glue.c
new file mode 100644
index 000000000000..02af0af65497
--- /dev/null
+++ b/arch/x86/crypto/aesni-intel_glue.c
@@ -0,0 +1,461 @@
+/*
+ * Support for Intel AES-NI instructions. This file contains glue
+ * code, the real AES implementation is in intel-aes_asm.S.
+ *
+ * Copyright (C) 2008, Intel Corp.
+ *    Author: Huang Ying <ying.huang@intel.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/hardirq.h>
+#include <linux/types.h>
+#include <linux/crypto.h>
+#include <linux/err.h>
+#include <crypto/algapi.h>
+#include <crypto/aes.h>
+#include <crypto/cryptd.h>
+#include <asm/i387.h>
+#include <asm/aes.h>
+
+struct async_aes_ctx {
+        struct cryptd_ablkcipher *cryptd_tfm;
+};
+
+#define AESNI_ALIGN     16
+#define AES_BLOCK_MASK  (~(AES_BLOCK_SIZE-1))
+
+asmlinkage int aesni_set_key(struct crypto_aes_ctx *ctx, const u8 *in_key,
+                             unsigned int key_len);
+asmlinkage void aesni_enc(struct crypto_aes_ctx *ctx, u8 *out,
+                          const u8 *in);
+asmlinkage void aesni_dec(struct crypto_aes_ctx *ctx, u8 *out,
+                          const u8 *in);
+asmlinkage void aesni_ecb_enc(struct crypto_aes_ctx *ctx, u8 *out,
+                              const u8 *in, unsigned int len);
+asmlinkage void aesni_ecb_dec(struct crypto_aes_ctx *ctx, u8 *out,
+                              const u8 *in, unsigned int len);
+asmlinkage void aesni_cbc_enc(struct crypto_aes_ctx *ctx, u8 *out,
+                              const u8 *in, unsigned int len, u8 *iv);
+asmlinkage void aesni_cbc_dec(struct crypto_aes_ctx *ctx, u8 *out,
+                              const u8 *in, unsigned int len, u8 *iv);
+
+static inline int kernel_fpu_using(void)
+{
+        if (in_interrupt() && !(read_cr0() & X86_CR0_TS))
+                return 1;
+        return 0;
+}
+
+static inline struct crypto_aes_ctx *aes_ctx(void *raw_ctx)
+{
+        unsigned long addr = (unsigned long)raw_ctx;
+        unsigned long align = AESNI_ALIGN;
+
+        if (align <= crypto_tfm_ctx_alignment())
+                align = 1;
+        return (struct crypto_aes_ctx *)ALIGN(addr, align);
+}
+
+static int aes_set_key_common(struct crypto_tfm *tfm, void *raw_ctx,
+                              const u8 *in_key, unsigned int key_len)
+{
+        struct crypto_aes_ctx *ctx = aes_ctx(raw_ctx);
+        u32 *flags = &tfm->crt_flags;
+        int err;
+
+        if (key_len != AES_KEYSIZE_128 && key_len != AES_KEYSIZE_192 &&
+            key_len != AES_KEYSIZE_256) {
+                *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
+                return -EINVAL;
+        }
+
+        if (kernel_fpu_using())
+                err = crypto_aes_expand_key(ctx, in_key, key_len);
+        else {
+                kernel_fpu_begin();
+                err = aesni_set_key(ctx, in_key, key_len);
+                kernel_fpu_end();
+        }
+
+        return err;
+}
+
+static int aes_set_key(struct crypto_tfm *tfm, const u8 *in_key,
+                       unsigned int key_len)
+{
+        return aes_set_key_common(tfm, crypto_tfm_ctx(tfm), in_key, key_len);
+}
+
+static void aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
+{
+        struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
+
+        if (kernel_fpu_using())
+                crypto_aes_encrypt_x86(ctx, dst, src);
+        else {
+                kernel_fpu_begin();
+                aesni_enc(ctx, dst, src);
+                kernel_fpu_end();
+        }
+}
+
+static void aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
+{
+        struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
+
+        if (kernel_fpu_using())
+                crypto_aes_decrypt_x86(ctx, dst, src);
+        else {
+                kernel_fpu_begin();
+                aesni_dec(ctx, dst, src);
+                kernel_fpu_end();
+        }
+}
+
+static struct crypto_alg aesni_alg = {
+        .cra_name               = "aes",
+        .cra_driver_name        = "aes-aesni",
+        .cra_priority           = 300,
+        .cra_flags              = CRYPTO_ALG_TYPE_CIPHER,
+        .cra_blocksize          = AES_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
+        .cra_alignmask          = 0,
+        .cra_module             = THIS_MODULE,
+        .cra_list               = LIST_HEAD_INIT(aesni_alg.cra_list),
+        .cra_u  = {
+                .cipher = {
+                        .cia_min_keysize        = AES_MIN_KEY_SIZE,
+                        .cia_max_keysize        = AES_MAX_KEY_SIZE,
+                        .cia_setkey             = aes_set_key,
+                        .cia_encrypt            = aes_encrypt,
+                        .cia_decrypt            = aes_decrypt
+                }
+        }
+};
+
+static int ecb_encrypt(struct blkcipher_desc *desc,
+                       struct scatterlist *dst, struct scatterlist *src,
+                       unsigned int nbytes)
+{
+        struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
+        struct blkcipher_walk walk;
+        int err;
+
+        blkcipher_walk_init(&walk, dst, src, nbytes);
+        err = blkcipher_walk_virt(desc, &walk);
+
+        kernel_fpu_begin();
+        while ((nbytes = walk.nbytes)) {
+                aesni_ecb_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
+                              nbytes & AES_BLOCK_MASK);
+                nbytes &= AES_BLOCK_SIZE - 1;
+                err = blkcipher_walk_done(desc, &walk, nbytes);
+        }
+        kernel_fpu_end();
+
+        return err;
+}
+
+static int ecb_decrypt(struct blkcipher_desc *desc,
+                       struct scatterlist *dst, struct scatterlist *src,
+                       unsigned int nbytes)
+{
+        struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
+        struct blkcipher_walk walk;
+        int err;
+
+        blkcipher_walk_init(&walk, dst, src, nbytes);
+        err = blkcipher_walk_virt(desc, &walk);
+
+        kernel_fpu_begin();
+        while ((nbytes = walk.nbytes)) {
+                aesni_ecb_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
+                              nbytes & AES_BLOCK_MASK);
+                nbytes &= AES_BLOCK_SIZE - 1;
+                err = blkcipher_walk_done(desc, &walk, nbytes);
+        }
+        kernel_fpu_end();
+
+        return err;
+}
+
+static struct crypto_alg blk_ecb_alg = {
+        .cra_name               = "__ecb-aes-aesni",
+        .cra_driver_name        = "__driver-ecb-aes-aesni",
+        .cra_priority           = 0,
+        .cra_flags              = CRYPTO_ALG_TYPE_BLKCIPHER,
+        .cra_blocksize          = AES_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
+        .cra_alignmask          = 0,
+        .cra_type               = &crypto_blkcipher_type,
+        .cra_module             = THIS_MODULE,
+        .cra_list               = LIST_HEAD_INIT(blk_ecb_alg.cra_list),
+        .cra_u = {
+                .blkcipher = {
+                        .min_keysize    = AES_MIN_KEY_SIZE,
+                        .max_keysize    = AES_MAX_KEY_SIZE,
+                        .setkey         = aes_set_key,
+                        .encrypt        = ecb_encrypt,
+                        .decrypt        = ecb_decrypt,
+                },
+        },
+};
+
+static int cbc_encrypt(struct blkcipher_desc *desc,
+                       struct scatterlist *dst, struct scatterlist *src,
+                       unsigned int nbytes)
+{
+        struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
+        struct blkcipher_walk walk;
+        int err;
+
+        blkcipher_walk_init(&walk, dst, src, nbytes);
+        err = blkcipher_walk_virt(desc, &walk);
+
+        kernel_fpu_begin();
+        while ((nbytes = walk.nbytes)) {
+                aesni_cbc_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
+                              nbytes & AES_BLOCK_MASK, walk.iv);
+                nbytes &= AES_BLOCK_SIZE - 1;
+                err = blkcipher_walk_done(desc, &walk, nbytes);
+        }
+        kernel_fpu_end();
+
+        return err;
+}
+
+static int cbc_decrypt(struct blkcipher_desc *desc,
+                       struct scatterlist *dst, struct scatterlist *src,
+                       unsigned int nbytes)
+{
+        struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
+        struct blkcipher_walk walk;
+        int err;
+
+        blkcipher_walk_init(&walk, dst, src, nbytes);
+        err = blkcipher_walk_virt(desc, &walk);
+
+        kernel_fpu_begin();
+        while ((nbytes = walk.nbytes)) {
+                aesni_cbc_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
+                              nbytes & AES_BLOCK_MASK, walk.iv);
+                nbytes &= AES_BLOCK_SIZE - 1;
+                err = blkcipher_walk_done(desc, &walk, nbytes);
+        }
+        kernel_fpu_end();
+
+        return err;
+}
+
+static struct crypto_alg blk_cbc_alg = {
+        .cra_name               = "__cbc-aes-aesni",
+        .cra_driver_name        = "__driver-cbc-aes-aesni",
+        .cra_priority           = 0,
+        .cra_flags              = CRYPTO_ALG_TYPE_BLKCIPHER,
+        .cra_blocksize          = AES_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
+        .cra_alignmask          = 0,
+        .cra_type               = &crypto_blkcipher_type,
+        .cra_module             = THIS_MODULE,
+        .cra_list               = LIST_HEAD_INIT(blk_cbc_alg.cra_list),
+        .cra_u = {
+                .blkcipher = {
+                        .min_keysize    = AES_MIN_KEY_SIZE,
+                        .max_keysize    = AES_MAX_KEY_SIZE,
+                        .setkey         = aes_set_key,
+                        .encrypt        = cbc_encrypt,
+                        .decrypt        = cbc_decrypt,
+                },
+        },
+};
+
+static int ablk_set_key(struct crypto_ablkcipher *tfm, const u8 *key,
+                        unsigned int key_len)
+{
+        struct async_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
+
+        return crypto_ablkcipher_setkey(&ctx->cryptd_tfm->base, key, key_len);
+}
+
+static int ablk_encrypt(struct ablkcipher_request *req)
+{
+        struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
+        struct async_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
+
+        if (kernel_fpu_using()) {
+                struct ablkcipher_request *cryptd_req =
+                        ablkcipher_request_ctx(req);
+                memcpy(cryptd_req, req, sizeof(*req));
+                ablkcipher_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
+                return crypto_ablkcipher_encrypt(cryptd_req);
+        } else {
+                struct blkcipher_desc desc;
+                desc.tfm = cryptd_ablkcipher_child(ctx->cryptd_tfm);
+                desc.info = req->info;
+                desc.flags = 0;
+                return crypto_blkcipher_crt(desc.tfm)->encrypt(
+                        &desc, req->dst, req->src, req->nbytes);
+        }
+}
+
+static int ablk_decrypt(struct ablkcipher_request *req)
+{
+        struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
+        struct async_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
+
+        if (kernel_fpu_using()) {
+                struct ablkcipher_request *cryptd_req =
+                        ablkcipher_request_ctx(req);
+                memcpy(cryptd_req, req, sizeof(*req));
+                ablkcipher_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
+                return crypto_ablkcipher_decrypt(cryptd_req);
+        } else {
+                struct blkcipher_desc desc;
+                desc.tfm = cryptd_ablkcipher_child(ctx->cryptd_tfm);
+                desc.info = req->info;
+                desc.flags = 0;
+                return crypto_blkcipher_crt(desc.tfm)->decrypt(
+                        &desc, req->dst, req->src, req->nbytes);
+        }
+}
+
+static void ablk_exit(struct crypto_tfm *tfm)
+{
+        struct async_aes_ctx *ctx = crypto_tfm_ctx(tfm);
+
+        cryptd_free_ablkcipher(ctx->cryptd_tfm);
+}
+
+static void ablk_init_common(struct crypto_tfm *tfm,
+                             struct cryptd_ablkcipher *cryptd_tfm)
+{
+        struct async_aes_ctx *ctx = crypto_tfm_ctx(tfm);
+
+        ctx->cryptd_tfm = cryptd_tfm;
+        tfm->crt_ablkcipher.reqsize = sizeof(struct ablkcipher_request) +
+                crypto_ablkcipher_reqsize(&cryptd_tfm->base);
+}
+
+static int ablk_ecb_init(struct crypto_tfm *tfm)
+{
+        struct cryptd_ablkcipher *cryptd_tfm;
+
+        cryptd_tfm = cryptd_alloc_ablkcipher("__driver-ecb-aes-aesni", 0, 0);
+        if (IS_ERR(cryptd_tfm))
+                return PTR_ERR(cryptd_tfm);
+        ablk_init_common(tfm, cryptd_tfm);
+        return 0;
+}
+
+static struct crypto_alg ablk_ecb_alg = {
+        .cra_name               = "ecb(aes)",
+        .cra_driver_name        = "ecb-aes-aesni",
+        .cra_priority           = 400,
+        .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
+        .cra_blocksize          = AES_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct async_aes_ctx),
+        .cra_alignmask          = 0,
+        .cra_type               = &crypto_ablkcipher_type,
+        .cra_module             = THIS_MODULE,
+        .cra_list               = LIST_HEAD_INIT(ablk_ecb_alg.cra_list),
+        .cra_init               = ablk_ecb_init,
+        .cra_exit               = ablk_exit,
+        .cra_u = {
+                .ablkcipher = {
+                        .min_keysize    = AES_MIN_KEY_SIZE,
+                        .max_keysize    = AES_MAX_KEY_SIZE,
+                        .setkey         = ablk_set_key,
+                        .encrypt        = ablk_encrypt,
+                        .decrypt        = ablk_decrypt,
+                },
+        },
+};
+
+static int ablk_cbc_init(struct crypto_tfm *tfm)
+{
+        struct cryptd_ablkcipher *cryptd_tfm;
+
+        cryptd_tfm = cryptd_alloc_ablkcipher("__driver-cbc-aes-aesni", 0, 0);
+        if (IS_ERR(cryptd_tfm))
+                return PTR_ERR(cryptd_tfm);
+        ablk_init_common(tfm, cryptd_tfm);
+        return 0;
+}
+
+static struct crypto_alg ablk_cbc_alg = {
+        .cra_name               = "cbc(aes)",
+        .cra_driver_name        = "cbc-aes-aesni",
+        .cra_priority           = 400,
+        .cra_flags              = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
+        .cra_blocksize          = AES_BLOCK_SIZE,
+        .cra_ctxsize            = sizeof(struct async_aes_ctx),
+        .cra_alignmask          = 0,
+        .cra_type               = &crypto_ablkcipher_type,
+        .cra_module             = THIS_MODULE,
+        .cra_list               = LIST_HEAD_INIT(ablk_cbc_alg.cra_list),
+        .cra_init               = ablk_cbc_init,
+        .cra_exit               = ablk_exit,
+        .cra_u = {
+                .ablkcipher = {
+                        .min_keysize    = AES_MIN_KEY_SIZE,
+                        .max_keysize    = AES_MAX_KEY_SIZE,
+                        .ivsize         = AES_BLOCK_SIZE,
+                        .setkey         = ablk_set_key,
+                        .encrypt        = ablk_encrypt,
+                        .decrypt        = ablk_decrypt,
+                },
+        },
+};
+
+static int __init aesni_init(void)
+{
+        int err;
+
+        if (!cpu_has_aes) {
+                printk(KERN_ERR "Intel AES-NI instructions are not detected.\n");
+                return -ENODEV;
+        }
+        if ((err = crypto_register_alg(&aesni_alg)))
+                goto aes_err;
+        if ((err = crypto_register_alg(&blk_ecb_alg)))
+                goto blk_ecb_err;
+        if ((err = crypto_register_alg(&blk_cbc_alg)))
+                goto blk_cbc_err;
+        if ((err = crypto_register_alg(&ablk_ecb_alg)))
+                goto ablk_ecb_err;
+        if ((err = crypto_register_alg(&ablk_cbc_alg)))
+                goto ablk_cbc_err;
+
+        return err;
+
+ablk_cbc_err:
+        crypto_unregister_alg(&ablk_ecb_alg);
+ablk_ecb_err:
+        crypto_unregister_alg(&blk_cbc_alg);
+blk_cbc_err:
+        crypto_unregister_alg(&blk_ecb_alg);
+blk_ecb_err:
+        crypto_unregister_alg(&aesni_alg);
+aes_err:
+        return err;
+}
+
+static void __exit aesni_exit(void)
+{
+        crypto_unregister_alg(&ablk_cbc_alg);
+        crypto_unregister_alg(&ablk_ecb_alg);
+        crypto_unregister_alg(&blk_cbc_alg);
+        crypto_unregister_alg(&blk_ecb_alg);
+        crypto_unregister_alg(&aesni_alg);
+}
+
+module_init(aesni_init);
+module_exit(aesni_exit);
+
+MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm, Intel AES-NI instructions optimized");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("aes");
diff --git a/arch/x86/ia32/ia32entry.S b/arch/x86/ia32/ia32entry.S
index 097a6b64c24d..db0c803170ab 100644
--- a/arch/x86/ia32/ia32entry.S
+++ b/arch/x86/ia32/ia32entry.S
@@ -557,7 +557,7 @@ ia32_sys_call_table:
         .quad sys32_olduname
         .quad sys_umask         /* 60 */
         .quad sys_chroot
-        .quad sys32_ustat
+        .quad compat_sys_ustat
         .quad sys_dup2
         .quad sys_getppid
         .quad sys_getpgrp               /* 65 */
diff --git a/arch/x86/ia32/sys_ia32.c b/arch/x86/ia32/sys_ia32.c
index 6c0d7f6231af..efac92fd1efb 100644
--- a/arch/x86/ia32/sys_ia32.c
+++ b/arch/x86/ia32/sys_ia32.c
@@ -638,28 +638,6 @@ long sys32_uname(struct old_utsname __user *name)
         return err ? -EFAULT : 0;
 }
 
-long sys32_ustat(unsigned dev, struct ustat32 __user *u32p)
-{
-        struct ustat u;
-        mm_segment_t seg;
-        int ret;
-
-        seg = get_fs();
-        set_fs(KERNEL_DS);
-        ret = sys_ustat(dev, (struct ustat __user *)&u);
-        set_fs(seg);
-        if (ret < 0)
-                return ret;
-
-        if (!access_ok(VERIFY_WRITE, u32p, sizeof(struct ustat32)) ||
-            __put_user((__u32) u.f_tfree, &u32p->f_tfree) ||
-            __put_user((__u32) u.f_tinode, &u32p->f_tfree) ||
-            __copy_to_user(&u32p->f_fname, u.f_fname, sizeof(u.f_fname)) ||
-            __copy_to_user(&u32p->f_fpack, u.f_fpack, sizeof(u.f_fpack)))
-                ret = -EFAULT;
-        return ret;
-}
-
 asmlinkage long sys32_execve(char __user *name, compat_uptr_t __user *argv,
                              compat_uptr_t __user *envp, struct pt_regs *regs)
 {
diff --git a/arch/x86/include/asm/aes.h b/arch/x86/include/asm/aes.h
new file mode 100644
index 000000000000..80545a1cbe39
--- /dev/null
+++ b/arch/x86/include/asm/aes.h
@@ -0,0 +1,11 @@
+#ifndef ASM_X86_AES_H
+#define ASM_X86_AES_H
+
+#include <linux/crypto.h>
+#include <crypto/aes.h>
+
+void crypto_aes_encrypt_x86(struct crypto_aes_ctx *ctx, u8 *dst,
+                            const u8 *src);
+void crypto_aes_decrypt_x86(struct crypto_aes_ctx *ctx, u8 *dst,
+                            const u8 *src);
+#endif
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 7301e60dc4a8..0beba0d1468d 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -213,6 +213,7 @@ extern const char * const x86_power_flags[32];
 #define cpu_has_xmm             boot_cpu_has(X86_FEATURE_XMM)
 #define cpu_has_xmm2            boot_cpu_has(X86_FEATURE_XMM2)
 #define cpu_has_xmm3            boot_cpu_has(X86_FEATURE_XMM3)
+#define cpu_has_aes             boot_cpu_has(X86_FEATURE_AES)
 #define cpu_has_ht              boot_cpu_has(X86_FEATURE_HT)
 #define cpu_has_mp              boot_cpu_has(X86_FEATURE_MP)
 #define cpu_has_nx              boot_cpu_has(X86_FEATURE_NX)
diff --git a/arch/x86/include/asm/ia32.h b/arch/x86/include/asm/ia32.h
index 50ca486fd88c..1f7e62517284 100644
--- a/arch/x86/include/asm/ia32.h
+++ b/arch/x86/include/asm/ia32.h
@@ -129,13 +129,6 @@ typedef struct compat_siginfo {
         } _sifields;
 } compat_siginfo_t;
 
-struct ustat32 {
-        __u32                   f_tfree;
-        compat_ino_t            f_tinode;
-        char                    f_fname[6];
-        char                    f_fpack[6];
-};
-
 #define IA32_STACK_TOP IA32_PAGE_OFFSET
 
 #ifdef __KERNEL__
diff --git a/arch/x86/include/asm/kvm.h b/arch/x86/include/asm/kvm.h
index 886c9402ec45..dc3f6cf11704 100644
--- a/arch/x86/include/asm/kvm.h
+++ b/arch/x86/include/asm/kvm.h
@@ -15,6 +15,7 @@
 #define __KVM_HAVE_DEVICE_ASSIGNMENT
 #define __KVM_HAVE_MSI
 #define __KVM_HAVE_USER_NMI
+#define __KVM_HAVE_GUEST_DEBUG
 
 /* Architectural interrupt line count. */
 #define KVM_NR_INTERRUPTS 256
@@ -212,7 +213,30 @@ struct kvm_pit_channel_state {
         __s64 count_load_time;
 };
 
+struct kvm_debug_exit_arch {
+        __u32 exception;
+        __u32 pad;
+        __u64 pc;
+        __u64 dr6;
+        __u64 dr7;
+};
+
+#define KVM_GUESTDBG_USE_SW_BP          0x00010000
+#define KVM_GUESTDBG_USE_HW_BP          0x00020000
+#define KVM_GUESTDBG_INJECT_DB          0x00040000
+#define KVM_GUESTDBG_INJECT_BP          0x00080000
+
+/* for KVM_SET_GUEST_DEBUG */
+struct kvm_guest_debug_arch {
+        __u64 debugreg[8];
+};
+
 struct kvm_pit_state {
         struct kvm_pit_channel_state channels[3];
 };
+
+struct kvm_reinject_control {
+        __u8 pit_reinject;
+        __u8 reserved[31];
+};
 #endif /* _ASM_X86_KVM_H */
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 730843d1d2fb..f0faf58044ff 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -22,6 +22,7 @@
 #include <asm/pvclock-abi.h>
 #include <asm/desc.h>
 #include <asm/mtrr.h>
+#include <asm/msr-index.h>
 
 #define KVM_MAX_VCPUS 16
 #define KVM_MEMORY_SLOTS 32
@@ -134,11 +135,18 @@ enum {
 
 #define KVM_NR_MEM_OBJS 40
 
-struct kvm_guest_debug {
-        int enabled;
-        unsigned long bp[4];
-        int singlestep;
-};
+#define KVM_NR_DB_REGS  4
+
+#define DR6_BD          (1 << 13)
+#define DR6_BS          (1 << 14)
+#define DR6_FIXED_1     0xffff0ff0
+#define DR6_VOLATILE    0x0000e00f
+
+#define DR7_BP_EN_MASK  0x000000ff
+#define DR7_GE          (1 << 9)
+#define DR7_GD          (1 << 13)
+#define DR7_FIXED_1     0x00000400
+#define DR7_VOLATILE    0xffff23ff
 
 /*
  * We don't want allocation failures within the mmu code, so we preallocate
@@ -162,7 +170,8 @@ struct kvm_pte_chain {
  *   bits 0:3 - total guest paging levels (2-4, or zero for real mode)
  *   bits 4:7 - page table level for this shadow (1-4)
  *   bits 8:9 - page table quadrant for 2-level guests
- *   bit   16 - "metaphysical" - gfn is not a real page (huge page/real mode)
+ *   bit   16 - direct mapping of virtual to physical mapping at gfn
+ *              used for real mode and two-dimensional paging
  *   bits 17:19 - common access permissions for all ptes in this shadow page
  */
 union kvm_mmu_page_role {
@@ -172,9 +181,10 @@ union kvm_mmu_page_role {
                 unsigned level:4;
                 unsigned quadrant:2;
                 unsigned pad_for_nice_hex_output:6;
-                unsigned metaphysical:1;
+                unsigned direct:1;
                 unsigned access:3;
                 unsigned invalid:1;
+                unsigned cr4_pge:1;
         };
 };
 
@@ -218,6 +228,18 @@ struct kvm_pv_mmu_op_buffer {
         char buf[512] __aligned(sizeof(long));
 };
 
+struct kvm_pio_request {
+        unsigned long count;
+        int cur_count;
+        gva_t guest_gva;
+        int in;
+        int port;
+        int size;
+        int string;
+        int down;
+        int rep;
+};
+
 /*
  * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
  * 32-bit).  The kvm_mmu structure abstracts the details of the current mmu
@@ -236,6 +258,7 @@ struct kvm_mmu {
         hpa_t root_hpa;
         int root_level;
         int shadow_root_level;
+        union kvm_mmu_page_role base_role;
 
         u64 *pae_root;
 };
@@ -258,6 +281,7 @@ struct kvm_vcpu_arch {
         unsigned long cr3;
         unsigned long cr4;
         unsigned long cr8;
+        u32 hflags;
         u64 pdptrs[4]; /* pae */
         u64 shadow_efer;
         u64 apic_base;
@@ -338,6 +362,15 @@ struct kvm_vcpu_arch {
 
         struct mtrr_state_type mtrr_state;
         u32 pat;
+
+        int switch_db_regs;
+        unsigned long host_db[KVM_NR_DB_REGS];
+        unsigned long host_dr6;
+        unsigned long host_dr7;
+        unsigned long db[KVM_NR_DB_REGS];
+        unsigned long dr6;
+        unsigned long dr7;
+        unsigned long eff_db[KVM_NR_DB_REGS];
 };
 
 struct kvm_mem_alias {
@@ -378,6 +411,7 @@ struct kvm_arch{
 
         unsigned long irq_sources_bitmap;
         unsigned long irq_states[KVM_IOAPIC_NUM_PINS];
+        u64 vm_init_tsc;
 };
 
 struct kvm_vm_stat {
@@ -446,8 +480,7 @@ struct kvm_x86_ops {
         void (*vcpu_put)(struct kvm_vcpu *vcpu);
 
         int (*set_guest_debug)(struct kvm_vcpu *vcpu,
-                               struct kvm_debug_guest *dbg);
-        void (*guest_debug_pre)(struct kvm_vcpu *vcpu);
+                               struct kvm_guest_debug *dbg);
         int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
         int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
         u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
@@ -583,16 +616,12 @@ void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2,
                            u32 error_code);
 
-void kvm_pic_set_irq(void *opaque, int irq, int level);
+int kvm_pic_set_irq(void *opaque, int irq, int level);
 
 void kvm_inject_nmi(struct kvm_vcpu *vcpu);
 
 void fx_init(struct kvm_vcpu *vcpu);
 
-int emulator_read_std(unsigned long addr,
-                      void *val,
-                      unsigned int bytes,
-                      struct kvm_vcpu *vcpu);
 int emulator_write_emulated(unsigned long addr,
                             const void *val,
                             unsigned int bytes,
@@ -737,6 +766,10 @@ enum {
         TASK_SWITCH_GATE = 3,
 };
 
+#define HF_GIF_MASK             (1 << 0)
+#define HF_HIF_MASK             (1 << 1)
+#define HF_VINTR_MASK           (1 << 2)
+
 /*
  * Hardware virtualization extension instructions may fault if a
  * reboot turns off virtualization while processes are running.
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 2dbd2314139e..ec41fc16c167 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -18,11 +18,15 @@
 #define _EFER_LME               8  /* Long mode enable */
 #define _EFER_LMA               10 /* Long mode active (read-only) */
 #define _EFER_NX                11 /* No execute enable */
+#define _EFER_SVME              12 /* Enable virtualization */
+#define _EFER_FFXSR             14 /* Enable Fast FXSAVE/FXRSTOR */
 
 #define EFER_SCE                (1<<_EFER_SCE)
 #define EFER_LME                (1<<_EFER_LME)
 #define EFER_LMA                (1<<_EFER_LMA)
 #define EFER_NX                 (1<<_EFER_NX)
+#define EFER_SVME               (1<<_EFER_SVME)
+#define EFER_FFXSR              (1<<_EFER_FFXSR)
 
 /* Intel MSRs. Some also available on other CPUs */
 #define MSR_IA32_PERFCTR0               0x000000c1
@@ -365,4 +369,9 @@
 #define MSR_IA32_VMX_PROCBASED_CTLS2    0x0000048b
 #define MSR_IA32_VMX_EPT_VPID_CAP       0x0000048c
 
+/* AMD-V MSRs */
+
+#define MSR_VM_CR                       0xc0010114
+#define MSR_VM_HSAVE_PA                 0xc0010117
+
 #endif /* _ASM_X86_MSR_INDEX_H */
diff --git a/arch/x86/include/asm/socket.h b/arch/x86/include/asm/socket.h
index 8ab9cc8b2ecc..ca8bf2cd0ba9 100644
--- a/arch/x86/include/asm/socket.h
+++ b/arch/x86/include/asm/socket.h
@@ -54,4 +54,7 @@
 
 #define SO_MARK                 36
 
+#define SO_TIMESTAMPING         37
+#define SCM_TIMESTAMPING        SO_TIMESTAMPING
+
 #endif /* _ASM_X86_SOCKET_H */
diff --git a/arch/x86/include/asm/svm.h b/arch/x86/include/asm/svm.h
index 1b8afa78e869..82ada75f3ebf 100644
--- a/arch/x86/include/asm/svm.h
+++ b/arch/x86/include/asm/svm.h
@@ -174,10 +174,6 @@ struct __attribute__ ((__packed__)) vmcb {
 #define SVM_CPUID_FEATURE_SHIFT 2
 #define SVM_CPUID_FUNC 0x8000000a
 
-#define MSR_EFER_SVME_MASK (1ULL << 12)
-#define MSR_VM_CR       0xc0010114
-#define MSR_VM_HSAVE_PA 0xc0010117ULL
-
 #define SVM_VM_CR_SVM_DISABLE 4
 
 #define SVM_SELECTOR_S_SHIFT 4
diff --git a/arch/x86/include/asm/sys_ia32.h b/arch/x86/include/asm/sys_ia32.h
index ffb08be2a530..72a6dcd1299b 100644
--- a/arch/x86/include/asm/sys_ia32.h
+++ b/arch/x86/include/asm/sys_ia32.h
@@ -70,8 +70,6 @@ struct old_utsname;
 asmlinkage long sys32_olduname(struct oldold_utsname __user *);
 long sys32_uname(struct old_utsname __user *);
 
-long sys32_ustat(unsigned, struct ustat32 __user *);
-
 asmlinkage long sys32_execve(char __user *, compat_uptr_t __user *,
                              compat_uptr_t __user *, struct pt_regs *);
 asmlinkage long sys32_clone(unsigned int, unsigned int, struct pt_regs *);
diff --git a/arch/x86/include/asm/virtext.h b/arch/x86/include/asm/virtext.h
index 593636275238..e0f9aa16358b 100644
--- a/arch/x86/include/asm/virtext.h
+++ b/arch/x86/include/asm/virtext.h
@@ -118,7 +118,7 @@ static inline void cpu_svm_disable(void)
 
         wrmsrl(MSR_VM_HSAVE_PA, 0);
         rdmsrl(MSR_EFER, efer);
-        wrmsrl(MSR_EFER, efer & ~MSR_EFER_SVME_MASK);
+        wrmsrl(MSR_EFER, efer & ~EFER_SVME);
 }
 
 /** Makes sure SVM is disabled, if it is supported on the CPU
diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h
index d0238e6151d8..498f944010b9 100644
--- a/arch/x86/include/asm/vmx.h
+++ b/arch/x86/include/asm/vmx.h
@@ -270,8 +270,9 @@ enum vmcs_field {
 
 #define INTR_TYPE_EXT_INTR              (0 << 8) /* external interrupt */
 #define INTR_TYPE_NMI_INTR              (2 << 8) /* NMI */
-#define INTR_TYPE_EXCEPTION             (3 << 8) /* processor exception */
+#define INTR_TYPE_HARD_EXCEPTION        (3 << 8) /* processor exception */
 #define INTR_TYPE_SOFT_INTR             (4 << 8) /* software interrupt */
+#define INTR_TYPE_SOFT_EXCEPTION        (6 << 8) /* software exception */
 
 /* GUEST_INTERRUPTIBILITY_INFO flags. */
 #define GUEST_INTR_STATE_STI            0x00000001
@@ -311,7 +312,7 @@ enum vmcs_field {
 #define DEBUG_REG_ACCESS_TYPE           0x10    /* 4, direction of access */
 #define TYPE_MOV_TO_DR                  (0 << 4)
 #define TYPE_MOV_FROM_DR                (1 << 4)
-#define DEBUG_REG_ACCESS_REG            0xf00   /* 11:8, general purpose reg. */
+#define DEBUG_REG_ACCESS_REG(eq)        (((eq) >> 8) & 0xf) /* 11:8, general purpose reg. */
 
 
 /* segment AR */
diff --git a/arch/x86/kernel/cpu/cpufreq/Kconfig b/arch/x86/kernel/cpu/cpufreq/Kconfig
index 65792c2cc462..52c839875478 100644
--- a/arch/x86/kernel/cpu/cpufreq/Kconfig
+++ b/arch/x86/kernel/cpu/cpufreq/Kconfig
@@ -87,30 +87,15 @@ config X86_POWERNOW_K7_ACPI
 config X86_POWERNOW_K8
         tristate "AMD Opteron/Athlon64 PowerNow!"
         select CPU_FREQ_TABLE
+        depends on ACPI && ACPI_PROCESSOR
         help
-          This adds the CPUFreq driver for mobile AMD Opteron/Athlon64 processors.
+          This adds the CPUFreq driver for K8/K10 Opteron/Athlon64 processors.
 
           To compile this driver as a module, choose M here: the
           module will be called powernow-k8.
 
           For details, take a look at <file:Documentation/cpu-freq/>.
 
-          If in doubt, say N.
-
-config X86_POWERNOW_K8_ACPI
-        bool
-        prompt "ACPI Support" if X86_32
-        depends on ACPI && X86_POWERNOW_K8 && ACPI_PROCESSOR
-        depends on !(X86_POWERNOW_K8 = y && ACPI_PROCESSOR = m)
-        default y
-        help
-          This provides access to the K8s Processor Performance States via ACPI.
-          This driver is probably required for CPUFreq to work with multi-socket and
-          SMP systems.  It is not required on at least some single-socket yet
-          multi-core systems, even if SMP is enabled.
-
-          It is safe to say Y here.
-
 config X86_GX_SUSPMOD
         tristate "Cyrix MediaGX/NatSemi Geode Suspend Modulation"
         depends on X86_32 && PCI
diff --git a/arch/x86/kernel/cpu/cpufreq/Makefile b/arch/x86/kernel/cpu/cpufreq/Makefile
index 560f7760dae5..509296df294d 100644
--- a/arch/x86/kernel/cpu/cpufreq/Makefile
+++ b/arch/x86/kernel/cpu/cpufreq/Makefile
@@ -1,6 +1,11 @@
+# Link order matters. K8 is preferred to ACPI because of firmware bugs in early
+# K8 systems. ACPI is preferred to all other hardware-specific drivers.
+# speedstep-* is preferred over p4-clockmod.
+
+obj-$(CONFIG_X86_POWERNOW_K8)           += powernow-k8.o
+obj-$(CONFIG_X86_ACPI_CPUFREQ)          += acpi-cpufreq.o
 obj-$(CONFIG_X86_POWERNOW_K6)           += powernow-k6.o
 obj-$(CONFIG_X86_POWERNOW_K7)           += powernow-k7.o
-obj-$(CONFIG_X86_POWERNOW_K8)           += powernow-k8.o
 obj-$(CONFIG_X86_LONGHAUL)              += longhaul.o
 obj-$(CONFIG_X86_E_POWERSAVER)          += e_powersaver.o
 obj-$(CONFIG_ELAN_CPUFREQ)              += elanfreq.o
@@ -10,7 +15,6 @@ obj-$(CONFIG_X86_GX_SUSPMOD)		+= gx-suspmod.o
 obj-$(CONFIG_X86_SPEEDSTEP_ICH)         += speedstep-ich.o
 obj-$(CONFIG_X86_SPEEDSTEP_LIB)         += speedstep-lib.o
 obj-$(CONFIG_X86_SPEEDSTEP_SMI)         += speedstep-smi.o
-obj-$(CONFIG_X86_ACPI_CPUFREQ)          += acpi-cpufreq.o
 obj-$(CONFIG_X86_SPEEDSTEP_CENTRINO)    += speedstep-centrino.o
 obj-$(CONFIG_X86_P4_CLOCKMOD)           += p4-clockmod.o
 obj-$(CONFIG_X86_CPUFREQ_NFORCE2)       += cpufreq-nforce2.o
diff --git a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
index 22590cf688ae..23da96e57b17 100644
--- a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
+++ b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
@@ -1,5 +1,5 @@
 /*
- * acpi-cpufreq.c - ACPI Processor P-States Driver ($Revision: 1.4 $)
+ * acpi-cpufreq.c - ACPI Processor P-States Driver
  *
  *  Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
  *  Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
@@ -36,16 +36,18 @@
 #include <linux/ftrace.h>
 
 #include <linux/acpi.h>
+#include <linux/io.h>
+#include <linux/delay.h>
+#include <linux/uaccess.h>
+
 #include <acpi/processor.h>
 
-#include <asm/io.h>
 #include <asm/msr.h>
 #include <asm/processor.h>
 #include <asm/cpufeature.h>
-#include <asm/delay.h>
-#include <asm/uaccess.h>
 
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "acpi-cpufreq", msg)
+#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
+                "acpi-cpufreq", msg)
 
 MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski");
 MODULE_DESCRIPTION("ACPI Processor P-States Driver");
@@ -95,7 +97,7 @@ static unsigned extract_io(u32 value, struct acpi_cpufreq_data *data)
 
         perf = data->acpi_data;
 
-        for (i=0; i<perf->state_count; i++) {
+        for (i = 0; i < perf->state_count; i++) {
                 if (value == perf->states[i].status)
                         return data->freq_table[i].frequency;
         }
@@ -110,7 +112,7 @@ static unsigned extract_msr(u32 msr, struct acpi_cpufreq_data *data)
         msr &= INTEL_MSR_RANGE;
         perf = data->acpi_data;
 
-        for (i=0; data->freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
+        for (i = 0; data->freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
                 if (msr == perf->states[data->freq_table[i].index].status)
                         return data->freq_table[i].frequency;
         }
@@ -138,15 +140,13 @@ struct io_addr {
         u8 bit_width;
 };
 
-typedef union {
-        struct msr_addr msr;
-        struct io_addr io;
-} drv_addr_union;
-
 struct drv_cmd {
         unsigned int type;
         const struct cpumask *mask;
-        drv_addr_union addr;
+        union {
+                struct msr_addr msr;
+                struct io_addr io;
+        } addr;
         u32 val;
 };
 
@@ -369,7 +369,7 @@ static unsigned int check_freqs(const struct cpumask *mask, unsigned int freq,
         unsigned int cur_freq;
         unsigned int i;
 
-        for (i=0; i<100; i++) {
+        for (i = 0; i < 100; i++) {
                 cur_freq = extract_freq(get_cur_val(mask), data);
                 if (cur_freq == freq)
                         return 1;
@@ -494,7 +494,7 @@ acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu)
                 unsigned long freq;
                 unsigned long freqn = perf->states[0].core_frequency * 1000;
 
-                for (i=0; i<(perf->state_count-1); i++) {
+                for (i = 0; i < (perf->state_count-1); i++) {
                         freq = freqn;
                         freqn = perf->states[i+1].core_frequency * 1000;
                         if ((2 * cpu_khz) > (freqn + freq)) {
@@ -673,7 +673,7 @@ static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
 
         /* detect transition latency */
         policy->cpuinfo.transition_latency = 0;
-        for (i=0; i<perf->state_count; i++) {
+        for (i = 0; i < perf->state_count; i++) {
                 if ((perf->states[i].transition_latency * 1000) >
                     policy->cpuinfo.transition_latency)
                         policy->cpuinfo.transition_latency =
@@ -682,8 +682,8 @@ static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
 
         data->max_freq = perf->states[0].core_frequency * 1000;
         /* table init */
-        for (i=0; i<perf->state_count; i++) {
-                if (i>0 && perf->states[i].core_frequency >=
+        for (i = 0; i < perf->state_count; i++) {
+                if (i > 0 && perf->states[i].core_frequency >=
                     data->freq_table[valid_states-1].frequency / 1000)
                         continue;
 
diff --git a/arch/x86/kernel/cpu/cpufreq/cpufreq-nforce2.c b/arch/x86/kernel/cpu/cpufreq/cpufreq-nforce2.c
index 965ea52767ac..733093d60436 100644
--- a/arch/x86/kernel/cpu/cpufreq/cpufreq-nforce2.c
+++ b/arch/x86/kernel/cpu/cpufreq/cpufreq-nforce2.c
@@ -32,7 +32,7 @@
  * nforce2_chipset:
  * FSB is changed using the chipset
  */
-static struct pci_dev *nforce2_chipset_dev;
+static struct pci_dev *nforce2_dev;
 
 /* fid:
  * multiplier * 10
@@ -56,7 +56,9 @@ MODULE_PARM_DESC(fid, "CPU multiplier to use (11.5 = 115)");
 MODULE_PARM_DESC(min_fsb,
                 "Minimum FSB to use, if not defined: current FSB - 50");
 
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "cpufreq-nforce2", msg)
+#define PFX "cpufreq-nforce2: "
+#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
+                "cpufreq-nforce2", msg)
 
 /**
  * nforce2_calc_fsb - calculate FSB
@@ -118,11 +120,11 @@ static void nforce2_write_pll(int pll)
         int temp;
 
         /* Set the pll addr. to 0x00 */
-        pci_write_config_dword(nforce2_chipset_dev, NFORCE2_PLLADR, 0);
+        pci_write_config_dword(nforce2_dev, NFORCE2_PLLADR, 0);
 
         /* Now write the value in all 64 registers */
         for (temp = 0; temp <= 0x3f; temp++)
-                pci_write_config_dword(nforce2_chipset_dev, NFORCE2_PLLREG, pll);
+                pci_write_config_dword(nforce2_dev, NFORCE2_PLLREG, pll);
 
         return;
 }
@@ -139,8 +141,8 @@ static unsigned int nforce2_fsb_read(int bootfsb)
         u32 fsb, temp = 0;
 
         /* Get chipset boot FSB from subdevice 5 (FSB at boot-time) */
-        nforce2_sub5 = pci_get_subsys(PCI_VENDOR_ID_NVIDIA,
-                                                0x01EF, PCI_ANY_ID, PCI_ANY_ID, NULL);
+        nforce2_sub5 = pci_get_subsys(PCI_VENDOR_ID_NVIDIA, 0x01EF,
+                                PCI_ANY_ID, PCI_ANY_ID, NULL);
         if (!nforce2_sub5)
                 return 0;
 
@@ -148,13 +150,13 @@ static unsigned int nforce2_fsb_read(int bootfsb)
         fsb /= 1000000;
 
         /* Check if PLL register is already set */
-        pci_read_config_byte(nforce2_chipset_dev, NFORCE2_PLLENABLE, (u8 *)&temp);
+        pci_read_config_byte(nforce2_dev, NFORCE2_PLLENABLE, (u8 *)&temp);
 
         if (bootfsb || !temp)
                 return fsb;
 
         /* Use PLL register FSB value */
-        pci_read_config_dword(nforce2_chipset_dev, NFORCE2_PLLREG, &temp);
+        pci_read_config_dword(nforce2_dev, NFORCE2_PLLREG, &temp);
         fsb = nforce2_calc_fsb(temp);
 
         return fsb;
@@ -174,18 +176,18 @@ static int nforce2_set_fsb(unsigned int fsb)
         int pll = 0;
 
         if ((fsb > max_fsb) || (fsb < NFORCE2_MIN_FSB)) {
-                printk(KERN_ERR "cpufreq: FSB %d is out of range!\n", fsb);
+                printk(KERN_ERR PFX "FSB %d is out of range!\n", fsb);
                 return -EINVAL;
         }
 
         tfsb = nforce2_fsb_read(0);
         if (!tfsb) {
-                printk(KERN_ERR "cpufreq: Error while reading the FSB\n");
+                printk(KERN_ERR PFX "Error while reading the FSB\n");
                 return -EINVAL;
         }
 
         /* First write? Then set actual value */
-        pci_read_config_byte(nforce2_chipset_dev, NFORCE2_PLLENABLE, (u8 *)&temp);
+        pci_read_config_byte(nforce2_dev, NFORCE2_PLLENABLE, (u8 *)&temp);
         if (!temp) {
                 pll = nforce2_calc_pll(tfsb);
 
@@ -197,7 +199,7 @@ static int nforce2_set_fsb(unsigned int fsb)
 
         /* Enable write access */
         temp = 0x01;
-        pci_write_config_byte(nforce2_chipset_dev, NFORCE2_PLLENABLE, (u8)temp);
+        pci_write_config_byte(nforce2_dev, NFORCE2_PLLENABLE, (u8)temp);
 
         diff = tfsb - fsb;
 
@@ -222,7 +224,7 @@ static int nforce2_set_fsb(unsigned int fsb)
         }
 
         temp = 0x40;
-        pci_write_config_byte(nforce2_chipset_dev, NFORCE2_PLLADR, (u8)temp);
+        pci_write_config_byte(nforce2_dev, NFORCE2_PLLADR, (u8)temp);
 
         return 0;
 }
@@ -244,7 +246,8 @@ static unsigned int nforce2_get(unsigned int cpu)
  * nforce2_target - set a new CPUFreq policy
  * @policy: new policy
  * @target_freq: the target frequency
- * @relation: how that frequency relates to achieved frequency (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
+ * @relation: how that frequency relates to achieved frequency
+ *  (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
  *
  * Sets a new CPUFreq policy.
  */
@@ -276,7 +279,7 @@ static int nforce2_target(struct cpufreq_policy *policy,
         /* local_irq_save(flags); */
 
         if (nforce2_set_fsb(target_fsb) < 0)
-                printk(KERN_ERR "cpufreq: Changing FSB to %d failed\n",
+                printk(KERN_ERR PFX "Changing FSB to %d failed\n",
                         target_fsb);
         else
                 dprintk("Changed FSB successfully to %d\n",
@@ -327,8 +330,8 @@ static int nforce2_cpu_init(struct cpufreq_policy *policy)
         /* FIX: Get FID from CPU */
         if (!fid) {
                 if (!cpu_khz) {
-                        printk(KERN_WARNING
-                               "cpufreq: cpu_khz not set, can't calculate multiplier!\n");
+                        printk(KERN_WARNING PFX
+                        "cpu_khz not set, can't calculate multiplier!\n");
                         return -ENODEV;
                 }
 
@@ -343,7 +346,7 @@ static int nforce2_cpu_init(struct cpufreq_policy *policy)
                 }
         }
 
-        printk(KERN_INFO "cpufreq: FSB currently at %i MHz, FID %d.%d\n", fsb,
+        printk(KERN_INFO PFX "FSB currently at %i MHz, FID %d.%d\n", fsb,
                fid / 10, fid % 10);
 
         /* Set maximum FSB to FSB at boot time */
@@ -392,17 +395,18 @@ static struct cpufreq_driver nforce2_driver = {
  */
 static unsigned int nforce2_detect_chipset(void)
 {
-        nforce2_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_NVIDIA,
+        nforce2_dev = pci_get_subsys(PCI_VENDOR_ID_NVIDIA,
                                         PCI_DEVICE_ID_NVIDIA_NFORCE2,
                                         PCI_ANY_ID, PCI_ANY_ID, NULL);
 
-        if (nforce2_chipset_dev == NULL)
+        if (nforce2_dev == NULL)
                 return -ENODEV;
 
-        printk(KERN_INFO "cpufreq: Detected nForce2 chipset revision %X\n",
-               nforce2_chipset_dev->revision);
-        printk(KERN_INFO
-               "cpufreq: FSB changing is maybe unstable and can lead to crashes and data loss.\n");
+        printk(KERN_INFO PFX "Detected nForce2 chipset revision %X\n",
+               nforce2_dev->revision);
+        printk(KERN_INFO PFX
+               "FSB changing is maybe unstable and can lead to "
+               "crashes and data loss.\n");
 
         return 0;
 }
@@ -420,7 +424,7 @@ static int __init nforce2_init(void)
 
         /* detect chipset */
         if (nforce2_detect_chipset()) {
-                printk(KERN_ERR "cpufreq: No nForce2 chipset.\n");
+                printk(KERN_INFO PFX "No nForce2 chipset.\n");
                 return -ENODEV;
         }
 
diff --git a/arch/x86/kernel/cpu/cpufreq/e_powersaver.c b/arch/x86/kernel/cpu/cpufreq/e_powersaver.c
index 41ab3f064cb1..35a257dd4bb7 100644
--- a/arch/x86/kernel/cpu/cpufreq/e_powersaver.c
+++ b/arch/x86/kernel/cpu/cpufreq/e_powersaver.c
@@ -12,12 +12,12 @@
 #include <linux/cpufreq.h>
 #include <linux/ioport.h>
 #include <linux/slab.h>
+#include <linux/timex.h>
+#include <linux/io.h>
+#include <linux/delay.h>
 
 #include <asm/msr.h>
 #include <asm/tsc.h>
-#include <asm/timex.h>
-#include <asm/io.h>
-#include <asm/delay.h>
 
 #define EPS_BRAND_C7M   0
 #define EPS_BRAND_C7    1
@@ -184,7 +184,7 @@ static int eps_cpu_init(struct cpufreq_policy *policy)
                 break;
         }
 
-        switch(brand) {
+        switch (brand) {
         case EPS_BRAND_C7M:
                 printk(KERN_CONT "C7-M\n");
                 break;
@@ -218,17 +218,20 @@ static int eps_cpu_init(struct cpufreq_policy *policy)
         /* Print voltage and multiplier */
         rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
         current_voltage = lo & 0xff;
-        printk(KERN_INFO "eps: Current voltage = %dmV\n", current_voltage * 16 + 700);
+        printk(KERN_INFO "eps: Current voltage = %dmV\n",
+                        current_voltage * 16 + 700);
         current_multiplier = (lo >> 8) & 0xff;
         printk(KERN_INFO "eps: Current multiplier = %d\n", current_multiplier);
 
         /* Print limits */
         max_voltage = hi & 0xff;
-        printk(KERN_INFO "eps: Highest voltage = %dmV\n", max_voltage * 16 + 700);
+        printk(KERN_INFO "eps: Highest voltage = %dmV\n",
+                        max_voltage * 16 + 700);
         max_multiplier = (hi >> 8) & 0xff;
         printk(KERN_INFO "eps: Highest multiplier = %d\n", max_multiplier);
         min_voltage = (hi >> 16) & 0xff;
-        printk(KERN_INFO "eps: Lowest voltage = %dmV\n", min_voltage * 16 + 700);
+        printk(KERN_INFO "eps: Lowest voltage = %dmV\n",
+                        min_voltage * 16 + 700);
         min_multiplier = (hi >> 24) & 0xff;
         printk(KERN_INFO "eps: Lowest multiplier = %d\n", min_multiplier);
 
@@ -318,7 +321,7 @@ static int eps_cpu_exit(struct cpufreq_policy *policy)
         return 0;
 }
 
-static struct freq_attr* eps_attr[] = {
+static struct freq_attr *eps_attr[] = {
         &cpufreq_freq_attr_scaling_available_freqs,
         NULL,
 };
@@ -356,7 +359,7 @@ static void __exit eps_exit(void)
         cpufreq_unregister_driver(&eps_driver);
 }
 
-MODULE_AUTHOR("Rafa³ Bilski <rafalbilski@interia.pl>");
+MODULE_AUTHOR("Rafal Bilski <rafalbilski@interia.pl>");
 MODULE_DESCRIPTION("Enhanced PowerSaver driver for VIA C7 CPU's.");
 MODULE_LICENSE("GPL");
 
diff --git a/arch/x86/kernel/cpu/cpufreq/elanfreq.c b/arch/x86/kernel/cpu/cpufreq/elanfreq.c
index fe613c93b366..006b278b0d5d 100644
--- a/arch/x86/kernel/cpu/cpufreq/elanfreq.c
+++ b/arch/x86/kernel/cpu/cpufreq/elanfreq.c
@@ -184,7 +184,8 @@ static int elanfreq_target(struct cpufreq_policy *policy,
 {
         unsigned int newstate = 0;
 
-        if (cpufreq_frequency_table_target(policy, &elanfreq_table[0], target_freq, relation, &newstate))
+        if (cpufreq_frequency_table_target(policy, &elanfreq_table[0],
+                                target_freq, relation, &newstate))
                 return -EINVAL;
 
         elanfreq_set_cpu_state(newstate);
@@ -301,7 +302,8 @@ static void __exit elanfreq_exit(void)
 module_param(max_freq, int, 0444);
 
 MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Robert Schwebel <r.schwebel@pengutronix.de>, Sven Geggus <sven@geggus.net>");
+MODULE_AUTHOR("Robert Schwebel <r.schwebel@pengutronix.de>, "
+                "Sven Geggus <sven@geggus.net>");
 MODULE_DESCRIPTION("cpufreq driver for AMD's Elan CPUs");
 
 module_init(elanfreq_init);
diff --git a/arch/x86/kernel/cpu/cpufreq/gx-suspmod.c b/arch/x86/kernel/cpu/cpufreq/gx-suspmod.c
index 9d9eae82e60f..ac27ec2264d5 100644
--- a/arch/x86/kernel/cpu/cpufreq/gx-suspmod.c
+++ b/arch/x86/kernel/cpu/cpufreq/gx-suspmod.c
@@ -79,8 +79,9 @@
 #include <linux/smp.h>
 #include <linux/cpufreq.h>
 #include <linux/pci.h>
+#include <linux/errno.h>
+
 #include <asm/processor-cyrix.h>
-#include <asm/errno.h>
 
 /* PCI config registers, all at F0 */
 #define PCI_PMER1       0x80    /* power management enable register 1 */
@@ -122,8 +123,8 @@ static struct gxfreq_params *gx_params;
 static int stock_freq;
 
 /* PCI bus clock - defaults to 30.000 if cpu_khz is not available */
-static int pci_busclk = 0;
-module_param (pci_busclk, int, 0444);
+static int pci_busclk;
+module_param(pci_busclk, int, 0444);
 
 /* maximum duration for which the cpu may be suspended
  * (32us * MAX_DURATION). If no parameter is given, this defaults
@@ -132,7 +133,7 @@ module_param (pci_busclk, int, 0444);
  * is suspended -- processing power is just 0.39% of what it used to be,
  * though. 781.25 kHz(!) for a 200 MHz processor -- wow. */
 static int max_duration = 255;
-module_param (max_duration, int, 0444);
+module_param(max_duration, int, 0444);
 
 /* For the default policy, we want at least some processing power
  * - let's say 5%. (min = maxfreq / POLICY_MIN_DIV)
@@ -140,7 +141,8 @@ module_param (max_duration, int, 0444);
 #define POLICY_MIN_DIV 20
 
 
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "gx-suspmod", msg)
+#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
+                "gx-suspmod", msg)
 
 /**
  * we can detect a core multipiler from dir0_lsb
@@ -166,12 +168,20 @@ static int gx_freq_mult[16] = {
  *      Low Level chipset interface                             *
  ****************************************************************/
 static struct pci_device_id gx_chipset_tbl[] __initdata = {
-        { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5530_LEGACY, PCI_ANY_ID, PCI_ANY_ID },
-        { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5520, PCI_ANY_ID, PCI_ANY_ID },
-        { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5510, PCI_ANY_ID, PCI_ANY_ID },
+        { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5530_LEGACY,
+                PCI_ANY_ID, PCI_ANY_ID },
+        { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5520,
+                PCI_ANY_ID, PCI_ANY_ID },
+        { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5510,
+                PCI_ANY_ID, PCI_ANY_ID },
         { 0, },
 };
 
+static void gx_write_byte(int reg, int value)
+{
+        pci_write_config_byte(gx_params->cs55x0, reg, value);
+}
+
 /**
  * gx_detect_chipset:
  *
@@ -200,7 +210,8 @@ static __init struct pci_dev *gx_detect_chipset(void)
 /**
  * gx_get_cpuspeed:
  *
- * Finds out at which efficient frequency the Cyrix MediaGX/NatSemi Geode CPU runs.
+ * Finds out at which efficient frequency the Cyrix MediaGX/NatSemi
+ * Geode CPU runs.
  */
 static unsigned int gx_get_cpuspeed(unsigned int cpu)
 {
@@ -217,17 +228,18 @@ static unsigned int gx_get_cpuspeed(unsigned int cpu)
  *
  **/
 
-static unsigned int gx_validate_speed(unsigned int khz, u8 *on_duration, u8 *off_duration)
+static unsigned int gx_validate_speed(unsigned int khz, u8 *on_duration,
+                u8 *off_duration)
 {
         unsigned int i;
         u8 tmp_on, tmp_off;
         int old_tmp_freq = stock_freq;
         int tmp_freq;
 
-        *off_duration=1;
-        *on_duration=0;
+        *off_duration = 1;
+        *on_duration = 0;
 
-        for (i=max_duration; i>0; i--) {
+        for (i = max_duration; i > 0; i--) {
                 tmp_off = ((khz * i) / stock_freq) & 0xff;
                 tmp_on = i - tmp_off;
                 tmp_freq = (stock_freq * tmp_off) / i;
@@ -259,26 +271,34 @@ static void gx_set_cpuspeed(unsigned int khz)
         freqs.cpu = 0;
         freqs.old = gx_get_cpuspeed(0);
 
-        new_khz = gx_validate_speed(khz, &gx_params->on_duration, &gx_params->off_duration);
+        new_khz = gx_validate_speed(khz, &gx_params->on_duration,
+                        &gx_params->off_duration);
 
         freqs.new = new_khz;
 
         cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
         local_irq_save(flags);
 
-        if (new_khz != stock_freq) {  /* if new khz == 100% of CPU speed, it is special case */
+
+
+        if (new_khz != stock_freq) {
+                /* if new khz == 100% of CPU speed, it is special case */
                 switch (gx_params->cs55x0->device) {
                 case PCI_DEVICE_ID_CYRIX_5530_LEGACY:
                         pmer1 = gx_params->pci_pmer1 | IRQ_SPDUP | VID_SPDUP;
                         /* FIXME: need to test other values -- Zwane,Miura */
-                        pci_write_config_byte(gx_params->cs55x0, PCI_IRQTC, 4); /* typical 2 to 4ms */
-                        pci_write_config_byte(gx_params->cs55x0, PCI_VIDTC, 100);/* typical 50 to 100ms */
-                        pci_write_config_byte(gx_params->cs55x0, PCI_PMER1, pmer1);
-
-                        if (gx_params->cs55x0->revision < 0x10) {   /* CS5530(rev 1.2, 1.3) */
-                                suscfg = gx_params->pci_suscfg | SUSMOD;
-                        } else {                           /* CS5530A,B.. */
-                                suscfg = gx_params->pci_suscfg | SUSMOD | PWRSVE;
+                        /* typical 2 to 4ms */
+                        gx_write_byte(PCI_IRQTC, 4);
+                        /* typical 50 to 100ms */
+                        gx_write_byte(PCI_VIDTC, 100);
+                        gx_write_byte(PCI_PMER1, pmer1);
+
+                        if (gx_params->cs55x0->revision < 0x10) {
+                                /* CS5530(rev 1.2, 1.3) */
+                                suscfg = gx_params->pci_suscfg|SUSMOD;
+                        } else {
+                                /* CS5530A,B.. */
+                                suscfg = gx_params->pci_suscfg|SUSMOD|PWRSVE;
                         }
                         break;
                 case PCI_DEVICE_ID_CYRIX_5520:
@@ -294,13 +314,13 @@ static void gx_set_cpuspeed(unsigned int khz)
                 suscfg = gx_params->pci_suscfg & ~(SUSMOD);
                 gx_params->off_duration = 0;
                 gx_params->on_duration = 0;
-                dprintk("suspend modulation disabled: cpu runs 100 percent speed.\n");
+                dprintk("suspend modulation disabled: cpu runs 100%% speed.\n");
         }
 
-        pci_write_config_byte(gx_params->cs55x0, PCI_MODOFF, gx_params->off_duration);
-        pci_write_config_byte(gx_params->cs55x0, PCI_MODON, gx_params->on_duration);
+        gx_write_byte(PCI_MODOFF, gx_params->off_duration);
+        gx_write_byte(PCI_MODON, gx_params->on_duration);
 
-        pci_write_config_byte(gx_params->cs55x0, PCI_SUSCFG, suscfg);
+        gx_write_byte(PCI_SUSCFG, suscfg);
         pci_read_config_byte(gx_params->cs55x0, PCI_SUSCFG, &suscfg);
 
         local_irq_restore(flags);
@@ -334,7 +354,8 @@ static int cpufreq_gx_verify(struct cpufreq_policy *policy)
                 return -EINVAL;
 
         policy->cpu = 0;
-        cpufreq_verify_within_limits(policy, (stock_freq / max_duration), stock_freq);
+        cpufreq_verify_within_limits(policy, (stock_freq / max_duration),
+                        stock_freq);
 
         /* it needs to be assured that at least one supported frequency is
          * within policy->min and policy->max. If it is not, policy->max
@@ -354,7 +375,8 @@ static int cpufreq_gx_verify(struct cpufreq_policy *policy)
         policy->max = tmp_freq;
         if (policy->max < policy->min)
                 policy->max = policy->min;
-        cpufreq_verify_within_limits(policy, (stock_freq / max_duration), stock_freq);
+        cpufreq_verify_within_limits(policy, (stock_freq / max_duration),
+                        stock_freq);
 
         return 0;
 }
@@ -398,18 +420,18 @@ static int cpufreq_gx_cpu_init(struct cpufreq_policy *policy)
                 return -ENODEV;
 
         /* determine maximum frequency */
-        if (pci_busclk) {
+        if (pci_busclk)
                 maxfreq = pci_busclk * gx_freq_mult[getCx86(CX86_DIR1) & 0x0f];
-        } else if (cpu_khz) {
+        else if (cpu_khz)
                 maxfreq = cpu_khz;
-        } else {
+        else
                 maxfreq = 30000 * gx_freq_mult[getCx86(CX86_DIR1) & 0x0f];
-        }
+
         stock_freq = maxfreq;
         curfreq = gx_get_cpuspeed(0);
 
         dprintk("cpu max frequency is %d.\n", maxfreq);
-        dprintk("cpu current frequency is %dkHz.\n",curfreq);
+        dprintk("cpu current frequency is %dkHz.\n", curfreq);
 
         /* setup basic struct for cpufreq API */
         policy->cpu = 0;
@@ -447,7 +469,8 @@ static int __init cpufreq_gx_init(void)
         struct pci_dev *gx_pci;
 
         /* Test if we have the right hardware */
-        if ((gx_pci = gx_detect_chipset()) == NULL)
+        gx_pci = gx_detect_chipset();
+        if (gx_pci == NULL)
                 return -ENODEV;
 
         /* check whether module parameters are sane */
@@ -468,9 +491,11 @@ static int __init cpufreq_gx_init(void)
         pci_read_config_byte(params->cs55x0, PCI_PMER1, &(params->pci_pmer1));
         pci_read_config_byte(params->cs55x0, PCI_PMER2, &(params->pci_pmer2));
         pci_read_config_byte(params->cs55x0, PCI_MODON, &(params->on_duration));
-        pci_read_config_byte(params->cs55x0, PCI_MODOFF, &(params->off_duration));
+        pci_read_config_byte(params->cs55x0, PCI_MODOFF,
+                        &(params->off_duration));
 
-        if ((ret = cpufreq_register_driver(&gx_suspmod_driver))) {
+        ret = cpufreq_register_driver(&gx_suspmod_driver);
+        if (ret) {
                 kfree(params);
                 return ret;                   /* register error! */
         }
@@ -485,9 +510,9 @@ static void __exit cpufreq_gx_exit(void)
         kfree(gx_params);
 }
 
-MODULE_AUTHOR ("Hiroshi Miura <miura@da-cha.org>");
-MODULE_DESCRIPTION ("Cpufreq driver for Cyrix MediaGX and NatSemi Geode");
-MODULE_LICENSE ("GPL");
+MODULE_AUTHOR("Hiroshi Miura <miura@da-cha.org>");
+MODULE_DESCRIPTION("Cpufreq driver for Cyrix MediaGX and NatSemi Geode");
+MODULE_LICENSE("GPL");
 
 module_init(cpufreq_gx_init);
 module_exit(cpufreq_gx_exit);
diff --git a/arch/x86/kernel/cpu/cpufreq/longhaul.c b/arch/x86/kernel/cpu/cpufreq/longhaul.c
index a4cff5d6e380..f1c51aea064d 100644
--- a/arch/x86/kernel/cpu/cpufreq/longhaul.c
+++ b/arch/x86/kernel/cpu/cpufreq/longhaul.c
@@ -30,12 +30,12 @@
 #include <linux/slab.h>
 #include <linux/string.h>
 #include <linux/delay.h>
+#include <linux/timex.h>
+#include <linux/io.h>
+#include <linux/acpi.h>
+#include <linux/kernel.h>
 
 #include <asm/msr.h>
-#include <asm/timex.h>
-#include <asm/io.h>
-#include <asm/acpi.h>
-#include <linux/acpi.h>
 #include <acpi/processor.h>
 
 #include "longhaul.h"
@@ -58,7 +58,7 @@
 #define USE_NORTHBRIDGE         (1 << 2)
 
 static int cpu_model;
-static unsigned int numscales=16;
+static unsigned int numscales = 16;
 static unsigned int fsb;
 
 static const struct mV_pos *vrm_mV_table;
@@ -67,8 +67,8 @@ static const unsigned char *mV_vrm_table;
 static unsigned int highest_speed, lowest_speed; /* kHz */
 static unsigned int minmult, maxmult;
 static int can_scale_voltage;
-static struct acpi_processor *pr = NULL;
-static struct acpi_processor_cx *cx = NULL;
+static struct acpi_processor *pr;
+static struct acpi_processor_cx *cx;
 static u32 acpi_regs_addr;
 static u8 longhaul_flags;
 static unsigned int longhaul_index;
@@ -78,12 +78,13 @@ static int scale_voltage;
 static int disable_acpi_c3;
 static int revid_errata;
 
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "longhaul", msg)
+#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
+                "longhaul", msg)
 
 
 /* Clock ratios multiplied by 10 */
-static int clock_ratio[32];
-static int eblcr_table[32];
+static int mults[32];
+static int eblcr[32];
 static int longhaul_version;
 static struct cpufreq_frequency_table *longhaul_table;
 
@@ -93,7 +94,7 @@ static char speedbuffer[8];
 static char *print_speed(int speed)
 {
         if (speed < 1000) {
-                snprintf(speedbuffer, sizeof(speedbuffer),"%dMHz", speed);
+                snprintf(speedbuffer, sizeof(speedbuffer), "%dMHz", speed);
                 return speedbuffer;
         }
 
@@ -122,27 +123,28 @@ static unsigned int calc_speed(int mult)
 
 static int longhaul_get_cpu_mult(void)
 {
-        unsigned long invalue=0,lo, hi;
+        unsigned long invalue = 0, lo, hi;
 
-        rdmsr (MSR_IA32_EBL_CR_POWERON, lo, hi);
-        invalue = (lo & (1<<22|1<<23|1<<24|1<<25)) >>22;
-        if (longhaul_version==TYPE_LONGHAUL_V2 || longhaul_version==TYPE_POWERSAVER) {
+        rdmsr(MSR_IA32_EBL_CR_POWERON, lo, hi);
+        invalue = (lo & (1<<22|1<<23|1<<24|1<<25))>>22;
+        if (longhaul_version == TYPE_LONGHAUL_V2 ||
+            longhaul_version == TYPE_POWERSAVER) {
                 if (lo & (1<<27))
-                        invalue+=16;
+                        invalue += 16;
         }
-        return eblcr_table[invalue];
+        return eblcr[invalue];
 }
 
 /* For processor with BCR2 MSR */
 
-static void do_longhaul1(unsigned int clock_ratio_index)
+static void do_longhaul1(unsigned int mults_index)
 {
         union msr_bcr2 bcr2;
 
         rdmsrl(MSR_VIA_BCR2, bcr2.val);
         /* Enable software clock multiplier */
         bcr2.bits.ESOFTBF = 1;
-        bcr2.bits.CLOCKMUL = clock_ratio_index & 0xff;
+        bcr2.bits.CLOCKMUL = mults_index & 0xff;
 
         /* Sync to timer tick */
         safe_halt();
@@ -161,7 +163,7 @@ static void do_longhaul1(unsigned int clock_ratio_index)
 
 /* For processor with Longhaul MSR */
 
-static void do_powersaver(int cx_address, unsigned int clock_ratio_index,
+static void do_powersaver(int cx_address, unsigned int mults_index,
                           unsigned int dir)
 {
         union msr_longhaul longhaul;
@@ -173,11 +175,11 @@ static void do_powersaver(int cx_address, unsigned int clock_ratio_index,
                 longhaul.bits.RevisionKey = longhaul.bits.RevisionID;
         else
                 longhaul.bits.RevisionKey = 0;
-        longhaul.bits.SoftBusRatio = clock_ratio_index & 0xf;
-        longhaul.bits.SoftBusRatio4 = (clock_ratio_index & 0x10) >> 4;
+        longhaul.bits.SoftBusRatio = mults_index & 0xf;
+        longhaul.bits.SoftBusRatio4 = (mults_index & 0x10) >> 4;
         /* Setup new voltage */
         if (can_scale_voltage)
-                longhaul.bits.SoftVID = (clock_ratio_index >> 8) & 0x1f;
+                longhaul.bits.SoftVID = (mults_index >> 8) & 0x1f;
         /* Sync to timer tick */
         safe_halt();
         /* Raise voltage if necessary */
@@ -240,14 +242,14 @@ static void do_powersaver(int cx_address, unsigned int clock_ratio_index,
 
 /**
  * longhaul_set_cpu_frequency()
- * @clock_ratio_index : bitpattern of the new multiplier.
+ * @mults_index : bitpattern of the new multiplier.
  *
  * Sets a new clock ratio.
  */
 
 static void longhaul_setstate(unsigned int table_index)
 {
-        unsigned int clock_ratio_index;
+        unsigned int mults_index;
         int speed, mult;
         struct cpufreq_freqs freqs;
         unsigned long flags;
@@ -256,9 +258,9 @@ static void longhaul_setstate(unsigned int table_index)
         u32 bm_timeout = 1000;
         unsigned int dir = 0;
 
-        clock_ratio_index = longhaul_table[table_index].index;
+        mults_index = longhaul_table[table_index].index;
         /* Safety precautions */
-        mult = clock_ratio[clock_ratio_index & 0x1f];
+        mult = mults[mults_index & 0x1f];
         if (mult == -1)
                 return;
         speed = calc_speed(mult);
@@ -274,7 +276,7 @@ static void longhaul_setstate(unsigned int table_index)
 
         cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
 
-        dprintk ("Setting to FSB:%dMHz Mult:%d.%dx (%s)\n",
+        dprintk("Setting to FSB:%dMHz Mult:%d.%dx (%s)\n",
                         fsb, mult/10, mult%10, print_speed(speed/1000));
 retry_loop:
         preempt_disable();
@@ -282,8 +284,8 @@ retry_loop:
 
         pic2_mask = inb(0xA1);
         pic1_mask = inb(0x21);  /* works on C3. save mask. */
-        outb(0xFF,0xA1);        /* Overkill */
-        outb(0xFE,0x21);        /* TMR0 only */
+        outb(0xFF, 0xA1);       /* Overkill */
+        outb(0xFE, 0x21);       /* TMR0 only */
 
         /* Wait while PCI bus is busy. */
         if (acpi_regs_addr && (longhaul_flags & USE_NORTHBRIDGE
@@ -312,7 +314,7 @@ retry_loop:
          * Software controlled multipliers only.
          */
         case TYPE_LONGHAUL_V1:
-                do_longhaul1(clock_ratio_index);
+                do_longhaul1(mults_index);
                 break;
 
         /*
@@ -327,9 +329,9 @@ retry_loop:
                 if (longhaul_flags & USE_ACPI_C3) {
                         /* Don't allow wakeup */
                         acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
-                        do_powersaver(cx->address, clock_ratio_index, dir);
+                        do_powersaver(cx->address, mults_index, dir);
                 } else {
-                        do_powersaver(0, clock_ratio_index, dir);
+                        do_powersaver(0, mults_index, dir);
                 }
                 break;
         }
@@ -341,8 +343,8 @@ retry_loop:
                 /* Enable bus master arbitration */
                 acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0);
         }
-        outb(pic2_mask,0xA1);   /* restore mask */
-        outb(pic1_mask,0x21);
+        outb(pic2_mask, 0xA1);  /* restore mask */
+        outb(pic1_mask, 0x21);
 
         local_irq_restore(flags);
         preempt_enable();
@@ -392,7 +394,8 @@ retry_loop:
         cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
 
         if (!bm_timeout)
-                printk(KERN_INFO PFX "Warning: Timeout while waiting for idle PCI bus.\n");
+                printk(KERN_INFO PFX "Warning: Timeout while waiting for "
+                                "idle PCI bus.\n");
 }
 
 /*
@@ -458,31 +461,32 @@ static int __init longhaul_get_ranges(void)
                 break;
         }
 
-        dprintk ("MinMult:%d.%dx MaxMult:%d.%dx\n",
+        dprintk("MinMult:%d.%dx MaxMult:%d.%dx\n",
                  minmult/10, minmult%10, maxmult/10, maxmult%10);
 
         highest_speed = calc_speed(maxmult);
         lowest_speed = calc_speed(minmult);
-        dprintk ("FSB:%dMHz  Lowest speed: %s   Highest speed:%s\n", fsb,
+        dprintk("FSB:%dMHz  Lowest speed: %s   Highest speed:%s\n", fsb,
                  print_speed(lowest_speed/1000),
                  print_speed(highest_speed/1000));
 
         if (lowest_speed == highest_speed) {
-                printk (KERN_INFO PFX "highestspeed == lowest, aborting.\n");
+                printk(KERN_INFO PFX "highestspeed == lowest, aborting.\n");
                 return -EINVAL;
         }
         if (lowest_speed > highest_speed) {
-                printk (KERN_INFO PFX "nonsense! lowest (%d > %d) !\n",
+                printk(KERN_INFO PFX "nonsense! lowest (%d > %d) !\n",
                         lowest_speed, highest_speed);
                 return -EINVAL;
         }
 
-        longhaul_table = kmalloc((numscales + 1) * sizeof(struct cpufreq_frequency_table), GFP_KERNEL);
-        if(!longhaul_table)
+        longhaul_table = kmalloc((numscales + 1) * sizeof(*longhaul_table),
+                        GFP_KERNEL);
+        if (!longhaul_table)
                 return -ENOMEM;
 
         for (j = 0; j < numscales; j++) {
-                ratio = clock_ratio[j];
+                ratio = mults[j];
                 if (ratio == -1)
                         continue;
                 if (ratio > maxmult || ratio < minmult)
@@ -507,13 +511,10 @@ static int __init longhaul_get_ranges(void)
                         }
                 }
                 if (min_i != j) {
-                        unsigned int temp;
-                        temp = longhaul_table[j].frequency;
-                        longhaul_table[j].frequency = longhaul_table[min_i].frequency;
-                        longhaul_table[min_i].frequency = temp;
-                        temp = longhaul_table[j].index;
-                        longhaul_table[j].index = longhaul_table[min_i].index;
-                        longhaul_table[min_i].index = temp;
+                        swap(longhaul_table[j].frequency,
+                             longhaul_table[min_i].frequency);
+                        swap(longhaul_table[j].index,
+                             longhaul_table[min_i].index);
                 }
         }
 
@@ -521,7 +522,7 @@ static int __init longhaul_get_ranges(void)
 
         /* Find index we are running on */
         for (j = 0; j < k; j++) {
-                if (clock_ratio[longhaul_table[j].index & 0x1f] == mult) {
+                if (mults[longhaul_table[j].index & 0x1f] == mult) {
                         longhaul_index = j;
                         break;
                 }
@@ -559,20 +560,22 @@ static void __init longhaul_setup_voltagescaling(void)
         maxvid = vrm_mV_table[longhaul.bits.MaximumVID];
 
         if (minvid.mV == 0 || maxvid.mV == 0 || minvid.mV > maxvid.mV) {
-                printk (KERN_INFO PFX "Bogus values Min:%d.%03d Max:%d.%03d. "
+                printk(KERN_INFO PFX "Bogus values Min:%d.%03d Max:%d.%03d. "
                                         "Voltage scaling disabled.\n",
-                                        minvid.mV/1000, minvid.mV%1000, maxvid.mV/1000, maxvid.mV%1000);
+                                        minvid.mV/1000, minvid.mV%1000,
+                                        maxvid.mV/1000, maxvid.mV%1000);
                 return;
         }
 
         if (minvid.mV == maxvid.mV) {
-                printk (KERN_INFO PFX "Claims to support voltage scaling but min & max are "
-                                "both %d.%03d. Voltage scaling disabled\n",
+                printk(KERN_INFO PFX "Claims to support voltage scaling but "
+                                "min & max are both %d.%03d. "
+                                "Voltage scaling disabled\n",
                                 maxvid.mV/1000, maxvid.mV%1000);
                 return;
         }
 
-        /* How many voltage steps */
+        /* How many voltage steps*/
         numvscales = maxvid.pos - minvid.pos + 1;
         printk(KERN_INFO PFX
                 "Max VID=%d.%03d  "
@@ -586,7 +589,7 @@ static void __init longhaul_setup_voltagescaling(void)
         j = longhaul.bits.MinMHzBR;
         if (longhaul.bits.MinMHzBR4)
                 j += 16;
-        min_vid_speed = eblcr_table[j];
+        min_vid_speed = eblcr[j];
         if (min_vid_speed == -1)
                 return;
         switch (longhaul.bits.MinMHzFSB) {
@@ -617,7 +620,8 @@ static void __init longhaul_setup_voltagescaling(void)
                         pos = minvid.pos;
                 longhaul_table[j].index |= mV_vrm_table[pos] << 8;
                 vid = vrm_mV_table[mV_vrm_table[pos]];
-                printk(KERN_INFO PFX "f: %d kHz, index: %d, vid: %d mV\n", speed, j, vid.mV);
+                printk(KERN_INFO PFX "f: %d kHz, index: %d, vid: %d mV\n",
+                                speed, j, vid.mV);
                 j++;
         }
 
@@ -640,7 +644,8 @@ static int longhaul_target(struct cpufreq_policy *policy,
         unsigned int dir = 0;
         u8 vid, current_vid;
 
-        if (cpufreq_frequency_table_target(policy, longhaul_table, target_freq, relation, &table_index))
+        if (cpufreq_frequency_table_target(policy, longhaul_table, target_freq,
+                                relation, &table_index))
                 return -EINVAL;
 
         /* Don't set same frequency again */
@@ -656,7 +661,8 @@ static int longhaul_target(struct cpufreq_policy *policy,
                  * this in hardware, C3 is old and we need to do this
                  * in software. */
                 i = longhaul_index;
-                current_vid = (longhaul_table[longhaul_index].index >> 8) & 0x1f;
+                current_vid = (longhaul_table[longhaul_index].index >> 8);
+                current_vid &= 0x1f;
                 if (table_index > longhaul_index)
                         dir = 1;
                 while (i != table_index) {
@@ -691,9 +697,9 @@ static acpi_status longhaul_walk_callback(acpi_handle obj_handle,
 {
         struct acpi_device *d;
 
-        if ( acpi_bus_get_device(obj_handle, &d) ) {
+        if (acpi_bus_get_device(obj_handle, &d))
                 return 0;
-        }
+
         *return_value = acpi_driver_data(d);
         return 1;
 }
@@ -750,7 +756,7 @@ static int longhaul_setup_southbridge(void)
         /* Find VT8235 southbridge */
         dev = pci_get_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235, NULL);
         if (dev == NULL)
-        /* Find VT8237 southbridge */
+                /* Find VT8237 southbridge */
                 dev = pci_get_device(PCI_VENDOR_ID_VIA,
                                      PCI_DEVICE_ID_VIA_8237, NULL);
         if (dev != NULL) {
@@ -769,7 +775,8 @@ static int longhaul_setup_southbridge(void)
                 if (pci_cmd & 1 << 7) {
                         pci_read_config_dword(dev, 0x88, &acpi_regs_addr);
                         acpi_regs_addr &= 0xff00;
-                        printk(KERN_INFO PFX "ACPI I/O at 0x%x\n", acpi_regs_addr);
+                        printk(KERN_INFO PFX "ACPI I/O at 0x%x\n",
+                                        acpi_regs_addr);
                 }
 
                 pci_dev_put(dev);
@@ -781,7 +788,7 @@ static int longhaul_setup_southbridge(void)
 static int __init longhaul_cpu_init(struct cpufreq_policy *policy)
 {
         struct cpuinfo_x86 *c = &cpu_data(0);
-        char *cpuname=NULL;
+        char *cpuname = NULL;
         int ret;
         u32 lo, hi;
 
@@ -791,8 +798,8 @@ static int __init longhaul_cpu_init(struct cpufreq_policy *policy)
                 cpu_model = CPU_SAMUEL;
                 cpuname = "C3 'Samuel' [C5A]";
                 longhaul_version = TYPE_LONGHAUL_V1;
-                memcpy (clock_ratio, samuel1_clock_ratio, sizeof(samuel1_clock_ratio));
-                memcpy (eblcr_table, samuel1_eblcr, sizeof(samuel1_eblcr));
+                memcpy(mults, samuel1_mults, sizeof(samuel1_mults));
+                memcpy(eblcr, samuel1_eblcr, sizeof(samuel1_eblcr));
                 break;
 
         case 7:
@@ -803,10 +810,8 @@ static int __init longhaul_cpu_init(struct cpufreq_policy *policy)
                         cpuname = "C3 'Samuel 2' [C5B]";
                         /* Note, this is not a typo, early Samuel2's had
                          * Samuel1 ratios. */
-                        memcpy(clock_ratio, samuel1_clock_ratio,
-                                sizeof(samuel1_clock_ratio));
-                        memcpy(eblcr_table, samuel2_eblcr,
-                                sizeof(samuel2_eblcr));
+                        memcpy(mults, samuel1_mults, sizeof(samuel1_mults));
+                        memcpy(eblcr, samuel2_eblcr, sizeof(samuel2_eblcr));
                         break;
                 case 1 ... 15:
                         longhaul_version = TYPE_LONGHAUL_V1;
@@ -817,10 +822,8 @@ static int __init longhaul_cpu_init(struct cpufreq_policy *policy)
                                 cpu_model = CPU_EZRA;
                                 cpuname = "C3 'Ezra' [C5C]";
                         }
-                        memcpy(clock_ratio, ezra_clock_ratio,
-                                sizeof(ezra_clock_ratio));
-                        memcpy(eblcr_table, ezra_eblcr,
-                                sizeof(ezra_eblcr));
+                        memcpy(mults, ezra_mults, sizeof(ezra_mults));
+                        memcpy(eblcr, ezra_eblcr, sizeof(ezra_eblcr));
                         break;
                 }
                 break;
@@ -829,18 +832,16 @@ static int __init longhaul_cpu_init(struct cpufreq_policy *policy)
                 cpu_model = CPU_EZRA_T;
                 cpuname = "C3 'Ezra-T' [C5M]";
                 longhaul_version = TYPE_POWERSAVER;
-                numscales=32;
-                memcpy (clock_ratio, ezrat_clock_ratio, sizeof(ezrat_clock_ratio));
-                memcpy (eblcr_table, ezrat_eblcr, sizeof(ezrat_eblcr));
+                numscales = 32;
+                memcpy(mults, ezrat_mults, sizeof(ezrat_mults));
+                memcpy(eblcr, ezrat_eblcr, sizeof(ezrat_eblcr));
                 break;
 
         case 9:
                 longhaul_version = TYPE_POWERSAVER;
                 numscales = 32;
-                memcpy(clock_ratio,
-                       nehemiah_clock_ratio,
-                       sizeof(nehemiah_clock_ratio));
-                memcpy(eblcr_table, nehemiah_eblcr, sizeof(nehemiah_eblcr));
+                memcpy(mults, nehemiah_mults, sizeof(nehemiah_mults));
+                memcpy(eblcr, nehemiah_eblcr, sizeof(nehemiah_eblcr));
                 switch (c->x86_mask) {
                 case 0 ... 1:
                         cpu_model = CPU_NEHEMIAH;
@@ -869,14 +870,14 @@ static int __init longhaul_cpu_init(struct cpufreq_policy *policy)
                         longhaul_version = TYPE_LONGHAUL_V1;
         }
 
-        printk (KERN_INFO PFX "VIA %s CPU detected.  ", cpuname);
+        printk(KERN_INFO PFX "VIA %s CPU detected.  ", cpuname);
         switch (longhaul_version) {
         case TYPE_LONGHAUL_V1:
         case TYPE_LONGHAUL_V2:
-                printk ("Longhaul v%d supported.\n", longhaul_version);
+                printk(KERN_CONT "Longhaul v%d supported.\n", longhaul_version);
                 break;
         case TYPE_POWERSAVER:
-                printk ("Powersaver supported.\n");
+                printk(KERN_CONT "Powersaver supported.\n");
                 break;
         };
 
@@ -940,7 +941,7 @@ static int __devexit longhaul_cpu_exit(struct cpufreq_policy *policy)
         return 0;
 }
 
-static struct freq_attr* longhaul_attr[] = {
+static struct freq_attr *longhaul_attr[] = {
         &cpufreq_freq_attr_scaling_available_freqs,
         NULL,
 };
@@ -966,13 +967,15 @@ static int __init longhaul_init(void)
 
 #ifdef CONFIG_SMP
         if (num_online_cpus() > 1) {
-                printk(KERN_ERR PFX "More than 1 CPU detected, longhaul disabled.\n");
+                printk(KERN_ERR PFX "More than 1 CPU detected, "
+                                "longhaul disabled.\n");
                 return -ENODEV;
         }
 #endif
 #ifdef CONFIG_X86_IO_APIC
         if (cpu_has_apic) {
-                printk(KERN_ERR PFX "APIC detected. Longhaul is currently broken in this configuration.\n");
+                printk(KERN_ERR PFX "APIC detected. Longhaul is currently "
+                                "broken in this configuration.\n");
                 return -ENODEV;
         }
 #endif
@@ -993,8 +996,8 @@ static void __exit longhaul_exit(void)
 {
         int i;
 
-        for (i=0; i < numscales; i++) {
-                if (clock_ratio[i] == maxmult) {
+        for (i = 0; i < numscales; i++) {
+                if (mults[i] == maxmult) {
                         longhaul_setstate(i);
                         break;
                 }
@@ -1007,11 +1010,11 @@ static void __exit longhaul_exit(void)
 /* Even if BIOS is exporting ACPI C3 state, and it is used
  * with success when CPU is idle, this state doesn't
  * trigger frequency transition in some cases. */
-module_param (disable_acpi_c3, int, 0644);
+module_param(disable_acpi_c3, int, 0644);
 MODULE_PARM_DESC(disable_acpi_c3, "Don't use ACPI C3 support");
 /* Change CPU voltage with frequency. Very usefull to save
  * power, but most VIA C3 processors aren't supporting it. */
-module_param (scale_voltage, int, 0644);
+module_param(scale_voltage, int, 0644);
 MODULE_PARM_DESC(scale_voltage, "Scale voltage of processor");
 /* Force revision key to 0 for processors which doesn't
  * support voltage scaling, but are introducing itself as
@@ -1019,9 +1022,9 @@ MODULE_PARM_DESC(scale_voltage, "Scale voltage of processor");
 module_param(revid_errata, int, 0644);
 MODULE_PARM_DESC(revid_errata, "Ignore CPU Revision ID");
 
-MODULE_AUTHOR ("Dave Jones <davej@redhat.com>");
-MODULE_DESCRIPTION ("Longhaul driver for VIA Cyrix processors.");
-MODULE_LICENSE ("GPL");
+MODULE_AUTHOR("Dave Jones <davej@redhat.com>");
+MODULE_DESCRIPTION("Longhaul driver for VIA Cyrix processors.");
+MODULE_LICENSE("GPL");
 
 late_initcall(longhaul_init);
 module_exit(longhaul_exit);
diff --git a/arch/x86/kernel/cpu/cpufreq/longhaul.h b/arch/x86/kernel/cpu/cpufreq/longhaul.h
index 4fcc320997df..e2360a469f79 100644
--- a/arch/x86/kernel/cpu/cpufreq/longhaul.h
+++ b/arch/x86/kernel/cpu/cpufreq/longhaul.h
@@ -49,14 +49,14 @@ union msr_longhaul {
 
 /*
  * Clock ratio tables. Div/Mod by 10 to get ratio.
- * The eblcr ones specify the ratio read from the CPU.
- * The clock_ratio ones specify what to write to the CPU.
+ * The eblcr values specify the ratio read from the CPU.
+ * The mults values specify what to write to the CPU.
  */
 
 /*
  * VIA C3 Samuel 1  & Samuel 2 (stepping 0)
  */
-static const int __initdata samuel1_clock_ratio[16] = {
+static const int __initdata samuel1_mults[16] = {
         -1, /* 0000 -> RESERVED */
         30, /* 0001 ->  3.0x */
         40, /* 0010 ->  4.0x */
@@ -119,7 +119,7 @@ static const int __initdata samuel2_eblcr[16] = {
 /*
  * VIA C3 Ezra
  */
-static const int __initdata ezra_clock_ratio[16] = {
+static const int __initdata ezra_mults[16] = {
         100, /* 0000 -> 10.0x */
         30,  /* 0001 ->  3.0x */
         40,  /* 0010 ->  4.0x */
@@ -160,7 +160,7 @@ static const int __initdata ezra_eblcr[16] = {
 /*
  * VIA C3 (Ezra-T) [C5M].
  */
-static const int __initdata ezrat_clock_ratio[32] = {
+static const int __initdata ezrat_mults[32] = {
         100, /* 0000 -> 10.0x */
         30,  /* 0001 ->  3.0x */
         40,  /* 0010 ->  4.0x */
@@ -235,7 +235,7 @@ static const int __initdata ezrat_eblcr[32] = {
 /*
  * VIA C3 Nehemiah */
 
-static const int __initdata  nehemiah_clock_ratio[32] = {
+static const int __initdata  nehemiah_mults[32] = {
         100, /* 0000 -> 10.0x */
         -1, /* 0001 -> 16.0x */
         40,  /* 0010 ->  4.0x */
diff --git a/arch/x86/kernel/cpu/cpufreq/longrun.c b/arch/x86/kernel/cpu/cpufreq/longrun.c
index 777a7ff075de..da5f70fcb766 100644
--- a/arch/x86/kernel/cpu/cpufreq/longrun.c
+++ b/arch/x86/kernel/cpu/cpufreq/longrun.c
@@ -11,12 +11,13 @@
 #include <linux/init.h>
 #include <linux/slab.h>
 #include <linux/cpufreq.h>
+#include <linux/timex.h>
 
 #include <asm/msr.h>
 #include <asm/processor.h>
-#include <asm/timex.h>
 
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "longrun", msg)
+#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
+                "longrun", msg)
 
 static struct cpufreq_driver    longrun_driver;
 
@@ -51,7 +52,7 @@ static void __init longrun_get_policy(struct cpufreq_policy *policy)
         msr_lo &= 0x0000007F;
         msr_hi &= 0x0000007F;
 
-        if ( longrun_high_freq <= longrun_low_freq ) {
+        if (longrun_high_freq <= longrun_low_freq) {
                 /* Assume degenerate Longrun table */
                 policy->min = policy->max = longrun_high_freq;
         } else {
@@ -79,7 +80,7 @@ static int longrun_set_policy(struct cpufreq_policy *policy)
         if (!policy)
                 return -EINVAL;
 
-        if ( longrun_high_freq <= longrun_low_freq ) {
+        if (longrun_high_freq <= longrun_low_freq) {
                 /* Assume degenerate Longrun table */
                 pctg_lo = pctg_hi = 100;
         } else {
@@ -152,7 +153,7 @@ static unsigned int longrun_get(unsigned int cpu)
         cpuid(0x80860007, &eax, &ebx, &ecx, &edx);
         dprintk("cpuid eax is %u\n", eax);
 
-        return (eax * 1000);
+        return eax * 1000;
 }
 
 /**
@@ -196,7 +197,8 @@ static unsigned int __init longrun_determine_freqs(unsigned int *low_freq,
                 rdmsr(MSR_TMTA_LRTI_VOLT_MHZ, msr_lo, msr_hi);
                 *high_freq = msr_lo * 1000; /* to kHz */
 
-                dprintk("longrun table interface told %u - %u kHz\n", *low_freq, *high_freq);
+                dprintk("longrun table interface told %u - %u kHz\n",
+                                *low_freq, *high_freq);
 
                 if (*low_freq > *high_freq)
                         *low_freq = *high_freq;
@@ -219,7 +221,7 @@ static unsigned int __init longrun_determine_freqs(unsigned int *low_freq,
         cpuid(0x80860007, &eax, &ebx, &ecx, &edx);
         /* try decreasing in 10% steps, some processors react only
          * on some barrier values */
-        for (try_hi = 80; try_hi > 0 && ecx > 90; try_hi -=10) {
+        for (try_hi = 80; try_hi > 0 && ecx > 90; try_hi -= 10) {
                 /* set to 0 to try_hi perf_pctg */
                 msr_lo &= 0xFFFFFF80;
                 msr_hi &= 0xFFFFFF80;
@@ -236,7 +238,7 @@ static unsigned int __init longrun_determine_freqs(unsigned int *low_freq,
 
         /* performance_pctg = (current_freq - low_freq)/(high_freq - low_freq)
          * eqals
-         * low_freq * ( 1 - perf_pctg) = (cur_freq - high_freq * perf_pctg)
+         * low_freq * (1 - perf_pctg) = (cur_freq - high_freq * perf_pctg)
          *
          * high_freq * perf_pctg is stored tempoarily into "ebx".
          */
@@ -317,9 +319,10 @@ static void __exit longrun_exit(void)
 }
 
 
-MODULE_AUTHOR ("Dominik Brodowski <linux@brodo.de>");
-MODULE_DESCRIPTION ("LongRun driver for Transmeta Crusoe and Efficeon processors.");
-MODULE_LICENSE ("GPL");
+MODULE_AUTHOR("Dominik Brodowski <linux@brodo.de>");
+MODULE_DESCRIPTION("LongRun driver for Transmeta Crusoe and "
+                "Efficeon processors.");
+MODULE_LICENSE("GPL");
 
 module_init(longrun_init);
 module_exit(longrun_exit);
diff --git a/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c b/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c
index 3178c3acd97e..41ed94915f97 100644
--- a/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c
+++ b/arch/x86/kernel/cpu/cpufreq/p4-clockmod.c
@@ -27,15 +27,17 @@
 #include <linux/cpufreq.h>
 #include <linux/slab.h>
 #include <linux/cpumask.h>
+#include <linux/timex.h>
 
 #include <asm/processor.h>
 #include <asm/msr.h>
-#include <asm/timex.h>
+#include <asm/timer.h>
 
 #include "speedstep-lib.h"
 
 #define PFX     "p4-clockmod: "
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "p4-clockmod", msg)
+#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
+                "p4-clockmod", msg)
 
 /*
  * Duty Cycle (3bits), note DC_DISABLE is not specified in
@@ -58,7 +60,8 @@ static int cpufreq_p4_setdc(unsigned int cpu, unsigned int newstate)
 {
         u32 l, h;
 
-        if (!cpu_online(cpu) || (newstate > DC_DISABLE) || (newstate == DC_RESV))
+        if (!cpu_online(cpu) ||
+            (newstate > DC_DISABLE) || (newstate == DC_RESV))
                 return -EINVAL;
 
         rdmsr_on_cpu(cpu, MSR_IA32_THERM_STATUS, &l, &h);
@@ -66,7 +69,8 @@ static int cpufreq_p4_setdc(unsigned int cpu, unsigned int newstate)
         if (l & 0x01)
                 dprintk("CPU#%d currently thermal throttled\n", cpu);
 
-        if (has_N44_O17_errata[cpu] && (newstate == DC_25PT || newstate == DC_DFLT))
+        if (has_N44_O17_errata[cpu] &&
+            (newstate == DC_25PT || newstate == DC_DFLT))
                 newstate = DC_38PT;
 
         rdmsr_on_cpu(cpu, MSR_IA32_THERM_CONTROL, &l, &h);
@@ -112,7 +116,8 @@ static int cpufreq_p4_target(struct cpufreq_policy *policy,
         struct cpufreq_freqs freqs;
         int i;
 
-        if (cpufreq_frequency_table_target(policy, &p4clockmod_table[0], target_freq, relation, &newstate))
+        if (cpufreq_frequency_table_target(policy, &p4clockmod_table[0],
+                                target_freq, relation, &newstate))
                 return -EINVAL;
 
         freqs.old = cpufreq_p4_get(policy->cpu);
@@ -127,7 +132,8 @@ static int cpufreq_p4_target(struct cpufreq_policy *policy,
                 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
         }
 
-        /* run on each logical CPU, see section 13.15.3 of IA32 Intel Architecture Software
+        /* run on each logical CPU,
+         * see section 13.15.3 of IA32 Intel Architecture Software
          * Developer's Manual, Volume 3
          */
         for_each_cpu(i, policy->cpus)
@@ -153,28 +159,30 @@ static unsigned int cpufreq_p4_get_frequency(struct cpuinfo_x86 *c)
 {
         if (c->x86 == 0x06) {
                 if (cpu_has(c, X86_FEATURE_EST))
-                        printk(KERN_WARNING PFX "Warning: EST-capable CPU detected. "
-                               "The acpi-cpufreq module offers voltage scaling"
-                               " in addition of frequency scaling. You should use "
-                               "that instead of p4-clockmod, if possible.\n");
+                        printk(KERN_WARNING PFX "Warning: EST-capable CPU "
+                               "detected. The acpi-cpufreq module offers "
+                               "voltage scaling in addition of frequency "
+                               "scaling. You should use that instead of "
+                               "p4-clockmod, if possible.\n");
                 switch (c->x86_model) {
                 case 0x0E: /* Core */
                 case 0x0F: /* Core Duo */
                 case 0x16: /* Celeron Core */
                         p4clockmod_driver.flags |= CPUFREQ_CONST_LOOPS;
-                        return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_PCORE);
+                        return speedstep_get_frequency(SPEEDSTEP_CPU_PCORE);
                 case 0x0D: /* Pentium M (Dothan) */
                         p4clockmod_driver.flags |= CPUFREQ_CONST_LOOPS;
                         /* fall through */
                 case 0x09: /* Pentium M (Banias) */
-                        return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_PM);
+                        return speedstep_get_frequency(SPEEDSTEP_CPU_PM);
                 }
         }
 
         if (c->x86 != 0xF) {
                 if (!cpu_has(c, X86_FEATURE_EST))
-                        printk(KERN_WARNING PFX "Unknown p4-clockmod-capable CPU. "
-                                "Please send an e-mail to <cpufreq@vger.kernel.org>\n");
+                        printk(KERN_WARNING PFX "Unknown CPU. "
+                                "Please send an e-mail to "
+                                "<cpufreq@vger.kernel.org>\n");
                 return 0;
         }
 
@@ -182,16 +190,16 @@ static unsigned int cpufreq_p4_get_frequency(struct cpuinfo_x86 *c)
          * throttling is active or not. */
         p4clockmod_driver.flags |= CPUFREQ_CONST_LOOPS;
 
-        if (speedstep_detect_processor() == SPEEDSTEP_PROCESSOR_P4M) {
+        if (speedstep_detect_processor() == SPEEDSTEP_CPU_P4M) {
                 printk(KERN_WARNING PFX "Warning: Pentium 4-M detected. "
                        "The speedstep-ich or acpi cpufreq modules offer "
                        "voltage scaling in addition of frequency scaling. "
                        "You should use either one instead of p4-clockmod, "
                        "if possible.\n");
-                return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_P4M);
+                return speedstep_get_frequency(SPEEDSTEP_CPU_P4M);
         }
 
-        return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_P4D);
+        return speedstep_get_frequency(SPEEDSTEP_CPU_P4D);
 }
 
 
@@ -217,14 +225,20 @@ static int cpufreq_p4_cpu_init(struct cpufreq_policy *policy)
                 dprintk("has errata -- disabling low frequencies\n");
         }
 
+        if (speedstep_detect_processor() == SPEEDSTEP_CPU_P4D &&
+            c->x86_model < 2) {
+                /* switch to maximum frequency and measure result */
+                cpufreq_p4_setdc(policy->cpu, DC_DISABLE);
+                recalibrate_cpu_khz();
+        }
         /* get max frequency */
         stock_freq = cpufreq_p4_get_frequency(c);
         if (!stock_freq)
                 return -EINVAL;
 
         /* table init */
-        for (i=1; (p4clockmod_table[i].frequency != CPUFREQ_TABLE_END); i++) {
-                if ((i<2) && (has_N44_O17_errata[policy->cpu]))
+        for (i = 1; (p4clockmod_table[i].frequency != CPUFREQ_TABLE_END); i++) {
+                if ((i < 2) && (has_N44_O17_errata[policy->cpu]))
                         p4clockmod_table[i].frequency = CPUFREQ_ENTRY_INVALID;
                 else
                         p4clockmod_table[i].frequency = (stock_freq * i)/8;
@@ -232,7 +246,10 @@ static int cpufreq_p4_cpu_init(struct cpufreq_policy *policy)
         cpufreq_frequency_table_get_attr(p4clockmod_table, policy->cpu);
 
         /* cpuinfo and default policy values */
-        policy->cpuinfo.transition_latency = 1000000; /* assumed */
+
+        /* the transition latency is set to be 1 higher than the maximum
+         * transition latency of the ondemand governor */
+        policy->cpuinfo.transition_latency = 10000001;
         policy->cur = stock_freq;
 
         return cpufreq_frequency_table_cpuinfo(policy, &p4clockmod_table[0]);
@@ -258,12 +275,12 @@ static unsigned int cpufreq_p4_get(unsigned int cpu)
                 l = DC_DISABLE;
 
         if (l != DC_DISABLE)
-                return (stock_freq * l / 8);
+                return stock_freq * l / 8;
 
         return stock_freq;
 }
 
-static struct freq_attr* p4clockmod_attr[] = {
+static struct freq_attr *p4clockmod_attr[] = {
         &cpufreq_freq_attr_scaling_available_freqs,
         NULL,
 };
@@ -298,9 +315,10 @@ static int __init cpufreq_p4_init(void)
 
         ret = cpufreq_register_driver(&p4clockmod_driver);
         if (!ret)
-                printk(KERN_INFO PFX "P4/Xeon(TM) CPU On-Demand Clock Modulation available\n");
+                printk(KERN_INFO PFX "P4/Xeon(TM) CPU On-Demand Clock "
+                                "Modulation available\n");
 
-        return (ret);
+        return ret;
 }
 
 
@@ -310,9 +328,9 @@ static void __exit cpufreq_p4_exit(void)
 }
 
 
-MODULE_AUTHOR ("Zwane Mwaikambo <zwane@commfireservices.com>");
-MODULE_DESCRIPTION ("cpufreq driver for Pentium(TM) 4/Xeon(TM)");
-MODULE_LICENSE ("GPL");
+MODULE_AUTHOR("Zwane Mwaikambo <zwane@commfireservices.com>");
+MODULE_DESCRIPTION("cpufreq driver for Pentium(TM) 4/Xeon(TM)");
+MODULE_LICENSE("GPL");
 
 late_initcall(cpufreq_p4_init);
 module_exit(cpufreq_p4_exit);
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k6.c b/arch/x86/kernel/cpu/cpufreq/powernow-k6.c
index c1ac5790c63e..f10dea409f40 100644
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k6.c
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k6.c
@@ -1,6 +1,7 @@
 /*
  *  This file was based upon code in Powertweak Linux (http://powertweak.sf.net)
- *  (C) 2000-2003  Dave Jones, Arjan van de Ven, Janne Pänkälä, Dominik Brodowski.
+ *  (C) 2000-2003  Dave Jones, Arjan van de Ven, Janne Pänkälä,
+ *                 Dominik Brodowski.
  *
  *  Licensed under the terms of the GNU GPL License version 2.
  *
@@ -13,14 +14,15 @@
 #include <linux/cpufreq.h>
 #include <linux/ioport.h>
 #include <linux/slab.h>
-
-#include <asm/msr.h>
 #include <linux/timex.h>
 #include <linux/io.h>
 
+#include <asm/msr.h>
+
 #define POWERNOW_IOPORT 0xfff0          /* it doesn't matter where, as long
                                            as it is unused */
 
+#define PFX "powernow-k6: "
 static unsigned int                     busfreq;   /* FSB, in 10 kHz */
 static unsigned int                     max_multiplier;
 
@@ -47,8 +49,8 @@ static struct cpufreq_frequency_table clock_ratio[] = {
  */
 static int powernow_k6_get_cpu_multiplier(void)
 {
-        u64             invalue = 0;
-        u32             msrval;
+        u64 invalue = 0;
+        u32 msrval;
 
         msrval = POWERNOW_IOPORT + 0x1;
         wrmsr(MSR_K6_EPMR, msrval, 0); /* enable the PowerNow port */
@@ -68,12 +70,12 @@ static int powernow_k6_get_cpu_multiplier(void)
  */
 static void powernow_k6_set_state(unsigned int best_i)
 {
-        unsigned long           outvalue = 0, invalue = 0;
-        unsigned long           msrval;
-        struct cpufreq_freqs    freqs;
+        unsigned long outvalue = 0, invalue = 0;
+        unsigned long msrval;
+        struct cpufreq_freqs freqs;
 
         if (clock_ratio[best_i].index > max_multiplier) {
-                printk(KERN_ERR "cpufreq: invalid target frequency\n");
+                printk(KERN_ERR PFX "invalid target frequency\n");
                 return;
         }
 
@@ -119,7 +121,8 @@ static int powernow_k6_verify(struct cpufreq_policy *policy)
  * powernow_k6_setpolicy - sets a new CPUFreq policy
  * @policy: new policy
  * @target_freq: the target frequency
- * @relation: how that frequency relates to achieved frequency (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
+ * @relation: how that frequency relates to achieved frequency
+ *  (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
  *
  * sets a new CPUFreq policy
  */
@@ -127,9 +130,10 @@ static int powernow_k6_target(struct cpufreq_policy *policy,
                                unsigned int target_freq,
                                unsigned int relation)
 {
-        unsigned int    newstate = 0;
+        unsigned int newstate = 0;
 
-        if (cpufreq_frequency_table_target(policy, &clock_ratio[0], target_freq, relation, &newstate))
+        if (cpufreq_frequency_table_target(policy, &clock_ratio[0],
+                                target_freq, relation, &newstate))
                 return -EINVAL;
 
         powernow_k6_set_state(newstate);
@@ -140,7 +144,7 @@ static int powernow_k6_target(struct cpufreq_policy *policy,
 
 static int powernow_k6_cpu_init(struct cpufreq_policy *policy)
 {
-        unsigned int i;
+        unsigned int i, f;
         int result;
 
         if (policy->cpu != 0)
@@ -152,10 +156,11 @@ static int powernow_k6_cpu_init(struct cpufreq_policy *policy)
 
         /* table init */
         for (i = 0; (clock_ratio[i].frequency != CPUFREQ_TABLE_END); i++) {
-                if (clock_ratio[i].index > max_multiplier)
+                f = clock_ratio[i].index;
+                if (f > max_multiplier)
                         clock_ratio[i].frequency = CPUFREQ_ENTRY_INVALID;
                 else
-                        clock_ratio[i].frequency = busfreq * clock_ratio[i].index;
+                        clock_ratio[i].frequency = busfreq * f;
         }
 
         /* cpuinfo and default policy values */
@@ -185,7 +190,9 @@ static int powernow_k6_cpu_exit(struct cpufreq_policy *policy)
 
 static unsigned int powernow_k6_get(unsigned int cpu)
 {
-        return busfreq * powernow_k6_get_cpu_multiplier();
+        unsigned int ret;
+        ret = (busfreq * powernow_k6_get_cpu_multiplier());
+        return ret;
 }
 
 static struct freq_attr *powernow_k6_attr[] = {
@@ -221,7 +228,7 @@ static int __init powernow_k6_init(void)
                 return -ENODEV;
 
         if (!request_region(POWERNOW_IOPORT, 16, "PowerNow!")) {
-                printk("cpufreq: PowerNow IOPORT region already used.\n");
+                printk(KERN_INFO PFX "PowerNow IOPORT region already used.\n");
                 return -EIO;
         }
 
@@ -246,7 +253,8 @@ static void __exit powernow_k6_exit(void)
 }
 
 
-MODULE_AUTHOR("Arjan van de Ven, Dave Jones <davej@redhat.com>, Dominik Brodowski <linux@brodo.de>");
+MODULE_AUTHOR("Arjan van de Ven, Dave Jones <davej@redhat.com>, "
+                "Dominik Brodowski <linux@brodo.de>");
 MODULE_DESCRIPTION("PowerNow! driver for AMD K6-2+ / K6-3+ processors.");
 MODULE_LICENSE("GPL");
 
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k7.c b/arch/x86/kernel/cpu/cpufreq/powernow-k7.c
index 1b446d79a8fd..3c28ccd49742 100644
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k7.c
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k7.c
@@ -6,10 +6,12 @@
  *  Licensed under the terms of the GNU GPL License version 2.
  *  Based upon datasheets & sample CPUs kindly provided by AMD.
  *
- * Errata 5: Processor may fail to execute a FID/VID change in presence of interrupt.
- * - We cli/sti on stepping A0 CPUs around the FID/VID transition.
- * Errata 15: Processors with half frequency multipliers may hang upon wakeup from disconnect.
- * - We disable half multipliers if ACPI is used on A0 stepping CPUs.
+ * Errata 5:
+ *  CPU may fail to execute a FID/VID change in presence of interrupt.
+ *  - We cli/sti on stepping A0 CPUs around the FID/VID transition.
+ * Errata 15:
+ *  CPU with half frequency multipliers may hang upon wakeup from disconnect.
+ *  - We disable half multipliers if ACPI is used on A0 stepping CPUs.
  */
 
 #include <linux/kernel.h>
@@ -20,11 +22,11 @@
 #include <linux/slab.h>
 #include <linux/string.h>
 #include <linux/dmi.h>
+#include <linux/timex.h>
+#include <linux/io.h>
 
+#include <asm/timer.h>          /* Needed for recalibrate_cpu_khz() */
 #include <asm/msr.h>
-#include <asm/timer.h>
-#include <asm/timex.h>
-#include <asm/io.h>
 #include <asm/system.h>
 
 #ifdef CONFIG_X86_POWERNOW_K7_ACPI
@@ -58,9 +60,9 @@ struct pst_s {
 union powernow_acpi_control_t {
         struct {
                 unsigned long fid:5,
-                vid:5,
-                sgtc:20,
-                res1:2;
+                        vid:5,
+                        sgtc:20,
+                        res1:2;
         } bits;
         unsigned long val;
 };
@@ -94,14 +96,15 @@ static struct cpufreq_frequency_table *powernow_table;
 
 static unsigned int can_scale_bus;
 static unsigned int can_scale_vid;
-static unsigned int minimum_speed=-1;
+static unsigned int minimum_speed = -1;
 static unsigned int maximum_speed;
 static unsigned int number_scales;
 static unsigned int fsb;
 static unsigned int latency;
 static char have_a0;
 
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "powernow-k7", msg)
+#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
+                "powernow-k7", msg)
 
 static int check_fsb(unsigned int fsbspeed)
 {
@@ -109,7 +112,7 @@ static int check_fsb(unsigned int fsbspeed)
         unsigned int f = fsb / 1000;
 
         delta = (fsbspeed > f) ? fsbspeed - f : f - fsbspeed;
-        return (delta < 5);
+        return delta < 5;
 }
 
 static int check_powernow(void)
@@ -117,24 +120,26 @@ static int check_powernow(void)
         struct cpuinfo_x86 *c = &cpu_data(0);
         unsigned int maxei, eax, ebx, ecx, edx;
 
-        if ((c->x86_vendor != X86_VENDOR_AMD) || (c->x86 !=6)) {
+        if ((c->x86_vendor != X86_VENDOR_AMD) || (c->x86 != 6)) {
 #ifdef MODULE
-                printk (KERN_INFO PFX "This module only works with AMD K7 CPUs\n");
+                printk(KERN_INFO PFX "This module only works with "
+                                "AMD K7 CPUs\n");
 #endif
                 return 0;
         }
 
         /* Get maximum capabilities */
-        maxei = cpuid_eax (0x80000000);
+        maxei = cpuid_eax(0x80000000);
         if (maxei < 0x80000007) {       /* Any powernow info ? */
 #ifdef MODULE
-                printk (KERN_INFO PFX "No powernow capabilities detected\n");
+                printk(KERN_INFO PFX "No powernow capabilities detected\n");
 #endif
                 return 0;
         }
 
         if ((c->x86_model == 6) && (c->x86_mask == 0)) {
-                printk (KERN_INFO PFX "K7 660[A0] core detected, enabling errata workarounds\n");
+                printk(KERN_INFO PFX "K7 660[A0] core detected, "
+                                "enabling errata workarounds\n");
                 have_a0 = 1;
         }
 
@@ -144,37 +149,42 @@ static int check_powernow(void)
         if (!(edx & (1 << 1 | 1 << 2)))
                 return 0;
 
-        printk (KERN_INFO PFX "PowerNOW! Technology present. Can scale: ");
+        printk(KERN_INFO PFX "PowerNOW! Technology present. Can scale: ");
 
         if (edx & 1 << 1) {
-                printk ("frequency");
-                can_scale_bus=1;
+                printk("frequency");
+                can_scale_bus = 1;
         }
 
         if ((edx & (1 << 1 | 1 << 2)) == 0x6)
-                printk (" and ");
+                printk(" and ");
 
         if (edx & 1 << 2) {
-                printk ("voltage");
-                can_scale_vid=1;
+                printk("voltage");
+                can_scale_vid = 1;
         }
 
-        printk (".\n");
+        printk(".\n");
         return 1;
 }
 
+static void invalidate_entry(unsigned int entry)
+{
+        powernow_table[entry].frequency = CPUFREQ_ENTRY_INVALID;
+}
 
-static int get_ranges (unsigned char *pst)
+static int get_ranges(unsigned char *pst)
 {
         unsigned int j;
         unsigned int speed;
         u8 fid, vid;
 
-        powernow_table = kzalloc((sizeof(struct cpufreq_frequency_table) * (number_scales + 1)), GFP_KERNEL);
+        powernow_table = kzalloc((sizeof(struct cpufreq_frequency_table) *
+                                (number_scales + 1)), GFP_KERNEL);
         if (!powernow_table)
                 return -ENOMEM;
 
-        for (j=0 ; j < number_scales; j++) {
+        for (j = 0 ; j < number_scales; j++) {
                 fid = *pst++;
 
                 powernow_table[j].frequency = (fsb * fid_codes[fid]) / 10;
@@ -182,10 +192,10 @@ static int get_ranges (unsigned char *pst)
 
                 speed = powernow_table[j].frequency;
 
-                if ((fid_codes[fid] % 10)==5) {
+                if ((fid_codes[fid] % 10) == 5) {
 #ifdef CONFIG_X86_POWERNOW_K7_ACPI
                         if (have_a0 == 1)
-                                powernow_table[j].frequency = CPUFREQ_ENTRY_INVALID;
+                                invalidate_entry(j);
 #endif
                 }
 
@@ -197,7 +207,7 @@ static int get_ranges (unsigned char *pst)
                 vid = *pst++;
                 powernow_table[j].index |= (vid << 8); /* upper 8 bits */
 
-                dprintk ("   FID: 0x%x (%d.%dx [%dMHz])  "
+                dprintk("   FID: 0x%x (%d.%dx [%dMHz])  "
                          "VID: 0x%x (%d.%03dV)\n", fid, fid_codes[fid] / 10,
                          fid_codes[fid] % 10, speed/1000, vid,
                          mobile_vid_table[vid]/1000,
@@ -214,13 +224,13 @@ static void change_FID(int fid)
 {
         union msr_fidvidctl fidvidctl;
 
-        rdmsrl (MSR_K7_FID_VID_CTL, fidvidctl.val);
+        rdmsrl(MSR_K7_FID_VID_CTL, fidvidctl.val);
         if (fidvidctl.bits.FID != fid) {
                 fidvidctl.bits.SGTC = latency;
                 fidvidctl.bits.FID = fid;
                 fidvidctl.bits.VIDC = 0;
                 fidvidctl.bits.FIDC = 1;
-                wrmsrl (MSR_K7_FID_VID_CTL, fidvidctl.val);
+                wrmsrl(MSR_K7_FID_VID_CTL, fidvidctl.val);
         }
 }
 
@@ -229,18 +239,18 @@ static void change_VID(int vid)
 {
         union msr_fidvidctl fidvidctl;
 
-        rdmsrl (MSR_K7_FID_VID_CTL, fidvidctl.val);
+        rdmsrl(MSR_K7_FID_VID_CTL, fidvidctl.val);
         if (fidvidctl.bits.VID != vid) {
                 fidvidctl.bits.SGTC = latency;
                 fidvidctl.bits.VID = vid;
                 fidvidctl.bits.FIDC = 0;
                 fidvidctl.bits.VIDC = 1;
-                wrmsrl (MSR_K7_FID_VID_CTL, fidvidctl.val);
+                wrmsrl(MSR_K7_FID_VID_CTL, fidvidctl.val);
         }
 }
 
 
-static void change_speed (unsigned int index)
+static void change_speed(unsigned int index)
 {
         u8 fid, vid;
         struct cpufreq_freqs freqs;
@@ -257,7 +267,7 @@ static void change_speed (unsigned int index)
 
         freqs.cpu = 0;
 
-        rdmsrl (MSR_K7_FID_VID_STATUS, fidvidstatus.val);
+        rdmsrl(MSR_K7_FID_VID_STATUS, fidvidstatus.val);
         cfid = fidvidstatus.bits.CFID;
         freqs.old = fsb * fid_codes[cfid] / 10;
 
@@ -321,12 +331,14 @@ static int powernow_acpi_init(void)
                 goto err1;
         }
 
-        if (acpi_processor_perf->control_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE) {
+        if (acpi_processor_perf->control_register.space_id !=
+                        ACPI_ADR_SPACE_FIXED_HARDWARE) {
                 retval = -ENODEV;
                 goto err2;
         }
 
-        if (acpi_processor_perf->status_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE) {
+        if (acpi_processor_perf->status_register.space_id !=
+                        ACPI_ADR_SPACE_FIXED_HARDWARE) {
                 retval = -ENODEV;
                 goto err2;
         }
@@ -338,7 +350,8 @@ static int powernow_acpi_init(void)
                 goto err2;
         }
 
-        powernow_table = kzalloc((number_scales + 1) * (sizeof(struct cpufreq_frequency_table)), GFP_KERNEL);
+        powernow_table = kzalloc((sizeof(struct cpufreq_frequency_table) *
+                                (number_scales + 1)), GFP_KERNEL);
         if (!powernow_table) {
                 retval = -ENOMEM;
                 goto err2;
@@ -352,7 +365,7 @@ static int powernow_acpi_init(void)
                 unsigned int speed, speed_mhz;
 
                 pc.val = (unsigned long) state->control;
-                dprintk ("acpi:  P%d: %d MHz %d mW %d uS control %08x SGTC %d\n",
+                dprintk("acpi:  P%d: %d MHz %d mW %d uS control %08x SGTC %d\n",
                          i,
                          (u32) state->core_frequency,
                          (u32) state->power,
@@ -381,12 +394,12 @@ static int powernow_acpi_init(void)
                 if (speed % 1000 > 0)
                         speed_mhz++;
 
-                if ((fid_codes[fid] % 10)==5) {
+                if ((fid_codes[fid] % 10) == 5) {
                         if (have_a0 == 1)
-                                powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
+                                invalidate_entry(i);
                 }
 
-                dprintk ("   FID: 0x%x (%d.%dx [%dMHz])  "
+                dprintk("   FID: 0x%x (%d.%dx [%dMHz])  "
                          "VID: 0x%x (%d.%03dV)\n", fid, fid_codes[fid] / 10,
                          fid_codes[fid] % 10, speed_mhz, vid,
                          mobile_vid_table[vid]/1000,
@@ -422,7 +435,8 @@ err1:
 err05:
         kfree(acpi_processor_perf);
 err0:
-        printk(KERN_WARNING PFX "ACPI perflib can not be used in this platform\n");
+        printk(KERN_WARNING PFX "ACPI perflib can not be used on "
+                        "this platform\n");
         acpi_processor_perf = NULL;
         return retval;
 }
@@ -435,7 +449,14 @@ static int powernow_acpi_init(void)
 }
 #endif
 
-static int powernow_decode_bios (int maxfid, int startvid)
+static void print_pst_entry(struct pst_s *pst, unsigned int j)
+{
+        dprintk("PST:%d (@%p)\n", j, pst);
+        dprintk(" cpuid: 0x%x  fsb: %d  maxFID: 0x%x  startvid: 0x%x\n",
+                pst->cpuid, pst->fsbspeed, pst->maxfid, pst->startvid);
+}
+
+static int powernow_decode_bios(int maxfid, int startvid)
 {
         struct psb_s *psb;
         struct pst_s *pst;
@@ -446,61 +467,67 @@ static int powernow_decode_bios (int maxfid, int startvid)
 
         etuple = cpuid_eax(0x80000001);
 
-        for (i=0xC0000; i < 0xffff0 ; i+=16) {
+        for (i = 0xC0000; i < 0xffff0 ; i += 16) {
 
                 p = phys_to_virt(i);
 
-                if (memcmp(p, "AMDK7PNOW!",  10) == 0){
-                        dprintk ("Found PSB header at %p\n", p);
+                if (memcmp(p, "AMDK7PNOW!",  10) == 0) {
+                        dprintk("Found PSB header at %p\n", p);
                         psb = (struct psb_s *) p;
-                        dprintk ("Table version: 0x%x\n", psb->tableversion);
+                        dprintk("Table version: 0x%x\n", psb->tableversion);
                         if (psb->tableversion != 0x12) {
-                                printk (KERN_INFO PFX "Sorry, only v1.2 tables supported right now\n");
+                                printk(KERN_INFO PFX "Sorry, only v1.2 tables"
+                                                " supported right now\n");
                                 return -ENODEV;
                         }
 
-                        dprintk ("Flags: 0x%x\n", psb->flags);
-                        if ((psb->flags & 1)==0) {
-                                dprintk ("Mobile voltage regulator\n");
-                        } else {
-                                dprintk ("Desktop voltage regulator\n");
-                        }
+                        dprintk("Flags: 0x%x\n", psb->flags);
+                        if ((psb->flags & 1) == 0)
+                                dprintk("Mobile voltage regulator\n");
+                        else
+                                dprintk("Desktop voltage regulator\n");
 
                         latency = psb->settlingtime;
                         if (latency < 100) {
-                                printk(KERN_INFO PFX "BIOS set settling time to %d microseconds. "
-                                                "Should be at least 100. Correcting.\n", latency);
+                                printk(KERN_INFO PFX "BIOS set settling time "
+                                                "to %d microseconds. "
+                                                "Should be at least 100. "
+                                                "Correcting.\n", latency);
                                 latency = 100;
                         }
-                        dprintk ("Settling Time: %d microseconds.\n", psb->settlingtime);
-                        dprintk ("Has %d PST tables. (Only dumping ones relevant to this CPU).\n", psb->numpst);
+                        dprintk("Settling Time: %d microseconds.\n",
+                                        psb->settlingtime);
+                        dprintk("Has %d PST tables. (Only dumping ones "
+                                        "relevant to this CPU).\n",
+                                        psb->numpst);
 
-                        p += sizeof (struct psb_s);
+                        p += sizeof(struct psb_s);
 
                         pst = (struct pst_s *) p;
 
-                        for (j=0; j<psb->numpst; j++) {
+                        for (j = 0; j < psb->numpst; j++) {
                                 pst = (struct pst_s *) p;
                                 number_scales = pst->numpstates;
 
-                                if ((etuple == pst->cpuid) && check_fsb(pst->fsbspeed) &&
-                                    (maxfid==pst->maxfid) && (startvid==pst->startvid))
-                                {
-                                        dprintk ("PST:%d (@%p)\n", j, pst);
-                                        dprintk (" cpuid: 0x%x  fsb: %d  maxFID: 0x%x  startvid: 0x%x\n",
-                                                 pst->cpuid, pst->fsbspeed, pst->maxfid, pst->startvid);
-
-                                        ret = get_ranges ((char *) pst + sizeof (struct pst_s));
+                                if ((etuple == pst->cpuid) &&
+                                    check_fsb(pst->fsbspeed) &&
+                                    (maxfid == pst->maxfid) &&
+                                    (startvid == pst->startvid)) {
+                                        print_pst_entry(pst, j);
+                                        p = (char *)pst + sizeof(struct pst_s);
+                                        ret = get_ranges(p);
                                         return ret;
                                 } else {
                                         unsigned int k;
-                                        p = (char *) pst + sizeof (struct pst_s);
-                                        for (k=0; k<number_scales; k++)
-                                                p+=2;
+                                        p = (char *)pst + sizeof(struct pst_s);
+                                        for (k = 0; k < number_scales; k++)
+                                                p += 2;
                                 }
                         }
-                        printk (KERN_INFO PFX "No PST tables match this cpuid (0x%x)\n", etuple);
-                        printk (KERN_INFO PFX "This is indicative of a broken BIOS.\n");
+                        printk(KERN_INFO PFX "No PST tables match this cpuid "
+                                        "(0x%x)\n", etuple);
+                        printk(KERN_INFO PFX "This is indicative of a broken "
+                                        "BIOS.\n");
 
                         return -EINVAL;
                 }
@@ -511,13 +538,14 @@ static int powernow_decode_bios (int maxfid, int startvid)
 }
 
 
-static int powernow_target (struct cpufreq_policy *policy,
+static int powernow_target(struct cpufreq_policy *policy,
                             unsigned int target_freq,
                             unsigned int relation)
 {
         unsigned int newstate;
 
-        if (cpufreq_frequency_table_target(policy, powernow_table, target_freq, relation, &newstate))
+        if (cpufreq_frequency_table_target(policy, powernow_table, target_freq,
+                                relation, &newstate))
                 return -EINVAL;
 
         change_speed(newstate);
@@ -526,7 +554,7 @@ static int powernow_target (struct cpufreq_policy *policy,
 }
 
 
-static int powernow_verify (struct cpufreq_policy *policy)
+static int powernow_verify(struct cpufreq_policy *policy)
 {
         return cpufreq_frequency_table_verify(policy, powernow_table);
 }
@@ -566,18 +594,23 @@ static unsigned int powernow_get(unsigned int cpu)
 
         if (cpu)
                 return 0;
-        rdmsrl (MSR_K7_FID_VID_STATUS, fidvidstatus.val);
+        rdmsrl(MSR_K7_FID_VID_STATUS, fidvidstatus.val);
         cfid = fidvidstatus.bits.CFID;
 
-        return (fsb * fid_codes[cfid] / 10);
+        return fsb * fid_codes[cfid] / 10;
 }
 
 
 static int __init acer_cpufreq_pst(const struct dmi_system_id *d)
 {
-        printk(KERN_WARNING "%s laptop with broken PST tables in BIOS detected.\n", d->ident);
-        printk(KERN_WARNING "You need to downgrade to 3A21 (09/09/2002), or try a newer BIOS than 3A71 (01/20/2003)\n");
-        printk(KERN_WARNING "cpufreq scaling has been disabled as a result of this.\n");
+        printk(KERN_WARNING PFX
+                "%s laptop with broken PST tables in BIOS detected.\n",
+                d->ident);
+        printk(KERN_WARNING PFX
+                "You need to downgrade to 3A21 (09/09/2002), or try a newer "
+                "BIOS than 3A71 (01/20/2003)\n");
+        printk(KERN_WARNING PFX
+                "cpufreq scaling has been disabled as a result of this.\n");
         return 0;
 }
 
@@ -598,7 +631,7 @@ static struct dmi_system_id __initdata powernow_dmi_table[] = {
         { }
 };
 
-static int __init powernow_cpu_init (struct cpufreq_policy *policy)
+static int __init powernow_cpu_init(struct cpufreq_policy *policy)
 {
         union msr_fidvidstatus fidvidstatus;
         int result;
@@ -606,7 +639,7 @@ static int __init powernow_cpu_init (struct cpufreq_policy *policy)
         if (policy->cpu != 0)
                 return -ENODEV;
 
-        rdmsrl (MSR_K7_FID_VID_STATUS, fidvidstatus.val);
+        rdmsrl(MSR_K7_FID_VID_STATUS, fidvidstatus.val);
 
         recalibrate_cpu_khz();
 
@@ -618,19 +651,21 @@ static int __init powernow_cpu_init (struct cpufreq_policy *policy)
         dprintk("FSB: %3dMHz\n", fsb/1000);
 
         if (dmi_check_system(powernow_dmi_table) || acpi_force) {
-                printk (KERN_INFO PFX "PSB/PST known to be broken.  Trying ACPI instead\n");
+                printk(KERN_INFO PFX "PSB/PST known to be broken.  "
+                                "Trying ACPI instead\n");
                 result = powernow_acpi_init();
         } else {
-                result = powernow_decode_bios(fidvidstatus.bits.MFID, fidvidstatus.bits.SVID);
+                result = powernow_decode_bios(fidvidstatus.bits.MFID,
+                                fidvidstatus.bits.SVID);
                 if (result) {
-                        printk (KERN_INFO PFX "Trying ACPI perflib\n");
+                        printk(KERN_INFO PFX "Trying ACPI perflib\n");
                         maximum_speed = 0;
                         minimum_speed = -1;
                         latency = 0;
                         result = powernow_acpi_init();
                         if (result) {
-                                printk (KERN_INFO PFX "ACPI and legacy methods failed\n");
-                                printk (KERN_INFO PFX "See http://www.codemonkey.org.uk/projects/cpufreq/powernow-k7.html\n");
+                                printk(KERN_INFO PFX
+                                        "ACPI and legacy methods failed\n");
                         }
                 } else {
                         /* SGTC use the bus clock as timer */
@@ -642,10 +677,11 @@ static int __init powernow_cpu_init (struct cpufreq_policy *policy)
         if (result)
                 return result;
 
-        printk (KERN_INFO PFX "Minimum speed %d MHz. Maximum speed %d MHz.\n",
+        printk(KERN_INFO PFX "Minimum speed %d MHz. Maximum speed %d MHz.\n",
                                 minimum_speed/1000, maximum_speed/1000);
 
-        policy->cpuinfo.transition_latency = cpufreq_scale(2000000UL, fsb, latency);
+        policy->cpuinfo.transition_latency =
+                cpufreq_scale(2000000UL, fsb, latency);
 
         policy->cur = powernow_get(0);
 
@@ -654,7 +690,8 @@ static int __init powernow_cpu_init (struct cpufreq_policy *policy)
         return cpufreq_frequency_table_cpuinfo(policy, powernow_table);
 }
 
-static int powernow_cpu_exit (struct cpufreq_policy *policy) {
+static int powernow_cpu_exit(struct cpufreq_policy *policy)
+{
         cpufreq_frequency_table_put_attr(policy->cpu);
 
 #ifdef CONFIG_X86_POWERNOW_K7_ACPI
@@ -669,7 +706,7 @@ static int powernow_cpu_exit (struct cpufreq_policy *policy) {
         return 0;
 }
 
-static struct freq_attr* powernow_table_attr[] = {
+static struct freq_attr *powernow_table_attr[] = {
         &cpufreq_freq_attr_scaling_available_freqs,
         NULL,
 };
@@ -685,15 +722,15 @@ static struct cpufreq_driver powernow_driver = {
         .attr   = powernow_table_attr,
 };
 
-static int __init powernow_init (void)
+static int __init powernow_init(void)
 {
-        if (check_powernow()==0)
+        if (check_powernow() == 0)
                 return -ENODEV;
         return cpufreq_register_driver(&powernow_driver);
 }
 
 
-static void __exit powernow_exit (void)
+static void __exit powernow_exit(void)
 {
         cpufreq_unregister_driver(&powernow_driver);
 }
@@ -701,9 +738,9 @@ static void __exit powernow_exit (void)
 module_param(acpi_force,  int, 0444);
 MODULE_PARM_DESC(acpi_force, "Force ACPI to be used.");
 
-MODULE_AUTHOR ("Dave Jones <davej@redhat.com>");
-MODULE_DESCRIPTION ("Powernow driver for AMD K7 processors.");
-MODULE_LICENSE ("GPL");
+MODULE_AUTHOR("Dave Jones <davej@redhat.com>");
+MODULE_DESCRIPTION("Powernow driver for AMD K7 processors.");
+MODULE_LICENSE("GPL");
 
 late_initcall(powernow_init);
 module_exit(powernow_exit);
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
index 6428aa17b40e..a15ac94e0b9b 100644
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
@@ -33,16 +33,14 @@
 #include <linux/string.h>
 #include <linux/cpumask.h>
 #include <linux/sched.h>        /* for current / set_cpus_allowed() */
+#include <linux/io.h>
+#include <linux/delay.h>
 
 #include <asm/msr.h>
-#include <asm/io.h>
-#include <asm/delay.h>
 
-#ifdef CONFIG_X86_POWERNOW_K8_ACPI
 #include <linux/acpi.h>
 #include <linux/mutex.h>
 #include <acpi/processor.h>
-#endif
 
 #define PFX "powernow-k8: "
 #define VERSION "version 2.20.00"
@@ -71,7 +69,8 @@ static u32 find_khz_freq_from_fid(u32 fid)
         return 1000 * find_freq_from_fid(fid);
 }
 
-static u32 find_khz_freq_from_pstate(struct cpufreq_frequency_table *data, u32 pstate)
+static u32 find_khz_freq_from_pstate(struct cpufreq_frequency_table *data,
+                u32 pstate)
 {
         return data[pstate].frequency;
 }
@@ -186,7 +185,9 @@ static int write_new_fid(struct powernow_k8_data *data, u32 fid)
                 return 1;
         }
 
-        lo = fid | (data->currvid << MSR_C_LO_VID_SHIFT) | MSR_C_LO_INIT_FID_VID;
+        lo = fid;
+        lo |= (data->currvid << MSR_C_LO_VID_SHIFT);
+        lo |= MSR_C_LO_INIT_FID_VID;
 
         dprintk("writing fid 0x%x, lo 0x%x, hi 0x%x\n",
                 fid, lo, data->plllock * PLL_LOCK_CONVERSION);
@@ -194,7 +195,9 @@ static int write_new_fid(struct powernow_k8_data *data, u32 fid)
         do {
                 wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION);
                 if (i++ > 100) {
-                        printk(KERN_ERR PFX "Hardware error - pending bit very stuck - no further pstate changes possible\n");
+                        printk(KERN_ERR PFX
+                                "Hardware error - pending bit very stuck - "
+                                "no further pstate changes possible\n");
                         return 1;
                 }
         } while (query_current_values_with_pending_wait(data));
@@ -202,14 +205,16 @@ static int write_new_fid(struct powernow_k8_data *data, u32 fid)
         count_off_irt(data);
 
         if (savevid != data->currvid) {
-                printk(KERN_ERR PFX "vid change on fid trans, old 0x%x, new 0x%x\n",
-                       savevid, data->currvid);
+                printk(KERN_ERR PFX
+                        "vid change on fid trans, old 0x%x, new 0x%x\n",
+                        savevid, data->currvid);
                 return 1;
         }
 
         if (fid != data->currfid) {
-                printk(KERN_ERR PFX "fid trans failed, fid 0x%x, curr 0x%x\n", fid,
-                        data->currfid);
+                printk(KERN_ERR PFX
+                        "fid trans failed, fid 0x%x, curr 0x%x\n", fid,
+                        data->currfid);
                 return 1;
         }
 
@@ -228,7 +233,9 @@ static int write_new_vid(struct powernow_k8_data *data, u32 vid)
                 return 1;
         }
 
-        lo = data->currfid | (vid << MSR_C_LO_VID_SHIFT) | MSR_C_LO_INIT_FID_VID;
+        lo = data->currfid;
+        lo |= (vid << MSR_C_LO_VID_SHIFT);
+        lo |= MSR_C_LO_INIT_FID_VID;
 
         dprintk("writing vid 0x%x, lo 0x%x, hi 0x%x\n",
                 vid, lo, STOP_GRANT_5NS);
@@ -236,20 +243,24 @@ static int write_new_vid(struct powernow_k8_data *data, u32 vid)
         do {
                 wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS);
                 if (i++ > 100) {
-                        printk(KERN_ERR PFX "internal error - pending bit very stuck - no further pstate changes possible\n");
+                        printk(KERN_ERR PFX "internal error - pending bit "
+                                        "very stuck - no further pstate "
+                                        "changes possible\n");
                         return 1;
                 }
         } while (query_current_values_with_pending_wait(data));
 
         if (savefid != data->currfid) {
-                printk(KERN_ERR PFX "fid changed on vid trans, old 0x%x new 0x%x\n",
+                printk(KERN_ERR PFX "fid changed on vid trans, old "
+                        "0x%x new 0x%x\n",
                        savefid, data->currfid);
                 return 1;
         }
 
         if (vid != data->currvid) {
-                printk(KERN_ERR PFX "vid trans failed, vid 0x%x, curr 0x%x\n", vid,
-                                data->currvid);
+                printk(KERN_ERR PFX "vid trans failed, vid 0x%x, "
+                                "curr 0x%x\n",
+                                vid, data->currvid);
                 return 1;
         }
 
@@ -261,7 +272,8 @@ static int write_new_vid(struct powernow_k8_data *data, u32 vid)
  * Decreasing vid codes represent increasing voltages:
  * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of VID_OFF is off.
  */
-static int decrease_vid_code_by_step(struct powernow_k8_data *data, u32 reqvid, u32 step)
+static int decrease_vid_code_by_step(struct powernow_k8_data *data,
+                u32 reqvid, u32 step)
 {
         if ((data->currvid - reqvid) > step)
                 reqvid = data->currvid - step;
@@ -283,7 +295,8 @@ static int transition_pstate(struct powernow_k8_data *data, u32 pstate)
 }
 
 /* Change Opteron/Athlon64 fid and vid, by the 3 phases. */
-static int transition_fid_vid(struct powernow_k8_data *data, u32 reqfid, u32 reqvid)
+static int transition_fid_vid(struct powernow_k8_data *data,
+                u32 reqfid, u32 reqvid)
 {
         if (core_voltage_pre_transition(data, reqvid))
                 return 1;
@@ -298,7 +311,8 @@ static int transition_fid_vid(struct powernow_k8_data *data, u32 reqfid, u32 req
                 return 1;
 
         if ((reqfid != data->currfid) || (reqvid != data->currvid)) {
-                printk(KERN_ERR PFX "failed (cpu%d): req 0x%x 0x%x, curr 0x%x 0x%x\n",
+                printk(KERN_ERR PFX "failed (cpu%d): req 0x%x 0x%x, "
+                                "curr 0x%x 0x%x\n",
                                 smp_processor_id(),
                                 reqfid, reqvid, data->currfid, data->currvid);
                 return 1;
@@ -311,13 +325,15 @@ static int transition_fid_vid(struct powernow_k8_data *data, u32 reqfid, u32 req
 }
 
 /* Phase 1 - core voltage transition ... setup voltage */
-static int core_voltage_pre_transition(struct powernow_k8_data *data, u32 reqvid)
+static int core_voltage_pre_transition(struct powernow_k8_data *data,
+                u32 reqvid)
 {
         u32 rvosteps = data->rvo;
         u32 savefid = data->currfid;
         u32 maxvid, lo;
 
-        dprintk("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, reqvid 0x%x, rvo 0x%x\n",
+        dprintk("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, "
+                "reqvid 0x%x, rvo 0x%x\n",
                 smp_processor_id(),
                 data->currfid, data->currvid, reqvid, data->rvo);
 
@@ -340,7 +356,7 @@ static int core_voltage_pre_transition(struct powernow_k8_data *data, u32 reqvid
                 } else {
                         dprintk("ph1: changing vid for rvo, req 0x%x\n",
                                 data->currvid - 1);
-                        if (decrease_vid_code_by_step(data, data->currvid - 1, 1))
+                        if (decrease_vid_code_by_step(data, data->currvid-1, 1))
                                 return 1;
                         rvosteps--;
                 }
@@ -350,7 +366,8 @@ static int core_voltage_pre_transition(struct powernow_k8_data *data, u32 reqvid
                 return 1;
 
         if (savefid != data->currfid) {
-                printk(KERN_ERR PFX "ph1 err, currfid changed 0x%x\n", data->currfid);
+                printk(KERN_ERR PFX "ph1 err, currfid changed 0x%x\n",
+                                data->currfid);
                 return 1;
         }
 
@@ -363,20 +380,24 @@ static int core_voltage_pre_transition(struct powernow_k8_data *data, u32 reqvid
 /* Phase 2 - core frequency transition */
 static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid)
 {
-        u32 vcoreqfid, vcocurrfid, vcofiddiff, fid_interval, savevid = data->currvid;
+        u32 vcoreqfid, vcocurrfid, vcofiddiff;
+        u32 fid_interval, savevid = data->currvid;
 
-        if ((reqfid < HI_FID_TABLE_BOTTOM) && (data->currfid < HI_FID_TABLE_BOTTOM)) {
-                printk(KERN_ERR PFX "ph2: illegal lo-lo transition 0x%x 0x%x\n",
-                        reqfid, data->currfid);
+        if ((reqfid < HI_FID_TABLE_BOTTOM) &&
+            (data->currfid < HI_FID_TABLE_BOTTOM)) {
+                printk(KERN_ERR PFX "ph2: illegal lo-lo transition "
+                                "0x%x 0x%x\n", reqfid, data->currfid);
                 return 1;
         }
 
         if (data->currfid == reqfid) {
-                printk(KERN_ERR PFX "ph2 null fid transition 0x%x\n", data->currfid);
+                printk(KERN_ERR PFX "ph2 null fid transition 0x%x\n",
+                                data->currfid);
                 return 0;
         }
 
-        dprintk("ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, reqfid 0x%x\n",
+        dprintk("ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, "
+                "reqfid 0x%x\n",
                 smp_processor_id(),
                 data->currfid, data->currvid, reqfid);
 
@@ -390,14 +411,14 @@ static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid)
 
                 if (reqfid > data->currfid) {
                         if (data->currfid > LO_FID_TABLE_TOP) {
-                                if (write_new_fid(data, data->currfid + fid_interval)) {
+                                if (write_new_fid(data,
+                                                data->currfid + fid_interval))
                                         return 1;
-                                }
                         } else {
                                 if (write_new_fid
-                                    (data, 2 + convert_fid_to_vco_fid(data->currfid))) {
+                                    (data,
+                                     2 + convert_fid_to_vco_fid(data->currfid)))
                                         return 1;
-                                }
                         }
                 } else {
                         if (write_new_fid(data, data->currfid - fid_interval))
@@ -417,7 +438,8 @@ static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid)
 
         if (data->currfid != reqfid) {
                 printk(KERN_ERR PFX
-                        "ph2: mismatch, failed fid transition, curr 0x%x, req 0x%x\n",
+                        "ph2: mismatch, failed fid transition, "
+                        "curr 0x%x, req 0x%x\n",
                         data->currfid, reqfid);
                 return 1;
         }
@@ -435,7 +457,8 @@ static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid)
 }
 
 /* Phase 3 - core voltage transition flow ... jump to the final vid. */
-static int core_voltage_post_transition(struct powernow_k8_data *data, u32 reqvid)
+static int core_voltage_post_transition(struct powernow_k8_data *data,
+                u32 reqvid)
 {
         u32 savefid = data->currfid;
         u32 savereqvid = reqvid;
@@ -457,7 +480,8 @@ static int core_voltage_post_transition(struct powernow_k8_data *data, u32 reqvi
 
                 if (data->currvid != reqvid) {
                         printk(KERN_ERR PFX
-                               "ph3: failed vid transition\n, req 0x%x, curr 0x%x",
+                               "ph3: failed vid transition\n, "
+                               "req 0x%x, curr 0x%x",
                                reqvid, data->currvid);
                         return 1;
                 }
@@ -508,7 +532,8 @@ static int check_supported_cpu(unsigned int cpu)
         if ((eax & CPUID_XFAM) == CPUID_XFAM_K8) {
                 if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) ||
                     ((eax & CPUID_XMOD) > CPUID_XMOD_REV_MASK)) {
-                        printk(KERN_INFO PFX "Processor cpuid %x not supported\n", eax);
+                        printk(KERN_INFO PFX
+                                "Processor cpuid %x not supported\n", eax);
                         goto out;
                 }
 
@@ -520,8 +545,10 @@ static int check_supported_cpu(unsigned int cpu)
                 }
 
                 cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx);
-                if ((edx & P_STATE_TRANSITION_CAPABLE) != P_STATE_TRANSITION_CAPABLE) {
-                        printk(KERN_INFO PFX "Power state transitions not supported\n");
+                if ((edx & P_STATE_TRANSITION_CAPABLE)
+                        != P_STATE_TRANSITION_CAPABLE) {
+                        printk(KERN_INFO PFX
+                                "Power state transitions not supported\n");
                         goto out;
                 }
         } else { /* must be a HW Pstate capable processor */
@@ -539,7 +566,8 @@ out:
         return rc;
 }
 
-static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst, u8 maxvid)
+static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst,
+                u8 maxvid)
 {
         unsigned int j;
         u8 lastfid = 0xff;
@@ -550,12 +578,14 @@ static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst, u8
                                j, pst[j].vid);
                         return -EINVAL;
                 }
-                if (pst[j].vid < data->rvo) {   /* vid + rvo >= 0 */
+                if (pst[j].vid < data->rvo) {
+                        /* vid + rvo >= 0 */
                         printk(KERN_ERR FW_BUG PFX "0 vid exceeded with pstate"
                                " %d\n", j);
                         return -ENODEV;
                 }
-                if (pst[j].vid < maxvid + data->rvo) {  /* vid + rvo >= maxvid */
+                if (pst[j].vid < maxvid + data->rvo) {
+                        /* vid + rvo >= maxvid */
                         printk(KERN_ERR FW_BUG PFX "maxvid exceeded with pstate"
                                " %d\n", j);
                         return -ENODEV;
@@ -579,23 +609,31 @@ static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst, u8
                 return -EINVAL;
         }
         if (lastfid > LO_FID_TABLE_TOP)
-                printk(KERN_INFO FW_BUG PFX  "first fid not from lo freq table\n");
+                printk(KERN_INFO FW_BUG PFX
+                        "first fid not from lo freq table\n");
 
         return 0;
 }
 
+static void invalidate_entry(struct powernow_k8_data *data, unsigned int entry)
+{
+        data->powernow_table[entry].frequency = CPUFREQ_ENTRY_INVALID;
+}
+
 static void print_basics(struct powernow_k8_data *data)
 {
         int j;
         for (j = 0; j < data->numps; j++) {
-                if (data->powernow_table[j].frequency != CPUFREQ_ENTRY_INVALID) {
+                if (data->powernow_table[j].frequency !=
+                                CPUFREQ_ENTRY_INVALID) {
                         if (cpu_family == CPU_HW_PSTATE) {
-                                printk(KERN_INFO PFX "   %d : pstate %d (%d MHz)\n",
-                                        j,
+                                printk(KERN_INFO PFX
+                                        "   %d : pstate %d (%d MHz)\n", j,
                                         data->powernow_table[j].index,
                                         data->powernow_table[j].frequency/1000);
                         } else {
-                                printk(KERN_INFO PFX "   %d : fid 0x%x (%d MHz), vid 0x%x\n",
+                                printk(KERN_INFO PFX
+                                        "   %d : fid 0x%x (%d MHz), vid 0x%x\n",
                                         j,
                                         data->powernow_table[j].index & 0xff,
                                         data->powernow_table[j].frequency/1000,
@@ -604,20 +642,25 @@ static void print_basics(struct powernow_k8_data *data)
                 }
         }
         if (data->batps)
-                printk(KERN_INFO PFX "Only %d pstates on battery\n", data->batps);
+                printk(KERN_INFO PFX "Only %d pstates on battery\n",
+                                data->batps);
 }
 
-static int fill_powernow_table(struct powernow_k8_data *data, struct pst_s *pst, u8 maxvid)
+static int fill_powernow_table(struct powernow_k8_data *data,
+                struct pst_s *pst, u8 maxvid)
 {
         struct cpufreq_frequency_table *powernow_table;
         unsigned int j;
 
-        if (data->batps) {    /* use ACPI support to get full speed on mains power */
-                printk(KERN_WARNING PFX "Only %d pstates usable (use ACPI driver for full range\n", data->batps);
+        if (data->batps) {
+                /* use ACPI support to get full speed on mains power */
+                printk(KERN_WARNING PFX
+                        "Only %d pstates usable (use ACPI driver for full "
+                        "range\n", data->batps);
                 data->numps = data->batps;
         }
 
-        for ( j=1; j<data->numps; j++ ) {
+        for (j = 1; j < data->numps; j++) {
                 if (pst[j-1].fid >= pst[j].fid) {
                         printk(KERN_ERR PFX "PST out of sequence\n");
                         return -EINVAL;
@@ -640,9 +683,11 @@ static int fill_powernow_table(struct powernow_k8_data *data, struct pst_s *pst,
         }
 
         for (j = 0; j < data->numps; j++) {
+                int freq;
                 powernow_table[j].index = pst[j].fid; /* lower 8 bits */
                 powernow_table[j].index |= (pst[j].vid << 8); /* upper 8 bits */
-                powernow_table[j].frequency = find_khz_freq_from_fid(pst[j].fid);
+                freq = find_khz_freq_from_fid(pst[j].fid);
+                powernow_table[j].frequency = freq;
         }
         powernow_table[data->numps].frequency = CPUFREQ_TABLE_END;
         powernow_table[data->numps].index = 0;
@@ -658,7 +703,8 @@ static int fill_powernow_table(struct powernow_k8_data *data, struct pst_s *pst,
                 print_basics(data);
 
         for (j = 0; j < data->numps; j++)
-                if ((pst[j].fid==data->currfid) && (pst[j].vid==data->currvid))
+                if ((pst[j].fid == data->currfid) &&
+                    (pst[j].vid == data->currvid))
                         return 0;
 
         dprintk("currfid/vid do not match PST, ignoring\n");
@@ -698,7 +744,8 @@ static int find_psb_table(struct powernow_k8_data *data)
                 }
 
                 data->vstable = psb->vstable;
-                dprintk("voltage stabilization time: %d(*20us)\n", data->vstable);
+                dprintk("voltage stabilization time: %d(*20us)\n",
+                                data->vstable);
 
                 dprintk("flags2: 0x%x\n", psb->flags2);
                 data->rvo = psb->flags2 & 3;
@@ -713,11 +760,12 @@ static int find_psb_table(struct powernow_k8_data *data)
 
                 dprintk("numpst: 0x%x\n", psb->num_tables);
                 cpst = psb->num_tables;
-                if ((psb->cpuid == 0x00000fc0) || (psb->cpuid == 0x00000fe0) ){
+                if ((psb->cpuid == 0x00000fc0) ||
+                    (psb->cpuid == 0x00000fe0)) {
                         thiscpuid = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
-                        if ((thiscpuid == 0x00000fc0) || (thiscpuid == 0x00000fe0) ) {
+                        if ((thiscpuid == 0x00000fc0) ||
+                            (thiscpuid == 0x00000fe0))
                                 cpst = 1;
-                        }
                 }
                 if (cpst != 1) {
                         printk(KERN_ERR FW_BUG PFX "numpst must be 1\n");
@@ -732,7 +780,8 @@ static int find_psb_table(struct powernow_k8_data *data)
 
                 data->numps = psb->numps;
                 dprintk("numpstates: 0x%x\n", data->numps);
-                return fill_powernow_table(data, (struct pst_s *)(psb+1), maxvid);
+                return fill_powernow_table(data,
+                                (struct pst_s *)(psb+1), maxvid);
         }
         /*
          * If you see this message, complain to BIOS manufacturer. If
@@ -745,28 +794,31 @@ static int find_psb_table(struct powernow_k8_data *data)
          * BIOS and Kernel Developer's Guide, which is available on
          * www.amd.com
          */
-        printk(KERN_ERR PFX "BIOS error - no PSB or ACPI _PSS objects\n");
+        printk(KERN_ERR FW_BUG PFX "No PSB or ACPI _PSS objects\n");
         return -ENODEV;
 }
 
-#ifdef CONFIG_X86_POWERNOW_K8_ACPI
-static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index)
+static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data,
+                unsigned int index)
 {
+        acpi_integer control;
+
         if (!data->acpi_data.state_count || (cpu_family == CPU_HW_PSTATE))
                 return;
 
-        data->irt = (data->acpi_data.states[index].control >> IRT_SHIFT) & IRT_MASK;
-        data->rvo = (data->acpi_data.states[index].control >> RVO_SHIFT) & RVO_MASK;
-        data->exttype = (data->acpi_data.states[index].control >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK;
-        data->plllock = (data->acpi_data.states[index].control >> PLL_L_SHIFT) & PLL_L_MASK;
-        data->vidmvs = 1 << ((data->acpi_data.states[index].control >> MVS_SHIFT) & MVS_MASK);
-        data->vstable = (data->acpi_data.states[index].control >> VST_SHIFT) & VST_MASK;
-}
+        control = data->acpi_data.states[index].control; data->irt = (control
+                        >> IRT_SHIFT) & IRT_MASK; data->rvo = (control >>
+                                RVO_SHIFT) & RVO_MASK; data->exttype = (control
+                                        >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK;
+        data->plllock = (control >> PLL_L_SHIFT) & PLL_L_MASK; data->vidmvs = 1
+                << ((control >> MVS_SHIFT) & MVS_MASK); data->vstable =
+                (control >> VST_SHIFT) & VST_MASK; }
 
 static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
 {
         struct cpufreq_frequency_table *powernow_table;
         int ret_val = -ENODEV;
+        acpi_integer space_id;
 
         if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) {
                 dprintk("register performance failed: bad ACPI data\n");
@@ -779,11 +831,12 @@ static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
                 goto err_out;
         }
 
-        if ((data->acpi_data.control_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE) ||
-                (data->acpi_data.status_register.space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) {
+        space_id = data->acpi_data.control_register.space_id;
+        if ((space_id != ACPI_ADR_SPACE_FIXED_HARDWARE) ||
+                (space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) {
                 dprintk("Invalid control/status registers (%x - %x)\n",
                         data->acpi_data.control_register.space_id,
-                        data->acpi_data.status_register.space_id);
+                        space_id);
                 goto err_out;
         }
 
@@ -802,7 +855,8 @@ static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
         if (ret_val)
                 goto err_out_mem;
 
-        powernow_table[data->acpi_data.state_count].frequency = CPUFREQ_TABLE_END;
+        powernow_table[data->acpi_data.state_count].frequency =
+                CPUFREQ_TABLE_END;
         powernow_table[data->acpi_data.state_count].index = 0;
         data->powernow_table = powernow_table;
 
@@ -830,13 +884,15 @@ err_out_mem:
 err_out:
         acpi_processor_unregister_performance(&data->acpi_data, data->cpu);
 
-        /* data->acpi_data.state_count informs us at ->exit() whether ACPI was used */
+        /* data->acpi_data.state_count informs us at ->exit()
+         * whether ACPI was used */
         data->acpi_data.state_count = 0;
 
         return ret_val;
 }
 
-static int fill_powernow_table_pstate(struct powernow_k8_data *data, struct cpufreq_frequency_table *powernow_table)
+static int fill_powernow_table_pstate(struct powernow_k8_data *data,
+                struct cpufreq_frequency_table *powernow_table)
 {
         int i;
         u32 hi = 0, lo = 0;
@@ -848,84 +904,101 @@ static int fill_powernow_table_pstate(struct powernow_k8_data *data, struct cpuf
 
                 index = data->acpi_data.states[i].control & HW_PSTATE_MASK;
                 if (index > data->max_hw_pstate) {
-                        printk(KERN_ERR PFX "invalid pstate %d - bad value %d.\n", i, index);
-                        printk(KERN_ERR PFX "Please report to BIOS manufacturer\n");
-                        powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
+                        printk(KERN_ERR PFX "invalid pstate %d - "
+                                        "bad value %d.\n", i, index);
+                        printk(KERN_ERR PFX "Please report to BIOS "
+                                        "manufacturer\n");
+                        invalidate_entry(data, i);
                         continue;
                 }
                 rdmsr(MSR_PSTATE_DEF_BASE + index, lo, hi);
                 if (!(hi & HW_PSTATE_VALID_MASK)) {
                         dprintk("invalid pstate %d, ignoring\n", index);
-                        powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
+                        invalidate_entry(data, i);
                         continue;
                 }
 
                 powernow_table[i].index = index;
 
-                powernow_table[i].frequency = data->acpi_data.states[i].core_frequency * 1000;
+                powernow_table[i].frequency =
+                        data->acpi_data.states[i].core_frequency * 1000;
         }
         return 0;
 }
 
-static int fill_powernow_table_fidvid(struct powernow_k8_data *data, struct cpufreq_frequency_table *powernow_table)
+static int fill_powernow_table_fidvid(struct powernow_k8_data *data,
+                struct cpufreq_frequency_table *powernow_table)
 {
         int i;
         int cntlofreq = 0;
+
         for (i = 0; i < data->acpi_data.state_count; i++) {
                 u32 fid;
                 u32 vid;
+                u32 freq, index;
+                acpi_integer status, control;
 
                 if (data->exttype) {
-                        fid = data->acpi_data.states[i].status & EXT_FID_MASK;
-                        vid = (data->acpi_data.states[i].status >> VID_SHIFT) & EXT_VID_MASK;
+                        status =  data->acpi_data.states[i].status;
+                        fid = status & EXT_FID_MASK;
+                        vid = (status >> VID_SHIFT) & EXT_VID_MASK;
                 } else {
-                        fid = data->acpi_data.states[i].control & FID_MASK;
-                        vid = (data->acpi_data.states[i].control >> VID_SHIFT) & VID_MASK;
+                        control =  data->acpi_data.states[i].control;
+                        fid = control & FID_MASK;
+                        vid = (control >> VID_SHIFT) & VID_MASK;
                 }
 
                 dprintk("   %d : fid 0x%x, vid 0x%x\n", i, fid, vid);
 
-                powernow_table[i].index = fid; /* lower 8 bits */
-                powernow_table[i].index |= (vid << 8); /* upper 8 bits */
-                powernow_table[i].frequency = find_khz_freq_from_fid(fid);
+                index = fid | (vid<<8);
+                powernow_table[i].index = index;
+
+                freq = find_khz_freq_from_fid(fid);
+                powernow_table[i].frequency = freq;
 
                 /* verify frequency is OK */
-                if ((powernow_table[i].frequency > (MAX_FREQ * 1000)) ||
-                        (powernow_table[i].frequency < (MIN_FREQ * 1000))) {
-                        dprintk("invalid freq %u kHz, ignoring\n", powernow_table[i].frequency);
-                        powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
+                if ((freq > (MAX_FREQ * 1000)) || (freq < (MIN_FREQ * 1000))) {
+                        dprintk("invalid freq %u kHz, ignoring\n", freq);
+                        invalidate_entry(data, i);
                         continue;
                 }
 
-                /* verify voltage is OK - BIOSs are using "off" to indicate invalid */
+                /* verify voltage is OK -
+                 * BIOSs are using "off" to indicate invalid */
                 if (vid == VID_OFF) {
                         dprintk("invalid vid %u, ignoring\n", vid);
-                        powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
+                        invalidate_entry(data, i);
                         continue;
                 }
 
                 /* verify only 1 entry from the lo frequency table */
                 if (fid < HI_FID_TABLE_BOTTOM) {
                         if (cntlofreq) {
-                                /* if both entries are the same, ignore this one ... */
-                                if ((powernow_table[i].frequency != powernow_table[cntlofreq].frequency) ||
-                                    (powernow_table[i].index != powernow_table[cntlofreq].index)) {
-                                        printk(KERN_ERR PFX "Too many lo freq table entries\n");
+                                /* if both entries are the same,
+                                 * ignore this one ... */
+                                if ((freq != powernow_table[cntlofreq].frequency) ||
+                                    (index != powernow_table[cntlofreq].index)) {
+                                        printk(KERN_ERR PFX
+                                                "Too many lo freq table "
+                                                "entries\n");
                                         return 1;
                                 }
 
-                                dprintk("double low frequency table entry, ignoring it.\n");
-                                powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
+                                dprintk("double low frequency table entry, "
+                                                "ignoring it.\n");
+                                invalidate_entry(data, i);
                                 continue;
                         } else
                                 cntlofreq = i;
                 }
 
-                if (powernow_table[i].frequency != (data->acpi_data.states[i].core_frequency * 1000)) {
-                        printk(KERN_INFO PFX "invalid freq entries %u kHz vs. %u kHz\n",
-                                powernow_table[i].frequency,
-                                (unsigned int) (data->acpi_data.states[i].core_frequency * 1000));
-                        powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
+                if (freq != (data->acpi_data.states[i].core_frequency * 1000)) {
+                        printk(KERN_INFO PFX "invalid freq entries "
+                                "%u kHz vs. %u kHz\n", freq,
+                                (unsigned int)
+                                (data->acpi_data.states[i].core_frequency
+                                 * 1000));
+                        invalidate_entry(data, i);
                         continue;
                 }
         }
@@ -935,7 +1008,8 @@ static int fill_powernow_table_fidvid(struct powernow_k8_data *data, struct cpuf
 static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data)
 {
         if (data->acpi_data.state_count)
-                acpi_processor_unregister_performance(&data->acpi_data, data->cpu);
+                acpi_processor_unregister_performance(&data->acpi_data,
+                                data->cpu);
         free_cpumask_var(data->acpi_data.shared_cpu_map);
 }
 
@@ -953,15 +1027,9 @@ static int get_transition_latency(struct powernow_k8_data *data)
         return 1000 * max_latency;
 }
 
-#else
-static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data) { return -ENODEV; }
-static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data) { return; }
-static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index) { return; }
-static int get_transition_latency(struct powernow_k8_data *data) { return 0; }
-#endif /* CONFIG_X86_POWERNOW_K8_ACPI */
-
 /* Take a frequency, and issue the fid/vid transition command */
-static int transition_frequency_fidvid(struct powernow_k8_data *data, unsigned int index)
+static int transition_frequency_fidvid(struct powernow_k8_data *data,
+                unsigned int index)
 {
         u32 fid = 0;
         u32 vid = 0;
@@ -989,7 +1057,8 @@ static int transition_frequency_fidvid(struct powernow_k8_data *data, unsigned i
                 return 0;
         }
 
-        if ((fid < HI_FID_TABLE_BOTTOM) && (data->currfid < HI_FID_TABLE_BOTTOM)) {
+        if ((fid < HI_FID_TABLE_BOTTOM) &&
+            (data->currfid < HI_FID_TABLE_BOTTOM)) {
                 printk(KERN_ERR PFX
                        "ignoring illegal change in lo freq table-%x to 0x%x\n",
                        data->currfid, fid);
@@ -1017,7 +1086,8 @@ static int transition_frequency_fidvid(struct powernow_k8_data *data, unsigned i
 }
 
 /* Take a frequency, and issue the hardware pstate transition command */
-static int transition_frequency_pstate(struct powernow_k8_data *data, unsigned int index)
+static int transition_frequency_pstate(struct powernow_k8_data *data,
+                unsigned int index)
 {
         u32 pstate = 0;
         int res, i;
@@ -1029,7 +1099,8 @@ static int transition_frequency_pstate(struct powernow_k8_data *data, unsigned i
         pstate = index & HW_PSTATE_MASK;
         if (pstate > data->max_hw_pstate)
                 return 0;
-        freqs.old = find_khz_freq_from_pstate(data->powernow_table, data->currpstate);
+        freqs.old = find_khz_freq_from_pstate(data->powernow_table,
+                        data->currpstate);
         freqs.new = find_khz_freq_from_pstate(data->powernow_table, pstate);
 
         for_each_cpu_mask_nr(i, *(data->available_cores)) {
@@ -1048,7 +1119,8 @@ static int transition_frequency_pstate(struct powernow_k8_data *data, unsigned i
 }
 
 /* Driver entry point to switch to the target frequency */
-static int powernowk8_target(struct cpufreq_policy *pol, unsigned targfreq, unsigned relation)
+static int powernowk8_target(struct cpufreq_policy *pol,
+                unsigned targfreq, unsigned relation)
 {
         cpumask_t oldmask;
         struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
@@ -1087,14 +1159,18 @@ static int powernowk8_target(struct cpufreq_policy *pol, unsigned targfreq, unsi
                 dprintk("targ: curr fid 0x%x, vid 0x%x\n",
                 data->currfid, data->currvid);
 
-                if ((checkvid != data->currvid) || (checkfid != data->currfid)) {
+                if ((checkvid != data->currvid) ||
+                    (checkfid != data->currfid)) {
                         printk(KERN_INFO PFX
-                                "error - out of sync, fix 0x%x 0x%x, vid 0x%x 0x%x\n",
-                                checkfid, data->currfid, checkvid, data->currvid);
+                                "error - out of sync, fix 0x%x 0x%x, "
+                                "vid 0x%x 0x%x\n",
+                                checkfid, data->currfid,
+                                checkvid, data->currvid);
                 }
         }
 
-        if (cpufreq_frequency_table_target(pol, data->powernow_table, targfreq, relation, &newstate))
+        if (cpufreq_frequency_table_target(pol, data->powernow_table,
+                                targfreq, relation, &newstate))
                 goto err_out;
 
         mutex_lock(&fidvid_mutex);
@@ -1114,7 +1190,8 @@ static int powernowk8_target(struct cpufreq_policy *pol, unsigned targfreq, unsi
         mutex_unlock(&fidvid_mutex);
 
         if (cpu_family == CPU_HW_PSTATE)
-                pol->cur = find_khz_freq_from_pstate(data->powernow_table, newstate);
+                pol->cur = find_khz_freq_from_pstate(data->powernow_table,
+                                newstate);
         else
                 pol->cur = find_khz_freq_from_fid(data->currfid);
         ret = 0;
@@ -1141,6 +1218,7 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
         struct powernow_k8_data *data;
         cpumask_t oldmask;
         int rc;
+        static int print_once;
 
         if (!cpu_online(pol->cpu))
                 return -ENODEV;
@@ -1163,33 +1241,31 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
                  * an UP version, and is deprecated by AMD.
                  */
                 if (num_online_cpus() != 1) {
-#ifndef CONFIG_ACPI_PROCESSOR
-                        printk(KERN_ERR PFX "ACPI Processor support is required "
-                               "for SMP systems but is absent. Please load the "
-                               "ACPI Processor module before starting this "
-                               "driver.\n");
-#else
-                        printk(KERN_ERR FW_BUG PFX "Your BIOS does not provide"
-                               " ACPI _PSS objects in a way that Linux "
-                               "understands. Please report this to the Linux "
-                               "ACPI maintainers and complain to your BIOS "
-                               "vendor.\n");
-#endif
-                        kfree(data);
-                        return -ENODEV;
+                        /*
+                         * Replace this one with print_once as soon as such a
+                         * thing gets introduced
+                         */
+                        if (!print_once) {
+                                WARN_ONCE(1, KERN_ERR FW_BUG PFX "Your BIOS "
+                                        "does not provide ACPI _PSS objects "
+                                        "in a way that Linux understands. "
+                                        "Please report this to the Linux ACPI"
+                                        " maintainers and complain to your "
+                                        "BIOS vendor.\n");
+                                print_once++;
+                        }
+                        goto err_out;
                 }
                 if (pol->cpu != 0) {
                         printk(KERN_ERR FW_BUG PFX "No ACPI _PSS objects for "
                                "CPU other than CPU0. Complain to your BIOS "
                                "vendor.\n");
-                        kfree(data);
-                        return -ENODEV;
+                        goto err_out;
                 }
                 rc = find_psb_table(data);
-                if (rc) {
-                        kfree(data);
-                        return -ENODEV;
-                }
+                if (rc)
+                        goto err_out;
+
                 /* Take a crude guess here.
                  * That guess was in microseconds, so multiply with 1000 */
                 pol->cpuinfo.transition_latency = (
@@ -1204,16 +1280,16 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
 
         if (smp_processor_id() != pol->cpu) {
                 printk(KERN_ERR PFX "limiting to cpu %u failed\n", pol->cpu);
-                goto err_out;
+                goto err_out_unmask;
         }
 
         if (pending_bit_stuck()) {
                 printk(KERN_ERR PFX "failing init, change pending bit set\n");
-                goto err_out;
+                goto err_out_unmask;
         }
 
         if (query_current_values_with_pending_wait(data))
-                goto err_out;
+                goto err_out_unmask;
 
         if (cpu_family == CPU_OPTERON)
                 fidvid_msr_init();
@@ -1228,7 +1304,8 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
         data->available_cores = pol->cpus;
 
         if (cpu_family == CPU_HW_PSTATE)
-                pol->cur = find_khz_freq_from_pstate(data->powernow_table, data->currpstate);
+                pol->cur = find_khz_freq_from_pstate(data->powernow_table,
+                                data->currpstate);
         else
                 pol->cur = find_khz_freq_from_fid(data->currfid);
         dprintk("policy current frequency %d kHz\n", pol->cur);
@@ -1245,7 +1322,8 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
         cpufreq_frequency_table_get_attr(data->powernow_table, pol->cpu);
 
         if (cpu_family == CPU_HW_PSTATE)
-                dprintk("cpu_init done, current pstate 0x%x\n", data->currpstate);
+                dprintk("cpu_init done, current pstate 0x%x\n",
+                                data->currpstate);
         else
                 dprintk("cpu_init done, current fid 0x%x, vid 0x%x\n",
                         data->currfid, data->currvid);
@@ -1254,15 +1332,16 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
 
         return 0;
 
-err_out:
+err_out_unmask:
         set_cpus_allowed_ptr(current, &oldmask);
         powernow_k8_cpu_exit_acpi(data);
 
+err_out:
         kfree(data);
         return -ENODEV;
 }
 
-static int __devexit powernowk8_cpu_exit (struct cpufreq_policy *pol)
+static int __devexit powernowk8_cpu_exit(struct cpufreq_policy *pol)
 {
         struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
 
@@ -1279,7 +1358,7 @@ static int __devexit powernowk8_cpu_exit (struct cpufreq_policy *pol)
         return 0;
 }
 
-static unsigned int powernowk8_get (unsigned int cpu)
+static unsigned int powernowk8_get(unsigned int cpu)
 {
         struct powernow_k8_data *data;
         cpumask_t oldmask = current->cpus_allowed;
@@ -1315,7 +1394,7 @@ out:
         return khz;
 }
 
-static struct freq_attr* powernow_k8_attr[] = {
+static struct freq_attr *powernow_k8_attr[] = {
         &cpufreq_freq_attr_scaling_available_freqs,
         NULL,
 };
@@ -1360,7 +1439,8 @@ static void __exit powernowk8_exit(void)
         cpufreq_unregister_driver(&cpufreq_amd64_driver);
 }
 
-MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com> and Mark Langsdorf <mark.langsdorf@amd.com>");
+MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com> and "
+                "Mark Langsdorf <mark.langsdorf@amd.com>");
 MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver.");
 MODULE_LICENSE("GPL");
 
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k8.h b/arch/x86/kernel/cpu/cpufreq/powernow-k8.h
index 8ecc75b6c7c3..6c6698feade1 100644
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k8.h
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k8.h
@@ -45,11 +45,10 @@ struct powernow_k8_data {
          * frequency is in kHz */
         struct cpufreq_frequency_table  *powernow_table;
 
-#ifdef CONFIG_X86_POWERNOW_K8_ACPI
         /* the acpi table needs to be kept. it's only available if ACPI was
          * used to determine valid frequency/vid/fid states */
         struct acpi_processor_performance acpi_data;
-#endif
+
         /* we need to keep track of associated cores, but let cpufreq
          * handle hotplug events - so just point at cpufreq pol->cpus
          * structure */
@@ -222,10 +221,8 @@ static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid);
 
 static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned int index);
 
-#ifdef CONFIG_X86_POWERNOW_K8_ACPI
 static int fill_powernow_table_pstate(struct powernow_k8_data *data, struct cpufreq_frequency_table *powernow_table);
 static int fill_powernow_table_fidvid(struct powernow_k8_data *data, struct cpufreq_frequency_table *powernow_table);
-#endif
 
 #ifdef CONFIG_SMP
 static inline void define_siblings(int cpu, cpumask_t cpu_sharedcore_mask[])
diff --git a/arch/x86/kernel/cpu/cpufreq/sc520_freq.c b/arch/x86/kernel/cpu/cpufreq/sc520_freq.c
index 42da9bd677d6..435a996a613a 100644
--- a/arch/x86/kernel/cpu/cpufreq/sc520_freq.c
+++ b/arch/x86/kernel/cpu/cpufreq/sc520_freq.c
@@ -19,17 +19,19 @@
 
 #include <linux/delay.h>
 #include <linux/cpufreq.h>
+#include <linux/timex.h>
+#include <linux/io.h>
 
 #include <asm/msr.h>
-#include <asm/timex.h>
-#include <asm/io.h>
 
 #define MMCR_BASE       0xfffef000      /* The default base address */
 #define OFFS_CPUCTL     0x2   /* CPU Control Register */
 
 static __u8 __iomem *cpuctl;
 
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "sc520_freq", msg)
+#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
+                "sc520_freq", msg)
+#define PFX "sc520_freq: "
 
 static struct cpufreq_frequency_table sc520_freq_table[] = {
         {0x01,  100000},
@@ -43,7 +45,8 @@ static unsigned int sc520_freq_get_cpu_frequency(unsigned int cpu)
 
         switch (clockspeed_reg & 0x03) {
         default:
-                printk(KERN_ERR "sc520_freq: error: cpuctl register has unexpected value %02x\n", clockspeed_reg);
+                printk(KERN_ERR PFX "error: cpuctl register has unexpected "
+                                "value %02x\n", clockspeed_reg);
         case 0x01:
                 return 100000;
         case 0x02:
@@ -51,7 +54,7 @@ static unsigned int sc520_freq_get_cpu_frequency(unsigned int cpu)
         }
 }
 
-static void sc520_freq_set_cpu_state (unsigned int state)
+static void sc520_freq_set_cpu_state(unsigned int state)
 {
 
         struct cpufreq_freqs    freqs;
@@ -76,18 +79,19 @@ static void sc520_freq_set_cpu_state (unsigned int state)
         cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
 };
 
-static int sc520_freq_verify (struct cpufreq_policy *policy)
+static int sc520_freq_verify(struct cpufreq_policy *policy)
 {
         return cpufreq_frequency_table_verify(policy, &sc520_freq_table[0]);
 }
 
-static int sc520_freq_target (struct cpufreq_policy *policy,
+static int sc520_freq_target(struct cpufreq_policy *policy,
                             unsigned int target_freq,
                             unsigned int relation)
 {
         unsigned int newstate = 0;
 
-        if (cpufreq_frequency_table_target(policy, sc520_freq_table, target_freq, relation, &newstate))
+        if (cpufreq_frequency_table_target(policy, sc520_freq_table,
+                                target_freq, relation, &newstate))
                 return -EINVAL;
 
         sc520_freq_set_cpu_state(newstate);
@@ -116,7 +120,7 @@ static int sc520_freq_cpu_init(struct cpufreq_policy *policy)
 
         result = cpufreq_frequency_table_cpuinfo(policy, sc520_freq_table);
         if (result)
-                return (result);
+                return result;
 
         cpufreq_frequency_table_get_attr(sc520_freq_table, policy->cpu);
 
@@ -131,7 +135,7 @@ static int sc520_freq_cpu_exit(struct cpufreq_policy *policy)
 }
 
 
-static struct freq_attr* sc520_freq_attr[] = {
+static struct freq_attr *sc520_freq_attr[] = {
         &cpufreq_freq_attr_scaling_available_freqs,
         NULL,
 };
@@ -155,13 +159,13 @@ static int __init sc520_freq_init(void)
         int err;
 
         /* Test if we have the right hardware */
-        if(c->x86_vendor != X86_VENDOR_AMD ||
-                                c->x86 != 4 || c->x86_model != 9) {
+        if (c->x86_vendor != X86_VENDOR_AMD ||
+            c->x86 != 4 || c->x86_model != 9) {
                 dprintk("no Elan SC520 processor found!\n");
                 return -ENODEV;
         }
         cpuctl = ioremap((unsigned long)(MMCR_BASE + OFFS_CPUCTL), 1);
-        if(!cpuctl) {
+        if (!cpuctl) {
                 printk(KERN_ERR "sc520_freq: error: failed to remap memory\n");
                 return -ENOMEM;
         }
diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-ich.c b/arch/x86/kernel/cpu/cpufreq/speedstep-ich.c
index dedc1e98f168..8bbb11adb315 100644
--- a/arch/x86/kernel/cpu/cpufreq/speedstep-ich.c
+++ b/arch/x86/kernel/cpu/cpufreq/speedstep-ich.c
@@ -39,7 +39,7 @@ static struct pci_dev *speedstep_chipset_dev;
 
 /* speedstep_processor
  */
-static unsigned int speedstep_processor = 0;
+static unsigned int speedstep_processor;
 
 static u32 pmbase;
 
@@ -54,7 +54,8 @@ static struct cpufreq_frequency_table speedstep_freqs[] = {
 };
 
 
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "speedstep-ich", msg)
+#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
+                "speedstep-ich", msg)
 
 
 /**
@@ -62,7 +63,7 @@ static struct cpufreq_frequency_table speedstep_freqs[] = {
  *
  * Returns: -ENODEV if no register could be found
  */
-static int speedstep_find_register (void)
+static int speedstep_find_register(void)
 {
         if (!speedstep_chipset_dev)
                 return -ENODEV;
@@ -90,7 +91,7 @@ static int speedstep_find_register (void)
  *
  *   Tries to change the SpeedStep state.
  */
-static void speedstep_set_state (unsigned int state)
+static void speedstep_set_state(unsigned int state)
 {
         u8 pm2_blk;
         u8 value;
@@ -133,11 +134,11 @@ static void speedstep_set_state (unsigned int state)
 
         dprintk("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
 
-        if (state == (value & 0x1)) {
-                dprintk("change to %u MHz succeeded\n", (speedstep_get_processor_frequency(speedstep_processor) / 1000));
-        } else {
-                printk (KERN_ERR "cpufreq: change failed - I/O error\n");
-        }
+        if (state == (value & 0x1))
+                dprintk("change to %u MHz succeeded\n",
+                        speedstep_get_frequency(speedstep_processor) / 1000);
+        else
+                printk(KERN_ERR "cpufreq: change failed - I/O error\n");
 
         return;
 }
@@ -149,7 +150,7 @@ static void speedstep_set_state (unsigned int state)
  *   Tries to activate the SpeedStep status and control registers.
  * Returns -EINVAL on an unsupported chipset, and zero on success.
  */
-static int speedstep_activate (void)
+static int speedstep_activate(void)
 {
         u16 value = 0;
 
@@ -175,20 +176,18 @@ static int speedstep_activate (void)
  * functions. Returns the SPEEDSTEP_CHIPSET_-number for the detected
  * chipset, or zero on failure.
  */
-static unsigned int speedstep_detect_chipset (void)
+static unsigned int speedstep_detect_chipset(void)
 {
         speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
                               PCI_DEVICE_ID_INTEL_82801DB_12,
-                              PCI_ANY_ID,
-                              PCI_ANY_ID,
+                              PCI_ANY_ID, PCI_ANY_ID,
                               NULL);
         if (speedstep_chipset_dev)
                 return 4; /* 4-M */
 
         speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
                               PCI_DEVICE_ID_INTEL_82801CA_12,
-                              PCI_ANY_ID,
-                              PCI_ANY_ID,
+                              PCI_ANY_ID, PCI_ANY_ID,
                               NULL);
         if (speedstep_chipset_dev)
                 return 3; /* 3-M */
@@ -196,8 +195,7 @@ static unsigned int speedstep_detect_chipset (void)
 
         speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
                               PCI_DEVICE_ID_INTEL_82801BA_10,
-                              PCI_ANY_ID,
-                              PCI_ANY_ID,
+                              PCI_ANY_ID, PCI_ANY_ID,
                               NULL);
         if (speedstep_chipset_dev) {
                 /* speedstep.c causes lockups on Dell Inspirons 8000 and
@@ -208,8 +206,7 @@ static unsigned int speedstep_detect_chipset (void)
 
                 hostbridge  = pci_get_subsys(PCI_VENDOR_ID_INTEL,
                               PCI_DEVICE_ID_INTEL_82815_MC,
-                              PCI_ANY_ID,
-                              PCI_ANY_ID,
+                              PCI_ANY_ID, PCI_ANY_ID,
                               NULL);
 
                 if (!hostbridge)
@@ -236,7 +233,7 @@ static unsigned int _speedstep_get(const struct cpumask *cpus)
 
         cpus_allowed = current->cpus_allowed;
         set_cpus_allowed_ptr(current, cpus);
-        speed = speedstep_get_processor_frequency(speedstep_processor);
+        speed = speedstep_get_frequency(speedstep_processor);
         set_cpus_allowed_ptr(current, &cpus_allowed);
         dprintk("detected %u kHz as current frequency\n", speed);
         return speed;
@@ -251,11 +248,12 @@ static unsigned int speedstep_get(unsigned int cpu)
  * speedstep_target - set a new CPUFreq policy
  * @policy: new policy
  * @target_freq: the target frequency
- * @relation: how that frequency relates to achieved frequency (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
+ * @relation: how that frequency relates to achieved frequency
+ *      (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
  *
  * Sets a new CPUFreq policy.
  */
-static int speedstep_target (struct cpufreq_policy *policy,
+static int speedstep_target(struct cpufreq_policy *policy,
                              unsigned int target_freq,
                              unsigned int relation)
 {
@@ -264,7 +262,8 @@ static int speedstep_target (struct cpufreq_policy *policy,
         cpumask_t cpus_allowed;
         int i;
 
-        if (cpufreq_frequency_table_target(policy, &speedstep_freqs[0], target_freq, relation, &newstate))
+        if (cpufreq_frequency_table_target(policy, &speedstep_freqs[0],
+                                target_freq, relation, &newstate))
                 return -EINVAL;
 
         freqs.old = _speedstep_get(policy->cpus);
@@ -308,7 +307,7 @@ static int speedstep_target (struct cpufreq_policy *policy,
  * Limit must be within speedstep_low_freq and speedstep_high_freq, with
  * at least one border included.
  */
-static int speedstep_verify (struct cpufreq_policy *policy)
+static int speedstep_verify(struct cpufreq_policy *policy)
 {
         return cpufreq_frequency_table_verify(policy, &speedstep_freqs[0]);
 }
@@ -344,7 +343,8 @@ static int speedstep_cpu_init(struct cpufreq_policy *policy)
                 return -EIO;
 
         dprintk("currently at %s speed setting - %i MHz\n",
-                (speed == speedstep_freqs[SPEEDSTEP_LOW].frequency) ? "low" : "high",
+                (speed == speedstep_freqs[SPEEDSTEP_LOW].frequency)
+                ? "low" : "high",
                 (speed / 1000));
 
         /* cpuinfo and default policy values */
@@ -352,9 +352,9 @@ static int speedstep_cpu_init(struct cpufreq_policy *policy)
 
         result = cpufreq_frequency_table_cpuinfo(policy, speedstep_freqs);
         if (result)
-                return (result);
+                return result;
 
-        cpufreq_frequency_table_get_attr(speedstep_freqs, policy->cpu);
+        cpufreq_frequency_table_get_attr(speedstep_freqs, policy->cpu);
 
         return 0;
 }
@@ -366,7 +366,7 @@ static int speedstep_cpu_exit(struct cpufreq_policy *policy)
         return 0;
 }
 
-static struct freq_attr* speedstep_attr[] = {
+static struct freq_attr *speedstep_attr[] = {
         &cpufreq_freq_attr_scaling_available_freqs,
         NULL,
 };
@@ -396,13 +396,15 @@ static int __init speedstep_init(void)
         /* detect processor */
         speedstep_processor = speedstep_detect_processor();
         if (!speedstep_processor) {
-                dprintk("Intel(R) SpeedStep(TM) capable processor not found\n");
+                dprintk("Intel(R) SpeedStep(TM) capable processor "
+                                "not found\n");
                 return -ENODEV;
         }
 
         /* detect chipset */
         if (!speedstep_detect_chipset()) {
-                dprintk("Intel(R) SpeedStep(TM) for this chipset not (yet) available.\n");
+                dprintk("Intel(R) SpeedStep(TM) for this chipset not "
+                                "(yet) available.\n");
                 return -ENODEV;
         }
 
@@ -431,9 +433,11 @@ static void __exit speedstep_exit(void)
 }
 
 
-MODULE_AUTHOR ("Dave Jones <davej@redhat.com>, Dominik Brodowski <linux@brodo.de>");
-MODULE_DESCRIPTION ("Speedstep driver for Intel mobile processors on chipsets with ICH-M southbridges.");
-MODULE_LICENSE ("GPL");
+MODULE_AUTHOR("Dave Jones <davej@redhat.com>, "
+                "Dominik Brodowski <linux@brodo.de>");
+MODULE_DESCRIPTION("Speedstep driver for Intel mobile processors on chipsets "
+                "with ICH-M southbridges.");
+MODULE_LICENSE("GPL");
 
 module_init(speedstep_init);
 module_exit(speedstep_exit);
diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-lib.c b/arch/x86/kernel/cpu/cpufreq/speedstep-lib.c
index cdac7d62369b..2e3c6862657b 100644
--- a/arch/x86/kernel/cpu/cpufreq/speedstep-lib.c
+++ b/arch/x86/kernel/cpu/cpufreq/speedstep-lib.c
@@ -16,12 +16,16 @@
 #include <linux/slab.h>
 
 #include <asm/msr.h>
+#include <asm/tsc.h>
 #include "speedstep-lib.h"
 
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "speedstep-lib", msg)
+#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
+                "speedstep-lib", msg)
+
+#define PFX "speedstep-lib: "
 
 #ifdef CONFIG_X86_SPEEDSTEP_RELAXED_CAP_CHECK
-static int relaxed_check = 0;
+static int relaxed_check;
 #else
 #define relaxed_check 0
 #endif
@@ -30,14 +34,14 @@ static int relaxed_check = 0;
  *                   GET PROCESSOR CORE SPEED IN KHZ                 *
  *********************************************************************/
 
-static unsigned int pentium3_get_frequency (unsigned int processor)
+static unsigned int pentium3_get_frequency(unsigned int processor)
 {
-        /* See table 14 of p3_ds.pdf and table 22 of 29834003.pdf */
+        /* See table 14 of p3_ds.pdf and table 22 of 29834003.pdf */
         struct {
                 unsigned int ratio;     /* Frequency Multiplier (x10) */
                 u8 bitmap;              /* power on configuration bits
                                         [27, 25:22] (in MSR 0x2a) */
-        } msr_decode_mult [] = {
+        } msr_decode_mult[] = {
                 { 30, 0x01 },
                 { 35, 0x05 },
                 { 40, 0x02 },
@@ -52,7 +56,7 @@ static unsigned int pentium3_get_frequency (unsigned int processor)
                 { 85, 0x26 },
                 { 90, 0x20 },
                 { 100, 0x2b },
-                { 0, 0xff }     /* error or unknown value */
+                { 0, 0xff }     /* error or unknown value */
         };
 
         /* PIII(-M) FSB settings: see table b1-b of 24547206.pdf */
@@ -60,7 +64,7 @@ static unsigned int pentium3_get_frequency (unsigned int processor)
                 unsigned int value;     /* Front Side Bus speed in MHz */
                 u8 bitmap;              /* power on configuration bits [18: 19]
                                         (in MSR 0x2a) */
-        } msr_decode_fsb [] = {
+        } msr_decode_fsb[] = {
                 {  66, 0x0 },
                 { 100, 0x2 },
                 { 133, 0x1 },
@@ -85,7 +89,7 @@ static unsigned int pentium3_get_frequency (unsigned int processor)
         }
 
         /* decode the multiplier */
-        if (processor == SPEEDSTEP_PROCESSOR_PIII_C_EARLY) {
+        if (processor == SPEEDSTEP_CPU_PIII_C_EARLY) {
                 dprintk("workaround for early PIIIs\n");
                 msr_lo &= 0x03c00000;
         } else
@@ -97,9 +101,10 @@ static unsigned int pentium3_get_frequency (unsigned int processor)
                 j++;
         }
 
-        dprintk("speed is %u\n", (msr_decode_mult[j].ratio * msr_decode_fsb[i].value * 100));
+        dprintk("speed is %u\n",
+                (msr_decode_mult[j].ratio * msr_decode_fsb[i].value * 100));
 
-        return (msr_decode_mult[j].ratio * msr_decode_fsb[i].value * 100);
+        return msr_decode_mult[j].ratio * msr_decode_fsb[i].value * 100;
 }
 
 
@@ -112,20 +117,23 @@ static unsigned int pentiumM_get_frequency(void)
 
         /* see table B-2 of 24547212.pdf */
         if (msr_lo & 0x00040000) {
-                printk(KERN_DEBUG "speedstep-lib: PM - invalid FSB: 0x%x 0x%x\n", msr_lo, msr_tmp);
+                printk(KERN_DEBUG PFX "PM - invalid FSB: 0x%x 0x%x\n",
+                                msr_lo, msr_tmp);
                 return 0;
         }
 
         msr_tmp = (msr_lo >> 22) & 0x1f;
-        dprintk("bits 22-26 are 0x%x, speed is %u\n", msr_tmp, (msr_tmp * 100 * 1000));
+        dprintk("bits 22-26 are 0x%x, speed is %u\n",
+                        msr_tmp, (msr_tmp * 100 * 1000));
 
-        return (msr_tmp * 100 * 1000);
+        return msr_tmp * 100 * 1000;
 }
 
 static unsigned int pentium_core_get_frequency(void)
 {
         u32 fsb = 0;
         u32 msr_lo, msr_tmp;
+        int ret;
 
         rdmsr(MSR_FSB_FREQ, msr_lo, msr_tmp);
         /* see table B-2 of 25366920.pdf */
@@ -153,12 +161,15 @@ static unsigned int pentium_core_get_frequency(void)
         }
 
         rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_tmp);
-        dprintk("PCORE - MSR_IA32_EBL_CR_POWERON: 0x%x 0x%x\n", msr_lo, msr_tmp);
+        dprintk("PCORE - MSR_IA32_EBL_CR_POWERON: 0x%x 0x%x\n",
+                        msr_lo, msr_tmp);
 
         msr_tmp = (msr_lo >> 22) & 0x1f;
-        dprintk("bits 22-26 are 0x%x, speed is %u\n", msr_tmp, (msr_tmp * fsb));
+        dprintk("bits 22-26 are 0x%x, speed is %u\n",
+                        msr_tmp, (msr_tmp * fsb));
 
-        return (msr_tmp * fsb);
+        ret = (msr_tmp * fsb);
+        return ret;
 }
 
 
@@ -167,6 +178,16 @@ static unsigned int pentium4_get_frequency(void)
         struct cpuinfo_x86 *c = &boot_cpu_data;
         u32 msr_lo, msr_hi, mult;
         unsigned int fsb = 0;
+        unsigned int ret;
+        u8 fsb_code;
+
+        /* Pentium 4 Model 0 and 1 do not have the Core Clock Frequency
+         * to System Bus Frequency Ratio Field in the Processor Frequency
+         * Configuration Register of the MSR. Therefore the current
+         * frequency cannot be calculated and has to be measured.
+         */
+        if (c->x86_model < 2)
+                return cpu_khz;
 
         rdmsr(0x2c, msr_lo, msr_hi);
 
@@ -177,62 +198,61 @@ static unsigned int pentium4_get_frequency(void)
          * revision #12 in Table B-1: MSRs in the Pentium 4 and
          * Intel Xeon Processors, on page B-4 and B-5.
          */
-        if (c->x86_model < 2)
+        fsb_code = (msr_lo >> 16) & 0x7;
+        switch (fsb_code) {
+        case 0:
                 fsb = 100 * 1000;
-        else {
-                u8 fsb_code = (msr_lo >> 16) & 0x7;
-                switch (fsb_code) {
-                case 0:
-                        fsb = 100 * 1000;
-                        break;
-                case 1:
-                        fsb = 13333 * 10;
-                        break;
-                case 2:
-                        fsb = 200 * 1000;
-                        break;
-                }
+                break;
+        case 1:
+                fsb = 13333 * 10;
+                break;
+        case 2:
+                fsb = 200 * 1000;
+                break;
         }
 
         if (!fsb)
-                printk(KERN_DEBUG "speedstep-lib: couldn't detect FSB speed. Please send an e-mail to <linux@brodo.de>\n");
+                printk(KERN_DEBUG PFX "couldn't detect FSB speed. "
+                                "Please send an e-mail to <linux@brodo.de>\n");
 
         /* Multiplier. */
         mult = msr_lo >> 24;
 
-        dprintk("P4 - FSB %u kHz; Multiplier %u; Speed %u kHz\n", fsb, mult, (fsb * mult));
+        dprintk("P4 - FSB %u kHz; Multiplier %u; Speed %u kHz\n",
+                        fsb, mult, (fsb * mult));
 
-        return (fsb * mult);
+        ret = (fsb * mult);
+        return ret;
 }
 
 
-unsigned int speedstep_get_processor_frequency(unsigned int processor)
+unsigned int speedstep_get_frequency(unsigned int processor)
 {
         switch (processor) {
-        case SPEEDSTEP_PROCESSOR_PCORE:
+        case SPEEDSTEP_CPU_PCORE:
                 return pentium_core_get_frequency();
-        case SPEEDSTEP_PROCESSOR_PM:
+        case SPEEDSTEP_CPU_PM:
                 return pentiumM_get_frequency();
-        case SPEEDSTEP_PROCESSOR_P4D:
-        case SPEEDSTEP_PROCESSOR_P4M:
+        case SPEEDSTEP_CPU_P4D:
+        case SPEEDSTEP_CPU_P4M:
                 return pentium4_get_frequency();
-        case SPEEDSTEP_PROCESSOR_PIII_T:
-        case SPEEDSTEP_PROCESSOR_PIII_C:
-        case SPEEDSTEP_PROCESSOR_PIII_C_EARLY:
+        case SPEEDSTEP_CPU_PIII_T:
+        case SPEEDSTEP_CPU_PIII_C:
+        case SPEEDSTEP_CPU_PIII_C_EARLY:
                 return pentium3_get_frequency(processor);
         default:
                 return 0;
         };
         return 0;
 }
-EXPORT_SYMBOL_GPL(speedstep_get_processor_frequency);
+EXPORT_SYMBOL_GPL(speedstep_get_frequency);
 
 
 /*********************************************************************
  *                 DETECT SPEEDSTEP-CAPABLE PROCESSOR                *
  *********************************************************************/
 
-unsigned int speedstep_detect_processor (void)
+unsigned int speedstep_detect_processor(void)
 {
         struct cpuinfo_x86 *c = &cpu_data(0);
         u32 ebx, msr_lo, msr_hi;
@@ -261,7 +281,7 @@ unsigned int speedstep_detect_processor (void)
                          * sample has ebx = 0x0f, production has 0x0e.
                          */
                         if ((ebx == 0x0e) || (ebx == 0x0f))
-                                return SPEEDSTEP_PROCESSOR_P4M;
+                                return SPEEDSTEP_CPU_P4M;
                         break;
                 case 7:
                         /*
@@ -272,7 +292,7 @@ unsigned int speedstep_detect_processor (void)
                          * samples are only of B-stepping...
                          */
                         if (ebx == 0x0e)
-                                return SPEEDSTEP_PROCESSOR_P4M;
+                                return SPEEDSTEP_CPU_P4M;
                         break;
                 case 9:
                         /*
@@ -288,10 +308,13 @@ unsigned int speedstep_detect_processor (void)
                          * M-P4-Ms may have either ebx=0xe or 0xf [see above]
                          * M-P4/533 have either ebx=0xe or 0xf. [25317607.pdf]
                          * also, M-P4M HTs have ebx=0x8, too
-                         * For now, they are distinguished by the model_id string
+                         * For now, they are distinguished by the model_id
+                         * string
                          */
-                        if ((ebx == 0x0e) || (strstr(c->x86_model_id,"Mobile Intel(R) Pentium(R) 4") != NULL))
-                                return SPEEDSTEP_PROCESSOR_P4M;
+                        if ((ebx == 0x0e) ||
+                                (strstr(c->x86_model_id,
+                                    "Mobile Intel(R) Pentium(R) 4") != NULL))
+                                return SPEEDSTEP_CPU_P4M;
                         break;
                 default:
                         break;
@@ -301,7 +324,8 @@ unsigned int speedstep_detect_processor (void)
 
         switch (c->x86_model) {
         case 0x0B: /* Intel PIII [Tualatin] */
-                /* cpuid_ebx(1) is 0x04 for desktop PIII, 0x06 for mobile PIII-M */
+                /* cpuid_ebx(1) is 0x04 for desktop PIII,
+                 * 0x06 for mobile PIII-M */
                 ebx = cpuid_ebx(0x00000001);
                 dprintk("ebx is %x\n", ebx);
 
@@ -313,14 +337,15 @@ unsigned int speedstep_detect_processor (void)
                 /* So far all PIII-M processors support SpeedStep. See
                  * Intel's 24540640.pdf of June 2003
                  */
-                return SPEEDSTEP_PROCESSOR_PIII_T;
+                return SPEEDSTEP_CPU_PIII_T;
 
         case 0x08: /* Intel PIII [Coppermine] */
 
                 /* all mobile PIII Coppermines have FSB 100 MHz
                  * ==> sort out a few desktop PIIIs. */
                 rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_hi);
-                dprintk("Coppermine: MSR_IA32_EBL_CR_POWERON is 0x%x, 0x%x\n", msr_lo, msr_hi);
+                dprintk("Coppermine: MSR_IA32_EBL_CR_POWERON is 0x%x, 0x%x\n",
+                                msr_lo, msr_hi);
                 msr_lo &= 0x00c0000;
                 if (msr_lo != 0x0080000)
                         return 0;
@@ -332,13 +357,15 @@ unsigned int speedstep_detect_processor (void)
                  * bit 56 or 57 is set
                  */
                 rdmsr(MSR_IA32_PLATFORM_ID, msr_lo, msr_hi);
-                dprintk("Coppermine: MSR_IA32_PLATFORM ID is 0x%x, 0x%x\n", msr_lo, msr_hi);
-                if ((msr_hi & (1<<18)) && (relaxed_check ? 1 : (msr_hi & (3<<24)))) {
+                dprintk("Coppermine: MSR_IA32_PLATFORM ID is 0x%x, 0x%x\n",
+                                msr_lo, msr_hi);
+                if ((msr_hi & (1<<18)) &&
+                    (relaxed_check ? 1 : (msr_hi & (3<<24)))) {
                         if (c->x86_mask == 0x01) {
                                 dprintk("early PIII version\n");
-                                return SPEEDSTEP_PROCESSOR_PIII_C_EARLY;
+                                return SPEEDSTEP_CPU_PIII_C_EARLY;
                         } else
-                                return SPEEDSTEP_PROCESSOR_PIII_C;
+                                return SPEEDSTEP_CPU_PIII_C;
                 }
 
         default:
@@ -369,7 +396,7 @@ unsigned int speedstep_get_freqs(unsigned int processor,
         dprintk("trying to determine both speeds\n");
 
         /* get current speed */
-        prev_speed = speedstep_get_processor_frequency(processor);
+        prev_speed = speedstep_get_frequency(processor);
         if (!prev_speed)
                 return -EIO;
 
@@ -379,7 +406,7 @@ unsigned int speedstep_get_freqs(unsigned int processor,
 
         /* switch to low state */
         set_state(SPEEDSTEP_LOW);
-        *low_speed = speedstep_get_processor_frequency(processor);
+        *low_speed = speedstep_get_frequency(processor);
         if (!*low_speed) {
                 ret = -EIO;
                 goto out;
@@ -398,7 +425,7 @@ unsigned int speedstep_get_freqs(unsigned int processor,
         if (transition_latency)
                 do_gettimeofday(&tv2);
 
-        *high_speed = speedstep_get_processor_frequency(processor);
+        *high_speed = speedstep_get_frequency(processor);
         if (!*high_speed) {
                 ret = -EIO;
                 goto out;
@@ -426,9 +453,12 @@ unsigned int speedstep_get_freqs(unsigned int processor,
                 /* check if the latency measurement is too high or too low
                  * and set it to a safe value (500uSec) in that case
                  */
-                if (*transition_latency > 10000000 || *transition_latency < 50000) {
-                        printk (KERN_WARNING "speedstep: frequency transition measured seems out of "
-                                        "range (%u nSec), falling back to a safe one of %u nSec.\n",
+                if (*transition_latency > 10000000 ||
+                    *transition_latency < 50000) {
+                        printk(KERN_WARNING PFX "frequency transition "
+                                        "measured seems out of range (%u "
+                                        "nSec), falling back to a safe one of"
+                                        "%u nSec.\n",
                                         *transition_latency, 500000);
                         *transition_latency = 500000;
                 }
@@ -436,15 +466,16 @@ unsigned int speedstep_get_freqs(unsigned int processor,
 
 out:
         local_irq_restore(flags);
-        return (ret);
+        return ret;
 }
 EXPORT_SYMBOL_GPL(speedstep_get_freqs);
 
 #ifdef CONFIG_X86_SPEEDSTEP_RELAXED_CAP_CHECK
 module_param(relaxed_check, int, 0444);
-MODULE_PARM_DESC(relaxed_check, "Don't do all checks for speedstep capability.");
+MODULE_PARM_DESC(relaxed_check,
+                "Don't do all checks for speedstep capability.");
 #endif
 
-MODULE_AUTHOR ("Dominik Brodowski <linux@brodo.de>");
-MODULE_DESCRIPTION ("Library for Intel SpeedStep 1 or 2 cpufreq drivers.");
-MODULE_LICENSE ("GPL");
+MODULE_AUTHOR("Dominik Brodowski <linux@brodo.de>");
+MODULE_DESCRIPTION("Library for Intel SpeedStep 1 or 2 cpufreq drivers.");
+MODULE_LICENSE("GPL");
diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-lib.h b/arch/x86/kernel/cpu/cpufreq/speedstep-lib.h
index b11bcc608cac..2b6c04e5a304 100644
--- a/arch/x86/kernel/cpu/cpufreq/speedstep-lib.h
+++ b/arch/x86/kernel/cpu/cpufreq/speedstep-lib.h
@@ -12,17 +12,17 @@
 
 /* processors */
 
-#define SPEEDSTEP_PROCESSOR_PIII_C_EARLY        0x00000001  /* Coppermine core */
-#define SPEEDSTEP_PROCESSOR_PIII_C              0x00000002  /* Coppermine core */
-#define SPEEDSTEP_PROCESSOR_PIII_T              0x00000003  /* Tualatin core */
-#define SPEEDSTEP_PROCESSOR_P4M                 0x00000004  /* P4-M  */
+#define SPEEDSTEP_CPU_PIII_C_EARLY      0x00000001  /* Coppermine core */
+#define SPEEDSTEP_CPU_PIII_C            0x00000002  /* Coppermine core */
+#define SPEEDSTEP_CPU_PIII_T            0x00000003  /* Tualatin core */
+#define SPEEDSTEP_CPU_P4M               0x00000004  /* P4-M  */
 
 /* the following processors are not speedstep-capable and are not auto-detected
  * in speedstep_detect_processor(). However, their speed can be detected using
- * the speedstep_get_processor_frequency() call. */
-#define SPEEDSTEP_PROCESSOR_PM                  0xFFFFFF03  /* Pentium M  */
-#define SPEEDSTEP_PROCESSOR_P4D                 0xFFFFFF04  /* desktop P4  */
-#define SPEEDSTEP_PROCESSOR_PCORE               0xFFFFFF05  /* Core */
+ * the speedstep_get_frequency() call. */
+#define SPEEDSTEP_CPU_PM                0xFFFFFF03  /* Pentium M  */
+#define SPEEDSTEP_CPU_P4D               0xFFFFFF04  /* desktop P4  */
+#define SPEEDSTEP_CPU_PCORE             0xFFFFFF05  /* Core */
 
 /* speedstep states -- only two of them */
 
@@ -34,7 +34,7 @@
 extern unsigned int speedstep_detect_processor (void);
 
 /* detect the current speed (in khz) of the processor */
-extern unsigned int speedstep_get_processor_frequency(unsigned int processor);
+extern unsigned int speedstep_get_frequency(unsigned int processor);
 
 
 /* detect the low and high speeds of the processor. The callback
diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-smi.c b/arch/x86/kernel/cpu/cpufreq/speedstep-smi.c
index 8a85c93bd62a..befea088e4f5 100644
--- a/arch/x86/kernel/cpu/cpufreq/speedstep-smi.c
+++ b/arch/x86/kernel/cpu/cpufreq/speedstep-smi.c
@@ -19,8 +19,8 @@
 #include <linux/cpufreq.h>
 #include <linux/slab.h>
 #include <linux/delay.h>
+#include <linux/io.h>
 #include <asm/ist.h>
-#include <asm/io.h>
 
 #include "speedstep-lib.h"
 
@@ -30,12 +30,12 @@
  * If user gives it, these are used.
  *
  */
-static int smi_port = 0;
-static int smi_cmd = 0;
-static unsigned int smi_sig = 0;
+static int smi_port;
+static int smi_cmd;
+static unsigned int smi_sig;
 
 /* info about the processor */
-static unsigned int speedstep_processor = 0;
+static unsigned int speedstep_processor;
 
 /*
  * There are only two frequency states for each processor. Values
@@ -56,12 +56,13 @@ static struct cpufreq_frequency_table speedstep_freqs[] = {
  * of DMA activity going on? */
 #define SMI_TRIES 5
 
-#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "speedstep-smi", msg)
+#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
+                "speedstep-smi", msg)
 
 /**
  * speedstep_smi_ownership
  */
-static int speedstep_smi_ownership (void)
+static int speedstep_smi_ownership(void)
 {
         u32 command, result, magic, dummy;
         u32 function = GET_SPEEDSTEP_OWNER;
@@ -70,16 +71,18 @@ static int speedstep_smi_ownership (void)
         command = (smi_sig & 0xffffff00) | (smi_cmd & 0xff);
         magic = virt_to_phys(magic_data);
 
-        dprintk("trying to obtain ownership with command %x at port %x\n", command, smi_port);
+        dprintk("trying to obtain ownership with command %x at port %x\n",
+                        command, smi_port);
 
         __asm__ __volatile__(
                 "push %%ebp\n"
                 "out %%al, (%%dx)\n"
                 "pop %%ebp\n"
-                : "=D" (result), "=a" (dummy), "=b" (dummy), "=c" (dummy), "=d" (dummy),
-                        "=S" (dummy)
+                : "=D" (result),
+                  "=a" (dummy), "=b" (dummy), "=c" (dummy), "=d" (dummy),
+                  "=S" (dummy)
                 : "a" (command), "b" (function), "c" (0), "d" (smi_port),
-                        "D" (0), "S" (magic)
+                  "D" (0), "S" (magic)
                 : "memory"
         );
 
@@ -97,10 +100,10 @@ static int speedstep_smi_ownership (void)
  * even hangs [cf. bugme.osdl.org # 1422] on earlier systems. Empirical testing
  * shows that the latter occurs if !(ist_info.event & 0xFFFF).
  */
-static int speedstep_smi_get_freqs (unsigned int *low, unsigned int *high)
+static int speedstep_smi_get_freqs(unsigned int *low, unsigned int *high)
 {
         u32 command, result = 0, edi, high_mhz, low_mhz, dummy;
-        u32 state=0;
+        u32 state = 0;
         u32 function = GET_SPEEDSTEP_FREQS;
 
         if (!(ist_info.event & 0xFFFF)) {
@@ -110,17 +113,25 @@ static int speedstep_smi_get_freqs (unsigned int *low, unsigned int *high)
 
         command = (smi_sig & 0xffffff00) | (smi_cmd & 0xff);
 
-        dprintk("trying to determine frequencies with command %x at port %x\n", command, smi_port);
+        dprintk("trying to determine frequencies with command %x at port %x\n",
+                        command, smi_port);
 
         __asm__ __volatile__(
                 "push %%ebp\n"
                 "out %%al, (%%dx)\n"
                 "pop %%ebp"
-                : "=a" (result), "=b" (high_mhz), "=c" (low_mhz), "=d" (state), "=D" (edi), "=S" (dummy)
-                : "a" (command), "b" (function), "c" (state), "d" (smi_port), "S" (0), "D" (0)
+                : "=a" (result),
+                  "=b" (high_mhz),
+                  "=c" (low_mhz),
+                  "=d" (state), "=D" (edi), "=S" (dummy)
+                : "a" (command),
+                  "b" (function),
+                  "c" (state),
+                  "d" (smi_port), "S" (0), "D" (0)
         );
 
-        dprintk("result %x, low_freq %u, high_freq %u\n", result, low_mhz, high_mhz);
+        dprintk("result %x, low_freq %u, high_freq %u\n",
+                        result, low_mhz, high_mhz);
 
         /* abort if results are obviously incorrect... */
         if ((high_mhz + low_mhz) < 600)
@@ -137,26 +148,30 @@ static int speedstep_smi_get_freqs (unsigned int *low, unsigned int *high)
  * @state: processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH)
  *
  */
-static int speedstep_get_state (void)
+static int speedstep_get_state(void)
 {
-        u32 function=GET_SPEEDSTEP_STATE;
+        u32 function = GET_SPEEDSTEP_STATE;
         u32 result, state, edi, command, dummy;
 
         command = (smi_sig & 0xffffff00) | (smi_cmd & 0xff);
 
-        dprintk("trying to determine current setting with command %x at port %x\n", command, smi_port);
+        dprintk("trying to determine current setting with command %x "
+                "at port %x\n", command, smi_port);
 
         __asm__ __volatile__(
                 "push %%ebp\n"
                 "out %%al, (%%dx)\n"
                 "pop %%ebp\n"
-                : "=a" (result), "=b" (state), "=D" (edi), "=c" (dummy), "=d" (dummy), "=S" (dummy)
-                : "a" (command), "b" (function), "c" (0), "d" (smi_port), "S" (0), "D" (0)
+                : "=a" (result),
+                  "=b" (state), "=D" (edi),
+                  "=c" (dummy), "=d" (dummy), "=S" (dummy)
+                : "a" (command), "b" (function), "c" (0),
+                  "d" (smi_port), "S" (0), "D" (0)
         );
 
         dprintk("state is %x, result is %x\n", state, result);
 
-        return (state & 1);
+        return state & 1;
 }
 
 
@@ -165,11 +180,11 @@ static int speedstep_get_state (void)
  * @state: new processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH)
  *
  */
-static void speedstep_set_state (unsigned int state)
+static void speedstep_set_state(unsigned int state)
 {
         unsigned int result = 0, command, new_state, dummy;
         unsigned long flags;
-        unsigned int function=SET_SPEEDSTEP_STATE;
+        unsigned int function = SET_SPEEDSTEP_STATE;
         unsigned int retry = 0;
 
         if (state > 0x1)
@@ -180,11 +195,14 @@ static void speedstep_set_state (unsigned int state)
 
         command = (smi_sig & 0xffffff00) | (smi_cmd & 0xff);
 
-        dprintk("trying to set frequency to state %u with command %x at port %x\n", state, command, smi_port);
+        dprintk("trying to set frequency to state %u "
+                "with command %x at port %x\n",
+                state, command, smi_port);
 
         do {
                 if (retry) {
-                        dprintk("retry %u, previous result %u, waiting...\n", retry, result);
+                        dprintk("retry %u, previous result %u, waiting...\n",
+                                        retry, result);
                         mdelay(retry * 50);
                 }
                 retry++;
@@ -192,20 +210,26 @@ static void speedstep_set_state (unsigned int state)
                         "push %%ebp\n"
                         "out %%al, (%%dx)\n"
                         "pop %%ebp"
-                        : "=b" (new_state), "=D" (result), "=c" (dummy), "=a" (dummy),
-                                "=d" (dummy), "=S" (dummy)
-                        : "a" (command), "b" (function), "c" (state), "d" (smi_port), "S" (0), "D" (0)
+                        : "=b" (new_state), "=D" (result),
+                          "=c" (dummy), "=a" (dummy),
+                          "=d" (dummy), "=S" (dummy)
+                        : "a" (command), "b" (function), "c" (state),
+                          "d" (smi_port), "S" (0), "D" (0)
                         );
         } while ((new_state != state) && (retry <= SMI_TRIES));
 
         /* enable IRQs */
         local_irq_restore(flags);
 
-        if (new_state == state) {
-                dprintk("change to %u MHz succeeded after %u tries with result %u\n", (speedstep_freqs[new_state].frequency / 1000), retry, result);
-        } else {
-                printk(KERN_ERR "cpufreq: change to state %u failed with new_state %u and result %u\n", state, new_state, result);
-        }
+        if (new_state == state)
+                dprintk("change to %u MHz succeeded after %u tries "
+                        "with result %u\n",
+                        (speedstep_freqs[new_state].frequency / 1000),
+                        retry, result);
+        else
+                printk(KERN_ERR "cpufreq: change to state %u "
+                        "failed with new_state %u and result %u\n",
+                        state, new_state, result);
 
         return;
 }
@@ -219,13 +243,14 @@ static void speedstep_set_state (unsigned int state)
  *
  * Sets a new CPUFreq policy/freq.
  */
-static int speedstep_target (struct cpufreq_policy *policy,
+static int speedstep_target(struct cpufreq_policy *policy,
                         unsigned int target_freq, unsigned int relation)
 {
         unsigned int newstate = 0;
         struct cpufreq_freqs freqs;
 
-        if (cpufreq_frequency_table_target(policy, &speedstep_freqs[0], target_freq, relation, &newstate))
+        if (cpufreq_frequency_table_target(policy, &speedstep_freqs[0],
+                                target_freq, relation, &newstate))
                 return -EINVAL;
 
         freqs.old = speedstep_freqs[speedstep_get_state()].frequency;
@@ -250,7 +275,7 @@ static int speedstep_target (struct cpufreq_policy *policy,
  * Limit must be within speedstep_low_freq and speedstep_high_freq, with
  * at least one border included.
  */
-static int speedstep_verify (struct cpufreq_policy *policy)
+static int speedstep_verify(struct cpufreq_policy *policy)
 {
         return cpufreq_frequency_table_verify(policy, &speedstep_freqs[0]);
 }
@@ -259,7 +284,8 @@ static int speedstep_verify (struct cpufreq_policy *policy)
 static int speedstep_cpu_init(struct cpufreq_policy *policy)
 {
         int result;
-        unsigned int speed,state;
+        unsigned int speed, state;
+        unsigned int *low, *high;
 
         /* capability check */
         if (policy->cpu != 0)
@@ -272,19 +298,23 @@ static int speedstep_cpu_init(struct cpufreq_policy *policy)
         }
 
         /* detect low and high frequency */
-        result = speedstep_smi_get_freqs(&speedstep_freqs[SPEEDSTEP_LOW].frequency,
-                                &speedstep_freqs[SPEEDSTEP_HIGH].frequency);
+        low = &speedstep_freqs[SPEEDSTEP_LOW].frequency;
+        high = &speedstep_freqs[SPEEDSTEP_HIGH].frequency;
+
+        result = speedstep_smi_get_freqs(low, high);
         if (result) {
-                /* fall back to speedstep_lib.c dection mechanism: try both states out */
-                dprintk("could not detect low and high frequencies by SMI call.\n");
+                /* fall back to speedstep_lib.c dection mechanism:
+                 * try both states out */
+                dprintk("could not detect low and high frequencies "
+                                "by SMI call.\n");
                 result = speedstep_get_freqs(speedstep_processor,
-                                &speedstep_freqs[SPEEDSTEP_LOW].frequency,
-                                &speedstep_freqs[SPEEDSTEP_HIGH].frequency,
+                                low, high,
                                 NULL,
                                 &speedstep_set_state);
 
                 if (result) {
-                        dprintk("could not detect two different speeds -- aborting.\n");
+                        dprintk("could not detect two different speeds"
+                                        " -- aborting.\n");
                         return result;
                 } else
                         dprintk("workaround worked.\n");
@@ -295,7 +325,8 @@ static int speedstep_cpu_init(struct cpufreq_policy *policy)
         speed = speedstep_freqs[state].frequency;
 
         dprintk("currently at %s speed setting - %i MHz\n",
-                (speed == speedstep_freqs[SPEEDSTEP_LOW].frequency) ? "low" : "high",
+                (speed == speedstep_freqs[SPEEDSTEP_LOW].frequency)
+                ? "low" : "high",
                 (speed / 1000));
 
         /* cpuinfo and default policy values */
@@ -304,7 +335,7 @@ static int speedstep_cpu_init(struct cpufreq_policy *policy)
 
         result = cpufreq_frequency_table_cpuinfo(policy, speedstep_freqs);
         if (result)
-                return (result);
+                return result;
 
         cpufreq_frequency_table_get_attr(speedstep_freqs, policy->cpu);
 
@@ -321,7 +352,7 @@ static unsigned int speedstep_get(unsigned int cpu)
 {
         if (cpu)
                 return -ENODEV;
-        return speedstep_get_processor_frequency(speedstep_processor);
+        return speedstep_get_frequency(speedstep_processor);
 }
 
 
@@ -335,7 +366,7 @@ static int speedstep_resume(struct cpufreq_policy *policy)
         return result;
 }
 
-static struct freq_attr* speedstep_attr[] = {
+static struct freq_attr *speedstep_attr[] = {
         &cpufreq_freq_attr_scaling_available_freqs,
         NULL,
 };
@@ -364,21 +395,23 @@ static int __init speedstep_init(void)
         speedstep_processor = speedstep_detect_processor();
 
         switch (speedstep_processor) {
-        case SPEEDSTEP_PROCESSOR_PIII_T:
-        case SPEEDSTEP_PROCESSOR_PIII_C:
-        case SPEEDSTEP_PROCESSOR_PIII_C_EARLY:
+        case SPEEDSTEP_CPU_PIII_T:
+        case SPEEDSTEP_CPU_PIII_C:
+        case SPEEDSTEP_CPU_PIII_C_EARLY:
                 break;
         default:
                 speedstep_processor = 0;
         }
 
         if (!speedstep_processor) {
-                dprintk ("No supported Intel CPU detected.\n");
+                dprintk("No supported Intel CPU detected.\n");
                 return -ENODEV;
         }
 
-        dprintk("signature:0x%.8lx, command:0x%.8lx, event:0x%.8lx, perf_level:0x%.8lx.\n",
-                ist_info.signature, ist_info.command, ist_info.event, ist_info.perf_level);
+        dprintk("signature:0x%.8lx, command:0x%.8lx, "
+                "event:0x%.8lx, perf_level:0x%.8lx.\n",
+                ist_info.signature, ist_info.command,
+                ist_info.event, ist_info.perf_level);
 
         /* Error if no IST-SMI BIOS or no PARM
                  sig= 'ISGE' aka 'Intel Speedstep Gate E' */
@@ -416,17 +449,20 @@ static void __exit speedstep_exit(void)
         cpufreq_unregister_driver(&speedstep_driver);
 }
 
-module_param(smi_port,  int, 0444);
-module_param(smi_cmd,   int, 0444);
-module_param(smi_sig,  uint, 0444);
+module_param(smi_port, int, 0444);
+module_param(smi_cmd,  int, 0444);
+module_param(smi_sig, uint, 0444);
 
-MODULE_PARM_DESC(smi_port, "Override the BIOS-given IST port with this value -- Intel's default setting is 0xb2");
-MODULE_PARM_DESC(smi_cmd, "Override the BIOS-given IST command with this value -- Intel's default setting is 0x82");
-MODULE_PARM_DESC(smi_sig, "Set to 1 to fake the IST signature when using the SMI interface.");
+MODULE_PARM_DESC(smi_port, "Override the BIOS-given IST port with this value "
+                "-- Intel's default setting is 0xb2");
+MODULE_PARM_DESC(smi_cmd, "Override the BIOS-given IST command with this value "
+                "-- Intel's default setting is 0x82");
+MODULE_PARM_DESC(smi_sig, "Set to 1 to fake the IST signature when using the "
+                "SMI interface.");
 
-MODULE_AUTHOR ("Hiroshi Miura");
-MODULE_DESCRIPTION ("Speedstep driver for IST applet SMI interface.");
-MODULE_LICENSE ("GPL");
+MODULE_AUTHOR("Hiroshi Miura");
+MODULE_DESCRIPTION("Speedstep driver for IST applet SMI interface.");
+MODULE_LICENSE("GPL");
 
 module_init(speedstep_init);
 module_exit(speedstep_exit);
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index b09d4eb52bb9..7437fa133c02 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -4,6 +4,7 @@
 #include <linux/string.h>
 #include <linux/bitops.h>
 #include <linux/smp.h>
+#include <linux/sched.h>
 #include <linux/thread_info.h>
 #include <linux/module.h>
 
@@ -61,11 +62,16 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)
 
         /*
          * c->x86_power is 8000_0007 edx. Bit 8 is TSC runs at constant rate
-         * with P/T states and does not stop in deep C-states
+         * with P/T states and does not stop in deep C-states.
+         *
+         * It is also reliable across cores and sockets. (but not across
+         * cabinets - we turn it off in that case explicitly.)
          */
         if (c->x86_power & (1 << 8)) {
                 set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC);
                 set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC);
+                set_cpu_cap(c, X86_FEATURE_TSC_RELIABLE);
+                sched_clock_stable = 1;
         }
 
         /*
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c
index a00545fe5cdd..648b3a2a3a44 100644
--- a/arch/x86/kernel/hpet.c
+++ b/arch/x86/kernel/hpet.c
@@ -80,6 +80,7 @@ static inline void hpet_clear_mapping(void)
  */
 static int boot_hpet_disable;
 int hpet_force_user;
+static int hpet_verbose;
 
 static int __init hpet_setup(char *str)
 {
@@ -88,6 +89,8 @@ static int __init hpet_setup(char *str)
                         boot_hpet_disable = 1;
                 if (!strncmp("force", str, 5))
                         hpet_force_user = 1;
+                if (!strncmp("verbose", str, 7))
+                        hpet_verbose = 1;
         }
         return 1;
 }
@@ -119,6 +122,43 @@ int is_hpet_enabled(void)
 }
 EXPORT_SYMBOL_GPL(is_hpet_enabled);
 
+static void _hpet_print_config(const char *function, int line)
+{
+        u32 i, timers, l, h;
+        printk(KERN_INFO "hpet: %s(%d):\n", function, line);
+        l = hpet_readl(HPET_ID);
+        h = hpet_readl(HPET_PERIOD);
+        timers = ((l & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT) + 1;
+        printk(KERN_INFO "hpet: ID: 0x%x, PERIOD: 0x%x\n", l, h);
+        l = hpet_readl(HPET_CFG);
+        h = hpet_readl(HPET_STATUS);
+        printk(KERN_INFO "hpet: CFG: 0x%x, STATUS: 0x%x\n", l, h);
+        l = hpet_readl(HPET_COUNTER);
+        h = hpet_readl(HPET_COUNTER+4);
+        printk(KERN_INFO "hpet: COUNTER_l: 0x%x, COUNTER_h: 0x%x\n", l, h);
+
+        for (i = 0; i < timers; i++) {
+                l = hpet_readl(HPET_Tn_CFG(i));
+                h = hpet_readl(HPET_Tn_CFG(i)+4);
+                printk(KERN_INFO "hpet: T%d: CFG_l: 0x%x, CFG_h: 0x%x\n",
+                       i, l, h);
+                l = hpet_readl(HPET_Tn_CMP(i));
+                h = hpet_readl(HPET_Tn_CMP(i)+4);
+                printk(KERN_INFO "hpet: T%d: CMP_l: 0x%x, CMP_h: 0x%x\n",
+                       i, l, h);
+                l = hpet_readl(HPET_Tn_ROUTE(i));
+                h = hpet_readl(HPET_Tn_ROUTE(i)+4);
+                printk(KERN_INFO "hpet: T%d ROUTE_l: 0x%x, ROUTE_h: 0x%x\n",
+                       i, l, h);
+        }
+}
+
+#define hpet_print_config()                                     \
+do {                                                            \
+        if (hpet_verbose)                                       \
+                _hpet_print_config(__FUNCTION__, __LINE__);     \
+} while (0)
+
 /*
  * When the hpet driver (/dev/hpet) is enabled, we need to reserve
  * timer 0 and timer 1 in case of RTC emulation.
@@ -191,27 +231,37 @@ static struct clock_event_device hpet_clockevent = {
         .rating         = 50,
 };
 
-static void hpet_start_counter(void)
+static void hpet_stop_counter(void)
 {
         unsigned long cfg = hpet_readl(HPET_CFG);
-
         cfg &= ~HPET_CFG_ENABLE;
         hpet_writel(cfg, HPET_CFG);
         hpet_writel(0, HPET_COUNTER);
         hpet_writel(0, HPET_COUNTER + 4);
+}
+
+static void hpet_start_counter(void)
+{
+        unsigned long cfg = hpet_readl(HPET_CFG);
         cfg |= HPET_CFG_ENABLE;
         hpet_writel(cfg, HPET_CFG);
 }
 
+static void hpet_restart_counter(void)
+{
+        hpet_stop_counter();
+        hpet_start_counter();
+}
+
 static void hpet_resume_device(void)
 {
         force_hpet_resume();
 }
 
-static void hpet_restart_counter(void)
+static void hpet_resume_counter(void)
 {
         hpet_resume_device();
-        hpet_start_counter();
+        hpet_restart_counter();
 }
 
 static void hpet_enable_legacy_int(void)
@@ -259,29 +309,23 @@ static int hpet_setup_msi_irq(unsigned int irq);
 static void hpet_set_mode(enum clock_event_mode mode,
                           struct clock_event_device *evt, int timer)
 {
-        unsigned long cfg, cmp, now;
+        unsigned long cfg;
         uint64_t delta;
 
         switch (mode) {
         case CLOCK_EVT_MODE_PERIODIC:
+                hpet_stop_counter();
                 delta = ((uint64_t)(NSEC_PER_SEC/HZ)) * evt->mult;
                 delta >>= evt->shift;
-                now = hpet_readl(HPET_COUNTER);
-                cmp = now + (unsigned long) delta;
                 cfg = hpet_readl(HPET_Tn_CFG(timer));
                 /* Make sure we use edge triggered interrupts */
                 cfg &= ~HPET_TN_LEVEL;
                 cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC |
                        HPET_TN_SETVAL | HPET_TN_32BIT;
                 hpet_writel(cfg, HPET_Tn_CFG(timer));
-                /*
-                 * The first write after writing TN_SETVAL to the
-                 * config register sets the counter value, the second
-                 * write sets the period.
-                 */
-                hpet_writel(cmp, HPET_Tn_CMP(timer));
-                udelay(1);
                 hpet_writel((unsigned long) delta, HPET_Tn_CMP(timer));
+                hpet_start_counter();
+                hpet_print_config();
                 break;
 
         case CLOCK_EVT_MODE_ONESHOT:
@@ -308,6 +352,7 @@ static void hpet_set_mode(enum clock_event_mode mode,
                         irq_set_affinity(hdev->irq, cpumask_of(hdev->cpu));
                         enable_irq(hdev->irq);
                 }
+                hpet_print_config();
                 break;
         }
 }
@@ -526,6 +571,7 @@ static void hpet_msi_capability_lookup(unsigned int start_timer)
 
         num_timers = ((id & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT);
         num_timers++; /* Value read out starts from 0 */
+        hpet_print_config();
 
         hpet_devs = kzalloc(sizeof(struct hpet_dev) * num_timers, GFP_KERNEL);
         if (!hpet_devs)
@@ -695,7 +741,7 @@ static struct clocksource clocksource_hpet = {
         .mask           = HPET_MASK,
         .shift          = HPET_SHIFT,
         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
-        .resume         = hpet_restart_counter,
+        .resume         = hpet_resume_counter,
 #ifdef CONFIG_X86_64
         .vread          = vread_hpet,
 #endif
@@ -707,7 +753,7 @@ static int hpet_clocksource_register(void)
         cycle_t t1;
 
         /* Start the counter */
-        hpet_start_counter();
+        hpet_restart_counter();
 
         /* Verify whether hpet counter works */
         t1 = read_hpet();
@@ -793,6 +839,7 @@ int __init hpet_enable(void)
          * information and the number of channels
          */
         id = hpet_readl(HPET_ID);
+        hpet_print_config();
 
 #ifdef CONFIG_HPET_EMULATE_RTC
         /*
@@ -845,6 +892,7 @@ static __init int hpet_late_init(void)
                 return -ENODEV;
 
         hpet_reserve_platform_timers(hpet_readl(HPET_ID));
+        hpet_print_config();
 
         for_each_online_cpu(cpu) {
                 hpet_cpuhp_notify(NULL, CPU_ONLINE, (void *)(long)cpu);
diff --git a/arch/x86/kernel/quirks.c b/arch/x86/kernel/quirks.c
index 6a5a2970f4c5..e95022e4f5d5 100644
--- a/arch/x86/kernel/quirks.c
+++ b/arch/x86/kernel/quirks.c
@@ -171,7 +171,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_4,
                          ich_force_enable_hpet);
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_7,
                          ich_force_enable_hpet);
-
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x3a16,   /* ICH10 */
+                         ich_force_enable_hpet);
 
 static struct pci_dev *cached_dev;
 
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 462b9ba67e92..7a567ebe6361 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -17,20 +17,21 @@
 #include <asm/delay.h>
 #include <asm/hypervisor.h>
 
-unsigned int cpu_khz;           /* TSC clocks / usec, not used here */
+unsigned int __read_mostly cpu_khz;     /* TSC clocks / usec, not used here */
 EXPORT_SYMBOL(cpu_khz);
-unsigned int tsc_khz;
+
+unsigned int __read_mostly tsc_khz;
 EXPORT_SYMBOL(tsc_khz);
 
 /*
  * TSC can be unstable due to cpufreq or due to unsynced TSCs
  */
-static int tsc_unstable;
+static int __read_mostly tsc_unstable;
 
 /* native_sched_clock() is called before tsc_init(), so
    we must start with the TSC soft disabled to prevent
    erroneous rdtsc usage on !cpu_has_tsc processors */
-static int tsc_disabled = -1;
+static int __read_mostly tsc_disabled = -1;
 
 static int tsc_clocksource_reliable;
 /*
@@ -543,8 +544,6 @@ unsigned long native_calibrate_tsc(void)
         return tsc_pit_min;
 }
 
-#ifdef CONFIG_X86_32
-/* Only called from the Powernow K7 cpu freq driver */
 int recalibrate_cpu_khz(void)
 {
 #ifndef CONFIG_SMP
@@ -566,7 +565,6 @@ int recalibrate_cpu_khz(void)
 
 EXPORT_SYMBOL(recalibrate_cpu_khz);
 
-#endif /* CONFIG_X86_32 */
 
 /* Accelerators for sched_clock()
  * convert from cycles(64bits) => nanoseconds (64bits)
diff --git a/arch/x86/kvm/Kconfig b/arch/x86/kvm/Kconfig
index b81125f0bdee..0a303c3ed11f 100644
--- a/arch/x86/kvm/Kconfig
+++ b/arch/x86/kvm/Kconfig
@@ -4,6 +4,10 @@
 config HAVE_KVM
        bool
 
+config HAVE_KVM_IRQCHIP
+       bool
+       default y
+
 menuconfig VIRTUALIZATION
         bool "Virtualization"
         depends on HAVE_KVM || X86
diff --git a/arch/x86/kvm/i8254.c b/arch/x86/kvm/i8254.c
index 72bd275a9b5c..c13bb92d3157 100644
--- a/arch/x86/kvm/i8254.c
+++ b/arch/x86/kvm/i8254.c
@@ -201,6 +201,9 @@ static int __pit_timer_fn(struct kvm_kpit_state *ps)
         if (!atomic_inc_and_test(&pt->pending))
                 set_bit(KVM_REQ_PENDING_TIMER, &vcpu0->requests);
 
+        if (!pt->reinject)
+                atomic_set(&pt->pending, 1);
+
         if (vcpu0 && waitqueue_active(&vcpu0->wq))
                 wake_up_interruptible(&vcpu0->wq);
 
@@ -536,6 +539,16 @@ void kvm_pit_reset(struct kvm_pit *pit)
         pit->pit_state.irq_ack = 1;
 }
 
+static void pit_mask_notifer(struct kvm_irq_mask_notifier *kimn, bool mask)
+{
+        struct kvm_pit *pit = container_of(kimn, struct kvm_pit, mask_notifier);
+
+        if (!mask) {
+                atomic_set(&pit->pit_state.pit_timer.pending, 0);
+                pit->pit_state.irq_ack = 1;
+        }
+}
+
 struct kvm_pit *kvm_create_pit(struct kvm *kvm)
 {
         struct kvm_pit *pit;
@@ -545,9 +558,7 @@ struct kvm_pit *kvm_create_pit(struct kvm *kvm)
         if (!pit)
                 return NULL;
 
-        mutex_lock(&kvm->lock);
         pit->irq_source_id = kvm_request_irq_source_id(kvm);
-        mutex_unlock(&kvm->lock);
         if (pit->irq_source_id < 0) {
                 kfree(pit);
                 return NULL;
@@ -580,10 +591,14 @@ struct kvm_pit *kvm_create_pit(struct kvm *kvm)
         pit_state->irq_ack_notifier.gsi = 0;
         pit_state->irq_ack_notifier.irq_acked = kvm_pit_ack_irq;
         kvm_register_irq_ack_notifier(kvm, &pit_state->irq_ack_notifier);
+        pit_state->pit_timer.reinject = true;
         mutex_unlock(&pit->pit_state.lock);
 
         kvm_pit_reset(pit);
 
+        pit->mask_notifier.func = pit_mask_notifer;
+        kvm_register_irq_mask_notifier(kvm, 0, &pit->mask_notifier);
+
         return pit;
 }
 
@@ -592,6 +607,8 @@ void kvm_free_pit(struct kvm *kvm)
         struct hrtimer *timer;
 
         if (kvm->arch.vpit) {
+                kvm_unregister_irq_mask_notifier(kvm, 0,
+                                               &kvm->arch.vpit->mask_notifier);
                 mutex_lock(&kvm->arch.vpit->pit_state.lock);
                 timer = &kvm->arch.vpit->pit_state.pit_timer.timer;
                 hrtimer_cancel(timer);
diff --git a/arch/x86/kvm/i8254.h b/arch/x86/kvm/i8254.h
index 4178022b97aa..6acbe4b505d5 100644
--- a/arch/x86/kvm/i8254.h
+++ b/arch/x86/kvm/i8254.h
@@ -9,6 +9,7 @@ struct kvm_kpit_timer {
         s64 period; /* unit: ns */
         s64 scheduled;
         atomic_t pending;
+        bool reinject;
 };
 
 struct kvm_kpit_channel_state {
@@ -45,6 +46,7 @@ struct kvm_pit {
         struct kvm *kvm;
         struct kvm_kpit_state pit_state;
         int irq_source_id;
+        struct kvm_irq_mask_notifier mask_notifier;
 };
 
 #define KVM_PIT_BASE_ADDRESS        0x40
diff --git a/arch/x86/kvm/i8259.c b/arch/x86/kvm/i8259.c
index 179dcb0103fd..1ccb50c74f18 100644
--- a/arch/x86/kvm/i8259.c
+++ b/arch/x86/kvm/i8259.c
@@ -32,11 +32,13 @@
 #include <linux/kvm_host.h>
 
 static void pic_lock(struct kvm_pic *s)
+        __acquires(&s->lock)
 {
         spin_lock(&s->lock);
 }
 
 static void pic_unlock(struct kvm_pic *s)
+        __releases(&s->lock)
 {
         struct kvm *kvm = s->kvm;
         unsigned acks = s->pending_acks;
@@ -49,7 +51,8 @@ static void pic_unlock(struct kvm_pic *s)
         spin_unlock(&s->lock);
 
         while (acks) {
-                kvm_notify_acked_irq(kvm, __ffs(acks));
+                kvm_notify_acked_irq(kvm, SELECT_PIC(__ffs(acks)),
+                                     __ffs(acks));
                 acks &= acks - 1;
         }
 
@@ -76,12 +79,13 @@ void kvm_pic_clear_isr_ack(struct kvm *kvm)
 /*
  * set irq level. If an edge is detected, then the IRR is set to 1
  */
-static inline void pic_set_irq1(struct kvm_kpic_state *s, int irq, int level)
+static inline int pic_set_irq1(struct kvm_kpic_state *s, int irq, int level)
 {
-        int mask;
+        int mask, ret = 1;
         mask = 1 << irq;
         if (s->elcr & mask)     /* level triggered */
                 if (level) {
+                        ret = !(s->irr & mask);
                         s->irr |= mask;
                         s->last_irr |= mask;
                 } else {
@@ -90,11 +94,15 @@ static inline void pic_set_irq1(struct kvm_kpic_state *s, int irq, int level)
                 }
         else    /* edge triggered */
                 if (level) {
-                        if ((s->last_irr & mask) == 0)
+                        if ((s->last_irr & mask) == 0) {
+                                ret = !(s->irr & mask);
                                 s->irr |= mask;
+                        }
                         s->last_irr |= mask;
                 } else
                         s->last_irr &= ~mask;
+
+        return (s->imr & mask) ? -1 : ret;
 }
 
 /*
@@ -171,16 +179,19 @@ void kvm_pic_update_irq(struct kvm_pic *s)
         pic_unlock(s);
 }
 
-void kvm_pic_set_irq(void *opaque, int irq, int level)
+int kvm_pic_set_irq(void *opaque, int irq, int level)
 {
         struct kvm_pic *s = opaque;
+        int ret = -1;
 
         pic_lock(s);
         if (irq >= 0 && irq < PIC_NUM_PINS) {
-                pic_set_irq1(&s->pics[irq >> 3], irq & 7, level);
+                ret = pic_set_irq1(&s->pics[irq >> 3], irq & 7, level);
                 pic_update_irq(s);
         }
         pic_unlock(s);
+
+        return ret;
 }
 
 /*
@@ -232,7 +243,7 @@ int kvm_pic_read_irq(struct kvm *kvm)
         }
         pic_update_irq(s);
         pic_unlock(s);
-        kvm_notify_acked_irq(kvm, irq);
+        kvm_notify_acked_irq(kvm, SELECT_PIC(irq), irq);
 
         return intno;
 }
diff --git a/arch/x86/kvm/irq.h b/arch/x86/kvm/irq.h
index 82579ee538d0..9f593188129e 100644
--- a/arch/x86/kvm/irq.h
+++ b/arch/x86/kvm/irq.h
@@ -32,6 +32,8 @@
 #include "lapic.h"
 
 #define PIC_NUM_PINS 16
+#define SELECT_PIC(irq) \
+        ((irq) < 8 ? KVM_IRQCHIP_PIC_MASTER : KVM_IRQCHIP_PIC_SLAVE)
 
 struct kvm;
 struct kvm_vcpu;
diff --git a/arch/x86/kvm/kvm_svm.h b/arch/x86/kvm/kvm_svm.h
index 8e5ee99551f6..ed66e4c078dc 100644
--- a/arch/x86/kvm/kvm_svm.h
+++ b/arch/x86/kvm/kvm_svm.h
@@ -18,7 +18,6 @@ static const u32 host_save_user_msrs[] = {
 };
 
 #define NR_HOST_SAVE_USER_MSRS ARRAY_SIZE(host_save_user_msrs)
-#define NUM_DB_REGS 4
 
 struct kvm_vcpu;
 
@@ -29,18 +28,23 @@ struct vcpu_svm {
         struct svm_cpu_data *svm_data;
         uint64_t asid_generation;
 
-        unsigned long db_regs[NUM_DB_REGS];
-
         u64 next_rip;
 
         u64 host_user_msrs[NR_HOST_SAVE_USER_MSRS];
         u64 host_gs_base;
         unsigned long host_cr2;
-        unsigned long host_db_regs[NUM_DB_REGS];
-        unsigned long host_dr6;
-        unsigned long host_dr7;
 
         u32 *msrpm;
+        struct vmcb *hsave;
+        u64 hsave_msr;
+
+        u64 nested_vmcb;
+
+        /* These are the merged vectors */
+        u32 *nested_msrpm;
+
+        /* gpa pointers to the real vectors */
+        u64 nested_vmcb_msrpm;
 };
 
 #endif
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
index 2d4477c71473..2a36f7f7c4c7 100644
--- a/arch/x86/kvm/mmu.c
+++ b/arch/x86/kvm/mmu.c
@@ -145,11 +145,20 @@ struct kvm_rmap_desc {
         struct kvm_rmap_desc *more;
 };
 
-struct kvm_shadow_walk {
-        int (*entry)(struct kvm_shadow_walk *walk, struct kvm_vcpu *vcpu,
-                     u64 addr, u64 *spte, int level);
+struct kvm_shadow_walk_iterator {
+        u64 addr;
+        hpa_t shadow_addr;
+        int level;
+        u64 *sptep;
+        unsigned index;
 };
 
+#define for_each_shadow_entry(_vcpu, _addr, _walker)    \
+        for (shadow_walk_init(&(_walker), _vcpu, _addr);        \
+             shadow_walk_okay(&(_walker));                      \
+             shadow_walk_next(&(_walker)))
+
+
 struct kvm_unsync_walk {
         int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
 };
@@ -343,7 +352,6 @@ static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
 
         BUG_ON(!mc->nobjs);
         p = mc->objects[--mc->nobjs];
-        memset(p, 0, size);
         return p;
 }
 
@@ -794,10 +802,8 @@ static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
         set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
         list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
         INIT_LIST_HEAD(&sp->oos_link);
-        ASSERT(is_empty_shadow_page(sp->spt));
         bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
         sp->multimapped = 0;
-        sp->global = 1;
         sp->parent_pte = parent_pte;
         --vcpu->kvm->arch.n_free_mmu_pages;
         return sp;
@@ -983,8 +989,8 @@ struct kvm_mmu_pages {
              idx < 512;                                 \
              idx = find_next_bit(bitmap, 512, idx+1))
 
-int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
-                   int idx)
+static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
+                         int idx)
 {
         int i;
 
@@ -1059,7 +1065,7 @@ static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
         index = kvm_page_table_hashfn(gfn);
         bucket = &kvm->arch.mmu_page_hash[index];
         hlist_for_each_entry(sp, node, bucket, hash_link)
-                if (sp->gfn == gfn && !sp->role.metaphysical
+                if (sp->gfn == gfn && !sp->role.direct
                     && !sp->role.invalid) {
                         pgprintk("%s: found role %x\n",
                                  __func__, sp->role.word);
@@ -1115,8 +1121,9 @@ struct mmu_page_path {
                         i < pvec.nr && ({ sp = pvec.page[i].sp; 1;});   \
                         i = mmu_pages_next(&pvec, &parents, i))
 
-int mmu_pages_next(struct kvm_mmu_pages *pvec, struct mmu_page_path *parents,
-                   int i)
+static int mmu_pages_next(struct kvm_mmu_pages *pvec,
+                          struct mmu_page_path *parents,
+                          int i)
 {
         int n;
 
@@ -1135,7 +1142,7 @@ int mmu_pages_next(struct kvm_mmu_pages *pvec, struct mmu_page_path *parents,
         return n;
 }
 
-void mmu_pages_clear_parents(struct mmu_page_path *parents)
+static void mmu_pages_clear_parents(struct mmu_page_path *parents)
 {
         struct kvm_mmu_page *sp;
         unsigned int level = 0;
@@ -1193,7 +1200,7 @@ static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
                                              gfn_t gfn,
                                              gva_t gaddr,
                                              unsigned level,
-                                             int metaphysical,
+                                             int direct,
                                              unsigned access,
                                              u64 *parent_pte)
 {
@@ -1204,10 +1211,9 @@ static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
         struct kvm_mmu_page *sp;
         struct hlist_node *node, *tmp;
 
-        role.word = 0;
-        role.glevels = vcpu->arch.mmu.root_level;
+        role = vcpu->arch.mmu.base_role;
         role.level = level;
-        role.metaphysical = metaphysical;
+        role.direct = direct;
         role.access = access;
         if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
                 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
@@ -1242,8 +1248,9 @@ static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
         pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
         sp->gfn = gfn;
         sp->role = role;
+        sp->global = role.cr4_pge;
         hlist_add_head(&sp->hash_link, bucket);
-        if (!metaphysical) {
+        if (!direct) {
                 if (rmap_write_protect(vcpu->kvm, gfn))
                         kvm_flush_remote_tlbs(vcpu->kvm);
                 account_shadowed(vcpu->kvm, gfn);
@@ -1255,35 +1262,35 @@ static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
         return sp;
 }
 
-static int walk_shadow(struct kvm_shadow_walk *walker,
-                       struct kvm_vcpu *vcpu, u64 addr)
+static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
+                             struct kvm_vcpu *vcpu, u64 addr)
 {
-        hpa_t shadow_addr;
-        int level;
-        int r;
-        u64 *sptep;
-        unsigned index;
-
-        shadow_addr = vcpu->arch.mmu.root_hpa;
-        level = vcpu->arch.mmu.shadow_root_level;
-        if (level == PT32E_ROOT_LEVEL) {
-                shadow_addr = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
-                shadow_addr &= PT64_BASE_ADDR_MASK;
-                if (!shadow_addr)
-                        return 1;
-                --level;
+        iterator->addr = addr;
+        iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
+        iterator->level = vcpu->arch.mmu.shadow_root_level;
+        if (iterator->level == PT32E_ROOT_LEVEL) {
+                iterator->shadow_addr
+                        = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
+                iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
+                --iterator->level;
+                if (!iterator->shadow_addr)
+                        iterator->level = 0;
         }
+}
 
-        while (level >= PT_PAGE_TABLE_LEVEL) {
-                index = SHADOW_PT_INDEX(addr, level);
-                sptep = ((u64 *)__va(shadow_addr)) + index;
-                r = walker->entry(walker, vcpu, addr, sptep, level);
-                if (r)
-                        return r;
-                shadow_addr = *sptep & PT64_BASE_ADDR_MASK;
-                --level;
-        }
-        return 0;
+static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
+{
+        if (iterator->level < PT_PAGE_TABLE_LEVEL)
+                return false;
+        iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
+        iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
+        return true;
+}
+
+static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
+{
+        iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
+        --iterator->level;
 }
 
 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
@@ -1388,7 +1395,7 @@ static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
         kvm_mmu_page_unlink_children(kvm, sp);
         kvm_mmu_unlink_parents(kvm, sp);
         kvm_flush_remote_tlbs(kvm);
-        if (!sp->role.invalid && !sp->role.metaphysical)
+        if (!sp->role.invalid && !sp->role.direct)
                 unaccount_shadowed(kvm, sp->gfn);
         if (sp->unsync)
                 kvm_unlink_unsync_page(kvm, sp);
@@ -1451,7 +1458,7 @@ static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
         index = kvm_page_table_hashfn(gfn);
         bucket = &kvm->arch.mmu_page_hash[index];
         hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
-                if (sp->gfn == gfn && !sp->role.metaphysical) {
+                if (sp->gfn == gfn && !sp->role.direct) {
                         pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
                                  sp->role.word);
                         r = 1;
@@ -1463,11 +1470,20 @@ static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
 
 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
 {
+        unsigned index;
+        struct hlist_head *bucket;
         struct kvm_mmu_page *sp;
+        struct hlist_node *node, *nn;
 
-        while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
-                pgprintk("%s: zap %lx %x\n", __func__, gfn, sp->role.word);
-                kvm_mmu_zap_page(kvm, sp);
+        index = kvm_page_table_hashfn(gfn);
+        bucket = &kvm->arch.mmu_page_hash[index];
+        hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
+                if (sp->gfn == gfn && !sp->role.direct
+                    && !sp->role.invalid) {
+                        pgprintk("%s: zap %lx %x\n",
+                                 __func__, gfn, sp->role.word);
+                        kvm_mmu_zap_page(kvm, sp);
+                }
         }
 }
 
@@ -1622,7 +1638,7 @@ static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
         bucket = &vcpu->kvm->arch.mmu_page_hash[index];
         /* don't unsync if pagetable is shadowed with multiple roles */
         hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
-                if (s->gfn != sp->gfn || s->role.metaphysical)
+                if (s->gfn != sp->gfn || s->role.direct)
                         continue;
                 if (s->role.word != sp->role.word)
                         return 1;
@@ -1669,8 +1685,6 @@ static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
         u64 mt_mask = shadow_mt_mask;
         struct kvm_mmu_page *sp = page_header(__pa(shadow_pte));
 
-        if (!(vcpu->arch.cr4 & X86_CR4_PGE))
-                global = 0;
         if (!global && sp->global) {
                 sp->global = 0;
                 if (sp->unsync) {
@@ -1777,12 +1791,8 @@ static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
                         pgprintk("hfn old %lx new %lx\n",
                                  spte_to_pfn(*shadow_pte), pfn);
                         rmap_remove(vcpu->kvm, shadow_pte);
-                } else {
-                        if (largepage)
-                                was_rmapped = is_large_pte(*shadow_pte);
-                        else
-                                was_rmapped = 1;
-                }
+                } else
+                        was_rmapped = 1;
         }
         if (set_spte(vcpu, shadow_pte, pte_access, user_fault, write_fault,
                       dirty, largepage, global, gfn, pfn, speculative, true)) {
@@ -1820,67 +1830,42 @@ static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
 {
 }
 
-struct direct_shadow_walk {
-        struct kvm_shadow_walk walker;
-        pfn_t pfn;
-        int write;
-        int largepage;
-        int pt_write;
-};
-
-static int direct_map_entry(struct kvm_shadow_walk *_walk,
-                            struct kvm_vcpu *vcpu,
-                            u64 addr, u64 *sptep, int level)
+static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
+                        int largepage, gfn_t gfn, pfn_t pfn)
 {
-        struct direct_shadow_walk *walk =
-                container_of(_walk, struct direct_shadow_walk, walker);
+        struct kvm_shadow_walk_iterator iterator;
         struct kvm_mmu_page *sp;
+        int pt_write = 0;
         gfn_t pseudo_gfn;
-        gfn_t gfn = addr >> PAGE_SHIFT;
-
-        if (level == PT_PAGE_TABLE_LEVEL
-            || (walk->largepage && level == PT_DIRECTORY_LEVEL)) {
-                mmu_set_spte(vcpu, sptep, ACC_ALL, ACC_ALL,
-                             0, walk->write, 1, &walk->pt_write,
-                             walk->largepage, 0, gfn, walk->pfn, false);
-                ++vcpu->stat.pf_fixed;
-                return 1;
-        }
 
-        if (*sptep == shadow_trap_nonpresent_pte) {
-                pseudo_gfn = (addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
-                sp = kvm_mmu_get_page(vcpu, pseudo_gfn, (gva_t)addr, level - 1,
-                                      1, ACC_ALL, sptep);
-                if (!sp) {
-                        pgprintk("nonpaging_map: ENOMEM\n");
-                        kvm_release_pfn_clean(walk->pfn);
-                        return -ENOMEM;
+        for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
+                if (iterator.level == PT_PAGE_TABLE_LEVEL
+                    || (largepage && iterator.level == PT_DIRECTORY_LEVEL)) {
+                        mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
+                                     0, write, 1, &pt_write,
+                                     largepage, 0, gfn, pfn, false);
+                        ++vcpu->stat.pf_fixed;
+                        break;
                 }
 
-                set_shadow_pte(sptep,
-                               __pa(sp->spt)
-                               | PT_PRESENT_MASK | PT_WRITABLE_MASK
-                               | shadow_user_mask | shadow_x_mask);
-        }
-        return 0;
-}
+                if (*iterator.sptep == shadow_trap_nonpresent_pte) {
+                        pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
+                        sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
+                                              iterator.level - 1,
+                                              1, ACC_ALL, iterator.sptep);
+                        if (!sp) {
+                                pgprintk("nonpaging_map: ENOMEM\n");
+                                kvm_release_pfn_clean(pfn);
+                                return -ENOMEM;
+                        }
 
-static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
-                        int largepage, gfn_t gfn, pfn_t pfn)
-{
-        int r;
-        struct direct_shadow_walk walker = {
-                .walker = { .entry = direct_map_entry, },
-                .pfn = pfn,
-                .largepage = largepage,
-                .write = write,
-                .pt_write = 0,
-        };
-
-        r = walk_shadow(&walker.walker, vcpu, gfn << PAGE_SHIFT);
-        if (r < 0)
-                return r;
-        return walker.pt_write;
+                        set_shadow_pte(iterator.sptep,
+                                       __pa(sp->spt)
+                                       | PT_PRESENT_MASK | PT_WRITABLE_MASK
+                                       | shadow_user_mask | shadow_x_mask);
+                }
+        }
+        return pt_write;
 }
 
 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
@@ -1962,7 +1947,7 @@ static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
         int i;
         gfn_t root_gfn;
         struct kvm_mmu_page *sp;
-        int metaphysical = 0;
+        int direct = 0;
 
         root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
 
@@ -1971,18 +1956,18 @@ static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
 
                 ASSERT(!VALID_PAGE(root));
                 if (tdp_enabled)
-                        metaphysical = 1;
+                        direct = 1;
                 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
-                                      PT64_ROOT_LEVEL, metaphysical,
+                                      PT64_ROOT_LEVEL, direct,
                                       ACC_ALL, NULL);
                 root = __pa(sp->spt);
                 ++sp->root_count;
                 vcpu->arch.mmu.root_hpa = root;
                 return;
         }
-        metaphysical = !is_paging(vcpu);
+        direct = !is_paging(vcpu);
         if (tdp_enabled)
-                metaphysical = 1;
+                direct = 1;
         for (i = 0; i < 4; ++i) {
                 hpa_t root = vcpu->arch.mmu.pae_root[i];
 
@@ -1996,7 +1981,7 @@ static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
                 } else if (vcpu->arch.mmu.root_level == 0)
                         root_gfn = 0;
                 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
-                                      PT32_ROOT_LEVEL, metaphysical,
+                                      PT32_ROOT_LEVEL, direct,
                                       ACC_ALL, NULL);
                 root = __pa(sp->spt);
                 ++sp->root_count;
@@ -2251,17 +2236,23 @@ static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
 
 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
 {
+        int r;
+
         ASSERT(vcpu);
         ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
 
         if (!is_paging(vcpu))
-                return nonpaging_init_context(vcpu);
+                r = nonpaging_init_context(vcpu);
         else if (is_long_mode(vcpu))
-                return paging64_init_context(vcpu);
+                r = paging64_init_context(vcpu);
         else if (is_pae(vcpu))
-                return paging32E_init_context(vcpu);
+                r = paging32E_init_context(vcpu);
         else
-                return paging32_init_context(vcpu);
+                r = paging32_init_context(vcpu);
+
+        vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
+
+        return r;
 }
 
 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
@@ -2492,7 +2483,7 @@ void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
         index = kvm_page_table_hashfn(gfn);
         bucket = &vcpu->kvm->arch.mmu_page_hash[index];
         hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
-                if (sp->gfn != gfn || sp->role.metaphysical || sp->role.invalid)
+                if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
                         continue;
                 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
                 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
@@ -3130,7 +3121,7 @@ static void audit_write_protection(struct kvm_vcpu *vcpu)
         gfn_t gfn;
 
         list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
-                if (sp->role.metaphysical)
+                if (sp->role.direct)
                         continue;
 
                 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
diff --git a/arch/x86/kvm/mmu.h b/arch/x86/kvm/mmu.h
index 258e5d56298e..eaab2145f62b 100644
--- a/arch/x86/kvm/mmu.h
+++ b/arch/x86/kvm/mmu.h
@@ -54,7 +54,7 @@ static inline int kvm_mmu_reload(struct kvm_vcpu *vcpu)
 static inline int is_long_mode(struct kvm_vcpu *vcpu)
 {
 #ifdef CONFIG_X86_64
-        return vcpu->arch.shadow_efer & EFER_LME;
+        return vcpu->arch.shadow_efer & EFER_LMA;
 #else
         return 0;
 #endif
diff --git a/arch/x86/kvm/paging_tmpl.h b/arch/x86/kvm/paging_tmpl.h
index 9fd78b6e17ad..6bd70206c561 100644
--- a/arch/x86/kvm/paging_tmpl.h
+++ b/arch/x86/kvm/paging_tmpl.h
@@ -25,7 +25,6 @@
 #if PTTYPE == 64
         #define pt_element_t u64
         #define guest_walker guest_walker64
-        #define shadow_walker shadow_walker64
         #define FNAME(name) paging##64_##name
         #define PT_BASE_ADDR_MASK PT64_BASE_ADDR_MASK
         #define PT_DIR_BASE_ADDR_MASK PT64_DIR_BASE_ADDR_MASK
@@ -42,7 +41,6 @@
 #elif PTTYPE == 32
         #define pt_element_t u32
         #define guest_walker guest_walker32
-        #define shadow_walker shadow_walker32
         #define FNAME(name) paging##32_##name
         #define PT_BASE_ADDR_MASK PT32_BASE_ADDR_MASK
         #define PT_DIR_BASE_ADDR_MASK PT32_DIR_BASE_ADDR_MASK
@@ -73,18 +71,6 @@ struct guest_walker {
         u32 error_code;
 };
 
-struct shadow_walker {
-        struct kvm_shadow_walk walker;
-        struct guest_walker *guest_walker;
-        int user_fault;
-        int write_fault;
-        int largepage;
-        int *ptwrite;
-        pfn_t pfn;
-        u64 *sptep;
-        gpa_t pte_gpa;
-};
-
 static gfn_t gpte_to_gfn(pt_element_t gpte)
 {
         return (gpte & PT_BASE_ADDR_MASK) >> PAGE_SHIFT;
@@ -283,91 +269,79 @@ static void FNAME(update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *page,
 /*
  * Fetch a shadow pte for a specific level in the paging hierarchy.
  */
-static int FNAME(shadow_walk_entry)(struct kvm_shadow_walk *_sw,
-                                    struct kvm_vcpu *vcpu, u64 addr,
-                                    u64 *sptep, int level)
+static u64 *FNAME(fetch)(struct kvm_vcpu *vcpu, gva_t addr,
+                         struct guest_walker *gw,
+                         int user_fault, int write_fault, int largepage,
+                         int *ptwrite, pfn_t pfn)
 {
-        struct shadow_walker *sw =
-                container_of(_sw, struct shadow_walker, walker);
-        struct guest_walker *gw = sw->guest_walker;
         unsigned access = gw->pt_access;
         struct kvm_mmu_page *shadow_page;
-        u64 spte;
-        int metaphysical;
+        u64 spte, *sptep;
+        int direct;
         gfn_t table_gfn;
         int r;
+        int level;
         pt_element_t curr_pte;
+        struct kvm_shadow_walk_iterator iterator;
 
-        if (level == PT_PAGE_TABLE_LEVEL
-            || (sw->largepage && level == PT_DIRECTORY_LEVEL)) {
-                mmu_set_spte(vcpu, sptep, access, gw->pte_access & access,
-                             sw->user_fault, sw->write_fault,
-                             gw->ptes[gw->level-1] & PT_DIRTY_MASK,
-                             sw->ptwrite, sw->largepage,
-                             gw->ptes[gw->level-1] & PT_GLOBAL_MASK,
-                             gw->gfn, sw->pfn, false);
-                sw->sptep = sptep;
-                return 1;
-        }
+        if (!is_present_pte(gw->ptes[gw->level - 1]))
+                return NULL;
 
-        if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep))
-                return 0;
+        for_each_shadow_entry(vcpu, addr, iterator) {
+                level = iterator.level;
+                sptep = iterator.sptep;
+                if (level == PT_PAGE_TABLE_LEVEL
+                    || (largepage && level == PT_DIRECTORY_LEVEL)) {
+                        mmu_set_spte(vcpu, sptep, access,
+                                     gw->pte_access & access,
+                                     user_fault, write_fault,
+                                     gw->ptes[gw->level-1] & PT_DIRTY_MASK,
+                                     ptwrite, largepage,
+                                     gw->ptes[gw->level-1] & PT_GLOBAL_MASK,
+                                     gw->gfn, pfn, false);
+                        break;
+                }
 
-        if (is_large_pte(*sptep)) {
-                set_shadow_pte(sptep, shadow_trap_nonpresent_pte);
-                kvm_flush_remote_tlbs(vcpu->kvm);
-                rmap_remove(vcpu->kvm, sptep);
-        }
+                if (is_shadow_present_pte(*sptep) && !is_large_pte(*sptep))
+                        continue;
 
-        if (level == PT_DIRECTORY_LEVEL && gw->level == PT_DIRECTORY_LEVEL) {
-                metaphysical = 1;
-                if (!is_dirty_pte(gw->ptes[level - 1]))
-                        access &= ~ACC_WRITE_MASK;
-                table_gfn = gpte_to_gfn(gw->ptes[level - 1]);
-        } else {
-                metaphysical = 0;
-                table_gfn = gw->table_gfn[level - 2];
-        }
-        shadow_page = kvm_mmu_get_page(vcpu, table_gfn, (gva_t)addr, level-1,
-                                       metaphysical, access, sptep);
-        if (!metaphysical) {
-                r = kvm_read_guest_atomic(vcpu->kvm, gw->pte_gpa[level - 2],
-                                          &curr_pte, sizeof(curr_pte));
-                if (r || curr_pte != gw->ptes[level - 2]) {
-                        kvm_mmu_put_page(shadow_page, sptep);
-                        kvm_release_pfn_clean(sw->pfn);
-                        sw->sptep = NULL;
-                        return 1;
+                if (is_large_pte(*sptep)) {
+                        rmap_remove(vcpu->kvm, sptep);
+                        set_shadow_pte(sptep, shadow_trap_nonpresent_pte);
+                        kvm_flush_remote_tlbs(vcpu->kvm);
                 }
-        }
 
-        spte = __pa(shadow_page->spt) | PT_PRESENT_MASK | PT_ACCESSED_MASK
-                | PT_WRITABLE_MASK | PT_USER_MASK;
-        *sptep = spte;
-        return 0;
-}
-
-static u64 *FNAME(fetch)(struct kvm_vcpu *vcpu, gva_t addr,
-                         struct guest_walker *guest_walker,
-                         int user_fault, int write_fault, int largepage,
-                         int *ptwrite, pfn_t pfn)
-{
-        struct shadow_walker walker = {
-                .walker = { .entry = FNAME(shadow_walk_entry), },
-                .guest_walker = guest_walker,
-                .user_fault = user_fault,
-                .write_fault = write_fault,
-                .largepage = largepage,
-                .ptwrite = ptwrite,
-                .pfn = pfn,
-        };
-
-        if (!is_present_pte(guest_walker->ptes[guest_walker->level - 1]))
-                return NULL;
+                if (level == PT_DIRECTORY_LEVEL
+                    && gw->level == PT_DIRECTORY_LEVEL) {
+                        direct = 1;
+                        if (!is_dirty_pte(gw->ptes[level - 1]))
+                                access &= ~ACC_WRITE_MASK;
+                        table_gfn = gpte_to_gfn(gw->ptes[level - 1]);
+                } else {
+                        direct = 0;
+                        table_gfn = gw->table_gfn[level - 2];
+                }
+                shadow_page = kvm_mmu_get_page(vcpu, table_gfn, addr, level-1,
+                                               direct, access, sptep);
+                if (!direct) {
+                        r = kvm_read_guest_atomic(vcpu->kvm,
+                                                  gw->pte_gpa[level - 2],
+                                                  &curr_pte, sizeof(curr_pte));
+                        if (r || curr_pte != gw->ptes[level - 2]) {
+                                kvm_mmu_put_page(shadow_page, sptep);
+                                kvm_release_pfn_clean(pfn);
+                                sptep = NULL;
+                                break;
+                        }
+                }
 
-        walk_shadow(&walker.walker, vcpu, addr);
+                spte = __pa(shadow_page->spt)
+                        | PT_PRESENT_MASK | PT_ACCESSED_MASK
+                        | PT_WRITABLE_MASK | PT_USER_MASK;
+                *sptep = spte;
+        }
 
-        return walker.sptep;
+        return sptep;
 }
 
 /*
@@ -465,54 +439,56 @@ out_unlock:
         return 0;
 }
 
-static int FNAME(shadow_invlpg_entry)(struct kvm_shadow_walk *_sw,
-                                      struct kvm_vcpu *vcpu, u64 addr,
-                                      u64 *sptep, int level)
+static void FNAME(invlpg)(struct kvm_vcpu *vcpu, gva_t gva)
 {
-        struct shadow_walker *sw =
-                container_of(_sw, struct shadow_walker, walker);
-
-        /* FIXME: properly handle invlpg on large guest pages */
-        if (level == PT_PAGE_TABLE_LEVEL ||
-            ((level == PT_DIRECTORY_LEVEL) && is_large_pte(*sptep))) {
-                struct kvm_mmu_page *sp = page_header(__pa(sptep));
+        struct kvm_shadow_walk_iterator iterator;
+        pt_element_t gpte;
+        gpa_t pte_gpa = -1;
+        int level;
+        u64 *sptep;
+        int need_flush = 0;
 
-                sw->pte_gpa = (sp->gfn << PAGE_SHIFT);
-                sw->pte_gpa += (sptep - sp->spt) * sizeof(pt_element_t);
+        spin_lock(&vcpu->kvm->mmu_lock);
 
-                if (is_shadow_present_pte(*sptep)) {
-                        rmap_remove(vcpu->kvm, sptep);
-                        if (is_large_pte(*sptep))
-                                --vcpu->kvm->stat.lpages;
+        for_each_shadow_entry(vcpu, gva, iterator) {
+                level = iterator.level;
+                sptep = iterator.sptep;
+
+                /* FIXME: properly handle invlpg on large guest pages */
+                if (level == PT_PAGE_TABLE_LEVEL ||
+                    ((level == PT_DIRECTORY_LEVEL) && is_large_pte(*sptep))) {
+                        struct kvm_mmu_page *sp = page_header(__pa(sptep));
+
+                        pte_gpa = (sp->gfn << PAGE_SHIFT);
+                        pte_gpa += (sptep - sp->spt) * sizeof(pt_element_t);
+
+                        if (is_shadow_present_pte(*sptep)) {
+                                rmap_remove(vcpu->kvm, sptep);
+                                if (is_large_pte(*sptep))
+                                        --vcpu->kvm->stat.lpages;
+                                need_flush = 1;
+                        }
+                        set_shadow_pte(sptep, shadow_trap_nonpresent_pte);
+                        break;
                 }
-                set_shadow_pte(sptep, shadow_trap_nonpresent_pte);
-                return 1;
-        }
-        if (!is_shadow_present_pte(*sptep))
-                return 1;
-        return 0;
-}
 
-static void FNAME(invlpg)(struct kvm_vcpu *vcpu, gva_t gva)
-{
-        pt_element_t gpte;
-        struct shadow_walker walker = {
-                .walker = { .entry = FNAME(shadow_invlpg_entry), },
-                .pte_gpa = -1,
-        };
+                if (!is_shadow_present_pte(*sptep))
+                        break;
+        }
 
-        spin_lock(&vcpu->kvm->mmu_lock);
-        walk_shadow(&walker.walker, vcpu, gva);
+        if (need_flush)
+                kvm_flush_remote_tlbs(vcpu->kvm);
         spin_unlock(&vcpu->kvm->mmu_lock);
-        if (walker.pte_gpa == -1)
+
+        if (pte_gpa == -1)
                 return;
-        if (kvm_read_guest_atomic(vcpu->kvm, walker.pte_gpa, &gpte,
+        if (kvm_read_guest_atomic(vcpu->kvm, pte_gpa, &gpte,
                                   sizeof(pt_element_t)))
                 return;
         if (is_present_pte(gpte) && (gpte & PT_ACCESSED_MASK)) {
                 if (mmu_topup_memory_caches(vcpu))
                         return;
-                kvm_mmu_pte_write(vcpu, walker.pte_gpa, (const u8 *)&gpte,
+                kvm_mmu_pte_write(vcpu, pte_gpa, (const u8 *)&gpte,
                                   sizeof(pt_element_t), 0);
         }
 }
@@ -540,7 +516,7 @@ static void FNAME(prefetch_page)(struct kvm_vcpu *vcpu,
         pt_element_t pt[256 / sizeof(pt_element_t)];
         gpa_t pte_gpa;
 
-        if (sp->role.metaphysical
+        if (sp->role.direct
             || (PTTYPE == 32 && sp->role.level > PT_PAGE_TABLE_LEVEL)) {
                 nonpaging_prefetch_page(vcpu, sp);
                 return;
@@ -619,7 +595,6 @@ static int FNAME(sync_page)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
 
 #undef pt_element_t
 #undef guest_walker
-#undef shadow_walker
 #undef FNAME
 #undef PT_BASE_ADDR_MASK
 #undef PT_INDEX
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index a9e769e4e251..1821c2078199 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -38,9 +38,6 @@ MODULE_LICENSE("GPL");
 #define IOPM_ALLOC_ORDER 2
 #define MSRPM_ALLOC_ORDER 1
 
-#define DR7_GD_MASK (1 << 13)
-#define DR6_BD_MASK (1 << 13)
-
 #define SEG_TYPE_LDT 2
 #define SEG_TYPE_BUSY_TSS16 3
 
@@ -50,6 +47,15 @@ MODULE_LICENSE("GPL");
 
 #define DEBUGCTL_RESERVED_BITS (~(0x3fULL))
 
+/* Turn on to get debugging output*/
+/* #define NESTED_DEBUG */
+
+#ifdef NESTED_DEBUG
+#define nsvm_printk(fmt, args...) printk(KERN_INFO fmt, ## args)
+#else
+#define nsvm_printk(fmt, args...) do {} while(0)
+#endif
+
 /* enable NPT for AMD64 and X86 with PAE */
 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
 static bool npt_enabled = true;
@@ -60,14 +66,29 @@ static int npt = 1;
 
 module_param(npt, int, S_IRUGO);
 
+static int nested = 0;
+module_param(nested, int, S_IRUGO);
+
 static void kvm_reput_irq(struct vcpu_svm *svm);
 static void svm_flush_tlb(struct kvm_vcpu *vcpu);
 
+static int nested_svm_exit_handled(struct vcpu_svm *svm, bool kvm_override);
+static int nested_svm_vmexit(struct vcpu_svm *svm);
+static int nested_svm_vmsave(struct vcpu_svm *svm, void *nested_vmcb,
+                             void *arg2, void *opaque);
+static int nested_svm_check_exception(struct vcpu_svm *svm, unsigned nr,
+                                      bool has_error_code, u32 error_code);
+
 static inline struct vcpu_svm *to_svm(struct kvm_vcpu *vcpu)
 {
         return container_of(vcpu, struct vcpu_svm, vcpu);
 }
 
+static inline bool is_nested(struct vcpu_svm *svm)
+{
+        return svm->nested_vmcb;
+}
+
 static unsigned long iopm_base;
 
 struct kvm_ldttss_desc {
@@ -157,32 +178,6 @@ static inline void kvm_write_cr2(unsigned long val)
         asm volatile ("mov %0, %%cr2" :: "r" (val));
 }
 
-static inline unsigned long read_dr6(void)
-{
-        unsigned long dr6;
-
-        asm volatile ("mov %%dr6, %0" : "=r" (dr6));
-        return dr6;
-}
-
-static inline void write_dr6(unsigned long val)
-{
-        asm volatile ("mov %0, %%dr6" :: "r" (val));
-}
-
-static inline unsigned long read_dr7(void)
-{
-        unsigned long dr7;
-
-        asm volatile ("mov %%dr7, %0" : "=r" (dr7));
-        return dr7;
-}
-
-static inline void write_dr7(unsigned long val)
-{
-        asm volatile ("mov %0, %%dr7" :: "r" (val));
-}
-
 static inline void force_new_asid(struct kvm_vcpu *vcpu)
 {
         to_svm(vcpu)->asid_generation--;
@@ -198,7 +193,7 @@ static void svm_set_efer(struct kvm_vcpu *vcpu, u64 efer)
         if (!npt_enabled && !(efer & EFER_LMA))
                 efer &= ~EFER_LME;
 
-        to_svm(vcpu)->vmcb->save.efer = efer | MSR_EFER_SVME_MASK;
+        to_svm(vcpu)->vmcb->save.efer = efer | EFER_SVME;
         vcpu->arch.shadow_efer = efer;
 }
 
@@ -207,6 +202,11 @@ static void svm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr,
 {
         struct vcpu_svm *svm = to_svm(vcpu);
 
+        /* If we are within a nested VM we'd better #VMEXIT and let the
+           guest handle the exception */
+        if (nested_svm_check_exception(svm, nr, has_error_code, error_code))
+                return;
+
         svm->vmcb->control.event_inj = nr
                 | SVM_EVTINJ_VALID
                 | (has_error_code ? SVM_EVTINJ_VALID_ERR : 0)
@@ -242,7 +242,7 @@ static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
         kvm_rip_write(vcpu, svm->next_rip);
         svm->vmcb->control.int_state &= ~SVM_INTERRUPT_SHADOW_MASK;
 
-        vcpu->arch.interrupt_window_open = 1;
+        vcpu->arch.interrupt_window_open = (svm->vcpu.arch.hflags & HF_GIF_MASK);
 }
 
 static int has_svm(void)
@@ -250,7 +250,7 @@ static int has_svm(void)
         const char *msg;
 
         if (!cpu_has_svm(&msg)) {
-                printk(KERN_INFO "has_svn: %s\n", msg);
+                printk(KERN_INFO "has_svm: %s\n", msg);
                 return 0;
         }
 
@@ -292,7 +292,7 @@ static void svm_hardware_enable(void *garbage)
         svm_data->tss_desc = (struct kvm_ldttss_desc *)(gdt + GDT_ENTRY_TSS);
 
         rdmsrl(MSR_EFER, efer);
-        wrmsrl(MSR_EFER, efer | MSR_EFER_SVME_MASK);
+        wrmsrl(MSR_EFER, efer | EFER_SVME);
 
         wrmsrl(MSR_VM_HSAVE_PA,
                page_to_pfn(svm_data->save_area) << PAGE_SHIFT);
@@ -417,6 +417,14 @@ static __init int svm_hardware_setup(void)
         if (boot_cpu_has(X86_FEATURE_NX))
                 kvm_enable_efer_bits(EFER_NX);
 
+        if (boot_cpu_has(X86_FEATURE_FXSR_OPT))
+                kvm_enable_efer_bits(EFER_FFXSR);
+
+        if (nested) {
+                printk(KERN_INFO "kvm: Nested Virtualization enabled\n");
+                kvm_enable_efer_bits(EFER_SVME);
+        }
+
         for_each_online_cpu(cpu) {
                 r = svm_cpu_init(cpu);
                 if (r)
@@ -559,7 +567,7 @@ static void init_vmcb(struct vcpu_svm *svm)
         init_sys_seg(&save->ldtr, SEG_TYPE_LDT);
         init_sys_seg(&save->tr, SEG_TYPE_BUSY_TSS16);
 
-        save->efer = MSR_EFER_SVME_MASK;
+        save->efer = EFER_SVME;
         save->dr6 = 0xffff0ff0;
         save->dr7 = 0x400;
         save->rflags = 2;
@@ -591,6 +599,9 @@ static void init_vmcb(struct vcpu_svm *svm)
                 save->cr4 = 0;
         }
         force_new_asid(&svm->vcpu);
+
+        svm->nested_vmcb = 0;
+        svm->vcpu.arch.hflags = HF_GIF_MASK;
 }
 
 static int svm_vcpu_reset(struct kvm_vcpu *vcpu)
@@ -615,6 +626,8 @@ static struct kvm_vcpu *svm_create_vcpu(struct kvm *kvm, unsigned int id)
         struct vcpu_svm *svm;
         struct page *page;
         struct page *msrpm_pages;
+        struct page *hsave_page;
+        struct page *nested_msrpm_pages;
         int err;
 
         svm = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
@@ -637,14 +650,25 @@ static struct kvm_vcpu *svm_create_vcpu(struct kvm *kvm, unsigned int id)
         msrpm_pages = alloc_pages(GFP_KERNEL, MSRPM_ALLOC_ORDER);
         if (!msrpm_pages)
                 goto uninit;
+
+        nested_msrpm_pages = alloc_pages(GFP_KERNEL, MSRPM_ALLOC_ORDER);
+        if (!nested_msrpm_pages)
+                goto uninit;
+
         svm->msrpm = page_address(msrpm_pages);
         svm_vcpu_init_msrpm(svm->msrpm);
 
+        hsave_page = alloc_page(GFP_KERNEL);
+        if (!hsave_page)
+                goto uninit;
+        svm->hsave = page_address(hsave_page);
+
+        svm->nested_msrpm = page_address(nested_msrpm_pages);
+
         svm->vmcb = page_address(page);
         clear_page(svm->vmcb);
         svm->vmcb_pa = page_to_pfn(page) << PAGE_SHIFT;
         svm->asid_generation = 0;
-        memset(svm->db_regs, 0, sizeof(svm->db_regs));
         init_vmcb(svm);
 
         fx_init(&svm->vcpu);
@@ -669,6 +693,8 @@ static void svm_free_vcpu(struct kvm_vcpu *vcpu)
 
         __free_page(pfn_to_page(svm->vmcb_pa >> PAGE_SHIFT));
         __free_pages(virt_to_page(svm->msrpm), MSRPM_ALLOC_ORDER);
+        __free_page(virt_to_page(svm->hsave));
+        __free_pages(virt_to_page(svm->nested_msrpm), MSRPM_ALLOC_ORDER);
         kvm_vcpu_uninit(vcpu);
         kmem_cache_free(kvm_vcpu_cache, svm);
 }
@@ -718,6 +744,16 @@ static void svm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
         to_svm(vcpu)->vmcb->save.rflags = rflags;
 }
 
+static void svm_set_vintr(struct vcpu_svm *svm)
+{
+        svm->vmcb->control.intercept |= 1ULL << INTERCEPT_VINTR;
+}
+
+static void svm_clear_vintr(struct vcpu_svm *svm)
+{
+        svm->vmcb->control.intercept &= ~(1ULL << INTERCEPT_VINTR);
+}
+
 static struct vmcb_seg *svm_seg(struct kvm_vcpu *vcpu, int seg)
 {
         struct vmcb_save_area *save = &to_svm(vcpu)->vmcb->save;
@@ -760,20 +796,37 @@ static void svm_get_segment(struct kvm_vcpu *vcpu,
         var->db = (s->attrib >> SVM_SELECTOR_DB_SHIFT) & 1;
         var->g = (s->attrib >> SVM_SELECTOR_G_SHIFT) & 1;
 
-        /*
-         * SVM always stores 0 for the 'G' bit in the CS selector in
-         * the VMCB on a VMEXIT. This hurts cross-vendor migration:
-         * Intel's VMENTRY has a check on the 'G' bit.
-         */
-        if (seg == VCPU_SREG_CS)
+        switch (seg) {
+        case VCPU_SREG_CS:
+                /*
+                 * SVM always stores 0 for the 'G' bit in the CS selector in
+                 * the VMCB on a VMEXIT. This hurts cross-vendor migration:
+                 * Intel's VMENTRY has a check on the 'G' bit.
+                 */
                 var->g = s->limit > 0xfffff;
-
-        /*
-         * Work around a bug where the busy flag in the tr selector
-         * isn't exposed
-         */
-        if (seg == VCPU_SREG_TR)
+                break;
+        case VCPU_SREG_TR:
+                /*
+                 * Work around a bug where the busy flag in the tr selector
+                 * isn't exposed
+                 */
                 var->type |= 0x2;
+                break;
+        case VCPU_SREG_DS:
+        case VCPU_SREG_ES:
+        case VCPU_SREG_FS:
+        case VCPU_SREG_GS:
+                /*
+                 * The accessed bit must always be set in the segment
+                 * descriptor cache, although it can be cleared in the
+                 * descriptor, the cached bit always remains at 1. Since
+                 * Intel has a check on this, set it here to support
+                 * cross-vendor migration.
+                 */
+                if (!var->unusable)
+                        var->type |= 0x1;
+                break;
+        }
 
         var->unusable = !var->present;
 }
@@ -905,9 +958,37 @@ static void svm_set_segment(struct kvm_vcpu *vcpu,
 
 }
 
-static int svm_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
+static int svm_guest_debug(struct kvm_vcpu *vcpu, struct kvm_guest_debug *dbg)
 {
-        return -EOPNOTSUPP;
+        int old_debug = vcpu->guest_debug;
+        struct vcpu_svm *svm = to_svm(vcpu);
+
+        vcpu->guest_debug = dbg->control;
+
+        svm->vmcb->control.intercept_exceptions &=
+                ~((1 << DB_VECTOR) | (1 << BP_VECTOR));
+        if (vcpu->guest_debug & KVM_GUESTDBG_ENABLE) {
+                if (vcpu->guest_debug &
+                    (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP))
+                        svm->vmcb->control.intercept_exceptions |=
+                                1 << DB_VECTOR;
+                if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP)
+                        svm->vmcb->control.intercept_exceptions |=
+                                1 << BP_VECTOR;
+        } else
+                vcpu->guest_debug = 0;
+
+        if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
+                svm->vmcb->save.dr7 = dbg->arch.debugreg[7];
+        else
+                svm->vmcb->save.dr7 = vcpu->arch.dr7;
+
+        if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
+                svm->vmcb->save.rflags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
+        else if (old_debug & KVM_GUESTDBG_SINGLESTEP)
+                svm->vmcb->save.rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
+
+        return 0;
 }
 
 static int svm_get_irq(struct kvm_vcpu *vcpu)
@@ -949,7 +1030,29 @@ static void new_asid(struct vcpu_svm *svm, struct svm_cpu_data *svm_data)
 
 static unsigned long svm_get_dr(struct kvm_vcpu *vcpu, int dr)
 {
-        unsigned long val = to_svm(vcpu)->db_regs[dr];
+        struct vcpu_svm *svm = to_svm(vcpu);
+        unsigned long val;
+
+        switch (dr) {
+        case 0 ... 3:
+                val = vcpu->arch.db[dr];
+                break;
+        case 6:
+                if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
+                        val = vcpu->arch.dr6;
+                else
+                        val = svm->vmcb->save.dr6;
+                break;
+        case 7:
+                if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
+                        val = vcpu->arch.dr7;
+                else
+                        val = svm->vmcb->save.dr7;
+                break;
+        default:
+                val = 0;
+        }
+
         KVMTRACE_2D(DR_READ, vcpu, (u32)dr, (u32)val, handler);
         return val;
 }
@@ -959,33 +1062,40 @@ static void svm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long value,
 {
         struct vcpu_svm *svm = to_svm(vcpu);
 
-        *exception = 0;
+        KVMTRACE_2D(DR_WRITE, vcpu, (u32)dr, (u32)value, handler);
 
-        if (svm->vmcb->save.dr7 & DR7_GD_MASK) {
-                svm->vmcb->save.dr7 &= ~DR7_GD_MASK;
-                svm->vmcb->save.dr6 |= DR6_BD_MASK;
-                *exception = DB_VECTOR;
-                return;
-        }
+        *exception = 0;
 
         switch (dr) {
         case 0 ... 3:
-                svm->db_regs[dr] = value;
+                vcpu->arch.db[dr] = value;
+                if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
+                        vcpu->arch.eff_db[dr] = value;
                 return;
         case 4 ... 5:
-                if (vcpu->arch.cr4 & X86_CR4_DE) {
+                if (vcpu->arch.cr4 & X86_CR4_DE)
                         *exception = UD_VECTOR;
+                return;
+        case 6:
+                if (value & 0xffffffff00000000ULL) {
+                        *exception = GP_VECTOR;
                         return;
                 }
-        case 7: {
-                if (value & ~((1ULL << 32) - 1)) {
+                vcpu->arch.dr6 = (value & DR6_VOLATILE) | DR6_FIXED_1;
+                return;
+        case 7:
+                if (value & 0xffffffff00000000ULL) {
                         *exception = GP_VECTOR;
                         return;
                 }
-                svm->vmcb->save.dr7 = value;
+                vcpu->arch.dr7 = (value & DR7_VOLATILE) | DR7_FIXED_1;
+                if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
+                        svm->vmcb->save.dr7 = vcpu->arch.dr7;
+                        vcpu->arch.switch_db_regs = (value & DR7_BP_EN_MASK);
+                }
                 return;
-        }
         default:
+                /* FIXME: Possible case? */
                 printk(KERN_DEBUG "%s: unexpected dr %u\n",
                        __func__, dr);
                 *exception = UD_VECTOR;
@@ -1031,6 +1141,27 @@ static int pf_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
         return kvm_mmu_page_fault(&svm->vcpu, fault_address, error_code);
 }
 
+static int db_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
+{
+        if (!(svm->vcpu.guest_debug &
+              (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP))) {
+                kvm_queue_exception(&svm->vcpu, DB_VECTOR);
+                return 1;
+        }
+        kvm_run->exit_reason = KVM_EXIT_DEBUG;
+        kvm_run->debug.arch.pc = svm->vmcb->save.cs.base + svm->vmcb->save.rip;
+        kvm_run->debug.arch.exception = DB_VECTOR;
+        return 0;
+}
+
+static int bp_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
+{
+        kvm_run->exit_reason = KVM_EXIT_DEBUG;
+        kvm_run->debug.arch.pc = svm->vmcb->save.cs.base + svm->vmcb->save.rip;
+        kvm_run->debug.arch.exception = BP_VECTOR;
+        return 0;
+}
+
 static int ud_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
 {
         int er;
@@ -1080,7 +1211,7 @@ static int shutdown_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
 static int io_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
 {
         u32 io_info = svm->vmcb->control.exit_info_1; /* address size bug? */
-        int size, down, in, string, rep;
+        int size, in, string;
         unsigned port;
 
         ++svm->vcpu.stat.io_exits;
@@ -1099,8 +1230,6 @@ static int io_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
         in = (io_info & SVM_IOIO_TYPE_MASK) != 0;
         port = io_info >> 16;
         size = (io_info & SVM_IOIO_SIZE_MASK) >> SVM_IOIO_SIZE_SHIFT;
-        rep = (io_info & SVM_IOIO_REP_MASK) != 0;
-        down = (svm->vmcb->save.rflags & X86_EFLAGS_DF) != 0;
 
         skip_emulated_instruction(&svm->vcpu);
         return kvm_emulate_pio(&svm->vcpu, kvm_run, in, size, port);
@@ -1139,6 +1268,567 @@ static int vmmcall_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
         return 1;
 }
 
+static int nested_svm_check_permissions(struct vcpu_svm *svm)
+{
+        if (!(svm->vcpu.arch.shadow_efer & EFER_SVME)
+            || !is_paging(&svm->vcpu)) {
+                kvm_queue_exception(&svm->vcpu, UD_VECTOR);
+                return 1;
+        }
+
+        if (svm->vmcb->save.cpl) {
+                kvm_inject_gp(&svm->vcpu, 0);
+                return 1;
+        }
+
+       return 0;
+}
+
+static int nested_svm_check_exception(struct vcpu_svm *svm, unsigned nr,
+                                      bool has_error_code, u32 error_code)
+{
+        if (is_nested(svm)) {
+                svm->vmcb->control.exit_code = SVM_EXIT_EXCP_BASE + nr;
+                svm->vmcb->control.exit_code_hi = 0;
+                svm->vmcb->control.exit_info_1 = error_code;
+                svm->vmcb->control.exit_info_2 = svm->vcpu.arch.cr2;
+                if (nested_svm_exit_handled(svm, false)) {
+                        nsvm_printk("VMexit -> EXCP 0x%x\n", nr);
+
+                        nested_svm_vmexit(svm);
+                        return 1;
+                }
+        }
+
+        return 0;
+}
+
+static inline int nested_svm_intr(struct vcpu_svm *svm)
+{
+        if (is_nested(svm)) {
+                if (!(svm->vcpu.arch.hflags & HF_VINTR_MASK))
+                        return 0;
+
+                if (!(svm->vcpu.arch.hflags & HF_HIF_MASK))
+                        return 0;
+
+                svm->vmcb->control.exit_code = SVM_EXIT_INTR;
+
+                if (nested_svm_exit_handled(svm, false)) {
+                        nsvm_printk("VMexit -> INTR\n");
+                        nested_svm_vmexit(svm);
+                        return 1;
+                }
+        }
+
+        return 0;
+}
+
+static struct page *nested_svm_get_page(struct vcpu_svm *svm, u64 gpa)
+{
+        struct page *page;
+
+        down_read(&current->mm->mmap_sem);
+        page = gfn_to_page(svm->vcpu.kvm, gpa >> PAGE_SHIFT);
+        up_read(&current->mm->mmap_sem);
+
+        if (is_error_page(page)) {
+                printk(KERN_INFO "%s: could not find page at 0x%llx\n",
+                       __func__, gpa);
+                kvm_release_page_clean(page);
+                kvm_inject_gp(&svm->vcpu, 0);
+                return NULL;
+        }
+        return page;
+}
+
+static int nested_svm_do(struct vcpu_svm *svm,
+                         u64 arg1_gpa, u64 arg2_gpa, void *opaque,
+                         int (*handler)(struct vcpu_svm *svm,
+                                        void *arg1,
+                                        void *arg2,
+                                        void *opaque))
+{
+        struct page *arg1_page;
+        struct page *arg2_page = NULL;
+        void *arg1;
+        void *arg2 = NULL;
+        int retval;
+
+        arg1_page = nested_svm_get_page(svm, arg1_gpa);
+        if(arg1_page == NULL)
+                return 1;
+
+        if (arg2_gpa) {
+                arg2_page = nested_svm_get_page(svm, arg2_gpa);
+                if(arg2_page == NULL) {
+                        kvm_release_page_clean(arg1_page);
+                        return 1;
+                }
+        }
+
+        arg1 = kmap_atomic(arg1_page, KM_USER0);
+        if (arg2_gpa)
+                arg2 = kmap_atomic(arg2_page, KM_USER1);
+
+        retval = handler(svm, arg1, arg2, opaque);
+
+        kunmap_atomic(arg1, KM_USER0);
+        if (arg2_gpa)
+                kunmap_atomic(arg2, KM_USER1);
+
+        kvm_release_page_dirty(arg1_page);
+        if (arg2_gpa)
+                kvm_release_page_dirty(arg2_page);
+
+        return retval;
+}
+
+static int nested_svm_exit_handled_real(struct vcpu_svm *svm,
+                                        void *arg1,
+                                        void *arg2,
+                                        void *opaque)
+{
+        struct vmcb *nested_vmcb = (struct vmcb *)arg1;
+        bool kvm_overrides = *(bool *)opaque;
+        u32 exit_code = svm->vmcb->control.exit_code;
+
+        if (kvm_overrides) {
+                switch (exit_code) {
+                case SVM_EXIT_INTR:
+                case SVM_EXIT_NMI:
+                        return 0;
+                /* For now we are always handling NPFs when using them */
+                case SVM_EXIT_NPF:
+                        if (npt_enabled)
+                                return 0;
+                        break;
+                /* When we're shadowing, trap PFs */
+                case SVM_EXIT_EXCP_BASE + PF_VECTOR:
+                        if (!npt_enabled)
+                                return 0;
+                        break;
+                default:
+                        break;
+                }
+        }
+
+        switch (exit_code) {
+        case SVM_EXIT_READ_CR0 ... SVM_EXIT_READ_CR8: {
+                u32 cr_bits = 1 << (exit_code - SVM_EXIT_READ_CR0);
+                if (nested_vmcb->control.intercept_cr_read & cr_bits)
+                        return 1;
+                break;
+        }
+        case SVM_EXIT_WRITE_CR0 ... SVM_EXIT_WRITE_CR8: {
+                u32 cr_bits = 1 << (exit_code - SVM_EXIT_WRITE_CR0);
+                if (nested_vmcb->control.intercept_cr_write & cr_bits)
+                        return 1;
+                break;
+        }
+        case SVM_EXIT_READ_DR0 ... SVM_EXIT_READ_DR7: {
+                u32 dr_bits = 1 << (exit_code - SVM_EXIT_READ_DR0);
+                if (nested_vmcb->control.intercept_dr_read & dr_bits)
+                        return 1;
+                break;
+        }
+        case SVM_EXIT_WRITE_DR0 ... SVM_EXIT_WRITE_DR7: {
+                u32 dr_bits = 1 << (exit_code - SVM_EXIT_WRITE_DR0);
+                if (nested_vmcb->control.intercept_dr_write & dr_bits)
+                        return 1;
+                break;
+        }
+        case SVM_EXIT_EXCP_BASE ... SVM_EXIT_EXCP_BASE + 0x1f: {
+                u32 excp_bits = 1 << (exit_code - SVM_EXIT_EXCP_BASE);
+                if (nested_vmcb->control.intercept_exceptions & excp_bits)
+                        return 1;
+                break;
+        }
+        default: {
+                u64 exit_bits = 1ULL << (exit_code - SVM_EXIT_INTR);
+                nsvm_printk("exit code: 0x%x\n", exit_code);
+                if (nested_vmcb->control.intercept & exit_bits)
+                        return 1;
+        }
+        }
+
+        return 0;
+}
+
+static int nested_svm_exit_handled_msr(struct vcpu_svm *svm,
+                                       void *arg1, void *arg2,
+                                       void *opaque)
+{
+        struct vmcb *nested_vmcb = (struct vmcb *)arg1;
+        u8 *msrpm = (u8 *)arg2;
+        u32 t0, t1;
+        u32 msr = svm->vcpu.arch.regs[VCPU_REGS_RCX];
+        u32 param = svm->vmcb->control.exit_info_1 & 1;
+
+        if (!(nested_vmcb->control.intercept & (1ULL << INTERCEPT_MSR_PROT)))
+                return 0;
+
+        switch(msr) {
+        case 0 ... 0x1fff:
+                t0 = (msr * 2) % 8;
+                t1 = msr / 8;
+                break;
+        case 0xc0000000 ... 0xc0001fff:
+                t0 = (8192 + msr - 0xc0000000) * 2;
+                t1 = (t0 / 8);
+                t0 %= 8;
+                break;
+        case 0xc0010000 ... 0xc0011fff:
+                t0 = (16384 + msr - 0xc0010000) * 2;
+                t1 = (t0 / 8);
+                t0 %= 8;
+                break;
+        default:
+                return 1;
+                break;
+        }
+        if (msrpm[t1] & ((1 << param) << t0))
+                return 1;
+
+        return 0;
+}
+
+static int nested_svm_exit_handled(struct vcpu_svm *svm, bool kvm_override)
+{
+        bool k = kvm_override;
+
+        switch (svm->vmcb->control.exit_code) {
+        case SVM_EXIT_MSR:
+                return nested_svm_do(svm, svm->nested_vmcb,
+                                     svm->nested_vmcb_msrpm, NULL,
+                                     nested_svm_exit_handled_msr);
+        default: break;
+        }
+
+        return nested_svm_do(svm, svm->nested_vmcb, 0, &k,
+                             nested_svm_exit_handled_real);
+}
+
+static int nested_svm_vmexit_real(struct vcpu_svm *svm, void *arg1,
+                                  void *arg2, void *opaque)
+{
+        struct vmcb *nested_vmcb = (struct vmcb *)arg1;
+        struct vmcb *hsave = svm->hsave;
+        u64 nested_save[] = { nested_vmcb->save.cr0,
+                              nested_vmcb->save.cr3,
+                              nested_vmcb->save.cr4,
+                              nested_vmcb->save.efer,
+                              nested_vmcb->control.intercept_cr_read,
+                              nested_vmcb->control.intercept_cr_write,
+                              nested_vmcb->control.intercept_dr_read,
+                              nested_vmcb->control.intercept_dr_write,
+                              nested_vmcb->control.intercept_exceptions,
+                              nested_vmcb->control.intercept,
+                              nested_vmcb->control.msrpm_base_pa,
+                              nested_vmcb->control.iopm_base_pa,
+                              nested_vmcb->control.tsc_offset };
+
+        /* Give the current vmcb to the guest */
+        memcpy(nested_vmcb, svm->vmcb, sizeof(struct vmcb));
+        nested_vmcb->save.cr0 = nested_save[0];
+        if (!npt_enabled)
+                nested_vmcb->save.cr3 = nested_save[1];
+        nested_vmcb->save.cr4 = nested_save[2];
+        nested_vmcb->save.efer = nested_save[3];
+        nested_vmcb->control.intercept_cr_read = nested_save[4];
+        nested_vmcb->control.intercept_cr_write = nested_save[5];
+        nested_vmcb->control.intercept_dr_read = nested_save[6];
+        nested_vmcb->control.intercept_dr_write = nested_save[7];
+        nested_vmcb->control.intercept_exceptions = nested_save[8];
+        nested_vmcb->control.intercept = nested_save[9];
+        nested_vmcb->control.msrpm_base_pa = nested_save[10];
+        nested_vmcb->control.iopm_base_pa = nested_save[11];
+        nested_vmcb->control.tsc_offset = nested_save[12];
+
+        /* We always set V_INTR_MASKING and remember the old value in hflags */
+        if (!(svm->vcpu.arch.hflags & HF_VINTR_MASK))
+                nested_vmcb->control.int_ctl &= ~V_INTR_MASKING_MASK;
+
+        if ((nested_vmcb->control.int_ctl & V_IRQ_MASK) &&
+            (nested_vmcb->control.int_vector)) {
+                nsvm_printk("WARNING: IRQ 0x%x still enabled on #VMEXIT\n",
+                                nested_vmcb->control.int_vector);
+        }
+
+        /* Restore the original control entries */
+        svm->vmcb->control = hsave->control;
+
+        /* Kill any pending exceptions */
+        if (svm->vcpu.arch.exception.pending == true)
+                nsvm_printk("WARNING: Pending Exception\n");
+        svm->vcpu.arch.exception.pending = false;
+
+        /* Restore selected save entries */
+        svm->vmcb->save.es = hsave->save.es;
+        svm->vmcb->save.cs = hsave->save.cs;
+        svm->vmcb->save.ss = hsave->save.ss;
+        svm->vmcb->save.ds = hsave->save.ds;
+        svm->vmcb->save.gdtr = hsave->save.gdtr;
+        svm->vmcb->save.idtr = hsave->save.idtr;
+        svm->vmcb->save.rflags = hsave->save.rflags;
+        svm_set_efer(&svm->vcpu, hsave->save.efer);
+        svm_set_cr0(&svm->vcpu, hsave->save.cr0 | X86_CR0_PE);
+        svm_set_cr4(&svm->vcpu, hsave->save.cr4);
+        if (npt_enabled) {
+                svm->vmcb->save.cr3 = hsave->save.cr3;
+                svm->vcpu.arch.cr3 = hsave->save.cr3;
+        } else {
+                kvm_set_cr3(&svm->vcpu, hsave->save.cr3);
+        }
+        kvm_register_write(&svm->vcpu, VCPU_REGS_RAX, hsave->save.rax);
+        kvm_register_write(&svm->vcpu, VCPU_REGS_RSP, hsave->save.rsp);
+        kvm_register_write(&svm->vcpu, VCPU_REGS_RIP, hsave->save.rip);
+        svm->vmcb->save.dr7 = 0;
+        svm->vmcb->save.cpl = 0;
+        svm->vmcb->control.exit_int_info = 0;
+
+        svm->vcpu.arch.hflags &= ~HF_GIF_MASK;
+        /* Exit nested SVM mode */
+        svm->nested_vmcb = 0;
+
+        return 0;
+}
+
+static int nested_svm_vmexit(struct vcpu_svm *svm)
+{
+        nsvm_printk("VMexit\n");
+        if (nested_svm_do(svm, svm->nested_vmcb, 0,
+                          NULL, nested_svm_vmexit_real))
+                return 1;
+
+        kvm_mmu_reset_context(&svm->vcpu);
+        kvm_mmu_load(&svm->vcpu);
+
+        return 0;
+}
+
+static int nested_svm_vmrun_msrpm(struct vcpu_svm *svm, void *arg1,
+                                  void *arg2, void *opaque)
+{
+        int i;
+        u32 *nested_msrpm = (u32*)arg1;
+        for (i=0; i< PAGE_SIZE * (1 << MSRPM_ALLOC_ORDER) / 4; i++)
+                svm->nested_msrpm[i] = svm->msrpm[i] | nested_msrpm[i];
+        svm->vmcb->control.msrpm_base_pa = __pa(svm->nested_msrpm);
+
+        return 0;
+}
+
+static int nested_svm_vmrun(struct vcpu_svm *svm, void *arg1,
+                            void *arg2, void *opaque)
+{
+        struct vmcb *nested_vmcb = (struct vmcb *)arg1;
+        struct vmcb *hsave = svm->hsave;
+
+        /* nested_vmcb is our indicator if nested SVM is activated */
+        svm->nested_vmcb = svm->vmcb->save.rax;
+
+        /* Clear internal status */
+        svm->vcpu.arch.exception.pending = false;
+
+        /* Save the old vmcb, so we don't need to pick what we save, but
+           can restore everything when a VMEXIT occurs */
+        memcpy(hsave, svm->vmcb, sizeof(struct vmcb));
+        /* We need to remember the original CR3 in the SPT case */
+        if (!npt_enabled)
+                hsave->save.cr3 = svm->vcpu.arch.cr3;
+        hsave->save.cr4 = svm->vcpu.arch.cr4;
+        hsave->save.rip = svm->next_rip;
+
+        if (svm->vmcb->save.rflags & X86_EFLAGS_IF)
+                svm->vcpu.arch.hflags |= HF_HIF_MASK;
+        else
+                svm->vcpu.arch.hflags &= ~HF_HIF_MASK;
+
+        /* Load the nested guest state */
+        svm->vmcb->save.es = nested_vmcb->save.es;
+        svm->vmcb->save.cs = nested_vmcb->save.cs;
+        svm->vmcb->save.ss = nested_vmcb->save.ss;
+        svm->vmcb->save.ds = nested_vmcb->save.ds;
+        svm->vmcb->save.gdtr = nested_vmcb->save.gdtr;
+        svm->vmcb->save.idtr = nested_vmcb->save.idtr;
+        svm->vmcb->save.rflags = nested_vmcb->save.rflags;
+        svm_set_efer(&svm->vcpu, nested_vmcb->save.efer);
+        svm_set_cr0(&svm->vcpu, nested_vmcb->save.cr0);
+        svm_set_cr4(&svm->vcpu, nested_vmcb->save.cr4);
+        if (npt_enabled) {
+                svm->vmcb->save.cr3 = nested_vmcb->save.cr3;
+                svm->vcpu.arch.cr3 = nested_vmcb->save.cr3;
+        } else {
+                kvm_set_cr3(&svm->vcpu, nested_vmcb->save.cr3);
+                kvm_mmu_reset_context(&svm->vcpu);
+        }
+        svm->vmcb->save.cr2 = nested_vmcb->save.cr2;
+        kvm_register_write(&svm->vcpu, VCPU_REGS_RAX, nested_vmcb->save.rax);
+        kvm_register_write(&svm->vcpu, VCPU_REGS_RSP, nested_vmcb->save.rsp);
+        kvm_register_write(&svm->vcpu, VCPU_REGS_RIP, nested_vmcb->save.rip);
+        /* In case we don't even reach vcpu_run, the fields are not updated */
+        svm->vmcb->save.rax = nested_vmcb->save.rax;
+        svm->vmcb->save.rsp = nested_vmcb->save.rsp;
+        svm->vmcb->save.rip = nested_vmcb->save.rip;
+        svm->vmcb->save.dr7 = nested_vmcb->save.dr7;
+        svm->vmcb->save.dr6 = nested_vmcb->save.dr6;
+        svm->vmcb->save.cpl = nested_vmcb->save.cpl;
+
+        /* We don't want a nested guest to be more powerful than the guest,
+           so all intercepts are ORed */
+        svm->vmcb->control.intercept_cr_read |=
+                nested_vmcb->control.intercept_cr_read;
+        svm->vmcb->control.intercept_cr_write |=
+                nested_vmcb->control.intercept_cr_write;
+        svm->vmcb->control.intercept_dr_read |=
+                nested_vmcb->control.intercept_dr_read;
+        svm->vmcb->control.intercept_dr_write |=
+                nested_vmcb->control.intercept_dr_write;
+        svm->vmcb->control.intercept_exceptions |=
+                nested_vmcb->control.intercept_exceptions;
+
+        svm->vmcb->control.intercept |= nested_vmcb->control.intercept;
+
+        svm->nested_vmcb_msrpm = nested_vmcb->control.msrpm_base_pa;
+
+        force_new_asid(&svm->vcpu);
+        svm->vmcb->control.exit_int_info = nested_vmcb->control.exit_int_info;
+        svm->vmcb->control.exit_int_info_err = nested_vmcb->control.exit_int_info_err;
+        svm->vmcb->control.int_ctl = nested_vmcb->control.int_ctl | V_INTR_MASKING_MASK;
+        if (nested_vmcb->control.int_ctl & V_IRQ_MASK) {
+                nsvm_printk("nSVM Injecting Interrupt: 0x%x\n",
+                                nested_vmcb->control.int_ctl);
+        }
+        if (nested_vmcb->control.int_ctl & V_INTR_MASKING_MASK)
+                svm->vcpu.arch.hflags |= HF_VINTR_MASK;
+        else
+                svm->vcpu.arch.hflags &= ~HF_VINTR_MASK;
+
+        nsvm_printk("nSVM exit_int_info: 0x%x | int_state: 0x%x\n",
+                        nested_vmcb->control.exit_int_info,
+                        nested_vmcb->control.int_state);
+
+        svm->vmcb->control.int_vector = nested_vmcb->control.int_vector;
+        svm->vmcb->control.int_state = nested_vmcb->control.int_state;
+        svm->vmcb->control.tsc_offset += nested_vmcb->control.tsc_offset;
+        if (nested_vmcb->control.event_inj & SVM_EVTINJ_VALID)
+                nsvm_printk("Injecting Event: 0x%x\n",
+                                nested_vmcb->control.event_inj);
+        svm->vmcb->control.event_inj = nested_vmcb->control.event_inj;
+        svm->vmcb->control.event_inj_err = nested_vmcb->control.event_inj_err;
+
+        svm->vcpu.arch.hflags |= HF_GIF_MASK;
+
+        return 0;
+}
+
+static int nested_svm_vmloadsave(struct vmcb *from_vmcb, struct vmcb *to_vmcb)
+{
+        to_vmcb->save.fs = from_vmcb->save.fs;
+        to_vmcb->save.gs = from_vmcb->save.gs;
+        to_vmcb->save.tr = from_vmcb->save.tr;
+        to_vmcb->save.ldtr = from_vmcb->save.ldtr;
+        to_vmcb->save.kernel_gs_base = from_vmcb->save.kernel_gs_base;
+        to_vmcb->save.star = from_vmcb->save.star;
+        to_vmcb->save.lstar = from_vmcb->save.lstar;
+        to_vmcb->save.cstar = from_vmcb->save.cstar;
+        to_vmcb->save.sfmask = from_vmcb->save.sfmask;
+        to_vmcb->save.sysenter_cs = from_vmcb->save.sysenter_cs;
+        to_vmcb->save.sysenter_esp = from_vmcb->save.sysenter_esp;
+        to_vmcb->save.sysenter_eip = from_vmcb->save.sysenter_eip;
+
+        return 1;
+}
+
+static int nested_svm_vmload(struct vcpu_svm *svm, void *nested_vmcb,
+                             void *arg2, void *opaque)
+{
+        return nested_svm_vmloadsave((struct vmcb *)nested_vmcb, svm->vmcb);
+}
+
+static int nested_svm_vmsave(struct vcpu_svm *svm, void *nested_vmcb,
+                             void *arg2, void *opaque)
+{
+        return nested_svm_vmloadsave(svm->vmcb, (struct vmcb *)nested_vmcb);
+}
+
+static int vmload_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
+{
+        if (nested_svm_check_permissions(svm))
+                return 1;
+
+        svm->next_rip = kvm_rip_read(&svm->vcpu) + 3;
+        skip_emulated_instruction(&svm->vcpu);
+
+        nested_svm_do(svm, svm->vmcb->save.rax, 0, NULL, nested_svm_vmload);
+
+        return 1;
+}
+
+static int vmsave_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
+{
+        if (nested_svm_check_permissions(svm))
+                return 1;
+
+        svm->next_rip = kvm_rip_read(&svm->vcpu) + 3;
+        skip_emulated_instruction(&svm->vcpu);
+
+        nested_svm_do(svm, svm->vmcb->save.rax, 0, NULL, nested_svm_vmsave);
+
+        return 1;
+}
+
+static int vmrun_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
+{
+        nsvm_printk("VMrun\n");
+        if (nested_svm_check_permissions(svm))
+                return 1;
+
+        svm->next_rip = kvm_rip_read(&svm->vcpu) + 3;
+        skip_emulated_instruction(&svm->vcpu);
+
+        if (nested_svm_do(svm, svm->vmcb->save.rax, 0,
+                          NULL, nested_svm_vmrun))
+                return 1;
+
+        if (nested_svm_do(svm, svm->nested_vmcb_msrpm, 0,
+                      NULL, nested_svm_vmrun_msrpm))
+                return 1;
+
+        return 1;
+}
+
+static int stgi_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
+{
+        if (nested_svm_check_permissions(svm))
+                return 1;
+
+        svm->next_rip = kvm_rip_read(&svm->vcpu) + 3;
+        skip_emulated_instruction(&svm->vcpu);
+
+        svm->vcpu.arch.hflags |= HF_GIF_MASK;
+
+        return 1;
+}
+
+static int clgi_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
+{
+        if (nested_svm_check_permissions(svm))
+                return 1;
+
+        svm->next_rip = kvm_rip_read(&svm->vcpu) + 3;
+        skip_emulated_instruction(&svm->vcpu);
+
+        svm->vcpu.arch.hflags &= ~HF_GIF_MASK;
+
+        /* After a CLGI no interrupts should come */
+        svm_clear_vintr(svm);
+        svm->vmcb->control.int_ctl &= ~V_IRQ_MASK;
+
+        return 1;
+}
+
 static int invalid_op_interception(struct vcpu_svm *svm,
                                    struct kvm_run *kvm_run)
 {
@@ -1250,6 +1940,15 @@ static int svm_get_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 *data)
         case MSR_IA32_LASTINTTOIP:
                 *data = svm->vmcb->save.last_excp_to;
                 break;
+        case MSR_VM_HSAVE_PA:
+                *data = svm->hsave_msr;
+                break;
+        case MSR_VM_CR:
+                *data = 0;
+                break;
+        case MSR_IA32_UCODE_REV:
+                *data = 0x01000065;
+                break;
         default:
                 return kvm_get_msr_common(vcpu, ecx, data);
         }
@@ -1344,6 +2043,9 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, unsigned ecx, u64 data)
                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: 0x%x data 0x%llx\n", ecx, data);
 
                 break;
+        case MSR_VM_HSAVE_PA:
+                svm->hsave_msr = data;
+                break;
         default:
                 return kvm_set_msr_common(vcpu, ecx, data);
         }
@@ -1380,7 +2082,7 @@ static int interrupt_window_interception(struct vcpu_svm *svm,
 {
         KVMTRACE_0D(PEND_INTR, &svm->vcpu, handler);
 
-        svm->vmcb->control.intercept &= ~(1ULL << INTERCEPT_VINTR);
+        svm_clear_vintr(svm);
         svm->vmcb->control.int_ctl &= ~V_IRQ_MASK;
         /*
          * If the user space waits to inject interrupts, exit as soon as
@@ -1417,6 +2119,8 @@ static int (*svm_exit_handlers[])(struct vcpu_svm *svm,
         [SVM_EXIT_WRITE_DR3]                    = emulate_on_interception,
         [SVM_EXIT_WRITE_DR5]                    = emulate_on_interception,
         [SVM_EXIT_WRITE_DR7]                    = emulate_on_interception,
+        [SVM_EXIT_EXCP_BASE + DB_VECTOR]        = db_interception,
+        [SVM_EXIT_EXCP_BASE + BP_VECTOR]        = bp_interception,
         [SVM_EXIT_EXCP_BASE + UD_VECTOR]        = ud_interception,
         [SVM_EXIT_EXCP_BASE + PF_VECTOR]        = pf_interception,
         [SVM_EXIT_EXCP_BASE + NM_VECTOR]        = nm_interception,
@@ -1436,12 +2140,12 @@ static int (*svm_exit_handlers[])(struct vcpu_svm *svm,
         [SVM_EXIT_MSR]                          = msr_interception,
         [SVM_EXIT_TASK_SWITCH]                  = task_switch_interception,
         [SVM_EXIT_SHUTDOWN]                     = shutdown_interception,
-        [SVM_EXIT_VMRUN]                        = invalid_op_interception,
+        [SVM_EXIT_VMRUN]                        = vmrun_interception,
         [SVM_EXIT_VMMCALL]                      = vmmcall_interception,
-        [SVM_EXIT_VMLOAD]                       = invalid_op_interception,
-        [SVM_EXIT_VMSAVE]                       = invalid_op_interception,
-        [SVM_EXIT_STGI]                         = invalid_op_interception,
-        [SVM_EXIT_CLGI]                         = invalid_op_interception,
+        [SVM_EXIT_VMLOAD]                       = vmload_interception,
+        [SVM_EXIT_VMSAVE]                       = vmsave_interception,
+        [SVM_EXIT_STGI]                         = stgi_interception,
+        [SVM_EXIT_CLGI]                         = clgi_interception,
         [SVM_EXIT_SKINIT]                       = invalid_op_interception,
         [SVM_EXIT_WBINVD]                       = emulate_on_interception,
         [SVM_EXIT_MONITOR]                      = invalid_op_interception,
@@ -1457,6 +2161,17 @@ static int handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
         KVMTRACE_3D(VMEXIT, vcpu, exit_code, (u32)svm->vmcb->save.rip,
                     (u32)((u64)svm->vmcb->save.rip >> 32), entryexit);
 
+        if (is_nested(svm)) {
+                nsvm_printk("nested handle_exit: 0x%x | 0x%lx | 0x%lx | 0x%lx\n",
+                            exit_code, svm->vmcb->control.exit_info_1,
+                            svm->vmcb->control.exit_info_2, svm->vmcb->save.rip);
+                if (nested_svm_exit_handled(svm, true)) {
+                        nested_svm_vmexit(svm);
+                        nsvm_printk("-> #VMEXIT\n");
+                        return 1;
+                }
+        }
+
         if (npt_enabled) {
                 int mmu_reload = 0;
                 if ((vcpu->arch.cr0 ^ svm->vmcb->save.cr0) & X86_CR0_PG) {
@@ -1544,6 +2259,8 @@ static void svm_set_irq(struct kvm_vcpu *vcpu, int irq)
 {
         struct vcpu_svm *svm = to_svm(vcpu);
 
+        nested_svm_intr(svm);
+
         svm_inject_irq(svm, irq);
 }
 
@@ -1589,11 +2306,17 @@ static void svm_intr_assist(struct kvm_vcpu *vcpu)
         if (!kvm_cpu_has_interrupt(vcpu))
                 goto out;
 
+        if (nested_svm_intr(svm))
+                goto out;
+
+        if (!(svm->vcpu.arch.hflags & HF_GIF_MASK))
+                goto out;
+
         if (!(vmcb->save.rflags & X86_EFLAGS_IF) ||
             (vmcb->control.int_state & SVM_INTERRUPT_SHADOW_MASK) ||
             (vmcb->control.event_inj & SVM_EVTINJ_VALID)) {
                 /* unable to deliver irq, set pending irq */
-                vmcb->control.intercept |= (1ULL << INTERCEPT_VINTR);
+                svm_set_vintr(svm);
                 svm_inject_irq(svm, 0x0);
                 goto out;
         }
@@ -1615,7 +2338,8 @@ static void kvm_reput_irq(struct vcpu_svm *svm)
         }
 
         svm->vcpu.arch.interrupt_window_open =
-                !(control->int_state & SVM_INTERRUPT_SHADOW_MASK);
+                !(control->int_state & SVM_INTERRUPT_SHADOW_MASK) &&
+                 (svm->vcpu.arch.hflags & HF_GIF_MASK);
 }
 
 static void svm_do_inject_vector(struct vcpu_svm *svm)
@@ -1637,9 +2361,13 @@ static void do_interrupt_requests(struct kvm_vcpu *vcpu,
         struct vcpu_svm *svm = to_svm(vcpu);
         struct vmcb_control_area *control = &svm->vmcb->control;
 
+        if (nested_svm_intr(svm))
+                return;
+
         svm->vcpu.arch.interrupt_window_open =
                 (!(control->int_state & SVM_INTERRUPT_SHADOW_MASK) &&
-                 (svm->vmcb->save.rflags & X86_EFLAGS_IF));
+                 (svm->vmcb->save.rflags & X86_EFLAGS_IF) &&
+                 (svm->vcpu.arch.hflags & HF_GIF_MASK));
 
         if (svm->vcpu.arch.interrupt_window_open && svm->vcpu.arch.irq_summary)
                 /*
@@ -1652,9 +2380,9 @@ static void do_interrupt_requests(struct kvm_vcpu *vcpu,
          */
         if (!svm->vcpu.arch.interrupt_window_open &&
             (svm->vcpu.arch.irq_summary || kvm_run->request_interrupt_window))
-                control->intercept |= 1ULL << INTERCEPT_VINTR;
-         else
-                control->intercept &= ~(1ULL << INTERCEPT_VINTR);
+                svm_set_vintr(svm);
+        else
+                svm_clear_vintr(svm);
 }
 
 static int svm_set_tss_addr(struct kvm *kvm, unsigned int addr)
@@ -1662,22 +2390,6 @@ static int svm_set_tss_addr(struct kvm *kvm, unsigned int addr)
         return 0;
 }
 
-static void save_db_regs(unsigned long *db_regs)
-{
-        asm volatile ("mov %%dr0, %0" : "=r"(db_regs[0]));
-        asm volatile ("mov %%dr1, %0" : "=r"(db_regs[1]));
-        asm volatile ("mov %%dr2, %0" : "=r"(db_regs[2]));
-        asm volatile ("mov %%dr3, %0" : "=r"(db_regs[3]));
-}
-
-static void load_db_regs(unsigned long *db_regs)
-{
-        asm volatile ("mov %0, %%dr0" : : "r"(db_regs[0]));
-        asm volatile ("mov %0, %%dr1" : : "r"(db_regs[1]));
-        asm volatile ("mov %0, %%dr2" : : "r"(db_regs[2]));
-        asm volatile ("mov %0, %%dr3" : : "r"(db_regs[3]));
-}
-
 static void svm_flush_tlb(struct kvm_vcpu *vcpu)
 {
         force_new_asid(vcpu);
@@ -1736,19 +2448,12 @@ static void svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
         gs_selector = kvm_read_gs();
         ldt_selector = kvm_read_ldt();
         svm->host_cr2 = kvm_read_cr2();
-        svm->host_dr6 = read_dr6();
-        svm->host_dr7 = read_dr7();
-        svm->vmcb->save.cr2 = vcpu->arch.cr2;
+        if (!is_nested(svm))
+                svm->vmcb->save.cr2 = vcpu->arch.cr2;
         /* required for live migration with NPT */
         if (npt_enabled)
                 svm->vmcb->save.cr3 = vcpu->arch.cr3;
 
-        if (svm->vmcb->save.dr7 & 0xff) {
-                write_dr7(0);
-                save_db_regs(svm->host_db_regs);
-                load_db_regs(svm->db_regs);
-        }
-
         clgi();
 
         local_irq_enable();
@@ -1824,16 +2529,11 @@ static void svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 #endif
                 );
 
-        if ((svm->vmcb->save.dr7 & 0xff))
-                load_db_regs(svm->host_db_regs);
-
         vcpu->arch.cr2 = svm->vmcb->save.cr2;
         vcpu->arch.regs[VCPU_REGS_RAX] = svm->vmcb->save.rax;
         vcpu->arch.regs[VCPU_REGS_RSP] = svm->vmcb->save.rsp;
         vcpu->arch.regs[VCPU_REGS_RIP] = svm->vmcb->save.rip;
 
-        write_dr6(svm->host_dr6);
-        write_dr7(svm->host_dr7);
         kvm_write_cr2(svm->host_cr2);
 
         kvm_load_fs(fs_selector);
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 7611af576829..bb481330716f 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -91,6 +91,7 @@ struct vcpu_vmx {
         } rmode;
         int vpid;
         bool emulation_required;
+        enum emulation_result invalid_state_emulation_result;
 
         /* Support for vnmi-less CPUs */
         int soft_vnmi_blocked;
@@ -189,21 +190,21 @@ static inline int is_page_fault(u32 intr_info)
 {
         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
                              INTR_INFO_VALID_MASK)) ==
-                (INTR_TYPE_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK);
+                (INTR_TYPE_HARD_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK);
 }
 
 static inline int is_no_device(u32 intr_info)
 {
         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
                              INTR_INFO_VALID_MASK)) ==
-                (INTR_TYPE_EXCEPTION | NM_VECTOR | INTR_INFO_VALID_MASK);
+                (INTR_TYPE_HARD_EXCEPTION | NM_VECTOR | INTR_INFO_VALID_MASK);
 }
 
 static inline int is_invalid_opcode(u32 intr_info)
 {
         return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
                              INTR_INFO_VALID_MASK)) ==
-                (INTR_TYPE_EXCEPTION | UD_VECTOR | INTR_INFO_VALID_MASK);
+                (INTR_TYPE_HARD_EXCEPTION | UD_VECTOR | INTR_INFO_VALID_MASK);
 }
 
 static inline int is_external_interrupt(u32 intr_info)
@@ -480,8 +481,13 @@ static void update_exception_bitmap(struct kvm_vcpu *vcpu)
         eb = (1u << PF_VECTOR) | (1u << UD_VECTOR);
         if (!vcpu->fpu_active)
                 eb |= 1u << NM_VECTOR;
-        if (vcpu->guest_debug.enabled)
-                eb |= 1u << DB_VECTOR;
+        if (vcpu->guest_debug & KVM_GUESTDBG_ENABLE) {
+                if (vcpu->guest_debug &
+                    (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP))
+                        eb |= 1u << DB_VECTOR;
+                if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP)
+                        eb |= 1u << BP_VECTOR;
+        }
         if (vcpu->arch.rmode.active)
                 eb = ~0;
         if (vm_need_ept())
@@ -747,29 +753,33 @@ static void vmx_queue_exception(struct kvm_vcpu *vcpu, unsigned nr,
                                 bool has_error_code, u32 error_code)
 {
         struct vcpu_vmx *vmx = to_vmx(vcpu);
+        u32 intr_info = nr | INTR_INFO_VALID_MASK;
 
-        if (has_error_code)
+        if (has_error_code) {
                 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
+                intr_info |= INTR_INFO_DELIVER_CODE_MASK;
+        }
 
         if (vcpu->arch.rmode.active) {
                 vmx->rmode.irq.pending = true;
                 vmx->rmode.irq.vector = nr;
                 vmx->rmode.irq.rip = kvm_rip_read(vcpu);
-                if (nr == BP_VECTOR)
+                if (nr == BP_VECTOR || nr == OF_VECTOR)
                         vmx->rmode.irq.rip++;
-                vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
-                             nr | INTR_TYPE_SOFT_INTR
-                             | (has_error_code ? INTR_INFO_DELIVER_CODE_MASK : 0)
-                             | INTR_INFO_VALID_MASK);
+                intr_info |= INTR_TYPE_SOFT_INTR;
+                vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, intr_info);
                 vmcs_write32(VM_ENTRY_INSTRUCTION_LEN, 1);
                 kvm_rip_write(vcpu, vmx->rmode.irq.rip - 1);
                 return;
         }
 
-        vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
-                     nr | INTR_TYPE_EXCEPTION
-                     | (has_error_code ? INTR_INFO_DELIVER_CODE_MASK : 0)
-                     | INTR_INFO_VALID_MASK);
+        if (nr == BP_VECTOR || nr == OF_VECTOR) {
+                vmcs_write32(VM_ENTRY_INSTRUCTION_LEN, 1);
+                intr_info |= INTR_TYPE_SOFT_EXCEPTION;
+        } else
+                intr_info |= INTR_TYPE_HARD_EXCEPTION;
+
+        vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, intr_info);
 }
 
 static bool vmx_exception_injected(struct kvm_vcpu *vcpu)
@@ -856,11 +866,8 @@ static u64 guest_read_tsc(void)
  * writes 'guest_tsc' into guest's timestamp counter "register"
  * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
  */
-static void guest_write_tsc(u64 guest_tsc)
+static void guest_write_tsc(u64 guest_tsc, u64 host_tsc)
 {
-        u64 host_tsc;
-
-        rdtscll(host_tsc);
         vmcs_write64(TSC_OFFSET, guest_tsc - host_tsc);
 }
 
@@ -925,14 +932,15 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 {
         struct vcpu_vmx *vmx = to_vmx(vcpu);
         struct kvm_msr_entry *msr;
+        u64 host_tsc;
         int ret = 0;
 
         switch (msr_index) {
-#ifdef CONFIG_X86_64
         case MSR_EFER:
                 vmx_load_host_state(vmx);
                 ret = kvm_set_msr_common(vcpu, msr_index, data);
                 break;
+#ifdef CONFIG_X86_64
         case MSR_FS_BASE:
                 vmcs_writel(GUEST_FS_BASE, data);
                 break;
@@ -950,7 +958,8 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
                 vmcs_writel(GUEST_SYSENTER_ESP, data);
                 break;
         case MSR_IA32_TIME_STAMP_COUNTER:
-                guest_write_tsc(data);
+                rdtscll(host_tsc);
+                guest_write_tsc(data, host_tsc);
                 break;
         case MSR_P6_PERFCTR0:
         case MSR_P6_PERFCTR1:
@@ -999,40 +1008,28 @@ static void vmx_cache_reg(struct kvm_vcpu *vcpu, enum kvm_reg reg)
         }
 }
 
-static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
+static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_guest_debug *dbg)
 {
-        unsigned long dr7 = 0x400;
-        int old_singlestep;
-
-        old_singlestep = vcpu->guest_debug.singlestep;
-
-        vcpu->guest_debug.enabled = dbg->enabled;
-        if (vcpu->guest_debug.enabled) {
-                int i;
+        int old_debug = vcpu->guest_debug;
+        unsigned long flags;
 
-                dr7 |= 0x200;  /* exact */
-                for (i = 0; i < 4; ++i) {
-                        if (!dbg->breakpoints[i].enabled)
-                                continue;
-                        vcpu->guest_debug.bp[i] = dbg->breakpoints[i].address;
-                        dr7 |= 2 << (i*2);    /* global enable */
-                        dr7 |= 0 << (i*4+16); /* execution breakpoint */
-                }
+        vcpu->guest_debug = dbg->control;
+        if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
+                vcpu->guest_debug = 0;
 
-                vcpu->guest_debug.singlestep = dbg->singlestep;
-        } else
-                vcpu->guest_debug.singlestep = 0;
-
-        if (old_singlestep && !vcpu->guest_debug.singlestep) {
-                unsigned long flags;
+        if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
+                vmcs_writel(GUEST_DR7, dbg->arch.debugreg[7]);
+        else
+                vmcs_writel(GUEST_DR7, vcpu->arch.dr7);
 
-                flags = vmcs_readl(GUEST_RFLAGS);
+        flags = vmcs_readl(GUEST_RFLAGS);
+        if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
+                flags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
+        else if (old_debug & KVM_GUESTDBG_SINGLESTEP)
                 flags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
-                vmcs_writel(GUEST_RFLAGS, flags);
-        }
+        vmcs_writel(GUEST_RFLAGS, flags);
 
         update_exception_bitmap(vcpu);
-        vmcs_writel(GUEST_DR7, dr7);
 
         return 0;
 }
@@ -1433,6 +1430,29 @@ continue_rmode:
         init_rmode(vcpu->kvm);
 }
 
+static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
+{
+        struct vcpu_vmx *vmx = to_vmx(vcpu);
+        struct kvm_msr_entry *msr = find_msr_entry(vmx, MSR_EFER);
+
+        vcpu->arch.shadow_efer = efer;
+        if (!msr)
+                return;
+        if (efer & EFER_LMA) {
+                vmcs_write32(VM_ENTRY_CONTROLS,
+                             vmcs_read32(VM_ENTRY_CONTROLS) |
+                             VM_ENTRY_IA32E_MODE);
+                msr->data = efer;
+        } else {
+                vmcs_write32(VM_ENTRY_CONTROLS,
+                             vmcs_read32(VM_ENTRY_CONTROLS) &
+                             ~VM_ENTRY_IA32E_MODE);
+
+                msr->data = efer & ~EFER_LME;
+        }
+        setup_msrs(vmx);
+}
+
 #ifdef CONFIG_X86_64
 
 static void enter_lmode(struct kvm_vcpu *vcpu)
@@ -1447,13 +1467,8 @@ static void enter_lmode(struct kvm_vcpu *vcpu)
                              (guest_tr_ar & ~AR_TYPE_MASK)
                              | AR_TYPE_BUSY_64_TSS);
         }
-
         vcpu->arch.shadow_efer |= EFER_LMA;
-
-        find_msr_entry(to_vmx(vcpu), MSR_EFER)->data |= EFER_LMA | EFER_LME;
-        vmcs_write32(VM_ENTRY_CONTROLS,
-                     vmcs_read32(VM_ENTRY_CONTROLS)
-                     | VM_ENTRY_IA32E_MODE);
+        vmx_set_efer(vcpu, vcpu->arch.shadow_efer);
 }
 
 static void exit_lmode(struct kvm_vcpu *vcpu)
@@ -1612,30 +1627,6 @@ static void vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
         vmcs_writel(GUEST_CR4, hw_cr4);
 }
 
-static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
-{
-        struct vcpu_vmx *vmx = to_vmx(vcpu);
-        struct kvm_msr_entry *msr = find_msr_entry(vmx, MSR_EFER);
-
-        vcpu->arch.shadow_efer = efer;
-        if (!msr)
-                return;
-        if (efer & EFER_LMA) {
-                vmcs_write32(VM_ENTRY_CONTROLS,
-                                     vmcs_read32(VM_ENTRY_CONTROLS) |
-                                     VM_ENTRY_IA32E_MODE);
-                msr->data = efer;
-
-        } else {
-                vmcs_write32(VM_ENTRY_CONTROLS,
-                                     vmcs_read32(VM_ENTRY_CONTROLS) &
-                                     ~VM_ENTRY_IA32E_MODE);
-
-                msr->data = efer & ~EFER_LME;
-        }
-        setup_msrs(vmx);
-}
-
 static u64 vmx_get_segment_base(struct kvm_vcpu *vcpu, int seg)
 {
         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
@@ -1653,7 +1644,7 @@ static void vmx_get_segment(struct kvm_vcpu *vcpu,
         var->limit = vmcs_read32(sf->limit);
         var->selector = vmcs_read16(sf->selector);
         ar = vmcs_read32(sf->ar_bytes);
-        if (ar & AR_UNUSABLE_MASK)
+        if ((ar & AR_UNUSABLE_MASK) && !emulate_invalid_guest_state)
                 ar = 0;
         var->type = ar & 15;
         var->s = (ar >> 4) & 1;
@@ -1788,14 +1779,16 @@ static bool code_segment_valid(struct kvm_vcpu *vcpu)
         vmx_get_segment(vcpu, &cs, VCPU_SREG_CS);
         cs_rpl = cs.selector & SELECTOR_RPL_MASK;
 
+        if (cs.unusable)
+                return false;
         if (~cs.type & (AR_TYPE_CODE_MASK|AR_TYPE_ACCESSES_MASK))
                 return false;
         if (!cs.s)
                 return false;
-        if (!(~cs.type & (AR_TYPE_CODE_MASK|AR_TYPE_WRITEABLE_MASK))) {
+        if (cs.type & AR_TYPE_WRITEABLE_MASK) {
                 if (cs.dpl > cs_rpl)
                         return false;
-        } else if (cs.type & AR_TYPE_CODE_MASK) {
+        } else {
                 if (cs.dpl != cs_rpl)
                         return false;
         }
@@ -1814,7 +1807,9 @@ static bool stack_segment_valid(struct kvm_vcpu *vcpu)
         vmx_get_segment(vcpu, &ss, VCPU_SREG_SS);
         ss_rpl = ss.selector & SELECTOR_RPL_MASK;
 
-        if ((ss.type != 3) || (ss.type != 7))
+        if (ss.unusable)
+                return true;
+        if (ss.type != 3 && ss.type != 7)
                 return false;
         if (!ss.s)
                 return false;
@@ -1834,6 +1829,8 @@ static bool data_segment_valid(struct kvm_vcpu *vcpu, int seg)
         vmx_get_segment(vcpu, &var, seg);
         rpl = var.selector & SELECTOR_RPL_MASK;
 
+        if (var.unusable)
+                return true;
         if (!var.s)
                 return false;
         if (!var.present)
@@ -1855,9 +1852,11 @@ static bool tr_valid(struct kvm_vcpu *vcpu)
 
         vmx_get_segment(vcpu, &tr, VCPU_SREG_TR);
 
+        if (tr.unusable)
+                return false;
         if (tr.selector & SELECTOR_TI_MASK)     /* TI = 1 */
                 return false;
-        if ((tr.type != 3) || (tr.type != 11)) /* TODO: Check if guest is in IA32e mode */
+        if (tr.type != 3 && tr.type != 11) /* TODO: Check if guest is in IA32e mode */
                 return false;
         if (!tr.present)
                 return false;
@@ -1871,6 +1870,8 @@ static bool ldtr_valid(struct kvm_vcpu *vcpu)
 
         vmx_get_segment(vcpu, &ldtr, VCPU_SREG_LDTR);
 
+        if (ldtr.unusable)
+                return true;
         if (ldtr.selector & SELECTOR_TI_MASK)   /* TI = 1 */
                 return false;
         if (ldtr.type != 2)
@@ -2112,7 +2113,7 @@ static int vmx_vcpu_setup(struct vcpu_vmx *vmx)
 {
         u32 host_sysenter_cs, msr_low, msr_high;
         u32 junk;
-        u64 host_pat;
+        u64 host_pat, tsc_this, tsc_base;
         unsigned long a;
         struct descriptor_table dt;
         int i;
@@ -2240,6 +2241,12 @@ static int vmx_vcpu_setup(struct vcpu_vmx *vmx)
         vmcs_writel(CR0_GUEST_HOST_MASK, ~0UL);
         vmcs_writel(CR4_GUEST_HOST_MASK, KVM_GUEST_CR4_MASK);
 
+        tsc_base = vmx->vcpu.kvm->arch.vm_init_tsc;
+        rdtscll(tsc_this);
+        if (tsc_this < vmx->vcpu.kvm->arch.vm_init_tsc)
+                tsc_base = tsc_this;
+
+        guest_write_tsc(0, tsc_base);
 
         return 0;
 }
@@ -2319,7 +2326,6 @@ static int vmx_vcpu_reset(struct kvm_vcpu *vcpu)
                 kvm_rip_write(vcpu, 0);
         kvm_register_write(vcpu, VCPU_REGS_RSP, 0);
 
-        /* todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0 */
         vmcs_writel(GUEST_DR7, 0x400);
 
         vmcs_writel(GUEST_GDTR_BASE, 0);
@@ -2332,8 +2338,6 @@ static int vmx_vcpu_reset(struct kvm_vcpu *vcpu)
         vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 0);
         vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS, 0);
 
-        guest_write_tsc(0);
-
         /* Special registers */
         vmcs_write64(GUEST_IA32_DEBUGCTL, 0);
 
@@ -2486,6 +2490,11 @@ static void do_interrupt_requests(struct kvm_vcpu *vcpu,
 {
         vmx_update_window_states(vcpu);
 
+        if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
+                vmcs_clear_bits(GUEST_INTERRUPTIBILITY_INFO,
+                                GUEST_INTR_STATE_STI |
+                                GUEST_INTR_STATE_MOV_SS);
+
         if (vcpu->arch.nmi_pending && !vcpu->arch.nmi_injected) {
                 if (vcpu->arch.interrupt.pending) {
                         enable_nmi_window(vcpu);
@@ -2536,24 +2545,6 @@ static int vmx_set_tss_addr(struct kvm *kvm, unsigned int addr)
         return 0;
 }
 
-static void kvm_guest_debug_pre(struct kvm_vcpu *vcpu)
-{
-        struct kvm_guest_debug *dbg = &vcpu->guest_debug;
-
-        set_debugreg(dbg->bp[0], 0);
-        set_debugreg(dbg->bp[1], 1);
-        set_debugreg(dbg->bp[2], 2);
-        set_debugreg(dbg->bp[3], 3);
-
-        if (dbg->singlestep) {
-                unsigned long flags;
-
-                flags = vmcs_readl(GUEST_RFLAGS);
-                flags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
-                vmcs_writel(GUEST_RFLAGS, flags);
-        }
-}
-
 static int handle_rmode_exception(struct kvm_vcpu *vcpu,
                                   int vec, u32 err_code)
 {
@@ -2570,9 +2561,17 @@ static int handle_rmode_exception(struct kvm_vcpu *vcpu,
          *        the required debugging infrastructure rework.
          */
         switch (vec) {
-        case DE_VECTOR:
         case DB_VECTOR:
+                if (vcpu->guest_debug &
+                    (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP))
+                        return 0;
+                kvm_queue_exception(vcpu, vec);
+                return 1;
         case BP_VECTOR:
+                if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP)
+                        return 0;
+                /* fall through */
+        case DE_VECTOR:
         case OF_VECTOR:
         case BR_VECTOR:
         case UD_VECTOR:
@@ -2589,8 +2588,8 @@ static int handle_rmode_exception(struct kvm_vcpu *vcpu,
 static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 {
         struct vcpu_vmx *vmx = to_vmx(vcpu);
-        u32 intr_info, error_code;
-        unsigned long cr2, rip;
+        u32 intr_info, ex_no, error_code;
+        unsigned long cr2, rip, dr6;
         u32 vect_info;
         enum emulation_result er;
 
@@ -2649,14 +2648,30 @@ static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
                 return 1;
         }
 
-        if ((intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK)) ==
-            (INTR_TYPE_EXCEPTION | 1)) {
+        ex_no = intr_info & INTR_INFO_VECTOR_MASK;
+        switch (ex_no) {
+        case DB_VECTOR:
+                dr6 = vmcs_readl(EXIT_QUALIFICATION);
+                if (!(vcpu->guest_debug &
+                      (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP))) {
+                        vcpu->arch.dr6 = dr6 | DR6_FIXED_1;
+                        kvm_queue_exception(vcpu, DB_VECTOR);
+                        return 1;
+                }
+                kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1;
+                kvm_run->debug.arch.dr7 = vmcs_readl(GUEST_DR7);
+                /* fall through */
+        case BP_VECTOR:
                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
-                return 0;
+                kvm_run->debug.arch.pc = vmcs_readl(GUEST_CS_BASE) + rip;
+                kvm_run->debug.arch.exception = ex_no;
+                break;
+        default:
+                kvm_run->exit_reason = KVM_EXIT_EXCEPTION;
+                kvm_run->ex.exception = ex_no;
+                kvm_run->ex.error_code = error_code;
+                break;
         }
-        kvm_run->exit_reason = KVM_EXIT_EXCEPTION;
-        kvm_run->ex.exception = intr_info & INTR_INFO_VECTOR_MASK;
-        kvm_run->ex.error_code = error_code;
         return 0;
 }
 
@@ -2677,7 +2692,7 @@ static int handle_triple_fault(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 static int handle_io(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 {
         unsigned long exit_qualification;
-        int size, down, in, string, rep;
+        int size, in, string;
         unsigned port;
 
         ++vcpu->stat.io_exits;
@@ -2693,8 +2708,6 @@ static int handle_io(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 
         size = (exit_qualification & 7) + 1;
         in = (exit_qualification & 8) != 0;
-        down = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_DF) != 0;
-        rep = (exit_qualification & 32) != 0;
         port = exit_qualification >> 16;
 
         skip_emulated_instruction(vcpu);
@@ -2795,21 +2808,44 @@ static int handle_dr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
         unsigned long val;
         int dr, reg;
 
-        /*
-         * FIXME: this code assumes the host is debugging the guest.
-         *        need to deal with guest debugging itself too.
-         */
+        dr = vmcs_readl(GUEST_DR7);
+        if (dr & DR7_GD) {
+                /*
+                 * As the vm-exit takes precedence over the debug trap, we
+                 * need to emulate the latter, either for the host or the
+                 * guest debugging itself.
+                 */
+                if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
+                        kvm_run->debug.arch.dr6 = vcpu->arch.dr6;
+                        kvm_run->debug.arch.dr7 = dr;
+                        kvm_run->debug.arch.pc =
+                                vmcs_readl(GUEST_CS_BASE) +
+                                vmcs_readl(GUEST_RIP);
+                        kvm_run->debug.arch.exception = DB_VECTOR;
+                        kvm_run->exit_reason = KVM_EXIT_DEBUG;
+                        return 0;
+                } else {
+                        vcpu->arch.dr7 &= ~DR7_GD;
+                        vcpu->arch.dr6 |= DR6_BD;
+                        vmcs_writel(GUEST_DR7, vcpu->arch.dr7);
+                        kvm_queue_exception(vcpu, DB_VECTOR);
+                        return 1;
+                }
+        }
+
         exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
-        dr = exit_qualification & 7;
-        reg = (exit_qualification >> 8) & 15;
-        if (exit_qualification & 16) {
-                /* mov from dr */
+        dr = exit_qualification & DEBUG_REG_ACCESS_NUM;
+        reg = DEBUG_REG_ACCESS_REG(exit_qualification);
+        if (exit_qualification & TYPE_MOV_FROM_DR) {
                 switch (dr) {
+                case 0 ... 3:
+                        val = vcpu->arch.db[dr];
+                        break;
                 case 6:
-                        val = 0xffff0ff0;
+                        val = vcpu->arch.dr6;
                         break;
                 case 7:
-                        val = 0x400;
+                        val = vcpu->arch.dr7;
                         break;
                 default:
                         val = 0;
@@ -2817,7 +2853,38 @@ static int handle_dr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
                 kvm_register_write(vcpu, reg, val);
                 KVMTRACE_2D(DR_READ, vcpu, (u32)dr, (u32)val, handler);
         } else {
-                /* mov to dr */
+                val = vcpu->arch.regs[reg];
+                switch (dr) {
+                case 0 ... 3:
+                        vcpu->arch.db[dr] = val;
+                        if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
+                                vcpu->arch.eff_db[dr] = val;
+                        break;
+                case 4 ... 5:
+                        if (vcpu->arch.cr4 & X86_CR4_DE)
+                                kvm_queue_exception(vcpu, UD_VECTOR);
+                        break;
+                case 6:
+                        if (val & 0xffffffff00000000ULL) {
+                                kvm_queue_exception(vcpu, GP_VECTOR);
+                                break;
+                        }
+                        vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
+                        break;
+                case 7:
+                        if (val & 0xffffffff00000000ULL) {
+                                kvm_queue_exception(vcpu, GP_VECTOR);
+                                break;
+                        }
+                        vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
+                        if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
+                                vmcs_writel(GUEST_DR7, vcpu->arch.dr7);
+                                vcpu->arch.switch_db_regs =
+                                        (val & DR7_BP_EN_MASK);
+                        }
+                        break;
+                }
+                KVMTRACE_2D(DR_WRITE, vcpu, (u32)dr, (u32)val, handler);
         }
         skip_emulated_instruction(vcpu);
         return 1;
@@ -2968,17 +3035,25 @@ static int handle_task_switch(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
         }
         tss_selector = exit_qualification;
 
-        return kvm_task_switch(vcpu, tss_selector, reason);
+        if (!kvm_task_switch(vcpu, tss_selector, reason))
+                return 0;
+
+        /* clear all local breakpoint enable flags */
+        vmcs_writel(GUEST_DR7, vmcs_readl(GUEST_DR7) & ~55);
+
+        /*
+         * TODO: What about debug traps on tss switch?
+         *       Are we supposed to inject them and update dr6?
+         */
+
+        return 1;
 }
 
 static int handle_ept_violation(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 {
         u64 exit_qualification;
-        enum emulation_result er;
         gpa_t gpa;
-        unsigned long hva;
         int gla_validity;
-        int r;
 
         exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
 
@@ -3001,32 +3076,7 @@ static int handle_ept_violation(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
         }
 
         gpa = vmcs_read64(GUEST_PHYSICAL_ADDRESS);
-        hva = gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT);
-        if (!kvm_is_error_hva(hva)) {
-                r = kvm_mmu_page_fault(vcpu, gpa & PAGE_MASK, 0);
-                if (r < 0) {
-                        printk(KERN_ERR "EPT: Not enough memory!\n");
-                        return -ENOMEM;
-                }
-                return 1;
-        } else {
-                /* must be MMIO */
-                er = emulate_instruction(vcpu, kvm_run, 0, 0, 0);
-
-                if (er == EMULATE_FAIL) {
-                        printk(KERN_ERR
-                         "EPT: Fail to handle EPT violation vmexit!er is %d\n",
-                         er);
-                        printk(KERN_ERR "EPT: GPA: 0x%lx, GVA: 0x%lx\n",
-                         (long unsigned int)vmcs_read64(GUEST_PHYSICAL_ADDRESS),
-                         (long unsigned int)vmcs_read64(GUEST_LINEAR_ADDRESS));
-                        printk(KERN_ERR "EPT: Exit qualification is 0x%lx\n",
-                                (long unsigned int)exit_qualification);
-                        return -ENOTSUPP;
-                } else if (er == EMULATE_DO_MMIO)
-                        return 0;
-        }
-        return 1;
+        return kvm_mmu_page_fault(vcpu, gpa & PAGE_MASK, 0);
 }
 
 static int handle_nmi_window(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
@@ -3046,7 +3096,7 @@ static void handle_invalid_guest_state(struct kvm_vcpu *vcpu,
                                 struct kvm_run *kvm_run)
 {
         struct vcpu_vmx *vmx = to_vmx(vcpu);
-        int err;
+        enum emulation_result err = EMULATE_DONE;
 
         preempt_enable();
         local_irq_enable();
@@ -3071,10 +3121,7 @@ static void handle_invalid_guest_state(struct kvm_vcpu *vcpu,
         local_irq_disable();
         preempt_disable();
 
-        /* Guest state should be valid now except if we need to
-         * emulate an MMIO */
-        if (guest_state_valid(vcpu))
-                vmx->emulation_required = 0;
+        vmx->invalid_state_emulation_result = err;
 }
 
 /*
@@ -3123,8 +3170,11 @@ static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
 
         /* If we need to emulate an MMIO from handle_invalid_guest_state
          * we just return 0 */
-        if (vmx->emulation_required && emulate_invalid_guest_state)
-                return 0;
+        if (vmx->emulation_required && emulate_invalid_guest_state) {
+                if (guest_state_valid(vcpu))
+                        vmx->emulation_required = 0;
+                return vmx->invalid_state_emulation_result != EMULATE_DO_MMIO;
+        }
 
         /* Access CR3 don't cause VMExit in paging mode, so we need
          * to sync with guest real CR3. */
@@ -3238,7 +3288,8 @@ static void vmx_complete_interrupts(struct vcpu_vmx *vmx)
                         vmx->vcpu.arch.nmi_injected = false;
         }
         kvm_clear_exception_queue(&vmx->vcpu);
-        if (idtv_info_valid && type == INTR_TYPE_EXCEPTION) {
+        if (idtv_info_valid && (type == INTR_TYPE_HARD_EXCEPTION ||
+                                type == INTR_TYPE_SOFT_EXCEPTION)) {
                 if (idt_vectoring_info & VECTORING_INFO_DELIVER_CODE_MASK) {
                         error = vmcs_read32(IDT_VECTORING_ERROR_CODE);
                         kvm_queue_exception_e(&vmx->vcpu, vector, error);
@@ -3259,6 +3310,11 @@ static void vmx_intr_assist(struct kvm_vcpu *vcpu)
 
         vmx_update_window_states(vcpu);
 
+        if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
+                vmcs_clear_bits(GUEST_INTERRUPTIBILITY_INFO,
+                                GUEST_INTR_STATE_STI |
+                                GUEST_INTR_STATE_MOV_SS);
+
         if (vcpu->arch.nmi_pending && !vcpu->arch.nmi_injected) {
                 if (vcpu->arch.interrupt.pending) {
                         enable_nmi_window(vcpu);
@@ -3347,6 +3403,8 @@ static void vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
          */
         vmcs_writel(HOST_CR0, read_cr0());
 
+        set_debugreg(vcpu->arch.dr6, 6);
+
         asm(
                 /* Store host registers */
                 "push %%"R"dx; push %%"R"bp;"
@@ -3441,6 +3499,8 @@ static void vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
         vcpu->arch.regs_avail = ~((1 << VCPU_REGS_RIP) | (1 << VCPU_REGS_RSP));
         vcpu->arch.regs_dirty = 0;
 
+        get_debugreg(vcpu->arch.dr6, 6);
+
         vmx->idt_vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
         if (vmx->rmode.irq.pending)
                 fixup_rmode_irq(vmx);
@@ -3595,7 +3655,6 @@ static struct kvm_x86_ops vmx_x86_ops = {
         .vcpu_put = vmx_vcpu_put,
 
         .set_guest_debug = set_guest_debug,
-        .guest_debug_pre = kvm_guest_debug_pre,
         .get_msr = vmx_get_msr,
         .set_msr = vmx_set_msr,
         .get_segment_base = vmx_get_segment_base,
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 758b7a155ae9..8ca100a9ecac 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -36,6 +36,7 @@
 #include <linux/highmem.h>
 #include <linux/iommu.h>
 #include <linux/intel-iommu.h>
+#include <linux/cpufreq.h>
 
 #include <asm/uaccess.h>
 #include <asm/msr.h>
@@ -69,6 +70,8 @@ static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
 
 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
                                     struct kvm_cpuid_entry2 __user *entries);
+struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
+                                              u32 function, u32 index);
 
 struct kvm_x86_ops *kvm_x86_ops;
 EXPORT_SYMBOL_GPL(kvm_x86_ops);
@@ -173,6 +176,7 @@ void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
                            u32 error_code)
 {
         ++vcpu->stat.pf_guest;
+
         if (vcpu->arch.exception.pending) {
                 if (vcpu->arch.exception.nr == PF_VECTOR) {
                         printk(KERN_DEBUG "kvm: inject_page_fault:"
@@ -361,6 +365,7 @@ void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
         }
         kvm_x86_ops->set_cr4(vcpu, cr4);
         vcpu->arch.cr4 = cr4;
+        vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
         kvm_mmu_sync_global(vcpu);
         kvm_mmu_reset_context(vcpu);
 }
@@ -442,6 +447,11 @@ unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 }
 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 
+static inline u32 bit(int bitno)
+{
+        return 1 << (bitno & 31);
+}
+
 /*
  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
@@ -456,7 +466,7 @@ static u32 msrs_to_save[] = {
         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 #endif
         MSR_IA32_TIME_STAMP_COUNTER, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
-        MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT
+        MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 };
 
 static unsigned num_msrs_to_save;
@@ -481,6 +491,28 @@ static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
                 return;
         }
 
+        if (efer & EFER_FFXSR) {
+                struct kvm_cpuid_entry2 *feat;
+
+                feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
+                if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
+                        printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
+                        kvm_inject_gp(vcpu, 0);
+                        return;
+                }
+        }
+
+        if (efer & EFER_SVME) {
+                struct kvm_cpuid_entry2 *feat;
+
+                feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
+                if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
+                        printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
+                        kvm_inject_gp(vcpu, 0);
+                        return;
+                }
+        }
+
         kvm_x86_ops->set_efer(vcpu, efer);
 
         efer &= ~EFER_LMA;
@@ -586,6 +618,8 @@ static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *
                  hv_clock->tsc_to_system_mul);
 }
 
+static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
+
 static void kvm_write_guest_time(struct kvm_vcpu *v)
 {
         struct timespec ts;
@@ -596,9 +630,9 @@ static void kvm_write_guest_time(struct kvm_vcpu *v)
         if ((!vcpu->time_page))
                 return;
 
-        if (unlikely(vcpu->hv_clock_tsc_khz != tsc_khz)) {
-                kvm_set_time_scale(tsc_khz, &vcpu->hv_clock);
-                vcpu->hv_clock_tsc_khz = tsc_khz;
+        if (unlikely(vcpu->hv_clock_tsc_khz != __get_cpu_var(cpu_tsc_khz))) {
+                kvm_set_time_scale(__get_cpu_var(cpu_tsc_khz), &vcpu->hv_clock);
+                vcpu->hv_clock_tsc_khz = __get_cpu_var(cpu_tsc_khz);
         }
 
         /* Keep irq disabled to prevent changes to the clock */
@@ -629,6 +663,16 @@ static void kvm_write_guest_time(struct kvm_vcpu *v)
         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
 }
 
+static int kvm_request_guest_time_update(struct kvm_vcpu *v)
+{
+        struct kvm_vcpu_arch *vcpu = &v->arch;
+
+        if (!vcpu->time_page)
+                return 0;
+        set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
+        return 1;
+}
+
 static bool msr_mtrr_valid(unsigned msr)
 {
         switch (msr) {
@@ -722,6 +766,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
                 break;
         case MSR_IA32_UCODE_REV:
         case MSR_IA32_UCODE_WRITE:
+        case MSR_VM_HSAVE_PA:
                 break;
         case 0x200 ... 0x2ff:
                 return set_msr_mtrr(vcpu, msr, data);
@@ -758,7 +803,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
                         vcpu->arch.time_page = NULL;
                 }
 
-                kvm_write_guest_time(vcpu);
+                kvm_request_guest_time_update(vcpu);
                 break;
         }
         default:
@@ -843,6 +888,7 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
         case MSR_IA32_LASTBRANCHTOIP:
         case MSR_IA32_LASTINTFROMIP:
         case MSR_IA32_LASTINTTOIP:
+        case MSR_VM_HSAVE_PA:
                 data = 0;
                 break;
         case MSR_MTRRcap:
@@ -967,10 +1013,13 @@ int kvm_dev_ioctl_check_extension(long ext)
         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
         case KVM_CAP_SET_TSS_ADDR:
         case KVM_CAP_EXT_CPUID:
+        case KVM_CAP_CLOCKSOURCE:
         case KVM_CAP_PIT:
         case KVM_CAP_NOP_IO_DELAY:
         case KVM_CAP_MP_STATE:
         case KVM_CAP_SYNC_MMU:
+        case KVM_CAP_REINJECT_CONTROL:
+        case KVM_CAP_IRQ_INJECT_STATUS:
                 r = 1;
                 break;
         case KVM_CAP_COALESCED_MMIO:
@@ -991,9 +1040,6 @@ int kvm_dev_ioctl_check_extension(long ext)
         case KVM_CAP_IOMMU:
                 r = iommu_found();
                 break;
-        case KVM_CAP_CLOCKSOURCE:
-                r = boot_cpu_has(X86_FEATURE_CONSTANT_TSC);
-                break;
         default:
                 r = 0;
                 break;
@@ -1044,7 +1090,7 @@ long kvm_arch_dev_ioctl(struct file *filp,
                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
                         goto out;
                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
-                        cpuid_arg->entries);
+                                                      cpuid_arg->entries);
                 if (r)
                         goto out;
 
@@ -1064,7 +1110,7 @@ out:
 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
 {
         kvm_x86_ops->vcpu_load(vcpu, cpu);
-        kvm_write_guest_time(vcpu);
+        kvm_request_guest_time_update(vcpu);
 }
 
 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
@@ -1142,8 +1188,8 @@ out:
 }
 
 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
-                                    struct kvm_cpuid2 *cpuid,
-                                    struct kvm_cpuid_entry2 __user *entries)
+                                     struct kvm_cpuid2 *cpuid,
+                                     struct kvm_cpuid_entry2 __user *entries)
 {
         int r;
 
@@ -1162,8 +1208,8 @@ out:
 }
 
 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
-                                    struct kvm_cpuid2 *cpuid,
-                                    struct kvm_cpuid_entry2 __user *entries)
+                                     struct kvm_cpuid2 *cpuid,
+                                     struct kvm_cpuid_entry2 __user *entries)
 {
         int r;
 
@@ -1172,7 +1218,7 @@ static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
                 goto out;
         r = -EFAULT;
         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
-                           vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
+                         vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
                 goto out;
         return 0;
 
@@ -1181,18 +1227,13 @@ out:
         return r;
 }
 
-static inline u32 bit(int bitno)
-{
-        return 1 << (bitno & 31);
-}
-
 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
-                          u32 index)
+                           u32 index)
 {
         entry->function = function;
         entry->index = index;
         cpuid_count(entry->function, entry->index,
-                &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
+                    &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
         entry->flags = 0;
 }
 
@@ -1222,15 +1263,17 @@ static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
 #ifdef CONFIG_X86_64
                 bit(X86_FEATURE_LM) |
 #endif
+                bit(X86_FEATURE_FXSR_OPT) |
                 bit(X86_FEATURE_MMXEXT) |
                 bit(X86_FEATURE_3DNOWEXT) |
                 bit(X86_FEATURE_3DNOW);
         const u32 kvm_supported_word3_x86_features =
                 bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
         const u32 kvm_supported_word6_x86_features =
-                bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY);
+                bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY) |
+                bit(X86_FEATURE_SVM);
 
-        /* all func 2 cpuid_count() should be called on the same cpu */
+        /* all calls to cpuid_count() should be made on the same cpu */
         get_cpu();
         do_cpuid_1_ent(entry, function, index);
         ++*nent;
@@ -1304,7 +1347,7 @@ static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
 }
 
 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
-                                    struct kvm_cpuid_entry2 __user *entries)
+                                     struct kvm_cpuid_entry2 __user *entries)
 {
         struct kvm_cpuid_entry2 *cpuid_entries;
         int limit, nent = 0, r = -E2BIG;
@@ -1321,7 +1364,7 @@ static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
         limit = cpuid_entries[0].eax;
         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
-                                &nent, cpuid->nent);
+                             &nent, cpuid->nent);
         r = -E2BIG;
         if (nent >= cpuid->nent)
                 goto out_free;
@@ -1330,10 +1373,10 @@ static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
         limit = cpuid_entries[nent - 1].eax;
         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
-                               &nent, cpuid->nent);
+                             &nent, cpuid->nent);
         r = -EFAULT;
         if (copy_to_user(entries, cpuid_entries,
-                        nent * sizeof(struct kvm_cpuid_entry2)))
+                         nent * sizeof(struct kvm_cpuid_entry2)))
                 goto out_free;
         cpuid->nent = nent;
         r = 0;
@@ -1477,7 +1520,7 @@ long kvm_arch_vcpu_ioctl(struct file *filp,
                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
                         goto out;
                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
-                                cpuid_arg->entries);
+                                              cpuid_arg->entries);
                 if (r)
                         goto out;
                 break;
@@ -1490,7 +1533,7 @@ long kvm_arch_vcpu_ioctl(struct file *filp,
                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
                         goto out;
                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
-                                cpuid_arg->entries);
+                                              cpuid_arg->entries);
                 if (r)
                         goto out;
                 r = -EFAULT;
@@ -1710,6 +1753,15 @@ static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
         return r;
 }
 
+static int kvm_vm_ioctl_reinject(struct kvm *kvm,
+                                 struct kvm_reinject_control *control)
+{
+        if (!kvm->arch.vpit)
+                return -ENXIO;
+        kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
+        return 0;
+}
+
 /*
  * Get (and clear) the dirty memory log for a memory slot.
  */
@@ -1807,13 +1859,26 @@ long kvm_arch_vm_ioctl(struct file *filp,
                         }
                 } else
                         goto out;
+                r = kvm_setup_default_irq_routing(kvm);
+                if (r) {
+                        kfree(kvm->arch.vpic);
+                        kfree(kvm->arch.vioapic);
+                        goto out;
+                }
                 break;
         case KVM_CREATE_PIT:
+                mutex_lock(&kvm->lock);
+                r = -EEXIST;
+                if (kvm->arch.vpit)
+                        goto create_pit_unlock;
                 r = -ENOMEM;
                 kvm->arch.vpit = kvm_create_pit(kvm);
                 if (kvm->arch.vpit)
                         r = 0;
+        create_pit_unlock:
+                mutex_unlock(&kvm->lock);
                 break;
+        case KVM_IRQ_LINE_STATUS:
         case KVM_IRQ_LINE: {
                 struct kvm_irq_level irq_event;
 
@@ -1821,10 +1886,17 @@ long kvm_arch_vm_ioctl(struct file *filp,
                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
                         goto out;
                 if (irqchip_in_kernel(kvm)) {
+                        __s32 status;
                         mutex_lock(&kvm->lock);
-                        kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
-                                    irq_event.irq, irq_event.level);
+                        status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
+                                        irq_event.irq, irq_event.level);
                         mutex_unlock(&kvm->lock);
+                        if (ioctl == KVM_IRQ_LINE_STATUS) {
+                                irq_event.status = status;
+                                if (copy_to_user(argp, &irq_event,
+                                                        sizeof irq_event))
+                                        goto out;
+                        }
                         r = 0;
                 }
                 break;
@@ -1907,6 +1979,17 @@ long kvm_arch_vm_ioctl(struct file *filp,
                 r = 0;
                 break;
         }
+        case KVM_REINJECT_CONTROL: {
+                struct kvm_reinject_control control;
+                r =  -EFAULT;
+                if (copy_from_user(&control, argp, sizeof(control)))
+                        goto out;
+                r = kvm_vm_ioctl_reinject(kvm, &control);
+                if (r)
+                        goto out;
+                r = 0;
+                break;
+        }
         default:
                 ;
         }
@@ -1960,10 +2043,38 @@ static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
         return dev;
 }
 
-int emulator_read_std(unsigned long addr,
-                             void *val,
-                             unsigned int bytes,
-                             struct kvm_vcpu *vcpu)
+static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
+                               struct kvm_vcpu *vcpu)
+{
+        void *data = val;
+        int r = X86EMUL_CONTINUE;
+
+        while (bytes) {
+                gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
+                unsigned offset = addr & (PAGE_SIZE-1);
+                unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
+                int ret;
+
+                if (gpa == UNMAPPED_GVA) {
+                        r = X86EMUL_PROPAGATE_FAULT;
+                        goto out;
+                }
+                ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
+                if (ret < 0) {
+                        r = X86EMUL_UNHANDLEABLE;
+                        goto out;
+                }
+
+                bytes -= toread;
+                data += toread;
+                addr += toread;
+        }
+out:
+        return r;
+}
+
+static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
+                                struct kvm_vcpu *vcpu)
 {
         void *data = val;
         int r = X86EMUL_CONTINUE;
@@ -1971,27 +2082,27 @@ int emulator_read_std(unsigned long addr,
         while (bytes) {
                 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
                 unsigned offset = addr & (PAGE_SIZE-1);
-                unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
+                unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
                 int ret;
 
                 if (gpa == UNMAPPED_GVA) {
                         r = X86EMUL_PROPAGATE_FAULT;
                         goto out;
                 }
-                ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
+                ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
                 if (ret < 0) {
                         r = X86EMUL_UNHANDLEABLE;
                         goto out;
                 }
 
-                bytes -= tocopy;
-                data += tocopy;
-                addr += tocopy;
+                bytes -= towrite;
+                data += towrite;
+                addr += towrite;
         }
 out:
         return r;
 }
-EXPORT_SYMBOL_GPL(emulator_read_std);
+
 
 static int emulator_read_emulated(unsigned long addr,
                                   void *val,
@@ -2013,8 +2124,8 @@ static int emulator_read_emulated(unsigned long addr,
         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
                 goto mmio;
 
-        if (emulator_read_std(addr, val, bytes, vcpu)
-                        == X86EMUL_CONTINUE)
+        if (kvm_read_guest_virt(addr, val, bytes, vcpu)
+                                == X86EMUL_CONTINUE)
                 return X86EMUL_CONTINUE;
         if (gpa == UNMAPPED_GVA)
                 return X86EMUL_PROPAGATE_FAULT;
@@ -2217,7 +2328,7 @@ void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
 
         rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
 
-        emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
+        kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
 
         printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
                context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
@@ -2225,7 +2336,7 @@ void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
 
 static struct x86_emulate_ops emulate_ops = {
-        .read_std            = emulator_read_std,
+        .read_std            = kvm_read_guest_virt,
         .read_emulated       = emulator_read_emulated,
         .write_emulated      = emulator_write_emulated,
         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
@@ -2327,40 +2438,19 @@ int emulate_instruction(struct kvm_vcpu *vcpu,
 }
 EXPORT_SYMBOL_GPL(emulate_instruction);
 
-static void free_pio_guest_pages(struct kvm_vcpu *vcpu)
-{
-        int i;
-
-        for (i = 0; i < ARRAY_SIZE(vcpu->arch.pio.guest_pages); ++i)
-                if (vcpu->arch.pio.guest_pages[i]) {
-                        kvm_release_page_dirty(vcpu->arch.pio.guest_pages[i]);
-                        vcpu->arch.pio.guest_pages[i] = NULL;
-                }
-}
-
 static int pio_copy_data(struct kvm_vcpu *vcpu)
 {
         void *p = vcpu->arch.pio_data;
-        void *q;
+        gva_t q = vcpu->arch.pio.guest_gva;
         unsigned bytes;
-        int nr_pages = vcpu->arch.pio.guest_pages[1] ? 2 : 1;
+        int ret;
 
-        q = vmap(vcpu->arch.pio.guest_pages, nr_pages, VM_READ|VM_WRITE,
-                 PAGE_KERNEL);
-        if (!q) {
-                free_pio_guest_pages(vcpu);
-                return -ENOMEM;
-        }
-        q += vcpu->arch.pio.guest_page_offset;
         bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
         if (vcpu->arch.pio.in)
-                memcpy(q, p, bytes);
+                ret = kvm_write_guest_virt(q, p, bytes, vcpu);
         else
-                memcpy(p, q, bytes);
-        q -= vcpu->arch.pio.guest_page_offset;
-        vunmap(q);
-        free_pio_guest_pages(vcpu);
-        return 0;
+                ret = kvm_read_guest_virt(q, p, bytes, vcpu);
+        return ret;
 }
 
 int complete_pio(struct kvm_vcpu *vcpu)
@@ -2471,7 +2561,6 @@ int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
         vcpu->arch.pio.in = in;
         vcpu->arch.pio.string = 0;
         vcpu->arch.pio.down = 0;
-        vcpu->arch.pio.guest_page_offset = 0;
         vcpu->arch.pio.rep = 0;
 
         if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
@@ -2499,9 +2588,7 @@ int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
                   gva_t address, int rep, unsigned port)
 {
         unsigned now, in_page;
-        int i, ret = 0;
-        int nr_pages = 1;
-        struct page *page;
+        int ret = 0;
         struct kvm_io_device *pio_dev;
 
         vcpu->run->exit_reason = KVM_EXIT_IO;
@@ -2513,7 +2600,6 @@ int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
         vcpu->arch.pio.in = in;
         vcpu->arch.pio.string = 1;
         vcpu->arch.pio.down = down;
-        vcpu->arch.pio.guest_page_offset = offset_in_page(address);
         vcpu->arch.pio.rep = rep;
 
         if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
@@ -2533,15 +2619,8 @@ int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
         else
                 in_page = offset_in_page(address) + size;
         now = min(count, (unsigned long)in_page / size);
-        if (!now) {
-                /*
-                 * String I/O straddles page boundary.  Pin two guest pages
-                 * so that we satisfy atomicity constraints.  Do just one
-                 * transaction to avoid complexity.
-                 */
-                nr_pages = 2;
+        if (!now)
                 now = 1;
-        }
         if (down) {
                 /*
                  * String I/O in reverse.  Yuck.  Kill the guest, fix later.
@@ -2556,15 +2635,7 @@ int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
         if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 
-        for (i = 0; i < nr_pages; ++i) {
-                page = gva_to_page(vcpu, address + i * PAGE_SIZE);
-                vcpu->arch.pio.guest_pages[i] = page;
-                if (!page) {
-                        kvm_inject_gp(vcpu, 0);
-                        free_pio_guest_pages(vcpu);
-                        return 1;
-                }
-        }
+        vcpu->arch.pio.guest_gva = address;
 
         pio_dev = vcpu_find_pio_dev(vcpu, port,
                                     vcpu->arch.pio.cur_count,
@@ -2572,7 +2643,11 @@ int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
         if (!vcpu->arch.pio.in) {
                 /* string PIO write */
                 ret = pio_copy_data(vcpu);
-                if (ret >= 0 && pio_dev) {
+                if (ret == X86EMUL_PROPAGATE_FAULT) {
+                        kvm_inject_gp(vcpu, 0);
+                        return 1;
+                }
+                if (ret == 0 && pio_dev) {
                         pio_string_write(pio_dev, vcpu);
                         complete_pio(vcpu);
                         if (vcpu->arch.pio.count == 0)
@@ -2587,9 +2662,72 @@ int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
 }
 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
 
+static void bounce_off(void *info)
+{
+        /* nothing */
+}
+
+static unsigned int  ref_freq;
+static unsigned long tsc_khz_ref;
+
+static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
+                                     void *data)
+{
+        struct cpufreq_freqs *freq = data;
+        struct kvm *kvm;
+        struct kvm_vcpu *vcpu;
+        int i, send_ipi = 0;
+
+        if (!ref_freq)
+                ref_freq = freq->old;
+
+        if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
+                return 0;
+        if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
+                return 0;
+        per_cpu(cpu_tsc_khz, freq->cpu) = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new);
+
+        spin_lock(&kvm_lock);
+        list_for_each_entry(kvm, &vm_list, vm_list) {
+                for (i = 0; i < KVM_MAX_VCPUS; ++i) {
+                        vcpu = kvm->vcpus[i];
+                        if (!vcpu)
+                                continue;
+                        if (vcpu->cpu != freq->cpu)
+                                continue;
+                        if (!kvm_request_guest_time_update(vcpu))
+                                continue;
+                        if (vcpu->cpu != smp_processor_id())
+                                send_ipi++;
+                }
+        }
+        spin_unlock(&kvm_lock);
+
+        if (freq->old < freq->new && send_ipi) {
+                /*
+                 * We upscale the frequency.  Must make the guest
+                 * doesn't see old kvmclock values while running with
+                 * the new frequency, otherwise we risk the guest sees
+                 * time go backwards.
+                 *
+                 * In case we update the frequency for another cpu
+                 * (which might be in guest context) send an interrupt
+                 * to kick the cpu out of guest context.  Next time
+                 * guest context is entered kvmclock will be updated,
+                 * so the guest will not see stale values.
+                 */
+                smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
+        }
+        return 0;
+}
+
+static struct notifier_block kvmclock_cpufreq_notifier_block = {
+        .notifier_call  = kvmclock_cpufreq_notifier
+};
+
 int kvm_arch_init(void *opaque)
 {
-        int r;
+        int r, cpu;
         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
 
         if (kvm_x86_ops) {
@@ -2620,6 +2758,15 @@ int kvm_arch_init(void *opaque)
         kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
                         PT_DIRTY_MASK, PT64_NX_MASK, 0, 0);
+
+        for_each_possible_cpu(cpu)
+                per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
+        if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
+                tsc_khz_ref = tsc_khz;
+                cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
+                                          CPUFREQ_TRANSITION_NOTIFIER);
+        }
+
         return 0;
 
 out:
@@ -2827,25 +2974,20 @@ static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
                 return 0;
         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
-                !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
+            !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
                 return 0;
         return 1;
 }
 
-void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
+struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
+                                              u32 function, u32 index)
 {
         int i;
-        u32 function, index;
-        struct kvm_cpuid_entry2 *e, *best;
+        struct kvm_cpuid_entry2 *best = NULL;
 
-        function = kvm_register_read(vcpu, VCPU_REGS_RAX);
-        index = kvm_register_read(vcpu, VCPU_REGS_RCX);
-        kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
-        kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
-        kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
-        kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
-        best = NULL;
         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
+                struct kvm_cpuid_entry2 *e;
+
                 e = &vcpu->arch.cpuid_entries[i];
                 if (is_matching_cpuid_entry(e, function, index)) {
                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
@@ -2860,6 +3002,21 @@ void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
                         if (!best || e->function > best->function)
                                 best = e;
         }
+        return best;
+}
+
+void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
+{
+        u32 function, index;
+        struct kvm_cpuid_entry2 *best;
+
+        function = kvm_register_read(vcpu, VCPU_REGS_RAX);
+        index = kvm_register_read(vcpu, VCPU_REGS_RCX);
+        kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
+        kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
+        kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
+        kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
+        best = kvm_find_cpuid_entry(vcpu, function, index);
         if (best) {
                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
@@ -2945,6 +3102,8 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
         if (vcpu->requests) {
                 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
                         __kvm_migrate_timers(vcpu);
+                if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
+                        kvm_write_guest_time(vcpu);
                 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
                         kvm_mmu_sync_roots(vcpu);
                 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
@@ -2979,9 +3138,6 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
                 goto out;
         }
 
-        if (vcpu->guest_debug.enabled)
-                kvm_x86_ops->guest_debug_pre(vcpu);
-
         vcpu->guest_mode = 1;
         /*
          * Make sure that guest_mode assignment won't happen after
@@ -3002,10 +3158,34 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 
         kvm_guest_enter();
 
+        get_debugreg(vcpu->arch.host_dr6, 6);
+        get_debugreg(vcpu->arch.host_dr7, 7);
+        if (unlikely(vcpu->arch.switch_db_regs)) {
+                get_debugreg(vcpu->arch.host_db[0], 0);
+                get_debugreg(vcpu->arch.host_db[1], 1);
+                get_debugreg(vcpu->arch.host_db[2], 2);
+                get_debugreg(vcpu->arch.host_db[3], 3);
+
+                set_debugreg(0, 7);
+                set_debugreg(vcpu->arch.eff_db[0], 0);
+                set_debugreg(vcpu->arch.eff_db[1], 1);
+                set_debugreg(vcpu->arch.eff_db[2], 2);
+                set_debugreg(vcpu->arch.eff_db[3], 3);
+        }
 
         KVMTRACE_0D(VMENTRY, vcpu, entryexit);
         kvm_x86_ops->run(vcpu, kvm_run);
 
+        if (unlikely(vcpu->arch.switch_db_regs)) {
+                set_debugreg(0, 7);
+                set_debugreg(vcpu->arch.host_db[0], 0);
+                set_debugreg(vcpu->arch.host_db[1], 1);
+                set_debugreg(vcpu->arch.host_db[2], 2);
+                set_debugreg(vcpu->arch.host_db[3], 3);
+        }
+        set_debugreg(vcpu->arch.host_dr6, 6);
+        set_debugreg(vcpu->arch.host_dr7, 7);
+
         vcpu->guest_mode = 0;
         local_irq_enable();
 
@@ -3192,7 +3372,7 @@ int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
         /*
          * Don't leak debug flags in case they were set for guest debugging
          */
-        if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep)
+        if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
                 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
 
         vcpu_put(vcpu);
@@ -3811,15 +3991,32 @@ int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
         return 0;
 }
 
-int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
-                                    struct kvm_debug_guest *dbg)
+int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
+                                        struct kvm_guest_debug *dbg)
 {
-        int r;
+        int i, r;
 
         vcpu_load(vcpu);
 
+        if ((dbg->control & (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) ==
+            (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) {
+                for (i = 0; i < KVM_NR_DB_REGS; ++i)
+                        vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
+                vcpu->arch.switch_db_regs =
+                        (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
+        } else {
+                for (i = 0; i < KVM_NR_DB_REGS; i++)
+                        vcpu->arch.eff_db[i] = vcpu->arch.db[i];
+                vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
+        }
+
         r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
 
+        if (dbg->control & KVM_GUESTDBG_INJECT_DB)
+                kvm_queue_exception(vcpu, DB_VECTOR);
+        else if (dbg->control & KVM_GUESTDBG_INJECT_BP)
+                kvm_queue_exception(vcpu, BP_VECTOR);
+
         vcpu_put(vcpu);
 
         return r;
@@ -4007,6 +4204,11 @@ int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
         vcpu->arch.nmi_pending = false;
         vcpu->arch.nmi_injected = false;
 
+        vcpu->arch.switch_db_regs = 0;
+        memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
+        vcpu->arch.dr6 = DR6_FIXED_1;
+        vcpu->arch.dr7 = DR7_FIXED_1;
+
         return kvm_x86_ops->vcpu_reset(vcpu);
 }
 
@@ -4100,6 +4302,8 @@ struct  kvm *kvm_arch_create_vm(void)
         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
 
+        rdtscll(kvm->arch.vm_init_tsc);
+
         return kvm;
 }
 
diff --git a/arch/x86/kvm/x86_emulate.c b/arch/x86/kvm/x86_emulate.c
index d174db7a3370..ca91749d2083 100644
--- a/arch/x86/kvm/x86_emulate.c
+++ b/arch/x86/kvm/x86_emulate.c
@@ -178,7 +178,7 @@ static u32 opcode_table[256] = {
         0, ImplicitOps | Stack, 0, 0,
         ByteOp | DstMem | SrcImm | ModRM | Mov, DstMem | SrcImm | ModRM | Mov,
         /* 0xC8 - 0xCF */
-        0, 0, 0, 0, 0, 0, 0, 0,
+        0, 0, 0, ImplicitOps | Stack, 0, 0, 0, 0,
         /* 0xD0 - 0xD7 */
         ByteOp | DstMem | SrcImplicit | ModRM, DstMem | SrcImplicit | ModRM,
         ByteOp | DstMem | SrcImplicit | ModRM, DstMem | SrcImplicit | ModRM,
@@ -1136,18 +1136,19 @@ static inline void emulate_push(struct x86_emulate_ctxt *ctxt)
 }
 
 static int emulate_pop(struct x86_emulate_ctxt *ctxt,
-                       struct x86_emulate_ops *ops)
+                       struct x86_emulate_ops *ops,
+                       void *dest, int len)
 {
         struct decode_cache *c = &ctxt->decode;
         int rc;
 
         rc = ops->read_emulated(register_address(c, ss_base(ctxt),
                                                  c->regs[VCPU_REGS_RSP]),
-                                &c->src.val, c->src.bytes, ctxt->vcpu);
+                                dest, len, ctxt->vcpu);
         if (rc != 0)
                 return rc;
 
-        register_address_increment(c, &c->regs[VCPU_REGS_RSP], c->src.bytes);
+        register_address_increment(c, &c->regs[VCPU_REGS_RSP], len);
         return rc;
 }
 
@@ -1157,11 +1158,9 @@ static inline int emulate_grp1a(struct x86_emulate_ctxt *ctxt,
         struct decode_cache *c = &ctxt->decode;
         int rc;
 
-        c->src.bytes = c->dst.bytes;
-        rc = emulate_pop(ctxt, ops);
+        rc = emulate_pop(ctxt, ops, &c->dst.val, c->dst.bytes);
         if (rc != 0)
                 return rc;
-        c->dst.val = c->src.val;
         return 0;
 }
 
@@ -1279,6 +1278,25 @@ static inline int emulate_grp9(struct x86_emulate_ctxt *ctxt,
         return 0;
 }
 
+static int emulate_ret_far(struct x86_emulate_ctxt *ctxt,
+                           struct x86_emulate_ops *ops)
+{
+        struct decode_cache *c = &ctxt->decode;
+        int rc;
+        unsigned long cs;
+
+        rc = emulate_pop(ctxt, ops, &c->eip, c->op_bytes);
+        if (rc)
+                return rc;
+        if (c->op_bytes == 4)
+                c->eip = (u32)c->eip;
+        rc = emulate_pop(ctxt, ops, &cs, c->op_bytes);
+        if (rc)
+                return rc;
+        rc = kvm_load_segment_descriptor(ctxt->vcpu, (u16)cs, 1, VCPU_SREG_CS);
+        return rc;
+}
+
 static inline int writeback(struct x86_emulate_ctxt *ctxt,
                             struct x86_emulate_ops *ops)
 {
@@ -1467,11 +1485,9 @@ special_insn:
                 break;
         case 0x58 ... 0x5f: /* pop reg */
         pop_instruction:
-                c->src.bytes = c->op_bytes;
-                rc = emulate_pop(ctxt, ops);
+                rc = emulate_pop(ctxt, ops, &c->dst.val, c->op_bytes);
                 if (rc != 0)
                         goto done;
-                c->dst.val = c->src.val;
                 break;
         case 0x63:              /* movsxd */
                 if (ctxt->mode != X86EMUL_MODE_PROT64)
@@ -1738,6 +1754,11 @@ special_insn:
         mov:
                 c->dst.val = c->src.val;
                 break;
+        case 0xcb:              /* ret far */
+                rc = emulate_ret_far(ctxt, ops);
+                if (rc)
+                        goto done;
+                break;
         case 0xd0 ... 0xd1:     /* Grp2 */
                 c->src.val = 1;
                 emulate_grp2(ctxt);
@@ -1908,11 +1929,16 @@ twobyte_insn:
                         c->dst.type = OP_NONE;
                         break;
                 case 3: /* lidt/vmmcall */
-                        if (c->modrm_mod == 3 && c->modrm_rm == 1) {
-                                rc = kvm_fix_hypercall(ctxt->vcpu);
-                                if (rc)
-                                        goto done;
-                                kvm_emulate_hypercall(ctxt->vcpu);
+                        if (c->modrm_mod == 3) {
+                                switch (c->modrm_rm) {
+                                case 1:
+                                        rc = kvm_fix_hypercall(ctxt->vcpu);
+                                        if (rc)
+                                                goto done;
+                                        break;
+                                default:
+                                        goto cannot_emulate;
+                                }
                         } else {
                                 rc = read_descriptor(ctxt, ops, c->src.ptr,
                                                      &size, &address,
diff --git a/arch/xtensa/include/asm/socket.h b/arch/xtensa/include/asm/socket.h
index 6100682b1da2..dd1a7a4a1cea 100644
--- a/arch/xtensa/include/asm/socket.h
+++ b/arch/xtensa/include/asm/socket.h
@@ -65,4 +65,7 @@
 
 #define SO_MARK                 36
 
+#define SO_TIMESTAMPING         37
+#define SCM_TIMESTAMPING        SO_TIMESTAMPING
+
 #endif  /* _XTENSA_SOCKET_H */
diff --git a/arch/xtensa/kernel/irq.c b/arch/xtensa/kernel/irq.c
index 5fbcde59a92d..f3b66fba5b8f 100644
--- a/arch/xtensa/kernel/irq.c
+++ b/arch/xtensa/kernel/irq.c
@@ -99,7 +99,7 @@ int show_interrupts(struct seq_file *p, void *v)
                 seq_printf(p, "%10u ", kstat_irqs(i));
 #else
                 for_each_online_cpu(j)
-                        seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
+                        seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
 #endif
                 seq_printf(p, " %14s", irq_desc[i].chip->typename);
                 seq_printf(p, "  %s", action->name);