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authorStephen Rothwell <sfr@canb.auug.org.au>2005-09-28 10:59:39 -0400
committerStephen Rothwell <sfr@canb.auug.org.au>2005-09-30 04:04:03 -0400
commitdcff1b170b43d9b8cb83e275cb3451dfd261c23e (patch)
tree774f5fa8ef6a5e0e379a4edf3867fe678b0696a4 /arch
parentd1dead5c5f016ebadb4b87c2c9fa13dfc2c99bf0 (diff)
powerpc: remove old vector.S files
Update old kernel/Makefiles to cope Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Diffstat (limited to 'arch')
-rw-r--r--arch/ppc/kernel/Makefile1
-rw-r--r--arch/ppc/kernel/vector.S217
-rw-r--r--arch/ppc64/kernel/Makefile1
-rw-r--r--arch/ppc64/kernel/vector.S172
4 files changed, 2 insertions, 389 deletions
diff --git a/arch/ppc/kernel/Makefile b/arch/ppc/kernel/Makefile
index 467f96480355..09067fe5772c 100644
--- a/arch/ppc/kernel/Makefile
+++ b/arch/ppc/kernel/Makefile
@@ -38,6 +38,7 @@ endif
38 38
39# These are here while we do the architecture merge 39# These are here while we do the architecture merge
40vecemu-y += ../../powerpc/kernel/vecemu.o 40vecemu-y += ../../powerpc/kernel/vecemu.o
41vector-y += ../../powerpc/kernel/vector.o
41 42
42else 43else
43obj-y := entry.o irq.o idle.o time.o misc.o \ 44obj-y := entry.o irq.o idle.o time.o misc.o \
diff --git a/arch/ppc/kernel/vector.S b/arch/ppc/kernel/vector.S
deleted file mode 100644
index 82a21346bf80..000000000000
--- a/arch/ppc/kernel/vector.S
+++ /dev/null
@@ -1,217 +0,0 @@
1#include <asm/ppc_asm.h>
2#include <asm/processor.h>
3
4/*
5 * The routines below are in assembler so we can closely control the
6 * usage of floating-point registers. These routines must be called
7 * with preempt disabled.
8 */
9 .data
10fpzero:
11 .long 0
12fpone:
13 .long 0x3f800000 /* 1.0 in single-precision FP */
14fphalf:
15 .long 0x3f000000 /* 0.5 in single-precision FP */
16
17 .text
18/*
19 * Internal routine to enable floating point and set FPSCR to 0.
20 * Don't call it from C; it doesn't use the normal calling convention.
21 */
22fpenable:
23 mfmsr r10
24 ori r11,r10,MSR_FP
25 mtmsr r11
26 isync
27 stfd fr0,24(r1)
28 stfd fr1,16(r1)
29 stfd fr31,8(r1)
30 lis r11,fpzero@ha
31 mffs fr31
32 lfs fr1,fpzero@l(r11)
33 mtfsf 0xff,fr1
34 blr
35
36fpdisable:
37 mtfsf 0xff,fr31
38 lfd fr31,8(r1)
39 lfd fr1,16(r1)
40 lfd fr0,24(r1)
41 mtmsr r10
42 isync
43 blr
44
45/*
46 * Vector add, floating point.
47 */
48 .globl vaddfp
49vaddfp:
50 stwu r1,-32(r1)
51 mflr r0
52 stw r0,36(r1)
53 bl fpenable
54 li r0,4
55 mtctr r0
56 li r6,0
571: lfsx fr0,r4,r6
58 lfsx fr1,r5,r6
59 fadds fr0,fr0,fr1
60 stfsx fr0,r3,r6
61 addi r6,r6,4
62 bdnz 1b
63 bl fpdisable
64 lwz r0,36(r1)
65 mtlr r0
66 addi r1,r1,32
67 blr
68
69/*
70 * Vector subtract, floating point.
71 */
72 .globl vsubfp
73vsubfp:
74 stwu r1,-32(r1)
75 mflr r0
76 stw r0,36(r1)
77 bl fpenable
78 li r0,4
79 mtctr r0
80 li r6,0
811: lfsx fr0,r4,r6
82 lfsx fr1,r5,r6
83 fsubs fr0,fr0,fr1
84 stfsx fr0,r3,r6
85 addi r6,r6,4
86 bdnz 1b
87 bl fpdisable
88 lwz r0,36(r1)
89 mtlr r0
90 addi r1,r1,32
91 blr
92
93/*
94 * Vector multiply and add, floating point.
95 */
96 .globl vmaddfp
97vmaddfp:
98 stwu r1,-48(r1)
99 mflr r0
100 stw r0,52(r1)
101 bl fpenable
102 stfd fr2,32(r1)
103 li r0,4
104 mtctr r0
105 li r7,0
1061: lfsx fr0,r4,r7
107 lfsx fr1,r5,r7
108 lfsx fr2,r6,r7
109 fmadds fr0,fr0,fr2,fr1
110 stfsx fr0,r3,r7
111 addi r7,r7,4
112 bdnz 1b
113 lfd fr2,32(r1)
114 bl fpdisable
115 lwz r0,52(r1)
116 mtlr r0
117 addi r1,r1,48
118 blr
119
120/*
121 * Vector negative multiply and subtract, floating point.
122 */
123 .globl vnmsubfp
124vnmsubfp:
125 stwu r1,-48(r1)
126 mflr r0
127 stw r0,52(r1)
128 bl fpenable
129 stfd fr2,32(r1)
130 li r0,4
131 mtctr r0
132 li r7,0
1331: lfsx fr0,r4,r7
134 lfsx fr1,r5,r7
135 lfsx fr2,r6,r7
136 fnmsubs fr0,fr0,fr2,fr1
137 stfsx fr0,r3,r7
138 addi r7,r7,4
139 bdnz 1b
140 lfd fr2,32(r1)
141 bl fpdisable
142 lwz r0,52(r1)
143 mtlr r0
144 addi r1,r1,48
145 blr
146
147/*
148 * Vector reciprocal estimate. We just compute 1.0/x.
149 * r3 -> destination, r4 -> source.
150 */
151 .globl vrefp
152vrefp:
153 stwu r1,-32(r1)
154 mflr r0
155 stw r0,36(r1)
156 bl fpenable
157 lis r9,fpone@ha
158 li r0,4
159 lfs fr1,fpone@l(r9)
160 mtctr r0
161 li r6,0
1621: lfsx fr0,r4,r6
163 fdivs fr0,fr1,fr0
164 stfsx fr0,r3,r6
165 addi r6,r6,4
166 bdnz 1b
167 bl fpdisable
168 lwz r0,36(r1)
169 mtlr r0
170 addi r1,r1,32
171 blr
172
173/*
174 * Vector reciprocal square-root estimate, floating point.
175 * We use the frsqrte instruction for the initial estimate followed
176 * by 2 iterations of Newton-Raphson to get sufficient accuracy.
177 * r3 -> destination, r4 -> source.
178 */
179 .globl vrsqrtefp
180vrsqrtefp:
181 stwu r1,-48(r1)
182 mflr r0
183 stw r0,52(r1)
184 bl fpenable
185 stfd fr2,32(r1)
186 stfd fr3,40(r1)
187 stfd fr4,48(r1)
188 stfd fr5,56(r1)
189 lis r9,fpone@ha
190 lis r8,fphalf@ha
191 li r0,4
192 lfs fr4,fpone@l(r9)
193 lfs fr5,fphalf@l(r8)
194 mtctr r0
195 li r6,0
1961: lfsx fr0,r4,r6
197 frsqrte fr1,fr0 /* r = frsqrte(s) */
198 fmuls fr3,fr1,fr0 /* r * s */
199 fmuls fr2,fr1,fr5 /* r * 0.5 */
200 fnmsubs fr3,fr1,fr3,fr4 /* 1 - s * r * r */
201 fmadds fr1,fr2,fr3,fr1 /* r = r + 0.5 * r * (1 - s * r * r) */
202 fmuls fr3,fr1,fr0 /* r * s */
203 fmuls fr2,fr1,fr5 /* r * 0.5 */
204 fnmsubs fr3,fr1,fr3,fr4 /* 1 - s * r * r */
205 fmadds fr1,fr2,fr3,fr1 /* r = r + 0.5 * r * (1 - s * r * r) */
206 stfsx fr1,r3,r6
207 addi r6,r6,4
208 bdnz 1b
209 lfd fr5,56(r1)
210 lfd fr4,48(r1)
211 lfd fr3,40(r1)
212 lfd fr2,32(r1)
213 bl fpdisable
214 lwz r0,36(r1)
215 mtlr r0
216 addi r1,r1,32
217 blr
diff --git a/arch/ppc64/kernel/Makefile b/arch/ppc64/kernel/Makefile
index bb5946b88b8b..9d4836fe3720 100644
--- a/arch/ppc64/kernel/Makefile
+++ b/arch/ppc64/kernel/Makefile
@@ -76,3 +76,4 @@ endif
76 76
77# These are here while we do the architecture merge 77# These are here while we do the architecture merge
78vecemu-y += ../../powerpc/kernel/vecemu.o 78vecemu-y += ../../powerpc/kernel/vecemu.o
79vector-y += ../../powerpc/kernel/vector.o
diff --git a/arch/ppc64/kernel/vector.S b/arch/ppc64/kernel/vector.S
deleted file mode 100644
index b79d33e4001e..000000000000
--- a/arch/ppc64/kernel/vector.S
+++ /dev/null
@@ -1,172 +0,0 @@
1#include <asm/ppc_asm.h>
2#include <asm/processor.h>
3
4/*
5 * The routines below are in assembler so we can closely control the
6 * usage of floating-point registers. These routines must be called
7 * with preempt disabled.
8 */
9 .section ".toc","aw"
10fpzero:
11 .tc FD_0_0[TC],0
12fpone:
13 .tc FD_3ff00000_0[TC],0x3ff0000000000000 /* 1.0 */
14fphalf:
15 .tc FD_3fe00000_0[TC],0x3fe0000000000000 /* 0.5 */
16
17 .text
18/*
19 * Internal routine to enable floating point and set FPSCR to 0.
20 * Don't call it from C; it doesn't use the normal calling convention.
21 */
22fpenable:
23 mfmsr r10
24 ori r11,r10,MSR_FP
25 mtmsr r11
26 isync
27 stfd fr31,-8(r1)
28 stfd fr0,-16(r1)
29 stfd fr1,-24(r1)
30 mffs fr31
31 lfd fr1,fpzero@toc(r2)
32 mtfsf 0xff,fr1
33 blr
34
35fpdisable:
36 mtlr r12
37 mtfsf 0xff,fr31
38 lfd fr1,-24(r1)
39 lfd fr0,-16(r1)
40 lfd fr31,-8(r1)
41 mtmsr r10
42 isync
43 blr
44
45/*
46 * Vector add, floating point.
47 */
48_GLOBAL(vaddfp)
49 mflr r12
50 bl fpenable
51 li r0,4
52 mtctr r0
53 li r6,0
541: lfsx fr0,r4,r6
55 lfsx fr1,r5,r6
56 fadds fr0,fr0,fr1
57 stfsx fr0,r3,r6
58 addi r6,r6,4
59 bdnz 1b
60 b fpdisable
61
62/*
63 * Vector subtract, floating point.
64 */
65_GLOBAL(vsubfp)
66 mflr r12
67 bl fpenable
68 li r0,4
69 mtctr r0
70 li r6,0
711: lfsx fr0,r4,r6
72 lfsx fr1,r5,r6
73 fsubs fr0,fr0,fr1
74 stfsx fr0,r3,r6
75 addi r6,r6,4
76 bdnz 1b
77 b fpdisable
78
79/*
80 * Vector multiply and add, floating point.
81 */
82_GLOBAL(vmaddfp)
83 mflr r12
84 bl fpenable
85 stfd fr2,-32(r1)
86 li r0,4
87 mtctr r0
88 li r7,0
891: lfsx fr0,r4,r7
90 lfsx fr1,r5,r7
91 lfsx fr2,r6,r7
92 fmadds fr0,fr0,fr2,fr1
93 stfsx fr0,r3,r7
94 addi r7,r7,4
95 bdnz 1b
96 lfd fr2,-32(r1)
97 b fpdisable
98
99/*
100 * Vector negative multiply and subtract, floating point.
101 */
102_GLOBAL(vnmsubfp)
103 mflr r12
104 bl fpenable
105 stfd fr2,-32(r1)
106 li r0,4
107 mtctr r0
108 li r7,0
1091: lfsx fr0,r4,r7
110 lfsx fr1,r5,r7
111 lfsx fr2,r6,r7
112 fnmsubs fr0,fr0,fr2,fr1
113 stfsx fr0,r3,r7
114 addi r7,r7,4
115 bdnz 1b
116 lfd fr2,-32(r1)
117 b fpdisable
118
119/*
120 * Vector reciprocal estimate. We just compute 1.0/x.
121 * r3 -> destination, r4 -> source.
122 */
123_GLOBAL(vrefp)
124 mflr r12
125 bl fpenable
126 li r0,4
127 lfd fr1,fpone@toc(r2)
128 mtctr r0
129 li r6,0
1301: lfsx fr0,r4,r6
131 fdivs fr0,fr1,fr0
132 stfsx fr0,r3,r6
133 addi r6,r6,4
134 bdnz 1b
135 b fpdisable
136
137/*
138 * Vector reciprocal square-root estimate, floating point.
139 * We use the frsqrte instruction for the initial estimate followed
140 * by 2 iterations of Newton-Raphson to get sufficient accuracy.
141 * r3 -> destination, r4 -> source.
142 */
143_GLOBAL(vrsqrtefp)
144 mflr r12
145 bl fpenable
146 stfd fr2,-32(r1)
147 stfd fr3,-40(r1)
148 stfd fr4,-48(r1)
149 stfd fr5,-56(r1)
150 li r0,4
151 lfd fr4,fpone@toc(r2)
152 lfd fr5,fphalf@toc(r2)
153 mtctr r0
154 li r6,0
1551: lfsx fr0,r4,r6
156 frsqrte fr1,fr0 /* r = frsqrte(s) */
157 fmuls fr3,fr1,fr0 /* r * s */
158 fmuls fr2,fr1,fr5 /* r * 0.5 */
159 fnmsubs fr3,fr1,fr3,fr4 /* 1 - s * r * r */
160 fmadds fr1,fr2,fr3,fr1 /* r = r + 0.5 * r * (1 - s * r * r) */
161 fmuls fr3,fr1,fr0 /* r * s */
162 fmuls fr2,fr1,fr5 /* r * 0.5 */
163 fnmsubs fr3,fr1,fr3,fr4 /* 1 - s * r * r */
164 fmadds fr1,fr2,fr3,fr1 /* r = r + 0.5 * r * (1 - s * r * r) */
165 stfsx fr1,r3,r6
166 addi r6,r6,4
167 bdnz 1b
168 lfd fr5,-56(r1)
169 lfd fr4,-48(r1)
170 lfd fr3,-40(r1)
171 lfd fr2,-32(r1)
172 b fpdisable
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