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authorYoichi Yuasa <yuasa@linux-mips.org>2009-07-08 02:08:19 -0400
committerRalf Baechle <ralf@linux-mips.org>2009-08-03 12:52:41 -0400
commit78fe01a5a80da4621321a1dc199c3a0875e2fbb0 (patch)
tree500aa5612cc08d0b508100e46e2e7b0b0c44198e /arch
parent7d35cdc07dd26eb6667f66f8e2f43f833a926ecf (diff)
MIPS: MIPSsim: Fix unbalance brace in mipssim get_c0_compare_int()
cc1: warnings being treated as errors arch/mips/mipssim/sim_time.c: In function 'get_c0_compare_int': arch/mips/mipssim/sim_time.c:103: warning: ISO C90 forbids mixed declarations and code arch/mips/mipssim/sim_time.c:116: error: expected declaration or statement at end of input make[1]: *** [arch/mips/mipssim/sim_time.o] Error 1 Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/mipssim/sim_time.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/mips/mipssim/sim_time.c b/arch/mips/mipssim/sim_time.c
index 0cea932f1241..5492c42f7650 100644
--- a/arch/mips/mipssim/sim_time.c
+++ b/arch/mips/mipssim/sim_time.c
@@ -89,13 +89,13 @@ unsigned __cpuinit get_c0_compare_int(void)
89 if (cpu_has_veic) { 89 if (cpu_has_veic) {
90 set_vi_handler(MSC01E_INT_CPUCTR, mips_timer_dispatch); 90 set_vi_handler(MSC01E_INT_CPUCTR, mips_timer_dispatch);
91 mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR; 91 mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR;
92 } else { 92
93#endif 93 return mips_cpu_timer_irq;
94 {
95 if (cpu_has_vint)
96 set_vi_handler(cp0_compare_irq, mips_timer_dispatch);
97 mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;
98 } 94 }
95#endif
96 if (cpu_has_vint)
97 set_vi_handler(cp0_compare_irq, mips_timer_dispatch);
98 mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;
99 99
100 return mips_cpu_timer_irq; 100 return mips_cpu_timer_irq;
101} 101}