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authorLinus Torvalds <torvalds@linux-foundation.org>2010-09-09 21:31:34 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2010-09-09 21:31:34 -0400
commit152831be91dfe864e06c3b3ff2bf994e04df4cdf (patch)
treeebacd4419074ad8b143b059094f5e2ec347d25fc /arch
parenta73f8844e1fc54c3762555c1cf1f71774142ca91 (diff)
parenta14d0404088a7b0d51bb5219baf33d77e5592007 (diff)
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: (30 commits) ARM: Update mach-types ARM: Partially revert "Auto calculate ZRELADDR and provide option for exceptions" ARM: Ensure PTE modifications via dma_alloc_coherent are visible ARM: 6359/1: ep93xx: move clock initialization earlier Revert "[ARM] pxa: remove now unnecessary dma_needs_bounce()" ARM: 6352/1: perf: fix event validation ARM: 6344/1: Mark CPU_32v6K as depended on CPU_V7 ARM: 6343/1: wire up fanotify and prlimit64 syscalls on ARM ARM: 6330/1: perf: reword comments relating to perf_event_do_pending ARM: pxa168fb: fix section mismatch ARM: pxa: Make id const in pwm_probe() ARM: pxa: fix CI_HSYNC and CI_VSYNC MFP defines for pxa300 ARM: pxa: remove __init from cpufreq_driver->init() ARM: imx: set cache line size to 64 bytes for i.MX5 mx5/clock: fix clear bit fields issue in _clk_ccgr_disable function mxc/tzic: add base address when accessing TZIC registers ARM: mach-shmobile: ap4evb: fix write protect for SDHI1 ARM: mach-shmobile: ap4evb: modify FSI2 ID ARM: mach-shmobile: do not enable the PLLC2 clock on init ARM: mach-shmobile: Clock framework comment fix ...
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/Kconfig91
-rw-r--r--arch/arm/boot/Makefile8
-rw-r--r--arch/arm/boot/compressed/Makefile4
-rw-r--r--arch/arm/boot/compressed/head.S2
-rw-r--r--arch/arm/common/it8152.c8
-rw-r--r--arch/arm/include/asm/dma-mapping.h8
-rw-r--r--arch/arm/include/asm/perf_event.h2
-rw-r--r--arch/arm/include/asm/unistd.h3
-rw-r--r--arch/arm/kernel/calls.S3
-rw-r--r--arch/arm/kernel/perf_event.c12
-rw-r--r--arch/arm/mach-ep93xx/clock.c2
-rw-r--r--arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c2
-rw-r--r--arch/arm/mach-mx25/mach-cpuimx25.c4
-rw-r--r--arch/arm/mach-mx3/clock-imx35.c77
-rw-r--r--arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c2
-rw-r--r--arch/arm/mach-mx3/mach-cpuimx35.c4
-rw-r--r--arch/arm/mach-mx5/clock-mx51.c2
-rw-r--r--arch/arm/mach-pxa/cpufreq-pxa2xx.c2
-rw-r--r--arch/arm/mach-pxa/cpufreq-pxa3xx.c2
-rw-r--r--arch/arm/mach-pxa/include/mach/mfp-pxa300.h4
-rw-r--r--arch/arm/mach-shmobile/Makefile2
-rw-r--r--arch/arm/mach-shmobile/board-ap4evb.c56
-rw-r--r--arch/arm/mach-shmobile/clock-sh7372.c9
-rw-r--r--arch/arm/mach-shmobile/clock.c4
-rw-r--r--arch/arm/mach-shmobile/pm_runtime.c169
-rw-r--r--arch/arm/mm/Kconfig2
-rw-r--r--arch/arm/mm/dma-mapping.c2
-rw-r--r--arch/arm/plat-mxc/Kconfig1
-rw-r--r--arch/arm/plat-mxc/include/mach/eukrea-baseboards.h4
-rw-r--r--arch/arm/plat-mxc/tzic.c5
-rw-r--r--arch/arm/plat-pxa/pwm.c2
-rw-r--r--arch/arm/tools/mach-types98
32 files changed, 424 insertions, 172 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 16bc8eb4901c..553b7cf17bfb 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1576,97 +1576,6 @@ config AUTO_ZRELADDR
1576 0xf8000000. This assumes the zImage being placed in the first 128MB 1576 0xf8000000. This assumes the zImage being placed in the first 128MB
1577 from start of memory. 1577 from start of memory.
1578 1578
1579config ZRELADDR
1580 hex "Physical address of the decompressed kernel image"
1581 depends on !AUTO_ZRELADDR
1582 default 0x00008000 if ARCH_BCMRING ||\
1583 ARCH_CNS3XXX ||\
1584 ARCH_DOVE ||\
1585 ARCH_EBSA110 ||\
1586 ARCH_FOOTBRIDGE ||\
1587 ARCH_INTEGRATOR ||\
1588 ARCH_IOP13XX ||\
1589 ARCH_IOP33X ||\
1590 ARCH_IXP2000 ||\
1591 ARCH_IXP23XX ||\
1592 ARCH_IXP4XX ||\
1593 ARCH_KIRKWOOD ||\
1594 ARCH_KS8695 ||\
1595 ARCH_LOKI ||\
1596 ARCH_MMP ||\
1597 ARCH_MV78XX0 ||\
1598 ARCH_NOMADIK ||\
1599 ARCH_NUC93X ||\
1600 ARCH_NS9XXX ||\
1601 ARCH_ORION5X ||\
1602 ARCH_SPEAR3XX ||\
1603 ARCH_SPEAR6XX ||\
1604 ARCH_TEGRA ||\
1605 ARCH_U8500 ||\
1606 ARCH_VERSATILE ||\
1607 ARCH_W90X900
1608 default 0x08008000 if ARCH_MX1 ||\
1609 ARCH_SHARK
1610 default 0x10008000 if ARCH_MSM ||\
1611 ARCH_OMAP1 ||\
1612 ARCH_RPC
1613 default 0x20008000 if ARCH_S5P6440 ||\
1614 ARCH_S5P6442 ||\
1615 ARCH_S5PC100 ||\
1616 ARCH_S5PV210
1617 default 0x30008000 if ARCH_S3C2410 ||\
1618 ARCH_S3C2400 ||\
1619 ARCH_S3C2412 ||\
1620 ARCH_S3C2416 ||\
1621 ARCH_S3C2440 ||\
1622 ARCH_S3C2443
1623 default 0x40008000 if ARCH_STMP378X ||\
1624 ARCH_STMP37XX ||\
1625 ARCH_SH7372 ||\
1626 ARCH_SH7377 ||\
1627 ARCH_S5PV310
1628 default 0x50008000 if ARCH_S3C64XX ||\
1629 ARCH_SH7367
1630 default 0x60008000 if ARCH_VEXPRESS
1631 default 0x80008000 if ARCH_MX25 ||\
1632 ARCH_MX3 ||\
1633 ARCH_NETX ||\
1634 ARCH_OMAP2PLUS ||\
1635 ARCH_PNX4008
1636 default 0x90008000 if ARCH_MX5 ||\
1637 ARCH_MX91231
1638 default 0xa0008000 if ARCH_IOP32X ||\
1639 ARCH_PXA ||\
1640 MACH_MX27
1641 default 0xc0008000 if ARCH_LH7A40X ||\
1642 MACH_MX21
1643 default 0xf0008000 if ARCH_AAEC2000 ||\
1644 ARCH_L7200
1645 default 0xc0028000 if ARCH_CLPS711X
1646 default 0x70008000 if ARCH_AT91 && (ARCH_AT91CAP9 || ARCH_AT91SAM9G45)
1647 default 0x20008000 if ARCH_AT91 && !(ARCH_AT91CAP9 || ARCH_AT91SAM9G45)
1648 default 0xc0008000 if ARCH_DAVINCI && ARCH_DAVINCI_DA8XX
1649 default 0x80008000 if ARCH_DAVINCI && !ARCH_DAVINCI_DA8XX
1650 default 0x00008000 if ARCH_EP93XX && EP93XX_SDCE3_SYNC_PHYS_OFFSET
1651 default 0xc0008000 if ARCH_EP93XX && EP93XX_SDCE0_PHYS_OFFSET
1652 default 0xd0008000 if ARCH_EP93XX && EP93XX_SDCE1_PHYS_OFFSET
1653 default 0xe0008000 if ARCH_EP93XX && EP93XX_SDCE2_PHYS_OFFSET
1654 default 0xf0008000 if ARCH_EP93XX && EP93XX_SDCE3_ASYNC_PHYS_OFFSET
1655 default 0x00008000 if ARCH_GEMINI && GEMINI_MEM_SWAP
1656 default 0x10008000 if ARCH_GEMINI && !GEMINI_MEM_SWAP
1657 default 0x70008000 if ARCH_REALVIEW && REALVIEW_HIGH_PHYS_OFFSET
1658 default 0x00008000 if ARCH_REALVIEW && !REALVIEW_HIGH_PHYS_OFFSET
1659 default 0xc0208000 if ARCH_SA1100 && SA1111
1660 default 0xc0008000 if ARCH_SA1100 && !SA1111
1661 default 0x30108000 if ARCH_S3C2410 && PM_H1940
1662 default 0x28E08000 if ARCH_U300 && MACH_U300_SINGLE_RAM
1663 default 0x48008000 if ARCH_U300 && !MACH_U300_SINGLE_RAM
1664 help
1665 ZRELADDR is the physical address where the decompressed kernel
1666 image will be placed. ZRELADDR has to be specified when the
1667 assumption of AUTO_ZRELADDR is not valid, or when ZBOOT_ROM is
1668 selected.
1669
1670endmenu 1579endmenu
1671 1580
1672menu "CPU Power Management" 1581menu "CPU Power Management"
diff --git a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile
index f705213caa88..4a590f4113e2 100644
--- a/arch/arm/boot/Makefile
+++ b/arch/arm/boot/Makefile
@@ -14,16 +14,18 @@
14MKIMAGE := $(srctree)/scripts/mkuboot.sh 14MKIMAGE := $(srctree)/scripts/mkuboot.sh
15 15
16ifneq ($(MACHINE),) 16ifneq ($(MACHINE),)
17-include $(srctree)/$(MACHINE)/Makefile.boot 17include $(srctree)/$(MACHINE)/Makefile.boot
18endif 18endif
19 19
20# Note: the following conditions must always be true: 20# Note: the following conditions must always be true:
21# ZRELADDR == virt_to_phys(PAGE_OFFSET + TEXT_OFFSET)
21# PARAMS_PHYS must be within 4MB of ZRELADDR 22# PARAMS_PHYS must be within 4MB of ZRELADDR
22# INITRD_PHYS must be in RAM 23# INITRD_PHYS must be in RAM
24ZRELADDR := $(zreladdr-y)
23PARAMS_PHYS := $(params_phys-y) 25PARAMS_PHYS := $(params_phys-y)
24INITRD_PHYS := $(initrd_phys-y) 26INITRD_PHYS := $(initrd_phys-y)
25 27
26export INITRD_PHYS PARAMS_PHYS 28export ZRELADDR INITRD_PHYS PARAMS_PHYS
27 29
28targets := Image zImage xipImage bootpImage uImage 30targets := Image zImage xipImage bootpImage uImage
29 31
@@ -65,7 +67,7 @@ quiet_cmd_uimage = UIMAGE $@
65ifeq ($(CONFIG_ZBOOT_ROM),y) 67ifeq ($(CONFIG_ZBOOT_ROM),y)
66$(obj)/uImage: LOADADDR=$(CONFIG_ZBOOT_ROM_TEXT) 68$(obj)/uImage: LOADADDR=$(CONFIG_ZBOOT_ROM_TEXT)
67else 69else
68$(obj)/uImage: LOADADDR=$(CONFIG_ZRELADDR) 70$(obj)/uImage: LOADADDR=$(ZRELADDR)
69endif 71endif
70 72
71ifeq ($(CONFIG_THUMB2_KERNEL),y) 73ifeq ($(CONFIG_THUMB2_KERNEL),y)
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index 68775e33476c..b23f6bc46cfa 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -79,6 +79,10 @@ endif
79EXTRA_CFLAGS := -fpic -fno-builtin 79EXTRA_CFLAGS := -fpic -fno-builtin
80EXTRA_AFLAGS := -Wa,-march=all 80EXTRA_AFLAGS := -Wa,-march=all
81 81
82# Supply ZRELADDR to the decompressor via a linker symbol.
83ifneq ($(CONFIG_AUTO_ZRELADDR),y)
84LDFLAGS_vmlinux := --defsym zreladdr=$(ZRELADDR)
85endif
82ifeq ($(CONFIG_CPU_ENDIAN_BE8),y) 86ifeq ($(CONFIG_CPU_ENDIAN_BE8),y)
83LDFLAGS_vmlinux += --be8 87LDFLAGS_vmlinux += --be8
84endif 88endif
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 6af9907c3b5c..6825c34646d4 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -177,7 +177,7 @@ not_angel:
177 and r4, pc, #0xf8000000 177 and r4, pc, #0xf8000000
178 add r4, r4, #TEXT_OFFSET 178 add r4, r4, #TEXT_OFFSET
179#else 179#else
180 ldr r4, =CONFIG_ZRELADDR 180 ldr r4, =zreladdr
181#endif 181#endif
182 subs r0, r0, r1 @ calculate the delta offset 182 subs r0, r0, r1 @ calculate the delta offset
183 183
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c
index 6c0913562455..7974baacafce 100644
--- a/arch/arm/common/it8152.c
+++ b/arch/arm/common/it8152.c
@@ -263,6 +263,14 @@ static int it8152_pci_platform_notify_remove(struct device *dev)
263 return 0; 263 return 0;
264} 264}
265 265
266int dma_needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size)
267{
268 dev_dbg(dev, "%s: dma_addr %08x, size %08x\n",
269 __func__, dma_addr, size);
270 return (dev->bus == &pci_bus_type) &&
271 ((dma_addr + size - PHYS_OFFSET) >= SZ_64M);
272}
273
266int __init it8152_pci_setup(int nr, struct pci_sys_data *sys) 274int __init it8152_pci_setup(int nr, struct pci_sys_data *sys)
267{ 275{
268 it8152_io.start = IT8152_IO_BASE + 0x12000; 276 it8152_io.start = IT8152_IO_BASE + 0x12000;
diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h
index c226fe10553e..c568da7dcae4 100644
--- a/arch/arm/include/asm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
@@ -288,15 +288,7 @@ extern void dmabounce_unregister_dev(struct device *);
288 * DMA access and 1 if the buffer needs to be bounced. 288 * DMA access and 1 if the buffer needs to be bounced.
289 * 289 *
290 */ 290 */
291#ifdef CONFIG_SA1111
292extern int dma_needs_bounce(struct device*, dma_addr_t, size_t); 291extern int dma_needs_bounce(struct device*, dma_addr_t, size_t);
293#else
294static inline int dma_needs_bounce(struct device *dev, dma_addr_t addr,
295 size_t size)
296{
297 return 0;
298}
299#endif
300 292
301/* 293/*
302 * The DMA API, implemented by dmabounce.c. See below for descriptions. 294 * The DMA API, implemented by dmabounce.c. See below for descriptions.
diff --git a/arch/arm/include/asm/perf_event.h b/arch/arm/include/asm/perf_event.h
index 48837e6d8887..b5799a3b7117 100644
--- a/arch/arm/include/asm/perf_event.h
+++ b/arch/arm/include/asm/perf_event.h
@@ -17,7 +17,7 @@
17 * counter interrupts are regular interrupts and not an NMI. This 17 * counter interrupts are regular interrupts and not an NMI. This
18 * means that when we receive the interrupt we can call 18 * means that when we receive the interrupt we can call
19 * perf_event_do_pending() that handles all of the work with 19 * perf_event_do_pending() that handles all of the work with
20 * interrupts enabled. 20 * interrupts disabled.
21 */ 21 */
22static inline void 22static inline void
23set_perf_event_pending(void) 23set_perf_event_pending(void)
diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h
index d02cfb683487..c891eb76c0e3 100644
--- a/arch/arm/include/asm/unistd.h
+++ b/arch/arm/include/asm/unistd.h
@@ -393,6 +393,9 @@
393#define __NR_perf_event_open (__NR_SYSCALL_BASE+364) 393#define __NR_perf_event_open (__NR_SYSCALL_BASE+364)
394#define __NR_recvmmsg (__NR_SYSCALL_BASE+365) 394#define __NR_recvmmsg (__NR_SYSCALL_BASE+365)
395#define __NR_accept4 (__NR_SYSCALL_BASE+366) 395#define __NR_accept4 (__NR_SYSCALL_BASE+366)
396#define __NR_fanotify_init (__NR_SYSCALL_BASE+367)
397#define __NR_fanotify_mark (__NR_SYSCALL_BASE+368)
398#define __NR_prlimit64 (__NR_SYSCALL_BASE+369)
396 399
397/* 400/*
398 * The following SWIs are ARM private. 401 * The following SWIs are ARM private.
diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S
index afeb71fa72cb..5c26eccef998 100644
--- a/arch/arm/kernel/calls.S
+++ b/arch/arm/kernel/calls.S
@@ -376,6 +376,9 @@
376 CALL(sys_perf_event_open) 376 CALL(sys_perf_event_open)
377/* 365 */ CALL(sys_recvmmsg) 377/* 365 */ CALL(sys_recvmmsg)
378 CALL(sys_accept4) 378 CALL(sys_accept4)
379 CALL(sys_fanotify_init)
380 CALL(sys_fanotify_mark)
381 CALL(sys_prlimit64)
379#ifndef syscalls_counted 382#ifndef syscalls_counted
380.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls 383.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
381#define syscalls_counted 384#define syscalls_counted
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 417c392ddf1c..ecbb0288e5dd 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -319,8 +319,8 @@ validate_event(struct cpu_hw_events *cpuc,
319{ 319{
320 struct hw_perf_event fake_event = event->hw; 320 struct hw_perf_event fake_event = event->hw;
321 321
322 if (event->pmu && event->pmu != &pmu) 322 if (event->pmu != &pmu || event->state <= PERF_EVENT_STATE_OFF)
323 return 0; 323 return 1;
324 324
325 return armpmu->get_event_idx(cpuc, &fake_event) >= 0; 325 return armpmu->get_event_idx(cpuc, &fake_event) >= 0;
326} 326}
@@ -1041,8 +1041,8 @@ armv6pmu_handle_irq(int irq_num,
1041 /* 1041 /*
1042 * Handle the pending perf events. 1042 * Handle the pending perf events.
1043 * 1043 *
1044 * Note: this call *must* be run with interrupts enabled. For 1044 * Note: this call *must* be run with interrupts disabled. For
1045 * platforms that can have the PMU interrupts raised as a PMI, this 1045 * platforms that can have the PMU interrupts raised as an NMI, this
1046 * will not work. 1046 * will not work.
1047 */ 1047 */
1048 perf_event_do_pending(); 1048 perf_event_do_pending();
@@ -2017,8 +2017,8 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev)
2017 /* 2017 /*
2018 * Handle the pending perf events. 2018 * Handle the pending perf events.
2019 * 2019 *
2020 * Note: this call *must* be run with interrupts enabled. For 2020 * Note: this call *must* be run with interrupts disabled. For
2021 * platforms that can have the PMU interrupts raised as a PMI, this 2021 * platforms that can have the PMU interrupts raised as an NMI, this
2022 * will not work. 2022 * will not work.
2023 */ 2023 */
2024 perf_event_do_pending(); 2024 perf_event_do_pending();
diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c
index 8bf3cec98cfa..4566bd1c8660 100644
--- a/arch/arm/mach-ep93xx/clock.c
+++ b/arch/arm/mach-ep93xx/clock.c
@@ -560,4 +560,4 @@ static int __init ep93xx_clock_init(void)
560 clkdev_add_table(clocks, ARRAY_SIZE(clocks)); 560 clkdev_add_table(clocks, ARRAY_SIZE(clocks));
561 return 0; 561 return 0;
562} 562}
563arch_initcall(ep93xx_clock_init); 563postcore_initcall(ep93xx_clock_init);
diff --git a/arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c b/arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c
index 91931dcb0689..4aaadc753d3e 100644
--- a/arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c
+++ b/arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c
@@ -215,7 +215,7 @@ struct imx_ssi_platform_data eukrea_mbimxsd_ssi_pdata = {
215 * Add platform devices present on this baseboard and init 215 * Add platform devices present on this baseboard and init
216 * them from CPU side as far as required to use them later on 216 * them from CPU side as far as required to use them later on
217 */ 217 */
218void __init eukrea_mbimxsd_baseboard_init(void) 218void __init eukrea_mbimxsd25_baseboard_init(void)
219{ 219{
220 if (mxc_iomux_v3_setup_multiple_pads(eukrea_mbimxsd_pads, 220 if (mxc_iomux_v3_setup_multiple_pads(eukrea_mbimxsd_pads,
221 ARRAY_SIZE(eukrea_mbimxsd_pads))) 221 ARRAY_SIZE(eukrea_mbimxsd_pads)))
diff --git a/arch/arm/mach-mx25/mach-cpuimx25.c b/arch/arm/mach-mx25/mach-cpuimx25.c
index a5f0174290b4..e064bb3d6919 100644
--- a/arch/arm/mach-mx25/mach-cpuimx25.c
+++ b/arch/arm/mach-mx25/mach-cpuimx25.c
@@ -147,8 +147,8 @@ static void __init eukrea_cpuimx25_init(void)
147 if (!otg_mode_host) 147 if (!otg_mode_host)
148 mxc_register_device(&otg_udc_device, &otg_device_pdata); 148 mxc_register_device(&otg_udc_device, &otg_device_pdata);
149 149
150#ifdef CONFIG_MACH_EUKREA_MBIMXSD_BASEBOARD 150#ifdef CONFIG_MACH_EUKREA_MBIMXSD25_BASEBOARD
151 eukrea_mbimxsd_baseboard_init(); 151 eukrea_mbimxsd25_baseboard_init();
152#endif 152#endif
153} 153}
154 154
diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c
index d3af0fdf8475..7a62e744a8b0 100644
--- a/arch/arm/mach-mx3/clock-imx35.c
+++ b/arch/arm/mach-mx3/clock-imx35.c
@@ -155,7 +155,7 @@ static unsigned long get_rate_arm(void)
155 155
156 aad = &clk_consumer[(pdr0 >> 16) & 0xf]; 156 aad = &clk_consumer[(pdr0 >> 16) & 0xf];
157 if (aad->sel) 157 if (aad->sel)
158 fref = fref * 2 / 3; 158 fref = fref * 3 / 4;
159 159
160 return fref / aad->arm; 160 return fref / aad->arm;
161} 161}
@@ -164,7 +164,7 @@ static unsigned long get_rate_ahb(struct clk *clk)
164{ 164{
165 unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0); 165 unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0);
166 struct arm_ahb_div *aad; 166 struct arm_ahb_div *aad;
167 unsigned long fref = get_rate_mpll(); 167 unsigned long fref = get_rate_arm();
168 168
169 aad = &clk_consumer[(pdr0 >> 16) & 0xf]; 169 aad = &clk_consumer[(pdr0 >> 16) & 0xf];
170 170
@@ -176,16 +176,11 @@ static unsigned long get_rate_ipg(struct clk *clk)
176 return get_rate_ahb(NULL) >> 1; 176 return get_rate_ahb(NULL) >> 1;
177} 177}
178 178
179static unsigned long get_3_3_div(unsigned long in)
180{
181 return (((in >> 3) & 0x7) + 1) * ((in & 0x7) + 1);
182}
183
184static unsigned long get_rate_uart(struct clk *clk) 179static unsigned long get_rate_uart(struct clk *clk)
185{ 180{
186 unsigned long pdr3 = __raw_readl(CCM_BASE + CCM_PDR3); 181 unsigned long pdr3 = __raw_readl(CCM_BASE + CCM_PDR3);
187 unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4); 182 unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4);
188 unsigned long div = get_3_3_div(pdr4 >> 10); 183 unsigned long div = ((pdr4 >> 10) & 0x3f) + 1;
189 184
190 if (pdr3 & (1 << 14)) 185 if (pdr3 & (1 << 14))
191 return get_rate_arm() / div; 186 return get_rate_arm() / div;
@@ -216,7 +211,7 @@ static unsigned long get_rate_sdhc(struct clk *clk)
216 break; 211 break;
217 } 212 }
218 213
219 return rate / get_3_3_div(div); 214 return rate / (div + 1);
220} 215}
221 216
222static unsigned long get_rate_mshc(struct clk *clk) 217static unsigned long get_rate_mshc(struct clk *clk)
@@ -270,7 +265,7 @@ static unsigned long get_rate_csi(struct clk *clk)
270 else 265 else
271 rate = get_rate_ppll(); 266 rate = get_rate_ppll();
272 267
273 return rate / get_3_3_div((pdr2 >> 16) & 0x3f); 268 return rate / (((pdr2 >> 16) & 0x3f) + 1);
274} 269}
275 270
276static unsigned long get_rate_otg(struct clk *clk) 271static unsigned long get_rate_otg(struct clk *clk)
@@ -283,25 +278,51 @@ static unsigned long get_rate_otg(struct clk *clk)
283 else 278 else
284 rate = get_rate_ppll(); 279 rate = get_rate_ppll();
285 280
286 return rate / get_3_3_div((pdr4 >> 22) & 0x3f); 281 return rate / (((pdr4 >> 22) & 0x3f) + 1);
287} 282}
288 283
289static unsigned long get_rate_ipg_per(struct clk *clk) 284static unsigned long get_rate_ipg_per(struct clk *clk)
290{ 285{
291 unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0); 286 unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0);
292 unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4); 287 unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4);
293 unsigned long div1, div2; 288 unsigned long div;
294 289
295 if (pdr0 & (1 << 26)) { 290 if (pdr0 & (1 << 26)) {
296 div1 = (pdr4 >> 19) & 0x7; 291 div = (pdr4 >> 16) & 0x3f;
297 div2 = (pdr4 >> 16) & 0x7; 292 return get_rate_arm() / (div + 1);
298 return get_rate_arm() / ((div1 + 1) * (div2 + 1));
299 } else { 293 } else {
300 div1 = (pdr0 >> 12) & 0x7; 294 div = (pdr0 >> 12) & 0x7;
301 return get_rate_ahb(NULL) / div1; 295 return get_rate_ahb(NULL) / (div + 1);
302 } 296 }
303} 297}
304 298
299static unsigned long get_rate_hsp(struct clk *clk)
300{
301 unsigned long hsp_podf = (__raw_readl(CCM_BASE + CCM_PDR0) >> 20) & 0x03;
302 unsigned long fref = get_rate_mpll();
303
304 if (fref > 400 * 1000 * 1000) {
305 switch (hsp_podf) {
306 case 0:
307 return fref >> 2;
308 case 1:
309 return fref >> 3;
310 case 2:
311 return fref / 3;
312 }
313 } else {
314 switch (hsp_podf) {
315 case 0:
316 case 2:
317 return fref / 3;
318 case 1:
319 return fref / 6;
320 }
321 }
322
323 return 0;
324}
325
305static int clk_cgr_enable(struct clk *clk) 326static int clk_cgr_enable(struct clk *clk)
306{ 327{
307 u32 reg; 328 u32 reg;
@@ -359,7 +380,7 @@ DEFINE_CLOCK(i2c1_clk, 0, CCM_CGR1, 10, get_rate_ipg_per, NULL);
359DEFINE_CLOCK(i2c2_clk, 1, CCM_CGR1, 12, get_rate_ipg_per, NULL); 380DEFINE_CLOCK(i2c2_clk, 1, CCM_CGR1, 12, get_rate_ipg_per, NULL);
360DEFINE_CLOCK(i2c3_clk, 2, CCM_CGR1, 14, get_rate_ipg_per, NULL); 381DEFINE_CLOCK(i2c3_clk, 2, CCM_CGR1, 14, get_rate_ipg_per, NULL);
361DEFINE_CLOCK(iomuxc_clk, 0, CCM_CGR1, 16, NULL, NULL); 382DEFINE_CLOCK(iomuxc_clk, 0, CCM_CGR1, 16, NULL, NULL);
362DEFINE_CLOCK(ipu_clk, 0, CCM_CGR1, 18, get_rate_ahb, NULL); 383DEFINE_CLOCK(ipu_clk, 0, CCM_CGR1, 18, get_rate_hsp, NULL);
363DEFINE_CLOCK(kpp_clk, 0, CCM_CGR1, 20, get_rate_ipg, NULL); 384DEFINE_CLOCK(kpp_clk, 0, CCM_CGR1, 20, get_rate_ipg, NULL);
364DEFINE_CLOCK(mlb_clk, 0, CCM_CGR1, 22, get_rate_ahb, NULL); 385DEFINE_CLOCK(mlb_clk, 0, CCM_CGR1, 22, get_rate_ahb, NULL);
365DEFINE_CLOCK(mshc_clk, 0, CCM_CGR1, 24, get_rate_mshc, NULL); 386DEFINE_CLOCK(mshc_clk, 0, CCM_CGR1, 24, get_rate_mshc, NULL);
@@ -485,10 +506,10 @@ static struct clk_lookup lookups[] = {
485 506
486int __init mx35_clocks_init() 507int __init mx35_clocks_init()
487{ 508{
488 unsigned int ll = 0; 509 unsigned int cgr2 = 3 << 26, cgr3 = 0;
489 510
490#if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC) 511#if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC)
491 ll = (3 << 16); 512 cgr2 |= 3 << 16;
492#endif 513#endif
493 514
494 clkdev_add_table(lookups, ARRAY_SIZE(lookups)); 515 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
@@ -499,8 +520,20 @@ int __init mx35_clocks_init()
499 __raw_writel((3 << 18), CCM_BASE + CCM_CGR0); 520 __raw_writel((3 << 18), CCM_BASE + CCM_CGR0);
500 __raw_writel((3 << 2) | (3 << 4) | (3 << 6) | (3 << 8) | (3 << 16), 521 __raw_writel((3 << 2) | (3 << 4) | (3 << 6) | (3 << 8) | (3 << 16),
501 CCM_BASE + CCM_CGR1); 522 CCM_BASE + CCM_CGR1);
502 __raw_writel((3 << 26) | ll, CCM_BASE + CCM_CGR2); 523
503 __raw_writel(0, CCM_BASE + CCM_CGR3); 524 /*
525 * Check if we came up in internal boot mode. If yes, we need some
526 * extra clocks turned on, otherwise the MX35 boot ROM code will
527 * hang after a watchdog reset.
528 */
529 if (!(__raw_readl(CCM_BASE + CCM_RCSR) & (3 << 10))) {
530 /* Additionally turn on UART1, SCC, and IIM clocks */
531 cgr2 |= 3 << 16 | 3 << 4;
532 cgr3 |= 3 << 2;
533 }
534
535 __raw_writel(cgr2, CCM_BASE + CCM_CGR2);
536 __raw_writel(cgr3, CCM_BASE + CCM_CGR3);
504 537
505 mxc_timer_init(&gpt_clk, 538 mxc_timer_init(&gpt_clk,
506 MX35_IO_ADDRESS(MX35_GPT1_BASE_ADDR), MX35_INT_GPT); 539 MX35_IO_ADDRESS(MX35_GPT1_BASE_ADDR), MX35_INT_GPT);
diff --git a/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c b/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c
index 1dc5004df866..f8f15e3ac7a0 100644
--- a/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c
+++ b/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c
@@ -216,7 +216,7 @@ struct imx_ssi_platform_data eukrea_mbimxsd_ssi_pdata = {
216 * Add platform devices present on this baseboard and init 216 * Add platform devices present on this baseboard and init
217 * them from CPU side as far as required to use them later on 217 * them from CPU side as far as required to use them later on
218 */ 218 */
219void __init eukrea_mbimxsd_baseboard_init(void) 219void __init eukrea_mbimxsd35_baseboard_init(void)
220{ 220{
221 if (mxc_iomux_v3_setup_multiple_pads(eukrea_mbimxsd_pads, 221 if (mxc_iomux_v3_setup_multiple_pads(eukrea_mbimxsd_pads,
222 ARRAY_SIZE(eukrea_mbimxsd_pads))) 222 ARRAY_SIZE(eukrea_mbimxsd_pads)))
diff --git a/arch/arm/mach-mx3/mach-cpuimx35.c b/arch/arm/mach-mx3/mach-cpuimx35.c
index 9770a6a973be..2a4f8b781ba4 100644
--- a/arch/arm/mach-mx3/mach-cpuimx35.c
+++ b/arch/arm/mach-mx3/mach-cpuimx35.c
@@ -201,8 +201,8 @@ static void __init mxc_board_init(void)
201 if (!otg_mode_host) 201 if (!otg_mode_host)
202 mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata); 202 mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata);
203 203
204#ifdef CONFIG_MACH_EUKREA_MBIMXSD_BASEBOARD 204#ifdef CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD
205 eukrea_mbimxsd_baseboard_init(); 205 eukrea_mbimxsd35_baseboard_init();
206#endif 206#endif
207} 207}
208 208
diff --git a/arch/arm/mach-mx5/clock-mx51.c b/arch/arm/mach-mx5/clock-mx51.c
index 6af69def357f..57c10a9926cc 100644
--- a/arch/arm/mach-mx5/clock-mx51.c
+++ b/arch/arm/mach-mx5/clock-mx51.c
@@ -56,7 +56,7 @@ static void _clk_ccgr_disable(struct clk *clk)
56{ 56{
57 u32 reg; 57 u32 reg;
58 reg = __raw_readl(clk->enable_reg); 58 reg = __raw_readl(clk->enable_reg);
59 reg &= ~(MXC_CCM_CCGRx_MOD_OFF << clk->enable_shift); 59 reg &= ~(MXC_CCM_CCGRx_CG_MASK << clk->enable_shift);
60 __raw_writel(reg, clk->enable_reg); 60 __raw_writel(reg, clk->enable_reg);
61 61
62} 62}
diff --git a/arch/arm/mach-pxa/cpufreq-pxa2xx.c b/arch/arm/mach-pxa/cpufreq-pxa2xx.c
index 268a9bc6be8a..50d5939a78f1 100644
--- a/arch/arm/mach-pxa/cpufreq-pxa2xx.c
+++ b/arch/arm/mach-pxa/cpufreq-pxa2xx.c
@@ -398,7 +398,7 @@ static int pxa_set_target(struct cpufreq_policy *policy,
398 return 0; 398 return 0;
399} 399}
400 400
401static __init int pxa_cpufreq_init(struct cpufreq_policy *policy) 401static int pxa_cpufreq_init(struct cpufreq_policy *policy)
402{ 402{
403 int i; 403 int i;
404 unsigned int freq; 404 unsigned int freq;
diff --git a/arch/arm/mach-pxa/cpufreq-pxa3xx.c b/arch/arm/mach-pxa/cpufreq-pxa3xx.c
index 27fa329d9a8b..0a0d0fe99220 100644
--- a/arch/arm/mach-pxa/cpufreq-pxa3xx.c
+++ b/arch/arm/mach-pxa/cpufreq-pxa3xx.c
@@ -204,7 +204,7 @@ static int pxa3xx_cpufreq_set(struct cpufreq_policy *policy,
204 return 0; 204 return 0;
205} 205}
206 206
207static __init int pxa3xx_cpufreq_init(struct cpufreq_policy *policy) 207static int pxa3xx_cpufreq_init(struct cpufreq_policy *policy)
208{ 208{
209 int ret = -EINVAL; 209 int ret = -EINVAL;
210 210
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa300.h b/arch/arm/mach-pxa/include/mach/mfp-pxa300.h
index 7139e0dc26d1..4e1287070d21 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa300.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa300.h
@@ -71,10 +71,10 @@
71#define GPIO46_CI_DD_7 MFP_CFG_DRV(GPIO46, AF0, DS04X) 71#define GPIO46_CI_DD_7 MFP_CFG_DRV(GPIO46, AF0, DS04X)
72#define GPIO47_CI_DD_8 MFP_CFG_DRV(GPIO47, AF1, DS04X) 72#define GPIO47_CI_DD_8 MFP_CFG_DRV(GPIO47, AF1, DS04X)
73#define GPIO48_CI_DD_9 MFP_CFG_DRV(GPIO48, AF1, DS04X) 73#define GPIO48_CI_DD_9 MFP_CFG_DRV(GPIO48, AF1, DS04X)
74#define GPIO52_CI_HSYNC MFP_CFG_DRV(GPIO52, AF0, DS04X)
75#define GPIO51_CI_VSYNC MFP_CFG_DRV(GPIO51, AF0, DS04X)
76#define GPIO49_CI_MCLK MFP_CFG_DRV(GPIO49, AF0, DS04X) 74#define GPIO49_CI_MCLK MFP_CFG_DRV(GPIO49, AF0, DS04X)
77#define GPIO50_CI_PCLK MFP_CFG_DRV(GPIO50, AF0, DS04X) 75#define GPIO50_CI_PCLK MFP_CFG_DRV(GPIO50, AF0, DS04X)
76#define GPIO51_CI_HSYNC MFP_CFG_DRV(GPIO51, AF0, DS04X)
77#define GPIO52_CI_VSYNC MFP_CFG_DRV(GPIO52, AF0, DS04X)
78 78
79/* KEYPAD */ 79/* KEYPAD */
80#define GPIO3_KP_DKIN_6 MFP_CFG_LPM(GPIO3, AF2, FLOAT) 80#define GPIO3_KP_DKIN_6 MFP_CFG_LPM(GPIO3, AF2, FLOAT)
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 5e16b4c69222..ae416fe7daf2 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -3,7 +3,7 @@
3# 3#
4 4
5# Common objects 5# Common objects
6obj-y := timer.o console.o clock.o 6obj-y := timer.o console.o clock.o pm_runtime.o
7 7
8# CPU objects 8# CPU objects
9obj-$(CONFIG_ARCH_SH7367) += setup-sh7367.o clock-sh7367.o intc-sh7367.o 9obj-$(CONFIG_ARCH_SH7367) += setup-sh7367.o clock-sh7367.o intc-sh7367.o
diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index 23d472f9525e..95935c83c306 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -25,6 +25,7 @@
25#include <linux/platform_device.h> 25#include <linux/platform_device.h>
26#include <linux/delay.h> 26#include <linux/delay.h>
27#include <linux/mfd/sh_mobile_sdhi.h> 27#include <linux/mfd/sh_mobile_sdhi.h>
28#include <linux/mfd/tmio.h>
28#include <linux/mmc/host.h> 29#include <linux/mmc/host.h>
29#include <linux/mtd/mtd.h> 30#include <linux/mtd/mtd.h>
30#include <linux/mtd/partitions.h> 31#include <linux/mtd/partitions.h>
@@ -39,6 +40,7 @@
39#include <linux/sh_clk.h> 40#include <linux/sh_clk.h>
40#include <linux/gpio.h> 41#include <linux/gpio.h>
41#include <linux/input.h> 42#include <linux/input.h>
43#include <linux/leds.h>
42#include <linux/input/sh_keysc.h> 44#include <linux/input/sh_keysc.h>
43#include <linux/usb/r8a66597.h> 45#include <linux/usb/r8a66597.h>
44 46
@@ -307,6 +309,7 @@ static struct sh_mobile_sdhi_info sdhi1_info = {
307 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX, 309 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
308 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX, 310 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
309 .tmio_ocr_mask = MMC_VDD_165_195, 311 .tmio_ocr_mask = MMC_VDD_165_195,
312 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
310}; 313};
311 314
312static struct resource sdhi1_resources[] = { 315static struct resource sdhi1_resources[] = {
@@ -558,7 +561,7 @@ static struct resource fsi_resources[] = {
558 561
559static struct platform_device fsi_device = { 562static struct platform_device fsi_device = {
560 .name = "sh_fsi2", 563 .name = "sh_fsi2",
561 .id = 0, 564 .id = -1,
562 .num_resources = ARRAY_SIZE(fsi_resources), 565 .num_resources = ARRAY_SIZE(fsi_resources),
563 .resource = fsi_resources, 566 .resource = fsi_resources,
564 .dev = { 567 .dev = {
@@ -650,7 +653,44 @@ static struct platform_device hdmi_device = {
650 }, 653 },
651}; 654};
652 655
656static struct gpio_led ap4evb_leds[] = {
657 {
658 .name = "led4",
659 .gpio = GPIO_PORT185,
660 .default_state = LEDS_GPIO_DEFSTATE_ON,
661 },
662 {
663 .name = "led2",
664 .gpio = GPIO_PORT186,
665 .default_state = LEDS_GPIO_DEFSTATE_ON,
666 },
667 {
668 .name = "led3",
669 .gpio = GPIO_PORT187,
670 .default_state = LEDS_GPIO_DEFSTATE_ON,
671 },
672 {
673 .name = "led1",
674 .gpio = GPIO_PORT188,
675 .default_state = LEDS_GPIO_DEFSTATE_ON,
676 }
677};
678
679static struct gpio_led_platform_data ap4evb_leds_pdata = {
680 .num_leds = ARRAY_SIZE(ap4evb_leds),
681 .leds = ap4evb_leds,
682};
683
684static struct platform_device leds_device = {
685 .name = "leds-gpio",
686 .id = 0,
687 .dev = {
688 .platform_data = &ap4evb_leds_pdata,
689 },
690};
691
653static struct platform_device *ap4evb_devices[] __initdata = { 692static struct platform_device *ap4evb_devices[] __initdata = {
693 &leds_device,
654 &nor_flash_device, 694 &nor_flash_device,
655 &smc911x_device, 695 &smc911x_device,
656 &sdhi0_device, 696 &sdhi0_device,
@@ -840,20 +880,6 @@ static void __init ap4evb_init(void)
840 gpio_request(GPIO_FN_CS5A, NULL); 880 gpio_request(GPIO_FN_CS5A, NULL);
841 gpio_request(GPIO_FN_IRQ6_39, NULL); 881 gpio_request(GPIO_FN_IRQ6_39, NULL);
842 882
843 /* enable LED 1 - 4 */
844 gpio_request(GPIO_PORT185, NULL);
845 gpio_request(GPIO_PORT186, NULL);
846 gpio_request(GPIO_PORT187, NULL);
847 gpio_request(GPIO_PORT188, NULL);
848 gpio_direction_output(GPIO_PORT185, 1);
849 gpio_direction_output(GPIO_PORT186, 1);
850 gpio_direction_output(GPIO_PORT187, 1);
851 gpio_direction_output(GPIO_PORT188, 1);
852 gpio_export(GPIO_PORT185, 0);
853 gpio_export(GPIO_PORT186, 0);
854 gpio_export(GPIO_PORT187, 0);
855 gpio_export(GPIO_PORT188, 0);
856
857 /* enable Debug switch (S6) */ 883 /* enable Debug switch (S6) */
858 gpio_request(GPIO_PORT32, NULL); 884 gpio_request(GPIO_PORT32, NULL);
859 gpio_request(GPIO_PORT33, NULL); 885 gpio_request(GPIO_PORT33, NULL);
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index fb4e9b1d788e..759468992ad2 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -286,7 +286,6 @@ static struct clk_ops pllc2_clk_ops = {
286 286
287struct clk pllc2_clk = { 287struct clk pllc2_clk = {
288 .ops = &pllc2_clk_ops, 288 .ops = &pllc2_clk_ops,
289 .flags = CLK_ENABLE_ON_INIT,
290 .parent = &extal1_div2_clk, 289 .parent = &extal1_div2_clk,
291 .freq_table = pllc2_freq_table, 290 .freq_table = pllc2_freq_table,
292 .parent_table = pllc2_parent, 291 .parent_table = pllc2_parent,
@@ -395,7 +394,7 @@ static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = {
395 394
396enum { MSTP001, 395enum { MSTP001,
397 MSTP131, MSTP130, 396 MSTP131, MSTP130,
398 MSTP129, MSTP128, 397 MSTP129, MSTP128, MSTP127, MSTP126,
399 MSTP118, MSTP117, MSTP116, 398 MSTP118, MSTP117, MSTP116,
400 MSTP106, MSTP101, MSTP100, 399 MSTP106, MSTP101, MSTP100,
401 MSTP223, 400 MSTP223,
@@ -413,6 +412,8 @@ static struct clk mstp_clks[MSTP_NR] = {
413 [MSTP130] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 30, 0), /* VEU2 */ 412 [MSTP130] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 30, 0), /* VEU2 */
414 [MSTP129] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 29, 0), /* VEU1 */ 413 [MSTP129] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 29, 0), /* VEU1 */
415 [MSTP128] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 28, 0), /* VEU0 */ 414 [MSTP128] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 28, 0), /* VEU0 */
415 [MSTP127] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 27, 0), /* CEU */
416 [MSTP126] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 26, 0), /* CSI2 */
416 [MSTP118] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 18, 0), /* DSITX */ 417 [MSTP118] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 18, 0), /* DSITX */
417 [MSTP117] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 17, 0), /* LCDC1 */ 418 [MSTP117] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 17, 0), /* LCDC1 */
418 [MSTP116] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 16, 0), /* IIC0 */ 419 [MSTP116] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 16, 0), /* IIC0 */
@@ -428,7 +429,7 @@ static struct clk mstp_clks[MSTP_NR] = {
428 [MSTP201] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 1, 0), /* SCIFA3 */ 429 [MSTP201] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 1, 0), /* SCIFA3 */
429 [MSTP200] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 0, 0), /* SCIFA4 */ 430 [MSTP200] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 0, 0), /* SCIFA4 */
430 [MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */ 431 [MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */
431 [MSTP328] = MSTP(&div6_clks[DIV6_SPU], SMSTPCR3, 28, CLK_ENABLE_ON_INIT), /* FSIA */ 432 [MSTP328] = MSTP(&div6_clks[DIV6_SPU], SMSTPCR3, 28, 0), /* FSIA */
432 [MSTP323] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 23, 0), /* IIC1 */ 433 [MSTP323] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 23, 0), /* IIC1 */
433 [MSTP322] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 22, 0), /* USB0 */ 434 [MSTP322] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 22, 0), /* USB0 */
434 [MSTP314] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 14, 0), /* SDHI0 */ 435 [MSTP314] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 14, 0), /* SDHI0 */
@@ -498,6 +499,8 @@ static struct clk_lookup lookups[] = {
498 CLKDEV_DEV_ID("uio_pdrv_genirq.3", &mstp_clks[MSTP130]), /* VEU2 */ 499 CLKDEV_DEV_ID("uio_pdrv_genirq.3", &mstp_clks[MSTP130]), /* VEU2 */
499 CLKDEV_DEV_ID("uio_pdrv_genirq.2", &mstp_clks[MSTP129]), /* VEU1 */ 500 CLKDEV_DEV_ID("uio_pdrv_genirq.2", &mstp_clks[MSTP129]), /* VEU1 */
500 CLKDEV_DEV_ID("uio_pdrv_genirq.1", &mstp_clks[MSTP128]), /* VEU0 */ 501 CLKDEV_DEV_ID("uio_pdrv_genirq.1", &mstp_clks[MSTP128]), /* VEU0 */
502 CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]), /* CEU */
503 CLKDEV_DEV_ID("sh-mobile-csi2.0", &mstp_clks[MSTP126]), /* CSI2 */
501 CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */ 504 CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */
502 CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP117]), /* LCDC1 */ 505 CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP117]), /* LCDC1 */
503 CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* IIC0 */ 506 CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* IIC0 */
diff --git a/arch/arm/mach-shmobile/clock.c b/arch/arm/mach-shmobile/clock.c
index b7c705a213a2..6b7c7c42bc8f 100644
--- a/arch/arm/mach-shmobile/clock.c
+++ b/arch/arm/mach-shmobile/clock.c
@@ -1,8 +1,10 @@
1/* 1/*
2 * SH-Mobile Timer 2 * SH-Mobile Clock Framework
3 * 3 *
4 * Copyright (C) 2010 Magnus Damm 4 * Copyright (C) 2010 Magnus Damm
5 * 5 *
6 * Used together with arch/arm/common/clkdev.c and drivers/sh/clk.c.
7 *
6 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by 9 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License. 10 * the Free Software Foundation; version 2 of the License.
diff --git a/arch/arm/mach-shmobile/pm_runtime.c b/arch/arm/mach-shmobile/pm_runtime.c
new file mode 100644
index 000000000000..94912d3944d3
--- /dev/null
+++ b/arch/arm/mach-shmobile/pm_runtime.c
@@ -0,0 +1,169 @@
1/*
2 * arch/arm/mach-shmobile/pm_runtime.c
3 *
4 * Runtime PM support code for SuperH Mobile ARM
5 *
6 * Copyright (C) 2009-2010 Magnus Damm
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12
13#include <linux/init.h>
14#include <linux/kernel.h>
15#include <linux/io.h>
16#include <linux/pm_runtime.h>
17#include <linux/platform_device.h>
18#include <linux/clk.h>
19#include <linux/sh_clk.h>
20#include <linux/bitmap.h>
21
22#ifdef CONFIG_PM_RUNTIME
23#define BIT_ONCE 0
24#define BIT_ACTIVE 1
25#define BIT_CLK_ENABLED 2
26
27struct pm_runtime_data {
28 unsigned long flags;
29 struct clk *clk;
30};
31
32static void __devres_release(struct device *dev, void *res)
33{
34 struct pm_runtime_data *prd = res;
35
36 dev_dbg(dev, "__devres_release()\n");
37
38 if (test_bit(BIT_CLK_ENABLED, &prd->flags))
39 clk_disable(prd->clk);
40
41 if (test_bit(BIT_ACTIVE, &prd->flags))
42 clk_put(prd->clk);
43}
44
45static struct pm_runtime_data *__to_prd(struct device *dev)
46{
47 return devres_find(dev, __devres_release, NULL, NULL);
48}
49
50static void platform_pm_runtime_init(struct device *dev,
51 struct pm_runtime_data *prd)
52{
53 if (prd && !test_and_set_bit(BIT_ONCE, &prd->flags)) {
54 prd->clk = clk_get(dev, NULL);
55 if (!IS_ERR(prd->clk)) {
56 set_bit(BIT_ACTIVE, &prd->flags);
57 dev_info(dev, "clocks managed by runtime pm\n");
58 }
59 }
60}
61
62static void platform_pm_runtime_bug(struct device *dev,
63 struct pm_runtime_data *prd)
64{
65 if (prd && !test_and_set_bit(BIT_ONCE, &prd->flags))
66 dev_err(dev, "runtime pm suspend before resume\n");
67}
68
69int platform_pm_runtime_suspend(struct device *dev)
70{
71 struct pm_runtime_data *prd = __to_prd(dev);
72
73 dev_dbg(dev, "platform_pm_runtime_suspend()\n");
74
75 platform_pm_runtime_bug(dev, prd);
76
77 if (prd && test_bit(BIT_ACTIVE, &prd->flags)) {
78 clk_disable(prd->clk);
79 clear_bit(BIT_CLK_ENABLED, &prd->flags);
80 }
81
82 return 0;
83}
84
85int platform_pm_runtime_resume(struct device *dev)
86{
87 struct pm_runtime_data *prd = __to_prd(dev);
88
89 dev_dbg(dev, "platform_pm_runtime_resume()\n");
90
91 platform_pm_runtime_init(dev, prd);
92
93 if (prd && test_bit(BIT_ACTIVE, &prd->flags)) {
94 clk_enable(prd->clk);
95 set_bit(BIT_CLK_ENABLED, &prd->flags);
96 }
97
98 return 0;
99}
100
101int platform_pm_runtime_idle(struct device *dev)
102{
103 /* suspend synchronously to disable clocks immediately */
104 return pm_runtime_suspend(dev);
105}
106
107static int platform_bus_notify(struct notifier_block *nb,
108 unsigned long action, void *data)
109{
110 struct device *dev = data;
111 struct pm_runtime_data *prd;
112
113 dev_dbg(dev, "platform_bus_notify() %ld !\n", action);
114
115 if (action == BUS_NOTIFY_BIND_DRIVER) {
116 prd = devres_alloc(__devres_release, sizeof(*prd), GFP_KERNEL);
117 if (prd)
118 devres_add(dev, prd);
119 else
120 dev_err(dev, "unable to alloc memory for runtime pm\n");
121 }
122
123 return 0;
124}
125
126#else /* CONFIG_PM_RUNTIME */
127
128static int platform_bus_notify(struct notifier_block *nb,
129 unsigned long action, void *data)
130{
131 struct device *dev = data;
132 struct clk *clk;
133
134 dev_dbg(dev, "platform_bus_notify() %ld !\n", action);
135
136 switch (action) {
137 case BUS_NOTIFY_BIND_DRIVER:
138 clk = clk_get(dev, NULL);
139 if (!IS_ERR(clk)) {
140 clk_enable(clk);
141 clk_put(clk);
142 dev_info(dev, "runtime pm disabled, clock forced on\n");
143 }
144 break;
145 case BUS_NOTIFY_UNBOUND_DRIVER:
146 clk = clk_get(dev, NULL);
147 if (!IS_ERR(clk)) {
148 clk_disable(clk);
149 clk_put(clk);
150 dev_info(dev, "runtime pm disabled, clock forced off\n");
151 }
152 break;
153 }
154
155 return 0;
156}
157
158#endif /* CONFIG_PM_RUNTIME */
159
160static struct notifier_block platform_bus_notifier = {
161 .notifier_call = platform_bus_notify
162};
163
164static int __init sh_pm_runtime_init(void)
165{
166 bus_register_notifier(&platform_bus_type, &platform_bus_notifier);
167 return 0;
168}
169core_initcall(sh_pm_runtime_init);
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 33c3f570aaa0..a0a2928ae4dd 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -398,7 +398,7 @@ config CPU_V6
398# ARMv6k 398# ARMv6k
399config CPU_32v6K 399config CPU_32v6K
400 bool "Support ARM V6K processor extensions" if !SMP 400 bool "Support ARM V6K processor extensions" if !SMP
401 depends on CPU_V6 401 depends on CPU_V6 || CPU_V7
402 default y if SMP && !(ARCH_MX3 || ARCH_OMAP2) 402 default y if SMP && !(ARCH_MX3 || ARCH_OMAP2)
403 help 403 help
404 Say Y here if your ARMv6 processor supports the 'K' extension. 404 Say Y here if your ARMv6 processor supports the 'K' extension.
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index c704eed63c5d..4bc43e535d3b 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -229,6 +229,8 @@ __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot)
229 } 229 }
230 } while (size -= PAGE_SIZE); 230 } while (size -= PAGE_SIZE);
231 231
232 dsb();
233
232 return (void *)c->vm_start; 234 return (void *)c->vm_start;
233 } 235 }
234 return NULL; 236 return NULL;
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig
index 0527e65318f4..6785db4179b8 100644
--- a/arch/arm/plat-mxc/Kconfig
+++ b/arch/arm/plat-mxc/Kconfig
@@ -43,6 +43,7 @@ config ARCH_MXC91231
43config ARCH_MX5 43config ARCH_MX5
44 bool "MX5-based" 44 bool "MX5-based"
45 select CPU_V7 45 select CPU_V7
46 select ARM_L1_CACHE_SHIFT_6
46 help 47 help
47 This enables support for systems based on the Freescale i.MX51 family 48 This enables support for systems based on the Freescale i.MX51 family
48 49
diff --git a/arch/arm/plat-mxc/include/mach/eukrea-baseboards.h b/arch/arm/plat-mxc/include/mach/eukrea-baseboards.h
index 634e3f4c454d..656acb45d434 100644
--- a/arch/arm/plat-mxc/include/mach/eukrea-baseboards.h
+++ b/arch/arm/plat-mxc/include/mach/eukrea-baseboards.h
@@ -37,9 +37,9 @@
37 * mach-mx5/eukrea_mbimx51-baseboard.c for cpuimx51 37 * mach-mx5/eukrea_mbimx51-baseboard.c for cpuimx51
38 */ 38 */
39 39
40extern void eukrea_mbimx25_baseboard_init(void); 40extern void eukrea_mbimxsd25_baseboard_init(void);
41extern void eukrea_mbimx27_baseboard_init(void); 41extern void eukrea_mbimx27_baseboard_init(void);
42extern void eukrea_mbimx35_baseboard_init(void); 42extern void eukrea_mbimxsd35_baseboard_init(void);
43extern void eukrea_mbimx51_baseboard_init(void); 43extern void eukrea_mbimx51_baseboard_init(void);
44 44
45#endif 45#endif
diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c
index b3da9aad4295..3703ab28257f 100644
--- a/arch/arm/plat-mxc/tzic.c
+++ b/arch/arm/plat-mxc/tzic.c
@@ -164,8 +164,9 @@ int tzic_enable_wake(int is_idle)
164 return -EAGAIN; 164 return -EAGAIN;
165 165
166 for (i = 0; i < 4; i++) { 166 for (i = 0; i < 4; i++) {
167 v = is_idle ? __raw_readl(TZIC_ENSET0(i)) : wakeup_intr[i]; 167 v = is_idle ? __raw_readl(tzic_base + TZIC_ENSET0(i)) :
168 __raw_writel(v, TZIC_WAKEUP0(i)); 168 wakeup_intr[i];
169 __raw_writel(v, tzic_base + TZIC_WAKEUP0(i));
169 } 170 }
170 171
171 return 0; 172 return 0;
diff --git a/arch/arm/plat-pxa/pwm.c b/arch/arm/plat-pxa/pwm.c
index 0732c6c8d511..ef32686feef9 100644
--- a/arch/arm/plat-pxa/pwm.c
+++ b/arch/arm/plat-pxa/pwm.c
@@ -176,7 +176,7 @@ static inline void __add_pwm(struct pwm_device *pwm)
176 176
177static int __devinit pwm_probe(struct platform_device *pdev) 177static int __devinit pwm_probe(struct platform_device *pdev)
178{ 178{
179 struct platform_device_id *id = platform_get_device_id(pdev); 179 const struct platform_device_id *id = platform_get_device_id(pdev);
180 struct pwm_device *pwm, *secondary = NULL; 180 struct pwm_device *pwm, *secondary = NULL;
181 struct resource *r; 181 struct resource *r;
182 int ret = 0; 182 int ret = 0;
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
index 48cbdcb6bbd4..55590a4d87c9 100644
--- a/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@ -12,7 +12,7 @@
12# 12#
13# http://www.arm.linux.org.uk/developer/machines/?action=new 13# http://www.arm.linux.org.uk/developer/machines/?action=new
14# 14#
15# Last update: Mon Jul 12 21:10:14 2010 15# Last update: Thu Sep 9 22:43:01 2010
16# 16#
17# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number 17# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
18# 18#
@@ -2622,7 +2622,7 @@ kraken MACH_KRAKEN KRAKEN 2634
2622gw2388 MACH_GW2388 GW2388 2635 2622gw2388 MACH_GW2388 GW2388 2635
2623jadecpu MACH_JADECPU JADECPU 2636 2623jadecpu MACH_JADECPU JADECPU 2636
2624carlisle MACH_CARLISLE CARLISLE 2637 2624carlisle MACH_CARLISLE CARLISLE 2637
2625lux_sf9 MACH_LUX_SFT9 LUX_SFT9 2638 2625lux_sf9 MACH_LUX_SF9 LUX_SF9 2638
2626nemid_tb MACH_NEMID_TB NEMID_TB 2639 2626nemid_tb MACH_NEMID_TB NEMID_TB 2639
2627terrier MACH_TERRIER TERRIER 2640 2627terrier MACH_TERRIER TERRIER 2640
2628turbot MACH_TURBOT TURBOT 2641 2628turbot MACH_TURBOT TURBOT 2641
@@ -2950,3 +2950,97 @@ davinci_dm365_dvr MACH_DAVINCI_DM365_DVR DAVINCI_DM365_DVR 2963
2950netviz MACH_NETVIZ NETVIZ 2964 2950netviz MACH_NETVIZ NETVIZ 2964
2951flexibity MACH_FLEXIBITY FLEXIBITY 2965 2951flexibity MACH_FLEXIBITY FLEXIBITY 2965
2952wlan_computer MACH_WLAN_COMPUTER WLAN_COMPUTER 2966 2952wlan_computer MACH_WLAN_COMPUTER WLAN_COMPUTER 2966
2953lpc24xx MACH_LPC24XX LPC24XX 2967
2954spica MACH_SPICA SPICA 2968
2955gpsdisplay MACH_GPSDISPLAY GPSDISPLAY 2969
2956bipnet MACH_BIPNET BIPNET 2970
2957overo_ctu_inertial MACH_OVERO_CTU_INERTIAL OVERO_CTU_INERTIAL 2971
2958davinci_dm355_mmm MACH_DAVINCI_DM355_MMM DAVINCI_DM355_MMM 2972
2959pc9260_v2 MACH_PC9260_V2 PC9260_V2 2973
2960ptx7545 MACH_PTX7545 PTX7545 2974
2961tm_efdc MACH_TM_EFDC TM_EFDC 2975
2962omap3_waldo1 MACH_OMAP3_WALDO1 OMAP3_WALDO1 2977
2963flyer MACH_FLYER FLYER 2978
2964tornado3240 MACH_TORNADO3240 TORNADO3240 2979
2965soli_01 MACH_SOLI_01 SOLI_01 2980
2966omapl138_europalc MACH_OMAPL138_EUROPALC OMAPL138_EUROPALC 2981
2967helios_v1 MACH_HELIOS_V1 HELIOS_V1 2982
2968netspace_lite_v2 MACH_NETSPACE_LITE_V2 NETSPACE_LITE_V2 2983
2969ssc MACH_SSC SSC 2984
2970premierwave_en MACH_PREMIERWAVE_EN PREMIERWAVE_EN 2985
2971wasabi MACH_WASABI WASABI 2986
2972vivow MACH_VIVOW VIVOW 2987
2973mx50_rdp MACH_MX50_RDP MX50_RDP 2988
2974universal MACH_UNIVERSAL UNIVERSAL 2989
2975real6410 MACH_REAL6410 REAL6410 2990
2976spx_sakura MACH_SPX_SAKURA SPX_SAKURA 2991
2977ij3k_2440 MACH_IJ3K_2440 IJ3K_2440 2992
2978omap3_bc10 MACH_OMAP3_BC10 OMAP3_BC10 2993
2979thebe MACH_THEBE THEBE 2994
2980rv082 MACH_RV082 RV082 2995
2981armlguest MACH_ARMLGUEST ARMLGUEST 2996
2982tjinc1000 MACH_TJINC1000 TJINC1000 2997
2983dockstar MACH_DOCKSTAR DOCKSTAR 2998
2984ax8008 MACH_AX8008 AX8008 2999
2985gnet_sgce MACH_GNET_SGCE GNET_SGCE 3000
2986pxwnas_500_1000 MACH_PXWNAS_500_1000 PXWNAS_500_1000 3001
2987ea20 MACH_EA20 EA20 3002
2988awm2 MACH_AWM2 AWM2 3003
2989ti8148evm MACH_TI8148EVM TI8148EVM 3004
2990tegra_seaboard MACH_TEGRA_SEABOARD TEGRA_SEABOARD 3005
2991linkstation_chlv2 MACH_LINKSTATION_CHLV2 LINKSTATION_CHLV2 3006
2992tera_pro2_rack MACH_TERA_PRO2_RACK TERA_PRO2_RACK 3007
2993rubys MACH_RUBYS RUBYS 3008
2994aquarius MACH_AQUARIUS AQUARIUS 3009
2995mx53_ard MACH_MX53_ARD MX53_ARD 3010
2996mx53_smd MACH_MX53_SMD MX53_SMD 3011
2997lswxl MACH_LSWXL LSWXL 3012
2998dove_avng_v3 MACH_DOVE_AVNG_V3 DOVE_AVNG_V3 3013
2999sdi_ess_9263 MACH_SDI_ESS_9263 SDI_ESS_9263 3014
3000jocpu550 MACH_JOCPU550 JOCPU550 3015
3001msm8x60_rumi3 MACH_MSM8X60_RUMI3 MSM8X60_RUMI3 3016
3002msm8x60_ffa MACH_MSM8X60_FFA MSM8X60_FFA 3017
3003yanomami MACH_YANOMAMI YANOMAMI 3018
3004gta04 MACH_GTA04 GTA04 3019
3005cm_a510 MACH_CM_A510 CM_A510 3020
3006omap3_rfs200 MACH_OMAP3_RFS200 OMAP3_RFS200 3021
3007kx33xx MACH_KX33XX KX33XX 3022
3008ptx7510 MACH_PTX7510 PTX7510 3023
3009top9000 MACH_TOP9000 TOP9000 3024
3010teenote MACH_TEENOTE TEENOTE 3025
3011ts3 MACH_TS3 TS3 3026
3012a0 MACH_A0 A0 3027
3013fsm9xxx_surf MACH_FSM9XXX_SURF FSM9XXX_SURF 3028
3014fsm9xxx_ffa MACH_FSM9XXX_FFA FSM9XXX_FFA 3029
3015frrhwcdma60w MACH_FRRHWCDMA60W FRRHWCDMA60W 3030
3016remus MACH_REMUS REMUS 3031
3017at91cap7xdk MACH_AT91CAP7XDK AT91CAP7XDK 3032
3018at91cap7stk MACH_AT91CAP7STK AT91CAP7STK 3033
3019kt_sbc_sam9_1 MACH_KT_SBC_SAM9_1 KT_SBC_SAM9_1 3034
3020oratisrouter MACH_ORATISROUTER ORATISROUTER 3035
3021armada_xp_db MACH_ARMADA_XP_DB ARMADA_XP_DB 3036
3022spdm MACH_SPDM SPDM 3037
3023gtib MACH_GTIB GTIB 3038
3024dgm3240 MACH_DGM3240 DGM3240 3039
3025atlas_i_lpe MACH_ATLAS_I_LPE ATLAS_I_LPE 3040
3026htcmega MACH_HTCMEGA HTCMEGA 3041
3027tricorder MACH_TRICORDER TRICORDER 3042
3028tx28 MACH_TX28 TX28 3043
3029bstbrd MACH_BSTBRD BSTBRD 3044
3030pwb3090 MACH_PWB3090 PWB3090 3045
3031idea6410 MACH_IDEA6410 IDEA6410 3046
3032qbc9263 MACH_QBC9263 QBC9263 3047
3033borabora MACH_BORABORA BORABORA 3048
3034valdez MACH_VALDEZ VALDEZ 3049
3035ls9g20 MACH_LS9G20 LS9G20 3050
3036mios_v1 MACH_MIOS_V1 MIOS_V1 3051
3037s5pc110_crespo MACH_S5PC110_CRESPO S5PC110_CRESPO 3052
3038controltek9g20 MACH_CONTROLTEK9G20 CONTROLTEK9G20 3053
3039tin307 MACH_TIN307 TIN307 3054
3040tin510 MACH_TIN510 TIN510 3055
3041bluecheese MACH_BLUECHEESE BLUECHEESE 3057
3042tem3x30 MACH_TEM3X30 TEM3X30 3058
3043harvest_desoto MACH_HARVEST_DESOTO HARVEST_DESOTO 3059
3044msm8x60_qrdc MACH_MSM8X60_QRDC MSM8X60_QRDC 3060
3045spear900 MACH_SPEAR900 SPEAR900 3061
3046pcontrol_g20 MACH_PCONTROL_G20 PCONTROL_G20 3062