Merge branch 'linus' into x86/mce3

Conflicts:
	arch/x86/kernel/cpu/mcheck/mce_64.c
	arch/x86/kernel/irq.c

Merge reason: Resolve the conflicts above.

Signed-off-by: Ingo Molnar <mingo@elte.hu>

545 files changed, 31543 insertions, 12984 deletions

diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h
index cb7a9e97fd7e..feaa75f0013e 100644
--- a/arch/arm/include/asm/cache.h
+++ b/arch/arm/include/asm/cache.h
@@ -7,4 +7,20 @@
 #define L1_CACHE_SHIFT          5
 #define L1_CACHE_BYTES          (1 << L1_CACHE_SHIFT)
 
+/*
+ * Memory returned by kmalloc() may be used for DMA, so we must make
+ * sure that all such allocations are cache aligned. Otherwise,
+ * unrelated code may cause parts of the buffer to be read into the
+ * cache before the transfer is done, causing old data to be seen by
+ * the CPU.
+ */
+#define ARCH_KMALLOC_MINALIGN   L1_CACHE_BYTES
+
+/*
+ * With EABI on ARMv5 and above we must have 64-bit aligned slab pointers.
+ */
+#if defined(CONFIG_AEABI) && (__LINUX_ARM_ARCH__ >= 5)
+#define ARCH_SLAB_MINALIGN 8
+#endif
+
 #endif
diff --git a/arch/arm/include/asm/page.h b/arch/arm/include/asm/page.h
index e6eb8a67b807..7b522770f29d 100644
--- a/arch/arm/include/asm/page.h
+++ b/arch/arm/include/asm/page.h
@@ -202,13 +202,6 @@ typedef struct page *pgtable_t;
         (((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0) | \
          VM_READ | VM_WRITE | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
 
-/*
- * With EABI on ARMv5 and above we must have 64-bit aligned slab pointers.
- */
-#if defined(CONFIG_AEABI) && (__LINUX_ARM_ARCH__ >= 5)
-#define ARCH_SLAB_MINALIGN 8
-#endif
-
 #include <asm-generic/page.h>
 
 #endif
diff --git a/arch/arm/mach-mx2/clock_imx21.c b/arch/arm/mach-mx2/clock_imx21.c
index 999d013e06e3..e4b08ca804ea 100644
--- a/arch/arm/mach-mx2/clock_imx21.c
+++ b/arch/arm/mach-mx2/clock_imx21.c
@@ -890,7 +890,7 @@ static struct clk clko_clk = {
                 .con_id = n, \
                 .clk = &c, \
         },
-static struct clk_lookup lookups[] __initdata = {
+static struct clk_lookup lookups[] = {
 /* It's unlikely that any driver wants one of them directly:
         _REGISTER_CLOCK(NULL, "ckih", ckih_clk)
         _REGISTER_CLOCK(NULL, "ckil", ckil_clk)
diff --git a/arch/arm/mach-mx2/clock_imx27.c b/arch/arm/mach-mx2/clock_imx27.c
index 3f7280c490f0..2c971442f3f2 100644
--- a/arch/arm/mach-mx2/clock_imx27.c
+++ b/arch/arm/mach-mx2/clock_imx27.c
@@ -621,7 +621,7 @@ DEFINE_CLOCK1(csi_clk,     0, 0,      0, parent, &csi_clk1, &per4_clk);
                 .clk = &c, \
         },
 
-static struct clk_lookup lookups[] __initdata = {
+static struct clk_lookup lookups[] = {
         _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk)
         _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk)
         _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk)
diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c
index 53a112d4e04a..3c1e06f56dd6 100644
--- a/arch/arm/mach-mx3/clock-imx35.c
+++ b/arch/arm/mach-mx3/clock-imx35.c
@@ -404,7 +404,7 @@ DEFINE_CLOCK(gpu2d_clk,  0, CCM_CGR3,  4, NULL, NULL);
                 .clk = &c,              \
         },
 
-static struct clk_lookup lookups[] __initdata = {
+static struct clk_lookup lookups[] = {
         _REGISTER_CLOCK(NULL, "asrc", asrc_clk)
         _REGISTER_CLOCK(NULL, "ata", ata_clk)
         _REGISTER_CLOCK(NULL, "audmux", audmux_clk)
diff --git a/arch/arm/mach-mx3/clock.c b/arch/arm/mach-mx3/clock.c
index 9957a11533a4..a68fcf981edf 100644
--- a/arch/arm/mach-mx3/clock.c
+++ b/arch/arm/mach-mx3/clock.c
@@ -516,7 +516,7 @@ DEFINE_CLOCK(ipg_clk,     0, NULL,          0, ipg_get_rate, NULL, &ahb_clk);
                 .clk = &c, \
         },
 
-static struct clk_lookup lookups[] __initdata = {
+static struct clk_lookup lookups[] = {
         _REGISTER_CLOCK(NULL, "emi", emi_clk)
         _REGISTER_CLOCK(NULL, "cspi", cspi1_clk)
         _REGISTER_CLOCK(NULL, "cspi", cspi2_clk)
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c
index d245e59c51b1..29970f703f3c 100644
--- a/arch/arm/mach-pxa/devices.c
+++ b/arch/arm/mach-pxa/devices.c
@@ -72,7 +72,10 @@ void __init pxa_set_mci_info(struct pxamci_platform_data *info)
 }
 
 
-static struct pxa2xx_udc_mach_info pxa_udc_info;
+static struct pxa2xx_udc_mach_info pxa_udc_info = {
+        .gpio_pullup = -1,
+        .gpio_vbus   = -1,
+};
 
 void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
 {
diff --git a/arch/arm/mach-pxa/imote2.c b/arch/arm/mach-pxa/imote2.c
index 2121309b2474..2b27336c29f1 100644
--- a/arch/arm/mach-pxa/imote2.c
+++ b/arch/arm/mach-pxa/imote2.c
@@ -412,7 +412,7 @@ static struct platform_device imote2_flash_device = {
  */
 static struct i2c_board_info __initdata imote2_i2c_board_info[] = {
         { /* UCAM sensor board */
-                .type = "max1238",
+                .type = "max1239",
                 .addr = 0x35,
         }, { /* ITS400 Sensor board only */
                 .type = "max1363",
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 3397f1e64d76..a08d9d2380d3 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -184,23 +184,37 @@ __v7_setup:
         stmia   r12, {r0-r5, r7, r9, r11, lr}
         bl      v7_flush_dcache_all
         ldmia   r12, {r0-r5, r7, r9, r11, lr}
+
+        mrc     p15, 0, r0, c0, c0, 0           @ read main ID register
+        and     r10, r0, #0xff000000            @ ARM?
+        teq     r10, #0x41000000
+        bne     2f
+        and     r5, r0, #0x00f00000             @ variant
+        and     r6, r0, #0x0000000f             @ revision
+        orr     r0, r6, r5, lsr #20-4           @ combine variant and revision
+
 #ifdef CONFIG_ARM_ERRATA_430973
-        mrc     p15, 0, r10, c1, c0, 1          @ read aux control register
-        orr     r10, r10, #(1 << 6)             @ set IBE to 1
-        mcr     p15, 0, r10, c1, c0, 1          @ write aux control register
+        teq     r5, #0x00100000                 @ only present in r1p*
+        mrceq   p15, 0, r10, c1, c0, 1          @ read aux control register
+        orreq   r10, r10, #(1 << 6)             @ set IBE to 1
+        mcreq   p15, 0, r10, c1, c0, 1          @ write aux control register
 #endif
 #ifdef CONFIG_ARM_ERRATA_458693
-        mrc     p15, 0, r10, c1, c0, 1          @ read aux control register
-        orr     r10, r10, #(1 << 5)             @ set L1NEON to 1
-        orr     r10, r10, #(1 << 9)             @ set PLDNOP to 1
-        mcr     p15, 0, r10, c1, c0, 1          @ write aux control register
+        teq     r0, #0x20                       @ only present in r2p0
+        mrceq   p15, 0, r10, c1, c0, 1          @ read aux control register
+        orreq   r10, r10, #(1 << 5)             @ set L1NEON to 1
+        orreq   r10, r10, #(1 << 9)             @ set PLDNOP to 1
+        mcreq   p15, 0, r10, c1, c0, 1          @ write aux control register
 #endif
 #ifdef CONFIG_ARM_ERRATA_460075
-        mrc     p15, 1, r10, c9, c0, 2          @ read L2 cache aux ctrl register
-        orr     r10, r10, #(1 << 22)            @ set the Write Allocate disable bit
-        mcr     p15, 1, r10, c9, c0, 2          @ write the L2 cache aux ctrl register
+        teq     r0, #0x20                       @ only present in r2p0
+        mrceq   p15, 1, r10, c9, c0, 2          @ read L2 cache aux ctrl register
+        tsteq   r10, #1 << 22
+        orreq   r10, r10, #(1 << 22)            @ set the Write Allocate disable bit
+        mcreq   p15, 1, r10, c9, c0, 2          @ write the L2 cache aux ctrl register
 #endif
-        mov     r10, #0
+
+2:      mov     r10, #0
 #ifdef HARVARD_CACHE
         mcr     p15, 0, r10, c7, c5, 0          @ I+BTB cache invalidate
 #endif
diff --git a/arch/arm/plat-mxc/include/mach/imx-uart.h b/arch/arm/plat-mxc/include/mach/imx-uart.h
index 599217b2e13f..f9bd17dd8dd7 100644
--- a/arch/arm/plat-mxc/include/mach/imx-uart.h
+++ b/arch/arm/plat-mxc/include/mach/imx-uart.h
@@ -20,11 +20,16 @@
 #define ASMARM_ARCH_UART_H
 
 #define IMXUART_HAVE_RTSCTS (1<<0)
+#define IMXUART_IRDA        (1<<1)
 
 struct imxuart_platform_data {
         int (*init)(struct platform_device *pdev);
         int (*exit)(struct platform_device *pdev);
         unsigned int flags;
+        void (*irda_enable)(int enable);
+        unsigned int irda_inv_rx:1;
+        unsigned int irda_inv_tx:1;
+        unsigned short transceiver_delay;
 };
 
 #endif
diff --git a/arch/arm/plat-omap/mailbox.c b/arch/arm/plat-omap/mailbox.c
index 0abfbaa59871..40424edae939 100644
--- a/arch/arm/plat-omap/mailbox.c
+++ b/arch/arm/plat-omap/mailbox.c
@@ -147,24 +147,40 @@ static int __mbox_msg_send(struct omap_mbox *mbox, mbox_msg_t msg, void *arg)
         return ret;
 }
 
+struct omap_msg_tx_data {
+        mbox_msg_t      msg;
+        void            *arg;
+};
+
+static void omap_msg_tx_end_io(struct request *rq, int error)
+{
+        kfree(rq->special);
+        __blk_put_request(rq->q, rq);
+}
+
 int omap_mbox_msg_send(struct omap_mbox *mbox, mbox_msg_t msg, void* arg)
 {
+        struct omap_msg_tx_data *tx_data;
         struct request *rq;
         struct request_queue *q = mbox->txq->queue;
-        int ret = 0;
+
+        tx_data = kmalloc(sizeof(*tx_data), GFP_ATOMIC);
+        if (unlikely(!tx_data))
+                return -ENOMEM;
 
         rq = blk_get_request(q, WRITE, GFP_ATOMIC);
         if (unlikely(!rq)) {
-                ret = -ENOMEM;
-                goto fail;
+                kfree(tx_data);
+                return -ENOMEM;
         }
 
-        rq->data = (void *)msg;
-        blk_insert_request(q, rq, 0, arg);
+        tx_data->msg = msg;
+        tx_data->arg = arg;
+        rq->end_io = omap_msg_tx_end_io;
+        blk_insert_request(q, rq, 0, tx_data);
 
         schedule_work(&mbox->txq->work);
- fail:
-        return ret;
+        return 0;
 }
 EXPORT_SYMBOL(omap_mbox_msg_send);
 
@@ -178,22 +194,28 @@ static void mbox_tx_work(struct work_struct *work)
         struct request_queue *q = mbox->txq->queue;
 
         while (1) {
+                struct omap_msg_tx_data *tx_data;
+
                 spin_lock(q->queue_lock);
-                rq = elv_next_request(q);
+                rq = blk_fetch_request(q);
                 spin_unlock(q->queue_lock);
 
                 if (!rq)
                         break;
 
-                ret = __mbox_msg_send(mbox, (mbox_msg_t) rq->data, rq->special);
+                tx_data = rq->special;
+
+                ret = __mbox_msg_send(mbox, tx_data->msg, tx_data->arg);
                 if (ret) {
                         enable_mbox_irq(mbox, IRQ_TX);
+                        spin_lock(q->queue_lock);
+                        blk_requeue_request(q, rq);
+                        spin_unlock(q->queue_lock);
                         return;
                 }
 
                 spin_lock(q->queue_lock);
-                if (__blk_end_request(rq, 0, 0))
-                        BUG();
+                __blk_end_request_all(rq, 0);
                 spin_unlock(q->queue_lock);
         }
 }
@@ -218,16 +240,13 @@ static void mbox_rx_work(struct work_struct *work)
 
         while (1) {
                 spin_lock_irqsave(q->queue_lock, flags);
-                rq = elv_next_request(q);
+                rq = blk_fetch_request(q);
                 spin_unlock_irqrestore(q->queue_lock, flags);
                 if (!rq)
                         break;
 
-                msg = (mbox_msg_t) rq->data;
-
-                if (blk_end_request(rq, 0, 0))
-                        BUG();
-
+                msg = (mbox_msg_t)rq->special;
+                blk_end_request_all(rq, 0);
                 mbox->rxq->callback((void *)msg);
         }
 }
@@ -264,7 +283,6 @@ static void __mbox_rx_interrupt(struct omap_mbox *mbox)
                         goto nomem;
 
                 msg = mbox_fifo_read(mbox);
-                rq->data = (void *)msg;
 
                 if (unlikely(mbox_seq_test(mbox, msg))) {
                         pr_info("mbox: Illegal seq bit!(%08x)\n", msg);
@@ -272,7 +290,7 @@ static void __mbox_rx_interrupt(struct omap_mbox *mbox)
                                 mbox->err_notify();
                 }
 
-                blk_insert_request(q, rq, 0, NULL);
+                blk_insert_request(q, rq, 0, (void *)msg);
                 if (mbox->ops->type == OMAP_MBOX_TYPE1)
                         break;
         }
@@ -329,16 +347,15 @@ omap_mbox_read(struct device *dev, struct device_attribute *attr, char *buf)
 
         while (1) {
                 spin_lock_irqsave(q->queue_lock, flags);
-                rq = elv_next_request(q);
+                rq = blk_fetch_request(q);
                 spin_unlock_irqrestore(q->queue_lock, flags);
 
                 if (!rq)
                         break;
 
-                *p = (mbox_msg_t) rq->data;
+                *p = (mbox_msg_t)rq->special;
 
-                if (blk_end_request(rq, 0, 0))
-                        BUG();
+                blk_end_request_all(rq, 0);
 
                 if (unlikely(mbox_seq_test(mbox, *p))) {
                         pr_info("mbox: Illegal seq bit!(%08x) ignored\n", *p);
diff --git a/arch/frv/Kconfig b/arch/frv/Kconfig
index 9d1552a9ee2c..8a5bd7a9c6f5 100644
--- a/arch/frv/Kconfig
+++ b/arch/frv/Kconfig
@@ -6,6 +6,7 @@ config FRV
         bool
         default y
         select HAVE_IDE
+        select HAVE_ARCH_TRACEHOOK
 
 config ZONE_DMA
         bool
diff --git a/arch/frv/include/asm/bitops.h b/arch/frv/include/asm/bitops.h
index 287f6f697ce2..50ae91b29674 100644
--- a/arch/frv/include/asm/bitops.h
+++ b/arch/frv/include/asm/bitops.h
@@ -112,7 +112,7 @@ extern unsigned long atomic_test_and_XOR_mask(unsigned long mask, volatile unsig
 #define atomic_clear_mask(mask, v)      atomic_test_and_ANDNOT_mask((mask), (v))
 #define atomic_set_mask(mask, v)        atomic_test_and_OR_mask((mask), (v))
 
-static inline int test_and_clear_bit(int nr, volatile void *addr)
+static inline int test_and_clear_bit(unsigned long nr, volatile void *addr)
 {
         volatile unsigned long *ptr = addr;
         unsigned long mask = 1UL << (nr & 31);
@@ -120,7 +120,7 @@ static inline int test_and_clear_bit(int nr, volatile void *addr)
         return (atomic_test_and_ANDNOT_mask(mask, ptr) & mask) != 0;
 }
 
-static inline int test_and_set_bit(int nr, volatile void *addr)
+static inline int test_and_set_bit(unsigned long nr, volatile void *addr)
 {
         volatile unsigned long *ptr = addr;
         unsigned long mask = 1UL << (nr & 31);
@@ -128,7 +128,7 @@ static inline int test_and_set_bit(int nr, volatile void *addr)
         return (atomic_test_and_OR_mask(mask, ptr) & mask) != 0;
 }
 
-static inline int test_and_change_bit(int nr, volatile void *addr)
+static inline int test_and_change_bit(unsigned long nr, volatile void *addr)
 {
         volatile unsigned long *ptr = addr;
         unsigned long mask = 1UL << (nr & 31);
@@ -136,22 +136,22 @@ static inline int test_and_change_bit(int nr, volatile void *addr)
         return (atomic_test_and_XOR_mask(mask, ptr) & mask) != 0;
 }
 
-static inline void clear_bit(int nr, volatile void *addr)
+static inline void clear_bit(unsigned long nr, volatile void *addr)
 {
         test_and_clear_bit(nr, addr);
 }
 
-static inline void set_bit(int nr, volatile void *addr)
+static inline void set_bit(unsigned long nr, volatile void *addr)
 {
         test_and_set_bit(nr, addr);
 }
 
-static inline void change_bit(int nr, volatile void * addr)
+static inline void change_bit(unsigned long nr, volatile void *addr)
 {
         test_and_change_bit(nr, addr);
 }
 
-static inline void __clear_bit(int nr, volatile void * addr)
+static inline void __clear_bit(unsigned long nr, volatile void *addr)
 {
         volatile unsigned long *a = addr;
         int mask;
@@ -161,7 +161,7 @@ static inline void __clear_bit(int nr, volatile void * addr)
         *a &= ~mask;
 }
 
-static inline void __set_bit(int nr, volatile void * addr)
+static inline void __set_bit(unsigned long nr, volatile void *addr)
 {
         volatile unsigned long *a = addr;
         int mask;
@@ -171,7 +171,7 @@ static inline void __set_bit(int nr, volatile void * addr)
         *a |= mask;
 }
 
-static inline void __change_bit(int nr, volatile void *addr)
+static inline void __change_bit(unsigned long nr, volatile void *addr)
 {
         volatile unsigned long *a = addr;
         int mask;
@@ -181,7 +181,7 @@ static inline void __change_bit(int nr, volatile void *addr)
         *a ^= mask;
 }
 
-static inline int __test_and_clear_bit(int nr, volatile void * addr)
+static inline int __test_and_clear_bit(unsigned long nr, volatile void *addr)
 {
         volatile unsigned long *a = addr;
         int mask, retval;
@@ -193,7 +193,7 @@ static inline int __test_and_clear_bit(int nr, volatile void * addr)
         return retval;
 }
 
-static inline int __test_and_set_bit(int nr, volatile void * addr)
+static inline int __test_and_set_bit(unsigned long nr, volatile void *addr)
 {
         volatile unsigned long *a = addr;
         int mask, retval;
@@ -205,7 +205,7 @@ static inline int __test_and_set_bit(int nr, volatile void * addr)
         return retval;
 }
 
-static inline int __test_and_change_bit(int nr, volatile void * addr)
+static inline int __test_and_change_bit(unsigned long nr, volatile void *addr)
 {
         volatile unsigned long *a = addr;
         int mask, retval;
@@ -220,12 +220,13 @@ static inline int __test_and_change_bit(int nr, volatile void * addr)
 /*
  * This routine doesn't need to be atomic.
  */
-static inline int __constant_test_bit(int nr, const volatile void * addr)
+static inline int
+__constant_test_bit(unsigned long nr, const volatile void *addr)
 {
         return ((1UL << (nr & 31)) & (((const volatile unsigned int *) addr)[nr >> 5])) != 0;
 }
 
-static inline int __test_bit(int nr, const volatile void * addr)
+static inline int __test_bit(unsigned long nr, const volatile void *addr)
 {
         int     * a = (int *) addr;
         int     mask;
diff --git a/arch/frv/include/asm/elf.h b/arch/frv/include/asm/elf.h
index 7279ec07d62e..7bbf6e47f8c8 100644
--- a/arch/frv/include/asm/elf.h
+++ b/arch/frv/include/asm/elf.h
@@ -116,6 +116,7 @@ do {											\
 } while(0)
 
 #define USE_ELF_CORE_DUMP
+#define CORE_DUMP_USE_REGSET
 #define ELF_FDPIC_CORE_EFLAGS   EF_FRV_FDPIC
 #define ELF_EXEC_PAGESIZE       16384
 
diff --git a/arch/frv/include/asm/pci.h b/arch/frv/include/asm/pci.h
index 585d9b49949a..cc685e60b0f9 100644
--- a/arch/frv/include/asm/pci.h
+++ b/arch/frv/include/asm/pci.h
@@ -87,8 +87,7 @@ static inline void pci_dma_sync_single(struct pci_dev *hwdev,
                                        dma_addr_t dma_handle,
                                        size_t size, int direction)
 {
-        if (direction == PCI_DMA_NONE)
-                BUG();
+        BUG_ON(direction == PCI_DMA_NONE);
 
         frv_cache_wback_inv((unsigned long)bus_to_virt(dma_handle),
                             (unsigned long)bus_to_virt(dma_handle) + size);
@@ -105,9 +104,7 @@ static inline void pci_dma_sync_sg(struct pci_dev *hwdev,
                                    int nelems, int direction)
 {
         int i;
-
-        if (direction == PCI_DMA_NONE)
-                BUG();
+        BUG_ON(direction == PCI_DMA_NONE);
 
         for (i = 0; i < nelems; i++)
                 frv_cache_wback_inv(sg_dma_address(&sg[i]),
diff --git a/arch/frv/include/asm/ptrace.h b/arch/frv/include/asm/ptrace.h
index cf6934012b64..a54b535c9e49 100644
--- a/arch/frv/include/asm/ptrace.h
+++ b/arch/frv/include/asm/ptrace.h
@@ -65,6 +65,8 @@
 #ifdef __KERNEL__
 #ifndef __ASSEMBLY__
 
+struct task_struct;
+
 /*
  * we dedicate GR28 to keeping a pointer to the current exception frame
  * - gr28 is destroyed on entry to the kernel from userspace
@@ -73,11 +75,18 @@ register struct pt_regs *__frame asm("gr28");
 
 #define user_mode(regs)                 (!((regs)->psr & PSR_S))
 #define instruction_pointer(regs)       ((regs)->pc)
+#define user_stack_pointer(regs)        ((regs)->sp)
 
 extern unsigned long user_stack(const struct pt_regs *);
 extern void show_regs(struct pt_regs *);
 #define profile_pc(regs) ((regs)->pc)
-#endif
+
+#define task_pt_regs(task) ((task)->thread.frame0)
+
+#define arch_has_single_step()  (1)
+extern void user_enable_single_step(struct task_struct *);
+extern void user_disable_single_step(struct task_struct *);
 
 #endif /* !__ASSEMBLY__ */
+#endif /* __KERNEL__ */
 #endif /* _ASM_PTRACE_H */
diff --git a/arch/frv/include/asm/syscall.h b/arch/frv/include/asm/syscall.h
new file mode 100644
index 000000000000..70689eb29b98
--- /dev/null
+++ b/arch/frv/include/asm/syscall.h
@@ -0,0 +1,123 @@
+/* syscall parameter access functions
+ *
+ * Copyright (C) 2009 Red Hat, Inc. All Rights Reserved.
+ * Written by David Howells (dhowells@redhat.com)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public Licence
+ * as published by the Free Software Foundation; either version
+ * 2 of the Licence, or (at your option) any later version.
+ */
+
+#ifndef _ASM_SYSCALL_H
+#define _ASM_SYSCALL_H
+
+#include <linux/err.h>
+#include <asm/ptrace.h>
+
+/*
+ * Get the system call number or -1
+ */
+static inline long syscall_get_nr(struct task_struct *task,
+                                  struct pt_regs *regs)
+{
+        return regs->syscallno;
+}
+
+/*
+ * Restore the clobbered GR8 register
+ * (1st syscall arg was overwritten with syscall return or error)
+ */
+static inline void syscall_rollback(struct task_struct *task,
+                                    struct pt_regs *regs)
+{
+        regs->gr8 = regs->orig_gr8;
+}
+
+/*
+ * See if the syscall return value is an error, returning it if it is and 0 if
+ * not
+ */
+static inline long syscall_get_error(struct task_struct *task,
+                                     struct pt_regs *regs)
+{
+        return IS_ERR_VALUE(regs->gr8) ? regs->gr8 : 0;
+}
+
+/*
+ * Get the syscall return value
+ */
+static inline long syscall_get_return_value(struct task_struct *task,
+                                            struct pt_regs *regs)
+{
+        return regs->gr8;
+}
+
+/*
+ * Set the syscall return value
+ */
+static inline void syscall_set_return_value(struct task_struct *task,
+                                            struct pt_regs *regs,
+                                            int error, long val)
+{
+        if (error)
+                regs->gr8 = -error;
+        else
+                regs->gr8 = val;
+}
+
+/*
+ * Retrieve the system call arguments
+ */
+static inline void syscall_get_arguments(struct task_struct *task,
+                                         struct pt_regs *regs,
+                                         unsigned int i, unsigned int n,
+                                         unsigned long *args)
+{
+        /*
+         * Do this simply for now. If we need to start supporting
+         * fetching arguments from arbitrary indices, this will need some
+         * extra logic. Presently there are no in-tree users that depend
+         * on this behaviour.
+         */
+        BUG_ON(i);
+
+        /* Argument pattern is: GR8, GR9, GR10, GR11, GR12, GR13 */
+        switch (n) {
+        case 6: args[5] = regs->gr13;
+        case 5: args[4] = regs->gr12;
+        case 4: args[3] = regs->gr11;
+        case 3: args[2] = regs->gr10;
+        case 2: args[1] = regs->gr9;
+        case 1: args[0] = regs->gr8;
+                break;
+        default:
+                BUG();
+        }
+}
+
+/*
+ * Alter the system call arguments
+ */
+static inline void syscall_set_arguments(struct task_struct *task,
+                                         struct pt_regs *regs,
+                                         unsigned int i, unsigned int n,
+                                         const unsigned long *args)
+{
+        /* Same note as above applies */
+        BUG_ON(i);
+
+        switch (n) {
+        case 6: regs->gr13 = args[5];
+        case 5: regs->gr12 = args[4];
+        case 4: regs->gr11 = args[3];
+        case 3: regs->gr10 = args[2];
+        case 2: regs->gr9  = args[1];
+        case 1: regs->gr8  = args[0];
+                break;
+        default:
+                BUG();
+        }
+}
+
+#endif /* _ASM_SYSCALL_H */
diff --git a/arch/frv/include/asm/thread_info.h b/arch/frv/include/asm/thread_info.h
index bb53ab753ffb..e8a5ed7be021 100644
--- a/arch/frv/include/asm/thread_info.h
+++ b/arch/frv/include/asm/thread_info.h
@@ -109,20 +109,20 @@ register struct thread_info *__current_thread_info asm("gr15");
  * - other flags in MSW
  */
 #define TIF_SYSCALL_TRACE       0       /* syscall trace active */
-#define TIF_SIGPENDING          1       /* signal pending */
-#define TIF_NEED_RESCHED        2       /* rescheduling necessary */
-#define TIF_SINGLESTEP          3       /* restore singlestep on return to user mode */
-#define TIF_IRET                4       /* return with iret */
+#define TIF_NOTIFY_RESUME       1       /* callback before returning to user */
+#define TIF_SIGPENDING          2       /* signal pending */
+#define TIF_NEED_RESCHED        3       /* rescheduling necessary */
+#define TIF_SINGLESTEP          4       /* restore singlestep on return to user mode */
 #define TIF_RESTORE_SIGMASK     5       /* restore signal mask in do_signal() */
 #define TIF_POLLING_NRFLAG      16      /* true if poll_idle() is polling TIF_NEED_RESCHED */
 #define TIF_MEMDIE              17      /* OOM killer killed process */
 #define TIF_FREEZE              18      /* freezing for suspend */
 
 #define _TIF_SYSCALL_TRACE      (1 << TIF_SYSCALL_TRACE)
+#define _TIF_NOTIFY_RESUME      (1 << TIF_NOTIFY_RESUME)
 #define _TIF_SIGPENDING         (1 << TIF_SIGPENDING)
 #define _TIF_NEED_RESCHED       (1 << TIF_NEED_RESCHED)
 #define _TIF_SINGLESTEP         (1 << TIF_SINGLESTEP)
-#define _TIF_IRET               (1 << TIF_IRET)
 #define _TIF_RESTORE_SIGMASK    (1 << TIF_RESTORE_SIGMASK)
 #define _TIF_POLLING_NRFLAG     (1 << TIF_POLLING_NRFLAG)
 #define _TIF_FREEZE             (1 << TIF_FREEZE)
diff --git a/arch/frv/kernel/entry.S b/arch/frv/kernel/entry.S
index 1da523b3298e..356e0e327a89 100644
--- a/arch/frv/kernel/entry.S
+++ b/arch/frv/kernel/entry.S
@@ -886,7 +886,6 @@ system_call:
         bnc             icc0,#0,__syscall_badsys
 
         ldi             @(gr15,#TI_FLAGS),gr4
-        ori             gr4,#_TIF_SYSCALL_TRACE,gr4
         andicc          gr4,#_TIF_SYSCALL_TRACE,gr0,icc0
         bne             icc0,#0,__syscall_trace_entry
 
@@ -1150,11 +1149,10 @@ __entry_work_notifysig:
         # perform syscall entry tracing
 __syscall_trace_entry:
         LEDS            0x6320
-        setlos.p        #0,gr8
-        call            do_syscall_trace
+        call            syscall_trace_entry
 
-        ldi             @(gr28,#REG_SYSCALLNO),gr7
-        lddi            @(gr28,#REG_GR(8)) ,gr8
+        lddi.p          @(gr28,#REG_GR(8)) ,gr8
+        ori             gr8,#0,gr7              ; syscall_trace_entry() returned new syscallno
         lddi            @(gr28,#REG_GR(10)),gr10
         lddi.p          @(gr28,#REG_GR(12)),gr12
 
@@ -1169,11 +1167,10 @@ __syscall_exit_work:
         beq             icc0,#1,__entry_work_pending
 
         movsg           psr,gr23
-        andi            gr23,#~PSR_PIL,gr23     ; could let do_syscall_trace() call schedule()
+        andi            gr23,#~PSR_PIL,gr23     ; could let syscall_trace_exit() call schedule()
         movgs           gr23,psr
 
-        setlos.p        #1,gr8
-        call            do_syscall_trace
+        call            syscall_trace_exit
         bra             __entry_resume_userspace
 
 __syscall_badsys:
diff --git a/arch/frv/kernel/ptrace.c b/arch/frv/kernel/ptrace.c
index 5e7d401d21e7..60eeed3694c0 100644
--- a/arch/frv/kernel/ptrace.c
+++ b/arch/frv/kernel/ptrace.c
@@ -19,6 +19,9 @@
 #include <linux/user.h>
 #include <linux/security.h>
 #include <linux/signal.h>
+#include <linux/regset.h>
+#include <linux/elf.h>
+#include <linux/tracehook.h>
 
 #include <asm/uaccess.h>
 #include <asm/page.h>
@@ -33,6 +36,169 @@
  */
 
 /*
+ * retrieve the contents of FRV userspace general registers
+ */
+static int genregs_get(struct task_struct *target,
+                       const struct user_regset *regset,
+                       unsigned int pos, unsigned int count,
+                       void *kbuf, void __user *ubuf)
+{
+        const struct user_int_regs *iregs = &target->thread.user->i;
+        int ret;
+
+        ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
+                                  iregs, 0, sizeof(*iregs));
+        if (ret < 0)
+                return ret;
+
+        return user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
+                                        sizeof(*iregs), -1);
+}
+
+/*
+ * update the contents of the FRV userspace general registers
+ */
+static int genregs_set(struct task_struct *target,
+                       const struct user_regset *regset,
+                       unsigned int pos, unsigned int count,
+                       const void *kbuf, const void __user *ubuf)
+{
+        struct user_int_regs *iregs = &target->thread.user->i;
+        unsigned int offs_gr0, offs_gr1;
+        int ret;
+
+        /* not allowed to set PSR or __status */
+        if (pos < offsetof(struct user_int_regs, psr) + sizeof(long) &&
+            pos + count > offsetof(struct user_int_regs, psr))
+                return -EIO;
+
+        if (pos < offsetof(struct user_int_regs, __status) + sizeof(long) &&
+            pos + count > offsetof(struct user_int_regs, __status))
+                return -EIO;
+
+        /* set the control regs */
+        offs_gr0 = offsetof(struct user_int_regs, gr[0]);
+        offs_gr1 = offsetof(struct user_int_regs, gr[1]);
+        ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
+                                 iregs, 0, offs_gr0);
+        if (ret < 0)
+                return ret;
+
+        /* skip GR0/TBR */
+        ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
+                                        offs_gr0, offs_gr1);
+        if (ret < 0)
+                return ret;
+
+        /* set the general regs */
+        ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
+                                 &iregs->gr[1], offs_gr1, sizeof(*iregs));
+        if (ret < 0)
+                return ret;
+
+        return user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
+                                        sizeof(*iregs), -1);
+}
+
+/*
+ * retrieve the contents of FRV userspace FP/Media registers
+ */
+static int fpmregs_get(struct task_struct *target,
+                       const struct user_regset *regset,
+                       unsigned int pos, unsigned int count,
+                       void *kbuf, void __user *ubuf)
+{
+        const struct user_fpmedia_regs *fpregs = &target->thread.user->f;
+        int ret;
+
+        ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
+                                  fpregs, 0, sizeof(*fpregs));
+        if (ret < 0)
+                return ret;
+
+        return user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
+                                        sizeof(*fpregs), -1);
+}
+
+/*
+ * update the contents of the FRV userspace FP/Media registers
+ */
+static int fpmregs_set(struct task_struct *target,
+                       const struct user_regset *regset,
+                       unsigned int pos, unsigned int count,
+                       const void *kbuf, const void __user *ubuf)
+{
+        struct user_fpmedia_regs *fpregs = &target->thread.user->f;
+        int ret;
+
+        ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
+                                 fpregs, 0, sizeof(*fpregs));
+        if (ret < 0)
+                return ret;
+
+        return user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
+                                        sizeof(*fpregs), -1);
+}
+
+/*
+ * determine if the FP/Media registers have actually been used
+ */
+static int fpmregs_active(struct task_struct *target,
+                          const struct user_regset *regset)
+{
+        return tsk_used_math(target) ? regset->n : 0;
+}
+
+/*
+ * Define the register sets available on the FRV under Linux
+ */
+enum frv_regset {
+        REGSET_GENERAL,
+        REGSET_FPMEDIA,
+};
+
+static const struct user_regset frv_regsets[] = {
+        /*
+         * General register format is:
+         *      PSR, ISR, CCR, CCCR, LR, LCR, PC, (STATUS), SYSCALLNO, ORIG_G8
+         *      GNER0-1, IACC0, TBR, GR1-63
+         */
+        [REGSET_GENERAL] = {
+                .core_note_type = NT_PRSTATUS,
+                .n              = ELF_NGREG,
+                .size           = sizeof(long),
+                .align          = sizeof(long),
+                .get            = genregs_get,
+                .set            = genregs_set,
+        },
+        /*
+         * FPU/Media register format is:
+         *      FR0-63, FNER0-1, MSR0-1, ACC0-7, ACCG0-8, FSR
+         */
+        [REGSET_FPMEDIA] = {
+                .core_note_type = NT_PRFPREG,
+                .n              = sizeof(struct user_fpmedia_regs) / sizeof(long),
+                .size           = sizeof(long),
+                .align          = sizeof(long),
+                .get            = fpmregs_get,
+                .set            = fpmregs_set,
+                .active         = fpmregs_active,
+        },
+};
+
+static const struct user_regset_view user_frv_native_view = {
+        .name           = "frv",
+        .e_machine      = EM_FRV,
+        .regsets        = frv_regsets,
+        .n              = ARRAY_SIZE(frv_regsets),
+};
+
+const struct user_regset_view *task_user_regset_view(struct task_struct *task)
+{
+        return &user_frv_native_view;
+}
+
+/*
  * Get contents of register REGNO in task TASK.
  */
 static inline long get_reg(struct task_struct *task, int regno)
@@ -69,40 +235,23 @@ static inline int put_reg(struct task_struct *task, int regno,
 }
 
 /*
- * check that an address falls within the bounds of the target process's memory
- * mappings
- */
-static inline int is_user_addr_valid(struct task_struct *child,
-                                     unsigned long start, unsigned long len)
-{
-#ifdef CONFIG_MMU
-        if (start >= PAGE_OFFSET || len > PAGE_OFFSET - start)
-                return -EIO;
-        return 0;
-#else
-        struct vm_area_struct *vma;
-
-        vma = find_vma(child->mm, start);
-        if (vma && start >= vma->vm_start && start + len <= vma->vm_end)
-                return 0;
-
-        return -EIO;
-#endif
-}
-
-/*
  * Called by kernel/ptrace.c when detaching..
  *
  * Control h/w single stepping
  */
-void ptrace_disable(struct task_struct *child)
+void user_enable_single_step(struct task_struct *child)
+{
+        child->thread.frame0->__status |= REG__STATUS_STEP;
+}
+
+void user_disable_single_step(struct task_struct *child)
 {
         child->thread.frame0->__status &= ~REG__STATUS_STEP;
 }
 
-void ptrace_enable(struct task_struct *child)
+void ptrace_disable(struct task_struct *child)
 {
-        child->thread.frame0->__status |= REG__STATUS_STEP;
+        user_disable_single_step(child);
 }
 
 long arch_ptrace(struct task_struct *child, long request, long addr, long data)
@@ -111,15 +260,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
         int ret;
 
         switch (request) {
-                /* when I and D space are separate, these will need to be fixed. */
-        case PTRACE_PEEKTEXT: /* read word at location addr. */
-        case PTRACE_PEEKDATA:
-                ret = -EIO;
-                if (is_user_addr_valid(child, addr, sizeof(tmp)) < 0)
-                        break;
-                ret = generic_ptrace_peekdata(child, addr, data);
-                break;
-
                 /* read the word at location addr in the USER area. */
         case PTRACE_PEEKUSR: {
                 tmp = 0;
@@ -163,15 +303,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                 break;
         }
 
-                /* when I and D space are separate, this will have to be fixed. */
-        case PTRACE_POKETEXT: /* write the word at location addr. */
-        case PTRACE_POKEDATA:
-                ret = -EIO;
-                if (is_user_addr_valid(child, addr, sizeof(tmp)) < 0)
-                        break;
-                ret = generic_ptrace_pokedata(child, addr, data);
-                break;
-
         case PTRACE_POKEUSR: /* write the word at location addr in the USER area */
                 ret = -EIO;
                 if ((addr & 3) || addr < 0)
@@ -179,7 +310,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
 
                 ret = 0;
                 switch (addr >> 2) {
-                case 0 ... PT__END-1:
+                case 0 ... PT__END - 1:
                         ret = put_reg(child, addr >> 2, data);
                         break;
 
@@ -189,95 +320,29 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                 }
                 break;
 
-        case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
-        case PTRACE_CONT: /* restart after signal. */
-                ret = -EIO;
-                if (!valid_signal(data))
-                        break;
-                if (request == PTRACE_SYSCALL)
-                        set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                else
-                        clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                child->exit_code = data;
-                ptrace_disable(child);
-                wake_up_process(child);
-                ret = 0;
-                break;
-
-                /* make the child exit.  Best I can do is send it a sigkill.
-                 * perhaps it should be put in the status that it wants to
-                 * exit.
-                 */
-        case PTRACE_KILL:
-                ret = 0;
-                if (child->exit_state == EXIT_ZOMBIE)   /* already dead */
-                        break;
-                child->exit_code = SIGKILL;
-                clear_tsk_thread_flag(child, TIF_SINGLESTEP);
-                ptrace_disable(child);
-                wake_up_process(child);
-                break;
-
-        case PTRACE_SINGLESTEP:  /* set the trap flag. */
-                ret = -EIO;
-                if (!valid_signal(data))
-                        break;
-                clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                ptrace_enable(child);
-                child->exit_code = data;
-                wake_up_process(child);
-                ret = 0;
-                break;
-
-        case PTRACE_DETACH:     /* detach a process that was attached. */
-                ret = ptrace_detach(child, data);
-                break;
-
-        case PTRACE_GETREGS: { /* Get all integer regs from the child. */
-                int i;
-                for (i = 0; i < PT__GPEND; i++) {
-                        tmp = get_reg(child, i);
-                        if (put_user(tmp, (unsigned long *) data)) {
-                                ret = -EFAULT;
-                                break;
-                        }
-                        data += sizeof(long);
-                }
-                ret = 0;
-                break;
-        }
-
-        case PTRACE_SETREGS: { /* Set all integer regs in the child. */
-                int i;
-                for (i = 0; i < PT__GPEND; i++) {
-                        if (get_user(tmp, (unsigned long *) data)) {
-                                ret = -EFAULT;
-                                break;
-                        }
-                        put_reg(child, i, tmp);
-                        data += sizeof(long);
-                }
-                ret = 0;
-                break;
-        }
-
-        case PTRACE_GETFPREGS: { /* Get the child FP/Media state. */
-                ret = 0;
-                if (copy_to_user((void *) data,
-                                 &child->thread.user->f,
-                                 sizeof(child->thread.user->f)))
-                        ret = -EFAULT;
-                break;
-        }
-
-        case PTRACE_SETFPREGS: { /* Set the child FP/Media state. */
-                ret = 0;
-                if (copy_from_user(&child->thread.user->f,
-                                   (void *) data,
-                                   sizeof(child->thread.user->f)))
-                        ret = -EFAULT;
-                break;
-        }
+        case PTRACE_GETREGS:    /* Get all integer regs from the child. */
+                return copy_regset_to_user(child, &user_frv_native_view,
+                                           REGSET_GENERAL,
+                                           0, sizeof(child->thread.user->i),
+                                           (void __user *)data);
+
+        case PTRACE_SETREGS:    /* Set all integer regs in the child. */
+                return copy_regset_from_user(child, &user_frv_native_view,
+                                             REGSET_GENERAL,
+                                             0, sizeof(child->thread.user->i),
+                                             (const void __user *)data);
+
+        case PTRACE_GETFPREGS:  /* Get the child FP/Media state. */
+                return copy_regset_to_user(child, &user_frv_native_view,
+                                           REGSET_FPMEDIA,
+                                           0, sizeof(child->thread.user->f),
+                                           (void __user *)data);
+
+        case PTRACE_SETFPREGS:  /* Set the child FP/Media state. */
+                return copy_regset_from_user(child, &user_frv_native_view,
+                                             REGSET_FPMEDIA,
+                                             0, sizeof(child->thread.user->f),
+                                             (const void __user *)data);
 
         case PTRACE_GETFDPIC:
                 tmp = 0;
@@ -300,414 +365,36 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                 break;
 
         default:
-                ret = -EIO;
+                ret = ptrace_request(child, request, addr, data);
                 break;
         }
         return ret;
 }
 
-int __nongprelbss kstrace;
-
-static const struct {
-        const char      *name;
-        unsigned        argmask;
-} __syscall_name_table[NR_syscalls] = {
-        [0]     = { "restart_syscall"                   },
-        [1]     = { "exit",             0x000001        },
-        [2]     = { "fork",             0xffffff        },
-        [3]     = { "read",             0x000141        },
-        [4]     = { "write",            0x000141        },
-        [5]     = { "open",             0x000235        },
-        [6]     = { "close",            0x000001        },
-        [7]     = { "waitpid",          0x000141        },
-        [8]     = { "creat",            0x000025        },
-        [9]     = { "link",             0x000055        },
-        [10]    = { "unlink",           0x000005        },
-        [11]    = { "execve",           0x000445        },
-        [12]    = { "chdir",            0x000005        },
-        [13]    = { "time",             0x000004        },
-        [14]    = { "mknod",            0x000325        },
-        [15]    = { "chmod",            0x000025        },
-        [16]    = { "lchown",           0x000025        },
-        [17]    = { "break" },
-        [18]    = { "oldstat",          0x000045        },
-        [19]    = { "lseek",            0x000131        },
-        [20]    = { "getpid",           0xffffff        },
-        [21]    = { "mount",            0x043555        },
-        [22]    = { "umount",           0x000005        },
-        [23]    = { "setuid",           0x000001        },
-        [24]    = { "getuid",           0xffffff        },
-        [25]    = { "stime",            0x000004        },
-        [26]    = { "ptrace",           0x004413        },
-        [27]    = { "alarm",            0x000001        },
-        [28]    = { "oldfstat",         0x000041        },
-        [29]    = { "pause",            0xffffff        },
-        [30]    = { "utime",            0x000045        },
-        [31]    = { "stty" },
-        [32]    = { "gtty" },
-        [33]    = { "access",           0x000025        },
-        [34]    = { "nice",             0x000001        },
-        [35]    = { "ftime" },
-        [36]    = { "sync",             0xffffff        },
-        [37]    = { "kill",             0x000011        },
-        [38]    = { "rename",           0x000055        },
-        [39]    = { "mkdir",            0x000025        },
-        [40]    = { "rmdir",            0x000005        },
-        [41]    = { "dup",              0x000001        },
-        [42]    = { "pipe",             0x000004        },
-        [43]    = { "times",            0x000004        },
-        [44]    = { "prof" },
-        [45]    = { "brk",              0x000004        },
-        [46]    = { "setgid",           0x000001        },
-        [47]    = { "getgid",           0xffffff        },
-        [48]    = { "signal",           0x000041        },
-        [49]    = { "geteuid",          0xffffff        },
-        [50]    = { "getegid",          0xffffff        },
-        [51]    = { "acct",             0x000005        },
-        [52]    = { "umount2",          0x000035        },
-        [53]    = { "lock" },
-        [54]    = { "ioctl",            0x000331        },
-        [55]    = { "fcntl",            0x000331        },
-        [56]    = { "mpx" },
-        [57]    = { "setpgid",          0x000011        },
-        [58]    = { "ulimit" },
-        [60]    = { "umask",            0x000002        },
-        [61]    = { "chroot",           0x000005        },
-        [62]    = { "ustat",            0x000043        },
-        [63]    = { "dup2",             0x000011        },
-        [64]    = { "getppid",          0xffffff        },
-        [65]    = { "getpgrp",          0xffffff        },
-        [66]    = { "setsid",           0xffffff        },
-        [67]    = { "sigaction" },
-        [68]    = { "sgetmask" },
-        [69]    = { "ssetmask" },
-        [70]    = { "setreuid" },
-        [71]    = { "setregid" },
-        [72]    = { "sigsuspend" },
-        [73]    = { "sigpending" },
-        [74]    = { "sethostname" },
-        [75]    = { "setrlimit" },
-        [76]    = { "getrlimit" },
-        [77]    = { "getrusage" },
-        [78]    = { "gettimeofday" },
-        [79]    = { "settimeofday" },
-        [80]    = { "getgroups" },
-        [81]    = { "setgroups" },
-        [82]    = { "select" },
-        [83]    = { "symlink" },
-        [84]    = { "oldlstat" },
-        [85]    = { "readlink" },
-        [86]    = { "uselib" },
-        [87]    = { "swapon" },
-        [88]    = { "reboot" },
-        [89]    = { "readdir" },
-        [91]    = { "munmap",           0x000034        },
-        [92]    = { "truncate" },
-        [93]    = { "ftruncate" },
-        [94]    = { "fchmod" },
-        [95]    = { "fchown" },
-        [96]    = { "getpriority" },
-        [97]    = { "setpriority" },
-        [99]    = { "statfs" },
-        [100]   = { "fstatfs" },
-        [102]   = { "socketcall" },
-        [103]   = { "syslog" },
-        [104]   = { "setitimer" },
-        [105]   = { "getitimer" },
-        [106]   = { "stat" },
-        [107]   = { "lstat" },
-        [108]   = { "fstat" },
-        [111]   = { "vhangup" },
-        [114]   = { "wait4" },
-        [115]   = { "swapoff" },
-        [116]   = { "sysinfo" },
-        [117]   = { "ipc" },
-        [118]   = { "fsync" },
-        [119]   = { "sigreturn" },
-        [120]   = { "clone" },
-        [121]   = { "setdomainname" },
-        [122]   = { "uname" },
-        [123]   = { "modify_ldt" },
-        [123]   = { "cacheflush" },
-        [124]   = { "adjtimex" },
-        [125]   = { "mprotect" },
-        [126]   = { "sigprocmask" },
-        [127]   = { "create_module" },
-        [128]   = { "init_module" },
-        [129]   = { "delete_module" },
-        [130]   = { "get_kernel_syms" },
-        [131]   = { "quotactl" },
-        [132]   = { "getpgid" },
-        [133]   = { "fchdir" },
-        [134]   = { "bdflush" },
-        [135]   = { "sysfs" },
-        [136]   = { "personality" },
-        [137]   = { "afs_syscall" },
-        [138]   = { "setfsuid" },
-        [139]   = { "setfsgid" },
-        [140]   = { "_llseek",                  0x014331        },
-        [141]   = { "getdents" },
-        [142]   = { "_newselect",               0x000141        },
-        [143]   = { "flock" },
-        [144]   = { "msync" },
-        [145]   = { "readv" },
-        [146]   = { "writev" },
-        [147]   = { "getsid",                   0x000001        },
-        [148]   = { "fdatasync",                0x000001        },
-        [149]   = { "_sysctl",                  0x000004        },
-        [150]   = { "mlock" },
-        [151]   = { "munlock" },
-        [152]   = { "mlockall" },
-        [153]   = { "munlockall" },
-        [154]   = { "sched_setparam" },
-        [155]   = { "sched_getparam" },
-        [156]   = { "sched_setscheduler" },
-        [157]   = { "sched_getscheduler" },
-        [158]   = { "sched_yield" },
-        [159]   = { "sched_get_priority_max" },
-        [160]   = { "sched_get_priority_min" },
-        [161]   = { "sched_rr_get_interval" },
-        [162]   = { "nanosleep",                0x000044        },
-        [163]   = { "mremap" },
-        [164]   = { "setresuid" },
-        [165]   = { "getresuid" },
-        [166]   = { "vm86" },
-        [167]   = { "query_module" },
-        [168]   = { "poll" },
-        [169]   = { "nfsservctl" },
-        [170]   = { "setresgid" },
-        [171]   = { "getresgid" },
-        [172]   = { "prctl",                    0x333331        },
-        [173]   = { "rt_sigreturn",             0xffffff        },
-        [174]   = { "rt_sigaction",             0x001441        },
-        [175]   = { "rt_sigprocmask",           0x001441        },
-        [176]   = { "rt_sigpending",            0x000014        },
-        [177]   = { "rt_sigtimedwait",          0x001444        },
-        [178]   = { "rt_sigqueueinfo",          0x000411        },
-        [179]   = { "rt_sigsuspend",            0x000014        },
-        [180]   = { "pread",                    0x003341        },
-        [181]   = { "pwrite",                   0x003341        },
-        [182]   = { "chown",                    0x000115        },
-        [183]   = { "getcwd" },
-        [184]   = { "capget" },
-        [185]   = { "capset" },
-        [186]   = { "sigaltstack" },
-        [187]   = { "sendfile" },
-        [188]   = { "getpmsg" },
-        [189]   = { "putpmsg" },
-        [190]   = { "vfork",                    0xffffff        },
-        [191]   = { "ugetrlimit" },
-        [192]   = { "mmap2",                    0x313314        },
-        [193]   = { "truncate64" },
-        [194]   = { "ftruncate64" },
-        [195]   = { "stat64",                   0x000045        },
-        [196]   = { "lstat64",                  0x000045        },
-        [197]   = { "fstat64",                  0x000041        },
-        [198]   = { "lchown32" },
-        [199]   = { "getuid32",                 0xffffff        },
-        [200]   = { "getgid32",                 0xffffff        },
-        [201]   = { "geteuid32",                0xffffff        },
-        [202]   = { "getegid32",                0xffffff        },
-        [203]   = { "setreuid32" },
-        [204]   = { "setregid32" },
-        [205]   = { "getgroups32" },
-        [206]   = { "setgroups32" },
-        [207]   = { "fchown32" },
-        [208]   = { "setresuid32" },
-        [209]   = { "getresuid32" },
-        [210]   = { "setresgid32" },
-        [211]   = { "getresgid32" },
-        [212]   = { "chown32" },
-        [213]   = { "setuid32" },
-        [214]   = { "setgid32" },
-        [215]   = { "setfsuid32" },
-        [216]   = { "setfsgid32" },
-        [217]   = { "pivot_root" },
-        [218]   = { "mincore" },
-        [219]   = { "madvise" },
-        [220]   = { "getdents64" },
-        [221]   = { "fcntl64" },
-        [223]   = { "security" },
-        [224]   = { "gettid" },
-        [225]   = { "readahead" },
-        [226]   = { "setxattr" },
-        [227]   = { "lsetxattr" },
-        [228]   = { "fsetxattr" },
-        [229]   = { "getxattr" },
-        [230]   = { "lgetxattr" },
-        [231]   = { "fgetxattr" },
-        [232]   = { "listxattr" },
-        [233]   = { "llistxattr" },
-        [234]   = { "flistxattr" },
-        [235]   = { "removexattr" },
-        [236]   = { "lremovexattr" },
-        [237]   = { "fremovexattr" },
-        [238]   = { "tkill" },
-        [239]   = { "sendfile64" },
-        [240]   = { "futex" },
-        [241]   = { "sched_setaffinity" },
-        [242]   = { "sched_getaffinity" },
-        [243]   = { "set_thread_area" },
-        [244]   = { "get_thread_area" },
-        [245]   = { "io_setup" },
-        [246]   = { "io_destroy" },
-        [247]   = { "io_getevents" },
-        [248]   = { "io_submit" },
-        [249]   = { "io_cancel" },
-        [250]   = { "fadvise64" },
-        [252]   = { "exit_group",               0x000001        },
-        [253]   = { "lookup_dcookie" },
-        [254]   = { "epoll_create" },
-        [255]   = { "epoll_ctl" },
-        [256]   = { "epoll_wait" },
-        [257]   = { "remap_file_pages" },
-        [258]   = { "set_tid_address" },
-        [259]   = { "timer_create" },
-        [260]   = { "timer_settime" },
-        [261]   = { "timer_gettime" },
-        [262]   = { "timer_getoverrun" },
-        [263]   = { "timer_delete" },
-        [264]   = { "clock_settime" },
-        [265]   = { "clock_gettime" },
-        [266]   = { "clock_getres" },
-        [267]   = { "clock_nanosleep" },
-        [268]   = { "statfs64" },
-        [269]   = { "fstatfs64" },
-        [270]   = { "tgkill" },
-        [271]   = { "utimes" },
-        [272]   = { "fadvise64_64" },
-        [273]   = { "vserver" },
-        [274]   = { "mbind" },
-        [275]   = { "get_mempolicy" },
-        [276]   = { "set_mempolicy" },
-        [277]   = { "mq_open" },
-        [278]   = { "mq_unlink" },
-        [279]   = { "mq_timedsend" },
-        [280]   = { "mq_timedreceive" },
-        [281]   = { "mq_notify" },
-        [282]   = { "mq_getsetattr" },
-        [283]   = { "sys_kexec_load" },
-};
-
-asmlinkage void do_syscall_trace(int leaving)
+/*
+ * handle tracing of system call entry
+ * - return the revised system call number or ULONG_MAX to cause ENOSYS
+ */
+asmlinkage unsigned long syscall_trace_entry(void)
 {
-#if 0
-        unsigned long *argp;
-        const char *name;
-        unsigned argmask;
-        char buffer[16];
-
-        if (!kstrace)
-                return;
-
-        if (!current->mm)
-                return;
-
-        if (__frame->gr7 == __NR_close)
-                return;
-
-#if 0
-        if (__frame->gr7 != __NR_mmap2 &&
-            __frame->gr7 != __NR_vfork &&
-            __frame->gr7 != __NR_execve &&
-            __frame->gr7 != __NR_exit)
-                return;
-#endif
-
-        argmask = 0;
-        name = NULL;
-        if (__frame->gr7 < NR_syscalls) {
-                name = __syscall_name_table[__frame->gr7].name;
-                argmask = __syscall_name_table[__frame->gr7].argmask;
-        }
-        if (!name) {
-                sprintf(buffer, "sys_%lx", __frame->gr7);
-                name = buffer;
-        }
-
-        if (!leaving) {
-                if (!argmask) {
-                        printk(KERN_CRIT "[%d] %s(%lx,%lx,%lx,%lx,%lx,%lx)\n",
-                               current->pid,
-                               name,
-                               __frame->gr8,
-                               __frame->gr9,
-                               __frame->gr10,
-                               __frame->gr11,
-                               __frame->gr12,
-                               __frame->gr13);
-                }
-                else if (argmask == 0xffffff) {
-                        printk(KERN_CRIT "[%d] %s()\n",
-                               current->pid,
-                               name);
-                }
-                else {
-                        printk(KERN_CRIT "[%d] %s(",
-                               current->pid,
-                               name);
-
-                        argp = &__frame->gr8;
-
-                        do {
-                                switch (argmask & 0xf) {
-                                case 1:
-                                        printk("%ld", (long) *argp);
-                                        break;
-                                case 2:
-                                        printk("%lo", *argp);
-                                        break;
-                                case 3:
-                                        printk("%lx", *argp);
-                                        break;
-                                case 4:
-                                        printk("%p", (void *) *argp);
-                                        break;
-                                case 5:
-                                        printk("\"%s\"", (char *) *argp);
-                                        break;
-                                }
-
-                                argp++;
-                                argmask >>= 4;
-                                if (argmask)
-                                        printk(",");
-
-                        } while (argmask);
-
-                        printk(")\n");
-                }
-        }
-        else {
-                if ((int)__frame->gr8 > -4096 && (int)__frame->gr8 < 4096)
-                        printk(KERN_CRIT "[%d] %s() = %ld\n", current->pid, name, __frame->gr8);
-                else
-                        printk(KERN_CRIT "[%d] %s() = %lx\n", current->pid, name, __frame->gr8);
+        __frame->__status |= REG__STATUS_SYSC_ENTRY;
+        if (tracehook_report_syscall_entry(__frame)) {
+                /* tracing decided this syscall should not happen, so
+                 * We'll return a bogus call number to get an ENOSYS
+                 * error, but leave the original number in
+                 * __frame->syscallno
+                 */
+                return ULONG_MAX;
         }
-        return;
-#endif
-
-        if (!test_thread_flag(TIF_SYSCALL_TRACE))
-                return;
-
-        if (!(current->ptrace & PT_PTRACED))
-                return;
 
-        /* we need to indicate entry or exit to strace */
-        if (leaving)
-                __frame->__status |= REG__STATUS_SYSC_EXIT;
-        else
-                __frame->__status |= REG__STATUS_SYSC_ENTRY;
-
-        ptrace_notify(SIGTRAP);
+        return __frame->syscallno;
+}
 
-        /*
-         * this isn't the same as continuing with a signal, but it will do
-         * for normal use.  strace only continues with a signal if the
-         * stopping signal is not SIGTRAP.  -brl
-         */
-        if (current->exit_code) {
-                send_sig(current->exit_code, current, 1);
-                current->exit_code = 0;
-        }
+/*
+ * handle tracing of system call exit
+ */
+asmlinkage void syscall_trace_exit(void)
+{
+        __frame->__status |= REG__STATUS_SYSC_EXIT;
+        tracehook_report_syscall_exit(__frame, 0);
 }
diff --git a/arch/frv/kernel/signal.c b/arch/frv/kernel/signal.c
index 3bdb368292a8..4a7a62c6e783 100644
--- a/arch/frv/kernel/signal.c
+++ b/arch/frv/kernel/signal.c
@@ -21,6 +21,7 @@
 #include <linux/unistd.h>
 #include <linux/personality.h>
 #include <linux/freezer.h>
+#include <linux/tracehook.h>
 #include <asm/ucontext.h>
 #include <asm/uaccess.h>
 #include <asm/cacheflush.h>
@@ -516,6 +517,9 @@ static void do_signal(void)
                          * clear the TIF_RESTORE_SIGMASK flag */
                         if (test_thread_flag(TIF_RESTORE_SIGMASK))
                                 clear_thread_flag(TIF_RESTORE_SIGMASK);
+
+                        tracehook_signal_handler(signr, &info, &ka, __frame,
+                                                 test_thread_flag(TIF_SINGLESTEP));
                 }
 
                 return;
@@ -564,4 +568,10 @@ asmlinkage void do_notify_resume(__u32 thread_info_flags)
         if (thread_info_flags & (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK))
                 do_signal();
 
+        /* deal with notification on about to resume userspace execution */
+        if (thread_info_flags & _TIF_NOTIFY_RESUME) {
+                clear_thread_flag(TIF_NOTIFY_RESUME);
+                tracehook_notify_resume(__frame);
+        }
+
 } /* end do_notify_resume() */
diff --git a/arch/frv/kernel/uaccess.c b/arch/frv/kernel/uaccess.c
index 9fb771a20df3..374f88d6cc00 100644
--- a/arch/frv/kernel/uaccess.c
+++ b/arch/frv/kernel/uaccess.c
@@ -23,8 +23,7 @@ long strncpy_from_user(char *dst, const char __user *src, long count)
         char *p, ch;
         long err = -EFAULT;
 
-        if (count < 0)
-                BUG();
+        BUG_ON(count < 0);
 
         p = dst;
 
@@ -76,8 +75,7 @@ long strnlen_user(const char __user *src, long count)
         long err = 0;
         char ch;
 
-        if (count < 0)
-                BUG();
+        BUG_ON(count < 0);
 
 #ifndef CONFIG_MMU
         if ((unsigned long) src < memory_start)
diff --git a/arch/frv/mb93090-mb00/pci-dma-nommu.c b/arch/frv/mb93090-mb00/pci-dma-nommu.c
index 52ff9aec799d..4e1ba0b15443 100644
--- a/arch/frv/mb93090-mb00/pci-dma-nommu.c
+++ b/arch/frv/mb93090-mb00/pci-dma-nommu.c
@@ -116,8 +116,7 @@ EXPORT_SYMBOL(dma_free_coherent);
 dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
                           enum dma_data_direction direction)
 {
-        if (direction == DMA_NONE)
-                BUG();
+        BUG_ON(direction == DMA_NONE);
 
         frv_cache_wback_inv((unsigned long) ptr, (unsigned long) ptr + size);
 
@@ -151,8 +150,7 @@ int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
                 frv_cache_wback_inv(sg_dma_address(&sg[i]),
                                     sg_dma_address(&sg[i]) + sg_dma_len(&sg[i]));
 
-        if (direction == DMA_NONE)
-                BUG();
+        BUG_ON(direction == DMA_NONE);
 
         return nents;
 }
diff --git a/arch/frv/mb93090-mb00/pci-dma.c b/arch/frv/mb93090-mb00/pci-dma.c
index 3ddedebc4eb3..45954f0813dc 100644
--- a/arch/frv/mb93090-mb00/pci-dma.c
+++ b/arch/frv/mb93090-mb00/pci-dma.c
@@ -48,8 +48,7 @@ EXPORT_SYMBOL(dma_free_coherent);
 dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
                           enum dma_data_direction direction)
 {
-        if (direction == DMA_NONE)
-                BUG();
+        BUG_ON(direction == DMA_NONE);
 
         frv_cache_wback_inv((unsigned long) ptr, (unsigned long) ptr + size);
 
@@ -81,8 +80,7 @@ int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
         void *vaddr;
         int i;
 
-        if (direction == DMA_NONE)
-                BUG();
+        BUG_ON(direction == DMA_NONE);
 
         dampr2 = __get_DAMPR(2);
 
diff --git a/arch/ia64/include/asm/kvm_host.h b/arch/ia64/include/asm/kvm_host.h
index 4542651e6acb..5f43697aed30 100644
--- a/arch/ia64/include/asm/kvm_host.h
+++ b/arch/ia64/include/asm/kvm_host.h
@@ -371,6 +371,7 @@ struct kvm_vcpu_arch {
         int last_run_cpu;
         int vmm_tr_slot;
         int vm_tr_slot;
+        int sn_rtc_tr_slot;
 
 #define KVM_MP_STATE_RUNNABLE          0
 #define KVM_MP_STATE_UNINITIALIZED     1
@@ -465,6 +466,7 @@ struct kvm_arch {
         unsigned long   vmm_init_rr;
 
         int             online_vcpus;
+        int             is_sn2;
 
         struct kvm_ioapic *vioapic;
         struct kvm_vm_stat stat;
@@ -472,6 +474,7 @@ struct kvm_arch {
 
         struct list_head assigned_dev_head;
         struct iommu_domain *iommu_domain;
+        int iommu_flags;
         struct hlist_head irq_ack_notifier_list;
 
         unsigned long irq_sources_bitmap;
@@ -578,6 +581,8 @@ struct kvm_vmm_info{
         kvm_vmm_entry   *vmm_entry;
         kvm_tramp_entry *tramp_entry;
         unsigned long   vmm_ivt;
+        unsigned long   patch_mov_ar;
+        unsigned long   patch_mov_ar_sn2;
 };
 
 int kvm_highest_pending_irq(struct kvm_vcpu *vcpu);
@@ -585,7 +590,6 @@ int kvm_emulate_halt(struct kvm_vcpu *vcpu);
 int kvm_pal_emul(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run);
 void kvm_sal_emul(struct kvm_vcpu *vcpu);
 
-static inline void kvm_inject_nmi(struct kvm_vcpu *vcpu) {}
 #endif /* __ASSEMBLY__*/
 
 #endif
diff --git a/arch/ia64/include/asm/pgtable.h b/arch/ia64/include/asm/pgtable.h
index 7a9bff47564f..0a9cc73d35c7 100644
--- a/arch/ia64/include/asm/pgtable.h
+++ b/arch/ia64/include/asm/pgtable.h
@@ -146,6 +146,8 @@
 #define PAGE_GATE       __pgprot(__ACCESS_BITS | _PAGE_PL_0 | _PAGE_AR_X_RX)
 #define PAGE_KERNEL     __pgprot(__DIRTY_BITS  | _PAGE_PL_0 | _PAGE_AR_RWX)
 #define PAGE_KERNELRX   __pgprot(__ACCESS_BITS | _PAGE_PL_0 | _PAGE_AR_RX)
+#define PAGE_KERNEL_UC  __pgprot(__DIRTY_BITS  | _PAGE_PL_0 | _PAGE_AR_RWX | \
+                                 _PAGE_MA_UC)
 
 # ifndef __ASSEMBLY__
 
diff --git a/arch/ia64/kernel/irq_ia64.c b/arch/ia64/kernel/irq_ia64.c
index acc4d19ae62a..b448197728be 100644
--- a/arch/ia64/kernel/irq_ia64.c
+++ b/arch/ia64/kernel/irq_ia64.c
@@ -610,6 +610,9 @@ static struct irqaction ipi_irqaction = {
         .name =         "IPI"
 };
 
+/*
+ * KVM uses this interrupt to force a cpu out of guest mode
+ */
 static struct irqaction resched_irqaction = {
         .handler =      dummy_handler,
         .flags =        IRQF_DISABLED,
diff --git a/arch/ia64/kvm/Kconfig b/arch/ia64/kvm/Kconfig
index 0a2d6b86075a..64d520937874 100644
--- a/arch/ia64/kvm/Kconfig
+++ b/arch/ia64/kvm/Kconfig
@@ -23,7 +23,7 @@ if VIRTUALIZATION
 
 config KVM
         tristate "Kernel-based Virtual Machine (KVM) support"
-        depends on HAVE_KVM && EXPERIMENTAL
+        depends on HAVE_KVM && MODULES && EXPERIMENTAL
         # for device assignment:
         depends on PCI
         select PREEMPT_NOTIFIERS
diff --git a/arch/ia64/kvm/kvm-ia64.c b/arch/ia64/kvm/kvm-ia64.c
index d20a5db4c4dd..80c57b0a21c4 100644
--- a/arch/ia64/kvm/kvm-ia64.c
+++ b/arch/ia64/kvm/kvm-ia64.c
@@ -41,6 +41,9 @@
 #include <asm/div64.h>
 #include <asm/tlb.h>
 #include <asm/elf.h>
+#include <asm/sn/addrs.h>
+#include <asm/sn/clksupport.h>
+#include <asm/sn/shub_mmr.h>
 
 #include "misc.h"
 #include "vti.h"
@@ -65,6 +68,16 @@ struct kvm_stats_debugfs_item debugfs_entries[] = {
         { NULL }
 };
 
+static unsigned long kvm_get_itc(struct kvm_vcpu *vcpu)
+{
+#if defined(CONFIG_IA64_SGI_SN2) || defined(CONFIG_IA64_GENERIC)
+        if (vcpu->kvm->arch.is_sn2)
+                return rtc_time();
+        else
+#endif
+                return ia64_getreg(_IA64_REG_AR_ITC);
+}
+
 static void kvm_flush_icache(unsigned long start, unsigned long len)
 {
         int l;
@@ -119,8 +132,7 @@ void kvm_arch_hardware_enable(void *garbage)
         unsigned long saved_psr;
         int slot;
 
-        pte = pte_val(mk_pte_phys(__pa(kvm_vmm_base),
-                                PAGE_KERNEL));
+        pte = pte_val(mk_pte_phys(__pa(kvm_vmm_base), PAGE_KERNEL));
         local_irq_save(saved_psr);
         slot = ia64_itr_entry(0x3, KVM_VMM_BASE, pte, KVM_VMM_SHIFT);
         local_irq_restore(saved_psr);
@@ -283,6 +295,18 @@ static int handle_sal_call(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 
 }
 
+static int __apic_accept_irq(struct kvm_vcpu *vcpu, uint64_t vector)
+{
+        struct vpd *vpd = to_host(vcpu->kvm, vcpu->arch.vpd);
+
+        if (!test_and_set_bit(vector, &vpd->irr[0])) {
+                vcpu->arch.irq_new_pending = 1;
+                kvm_vcpu_kick(vcpu);
+                return 1;
+        }
+        return 0;
+}
+
 /*
  *  offset: address offset to IPI space.
  *  value:  deliver value.
@@ -292,20 +316,20 @@ static void vcpu_deliver_ipi(struct kvm_vcpu *vcpu, uint64_t dm,
 {
         switch (dm) {
         case SAPIC_FIXED:
-                kvm_apic_set_irq(vcpu, vector, 0);
                 break;
         case SAPIC_NMI:
-                kvm_apic_set_irq(vcpu, 2, 0);
+                vector = 2;
                 break;
         case SAPIC_EXTINT:
-                kvm_apic_set_irq(vcpu, 0, 0);
+                vector = 0;
                 break;
         case SAPIC_INIT:
         case SAPIC_PMI:
         default:
                 printk(KERN_ERR"kvm: Unimplemented Deliver reserved IPI!\n");
-                break;
+                return;
         }
+        __apic_accept_irq(vcpu, vector);
 }
 
 static struct kvm_vcpu *lid_to_vcpu(struct kvm *kvm, unsigned long id,
@@ -413,6 +437,23 @@ static int handle_switch_rr6(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
         return 1;
 }
 
+static int kvm_sn2_setup_mappings(struct kvm_vcpu *vcpu)
+{
+        unsigned long pte, rtc_phys_addr, map_addr;
+        int slot;
+
+        map_addr = KVM_VMM_BASE + (1UL << KVM_VMM_SHIFT);
+        rtc_phys_addr = LOCAL_MMR_OFFSET | SH_RTC;
+        pte = pte_val(mk_pte_phys(rtc_phys_addr, PAGE_KERNEL_UC));
+        slot = ia64_itr_entry(0x3, map_addr, pte, PAGE_SHIFT);
+        vcpu->arch.sn_rtc_tr_slot = slot;
+        if (slot < 0) {
+                printk(KERN_ERR "Mayday mayday! RTC mapping failed!\n");
+                slot = 0;
+        }
+        return slot;
+}
+
 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
 {
 
@@ -426,7 +467,7 @@ int kvm_emulate_halt(struct kvm_vcpu *vcpu)
 
         if (irqchip_in_kernel(vcpu->kvm)) {
 
-                vcpu_now_itc = ia64_getreg(_IA64_REG_AR_ITC) + vcpu->arch.itc_offset;
+                vcpu_now_itc = kvm_get_itc(vcpu) + vcpu->arch.itc_offset;
 
                 if (time_after(vcpu_now_itc, vpd->itm)) {
                         vcpu->arch.timer_check = 1;
@@ -447,10 +488,10 @@ int kvm_emulate_halt(struct kvm_vcpu *vcpu)
                 hrtimer_cancel(p_ht);
                 vcpu->arch.ht_active = 0;
 
-                if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
+                if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests) ||
+                                kvm_cpu_has_pending_timer(vcpu))
                         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED)
-                                vcpu->arch.mp_state =
-                                        KVM_MP_STATE_RUNNABLE;
+                                vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
 
                 if (vcpu->arch.mp_state != KVM_MP_STATE_RUNNABLE)
                         return -EINTR;
@@ -551,22 +592,35 @@ static int kvm_insert_vmm_mapping(struct kvm_vcpu *vcpu)
         if (r < 0)
                 goto out;
         vcpu->arch.vm_tr_slot = r;
+
+#if defined(CONFIG_IA64_SGI_SN2) || defined(CONFIG_IA64_GENERIC)
+        if (kvm->arch.is_sn2) {
+                r = kvm_sn2_setup_mappings(vcpu);
+                if (r < 0)
+                        goto out;
+        }
+#endif
+
         r = 0;
 out:
         return r;
-
 }
 
 static void kvm_purge_vmm_mapping(struct kvm_vcpu *vcpu)
 {
-
+        struct kvm *kvm = vcpu->kvm;
         ia64_ptr_entry(0x3, vcpu->arch.vmm_tr_slot);
         ia64_ptr_entry(0x3, vcpu->arch.vm_tr_slot);
-
+#if defined(CONFIG_IA64_SGI_SN2) || defined(CONFIG_IA64_GENERIC)
+        if (kvm->arch.is_sn2)
+                ia64_ptr_entry(0x3, vcpu->arch.sn_rtc_tr_slot);
+#endif
 }
 
 static int kvm_vcpu_pre_transition(struct kvm_vcpu *vcpu)
 {
+        unsigned long psr;
+        int r;
         int cpu = smp_processor_id();
 
         if (vcpu->arch.last_run_cpu != cpu ||
@@ -578,36 +632,27 @@ static int kvm_vcpu_pre_transition(struct kvm_vcpu *vcpu)
 
         vcpu->arch.host_rr6 = ia64_get_rr(RR6);
         vti_set_rr6(vcpu->arch.vmm_rr);
-        return kvm_insert_vmm_mapping(vcpu);
+        local_irq_save(psr);
+        r = kvm_insert_vmm_mapping(vcpu);
+        local_irq_restore(psr);
+        return r;
 }
+
 static void kvm_vcpu_post_transition(struct kvm_vcpu *vcpu)
 {
         kvm_purge_vmm_mapping(vcpu);
         vti_set_rr6(vcpu->arch.host_rr6);
 }
 
-static int  vti_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
+static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 {
         union context *host_ctx, *guest_ctx;
         int r;
 
-        /*Get host and guest context with guest address space.*/
-        host_ctx = kvm_get_host_context(vcpu);
-        guest_ctx = kvm_get_guest_context(vcpu);
-
-        r = kvm_vcpu_pre_transition(vcpu);
-        if (r < 0)
-                goto out;
-        kvm_vmm_info->tramp_entry(host_ctx, guest_ctx);
-        kvm_vcpu_post_transition(vcpu);
-        r = 0;
-out:
-        return r;
-}
-
-static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
-{
-        int r;
+        /*
+         * down_read() may sleep and return with interrupts enabled
+         */
+        down_read(&vcpu->kvm->slots_lock);
 
 again:
         if (signal_pending(current)) {
@@ -616,26 +661,31 @@ again:
                 goto out;
         }
 
-        /*
-         * down_read() may sleep and return with interrupts enabled
-         */
-        down_read(&vcpu->kvm->slots_lock);
-
         preempt_disable();
         local_irq_disable();
 
-        vcpu->guest_mode = 1;
+        /*Get host and guest context with guest address space.*/
+        host_ctx = kvm_get_host_context(vcpu);
+        guest_ctx = kvm_get_guest_context(vcpu);
+
+        clear_bit(KVM_REQ_KICK, &vcpu->requests);
+
+        r = kvm_vcpu_pre_transition(vcpu);
+        if (r < 0)
+                goto vcpu_run_fail;
+
+        up_read(&vcpu->kvm->slots_lock);
         kvm_guest_enter();
-        r = vti_vcpu_run(vcpu, kvm_run);
-        if (r < 0) {
-                local_irq_enable();
-                preempt_enable();
-                kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
-                goto out;
-        }
+
+        /*
+         * Transition to the guest
+         */
+        kvm_vmm_info->tramp_entry(host_ctx, guest_ctx);
+
+        kvm_vcpu_post_transition(vcpu);
 
         vcpu->arch.launched = 1;
-        vcpu->guest_mode = 0;
+        set_bit(KVM_REQ_KICK, &vcpu->requests);
         local_irq_enable();
 
         /*
@@ -646,9 +696,10 @@ again:
          */
         barrier();
         kvm_guest_exit();
-        up_read(&vcpu->kvm->slots_lock);
         preempt_enable();
 
+        down_read(&vcpu->kvm->slots_lock);
+
         r = kvm_handle_exit(kvm_run, vcpu);
 
         if (r > 0) {
@@ -657,12 +708,20 @@ again:
         }
 
 out:
+        up_read(&vcpu->kvm->slots_lock);
         if (r > 0) {
                 kvm_resched(vcpu);
+                down_read(&vcpu->kvm->slots_lock);
                 goto again;
         }
 
         return r;
+
+vcpu_run_fail:
+        local_irq_enable();
+        preempt_enable();
+        kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
+        goto out;
 }
 
 static void kvm_set_mmio_data(struct kvm_vcpu *vcpu)
@@ -788,6 +847,9 @@ struct  kvm *kvm_arch_create_vm(void)
 
         if (IS_ERR(kvm))
                 return ERR_PTR(-ENOMEM);
+
+        kvm->arch.is_sn2 = ia64_platform_is("sn2");
+
         kvm_init_vm(kvm);
 
         kvm->arch.online_vcpus = 0;
@@ -884,7 +946,7 @@ int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
         RESTORE_REGS(saved_gp);
 
         vcpu->arch.irq_new_pending = 1;
-        vcpu->arch.itc_offset = regs->saved_itc - ia64_getreg(_IA64_REG_AR_ITC);
+        vcpu->arch.itc_offset = regs->saved_itc - kvm_get_itc(vcpu);
         set_bit(KVM_REQ_RESUME, &vcpu->requests);
 
         vcpu_put(vcpu);
@@ -1043,10 +1105,6 @@ static void kvm_free_vmm_area(void)
         }
 }
 
-static void vti_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
-{
-}
-
 static int vti_init_vpd(struct kvm_vcpu *vcpu)
 {
         int i;
@@ -1165,7 +1223,7 @@ int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
                 regs->cr_iip = PALE_RESET_ENTRY;
 
                 /*Initialize itc offset for vcpus*/
-                itc_offset = 0UL - ia64_getreg(_IA64_REG_AR_ITC);
+                itc_offset = 0UL - kvm_get_itc(vcpu);
                 for (i = 0; i < kvm->arch.online_vcpus; i++) {
                         v = (struct kvm_vcpu *)((char *)vcpu +
                                         sizeof(struct kvm_vcpu_data) * i);
@@ -1237,6 +1295,7 @@ static int vti_vcpu_setup(struct kvm_vcpu *vcpu, int id)
 
         local_irq_save(psr);
         r = kvm_insert_vmm_mapping(vcpu);
+        local_irq_restore(psr);
         if (r)
                 goto fail;
         r = kvm_vcpu_init(vcpu, vcpu->kvm, id);
@@ -1254,13 +1313,11 @@ static int vti_vcpu_setup(struct kvm_vcpu *vcpu, int id)
                 goto uninit;
 
         kvm_purge_vmm_mapping(vcpu);
-        local_irq_restore(psr);
 
         return 0;
 uninit:
         kvm_vcpu_uninit(vcpu);
 fail:
-        local_irq_restore(psr);
         return r;
 }
 
@@ -1291,7 +1348,6 @@ struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
         vcpu->kvm = kvm;
 
         cpu = get_cpu();
-        vti_vcpu_load(vcpu, cpu);
         r = vti_vcpu_setup(vcpu, id);
         put_cpu();
 
@@ -1427,7 +1483,7 @@ int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
         }
         for (i = 0; i < 4; i++)
                 regs->insvc[i] = vcpu->arch.insvc[i];
-        regs->saved_itc = vcpu->arch.itc_offset + ia64_getreg(_IA64_REG_AR_ITC);
+        regs->saved_itc = vcpu->arch.itc_offset + kvm_get_itc(vcpu);
         SAVE_REGS(xtp);
         SAVE_REGS(metaphysical_rr0);
         SAVE_REGS(metaphysical_rr4);
@@ -1574,6 +1630,7 @@ int kvm_arch_set_memory_region(struct kvm *kvm,
 
 void kvm_arch_flush_shadow(struct kvm *kvm)
 {
+        kvm_flush_remote_tlbs(kvm);
 }
 
 long kvm_arch_dev_ioctl(struct file *filp,
@@ -1616,8 +1673,37 @@ out:
         return 0;
 }
 
+
+/*
+ * On SN2, the ITC isn't stable, so copy in fast path code to use the
+ * SN2 RTC, replacing the ITC based default verion.
+ */
+static void kvm_patch_vmm(struct kvm_vmm_info *vmm_info,
+                          struct module *module)
+{
+        unsigned long new_ar, new_ar_sn2;
+        unsigned long module_base;
+
+        if (!ia64_platform_is("sn2"))
+                return;
+
+        module_base = (unsigned long)module->module_core;
+
+        new_ar = kvm_vmm_base + vmm_info->patch_mov_ar - module_base;
+        new_ar_sn2 = kvm_vmm_base + vmm_info->patch_mov_ar_sn2 - module_base;
+
+        printk(KERN_INFO "kvm: Patching ITC emulation to use SGI SN2 RTC "
+               "as source\n");
+
+        /*
+         * Copy the SN2 version of mov_ar into place. They are both
+         * the same size, so 6 bundles is sufficient (6 * 0x10).
+         */
+        memcpy((void *)new_ar, (void *)new_ar_sn2, 0x60);
+}
+
 static int kvm_relocate_vmm(struct kvm_vmm_info *vmm_info,
-                                                struct module *module)
+                            struct module *module)
 {
         unsigned long module_base;
         unsigned long vmm_size;
@@ -1639,6 +1725,7 @@ static int kvm_relocate_vmm(struct kvm_vmm_info *vmm_info,
                 return -EFAULT;
 
         memcpy((void *)kvm_vmm_base, (void *)module_base, vmm_size);
+        kvm_patch_vmm(vmm_info, module);
         kvm_flush_icache(kvm_vmm_base, vmm_size);
 
         /*Recalculate kvm_vmm_info based on new VMM*/
@@ -1792,38 +1879,24 @@ void kvm_arch_hardware_unsetup(void)
 {
 }
 
-static void vcpu_kick_intr(void *info)
-{
-#ifdef DEBUG
-        struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
-        printk(KERN_DEBUG"vcpu_kick_intr %p \n", vcpu);
-#endif
-}
-
 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
 {
-        int ipi_pcpu = vcpu->cpu;
-        int cpu = get_cpu();
+        int me;
+        int cpu = vcpu->cpu;
 
         if (waitqueue_active(&vcpu->wq))
                 wake_up_interruptible(&vcpu->wq);
 
-        if (vcpu->guest_mode && cpu != ipi_pcpu)
-                smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0);
+        me = get_cpu();
+        if (cpu != me && (unsigned) cpu < nr_cpu_ids && cpu_online(cpu))
+                if (!test_and_set_bit(KVM_REQ_KICK, &vcpu->requests))
+                        smp_send_reschedule(cpu);
         put_cpu();
 }
 
-int kvm_apic_set_irq(struct kvm_vcpu *vcpu, u8 vec, u8 trig)
+int kvm_apic_set_irq(struct kvm_vcpu *vcpu, struct kvm_lapic_irq *irq)
 {
-
-        struct vpd *vpd = to_host(vcpu->kvm, vcpu->arch.vpd);
-
-        if (!test_and_set_bit(vec, &vpd->irr[0])) {
-                vcpu->arch.irq_new_pending = 1;
-                kvm_vcpu_kick(vcpu);
-                return 1;
-        }
-        return 0;
+        return __apic_accept_irq(vcpu, irq->vector);
 }
 
 int kvm_apic_match_physical_addr(struct kvm_lapic *apic, u16 dest)
@@ -1836,20 +1909,18 @@ int kvm_apic_match_logical_addr(struct kvm_lapic *apic, u8 mda)
         return 0;
 }
 
-struct kvm_vcpu *kvm_get_lowest_prio_vcpu(struct kvm *kvm, u8 vector,
-                                       unsigned long bitmap)
+int kvm_apic_compare_prio(struct kvm_vcpu *vcpu1, struct kvm_vcpu *vcpu2)
 {
-        struct kvm_vcpu *lvcpu = kvm->vcpus[0];
-        int i;
-
-        for (i = 1; i < kvm->arch.online_vcpus; i++) {
-                if (!kvm->vcpus[i])
-                        continue;
-                if (lvcpu->arch.xtp > kvm->vcpus[i]->arch.xtp)
-                        lvcpu = kvm->vcpus[i];
-        }
+        return vcpu1->arch.xtp - vcpu2->arch.xtp;
+}
 
-        return lvcpu;
+int kvm_apic_match_dest(struct kvm_vcpu *vcpu, struct kvm_lapic *source,
+                int short_hand, int dest, int dest_mode)
+{
+        struct kvm_lapic *target = vcpu->arch.apic;
+        return (dest_mode == 0) ?
+                kvm_apic_match_physical_addr(target, dest) :
+                kvm_apic_match_logical_addr(target, dest);
 }
 
 static int find_highest_bits(int *dat)
@@ -1888,6 +1959,12 @@ int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu)
         return 0;
 }
 
+int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
+{
+        /* do real check here */
+        return 1;
+}
+
 int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
 {
         return vcpu->arch.timer_fired;
@@ -1918,6 +1995,7 @@ static int vcpu_reset(struct kvm_vcpu *vcpu)
         long psr;
         local_irq_save(psr);
         r = kvm_insert_vmm_mapping(vcpu);
+        local_irq_restore(psr);
         if (r)
                 goto fail;
 
@@ -1930,7 +2008,6 @@ static int vcpu_reset(struct kvm_vcpu *vcpu)
         kvm_purge_vmm_mapping(vcpu);
         r = 0;
 fail:
-        local_irq_restore(psr);
         return r;
 }
 
diff --git a/arch/ia64/kvm/kvm_fw.c b/arch/ia64/kvm/kvm_fw.c
index a8ae52ed5635..e4b82319881d 100644
--- a/arch/ia64/kvm/kvm_fw.c
+++ b/arch/ia64/kvm/kvm_fw.c
@@ -21,6 +21,9 @@
 
 #include <linux/kvm_host.h>
 #include <linux/smp.h>
+#include <asm/sn/addrs.h>
+#include <asm/sn/clksupport.h>
+#include <asm/sn/shub_mmr.h>
 
 #include "vti.h"
 #include "misc.h"
@@ -188,12 +191,35 @@ static struct ia64_pal_retval pal_freq_base(struct kvm_vcpu *vcpu)
         return result;
 }
 
-static struct ia64_pal_retval pal_freq_ratios(struct kvm_vcpu *vcpu)
+/*
+ * On the SGI SN2, the ITC isn't stable. Emulation backed by the SN2
+ * RTC is used instead. This function patches the ratios from SAL
+ * to match the RTC before providing them to the guest.
+ */
+static void sn2_patch_itc_freq_ratios(struct ia64_pal_retval *result)
 {
+        struct pal_freq_ratio *ratio;
+        unsigned long sal_freq, sal_drift, factor;
+
+        result->status = ia64_sal_freq_base(SAL_FREQ_BASE_PLATFORM,
+                                            &sal_freq, &sal_drift);
+        ratio = (struct pal_freq_ratio *)&result->v2;
+        factor = ((sal_freq * 3) + (sn_rtc_cycles_per_second / 2)) /
+                sn_rtc_cycles_per_second;
+
+        ratio->num = 3;
+        ratio->den = factor;
+}
 
+static struct ia64_pal_retval pal_freq_ratios(struct kvm_vcpu *vcpu)
+{
         struct ia64_pal_retval result;
 
         PAL_CALL(result, PAL_FREQ_RATIOS, 0, 0, 0);
+
+        if (vcpu->kvm->arch.is_sn2)
+                sn2_patch_itc_freq_ratios(&result);
+
         return result;
 }
 
diff --git a/arch/ia64/kvm/lapic.h b/arch/ia64/kvm/lapic.h
index 6d6cbcb14893..ee541cebcd78 100644
--- a/arch/ia64/kvm/lapic.h
+++ b/arch/ia64/kvm/lapic.h
@@ -20,6 +20,10 @@ void kvm_free_lapic(struct kvm_vcpu *vcpu);
 
 int kvm_apic_match_physical_addr(struct kvm_lapic *apic, u16 dest);
 int kvm_apic_match_logical_addr(struct kvm_lapic *apic, u8 mda);
-int kvm_apic_set_irq(struct kvm_vcpu *vcpu, u8 vec, u8 trig);
+int kvm_apic_match_dest(struct kvm_vcpu *vcpu, struct kvm_lapic *source,
+                int short_hand, int dest, int dest_mode);
+int kvm_apic_compare_prio(struct kvm_vcpu *vcpu1, struct kvm_vcpu *vcpu2);
+int kvm_apic_set_irq(struct kvm_vcpu *vcpu, struct kvm_lapic_irq *irq);
+#define kvm_apic_present(x) (true)
 
 #endif
diff --git a/arch/ia64/kvm/optvfault.S b/arch/ia64/kvm/optvfault.S
index 32254ce9a1bd..f793be3effff 100644
--- a/arch/ia64/kvm/optvfault.S
+++ b/arch/ia64/kvm/optvfault.S
@@ -11,6 +11,7 @@
 
 #include <asm/asmmacro.h>
 #include <asm/processor.h>
+#include <asm/kvm_host.h>
 
 #include "vti.h"
 #include "asm-offsets.h"
@@ -140,6 +141,35 @@ GLOBAL_ENTRY(kvm_asm_mov_from_ar)
         ;;
 END(kvm_asm_mov_from_ar)
 
+/*
+ * Special SGI SN2 optimized version of mov_from_ar using the SN2 RTC
+ * clock as it's source for emulating the ITC. This version will be
+ * copied on top of the original version if the host is determined to
+ * be an SN2.
+ */
+GLOBAL_ENTRY(kvm_asm_mov_from_ar_sn2)
+        add r18=VMM_VCPU_ITC_OFS_OFFSET, r21
+        movl r19 = (KVM_VMM_BASE+(1<<KVM_VMM_SHIFT))
+
+        add r16=VMM_VCPU_LAST_ITC_OFFSET,r21
+        extr.u r17=r25,6,7
+        mov r24=b0
+        ;;
+        ld8 r18=[r18]
+        ld8 r19=[r19]
+        addl r20=@gprel(asm_mov_to_reg),gp
+        ;;
+        add r19=r19,r18
+        shladd r17=r17,4,r20
+        ;;
+        adds r30=kvm_resume_to_guest-asm_mov_to_reg,r20
+        st8 [r16] = r19
+        mov b0=r17
+        br.sptk.few b0
+        ;;
+END(kvm_asm_mov_from_ar_sn2)
+
+
 
 // mov r1=rr[r3]
 GLOBAL_ENTRY(kvm_asm_mov_from_rr)
diff --git a/arch/ia64/kvm/process.c b/arch/ia64/kvm/process.c
index b1dc80952d91..a8f84da04b49 100644
--- a/arch/ia64/kvm/process.c
+++ b/arch/ia64/kvm/process.c
@@ -652,20 +652,25 @@ void  kvm_ia64_handle_break(unsigned long ifa, struct kvm_pt_regs *regs,
                 unsigned long isr, unsigned long iim)
 {
         struct kvm_vcpu *v = current_vcpu;
+        long psr;
 
         if (ia64_psr(regs)->cpl == 0) {
                 /* Allow hypercalls only when cpl = 0.  */
                 if (iim == DOMN_PAL_REQUEST) {
+                        local_irq_save(psr);
                         set_pal_call_data(v);
                         vmm_transition(v);
                         get_pal_call_result(v);
                         vcpu_increment_iip(v);
+                        local_irq_restore(psr);
                         return;
                 } else if (iim == DOMN_SAL_REQUEST) {
+                        local_irq_save(psr);
                         set_sal_call_data(v);
                         vmm_transition(v);
                         get_sal_call_result(v);
                         vcpu_increment_iip(v);
+                        local_irq_restore(psr);
                         return;
                 }
         }
diff --git a/arch/ia64/kvm/vcpu.c b/arch/ia64/kvm/vcpu.c
index a18ee17b9192..a2c6c15e4761 100644
--- a/arch/ia64/kvm/vcpu.c
+++ b/arch/ia64/kvm/vcpu.c
@@ -788,13 +788,29 @@ void vcpu_set_fpreg(struct kvm_vcpu *vcpu, unsigned long reg,
                 setfpreg(reg, val, regs);   /* FIXME: handle NATs later*/
 }
 
+/*
+ * The Altix RTC is mapped specially here for the vmm module
+ */
+#define SN_RTC_BASE     (u64 *)(KVM_VMM_BASE+(1UL<<KVM_VMM_SHIFT))
+static long kvm_get_itc(struct kvm_vcpu *vcpu)
+{
+#if defined(CONFIG_IA64_SGI_SN2) || defined(CONFIG_IA64_GENERIC)
+        struct kvm *kvm = (struct kvm *)KVM_VM_BASE;
+
+        if (kvm->arch.is_sn2)
+                return (*SN_RTC_BASE);
+        else
+#endif
+                return ia64_getreg(_IA64_REG_AR_ITC);
+}
+
 /************************************************************************
  * lsapic timer
  ***********************************************************************/
 u64 vcpu_get_itc(struct kvm_vcpu *vcpu)
 {
         unsigned long guest_itc;
-        guest_itc = VMX(vcpu, itc_offset) + ia64_getreg(_IA64_REG_AR_ITC);
+        guest_itc = VMX(vcpu, itc_offset) + kvm_get_itc(vcpu);
 
         if (guest_itc >= VMX(vcpu, last_itc)) {
                 VMX(vcpu, last_itc) = guest_itc;
@@ -809,7 +825,7 @@ static void vcpu_set_itc(struct kvm_vcpu *vcpu, u64 val)
         struct kvm_vcpu *v;
         struct kvm *kvm;
         int i;
-        long itc_offset = val - ia64_getreg(_IA64_REG_AR_ITC);
+        long itc_offset = val - kvm_get_itc(vcpu);
         unsigned long vitv = VCPU(vcpu, itv);
 
         kvm = (struct kvm *)KVM_VM_BASE;
diff --git a/arch/ia64/kvm/vmm.c b/arch/ia64/kvm/vmm.c
index 9eee5c04bacc..f4b4c899bb6c 100644
--- a/arch/ia64/kvm/vmm.c
+++ b/arch/ia64/kvm/vmm.c
@@ -30,15 +30,19 @@ MODULE_AUTHOR("Intel");
 MODULE_LICENSE("GPL");
 
 extern char kvm_ia64_ivt;
+extern char kvm_asm_mov_from_ar;
+extern char kvm_asm_mov_from_ar_sn2;
 extern fpswa_interface_t *vmm_fpswa_interface;
 
 long vmm_sanity = 1;
 
 struct kvm_vmm_info vmm_info = {
-        .module      = THIS_MODULE,
-        .vmm_entry   = vmm_entry,
-        .tramp_entry = vmm_trampoline,
-        .vmm_ivt     = (unsigned long)&kvm_ia64_ivt,
+        .module                 = THIS_MODULE,
+        .vmm_entry              = vmm_entry,
+        .tramp_entry            = vmm_trampoline,
+        .vmm_ivt                = (unsigned long)&kvm_ia64_ivt,
+        .patch_mov_ar           = (unsigned long)&kvm_asm_mov_from_ar,
+        .patch_mov_ar_sn2       = (unsigned long)&kvm_asm_mov_from_ar_sn2,
 };
 
 static int __init  kvm_vmm_init(void)
diff --git a/arch/ia64/kvm/vmm_ivt.S b/arch/ia64/kvm/vmm_ivt.S
index 3ef1a017a318..40920c630649 100644
--- a/arch/ia64/kvm/vmm_ivt.S
+++ b/arch/ia64/kvm/vmm_ivt.S
@@ -95,7 +95,7 @@ GLOBAL_ENTRY(kvm_vmm_panic)
         ;;
         srlz.i    // guarantee that interruption collection is on
         ;;
-        //(p15) ssm psr.i               // restore psr.i
+        (p15) ssm psr.i               // restore psr.
         addl r14=@gprel(ia64_leave_hypervisor),gp
         ;;
         KVM_SAVE_REST
@@ -249,7 +249,7 @@ ENTRY(kvm_break_fault)
         ;;
         srlz.i         // guarantee that interruption collection is on
         ;;
-        //(p15)ssm psr.i               // restore psr.i
+        (p15)ssm psr.i               // restore psr.i
         addl r14=@gprel(ia64_leave_hypervisor),gp
         ;;
         KVM_SAVE_REST
@@ -439,7 +439,7 @@ kvm_dispatch_vexirq:
         ;;
         srlz.i // guarantee that interruption collection is on
         ;;
-        //(p15) ssm psr.i               // restore psr.i
+        (p15) ssm psr.i               // restore psr.i
         adds r3=8,r2                // set up second base pointer
         ;;
         KVM_SAVE_REST
@@ -819,7 +819,7 @@ ENTRY(kvm_dtlb_miss_dispatch)
         ;;
         srlz.i     // guarantee that interruption collection is on
         ;;
-        //(p15) ssm psr.i               // restore psr.i
+        (p15) ssm psr.i               // restore psr.i
         addl r14=@gprel(ia64_leave_hypervisor_prepare),gp
         ;;
         KVM_SAVE_REST
@@ -842,7 +842,7 @@ ENTRY(kvm_itlb_miss_dispatch)
         ;;
         srlz.i   // guarantee that interruption collection is on
         ;;
-        //(p15) ssm psr.i               // restore psr.i
+        (p15) ssm psr.i               // restore psr.i
         addl r14=@gprel(ia64_leave_hypervisor),gp
         ;;
         KVM_SAVE_REST
@@ -871,7 +871,7 @@ ENTRY(kvm_dispatch_reflection)
         ;;
         srlz.i   // guarantee that interruption collection is on
         ;;
-        //(p15) ssm psr.i               // restore psr.i
+        (p15) ssm psr.i               // restore psr.i
         addl r14=@gprel(ia64_leave_hypervisor),gp
         ;;
         KVM_SAVE_REST
@@ -898,7 +898,7 @@ ENTRY(kvm_dispatch_virtualization_fault)
         ;;
         srlz.i    // guarantee that interruption collection is on
         ;;
-        //(p15) ssm psr.i               // restore psr.i
+        (p15) ssm psr.i               // restore psr.i
         addl r14=@gprel(ia64_leave_hypervisor_prepare),gp
         ;;
         KVM_SAVE_REST
@@ -920,7 +920,7 @@ ENTRY(kvm_dispatch_interrupt)
         ;;
         srlz.i
         ;;
-        //(p15) ssm psr.i
+        (p15) ssm psr.i
         addl r14=@gprel(ia64_leave_hypervisor),gp
         ;;
         KVM_SAVE_REST
@@ -1333,7 +1333,7 @@ hostret =   r24
         ;;
 (p7)    srlz.i
         ;;
-//(p6)    ssm psr.i
+(p6)    ssm psr.i
         ;;
         mov rp=rpsave
         mov ar.pfs=pfssave
diff --git a/arch/ia64/kvm/vtlb.c b/arch/ia64/kvm/vtlb.c
index 2c2501f13159..4290a429bf7c 100644
--- a/arch/ia64/kvm/vtlb.c
+++ b/arch/ia64/kvm/vtlb.c
@@ -254,7 +254,8 @@ u64 guest_vhpt_lookup(u64 iha, u64 *pte)
                         "(p7) st8 [%2]=r9;;"
                         "ssm psr.ic;;"
                         "srlz.d;;"
-                        /* "ssm psr.i;;" Once interrupts in vmm open, need fix*/
+                        "ssm psr.i;;"
+                        "srlz.d;;"
                         : "=r"(ret) : "r"(iha), "r"(pte):"memory");
 
         return ret;
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 09b1287a92ce..25f3b0a11ca8 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -72,6 +72,7 @@ config MIPS_COBALT
         select IRQ_CPU
         select IRQ_GT641XX
         select PCI_GT64XXX_PCI0
+        select PCI
         select SYS_HAS_CPU_NEVADA
         select SYS_HAS_EARLY_PRINTK
         select SYS_SUPPORTS_32BIT_KERNEL
@@ -593,7 +594,7 @@ config WR_PPMC
           board, which is based on GT64120 bridge chip.
 
 config CAVIUM_OCTEON_SIMULATOR
-        bool "Support for the Cavium Networks Octeon Simulator"
+        bool "Cavium Networks Octeon Simulator"
         select CEVT_R4K
         select 64BIT_PHYS_ADDR
         select DMA_COHERENT
@@ -607,7 +608,7 @@ config CAVIUM_OCTEON_SIMULATOR
           hardware.
 
 config CAVIUM_OCTEON_REFERENCE_BOARD
-        bool "Support for the Cavium Networks Octeon reference board"
+        bool "Cavium Networks Octeon reference board"
         select CEVT_R4K
         select 64BIT_PHYS_ADDR
         select DMA_COHERENT
diff --git a/arch/mips/include/asm/cpu-info.h b/arch/mips/include/asm/cpu-info.h
index 744cd8fb107f..126044308dec 100644
--- a/arch/mips/include/asm/cpu-info.h
+++ b/arch/mips/include/asm/cpu-info.h
@@ -39,8 +39,8 @@ struct cache_desc {
 #define MIPS_CACHE_PINDEX       0x00000020      /* Physically indexed cache */
 
 struct cpuinfo_mips {
-        unsigned long           udelay_val;
-        unsigned long           asid_cache;
+        unsigned int            udelay_val;
+        unsigned int            asid_cache;
 
         /*
          * Capability and feature descriptor structure for MIPS CPU
diff --git a/arch/mips/include/asm/delay.h b/arch/mips/include/asm/delay.h
index b0bccd2c4ed5..a07e51b2be13 100644
--- a/arch/mips/include/asm/delay.h
+++ b/arch/mips/include/asm/delay.h
@@ -11,94 +11,12 @@
 #ifndef _ASM_DELAY_H
 #define _ASM_DELAY_H
 
-#include <linux/param.h>
-#include <linux/smp.h>
+extern void __delay(unsigned int loops);
+extern void __ndelay(unsigned int ns);
+extern void __udelay(unsigned int us);
 
-#include <asm/compiler.h>
-#include <asm/war.h>
-
-static inline void __delay(unsigned long loops)
-{
-        if (sizeof(long) == 4)
-                __asm__ __volatile__ (
-                "       .set    noreorder                               \n"
-                "       .align  3                                       \n"
-                "1:     bnez    %0, 1b                                  \n"
-                "       subu    %0, 1                                   \n"
-                "       .set    reorder                                 \n"
-                : "=r" (loops)
-                : "0" (loops));
-        else if (sizeof(long) == 8 && !DADDI_WAR)
-                __asm__ __volatile__ (
-                "       .set    noreorder                               \n"
-                "       .align  3                                       \n"
-                "1:     bnez    %0, 1b                                  \n"
-                "       dsubu   %0, 1                                   \n"
-                "       .set    reorder                                 \n"
-                : "=r" (loops)
-                : "0" (loops));
-        else if (sizeof(long) == 8 && DADDI_WAR)
-                __asm__ __volatile__ (
-                "       .set    noreorder                               \n"
-                "       .align  3                                       \n"
-                "1:     bnez    %0, 1b                                  \n"
-                "       dsubu   %0, %2                                  \n"
-                "       .set    reorder                                 \n"
-                : "=r" (loops)
-                : "0" (loops), "r" (1));
-}
-
-
-/*
- * Division by multiplication: you don't have to worry about
- * loss of precision.
- *
- * Use only for very small delays ( < 1 msec).  Should probably use a
- * lookup table, really, as the multiplications take much too long with
- * short delays.  This is a "reasonable" implementation, though (and the
- * first constant multiplications gets optimized away if the delay is
- * a constant)
- */
-
-static inline void __udelay(unsigned long usecs, unsigned long lpj)
-{
-        unsigned long hi, lo;
-
-        /*
-         * The rates of 128 is rounded wrongly by the catchall case
-         * for 64-bit.  Excessive precission?  Probably ...
-         */
-#if defined(CONFIG_64BIT) && (HZ == 128)
-        usecs *= 0x0008637bd05af6c7UL;          /* 2**64 / (1000000 / HZ) */
-#elif defined(CONFIG_64BIT)
-        usecs *= (0x8000000000000000UL / (500000 / HZ));
-#else /* 32-bit junk follows here */
-        usecs *= (unsigned long) (((0x8000000000000000ULL / (500000 / HZ)) +
-                                   0x80000000ULL) >> 32);
-#endif
-
-        if (sizeof(long) == 4)
-                __asm__("multu\t%2, %3"
-                : "=h" (usecs), "=l" (lo)
-                : "r" (usecs), "r" (lpj)
-                : GCC_REG_ACCUM);
-        else if (sizeof(long) == 8 && !R4000_WAR)
-                __asm__("dmultu\t%2, %3"
-                : "=h" (usecs), "=l" (lo)
-                : "r" (usecs), "r" (lpj)
-                : GCC_REG_ACCUM);
-        else if (sizeof(long) == 8 && R4000_WAR)
-                __asm__("dmultu\t%3, %4\n\tmfhi\t%0"
-                : "=r" (usecs), "=h" (hi), "=l" (lo)
-                : "r" (usecs), "r" (lpj)
-                : GCC_REG_ACCUM);
-
-        __delay(usecs);
-}
-
-#define __udelay_val cpu_data[raw_smp_processor_id()].udelay_val
-
-#define udelay(usecs) __udelay((usecs), __udelay_val)
+#define ndelay(ns) __udelay(ns)
+#define udelay(us) __udelay(us)
 
 /* make sure "usecs *= ..." in udelay do not overflow. */
 #if HZ >= 1000
diff --git a/arch/mips/include/asm/ioctl.h b/arch/mips/include/asm/ioctl.h
index 85067e248a83..916163401b2c 100644
--- a/arch/mips/include/asm/ioctl.h
+++ b/arch/mips/include/asm/ioctl.h
@@ -60,12 +60,16 @@
          ((nr)   << _IOC_NRSHIFT) | \
          ((size) << _IOC_SIZESHIFT))
 
+#ifdef __KERNEL__
 /* provoke compile error for invalid uses of size argument */
 extern unsigned int __invalid_size_argument_for_IOC;
 #define _IOC_TYPECHECK(t) \
         ((sizeof(t) == sizeof(t[1]) && \
           sizeof(t) < (1 << _IOC_SIZEBITS)) ? \
           sizeof(t) : __invalid_size_argument_for_IOC)
+#else
+#define _IOC_TYPECHECK(t)       (sizeof(t))
+#endif
 
 /* used to create numbers */
 #define _IO(type, nr)           _IOC(_IOC_NONE, (type), (nr), 0)
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index 26760cad8b69..e0a4ac18fa07 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -42,7 +42,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
         seq_printf(m, fmt, __cpu_name[n],
                                    (version >> 4) & 0x0f, version & 0x0f,
                                    (fp_vers >> 4) & 0x0f, fp_vers & 0x0f);
-        seq_printf(m, "BogoMIPS\t\t: %lu.%02lu\n",
+        seq_printf(m, "BogoMIPS\t\t: %u.%02u\n",
                       cpu_data[n].udelay_val / (500000/HZ),
                       (cpu_data[n].udelay_val / (5000/HZ)) % 100);
         seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no");
diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile
index c13c7ad2cdae..2adead5a8a37 100644
--- a/arch/mips/lib/Makefile
+++ b/arch/mips/lib/Makefile
@@ -2,8 +2,8 @@
 # Makefile for MIPS-specific library files..
 #
 
-lib-y   += csum_partial.o memcpy.o memcpy-inatomic.o memset.o strlen_user.o \
-           strncpy_user.o strnlen_user.o uncached.o
+lib-y   += csum_partial.o delay.o memcpy.o memcpy-inatomic.o memset.o \
+           strlen_user.o strncpy_user.o strnlen_user.o uncached.o
 
 obj-y                   += iomap.o
 obj-$(CONFIG_PCI)       += iomap-pci.o
diff --git a/arch/mips/lib/delay.c b/arch/mips/lib/delay.c
new file mode 100644
index 000000000000..f69c6b569eb3
--- /dev/null
+++ b/arch/mips/lib/delay.c
@@ -0,0 +1,56 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1994 by Waldorf Electronics
+ * Copyright (C) 1995 - 2000, 01, 03 by Ralf Baechle
+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
+ * Copyright (C) 2007  Maciej W. Rozycki
+ */
+#include <linux/module.h>
+#include <linux/param.h>
+#include <linux/smp.h>
+
+#include <asm/compiler.h>
+#include <asm/war.h>
+
+inline void __delay(unsigned int loops)
+{
+        __asm__ __volatile__ (
+        "       .set    noreorder                               \n"
+        "       .align  3                                       \n"
+        "1:     bnez    %0, 1b                                  \n"
+        "       subu    %0, 1                                   \n"
+        "       .set    reorder                                 \n"
+        : "=r" (loops)
+        : "0" (loops));
+}
+EXPORT_SYMBOL(__delay);
+
+/*
+ * Division by multiplication: you don't have to worry about
+ * loss of precision.
+ *
+ * Use only for very small delays ( < 1 msec).  Should probably use a
+ * lookup table, really, as the multiplications take much too long with
+ * short delays.  This is a "reasonable" implementation, though (and the
+ * first constant multiplications gets optimized away if the delay is
+ * a constant)
+ */
+
+void __udelay(unsigned long us)
+{
+        unsigned int lpj = current_cpu_data.udelay_val;
+
+        __delay((us * 0x000010c7 * HZ * lpj) >> 32);
+}
+EXPORT_SYMBOL(__udelay);
+
+void __ndelay(unsigned long ns)
+{
+        unsigned int lpj = current_cpu_data.udelay_val;
+
+        __delay((us * 0x00000005 * HZ * lpj) >> 32);
+}
+EXPORT_SYMBOL(__ndelay);
diff --git a/arch/mips/sibyte/cfe/setup.c b/arch/mips/sibyte/cfe/setup.c
index 3de30f79db3f..eb5396cf81bb 100644
--- a/arch/mips/sibyte/cfe/setup.c
+++ b/arch/mips/sibyte/cfe/setup.c
@@ -288,13 +288,7 @@ void __init prom_init(void)
          */
         cfe_cons_handle = cfe_getstdhandle(CFE_STDHANDLE_CONSOLE);
         if (cfe_getenv("LINUX_CMDLINE", arcs_cmdline, CL_SIZE) < 0) {
-                if (argc < 0) {
-                        /*
-                         * It's OK for direct boot to not provide a
-                         *  command line
-                         */
-                        strcpy(arcs_cmdline, "root=/dev/ram0 ");
-                } else {
+                if (argc >= 0) {
                         /* The loader should have set the command line */
                         /* too early for panic to do any good */
                         printk("LINUX_CMDLINE not defined in cfe.");
diff --git a/arch/mn10300/Kconfig b/arch/mn10300/Kconfig
index 355926730e8d..89faacad5d17 100644
--- a/arch/mn10300/Kconfig
+++ b/arch/mn10300/Kconfig
@@ -8,6 +8,7 @@ mainmenu "Linux Kernel Configuration"
 config MN10300
         def_bool y
         select HAVE_OPROFILE
+        select HAVE_ARCH_TRACEHOOK
 
 config AM33
         def_bool y
diff --git a/arch/mn10300/include/asm/elf.h b/arch/mn10300/include/asm/elf.h
index bf09f8bb392e..49105462e6fc 100644
--- a/arch/mn10300/include/asm/elf.h
+++ b/arch/mn10300/include/asm/elf.h
@@ -34,7 +34,7 @@
  */
 typedef unsigned long elf_greg_t;
 
-#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))
+#define ELF_NGREG ((sizeof(struct pt_regs) / sizeof(elf_greg_t)) - 1)
 typedef elf_greg_t elf_gregset_t[ELF_NGREG];
 
 #define ELF_NFPREG 32
@@ -76,6 +76,7 @@ do {									\
 } while (0)
 
 #define USE_ELF_CORE_DUMP
+#define CORE_DUMP_USE_REGSET
 #define ELF_EXEC_PAGESIZE       4096
 
 /*
diff --git a/arch/mn10300/include/asm/processor.h b/arch/mn10300/include/asm/processor.h
index 73239271873d..f7d4b0d285e8 100644
--- a/arch/mn10300/include/asm/processor.h
+++ b/arch/mn10300/include/asm/processor.h
@@ -143,13 +143,7 @@ extern unsigned long thread_saved_pc(struct task_struct *tsk);
 
 unsigned long get_wchan(struct task_struct *p);
 
-#define task_pt_regs(task)                                              \
-({                                                                      \
-       struct pt_regs *__regs__;                                        \
-       __regs__ = (struct pt_regs *) (KSTK_TOP(task_stack_page(task)) - 8); \
-       __regs__ - 1;                                                    \
-})
-
+#define task_pt_regs(task) ((task)->thread.uregs)
 #define KSTK_EIP(task) (task_pt_regs(task)->pc)
 #define KSTK_ESP(task) (task_pt_regs(task)->sp)
 
diff --git a/arch/mn10300/include/asm/ptrace.h b/arch/mn10300/include/asm/ptrace.h
index 7b06cc623d8b..921942ed1b03 100644
--- a/arch/mn10300/include/asm/ptrace.h
+++ b/arch/mn10300/include/asm/ptrace.h
@@ -91,9 +91,17 @@ extern struct pt_regs *__frame; /* current frame pointer */
 #if defined(__KERNEL__)
 
 #if !defined(__ASSEMBLY__)
+struct task_struct;
+
 #define user_mode(regs)                 (((regs)->epsw & EPSW_nSL) == EPSW_nSL)
 #define instruction_pointer(regs)       ((regs)->pc)
+#define user_stack_pointer(regs)        ((regs)->sp)
 extern void show_regs(struct pt_regs *);
+
+#define arch_has_single_step()  (1)
+extern void user_enable_single_step(struct task_struct *);
+extern void user_disable_single_step(struct task_struct *);
+
 #endif  /*  !__ASSEMBLY  */
 
 #define profile_pc(regs) ((regs)->pc)
diff --git a/arch/mn10300/kernel/entry.S b/arch/mn10300/kernel/entry.S
index 3dc3e462f92a..7408a27199f3 100644
--- a/arch/mn10300/kernel/entry.S
+++ b/arch/mn10300/kernel/entry.S
@@ -76,7 +76,7 @@ ENTRY(system_call)
         cmp     nr_syscalls,d0
         bcc     syscall_badsys
         btst    _TIF_SYSCALL_TRACE,(TI_flags,a2)
-        bne     syscall_trace_entry
+        bne     syscall_entry_trace
 syscall_call:
         add     d0,d0,a1
         add     a1,a1
@@ -104,11 +104,10 @@ restore_all:
 syscall_exit_work:
         btst    _TIF_SYSCALL_TRACE,d2
         beq     work_pending
-        __sti                           # could let do_syscall_trace() call
+        __sti                           # could let syscall_trace_exit() call
                                         # schedule() instead
         mov     fp,d0
-        mov     1,d1
-        call    do_syscall_trace[],0    # do_syscall_trace(regs,entryexit)
+        call    syscall_trace_exit[],0  # do_syscall_trace(regs)
         jmp     resume_userspace
 
         ALIGN
@@ -138,13 +137,11 @@ work_notifysig:
         jmp     resume_userspace
 
         # perform syscall entry tracing
-syscall_trace_entry:
+syscall_entry_trace:
         mov     -ENOSYS,d0
         mov     d0,(REG_D0,fp)
         mov     fp,d0
-        clr     d1
-        call    do_syscall_trace[],0
-        mov     (REG_ORIG_D0,fp),d0
+        call    syscall_trace_entry[],0 # returns the syscall number to actually use
         mov     (REG_D1,fp),d1
         cmp     nr_syscalls,d0
         bcs     syscall_call
diff --git a/arch/mn10300/kernel/ptrace.c b/arch/mn10300/kernel/ptrace.c
index d6d6cdc75c52..e143339ad28e 100644
--- a/arch/mn10300/kernel/ptrace.c
+++ b/arch/mn10300/kernel/ptrace.c
@@ -17,6 +17,9 @@
 #include <linux/errno.h>
 #include <linux/ptrace.h>
 #include <linux/user.h>
+#include <linux/regset.h>
+#include <linux/elf.h>
+#include <linux/tracehook.h>
 #include <asm/uaccess.h>
 #include <asm/pgtable.h>
 #include <asm/system.h>
@@ -64,12 +67,6 @@ static inline int get_stack_long(struct task_struct *task, int offset)
                 ((unsigned long) task->thread.uregs + offset);
 }
 
-/*
- * this routine will put a word on the processes privileged stack.
- * the offset is how far from the base addr as stored in the TSS.
- * this routine assumes that all the privileged stacks are in our
- * data space.
- */
 static inline
 int put_stack_long(struct task_struct *task, int offset, unsigned long data)
 {
@@ -80,94 +77,233 @@ int put_stack_long(struct task_struct *task, int offset, unsigned long data)
         return 0;
 }
 
-static inline unsigned long get_fpregs(struct fpu_state_struct *buf,
-                                       struct task_struct *tsk)
+/*
+ * retrieve the contents of MN10300 userspace general registers
+ */
+static int genregs_get(struct task_struct *target,
+                       const struct user_regset *regset,
+                       unsigned int pos, unsigned int count,
+                       void *kbuf, void __user *ubuf)
 {
-        return __copy_to_user(buf, &tsk->thread.fpu_state,
-                              sizeof(struct fpu_state_struct));
+        const struct pt_regs *regs = task_pt_regs(target);
+        int ret;
+
+        /* we need to skip regs->next */
+        ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
+                                  regs, 0, PT_ORIG_D0 * sizeof(long));
+        if (ret < 0)
+                return ret;
+
+        ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
+                                  &regs->orig_d0, PT_ORIG_D0 * sizeof(long),
+                                  NR_PTREGS * sizeof(long));
+        if (ret < 0)
+                return ret;
+
+        return user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
+                                        NR_PTREGS * sizeof(long), -1);
 }
 
-static inline unsigned long set_fpregs(struct task_struct *tsk,
-                                       struct fpu_state_struct *buf)
+/*
+ * update the contents of the MN10300 userspace general registers
+ */
+static int genregs_set(struct task_struct *target,
+                       const struct user_regset *regset,
+                       unsigned int pos, unsigned int count,
+                       const void *kbuf, const void __user *ubuf)
 {
-        return __copy_from_user(&tsk->thread.fpu_state, buf,
-                                sizeof(struct fpu_state_struct));
+        struct pt_regs *regs = task_pt_regs(target);
+        unsigned long tmp;
+        int ret;
+
+        /* we need to skip regs->next */
+        ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
+                                 regs, 0, PT_ORIG_D0 * sizeof(long));
+        if (ret < 0)
+                return ret;
+
+        ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
+                                 &regs->orig_d0, PT_ORIG_D0 * sizeof(long),
+                                 PT_EPSW * sizeof(long));
+        if (ret < 0)
+                return ret;
+
+        /* we need to mask off changes to EPSW */
+        tmp = regs->epsw;
+        ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
+                                 &tmp, PT_EPSW * sizeof(long),
+                                 PT_PC * sizeof(long));
+        tmp &= EPSW_FLAG_V | EPSW_FLAG_C | EPSW_FLAG_N | EPSW_FLAG_Z;
+        tmp |= regs->epsw & ~(EPSW_FLAG_V | EPSW_FLAG_C | EPSW_FLAG_N |
+                              EPSW_FLAG_Z);
+        regs->epsw = tmp;
+
+        if (ret < 0)
+                return ret;
+
+        /* and finally load the PC */
+        ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
+                                 &regs->pc, PT_PC * sizeof(long),
+                                 NR_PTREGS * sizeof(long));
+
+        if (ret < 0)
+                return ret;
+
+        return user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
+                                         NR_PTREGS * sizeof(long), -1);
 }
 
-static inline void fpsave_init(struct task_struct *task)
+/*
+ * retrieve the contents of MN10300 userspace FPU registers
+ */
+static int fpuregs_get(struct task_struct *target,
+                       const struct user_regset *regset,
+                       unsigned int pos, unsigned int count,
+                       void *kbuf, void __user *ubuf)
 {
-        memset(&task->thread.fpu_state, 0, sizeof(struct fpu_state_struct));
+        const struct fpu_state_struct *fpregs = &target->thread.fpu_state;
+        int ret;
+
+        unlazy_fpu(target);
+
+        ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
+                                  fpregs, 0, sizeof(*fpregs));
+        if (ret < 0)
+                return ret;
+
+        return user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
+                                        sizeof(*fpregs), -1);
 }
 
 /*
- * make sure the single step bit is not set
+ * update the contents of the MN10300 userspace FPU registers
  */
-void ptrace_disable(struct task_struct *child)
+static int fpuregs_set(struct task_struct *target,
+                       const struct user_regset *regset,
+                       unsigned int pos, unsigned int count,
+                       const void *kbuf, const void __user *ubuf)
+{
+        struct fpu_state_struct fpu_state = target->thread.fpu_state;
+        int ret;
+
+        ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
+                                 &fpu_state, 0, sizeof(fpu_state));
+        if (ret < 0)
+                return ret;
+
+        fpu_kill_state(target);
+        target->thread.fpu_state = fpu_state;
+        set_using_fpu(target);
+
+        return user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
+                                         sizeof(fpu_state), -1);
+}
+
+/*
+ * determine if the FPU registers have actually been used
+ */
+static int fpuregs_active(struct task_struct *target,
+                          const struct user_regset *regset)
+{
+        return is_using_fpu(target) ? regset->n : 0;
+}
+
+/*
+ * Define the register sets available on the MN10300 under Linux
+ */
+enum mn10300_regset {
+        REGSET_GENERAL,
+        REGSET_FPU,
+};
+
+static const struct user_regset mn10300_regsets[] = {
+        /*
+         * General register format is:
+         *      A3, A2, D3, D2, MCVF, MCRL, MCRH, MDRQ
+         *      E1, E0, E7...E2, SP, LAR, LIR, MDR
+         *      A1, A0, D1, D0, ORIG_D0, EPSW, PC
+         */
+        [REGSET_GENERAL] = {
+                .core_note_type = NT_PRSTATUS,
+                .n              = ELF_NGREG,
+                .size           = sizeof(long),
+                .align          = sizeof(long),
+                .get            = genregs_get,
+                .set            = genregs_set,
+        },
+        /*
+         * FPU register format is:
+         *      FS0-31, FPCR
+         */
+        [REGSET_FPU] = {
+                .core_note_type = NT_PRFPREG,
+                .n              = sizeof(struct fpu_state_struct) / sizeof(long),
+                .size           = sizeof(long),
+                .align          = sizeof(long),
+                .get            = fpuregs_get,
+                .set            = fpuregs_set,
+                .active         = fpuregs_active,
+        },
+};
+
+static const struct user_regset_view user_mn10300_native_view = {
+        .name           = "mn10300",
+        .e_machine      = EM_MN10300,
+        .regsets        = mn10300_regsets,
+        .n              = ARRAY_SIZE(mn10300_regsets),
+};
+
+const struct user_regset_view *task_user_regset_view(struct task_struct *task)
+{
+        return &user_mn10300_native_view;
+}
+
+/*
+ * set the single-step bit
+ */
+void user_enable_single_step(struct task_struct *child)
 {
 #ifndef CONFIG_MN10300_USING_JTAG
         struct user *dummy = NULL;
         long tmp;
 
         tmp = get_stack_long(child, (unsigned long) &dummy->regs.epsw);
-        tmp &= ~EPSW_T;
+        tmp |= EPSW_T;
         put_stack_long(child, (unsigned long) &dummy->regs.epsw, tmp);
 #endif
 }
 
 /*
- * set the single step bit
+ * make sure the single-step bit is not set
  */
-void ptrace_enable(struct task_struct *child)
+void user_disable_single_step(struct task_struct *child)
 {
 #ifndef CONFIG_MN10300_USING_JTAG
         struct user *dummy = NULL;
         long tmp;
 
         tmp = get_stack_long(child, (unsigned long) &dummy->regs.epsw);
-        tmp |= EPSW_T;
+        tmp &= ~EPSW_T;
         put_stack_long(child, (unsigned long) &dummy->regs.epsw, tmp);
 #endif
 }
 
+void ptrace_disable(struct task_struct *child)
+{
+        user_disable_single_step(child);
+}
+
 /*
  * handle the arch-specific side of process tracing
  */
 long arch_ptrace(struct task_struct *child, long request, long addr, long data)
 {
-        struct fpu_state_struct fpu_state;
-        int i, ret;
+        unsigned long tmp;
+        int ret;
 
         switch (request) {
-        /* read the word at location addr. */
-        case PTRACE_PEEKTEXT: {
-                unsigned long tmp;
-                int copied;
-
-                copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
-                ret = -EIO;
-                if (copied != sizeof(tmp))
-                        break;
-                ret = put_user(tmp, (unsigned long *) data);
-                break;
-        }
-
-        /* read the word at location addr. */
-        case PTRACE_PEEKDATA: {
-                unsigned long tmp;
-                int copied;
-
-                copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
-                ret = -EIO;
-                if (copied != sizeof(tmp))
-                        break;
-                ret = put_user(tmp, (unsigned long *) data);
-                break;
-        }
-
         /* read the word at location addr in the USER area. */
-        case PTRACE_PEEKUSR: {
-                unsigned long tmp;
-
+        case PTRACE_PEEKUSR:
                 ret = -EIO;
                 if ((addr & 3) || addr < 0 ||
                     addr > sizeof(struct user) - 3)
@@ -179,17 +315,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                                              ptrace_regid_to_frame[addr]);
                 ret = put_user(tmp, (unsigned long *) data);
                 break;
-        }
-
-        /* write the word at location addr. */
-        case PTRACE_POKETEXT:
-        case PTRACE_POKEDATA:
-                if (access_process_vm(child, addr, &data, sizeof(data), 1) ==
-                    sizeof(data))
-                        ret = 0;
-                else
-                        ret = -EIO;
-                break;
 
                 /* write the word at location addr in the USER area */
         case PTRACE_POKEUSR:
@@ -204,132 +329,32 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                                              data);
                 break;
 
-                /* continue and stop at next (return from) syscall */
-        case PTRACE_SYSCALL:
-                /* restart after signal. */
-        case PTRACE_CONT:
-                ret = -EIO;
-                if ((unsigned long) data > _NSIG)
-                        break;
-                if (request == PTRACE_SYSCALL)
-                        set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                else
-                        clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                child->exit_code = data;
-                ptrace_disable(child);
-                wake_up_process(child);
-                ret = 0;
-                break;
-
-                /*
-                 * make the child exit
-                 * - the best I can do is send it a sigkill
-                 * - perhaps it should be put in the status that it wants to
-                 *   exit
-                 */
-        case PTRACE_KILL:
-                ret = 0;
-                if (child->exit_state == EXIT_ZOMBIE)   /* already dead */
-                        break;
-                child->exit_code = SIGKILL;
-                clear_tsk_thread_flag(child, TIF_SINGLESTEP);
-                ptrace_disable(child);
-                wake_up_process(child);
-                break;
-
-        case PTRACE_SINGLESTEP: /* set the trap flag. */
-#ifndef CONFIG_MN10300_USING_JTAG
-                ret = -EIO;
-                if ((unsigned long) data > _NSIG)
-                        break;
-                clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
-                ptrace_enable(child);
-                child->exit_code = data;
-                wake_up_process(child);
-                ret = 0;
-#else
-                ret = -EINVAL;
-#endif
-                break;
-
-        case PTRACE_DETACH:     /* detach a process that was attached. */
-                ret = ptrace_detach(child, data);
-                break;
-
-                /* Get all gp regs from the child. */
-        case PTRACE_GETREGS: {
-                unsigned long tmp;
-
-                if (!access_ok(VERIFY_WRITE, (unsigned *) data, NR_PTREGS << 2)) {
-                        ret = -EIO;
-                        break;
-                }
-
-                for (i = 0; i < NR_PTREGS << 2; i += 4) {
-                        tmp = get_stack_long(child, ptrace_regid_to_frame[i]);
-                        __put_user(tmp, (unsigned long *) data);
-                        data += sizeof(tmp);
-                }
-                ret = 0;
-                break;
-        }
-
-        case PTRACE_SETREGS: { /* Set all gp regs in the child. */
-                unsigned long tmp;
-
-                if (!access_ok(VERIFY_READ, (unsigned long *)data,
-                               sizeof(struct pt_regs))) {
-                        ret = -EIO;
-                        break;
-                }
-
-                for (i = 0; i < NR_PTREGS << 2; i += 4) {
-                        __get_user(tmp, (unsigned long *) data);
-                        put_stack_long(child, ptrace_regid_to_frame[i], tmp);
-                        data += sizeof(tmp);
-                }
-                ret = 0;
-                break;
-        }
-
-        case PTRACE_GETFPREGS: { /* Get the child FPU state. */
-                if (is_using_fpu(child)) {
-                        unlazy_fpu(child);
-                        fpu_state = child->thread.fpu_state;
-                } else {
-                        memset(&fpu_state, 0, sizeof(fpu_state));
-                }
-
-                ret = -EIO;
-                if (copy_to_user((void *) data, &fpu_state,
-                                 sizeof(fpu_state)) == 0)
-                        ret = 0;
-                break;
-        }
-
-        case PTRACE_SETFPREGS: { /* Set the child FPU state. */
-                ret = -EFAULT;
-                if (copy_from_user(&fpu_state, (const void *) data,
-                                   sizeof(fpu_state)) == 0) {
-                        fpu_kill_state(child);
-                        child->thread.fpu_state = fpu_state;
-                        set_using_fpu(child);
-                        ret = 0;
-                }
-                break;
-        }
-
-        case PTRACE_SETOPTIONS: {
-                if (data & PTRACE_O_TRACESYSGOOD)
-                        child->ptrace |= PT_TRACESYSGOOD;
-                else
-                        child->ptrace &= ~PT_TRACESYSGOOD;
-                ret = 0;
-                break;
-        }
+        case PTRACE_GETREGS:    /* Get all integer regs from the child. */
+                return copy_regset_to_user(child, &user_mn10300_native_view,
+                                           REGSET_GENERAL,
+                                           0, NR_PTREGS * sizeof(long),
+                                           (void __user *)data);
+
+        case PTRACE_SETREGS:    /* Set all integer regs in the child. */
+                return copy_regset_from_user(child, &user_mn10300_native_view,
+                                             REGSET_GENERAL,
+                                             0, NR_PTREGS * sizeof(long),
+                                             (const void __user *)data);
+
+        case PTRACE_GETFPREGS:  /* Get the child FPU state. */
+                return copy_regset_to_user(child, &user_mn10300_native_view,
+                                           REGSET_FPU,
+                                           0, sizeof(struct fpu_state_struct),
+                                           (void __user *)data);
+
+        case PTRACE_SETFPREGS:  /* Set the child FPU state. */
+                return copy_regset_from_user(child, &user_mn10300_native_view,
+                                             REGSET_FPU,
+                                             0, sizeof(struct fpu_state_struct),
+                                             (const void __user *)data);
 
         default:
-                ret = -EIO;
+                ret = ptrace_request(child, request, addr, data);
                 break;
         }
 
@@ -337,43 +362,26 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
 }
 
 /*
- * notification of system call entry/exit
- * - triggered by current->work.syscall_trace
+ * handle tracing of system call entry
+ * - return the revised system call number or ULONG_MAX to cause ENOSYS
  */
-asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit)
+asmlinkage unsigned long syscall_trace_entry(struct pt_regs *regs)
 {
-#if 0
-        /* just in case... */
-        printk(KERN_DEBUG "[%d] syscall_%lu(%lx,%lx,%lx,%lx) = %lx\n",
-               current->pid,
-               regs->orig_d0,
-               regs->a0,
-               regs->d1,
-               regs->a3,
-               regs->a2,
-               regs->d0);
-        return;
-#endif
-
-        if (!test_thread_flag(TIF_SYSCALL_TRACE) &&
-            !test_thread_flag(TIF_SINGLESTEP))
-                return;
-        if (!(current->ptrace & PT_PTRACED))
-                return;
+        if (tracehook_report_syscall_entry(regs))
+                /* tracing decided this syscall should not happen, so
+                 * We'll return a bogus call number to get an ENOSYS
+                 * error, but leave the original number in
+                 * regs->orig_d0
+                 */
+                return ULONG_MAX;
 
-        /* the 0x80 provides a way for the tracing parent to distinguish
-           between a syscall stop and SIGTRAP delivery */
-        ptrace_notify(SIGTRAP |
-                      ((current->ptrace & PT_TRACESYSGOOD) &&
-                       !test_thread_flag(TIF_SINGLESTEP) ? 0x80 : 0));
+        return regs->orig_d0;
+}
 
-        /*
-         * this isn't the same as continuing with a signal, but it will do
-         * for normal use.  strace only continues with a signal if the
-         * stopping signal is not SIGTRAP.  -brl
-         */
-        if (current->exit_code) {
-                send_sig(current->exit_code, current, 1);
-                current->exit_code = 0;
-        }
+/*
+ * handle tracing of system call exit
+ */
+asmlinkage void syscall_trace_exit(struct pt_regs *regs)
+{
+        tracehook_report_syscall_exit(regs, 0);
 }
diff --git a/arch/mn10300/kernel/signal.c b/arch/mn10300/kernel/signal.c
index 841ca9955a18..9f7572a0f578 100644
--- a/arch/mn10300/kernel/signal.c
+++ b/arch/mn10300/kernel/signal.c
@@ -23,6 +23,7 @@
 #include <linux/tty.h>
 #include <linux/personality.h>
 #include <linux/suspend.h>
+#include <linux/tracehook.h>
 #include <asm/cacheflush.h>
 #include <asm/ucontext.h>
 #include <asm/uaccess.h>
@@ -511,6 +512,9 @@ static void do_signal(struct pt_regs *regs)
                          * clear the TIF_RESTORE_SIGMASK flag */
                         if (test_thread_flag(TIF_RESTORE_SIGMASK))
                                 clear_thread_flag(TIF_RESTORE_SIGMASK);
+
+                        tracehook_signal_handler(signr, &info, &ka, regs,
+                                                 test_thread_flag(TIF_SINGLESTEP));
                 }
 
                 return;
@@ -561,4 +565,9 @@ asmlinkage void do_notify_resume(struct pt_regs *regs, u32 thread_info_flags)
         /* deal with pending signal delivery */
         if (thread_info_flags & (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK))
                 do_signal(regs);
+
+        if (thread_info_flags & _TIF_NOTIFY_RESUME) {
+                clear_thread_flag(TIF_NOTIFY_RESUME);
+                tracehook_notify_resume(__frame);
+        }
 }
diff --git a/arch/mn10300/mm/tlb-mn10300.S b/arch/mn10300/mm/tlb-mn10300.S
index 789208094e98..7095147dcb8b 100644
--- a/arch/mn10300/mm/tlb-mn10300.S
+++ b/arch/mn10300/mm/tlb-mn10300.S
@@ -165,24 +165,6 @@ ENTRY(itlb_aerror)
 ENTRY(dtlb_aerror)
         and     ~EPSW_NMID,epsw
         add     -4,sp
-        mov     d1,(sp)
-
-        movhu   (MMUFCR_DFC),d1                 # is it the initial valid write
-                                                # to this page?
-        and     MMUFCR_xFC_INITWR,d1
-        beq     dtlb_pagefault                  # jump if not
-
-        mov     (DPTEL),d1                      # set the dirty bit
-                                                # (don't replace with BSET!)
-        or      _PAGE_DIRTY,d1
-        mov     d1,(DPTEL)
-        mov     (sp),d1
-        add     4,sp
-        rti
-
-        ALIGN
-dtlb_pagefault:
-        mov     (sp),d1
         SAVE_ALL
         add     -4,sp                           # need to pass three params
 
diff --git a/arch/powerpc/configs/pmac32_defconfig b/arch/powerpc/configs/pmac32_defconfig
index 5339bb44cce9..ea8870a34482 100644
--- a/arch/powerpc/configs/pmac32_defconfig
+++ b/arch/powerpc/configs/pmac32_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.28-rc3
-# Tue Nov 11 19:36:51 2008
+# Linux kernel version: 2.6.30-rc7
+# Mon May 25 14:53:25 2009
 #
 # CONFIG_PPC64 is not set
 
@@ -14,6 +14,7 @@ CONFIG_6xx=y
 # CONFIG_40x is not set
 # CONFIG_44x is not set
 # CONFIG_E200 is not set
+CONFIG_PPC_BOOK3S=y
 CONFIG_PPC_FPU=y
 CONFIG_ALTIVEC=y
 CONFIG_PPC_STD_MMU=y
@@ -43,7 +44,7 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
 CONFIG_PPC=y
 CONFIG_EARLY_PRINTK=y
 CONFIG_GENERIC_NVRAM=y
-CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_SCHED_OMIT_FRAME_POINTER=y
 CONFIG_ARCH_MAY_HAVE_PC_FDC=y
 CONFIG_PPC_OF=y
 CONFIG_OF=y
@@ -52,12 +53,14 @@ CONFIG_OF=y
 CONFIG_AUDIT_ARCH=y
 CONFIG_GENERIC_BUG=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_DTC=y
 # CONFIG_DEFAULT_UIMAGE is not set
 CONFIG_HIBERNATE_32=y
 CONFIG_ARCH_HIBERNATION_POSSIBLE=y
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
 # CONFIG_PPC_DCR_NATIVE is not set
 # CONFIG_PPC_DCR_MMIO is not set
+CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 
 #
@@ -72,14 +75,24 @@ CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_TASKSTATS is not set
 # CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_CGROUPS is not set
 # CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
 # CONFIG_RELAY is not set
@@ -88,23 +101,27 @@ CONFIG_NAMESPACES=y
 # CONFIG_IPC_NS is not set
 # CONFIG_USER_NS is not set
 # CONFIG_PID_NS is not set
+# CONFIG_NET_NS is not set
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
 # CONFIG_EMBEDDED is not set
 CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS=y
 CONFIG_KALLSYMS_ALL=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 CONFIG_ELF_CORE=y
-# CONFIG_COMPAT_BRK is not set
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
-CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
@@ -114,10 +131,12 @@ CONFIG_AIO=y
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_PCI_QUIRKS=y
 CONFIG_SLUB_DEBUG=y
+# CONFIG_COMPAT_BRK is not set
 # CONFIG_SLAB is not set
 CONFIG_SLUB=y
 # CONFIG_SLOB is not set
 CONFIG_PROFILING=y
+CONFIG_TRACEPOINTS=y
 # CONFIG_MARKERS is not set
 CONFIG_OPROFILE=y
 CONFIG_HAVE_OPROFILE=y
@@ -127,10 +146,10 @@ CONFIG_HAVE_IOREMAP_PROT=y
 CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
+# CONFIG_SLOW_WORK is not set
 # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
-# CONFIG_TINY_SHMEM is not set
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
 # CONFIG_MODULE_FORCE_LOAD is not set
@@ -138,11 +157,8 @@ CONFIG_MODULE_UNLOAD=y
 CONFIG_MODULE_FORCE_UNLOAD=y
 # CONFIG_MODVERSIONS is not set
 # CONFIG_MODULE_SRCVERSION_ALL is not set
-CONFIG_KMOD=y
 CONFIG_BLOCK=y
 CONFIG_LBD=y
-# CONFIG_BLK_DEV_IO_TRACE is not set
-CONFIG_LSF=y
 CONFIG_BLK_DEV_BSG=y
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -158,14 +174,11 @@ CONFIG_DEFAULT_AS=y
 # CONFIG_DEFAULT_CFQ is not set
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="anticipatory"
-CONFIG_CLASSIC_RCU=y
 CONFIG_FREEZER=y
 
 #
 # Platform support
 #
-CONFIG_PPC_MULTIPLATFORM=y
-CONFIG_CLASSIC32=y
 # CONFIG_PPC_CHRP is not set
 # CONFIG_MPC5121_ADS is not set
 # CONFIG_MPC5121_GENERIC is not set
@@ -178,7 +191,9 @@ CONFIG_PPC_PMAC=y
 # CONFIG_PPC_83xx is not set
 # CONFIG_PPC_86xx is not set
 # CONFIG_EMBEDDED6xx is not set
+# CONFIG_AMIGAONE is not set
 CONFIG_PPC_NATIVE=y
+CONFIG_PPC_OF_BOOT_TRAMPOLINE=y
 # CONFIG_IPIC is not set
 CONFIG_MPIC=y
 # CONFIG_MPIC_WEIRD is not set
@@ -212,11 +227,12 @@ CONFIG_CPU_FREQ_PMAC=y
 CONFIG_PPC601_SYNC_FIX=y
 # CONFIG_TAU is not set
 # CONFIG_FSL_ULI1575 is not set
+# CONFIG_SIMPLE_GPIO is not set
 
 #
 # Kernel options
 #
-# CONFIG_HIGHMEM is not set
+CONFIG_HIGHMEM=y
 CONFIG_TICK_ONESHOT=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
@@ -239,6 +255,7 @@ CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
 CONFIG_ARCH_HAS_WALK_MEMORY=y
 CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
 # CONFIG_KEXEC is not set
+# CONFIG_CRASH_DUMP is not set
 CONFIG_ARCH_FLATMEM_ENABLE=y
 CONFIG_ARCH_POPULATES_NODE_MAP=y
 CONFIG_SELECT_MEMORY_MODEL=y
@@ -250,12 +267,17 @@ CONFIG_FLAT_NODE_MEM_MAP=y
 CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
 # CONFIG_MIGRATION is not set
-# CONFIG_RESOURCES_64BIT is not set
 # CONFIG_PHYS_ADDR_T_64BIT is not set
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_BOUNCE=y
 CONFIG_VIRT_TO_BUS=y
 CONFIG_UNEVICTABLE_LRU=y
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+CONFIG_PPC_4K_PAGES=y
+# CONFIG_PPC_16K_PAGES is not set
+# CONFIG_PPC_64K_PAGES is not set
+# CONFIG_PPC_256K_PAGES is not set
 CONFIG_FORCE_MAX_ZONEORDER=11
 CONFIG_PROC_DEVICETREE=y
 # CONFIG_CMDLINE_BOOL is not set
@@ -288,6 +310,8 @@ CONFIG_ARCH_SUPPORTS_MSI=y
 # CONFIG_PCI_MSI is not set
 # CONFIG_PCI_LEGACY is not set
 # CONFIG_PCI_DEBUG is not set
+# CONFIG_PCI_STUB is not set
+# CONFIG_PCI_IOV is not set
 CONFIG_PCCARD=m
 # CONFIG_PCMCIA_DEBUG is not set
 CONFIG_PCMCIA=m
@@ -397,6 +421,8 @@ CONFIG_NETFILTER_XTABLES=m
 CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
 # CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set
 # CONFIG_NETFILTER_XT_TARGET_DSCP is not set
+CONFIG_NETFILTER_XT_TARGET_HL=m
+# CONFIG_NETFILTER_XT_TARGET_LED is not set
 CONFIG_NETFILTER_XT_TARGET_MARK=m
 CONFIG_NETFILTER_XT_TARGET_NFLOG=m
 CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
@@ -405,6 +431,7 @@ CONFIG_NETFILTER_XT_TARGET_RATEEST=m
 CONFIG_NETFILTER_XT_TARGET_TRACE=m
 CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
 CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m
+# CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set
 CONFIG_NETFILTER_XT_MATCH_COMMENT=m
 # CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set
 CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
@@ -415,6 +442,7 @@ CONFIG_NETFILTER_XT_MATCH_DSCP=m
 CONFIG_NETFILTER_XT_MATCH_ESP=m
 # CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set
 CONFIG_NETFILTER_XT_MATCH_HELPER=m
+CONFIG_NETFILTER_XT_MATCH_HL=m
 CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
 CONFIG_NETFILTER_XT_MATCH_LENGTH=m
 CONFIG_NETFILTER_XT_MATCH_LIMIT=m
@@ -478,17 +506,15 @@ CONFIG_IP_NF_ARPFILTER=m
 CONFIG_IP_NF_ARP_MANGLE=m
 CONFIG_IP_DCCP=m
 CONFIG_INET_DCCP_DIAG=m
-CONFIG_IP_DCCP_ACKVEC=y
 
 #
 # DCCP CCIDs Configuration (EXPERIMENTAL)
 #
-CONFIG_IP_DCCP_CCID2=m
 # CONFIG_IP_DCCP_CCID2_DEBUG is not set
-CONFIG_IP_DCCP_CCID3=m
+CONFIG_IP_DCCP_CCID3=y
 # CONFIG_IP_DCCP_CCID3_DEBUG is not set
 CONFIG_IP_DCCP_CCID3_RTO=100
-CONFIG_IP_DCCP_TFRC_LIB=m
+CONFIG_IP_DCCP_TFRC_LIB=y
 
 #
 # DCCP Kernel Hacking
@@ -508,13 +534,16 @@ CONFIG_IP_DCCP_TFRC_LIB=m
 # CONFIG_LAPB is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
 # CONFIG_NET_SCHED is not set
 CONFIG_NET_CLS_ROUTE=y
+# CONFIG_DCB is not set
 
 #
 # Network testing
 #
 # CONFIG_NET_PKTGEN is not set
+# CONFIG_NET_DROP_MONITOR is not set
 # CONFIG_HAMRADIO is not set
 # CONFIG_CAN is not set
 CONFIG_IRDA=m
@@ -577,8 +606,6 @@ CONFIG_BT_HIDP=m
 #
 # Bluetooth device drivers
 #
-CONFIG_BT_HCIUSB=m
-# CONFIG_BT_HCIUSB_SCO is not set
 # CONFIG_BT_HCIBTUSB is not set
 # CONFIG_BT_HCIUART is not set
 CONFIG_BT_HCIBCM203X=m
@@ -590,31 +617,27 @@ CONFIG_BT_HCIBFUSB=m
 # CONFIG_BT_HCIBTUART is not set
 # CONFIG_BT_HCIVHCI is not set
 # CONFIG_AF_RXRPC is not set
-# CONFIG_PHONET is not set
 CONFIG_WIRELESS=y
 CONFIG_CFG80211=m
-CONFIG_NL80211=y
+# CONFIG_CFG80211_REG_DEBUG is not set
 CONFIG_WIRELESS_OLD_REGULATORY=y
 CONFIG_WIRELESS_EXT=y
 CONFIG_WIRELESS_EXT_SYSFS=y
+# CONFIG_LIB80211 is not set
 CONFIG_MAC80211=m
 
 #
 # Rate control algorithm selection
 #
-CONFIG_MAC80211_RC_PID=y
-# CONFIG_MAC80211_RC_MINSTREL is not set
-CONFIG_MAC80211_RC_DEFAULT_PID=y
-# CONFIG_MAC80211_RC_DEFAULT_MINSTREL is not set
-CONFIG_MAC80211_RC_DEFAULT="pid"
+CONFIG_MAC80211_RC_MINSTREL=y
+# CONFIG_MAC80211_RC_DEFAULT_PID is not set
+CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
+CONFIG_MAC80211_RC_DEFAULT="minstrel"
 # CONFIG_MAC80211_MESH is not set
 CONFIG_MAC80211_LEDS=y
+# CONFIG_MAC80211_DEBUGFS is not set
 # CONFIG_MAC80211_DEBUG_MENU is not set
-CONFIG_IEEE80211=m
-# CONFIG_IEEE80211_DEBUG is not set
-CONFIG_IEEE80211_CRYPT_WEP=m
-CONFIG_IEEE80211_CRYPT_CCMP=m
-CONFIG_IEEE80211_CRYPT_TKIP=m
+# CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
 
@@ -662,17 +685,27 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
 # CONFIG_BLK_DEV_HD is not set
 CONFIG_MISC_DEVICES=y
 # CONFIG_PHANTOM is not set
-# CONFIG_EEPROM_93CX6 is not set
 # CONFIG_SGI_IOC4 is not set
 # CONFIG_TIFM_CORE is not set
+# CONFIG_ICS932S401 is not set
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
+# CONFIG_ISL29003 is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_93CX6 is not set
 CONFIG_HAVE_IDE=y
 CONFIG_IDE=y
 
 #
 # Please see Documentation/ide/ide.txt for help/info on IDE drives
 #
+CONFIG_IDE_XFER_MODE=y
 CONFIG_IDE_TIMINGS=y
 CONFIG_IDE_ATAPI=y
 # CONFIG_BLK_DEV_IDE_SATA is not set
@@ -684,7 +717,6 @@ CONFIG_BLK_DEV_IDECS=m
 CONFIG_BLK_DEV_IDECD=y
 CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y
 # CONFIG_BLK_DEV_IDETAPE is not set
-CONFIG_BLK_DEV_IDESCSI=y
 # CONFIG_IDE_TASK_IOCTL is not set
 CONFIG_IDE_PROC_FS=y
 
@@ -714,6 +746,7 @@ CONFIG_BLK_DEV_IDEDMA_PCI=y
 # CONFIG_BLK_DEV_JMICRON is not set
 # CONFIG_BLK_DEV_SC1200 is not set
 # CONFIG_BLK_DEV_PIIX is not set
+# CONFIG_BLK_DEV_IT8172 is not set
 # CONFIG_BLK_DEV_IT8213 is not set
 # CONFIG_BLK_DEV_IT821X is not set
 # CONFIG_BLK_DEV_NS87415 is not set
@@ -728,7 +761,6 @@ CONFIG_BLK_DEV_SL82C105=y
 # CONFIG_BLK_DEV_TC86C001 is not set
 CONFIG_BLK_DEV_IDE_PMAC=y
 CONFIG_BLK_DEV_IDE_PMAC_ATA100FIRST=y
-CONFIG_BLK_DEV_IDEDMA_PMAC=y
 CONFIG_BLK_DEV_IDEDMA=y
 
 #
@@ -772,6 +804,7 @@ CONFIG_SCSI_FC_ATTRS=y
 # CONFIG_SCSI_SRP_ATTRS is not set
 CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_ISCSI_TCP is not set
+# CONFIG_SCSI_CXGB3_ISCSI is not set
 # CONFIG_BLK_DEV_3W_XXXX_RAID is not set
 # CONFIG_SCSI_3W_9XXX is not set
 # CONFIG_SCSI_ACARD is not set
@@ -791,8 +824,12 @@ CONFIG_SCSI_AIC7XXX_OLD=m
 # CONFIG_MEGARAID_NEWGEN is not set
 # CONFIG_MEGARAID_LEGACY is not set
 # CONFIG_MEGARAID_SAS is not set
+# CONFIG_SCSI_MPT2SAS is not set
 # CONFIG_SCSI_HPTIOP is not set
 # CONFIG_SCSI_BUSLOGIC is not set
+# CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
+# CONFIG_FCOE is not set
 # CONFIG_SCSI_DMX3191D is not set
 # CONFIG_SCSI_EATA is not set
 # CONFIG_SCSI_FUTURE_DOMAIN is not set
@@ -822,6 +859,7 @@ CONFIG_SCSI_MAC53C94=y
 # CONFIG_SCSI_SRP is not set
 # CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
 # CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
 # CONFIG_ATA is not set
 CONFIG_MD=y
 CONFIG_BLK_DEV_MD=m
@@ -881,6 +919,7 @@ CONFIG_THERM_ADT746X=m
 # CONFIG_ANSLCD is not set
 CONFIG_PMAC_RACKMETER=m
 CONFIG_NETDEVICES=y
+CONFIG_COMPAT_NET_DEV_OPS=y
 CONFIG_DUMMY=m
 # CONFIG_BONDING is not set
 # CONFIG_MACVLAN is not set
@@ -898,6 +937,8 @@ CONFIG_BMAC=y
 CONFIG_SUNGEM=y
 # CONFIG_CASSINI is not set
 # CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_ETHOC is not set
+# CONFIG_DNET is not set
 # CONFIG_NET_TULIP is not set
 # CONFIG_HP100 is not set
 # CONFIG_IBM_NEW_EMAC_ZMII is not set
@@ -913,7 +954,6 @@ CONFIG_PCNET32=y
 # CONFIG_ADAPTEC_STARFIRE is not set
 # CONFIG_B44 is not set
 # CONFIG_FORCEDETH is not set
-# CONFIG_EEPRO100 is not set
 # CONFIG_E100 is not set
 # CONFIG_FEALNX is not set
 # CONFIG_NATSEMI is not set
@@ -923,6 +963,7 @@ CONFIG_PCNET32=y
 # CONFIG_R6040 is not set
 # CONFIG_SIS900 is not set
 # CONFIG_EPIC100 is not set
+# CONFIG_SMSC9420 is not set
 # CONFIG_SUNDANCE is not set
 # CONFIG_TLAN is not set
 # CONFIG_VIA_RHINE is not set
@@ -935,6 +976,7 @@ CONFIG_NETDEV_1000=y
 # CONFIG_E1000E is not set
 # CONFIG_IP1000 is not set
 # CONFIG_IGB is not set
+# CONFIG_IGBVF is not set
 # CONFIG_NS83820 is not set
 # CONFIG_HAMACHI is not set
 # CONFIG_YELLOWFIN is not set
@@ -945,18 +987,20 @@ CONFIG_NETDEV_1000=y
 # CONFIG_VIA_VELOCITY is not set
 # CONFIG_TIGON3 is not set
 # CONFIG_BNX2 is not set
-# CONFIG_MV643XX_ETH is not set
 # CONFIG_QLA3XXX is not set
 # CONFIG_ATL1 is not set
 # CONFIG_ATL1E is not set
+# CONFIG_ATL1C is not set
 # CONFIG_JME is not set
 CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
+CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_CHELSIO_T3 is not set
 # CONFIG_ENIC is not set
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
 # CONFIG_S2IO is not set
+# CONFIG_VXGE is not set
 # CONFIG_MYRI10GE is not set
 # CONFIG_NETXEN_NIC is not set
 # CONFIG_NIU is not set
@@ -966,6 +1010,7 @@ CONFIG_NETDEV_10000=y
 # CONFIG_BNX2X is not set
 # CONFIG_QLGE is not set
 # CONFIG_SFC is not set
+# CONFIG_BE2NET is not set
 # CONFIG_TR is not set
 
 #
@@ -974,20 +1019,11 @@ CONFIG_NETDEV_10000=y
 # CONFIG_WLAN_PRE80211 is not set
 CONFIG_WLAN_80211=y
 # CONFIG_PCMCIA_RAYCS is not set
-# CONFIG_IPW2100 is not set
-# CONFIG_IPW2200 is not set
 # CONFIG_LIBERTAS is not set
 # CONFIG_LIBERTAS_THINFIRM is not set
 # CONFIG_AIRO is not set
-CONFIG_HERMES=m
-CONFIG_APPLE_AIRPORT=m
-# CONFIG_PLX_HERMES is not set
-# CONFIG_TMD_HERMES is not set
-# CONFIG_NORTEL_HERMES is not set
-CONFIG_PCI_HERMES=m
-CONFIG_PCMCIA_HERMES=m
-# CONFIG_PCMCIA_SPECTRUM is not set
 # CONFIG_ATMEL is not set
+# CONFIG_AT76C50X_USB is not set
 # CONFIG_AIRO_CS is not set
 # CONFIG_PCMCIA_WL3501 is not set
 CONFIG_PRISM54=m
@@ -997,15 +1033,17 @@ CONFIG_PRISM54=m
 # CONFIG_RTL8187 is not set
 # CONFIG_ADM8211 is not set
 # CONFIG_MAC80211_HWSIM is not set
+# CONFIG_MWL8K is not set
 CONFIG_P54_COMMON=m
 # CONFIG_P54_USB is not set
 # CONFIG_P54_PCI is not set
+CONFIG_P54_LEDS=y
 # CONFIG_ATH5K is not set
 # CONFIG_ATH9K is not set
-# CONFIG_IWLCORE is not set
-# CONFIG_IWLWIFI_LEDS is not set
-# CONFIG_IWLAGN is not set
-# CONFIG_IWL3945 is not set
+# CONFIG_AR9170_USB is not set
+# CONFIG_IPW2100 is not set
+# CONFIG_IPW2200 is not set
+# CONFIG_IWLWIFI is not set
 # CONFIG_HOSTAP is not set
 CONFIG_B43=m
 CONFIG_B43_PCI_AUTOSELECT=y
@@ -1025,6 +1063,19 @@ CONFIG_B43LEGACY_DMA_AND_PIO_MODE=y
 # CONFIG_B43LEGACY_PIO_MODE is not set
 # CONFIG_ZD1211RW is not set
 # CONFIG_RT2X00 is not set
+CONFIG_HERMES=m
+CONFIG_HERMES_CACHE_FW_ON_INIT=y
+CONFIG_APPLE_AIRPORT=m
+# CONFIG_PLX_HERMES is not set
+# CONFIG_TMD_HERMES is not set
+# CONFIG_NORTEL_HERMES is not set
+CONFIG_PCI_HERMES=m
+CONFIG_PCMCIA_HERMES=m
+# CONFIG_PCMCIA_SPECTRUM is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
 
 #
 # USB Network Adapters
@@ -1036,6 +1087,7 @@ CONFIG_B43LEGACY_DMA_AND_PIO_MODE=y
 CONFIG_USB_USBNET=m
 CONFIG_USB_NET_AX8817X=m
 CONFIG_USB_NET_CDCETHER=m
+# CONFIG_USB_NET_CDC_EEM is not set
 # CONFIG_USB_NET_DM9601 is not set
 # CONFIG_USB_NET_SMSC95XX is not set
 # CONFIG_USB_NET_GL620A is not set
@@ -1099,7 +1151,7 @@ CONFIG_INPUT_KEYBOARD=y
 CONFIG_INPUT_MOUSE=y
 # CONFIG_MOUSE_PS2 is not set
 # CONFIG_MOUSE_SERIAL is not set
-# CONFIG_MOUSE_APPLETOUCH is not set
+CONFIG_MOUSE_APPLETOUCH=y
 # CONFIG_MOUSE_BCM5974 is not set
 # CONFIG_MOUSE_VSXXXAA is not set
 # CONFIG_INPUT_JOYSTICK is not set
@@ -1150,10 +1202,13 @@ CONFIG_SERIAL_PMACZILOG_TTYS=y
 # CONFIG_SERIAL_JSM is not set
 # CONFIG_SERIAL_OF_PLATFORM is not set
 CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 CONFIG_LEGACY_PTYS=y
 CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_HVC_UDBG is not set
 # CONFIG_IPMI_HANDLER is not set
 CONFIG_HW_RANDOM=m
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
 CONFIG_NVRAM=y
 CONFIG_GEN_RTC=y
 # CONFIG_GEN_RTC_X is not set
@@ -1232,12 +1287,9 @@ CONFIG_I2C_POWERMAC=y
 # Miscellaneous I2C Chip support
 #
 # CONFIG_DS1682 is not set
-# CONFIG_EEPROM_AT24 is not set
-# CONFIG_EEPROM_LEGACY is not set
 # CONFIG_SENSORS_PCF8574 is not set
 # CONFIG_PCF8575 is not set
 # CONFIG_SENSORS_PCA9539 is not set
-# CONFIG_SENSORS_PCF8591 is not set
 # CONFIG_SENSORS_MAX6875 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
@@ -1259,11 +1311,11 @@ CONFIG_BATTERY_PMU=y
 # CONFIG_THERMAL is not set
 # CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
 
 #
 # Sonics Silicon Backplane
 #
-CONFIG_SSB_POSSIBLE=y
 CONFIG_SSB=m
 CONFIG_SSB_SPROM=y
 CONFIG_SSB_PCIHOST_POSSIBLE=y
@@ -1281,18 +1333,13 @@ CONFIG_SSB_DRIVER_PCICORE=y
 # CONFIG_MFD_CORE is not set
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_TWL4030_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_PMIC_DA903X is not set
 # CONFIG_MFD_WM8400 is not set
 # CONFIG_MFD_WM8350_I2C is not set
-
-#
-# Voltage and Current regulators
-#
+# CONFIG_MFD_PCF50633 is not set
 # CONFIG_REGULATOR is not set
-# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
-# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
-# CONFIG_REGULATOR_BQ24022 is not set
 
 #
 # Multimedia devices
@@ -1390,6 +1437,7 @@ CONFIG_FB_ATY_BACKLIGHT=y
 # CONFIG_FB_KYRO is not set
 CONFIG_FB_3DFX=y
 # CONFIG_FB_3DFX_ACCEL is not set
+CONFIG_FB_3DFX_I2C=y
 # CONFIG_FB_VOODOO1 is not set
 # CONFIG_FB_VT8623 is not set
 # CONFIG_FB_TRIDENT is not set
@@ -1399,12 +1447,14 @@ CONFIG_FB_3DFX=y
 # CONFIG_FB_IBM_GXT4500 is not set
 # CONFIG_FB_VIRTUAL is not set
 # CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+# CONFIG_FB_BROADSHEET is not set
 CONFIG_BACKLIGHT_LCD_SUPPORT=y
 CONFIG_LCD_CLASS_DEVICE=m
 # CONFIG_LCD_ILI9320 is not set
 # CONFIG_LCD_PLATFORM is not set
 CONFIG_BACKLIGHT_CLASS_DEVICE=y
-# CONFIG_BACKLIGHT_CORGI is not set
+CONFIG_BACKLIGHT_GENERIC=y
 
 #
 # Display device support
@@ -1444,11 +1494,13 @@ CONFIG_SND_MIXER_OSS=m
 CONFIG_SND_PCM_OSS=m
 CONFIG_SND_PCM_OSS_PLUGINS=y
 CONFIG_SND_SEQUENCER_OSS=y
+# CONFIG_SND_HRTIMER is not set
 # CONFIG_SND_DYNAMIC_MINORS is not set
 CONFIG_SND_SUPPORT_OLD_API=y
 CONFIG_SND_VERBOSE_PROCFS=y
 # CONFIG_SND_VERBOSE_PRINTK is not set
 # CONFIG_SND_DEBUG is not set
+CONFIG_SND_VMASTER=y
 CONFIG_SND_DRIVERS=y
 CONFIG_SND_DUMMY=m
 # CONFIG_SND_VIRMIDI is not set
@@ -1486,6 +1538,8 @@ CONFIG_SND_PCI=y
 # CONFIG_SND_INDIGO is not set
 # CONFIG_SND_INDIGOIO is not set
 # CONFIG_SND_INDIGODJ is not set
+# CONFIG_SND_INDIGOIOX is not set
+# CONFIG_SND_INDIGODJX is not set
 # CONFIG_SND_EMU10K1 is not set
 # CONFIG_SND_EMU10K1X is not set
 # CONFIG_SND_ENS1370 is not set
@@ -1551,28 +1605,31 @@ CONFIG_USB_HID=y
 #
 # Special HID drivers
 #
-CONFIG_HID_COMPAT=y
 CONFIG_HID_A4TECH=y
 CONFIG_HID_APPLE=y
 CONFIG_HID_BELKIN=y
-CONFIG_HID_BRIGHT=y
 CONFIG_HID_CHERRY=y
 CONFIG_HID_CHICONY=y
 CONFIG_HID_CYPRESS=y
-CONFIG_HID_DELL=y
+# CONFIG_DRAGONRISE_FF is not set
 CONFIG_HID_EZKEY=y
+CONFIG_HID_KYE=y
 CONFIG_HID_GYRATION=y
+CONFIG_HID_KENSINGTON=y
 CONFIG_HID_LOGITECH=y
 # CONFIG_LOGITECH_FF is not set
 # CONFIG_LOGIRUMBLEPAD2_FF is not set
 CONFIG_HID_MICROSOFT=y
 CONFIG_HID_MONTEREY=y
+CONFIG_HID_NTRIG=y
 CONFIG_HID_PANTHERLORD=y
 # CONFIG_PANTHERLORD_FF is not set
 CONFIG_HID_PETALYNX=y
 CONFIG_HID_SAMSUNG=y
 CONFIG_HID_SONY=y
 CONFIG_HID_SUNPLUS=y
+# CONFIG_GREENASIA_FF is not set
+CONFIG_HID_TOPSEED=y
 # CONFIG_THRUSTMASTER_FF is not set
 # CONFIG_ZEROPLUS_FF is not set
 CONFIG_USB_SUPPORT=y
@@ -1603,6 +1660,7 @@ CONFIG_USB_EHCI_HCD=m
 CONFIG_USB_EHCI_ROOT_HUB_TT=y
 # CONFIG_USB_EHCI_TT_NEWSCHED is not set
 # CONFIG_USB_EHCI_HCD_PPC_OF is not set
+# CONFIG_USB_OXU210HP_HCD is not set
 # CONFIG_USB_ISP116X_HCD is not set
 # CONFIG_USB_ISP1760_HCD is not set
 CONFIG_USB_OHCI_HCD=y
@@ -1625,24 +1683,23 @@ CONFIG_USB_PRINTER=m
 # CONFIG_USB_TMC is not set
 
 #
-# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
 #
 
 #
-# may also be needed; see USB_STORAGE Help for more information
+# also be needed; see USB_STORAGE Help for more info
 #
 CONFIG_USB_STORAGE=m
 # CONFIG_USB_STORAGE_DEBUG is not set
 # CONFIG_USB_STORAGE_DATAFAB is not set
 # CONFIG_USB_STORAGE_FREECOM is not set
 # CONFIG_USB_STORAGE_ISD200 is not set
-# CONFIG_USB_STORAGE_DPCM is not set
 # CONFIG_USB_STORAGE_USBAT is not set
 # CONFIG_USB_STORAGE_SDDR09 is not set
 # CONFIG_USB_STORAGE_SDDR55 is not set
 # CONFIG_USB_STORAGE_JUMPSHOT is not set
 # CONFIG_USB_STORAGE_ALAUDA is not set
-CONFIG_USB_STORAGE_ONETOUCH=y
+CONFIG_USB_STORAGE_ONETOUCH=m
 # CONFIG_USB_STORAGE_KARMA is not set
 # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
 # CONFIG_USB_LIBUSUAL is not set
@@ -1665,7 +1722,7 @@ CONFIG_USB_EZUSB=y
 # CONFIG_USB_SERIAL_CH341 is not set
 # CONFIG_USB_SERIAL_WHITEHEAT is not set
 # CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
-# CONFIG_USB_SERIAL_CP2101 is not set
+# CONFIG_USB_SERIAL_CP210X is not set
 # CONFIG_USB_SERIAL_CYPRESS_M8 is not set
 # CONFIG_USB_SERIAL_EMPEG is not set
 # CONFIG_USB_SERIAL_FTDI_SIO is not set
@@ -1701,15 +1758,19 @@ CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y
 # CONFIG_USB_SERIAL_NAVMAN is not set
 # CONFIG_USB_SERIAL_PL2303 is not set
 # CONFIG_USB_SERIAL_OTI6858 is not set
+# CONFIG_USB_SERIAL_QUALCOMM is not set
 # CONFIG_USB_SERIAL_SPCP8X5 is not set
 # CONFIG_USB_SERIAL_HP4X is not set
 # CONFIG_USB_SERIAL_SAFE is not set
+# CONFIG_USB_SERIAL_SIEMENS_MPI is not set
 # CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
+# CONFIG_USB_SERIAL_SYMBOL is not set
 # CONFIG_USB_SERIAL_TI is not set
 # CONFIG_USB_SERIAL_CYBERJACK is not set
 # CONFIG_USB_SERIAL_XIRCOM is not set
 # CONFIG_USB_SERIAL_OPTION is not set
 # CONFIG_USB_SERIAL_OMNINET is not set
+# CONFIG_USB_SERIAL_OPTICON is not set
 # CONFIG_USB_SERIAL_DEBUG is not set
 
 #
@@ -1726,7 +1787,6 @@ CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
-# CONFIG_USB_PHIDGET is not set
 # CONFIG_USB_IDMOUSE is not set
 # CONFIG_USB_FTDI_ELAN is not set
 CONFIG_USB_APPLEDISPLAY=m
@@ -1738,6 +1798,11 @@ CONFIG_USB_APPLEDISPLAY=m
 # CONFIG_USB_ISIGHTFW is not set
 # CONFIG_USB_VST is not set
 # CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_NOP_USB_XCEIV is not set
 # CONFIG_UWB is not set
 # CONFIG_MMC is not set
 # CONFIG_MEMSTICK is not set
@@ -1748,7 +1813,9 @@ CONFIG_LEDS_CLASS=y
 # LED drivers
 #
 # CONFIG_LEDS_PCA9532 is not set
+# CONFIG_LEDS_LP5521 is not set
 # CONFIG_LEDS_PCA955X is not set
+# CONFIG_LEDS_BD2802 is not set
 
 #
 # LED Triggers
@@ -1759,11 +1826,16 @@ CONFIG_LEDS_TRIGGER_IDE_DISK=y
 # CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
 # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
 CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
+
+#
+# iptables trigger is under Netfilter config (LED target)
+#
 # CONFIG_ACCESSIBILITY is not set
 # CONFIG_INFINIBAND is not set
 # CONFIG_EDAC is not set
 # CONFIG_RTC_CLASS is not set
 # CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
 # CONFIG_UIO is not set
 # CONFIG_STAGING is not set
 
@@ -1774,6 +1846,7 @@ CONFIG_EXT2_FS=y
 # CONFIG_EXT2_FS_XATTR is not set
 # CONFIG_EXT2_FS_XIP is not set
 CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 CONFIG_EXT3_FS_XATTR=y
 CONFIG_EXT3_FS_POSIX_ACL=y
 # CONFIG_EXT3_FS_SECURITY is not set
@@ -1783,7 +1856,9 @@ CONFIG_EXT4_FS_XATTR=y
 # CONFIG_EXT4_FS_POSIX_ACL is not set
 # CONFIG_EXT4_FS_SECURITY is not set
 CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
 CONFIG_JBD2=y
+# CONFIG_JBD2_DEBUG is not set
 CONFIG_FS_MBCACHE=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
@@ -1792,6 +1867,7 @@ CONFIG_FILE_LOCKING=y
 # CONFIG_XFS_FS is not set
 # CONFIG_GFS2_FS is not set
 # CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
 CONFIG_DNOTIFY=y
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
@@ -1801,6 +1877,11 @@ CONFIG_AUTOFS4_FS=m
 CONFIG_FUSE_FS=m
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 CONFIG_ISO9660_FS=y
@@ -1831,10 +1912,7 @@ CONFIG_TMPFS=y
 # CONFIG_TMPFS_POSIX_ACL is not set
 # CONFIG_HUGETLB_PAGE is not set
 # CONFIG_CONFIGFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
+CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ADFS_FS is not set
 # CONFIG_AFFS_FS is not set
 CONFIG_HFS_FS=m
@@ -1843,6 +1921,7 @@ CONFIG_HFSPLUS_FS=m
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
 # CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
 # CONFIG_OMFS_FS is not set
@@ -1851,6 +1930,7 @@ CONFIG_HFSPLUS_FS=m
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
@@ -1868,7 +1948,6 @@ CONFIG_NFS_ACL_SUPPORT=y
 CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=y
 CONFIG_SUNRPC_GSS=y
-# CONFIG_SUNRPC_REGISTER_V4 is not set
 CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 CONFIG_SMB_FS=m
@@ -1940,11 +2019,13 @@ CONFIG_NLS_ISO8859_1=m
 # CONFIG_NLS_KOI8_U is not set
 CONFIG_NLS_UTF8=m
 # CONFIG_DLM is not set
+CONFIG_BINARY_PRINTF=y
 
 #
 # Library routines
 #
 CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
 CONFIG_CRC_CCITT=y
 CONFIG_CRC16=y
 CONFIG_CRC_T10DIF=y
@@ -1954,15 +2035,18 @@ CONFIG_CRC32=y
 CONFIG_LIBCRC32C=m
 CONFIG_ZLIB_INFLATE=y
 CONFIG_ZLIB_DEFLATE=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_LZMA=y
 CONFIG_TEXTSEARCH=y
 CONFIG_TEXTSEARCH_KMP=m
 CONFIG_TEXTSEARCH_BM=m
 CONFIG_TEXTSEARCH_FSM=m
-CONFIG_PLIST=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
 CONFIG_HAVE_LMB=y
+CONFIG_NLATTR=y
 
 #
 # Kernel hacking
@@ -1973,13 +2057,16 @@ CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 CONFIG_MAGIC_SYSRQ=y
 # CONFIG_UNUSED_SYMBOLS is not set
-# CONFIG_DEBUG_FS is not set
+CONFIG_DEBUG_FS=y
 # CONFIG_HEADERS_CHECK is not set
 CONFIG_DEBUG_KERNEL=y
 # CONFIG_DEBUG_SHIRQ is not set
 CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
 CONFIG_SCHED_DEBUG=y
 CONFIG_SCHEDSTATS=y
 # CONFIG_TIMER_STATS is not set
@@ -1994,6 +2081,7 @@ CONFIG_SCHEDSTATS=y
 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
 CONFIG_STACKTRACE=y
 # CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_HIGHMEM is not set
 CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_DEBUG_INFO is not set
 # CONFIG_DEBUG_VM is not set
@@ -2001,6 +2089,7 @@ CONFIG_DEBUG_BUGVERBOSE=y
 CONFIG_DEBUG_MEMORY_INIT=y
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
 # CONFIG_BOOT_PRINTK_DELAY is not set
 # CONFIG_RCU_TORTURE_TEST is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
@@ -2009,7 +2098,14 @@ CONFIG_DEBUG_MEMORY_INIT=y
 # CONFIG_FAULT_INJECTION is not set
 CONFIG_LATENCYTOP=y
 CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_NOP_TRACER=y
 CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_RING_BUFFER=y
+CONFIG_TRACING=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
@@ -2017,12 +2113,19 @@ CONFIG_HAVE_FUNCTION_TRACER=y
 # CONFIG_FUNCTION_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
 # CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
 # CONFIG_STACK_TRACER is not set
-# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_FTRACE_STARTUP_TEST is not set
+# CONFIG_DYNAMIC_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
+CONFIG_PRINT_STACK_DEPTH=64
 # CONFIG_DEBUG_STACKOVERFLOW is not set
 # CONFIG_DEBUG_STACK_USAGE is not set
 # CONFIG_CODE_PATCHING_SELFTEST is not set
@@ -2033,6 +2136,7 @@ CONFIG_XMON_DEFAULT=y
 CONFIG_XMON_DISASSEMBLY=y
 CONFIG_DEBUGGER=y
 CONFIG_IRQSTACKS=y
+# CONFIG_VIRQ_DEBUG is not set
 # CONFIG_BDI_SWITCH is not set
 CONFIG_BOOTX_TEXT=y
 # CONFIG_PPC_EARLY_DEBUG is not set
@@ -2051,13 +2155,20 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_FIPS is not set
 CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
 CONFIG_CRYPTO_AEAD=y
+CONFIG_CRYPTO_AEAD2=y
 CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
 CONFIG_CRYPTO_HASH=y
-CONFIG_CRYPTO_RNG=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
 CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
 # CONFIG_CRYPTO_GF128MUL is not set
 CONFIG_CRYPTO_NULL=m
+CONFIG_CRYPTO_WORKQUEUE=y
 # CONFIG_CRYPTO_CRYPTD is not set
 CONFIG_CRYPTO_AUTHENC=y
 # CONFIG_CRYPTO_TEST is not set
@@ -2127,6 +2238,7 @@ CONFIG_CRYPTO_TWOFISH_COMMON=m
 # Compression
 #
 CONFIG_CRYPTO_DEFLATE=m
+# CONFIG_CRYPTO_ZLIB is not set
 # CONFIG_CRYPTO_LZO is not set
 
 #
diff --git a/arch/powerpc/include/asm/hw_irq.h b/arch/powerpc/include/asm/hw_irq.h
index b7e034b0a6dd..20a44d0c9fdd 100644
--- a/arch/powerpc/include/asm/hw_irq.h
+++ b/arch/powerpc/include/asm/hw_irq.h
@@ -131,5 +131,44 @@ static inline int irqs_disabled_flags(unsigned long flags)
  */
 struct irq_chip;
 
+#ifdef CONFIG_PERF_COUNTERS
+static inline unsigned long test_perf_counter_pending(void)
+{
+        unsigned long x;
+
+        asm volatile("lbz %0,%1(13)"
+                : "=r" (x)
+                : "i" (offsetof(struct paca_struct, perf_counter_pending)));
+        return x;
+}
+
+static inline void set_perf_counter_pending(void)
+{
+        asm volatile("stb %0,%1(13)" : :
+                "r" (1),
+                "i" (offsetof(struct paca_struct, perf_counter_pending)));
+}
+
+static inline void clear_perf_counter_pending(void)
+{
+        asm volatile("stb %0,%1(13)" : :
+                "r" (0),
+                "i" (offsetof(struct paca_struct, perf_counter_pending)));
+}
+
+extern void perf_counter_do_pending(void);
+
+#else
+
+static inline unsigned long test_perf_counter_pending(void)
+{
+        return 0;
+}
+
+static inline void set_perf_counter_pending(void) {}
+static inline void clear_perf_counter_pending(void) {}
+static inline void perf_counter_do_pending(void) {}
+#endif /* CONFIG_PERF_COUNTERS */
+
 #endif  /* __KERNEL__ */
 #endif  /* _ASM_POWERPC_HW_IRQ_H */
diff --git a/arch/powerpc/include/asm/paca.h b/arch/powerpc/include/asm/paca.h
index 082b3aedf145..6ef055723019 100644
--- a/arch/powerpc/include/asm/paca.h
+++ b/arch/powerpc/include/asm/paca.h
@@ -99,6 +99,7 @@ struct paca_struct {
         u8 soft_enabled;                /* irq soft-enable flag */
         u8 hard_enabled;                /* set if irqs are enabled in MSR */
         u8 io_sync;                     /* writel() needs spin_unlock sync */
+        u8 perf_counter_pending;        /* PM interrupt while soft-disabled */
 
         /* Stuff for accurate time accounting */
         u64 user_time;                  /* accumulated usermode TB ticks */
diff --git a/arch/powerpc/include/asm/perf_counter.h b/arch/powerpc/include/asm/perf_counter.h
new file mode 100644
index 000000000000..cc7c887705b8
--- /dev/null
+++ b/arch/powerpc/include/asm/perf_counter.h
@@ -0,0 +1,98 @@
+/*
+ * Performance counter support - PowerPC-specific definitions.
+ *
+ * Copyright 2008-2009 Paul Mackerras, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <linux/types.h>
+
+#define MAX_HWCOUNTERS          8
+#define MAX_EVENT_ALTERNATIVES  8
+#define MAX_LIMITED_HWCOUNTERS  2
+
+/*
+ * This struct provides the constants and functions needed to
+ * describe the PMU on a particular POWER-family CPU.
+ */
+struct power_pmu {
+        int     n_counter;
+        int     max_alternatives;
+        u64     add_fields;
+        u64     test_adder;
+        int     (*compute_mmcr)(u64 events[], int n_ev,
+                                unsigned int hwc[], u64 mmcr[]);
+        int     (*get_constraint)(u64 event, u64 *mskp, u64 *valp);
+        int     (*get_alternatives)(u64 event, unsigned int flags,
+                                    u64 alt[]);
+        void    (*disable_pmc)(unsigned int pmc, u64 mmcr[]);
+        int     (*limited_pmc_event)(u64 event);
+        u32     flags;
+        int     n_generic;
+        int     *generic_events;
+        int     (*cache_events)[PERF_COUNT_HW_CACHE_MAX]
+                               [PERF_COUNT_HW_CACHE_OP_MAX]
+                               [PERF_COUNT_HW_CACHE_RESULT_MAX];
+};
+
+extern struct power_pmu *ppmu;
+
+/*
+ * Values for power_pmu.flags
+ */
+#define PPMU_LIMITED_PMC5_6     1       /* PMC5/6 have limited function */
+#define PPMU_ALT_SIPR           2       /* uses alternate posn for SIPR/HV */
+
+/*
+ * Values for flags to get_alternatives()
+ */
+#define PPMU_LIMITED_PMC_OK     1       /* can put this on a limited PMC */
+#define PPMU_LIMITED_PMC_REQD   2       /* have to put this on a limited PMC */
+#define PPMU_ONLY_COUNT_RUN     4       /* only counting in run state */
+
+struct pt_regs;
+extern unsigned long perf_misc_flags(struct pt_regs *regs);
+#define perf_misc_flags(regs)   perf_misc_flags(regs)
+
+extern unsigned long perf_instruction_pointer(struct pt_regs *regs);
+
+/*
+ * The power_pmu.get_constraint function returns a 64-bit value and
+ * a 64-bit mask that express the constraints between this event and
+ * other events.
+ *
+ * The value and mask are divided up into (non-overlapping) bitfields
+ * of three different types:
+ *
+ * Select field: this expresses the constraint that some set of bits
+ * in MMCR* needs to be set to a specific value for this event.  For a
+ * select field, the mask contains 1s in every bit of the field, and
+ * the value contains a unique value for each possible setting of the
+ * MMCR* bits.  The constraint checking code will ensure that two events
+ * that set the same field in their masks have the same value in their
+ * value dwords.
+ *
+ * Add field: this expresses the constraint that there can be at most
+ * N events in a particular class.  A field of k bits can be used for
+ * N <= 2^(k-1) - 1.  The mask has the most significant bit of the field
+ * set (and the other bits 0), and the value has only the least significant
+ * bit of the field set.  In addition, the 'add_fields' and 'test_adder'
+ * in the struct power_pmu for this processor come into play.  The
+ * add_fields value contains 1 in the LSB of the field, and the
+ * test_adder contains 2^(k-1) - 1 - N in the field.
+ *
+ * NAND field: this expresses the constraint that you may not have events
+ * in all of a set of classes.  (For example, on PPC970, you can't select
+ * events from the FPU, ISU and IDU simultaneously, although any two are
+ * possible.)  For N classes, the field is N+1 bits wide, and each class
+ * is assigned one bit from the least-significant N bits.  The mask has
+ * only the most-significant bit set, and the value has only the bit
+ * for the event's class set.  The test_adder has the least significant
+ * bit set in the field.
+ *
+ * If an event is not subject to the constraint expressed by a particular
+ * field, then it will have 0 in both the mask and value for that field.
+ */
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index e8018d540e87..fb359b0a6937 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -492,11 +492,13 @@
 #define   MMCR0_FCHV    0x00000001UL /* freeze conditions in hypervisor mode */
 #define SPRN_MMCR1      798
 #define SPRN_MMCRA      0x312
+#define   MMCRA_SDSYNC  0x80000000UL /* SDAR synced with SIAR */
 #define   MMCRA_SIHV    0x10000000UL /* state of MSR HV when SIAR set */
 #define   MMCRA_SIPR    0x08000000UL /* state of MSR PR when SIAR set */
 #define   MMCRA_SLOT    0x07000000UL /* SLOT bits (37-39) */
 #define   MMCRA_SLOT_SHIFT      24
 #define   MMCRA_SAMPLE_ENABLE 0x00000001UL /* enable sampling */
+#define   POWER6_MMCRA_SDSYNC 0x0000080000000000ULL     /* SDAR/SIAR synced */
 #define   POWER6_MMCRA_SIHV   0x0000040000000000ULL
 #define   POWER6_MMCRA_SIPR   0x0000020000000000ULL
 #define   POWER6_MMCRA_THRM     0x00000020UL
diff --git a/arch/powerpc/include/asm/systbl.h b/arch/powerpc/include/asm/systbl.h
index d98a30dfd41c..a0b92de51c7e 100644
--- a/arch/powerpc/include/asm/systbl.h
+++ b/arch/powerpc/include/asm/systbl.h
@@ -322,6 +322,6 @@ SYSCALL_SPU(epoll_create1)
 SYSCALL_SPU(dup3)
 SYSCALL_SPU(pipe2)
 SYSCALL(inotify_init1)
-SYSCALL(ni_syscall)
+SYSCALL_SPU(perf_counter_open)
 COMPAT_SYS_SPU(preadv)
 COMPAT_SYS_SPU(pwritev)
diff --git a/arch/powerpc/include/asm/unistd.h b/arch/powerpc/include/asm/unistd.h
index 3f06f8ec81c5..4badac2d11d1 100644
--- a/arch/powerpc/include/asm/unistd.h
+++ b/arch/powerpc/include/asm/unistd.h
@@ -341,6 +341,7 @@
 #define __NR_dup3               316
 #define __NR_pipe2              317
 #define __NR_inotify_init1      318
+#define __NR_perf_counter_open  319
 #define __NR_preadv             320
 #define __NR_pwritev            321
 
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index 71901fbda4a5..a2c683403c2b 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -94,6 +94,9 @@ obj64-$(CONFIG_AUDIT)		+= compat_audit.o
 
 obj-$(CONFIG_DYNAMIC_FTRACE)    += ftrace.o
 obj-$(CONFIG_FUNCTION_GRAPH_TRACER)     += ftrace.o
+obj-$(CONFIG_PERF_COUNTERS)     += perf_counter.o power4-pmu.o ppc970-pmu.o \
+                                   power5-pmu.o power5+-pmu.o power6-pmu.o \
+                                   power7-pmu.o
 
 obj-$(CONFIG_8XX_MINIMAL_FPEMU) += softemu8xx.o
 
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index 1e40bc053946..e981d1ce1914 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -131,6 +131,7 @@ int main(void)
         DEFINE(PACAKMSR, offsetof(struct paca_struct, kernel_msr));
         DEFINE(PACASOFTIRQEN, offsetof(struct paca_struct, soft_enabled));
         DEFINE(PACAHARDIRQEN, offsetof(struct paca_struct, hard_enabled));
+        DEFINE(PACAPERFPEND, offsetof(struct paca_struct, perf_counter_pending));
         DEFINE(PACASLBCACHE, offsetof(struct paca_struct, slb_cache));
         DEFINE(PACASLBCACHEPTR, offsetof(struct paca_struct, slb_cache_ptr));
         DEFINE(PACACONTEXTID, offsetof(struct paca_struct, context.id));
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index abfc32330479..43e073477c34 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -526,6 +526,15 @@ ALT_FW_FTR_SECTION_END_IFCLR(FW_FEATURE_ISERIES)
 2:
         TRACE_AND_RESTORE_IRQ(r5);
 
+#ifdef CONFIG_PERF_COUNTERS
+        /* check paca->perf_counter_pending if we're enabling ints */
+        lbz     r3,PACAPERFPEND(r13)
+        and.    r3,r3,r5
+        beq     27f
+        bl      .perf_counter_do_pending
+27:
+#endif /* CONFIG_PERF_COUNTERS */
+
         /* extract EE bit and use it to restore paca->hard_enabled */
         ld      r3,_MSR(r1)
         rldicl  r4,r3,49,63             /* r0 = (r3 >> 15) & 1 */
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 8c1a4966867e..feff792ed0f9 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -135,6 +135,11 @@ notrace void raw_local_irq_restore(unsigned long en)
                         iseries_handle_interrupts();
         }
 
+        if (test_perf_counter_pending()) {
+                clear_perf_counter_pending();
+                perf_counter_do_pending();
+        }
+
         /*
          * if (get_paca()->hard_enabled) return;
          * But again we need to take care that gcc gets hard_enabled directly
diff --git a/arch/powerpc/kernel/perf_counter.c b/arch/powerpc/kernel/perf_counter.c
new file mode 100644
index 000000000000..bb202388170e
--- /dev/null
+++ b/arch/powerpc/kernel/perf_counter.c
@@ -0,0 +1,1263 @@
+/*
+ * Performance counter support - powerpc architecture code
+ *
+ * Copyright 2008-2009 Paul Mackerras, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <linux/kernel.h>
+#include <linux/sched.h>
+#include <linux/perf_counter.h>
+#include <linux/percpu.h>
+#include <linux/hardirq.h>
+#include <asm/reg.h>
+#include <asm/pmc.h>
+#include <asm/machdep.h>
+#include <asm/firmware.h>
+#include <asm/ptrace.h>
+
+struct cpu_hw_counters {
+        int n_counters;
+        int n_percpu;
+        int disabled;
+        int n_added;
+        int n_limited;
+        u8  pmcs_enabled;
+        struct perf_counter *counter[MAX_HWCOUNTERS];
+        u64 events[MAX_HWCOUNTERS];
+        unsigned int flags[MAX_HWCOUNTERS];
+        u64 mmcr[3];
+        struct perf_counter *limited_counter[MAX_LIMITED_HWCOUNTERS];
+        u8  limited_hwidx[MAX_LIMITED_HWCOUNTERS];
+};
+DEFINE_PER_CPU(struct cpu_hw_counters, cpu_hw_counters);
+
+struct power_pmu *ppmu;
+
+/*
+ * Normally, to ignore kernel events we set the FCS (freeze counters
+ * in supervisor mode) bit in MMCR0, but if the kernel runs with the
+ * hypervisor bit set in the MSR, or if we are running on a processor
+ * where the hypervisor bit is forced to 1 (as on Apple G5 processors),
+ * then we need to use the FCHV bit to ignore kernel events.
+ */
+static unsigned int freeze_counters_kernel = MMCR0_FCS;
+
+static void perf_counter_interrupt(struct pt_regs *regs);
+
+void perf_counter_print_debug(void)
+{
+}
+
+/*
+ * Read one performance monitor counter (PMC).
+ */
+static unsigned long read_pmc(int idx)
+{
+        unsigned long val;
+
+        switch (idx) {
+        case 1:
+                val = mfspr(SPRN_PMC1);
+                break;
+        case 2:
+                val = mfspr(SPRN_PMC2);
+                break;
+        case 3:
+                val = mfspr(SPRN_PMC3);
+                break;
+        case 4:
+                val = mfspr(SPRN_PMC4);
+                break;
+        case 5:
+                val = mfspr(SPRN_PMC5);
+                break;
+        case 6:
+                val = mfspr(SPRN_PMC6);
+                break;
+        case 7:
+                val = mfspr(SPRN_PMC7);
+                break;
+        case 8:
+                val = mfspr(SPRN_PMC8);
+                break;
+        default:
+                printk(KERN_ERR "oops trying to read PMC%d\n", idx);
+                val = 0;
+        }
+        return val;
+}
+
+/*
+ * Write one PMC.
+ */
+static void write_pmc(int idx, unsigned long val)
+{
+        switch (idx) {
+        case 1:
+                mtspr(SPRN_PMC1, val);
+                break;
+        case 2:
+                mtspr(SPRN_PMC2, val);
+                break;
+        case 3:
+                mtspr(SPRN_PMC3, val);
+                break;
+        case 4:
+                mtspr(SPRN_PMC4, val);
+                break;
+        case 5:
+                mtspr(SPRN_PMC5, val);
+                break;
+        case 6:
+                mtspr(SPRN_PMC6, val);
+                break;
+        case 7:
+                mtspr(SPRN_PMC7, val);
+                break;
+        case 8:
+                mtspr(SPRN_PMC8, val);
+                break;
+        default:
+                printk(KERN_ERR "oops trying to write PMC%d\n", idx);
+        }
+}
+
+/*
+ * Check if a set of events can all go on the PMU at once.
+ * If they can't, this will look at alternative codes for the events
+ * and see if any combination of alternative codes is feasible.
+ * The feasible set is returned in event[].
+ */
+static int power_check_constraints(u64 event[], unsigned int cflags[],
+                                   int n_ev)
+{
+        u64 mask, value, nv;
+        u64 alternatives[MAX_HWCOUNTERS][MAX_EVENT_ALTERNATIVES];
+        u64 amasks[MAX_HWCOUNTERS][MAX_EVENT_ALTERNATIVES];
+        u64 avalues[MAX_HWCOUNTERS][MAX_EVENT_ALTERNATIVES];
+        u64 smasks[MAX_HWCOUNTERS], svalues[MAX_HWCOUNTERS];
+        int n_alt[MAX_HWCOUNTERS], choice[MAX_HWCOUNTERS];
+        int i, j;
+        u64 addf = ppmu->add_fields;
+        u64 tadd = ppmu->test_adder;
+
+        if (n_ev > ppmu->n_counter)
+                return -1;
+
+        /* First see if the events will go on as-is */
+        for (i = 0; i < n_ev; ++i) {
+                if ((cflags[i] & PPMU_LIMITED_PMC_REQD)
+                    && !ppmu->limited_pmc_event(event[i])) {
+                        ppmu->get_alternatives(event[i], cflags[i],
+                                               alternatives[i]);
+                        event[i] = alternatives[i][0];
+                }
+                if (ppmu->get_constraint(event[i], &amasks[i][0],
+                                         &avalues[i][0]))
+                        return -1;
+        }
+        value = mask = 0;
+        for (i = 0; i < n_ev; ++i) {
+                nv = (value | avalues[i][0]) + (value & avalues[i][0] & addf);
+                if ((((nv + tadd) ^ value) & mask) != 0 ||
+                    (((nv + tadd) ^ avalues[i][0]) & amasks[i][0]) != 0)
+                        break;
+                value = nv;
+                mask |= amasks[i][0];
+        }
+        if (i == n_ev)
+                return 0;       /* all OK */
+
+        /* doesn't work, gather alternatives... */
+        if (!ppmu->get_alternatives)
+                return -1;
+        for (i = 0; i < n_ev; ++i) {
+                choice[i] = 0;
+                n_alt[i] = ppmu->get_alternatives(event[i], cflags[i],
+                                                  alternatives[i]);
+                for (j = 1; j < n_alt[i]; ++j)
+                        ppmu->get_constraint(alternatives[i][j],
+                                             &amasks[i][j], &avalues[i][j]);
+        }
+
+        /* enumerate all possibilities and see if any will work */
+        i = 0;
+        j = -1;
+        value = mask = nv = 0;
+        while (i < n_ev) {
+                if (j >= 0) {
+                        /* we're backtracking, restore context */
+                        value = svalues[i];
+                        mask = smasks[i];
+                        j = choice[i];
+                }
+                /*
+                 * See if any alternative k for event i,
+                 * where k > j, will satisfy the constraints.
+                 */
+                while (++j < n_alt[i]) {
+                        nv = (value | avalues[i][j]) +
+                                (value & avalues[i][j] & addf);
+                        if ((((nv + tadd) ^ value) & mask) == 0 &&
+                            (((nv + tadd) ^ avalues[i][j])
+                             & amasks[i][j]) == 0)
+                                break;
+                }
+                if (j >= n_alt[i]) {
+                        /*
+                         * No feasible alternative, backtrack
+                         * to event i-1 and continue enumerating its
+                         * alternatives from where we got up to.
+                         */
+                        if (--i < 0)
+                                return -1;
+                } else {
+                        /*
+                         * Found a feasible alternative for event i,
+                         * remember where we got up to with this event,
+                         * go on to the next event, and start with
+                         * the first alternative for it.
+                         */
+                        choice[i] = j;
+                        svalues[i] = value;
+                        smasks[i] = mask;
+                        value = nv;
+                        mask |= amasks[i][j];
+                        ++i;
+                        j = -1;
+                }
+        }
+
+        /* OK, we have a feasible combination, tell the caller the solution */
+        for (i = 0; i < n_ev; ++i)
+                event[i] = alternatives[i][choice[i]];
+        return 0;
+}
+
+/*
+ * Check if newly-added counters have consistent settings for
+ * exclude_{user,kernel,hv} with each other and any previously
+ * added counters.
+ */
+static int check_excludes(struct perf_counter **ctrs, unsigned int cflags[],
+                          int n_prev, int n_new)
+{
+        int eu = 0, ek = 0, eh = 0;
+        int i, n, first;
+        struct perf_counter *counter;
+
+        n = n_prev + n_new;
+        if (n <= 1)
+                return 0;
+
+        first = 1;
+        for (i = 0; i < n; ++i) {
+                if (cflags[i] & PPMU_LIMITED_PMC_OK) {
+                        cflags[i] &= ~PPMU_LIMITED_PMC_REQD;
+                        continue;
+                }
+                counter = ctrs[i];
+                if (first) {
+                        eu = counter->attr.exclude_user;
+                        ek = counter->attr.exclude_kernel;
+                        eh = counter->attr.exclude_hv;
+                        first = 0;
+                } else if (counter->attr.exclude_user != eu ||
+                           counter->attr.exclude_kernel != ek ||
+                           counter->attr.exclude_hv != eh) {
+                        return -EAGAIN;
+                }
+        }
+
+        if (eu || ek || eh)
+                for (i = 0; i < n; ++i)
+                        if (cflags[i] & PPMU_LIMITED_PMC_OK)
+                                cflags[i] |= PPMU_LIMITED_PMC_REQD;
+
+        return 0;
+}
+
+static void power_pmu_read(struct perf_counter *counter)
+{
+        long val, delta, prev;
+
+        if (!counter->hw.idx)
+                return;
+        /*
+         * Performance monitor interrupts come even when interrupts
+         * are soft-disabled, as long as interrupts are hard-enabled.
+         * Therefore we treat them like NMIs.
+         */
+        do {
+                prev = atomic64_read(&counter->hw.prev_count);
+                barrier();
+                val = read_pmc(counter->hw.idx);
+        } while (atomic64_cmpxchg(&counter->hw.prev_count, prev, val) != prev);
+
+        /* The counters are only 32 bits wide */
+        delta = (val - prev) & 0xfffffffful;
+        atomic64_add(delta, &counter->count);
+        atomic64_sub(delta, &counter->hw.period_left);
+}
+
+/*
+ * On some machines, PMC5 and PMC6 can't be written, don't respect
+ * the freeze conditions, and don't generate interrupts.  This tells
+ * us if `counter' is using such a PMC.
+ */
+static int is_limited_pmc(int pmcnum)
+{
+        return (ppmu->flags & PPMU_LIMITED_PMC5_6)
+                && (pmcnum == 5 || pmcnum == 6);
+}
+
+static void freeze_limited_counters(struct cpu_hw_counters *cpuhw,
+                                    unsigned long pmc5, unsigned long pmc6)
+{
+        struct perf_counter *counter;
+        u64 val, prev, delta;
+        int i;
+
+        for (i = 0; i < cpuhw->n_limited; ++i) {
+                counter = cpuhw->limited_counter[i];
+                if (!counter->hw.idx)
+                        continue;
+                val = (counter->hw.idx == 5) ? pmc5 : pmc6;
+                prev = atomic64_read(&counter->hw.prev_count);
+                counter->hw.idx = 0;
+                delta = (val - prev) & 0xfffffffful;
+                atomic64_add(delta, &counter->count);
+        }
+}
+
+static void thaw_limited_counters(struct cpu_hw_counters *cpuhw,
+                                  unsigned long pmc5, unsigned long pmc6)
+{
+        struct perf_counter *counter;
+        u64 val;
+        int i;
+
+        for (i = 0; i < cpuhw->n_limited; ++i) {
+                counter = cpuhw->limited_counter[i];
+                counter->hw.idx = cpuhw->limited_hwidx[i];
+                val = (counter->hw.idx == 5) ? pmc5 : pmc6;
+                atomic64_set(&counter->hw.prev_count, val);
+                perf_counter_update_userpage(counter);
+        }
+}
+
+/*
+ * Since limited counters don't respect the freeze conditions, we
+ * have to read them immediately after freezing or unfreezing the
+ * other counters.  We try to keep the values from the limited
+ * counters as consistent as possible by keeping the delay (in
+ * cycles and instructions) between freezing/unfreezing and reading
+ * the limited counters as small and consistent as possible.
+ * Therefore, if any limited counters are in use, we read them
+ * both, and always in the same order, to minimize variability,
+ * and do it inside the same asm that writes MMCR0.
+ */
+static void write_mmcr0(struct cpu_hw_counters *cpuhw, unsigned long mmcr0)
+{
+        unsigned long pmc5, pmc6;
+
+        if (!cpuhw->n_limited) {
+                mtspr(SPRN_MMCR0, mmcr0);
+                return;
+        }
+
+        /*
+         * Write MMCR0, then read PMC5 and PMC6 immediately.
+         * To ensure we don't get a performance monitor interrupt
+         * between writing MMCR0 and freezing/thawing the limited
+         * counters, we first write MMCR0 with the counter overflow
+         * interrupt enable bits turned off.
+         */
+        asm volatile("mtspr %3,%2; mfspr %0,%4; mfspr %1,%5"
+                     : "=&r" (pmc5), "=&r" (pmc6)
+                     : "r" (mmcr0 & ~(MMCR0_PMC1CE | MMCR0_PMCjCE)),
+                       "i" (SPRN_MMCR0),
+                       "i" (SPRN_PMC5), "i" (SPRN_PMC6));
+
+        if (mmcr0 & MMCR0_FC)
+                freeze_limited_counters(cpuhw, pmc5, pmc6);
+        else
+                thaw_limited_counters(cpuhw, pmc5, pmc6);
+
+        /*
+         * Write the full MMCR0 including the counter overflow interrupt
+         * enable bits, if necessary.
+         */
+        if (mmcr0 & (MMCR0_PMC1CE | MMCR0_PMCjCE))
+                mtspr(SPRN_MMCR0, mmcr0);
+}
+
+/*
+ * Disable all counters to prevent PMU interrupts and to allow
+ * counters to be added or removed.
+ */
+void hw_perf_disable(void)
+{
+        struct cpu_hw_counters *cpuhw;
+        unsigned long ret;
+        unsigned long flags;
+
+        local_irq_save(flags);
+        cpuhw = &__get_cpu_var(cpu_hw_counters);
+
+        ret = cpuhw->disabled;
+        if (!ret) {
+                cpuhw->disabled = 1;
+                cpuhw->n_added = 0;
+
+                /*
+                 * Check if we ever enabled the PMU on this cpu.
+                 */
+                if (!cpuhw->pmcs_enabled) {
+                        if (ppc_md.enable_pmcs)
+                                ppc_md.enable_pmcs();
+                        cpuhw->pmcs_enabled = 1;
+                }
+
+                /*
+                 * Disable instruction sampling if it was enabled
+                 */
+                if (cpuhw->mmcr[2] & MMCRA_SAMPLE_ENABLE) {
+                        mtspr(SPRN_MMCRA,
+                              cpuhw->mmcr[2] & ~MMCRA_SAMPLE_ENABLE);
+                        mb();
+                }
+
+                /*
+                 * Set the 'freeze counters' bit.
+                 * The barrier is to make sure the mtspr has been
+                 * executed and the PMU has frozen the counters
+                 * before we return.
+                 */
+                write_mmcr0(cpuhw, mfspr(SPRN_MMCR0) | MMCR0_FC);
+                mb();
+        }
+        local_irq_restore(flags);
+}
+
+/*
+ * Re-enable all counters if disable == 0.
+ * If we were previously disabled and counters were added, then
+ * put the new config on the PMU.
+ */
+void hw_perf_enable(void)
+{
+        struct perf_counter *counter;
+        struct cpu_hw_counters *cpuhw;
+        unsigned long flags;
+        long i;
+        unsigned long val;
+        s64 left;
+        unsigned int hwc_index[MAX_HWCOUNTERS];
+        int n_lim;
+        int idx;
+
+        local_irq_save(flags);
+        cpuhw = &__get_cpu_var(cpu_hw_counters);
+        if (!cpuhw->disabled) {
+                local_irq_restore(flags);
+                return;
+        }
+        cpuhw->disabled = 0;
+
+        /*
+         * If we didn't change anything, or only removed counters,
+         * no need to recalculate MMCR* settings and reset the PMCs.
+         * Just reenable the PMU with the current MMCR* settings
+         * (possibly updated for removal of counters).
+         */
+        if (!cpuhw->n_added) {
+                mtspr(SPRN_MMCRA, cpuhw->mmcr[2] & ~MMCRA_SAMPLE_ENABLE);
+                mtspr(SPRN_MMCR1, cpuhw->mmcr[1]);
+                if (cpuhw->n_counters == 0)
+                        get_lppaca()->pmcregs_in_use = 0;
+                goto out_enable;
+        }
+
+        /*
+         * Compute MMCR* values for the new set of counters
+         */
+        if (ppmu->compute_mmcr(cpuhw->events, cpuhw->n_counters, hwc_index,
+                               cpuhw->mmcr)) {
+                /* shouldn't ever get here */
+                printk(KERN_ERR "oops compute_mmcr failed\n");
+                goto out;
+        }
+
+        /*
+         * Add in MMCR0 freeze bits corresponding to the
+         * attr.exclude_* bits for the first counter.
+         * We have already checked that all counters have the
+         * same values for these bits as the first counter.
+         */
+        counter = cpuhw->counter[0];
+        if (counter->attr.exclude_user)
+                cpuhw->mmcr[0] |= MMCR0_FCP;
+        if (counter->attr.exclude_kernel)
+                cpuhw->mmcr[0] |= freeze_counters_kernel;
+        if (counter->attr.exclude_hv)
+                cpuhw->mmcr[0] |= MMCR0_FCHV;
+
+        /*
+         * Write the new configuration to MMCR* with the freeze
+         * bit set and set the hardware counters to their initial values.
+         * Then unfreeze the counters.
+         */
+        get_lppaca()->pmcregs_in_use = 1;
+        mtspr(SPRN_MMCRA, cpuhw->mmcr[2] & ~MMCRA_SAMPLE_ENABLE);
+        mtspr(SPRN_MMCR1, cpuhw->mmcr[1]);
+        mtspr(SPRN_MMCR0, (cpuhw->mmcr[0] & ~(MMCR0_PMC1CE | MMCR0_PMCjCE))
+                                | MMCR0_FC);
+
+        /*
+         * Read off any pre-existing counters that need to move
+         * to another PMC.
+         */
+        for (i = 0; i < cpuhw->n_counters; ++i) {
+                counter = cpuhw->counter[i];
+                if (counter->hw.idx && counter->hw.idx != hwc_index[i] + 1) {
+                        power_pmu_read(counter);
+                        write_pmc(counter->hw.idx, 0);
+                        counter->hw.idx = 0;
+                }
+        }
+
+        /*
+         * Initialize the PMCs for all the new and moved counters.
+         */
+        cpuhw->n_limited = n_lim = 0;
+        for (i = 0; i < cpuhw->n_counters; ++i) {
+                counter = cpuhw->counter[i];
+                if (counter->hw.idx)
+                        continue;
+                idx = hwc_index[i] + 1;
+                if (is_limited_pmc(idx)) {
+                        cpuhw->limited_counter[n_lim] = counter;
+                        cpuhw->limited_hwidx[n_lim] = idx;
+                        ++n_lim;
+                        continue;
+                }
+                val = 0;
+                if (counter->hw.sample_period) {
+                        left = atomic64_read(&counter->hw.period_left);
+                        if (left < 0x80000000L)
+                                val = 0x80000000L - left;
+                }
+                atomic64_set(&counter->hw.prev_count, val);
+                counter->hw.idx = idx;
+                write_pmc(idx, val);
+                perf_counter_update_userpage(counter);
+        }
+        cpuhw->n_limited = n_lim;
+        cpuhw->mmcr[0] |= MMCR0_PMXE | MMCR0_FCECE;
+
+ out_enable:
+        mb();
+        write_mmcr0(cpuhw, cpuhw->mmcr[0]);
+
+        /*
+         * Enable instruction sampling if necessary
+         */
+        if (cpuhw->mmcr[2] & MMCRA_SAMPLE_ENABLE) {
+                mb();
+                mtspr(SPRN_MMCRA, cpuhw->mmcr[2]);
+        }
+
+ out:
+        local_irq_restore(flags);
+}
+
+static int collect_events(struct perf_counter *group, int max_count,
+                          struct perf_counter *ctrs[], u64 *events,
+                          unsigned int *flags)
+{
+        int n = 0;
+        struct perf_counter *counter;
+
+        if (!is_software_counter(group)) {
+                if (n >= max_count)
+                        return -1;
+                ctrs[n] = group;
+                flags[n] = group->hw.counter_base;
+                events[n++] = group->hw.config;
+        }
+        list_for_each_entry(counter, &group->sibling_list, list_entry) {
+                if (!is_software_counter(counter) &&
+                    counter->state != PERF_COUNTER_STATE_OFF) {
+                        if (n >= max_count)
+                                return -1;
+                        ctrs[n] = counter;
+                        flags[n] = counter->hw.counter_base;
+                        events[n++] = counter->hw.config;
+                }
+        }
+        return n;
+}
+
+static void counter_sched_in(struct perf_counter *counter, int cpu)
+{
+        counter->state = PERF_COUNTER_STATE_ACTIVE;
+        counter->oncpu = cpu;
+        counter->tstamp_running += counter->ctx->time - counter->tstamp_stopped;
+        if (is_software_counter(counter))
+                counter->pmu->enable(counter);
+}
+
+/*
+ * Called to enable a whole group of counters.
+ * Returns 1 if the group was enabled, or -EAGAIN if it could not be.
+ * Assumes the caller has disabled interrupts and has
+ * frozen the PMU with hw_perf_save_disable.
+ */
+int hw_perf_group_sched_in(struct perf_counter *group_leader,
+               struct perf_cpu_context *cpuctx,
+               struct perf_counter_context *ctx, int cpu)
+{
+        struct cpu_hw_counters *cpuhw;
+        long i, n, n0;
+        struct perf_counter *sub;
+
+        cpuhw = &__get_cpu_var(cpu_hw_counters);
+        n0 = cpuhw->n_counters;
+        n = collect_events(group_leader, ppmu->n_counter - n0,
+                           &cpuhw->counter[n0], &cpuhw->events[n0],
+                           &cpuhw->flags[n0]);
+        if (n < 0)
+                return -EAGAIN;
+        if (check_excludes(cpuhw->counter, cpuhw->flags, n0, n))
+                return -EAGAIN;
+        i = power_check_constraints(cpuhw->events, cpuhw->flags, n + n0);
+        if (i < 0)
+                return -EAGAIN;
+        cpuhw->n_counters = n0 + n;
+        cpuhw->n_added += n;
+
+        /*
+         * OK, this group can go on; update counter states etc.,
+         * and enable any software counters
+         */
+        for (i = n0; i < n0 + n; ++i)
+                cpuhw->counter[i]->hw.config = cpuhw->events[i];
+        cpuctx->active_oncpu += n;
+        n = 1;
+        counter_sched_in(group_leader, cpu);
+        list_for_each_entry(sub, &group_leader->sibling_list, list_entry) {
+                if (sub->state != PERF_COUNTER_STATE_OFF) {
+                        counter_sched_in(sub, cpu);
+                        ++n;
+                }
+        }
+        ctx->nr_active += n;
+
+        return 1;
+}
+
+/*
+ * Add a counter to the PMU.
+ * If all counters are not already frozen, then we disable and
+ * re-enable the PMU in order to get hw_perf_enable to do the
+ * actual work of reconfiguring the PMU.
+ */
+static int power_pmu_enable(struct perf_counter *counter)
+{
+        struct cpu_hw_counters *cpuhw;
+        unsigned long flags;
+        int n0;
+        int ret = -EAGAIN;
+
+        local_irq_save(flags);
+        perf_disable();
+
+        /*
+         * Add the counter to the list (if there is room)
+         * and check whether the total set is still feasible.
+         */
+        cpuhw = &__get_cpu_var(cpu_hw_counters);
+        n0 = cpuhw->n_counters;
+        if (n0 >= ppmu->n_counter)
+                goto out;
+        cpuhw->counter[n0] = counter;
+        cpuhw->events[n0] = counter->hw.config;
+        cpuhw->flags[n0] = counter->hw.counter_base;
+        if (check_excludes(cpuhw->counter, cpuhw->flags, n0, 1))
+                goto out;
+        if (power_check_constraints(cpuhw->events, cpuhw->flags, n0 + 1))
+                goto out;
+
+        counter->hw.config = cpuhw->events[n0];
+        ++cpuhw->n_counters;
+        ++cpuhw->n_added;
+
+        ret = 0;
+ out:
+        perf_enable();
+        local_irq_restore(flags);
+        return ret;
+}
+
+/*
+ * Remove a counter from the PMU.
+ */
+static void power_pmu_disable(struct perf_counter *counter)
+{
+        struct cpu_hw_counters *cpuhw;
+        long i;
+        unsigned long flags;
+
+        local_irq_save(flags);
+        perf_disable();
+
+        power_pmu_read(counter);
+
+        cpuhw = &__get_cpu_var(cpu_hw_counters);
+        for (i = 0; i < cpuhw->n_counters; ++i) {
+                if (counter == cpuhw->counter[i]) {
+                        while (++i < cpuhw->n_counters)
+                                cpuhw->counter[i-1] = cpuhw->counter[i];
+                        --cpuhw->n_counters;
+                        ppmu->disable_pmc(counter->hw.idx - 1, cpuhw->mmcr);
+                        if (counter->hw.idx) {
+                                write_pmc(counter->hw.idx, 0);
+                                counter->hw.idx = 0;
+                        }
+                        perf_counter_update_userpage(counter);
+                        break;
+                }
+        }
+        for (i = 0; i < cpuhw->n_limited; ++i)
+                if (counter == cpuhw->limited_counter[i])
+                        break;
+        if (i < cpuhw->n_limited) {
+                while (++i < cpuhw->n_limited) {
+                        cpuhw->limited_counter[i-1] = cpuhw->limited_counter[i];
+                        cpuhw->limited_hwidx[i-1] = cpuhw->limited_hwidx[i];
+                }
+                --cpuhw->n_limited;
+        }
+        if (cpuhw->n_counters == 0) {
+                /* disable exceptions if no counters are running */
+                cpuhw->mmcr[0] &= ~(MMCR0_PMXE | MMCR0_FCECE);
+        }
+
+        perf_enable();
+        local_irq_restore(flags);
+}
+
+/*
+ * Re-enable interrupts on a counter after they were throttled
+ * because they were coming too fast.
+ */
+static void power_pmu_unthrottle(struct perf_counter *counter)
+{
+        s64 val, left;
+        unsigned long flags;
+
+        if (!counter->hw.idx || !counter->hw.sample_period)
+                return;
+        local_irq_save(flags);
+        perf_disable();
+        power_pmu_read(counter);
+        left = counter->hw.sample_period;
+        counter->hw.last_period = left;
+        val = 0;
+        if (left < 0x80000000L)
+                val = 0x80000000L - left;
+        write_pmc(counter->hw.idx, val);
+        atomic64_set(&counter->hw.prev_count, val);
+        atomic64_set(&counter->hw.period_left, left);
+        perf_counter_update_userpage(counter);
+        perf_enable();
+        local_irq_restore(flags);
+}
+
+struct pmu power_pmu = {
+        .enable         = power_pmu_enable,
+        .disable        = power_pmu_disable,
+        .read           = power_pmu_read,
+        .unthrottle     = power_pmu_unthrottle,
+};
+
+/*
+ * Return 1 if we might be able to put counter on a limited PMC,
+ * or 0 if not.
+ * A counter can only go on a limited PMC if it counts something
+ * that a limited PMC can count, doesn't require interrupts, and
+ * doesn't exclude any processor mode.
+ */
+static int can_go_on_limited_pmc(struct perf_counter *counter, u64 ev,
+                                 unsigned int flags)
+{
+        int n;
+        u64 alt[MAX_EVENT_ALTERNATIVES];
+
+        if (counter->attr.exclude_user
+            || counter->attr.exclude_kernel
+            || counter->attr.exclude_hv
+            || counter->attr.sample_period)
+                return 0;
+
+        if (ppmu->limited_pmc_event(ev))
+                return 1;
+
+        /*
+         * The requested event isn't on a limited PMC already;
+         * see if any alternative code goes on a limited PMC.
+         */
+        if (!ppmu->get_alternatives)
+                return 0;
+
+        flags |= PPMU_LIMITED_PMC_OK | PPMU_LIMITED_PMC_REQD;
+        n = ppmu->get_alternatives(ev, flags, alt);
+
+        return n > 0;
+}
+
+/*
+ * Find an alternative event that goes on a normal PMC, if possible,
+ * and return the event code, or 0 if there is no such alternative.
+ * (Note: event code 0 is "don't count" on all machines.)
+ */
+static u64 normal_pmc_alternative(u64 ev, unsigned long flags)
+{
+        u64 alt[MAX_EVENT_ALTERNATIVES];
+        int n;
+
+        flags &= ~(PPMU_LIMITED_PMC_OK | PPMU_LIMITED_PMC_REQD);
+        n = ppmu->get_alternatives(ev, flags, alt);
+        if (!n)
+                return 0;
+        return alt[0];
+}
+
+/* Number of perf_counters counting hardware events */
+static atomic_t num_counters;
+/* Used to avoid races in calling reserve/release_pmc_hardware */
+static DEFINE_MUTEX(pmc_reserve_mutex);
+
+/*
+ * Release the PMU if this is the last perf_counter.
+ */
+static void hw_perf_counter_destroy(struct perf_counter *counter)
+{
+        if (!atomic_add_unless(&num_counters, -1, 1)) {
+                mutex_lock(&pmc_reserve_mutex);
+                if (atomic_dec_return(&num_counters) == 0)
+                        release_pmc_hardware();
+                mutex_unlock(&pmc_reserve_mutex);
+        }
+}
+
+/*
+ * Translate a generic cache event config to a raw event code.
+ */
+static int hw_perf_cache_event(u64 config, u64 *eventp)
+{
+        unsigned long type, op, result;
+        int ev;
+
+        if (!ppmu->cache_events)
+                return -EINVAL;
+
+        /* unpack config */
+        type = config & 0xff;
+        op = (config >> 8) & 0xff;
+        result = (config >> 16) & 0xff;
+
+        if (type >= PERF_COUNT_HW_CACHE_MAX ||
+            op >= PERF_COUNT_HW_CACHE_OP_MAX ||
+            result >= PERF_COUNT_HW_CACHE_RESULT_MAX)
+                return -EINVAL;
+
+        ev = (*ppmu->cache_events)[type][op][result];
+        if (ev == 0)
+                return -EOPNOTSUPP;
+        if (ev == -1)
+                return -EINVAL;
+        *eventp = ev;
+        return 0;
+}
+
+const struct pmu *hw_perf_counter_init(struct perf_counter *counter)
+{
+        u64 ev;
+        unsigned long flags;
+        struct perf_counter *ctrs[MAX_HWCOUNTERS];
+        u64 events[MAX_HWCOUNTERS];
+        unsigned int cflags[MAX_HWCOUNTERS];
+        int n;
+        int err;
+
+        if (!ppmu)
+                return ERR_PTR(-ENXIO);
+        switch (counter->attr.type) {
+        case PERF_TYPE_HARDWARE:
+                ev = counter->attr.config;
+                if (ev >= ppmu->n_generic || ppmu->generic_events[ev] == 0)
+                        return ERR_PTR(-EOPNOTSUPP);
+                ev = ppmu->generic_events[ev];
+                break;
+        case PERF_TYPE_HW_CACHE:
+                err = hw_perf_cache_event(counter->attr.config, &ev);
+                if (err)
+                        return ERR_PTR(err);
+                break;
+        case PERF_TYPE_RAW:
+                ev = counter->attr.config;
+                break;
+        }
+        counter->hw.config_base = ev;
+        counter->hw.idx = 0;
+
+        /*
+         * If we are not running on a hypervisor, force the
+         * exclude_hv bit to 0 so that we don't care what
+         * the user set it to.
+         */
+        if (!firmware_has_feature(FW_FEATURE_LPAR))
+                counter->attr.exclude_hv = 0;
+
+        /*
+         * If this is a per-task counter, then we can use
+         * PM_RUN_* events interchangeably with their non RUN_*
+         * equivalents, e.g. PM_RUN_CYC instead of PM_CYC.
+         * XXX we should check if the task is an idle task.
+         */
+        flags = 0;
+        if (counter->ctx->task)
+                flags |= PPMU_ONLY_COUNT_RUN;
+
+        /*
+         * If this machine has limited counters, check whether this
+         * event could go on a limited counter.
+         */
+        if (ppmu->flags & PPMU_LIMITED_PMC5_6) {
+                if (can_go_on_limited_pmc(counter, ev, flags)) {
+                        flags |= PPMU_LIMITED_PMC_OK;
+                } else if (ppmu->limited_pmc_event(ev)) {
+                        /*
+                         * The requested event is on a limited PMC,
+                         * but we can't use a limited PMC; see if any
+                         * alternative goes on a normal PMC.
+                         */
+                        ev = normal_pmc_alternative(ev, flags);
+                        if (!ev)
+                                return ERR_PTR(-EINVAL);
+                }
+        }
+
+        /*
+         * If this is in a group, check if it can go on with all the
+         * other hardware counters in the group.  We assume the counter
+         * hasn't been linked into its leader's sibling list at this point.
+         */
+        n = 0;
+        if (counter->group_leader != counter) {
+                n = collect_events(counter->group_leader, ppmu->n_counter - 1,
+                                   ctrs, events, cflags);
+                if (n < 0)
+                        return ERR_PTR(-EINVAL);
+        }
+        events[n] = ev;
+        ctrs[n] = counter;
+        cflags[n] = flags;
+        if (check_excludes(ctrs, cflags, n, 1))
+                return ERR_PTR(-EINVAL);
+        if (power_check_constraints(events, cflags, n + 1))
+                return ERR_PTR(-EINVAL);
+
+        counter->hw.config = events[n];
+        counter->hw.counter_base = cflags[n];
+        counter->hw.last_period = counter->hw.sample_period;
+        atomic64_set(&counter->hw.period_left, counter->hw.last_period);
+
+        /*
+         * See if we need to reserve the PMU.
+         * If no counters are currently in use, then we have to take a
+         * mutex to ensure that we don't race with another task doing
+         * reserve_pmc_hardware or release_pmc_hardware.
+         */
+        err = 0;
+        if (!atomic_inc_not_zero(&num_counters)) {
+                mutex_lock(&pmc_reserve_mutex);
+                if (atomic_read(&num_counters) == 0 &&
+                    reserve_pmc_hardware(perf_counter_interrupt))
+                        err = -EBUSY;
+                else
+                        atomic_inc(&num_counters);
+                mutex_unlock(&pmc_reserve_mutex);
+        }
+        counter->destroy = hw_perf_counter_destroy;
+
+        if (err)
+                return ERR_PTR(err);
+        return &power_pmu;
+}
+
+/*
+ * A counter has overflowed; update its count and record
+ * things if requested.  Note that interrupts are hard-disabled
+ * here so there is no possibility of being interrupted.
+ */
+static void record_and_restart(struct perf_counter *counter, long val,
+                               struct pt_regs *regs, int nmi)
+{
+        u64 period = counter->hw.sample_period;
+        s64 prev, delta, left;
+        int record = 0;
+        u64 addr, mmcra, sdsync;
+
+        /* we don't have to worry about interrupts here */
+        prev = atomic64_read(&counter->hw.prev_count);
+        delta = (val - prev) & 0xfffffffful;
+        atomic64_add(delta, &counter->count);
+
+        /*
+         * See if the total period for this counter has expired,
+         * and update for the next period.
+         */
+        val = 0;
+        left = atomic64_read(&counter->hw.period_left) - delta;
+        if (period) {
+                if (left <= 0) {
+                        left += period;
+                        if (left <= 0)
+                                left = period;
+                        record = 1;
+                }
+                if (left < 0x80000000L)
+                        val = 0x80000000L - left;
+        }
+
+        /*
+         * Finally record data if requested.
+         */
+        if (record) {
+                struct perf_sample_data data = {
+                        .regs   = regs,
+                        .addr   = 0,
+                        .period = counter->hw.last_period,
+                };
+
+                if (counter->attr.sample_type & PERF_SAMPLE_ADDR) {
+                        /*
+                         * The user wants a data address recorded.
+                         * If we're not doing instruction sampling,
+                         * give them the SDAR (sampled data address).
+                         * If we are doing instruction sampling, then only
+                         * give them the SDAR if it corresponds to the
+                         * instruction pointed to by SIAR; this is indicated
+                         * by the [POWER6_]MMCRA_SDSYNC bit in MMCRA.
+                         */
+                        mmcra = regs->dsisr;
+                        sdsync = (ppmu->flags & PPMU_ALT_SIPR) ?
+                                POWER6_MMCRA_SDSYNC : MMCRA_SDSYNC;
+                        if (!(mmcra & MMCRA_SAMPLE_ENABLE) || (mmcra & sdsync))
+                                data.addr = mfspr(SPRN_SDAR);
+                }
+                if (perf_counter_overflow(counter, nmi, &data)) {
+                        /*
+                         * Interrupts are coming too fast - throttle them
+                         * by setting the counter to 0, so it will be
+                         * at least 2^30 cycles until the next interrupt
+                         * (assuming each counter counts at most 2 counts
+                         * per cycle).
+                         */
+                        val = 0;
+                        left = ~0ULL >> 1;
+                }
+        }
+
+        write_pmc(counter->hw.idx, val);
+        atomic64_set(&counter->hw.prev_count, val);
+        atomic64_set(&counter->hw.period_left, left);
+        perf_counter_update_userpage(counter);
+}
+
+/*
+ * Called from generic code to get the misc flags (i.e. processor mode)
+ * for an event.
+ */
+unsigned long perf_misc_flags(struct pt_regs *regs)
+{
+        unsigned long mmcra;
+
+        if (TRAP(regs) != 0xf00) {
+                /* not a PMU interrupt */
+                return user_mode(regs) ? PERF_EVENT_MISC_USER :
+                        PERF_EVENT_MISC_KERNEL;
+        }
+
+        mmcra = regs->dsisr;
+        if (ppmu->flags & PPMU_ALT_SIPR) {
+                if (mmcra & POWER6_MMCRA_SIHV)
+                        return PERF_EVENT_MISC_HYPERVISOR;
+                return (mmcra & POWER6_MMCRA_SIPR) ? PERF_EVENT_MISC_USER :
+                        PERF_EVENT_MISC_KERNEL;
+        }
+        if (mmcra & MMCRA_SIHV)
+                return PERF_EVENT_MISC_HYPERVISOR;
+        return (mmcra & MMCRA_SIPR) ? PERF_EVENT_MISC_USER :
+                        PERF_EVENT_MISC_KERNEL;
+}
+
+/*
+ * Called from generic code to get the instruction pointer
+ * for an event.
+ */
+unsigned long perf_instruction_pointer(struct pt_regs *regs)
+{
+        unsigned long mmcra;
+        unsigned long ip;
+        unsigned long slot;
+
+        if (TRAP(regs) != 0xf00)
+                return regs->nip;       /* not a PMU interrupt */
+
+        ip = mfspr(SPRN_SIAR);
+        mmcra = regs->dsisr;
+        if ((mmcra & MMCRA_SAMPLE_ENABLE) && !(ppmu->flags & PPMU_ALT_SIPR)) {
+                slot = (mmcra & MMCRA_SLOT) >> MMCRA_SLOT_SHIFT;
+                if (slot > 1)
+                        ip += 4 * (slot - 1);
+        }
+        return ip;
+}
+
+/*
+ * Performance monitor interrupt stuff
+ */
+static void perf_counter_interrupt(struct pt_regs *regs)
+{
+        int i;
+        struct cpu_hw_counters *cpuhw = &__get_cpu_var(cpu_hw_counters);
+        struct perf_counter *counter;
+        long val;
+        int found = 0;
+        int nmi;
+
+        if (cpuhw->n_limited)
+                freeze_limited_counters(cpuhw, mfspr(SPRN_PMC5),
+                                        mfspr(SPRN_PMC6));
+
+        /*
+         * Overload regs->dsisr to store MMCRA so we only need to read it once.
+         */
+        regs->dsisr = mfspr(SPRN_MMCRA);
+
+        /*
+         * If interrupts were soft-disabled when this PMU interrupt
+         * occurred, treat it as an NMI.
+         */
+        nmi = !regs->softe;
+        if (nmi)
+                nmi_enter();
+        else
+                irq_enter();
+
+        for (i = 0; i < cpuhw->n_counters; ++i) {
+                counter = cpuhw->counter[i];
+                if (!counter->hw.idx || is_limited_pmc(counter->hw.idx))
+                        continue;
+                val = read_pmc(counter->hw.idx);
+                if ((int)val < 0) {
+                        /* counter has overflowed */
+                        found = 1;
+                        record_and_restart(counter, val, regs, nmi);
+                }
+        }
+
+        /*
+         * In case we didn't find and reset the counter that caused
+         * the interrupt, scan all counters and reset any that are
+         * negative, to avoid getting continual interrupts.
+         * Any that we processed in the previous loop will not be negative.
+         */
+        if (!found) {
+                for (i = 0; i < ppmu->n_counter; ++i) {
+                        if (is_limited_pmc(i + 1))
+                                continue;
+                        val = read_pmc(i + 1);
+                        if ((int)val < 0)
+                                write_pmc(i + 1, 0);
+                }
+        }
+
+        /*
+         * Reset MMCR0 to its normal value.  This will set PMXE and
+         * clear FC (freeze counters) and PMAO (perf mon alert occurred)
+         * and thus allow interrupts to occur again.
+         * XXX might want to use MSR.PM to keep the counters frozen until
+         * we get back out of this interrupt.
+         */
+        write_mmcr0(cpuhw, cpuhw->mmcr[0]);
+
+        if (nmi)
+                nmi_exit();
+        else
+                irq_exit();
+}
+
+void hw_perf_counter_setup(int cpu)
+{
+        struct cpu_hw_counters *cpuhw = &per_cpu(cpu_hw_counters, cpu);
+
+        memset(cpuhw, 0, sizeof(*cpuhw));
+        cpuhw->mmcr[0] = MMCR0_FC;
+}
+
+extern struct power_pmu power4_pmu;
+extern struct power_pmu ppc970_pmu;
+extern struct power_pmu power5_pmu;
+extern struct power_pmu power5p_pmu;
+extern struct power_pmu power6_pmu;
+extern struct power_pmu power7_pmu;
+
+static int init_perf_counters(void)
+{
+        unsigned long pvr;
+
+        /* XXX should get this from cputable */
+        pvr = mfspr(SPRN_PVR);
+        switch (PVR_VER(pvr)) {
+        case PV_POWER4:
+        case PV_POWER4p:
+                ppmu = &power4_pmu;
+                break;
+        case PV_970:
+        case PV_970FX:
+        case PV_970MP:
+                ppmu = &ppc970_pmu;
+                break;
+        case PV_POWER5:
+                ppmu = &power5_pmu;
+                break;
+        case PV_POWER5p:
+                ppmu = &power5p_pmu;
+                break;
+        case 0x3e:
+                ppmu = &power6_pmu;
+                break;
+        case 0x3f:
+                ppmu = &power7_pmu;
+                break;
+        }
+
+        /*
+         * Use FCHV to ignore kernel events if MSR.HV is set.
+         */
+        if (mfmsr() & MSR_HV)
+                freeze_counters_kernel = MMCR0_FCHV;
+
+        return 0;
+}
+
+arch_initcall(init_perf_counters);
diff --git a/arch/powerpc/kernel/power4-pmu.c b/arch/powerpc/kernel/power4-pmu.c
new file mode 100644
index 000000000000..07bd308a5fa7
--- /dev/null
+++ b/arch/powerpc/kernel/power4-pmu.c
@@ -0,0 +1,598 @@
+/*
+ * Performance counter support for POWER4 (GP) and POWER4+ (GQ) processors.
+ *
+ * Copyright 2009 Paul Mackerras, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <linux/kernel.h>
+#include <linux/perf_counter.h>
+#include <asm/reg.h>
+
+/*
+ * Bits in event code for POWER4
+ */
+#define PM_PMC_SH       12      /* PMC number (1-based) for direct events */
+#define PM_PMC_MSK      0xf
+#define PM_UNIT_SH      8       /* TTMMUX number and setting - unit select */
+#define PM_UNIT_MSK     0xf
+#define PM_LOWER_SH     6
+#define PM_LOWER_MSK    1
+#define PM_LOWER_MSKS   0x40
+#define PM_BYTE_SH      4       /* Byte number of event bus to use */
+#define PM_BYTE_MSK     3
+#define PM_PMCSEL_MSK   7
+
+/*
+ * Unit code values
+ */
+#define PM_FPU          1
+#define PM_ISU1         2
+#define PM_IFU          3
+#define PM_IDU0         4
+#define PM_ISU1_ALT     6
+#define PM_ISU2         7
+#define PM_IFU_ALT      8
+#define PM_LSU0         9
+#define PM_LSU1         0xc
+#define PM_GPS          0xf
+
+/*
+ * Bits in MMCR0 for POWER4
+ */
+#define MMCR0_PMC1SEL_SH        8
+#define MMCR0_PMC2SEL_SH        1
+#define MMCR_PMCSEL_MSK         0x1f
+
+/*
+ * Bits in MMCR1 for POWER4
+ */
+#define MMCR1_TTM0SEL_SH        62
+#define MMCR1_TTC0SEL_SH        61
+#define MMCR1_TTM1SEL_SH        59
+#define MMCR1_TTC1SEL_SH        58
+#define MMCR1_TTM2SEL_SH        56
+#define MMCR1_TTC2SEL_SH        55
+#define MMCR1_TTM3SEL_SH        53
+#define MMCR1_TTC3SEL_SH        52
+#define MMCR1_TTMSEL_MSK        3
+#define MMCR1_TD_CP_DBG0SEL_SH  50
+#define MMCR1_TD_CP_DBG1SEL_SH  48
+#define MMCR1_TD_CP_DBG2SEL_SH  46
+#define MMCR1_TD_CP_DBG3SEL_SH  44
+#define MMCR1_DEBUG0SEL_SH      43
+#define MMCR1_DEBUG1SEL_SH      42
+#define MMCR1_DEBUG2SEL_SH      41
+#define MMCR1_DEBUG3SEL_SH      40
+#define MMCR1_PMC1_ADDER_SEL_SH 39
+#define MMCR1_PMC2_ADDER_SEL_SH 38
+#define MMCR1_PMC6_ADDER_SEL_SH 37
+#define MMCR1_PMC5_ADDER_SEL_SH 36
+#define MMCR1_PMC8_ADDER_SEL_SH 35
+#define MMCR1_PMC7_ADDER_SEL_SH 34
+#define MMCR1_PMC3_ADDER_SEL_SH 33
+#define MMCR1_PMC4_ADDER_SEL_SH 32
+#define MMCR1_PMC3SEL_SH        27
+#define MMCR1_PMC4SEL_SH        22
+#define MMCR1_PMC5SEL_SH        17
+#define MMCR1_PMC6SEL_SH        12
+#define MMCR1_PMC7SEL_SH        7
+#define MMCR1_PMC8SEL_SH        2       /* note bit 0 is in MMCRA for GP */
+
+static short mmcr1_adder_bits[8] = {
+        MMCR1_PMC1_ADDER_SEL_SH,
+        MMCR1_PMC2_ADDER_SEL_SH,
+        MMCR1_PMC3_ADDER_SEL_SH,
+        MMCR1_PMC4_ADDER_SEL_SH,
+        MMCR1_PMC5_ADDER_SEL_SH,
+        MMCR1_PMC6_ADDER_SEL_SH,
+        MMCR1_PMC7_ADDER_SEL_SH,
+        MMCR1_PMC8_ADDER_SEL_SH
+};
+
+/*
+ * Bits in MMCRA
+ */
+#define MMCRA_PMC8SEL0_SH       17      /* PMC8SEL bit 0 for GP */
+
+/*
+ * Layout of constraint bits:
+ * 6666555555555544444444443333333333222222222211111111110000000000
+ * 3210987654321098765432109876543210987654321098765432109876543210
+ *        |[  >[  >[   >|||[  >[  ><  ><  ><  ><  ><><><><><><><><>
+ *        | UC1 UC2 UC3 ||| PS1 PS2 B0  B1  B2  B3 P1P2P3P4P5P6P7P8
+ *        \SMPL         ||\TTC3SEL
+ *                      |\TTC_IFU_SEL
+ *                      \TTM2SEL0
+ *
+ * SMPL - SAMPLE_ENABLE constraint
+ *     56: SAMPLE_ENABLE value 0x0100_0000_0000_0000
+ *
+ * UC1 - unit constraint 1: can't have all three of FPU/ISU1/IDU0|ISU2
+ *     55: UC1 error 0x0080_0000_0000_0000
+ *     54: FPU events needed 0x0040_0000_0000_0000
+ *     53: ISU1 events needed 0x0020_0000_0000_0000
+ *     52: IDU0|ISU2 events needed 0x0010_0000_0000_0000
+ *
+ * UC2 - unit constraint 2: can't have all three of FPU/IFU/LSU0
+ *     51: UC2 error 0x0008_0000_0000_0000
+ *     50: FPU events needed 0x0004_0000_0000_0000
+ *     49: IFU events needed 0x0002_0000_0000_0000
+ *     48: LSU0 events needed 0x0001_0000_0000_0000
+ *
+ * UC3 - unit constraint 3: can't have all four of LSU0/IFU/IDU0|ISU2/ISU1
+ *     47: UC3 error 0x8000_0000_0000
+ *     46: LSU0 events needed 0x4000_0000_0000
+ *     45: IFU events needed 0x2000_0000_0000
+ *     44: IDU0|ISU2 events needed 0x1000_0000_0000
+ *     43: ISU1 events needed 0x0800_0000_0000
+ *
+ * TTM2SEL0
+ *     42: 0 = IDU0 events needed
+ *         1 = ISU2 events needed 0x0400_0000_0000
+ *
+ * TTC_IFU_SEL
+ *     41: 0 = IFU.U events needed
+ *         1 = IFU.L events needed 0x0200_0000_0000
+ *
+ * TTC3SEL
+ *     40: 0 = LSU1.U events needed
+ *         1 = LSU1.L events needed 0x0100_0000_0000
+ *
+ * PS1
+ *     39: PS1 error 0x0080_0000_0000
+ *     36-38: count of events needing PMC1/2/5/6 0x0070_0000_0000
+ *
+ * PS2
+ *     35: PS2 error 0x0008_0000_0000
+ *     32-34: count of events needing PMC3/4/7/8 0x0007_0000_0000
+ *
+ * B0
+ *     28-31: Byte 0 event source 0xf000_0000
+ *         1 = FPU
+ *         2 = ISU1
+ *         3 = IFU
+ *         4 = IDU0
+ *         7 = ISU2
+ *         9 = LSU0
+ *         c = LSU1
+ *         f = GPS
+ *
+ * B1, B2, B3
+ *     24-27, 20-23, 16-19: Byte 1, 2, 3 event sources
+ *
+ * P8
+ *     15: P8 error 0x8000
+ *     14-15: Count of events needing PMC8
+ *
+ * P1..P7
+ *     0-13: Count of events needing PMC1..PMC7
+ *
+ * Note: this doesn't allow events using IFU.U to be combined with events
+ * using IFU.L, though that is feasible (using TTM0 and TTM2).  However
+ * there are no listed events for IFU.L (they are debug events not
+ * verified for performance monitoring) so this shouldn't cause a
+ * problem.
+ */
+
+static struct unitinfo {
+        u64     value, mask;
+        int     unit;
+        int     lowerbit;
+} p4_unitinfo[16] = {
+        [PM_FPU]  = { 0x44000000000000ull, 0x88000000000000ull, PM_FPU, 0 },
+        [PM_ISU1] = { 0x20080000000000ull, 0x88000000000000ull, PM_ISU1, 0 },
+        [PM_ISU1_ALT] =
+                    { 0x20080000000000ull, 0x88000000000000ull, PM_ISU1, 0 },
+        [PM_IFU]  = { 0x02200000000000ull, 0x08820000000000ull, PM_IFU, 41 },
+        [PM_IFU_ALT] =
+                    { 0x02200000000000ull, 0x08820000000000ull, PM_IFU, 41 },
+        [PM_IDU0] = { 0x10100000000000ull, 0x80840000000000ull, PM_IDU0, 1 },
+        [PM_ISU2] = { 0x10140000000000ull, 0x80840000000000ull, PM_ISU2, 0 },
+        [PM_LSU0] = { 0x01400000000000ull, 0x08800000000000ull, PM_LSU0, 0 },
+        [PM_LSU1] = { 0x00000000000000ull, 0x00010000000000ull, PM_LSU1, 40 },
+        [PM_GPS]  = { 0x00000000000000ull, 0x00000000000000ull, PM_GPS, 0 }
+};
+
+static unsigned char direct_marked_event[8] = {
+        (1<<2) | (1<<3),        /* PMC1: PM_MRK_GRP_DISP, PM_MRK_ST_CMPL */
+        (1<<3) | (1<<5),        /* PMC2: PM_THRESH_TIMEO, PM_MRK_BRU_FIN */
+        (1<<3),                 /* PMC3: PM_MRK_ST_CMPL_INT */
+        (1<<4) | (1<<5),        /* PMC4: PM_MRK_GRP_CMPL, PM_MRK_CRU_FIN */
+        (1<<4) | (1<<5),        /* PMC5: PM_MRK_GRP_TIMEO */
+        (1<<3) | (1<<4) | (1<<5),
+                /* PMC6: PM_MRK_ST_GPS, PM_MRK_FXU_FIN, PM_MRK_GRP_ISSUED */
+        (1<<4) | (1<<5),        /* PMC7: PM_MRK_FPU_FIN, PM_MRK_INST_FIN */
+        (1<<4),                 /* PMC8: PM_MRK_LSU_FIN */
+};
+
+/*
+ * Returns 1 if event counts things relating to marked instructions
+ * and thus needs the MMCRA_SAMPLE_ENABLE bit set, or 0 if not.
+ */
+static int p4_marked_instr_event(u64 event)
+{
+        int pmc, psel, unit, byte, bit;
+        unsigned int mask;
+
+        pmc = (event >> PM_PMC_SH) & PM_PMC_MSK;
+        psel = event & PM_PMCSEL_MSK;
+        if (pmc) {
+                if (direct_marked_event[pmc - 1] & (1 << psel))
+                        return 1;
+                if (psel == 0)          /* add events */
+                        bit = (pmc <= 4)? pmc - 1: 8 - pmc;
+                else if (psel == 6)     /* decode events */
+                        bit = 4;
+                else
+                        return 0;
+        } else
+                bit = psel;
+
+        byte = (event >> PM_BYTE_SH) & PM_BYTE_MSK;
+        unit = (event >> PM_UNIT_SH) & PM_UNIT_MSK;
+        mask = 0;
+        switch (unit) {
+        case PM_LSU1:
+                if (event & PM_LOWER_MSKS)
+                        mask = 1 << 28;         /* byte 7 bit 4 */
+                else
+                        mask = 6 << 24;         /* byte 3 bits 1 and 2 */
+                break;
+        case PM_LSU0:
+                /* byte 3, bit 3; byte 2 bits 0,2,3,4,5; byte 1 */
+                mask = 0x083dff00;
+        }
+        return (mask >> (byte * 8 + bit)) & 1;
+}
+
+static int p4_get_constraint(u64 event, u64 *maskp, u64 *valp)
+{
+        int pmc, byte, unit, lower, sh;
+        u64 mask = 0, value = 0;
+        int grp = -1;
+
+        pmc = (event >> PM_PMC_SH) & PM_PMC_MSK;
+        if (pmc) {
+                if (pmc > 8)
+                        return -1;
+                sh = (pmc - 1) * 2;
+                mask |= 2 << sh;
+                value |= 1 << sh;
+                grp = ((pmc - 1) >> 1) & 1;
+        }
+        unit = (event >> PM_UNIT_SH) & PM_UNIT_MSK;
+        byte = (event >> PM_BYTE_SH) & PM_BYTE_MSK;
+        if (unit) {
+                lower = (event >> PM_LOWER_SH) & PM_LOWER_MSK;
+
+                /*
+                 * Bus events on bytes 0 and 2 can be counted
+                 * on PMC1/2/5/6; bytes 1 and 3 on PMC3/4/7/8.
+                 */
+                if (!pmc)
+                        grp = byte & 1;
+
+                if (!p4_unitinfo[unit].unit)
+                        return -1;
+                mask  |= p4_unitinfo[unit].mask;
+                value |= p4_unitinfo[unit].value;
+                sh = p4_unitinfo[unit].lowerbit;
+                if (sh > 1)
+                        value |= (u64)lower << sh;
+                else if (lower != sh)
+                        return -1;
+                unit = p4_unitinfo[unit].unit;
+
+                /* Set byte lane select field */
+                mask  |= 0xfULL << (28 - 4 * byte);
+                value |= (u64)unit << (28 - 4 * byte);
+        }
+        if (grp == 0) {
+                /* increment PMC1/2/5/6 field */
+                mask  |= 0x8000000000ull;
+                value |= 0x1000000000ull;
+        } else {
+                /* increment PMC3/4/7/8 field */
+                mask  |= 0x800000000ull;
+                value |= 0x100000000ull;
+        }
+
+        /* Marked instruction events need sample_enable set */
+        if (p4_marked_instr_event(event)) {
+                mask  |= 1ull << 56;
+                value |= 1ull << 56;
+        }
+
+        /* PMCSEL=6 decode events on byte 2 need sample_enable clear */
+        if (pmc && (event & PM_PMCSEL_MSK) == 6 && byte == 2)
+                mask  |= 1ull << 56;
+
+        *maskp = mask;
+        *valp = value;
+        return 0;
+}
+
+static unsigned int ppc_inst_cmpl[] = {
+        0x1001, 0x4001, 0x6001, 0x7001, 0x8001
+};
+
+static int p4_get_alternatives(u64 event, unsigned int flags, u64 alt[])
+{
+        int i, j, na;
+
+        alt[0] = event;
+        na = 1;
+
+        /* 2 possibilities for PM_GRP_DISP_REJECT */
+        if (event == 0x8003 || event == 0x0224) {
+                alt[1] = event ^ (0x8003 ^ 0x0224);
+                return 2;
+        }
+
+        /* 2 possibilities for PM_ST_MISS_L1 */
+        if (event == 0x0c13 || event == 0x0c23) {
+                alt[1] = event ^ (0x0c13 ^ 0x0c23);
+                return 2;
+        }
+
+        /* several possibilities for PM_INST_CMPL */
+        for (i = 0; i < ARRAY_SIZE(ppc_inst_cmpl); ++i) {
+                if (event == ppc_inst_cmpl[i]) {
+                        for (j = 0; j < ARRAY_SIZE(ppc_inst_cmpl); ++j)
+                                if (j != i)
+                                        alt[na++] = ppc_inst_cmpl[j];
+                        break;
+                }
+        }
+
+        return na;
+}
+
+static int p4_compute_mmcr(u64 event[], int n_ev,
+                           unsigned int hwc[], u64 mmcr[])
+{
+        u64 mmcr0 = 0, mmcr1 = 0, mmcra = 0;
+        unsigned int pmc, unit, byte, psel, lower;
+        unsigned int ttm, grp;
+        unsigned int pmc_inuse = 0;
+        unsigned int pmc_grp_use[2];
+        unsigned char busbyte[4];
+        unsigned char unituse[16];
+        unsigned int unitlower = 0;
+        int i;
+
+        if (n_ev > 8)
+                return -1;
+
+        /* First pass to count resource use */
+        pmc_grp_use[0] = pmc_grp_use[1] = 0;
+        memset(busbyte, 0, sizeof(busbyte));
+        memset(unituse, 0, sizeof(unituse));
+        for (i = 0; i < n_ev; ++i) {
+                pmc = (event[i] >> PM_PMC_SH) & PM_PMC_MSK;
+                if (pmc) {
+                        if (pmc_inuse & (1 << (pmc - 1)))
+                                return -1;
+                        pmc_inuse |= 1 << (pmc - 1);
+                        /* count 1/2/5/6 vs 3/4/7/8 use */
+                        ++pmc_grp_use[((pmc - 1) >> 1) & 1];
+                }
+                unit = (event[i] >> PM_UNIT_SH) & PM_UNIT_MSK;
+                byte = (event[i] >> PM_BYTE_SH) & PM_BYTE_MSK;
+                lower = (event[i] >> PM_LOWER_SH) & PM_LOWER_MSK;
+                if (unit) {
+                        if (!pmc)
+                                ++pmc_grp_use[byte & 1];
+                        if (unit == 6 || unit == 8)
+                                /* map alt ISU1/IFU codes: 6->2, 8->3 */
+                                unit = (unit >> 1) - 1;
+                        if (busbyte[byte] && busbyte[byte] != unit)
+                                return -1;
+                        busbyte[byte] = unit;
+                        lower <<= unit;
+                        if (unituse[unit] && lower != (unitlower & lower))
+                                return -1;
+                        unituse[unit] = 1;
+                        unitlower |= lower;
+                }
+        }
+        if (pmc_grp_use[0] > 4 || pmc_grp_use[1] > 4)
+                return -1;
+
+        /*
+         * Assign resources and set multiplexer selects.
+         *
+         * Units 1,2,3 are on TTM0, 4,6,7 on TTM1, 8,10 on TTM2.
+         * Each TTMx can only select one unit, but since
+         * units 2 and 6 are both ISU1, and 3 and 8 are both IFU,
+         * we have some choices.
+         */
+        if (unituse[2] & (unituse[1] | (unituse[3] & unituse[9]))) {
+                unituse[6] = 1;         /* Move 2 to 6 */
+                unituse[2] = 0;
+        }
+        if (unituse[3] & (unituse[1] | unituse[2])) {
+                unituse[8] = 1;         /* Move 3 to 8 */
+                unituse[3] = 0;
+                unitlower = (unitlower & ~8) | ((unitlower & 8) << 5);
+        }
+        /* Check only one unit per TTMx */
+        if (unituse[1] + unituse[2] + unituse[3] > 1 ||
+            unituse[4] + unituse[6] + unituse[7] > 1 ||
+            unituse[8] + unituse[9] > 1 ||
+            (unituse[5] | unituse[10] | unituse[11] |
+             unituse[13] | unituse[14]))
+                return -1;
+
+        /* Set TTMxSEL fields.  Note, units 1-3 => TTM0SEL codes 0-2 */
+        mmcr1 |= (u64)(unituse[3] * 2 + unituse[2]) << MMCR1_TTM0SEL_SH;
+        mmcr1 |= (u64)(unituse[7] * 3 + unituse[6] * 2) << MMCR1_TTM1SEL_SH;
+        mmcr1 |= (u64)unituse[9] << MMCR1_TTM2SEL_SH;
+
+        /* Set TTCxSEL fields. */
+        if (unitlower & 0xe)
+                mmcr1 |= 1ull << MMCR1_TTC0SEL_SH;
+        if (unitlower & 0xf0)
+                mmcr1 |= 1ull << MMCR1_TTC1SEL_SH;
+        if (unitlower & 0xf00)
+                mmcr1 |= 1ull << MMCR1_TTC2SEL_SH;
+        if (unitlower & 0x7000)
+                mmcr1 |= 1ull << MMCR1_TTC3SEL_SH;
+
+        /* Set byte lane select fields. */
+        for (byte = 0; byte < 4; ++byte) {
+                unit = busbyte[byte];
+                if (!unit)
+                        continue;
+                if (unit == 0xf) {
+                        /* special case for GPS */
+                        mmcr1 |= 1ull << (MMCR1_DEBUG0SEL_SH - byte);
+                } else {
+                        if (!unituse[unit])
+                                ttm = unit - 1;         /* 2->1, 3->2 */
+                        else
+                                ttm = unit >> 2;
+                        mmcr1 |= (u64)ttm << (MMCR1_TD_CP_DBG0SEL_SH - 2*byte);
+                }
+        }
+
+        /* Second pass: assign PMCs, set PMCxSEL and PMCx_ADDER_SEL fields */
+        for (i = 0; i < n_ev; ++i) {
+                pmc = (event[i] >> PM_PMC_SH) & PM_PMC_MSK;
+                unit = (event[i] >> PM_UNIT_SH) & PM_UNIT_MSK;
+                byte = (event[i] >> PM_BYTE_SH) & PM_BYTE_MSK;
+                psel = event[i] & PM_PMCSEL_MSK;
+                if (!pmc) {
+                        /* Bus event or 00xxx direct event (off or cycles) */
+                        if (unit)
+                                psel |= 0x10 | ((byte & 2) << 2);
+                        for (pmc = 0; pmc < 8; ++pmc) {
+                                if (pmc_inuse & (1 << pmc))
+                                        continue;
+                                grp = (pmc >> 1) & 1;
+                                if (unit) {
+                                        if (grp == (byte & 1))
+                                                break;
+                                } else if (pmc_grp_use[grp] < 4) {
+                                        ++pmc_grp_use[grp];
+                                        break;
+                                }
+                        }
+                        pmc_inuse |= 1 << pmc;
+                } else {
+                        /* Direct event */
+                        --pmc;
+                        if (psel == 0 && (byte & 2))
+                                /* add events on higher-numbered bus */
+                                mmcr1 |= 1ull << mmcr1_adder_bits[pmc];
+                        else if (psel == 6 && byte == 3)
+                                /* seem to need to set sample_enable here */
+                                mmcra |= MMCRA_SAMPLE_ENABLE;
+                        psel |= 8;
+                }
+                if (pmc <= 1)
+                        mmcr0 |= psel << (MMCR0_PMC1SEL_SH - 7 * pmc);
+                else
+                        mmcr1 |= psel << (MMCR1_PMC3SEL_SH - 5 * (pmc - 2));
+                if (pmc == 7)   /* PMC8 */
+                        mmcra |= (psel & 1) << MMCRA_PMC8SEL0_SH;
+                hwc[i] = pmc;
+                if (p4_marked_instr_event(event[i]))
+                        mmcra |= MMCRA_SAMPLE_ENABLE;
+        }
+
+        if (pmc_inuse & 1)
+                mmcr0 |= MMCR0_PMC1CE;
+        if (pmc_inuse & 0xfe)
+                mmcr0 |= MMCR0_PMCjCE;
+
+        mmcra |= 0x2000;        /* mark only one IOP per PPC instruction */
+
+        /* Return MMCRx values */
+        mmcr[0] = mmcr0;
+        mmcr[1] = mmcr1;
+        mmcr[2] = mmcra;
+        return 0;
+}
+
+static void p4_disable_pmc(unsigned int pmc, u64 mmcr[])
+{
+        /*
+         * Setting the PMCxSEL field to 0 disables PMC x.
+         * (Note that pmc is 0-based here, not 1-based.)
+         */
+        if (pmc <= 1) {
+                mmcr[0] &= ~(0x1fUL << (MMCR0_PMC1SEL_SH - 7 * pmc));
+        } else {
+                mmcr[1] &= ~(0x1fUL << (MMCR1_PMC3SEL_SH - 5 * (pmc - 2)));
+                if (pmc == 7)
+                        mmcr[2] &= ~(1UL << MMCRA_PMC8SEL0_SH);
+        }
+}
+
+static int p4_generic_events[] = {
+        [PERF_COUNT_HW_CPU_CYCLES]              = 7,
+        [PERF_COUNT_HW_INSTRUCTIONS]            = 0x1001,
+        [PERF_COUNT_HW_CACHE_REFERENCES]        = 0x8c10, /* PM_LD_REF_L1 */
+        [PERF_COUNT_HW_CACHE_MISSES]            = 0x3c10, /* PM_LD_MISS_L1 */
+        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS]     = 0x330,  /* PM_BR_ISSUED */
+        [PERF_COUNT_HW_BRANCH_MISSES]           = 0x331,  /* PM_BR_MPRED_CR */
+};
+
+#define C(x)    PERF_COUNT_HW_CACHE_##x
+
+/*
+ * Table of generalized cache-related events.
+ * 0 means not supported, -1 means nonsensical, other values
+ * are event codes.
+ */
+static int power4_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
+        [C(L1D)] = {            /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0x8c10,         0x3c10  },
+                [C(OP_WRITE)] = {       0x7c10,         0xc13   },
+                [C(OP_PREFETCH)] = {    0xc35,          0       },
+        },
+        [C(L1I)] = {            /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0,              0       },
+                [C(OP_WRITE)] = {       -1,             -1      },
+                [C(OP_PREFETCH)] = {    0,              0       },
+        },
+        [C(LL)] = {             /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0,              0       },
+                [C(OP_WRITE)] = {       0,              0       },
+                [C(OP_PREFETCH)] = {    0xc34,          0       },
+        },
+        [C(DTLB)] = {           /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0,              0x904   },
+                [C(OP_WRITE)] = {       -1,             -1      },
+                [C(OP_PREFETCH)] = {    -1,             -1      },
+        },
+        [C(ITLB)] = {           /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0,              0x900   },
+                [C(OP_WRITE)] = {       -1,             -1      },
+                [C(OP_PREFETCH)] = {    -1,             -1      },
+        },
+        [C(BPU)] = {            /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0x330,          0x331   },
+                [C(OP_WRITE)] = {       -1,             -1      },
+                [C(OP_PREFETCH)] = {    -1,             -1      },
+        },
+};
+
+struct power_pmu power4_pmu = {
+        .n_counter = 8,
+        .max_alternatives = 5,
+        .add_fields = 0x0000001100005555ull,
+        .test_adder = 0x0011083300000000ull,
+        .compute_mmcr = p4_compute_mmcr,
+        .get_constraint = p4_get_constraint,
+        .get_alternatives = p4_get_alternatives,
+        .disable_pmc = p4_disable_pmc,
+        .n_generic = ARRAY_SIZE(p4_generic_events),
+        .generic_events = p4_generic_events,
+        .cache_events = &power4_cache_events,
+};
diff --git a/arch/powerpc/kernel/power5+-pmu.c b/arch/powerpc/kernel/power5+-pmu.c
new file mode 100644
index 000000000000..41e5d2d958d4
--- /dev/null
+++ b/arch/powerpc/kernel/power5+-pmu.c
@@ -0,0 +1,671 @@
+/*
+ * Performance counter support for POWER5+/++ (not POWER5) processors.
+ *
+ * Copyright 2009 Paul Mackerras, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <linux/kernel.h>
+#include <linux/perf_counter.h>
+#include <asm/reg.h>
+
+/*
+ * Bits in event code for POWER5+ (POWER5 GS) and POWER5++ (POWER5 GS DD3)
+ */
+#define PM_PMC_SH       20      /* PMC number (1-based) for direct events */
+#define PM_PMC_MSK      0xf
+#define PM_PMC_MSKS     (PM_PMC_MSK << PM_PMC_SH)
+#define PM_UNIT_SH      16      /* TTMMUX number and setting - unit select */
+#define PM_UNIT_MSK     0xf
+#define PM_BYTE_SH      12      /* Byte number of event bus to use */
+#define PM_BYTE_MSK     7
+#define PM_GRS_SH       8       /* Storage subsystem mux select */
+#define PM_GRS_MSK      7
+#define PM_BUSEVENT_MSK 0x80    /* Set if event uses event bus */
+#define PM_PMCSEL_MSK   0x7f
+
+/* Values in PM_UNIT field */
+#define PM_FPU          0
+#define PM_ISU0         1
+#define PM_IFU          2
+#define PM_ISU1         3
+#define PM_IDU          4
+#define PM_ISU0_ALT     6
+#define PM_GRS          7
+#define PM_LSU0         8
+#define PM_LSU1         0xc
+#define PM_LASTUNIT     0xc
+
+/*
+ * Bits in MMCR1 for POWER5+
+ */
+#define MMCR1_TTM0SEL_SH        62
+#define MMCR1_TTM1SEL_SH        60
+#define MMCR1_TTM2SEL_SH        58
+#define MMCR1_TTM3SEL_SH        56
+#define MMCR1_TTMSEL_MSK        3
+#define MMCR1_TD_CP_DBG0SEL_SH  54
+#define MMCR1_TD_CP_DBG1SEL_SH  52
+#define MMCR1_TD_CP_DBG2SEL_SH  50
+#define MMCR1_TD_CP_DBG3SEL_SH  48
+#define MMCR1_GRS_L2SEL_SH      46
+#define MMCR1_GRS_L2SEL_MSK     3
+#define MMCR1_GRS_L3SEL_SH      44
+#define MMCR1_GRS_L3SEL_MSK     3
+#define MMCR1_GRS_MCSEL_SH      41
+#define MMCR1_GRS_MCSEL_MSK     7
+#define MMCR1_GRS_FABSEL_SH     39
+#define MMCR1_GRS_FABSEL_MSK    3
+#define MMCR1_PMC1_ADDER_SEL_SH 35
+#define MMCR1_PMC2_ADDER_SEL_SH 34
+#define MMCR1_PMC3_ADDER_SEL_SH 33
+#define MMCR1_PMC4_ADDER_SEL_SH 32
+#define MMCR1_PMC1SEL_SH        25
+#define MMCR1_PMC2SEL_SH        17
+#define MMCR1_PMC3SEL_SH        9
+#define MMCR1_PMC4SEL_SH        1
+#define MMCR1_PMCSEL_SH(n)      (MMCR1_PMC1SEL_SH - (n) * 8)
+#define MMCR1_PMCSEL_MSK        0x7f
+
+/*
+ * Bits in MMCRA
+ */
+
+/*
+ * Layout of constraint bits:
+ * 6666555555555544444444443333333333222222222211111111110000000000
+ * 3210987654321098765432109876543210987654321098765432109876543210
+ *             [  ><><>< ><> <><>[  >  <  ><  ><  ><  ><><><><><><>
+ *             NC  G0G1G2 G3 T0T1 UC    B0  B1  B2  B3 P6P5P4P3P2P1
+ *
+ * NC - number of counters
+ *     51: NC error 0x0008_0000_0000_0000
+ *     48-50: number of events needing PMC1-4 0x0007_0000_0000_0000
+ *
+ * G0..G3 - GRS mux constraints
+ *     46-47: GRS_L2SEL value
+ *     44-45: GRS_L3SEL value
+ *     41-44: GRS_MCSEL value
+ *     39-40: GRS_FABSEL value
+ *      Note that these match up with their bit positions in MMCR1
+ *
+ * T0 - TTM0 constraint
+ *     36-37: TTM0SEL value (0=FPU, 2=IFU, 3=ISU1) 0x30_0000_0000
+ *
+ * T1 - TTM1 constraint
+ *     34-35: TTM1SEL value (0=IDU, 3=GRS) 0x0c_0000_0000
+ *
+ * UC - unit constraint: can't have all three of FPU|IFU|ISU1, ISU0, IDU|GRS
+ *     33: UC3 error 0x02_0000_0000
+ *     32: FPU|IFU|ISU1 events needed 0x01_0000_0000
+ *     31: ISU0 events needed 0x01_8000_0000
+ *     30: IDU|GRS events needed 0x00_4000_0000
+ *
+ * B0
+ *     24-27: Byte 0 event source 0x0f00_0000
+ *            Encoding as for the event code
+ *
+ * B1, B2, B3
+ *     20-23, 16-19, 12-15: Byte 1, 2, 3 event sources
+ *
+ * P6
+ *     11: P6 error 0x800
+ *     10-11: Count of events needing PMC6
+ *
+ * P1..P5
+ *     0-9: Count of events needing PMC1..PMC5
+ */
+
+static const int grsel_shift[8] = {
+        MMCR1_GRS_L2SEL_SH, MMCR1_GRS_L2SEL_SH, MMCR1_GRS_L2SEL_SH,
+        MMCR1_GRS_L3SEL_SH, MMCR1_GRS_L3SEL_SH, MMCR1_GRS_L3SEL_SH,
+        MMCR1_GRS_MCSEL_SH, MMCR1_GRS_FABSEL_SH
+};
+
+/* Masks and values for using events from the various units */
+static u64 unit_cons[PM_LASTUNIT+1][2] = {
+        [PM_FPU] =   { 0x3200000000ull, 0x0100000000ull },
+        [PM_ISU0] =  { 0x0200000000ull, 0x0080000000ull },
+        [PM_ISU1] =  { 0x3200000000ull, 0x3100000000ull },
+        [PM_IFU] =   { 0x3200000000ull, 0x2100000000ull },
+        [PM_IDU] =   { 0x0e00000000ull, 0x0040000000ull },
+        [PM_GRS] =   { 0x0e00000000ull, 0x0c40000000ull },
+};
+
+static int power5p_get_constraint(u64 event, u64 *maskp, u64 *valp)
+{
+        int pmc, byte, unit, sh;
+        int bit, fmask;
+        u64 mask = 0, value = 0;
+
+        pmc = (event >> PM_PMC_SH) & PM_PMC_MSK;
+        if (pmc) {
+                if (pmc > 6)
+                        return -1;
+                sh = (pmc - 1) * 2;
+                mask |= 2 << sh;
+                value |= 1 << sh;
+                if (pmc >= 5 && !(event == 0x500009 || event == 0x600005))
+                        return -1;
+        }
+        if (event & PM_BUSEVENT_MSK) {
+                unit = (event >> PM_UNIT_SH) & PM_UNIT_MSK;
+                if (unit > PM_LASTUNIT)
+                        return -1;
+                if (unit == PM_ISU0_ALT)
+                        unit = PM_ISU0;
+                mask |= unit_cons[unit][0];
+                value |= unit_cons[unit][1];
+                byte = (event >> PM_BYTE_SH) & PM_BYTE_MSK;
+                if (byte >= 4) {
+                        if (unit != PM_LSU1)
+                                return -1;
+                        /* Map LSU1 low word (bytes 4-7) to unit LSU1+1 */
+                        ++unit;
+                        byte &= 3;
+                }
+                if (unit == PM_GRS) {
+                        bit = event & 7;
+                        fmask = (bit == 6)? 7: 3;
+                        sh = grsel_shift[bit];
+                        mask |= (u64)fmask << sh;
+                        value |= (u64)((event >> PM_GRS_SH) & fmask) << sh;
+                }
+                /* Set byte lane select field */
+                mask  |= 0xfULL << (24 - 4 * byte);
+                value |= (u64)unit << (24 - 4 * byte);
+        }
+        if (pmc < 5) {
+                /* need a counter from PMC1-4 set */
+                mask  |= 0x8000000000000ull;
+                value |= 0x1000000000000ull;
+        }
+        *maskp = mask;
+        *valp = value;
+        return 0;
+}
+
+static int power5p_limited_pmc_event(u64 event)
+{
+        int pmc = (event >> PM_PMC_SH) & PM_PMC_MSK;
+
+        return pmc == 5 || pmc == 6;
+}
+
+#define MAX_ALT 3       /* at most 3 alternatives for any event */
+
+static const unsigned int event_alternatives[][MAX_ALT] = {
+        { 0x100c0,  0x40001f },                 /* PM_GCT_FULL_CYC */
+        { 0x120e4,  0x400002 },                 /* PM_GRP_DISP_REJECT */
+        { 0x230e2,  0x323087 },                 /* PM_BR_PRED_CR */
+        { 0x230e3,  0x223087, 0x3230a0 },       /* PM_BR_PRED_TA */
+        { 0x410c7,  0x441084 },                 /* PM_THRD_L2MISS_BOTH_CYC */
+        { 0x800c4,  0xc20e0 },                  /* PM_DTLB_MISS */
+        { 0xc50c6,  0xc60e0 },                  /* PM_MRK_DTLB_MISS */
+        { 0x100005, 0x600005 },                 /* PM_RUN_CYC */
+        { 0x100009, 0x200009 },                 /* PM_INST_CMPL */
+        { 0x200015, 0x300015 },                 /* PM_LSU_LMQ_SRQ_EMPTY_CYC */
+        { 0x300009, 0x400009 },                 /* PM_INST_DISP */
+};
+
+/*
+ * Scan the alternatives table for a match and return the
+ * index into the alternatives table if found, else -1.
+ */
+static int find_alternative(unsigned int event)
+{
+        int i, j;
+
+        for (i = 0; i < ARRAY_SIZE(event_alternatives); ++i) {
+                if (event < event_alternatives[i][0])
+                        break;
+                for (j = 0; j < MAX_ALT && event_alternatives[i][j]; ++j)
+                        if (event == event_alternatives[i][j])
+                                return i;
+        }
+        return -1;
+}
+
+static const unsigned char bytedecode_alternatives[4][4] = {
+        /* PMC 1 */     { 0x21, 0x23, 0x25, 0x27 },
+        /* PMC 2 */     { 0x07, 0x17, 0x0e, 0x1e },
+        /* PMC 3 */     { 0x20, 0x22, 0x24, 0x26 },
+        /* PMC 4 */     { 0x07, 0x17, 0x0e, 0x1e }
+};
+
+/*
+ * Some direct events for decodes of event bus byte 3 have alternative
+ * PMCSEL values on other counters.  This returns the alternative
+ * event code for those that do, or -1 otherwise.  This also handles
+ * alternative PCMSEL values for add events.
+ */
+static s64 find_alternative_bdecode(u64 event)
+{
+        int pmc, altpmc, pp, j;
+
+        pmc = (event >> PM_PMC_SH) & PM_PMC_MSK;
+        if (pmc == 0 || pmc > 4)
+                return -1;
+        altpmc = 5 - pmc;       /* 1 <-> 4, 2 <-> 3 */
+        pp = event & PM_PMCSEL_MSK;
+        for (j = 0; j < 4; ++j) {
+                if (bytedecode_alternatives[pmc - 1][j] == pp) {
+                        return (event & ~(PM_PMC_MSKS | PM_PMCSEL_MSK)) |
+                                (altpmc << PM_PMC_SH) |
+                                bytedecode_alternatives[altpmc - 1][j];
+                }
+        }
+
+        /* new decode alternatives for power5+ */
+        if (pmc == 1 && (pp == 0x0d || pp == 0x0e))
+                return event + (2 << PM_PMC_SH) + (0x2e - 0x0d);
+        if (pmc == 3 && (pp == 0x2e || pp == 0x2f))
+                return event - (2 << PM_PMC_SH) - (0x2e - 0x0d);
+
+        /* alternative add event encodings */
+        if (pp == 0x10 || pp == 0x28)
+                return ((event ^ (0x10 ^ 0x28)) & ~PM_PMC_MSKS) |
+                        (altpmc << PM_PMC_SH);
+
+        return -1;
+}
+
+static int power5p_get_alternatives(u64 event, unsigned int flags, u64 alt[])
+{
+        int i, j, nalt = 1;
+        int nlim;
+        s64 ae;
+
+        alt[0] = event;
+        nalt = 1;
+        nlim = power5p_limited_pmc_event(event);
+        i = find_alternative(event);
+        if (i >= 0) {
+                for (j = 0; j < MAX_ALT; ++j) {
+                        ae = event_alternatives[i][j];
+                        if (ae && ae != event)
+                                alt[nalt++] = ae;
+                        nlim += power5p_limited_pmc_event(ae);
+                }
+        } else {
+                ae = find_alternative_bdecode(event);
+                if (ae > 0)
+                        alt[nalt++] = ae;
+        }
+
+        if (flags & PPMU_ONLY_COUNT_RUN) {
+                /*
+                 * We're only counting in RUN state,
+                 * so PM_CYC is equivalent to PM_RUN_CYC
+                 * and PM_INST_CMPL === PM_RUN_INST_CMPL.
+                 * This doesn't include alternatives that don't provide
+                 * any extra flexibility in assigning PMCs (e.g.
+                 * 0x100005 for PM_RUN_CYC vs. 0xf for PM_CYC).
+                 * Note that even with these additional alternatives
+                 * we never end up with more than 3 alternatives for any event.
+                 */
+                j = nalt;
+                for (i = 0; i < nalt; ++i) {
+                        switch (alt[i]) {
+                        case 0xf:       /* PM_CYC */
+                                alt[j++] = 0x600005;    /* PM_RUN_CYC */
+                                ++nlim;
+                                break;
+                        case 0x600005:  /* PM_RUN_CYC */
+                                alt[j++] = 0xf;
+                                break;
+                        case 0x100009:  /* PM_INST_CMPL */
+                                alt[j++] = 0x500009;    /* PM_RUN_INST_CMPL */
+                                ++nlim;
+                                break;
+                        case 0x500009:  /* PM_RUN_INST_CMPL */
+                                alt[j++] = 0x100009;    /* PM_INST_CMPL */
+                                alt[j++] = 0x200009;
+                                break;
+                        }
+                }
+                nalt = j;
+        }
+
+        if (!(flags & PPMU_LIMITED_PMC_OK) && nlim) {
+                /* remove the limited PMC events */
+                j = 0;
+                for (i = 0; i < nalt; ++i) {
+                        if (!power5p_limited_pmc_event(alt[i])) {
+                                alt[j] = alt[i];
+                                ++j;
+                        }
+                }
+                nalt = j;
+        } else if ((flags & PPMU_LIMITED_PMC_REQD) && nlim < nalt) {
+                /* remove all but the limited PMC events */
+                j = 0;
+                for (i = 0; i < nalt; ++i) {
+                        if (power5p_limited_pmc_event(alt[i])) {
+                                alt[j] = alt[i];
+                                ++j;
+                        }
+                }
+                nalt = j;
+        }
+
+        return nalt;
+}
+
+/*
+ * Map of which direct events on which PMCs are marked instruction events.
+ * Indexed by PMCSEL value, bit i (LE) set if PMC i is a marked event.
+ * Bit 0 is set if it is marked for all PMCs.
+ * The 0x80 bit indicates a byte decode PMCSEL value.
+ */
+static unsigned char direct_event_is_marked[0x28] = {
+        0,      /* 00 */
+        0x1f,   /* 01 PM_IOPS_CMPL */
+        0x2,    /* 02 PM_MRK_GRP_DISP */
+        0xe,    /* 03 PM_MRK_ST_CMPL, PM_MRK_ST_GPS, PM_MRK_ST_CMPL_INT */
+        0,      /* 04 */
+        0x1c,   /* 05 PM_MRK_BRU_FIN, PM_MRK_INST_FIN, PM_MRK_CRU_FIN */
+        0x80,   /* 06 */
+        0x80,   /* 07 */
+        0, 0, 0,/* 08 - 0a */
+        0x18,   /* 0b PM_THRESH_TIMEO, PM_MRK_GRP_TIMEO */
+        0,      /* 0c */
+        0x80,   /* 0d */
+        0x80,   /* 0e */
+        0,      /* 0f */
+        0,      /* 10 */
+        0x14,   /* 11 PM_MRK_GRP_BR_REDIR, PM_MRK_GRP_IC_MISS */
+        0,      /* 12 */
+        0x10,   /* 13 PM_MRK_GRP_CMPL */
+        0x1f,   /* 14 PM_GRP_MRK, PM_MRK_{FXU,FPU,LSU}_FIN */
+        0x2,    /* 15 PM_MRK_GRP_ISSUED */
+        0x80,   /* 16 */
+        0x80,   /* 17 */
+        0, 0, 0, 0, 0,
+        0x80,   /* 1d */
+        0x80,   /* 1e */
+        0,      /* 1f */
+        0x80,   /* 20 */
+        0x80,   /* 21 */
+        0x80,   /* 22 */
+        0x80,   /* 23 */
+        0x80,   /* 24 */
+        0x80,   /* 25 */
+        0x80,   /* 26 */
+        0x80,   /* 27 */
+};
+
+/*
+ * Returns 1 if event counts things relating to marked instructions
+ * and thus needs the MMCRA_SAMPLE_ENABLE bit set, or 0 if not.
+ */
+static int power5p_marked_instr_event(u64 event)
+{
+        int pmc, psel;
+        int bit, byte, unit;
+        u32 mask;
+
+        pmc = (event >> PM_PMC_SH) & PM_PMC_MSK;
+        psel = event & PM_PMCSEL_MSK;
+        if (pmc >= 5)
+                return 0;
+
+        bit = -1;
+        if (psel < sizeof(direct_event_is_marked)) {
+                if (direct_event_is_marked[psel] & (1 << pmc))
+                        return 1;
+                if (direct_event_is_marked[psel] & 0x80)
+                        bit = 4;
+                else if (psel == 0x08)
+                        bit = pmc - 1;
+                else if (psel == 0x10)
+                        bit = 4 - pmc;
+                else if (psel == 0x1b && (pmc == 1 || pmc == 3))
+                        bit = 4;
+        } else if ((psel & 0x48) == 0x40) {
+                bit = psel & 7;
+        } else if (psel == 0x28) {
+                bit = pmc - 1;
+        } else if (pmc == 3 && (psel == 0x2e || psel == 0x2f)) {
+                bit = 4;
+        }
+
+        if (!(event & PM_BUSEVENT_MSK) || bit == -1)
+                return 0;
+
+        byte = (event >> PM_BYTE_SH) & PM_BYTE_MSK;
+        unit = (event >> PM_UNIT_SH) & PM_UNIT_MSK;
+        if (unit == PM_LSU0) {
+                /* byte 1 bits 0-7, byte 2 bits 0,2-4,6 */
+                mask = 0x5dff00;
+        } else if (unit == PM_LSU1 && byte >= 4) {
+                byte -= 4;
+                /* byte 5 bits 6-7, byte 6 bits 0,4, byte 7 bits 0-4,6 */
+                mask = 0x5f11c000;
+        } else
+                return 0;
+
+        return (mask >> (byte * 8 + bit)) & 1;
+}
+
+static int power5p_compute_mmcr(u64 event[], int n_ev,
+                                unsigned int hwc[], u64 mmcr[])
+{
+        u64 mmcr1 = 0;
+        u64 mmcra = 0;
+        unsigned int pmc, unit, byte, psel;
+        unsigned int ttm;
+        int i, isbus, bit, grsel;
+        unsigned int pmc_inuse = 0;
+        unsigned char busbyte[4];
+        unsigned char unituse[16];
+        int ttmuse;
+
+        if (n_ev > 6)
+                return -1;
+
+        /* First pass to count resource use */
+        memset(busbyte, 0, sizeof(busbyte));
+        memset(unituse, 0, sizeof(unituse));
+        for (i = 0; i < n_ev; ++i) {
+                pmc = (event[i] >> PM_PMC_SH) & PM_PMC_MSK;
+                if (pmc) {
+                        if (pmc > 6)
+                                return -1;
+                        if (pmc_inuse & (1 << (pmc - 1)))
+                                return -1;
+                        pmc_inuse |= 1 << (pmc - 1);
+                }
+                if (event[i] & PM_BUSEVENT_MSK) {
+                        unit = (event[i] >> PM_UNIT_SH) & PM_UNIT_MSK;
+                        byte = (event[i] >> PM_BYTE_SH) & PM_BYTE_MSK;
+                        if (unit > PM_LASTUNIT)
+                                return -1;
+                        if (unit == PM_ISU0_ALT)
+                                unit = PM_ISU0;
+                        if (byte >= 4) {
+                                if (unit != PM_LSU1)
+                                        return -1;
+                                ++unit;
+                                byte &= 3;
+                        }
+                        if (busbyte[byte] && busbyte[byte] != unit)
+                                return -1;
+                        busbyte[byte] = unit;
+                        unituse[unit] = 1;
+                }
+        }
+
+        /*
+         * Assign resources and set multiplexer selects.
+         *
+         * PM_ISU0 can go either on TTM0 or TTM1, but that's the only
+         * choice we have to deal with.
+         */
+        if (unituse[PM_ISU0] &
+            (unituse[PM_FPU] | unituse[PM_IFU] | unituse[PM_ISU1])) {
+                unituse[PM_ISU0_ALT] = 1;       /* move ISU to TTM1 */
+                unituse[PM_ISU0] = 0;
+        }
+        /* Set TTM[01]SEL fields. */
+        ttmuse = 0;
+        for (i = PM_FPU; i <= PM_ISU1; ++i) {
+                if (!unituse[i])
+                        continue;
+                if (ttmuse++)
+                        return -1;
+                mmcr1 |= (u64)i << MMCR1_TTM0SEL_SH;
+        }
+        ttmuse = 0;
+        for (; i <= PM_GRS; ++i) {
+                if (!unituse[i])
+                        continue;
+                if (ttmuse++)
+                        return -1;
+                mmcr1 |= (u64)(i & 3) << MMCR1_TTM1SEL_SH;
+        }
+        if (ttmuse > 1)
+                return -1;
+
+        /* Set byte lane select fields, TTM[23]SEL and GRS_*SEL. */
+        for (byte = 0; byte < 4; ++byte) {
+                unit = busbyte[byte];
+                if (!unit)
+                        continue;
+                if (unit == PM_ISU0 && unituse[PM_ISU0_ALT]) {
+                        /* get ISU0 through TTM1 rather than TTM0 */
+                        unit = PM_ISU0_ALT;
+                } else if (unit == PM_LSU1 + 1) {
+                        /* select lower word of LSU1 for this byte */
+                        mmcr1 |= 1ull << (MMCR1_TTM3SEL_SH + 3 - byte);
+                }
+                ttm = unit >> 2;
+                mmcr1 |= (u64)ttm << (MMCR1_TD_CP_DBG0SEL_SH - 2 * byte);
+        }
+
+        /* Second pass: assign PMCs, set PMCxSEL and PMCx_ADDER_SEL fields */
+        for (i = 0; i < n_ev; ++i) {
+                pmc = (event[i] >> PM_PMC_SH) & PM_PMC_MSK;
+                unit = (event[i] >> PM_UNIT_SH) & PM_UNIT_MSK;
+                byte = (event[i] >> PM_BYTE_SH) & PM_BYTE_MSK;
+                psel = event[i] & PM_PMCSEL_MSK;
+                isbus = event[i] & PM_BUSEVENT_MSK;
+                if (!pmc) {
+                        /* Bus event or any-PMC direct event */
+                        for (pmc = 0; pmc < 4; ++pmc) {
+                                if (!(pmc_inuse & (1 << pmc)))
+                                        break;
+                        }
+                        if (pmc >= 4)
+                                return -1;
+                        pmc_inuse |= 1 << pmc;
+                } else if (pmc <= 4) {
+                        /* Direct event */
+                        --pmc;
+                        if (isbus && (byte & 2) &&
+                            (psel == 8 || psel == 0x10 || psel == 0x28))
+                                /* add events on higher-numbered bus */
+                                mmcr1 |= 1ull << (MMCR1_PMC1_ADDER_SEL_SH - pmc);
+                } else {
+                        /* Instructions or run cycles on PMC5/6 */
+                        --pmc;
+                }
+                if (isbus && unit == PM_GRS) {
+                        bit = psel & 7;
+                        grsel = (event[i] >> PM_GRS_SH) & PM_GRS_MSK;
+                        mmcr1 |= (u64)grsel << grsel_shift[bit];
+                }
+                if (power5p_marked_instr_event(event[i]))
+                        mmcra |= MMCRA_SAMPLE_ENABLE;
+                if ((psel & 0x58) == 0x40 && (byte & 1) != ((pmc >> 1) & 1))
+                        /* select alternate byte lane */
+                        psel |= 0x10;
+                if (pmc <= 3)
+                        mmcr1 |= psel << MMCR1_PMCSEL_SH(pmc);
+                hwc[i] = pmc;
+        }
+
+        /* Return MMCRx values */
+        mmcr[0] = 0;
+        if (pmc_inuse & 1)
+                mmcr[0] = MMCR0_PMC1CE;
+        if (pmc_inuse & 0x3e)
+                mmcr[0] |= MMCR0_PMCjCE;
+        mmcr[1] = mmcr1;
+        mmcr[2] = mmcra;
+        return 0;
+}
+
+static void power5p_disable_pmc(unsigned int pmc, u64 mmcr[])
+{
+        if (pmc <= 3)
+                mmcr[1] &= ~(0x7fUL << MMCR1_PMCSEL_SH(pmc));
+}
+
+static int power5p_generic_events[] = {
+        [PERF_COUNT_HW_CPU_CYCLES]              = 0xf,
+        [PERF_COUNT_HW_INSTRUCTIONS]            = 0x100009,
+        [PERF_COUNT_HW_CACHE_REFERENCES]        = 0x1c10a8, /* LD_REF_L1 */
+        [PERF_COUNT_HW_CACHE_MISSES]            = 0x3c1088, /* LD_MISS_L1 */
+        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS]     = 0x230e4,  /* BR_ISSUED */
+        [PERF_COUNT_HW_BRANCH_MISSES]           = 0x230e5,  /* BR_MPRED_CR */
+};
+
+#define C(x)    PERF_COUNT_HW_CACHE_##x
+
+/*
+ * Table of generalized cache-related events.
+ * 0 means not supported, -1 means nonsensical, other values
+ * are event codes.
+ */
+static int power5p_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
+        [C(L1D)] = {            /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0x1c10a8,       0x3c1088        },
+                [C(OP_WRITE)] = {       0x2c10a8,       0xc10c3         },
+                [C(OP_PREFETCH)] = {    0xc70e7,        -1              },
+        },
+        [C(L1I)] = {            /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0,              0               },
+                [C(OP_WRITE)] = {       -1,             -1              },
+                [C(OP_PREFETCH)] = {    0,              0               },
+        },
+        [C(LL)] = {             /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0,              0               },
+                [C(OP_WRITE)] = {       0,              0               },
+                [C(OP_PREFETCH)] = {    0xc50c3,        0               },
+        },
+        [C(DTLB)] = {           /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0xc20e4,        0x800c4         },
+                [C(OP_WRITE)] = {       -1,             -1              },
+                [C(OP_PREFETCH)] = {    -1,             -1              },
+        },
+        [C(ITLB)] = {           /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0,              0x800c0         },
+                [C(OP_WRITE)] = {       -1,             -1              },
+                [C(OP_PREFETCH)] = {    -1,             -1              },
+        },
+        [C(BPU)] = {            /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0x230e4,        0x230e5         },
+                [C(OP_WRITE)] = {       -1,             -1              },
+                [C(OP_PREFETCH)] = {    -1,             -1              },
+        },
+};
+
+struct power_pmu power5p_pmu = {
+        .n_counter = 6,
+        .max_alternatives = MAX_ALT,
+        .add_fields = 0x7000000000055ull,
+        .test_adder = 0x3000040000000ull,
+        .compute_mmcr = power5p_compute_mmcr,
+        .get_constraint = power5p_get_constraint,
+        .get_alternatives = power5p_get_alternatives,
+        .disable_pmc = power5p_disable_pmc,
+        .limited_pmc_event = power5p_limited_pmc_event,
+        .flags = PPMU_LIMITED_PMC5_6,
+        .n_generic = ARRAY_SIZE(power5p_generic_events),
+        .generic_events = power5p_generic_events,
+        .cache_events = &power5p_cache_events,
+};
diff --git a/arch/powerpc/kernel/power5-pmu.c b/arch/powerpc/kernel/power5-pmu.c
new file mode 100644
index 000000000000..05600b66221a
--- /dev/null
+++ b/arch/powerpc/kernel/power5-pmu.c
@@ -0,0 +1,611 @@
+/*
+ * Performance counter support for POWER5 (not POWER5++) processors.
+ *
+ * Copyright 2009 Paul Mackerras, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <linux/kernel.h>
+#include <linux/perf_counter.h>
+#include <asm/reg.h>
+
+/*
+ * Bits in event code for POWER5 (not POWER5++)
+ */
+#define PM_PMC_SH       20      /* PMC number (1-based) for direct events */
+#define PM_PMC_MSK      0xf
+#define PM_PMC_MSKS     (PM_PMC_MSK << PM_PMC_SH)
+#define PM_UNIT_SH      16      /* TTMMUX number and setting - unit select */
+#define PM_UNIT_MSK     0xf
+#define PM_BYTE_SH      12      /* Byte number of event bus to use */
+#define PM_BYTE_MSK     7
+#define PM_GRS_SH       8       /* Storage subsystem mux select */
+#define PM_GRS_MSK      7
+#define PM_BUSEVENT_MSK 0x80    /* Set if event uses event bus */
+#define PM_PMCSEL_MSK   0x7f
+
+/* Values in PM_UNIT field */
+#define PM_FPU          0
+#define PM_ISU0         1
+#define PM_IFU          2
+#define PM_ISU1         3
+#define PM_IDU          4
+#define PM_ISU0_ALT     6
+#define PM_GRS          7
+#define PM_LSU0         8
+#define PM_LSU1         0xc
+#define PM_LASTUNIT     0xc
+
+/*
+ * Bits in MMCR1 for POWER5
+ */
+#define MMCR1_TTM0SEL_SH        62
+#define MMCR1_TTM1SEL_SH        60
+#define MMCR1_TTM2SEL_SH        58
+#define MMCR1_TTM3SEL_SH        56
+#define MMCR1_TTMSEL_MSK        3
+#define MMCR1_TD_CP_DBG0SEL_SH  54
+#define MMCR1_TD_CP_DBG1SEL_SH  52
+#define MMCR1_TD_CP_DBG2SEL_SH  50
+#define MMCR1_TD_CP_DBG3SEL_SH  48
+#define MMCR1_GRS_L2SEL_SH      46
+#define MMCR1_GRS_L2SEL_MSK     3
+#define MMCR1_GRS_L3SEL_SH      44
+#define MMCR1_GRS_L3SEL_MSK     3
+#define MMCR1_GRS_MCSEL_SH      41
+#define MMCR1_GRS_MCSEL_MSK     7
+#define MMCR1_GRS_FABSEL_SH     39
+#define MMCR1_GRS_FABSEL_MSK    3
+#define MMCR1_PMC1_ADDER_SEL_SH 35
+#define MMCR1_PMC2_ADDER_SEL_SH 34
+#define MMCR1_PMC3_ADDER_SEL_SH 33
+#define MMCR1_PMC4_ADDER_SEL_SH 32
+#define MMCR1_PMC1SEL_SH        25
+#define MMCR1_PMC2SEL_SH        17
+#define MMCR1_PMC3SEL_SH        9
+#define MMCR1_PMC4SEL_SH        1
+#define MMCR1_PMCSEL_SH(n)      (MMCR1_PMC1SEL_SH - (n) * 8)
+#define MMCR1_PMCSEL_MSK        0x7f
+
+/*
+ * Bits in MMCRA
+ */
+
+/*
+ * Layout of constraint bits:
+ * 6666555555555544444444443333333333222222222211111111110000000000
+ * 3210987654321098765432109876543210987654321098765432109876543210
+ *         <><>[  ><><>< ><> [  >[ >[ ><  ><  ><  ><  ><><><><><><>
+ *         T0T1 NC G0G1G2 G3  UC PS1PS2 B0  B1  B2  B3 P6P5P4P3P2P1
+ *
+ * T0 - TTM0 constraint
+ *     54-55: TTM0SEL value (0=FPU, 2=IFU, 3=ISU1) 0xc0_0000_0000_0000
+ *
+ * T1 - TTM1 constraint
+ *     52-53: TTM1SEL value (0=IDU, 3=GRS) 0x30_0000_0000_0000
+ *
+ * NC - number of counters
+ *     51: NC error 0x0008_0000_0000_0000
+ *     48-50: number of events needing PMC1-4 0x0007_0000_0000_0000
+ *
+ * G0..G3 - GRS mux constraints
+ *     46-47: GRS_L2SEL value
+ *     44-45: GRS_L3SEL value
+ *     41-44: GRS_MCSEL value
+ *     39-40: GRS_FABSEL value
+ *      Note that these match up with their bit positions in MMCR1
+ *
+ * UC - unit constraint: can't have all three of FPU|IFU|ISU1, ISU0, IDU|GRS
+ *     37: UC3 error 0x20_0000_0000
+ *     36: FPU|IFU|ISU1 events needed 0x10_0000_0000
+ *     35: ISU0 events needed 0x08_0000_0000
+ *     34: IDU|GRS events needed 0x04_0000_0000
+ *
+ * PS1
+ *     33: PS1 error 0x2_0000_0000
+ *     31-32: count of events needing PMC1/2 0x1_8000_0000
+ *
+ * PS2
+ *     30: PS2 error 0x4000_0000
+ *     28-29: count of events needing PMC3/4 0x3000_0000
+ *
+ * B0
+ *     24-27: Byte 0 event source 0x0f00_0000
+ *            Encoding as for the event code
+ *
+ * B1, B2, B3
+ *     20-23, 16-19, 12-15: Byte 1, 2, 3 event sources
+ *
+ * P1..P6
+ *     0-11: Count of events needing PMC1..PMC6
+ */
+
+static const int grsel_shift[8] = {
+        MMCR1_GRS_L2SEL_SH, MMCR1_GRS_L2SEL_SH, MMCR1_GRS_L2SEL_SH,
+        MMCR1_GRS_L3SEL_SH, MMCR1_GRS_L3SEL_SH, MMCR1_GRS_L3SEL_SH,
+        MMCR1_GRS_MCSEL_SH, MMCR1_GRS_FABSEL_SH
+};
+
+/* Masks and values for using events from the various units */
+static u64 unit_cons[PM_LASTUNIT+1][2] = {
+        [PM_FPU] =   { 0xc0002000000000ull, 0x00001000000000ull },
+        [PM_ISU0] =  { 0x00002000000000ull, 0x00000800000000ull },
+        [PM_ISU1] =  { 0xc0002000000000ull, 0xc0001000000000ull },
+        [PM_IFU] =   { 0xc0002000000000ull, 0x80001000000000ull },
+        [PM_IDU] =   { 0x30002000000000ull, 0x00000400000000ull },
+        [PM_GRS] =   { 0x30002000000000ull, 0x30000400000000ull },
+};
+
+static int power5_get_constraint(u64 event, u64 *maskp, u64 *valp)
+{
+        int pmc, byte, unit, sh;
+        int bit, fmask;
+        u64 mask = 0, value = 0;
+        int grp = -1;
+
+        pmc = (event >> PM_PMC_SH) & PM_PMC_MSK;
+        if (pmc) {
+                if (pmc > 6)
+                        return -1;
+                sh = (pmc - 1) * 2;
+                mask |= 2 << sh;
+                value |= 1 << sh;
+                if (pmc <= 4)
+                        grp = (pmc - 1) >> 1;
+                else if (event != 0x500009 && event != 0x600005)
+                        return -1;
+        }
+        if (event & PM_BUSEVENT_MSK) {
+                unit = (event >> PM_UNIT_SH) & PM_UNIT_MSK;
+                if (unit > PM_LASTUNIT)
+                        return -1;
+                if (unit == PM_ISU0_ALT)
+                        unit = PM_ISU0;
+                mask |= unit_cons[unit][0];
+                value |= unit_cons[unit][1];
+                byte = (event >> PM_BYTE_SH) & PM_BYTE_MSK;
+                if (byte >= 4) {
+                        if (unit != PM_LSU1)
+                                return -1;
+                        /* Map LSU1 low word (bytes 4-7) to unit LSU1+1 */
+                        ++unit;
+                        byte &= 3;
+                }
+                if (unit == PM_GRS) {
+                        bit = event & 7;
+                        fmask = (bit == 6)? 7: 3;
+                        sh = grsel_shift[bit];
+                        mask |= (u64)fmask << sh;
+                        value |= (u64)((event >> PM_GRS_SH) & fmask) << sh;
+                }
+                /*
+                 * Bus events on bytes 0 and 2 can be counted
+                 * on PMC1/2; bytes 1 and 3 on PMC3/4.
+                 */
+                if (!pmc)
+                        grp = byte & 1;
+                /* Set byte lane select field */
+                mask  |= 0xfULL << (24 - 4 * byte);
+                value |= (u64)unit << (24 - 4 * byte);
+        }
+        if (grp == 0) {
+                /* increment PMC1/2 field */
+                mask  |= 0x200000000ull;
+                value |= 0x080000000ull;
+        } else if (grp == 1) {
+                /* increment PMC3/4 field */
+                mask  |= 0x40000000ull;
+                value |= 0x10000000ull;
+        }
+        if (pmc < 5) {
+                /* need a counter from PMC1-4 set */
+                mask  |= 0x8000000000000ull;
+                value |= 0x1000000000000ull;
+        }
+        *maskp = mask;
+        *valp = value;
+        return 0;
+}
+
+#define MAX_ALT 3       /* at most 3 alternatives for any event */
+
+static const unsigned int event_alternatives[][MAX_ALT] = {
+        { 0x120e4,  0x400002 },                 /* PM_GRP_DISP_REJECT */
+        { 0x410c7,  0x441084 },                 /* PM_THRD_L2MISS_BOTH_CYC */
+        { 0x100005, 0x600005 },                 /* PM_RUN_CYC */
+        { 0x100009, 0x200009, 0x500009 },       /* PM_INST_CMPL */
+        { 0x300009, 0x400009 },                 /* PM_INST_DISP */
+};
+
+/*
+ * Scan the alternatives table for a match and return the
+ * index into the alternatives table if found, else -1.
+ */
+static int find_alternative(u64 event)
+{
+        int i, j;
+
+        for (i = 0; i < ARRAY_SIZE(event_alternatives); ++i) {
+                if (event < event_alternatives[i][0])
+                        break;
+                for (j = 0; j < MAX_ALT && event_alternatives[i][j]; ++j)
+                        if (event == event_alternatives[i][j])
+                                return i;
+        }
+        return -1;
+}
+
+static const unsigned char bytedecode_alternatives[4][4] = {
+        /* PMC 1 */     { 0x21, 0x23, 0x25, 0x27 },
+        /* PMC 2 */     { 0x07, 0x17, 0x0e, 0x1e },
+        /* PMC 3 */     { 0x20, 0x22, 0x24, 0x26 },
+        /* PMC 4 */     { 0x07, 0x17, 0x0e, 0x1e }
+};
+
+/*
+ * Some direct events for decodes of event bus byte 3 have alternative
+ * PMCSEL values on other counters.  This returns the alternative
+ * event code for those that do, or -1 otherwise.
+ */
+static s64 find_alternative_bdecode(u64 event)
+{
+        int pmc, altpmc, pp, j;
+
+        pmc = (event >> PM_PMC_SH) & PM_PMC_MSK;
+        if (pmc == 0 || pmc > 4)
+                return -1;
+        altpmc = 5 - pmc;       /* 1 <-> 4, 2 <-> 3 */
+        pp = event & PM_PMCSEL_MSK;
+        for (j = 0; j < 4; ++j) {
+                if (bytedecode_alternatives[pmc - 1][j] == pp) {
+                        return (event & ~(PM_PMC_MSKS | PM_PMCSEL_MSK)) |
+                                (altpmc << PM_PMC_SH) |
+                                bytedecode_alternatives[altpmc - 1][j];
+                }
+        }
+        return -1;
+}
+
+static int power5_get_alternatives(u64 event, unsigned int flags, u64 alt[])
+{
+        int i, j, nalt = 1;
+        s64 ae;
+
+        alt[0] = event;
+        nalt = 1;
+        i = find_alternative(event);
+        if (i >= 0) {
+                for (j = 0; j < MAX_ALT; ++j) {
+                        ae = event_alternatives[i][j];
+                        if (ae && ae != event)
+                                alt[nalt++] = ae;
+                }
+        } else {
+                ae = find_alternative_bdecode(event);
+                if (ae > 0)
+                        alt[nalt++] = ae;
+        }
+        return nalt;
+}
+
+/*
+ * Map of which direct events on which PMCs are marked instruction events.
+ * Indexed by PMCSEL value, bit i (LE) set if PMC i is a marked event.
+ * Bit 0 is set if it is marked for all PMCs.
+ * The 0x80 bit indicates a byte decode PMCSEL value.
+ */
+static unsigned char direct_event_is_marked[0x28] = {
+        0,      /* 00 */
+        0x1f,   /* 01 PM_IOPS_CMPL */
+        0x2,    /* 02 PM_MRK_GRP_DISP */
+        0xe,    /* 03 PM_MRK_ST_CMPL, PM_MRK_ST_GPS, PM_MRK_ST_CMPL_INT */
+        0,      /* 04 */
+        0x1c,   /* 05 PM_MRK_BRU_FIN, PM_MRK_INST_FIN, PM_MRK_CRU_FIN */
+        0x80,   /* 06 */
+        0x80,   /* 07 */
+        0, 0, 0,/* 08 - 0a */
+        0x18,   /* 0b PM_THRESH_TIMEO, PM_MRK_GRP_TIMEO */
+        0,      /* 0c */
+        0x80,   /* 0d */
+        0x80,   /* 0e */
+        0,      /* 0f */
+        0,      /* 10 */
+        0x14,   /* 11 PM_MRK_GRP_BR_REDIR, PM_MRK_GRP_IC_MISS */
+        0,      /* 12 */
+        0x10,   /* 13 PM_MRK_GRP_CMPL */
+        0x1f,   /* 14 PM_GRP_MRK, PM_MRK_{FXU,FPU,LSU}_FIN */
+        0x2,    /* 15 PM_MRK_GRP_ISSUED */
+        0x80,   /* 16 */
+        0x80,   /* 17 */
+        0, 0, 0, 0, 0,
+        0x80,   /* 1d */
+        0x80,   /* 1e */
+        0,      /* 1f */
+        0x80,   /* 20 */
+        0x80,   /* 21 */
+        0x80,   /* 22 */
+        0x80,   /* 23 */
+        0x80,   /* 24 */
+        0x80,   /* 25 */
+        0x80,   /* 26 */
+        0x80,   /* 27 */
+};
+
+/*
+ * Returns 1 if event counts things relating to marked instructions
+ * and thus needs the MMCRA_SAMPLE_ENABLE bit set, or 0 if not.
+ */
+static int power5_marked_instr_event(u64 event)
+{
+        int pmc, psel;
+        int bit, byte, unit;
+        u32 mask;
+
+        pmc = (event >> PM_PMC_SH) & PM_PMC_MSK;
+        psel = event & PM_PMCSEL_MSK;
+        if (pmc >= 5)
+                return 0;
+
+        bit = -1;
+        if (psel < sizeof(direct_event_is_marked)) {
+                if (direct_event_is_marked[psel] & (1 << pmc))
+                        return 1;
+                if (direct_event_is_marked[psel] & 0x80)
+                        bit = 4;
+                else if (psel == 0x08)
+                        bit = pmc - 1;
+                else if (psel == 0x10)
+                        bit = 4 - pmc;
+                else if (psel == 0x1b && (pmc == 1 || pmc == 3))
+                        bit = 4;
+        } else if ((psel & 0x58) == 0x40)
+                bit = psel & 7;
+
+        if (!(event & PM_BUSEVENT_MSK))
+                return 0;
+
+        byte = (event >> PM_BYTE_SH) & PM_BYTE_MSK;
+        unit = (event >> PM_UNIT_SH) & PM_UNIT_MSK;
+        if (unit == PM_LSU0) {
+                /* byte 1 bits 0-7, byte 2 bits 0,2-4,6 */
+                mask = 0x5dff00;
+        } else if (unit == PM_LSU1 && byte >= 4) {
+                byte -= 4;
+                /* byte 4 bits 1,3,5,7, byte 5 bits 6-7, byte 7 bits 0-4,6 */
+                mask = 0x5f00c0aa;
+        } else
+                return 0;
+
+        return (mask >> (byte * 8 + bit)) & 1;
+}
+
+static int power5_compute_mmcr(u64 event[], int n_ev,
+                               unsigned int hwc[], u64 mmcr[])
+{
+        u64 mmcr1 = 0;
+        u64 mmcra = 0;
+        unsigned int pmc, unit, byte, psel;
+        unsigned int ttm, grp;
+        int i, isbus, bit, grsel;
+        unsigned int pmc_inuse = 0;
+        unsigned int pmc_grp_use[2];
+        unsigned char busbyte[4];
+        unsigned char unituse[16];
+        int ttmuse;
+
+        if (n_ev > 6)
+                return -1;
+
+        /* First pass to count resource use */
+        pmc_grp_use[0] = pmc_grp_use[1] = 0;
+        memset(busbyte, 0, sizeof(busbyte));
+        memset(unituse, 0, sizeof(unituse));
+        for (i = 0; i < n_ev; ++i) {
+                pmc = (event[i] >> PM_PMC_SH) & PM_PMC_MSK;
+                if (pmc) {
+                        if (pmc > 6)
+                                return -1;
+                        if (pmc_inuse & (1 << (pmc - 1)))
+                                return -1;
+                        pmc_inuse |= 1 << (pmc - 1);
+                        /* count 1/2 vs 3/4 use */
+                        if (pmc <= 4)
+                                ++pmc_grp_use[(pmc - 1) >> 1];
+                }
+                if (event[i] & PM_BUSEVENT_MSK) {
+                        unit = (event[i] >> PM_UNIT_SH) & PM_UNIT_MSK;
+                        byte = (event[i] >> PM_BYTE_SH) & PM_BYTE_MSK;
+                        if (unit > PM_LASTUNIT)
+                                return -1;
+                        if (unit == PM_ISU0_ALT)
+                                unit = PM_ISU0;
+                        if (byte >= 4) {
+                                if (unit != PM_LSU1)
+                                        return -1;
+                                ++unit;
+                                byte &= 3;
+                        }
+                        if (!pmc)
+                                ++pmc_grp_use[byte & 1];
+                        if (busbyte[byte] && busbyte[byte] != unit)
+                                return -1;
+                        busbyte[byte] = unit;
+                        unituse[unit] = 1;
+                }
+        }
+        if (pmc_grp_use[0] > 2 || pmc_grp_use[1] > 2)
+                return -1;
+
+        /*
+         * Assign resources and set multiplexer selects.
+         *
+         * PM_ISU0 can go either on TTM0 or TTM1, but that's the only
+         * choice we have to deal with.
+         */
+        if (unituse[PM_ISU0] &
+            (unituse[PM_FPU] | unituse[PM_IFU] | unituse[PM_ISU1])) {
+                unituse[PM_ISU0_ALT] = 1;       /* move ISU to TTM1 */
+                unituse[PM_ISU0] = 0;
+        }
+        /* Set TTM[01]SEL fields. */
+        ttmuse = 0;
+        for (i = PM_FPU; i <= PM_ISU1; ++i) {
+                if (!unituse[i])
+                        continue;
+                if (ttmuse++)
+                        return -1;
+                mmcr1 |= (u64)i << MMCR1_TTM0SEL_SH;
+        }
+        ttmuse = 0;
+        for (; i <= PM_GRS; ++i) {
+                if (!unituse[i])
+                        continue;
+                if (ttmuse++)
+                        return -1;
+                mmcr1 |= (u64)(i & 3) << MMCR1_TTM1SEL_SH;
+        }
+        if (ttmuse > 1)
+                return -1;
+
+        /* Set byte lane select fields, TTM[23]SEL and GRS_*SEL. */
+        for (byte = 0; byte < 4; ++byte) {
+                unit = busbyte[byte];
+                if (!unit)
+                        continue;
+                if (unit == PM_ISU0 && unituse[PM_ISU0_ALT]) {
+                        /* get ISU0 through TTM1 rather than TTM0 */
+                        unit = PM_ISU0_ALT;
+                } else if (unit == PM_LSU1 + 1) {
+                        /* select lower word of LSU1 for this byte */
+                        mmcr1 |= 1ull << (MMCR1_TTM3SEL_SH + 3 - byte);
+                }
+                ttm = unit >> 2;
+                mmcr1 |= (u64)ttm << (MMCR1_TD_CP_DBG0SEL_SH - 2 * byte);
+        }
+
+        /* Second pass: assign PMCs, set PMCxSEL and PMCx_ADDER_SEL fields */
+        for (i = 0; i < n_ev; ++i) {
+                pmc = (event[i] >> PM_PMC_SH) & PM_PMC_MSK;
+                unit = (event[i] >> PM_UNIT_SH) & PM_UNIT_MSK;
+                byte = (event[i] >> PM_BYTE_SH) & PM_BYTE_MSK;
+                psel = event[i] & PM_PMCSEL_MSK;
+                isbus = event[i] & PM_BUSEVENT_MSK;
+                if (!pmc) {
+                        /* Bus event or any-PMC direct event */
+                        for (pmc = 0; pmc < 4; ++pmc) {
+                                if (pmc_inuse & (1 << pmc))
+                                        continue;
+                                grp = (pmc >> 1) & 1;
+                                if (isbus) {
+                                        if (grp == (byte & 1))
+                                                break;
+                                } else if (pmc_grp_use[grp] < 2) {
+                                        ++pmc_grp_use[grp];
+                                        break;
+                                }
+                        }
+                        pmc_inuse |= 1 << pmc;
+                } else if (pmc <= 4) {
+                        /* Direct event */
+                        --pmc;
+                        if ((psel == 8 || psel == 0x10) && isbus && (byte & 2))
+                                /* add events on higher-numbered bus */
+                                mmcr1 |= 1ull << (MMCR1_PMC1_ADDER_SEL_SH - pmc);
+                } else {
+                        /* Instructions or run cycles on PMC5/6 */
+                        --pmc;
+                }
+                if (isbus && unit == PM_GRS) {
+                        bit = psel & 7;
+                        grsel = (event[i] >> PM_GRS_SH) & PM_GRS_MSK;
+                        mmcr1 |= (u64)grsel << grsel_shift[bit];
+                }
+                if (power5_marked_instr_event(event[i]))
+                        mmcra |= MMCRA_SAMPLE_ENABLE;
+                if (pmc <= 3)
+                        mmcr1 |= psel << MMCR1_PMCSEL_SH(pmc);
+                hwc[i] = pmc;
+        }
+
+        /* Return MMCRx values */
+        mmcr[0] = 0;
+        if (pmc_inuse & 1)
+                mmcr[0] = MMCR0_PMC1CE;
+        if (pmc_inuse & 0x3e)
+                mmcr[0] |= MMCR0_PMCjCE;
+        mmcr[1] = mmcr1;
+        mmcr[2] = mmcra;
+        return 0;
+}
+
+static void power5_disable_pmc(unsigned int pmc, u64 mmcr[])
+{
+        if (pmc <= 3)
+                mmcr[1] &= ~(0x7fUL << MMCR1_PMCSEL_SH(pmc));
+}
+
+static int power5_generic_events[] = {
+        [PERF_COUNT_HW_CPU_CYCLES]              = 0xf,
+        [PERF_COUNT_HW_INSTRUCTIONS]            = 0x100009,
+        [PERF_COUNT_HW_CACHE_REFERENCES]        = 0x4c1090, /* LD_REF_L1 */
+        [PERF_COUNT_HW_CACHE_MISSES]            = 0x3c1088, /* LD_MISS_L1 */
+        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS]     = 0x230e4,  /* BR_ISSUED */
+        [PERF_COUNT_HW_BRANCH_MISSES]           = 0x230e5,  /* BR_MPRED_CR */
+};
+
+#define C(x)    PERF_COUNT_HW_CACHE_##x
+
+/*
+ * Table of generalized cache-related events.
+ * 0 means not supported, -1 means nonsensical, other values
+ * are event codes.
+ */
+static int power5_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
+        [C(L1D)] = {            /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0x4c1090,       0x3c1088        },
+                [C(OP_WRITE)] = {       0x3c1090,       0xc10c3         },
+                [C(OP_PREFETCH)] = {    0xc70e7,        0               },
+        },
+        [C(L1I)] = {            /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0,              0               },
+                [C(OP_WRITE)] = {       -1,             -1              },
+                [C(OP_PREFETCH)] = {    0,              0               },
+        },
+        [C(LL)] = {             /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0,              0x3c309b        },
+                [C(OP_WRITE)] = {       0,              0               },
+                [C(OP_PREFETCH)] = {    0xc50c3,        0               },
+        },
+        [C(DTLB)] = {           /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0x2c4090,       0x800c4         },
+                [C(OP_WRITE)] = {       -1,             -1              },
+                [C(OP_PREFETCH)] = {    -1,             -1              },
+        },
+        [C(ITLB)] = {           /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0,              0x800c0         },
+                [C(OP_WRITE)] = {       -1,             -1              },
+                [C(OP_PREFETCH)] = {    -1,             -1              },
+        },
+        [C(BPU)] = {            /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0x230e4,        0x230e5         },
+                [C(OP_WRITE)] = {       -1,             -1              },
+                [C(OP_PREFETCH)] = {    -1,             -1              },
+        },
+};
+
+struct power_pmu power5_pmu = {
+        .n_counter = 6,
+        .max_alternatives = MAX_ALT,
+        .add_fields = 0x7000090000555ull,
+        .test_adder = 0x3000490000000ull,
+        .compute_mmcr = power5_compute_mmcr,
+        .get_constraint = power5_get_constraint,
+        .get_alternatives = power5_get_alternatives,
+        .disable_pmc = power5_disable_pmc,
+        .n_generic = ARRAY_SIZE(power5_generic_events),
+        .generic_events = power5_generic_events,
+        .cache_events = &power5_cache_events,
+};
diff --git a/arch/powerpc/kernel/power6-pmu.c b/arch/powerpc/kernel/power6-pmu.c
new file mode 100644
index 000000000000..46f74bebcfd9
--- /dev/null
+++ b/arch/powerpc/kernel/power6-pmu.c
@@ -0,0 +1,532 @@
+/*
+ * Performance counter support for POWER6 processors.
+ *
+ * Copyright 2008-2009 Paul Mackerras, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <linux/kernel.h>
+#include <linux/perf_counter.h>
+#include <asm/reg.h>
+
+/*
+ * Bits in event code for POWER6
+ */
+#define PM_PMC_SH       20      /* PMC number (1-based) for direct events */
+#define PM_PMC_MSK      0x7
+#define PM_PMC_MSKS     (PM_PMC_MSK << PM_PMC_SH)
+#define PM_UNIT_SH      16      /* Unit event comes (TTMxSEL encoding) */
+#define PM_UNIT_MSK     0xf
+#define PM_UNIT_MSKS    (PM_UNIT_MSK << PM_UNIT_SH)
+#define PM_LLAV         0x8000  /* Load lookahead match value */
+#define PM_LLA          0x4000  /* Load lookahead match enable */
+#define PM_BYTE_SH      12      /* Byte of event bus to use */
+#define PM_BYTE_MSK     3
+#define PM_SUBUNIT_SH   8       /* Subunit event comes from (NEST_SEL enc.) */
+#define PM_SUBUNIT_MSK  7
+#define PM_SUBUNIT_MSKS (PM_SUBUNIT_MSK << PM_SUBUNIT_SH)
+#define PM_PMCSEL_MSK   0xff    /* PMCxSEL value */
+#define PM_BUSEVENT_MSK 0xf3700
+
+/*
+ * Bits in MMCR1 for POWER6
+ */
+#define MMCR1_TTM0SEL_SH        60
+#define MMCR1_TTMSEL_SH(n)      (MMCR1_TTM0SEL_SH - (n) * 4)
+#define MMCR1_TTMSEL_MSK        0xf
+#define MMCR1_TTMSEL(m, n)      (((m) >> MMCR1_TTMSEL_SH(n)) & MMCR1_TTMSEL_MSK)
+#define MMCR1_NESTSEL_SH        45
+#define MMCR1_NESTSEL_MSK       0x7
+#define MMCR1_NESTSEL(m)        (((m) >> MMCR1_NESTSEL_SH) & MMCR1_NESTSEL_MSK)
+#define MMCR1_PMC1_LLA          ((u64)1 << 44)
+#define MMCR1_PMC1_LLA_VALUE    ((u64)1 << 39)
+#define MMCR1_PMC1_ADDR_SEL     ((u64)1 << 35)
+#define MMCR1_PMC1SEL_SH        24
+#define MMCR1_PMCSEL_SH(n)      (MMCR1_PMC1SEL_SH - (n) * 8)
+#define MMCR1_PMCSEL_MSK        0xff
+
+/*
+ * Map of which direct events on which PMCs are marked instruction events.
+ * Indexed by PMCSEL value >> 1.
+ * Bottom 4 bits are a map of which PMCs are interesting,
+ * top 4 bits say what sort of event:
+ *   0 = direct marked event,
+ *   1 = byte decode event,
+ *   4 = add/and event (PMC1 -> bits 0 & 4),
+ *   5 = add/and event (PMC1 -> bits 1 & 5),
+ *   6 = add/and event (PMC1 -> bits 2 & 6),
+ *   7 = add/and event (PMC1 -> bits 3 & 7).
+ */
+static unsigned char direct_event_is_marked[0x60 >> 1] = {
+        0,      /* 00 */
+        0,      /* 02 */
+        0,      /* 04 */
+        0x07,   /* 06 PM_MRK_ST_CMPL, PM_MRK_ST_GPS, PM_MRK_ST_CMPL_INT */
+        0x04,   /* 08 PM_MRK_DFU_FIN */
+        0x06,   /* 0a PM_MRK_IFU_FIN, PM_MRK_INST_FIN */
+        0,      /* 0c */
+        0,      /* 0e */
+        0x02,   /* 10 PM_MRK_INST_DISP */
+        0x08,   /* 12 PM_MRK_LSU_DERAT_MISS */
+        0,      /* 14 */
+        0,      /* 16 */
+        0x0c,   /* 18 PM_THRESH_TIMEO, PM_MRK_INST_FIN */
+        0x0f,   /* 1a PM_MRK_INST_DISP, PM_MRK_{FXU,FPU,LSU}_FIN */
+        0x01,   /* 1c PM_MRK_INST_ISSUED */
+        0,      /* 1e */
+        0,      /* 20 */
+        0,      /* 22 */
+        0,      /* 24 */
+        0,      /* 26 */
+        0x15,   /* 28 PM_MRK_DATA_FROM_L2MISS, PM_MRK_DATA_FROM_L3MISS */
+        0,      /* 2a */
+        0,      /* 2c */
+        0,      /* 2e */
+        0x4f,   /* 30 */
+        0x7f,   /* 32 */
+        0x4f,   /* 34 */
+        0x5f,   /* 36 */
+        0x6f,   /* 38 */
+        0x4f,   /* 3a */
+        0,      /* 3c */
+        0x08,   /* 3e PM_MRK_INST_TIMEO */
+        0x1f,   /* 40 */
+        0x1f,   /* 42 */
+        0x1f,   /* 44 */
+        0x1f,   /* 46 */
+        0x1f,   /* 48 */
+        0x1f,   /* 4a */
+        0x1f,   /* 4c */
+        0x1f,   /* 4e */
+        0,      /* 50 */
+        0x05,   /* 52 PM_MRK_BR_TAKEN, PM_MRK_BR_MPRED */
+        0x1c,   /* 54 PM_MRK_PTEG_FROM_L3MISS, PM_MRK_PTEG_FROM_L2MISS */
+        0x02,   /* 56 PM_MRK_LD_MISS_L1 */
+        0,      /* 58 */
+        0,      /* 5a */
+        0,      /* 5c */
+        0,      /* 5e */
+};
+
+/*
+ * Masks showing for each unit which bits are marked events.
+ * These masks are in LE order, i.e. 0x00000001 is byte 0, bit 0.
+ */
+static u32 marked_bus_events[16] = {
+        0x01000000,     /* direct events set 1: byte 3 bit 0 */
+        0x00010000,     /* direct events set 2: byte 2 bit 0 */
+        0, 0, 0, 0,     /* IDU, IFU, nest: nothing */
+        0x00000088,     /* VMX set 1: byte 0 bits 3, 7 */
+        0x000000c0,     /* VMX set 2: byte 0 bits 4-7 */
+        0x04010000,     /* LSU set 1: byte 2 bit 0, byte 3 bit 2 */
+        0xff010000u,    /* LSU set 2: byte 2 bit 0, all of byte 3 */
+        0,              /* LSU set 3 */
+        0x00000010,     /* VMX set 3: byte 0 bit 4 */
+        0,              /* BFP set 1 */
+        0x00000022,     /* BFP set 2: byte 0 bits 1, 5 */
+        0, 0
+};
+        
+/*
+ * Returns 1 if event counts things relating to marked instructions
+ * and thus needs the MMCRA_SAMPLE_ENABLE bit set, or 0 if not.
+ */
+static int power6_marked_instr_event(u64 event)
+{
+        int pmc, psel, ptype;
+        int bit, byte, unit;
+        u32 mask;
+
+        pmc = (event >> PM_PMC_SH) & PM_PMC_MSK;
+        psel = (event & PM_PMCSEL_MSK) >> 1;    /* drop edge/level bit */
+        if (pmc >= 5)
+                return 0;
+
+        bit = -1;
+        if (psel < sizeof(direct_event_is_marked)) {
+                ptype = direct_event_is_marked[psel];
+                if (pmc == 0 || !(ptype & (1 << (pmc - 1))))
+                        return 0;
+                ptype >>= 4;
+                if (ptype == 0)
+                        return 1;
+                if (ptype == 1)
+                        bit = 0;
+                else
+                        bit = ptype ^ (pmc - 1);
+        } else if ((psel & 0x48) == 0x40)
+                bit = psel & 7;
+
+        if (!(event & PM_BUSEVENT_MSK) || bit == -1)
+                return 0;
+
+        byte = (event >> PM_BYTE_SH) & PM_BYTE_MSK;
+        unit = (event >> PM_UNIT_SH) & PM_UNIT_MSK;
+        mask = marked_bus_events[unit];
+        return (mask >> (byte * 8 + bit)) & 1;
+}
+
+/*
+ * Assign PMC numbers and compute MMCR1 value for a set of events
+ */
+static int p6_compute_mmcr(u64 event[], int n_ev,
+                           unsigned int hwc[], u64 mmcr[])
+{
+        u64 mmcr1 = 0;
+        u64 mmcra = 0;
+        int i;
+        unsigned int pmc, ev, b, u, s, psel;
+        unsigned int ttmset = 0;
+        unsigned int pmc_inuse = 0;
+
+        if (n_ev > 6)
+                return -1;
+        for (i = 0; i < n_ev; ++i) {
+                pmc = (event[i] >> PM_PMC_SH) & PM_PMC_MSK;
+                if (pmc) {
+                        if (pmc_inuse & (1 << (pmc - 1)))
+                                return -1;      /* collision! */
+                        pmc_inuse |= 1 << (pmc - 1);
+                }
+        }
+        for (i = 0; i < n_ev; ++i) {
+                ev = event[i];
+                pmc = (ev >> PM_PMC_SH) & PM_PMC_MSK;
+                if (pmc) {
+                        --pmc;
+                } else {
+                        /* can go on any PMC; find a free one */
+                        for (pmc = 0; pmc < 4; ++pmc)
+                                if (!(pmc_inuse & (1 << pmc)))
+                                        break;
+                        if (pmc >= 4)
+                                return -1;
+                        pmc_inuse |= 1 << pmc;
+                }
+                hwc[i] = pmc;
+                psel = ev & PM_PMCSEL_MSK;
+                if (ev & PM_BUSEVENT_MSK) {
+                        /* this event uses the event bus */
+                        b = (ev >> PM_BYTE_SH) & PM_BYTE_MSK;
+                        u = (ev >> PM_UNIT_SH) & PM_UNIT_MSK;
+                        /* check for conflict on this byte of event bus */
+                        if ((ttmset & (1 << b)) && MMCR1_TTMSEL(mmcr1, b) != u)
+                                return -1;
+                        mmcr1 |= (u64)u << MMCR1_TTMSEL_SH(b);
+                        ttmset |= 1 << b;
+                        if (u == 5) {
+                                /* Nest events have a further mux */
+                                s = (ev >> PM_SUBUNIT_SH) & PM_SUBUNIT_MSK;
+                                if ((ttmset & 0x10) &&
+                                    MMCR1_NESTSEL(mmcr1) != s)
+                                        return -1;
+                                ttmset |= 0x10;
+                                mmcr1 |= (u64)s << MMCR1_NESTSEL_SH;
+                        }
+                        if (0x30 <= psel && psel <= 0x3d) {
+                                /* these need the PMCx_ADDR_SEL bits */
+                                if (b >= 2)
+                                        mmcr1 |= MMCR1_PMC1_ADDR_SEL >> pmc;
+                        }
+                        /* bus select values are different for PMC3/4 */
+                        if (pmc >= 2 && (psel & 0x90) == 0x80)
+                                psel ^= 0x20;
+                }
+                if (ev & PM_LLA) {
+                        mmcr1 |= MMCR1_PMC1_LLA >> pmc;
+                        if (ev & PM_LLAV)
+                                mmcr1 |= MMCR1_PMC1_LLA_VALUE >> pmc;
+                }
+                if (power6_marked_instr_event(event[i]))
+                        mmcra |= MMCRA_SAMPLE_ENABLE;
+                if (pmc < 4)
+                        mmcr1 |= (u64)psel << MMCR1_PMCSEL_SH(pmc);
+        }
+        mmcr[0] = 0;
+        if (pmc_inuse & 1)
+                mmcr[0] = MMCR0_PMC1CE;
+        if (pmc_inuse & 0xe)
+                mmcr[0] |= MMCR0_PMCjCE;
+        mmcr[1] = mmcr1;
+        mmcr[2] = mmcra;
+        return 0;
+}
+
+/*
+ * Layout of constraint bits:
+ *
+ *      0-1     add field: number of uses of PMC1 (max 1)
+ *      2-3, 4-5, 6-7, 8-9, 10-11: ditto for PMC2, 3, 4, 5, 6
+ *      12-15   add field: number of uses of PMC1-4 (max 4)
+ *      16-19   select field: unit on byte 0 of event bus
+ *      20-23, 24-27, 28-31 ditto for bytes 1, 2, 3
+ *      32-34   select field: nest (subunit) event selector
+ */
+static int p6_get_constraint(u64 event, u64 *maskp, u64 *valp)
+{
+        int pmc, byte, sh, subunit;
+        u64 mask = 0, value = 0;
+
+        pmc = (event >> PM_PMC_SH) & PM_PMC_MSK;
+        if (pmc) {
+                if (pmc > 4 && !(event == 0x500009 || event == 0x600005))
+                        return -1;
+                sh = (pmc - 1) * 2;
+                mask |= 2 << sh;
+                value |= 1 << sh;
+        }
+        if (event & PM_BUSEVENT_MSK) {
+                byte = (event >> PM_BYTE_SH) & PM_BYTE_MSK;
+                sh = byte * 4 + (16 - PM_UNIT_SH);
+                mask |= PM_UNIT_MSKS << sh;
+                value |= (u64)(event & PM_UNIT_MSKS) << sh;
+                if ((event & PM_UNIT_MSKS) == (5 << PM_UNIT_SH)) {
+                        subunit = (event >> PM_SUBUNIT_SH) & PM_SUBUNIT_MSK;
+                        mask  |= (u64)PM_SUBUNIT_MSK << 32;
+                        value |= (u64)subunit << 32;
+                }
+        }
+        if (pmc <= 4) {
+                mask  |= 0x8000;        /* add field for count of PMC1-4 uses */
+                value |= 0x1000;
+        }
+        *maskp = mask;
+        *valp = value;
+        return 0;
+}
+
+static int p6_limited_pmc_event(u64 event)
+{
+        int pmc = (event >> PM_PMC_SH) & PM_PMC_MSK;
+
+        return pmc == 5 || pmc == 6;
+}
+
+#define MAX_ALT 4       /* at most 4 alternatives for any event */
+
+static const unsigned int event_alternatives[][MAX_ALT] = {
+        { 0x0130e8, 0x2000f6, 0x3000fc },       /* PM_PTEG_RELOAD_VALID */
+        { 0x080080, 0x10000d, 0x30000c, 0x4000f0 }, /* PM_LD_MISS_L1 */
+        { 0x080088, 0x200054, 0x3000f0 },       /* PM_ST_MISS_L1 */
+        { 0x10000a, 0x2000f4, 0x600005 },       /* PM_RUN_CYC */
+        { 0x10000b, 0x2000f5 },                 /* PM_RUN_COUNT */
+        { 0x10000e, 0x400010 },                 /* PM_PURR */
+        { 0x100010, 0x4000f8 },                 /* PM_FLUSH */
+        { 0x10001a, 0x200010 },                 /* PM_MRK_INST_DISP */
+        { 0x100026, 0x3000f8 },                 /* PM_TB_BIT_TRANS */
+        { 0x100054, 0x2000f0 },                 /* PM_ST_FIN */
+        { 0x100056, 0x2000fc },                 /* PM_L1_ICACHE_MISS */
+        { 0x1000f0, 0x40000a },                 /* PM_INST_IMC_MATCH_CMPL */
+        { 0x1000f8, 0x200008 },                 /* PM_GCT_EMPTY_CYC */
+        { 0x1000fc, 0x400006 },                 /* PM_LSU_DERAT_MISS_CYC */
+        { 0x20000e, 0x400007 },                 /* PM_LSU_DERAT_MISS */
+        { 0x200012, 0x300012 },                 /* PM_INST_DISP */
+        { 0x2000f2, 0x3000f2 },                 /* PM_INST_DISP */
+        { 0x2000f8, 0x300010 },                 /* PM_EXT_INT */
+        { 0x2000fe, 0x300056 },                 /* PM_DATA_FROM_L2MISS */
+        { 0x2d0030, 0x30001a },                 /* PM_MRK_FPU_FIN */
+        { 0x30000a, 0x400018 },                 /* PM_MRK_INST_FIN */
+        { 0x3000f6, 0x40000e },                 /* PM_L1_DCACHE_RELOAD_VALID */
+        { 0x3000fe, 0x400056 },                 /* PM_DATA_FROM_L3MISS */
+};
+
+/*
+ * This could be made more efficient with a binary search on
+ * a presorted list, if necessary
+ */
+static int find_alternatives_list(u64 event)
+{
+        int i, j;
+        unsigned int alt;
+
+        for (i = 0; i < ARRAY_SIZE(event_alternatives); ++i) {
+                if (event < event_alternatives[i][0])
+                        return -1;
+                for (j = 0; j < MAX_ALT; ++j) {
+                        alt = event_alternatives[i][j];
+                        if (!alt || event < alt)
+                                break;
+                        if (event == alt)
+                                return i;
+                }
+        }
+        return -1;
+}
+
+static int p6_get_alternatives(u64 event, unsigned int flags, u64 alt[])
+{
+        int i, j, nlim;
+        unsigned int psel, pmc;
+        unsigned int nalt = 1;
+        u64 aevent;
+
+        alt[0] = event;
+        nlim = p6_limited_pmc_event(event);
+
+        /* check the alternatives table */
+        i = find_alternatives_list(event);
+        if (i >= 0) {
+                /* copy out alternatives from list */
+                for (j = 0; j < MAX_ALT; ++j) {
+                        aevent = event_alternatives[i][j];
+                        if (!aevent)
+                                break;
+                        if (aevent != event)
+                                alt[nalt++] = aevent;
+                        nlim += p6_limited_pmc_event(aevent);
+                }
+
+        } else {
+                /* Check for alternative ways of computing sum events */
+                /* PMCSEL 0x32 counter N == PMCSEL 0x34 counter 5-N */
+                psel = event & (PM_PMCSEL_MSK & ~1);    /* ignore edge bit */
+                pmc = (event >> PM_PMC_SH) & PM_PMC_MSK;
+                if (pmc && (psel == 0x32 || psel == 0x34))
+                        alt[nalt++] = ((event ^ 0x6) & ~PM_PMC_MSKS) |
+                                ((5 - pmc) << PM_PMC_SH);
+
+                /* PMCSEL 0x38 counter N == PMCSEL 0x3a counter N+/-2 */
+                if (pmc && (psel == 0x38 || psel == 0x3a))
+                        alt[nalt++] = ((event ^ 0x2) & ~PM_PMC_MSKS) |
+                                ((pmc > 2? pmc - 2: pmc + 2) << PM_PMC_SH);
+        }
+
+        if (flags & PPMU_ONLY_COUNT_RUN) {
+                /*
+                 * We're only counting in RUN state,
+                 * so PM_CYC is equivalent to PM_RUN_CYC,
+                 * PM_INST_CMPL === PM_RUN_INST_CMPL, PM_PURR === PM_RUN_PURR.
+                 * This doesn't include alternatives that don't provide
+                 * any extra flexibility in assigning PMCs (e.g.
+                 * 0x10000a for PM_RUN_CYC vs. 0x1e for PM_CYC).
+                 * Note that even with these additional alternatives
+                 * we never end up with more than 4 alternatives for any event.
+                 */
+                j = nalt;
+                for (i = 0; i < nalt; ++i) {
+                        switch (alt[i]) {
+                        case 0x1e:      /* PM_CYC */
+                                alt[j++] = 0x600005;    /* PM_RUN_CYC */
+                                ++nlim;
+                                break;
+                        case 0x10000a:  /* PM_RUN_CYC */
+                                alt[j++] = 0x1e;        /* PM_CYC */
+                                break;
+                        case 2:         /* PM_INST_CMPL */
+                                alt[j++] = 0x500009;    /* PM_RUN_INST_CMPL */
+                                ++nlim;
+                                break;
+                        case 0x500009:  /* PM_RUN_INST_CMPL */
+                                alt[j++] = 2;           /* PM_INST_CMPL */
+                                break;
+                        case 0x10000e:  /* PM_PURR */
+                                alt[j++] = 0x4000f4;    /* PM_RUN_PURR */
+                                break;
+                        case 0x4000f4:  /* PM_RUN_PURR */
+                                alt[j++] = 0x10000e;    /* PM_PURR */
+                                break;
+                        }
+                }
+                nalt = j;
+        }
+
+        if (!(flags & PPMU_LIMITED_PMC_OK) && nlim) {
+                /* remove the limited PMC events */
+                j = 0;
+                for (i = 0; i < nalt; ++i) {
+                        if (!p6_limited_pmc_event(alt[i])) {
+                                alt[j] = alt[i];
+                                ++j;
+                        }
+                }
+                nalt = j;
+        } else if ((flags & PPMU_LIMITED_PMC_REQD) && nlim < nalt) {
+                /* remove all but the limited PMC events */
+                j = 0;
+                for (i = 0; i < nalt; ++i) {
+                        if (p6_limited_pmc_event(alt[i])) {
+                                alt[j] = alt[i];
+                                ++j;
+                        }
+                }
+                nalt = j;
+        }
+
+        return nalt;
+}
+
+static void p6_disable_pmc(unsigned int pmc, u64 mmcr[])
+{
+        /* Set PMCxSEL to 0 to disable PMCx */
+        if (pmc <= 3)
+                mmcr[1] &= ~(0xffUL << MMCR1_PMCSEL_SH(pmc));
+}
+
+static int power6_generic_events[] = {
+        [PERF_COUNT_HW_CPU_CYCLES]              = 0x1e,
+        [PERF_COUNT_HW_INSTRUCTIONS]            = 2,
+        [PERF_COUNT_HW_CACHE_REFERENCES]        = 0x280030, /* LD_REF_L1 */
+        [PERF_COUNT_HW_CACHE_MISSES]            = 0x30000c, /* LD_MISS_L1 */
+        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS]     = 0x410a0,  /* BR_PRED */
+        [PERF_COUNT_HW_BRANCH_MISSES]           = 0x400052, /* BR_MPRED */
+};
+
+#define C(x)    PERF_COUNT_HW_CACHE_##x
+
+/*
+ * Table of generalized cache-related events.
+ * 0 means not supported, -1 means nonsensical, other values
+ * are event codes.
+ * The "DTLB" and "ITLB" events relate to the DERAT and IERAT.
+ */
+static int power6_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
+        [C(L1D)] = {            /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0x80082,        0x80080         },
+                [C(OP_WRITE)] = {       0x80086,        0x80088         },
+                [C(OP_PREFETCH)] = {    0x810a4,        0               },
+        },
+        [C(L1I)] = {            /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0,              0x100056        },
+                [C(OP_WRITE)] = {       -1,             -1              },
+                [C(OP_PREFETCH)] = {    0x4008c,        0               },
+        },
+        [C(LL)] = {             /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0x150730,       0x250532        },
+                [C(OP_WRITE)] = {       0x250432,       0x150432        },
+                [C(OP_PREFETCH)] = {    0x810a6,        0               },
+        },
+        [C(DTLB)] = {           /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0,              0x20000e        },
+                [C(OP_WRITE)] = {       -1,             -1              },
+                [C(OP_PREFETCH)] = {    -1,             -1              },
+        },
+        [C(ITLB)] = {           /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0,              0x420ce         },
+                [C(OP_WRITE)] = {       -1,             -1              },
+                [C(OP_PREFETCH)] = {    -1,             -1              },
+        },
+        [C(BPU)] = {            /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0x430e6,        0x400052        },
+                [C(OP_WRITE)] = {       -1,             -1              },
+                [C(OP_PREFETCH)] = {    -1,             -1              },
+        },
+};
+
+struct power_pmu power6_pmu = {
+        .n_counter = 6,
+        .max_alternatives = MAX_ALT,
+        .add_fields = 0x1555,
+        .test_adder = 0x3000,
+        .compute_mmcr = p6_compute_mmcr,
+        .get_constraint = p6_get_constraint,
+        .get_alternatives = p6_get_alternatives,
+        .disable_pmc = p6_disable_pmc,
+        .limited_pmc_event = p6_limited_pmc_event,
+        .flags = PPMU_LIMITED_PMC5_6 | PPMU_ALT_SIPR,
+        .n_generic = ARRAY_SIZE(power6_generic_events),
+        .generic_events = power6_generic_events,
+        .cache_events = &power6_cache_events,
+};
diff --git a/arch/powerpc/kernel/power7-pmu.c b/arch/powerpc/kernel/power7-pmu.c
new file mode 100644
index 000000000000..b3f7d1216bae
--- /dev/null
+++ b/arch/powerpc/kernel/power7-pmu.c
@@ -0,0 +1,357 @@
+/*
+ * Performance counter support for POWER7 processors.
+ *
+ * Copyright 2009 Paul Mackerras, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <linux/kernel.h>
+#include <linux/perf_counter.h>
+#include <asm/reg.h>
+
+/*
+ * Bits in event code for POWER7
+ */
+#define PM_PMC_SH       16      /* PMC number (1-based) for direct events */
+#define PM_PMC_MSK      0xf
+#define PM_PMC_MSKS     (PM_PMC_MSK << PM_PMC_SH)
+#define PM_UNIT_SH      12      /* TTMMUX number and setting - unit select */
+#define PM_UNIT_MSK     0xf
+#define PM_COMBINE_SH   11      /* Combined event bit */
+#define PM_COMBINE_MSK  1
+#define PM_COMBINE_MSKS 0x800
+#define PM_L2SEL_SH     8       /* L2 event select */
+#define PM_L2SEL_MSK    7
+#define PM_PMCSEL_MSK   0xff
+
+/*
+ * Bits in MMCR1 for POWER7
+ */
+#define MMCR1_TTM0SEL_SH        60
+#define MMCR1_TTM1SEL_SH        56
+#define MMCR1_TTM2SEL_SH        52
+#define MMCR1_TTM3SEL_SH        48
+#define MMCR1_TTMSEL_MSK        0xf
+#define MMCR1_L2SEL_SH          45
+#define MMCR1_L2SEL_MSK         7
+#define MMCR1_PMC1_COMBINE_SH   35
+#define MMCR1_PMC2_COMBINE_SH   34
+#define MMCR1_PMC3_COMBINE_SH   33
+#define MMCR1_PMC4_COMBINE_SH   32
+#define MMCR1_PMC1SEL_SH        24
+#define MMCR1_PMC2SEL_SH        16
+#define MMCR1_PMC3SEL_SH        8
+#define MMCR1_PMC4SEL_SH        0
+#define MMCR1_PMCSEL_SH(n)      (MMCR1_PMC1SEL_SH - (n) * 8)
+#define MMCR1_PMCSEL_MSK        0xff
+
+/*
+ * Bits in MMCRA
+ */
+
+/*
+ * Layout of constraint bits:
+ * 6666555555555544444444443333333333222222222211111111110000000000
+ * 3210987654321098765432109876543210987654321098765432109876543210
+ *                                                 [  ><><><><><><>
+ *                                                  NC P6P5P4P3P2P1
+ *
+ * NC - number of counters
+ *     15: NC error 0x8000
+ *     12-14: number of events needing PMC1-4 0x7000
+ *
+ * P6
+ *     11: P6 error 0x800
+ *     10-11: Count of events needing PMC6
+ *
+ * P1..P5
+ *     0-9: Count of events needing PMC1..PMC5
+ */
+
+static int power7_get_constraint(u64 event, u64 *maskp, u64 *valp)
+{
+        int pmc, sh;
+        u64 mask = 0, value = 0;
+
+        pmc = (event >> PM_PMC_SH) & PM_PMC_MSK;
+        if (pmc) {
+                if (pmc > 6)
+                        return -1;
+                sh = (pmc - 1) * 2;
+                mask |= 2 << sh;
+                value |= 1 << sh;
+                if (pmc >= 5 && !(event == 0x500fa || event == 0x600f4))
+                        return -1;
+        }
+        if (pmc < 5) {
+                /* need a counter from PMC1-4 set */
+                mask  |= 0x8000;
+                value |= 0x1000;
+        }
+        *maskp = mask;
+        *valp = value;
+        return 0;
+}
+
+#define MAX_ALT 2       /* at most 2 alternatives for any event */
+
+static const unsigned int event_alternatives[][MAX_ALT] = {
+        { 0x200f2, 0x300f2 },           /* PM_INST_DISP */
+        { 0x200f4, 0x600f4 },           /* PM_RUN_CYC */
+        { 0x400fa, 0x500fa },           /* PM_RUN_INST_CMPL */
+};
+
+/*
+ * Scan the alternatives table for a match and return the
+ * index into the alternatives table if found, else -1.
+ */
+static int find_alternative(u64 event)
+{
+        int i, j;
+
+        for (i = 0; i < ARRAY_SIZE(event_alternatives); ++i) {
+                if (event < event_alternatives[i][0])
+                        break;
+                for (j = 0; j < MAX_ALT && event_alternatives[i][j]; ++j)
+                        if (event == event_alternatives[i][j])
+                                return i;
+        }
+        return -1;
+}
+
+static s64 find_alternative_decode(u64 event)
+{
+        int pmc, psel;
+
+        /* this only handles the 4x decode events */
+        pmc = (event >> PM_PMC_SH) & PM_PMC_MSK;
+        psel = event & PM_PMCSEL_MSK;
+        if ((pmc == 2 || pmc == 4) && (psel & ~7) == 0x40)
+                return event - (1 << PM_PMC_SH) + 8;
+        if ((pmc == 1 || pmc == 3) && (psel & ~7) == 0x48)
+                return event + (1 << PM_PMC_SH) - 8;
+        return -1;
+}
+
+static int power7_get_alternatives(u64 event, unsigned int flags, u64 alt[])
+{
+        int i, j, nalt = 1;
+        s64 ae;
+
+        alt[0] = event;
+        nalt = 1;
+        i = find_alternative(event);
+        if (i >= 0) {
+                for (j = 0; j < MAX_ALT; ++j) {
+                        ae = event_alternatives[i][j];
+                        if (ae && ae != event)
+                                alt[nalt++] = ae;
+                }
+        } else {
+                ae = find_alternative_decode(event);
+                if (ae > 0)
+                        alt[nalt++] = ae;
+        }
+
+        if (flags & PPMU_ONLY_COUNT_RUN) {
+                /*
+                 * We're only counting in RUN state,
+                 * so PM_CYC is equivalent to PM_RUN_CYC
+                 * and PM_INST_CMPL === PM_RUN_INST_CMPL.
+                 * This doesn't include alternatives that don't provide
+                 * any extra flexibility in assigning PMCs.
+                 */
+                j = nalt;
+                for (i = 0; i < nalt; ++i) {
+                        switch (alt[i]) {
+                        case 0x1e:      /* PM_CYC */
+                                alt[j++] = 0x600f4;     /* PM_RUN_CYC */
+                                break;
+                        case 0x600f4:   /* PM_RUN_CYC */
+                                alt[j++] = 0x1e;
+                                break;
+                        case 0x2:       /* PM_PPC_CMPL */
+                                alt[j++] = 0x500fa;     /* PM_RUN_INST_CMPL */
+                                break;
+                        case 0x500fa:   /* PM_RUN_INST_CMPL */
+                                alt[j++] = 0x2; /* PM_PPC_CMPL */
+                                break;
+                        }
+                }
+                nalt = j;
+        }
+
+        return nalt;
+}
+
+/*
+ * Returns 1 if event counts things relating to marked instructions
+ * and thus needs the MMCRA_SAMPLE_ENABLE bit set, or 0 if not.
+ */
+static int power7_marked_instr_event(u64 event)
+{
+        int pmc, psel;
+        int unit;
+
+        pmc = (event >> PM_PMC_SH) & PM_PMC_MSK;
+        unit = (event >> PM_UNIT_SH) & PM_UNIT_MSK;
+        psel = event & PM_PMCSEL_MSK & ~1;      /* trim off edge/level bit */
+        if (pmc >= 5)
+                return 0;
+
+        switch (psel >> 4) {
+        case 2:
+                return pmc == 2 || pmc == 4;
+        case 3:
+                if (psel == 0x3c)
+                        return pmc == 1;
+                if (psel == 0x3e)
+                        return pmc != 2;
+                return 1;
+        case 4:
+        case 5:
+                return unit == 0xd;
+        case 6:
+                if (psel == 0x64)
+                        return pmc >= 3;
+        case 8:
+                return unit == 0xd;
+        }
+        return 0;
+}
+
+static int power7_compute_mmcr(u64 event[], int n_ev,
+                               unsigned int hwc[], u64 mmcr[])
+{
+        u64 mmcr1 = 0;
+        u64 mmcra = 0;
+        unsigned int pmc, unit, combine, l2sel, psel;
+        unsigned int pmc_inuse = 0;
+        int i;
+
+        /* First pass to count resource use */
+        for (i = 0; i < n_ev; ++i) {
+                pmc = (event[i] >> PM_PMC_SH) & PM_PMC_MSK;
+                if (pmc) {
+                        if (pmc > 6)
+                                return -1;
+                        if (pmc_inuse & (1 << (pmc - 1)))
+                                return -1;
+                        pmc_inuse |= 1 << (pmc - 1);
+                }
+        }
+
+        /* Second pass: assign PMCs, set all MMCR1 fields */
+        for (i = 0; i < n_ev; ++i) {
+                pmc = (event[i] >> PM_PMC_SH) & PM_PMC_MSK;
+                unit = (event[i] >> PM_UNIT_SH) & PM_UNIT_MSK;
+                combine = (event[i] >> PM_COMBINE_SH) & PM_COMBINE_MSK;
+                l2sel = (event[i] >> PM_L2SEL_SH) & PM_L2SEL_MSK;
+                psel = event[i] & PM_PMCSEL_MSK;
+                if (!pmc) {
+                        /* Bus event or any-PMC direct event */
+                        for (pmc = 0; pmc < 4; ++pmc) {
+                                if (!(pmc_inuse & (1 << pmc)))
+                                        break;
+                        }
+                        if (pmc >= 4)
+                                return -1;
+                        pmc_inuse |= 1 << pmc;
+                } else {
+                        /* Direct or decoded event */
+                        --pmc;
+                }
+                if (pmc <= 3) {
+                        mmcr1 |= (u64) unit << (MMCR1_TTM0SEL_SH - 4 * pmc);
+                        mmcr1 |= (u64) combine << (MMCR1_PMC1_COMBINE_SH - pmc);
+                        mmcr1 |= psel << MMCR1_PMCSEL_SH(pmc);
+                        if (unit == 6)  /* L2 events */
+                                mmcr1 |= (u64) l2sel << MMCR1_L2SEL_SH;
+                }
+                if (power7_marked_instr_event(event[i]))
+                        mmcra |= MMCRA_SAMPLE_ENABLE;
+                hwc[i] = pmc;
+        }
+
+        /* Return MMCRx values */
+        mmcr[0] = 0;
+        if (pmc_inuse & 1)
+                mmcr[0] = MMCR0_PMC1CE;
+        if (pmc_inuse & 0x3e)
+                mmcr[0] |= MMCR0_PMCjCE;
+        mmcr[1] = mmcr1;
+        mmcr[2] = mmcra;
+        return 0;
+}
+
+static void power7_disable_pmc(unsigned int pmc, u64 mmcr[])
+{
+        if (pmc <= 3)
+                mmcr[1] &= ~(0xffULL << MMCR1_PMCSEL_SH(pmc));
+}
+
+static int power7_generic_events[] = {
+        [PERF_COUNT_CPU_CYCLES] = 0x1e,
+        [PERF_COUNT_INSTRUCTIONS] = 2,
+        [PERF_COUNT_CACHE_REFERENCES] = 0xc880,         /* LD_REF_L1_LSU */
+        [PERF_COUNT_CACHE_MISSES] = 0x400f0,            /* LD_MISS_L1 */
+        [PERF_COUNT_BRANCH_INSTRUCTIONS] = 0x10068,     /* BRU_FIN */
+        [PERF_COUNT_BRANCH_MISSES] = 0x400f6,           /* BR_MPRED */
+};
+
+#define C(x)    PERF_COUNT_HW_CACHE_##x
+
+/*
+ * Table of generalized cache-related events.
+ * 0 means not supported, -1 means nonsensical, other values
+ * are event codes.
+ */
+static int power7_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
+        [C(L1D)] = {            /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0x400f0,        0xc880  },
+                [C(OP_WRITE)] = {       0,              0x300f0 },
+                [C(OP_PREFETCH)] = {    0xd8b8,         0       },
+        },
+        [C(L1I)] = {            /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0,              0x200fc },
+                [C(OP_WRITE)] = {       -1,             -1      },
+                [C(OP_PREFETCH)] = {    0x408a,         0       },
+        },
+        [C(LL)] = {             /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0x6080,         0x6084  },
+                [C(OP_WRITE)] = {       0x6082,         0x6086  },
+                [C(OP_PREFETCH)] = {    0,              0       },
+        },
+        [C(DTLB)] = {           /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0,              0x300fc },
+                [C(OP_WRITE)] = {       -1,             -1      },
+                [C(OP_PREFETCH)] = {    -1,             -1      },
+        },
+        [C(ITLB)] = {           /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0,              0x400fc },
+                [C(OP_WRITE)] = {       -1,             -1      },
+                [C(OP_PREFETCH)] = {    -1,             -1      },
+        },
+        [C(BPU)] = {            /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0x10068,        0x400f6 },
+                [C(OP_WRITE)] = {       -1,             -1      },
+                [C(OP_PREFETCH)] = {    -1,             -1      },
+        },
+};
+
+struct power_pmu power7_pmu = {
+        .n_counter = 6,
+        .max_alternatives = MAX_ALT + 1,
+        .add_fields = 0x1555ull,
+        .test_adder = 0x3000ull,
+        .compute_mmcr = power7_compute_mmcr,
+        .get_constraint = power7_get_constraint,
+        .get_alternatives = power7_get_alternatives,
+        .disable_pmc = power7_disable_pmc,
+        .n_generic = ARRAY_SIZE(power7_generic_events),
+        .generic_events = power7_generic_events,
+        .cache_events = &power7_cache_events,
+};
diff --git a/arch/powerpc/kernel/ppc970-pmu.c b/arch/powerpc/kernel/ppc970-pmu.c
new file mode 100644
index 000000000000..ba0a357a89f4
--- /dev/null
+++ b/arch/powerpc/kernel/ppc970-pmu.c
@@ -0,0 +1,482 @@
+/*
+ * Performance counter support for PPC970-family processors.
+ *
+ * Copyright 2008-2009 Paul Mackerras, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <linux/string.h>
+#include <linux/perf_counter.h>
+#include <asm/reg.h>
+
+/*
+ * Bits in event code for PPC970
+ */
+#define PM_PMC_SH       12      /* PMC number (1-based) for direct events */
+#define PM_PMC_MSK      0xf
+#define PM_UNIT_SH      8       /* TTMMUX number and setting - unit select */
+#define PM_UNIT_MSK     0xf
+#define PM_SPCSEL_SH    6
+#define PM_SPCSEL_MSK   3
+#define PM_BYTE_SH      4       /* Byte number of event bus to use */
+#define PM_BYTE_MSK     3
+#define PM_PMCSEL_MSK   0xf
+
+/* Values in PM_UNIT field */
+#define PM_NONE         0
+#define PM_FPU          1
+#define PM_VPU          2
+#define PM_ISU          3
+#define PM_IFU          4
+#define PM_IDU          5
+#define PM_STS          6
+#define PM_LSU0         7
+#define PM_LSU1U        8
+#define PM_LSU1L        9
+#define PM_LASTUNIT     9
+
+/*
+ * Bits in MMCR0 for PPC970
+ */
+#define MMCR0_PMC1SEL_SH        8
+#define MMCR0_PMC2SEL_SH        1
+#define MMCR_PMCSEL_MSK         0x1f
+
+/*
+ * Bits in MMCR1 for PPC970
+ */
+#define MMCR1_TTM0SEL_SH        62
+#define MMCR1_TTM1SEL_SH        59
+#define MMCR1_TTM3SEL_SH        53
+#define MMCR1_TTMSEL_MSK        3
+#define MMCR1_TD_CP_DBG0SEL_SH  50
+#define MMCR1_TD_CP_DBG1SEL_SH  48
+#define MMCR1_TD_CP_DBG2SEL_SH  46
+#define MMCR1_TD_CP_DBG3SEL_SH  44
+#define MMCR1_PMC1_ADDER_SEL_SH 39
+#define MMCR1_PMC2_ADDER_SEL_SH 38
+#define MMCR1_PMC6_ADDER_SEL_SH 37
+#define MMCR1_PMC5_ADDER_SEL_SH 36
+#define MMCR1_PMC8_ADDER_SEL_SH 35
+#define MMCR1_PMC7_ADDER_SEL_SH 34
+#define MMCR1_PMC3_ADDER_SEL_SH 33
+#define MMCR1_PMC4_ADDER_SEL_SH 32
+#define MMCR1_PMC3SEL_SH        27
+#define MMCR1_PMC4SEL_SH        22
+#define MMCR1_PMC5SEL_SH        17
+#define MMCR1_PMC6SEL_SH        12
+#define MMCR1_PMC7SEL_SH        7
+#define MMCR1_PMC8SEL_SH        2
+
+static short mmcr1_adder_bits[8] = {
+        MMCR1_PMC1_ADDER_SEL_SH,
+        MMCR1_PMC2_ADDER_SEL_SH,
+        MMCR1_PMC3_ADDER_SEL_SH,
+        MMCR1_PMC4_ADDER_SEL_SH,
+        MMCR1_PMC5_ADDER_SEL_SH,
+        MMCR1_PMC6_ADDER_SEL_SH,
+        MMCR1_PMC7_ADDER_SEL_SH,
+        MMCR1_PMC8_ADDER_SEL_SH
+};
+
+/*
+ * Bits in MMCRA
+ */
+
+/*
+ * Layout of constraint bits:
+ * 6666555555555544444444443333333333222222222211111111110000000000
+ * 3210987654321098765432109876543210987654321098765432109876543210
+ *               <><><>[  >[  >[  ><  ><  ><  ><  ><><><><><><><><>
+ *               SPT0T1 UC  PS1 PS2 B0  B1  B2  B3 P1P2P3P4P5P6P7P8
+ *
+ * SP - SPCSEL constraint
+ *     48-49: SPCSEL value 0x3_0000_0000_0000
+ *
+ * T0 - TTM0 constraint
+ *     46-47: TTM0SEL value (0=FPU, 2=IFU, 3=VPU) 0xC000_0000_0000
+ *
+ * T1 - TTM1 constraint
+ *     44-45: TTM1SEL value (0=IDU, 3=STS) 0x3000_0000_0000
+ *
+ * UC - unit constraint: can't have all three of FPU|IFU|VPU, ISU, IDU|STS
+ *     43: UC3 error 0x0800_0000_0000
+ *     42: FPU|IFU|VPU events needed 0x0400_0000_0000
+ *     41: ISU events needed 0x0200_0000_0000
+ *     40: IDU|STS events needed 0x0100_0000_0000
+ *
+ * PS1
+ *     39: PS1 error 0x0080_0000_0000
+ *     36-38: count of events needing PMC1/2/5/6 0x0070_0000_0000
+ *
+ * PS2
+ *     35: PS2 error 0x0008_0000_0000
+ *     32-34: count of events needing PMC3/4/7/8 0x0007_0000_0000
+ *
+ * B0
+ *     28-31: Byte 0 event source 0xf000_0000
+ *            Encoding as for the event code
+ *
+ * B1, B2, B3
+ *     24-27, 20-23, 16-19: Byte 1, 2, 3 event sources
+ *
+ * P1
+ *     15: P1 error 0x8000
+ *     14-15: Count of events needing PMC1
+ *
+ * P2..P8
+ *     0-13: Count of events needing PMC2..PMC8
+ */
+
+static unsigned char direct_marked_event[8] = {
+        (1<<2) | (1<<3),        /* PMC1: PM_MRK_GRP_DISP, PM_MRK_ST_CMPL */
+        (1<<3) | (1<<5),        /* PMC2: PM_THRESH_TIMEO, PM_MRK_BRU_FIN */
+        (1<<3) | (1<<5),        /* PMC3: PM_MRK_ST_CMPL_INT, PM_MRK_VMX_FIN */
+        (1<<4) | (1<<5),        /* PMC4: PM_MRK_GRP_CMPL, PM_MRK_CRU_FIN */
+        (1<<4) | (1<<5),        /* PMC5: PM_GRP_MRK, PM_MRK_GRP_TIMEO */
+        (1<<3) | (1<<4) | (1<<5),
+                /* PMC6: PM_MRK_ST_STS, PM_MRK_FXU_FIN, PM_MRK_GRP_ISSUED */
+        (1<<4) | (1<<5),        /* PMC7: PM_MRK_FPU_FIN, PM_MRK_INST_FIN */
+        (1<<4)                  /* PMC8: PM_MRK_LSU_FIN */
+};
+
+/*
+ * Returns 1 if event counts things relating to marked instructions
+ * and thus needs the MMCRA_SAMPLE_ENABLE bit set, or 0 if not.
+ */
+static int p970_marked_instr_event(u64 event)
+{
+        int pmc, psel, unit, byte, bit;
+        unsigned int mask;
+
+        pmc = (event >> PM_PMC_SH) & PM_PMC_MSK;
+        psel = event & PM_PMCSEL_MSK;
+        if (pmc) {
+                if (direct_marked_event[pmc - 1] & (1 << psel))
+                        return 1;
+                if (psel == 0)          /* add events */
+                        bit = (pmc <= 4)? pmc - 1: 8 - pmc;
+                else if (psel == 7 || psel == 13)       /* decode events */
+                        bit = 4;
+                else
+                        return 0;
+        } else
+                bit = psel;
+
+        byte = (event >> PM_BYTE_SH) & PM_BYTE_MSK;
+        unit = (event >> PM_UNIT_SH) & PM_UNIT_MSK;
+        mask = 0;
+        switch (unit) {
+        case PM_VPU:
+                mask = 0x4c;            /* byte 0 bits 2,3,6 */
+        case PM_LSU0:
+                /* byte 2 bits 0,2,3,4,6; all of byte 1 */
+                mask = 0x085dff00;
+        case PM_LSU1L:
+                mask = 0x50 << 24;      /* byte 3 bits 4,6 */
+                break;
+        }
+        return (mask >> (byte * 8 + bit)) & 1;
+}
+
+/* Masks and values for using events from the various units */
+static u64 unit_cons[PM_LASTUNIT+1][2] = {
+        [PM_FPU] =   { 0xc80000000000ull, 0x040000000000ull },
+        [PM_VPU] =   { 0xc80000000000ull, 0xc40000000000ull },
+        [PM_ISU] =   { 0x080000000000ull, 0x020000000000ull },
+        [PM_IFU] =   { 0xc80000000000ull, 0x840000000000ull },
+        [PM_IDU] =   { 0x380000000000ull, 0x010000000000ull },
+        [PM_STS] =   { 0x380000000000ull, 0x310000000000ull },
+};
+
+static int p970_get_constraint(u64 event, u64 *maskp, u64 *valp)
+{
+        int pmc, byte, unit, sh, spcsel;
+        u64 mask = 0, value = 0;
+        int grp = -1;
+
+        pmc = (event >> PM_PMC_SH) & PM_PMC_MSK;
+        if (pmc) {
+                if (pmc > 8)
+                        return -1;
+                sh = (pmc - 1) * 2;
+                mask |= 2 << sh;
+                value |= 1 << sh;
+                grp = ((pmc - 1) >> 1) & 1;
+        }
+        unit = (event >> PM_UNIT_SH) & PM_UNIT_MSK;
+        if (unit) {
+                if (unit > PM_LASTUNIT)
+                        return -1;
+                mask |= unit_cons[unit][0];
+                value |= unit_cons[unit][1];
+                byte = (event >> PM_BYTE_SH) & PM_BYTE_MSK;
+                /*
+                 * Bus events on bytes 0 and 2 can be counted
+                 * on PMC1/2/5/6; bytes 1 and 3 on PMC3/4/7/8.
+                 */
+                if (!pmc)
+                        grp = byte & 1;
+                /* Set byte lane select field */
+                mask  |= 0xfULL << (28 - 4 * byte);
+                value |= (u64)unit << (28 - 4 * byte);
+        }
+        if (grp == 0) {
+                /* increment PMC1/2/5/6 field */
+                mask  |= 0x8000000000ull;
+                value |= 0x1000000000ull;
+        } else if (grp == 1) {
+                /* increment PMC3/4/7/8 field */
+                mask  |= 0x800000000ull;
+                value |= 0x100000000ull;
+        }
+        spcsel = (event >> PM_SPCSEL_SH) & PM_SPCSEL_MSK;
+        if (spcsel) {
+                mask  |= 3ull << 48;
+                value |= (u64)spcsel << 48;
+        }
+        *maskp = mask;
+        *valp = value;
+        return 0;
+}
+
+static int p970_get_alternatives(u64 event, unsigned int flags, u64 alt[])
+{
+        alt[0] = event;
+
+        /* 2 alternatives for LSU empty */
+        if (event == 0x2002 || event == 0x3002) {
+                alt[1] = event ^ 0x1000;
+                return 2;
+        }
+                
+        return 1;
+}
+
+static int p970_compute_mmcr(u64 event[], int n_ev,
+                             unsigned int hwc[], u64 mmcr[])
+{
+        u64 mmcr0 = 0, mmcr1 = 0, mmcra = 0;
+        unsigned int pmc, unit, byte, psel;
+        unsigned int ttm, grp;
+        unsigned int pmc_inuse = 0;
+        unsigned int pmc_grp_use[2];
+        unsigned char busbyte[4];
+        unsigned char unituse[16];
+        unsigned char unitmap[] = { 0, 0<<3, 3<<3, 1<<3, 2<<3, 0|4, 3|4 };
+        unsigned char ttmuse[2];
+        unsigned char pmcsel[8];
+        int i;
+        int spcsel;
+
+        if (n_ev > 8)
+                return -1;
+
+        /* First pass to count resource use */
+        pmc_grp_use[0] = pmc_grp_use[1] = 0;
+        memset(busbyte, 0, sizeof(busbyte));
+        memset(unituse, 0, sizeof(unituse));
+        for (i = 0; i < n_ev; ++i) {
+                pmc = (event[i] >> PM_PMC_SH) & PM_PMC_MSK;
+                if (pmc) {
+                        if (pmc_inuse & (1 << (pmc - 1)))
+                                return -1;
+                        pmc_inuse |= 1 << (pmc - 1);
+                        /* count 1/2/5/6 vs 3/4/7/8 use */
+                        ++pmc_grp_use[((pmc - 1) >> 1) & 1];
+                }
+                unit = (event[i] >> PM_UNIT_SH) & PM_UNIT_MSK;
+                byte = (event[i] >> PM_BYTE_SH) & PM_BYTE_MSK;
+                if (unit) {
+                        if (unit > PM_LASTUNIT)
+                                return -1;
+                        if (!pmc)
+                                ++pmc_grp_use[byte & 1];
+                        if (busbyte[byte] && busbyte[byte] != unit)
+                                return -1;
+                        busbyte[byte] = unit;
+                        unituse[unit] = 1;
+                }
+        }
+        if (pmc_grp_use[0] > 4 || pmc_grp_use[1] > 4)
+                return -1;
+
+        /*
+         * Assign resources and set multiplexer selects.
+         *
+         * PM_ISU can go either on TTM0 or TTM1, but that's the only
+         * choice we have to deal with.
+         */
+        if (unituse[PM_ISU] &
+            (unituse[PM_FPU] | unituse[PM_IFU] | unituse[PM_VPU]))
+                unitmap[PM_ISU] = 2 | 4;        /* move ISU to TTM1 */
+        /* Set TTM[01]SEL fields. */
+        ttmuse[0] = ttmuse[1] = 0;
+        for (i = PM_FPU; i <= PM_STS; ++i) {
+                if (!unituse[i])
+                        continue;
+                ttm = unitmap[i];
+                ++ttmuse[(ttm >> 2) & 1];
+                mmcr1 |= (u64)(ttm & ~4) << MMCR1_TTM1SEL_SH;
+        }
+        /* Check only one unit per TTMx */
+        if (ttmuse[0] > 1 || ttmuse[1] > 1)
+                return -1;
+
+        /* Set byte lane select fields and TTM3SEL. */
+        for (byte = 0; byte < 4; ++byte) {
+                unit = busbyte[byte];
+                if (!unit)
+                        continue;
+                if (unit <= PM_STS)
+                        ttm = (unitmap[unit] >> 2) & 1;
+                else if (unit == PM_LSU0)
+                        ttm = 2;
+                else {
+                        ttm = 3;
+                        if (unit == PM_LSU1L && byte >= 2)
+                                mmcr1 |= 1ull << (MMCR1_TTM3SEL_SH + 3 - byte);
+                }
+                mmcr1 |= (u64)ttm << (MMCR1_TD_CP_DBG0SEL_SH - 2 * byte);
+        }
+
+        /* Second pass: assign PMCs, set PMCxSEL and PMCx_ADDER_SEL fields */
+        memset(pmcsel, 0x8, sizeof(pmcsel));    /* 8 means don't count */
+        for (i = 0; i < n_ev; ++i) {
+                pmc = (event[i] >> PM_PMC_SH) & PM_PMC_MSK;
+                unit = (event[i] >> PM_UNIT_SH) & PM_UNIT_MSK;
+                byte = (event[i] >> PM_BYTE_SH) & PM_BYTE_MSK;
+                psel = event[i] & PM_PMCSEL_MSK;
+                if (!pmc) {
+                        /* Bus event or any-PMC direct event */
+                        if (unit)
+                                psel |= 0x10 | ((byte & 2) << 2);
+                        else
+                                psel |= 8;
+                        for (pmc = 0; pmc < 8; ++pmc) {
+                                if (pmc_inuse & (1 << pmc))
+                                        continue;
+                                grp = (pmc >> 1) & 1;
+                                if (unit) {
+                                        if (grp == (byte & 1))
+                                                break;
+                                } else if (pmc_grp_use[grp] < 4) {
+                                        ++pmc_grp_use[grp];
+                                        break;
+                                }
+                        }
+                        pmc_inuse |= 1 << pmc;
+                } else {
+                        /* Direct event */
+                        --pmc;
+                        if (psel == 0 && (byte & 2))
+                                /* add events on higher-numbered bus */
+                                mmcr1 |= 1ull << mmcr1_adder_bits[pmc];
+                }
+                pmcsel[pmc] = psel;
+                hwc[i] = pmc;
+                spcsel = (event[i] >> PM_SPCSEL_SH) & PM_SPCSEL_MSK;
+                mmcr1 |= spcsel;
+                if (p970_marked_instr_event(event[i]))
+                        mmcra |= MMCRA_SAMPLE_ENABLE;
+        }
+        for (pmc = 0; pmc < 2; ++pmc)
+                mmcr0 |= pmcsel[pmc] << (MMCR0_PMC1SEL_SH - 7 * pmc);
+        for (; pmc < 8; ++pmc)
+                mmcr1 |= (u64)pmcsel[pmc] << (MMCR1_PMC3SEL_SH - 5 * (pmc - 2));
+        if (pmc_inuse & 1)
+                mmcr0 |= MMCR0_PMC1CE;
+        if (pmc_inuse & 0xfe)
+                mmcr0 |= MMCR0_PMCjCE;
+
+        mmcra |= 0x2000;        /* mark only one IOP per PPC instruction */
+
+        /* Return MMCRx values */
+        mmcr[0] = mmcr0;
+        mmcr[1] = mmcr1;
+        mmcr[2] = mmcra;
+        return 0;
+}
+
+static void p970_disable_pmc(unsigned int pmc, u64 mmcr[])
+{
+        int shift, i;
+
+        if (pmc <= 1) {
+                shift = MMCR0_PMC1SEL_SH - 7 * pmc;
+                i = 0;
+        } else {
+                shift = MMCR1_PMC3SEL_SH - 5 * (pmc - 2);
+                i = 1;
+        }
+        /*
+         * Setting the PMCxSEL field to 0x08 disables PMC x.
+         */
+        mmcr[i] = (mmcr[i] & ~(0x1fUL << shift)) | (0x08UL << shift);
+}
+
+static int ppc970_generic_events[] = {
+        [PERF_COUNT_HW_CPU_CYCLES]              = 7,
+        [PERF_COUNT_HW_INSTRUCTIONS]            = 1,
+        [PERF_COUNT_HW_CACHE_REFERENCES]        = 0x8810, /* PM_LD_REF_L1 */
+        [PERF_COUNT_HW_CACHE_MISSES]            = 0x3810, /* PM_LD_MISS_L1 */
+        [PERF_COUNT_HW_BRANCH_INSTRUCTIONS]     = 0x431,  /* PM_BR_ISSUED */
+        [PERF_COUNT_HW_BRANCH_MISSES]           = 0x327,  /* PM_GRP_BR_MPRED */
+};
+
+#define C(x)    PERF_COUNT_HW_CACHE_##x
+
+/*
+ * Table of generalized cache-related events.
+ * 0 means not supported, -1 means nonsensical, other values
+ * are event codes.
+ */
+static int ppc970_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {
+        [C(L1D)] = {            /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0x8810,         0x3810  },
+                [C(OP_WRITE)] = {       0x7810,         0x813   },
+                [C(OP_PREFETCH)] = {    0x731,          0       },
+        },
+        [C(L1I)] = {            /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0,              0       },
+                [C(OP_WRITE)] = {       -1,             -1      },
+                [C(OP_PREFETCH)] = {    0,              0       },
+        },
+        [C(LL)] = {             /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0,              0       },
+                [C(OP_WRITE)] = {       0,              0       },
+                [C(OP_PREFETCH)] = {    0x733,          0       },
+        },
+        [C(DTLB)] = {           /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0,              0x704   },
+                [C(OP_WRITE)] = {       -1,             -1      },
+                [C(OP_PREFETCH)] = {    -1,             -1      },
+        },
+        [C(ITLB)] = {           /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0,              0x700   },
+                [C(OP_WRITE)] = {       -1,             -1      },
+                [C(OP_PREFETCH)] = {    -1,             -1      },
+        },
+        [C(BPU)] = {            /*      RESULT_ACCESS   RESULT_MISS */
+                [C(OP_READ)] = {        0x431,          0x327   },
+                [C(OP_WRITE)] = {       -1,             -1      },
+                [C(OP_PREFETCH)] = {    -1,             -1      },
+        },
+};
+
+struct power_pmu ppc970_pmu = {
+        .n_counter = 8,
+        .max_alternatives = 2,
+        .add_fields = 0x001100005555ull,
+        .test_adder = 0x013300000000ull,
+        .compute_mmcr = p970_compute_mmcr,
+        .get_constraint = p970_get_constraint,
+        .get_alternatives = p970_get_alternatives,
+        .disable_pmc = p970_disable_pmc,
+        .n_generic = ARRAY_SIZE(ppc970_generic_events),
+        .generic_events = ppc970_generic_events,
+        .cache_events = &ppc970_cache_events,
+};
diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c
index 9057335fdc61..2cf915e51e7e 100644
--- a/arch/powerpc/kvm/powerpc.c
+++ b/arch/powerpc/kvm/powerpc.c
@@ -41,6 +41,12 @@ int kvm_cpu_has_interrupt(struct kvm_vcpu *v)
         return !!(v->arch.pending_exceptions);
 }
 
+int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
+{
+        /* do real check here */
+        return 1;
+}
+
 int kvm_arch_vcpu_runnable(struct kvm_vcpu *v)
 {
         return !(v->arch.msr & MSR_WE);
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index 76993941cac9..5beffc8f481e 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -29,6 +29,7 @@
 #include <linux/module.h>
 #include <linux/kprobes.h>
 #include <linux/kdebug.h>
+#include <linux/perf_counter.h>
 
 #include <asm/firmware.h>
 #include <asm/page.h>
@@ -170,6 +171,8 @@ int __kprobes do_page_fault(struct pt_regs *regs, unsigned long address,
                 die("Weird page fault", regs, SIGSEGV);
         }
 
+        perf_swcounter_event(PERF_COUNT_SW_PAGE_FAULTS, 1, 0, regs, address);
+
         /* When running in the kernel we expect faults to occur only to
          * addresses in user space.  All other faults represent errors in the
          * kernel and should generate an OOPS.  Unfortunately, in the case of an
@@ -309,6 +312,8 @@ good_area:
         }
         if (ret & VM_FAULT_MAJOR) {
                 current->maj_flt++;
+                perf_swcounter_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, 0,
+                                     regs, address);
 #ifdef CONFIG_PPC_SMLPAR
                 if (firmware_has_feature(FW_FEATURE_CMO)) {
                         preempt_disable();
@@ -316,8 +321,11 @@ good_area:
                         preempt_enable();
                 }
 #endif
-        } else
+        } else {
                 current->min_flt++;
+                perf_swcounter_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, 0,
+                                     regs, address);
+        }
         up_read(&mm->mmap_sem);
         return 0;
 
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index 9da795e49337..732ee93a8e98 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -1,6 +1,7 @@
 config PPC64
         bool "64-bit kernel"
         default n
+        select HAVE_PERF_COUNTERS
         help
           This option selects whether a 32-bit or a 64-bit kernel
           will be built.
diff --git a/arch/powerpc/sysdev/axonram.c b/arch/powerpc/sysdev/axonram.c
index 9e105cbc5e5f..a4779912a5ca 100644
--- a/arch/powerpc/sysdev/axonram.c
+++ b/arch/powerpc/sysdev/axonram.c
@@ -250,7 +250,7 @@ axon_ram_probe(struct of_device *device, const struct of_device_id *device_id)
 
         set_capacity(bank->disk, bank->size >> AXON_RAM_SECTOR_SHIFT);
         blk_queue_make_request(bank->disk->queue, axon_ram_make_request);
-        blk_queue_hardsect_size(bank->disk->queue, AXON_RAM_SECTOR_SIZE);
+        blk_queue_logical_block_size(bank->disk->queue, AXON_RAM_SECTOR_SIZE);
         add_disk(bank->disk);
 
         bank->irq_id = irq_of_parse_and_map(device->node, 0);
diff --git a/arch/s390/include/asm/kvm_host.h b/arch/s390/include/asm/kvm_host.h
index 54ea39f96ecd..a27d0d5a6f86 100644
--- a/arch/s390/include/asm/kvm_host.h
+++ b/arch/s390/include/asm/kvm_host.h
@@ -13,6 +13,8 @@
 
 #ifndef ASM_KVM_HOST_H
 #define ASM_KVM_HOST_H
+#include <linux/hrtimer.h>
+#include <linux/interrupt.h>
 #include <linux/kvm_host.h>
 #include <asm/debug.h>
 #include <asm/cpuid.h>
@@ -210,7 +212,8 @@ struct kvm_vcpu_arch {
         s390_fp_regs      guest_fpregs;
         unsigned int      guest_acrs[NUM_ACRS];
         struct kvm_s390_local_interrupt local_int;
-        struct timer_list ckc_timer;
+        struct hrtimer    ckc_timer;
+        struct tasklet_struct tasklet;
         union  {
                 cpuid_t   cpu_id;
                 u64       stidp_data;
diff --git a/arch/s390/kvm/intercept.c b/arch/s390/kvm/intercept.c
index 9d19803111ba..98997ccba501 100644
--- a/arch/s390/kvm/intercept.c
+++ b/arch/s390/kvm/intercept.c
@@ -154,17 +154,25 @@ static int handle_stop(struct kvm_vcpu *vcpu)
 static int handle_validity(struct kvm_vcpu *vcpu)
 {
         int viwhy = vcpu->arch.sie_block->ipb >> 16;
+        int rc;
+
         vcpu->stat.exit_validity++;
-        if (viwhy == 0x37) {
-                fault_in_pages_writeable((char __user *)
-                                         vcpu->kvm->arch.guest_origin +
-                                         vcpu->arch.sie_block->prefix,
-                                         PAGE_SIZE);
-                return 0;
-        }
-        VCPU_EVENT(vcpu, 2, "unhandled validity intercept code %d",
-                   viwhy);
-        return -ENOTSUPP;
+        if ((viwhy == 0x37) && (vcpu->arch.sie_block->prefix
+                <= vcpu->kvm->arch.guest_memsize - 2*PAGE_SIZE)){
+                rc = fault_in_pages_writeable((char __user *)
+                         vcpu->kvm->arch.guest_origin +
+                         vcpu->arch.sie_block->prefix,
+                         2*PAGE_SIZE);
+                if (rc)
+                        /* user will receive sigsegv, exit to user */
+                        rc = -ENOTSUPP;
+        } else
+                rc = -ENOTSUPP;
+
+        if (rc)
+                VCPU_EVENT(vcpu, 2, "unhandled validity intercept code %d",
+                           viwhy);
+        return rc;
 }
 
 static int handle_instruction(struct kvm_vcpu *vcpu)
diff --git a/arch/s390/kvm/interrupt.c b/arch/s390/kvm/interrupt.c
index 0189356fe209..f04f5301b1b4 100644
--- a/arch/s390/kvm/interrupt.c
+++ b/arch/s390/kvm/interrupt.c
@@ -12,6 +12,8 @@
 
 #include <asm/lowcore.h>
 #include <asm/uaccess.h>
+#include <linux/hrtimer.h>
+#include <linux/interrupt.h>
 #include <linux/kvm_host.h>
 #include <linux/signal.h>
 #include "kvm-s390.h"
@@ -299,13 +301,13 @@ int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu)
         }
 
         if ((!rc) && atomic_read(&fi->active)) {
-                spin_lock_bh(&fi->lock);
+                spin_lock(&fi->lock);
                 list_for_each_entry(inti, &fi->list, list)
                         if (__interrupt_is_deliverable(vcpu, inti)) {
                                 rc = 1;
                                 break;
                         }
-                spin_unlock_bh(&fi->lock);
+                spin_unlock(&fi->lock);
         }
 
         if ((!rc) && (vcpu->arch.sie_block->ckc <
@@ -318,6 +320,12 @@ int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu)
         return rc;
 }
 
+int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
+{
+        /* do real check here */
+        return 1;
+}
+
 int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
 {
         return 0;
@@ -355,14 +363,12 @@ int kvm_s390_handle_wait(struct kvm_vcpu *vcpu)
                 return 0;
         }
 
-        sltime = (vcpu->arch.sie_block->ckc - now) / (0xf4240000ul / HZ) + 1;
+        sltime = ((vcpu->arch.sie_block->ckc - now)*125)>>9;
 
-        vcpu->arch.ckc_timer.expires = jiffies + sltime;
-
-        add_timer(&vcpu->arch.ckc_timer);
-        VCPU_EVENT(vcpu, 5, "enabled wait timer:%llx jiffies", sltime);
+        hrtimer_start(&vcpu->arch.ckc_timer, ktime_set (0, sltime) , HRTIMER_MODE_REL);
+        VCPU_EVENT(vcpu, 5, "enabled wait via clock comparator: %llx ns", sltime);
 no_timer:
-        spin_lock_bh(&vcpu->arch.local_int.float_int->lock);
+        spin_lock(&vcpu->arch.local_int.float_int->lock);
         spin_lock_bh(&vcpu->arch.local_int.lock);
         add_wait_queue(&vcpu->arch.local_int.wq, &wait);
         while (list_empty(&vcpu->arch.local_int.list) &&
@@ -371,33 +377,46 @@ no_timer:
                 !signal_pending(current)) {
                 set_current_state(TASK_INTERRUPTIBLE);
                 spin_unlock_bh(&vcpu->arch.local_int.lock);
-                spin_unlock_bh(&vcpu->arch.local_int.float_int->lock);
+                spin_unlock(&vcpu->arch.local_int.float_int->lock);
                 vcpu_put(vcpu);
                 schedule();
                 vcpu_load(vcpu);
-                spin_lock_bh(&vcpu->arch.local_int.float_int->lock);
+                spin_lock(&vcpu->arch.local_int.float_int->lock);
                 spin_lock_bh(&vcpu->arch.local_int.lock);
         }
         __unset_cpu_idle(vcpu);
         __set_current_state(TASK_RUNNING);
         remove_wait_queue(&vcpu->wq, &wait);
         spin_unlock_bh(&vcpu->arch.local_int.lock);
-        spin_unlock_bh(&vcpu->arch.local_int.float_int->lock);
-        del_timer(&vcpu->arch.ckc_timer);
+        spin_unlock(&vcpu->arch.local_int.float_int->lock);
+        hrtimer_try_to_cancel(&vcpu->arch.ckc_timer);
         return 0;
 }
 
-void kvm_s390_idle_wakeup(unsigned long data)
+void kvm_s390_tasklet(unsigned long parm)
 {
-        struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
+        struct kvm_vcpu *vcpu = (struct kvm_vcpu *) parm;
 
-        spin_lock_bh(&vcpu->arch.local_int.lock);
+        spin_lock(&vcpu->arch.local_int.lock);
         vcpu->arch.local_int.timer_due = 1;
         if (waitqueue_active(&vcpu->arch.local_int.wq))
                 wake_up_interruptible(&vcpu->arch.local_int.wq);
-        spin_unlock_bh(&vcpu->arch.local_int.lock);
+        spin_unlock(&vcpu->arch.local_int.lock);
 }
 
+/*
+ * low level hrtimer wake routine. Because this runs in hardirq context
+ * we schedule a tasklet to do the real work.
+ */
+enum hrtimer_restart kvm_s390_idle_wakeup(struct hrtimer *timer)
+{
+        struct kvm_vcpu *vcpu;
+
+        vcpu = container_of(timer, struct kvm_vcpu, arch.ckc_timer);
+        tasklet_schedule(&vcpu->arch.tasklet);
+
+        return HRTIMER_NORESTART;
+}
 
 void kvm_s390_deliver_pending_interrupts(struct kvm_vcpu *vcpu)
 {
@@ -436,7 +455,7 @@ void kvm_s390_deliver_pending_interrupts(struct kvm_vcpu *vcpu)
         if (atomic_read(&fi->active)) {
                 do {
                         deliver = 0;
-                        spin_lock_bh(&fi->lock);
+                        spin_lock(&fi->lock);
                         list_for_each_entry_safe(inti, n, &fi->list, list) {
                                 if (__interrupt_is_deliverable(vcpu, inti)) {
                                         list_del(&inti->list);
@@ -447,7 +466,7 @@ void kvm_s390_deliver_pending_interrupts(struct kvm_vcpu *vcpu)
                         }
                         if (list_empty(&fi->list))
                                 atomic_set(&fi->active, 0);
-                        spin_unlock_bh(&fi->lock);
+                        spin_unlock(&fi->lock);
                         if (deliver) {
                                 __do_deliver_interrupt(vcpu, inti);
                                 kfree(inti);
@@ -512,7 +531,7 @@ int kvm_s390_inject_vm(struct kvm *kvm,
 
         mutex_lock(&kvm->lock);
         fi = &kvm->arch.float_int;
-        spin_lock_bh(&fi->lock);
+        spin_lock(&fi->lock);
         list_add_tail(&inti->list, &fi->list);
         atomic_set(&fi->active, 1);
         sigcpu = find_first_bit(fi->idle_mask, KVM_MAX_VCPUS);
@@ -529,7 +548,7 @@ int kvm_s390_inject_vm(struct kvm *kvm,
         if (waitqueue_active(&li->wq))
                 wake_up_interruptible(&li->wq);
         spin_unlock_bh(&li->lock);
-        spin_unlock_bh(&fi->lock);
+        spin_unlock(&fi->lock);
         mutex_unlock(&kvm->lock);
         return 0;
 }
diff --git a/arch/s390/kvm/kvm-s390.c b/arch/s390/kvm/kvm-s390.c
index f4d56e9939c9..10bccd1f8aee 100644
--- a/arch/s390/kvm/kvm-s390.c
+++ b/arch/s390/kvm/kvm-s390.c
@@ -15,6 +15,7 @@
 #include <linux/compiler.h>
 #include <linux/err.h>
 #include <linux/fs.h>
+#include <linux/hrtimer.h>
 #include <linux/init.h>
 #include <linux/kvm.h>
 #include <linux/kvm_host.h>
@@ -195,6 +196,10 @@ out_nokvm:
 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
 {
         VCPU_EVENT(vcpu, 3, "%s", "free cpu");
+        if (vcpu->kvm->arch.sca->cpu[vcpu->vcpu_id].sda ==
+                (__u64) vcpu->arch.sie_block)
+                vcpu->kvm->arch.sca->cpu[vcpu->vcpu_id].sda = 0;
+        smp_mb();
         free_page((unsigned long)(vcpu->arch.sie_block));
         kvm_vcpu_uninit(vcpu);
         kfree(vcpu);
@@ -283,8 +288,10 @@ int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
         vcpu->arch.sie_block->gmsor = vcpu->kvm->arch.guest_origin;
         vcpu->arch.sie_block->ecb   = 2;
         vcpu->arch.sie_block->eca   = 0xC1002001U;
-        setup_timer(&vcpu->arch.ckc_timer, kvm_s390_idle_wakeup,
-                 (unsigned long) vcpu);
+        hrtimer_init(&vcpu->arch.ckc_timer, CLOCK_REALTIME, HRTIMER_MODE_ABS);
+        tasklet_init(&vcpu->arch.tasklet, kvm_s390_tasklet,
+                     (unsigned long) vcpu);
+        vcpu->arch.ckc_timer.function = kvm_s390_idle_wakeup;
         get_cpu_id(&vcpu->arch.cpu_id);
         vcpu->arch.cpu_id.version = 0xff;
         return 0;
@@ -307,19 +314,21 @@ struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
 
         vcpu->arch.sie_block->icpua = id;
         BUG_ON(!kvm->arch.sca);
-        BUG_ON(kvm->arch.sca->cpu[id].sda);
-        kvm->arch.sca->cpu[id].sda = (__u64) vcpu->arch.sie_block;
+        if (!kvm->arch.sca->cpu[id].sda)
+                kvm->arch.sca->cpu[id].sda = (__u64) vcpu->arch.sie_block;
+        else
+                BUG_ON(!kvm->vcpus[id]); /* vcpu does already exist */
         vcpu->arch.sie_block->scaoh = (__u32)(((__u64)kvm->arch.sca) >> 32);
         vcpu->arch.sie_block->scaol = (__u32)(__u64)kvm->arch.sca;
 
         spin_lock_init(&vcpu->arch.local_int.lock);
         INIT_LIST_HEAD(&vcpu->arch.local_int.list);
         vcpu->arch.local_int.float_int = &kvm->arch.float_int;
-        spin_lock_bh(&kvm->arch.float_int.lock);
+        spin_lock(&kvm->arch.float_int.lock);
         kvm->arch.float_int.local_int[id] = &vcpu->arch.local_int;
         init_waitqueue_head(&vcpu->arch.local_int.wq);
         vcpu->arch.local_int.cpuflags = &vcpu->arch.sie_block->cpuflags;
-        spin_unlock_bh(&kvm->arch.float_int.lock);
+        spin_unlock(&kvm->arch.float_int.lock);
 
         rc = kvm_vcpu_init(vcpu, kvm, id);
         if (rc)
@@ -478,6 +487,12 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 
         vcpu_load(vcpu);
 
+        /* verify, that memory has been registered */
+        if (!vcpu->kvm->arch.guest_memsize) {
+                vcpu_put(vcpu);
+                return -EINVAL;
+        }
+
         if (vcpu->sigset_active)
                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
 
@@ -657,6 +672,8 @@ int kvm_arch_set_memory_region(struct kvm *kvm,
                                 struct kvm_memory_slot old,
                                 int user_alloc)
 {
+        int i;
+
         /* A few sanity checks. We can have exactly one memory slot which has
            to start at guest virtual zero and which has to be located at a
            page boundary in userland and which has to end at a page boundary.
@@ -664,7 +681,7 @@ int kvm_arch_set_memory_region(struct kvm *kvm,
            vmas. It is okay to mmap() and munmap() stuff in this slot after
            doing this call at any time */
 
-        if (mem->slot)
+        if (mem->slot || kvm->arch.guest_memsize)
                 return -EINVAL;
 
         if (mem->guest_phys_addr)
@@ -676,15 +693,39 @@ int kvm_arch_set_memory_region(struct kvm *kvm,
         if (mem->memory_size & (PAGE_SIZE - 1))
                 return -EINVAL;
 
+        if (!user_alloc)
+                return -EINVAL;
+
+        /* lock all vcpus */
+        for (i = 0; i < KVM_MAX_VCPUS; ++i) {
+                if (!kvm->vcpus[i])
+                        continue;
+                if (!mutex_trylock(&kvm->vcpus[i]->mutex))
+                        goto fail_out;
+        }
+
         kvm->arch.guest_origin = mem->userspace_addr;
         kvm->arch.guest_memsize = mem->memory_size;
 
-        /* FIXME: we do want to interrupt running CPUs and update their memory
-           configuration now to avoid race conditions. But hey, changing the
-           memory layout while virtual CPUs are running is usually bad
-           programming practice. */
+        /* update sie control blocks, and unlock all vcpus */
+        for (i = 0; i < KVM_MAX_VCPUS; ++i) {
+                if (kvm->vcpus[i]) {
+                        kvm->vcpus[i]->arch.sie_block->gmsor =
+                                kvm->arch.guest_origin;
+                        kvm->vcpus[i]->arch.sie_block->gmslm =
+                                kvm->arch.guest_memsize +
+                                kvm->arch.guest_origin +
+                                VIRTIODESCSPACE - 1ul;
+                        mutex_unlock(&kvm->vcpus[i]->mutex);
+                }
+        }
 
         return 0;
+
+fail_out:
+        for (; i >= 0; i--)
+                mutex_unlock(&kvm->vcpus[i]->mutex);
+        return -EINVAL;
 }
 
 void kvm_arch_flush_shadow(struct kvm *kvm)
diff --git a/arch/s390/kvm/kvm-s390.h b/arch/s390/kvm/kvm-s390.h
index 00bbe69b78da..748fee872323 100644
--- a/arch/s390/kvm/kvm-s390.h
+++ b/arch/s390/kvm/kvm-s390.h
@@ -14,6 +14,7 @@
 #ifndef ARCH_S390_KVM_S390_H
 #define ARCH_S390_KVM_S390_H
 
+#include <linux/hrtimer.h>
 #include <linux/kvm.h>
 #include <linux/kvm_host.h>
 
@@ -41,7 +42,8 @@ static inline int __cpu_is_stopped(struct kvm_vcpu *vcpu)
 }
 
 int kvm_s390_handle_wait(struct kvm_vcpu *vcpu);
-void kvm_s390_idle_wakeup(unsigned long data);
+enum hrtimer_restart kvm_s390_idle_wakeup(struct hrtimer *timer);
+void kvm_s390_tasklet(unsigned long parm);
 void kvm_s390_deliver_pending_interrupts(struct kvm_vcpu *vcpu);
 int kvm_s390_inject_vm(struct kvm *kvm,
                 struct kvm_s390_interrupt *s390int);
diff --git a/arch/s390/kvm/priv.c b/arch/s390/kvm/priv.c
index 4b88834b8dd8..93ecd06e1a74 100644
--- a/arch/s390/kvm/priv.c
+++ b/arch/s390/kvm/priv.c
@@ -204,11 +204,11 @@ static void handle_stsi_3_2_2(struct kvm_vcpu *vcpu, struct sysinfo_3_2_2 *mem)
         int cpus = 0;
         int n;
 
-        spin_lock_bh(&fi->lock);
+        spin_lock(&fi->lock);
         for (n = 0; n < KVM_MAX_VCPUS; n++)
                 if (fi->local_int[n])
                         cpus++;
-        spin_unlock_bh(&fi->lock);
+        spin_unlock(&fi->lock);
 
         /* deal with other level 3 hypervisors */
         if (stsi(mem, 3, 2, 2) == -ENOSYS)
diff --git a/arch/s390/kvm/sigp.c b/arch/s390/kvm/sigp.c
index f27dbedf0866..36678835034d 100644
--- a/arch/s390/kvm/sigp.c
+++ b/arch/s390/kvm/sigp.c
@@ -52,7 +52,7 @@ static int __sigp_sense(struct kvm_vcpu *vcpu, u16 cpu_addr,
         if (cpu_addr >= KVM_MAX_VCPUS)
                 return 3; /* not operational */
 
-        spin_lock_bh(&fi->lock);
+        spin_lock(&fi->lock);
         if (fi->local_int[cpu_addr] == NULL)
                 rc = 3; /* not operational */
         else if (atomic_read(fi->local_int[cpu_addr]->cpuflags)
@@ -64,7 +64,7 @@ static int __sigp_sense(struct kvm_vcpu *vcpu, u16 cpu_addr,
                 *reg |= SIGP_STAT_STOPPED;
                 rc = 1; /* status stored */
         }
-        spin_unlock_bh(&fi->lock);
+        spin_unlock(&fi->lock);
 
         VCPU_EVENT(vcpu, 4, "sensed status of cpu %x rc %x", cpu_addr, rc);
         return rc;
@@ -86,7 +86,7 @@ static int __sigp_emergency(struct kvm_vcpu *vcpu, u16 cpu_addr)
 
         inti->type = KVM_S390_INT_EMERGENCY;
 
-        spin_lock_bh(&fi->lock);
+        spin_lock(&fi->lock);
         li = fi->local_int[cpu_addr];
         if (li == NULL) {
                 rc = 3; /* not operational */
@@ -102,7 +102,7 @@ static int __sigp_emergency(struct kvm_vcpu *vcpu, u16 cpu_addr)
         spin_unlock_bh(&li->lock);
         rc = 0; /* order accepted */
 unlock:
-        spin_unlock_bh(&fi->lock);
+        spin_unlock(&fi->lock);
         VCPU_EVENT(vcpu, 4, "sent sigp emerg to cpu %x", cpu_addr);
         return rc;
 }
@@ -123,7 +123,7 @@ static int __sigp_stop(struct kvm_vcpu *vcpu, u16 cpu_addr, int store)
 
         inti->type = KVM_S390_SIGP_STOP;
 
-        spin_lock_bh(&fi->lock);
+        spin_lock(&fi->lock);
         li = fi->local_int[cpu_addr];
         if (li == NULL) {
                 rc = 3; /* not operational */
@@ -142,7 +142,7 @@ static int __sigp_stop(struct kvm_vcpu *vcpu, u16 cpu_addr, int store)
         spin_unlock_bh(&li->lock);
         rc = 0; /* order accepted */
 unlock:
-        spin_unlock_bh(&fi->lock);
+        spin_unlock(&fi->lock);
         VCPU_EVENT(vcpu, 4, "sent sigp stop to cpu %x", cpu_addr);
         return rc;
 }
@@ -188,7 +188,7 @@ static int __sigp_set_prefix(struct kvm_vcpu *vcpu, u16 cpu_addr, u32 address,
         if (!inti)
                 return 2; /* busy */
 
-        spin_lock_bh(&fi->lock);
+        spin_lock(&fi->lock);
         li = fi->local_int[cpu_addr];
 
         if ((cpu_addr >= KVM_MAX_VCPUS) || (li == NULL)) {
@@ -220,7 +220,7 @@ static int __sigp_set_prefix(struct kvm_vcpu *vcpu, u16 cpu_addr, u32 address,
 out_li:
         spin_unlock_bh(&li->lock);
 out_fi:
-        spin_unlock_bh(&fi->lock);
+        spin_unlock(&fi->lock);
         return rc;
 }
 
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index e7390dd0283d..586cd045e2db 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -15,6 +15,7 @@ config SUPERH
         select HAVE_IOREMAP_PROT if MMU
         select HAVE_ARCH_TRACEHOOK
         select HAVE_DMA_API_DEBUG
+        select RTC_LIB
         help
           The SuperH is a RISC processor targeted for use in embedded systems
           and consumer electronics; it was also used in the Sega Dreamcast
@@ -74,14 +75,18 @@ config GENERIC_IOMAP
         bool
 
 config GENERIC_TIME
-        def_bool n
+        def_bool y
 
 config GENERIC_CLOCKEVENTS
-        def_bool n
+        def_bool y
 
 config GENERIC_CLOCKEVENTS_BROADCAST
         bool
 
+config GENERIC_CMOS_UPDATE
+        def_bool y
+        depends on SH_SH03 || SH_DREAMCAST
+
 config GENERIC_LOCKBREAK
         def_bool y
         depends on SMP && PREEMPT
@@ -112,6 +117,12 @@ config SYS_SUPPORTS_PCI
 config SYS_SUPPORTS_CMT
         bool
 
+config SYS_SUPPORTS_MTU2
+        bool
+
+config SYS_SUPPORTS_TMU
+        bool
+
 config STACKTRACE_SUPPORT
         def_bool y
 
@@ -157,13 +168,14 @@ config CPU_SH3
         bool
         select CPU_HAS_INTEVT
         select CPU_HAS_SR_RB
+        select SYS_SUPPORTS_TMU
 
 config CPU_SH4
         bool
         select CPU_HAS_INTEVT
         select CPU_HAS_SR_RB
-        select CPU_HAS_PTEA if !CPU_SH4A || CPU_SHX2
         select CPU_HAS_FPU if !CPU_SH4AL_DSP
+        select SYS_SUPPORTS_TMU
 
 config CPU_SH4A
         bool
@@ -177,6 +189,7 @@ config CPU_SH4AL_DSP
 config CPU_SH5
         bool
         select CPU_HAS_FPU
+        select SYS_SUPPORTS_TMU
 
 config CPU_SHX2
         bool
@@ -210,27 +223,32 @@ config CPU_SUBTYPE_SH7201
         bool "Support SH7201 processor"
         select CPU_SH2A
         select CPU_HAS_FPU
+        select SYS_SUPPORTS_MTU2
  
 config CPU_SUBTYPE_SH7203
         bool "Support SH7203 processor"
         select CPU_SH2A
         select CPU_HAS_FPU
         select SYS_SUPPORTS_CMT
+        select SYS_SUPPORTS_MTU2
 
 config CPU_SUBTYPE_SH7206
         bool "Support SH7206 processor"
         select CPU_SH2A
         select SYS_SUPPORTS_CMT
+        select SYS_SUPPORTS_MTU2
 
 config CPU_SUBTYPE_SH7263
         bool "Support SH7263 processor"
         select CPU_SH2A
         select CPU_HAS_FPU
         select SYS_SUPPORTS_CMT
+        select SYS_SUPPORTS_MTU2
 
 config CPU_SUBTYPE_MXG
         bool "Support MX-G processor"
         select CPU_SH2A
+        select SYS_SUPPORTS_MTU2
         help
           Select MX-G if running on an R8A03022BG part.
 
@@ -283,6 +301,7 @@ config CPU_SUBTYPE_SH7720
         bool "Support SH7720 processor"
         select CPU_SH3
         select CPU_HAS_DSP
+        select SYS_SUPPORTS_CMT
         help
           Select SH7720 if you have a SH3-DSP SH7720 CPU.
 
@@ -290,6 +309,7 @@ config CPU_SUBTYPE_SH7721
         bool "Support SH7721 processor"
         select CPU_SH3
         select CPU_HAS_DSP
+        select SYS_SUPPORTS_CMT
         help
           Select SH7721 if you have a SH3-DSP SH7721 CPU.
 
@@ -347,6 +367,16 @@ config CPU_SUBTYPE_SH7723
         help
           Select SH7723 if you have an SH-MobileR2 CPU.
 
+config CPU_SUBTYPE_SH7724
+        bool "Support SH7724 processor"
+        select CPU_SH4A
+        select CPU_SHX2
+        select ARCH_SHMOBILE
+        select ARCH_SPARSEMEM_ENABLE
+        select SYS_SUPPORTS_CMT
+        help
+          Select SH7724 if you have an SH-MobileR2R CPU.
+
 config CPU_SUBTYPE_SH7763
         bool "Support SH7763 processor"
         select CPU_SH4A
@@ -442,48 +472,26 @@ source "arch/sh/boards/Kconfig"
 
 menu "Timer and clock configuration"
 
-config SH_TMU
-        bool "TMU timer support"
-        depends on CPU_SH3 || CPU_SH4
+config SH_TIMER_TMU
+        bool "TMU timer driver"
+        depends on SYS_SUPPORTS_TMU
         default y
-        select GENERIC_TIME
-        select GENERIC_CLOCKEVENTS
         help
-          This enables the use of the TMU as the system timer.
+          This enables the build of the TMU timer driver.
 
-config SH_CMT
-        bool "CMT timer support"
-        depends on SYS_SUPPORTS_CMT && CPU_SH2
+config SH_TIMER_CMT
+        bool "CMT timer driver"
+        depends on SYS_SUPPORTS_CMT
         default y
         help
-          This enables the use of the CMT as the system timer.
+          This enables build of the CMT timer driver.
 
-#
-# Support for the new-style CMT driver. This will replace SH_CMT
-# once its other dependencies are merged.
-#
-config SH_TIMER_CMT
-        bool "CMT clockevents driver"
-        depends on SYS_SUPPORTS_CMT && !SH_CMT
-        select GENERIC_CLOCKEVENTS
-
-config SH_MTU2
-        bool "MTU2 timer support"
-        depends on CPU_SH2A
+config SH_TIMER_MTU2
+        bool "MTU2 timer driver"
+        depends on SYS_SUPPORTS_MTU2
         default y
         help
-          This enables the use of the MTU2 as the system timer.
-
-config SH_TIMER_IRQ
-        int
-        default "28" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785 || \
-                        CPU_SUBTYPE_SH7763
-        default "86" if CPU_SUBTYPE_SH7619
-        default "140" if CPU_SUBTYPE_SH7206
-        default "142" if CPU_SUBTYPE_SH7203 && SH_CMT
-        default "153" if CPU_SUBTYPE_SH7203 && SH_MTU2
-        default "238" if CPU_SUBTYPE_MXG
-        default "16"
+          This enables build of the MTU2 timer driver.
 
 config SH_PCLK_FREQ
         int "Peripheral clock frequency (in Hz)"
@@ -494,7 +502,7 @@ config SH_PCLK_FREQ
                               CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \
                               CPU_SUBTYPE_SH7203 || CPU_SUBTYPE_SH7206 || \
                               CPU_SUBTYPE_SH7263 || CPU_SUBTYPE_MXG    || \
-                              CPU_SUBTYPE_SH7786
+                              CPU_SUBTYPE_SH7786 || CPU_SUBTYPE_SH7724
         default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
         default "66000000" if CPU_SUBTYPE_SH4_202
         default "50000000"
@@ -503,6 +511,13 @@ config SH_PCLK_FREQ
           This is necessary for determining the reference clock value on
           platforms lacking an RTC.
 
+config SH_CLK_CPG
+        def_bool y
+
+config SH_CLK_CPG_LEGACY
+        depends on SH_CLK_CPG
+        def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE
+
 config SH_CLK_MD
         int "CPU Mode Pin Setting"
         depends on CPU_SH2
@@ -663,27 +678,54 @@ config GUSA_RB
           LLSC, this should be more efficient than the other alternative of
           disabling interrupts around the atomic sequence.
 
+config SPARSE_IRQ
+        bool "Support sparse irq numbering"
+        depends on EXPERIMENTAL
+        help
+          This enables support for sparse irqs. This is useful in general
+          as most CPUs have a fairly sparse array of IRQ vectors, which
+          the irq_desc then maps directly on to. Systems with a high
+          number of off-chip IRQs will want to treat this as
+          experimental until they have been independently verified.
+
+          If you don't know what to do here, say N.
+
 endmenu
 
 menu "Boot options"
 
 config ZERO_PAGE_OFFSET
-        hex "Zero page offset"
-        default "0x00004000" if SH_SH03
-        default "0x00010000" if PAGE_SIZE_64KB
+        hex
+        default "0x00010000" if PAGE_SIZE_64KB || SH_RTS7751R2D || \
+                                SH_7751_SOLUTION_ENGINE
+        default "0x00004000" if PAGE_SIZE_16KB || SH_SH03
         default "0x00002000" if PAGE_SIZE_8KB
         default "0x00001000"
         help
           This sets the default offset of zero page.
 
 config BOOT_LINK_OFFSET
-        hex "Link address offset for booting"
+        hex
+        default "0x00210000" if SH_SHMIN
+        default "0x00400000" if SH_CAYMAN
+        default "0x00810000" if SH_7780_SOLUTION_ENGINE
+        default "0x009e0000" if SH_TITAN
+        default "0x01800000" if SH_SDK7780
+        default "0x02000000" if SH_EDOSK7760
         default "0x00800000"
         help
           This option allows you to set the link address offset of the zImage.
           This can be useful if you are on a board which has a small amount of
           memory.
 
+config ENTRY_OFFSET
+        hex
+        default "0x00001000" if PAGE_SIZE_4KB
+        default "0x00002000" if PAGE_SIZE_8KB
+        default "0x00004000" if PAGE_SIZE_16KB
+        default "0x00010000" if PAGE_SIZE_64KB
+        default "0x00000000"
+
 config UBC_WAKEUP
         bool "Wakeup UBC on startup"
         depends on CPU_SH4 && !CPU_SH4A
diff --git a/arch/sh/Kconfig.cpu b/arch/sh/Kconfig.cpu
index c7d704381a6d..cd6e3ea598d5 100644
--- a/arch/sh/Kconfig.cpu
+++ b/arch/sh/Kconfig.cpu
@@ -76,11 +76,6 @@ config SPECULATIVE_EXECUTION
 
           If unsure, say N.
 
-config SH64_USER_MISALIGNED_FIXUP
-        def_bool y
-        prompt "Fixup misaligned loads/stores occurring in user mode"
-        depends on SUPERH64
-
 config SH64_ID2815_WORKAROUND
         bool "Include workaround for SH5-101 cut2 silicon defect ID2815"
         depends on CPU_SUBTYPE_SH5_101
@@ -101,9 +96,6 @@ config CPU_HAS_SR_RB
           See <file:Documentation/sh/register-banks.txt> for further
           information on SR.RB and register banking in the kernel in general.
 
-config CPU_HAS_PTEA
-        bool
-
 config CPU_HAS_PTEAEX
         bool
 
diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug
index 0d62681f72a0..8179cc9be9a4 100644
--- a/arch/sh/Kconfig.debug
+++ b/arch/sh/Kconfig.debug
@@ -38,10 +38,10 @@ config EARLY_SCIF_CONSOLE_PORT
         default "0xffe00000" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7763 || \
                                 CPU_SUBTYPE_SH7722 || CPU_SUBTYPE_SH7366 || \
                                 CPU_SUBTYPE_SH7343
-        default "0xffe80000" if CPU_SH4
         default "0xffea0000" if CPU_SUBTYPE_SH7785
         default "0xfffe8000" if CPU_SUBTYPE_SH7203
         default "0xfffe9800" if CPU_SUBTYPE_SH7206 || CPU_SUBTYPE_SH7263
+        default "0xffe80000" if CPU_SH4
         default "0x00000000"
 
 config EARLY_PRINTK
@@ -92,7 +92,7 @@ config 4KSTACKS
 
 config IRQSTACKS
         bool "Use separate kernel stacks when processing interrupts"
-        depends on DEBUG_KERNEL && SUPERH32
+        depends on DEBUG_KERNEL && SUPERH32 && BROKEN
         help
           If you say Y here the kernel will use separate kernel stacks
           for handling hard and soft interrupts.  This can help avoid
@@ -122,27 +122,8 @@ config SH_NO_BSS_INIT
           For all other cases, say N. If this option seems perplexing, or
           you aren't sure, say N.
 
-config MORE_COMPILE_OPTIONS
-        bool "Add any additional compile options"
-        help
-          If you want to add additional CFLAGS to the kernel build, enable this
-          option and then enter what you would like to add in the next question.
-          Note however that -g is already appended with the selection of KGDB.
-
-config COMPILE_OPTIONS
-        string "Additional compile arguments"
-        depends on MORE_COMPILE_OPTIONS
-
 config SH64_SR_WATCH
         bool "Debug: set SR.WATCH to enable hardware watchpoints and trace"
         depends on SUPERH64
 
-config POOR_MANS_STRACE
-        bool "Debug: enable rudimentary strace facility"
-        depends on SUPERH64
-        help
-          This option allows system calls to be traced to the console.  It also
-          aids in detecting kernel stack underflow.  It is useful for debugging
-          early-userland problems (e.g. init incurring fatal exceptions.)
-
 endmenu
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index bece1f7535f2..75d049b03f7e 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -70,9 +70,6 @@ cflags-$(CONFIG_CPU_LITTLE_ENDIAN)	+= -ml
 cflags-y        += $(call cc-option,-mno-fdpic)
 cflags-y        += $(isaflags-y) -ffreestanding
 
-cflags-$(CONFIG_MORE_COMPILE_OPTIONS)   += \
-        $(shell echo $(CONFIG_COMPILE_OPTIONS) | sed -e 's/"//g')
-
 OBJCOPYFLAGS    := -O binary -R .note -R .note.gnu.build-id -R .comment \
                    -R .stab -R .stabstr -S
 
@@ -85,7 +82,6 @@ defaultimage-$(CONFIG_SH_7206_SOLUTION_ENGINE)	:= vmlinux
 defaultimage-$(CONFIG_SH_7619_SOLUTION_ENGINE)  := vmlinux
 
 # Set some sensible Kbuild defaults
-KBUILD_DEFCONFIG        := shx3_defconfig
 KBUILD_IMAGE            := $(defaultimage-y)
 
 #
@@ -93,26 +89,38 @@ KBUILD_IMAGE		:= $(defaultimage-y)
 # error messages during linking.
 #
 ifdef CONFIG_SUPERH32
-UTS_MACHINE     := sh
-LDFLAGS_vmlinux += -e _stext
+UTS_MACHINE             := sh
+BITS                    := 32
+LDFLAGS_vmlinux         += -e _stext
+KBUILD_DEFCONFIG        := shx3_defconfig
 else
-UTS_MACHINE     := sh64
-LDFLAGS_vmlinux += --defsym phys_stext=_stext-$(CONFIG_PAGE_OFFSET) \
-                   --defsym phys_stext_shmedia=phys_stext+1 \
-                   -e phys_stext_shmedia
+UTS_MACHINE             := sh64
+BITS                    := 64
+LDFLAGS_vmlinux         += --defsym phys_stext=_stext-$(CONFIG_PAGE_OFFSET) \
+                           --defsym phys_stext_shmedia=phys_stext+1 \
+                           -e phys_stext_shmedia
+KBUILD_DEFCONFIG        := cayman_defconfig
+endif
+
+ifneq ($(SUBARCH),$(ARCH))
+  ifeq ($(CROSS_COMPILE),)
+    CROSS_COMPILE := $(call cc-cross-prefix, $(UTS_MACHINE)-linux-  $(UTS_MACHINE)-linux-gnu-  $(UTS_MACHINE)-unknown-linux-gnu-)
+  endif
 endif
 
 ifdef CONFIG_CPU_LITTLE_ENDIAN
-LDFLAGS_vmlinux         += --defsym 'jiffies=jiffies_64'
+ld-bfd                  := elf32-$(UTS_MACHINE)-linux
+LDFLAGS_vmlinux         += --defsym 'jiffies=jiffies_64' --oformat $(ld-bfd)
 LDFLAGS                 += -EL
 else
-LDFLAGS_vmlinux         += --defsym 'jiffies=jiffies_64+4'
+ld-bfd                  := elf32-$(UTS_MACHINE)big-linux
+LDFLAGS_vmlinux         += --defsym 'jiffies=jiffies_64+4' --oformat $(ld-bfd)
 LDFLAGS                 += -EB
 endif
 
-head-y                  := arch/sh/kernel/init_task.o
-head-$(CONFIG_SUPERH32) += arch/sh/kernel/head_32.o
-head-$(CONFIG_SUPERH64) += arch/sh/kernel/head_64.o
+export ld-bfd BITS
+
+head-y  := arch/sh/kernel/init_task.o arch/sh/kernel/head_$(BITS).o
 
 core-y                          += arch/sh/kernel/ arch/sh/mm/ arch/sh/boards/
 core-$(CONFIG_SH_FPU_EMU)       += arch/sh/math-emu/
@@ -193,10 +201,11 @@ zImage uImage uImage.srec vmlinux.srec: vmlinux
 
 compressed: zImage
 
-archprepare: maketools arch/sh/lib64/syscalltab.h
+archprepare: maketools
 
 archclean:
         $(Q)$(MAKE) $(clean)=$(boot)
+        $(Q)$(MAKE) $(clean)=arch/sh/kernel/vsyscall
 
 define archhelp
         @echo '* zImage                    - Compressed kernel image'
@@ -205,34 +214,4 @@ define archhelp
         @echo '  uImage.srec               - Create an S-record for U-Boot'
 endef
 
-define filechk_gen-syscalltab
-       (set -e; \
-        echo "/*"; \
-        echo " * DO NOT MODIFY."; \
-        echo " *"; \
-        echo " * This file was generated by arch/sh/Makefile"; \
-        echo " * Any changes will be reverted at build time."; \
-        echo " */"; \
-        echo ""; \
-        echo "#ifndef __SYSCALLTAB_H"; \
-        echo "#define __SYSCALLTAB_H"; \
-        echo ""; \
-        echo "#include <linux/kernel.h>"; \
-        echo ""; \
-        echo "struct syscall_info {"; \
-        echo "  const char *name;"; \
-        echo "} syscall_info_table[] = {"; \
-        sed -e '/^.*\.long /!d;s//      { "/;s/\(\([^/]*\)\/\)\{1\}.*/\2/; \
-                s/[ \t]*$$//g;s/$$/" },/;s/\("\)sys_/\1/g'; \
-        echo "};"; \
-        echo ""; \
-        echo "#define NUM_SYSCALL_INFO_ENTRIES ARRAY_SIZE(syscall_info_table)";\
-        echo ""; \
-        echo "#endif /* __SYSCALLTAB_H */" )
-endef
-
-arch/sh/lib64/syscalltab.h: arch/sh/kernel/syscalls_64.S
-        $(call filechk,gen-syscalltab)
-
-CLEAN_FILES += arch/sh/lib64/syscalltab.h \
-               include/asm-sh/machtypes.h
+CLEAN_FILES += include/asm-sh/machtypes.h
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index dcc1af8a2cfe..1c91b1f565d5 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -46,6 +46,15 @@ config SH_7722_SOLUTION_ENGINE
           Select 7722 SolutionEngine if configuring for a Hitachi SH772
           evaluation board.
 
+config SH_7724_SOLUTION_ENGINE
+        bool "SolutionEngine7724"
+        select SOLUTION_ENGINE
+        depends on CPU_SUBTYPE_SH7724
+        select ARCH_REQUIRE_GPIOLIB
+        help
+          Select 7724 SolutionEngine if configuring for a Hitachi SH7724
+          evaluation board.
+
 config SH_7751_SOLUTION_ENGINE
         bool "SolutionEngine7751"
         select SOLUTION_ENGINE
@@ -121,7 +130,7 @@ config SH_RTS7751R2D
         bool "RTS7751R2D"
         depends on CPU_SUBTYPE_SH7751R
         select SYS_SUPPORTS_PCI
-        select IO_TRAPPED
+        select IO_TRAPPED if MMU
         help
           Select RTS7751R2D if configuring for a Renesas Technology
           Sales SH-Graphics board.
@@ -145,13 +154,13 @@ config SH_HIGHLANDER
         bool "Highlander"
         depends on CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785
         select SYS_SUPPORTS_PCI
-        select IO_TRAPPED
+        select IO_TRAPPED if MMU
 
 config SH_SH7785LCR
         bool "SH7785LCR"
         depends on CPU_SUBTYPE_SH7785
         select SYS_SUPPORTS_PCI
-        select IO_TRAPPED
+        select IO_TRAPPED if MMU
 
 config SH_SH7785LCR_29BIT_PHYSMAPS
         bool "SH7785LCR 29bit physmaps"
diff --git a/arch/sh/boards/board-ap325rxa.c b/arch/sh/boards/board-ap325rxa.c
index f2a29641b6a3..1c4d83ef2a47 100644
--- a/arch/sh/boards/board-ap325rxa.c
+++ b/arch/sh/boards/board-ap325rxa.c
@@ -535,6 +535,18 @@ static int __init ap325rxa_devices_setup(void)
 }
 device_initcall(ap325rxa_devices_setup);
 
+/* Return the board specific boot mode pin configuration */
+static int ap325rxa_mode_pins(void)
+{
+        /* MD0=0, MD1=0, MD2=0: Clock Mode 0
+         * MD3=0: 16-bit Area0 Bus Width
+         * MD5=1: Little Endian
+         * TSTMD=1, MD8=1: Test Mode Disabled
+         */
+        return MODE_PIN5 | MODE_PIN8;
+}
+
 static struct sh_machine_vector mv_ap325rxa __initmv = {
         .mv_name = "AP-325RXA",
+        .mv_mode_pins = ap325rxa_mode_pins,
 };
diff --git a/arch/sh/boards/board-sh7785lcr.c b/arch/sh/boards/board-sh7785lcr.c
index 6f94f17adc46..7be56fb06c1f 100644
--- a/arch/sh/boards/board-sh7785lcr.c
+++ b/arch/sh/boards/board-sh7785lcr.c
@@ -2,12 +2,12 @@
  * Renesas Technology Corp. R0P7785LC0011RL Support.
  *
  * Copyright (C) 2008  Yoshihiro Shimoda
+ * Copyright (C) 2009  Paul Mundt
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  */
-
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/sm501.h>
@@ -19,8 +19,12 @@
 #include <linux/i2c-pca-platform.h>
 #include <linux/i2c-algo-pca.h>
 #include <linux/irq.h>
-#include <asm/heartbeat.h>
+#include <linux/clk.h>
+#include <linux/errno.h>
 #include <mach/sh7785lcr.h>
+#include <asm/heartbeat.h>
+#include <asm/clock.h>
+#include <cpu/sh7785.h>
 
 /*
  * NOTE: This board has 2 physical memory maps.
@@ -273,6 +277,20 @@ void __init init_sh7785lcr_IRQ(void)
         plat_irq_setup_pins(IRQ_MODE_IRQ3210);
 }
 
+static int sh7785lcr_clk_init(void)
+{
+        struct clk *clk;
+        int ret;
+
+        clk = clk_get(NULL, "extal");
+        if (!clk || IS_ERR(clk))
+                return PTR_ERR(clk);
+        ret = clk_set_rate(clk, 33333333);
+        clk_put(clk);
+
+        return ret;
+}
+
 static void sh7785lcr_power_off(void)
 {
         unsigned char *p;
@@ -303,12 +321,34 @@ static void __init sh7785lcr_setup(char **cmdline_p)
         writel(0x000307c2, sm501_reg);
 }
 
+/* Return the board specific boot mode pin configuration */
+static int sh7785lcr_mode_pins(void)
+{
+        int value = 0;
+
+        /* These are the factory default settings of S1 and S2.
+         * If you change these dip switches then you will need to
+         * adjust the values below as well.
+         */
+        value |= MODE_PIN4; /* Clock Mode 16 */
+        value |= MODE_PIN5; /* 32-bit Area0 bus width */
+        value |= MODE_PIN6; /* 32-bit Area0 bus width */
+        value |= MODE_PIN7; /* Area 0 SRAM interface [fixed] */
+        value |= MODE_PIN8; /* Little Endian */
+        value |= MODE_PIN9; /* Master Mode */
+        value |= MODE_PIN14; /* No PLL step-up */
+
+        return value;
+}
+
 /*
  * The Machine Vector
  */
 static struct sh_machine_vector mv_sh7785lcr __initmv = {
         .mv_name                = "SH7785LCR",
         .mv_setup               = sh7785lcr_setup,
+        .mv_clk_init            = sh7785lcr_clk_init,
         .mv_init_irq            = init_sh7785lcr_IRQ,
+        .mv_mode_pins           = sh7785lcr_mode_pins,
 };
 
diff --git a/arch/sh/boards/mach-cayman/Makefile b/arch/sh/boards/mach-cayman/Makefile
index cafe1ac3b29c..00fa3eaecb1b 100644
--- a/arch/sh/boards/mach-cayman/Makefile
+++ b/arch/sh/boards/mach-cayman/Makefile
@@ -1,4 +1,4 @@
 #
 # Makefile for the Hitachi Cayman specific parts of the kernel
 #
-obj-y := setup.o irq.o
+obj-y := setup.o irq.o panic.o
diff --git a/arch/sh/boards/mach-cayman/irq.c b/arch/sh/boards/mach-cayman/irq.c
index da62ad516994..33f770856319 100644
--- a/arch/sh/boards/mach-cayman/irq.c
+++ b/arch/sh/boards/mach-cayman/irq.c
@@ -142,26 +142,11 @@ int cayman_irq_demux(int evt)
         return irq;
 }
 
-#if defined(CONFIG_PROC_FS) && defined(CONFIG_SYSCTL)
-int cayman_irq_describe(char* p, int irq)
-{
-        if (irq < NR_INTC_IRQS) {
-                return intc_irq_describe(p, irq);
-        } else if (irq < NR_INTC_IRQS + 8) {
-                return sprintf(p, "(SMSC %d)", irq - NR_INTC_IRQS);
-        } else if ((irq >= NR_INTC_IRQS + 24) && (irq < NR_INTC_IRQS + 32)) {
-                return sprintf(p, "(PCI2 %d)", irq - (NR_INTC_IRQS + 24));
-        }
-
-        return 0;
-}
-#endif
-
 void init_cayman_irq(void)
 {
         int i;
 
-        epld_virt = onchip_remap(EPLD_BASE, 1024, "EPLD");
+        epld_virt = (unsigned long)ioremap_nocache(EPLD_BASE, 1024);
         if (!epld_virt) {
                 printk(KERN_ERR "Cayman IRQ: Unable to remap EPLD\n");
                 return;
diff --git a/arch/sh/boards/mach-cayman/panic.c b/arch/sh/boards/mach-cayman/panic.c
new file mode 100644
index 000000000000..d1e67306d07c
--- /dev/null
+++ b/arch/sh/boards/mach-cayman/panic.c
@@ -0,0 +1,49 @@
+/*
+ * Copyright (C) 2003  Richard Curnow, SuperH UK Limited
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <cpu/registers.h>
+
+/* THIS IS A PHYSICAL ADDRESS */
+#define HDSP2534_ADDR (0x04002100)
+
+static void poor_mans_delay(void)
+{
+        int i;
+
+        for (i = 0; i < 2500000; i++)
+                cpu_relax();
+}
+
+static void show_value(unsigned long x)
+{
+        int i;
+        unsigned nibble;
+        for (i = 0; i < 8; i++) {
+                nibble = ((x >> (i * 4)) & 0xf);
+
+                __raw_writeb(nibble + ((nibble > 9) ? 55 : 48),
+                          HDSP2534_ADDR + 0xe0 + ((7 - i) << 2));
+        }
+}
+
+void
+panic_handler(unsigned long panicPC, unsigned long panicSSR,
+              unsigned long panicEXPEVT)
+{
+        while (1) {
+                /* This piece of code displays the PC on the LED display */
+                show_value(panicPC);
+                poor_mans_delay();
+                show_value(panicSSR);
+                poor_mans_delay();
+                show_value(panicEXPEVT);
+                poor_mans_delay();
+        }
+}
diff --git a/arch/sh/boards/mach-cayman/setup.c b/arch/sh/boards/mach-cayman/setup.c
index e7f9cc5f2ff1..7e8216ac31bd 100644
--- a/arch/sh/boards/mach-cayman/setup.c
+++ b/arch/sh/boards/mach-cayman/setup.c
@@ -102,7 +102,7 @@ static int __init smsc_superio_setup(void)
 {
         unsigned char devid, devrev;
 
-        smsc_superio_virt = onchip_remap(SMSC_SUPERIO_BASE, 1024, "SMSC SuperIO");
+        smsc_superio_virt = (unsigned long)ioremap_nocache(SMSC_SUPERIO_BASE, 1024);
         if (!smsc_superio_virt) {
                 panic("Unable to remap SMSC SuperIO\n");
         }
diff --git a/arch/sh/boards/mach-dreamcast/setup.c b/arch/sh/boards/mach-dreamcast/setup.c
index d1bee4884cd6..ebe99227d4e6 100644
--- a/arch/sh/boards/mach-dreamcast/setup.c
+++ b/arch/sh/boards/mach-dreamcast/setup.c
@@ -30,7 +30,6 @@
 
 extern struct irq_chip systemasic_int;
 extern void aica_time_init(void);
-extern int gapspci_init(void);
 extern int systemasic_irq_demux(int);
 
 static void __init dreamcast_setup(char **cmdline_p)
@@ -51,11 +50,6 @@ static void __init dreamcast_setup(char **cmdline_p)
                                          handle_level_irq);
 
         board_time_init = aica_time_init;
-
-#ifdef CONFIG_PCI
-        if (gapspci_init() < 0)
-                printk(KERN_WARNING "GAPSPCI was not detected.\n");
-#endif
 }
 
 static struct sh_machine_vector mv_dreamcast __initmv = {
diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c
index 1ee1de0bc1c3..6ed401cd3156 100644
--- a/arch/sh/boards/mach-migor/setup.c
+++ b/arch/sh/boards/mach-migor/setup.c
@@ -584,3 +584,22 @@ static int __init migor_devices_setup(void)
         return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices));
 }
 __initcall(migor_devices_setup);
+
+/* Return the board specific boot mode pin configuration */
+static int migor_mode_pins(void)
+{
+        /* MD0=1, MD1=1, MD2=0: Clock Mode 3
+         * MD3=0: 16-bit Area0 Bus Width
+         * MD5=1: Little Endian
+         * TSTMD=1, MD8=0: Test Mode Disabled
+         */
+        return MODE_PIN0 | MODE_PIN1 | MODE_PIN5;
+}
+
+/*
+ * The Machine Vector
+ */
+static struct sh_machine_vector mv_migor __initmv = {
+        .mv_name                = "Migo-R",
+        .mv_mode_pins           = migor_mode_pins,
+};
diff --git a/arch/sh/boards/mach-r2d/setup.c b/arch/sh/boards/mach-r2d/setup.c
index c585be00956e..a625ecb93e47 100644
--- a/arch/sh/boards/mach-r2d/setup.c
+++ b/arch/sh/boards/mach-r2d/setup.c
@@ -10,6 +10,9 @@
  */
 #include <linux/init.h>
 #include <linux/platform_device.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/physmap.h>
 #include <linux/ata_platform.h>
 #include <linux/sm501.h>
 #include <linux/sm501-regs.h>
@@ -181,6 +184,50 @@ static struct platform_device sm501_device = {
         .resource       = sm501_resources,
 };
 
+static struct mtd_partition r2d_partitions[] = {
+        {
+                .name           = "U-Boot",
+                .offset         = 0x00000000,
+                .size           = 0x00040000,
+                .mask_flags     = MTD_WRITEABLE,
+        }, {
+                .name           = "Environment",
+                .offset         = MTDPART_OFS_NXTBLK,
+                .size           = 0x00040000,
+                .mask_flags     = MTD_WRITEABLE,
+        }, {
+                .name           = "Kernel",
+                .offset         = MTDPART_OFS_NXTBLK,
+                .size           = 0x001c0000,
+        }, {
+                .name           = "Flash_FS",
+                .offset         = MTDPART_OFS_NXTBLK,
+                .size           = MTDPART_SIZ_FULL,
+        }
+};
+
+static struct physmap_flash_data flash_data = {
+        .width          = 2,
+        .nr_parts       = ARRAY_SIZE(r2d_partitions),
+        .parts          = r2d_partitions,
+};
+
+static struct resource flash_resource = {
+        .start          = 0x00000000,
+        .end            = 0x02000000,
+        .flags          = IORESOURCE_MEM,
+};
+
+static struct platform_device flash_device = {
+        .name           = "physmap-flash",
+        .id             = -1,
+        .resource       = &flash_resource,
+        .num_resources  = 1,
+        .dev            = {
+                .platform_data = &flash_data,
+        },
+};
+
 static struct platform_device *rts7751r2d_devices[] __initdata = {
         &sm501_device,
         &heartbeat_device,
@@ -203,6 +250,9 @@ static int __init rts7751r2d_devices_setup(void)
         if (register_trapped_io(&cf_trapped_io) == 0)
                 platform_device_register(&cf_ide_device);
 
+        if (mach_is_r2d_plus())
+                platform_device_register(&flash_device);
+
         spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
 
         return platform_add_devices(rts7751r2d_devices,
diff --git a/arch/sh/boards/mach-se/7724/Makefile b/arch/sh/boards/mach-se/7724/Makefile
new file mode 100644
index 000000000000..349cbd6ce82d
--- /dev/null
+++ b/arch/sh/boards/mach-se/7724/Makefile
@@ -0,0 +1,10 @@
+#
+# Makefile for the HITACHI UL SolutionEngine 7724 specific parts of the kernel
+#
+# This file is subject to the terms and conditions of the GNU General Public
+# License.  See the file "COPYING" in the main directory of this archive
+# for more details.
+#
+#
+
+obj-y    := setup.o irq.o
\ No newline at end of file
diff --git a/arch/sh/boards/mach-se/7724/irq.c b/arch/sh/boards/mach-se/7724/irq.c
new file mode 100644
index 000000000000..f76cf3b49f23
--- /dev/null
+++ b/arch/sh/boards/mach-se/7724/irq.c
@@ -0,0 +1,139 @@
+/*
+ * linux/arch/sh/boards/se/7724/irq.c
+ *
+ * Copyright (C) 2009 Renesas Solutions Corp.
+ *
+ * Kuninori Morimoto <morimoto.kuninori@renesas.com>
+ *
+ * Based on  linux/arch/sh/boards/se/7722/irq.c
+ * Copyright (C) 2007  Nobuhiro Iwamatsu
+ *
+ * Hitachi UL SolutionEngine 7724 Support.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/interrupt.h>
+#include <asm/irq.h>
+#include <asm/io.h>
+#include <mach-se/mach/se7724.h>
+
+struct fpga_irq {
+        unsigned long  sraddr;
+        unsigned long  mraddr;
+        unsigned short mask;
+        unsigned int   base;
+};
+
+static unsigned int fpga2irq(unsigned int irq)
+{
+        if (irq >= IRQ0_BASE &&
+            irq <= IRQ0_END)
+                return IRQ0_IRQ;
+        else if (irq >= IRQ1_BASE &&
+                 irq <= IRQ1_END)
+                return IRQ1_IRQ;
+        else
+                return IRQ2_IRQ;
+}
+
+static struct fpga_irq get_fpga_irq(unsigned int irq)
+{
+        struct fpga_irq set;
+
+        switch (irq) {
+        case IRQ0_IRQ:
+                set.sraddr = IRQ0_SR;
+                set.mraddr = IRQ0_MR;
+                set.mask   = IRQ0_MASK;
+                set.base   = IRQ0_BASE;
+                break;
+        case IRQ1_IRQ:
+                set.sraddr = IRQ1_SR;
+                set.mraddr = IRQ1_MR;
+                set.mask   = IRQ1_MASK;
+                set.base   = IRQ1_BASE;
+                break;
+        default:
+                set.sraddr = IRQ2_SR;
+                set.mraddr = IRQ2_MR;
+                set.mask   = IRQ2_MASK;
+                set.base   = IRQ2_BASE;
+                break;
+        }
+
+        return set;
+}
+
+static void disable_se7724_irq(unsigned int irq)
+{
+        struct fpga_irq set = get_fpga_irq(fpga2irq(irq));
+        unsigned int bit = irq - set.base;
+        ctrl_outw(ctrl_inw(set.mraddr) | 0x0001 << bit, set.mraddr);
+}
+
+static void enable_se7724_irq(unsigned int irq)
+{
+        struct fpga_irq set = get_fpga_irq(fpga2irq(irq));
+        unsigned int bit = irq - set.base;
+        ctrl_outw(ctrl_inw(set.mraddr) & ~(0x0001 << bit), set.mraddr);
+}
+
+static struct irq_chip se7724_irq_chip __read_mostly = {
+        .name           = "SE7724-FPGA",
+        .mask           = disable_se7724_irq,
+        .unmask         = enable_se7724_irq,
+        .mask_ack       = disable_se7724_irq,
+};
+
+static void se7724_irq_demux(unsigned int irq, struct irq_desc *desc)
+{
+        struct fpga_irq set = get_fpga_irq(irq);
+        unsigned short intv = ctrl_inw(set.sraddr);
+        struct irq_desc *ext_desc;
+        unsigned int ext_irq = set.base;
+
+        intv &= set.mask;
+
+        while (intv) {
+                if (intv & 0x0001) {
+                        ext_desc = irq_desc + ext_irq;
+                        handle_level_irq(ext_irq, ext_desc);
+                }
+                intv >>= 1;
+                ext_irq++;
+        }
+}
+
+/*
+ * Initialize IRQ setting
+ */
+void __init init_se7724_IRQ(void)
+{
+        int i;
+
+        ctrl_outw(0xffff, IRQ0_MR);  /* mask all */
+        ctrl_outw(0xffff, IRQ1_MR);  /* mask all */
+        ctrl_outw(0xffff, IRQ2_MR);  /* mask all */
+        ctrl_outw(0x0000, IRQ0_SR);  /* clear irq */
+        ctrl_outw(0x0000, IRQ1_SR);  /* clear irq */
+        ctrl_outw(0x0000, IRQ2_SR);  /* clear irq */
+        ctrl_outw(0x002a, IRQ_MODE); /* set irq type */
+
+        for (i = 0; i < SE7724_FPGA_IRQ_NR; i++)
+                set_irq_chip_and_handler_name(SE7724_FPGA_IRQ_BASE + i,
+                                              &se7724_irq_chip,
+                                              handle_level_irq, "level");
+
+        set_irq_chained_handler(IRQ0_IRQ, se7724_irq_demux);
+        set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);
+
+        set_irq_chained_handler(IRQ1_IRQ, se7724_irq_demux);
+        set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW);
+
+        set_irq_chained_handler(IRQ2_IRQ, se7724_irq_demux);
+        set_irq_type(IRQ2_IRQ, IRQ_TYPE_LEVEL_LOW);
+}
diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c
new file mode 100644
index 000000000000..9cd04bd558b8
--- /dev/null
+++ b/arch/sh/boards/mach-se/7724/setup.c
@@ -0,0 +1,448 @@
+/*
+ * linux/arch/sh/boards/se/7724/setup.c
+ *
+ * Copyright (C) 2009 Renesas Solutions Corp.
+ *
+ * Kuninori Morimoto <morimoto.kuninori@renesas.com>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/init.h>
+#include <linux/device.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/physmap.h>
+#include <linux/delay.h>
+#include <linux/smc91x.h>
+#include <linux/gpio.h>
+#include <linux/input.h>
+#include <video/sh_mobile_lcdc.h>
+#include <media/sh_mobile_ceu.h>
+#include <asm/io.h>
+#include <asm/heartbeat.h>
+#include <asm/sh_keysc.h>
+#include <cpu/sh7724.h>
+#include <mach-se/mach/se7724.h>
+
+/*
+ * SWx    1234 5678
+ * ------------------------------------
+ * SW31 : 1001 1100    : default
+ * SW32 : 0111 1111    : use on board flash
+ *
+ * SW41 : abxx xxxx  -> a = 0 : Analog  monitor
+ *                          1 : Digital monitor
+ *                      b = 0 : VGA
+ *                          1 : SVGA
+ */
+
+/* Heartbeat */
+static struct heartbeat_data heartbeat_data = {
+        .regsize = 16,
+};
+
+static struct resource heartbeat_resources[] = {
+        [0] = {
+                .start  = PA_LED,
+                .end    = PA_LED,
+                .flags  = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device heartbeat_device = {
+        .name           = "heartbeat",
+        .id             = -1,
+        .dev = {
+                .platform_data = &heartbeat_data,
+        },
+        .num_resources  = ARRAY_SIZE(heartbeat_resources),
+        .resource       = heartbeat_resources,
+};
+
+/* LAN91C111 */
+static struct smc91x_platdata smc91x_info = {
+        .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
+};
+
+static struct resource smc91x_eth_resources[] = {
+        [0] = {
+                .name   = "SMC91C111" ,
+                .start  = 0x1a300300,
+                .end    = 0x1a30030f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ0_SMC,
+                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
+        },
+};
+
+static struct platform_device smc91x_eth_device = {
+        .name   = "smc91x",
+        .num_resources  = ARRAY_SIZE(smc91x_eth_resources),
+        .resource       = smc91x_eth_resources,
+        .dev    = {
+                .platform_data  = &smc91x_info,
+        },
+};
+
+/* MTD */
+static struct mtd_partition nor_flash_partitions[] = {
+        {
+                .name = "uboot",
+                .offset = 0,
+                .size = (1 * 1024 * 1024),
+                .mask_flags = MTD_WRITEABLE,    /* Read-only */
+        }, {
+                .name = "kernel",
+                .offset = MTDPART_OFS_APPEND,
+                .size = (2 * 1024 * 1024),
+        }, {
+                .name = "free-area",
+                .offset = MTDPART_OFS_APPEND,
+                .size = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct physmap_flash_data nor_flash_data = {
+        .width          = 2,
+        .parts          = nor_flash_partitions,
+        .nr_parts       = ARRAY_SIZE(nor_flash_partitions),
+};
+
+static struct resource nor_flash_resources[] = {
+        [0] = {
+                .name   = "NOR Flash",
+                .start  = 0x00000000,
+                .end    = 0x01ffffff,
+                .flags  = IORESOURCE_MEM,
+        }
+};
+
+static struct platform_device nor_flash_device = {
+        .name           = "physmap-flash",
+        .resource       = nor_flash_resources,
+        .num_resources  = ARRAY_SIZE(nor_flash_resources),
+        .dev            = {
+                .platform_data = &nor_flash_data,
+        },
+};
+
+/* LCDC */
+static struct sh_mobile_lcdc_info lcdc_info = {
+        .clock_source = LCDC_CLK_EXTERNAL,
+        .ch[0] = {
+                .chan = LCDC_CHAN_MAINLCD,
+                .bpp = 16,
+                .clock_divider = 1,
+                .lcd_cfg = {
+                        .name = "LB070WV1",
+                        .sync = 0, /* hsync and vsync are active low */
+                },
+                .lcd_size_cfg = { /* 7.0 inch */
+                        .width = 152,
+                        .height = 91,
+                },
+                .board_cfg = {
+                },
+        }
+};
+
+static struct resource lcdc_resources[] = {
+        [0] = {
+                .name   = "LCDC",
+                .start  = 0xfe940000,
+                .end    = 0xfe941fff,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 106,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device lcdc_device = {
+        .name           = "sh_mobile_lcdc_fb",
+        .num_resources  = ARRAY_SIZE(lcdc_resources),
+        .resource       = lcdc_resources,
+        .dev            = {
+                .platform_data  = &lcdc_info,
+        },
+};
+
+/* CEU0 */
+static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
+        .flags = SH_CEU_FLAG_USE_8BIT_BUS,
+};
+
+static struct resource ceu0_resources[] = {
+        [0] = {
+                .name   = "CEU0",
+                .start  = 0xfe910000,
+                .end    = 0xfe91009f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 52,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                /* place holder for contiguous memory */
+        },
+};
+
+static struct platform_device ceu0_device = {
+        .name           = "sh_mobile_ceu",
+        .id             = 0, /* "ceu0" clock */
+        .num_resources  = ARRAY_SIZE(ceu0_resources),
+        .resource       = ceu0_resources,
+        .dev    = {
+                .platform_data  = &sh_mobile_ceu0_info,
+        },
+};
+
+/* CEU1 */
+static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
+        .flags = SH_CEU_FLAG_USE_8BIT_BUS,
+};
+
+static struct resource ceu1_resources[] = {
+        [0] = {
+                .name   = "CEU1",
+                .start  = 0xfe914000,
+                .end    = 0xfe91409f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 63,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                /* place holder for contiguous memory */
+        },
+};
+
+static struct platform_device ceu1_device = {
+        .name           = "sh_mobile_ceu",
+        .id             = 1, /* "ceu1" clock */
+        .num_resources  = ARRAY_SIZE(ceu1_resources),
+        .resource       = ceu1_resources,
+        .dev    = {
+                .platform_data  = &sh_mobile_ceu1_info,
+        },
+};
+
+/* KEYSC */
+static struct sh_keysc_info keysc_info = {
+        .mode = SH_KEYSC_MODE_1,
+        .scan_timing = 10,
+        .delay = 50,
+        .keycodes = {
+                KEY_1, KEY_2, KEY_3, KEY_4, KEY_5,
+                KEY_6, KEY_7, KEY_8, KEY_9, KEY_A,
+                KEY_B, KEY_C, KEY_D, KEY_E, KEY_F,
+                KEY_G, KEY_H, KEY_I, KEY_K, KEY_L,
+                KEY_M, KEY_N, KEY_O, KEY_P, KEY_Q,
+                KEY_R, KEY_S, KEY_T, KEY_U, KEY_V,
+        },
+};
+
+static struct resource keysc_resources[] = {
+        [0] = {
+                .start  = 0x1a204000,
+                .end    = 0x1a20400f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ0_KEY,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device keysc_device = {
+        .name           = "sh_keysc",
+        .id             = 0, /* "keysc0" clock */
+        .num_resources  = ARRAY_SIZE(keysc_resources),
+        .resource       = keysc_resources,
+        .dev    = {
+                .platform_data  = &keysc_info,
+        },
+};
+
+static struct platform_device *ms7724se_devices[] __initdata = {
+        &heartbeat_device,
+        &smc91x_eth_device,
+        &lcdc_device,
+        &nor_flash_device,
+        &ceu0_device,
+        &ceu1_device,
+        &keysc_device,
+};
+
+#define SW4140    0xBA201000
+#define FPGA_OUT  0xBA200400
+#define PORT_HIZA 0xA4050158
+
+#define SW41_A    0x0100
+#define SW41_B    0x0200
+#define SW41_C    0x0400
+#define SW41_D    0x0800
+#define SW41_E    0x1000
+#define SW41_F    0x2000
+#define SW41_G    0x4000
+#define SW41_H    0x8000
+static int __init devices_setup(void)
+{
+        u16 sw = ctrl_inw(SW4140); /* select camera, monitor */
+
+        /* Reset Release */
+        ctrl_outw(ctrl_inw(FPGA_OUT) &
+                  ~((1 << 1)  | /* LAN */
+                    (1 << 6)  | /* VIDEO DAC */
+                    (1 << 12)), /* USB0 */
+                  FPGA_OUT);
+
+        /* enable IRQ 0,1,2 */
+        gpio_request(GPIO_FN_INTC_IRQ0, NULL);
+        gpio_request(GPIO_FN_INTC_IRQ1, NULL);
+        gpio_request(GPIO_FN_INTC_IRQ2, NULL);
+
+        /* enable SCIFA3 */
+        gpio_request(GPIO_FN_SCIF3_I_SCK, NULL);
+        gpio_request(GPIO_FN_SCIF3_I_RXD, NULL);
+        gpio_request(GPIO_FN_SCIF3_I_TXD, NULL);
+        gpio_request(GPIO_FN_SCIF3_I_CTS, NULL);
+        gpio_request(GPIO_FN_SCIF3_I_RTS, NULL);
+
+        /* enable LCDC */
+        gpio_request(GPIO_FN_LCDD23,   NULL);
+        gpio_request(GPIO_FN_LCDD22,   NULL);
+        gpio_request(GPIO_FN_LCDD21,   NULL);
+        gpio_request(GPIO_FN_LCDD20,   NULL);
+        gpio_request(GPIO_FN_LCDD19,   NULL);
+        gpio_request(GPIO_FN_LCDD18,   NULL);
+        gpio_request(GPIO_FN_LCDD17,   NULL);
+        gpio_request(GPIO_FN_LCDD16,   NULL);
+        gpio_request(GPIO_FN_LCDD15,   NULL);
+        gpio_request(GPIO_FN_LCDD14,   NULL);
+        gpio_request(GPIO_FN_LCDD13,   NULL);
+        gpio_request(GPIO_FN_LCDD12,   NULL);
+        gpio_request(GPIO_FN_LCDD11,   NULL);
+        gpio_request(GPIO_FN_LCDD10,   NULL);
+        gpio_request(GPIO_FN_LCDD9,    NULL);
+        gpio_request(GPIO_FN_LCDD8,    NULL);
+        gpio_request(GPIO_FN_LCDD7,    NULL);
+        gpio_request(GPIO_FN_LCDD6,    NULL);
+        gpio_request(GPIO_FN_LCDD5,    NULL);
+        gpio_request(GPIO_FN_LCDD4,    NULL);
+        gpio_request(GPIO_FN_LCDD3,    NULL);
+        gpio_request(GPIO_FN_LCDD2,    NULL);
+        gpio_request(GPIO_FN_LCDD1,    NULL);
+        gpio_request(GPIO_FN_LCDD0,    NULL);
+        gpio_request(GPIO_FN_LCDDISP,  NULL);
+        gpio_request(GPIO_FN_LCDHSYN,  NULL);
+        gpio_request(GPIO_FN_LCDDCK,   NULL);
+        gpio_request(GPIO_FN_LCDVSYN,  NULL);
+        gpio_request(GPIO_FN_LCDDON,   NULL);
+        gpio_request(GPIO_FN_LCDVEPWC, NULL);
+        gpio_request(GPIO_FN_LCDVCPWC, NULL);
+        gpio_request(GPIO_FN_LCDRD,    NULL);
+        gpio_request(GPIO_FN_LCDLCLK,  NULL);
+        ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA);
+
+        /* enable CEU0 */
+        gpio_request(GPIO_FN_VIO0_D15, NULL);
+        gpio_request(GPIO_FN_VIO0_D14, NULL);
+        gpio_request(GPIO_FN_VIO0_D13, NULL);
+        gpio_request(GPIO_FN_VIO0_D12, NULL);
+        gpio_request(GPIO_FN_VIO0_D11, NULL);
+        gpio_request(GPIO_FN_VIO0_D10, NULL);
+        gpio_request(GPIO_FN_VIO0_D9,  NULL);
+        gpio_request(GPIO_FN_VIO0_D8,  NULL);
+        gpio_request(GPIO_FN_VIO0_D7,  NULL);
+        gpio_request(GPIO_FN_VIO0_D6,  NULL);
+        gpio_request(GPIO_FN_VIO0_D5,  NULL);
+        gpio_request(GPIO_FN_VIO0_D4,  NULL);
+        gpio_request(GPIO_FN_VIO0_D3,  NULL);
+        gpio_request(GPIO_FN_VIO0_D2,  NULL);
+        gpio_request(GPIO_FN_VIO0_D1,  NULL);
+        gpio_request(GPIO_FN_VIO0_D0,  NULL);
+        gpio_request(GPIO_FN_VIO0_VD,  NULL);
+        gpio_request(GPIO_FN_VIO0_CLK, NULL);
+        gpio_request(GPIO_FN_VIO0_FLD, NULL);
+        gpio_request(GPIO_FN_VIO0_HD,  NULL);
+        platform_resource_setup_memory(&ceu0_device, "ceu", 4 << 20);
+
+        /* enable CEU1 */
+        gpio_request(GPIO_FN_VIO1_D7,  NULL);
+        gpio_request(GPIO_FN_VIO1_D6,  NULL);
+        gpio_request(GPIO_FN_VIO1_D5,  NULL);
+        gpio_request(GPIO_FN_VIO1_D4,  NULL);
+        gpio_request(GPIO_FN_VIO1_D3,  NULL);
+        gpio_request(GPIO_FN_VIO1_D2,  NULL);
+        gpio_request(GPIO_FN_VIO1_D1,  NULL);
+        gpio_request(GPIO_FN_VIO1_D0,  NULL);
+        gpio_request(GPIO_FN_VIO1_FLD, NULL);
+        gpio_request(GPIO_FN_VIO1_HD,  NULL);
+        gpio_request(GPIO_FN_VIO1_VD,  NULL);
+        gpio_request(GPIO_FN_VIO1_CLK, NULL);
+        platform_resource_setup_memory(&ceu1_device, "ceu", 4 << 20);
+
+        /* KEYSC */
+        gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
+        gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
+        gpio_request(GPIO_FN_KEYIN4,      NULL);
+        gpio_request(GPIO_FN_KEYIN3,      NULL);
+        gpio_request(GPIO_FN_KEYIN2,      NULL);
+        gpio_request(GPIO_FN_KEYIN1,      NULL);
+        gpio_request(GPIO_FN_KEYIN0,      NULL);
+        gpio_request(GPIO_FN_KEYOUT3,     NULL);
+        gpio_request(GPIO_FN_KEYOUT2,     NULL);
+        gpio_request(GPIO_FN_KEYOUT1,     NULL);
+        gpio_request(GPIO_FN_KEYOUT0,     NULL);
+
+        if (sw & SW41_B) {
+                /* SVGA */
+                lcdc_info.ch[0].lcd_cfg.xres         = 800;
+                lcdc_info.ch[0].lcd_cfg.yres         = 600;
+                lcdc_info.ch[0].lcd_cfg.left_margin  = 142;
+                lcdc_info.ch[0].lcd_cfg.right_margin = 52;
+                lcdc_info.ch[0].lcd_cfg.hsync_len    = 96;
+                lcdc_info.ch[0].lcd_cfg.upper_margin = 24;
+                lcdc_info.ch[0].lcd_cfg.lower_margin = 2;
+                lcdc_info.ch[0].lcd_cfg.vsync_len    = 2;
+        } else {
+                /* VGA */
+                lcdc_info.ch[0].lcd_cfg.xres         = 640;
+                lcdc_info.ch[0].lcd_cfg.yres         = 480;
+                lcdc_info.ch[0].lcd_cfg.left_margin  = 105;
+                lcdc_info.ch[0].lcd_cfg.right_margin = 50;
+                lcdc_info.ch[0].lcd_cfg.hsync_len    = 96;
+                lcdc_info.ch[0].lcd_cfg.upper_margin = 33;
+                lcdc_info.ch[0].lcd_cfg.lower_margin = 10;
+                lcdc_info.ch[0].lcd_cfg.vsync_len    = 2;
+        }
+
+        if (sw & SW41_A) {
+                /* Digital monitor */
+                lcdc_info.ch[0].interface_type = RGB18;
+                lcdc_info.ch[0].flags          = 0;
+        } else {
+                /* Analog monitor */
+                lcdc_info.ch[0].interface_type = RGB24;
+                lcdc_info.ch[0].flags          = LCDC_FLAGS_DWPOL;
+        }
+
+        return platform_add_devices(ms7724se_devices,
+                                ARRAY_SIZE(ms7724se_devices));
+}
+device_initcall(devices_setup);
+
+static struct sh_machine_vector mv_ms7724se __initmv = {
+        .mv_name        = "ms7724se",
+        .mv_init_irq    = init_se7724_IRQ,
+        .mv_nr_irqs     = SE7724_FPGA_IRQ_BASE + SE7724_FPGA_IRQ_NR,
+};
diff --git a/arch/sh/boards/mach-se/7751/Makefile b/arch/sh/boards/mach-se/7751/Makefile
index dbc29f3a9de5..e6f4341bfe6e 100644
--- a/arch/sh/boards/mach-se/7751/Makefile
+++ b/arch/sh/boards/mach-se/7751/Makefile
@@ -3,5 +3,3 @@
 #
 
 obj-y    := setup.o io.o irq.o
-
-obj-$(CONFIG_PCI) += pci.o
diff --git a/arch/sh/boards/mach-se/7751/io.c b/arch/sh/boards/mach-se/7751/io.c
index 6287ae570319..6e75bd4459e5 100644
--- a/arch/sh/boards/mach-se/7751/io.c
+++ b/arch/sh/boards/mach-se/7751/io.c
@@ -34,8 +34,6 @@ unsigned char sh7751se_inb(unsigned long port)
 {
         if (PXSEG(port))
                 return *(volatile unsigned char *)port;
-        else if (is_pci_ioaddr(port))
-                return *(volatile unsigned char *)pci_ioaddr(port);
         else
                 return (*port2adr(port)) & 0xff;
 }
@@ -46,8 +44,6 @@ unsigned char sh7751se_inb_p(unsigned long port)
 
         if (PXSEG(port))
                 v = *(volatile unsigned char *)port;
-        else if (is_pci_ioaddr(port))
-                v = *(volatile unsigned char *)pci_ioaddr(port);
         else
                 v = (*port2adr(port)) & 0xff;
         ctrl_delay();
@@ -58,8 +54,6 @@ unsigned short sh7751se_inw(unsigned long port)
 {
         if (PXSEG(port))
                 return *(volatile unsigned short *)port;
-        else if (is_pci_ioaddr(port))
-                return *(volatile unsigned short *)pci_ioaddr(port);
         else if (port >= 0x2000)
                 return *port2adr(port);
         else
@@ -71,8 +65,6 @@ unsigned int sh7751se_inl(unsigned long port)
 {
         if (PXSEG(port))
                 return *(volatile unsigned long *)port;
-        else if (is_pci_ioaddr(port))
-                return *(volatile unsigned int *)pci_ioaddr(port);
         else if (port >= 0x2000)
                 return *port2adr(port);
         else
@@ -85,8 +77,6 @@ void sh7751se_outb(unsigned char value, unsigned long port)
 
         if (PXSEG(port))
                 *(volatile unsigned char *)port = value;
-        else if (is_pci_ioaddr(port))
-                *((unsigned char*)pci_ioaddr(port)) = value;
         else
                 *(port2adr(port)) = value;
 }
@@ -95,8 +85,6 @@ void sh7751se_outb_p(unsigned char value, unsigned long port)
 {
         if (PXSEG(port))
                 *(volatile unsigned char *)port = value;
-        else if (is_pci_ioaddr(port))
-                *((unsigned char*)pci_ioaddr(port)) = value;
         else
                 *(port2adr(port)) = value;
         ctrl_delay();
@@ -106,8 +94,6 @@ void sh7751se_outw(unsigned short value, unsigned long port)
 {
         if (PXSEG(port))
                 *(volatile unsigned short *)port = value;
-        else if (is_pci_ioaddr(port))
-                *((unsigned short *)pci_ioaddr(port)) = value;
         else if (port >= 0x2000)
                 *port2adr(port) = value;
         else
@@ -118,8 +104,6 @@ void sh7751se_outl(unsigned int value, unsigned long port)
 {
         if (PXSEG(port))
                 *(volatile unsigned long *)port = value;
-        else if (is_pci_ioaddr(port))
-                *((unsigned long*)pci_ioaddr(port)) = value;
         else
                 maybebadio(port);
 }
diff --git a/arch/sh/boards/mach-se/7751/pci.c b/arch/sh/boards/mach-se/7751/pci.c
deleted file mode 100644
index 203b2923fe7f..000000000000
--- a/arch/sh/boards/mach-se/7751/pci.c
+++ /dev/null
@@ -1,147 +0,0 @@
-/*
- * linux/arch/sh/boards/se/7751/pci.c
- *
- * Author:  Ian DaSilva (idasilva@mvista.com)
- *
- * Highly leveraged from pci-bigsur.c, written by Dustin McIntire.
- *
- * May be copied or modified under the terms of the GNU General Public
- * License.  See linux/COPYING for more information.
- *
- * PCI initialization for the Hitachi SH7751 Solution Engine board (MS7751SE01)
- */
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/pci.h>
-
-#include <asm/io.h>
-#include "../../../drivers/pci/pci-sh7751.h"
-
-#define PCIMCR_MRSET_OFF        0xBFFFFFFF
-#define PCIMCR_RFSH_OFF         0xFFFFFFFB
-
-/*
- * Only long word accesses of the PCIC's internal local registers and the
- * configuration registers from the CPU is supported.
- */
-#define PCIC_WRITE(x,v) writel((v), PCI_REG(x))
-#define PCIC_READ(x) readl(PCI_REG(x))
-
-/*
- * Description:  This function sets up and initializes the pcic, sets
- * up the BARS, maps the DRAM into the address space etc, etc.
- */
-int __init pcibios_init_platform(void)
-{
-   unsigned long bcr1, wcr1, wcr2, wcr3, mcr;
-   unsigned short bcr2;
-
-   /*
-    * Initialize the slave bus controller on the pcic.  The values used
-    * here should not be hardcoded, but they should be taken from the bsc
-    * on the processor, to make this function as generic as possible.
-    * (i.e. Another sbc may usr different SDRAM timing settings -- in order
-    * for the pcic to work, its settings need to be exactly the same.)
-    */
-   bcr1 = (*(volatile unsigned long*)(SH7751_BCR1));
-   bcr2 = (*(volatile unsigned short*)(SH7751_BCR2));
-   wcr1 = (*(volatile unsigned long*)(SH7751_WCR1));
-   wcr2 = (*(volatile unsigned long*)(SH7751_WCR2));
-   wcr3 = (*(volatile unsigned long*)(SH7751_WCR3));
-   mcr = (*(volatile unsigned long*)(SH7751_MCR));
-
-   bcr1 = bcr1 | 0x00080000;  /* Enable Bit 19, BREQEN */
-   (*(volatile unsigned long*)(SH7751_BCR1)) = bcr1;   
-
-   bcr1 = bcr1 | 0x40080000;  /* Enable Bit 19 BREQEN, set PCIC to slave */
-   PCIC_WRITE(SH7751_PCIBCR1, bcr1);     /* PCIC BCR1 */
-   PCIC_WRITE(SH7751_PCIBCR2, bcr2);     /* PCIC BCR2 */
-   PCIC_WRITE(SH7751_PCIWCR1, wcr1);     /* PCIC WCR1 */
-   PCIC_WRITE(SH7751_PCIWCR2, wcr2);     /* PCIC WCR2 */
-   PCIC_WRITE(SH7751_PCIWCR3, wcr3);     /* PCIC WCR3 */
-   mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF;
-   PCIC_WRITE(SH7751_PCIMCR, mcr);      /* PCIC MCR */
-
-
-   /* Enable all interrupts, so we know what to fix */
-   PCIC_WRITE(SH7751_PCIINTM, 0x0000c3ff);
-   PCIC_WRITE(SH7751_PCIAINTM, 0x0000380f);
-
-   /* Set up standard PCI config registers */
-   PCIC_WRITE(SH7751_PCICONF1,  0xF39000C7); /* Bus Master, Mem & I/O access */
-   PCIC_WRITE(SH7751_PCICONF2,  0x00000000); /* PCI Class code & Revision ID */
-   PCIC_WRITE(SH7751_PCICONF4,  0xab000001); /* PCI I/O address (local regs) */
-   PCIC_WRITE(SH7751_PCICONF5,  0x0c000000); /* PCI MEM address (local RAM)  */
-   PCIC_WRITE(SH7751_PCICONF6,  0xd0000000); /* PCI MEM address (unused)     */
-   PCIC_WRITE(SH7751_PCICONF11, 0x35051054); /* PCI Subsystem ID & Vendor ID */
-   PCIC_WRITE(SH7751_PCILSR0, 0x03f00000);   /* MEM (full 64M exposed)       */
-   PCIC_WRITE(SH7751_PCILSR1, 0x00000000);   /* MEM (unused)                 */
-   PCIC_WRITE(SH7751_PCILAR0, 0x0c000000);   /* MEM (direct map from PCI)    */
-   PCIC_WRITE(SH7751_PCILAR1, 0x00000000);   /* MEM (unused)                 */
-
-   /* Now turn it on... */
-   PCIC_WRITE(SH7751_PCICR, 0xa5000001);
-
-   /*
-    * Set PCIMBR and PCIIOBR here, assuming a single window
-    * (16M MEM, 256K IO) is enough.  If a larger space is
-    * needed, the readx/writex and inx/outx functions will
-    * have to do more (e.g. setting registers for each call).
-    */
-
-   /*
-    * Set the MBR so PCI address is one-to-one with window,
-    * meaning all calls go straight through... use BUG_ON to
-    * catch erroneous assumption.
-    */
-   BUG_ON(PCIBIOS_MIN_MEM != SH7751_PCI_MEMORY_BASE);
-
-   PCIC_WRITE(SH7751_PCIMBR, PCIBIOS_MIN_MEM);
-
-   /* Set IOBR for window containing area specified in pci.h */
-   PCIC_WRITE(SH7751_PCIIOBR, (PCIBIOS_MIN_IO & SH7751_PCIIOBR_MASK));
-
-   /* All done, may as well say so... */
-   printk("SH7751 PCI: Finished initialization of the PCI controller\n");
-
-   return 1;
-}
-
-int __init pcibios_map_platform_irq(u8 slot, u8 pin)
-{
-        switch (slot) {
-        case 0: return 13;
-        case 1: return 13;      /* AMD Ethernet controller */
-        case 2: return -1;
-        case 3: return -1;
-        case 4: return -1;
-        default:
-                printk("PCI: Bad IRQ mapping request for slot %d\n", slot);
-                return -1;
-        }
-}
-
-static struct resource sh7751_io_resource = {
-        .name   = "SH7751 IO",
-        .start  = SH7751_PCI_IO_BASE,
-        .end    = SH7751_PCI_IO_BASE + SH7751_PCI_IO_SIZE - 1,
-        .flags  = IORESOURCE_IO
-};
-
-static struct resource sh7751_mem_resource = {
-        .name   = "SH7751 mem",
-        .start  = SH7751_PCI_MEMORY_BASE,
-        .end    = SH7751_PCI_MEMORY_BASE + SH7751_PCI_MEM_SIZE - 1,
-        .flags  = IORESOURCE_MEM
-};
-
-extern struct pci_ops sh7751_pci_ops;
-
-struct pci_channel board_pci_channels[] = {
-        { &sh7751_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff },
-        { NULL, NULL, NULL, 0, 0 },
-};
-
diff --git a/arch/sh/boards/mach-se/7780/irq.c b/arch/sh/boards/mach-se/7780/irq.c
index 66ad292c9fc3..b8d43b638fcf 100644
--- a/arch/sh/boards/mach-se/7780/irq.c
+++ b/arch/sh/boards/mach-se/7780/irq.c
@@ -12,10 +12,13 @@
 #include <linux/init.h>
 #include <linux/irq.h>
 #include <linux/interrupt.h>
-#include <asm/irq.h>
-#include <asm/io.h>
+#include <linux/irq.h>
+#include <linux/io.h>
 #include <mach-se/mach/se7780.h>
 
+#define INTC_BASE       0xffd00000
+#define INTC_ICR1       (INTC_BASE+0x1c)
+
 /*
  * Initialize IRQ setting
  */
@@ -43,4 +46,24 @@ void __init init_se7780_IRQ(void)
         ctrl_outw((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3);
 
         plat_irq_setup_pins(IRQ_MODE_IRQ); /* install handlers for IRQ0-7 */
+
+        /* ICR1: detect low level(for 2ndcut) */
+        ctrl_outl(0xAAAA0000, INTC_ICR1);
+
+        /*
+         * FPGA PCISEL register initialize
+         *
+         *  CPU  || SLOT1 | SLOT2 | S-ATA | USB
+         *  -------------------------------------
+         *  INTA || INTA  | INTD  |  --   | INTB
+         *  -------------------------------------
+         *  INTB || INTB  | INTA  |  --   | INTC
+         *  -------------------------------------
+         *  INTC || INTC  | INTB  | INTA  |  --
+         *  -------------------------------------
+         *  INTD || INTD  | INTC  |  --   | INTA
+         *  -------------------------------------
+         */
+        ctrl_outw(0x0013, FPGA_PCI_INTSEL1);
+        ctrl_outw(0xE402, FPGA_PCI_INTSEL2);
 }
diff --git a/arch/sh/boards/mach-se/Makefile b/arch/sh/boards/mach-se/Makefile
index 2de42bae4b4f..b537e238c6bc 100644
--- a/arch/sh/boards/mach-se/Makefile
+++ b/arch/sh/boards/mach-se/Makefile
@@ -7,3 +7,4 @@ obj-$(CONFIG_SH_7751_SOLUTION_ENGINE)	+= 7751/
 obj-$(CONFIG_SH_7780_SOLUTION_ENGINE)   += 7780/
 obj-$(CONFIG_SH_7343_SOLUTION_ENGINE)   += 7343/
 obj-$(CONFIG_SH_7721_SOLUTION_ENGINE)   += 7721/
+obj-$(CONFIG_SH_7724_SOLUTION_ENGINE)   += 7724/
diff --git a/arch/sh/boards/mach-sh03/rtc.c b/arch/sh/boards/mach-sh03/rtc.c
index 0a9266bb51c5..a8b9f844ab5b 100644
--- a/arch/sh/boards/mach-sh03/rtc.c
+++ b/arch/sh/boards/mach-sh03/rtc.c
@@ -35,13 +35,13 @@
 #define RTC_BUSY        1
 #define RTC_STOP        2
 
-extern spinlock_t rtc_lock;
+static DEFINE_SPINLOCK(sh03_rtc_lock);
 
 unsigned long get_cmos_time(void)
 {
         unsigned int year, mon, day, hour, min, sec;
 
-        spin_lock(&rtc_lock);
+        spin_lock(&sh03_rtc_lock);
  again:
         do {
                 sec  = (ctrl_inb(RTC_SEC1) & 0xf) + (ctrl_inb(RTC_SEC10) & 0x7) * 10;
@@ -73,7 +73,7 @@ unsigned long get_cmos_time(void)
                 goto again;
         }
 
-        spin_unlock(&rtc_lock);
+        spin_unlock(&sh03_rtc_lock);
         return mktime(year, mon, day, hour, min, sec);
 }
 
@@ -91,7 +91,7 @@ static int set_rtc_mmss(unsigned long nowtime)
         int i;
 
         /* gets recalled with irq locally disabled */
-        spin_lock(&rtc_lock);
+        spin_lock(&sh03_rtc_lock);
         for (i = 0 ; i < 1000000 ; i++) /* may take up to 1 second... */
                 if (!(ctrl_inb(RTC_CTL) & RTC_BUSY))
                         break;
@@ -113,7 +113,7 @@ static int set_rtc_mmss(unsigned long nowtime)
                        cmos_minutes, real_minutes);
                 retval = -1;
         }
-        spin_unlock(&rtc_lock);
+        spin_unlock(&sh03_rtc_lock);
 
         return retval;
 }
diff --git a/arch/sh/boards/mach-snapgear/io.c b/arch/sh/boards/mach-snapgear/io.c
index 0f4824264557..476650e42dbc 100644
--- a/arch/sh/boards/mach-snapgear/io.c
+++ b/arch/sh/boards/mach-snapgear/io.c
@@ -36,8 +36,6 @@ unsigned char snapgear_inb(unsigned long port)
 {
         if (PXSEG(port))
                 return *(volatile unsigned char *)port;
-        else if (is_pci_ioaddr(port))
-                return *(volatile unsigned char *)pci_ioaddr(port);
         else
                 return (*port2adr(port)) & 0xff;
 }
@@ -48,8 +46,6 @@ unsigned char snapgear_inb_p(unsigned long port)
 
         if (PXSEG(port))
                 v = *(volatile unsigned char *)port;
-        else if (is_pci_ioaddr(port))
-                v = *(volatile unsigned char *)pci_ioaddr(port);
         else
                 v = (*port2adr(port))&0xff;
         ctrl_delay();
@@ -60,8 +56,6 @@ unsigned short snapgear_inw(unsigned long port)
 {
         if (PXSEG(port))
                 return *(volatile unsigned short *)port;
-        else if (is_pci_ioaddr(port))
-                return *(volatile unsigned short *)pci_ioaddr(port);
         else if (port >= 0x2000)
                 return *port2adr(port);
         else
@@ -73,8 +67,6 @@ unsigned int snapgear_inl(unsigned long port)
 {
         if (PXSEG(port))
                 return *(volatile unsigned long *)port;
-        else if (is_pci_ioaddr(port))
-                return *(volatile unsigned int *)pci_ioaddr(port);
         else if (port >= 0x2000)
                 return *port2adr(port);
         else
@@ -87,8 +79,6 @@ void snapgear_outb(unsigned char value, unsigned long port)
 
         if (PXSEG(port))
                 *(volatile unsigned char *)port = value;
-        else if (is_pci_ioaddr(port))
-                *((unsigned char*)pci_ioaddr(port)) = value;
         else
                 *(port2adr(port)) = value;
 }
@@ -97,8 +87,6 @@ void snapgear_outb_p(unsigned char value, unsigned long port)
 {
         if (PXSEG(port))
                 *(volatile unsigned char *)port = value;
-        else if (is_pci_ioaddr(port))
-                *((unsigned char*)pci_ioaddr(port)) = value;
         else
                 *(port2adr(port)) = value;
         ctrl_delay();
@@ -108,8 +96,6 @@ void snapgear_outw(unsigned short value, unsigned long port)
 {
         if (PXSEG(port))
                 *(volatile unsigned short *)port = value;
-        else if (is_pci_ioaddr(port))
-                *((unsigned short *)pci_ioaddr(port)) = value;
         else if (port >= 0x2000)
                 *port2adr(port) = value;
         else
@@ -120,8 +106,6 @@ void snapgear_outl(unsigned int value, unsigned long port)
 {
         if (PXSEG(port))
                 *(volatile unsigned long *)port = value;
-        else if (is_pci_ioaddr(port))
-                *((unsigned long*)pci_ioaddr(port)) = value;
         else
                 maybebadio(port);
 }
diff --git a/arch/sh/boards/mach-systemh/io.c b/arch/sh/boards/mach-systemh/io.c
index dec3db0ee933..15577ff1f715 100644
--- a/arch/sh/boards/mach-systemh/io.c
+++ b/arch/sh/boards/mach-systemh/io.c
@@ -35,8 +35,6 @@ unsigned char sh7751systemh_inb(unsigned long port)
 {
         if (PXSEG(port))
                 return *(volatile unsigned char *)port;
-        else if (is_pci_ioaddr(port))
-                return *(volatile unsigned char *)pci_ioaddr(port);
         else if (port <= 0x3F1)
                 return *(volatile unsigned char *)ETHER_IOMAP(port);
         else
@@ -49,8 +47,6 @@ unsigned char sh7751systemh_inb_p(unsigned long port)
 
         if (PXSEG(port))
                 v = *(volatile unsigned char *)port;
-        else if (is_pci_ioaddr(port))
-                v = *(volatile unsigned char *)pci_ioaddr(port);
         else if (port <= 0x3F1)
                 v = *(volatile unsigned char *)ETHER_IOMAP(port);
         else
@@ -63,8 +59,6 @@ unsigned short sh7751systemh_inw(unsigned long port)
 {
         if (PXSEG(port))
                 return *(volatile unsigned short *)port;
-        else if (is_pci_ioaddr(port))
-                return *(volatile unsigned short *)pci_ioaddr(port);
         else if (port >= 0x2000)
                 return *port2adr(port);
         else if (port <= 0x3F1)
@@ -78,8 +72,6 @@ unsigned int sh7751systemh_inl(unsigned long port)
 {
         if (PXSEG(port))
                 return *(volatile unsigned long *)port;
-        else if (is_pci_ioaddr(port))
-                return *(volatile unsigned int *)pci_ioaddr(port);
         else if (port >= 0x2000)
                 return *port2adr(port);
         else if (port <= 0x3F1)
@@ -94,8 +86,6 @@ void sh7751systemh_outb(unsigned char value, unsigned long port)
 
         if (PXSEG(port))
                 *(volatile unsigned char *)port = value;
-        else if (is_pci_ioaddr(port))
-                *((unsigned char*)pci_ioaddr(port)) = value;
         else if (port <= 0x3F1)
                 *(volatile unsigned char *)ETHER_IOMAP(port) = value;
         else
@@ -106,8 +96,6 @@ void sh7751systemh_outb_p(unsigned char value, unsigned long port)
 {
         if (PXSEG(port))
                 *(volatile unsigned char *)port = value;
-        else if (is_pci_ioaddr(port))
-                *((unsigned char*)pci_ioaddr(port)) = value;
         else if (port <= 0x3F1)
                 *(volatile unsigned char *)ETHER_IOMAP(port) = value;
         else
@@ -119,8 +107,6 @@ void sh7751systemh_outw(unsigned short value, unsigned long port)
 {
         if (PXSEG(port))
                 *(volatile unsigned short *)port = value;
-        else if (is_pci_ioaddr(port))
-                *((unsigned short *)pci_ioaddr(port)) = value;
         else if (port >= 0x2000)
                 *port2adr(port) = value;
         else if (port <= 0x3F1)
@@ -133,8 +119,6 @@ void sh7751systemh_outl(unsigned int value, unsigned long port)
 {
         if (PXSEG(port))
                 *(volatile unsigned long *)port = value;
-        else if (is_pci_ioaddr(port))
-                *((unsigned long*)pci_ioaddr(port)) = value;
         else
                 maybebadio(port);
 }
diff --git a/arch/sh/boards/mach-titan/io.c b/arch/sh/boards/mach-titan/io.c
index 4badad4c6f30..0130e9826aca 100644
--- a/arch/sh/boards/mach-titan/io.c
+++ b/arch/sh/boards/mach-titan/io.c
@@ -17,8 +17,6 @@ u8 titan_inb(unsigned long port)
 {
         if (PXSEG(port))
                 return ctrl_inb(port);
-        else if (is_pci_ioaddr(port))
-                return ctrl_inb(pci_ioaddr(port));
         return ctrl_inw(port2adr(port)) & 0xff;
 }
 
@@ -28,8 +26,6 @@ u8 titan_inb_p(unsigned long port)
 
         if (PXSEG(port))
                 v = ctrl_inb(port);
-        else if (is_pci_ioaddr(port))
-                v = ctrl_inb(pci_ioaddr(port));
         else
                 v = ctrl_inw(port2adr(port)) & 0xff;
         ctrl_delay();
@@ -40,8 +36,6 @@ u16 titan_inw(unsigned long port)
 {
         if (PXSEG(port))
                 return ctrl_inw(port);
-        else if (is_pci_ioaddr(port))
-                return ctrl_inw(pci_ioaddr(port));
         else if (port >= 0x2000)
                 return ctrl_inw(port2adr(port));
         else
@@ -53,8 +47,6 @@ u32 titan_inl(unsigned long port)
 {
         if (PXSEG(port))
                 return ctrl_inl(port);
-        else if (is_pci_ioaddr(port))
-                return ctrl_inl(pci_ioaddr(port));
         else if (port >= 0x2000)
                 return ctrl_inw(port2adr(port));
         else
@@ -66,8 +58,6 @@ void titan_outb(u8 value, unsigned long port)
 {
         if (PXSEG(port))
                 ctrl_outb(value, port);
-        else if (is_pci_ioaddr(port))
-                ctrl_outb(value, pci_ioaddr(port));
         else
                 ctrl_outw(value, port2adr(port));
 }
@@ -76,8 +66,6 @@ void titan_outb_p(u8 value, unsigned long port)
 {
         if (PXSEG(port))
                 ctrl_outb(value, port);
-        else if (is_pci_ioaddr(port))
-                ctrl_outb(value, pci_ioaddr(port));
         else
                 ctrl_outw(value, port2adr(port));
         ctrl_delay();
@@ -87,8 +75,6 @@ void titan_outw(u16 value, unsigned long port)
 {
         if (PXSEG(port))
                 ctrl_outw(value, port);
-        else if (is_pci_ioaddr(port))
-                ctrl_outw(value, pci_ioaddr(port));
         else if (port >= 0x2000)
                 ctrl_outw(value, port2adr(port));
         else
@@ -99,8 +85,6 @@ void titan_outl(u32 value, unsigned long port)
 {
         if (PXSEG(port))
                 ctrl_outl(value, port);
-        else if (is_pci_ioaddr(port))
-                ctrl_outl(value, pci_ioaddr(port));
         else
                 maybebadio(port);
 }
@@ -117,10 +101,8 @@ void titan_outsl(unsigned long port, const void *src, unsigned long count)
 
 void __iomem *titan_ioport_map(unsigned long port, unsigned int size)
 {
-        if (PXSEG(port) || is_pci_memaddr(port))
+        if (PXSEG(port))
                 return (void __iomem *)port;
-        else if (is_pci_ioaddr(port))
-                return (void __iomem *)pci_ioaddr(port);
 
         return (void __iomem *)port2adr(port);
 }
diff --git a/arch/sh/boot/Makefile b/arch/sh/boot/Makefile
index 95483d161258..78efb04c28f3 100644
--- a/arch/sh/boot/Makefile
+++ b/arch/sh/boot/Makefile
@@ -20,9 +20,6 @@ CONFIG_BOOT_LINK_OFFSET	?= 0x00800000
 CONFIG_ZERO_PAGE_OFFSET ?= 0x00001000
 CONFIG_ENTRY_OFFSET     ?= 0x00001000
 
-export CONFIG_PAGE_OFFSET CONFIG_MEMORY_START CONFIG_BOOT_LINK_OFFSET \
-       CONFIG_ZERO_PAGE_OFFSET CONFIG_ENTRY_OFFSET
-
 targets := zImage vmlinux.srec uImage uImage.srec
 subdir- := compressed
 
@@ -43,6 +40,9 @@ KERNEL_MEMORY := $(shell /bin/bash -c 'printf "0x%08x" \
                      $$[$(CONFIG_MEMORY_START)]')
 endif
 
+export CONFIG_PAGE_OFFSET CONFIG_MEMORY_START CONFIG_BOOT_LINK_OFFSET \
+       CONFIG_ZERO_PAGE_OFFSET CONFIG_ENTRY_OFFSET KERNEL_MEMORY
+
 KERNEL_LOAD     := $(shell /bin/bash -c 'printf "0x%08x" \
                      $$[$(CONFIG_PAGE_OFFSET)  + \
                         $(KERNEL_MEMORY) + \
diff --git a/arch/sh/boot/compressed/Makefile b/arch/sh/boot/compressed/Makefile
index efb01dc3c8c3..9531bf1b7c2f 100644
--- a/arch/sh/boot/compressed/Makefile
+++ b/arch/sh/boot/compressed/Makefile
@@ -1,5 +1,47 @@
-ifeq ($(CONFIG_SUPERH32),y)
-include ${srctree}/arch/sh/boot/compressed/Makefile_32
-else
-include ${srctree}/arch/sh/boot/compressed/Makefile_64
+#
+# linux/arch/sh/boot/compressed/Makefile
+#
+# create a compressed vmlinux image from the original vmlinux
+#
+
+targets         := vmlinux vmlinux.bin vmlinux.bin.gz \
+                   head_$(BITS).o misc_$(BITS).o piggy.o
+
+OBJECTS = $(obj)/head_$(BITS).o $(obj)/misc_$(BITS).o $(obj)/cache.o
+
+ifdef CONFIG_SH_STANDARD_BIOS
+OBJECTS += $(obj)/../../kernel/sh_bios.o
 endif
+
+#
+# IMAGE_OFFSET is the load offset of the compression loader
+#
+IMAGE_OFFSET    := $(shell /bin/bash -c 'printf "0x%08x" \
+                     $$[$(CONFIG_PAGE_OFFSET)  + \
+                        $(KERNEL_MEMORY) + \
+                        $(CONFIG_BOOT_LINK_OFFSET)]')
+
+LIBGCC  := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)
+
+ifeq ($(CONFIG_FUNCTION_TRACER),y)
+ORIG_CFLAGS := $(KBUILD_CFLAGS)
+KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS))
+endif
+
+LDFLAGS_vmlinux := --oformat $(ld-bfd) -Ttext $(IMAGE_OFFSET) -e startup \
+                   -T $(obj)/../../kernel/vmlinux.lds
+
+$(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o $(LIBGCC) FORCE
+        $(call if_changed,ld)
+        @:
+
+$(obj)/vmlinux.bin: vmlinux FORCE
+        $(call if_changed,objcopy)
+
+$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
+        $(call if_changed,gzip)
+
+OBJCOPYFLAGS += -R .empty_zero_page
+
+$(obj)/piggy.o: $(obj)/piggy.S $(obj)/vmlinux.bin.gz FORCE
+        $(call if_changed,as_o_S)
diff --git a/arch/sh/boot/compressed/Makefile_32 b/arch/sh/boot/compressed/Makefile_32
deleted file mode 100644
index b96a055b053e..000000000000
--- a/arch/sh/boot/compressed/Makefile_32
+++ /dev/null
@@ -1,46 +0,0 @@
-#
-# linux/arch/sh/boot/compressed/Makefile
-#
-# create a compressed vmlinux image from the original vmlinux
-#
-
-targets         := vmlinux vmlinux.bin vmlinux.bin.gz \
-                   head_32.o misc_32.o piggy.o
-
-OBJECTS = $(obj)/head_32.o $(obj)/misc_32.o
-
-ifdef CONFIG_SH_STANDARD_BIOS
-OBJECTS += $(obj)/../../kernel/sh_bios.o
-endif
-
-#
-# IMAGE_OFFSET is the load offset of the compression loader
-#
-IMAGE_OFFSET    := $(shell /bin/bash -c 'printf "0x%08x" \
-                     $$[$(CONFIG_PAGE_OFFSET)  + \
-                        $(CONFIG_MEMORY_START) + \
-                        $(CONFIG_BOOT_LINK_OFFSET)]')
-
-LIBGCC  := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)
-
-ifeq ($(CONFIG_FUNCTION_TRACER),y)
-ORIG_CFLAGS := $(KBUILD_CFLAGS)
-KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS))
-endif
-
-LDFLAGS_vmlinux := -Ttext $(IMAGE_OFFSET) -e startup -T $(obj)/../../kernel/vmlinux.lds
-
-$(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o $(LIBGCC) FORCE
-        $(call if_changed,ld)
-        @:
-
-$(obj)/vmlinux.bin: vmlinux FORCE
-        $(call if_changed,objcopy)
-
-$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
-        $(call if_changed,gzip)
-
-OBJCOPYFLAGS += -R .empty_zero_page
-
-$(obj)/piggy.o: $(obj)/piggy.S $(obj)/vmlinux.bin.gz FORCE
-        $(call if_changed,as_o_S)
diff --git a/arch/sh/boot/compressed/Makefile_64 b/arch/sh/boot/compressed/Makefile_64
deleted file mode 100644
index 658d4f915556..000000000000
--- a/arch/sh/boot/compressed/Makefile_64
+++ /dev/null
@@ -1,43 +0,0 @@
-#
-# arch/sh/boot/compressed/Makefile_64
-#
-# create a compressed vmlinux image from the original vmlinux
-#
-# Copyright (C) 2002 Stuart Menefy
-# Copyright (C) 2004 Paul Mundt
-#
-# This file is subject to the terms and conditions of the GNU General Public
-# License.  See the file "COPYING" in the main directory of this archive
-# for more details.
-#
-
-targets         := vmlinux vmlinux.bin vmlinux.bin.gz \
-                   head_64.o misc_64.o cache.o piggy.o
-
-OBJECTS         := $(obj)/vmlinux_64.lds $(obj)/head_64.o $(obj)/misc_64.o \
-                   $(obj)/cache.o
-
-#
-# ZIMAGE_OFFSET is the load offset of the compression loader
-# (4M for the kernel plus 64K for this loader)
-#
-ZIMAGE_OFFSET   := $(shell /bin/bash -c 'printf "0x%08x" \
-                     $$[$(CONFIG_PAGE_OFFSET)+0x400000+0x10000]')
-
-LDFLAGS_vmlinux := -Ttext $(ZIMAGE_OFFSET) -e startup \
-                    -T $(obj)/../../kernel/vmlinux.lds
-
-$(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o FORCE
-        $(call if_changed,ld)
-        @:
-
-$(obj)/vmlinux.bin: vmlinux FORCE
-        $(call if_changed,objcopy)
-
-$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
-        $(call if_changed,gzip)
-
-OBJCOPYFLAGS += -R .empty_zero_page
-
-$(obj)/piggy.o: $(obj)/piggy.S $(obj)/vmlinux.bin.gz FORCE
-        $(call if_changed,as_o_S)
diff --git a/arch/sh/boot/compressed/head_64.S b/arch/sh/boot/compressed/head_64.S
index 622eac3cf556..9993113c6713 100644
--- a/arch/sh/boot/compressed/head_64.S
+++ b/arch/sh/boot/compressed/head_64.S
@@ -14,6 +14,7 @@
  *   Copyright (C) 2002 Stuart Menefy (stuart.menefy@st.com)
  */
 #include <asm/cache.h>
+#include <asm/tlb.h>
 #include <cpu/mmu_context.h>
 #include <cpu/registers.h>
 
@@ -33,11 +34,7 @@
 #define ICCR0_INIT_VAL  ICCR0_ON | ICCR0_ICI            /* ICE + ICI */
 #define ICCR1_INIT_VAL  ICCR1_NOLOCK                    /* No locking */
 
-#if 1
 #define OCCR0_INIT_VAL  OCCR0_ON | OCCR0_OCI | OCCR0_WB /* OCE + OCI + WB */
-#else
-#define OCCR0_INIT_VAL  OCCR0_OFF
-#endif
 #define OCCR1_INIT_VAL  OCCR1_NOLOCK                    /* No locking */
 
         .text
diff --git a/arch/sh/boot/compressed/vmlinux_64.lds b/arch/sh/boot/compressed/vmlinux_64.lds
deleted file mode 100644
index 59c2ef4aeda5..000000000000
--- a/arch/sh/boot/compressed/vmlinux_64.lds
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * ld script to make compressed SuperH/shmedia Linux kernel+decompression
- *              bootstrap
- * Modified by Stuart Menefy from arch/sh/vmlinux.lds.S written by Niibe Yutaka
- */
-
-
-#ifdef CONFIG_LITTLE_ENDIAN
-/* OUTPUT_FORMAT("elf32-sh64l-linux", "elf32-sh64l-linux", "elf32-sh64l-linux") */
-#define NOP 0x6ff0fff0
-#else
-/* OUTPUT_FORMAT("elf32-sh64", "elf32-sh64", "elf32-sh64") */
-#define NOP 0xf0fff06f
-#endif
-
-OUTPUT_FORMAT("elf32-sh64-linux")
-OUTPUT_ARCH(sh)
-ENTRY(_start)
-
-#define ALIGNED_GAP(section, align) (((ADDR(section)+SIZEOF(section)+(align)-1) & ~((align)-1))-ADDR(section))
-#define FOLLOWING(section, align) AT (LOADADDR(section) + ALIGNED_GAP(section,align))
-
-SECTIONS
-{
-  _text = .;                    /* Text and read-only data */
-
-  .text : {
-        *(.text)
-        *(.text64)
-        *(.text..SHmedia32)
-        *(.fixup)
-        *(.gnu.warning)
-        } = NOP
-  . = ALIGN(4);
-  .rodata : { *(.rodata) }
-
-  /* There is no 'real' reason for eight byte alignment, four would work
-   * as well, but gdb downloads much (*4) faster with this.
-   */
-  . = ALIGN(8);
-  .image : { *(.image) }
-  . = ALIGN(4);
-  _etext = .;                   /* End of text section */
-
-  .data :                       /* Data */
-        FOLLOWING(.image, 4)
-        {
-        _data = .;
-        *(.data)
-        }
-  _data_image = LOADADDR(.data);/* Address of data section in ROM */
-
-  _edata = .;                   /* End of data section */
-
-  .stack : { stack = .;  _stack = .; }
-
-  . = ALIGN(4);
-  __bss_start = .;              /* BSS */
-  .bss : {
-        *(.bss)
-        }
-  . = ALIGN(4);
-  _end = . ;
-}
diff --git a/arch/sh/cchips/Kconfig b/arch/sh/cchips/Kconfig
index f43d18373f22..a5ab2eccdaa6 100644
--- a/arch/sh/cchips/Kconfig
+++ b/arch/sh/cchips/Kconfig
@@ -34,11 +34,6 @@ config HD64461_IRQ
 
           Do not change this unless you know what you are doing.
 
-config HD64461_IOBASE
-        hex "HD64461 start address"
-        depends on HD64461
-        default "0xb0000000"
-
 config HD64461_ENABLER
         bool "HD64461 PCMCIA enabler"
         depends on HD64461
diff --git a/arch/sh/cchips/hd6446x/hd64461.c b/arch/sh/cchips/hd6446x/hd64461.c
index 25ef91061521..50aa0c1f76ea 100644
--- a/arch/sh/cchips/hd6446x/hd64461.c
+++ b/arch/sh/cchips/hd6446x/hd64461.c
@@ -80,7 +80,7 @@ int __init setup_hd64461(void)
 
         printk(KERN_INFO
                "HD64461 configured at 0x%x on irq %d(mapped into %d to %d)\n",
-               CONFIG_HD64461_IOBASE, CONFIG_HD64461_IRQ, HD64461_IRQBASE,
+               HD64461_IOBASE, CONFIG_HD64461_IRQ, HD64461_IRQBASE,
                HD64461_IRQBASE + 15);
 
 /* Should be at processor specific part.. */
diff --git a/arch/sh/configs/ap325rxa_defconfig b/arch/sh/configs/ap325rxa_defconfig
index c8d982a8a2e6..022f70e0ea03 100644
--- a/arch/sh/configs/ap325rxa_defconfig
+++ b/arch/sh/configs/ap325rxa_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 17:46:53 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 12:42:06 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -74,6 +75,7 @@ CONFIG_EMBEDDED=y
 CONFIG_UID16=y
 CONFIG_SYSCTL_SYSCALL=y
 # CONFIG_KALLSYMS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -92,12 +94,15 @@ CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 CONFIG_HAVE_IOREMAP_PROT=y
 CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -110,7 +115,6 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -159,6 +163,7 @@ CONFIG_ARCH_SHMOBILE=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 CONFIG_CPU_SUBTYPE_SH7723=y
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -168,8 +173,6 @@ CONFIG_CPU_SUBTYPE_SH7723=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -573,6 +576,7 @@ CONFIG_SCSI_WAIT_SCAN=m
 CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_ISCSI_TCP is not set
 # CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
 # CONFIG_SCSI_DEBUG is not set
 # CONFIG_SCSI_DH is not set
 # CONFIG_SCSI_OSD_INITIATOR is not set
@@ -695,6 +699,7 @@ CONFIG_DEVKMEM=y
 #
 # Non-8250 serial port support
 #
+# CONFIG_SERIAL_MAX3100 is not set
 CONFIG_SERIAL_SH_SCI=y
 CONFIG_SERIAL_SH_SCI_NR_UARTS=6
 CONFIG_SERIAL_SH_SCI_CONSOLE=y
@@ -1030,6 +1035,7 @@ CONFIG_EXT2_FS_POSIX_ACL=y
 CONFIG_EXT2_FS_SECURITY=y
 # CONFIG_EXT2_FS_XIP is not set
 CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 CONFIG_EXT3_FS_XATTR=y
 CONFIG_EXT3_FS_POSIX_ACL=y
 CONFIG_EXT3_FS_SECURITY=y
@@ -1052,6 +1058,11 @@ CONFIG_INOTIFY_USER=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -1100,6 +1111,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
@@ -1191,10 +1203,24 @@ CONFIG_SYSCTL_SYSCALL_CHECK=y
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
 #
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_PREEMPT_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
@@ -1303,6 +1329,7 @@ CONFIG_CRYPTO_CBC=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
diff --git a/arch/sh/configs/cayman_defconfig b/arch/sh/configs/cayman_defconfig
index fa5fc1e1e980..40301f86a45c 100644
--- a/arch/sh/configs/cayman_defconfig
+++ b/arch/sh/configs/cayman_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 17:49:14 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 13:42:53 2009
 #
 CONFIG_SUPERH=y
 # CONFIG_SUPERH32 is not set
@@ -40,6 +40,7 @@ CONFIG_LOCALVERSION_AUTO=y
 CONFIG_SWAP=y
 # CONFIG_SYSVIPC is not set
 CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_TASKSTATS is not set
 # CONFIG_AUDIT is not set
@@ -70,6 +71,7 @@ CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -89,10 +91,13 @@ CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 CONFIG_HAVE_IOREMAP_PROT=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -105,7 +110,6 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -127,39 +131,6 @@ CONFIG_DEFAULT_IOSCHED="cfq"
 # System type
 #
 CONFIG_CPU_SH5=y
-# CONFIG_CPU_SUBTYPE_SH7619 is not set
-# CONFIG_CPU_SUBTYPE_SH7201 is not set
-# CONFIG_CPU_SUBTYPE_SH7203 is not set
-# CONFIG_CPU_SUBTYPE_SH7206 is not set
-# CONFIG_CPU_SUBTYPE_SH7263 is not set
-# CONFIG_CPU_SUBTYPE_MXG is not set
-# CONFIG_CPU_SUBTYPE_SH7705 is not set
-# CONFIG_CPU_SUBTYPE_SH7706 is not set
-# CONFIG_CPU_SUBTYPE_SH7707 is not set
-# CONFIG_CPU_SUBTYPE_SH7708 is not set
-# CONFIG_CPU_SUBTYPE_SH7709 is not set
-# CONFIG_CPU_SUBTYPE_SH7710 is not set
-# CONFIG_CPU_SUBTYPE_SH7712 is not set
-# CONFIG_CPU_SUBTYPE_SH7720 is not set
-# CONFIG_CPU_SUBTYPE_SH7721 is not set
-# CONFIG_CPU_SUBTYPE_SH7750 is not set
-# CONFIG_CPU_SUBTYPE_SH7091 is not set
-# CONFIG_CPU_SUBTYPE_SH7750R is not set
-# CONFIG_CPU_SUBTYPE_SH7750S is not set
-# CONFIG_CPU_SUBTYPE_SH7751 is not set
-# CONFIG_CPU_SUBTYPE_SH7751R is not set
-# CONFIG_CPU_SUBTYPE_SH7760 is not set
-# CONFIG_CPU_SUBTYPE_SH4_202 is not set
-# CONFIG_CPU_SUBTYPE_SH7723 is not set
-# CONFIG_CPU_SUBTYPE_SH7763 is not set
-# CONFIG_CPU_SUBTYPE_SH7770 is not set
-# CONFIG_CPU_SUBTYPE_SH7780 is not set
-# CONFIG_CPU_SUBTYPE_SH7785 is not set
-# CONFIG_CPU_SUBTYPE_SH7786 is not set
-# CONFIG_CPU_SUBTYPE_SHX3 is not set
-# CONFIG_CPU_SUBTYPE_SH7343 is not set
-# CONFIG_CPU_SUBTYPE_SH7722 is not set
-# CONFIG_CPU_SUBTYPE_SH7366 is not set
 CONFIG_CPU_SUBTYPE_SH5_101=y
 # CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
@@ -279,8 +250,6 @@ CONFIG_BOOT_LINK_OFFSET=0x00800000
 #
 CONFIG_PCI=y
 CONFIG_SH_PCIDMA_NONCOHERENT=y
-CONFIG_PCI_AUTO=y
-CONFIG_PCI_AUTO_UPDATE_RESOURCES=y
 # CONFIG_PCIEPORTBUS is not set
 # CONFIG_ARCH_SUPPORTS_MSI is not set
 CONFIG_PCI_LEGACY=y
@@ -492,6 +461,7 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_MPT2SAS is not set
 # CONFIG_SCSI_HPTIOP is not set
 # CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
 # CONFIG_FCOE is not set
 # CONFIG_SCSI_DMX3191D is not set
 # CONFIG_SCSI_FUTURE_DOMAIN is not set
@@ -568,6 +538,7 @@ CONFIG_NETDEV_1000=y
 # CONFIG_E1000E is not set
 # CONFIG_IP1000 is not set
 # CONFIG_IGB is not set
+# CONFIG_IGBVF is not set
 # CONFIG_NS83820 is not set
 # CONFIG_HAMACHI is not set
 # CONFIG_YELLOWFIN is not set
@@ -591,6 +562,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
 # CONFIG_S2IO is not set
+# CONFIG_VXGE is not set
 # CONFIG_MYRI10GE is not set
 # CONFIG_NETXEN_NIC is not set
 # CONFIG_NIU is not set
@@ -779,6 +751,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_F71805F is not set
 # CONFIG_SENSORS_F71882FG is not set
 # CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_G760A is not set
 # CONFIG_SENSORS_GL518SM is not set
 # CONFIG_SENSORS_GL520SM is not set
 # CONFIG_SENSORS_IT87 is not set
@@ -1042,7 +1015,6 @@ CONFIG_HID=y
 #
 # Special HID drivers
 #
-CONFIG_HID_COMPAT=y
 CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
 CONFIG_USB_ARCH_HAS_OHCI=y
@@ -1082,6 +1054,7 @@ CONFIG_EXT2_FS=y
 # CONFIG_EXT2_FS_XATTR is not set
 # CONFIG_EXT2_FS_XIP is not set
 CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 CONFIG_EXT3_FS_XATTR=y
 # CONFIG_EXT3_FS_POSIX_ACL is not set
 # CONFIG_EXT3_FS_SECURITY is not set
@@ -1105,6 +1078,11 @@ CONFIG_INOTIFY_USER=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -1146,8 +1124,13 @@ CONFIG_MINIX_FS=y
 # CONFIG_HPFS_FS is not set
 # CONFIG_QNX4FS_FS is not set
 CONFIG_ROMFS_FS=y
+CONFIG_ROMFS_BACKED_BY_BLOCK=y
+# CONFIG_ROMFS_BACKED_BY_MTD is not set
+# CONFIG_ROMFS_BACKED_BY_BOTH is not set
+CONFIG_ROMFS_ON_BLOCK=y
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
@@ -1208,6 +1191,9 @@ CONFIG_DEBUG_KERNEL=y
 CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
 CONFIG_SCHED_DEBUG=y
 CONFIG_SCHEDSTATS=y
 # CONFIG_TIMER_STATS is not set
@@ -1241,15 +1227,21 @@ CONFIG_FRAME_POINTER=y
 # CONFIG_LATENCYTOP is not set
 # CONFIG_SYSCTL_SYSCALL_CHECK is not set
 # CONFIG_PAGE_POISONING is not set
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
 #
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
 # CONFIG_BOOT_TRACER is not set
 # CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 # CONFIG_EARLY_SCIF_CONSOLE is not set
 # CONFIG_DEBUG_BOOTMEM is not set
@@ -1354,6 +1346,7 @@ CONFIG_CRYPTO=y
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
 # CONFIG_CRYPTO_DEV_HIFN_795X is not set
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
diff --git a/arch/sh/configs/dreamcast_defconfig b/arch/sh/configs/dreamcast_defconfig
index 5c1123640142..1f3cc98330bf 100644
--- a/arch/sh/configs/dreamcast_defconfig
+++ b/arch/sh/configs/dreamcast_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 17:51:48 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 12:44:27 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -71,6 +72,7 @@ CONFIG_UID16=y
 # CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -90,6 +92,7 @@ CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 CONFIG_PROFILING=y
+# CONFIG_MARKERS is not set
 # CONFIG_OPROFILE is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
@@ -98,6 +101,8 @@ CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -110,7 +115,6 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -156,6 +160,7 @@ CONFIG_CPU_SUBTYPE_SH7091=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -165,8 +170,6 @@ CONFIG_CPU_SUBTYPE_SH7091=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -271,7 +274,7 @@ CONFIG_CPU_FREQ_GOV_USERSPACE=y
 CONFIG_SH_DMA_API=y
 CONFIG_SH_DMA=y
 CONFIG_SH_DMA_IRQ_MULTI=y
-CONFIG_NR_ONCHIP_DMA_CHANNELS=6
+CONFIG_NR_ONCHIP_DMA_CHANNELS=4
 CONFIG_NR_DMA_CHANNELS_BOOL=y
 CONFIG_NR_DMA_CHANNELS=9
 # CONFIG_PVR2_DMA is not set
@@ -320,7 +323,6 @@ CONFIG_CMDLINE="console=ttySC1,115200 panic=3"
 CONFIG_MAPLE=y
 CONFIG_PCI=y
 CONFIG_SH_PCIDMA_NONCOHERENT=y
-CONFIG_PCI_AUTO=y
 # CONFIG_PCIEPORTBUS is not set
 # CONFIG_ARCH_SUPPORTS_MSI is not set
 CONFIG_PCI_LEGACY=y
@@ -602,6 +604,7 @@ CONFIG_INPUT_MOUSE=y
 # CONFIG_MOUSE_APPLETOUCH is not set
 # CONFIG_MOUSE_BCM5974 is not set
 # CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_MOUSE_MAPLE is not set
 # CONFIG_INPUT_JOYSTICK is not set
 # CONFIG_INPUT_TABLET is not set
 # CONFIG_INPUT_TOUCHSCREEN is not set
@@ -812,7 +815,6 @@ CONFIG_HID=y
 #
 # Special HID drivers
 #
-CONFIG_HID_COMPAT=y
 CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
 CONFIG_USB_ARCH_HAS_OHCI=y
@@ -867,6 +869,11 @@ CONFIG_INOTIFY_USER=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -910,6 +917,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 # CONFIG_NFS_FS is not set
 # CONFIG_NFSD is not set
@@ -947,10 +955,24 @@ CONFIG_FRAME_WARN=1024
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
 #
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_PREEMPT_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
@@ -1051,6 +1073,7 @@ CONFIG_CRYPTO=y
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
 # CONFIG_CRYPTO_DEV_HIFN_795X is not set
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
diff --git a/arch/sh/configs/edosk7705_defconfig b/arch/sh/configs/edosk7705_defconfig
index f4c34b039312..d7092457ddc7 100644
--- a/arch/sh/configs/edosk7705_defconfig
+++ b/arch/sh/configs/edosk7705_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 17:54:02 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 12:45:04 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_FIND_NEXT_BIT=y
@@ -56,6 +57,7 @@ CONFIG_EMBEDDED=y
 # CONFIG_UID16 is not set
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_KALLSYMS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_HOTPLUG is not set
 # CONFIG_PRINTK is not set
 # CONFIG_BUG is not set
@@ -74,12 +76,15 @@ CONFIG_SHMEM=y
 CONFIG_SLUB=y
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 CONFIG_HAVE_IOREMAP_PROT=y
 CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_BASE_SMALL=1
 # CONFIG_MODULES is not set
@@ -114,6 +119,7 @@ CONFIG_CPU_SUBTYPE_SH7705=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -123,8 +129,6 @@ CONFIG_CPU_SUBTYPE_SH7705=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -382,6 +386,10 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+
+#
 # Pseudo filesystems
 #
 # CONFIG_PROC_FS is not set
@@ -409,10 +417,22 @@ CONFIG_FRAME_WARN=1024
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
 #
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
@@ -426,6 +446,7 @@ CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SECURITYFS is not set
 # CONFIG_SECURITY_FILE_CAPABILITIES is not set
 # CONFIG_CRYPTO is not set
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
diff --git a/arch/sh/configs/edosk7760_defconfig b/arch/sh/configs/edosk7760_defconfig
index 7825c2699f18..a822b1d8c116 100644
--- a/arch/sh/configs/edosk7760_defconfig
+++ b/arch/sh/configs/edosk7760_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 17:54:57 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 12:45:25 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -40,6 +41,7 @@ CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
 CONFIG_BSD_PROCESS_ACCT=y
 # CONFIG_BSD_PROCESS_ACCT_V3 is not set
 # CONFIG_TASKSTATS is not set
@@ -67,7 +69,6 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
-CONFIG_INITRAMFS_COMPRESSION_NONE=y
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -77,6 +78,7 @@ CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS=y
 CONFIG_KALLSYMS_ALL=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -96,6 +98,7 @@ CONFIG_COMPAT_BRK=y
 CONFIG_SLUB=y
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
 CONFIG_HAVE_IOREMAP_PROT=y
@@ -103,6 +106,8 @@ CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -115,7 +120,6 @@ CONFIG_MODULE_FORCE_UNLOAD=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -161,6 +165,7 @@ CONFIG_CPU_SH4=y
 CONFIG_CPU_SUBTYPE_SH7760=y
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -170,8 +175,6 @@ CONFIG_CPU_SUBTYPE_SH7760=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -815,6 +818,7 @@ CONFIG_EXT2_FS_XATTR=y
 # CONFIG_EXT2_FS_SECURITY is not set
 CONFIG_EXT2_FS_XIP=y
 CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 CONFIG_EXT3_FS_XATTR=y
 # CONFIG_EXT3_FS_POSIX_ACL is not set
 # CONFIG_EXT3_FS_SECURITY is not set
@@ -839,6 +843,11 @@ CONFIG_INOTIFY_USER=y
 CONFIG_GENERIC_ACL=y
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -883,6 +892,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 # CONFIG_NFS_V3 is not set
@@ -964,6 +974,9 @@ CONFIG_DEBUG_SHIRQ=y
 CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
 # CONFIG_SCHED_DEBUG is not set
 # CONFIG_SCHEDSTATS is not set
 CONFIG_TIMER_STATS=y
@@ -1001,6 +1014,7 @@ CONFIG_SYSCTL_SYSCALL_CHECK=y
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
@@ -1010,9 +1024,14 @@ CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
 # CONFIG_PREEMPT_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
 # CONFIG_BOOT_TRACER is not set
 # CONFIG_TRACE_BRANCH_PROFILING is not set
 # CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
@@ -1126,6 +1145,7 @@ CONFIG_CRYPTO_DES=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
diff --git a/arch/sh/configs/espt_defconfig b/arch/sh/configs/espt_defconfig
index ebb4c37abaa6..c5b50077913d 100644
--- a/arch/sh/configs/espt_defconfig
+++ b/arch/sh/configs/espt_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 17:58:18 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 12:46:26 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -78,6 +79,7 @@ CONFIG_UID16=y
 # CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -106,6 +108,8 @@ CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -117,7 +121,6 @@ CONFIG_MODULES=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -164,6 +167,7 @@ CONFIG_CPU_SH4A=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 CONFIG_CPU_SUBTYPE_SH7763=y
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -173,8 +177,6 @@ CONFIG_CPU_SUBTYPE_SH7763=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -548,6 +550,7 @@ CONFIG_SCSI_WAIT_SCAN=m
 CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_ISCSI_TCP is not set
 # CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
 # CONFIG_SCSI_DEBUG is not set
 # CONFIG_SCSI_DH is not set
 # CONFIG_SCSI_OSD_INITIATOR is not set
@@ -919,6 +922,7 @@ CONFIG_EXT2_FS=y
 # CONFIG_EXT2_FS_XATTR is not set
 # CONFIG_EXT2_FS_XIP is not set
 CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 CONFIG_EXT3_FS_XATTR=y
 # CONFIG_EXT3_FS_POSIX_ACL is not set
 # CONFIG_EXT3_FS_SECURITY is not set
@@ -943,6 +947,11 @@ CONFIG_AUTOFS4_FS=y
 CONFIG_GENERIC_ACL=y
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -985,8 +994,13 @@ CONFIG_CRAMFS=y
 # CONFIG_HPFS_FS is not set
 # CONFIG_QNX4FS_FS is not set
 CONFIG_ROMFS_FS=y
+CONFIG_ROMFS_BACKED_BY_BLOCK=y
+# CONFIG_ROMFS_BACKED_BY_MTD is not set
+# CONFIG_ROMFS_BACKED_BY_BOTH is not set
+CONFIG_ROMFS_ON_BLOCK=y
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 # CONFIG_NFS_V3 is not set
@@ -1075,11 +1089,25 @@ CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
 CONFIG_RING_BUFFER=y
 CONFIG_TRACING=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
 #
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_FTRACE_STARTUP_TEST is not set
 # CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
@@ -1179,6 +1207,7 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
+CONFIG_BINARY_PRINTF=y
 
 #
 # Library routines
diff --git a/arch/sh/configs/hp6xx_defconfig b/arch/sh/configs/hp6xx_defconfig
index 82b113af08d3..8e13027eecc3 100644
--- a/arch/sh/configs/hp6xx_defconfig
+++ b/arch/sh/configs/hp6xx_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 18:01:05 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 12:47:15 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -67,6 +68,7 @@ CONFIG_UID16=y
 # CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -85,12 +87,15 @@ CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 CONFIG_HAVE_IOREMAP_PROT=y
 CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -98,7 +103,6 @@ CONFIG_BASE_SMALL=0
 # CONFIG_MODULES is not set
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -144,6 +148,7 @@ CONFIG_CPU_SUBTYPE_SH7709=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -153,8 +158,6 @@ CONFIG_CPU_SUBTYPE_SH7709=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -385,6 +388,7 @@ CONFIG_BLK_DEV_SD=y
 # CONFIG_SCSI_SRP_ATTRS is not set
 CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
 # CONFIG_SCSI_DEBUG is not set
 # CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
 # CONFIG_SCSI_DH is not set
@@ -431,6 +435,7 @@ CONFIG_KEYBOARD_HP6XX=y
 # CONFIG_INPUT_JOYSTICK is not set
 # CONFIG_INPUT_TABLET is not set
 CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_AD7879 is not set
 # CONFIG_TOUCHSCREEN_FUJITSU is not set
 # CONFIG_TOUCHSCREEN_GUNZE is not set
 # CONFIG_TOUCHSCREEN_ELO is not set
@@ -674,6 +679,11 @@ CONFIG_INOTIFY_USER=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -719,6 +729,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 
 #
 # Partition Types
@@ -786,10 +797,23 @@ CONFIG_FRAME_WARN=1024
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
 #
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
@@ -898,6 +922,7 @@ CONFIG_CRYPTO_MD5=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 # CONFIG_CRYPTO_HW is not set
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
diff --git a/arch/sh/configs/landisk_defconfig b/arch/sh/configs/landisk_defconfig
index b6fa4a7599d0..7f549aef0dfd 100644
--- a/arch/sh/configs/landisk_defconfig
+++ b/arch/sh/configs/landisk_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 18:02:54 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 12:47:48 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -69,6 +70,7 @@ CONFIG_UID16=y
 # CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -88,6 +90,7 @@ CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
 CONFIG_HAVE_IOREMAP_PROT=y
@@ -95,6 +98,8 @@ CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -107,7 +112,6 @@ CONFIG_MODULE_FORCE_UNLOAD=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -153,6 +157,7 @@ CONFIG_CPU_SUBTYPE_SH7751R=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -162,8 +167,6 @@ CONFIG_CPU_SUBTYPE_SH7751R=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -292,8 +295,6 @@ CONFIG_BOOT_LINK_OFFSET=0x00800000
 #
 CONFIG_PCI=y
 CONFIG_SH_PCIDMA_NONCOHERENT=y
-CONFIG_PCI_AUTO=y
-CONFIG_PCI_AUTO_UPDATE_RESOURCES=y
 # CONFIG_PCIEPORTBUS is not set
 # CONFIG_ARCH_SUPPORTS_MSI is not set
 CONFIG_PCI_LEGACY=y
@@ -602,6 +603,7 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_MPT2SAS is not set
 # CONFIG_SCSI_HPTIOP is not set
 # CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
 # CONFIG_FCOE is not set
 # CONFIG_SCSI_DMX3191D is not set
 # CONFIG_SCSI_FUTURE_DOMAIN is not set
@@ -706,6 +708,7 @@ CONFIG_NETDEV_1000=y
 # CONFIG_E1000E is not set
 # CONFIG_IP1000 is not set
 # CONFIG_IGB is not set
+# CONFIG_IGBVF is not set
 # CONFIG_NS83820 is not set
 # CONFIG_HAMACHI is not set
 # CONFIG_YELLOWFIN is not set
@@ -729,6 +732,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
 # CONFIG_S2IO is not set
+# CONFIG_VXGE is not set
 # CONFIG_MYRI10GE is not set
 # CONFIG_NETXEN_NIC is not set
 # CONFIG_NIU is not set
@@ -922,6 +926,7 @@ CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
 # CONFIG_SOC_CAMERA is not set
 CONFIG_V4L_USB_DRIVERS=y
 # CONFIG_USB_VIDEO_CLASS is not set
+CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
 # CONFIG_USB_GSPCA is not set
 # CONFIG_VIDEO_HDPVR is not set
 CONFIG_VIDEO_USBVIDEO=m
@@ -994,15 +999,17 @@ CONFIG_USB_HID=m
 #
 # Special HID drivers
 #
-CONFIG_HID_COMPAT=y
 CONFIG_HID_A4TECH=m
 CONFIG_HID_APPLE=m
 CONFIG_HID_BELKIN=m
 CONFIG_HID_CHERRY=m
 CONFIG_HID_CHICONY=m
 CONFIG_HID_CYPRESS=m
+# CONFIG_DRAGONRISE_FF is not set
 CONFIG_HID_EZKEY=m
+# CONFIG_HID_KYE is not set
 CONFIG_HID_GYRATION=m
+# CONFIG_HID_KENSINGTON is not set
 CONFIG_HID_LOGITECH=m
 # CONFIG_LOGITECH_FF is not set
 # CONFIG_LOGIRUMBLEPAD2_FF is not set
@@ -1197,6 +1204,7 @@ CONFIG_EXT2_FS=y
 # CONFIG_EXT2_FS_XATTR is not set
 # CONFIG_EXT2_FS_XIP is not set
 CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 CONFIG_EXT3_FS_XATTR=y
 # CONFIG_EXT3_FS_POSIX_ACL is not set
 # CONFIG_EXT3_FS_SECURITY is not set
@@ -1222,6 +1230,11 @@ CONFIG_INOTIFY_USER=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 CONFIG_ISO9660_FS=m
@@ -1270,10 +1283,15 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_HPFS_FS is not set
 # CONFIG_QNX4FS_FS is not set
 CONFIG_ROMFS_FS=y
+CONFIG_ROMFS_BACKED_BY_BLOCK=y
+# CONFIG_ROMFS_BACKED_BY_MTD is not set
+# CONFIG_ROMFS_BACKED_BY_BOTH is not set
+CONFIG_ROMFS_ON_BLOCK=y
 # CONFIG_SYSV_FS is not set
 CONFIG_UFS_FS=m
 # CONFIG_UFS_FS_WRITE is not set
 # CONFIG_UFS_DEBUG is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=m
 CONFIG_NFS_V3=y
@@ -1364,10 +1382,23 @@ CONFIG_FRAME_WARN=1024
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
 #
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 CONFIG_SH_STANDARD_BIOS=y
@@ -1469,6 +1500,7 @@ CONFIG_CRYPTO=y
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
 # CONFIG_CRYPTO_DEV_HIFN_795X is not set
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
diff --git a/arch/sh/configs/lboxre2_defconfig b/arch/sh/configs/lboxre2_defconfig
index 92c515c4199f..a7db539f2800 100644
--- a/arch/sh/configs/lboxre2_defconfig
+++ b/arch/sh/configs/lboxre2_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 18:06:51 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 12:48:54 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -69,6 +70,7 @@ CONFIG_UID16=y
 # CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -88,6 +90,7 @@ CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
 CONFIG_HAVE_IOREMAP_PROT=y
@@ -95,6 +98,8 @@ CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -107,7 +112,6 @@ CONFIG_MODULE_FORCE_UNLOAD=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -153,6 +157,7 @@ CONFIG_CPU_SUBTYPE_SH7751R=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -162,8 +167,6 @@ CONFIG_CPU_SUBTYPE_SH7751R=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -293,8 +296,6 @@ CONFIG_CMDLINE="console=ttySC1,115200 root=/dev/sda1"
 #
 CONFIG_PCI=y
 CONFIG_SH_PCIDMA_NONCOHERENT=y
-CONFIG_PCI_AUTO=y
-CONFIG_PCI_AUTO_UPDATE_RESOURCES=y
 # CONFIG_PCIEPORTBUS is not set
 # CONFIG_ARCH_SUPPORTS_MSI is not set
 CONFIG_PCI_LEGACY=y
@@ -542,6 +543,7 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_MPT2SAS is not set
 # CONFIG_SCSI_HPTIOP is not set
 # CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
 # CONFIG_FCOE is not set
 # CONFIG_SCSI_DMX3191D is not set
 # CONFIG_SCSI_FUTURE_DOMAIN is not set
@@ -702,6 +704,7 @@ CONFIG_NETDEV_1000=y
 # CONFIG_E1000E is not set
 # CONFIG_IP1000 is not set
 # CONFIG_IGB is not set
+# CONFIG_IGBVF is not set
 # CONFIG_NS83820 is not set
 # CONFIG_HAMACHI is not set
 # CONFIG_YELLOWFIN is not set
@@ -725,6 +728,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
 # CONFIG_S2IO is not set
+# CONFIG_VXGE is not set
 # CONFIG_MYRI10GE is not set
 # CONFIG_NETXEN_NIC is not set
 # CONFIG_NIU is not set
@@ -931,7 +935,6 @@ CONFIG_HID=y
 #
 # Special HID drivers
 #
-CONFIG_HID_COMPAT=y
 CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
 CONFIG_USB_ARCH_HAS_OHCI=y
@@ -1007,6 +1010,7 @@ CONFIG_EXT2_FS=y
 # CONFIG_EXT2_FS_XATTR is not set
 # CONFIG_EXT2_FS_XIP is not set
 CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 CONFIG_EXT3_FS_XATTR=y
 # CONFIG_EXT3_FS_POSIX_ACL is not set
 # CONFIG_EXT3_FS_SECURITY is not set
@@ -1029,6 +1033,11 @@ CONFIG_INOTIFY_USER=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -1073,8 +1082,13 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_HPFS_FS is not set
 # CONFIG_QNX4FS_FS is not set
 CONFIG_ROMFS_FS=y
+CONFIG_ROMFS_BACKED_BY_BLOCK=y
+# CONFIG_ROMFS_BACKED_BY_MTD is not set
+# CONFIG_ROMFS_BACKED_BY_BOTH is not set
+CONFIG_ROMFS_ON_BLOCK=y
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 # CONFIG_NFS_FS is not set
 # CONFIG_NFSD is not set
@@ -1151,10 +1165,23 @@ CONFIG_FRAME_WARN=1024
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
 #
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 CONFIG_SH_STANDARD_BIOS=y
@@ -1256,6 +1283,7 @@ CONFIG_CRYPTO=y
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
 # CONFIG_CRYPTO_DEV_HIFN_795X is not set
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
diff --git a/arch/sh/configs/magicpanelr2_defconfig b/arch/sh/configs/magicpanelr2_defconfig
index 26586c2d64ca..58bec61506fa 100644
--- a/arch/sh/configs/magicpanelr2_defconfig
+++ b/arch/sh/configs/magicpanelr2_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 18:07:39 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 12:49:32 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -39,6 +40,7 @@ CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_BSD_PROCESS_ACCT_V3=y
 # CONFIG_TASKSTATS is not set
@@ -66,7 +68,6 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
-CONFIG_INITRAMFS_COMPRESSION_NONE=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -76,6 +77,7 @@ CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS=y
 CONFIG_KALLSYMS_ALL=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -94,6 +96,7 @@ CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
 CONFIG_HAVE_IOREMAP_PROT=y
@@ -101,6 +104,8 @@ CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -113,7 +118,6 @@ CONFIG_MODVERSIONS=y
 CONFIG_MODULE_SRCVERSION_ALL=y
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -159,6 +163,7 @@ CONFIG_CPU_SUBTYPE_SH7720=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -168,8 +173,6 @@ CONFIG_CPU_SUBTYPE_SH7720=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -813,6 +816,7 @@ CONFIG_EXT2_FS=y
 # CONFIG_EXT2_FS_XATTR is not set
 # CONFIG_EXT2_FS_XIP is not set
 CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 # CONFIG_EXT3_FS_XATTR is not set
 # CONFIG_EXT4_FS is not set
 CONFIG_JBD=y
@@ -831,6 +835,11 @@ CONFIG_FILE_LOCKING=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -884,6 +893,7 @@ CONFIG_JFFS2_RTIME=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
@@ -965,6 +975,7 @@ CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_KERNEL=y
 # CONFIG_DEBUG_SHIRQ is not set
 # CONFIG_DETECT_SOFTLOCKUP is not set
+# CONFIG_DETECT_HUNG_TASK is not set
 # CONFIG_SCHED_DEBUG is not set
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_TIMER_STATS is not set
@@ -1000,6 +1011,7 @@ CONFIG_SYSCTL_SYSCALL_CHECK=y
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
@@ -1008,9 +1020,14 @@ CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
 # CONFIG_IRQSOFF_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
 # CONFIG_BOOT_TRACER is not set
 # CONFIG_TRACE_BRANCH_PROFILING is not set
 # CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
@@ -1035,6 +1052,7 @@ CONFIG_DUMP_CODE=y
 # CONFIG_SECURITYFS is not set
 # CONFIG_SECURITY_FILE_CAPABILITIES is not set
 # CONFIG_CRYPTO is not set
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
diff --git a/arch/sh/configs/microdev_defconfig b/arch/sh/configs/microdev_defconfig
index 75178355d69a..2886fc84bc1c 100644
--- a/arch/sh/configs/microdev_defconfig
+++ b/arch/sh/configs/microdev_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 18:11:13 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 12:50:51 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -65,7 +66,6 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
-CONFIG_INITRAMFS_COMPRESSION_NONE=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -74,6 +74,7 @@ CONFIG_UID16=y
 # CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -92,12 +93,15 @@ CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 CONFIG_HAVE_IOREMAP_PROT=y
 CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -105,7 +109,6 @@ CONFIG_BASE_SMALL=0
 # CONFIG_MODULES is not set
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -151,6 +154,7 @@ CONFIG_CPU_SH4=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 CONFIG_CPU_SUBTYPE_SH4_202=y
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -160,8 +164,6 @@ CONFIG_CPU_SUBTYPE_SH4_202=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -647,6 +649,7 @@ CONFIG_EXT2_FS=y
 # CONFIG_EXT2_FS_XATTR is not set
 # CONFIG_EXT2_FS_XIP is not set
 CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 CONFIG_EXT3_FS_XATTR=y
 # CONFIG_EXT3_FS_POSIX_ACL is not set
 # CONFIG_EXT3_FS_SECURITY is not set
@@ -669,6 +672,11 @@ CONFIG_INOTIFY_USER=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -715,6 +723,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
@@ -802,10 +811,24 @@ CONFIG_FRAME_WARN=1024
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
 #
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_PREEMPT_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
@@ -914,6 +937,7 @@ CONFIG_CRYPTO_DES=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
diff --git a/arch/sh/configs/migor_defconfig b/arch/sh/configs/migor_defconfig
index a8720f9c6047..8ecceb4bf27e 100644
--- a/arch/sh/configs/migor_defconfig
+++ b/arch/sh/configs/migor_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 18:14:03 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 12:51:34 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -67,7 +68,6 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
-CONFIG_INITRAMFS_COMPRESSION_NONE=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -76,6 +76,7 @@ CONFIG_UID16=y
 # CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -104,6 +105,8 @@ CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -115,7 +118,6 @@ CONFIG_MODULES=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -165,6 +167,7 @@ CONFIG_ARCH_SHMOBILE=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -174,8 +177,6 @@ CONFIG_ARCH_SHMOBILE=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 CONFIG_CPU_SUBTYPE_SH7722=y
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -577,6 +578,7 @@ CONFIG_SCSI_WAIT_SCAN=m
 CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_ISCSI_TCP is not set
 # CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
 # CONFIG_SCSI_DEBUG is not set
 # CONFIG_SCSI_DH is not set
 # CONFIG_SCSI_OSD_INITIATOR is not set
@@ -873,7 +875,6 @@ CONFIG_HID=y
 #
 # Special HID drivers
 #
-CONFIG_HID_COMPAT=y
 CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
 # CONFIG_USB_ARCH_HAS_OHCI is not set
@@ -1012,6 +1013,11 @@ CONFIG_FILE_LOCKING=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -1056,6 +1062,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 # CONFIG_NFS_V3 is not set
@@ -1105,11 +1112,25 @@ CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
 CONFIG_RING_BUFFER=y
 CONFIG_TRACING=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
 #
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_FTRACE_STARTUP_TEST is not set
 # CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
@@ -1218,6 +1239,7 @@ CONFIG_CRYPTO_WORKQUEUE=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 # CONFIG_CRYPTO_HW is not set
+CONFIG_BINARY_PRINTF=y
 
 #
 # Library routines
diff --git a/arch/sh/configs/polaris_defconfig b/arch/sh/configs/polaris_defconfig
index df2d177d5346..2b9507286182 100644
--- a/arch/sh/configs/polaris_defconfig
+++ b/arch/sh/configs/polaris_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 18:16:48 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 12:52:19 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -40,6 +41,7 @@ CONFIG_LOCALVERSION=""
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_BSD_PROCESS_ACCT_V3=y
 # CONFIG_TASKSTATS is not set
@@ -76,6 +78,7 @@ CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS=y
 CONFIG_KALLSYMS_ALL=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -94,6 +97,7 @@ CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
 CONFIG_HAVE_IOREMAP_PROT=y
@@ -101,6 +105,8 @@ CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -113,7 +119,6 @@ CONFIG_MODVERSIONS=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -159,6 +164,7 @@ CONFIG_CPU_SUBTYPE_SH7709=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -168,8 +174,6 @@ CONFIG_CPU_SUBTYPE_SH7709=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -778,6 +782,11 @@ CONFIG_FILE_LOCKING=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -831,6 +840,7 @@ CONFIG_JFFS2_RTIME=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
@@ -874,6 +884,9 @@ CONFIG_DEBUG_SHIRQ=y
 CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
 # CONFIG_SCHED_DEBUG is not set
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_TIMER_STATS is not set
@@ -914,6 +927,7 @@ CONFIG_SYSCTL_SYSCALL_CHECK=y
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
@@ -923,9 +937,14 @@ CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
 # CONFIG_PREEMPT_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
 # CONFIG_BOOT_TRACER is not set
 # CONFIG_TRACE_BRANCH_PROFILING is not set
 # CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
@@ -950,6 +969,7 @@ CONFIG_DUMP_CODE=y
 # CONFIG_SECURITYFS is not set
 # CONFIG_SECURITY_FILE_CAPABILITIES is not set
 # CONFIG_CRYPTO is not set
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
diff --git a/arch/sh/configs/r7780mp_defconfig b/arch/sh/configs/r7780mp_defconfig
index 7def4df46ddb..943da63a3852 100644
--- a/arch/sh/configs/r7780mp_defconfig
+++ b/arch/sh/configs/r7780mp_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 18:20:17 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 12:53:28 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -78,6 +79,7 @@ CONFIG_UID16=y
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -107,6 +109,8 @@ CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_BASE_SMALL=0
@@ -118,7 +122,6 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -165,6 +168,7 @@ CONFIG_CPU_SH4A=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 CONFIG_CPU_SUBTYPE_SH7780=y
@@ -174,8 +178,6 @@ CONFIG_CPU_SUBTYPE_SH7780=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -258,7 +260,7 @@ CONFIG_SH_R7780MP=y
 #
 CONFIG_SH_TMU=y
 CONFIG_SH_TIMER_IRQ=28
-CONFIG_SH_PCLK_FREQ=32000000
+CONFIG_SH_PCLK_FREQ=33333333
 # CONFIG_NO_HZ is not set
 # CONFIG_HIGH_RES_TIMERS is not set
 CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
@@ -313,8 +315,6 @@ CONFIG_CMDLINE="console=ttySC0,115200 root=/dev/sda1"
 #
 CONFIG_PCI=y
 CONFIG_SH_PCIDMA_NONCOHERENT=y
-CONFIG_PCI_AUTO=y
-CONFIG_PCI_AUTO_UPDATE_RESOURCES=y
 # CONFIG_PCIEPORTBUS is not set
 # CONFIG_ARCH_SUPPORTS_MSI is not set
 CONFIG_PCI_LEGACY=y
@@ -536,6 +536,7 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_MPT2SAS is not set
 # CONFIG_SCSI_HPTIOP is not set
 # CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
 # CONFIG_FCOE is not set
 # CONFIG_SCSI_DMX3191D is not set
 # CONFIG_SCSI_FUTURE_DOMAIN is not set
@@ -696,6 +697,7 @@ CONFIG_E1000=m
 # CONFIG_E1000E is not set
 # CONFIG_IP1000 is not set
 # CONFIG_IGB is not set
+# CONFIG_IGBVF is not set
 # CONFIG_NS83820 is not set
 # CONFIG_HAMACHI is not set
 # CONFIG_YELLOWFIN is not set
@@ -719,6 +721,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
 # CONFIG_S2IO is not set
+# CONFIG_VXGE is not set
 # CONFIG_MYRI10GE is not set
 # CONFIG_NETXEN_NIC is not set
 # CONFIG_NIU is not set
@@ -920,6 +923,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_F71805F is not set
 # CONFIG_SENSORS_F71882FG is not set
 # CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_G760A is not set
 # CONFIG_SENSORS_GL518SM is not set
 # CONFIG_SENSORS_GL520SM is not set
 # CONFIG_SENSORS_IT87 is not set
@@ -1027,7 +1031,6 @@ CONFIG_HID=y
 #
 # Special HID drivers
 #
-CONFIG_HID_COMPAT=y
 CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
 CONFIG_USB_ARCH_HAS_OHCI=y
@@ -1120,6 +1123,7 @@ CONFIG_EXT2_FS=y
 # CONFIG_EXT2_FS_XATTR is not set
 # CONFIG_EXT2_FS_XIP is not set
 CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 CONFIG_EXT3_FS_XATTR=y
 # CONFIG_EXT3_FS_POSIX_ACL is not set
 # CONFIG_EXT3_FS_SECURITY is not set
@@ -1143,6 +1147,11 @@ CONFIG_INOTIFY_USER=y
 CONFIG_FUSE_FS=m
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -1191,6 +1200,7 @@ CONFIG_MINIX_FS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
@@ -1279,6 +1289,9 @@ CONFIG_DEBUG_KERNEL=y
 CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
 CONFIG_SCHED_DEBUG=y
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_TIMER_STATS is not set
@@ -1316,6 +1329,7 @@ CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
 CONFIG_RING_BUFFER=y
 CONFIG_TRACING=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
@@ -1325,11 +1339,16 @@ CONFIG_TRACING=y
 # CONFIG_PREEMPT_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
 # CONFIG_BOOT_TRACER is not set
 # CONFIG_TRACE_BRANCH_PROFILING is not set
 # CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_FTRACE_STARTUP_TEST is not set
 # CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
@@ -1449,6 +1468,7 @@ CONFIG_CRYPTO_DES=y
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
 # CONFIG_CRYPTO_DEV_HIFN_795X is not set
+CONFIG_BINARY_PRINTF=y
 
 #
 # Library routines
diff --git a/arch/sh/configs/r7785rp_defconfig b/arch/sh/configs/r7785rp_defconfig
index cb134ffc2118..82658f672398 100644
--- a/arch/sh/configs/r7785rp_defconfig
+++ b/arch/sh/configs/r7785rp_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 18:24:35 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 12:55:10 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -43,6 +44,7 @@ CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
 CONFIG_BSD_PROCESS_ACCT=y
 # CONFIG_BSD_PROCESS_ACCT_V3 is not set
 # CONFIG_TASKSTATS is not set
@@ -78,6 +80,7 @@ CONFIG_UID16=y
 CONFIG_KALLSYMS=y
 CONFIG_KALLSYMS_ALL=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -108,6 +111,8 @@ CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -120,7 +125,6 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -168,6 +172,7 @@ CONFIG_CPU_SHX2=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -177,8 +182,6 @@ CONFIG_CPU_SUBTYPE_SH7785=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -266,7 +269,7 @@ CONFIG_SH_R7785RP=y
 #
 CONFIG_SH_TMU=y
 CONFIG_SH_TIMER_IRQ=28
-CONFIG_SH_PCLK_FREQ=50000000
+CONFIG_SH_PCLK_FREQ=33333333
 CONFIG_TICK_ONESHOT=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
@@ -337,8 +340,6 @@ CONFIG_CMDLINE="console=ttySC0,115200 root=/dev/sda1"
 #
 CONFIG_PCI=y
 CONFIG_SH_PCIDMA_NONCOHERENT=y
-CONFIG_PCI_AUTO=y
-CONFIG_PCI_AUTO_UPDATE_RESOURCES=y
 # CONFIG_PCIEPORTBUS is not set
 # CONFIG_ARCH_SUPPORTS_MSI is not set
 # CONFIG_PCI_LEGACY is not set
@@ -561,6 +562,7 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_MPT2SAS is not set
 # CONFIG_SCSI_HPTIOP is not set
 # CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
 # CONFIG_FCOE is not set
 # CONFIG_SCSI_DMX3191D is not set
 # CONFIG_SCSI_FUTURE_DOMAIN is not set
@@ -698,6 +700,7 @@ CONFIG_NETDEV_1000=y
 # CONFIG_E1000E is not set
 # CONFIG_IP1000 is not set
 # CONFIG_IGB is not set
+# CONFIG_IGBVF is not set
 # CONFIG_NS83820 is not set
 # CONFIG_HAMACHI is not set
 # CONFIG_YELLOWFIN is not set
@@ -721,6 +724,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
 # CONFIG_S2IO is not set
+# CONFIG_VXGE is not set
 # CONFIG_MYRI10GE is not set
 # CONFIG_NETXEN_NIC is not set
 # CONFIG_NIU is not set
@@ -948,6 +952,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_F71805F is not set
 # CONFIG_SENSORS_F71882FG is not set
 # CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_G760A is not set
 # CONFIG_SENSORS_GL518SM is not set
 # CONFIG_SENSORS_GL520SM is not set
 # CONFIG_SENSORS_IT87 is not set
@@ -970,6 +975,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_PC87360 is not set
 # CONFIG_SENSORS_PC87427 is not set
 # CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_SHT15 is not set
 # CONFIG_SENSORS_SIS5595 is not set
 # CONFIG_SENSORS_DME1737 is not set
 # CONFIG_SENSORS_SMSC47M1 is not set
@@ -1109,7 +1115,6 @@ CONFIG_HID=y
 #
 # Special HID drivers
 #
-CONFIG_HID_COMPAT=y
 CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
 CONFIG_USB_ARCH_HAS_OHCI=y
@@ -1202,6 +1207,7 @@ CONFIG_EXT2_FS=y
 # CONFIG_EXT2_FS_XATTR is not set
 # CONFIG_EXT2_FS_XIP is not set
 CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 CONFIG_EXT3_FS_XATTR=y
 # CONFIG_EXT3_FS_POSIX_ACL is not set
 # CONFIG_EXT3_FS_SECURITY is not set
@@ -1225,6 +1231,11 @@ CONFIG_INOTIFY_USER=y
 CONFIG_FUSE_FS=m
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -1273,6 +1284,7 @@ CONFIG_MINIX_FS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
@@ -1359,6 +1371,7 @@ CONFIG_DEBUG_FS=y
 CONFIG_DEBUG_KERNEL=y
 # CONFIG_DEBUG_SHIRQ is not set
 # CONFIG_DETECT_SOFTLOCKUP is not set
+# CONFIG_DETECT_HUNG_TASK is not set
 CONFIG_SCHED_DEBUG=y
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_TIMER_STATS is not set
@@ -1401,6 +1414,7 @@ CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
 CONFIG_RING_BUFFER=y
 CONFIG_TRACING=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
@@ -1410,11 +1424,16 @@ CONFIG_TRACING=y
 # CONFIG_PREEMPT_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
 # CONFIG_BOOT_TRACER is not set
 # CONFIG_TRACE_BRANCH_PROFILING is not set
 # CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_FTRACE_STARTUP_TEST is not set
 # CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
@@ -1534,6 +1553,7 @@ CONFIG_CRYPTO_DES=y
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
 # CONFIG_CRYPTO_DEV_HIFN_795X is not set
+CONFIG_BINARY_PRINTF=y
 
 #
 # Library routines
diff --git a/arch/sh/configs/rsk7201_defconfig b/arch/sh/configs/rsk7201_defconfig
index a037c744b798..fa4395768d19 100644
--- a/arch/sh/configs/rsk7201_defconfig
+++ b/arch/sh/configs/rsk7201_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 18:29:08 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 12:56:29 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -65,7 +66,6 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
-CONFIG_INITRAMFS_COMPRESSION_NONE=y
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -74,6 +74,7 @@ CONFIG_UID16=y
 CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -100,6 +101,8 @@ CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_RT_MUTEXES=y
 CONFIG_BASE_SMALL=0
@@ -110,7 +113,6 @@ CONFIG_MODULES=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -157,6 +159,7 @@ CONFIG_CPU_SUBTYPE_SH7201=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -166,8 +169,6 @@ CONFIG_CPU_SUBTYPE_SH7201=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -603,6 +604,11 @@ CONFIG_EXT2_FS=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -651,8 +657,13 @@ CONFIG_JFFS2_RTIME=y
 # CONFIG_HPFS_FS is not set
 # CONFIG_QNX4FS_FS is not set
 CONFIG_ROMFS_FS=y
+CONFIG_ROMFS_BACKED_BY_BLOCK=y
+# CONFIG_ROMFS_BACKED_BY_MTD is not set
+# CONFIG_ROMFS_BACKED_BY_BOTH is not set
+CONFIG_ROMFS_ON_BLOCK=y
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 
 #
 # Partition Types
@@ -686,11 +697,24 @@ CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
 CONFIG_RING_BUFFER=y
 CONFIG_TRACING=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
 #
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_FTRACE_STARTUP_TEST is not set
 # CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
@@ -705,6 +729,7 @@ CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SECURITYFS is not set
 # CONFIG_SECURITY_FILE_CAPABILITIES is not set
 # CONFIG_CRYPTO is not set
+CONFIG_BINARY_PRINTF=y
 
 #
 # Library routines
diff --git a/arch/sh/configs/rsk7203_defconfig b/arch/sh/configs/rsk7203_defconfig
index 9ae28e88426c..e3a65f819f0a 100644
--- a/arch/sh/configs/rsk7203_defconfig
+++ b/arch/sh/configs/rsk7203_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 18:30:34 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 12:57:06 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -39,6 +40,7 @@ CONFIG_LOCALVERSION=""
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
 CONFIG_BSD_PROCESS_ACCT=y
 # CONFIG_BSD_PROCESS_ACCT_V3 is not set
 # CONFIG_TASKSTATS is not set
@@ -70,7 +72,6 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
-CONFIG_INITRAMFS_COMPRESSION_NONE=y
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -80,6 +81,7 @@ CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS=y
 CONFIG_KALLSYMS_ALL=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -106,6 +108,8 @@ CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_RT_MUTEXES=y
 CONFIG_BASE_SMALL=0
@@ -116,7 +120,6 @@ CONFIG_MODULES=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -163,6 +166,7 @@ CONFIG_CPU_SUBTYPE_SH7203=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -172,8 +176,6 @@ CONFIG_CPU_SUBTYPE_SH7203=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -750,15 +752,17 @@ CONFIG_USB_HID=y
 #
 # Special HID drivers
 #
-CONFIG_HID_COMPAT=y
 CONFIG_HID_A4TECH=y
 CONFIG_HID_APPLE=y
 CONFIG_HID_BELKIN=y
 CONFIG_HID_CHERRY=y
 CONFIG_HID_CHICONY=y
 CONFIG_HID_CYPRESS=y
+# CONFIG_DRAGONRISE_FF is not set
 CONFIG_HID_EZKEY=y
+# CONFIG_HID_KYE is not set
 CONFIG_HID_GYRATION=y
+# CONFIG_HID_KENSINGTON is not set
 CONFIG_HID_LOGITECH=y
 # CONFIG_LOGITECH_FF is not set
 # CONFIG_LOGIRUMBLEPAD2_FF is not set
@@ -874,6 +878,7 @@ CONFIG_LEDS_CLASS=y
 # LED drivers
 #
 CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_GPIO_PLATFORM=y
 
 #
 # LED Triggers
@@ -882,6 +887,7 @@ CONFIG_LEDS_TRIGGERS=y
 CONFIG_LEDS_TRIGGER_TIMER=y
 CONFIG_LEDS_TRIGGER_HEARTBEAT=y
 CONFIG_LEDS_TRIGGER_BACKLIGHT=y
+# CONFIG_LEDS_TRIGGER_GPIO is not set
 CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
 
 #
@@ -951,6 +957,11 @@ CONFIG_FILE_LOCKING=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -989,8 +1000,13 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_HPFS_FS is not set
 # CONFIG_QNX4FS_FS is not set
 CONFIG_ROMFS_FS=y
+CONFIG_ROMFS_BACKED_BY_BLOCK=y
+# CONFIG_ROMFS_BACKED_BY_MTD is not set
+# CONFIG_ROMFS_BACKED_BY_BOTH is not set
+CONFIG_ROMFS_ON_BLOCK=y
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 # CONFIG_NFS_V3 is not set
@@ -1033,6 +1049,9 @@ CONFIG_DEBUG_SHIRQ=y
 CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
 CONFIG_SCHED_DEBUG=y
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_TIMER_STATS is not set
@@ -1076,6 +1095,7 @@ CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
 CONFIG_RING_BUFFER=y
 CONFIG_TRACING=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
@@ -1083,11 +1103,16 @@ CONFIG_TRACING=y
 # CONFIG_FUNCTION_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
 # CONFIG_BOOT_TRACER is not set
 # CONFIG_TRACE_BRANCH_PROFILING is not set
 # CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_FTRACE_STARTUP_TEST is not set
 # CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
@@ -1111,6 +1136,7 @@ CONFIG_DUMP_CODE=y
 # CONFIG_SECURITYFS is not set
 # CONFIG_SECURITY_FILE_CAPABILITIES is not set
 # CONFIG_CRYPTO is not set
+CONFIG_BINARY_PRINTF=y
 
 #
 # Library routines
diff --git a/arch/sh/configs/rts7751r2d1_defconfig b/arch/sh/configs/rts7751r2d1_defconfig
index c0f741af6da8..a4a59f6205ab 100644
--- a/arch/sh/configs/rts7751r2d1_defconfig
+++ b/arch/sh/configs/rts7751r2d1_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 18:33:25 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 12:58:13 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -70,6 +71,7 @@ CONFIG_UID16=y
 # CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -99,6 +101,8 @@ CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -110,7 +114,6 @@ CONFIG_MODULES=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -156,6 +159,7 @@ CONFIG_CPU_SUBTYPE_SH7751R=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -165,8 +169,6 @@ CONFIG_CPU_SUBTYPE_SH7751R=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -302,8 +304,6 @@ CONFIG_CMDLINE="console=tty0 console=ttySC0,115200 root=/dev/sda1 earlyprintk=se
 #
 CONFIG_PCI=y
 CONFIG_SH_PCIDMA_NONCOHERENT=y
-CONFIG_PCI_AUTO=y
-CONFIG_PCI_AUTO_UPDATE_RESOURCES=y
 # CONFIG_PCIEPORTBUS is not set
 # CONFIG_ARCH_SUPPORTS_MSI is not set
 CONFIG_PCI_LEGACY=y
@@ -513,6 +513,7 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_MPT2SAS is not set
 # CONFIG_SCSI_HPTIOP is not set
 # CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
 # CONFIG_FCOE is not set
 # CONFIG_SCSI_DMX3191D is not set
 # CONFIG_SCSI_FUTURE_DOMAIN is not set
@@ -672,6 +673,7 @@ CONFIG_NETDEV_1000=y
 # CONFIG_E1000E is not set
 # CONFIG_IP1000 is not set
 # CONFIG_IGB is not set
+# CONFIG_IGBVF is not set
 # CONFIG_NS83820 is not set
 # CONFIG_HAMACHI is not set
 # CONFIG_YELLOWFIN is not set
@@ -695,6 +697,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
 # CONFIG_S2IO is not set
+# CONFIG_VXGE is not set
 # CONFIG_MYRI10GE is not set
 # CONFIG_NETXEN_NIC is not set
 # CONFIG_NIU is not set
@@ -793,6 +796,7 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=4
 #
 # Non-8250 serial port support
 #
+# CONFIG_SERIAL_MAX3100 is not set
 CONFIG_SERIAL_SH_SCI=y
 CONFIG_SERIAL_SH_SCI_NR_UARTS=1
 CONFIG_SERIAL_SH_SCI_CONSOLE=y
@@ -1079,15 +1083,17 @@ CONFIG_USB_HID=y
 #
 # Special HID drivers
 #
-CONFIG_HID_COMPAT=y
 CONFIG_HID_A4TECH=y
 CONFIG_HID_APPLE=y
 CONFIG_HID_BELKIN=y
 CONFIG_HID_CHERRY=y
 CONFIG_HID_CHICONY=y
 CONFIG_HID_CYPRESS=y
+# CONFIG_DRAGONRISE_FF is not set
 CONFIG_HID_EZKEY=y
+# CONFIG_HID_KYE is not set
 CONFIG_HID_GYRATION=y
+# CONFIG_HID_KENSINGTON is not set
 CONFIG_HID_LOGITECH=y
 # CONFIG_LOGITECH_FF is not set
 # CONFIG_LOGIRUMBLEPAD2_FF is not set
@@ -1291,6 +1297,11 @@ CONFIG_INOTIFY_USER=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -1337,6 +1348,7 @@ CONFIG_MINIX_FS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 # CONFIG_NFS_FS is not set
 # CONFIG_NFSD is not set
@@ -1417,11 +1429,25 @@ CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
 CONFIG_RING_BUFFER=y
 CONFIG_TRACING=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
 #
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_FTRACE_STARTUP_TEST is not set
 # CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
@@ -1524,6 +1550,7 @@ CONFIG_CRYPTO=y
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
 # CONFIG_CRYPTO_DEV_HIFN_795X is not set
+CONFIG_BINARY_PRINTF=y
 
 #
 # Library routines
diff --git a/arch/sh/configs/rts7751r2dplus_defconfig b/arch/sh/configs/rts7751r2dplus_defconfig
index 8feef629e49c..a860435b8847 100644
--- a/arch/sh/configs/rts7751r2dplus_defconfig
+++ b/arch/sh/configs/rts7751r2dplus_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 18:34:12 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 12:59:01 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -70,6 +71,7 @@ CONFIG_UID16=y
 # CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -99,6 +101,8 @@ CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -110,7 +114,6 @@ CONFIG_MODULES=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -156,6 +159,7 @@ CONFIG_CPU_SUBTYPE_SH7751R=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -165,8 +169,6 @@ CONFIG_CPU_SUBTYPE_SH7751R=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -302,8 +304,6 @@ CONFIG_CMDLINE="console=tty0 console=ttySC0,115200 root=/dev/sda1 earlyprintk=se
 #
 CONFIG_PCI=y
 CONFIG_SH_PCIDMA_NONCOHERENT=y
-CONFIG_PCI_AUTO=y
-CONFIG_PCI_AUTO_UPDATE_RESOURCES=y
 # CONFIG_PCIEPORTBUS is not set
 # CONFIG_ARCH_SUPPORTS_MSI is not set
 CONFIG_PCI_LEGACY=y
@@ -424,7 +424,92 @@ CONFIG_FIRMWARE_IN_KERNEL=y
 CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_SYS_HYPERVISOR is not set
 # CONFIG_CONNECTOR is not set
-# CONFIG_MTD is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+# CONFIG_MTD_BLKDEVS is not set
+# CONFIG_MTD_BLOCK is not set
+# CONFIG_MTD_BLOCK_RO is not set
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_INTEL_VR_NOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
 # CONFIG_PARPORT is not set
 CONFIG_BLK_DEV=y
 # CONFIG_BLK_CPQ_CISS_DA is not set
@@ -513,6 +598,7 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_MPT2SAS is not set
 # CONFIG_SCSI_HPTIOP is not set
 # CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
 # CONFIG_FCOE is not set
 # CONFIG_SCSI_DMX3191D is not set
 # CONFIG_SCSI_FUTURE_DOMAIN is not set
@@ -672,6 +758,7 @@ CONFIG_NETDEV_1000=y
 # CONFIG_E1000E is not set
 # CONFIG_IP1000 is not set
 # CONFIG_IGB is not set
+# CONFIG_IGBVF is not set
 # CONFIG_NS83820 is not set
 # CONFIG_HAMACHI is not set
 # CONFIG_YELLOWFIN is not set
@@ -695,6 +782,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
 # CONFIG_S2IO is not set
+# CONFIG_VXGE is not set
 # CONFIG_MYRI10GE is not set
 # CONFIG_NETXEN_NIC is not set
 # CONFIG_NIU is not set
@@ -793,6 +881,7 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=4
 #
 # Non-8250 serial port support
 #
+# CONFIG_SERIAL_MAX3100 is not set
 CONFIG_SERIAL_SH_SCI=y
 CONFIG_SERIAL_SH_SCI_NR_UARTS=1
 CONFIG_SERIAL_SH_SCI_CONSOLE=y
@@ -1079,15 +1168,17 @@ CONFIG_USB_HID=y
 #
 # Special HID drivers
 #
-CONFIG_HID_COMPAT=y
 CONFIG_HID_A4TECH=y
 CONFIG_HID_APPLE=y
 CONFIG_HID_BELKIN=y
 CONFIG_HID_CHERRY=y
 CONFIG_HID_CHICONY=y
 CONFIG_HID_CYPRESS=y
+# CONFIG_DRAGONRISE_FF is not set
 CONFIG_HID_EZKEY=y
+# CONFIG_HID_KYE is not set
 CONFIG_HID_GYRATION=y
+# CONFIG_HID_KENSINGTON is not set
 CONFIG_HID_LOGITECH=y
 # CONFIG_LOGITECH_FF is not set
 # CONFIG_LOGIRUMBLEPAD2_FF is not set
@@ -1291,6 +1382,11 @@ CONFIG_INOTIFY_USER=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -1337,6 +1433,7 @@ CONFIG_MINIX_FS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 # CONFIG_NFS_FS is not set
 # CONFIG_NFSD is not set
@@ -1417,11 +1514,25 @@ CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
 CONFIG_RING_BUFFER=y
 CONFIG_TRACING=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
 #
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_FTRACE_STARTUP_TEST is not set
 # CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
@@ -1524,6 +1635,7 @@ CONFIG_CRYPTO=y
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
 # CONFIG_CRYPTO_DEV_HIFN_795X is not set
+CONFIG_BINARY_PRINTF=y
 
 #
 # Library routines
diff --git a/arch/sh/configs/sdk7780_defconfig b/arch/sh/configs/sdk7780_defconfig
index 739e2299ae80..a629b79a1844 100644
--- a/arch/sh/configs/sdk7780_defconfig
+++ b/arch/sh/configs/sdk7780_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 18:34:43 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 12:59:32 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -41,6 +42,7 @@ CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
 CONFIG_BSD_PROCESS_ACCT=y
 # CONFIG_BSD_PROCESS_ACCT_V3 is not set
 # CONFIG_TASKSTATS is not set
@@ -73,6 +75,7 @@ CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS=y
 CONFIG_KALLSYMS_ALL=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -93,6 +96,7 @@ CONFIG_COMPAT_BRK=y
 CONFIG_SLUB=y
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
 CONFIG_HAVE_IOREMAP_PROT=y
@@ -100,6 +104,8 @@ CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -112,7 +118,6 @@ CONFIG_MODULE_FORCE_UNLOAD=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
 CONFIG_LBD=y
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -159,6 +164,7 @@ CONFIG_CPU_SH4A=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 CONFIG_CPU_SUBTYPE_SH7780=y
@@ -168,8 +174,6 @@ CONFIG_CPU_SUBTYPE_SH7780=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -310,8 +314,6 @@ CONFIG_CMDLINE="mem=128M console=tty0 console=ttySC0,115200 ip=bootp root=/dev/n
 #
 CONFIG_PCI=y
 CONFIG_SH_PCIDMA_NONCOHERENT=y
-CONFIG_PCI_AUTO=y
-CONFIG_PCI_AUTO_UPDATE_RESOURCES=y
 # CONFIG_PCIEPORTBUS is not set
 # CONFIG_ARCH_SUPPORTS_MSI is not set
 # CONFIG_PCI_LEGACY is not set
@@ -646,6 +648,7 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_MPT2SAS is not set
 # CONFIG_SCSI_HPTIOP is not set
 # CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
 # CONFIG_FCOE is not set
 # CONFIG_SCSI_DMX3191D is not set
 # CONFIG_SCSI_FUTURE_DOMAIN is not set
@@ -1091,15 +1094,17 @@ CONFIG_USB_HID=y
 #
 # Special HID drivers
 #
-CONFIG_HID_COMPAT=y
 CONFIG_HID_A4TECH=y
 CONFIG_HID_APPLE=y
 CONFIG_HID_BELKIN=y
 CONFIG_HID_CHERRY=y
 CONFIG_HID_CHICONY=y
 CONFIG_HID_CYPRESS=y
+# CONFIG_DRAGONRISE_FF is not set
 CONFIG_HID_EZKEY=y
+# CONFIG_HID_KYE is not set
 CONFIG_HID_GYRATION=y
+# CONFIG_HID_KENSINGTON is not set
 CONFIG_HID_LOGITECH=y
 # CONFIG_LOGITECH_FF is not set
 # CONFIG_LOGIRUMBLEPAD2_FF is not set
@@ -1257,6 +1262,7 @@ CONFIG_EXT2_FS_POSIX_ACL=y
 # CONFIG_EXT2_FS_SECURITY is not set
 # CONFIG_EXT2_FS_XIP is not set
 CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 CONFIG_EXT3_FS_XATTR=y
 CONFIG_EXT3_FS_POSIX_ACL=y
 # CONFIG_EXT3_FS_SECURITY is not set
@@ -1281,6 +1287,11 @@ CONFIG_AUTOFS4_FS=y
 CONFIG_GENERIC_ACL=y
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 CONFIG_ISO9660_FS=y
@@ -1331,6 +1342,7 @@ CONFIG_MINIX_FS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
@@ -1418,6 +1430,9 @@ CONFIG_DEBUG_KERNEL=y
 CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
 # CONFIG_SCHED_DEBUG is not set
 # CONFIG_SCHEDSTATS is not set
 CONFIG_TIMER_STATS=y
@@ -1455,6 +1470,7 @@ CONFIG_SYSCTL_SYSCALL_CHECK=y
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
@@ -1464,9 +1480,14 @@ CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
 # CONFIG_PREEMPT_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
 # CONFIG_BOOT_TRACER is not set
 # CONFIG_TRACE_BRANCH_PROFILING is not set
 # CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
@@ -1580,6 +1601,7 @@ CONFIG_CRYPTO_DES=y
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
 # CONFIG_CRYPTO_DEV_HIFN_795X is not set
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
diff --git a/arch/sh/configs/se7206_defconfig b/arch/sh/configs/se7206_defconfig
index d30e0a7ad9f1..5caf85a3312d 100644
--- a/arch/sh/configs/se7206_defconfig
+++ b/arch/sh/configs/se7206_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 18:39:37 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 13:01:02 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -40,6 +41,7 @@ CONFIG_LOCALVERSION_AUTO=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
 CONFIG_BSD_PROCESS_ACCT=y
 # CONFIG_BSD_PROCESS_ACCT_V3 is not set
 # CONFIG_TASKSTATS is not set
@@ -63,6 +65,7 @@ CONFIG_CGROUP_DEBUG=y
 CONFIG_CGROUP_NS=y
 # CONFIG_CGROUP_FREEZER is not set
 CONFIG_CGROUP_DEVICE=y
+# CONFIG_CPUSETS is not set
 CONFIG_CGROUP_CPUACCT=y
 CONFIG_RESOURCE_COUNTERS=y
 CONFIG_CGROUP_MEM_RES_CTLR=y
@@ -80,7 +83,6 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
-CONFIG_INITRAMFS_COMPRESSION_NONE=y
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -90,6 +92,7 @@ CONFIG_EMBEDDED=y
 CONFIG_KALLSYMS=y
 CONFIG_KALLSYMS_ALL=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -116,6 +119,8 @@ CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_RT_MUTEXES=y
 CONFIG_BASE_SMALL=0
@@ -127,7 +132,6 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -174,6 +178,7 @@ CONFIG_CPU_SUBTYPE_SH7206=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -183,8 +188,6 @@ CONFIG_CPU_SUBTYPE_SH7206=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -746,6 +749,11 @@ CONFIG_FILE_LOCKING=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -785,8 +793,13 @@ CONFIG_CRAMFS=y
 # CONFIG_HPFS_FS is not set
 # CONFIG_QNX4FS_FS is not set
 CONFIG_ROMFS_FS=y
+CONFIG_ROMFS_BACKED_BY_BLOCK=y
+# CONFIG_ROMFS_BACKED_BY_MTD is not set
+# CONFIG_ROMFS_BACKED_BY_BOTH is not set
+CONFIG_ROMFS_ON_BLOCK=y
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
@@ -831,6 +844,9 @@ CONFIG_DEBUG_KERNEL=y
 CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
 CONFIG_SCHED_DEBUG=y
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_TIMER_STATS is not set
@@ -869,6 +885,7 @@ CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
 CONFIG_RING_BUFFER=y
 CONFIG_TRACING=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
@@ -876,11 +893,16 @@ CONFIG_TRACING=y
 # CONFIG_FUNCTION_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
 # CONFIG_BOOT_TRACER is not set
 # CONFIG_TRACE_BRANCH_PROFILING is not set
 # CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_FTRACE_STARTUP_TEST is not set
 # CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
@@ -991,6 +1013,7 @@ CONFIG_CRYPTO_LZO=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 # CONFIG_CRYPTO_HW is not set
+CONFIG_BINARY_PRINTF=y
 
 #
 # Library routines
diff --git a/arch/sh/configs/se7343_defconfig b/arch/sh/configs/se7343_defconfig
index fbb72d029e68..004d531716dc 100644
--- a/arch/sh/configs/se7343_defconfig
+++ b/arch/sh/configs/se7343_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 18:42:00 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 13:01:44 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -40,6 +41,7 @@ CONFIG_LOCALVERSION_AUTO=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_TASKSTATS is not set
 # CONFIG_AUDIT is not set
@@ -73,6 +75,7 @@ CONFIG_UID16=y
 # CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -91,6 +94,7 @@ CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
 CONFIG_HAVE_IOREMAP_PROT=y
@@ -98,6 +102,8 @@ CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_BASE_SMALL=0
@@ -109,7 +115,6 @@ CONFIG_MODULE_FORCE_UNLOAD=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -158,6 +163,7 @@ CONFIG_ARCH_SHMOBILE=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -167,8 +173,6 @@ CONFIG_ARCH_SHMOBILE=y
 CONFIG_CPU_SUBTYPE_SH7343=y
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -769,6 +773,7 @@ CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
 # CONFIG_SOC_CAMERA is not set
 CONFIG_V4L_USB_DRIVERS=y
 # CONFIG_USB_VIDEO_CLASS is not set
+CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
 CONFIG_USB_GSPCA=m
 # CONFIG_USB_M5602 is not set
 # CONFIG_USB_STV06XX is not set
@@ -800,6 +805,7 @@ CONFIG_USB_GSPCA=m
 # CONFIG_VIDEO_PVRUSB2 is not set
 # CONFIG_VIDEO_HDPVR is not set
 # CONFIG_VIDEO_EM28XX is not set
+# CONFIG_VIDEO_CX231XX is not set
 # CONFIG_VIDEO_USBVISION is not set
 # CONFIG_USB_VICAM is not set
 # CONFIG_USB_IBMCAM is not set
@@ -813,6 +819,7 @@ CONFIG_USB_GSPCA=m
 # CONFIG_USB_STV680 is not set
 # CONFIG_USB_ZC0301 is not set
 # CONFIG_USB_PWC is not set
+CONFIG_USB_PWC_INPUT_EVDEV=y
 # CONFIG_USB_ZR364XX is not set
 # CONFIG_USB_STKWEBCAM is not set
 # CONFIG_USB_S2255 is not set
@@ -914,15 +921,17 @@ CONFIG_USB_HID=y
 #
 # Special HID drivers
 #
-CONFIG_HID_COMPAT=y
 CONFIG_HID_A4TECH=y
 CONFIG_HID_APPLE=y
 CONFIG_HID_BELKIN=y
 CONFIG_HID_CHERRY=y
 CONFIG_HID_CHICONY=y
 CONFIG_HID_CYPRESS=y
+# CONFIG_DRAGONRISE_FF is not set
 CONFIG_HID_EZKEY=y
+# CONFIG_HID_KYE is not set
 CONFIG_HID_GYRATION=y
+# CONFIG_HID_KENSINGTON is not set
 CONFIG_HID_LOGITECH=y
 # CONFIG_LOGITECH_FF is not set
 # CONFIG_LOGIRUMBLEPAD2_FF is not set
@@ -1050,6 +1059,7 @@ CONFIG_EXT2_FS=y
 # CONFIG_EXT2_FS_XATTR is not set
 # CONFIG_EXT2_FS_XIP is not set
 CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 CONFIG_EXT3_FS_XATTR=y
 # CONFIG_EXT3_FS_POSIX_ACL is not set
 # CONFIG_EXT3_FS_SECURITY is not set
@@ -1071,6 +1081,11 @@ CONFIG_FILE_LOCKING=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -1125,6 +1140,7 @@ CONFIG_CRAMFS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
@@ -1174,10 +1190,23 @@ CONFIG_FRAME_WARN=1024
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
 #
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
@@ -1279,6 +1308,7 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
diff --git a/arch/sh/configs/se7619_defconfig b/arch/sh/configs/se7619_defconfig
index 125304e80f57..edbece52afc1 100644
--- a/arch/sh/configs/se7619_defconfig
+++ b/arch/sh/configs/se7619_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 18:44:53 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 13:02:32 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -61,6 +62,7 @@ CONFIG_EMBEDDED=y
 # CONFIG_UID16 is not set
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_KALLSYMS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_HOTPLUG is not set
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -78,11 +80,14 @@ CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_BASE_SMALL=1
@@ -134,6 +139,7 @@ CONFIG_CPU_SUBTYPE_SH7619=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -143,8 +149,6 @@ CONFIG_CPU_SUBTYPE_SH7619=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -513,7 +517,6 @@ CONFIG_HID=y
 #
 # Special HID drivers
 #
-CONFIG_HID_COMPAT=y
 CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
 # CONFIG_USB_ARCH_HAS_OHCI is not set
@@ -564,6 +567,11 @@ CONFIG_FILE_LOCKING=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -601,8 +609,13 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_HPFS_FS is not set
 # CONFIG_QNX4FS_FS is not set
 CONFIG_ROMFS_FS=y
+CONFIG_ROMFS_BACKED_BY_BLOCK=y
+# CONFIG_ROMFS_BACKED_BY_MTD is not set
+# CONFIG_ROMFS_BACKED_BY_BOTH is not set
+CONFIG_ROMFS_ON_BLOCK=y
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 
 #
 # Partition Types
@@ -630,10 +643,21 @@ CONFIG_FRAME_WARN=1024
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
 #
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
@@ -647,6 +671,7 @@ CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SECURITYFS is not set
 # CONFIG_SECURITY_FILE_CAPABILITIES is not set
 # CONFIG_CRYPTO is not set
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
diff --git a/arch/sh/configs/se7705_defconfig b/arch/sh/configs/se7705_defconfig
index 0308abf52384..bae161c66835 100644
--- a/arch/sh/configs/se7705_defconfig
+++ b/arch/sh/configs/se7705_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 18:45:56 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 13:02:52 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -62,7 +63,6 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
-CONFIG_INITRAMFS_COMPRESSION_NONE=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -70,6 +70,7 @@ CONFIG_EMBEDDED=y
 CONFIG_UID16=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_KALLSYMS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_HOTPLUG is not set
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -88,12 +89,15 @@ CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 CONFIG_HAVE_IOREMAP_PROT=y
 CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -150,6 +154,7 @@ CONFIG_CPU_SUBTYPE_SH7705=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -159,8 +164,6 @@ CONFIG_CPU_SUBTYPE_SH7705=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -698,7 +701,6 @@ CONFIG_HID=y
 #
 # Special HID drivers
 #
-CONFIG_HID_COMPAT=y
 CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
 # CONFIG_USB_ARCH_HAS_OHCI is not set
@@ -752,6 +754,11 @@ CONFIG_INOTIFY_USER=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -804,6 +811,7 @@ CONFIG_JFFS2_RTIME=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 # CONFIG_NFS_V3 is not set
@@ -847,10 +855,23 @@ CONFIG_FRAME_WARN=1024
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
 #
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_PREEMPT_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
@@ -949,6 +970,7 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
diff --git a/arch/sh/configs/se7712_defconfig b/arch/sh/configs/se7712_defconfig
index a8c24b703489..330043f3c316 100644
--- a/arch/sh/configs/se7712_defconfig
+++ b/arch/sh/configs/se7712_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 18:48:18 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 13:03:27 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_FIND_NEXT_BIT=y
@@ -38,6 +39,7 @@ CONFIG_LOCALVERSION=""
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
 CONFIG_BSD_PROCESS_ACCT=y
 # CONFIG_BSD_PROCESS_ACCT_V3 is not set
 # CONFIG_TASKSTATS is not set
@@ -69,6 +71,7 @@ CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS=y
 CONFIG_KALLSYMS_ALL=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 # CONFIG_BUG is not set
@@ -87,6 +90,7 @@ CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
 CONFIG_HAVE_IOREMAP_PROT=y
@@ -94,6 +98,8 @@ CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -105,7 +111,6 @@ CONFIG_MODULES=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -151,6 +156,7 @@ CONFIG_CPU_SUBTYPE_SH7712=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -160,8 +166,6 @@ CONFIG_CPU_SUBTYPE_SH7712=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -585,6 +589,7 @@ CONFIG_SCSI_WAIT_SCAN=m
 CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_ISCSI_TCP is not set
 # CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
 # CONFIG_SCSI_DEBUG is not set
 # CONFIG_SCSI_DH is not set
 # CONFIG_SCSI_OSD_INITIATOR is not set
@@ -812,6 +817,7 @@ CONFIG_EXT2_FS_POSIX_ACL=y
 CONFIG_EXT2_FS_SECURITY=y
 # CONFIG_EXT2_FS_XIP is not set
 CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 CONFIG_EXT3_FS_XATTR=y
 # CONFIG_EXT3_FS_POSIX_ACL is not set
 # CONFIG_EXT3_FS_SECURITY is not set
@@ -833,6 +839,11 @@ CONFIG_FILE_LOCKING=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -887,6 +898,7 @@ CONFIG_CRAMFS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 # CONFIG_NFS_V3 is not set
@@ -927,6 +939,7 @@ CONFIG_FRAME_WARN=1024
 CONFIG_DEBUG_KERNEL=y
 # CONFIG_DEBUG_SHIRQ is not set
 # CONFIG_DETECT_SOFTLOCKUP is not set
+# CONFIG_DETECT_HUNG_TASK is not set
 CONFIG_SCHED_DEBUG=y
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_TIMER_STATS is not set
@@ -961,6 +974,7 @@ CONFIG_SYSCTL_SYSCALL_CHECK=y
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
@@ -969,9 +983,14 @@ CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
 # CONFIG_IRQSOFF_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
 # CONFIG_BOOT_TRACER is not set
 # CONFIG_TRACE_BRANCH_PROFILING is not set
 # CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
@@ -1090,6 +1109,7 @@ CONFIG_CRYPTO_DEFLATE=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
diff --git a/arch/sh/configs/se7721_defconfig b/arch/sh/configs/se7721_defconfig
index 4b79c2567dc8..56478918440d 100644
--- a/arch/sh/configs/se7721_defconfig
+++ b/arch/sh/configs/se7721_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 18:51:44 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 13:04:19 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_FIND_NEXT_BIT=y
@@ -38,6 +39,7 @@ CONFIG_LOCALVERSION=""
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
 CONFIG_BSD_PROCESS_ACCT=y
 # CONFIG_BSD_PROCESS_ACCT_V3 is not set
 # CONFIG_TASKSTATS is not set
@@ -73,6 +75,7 @@ CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS=y
 CONFIG_KALLSYMS_ALL=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 # CONFIG_BUG is not set
@@ -91,6 +94,7 @@ CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
 CONFIG_HAVE_IOREMAP_PROT=y
@@ -98,6 +102,8 @@ CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -109,7 +115,6 @@ CONFIG_MODULES=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -155,6 +160,7 @@ CONFIG_CPU_SUBTYPE_SH7721=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -164,8 +170,6 @@ CONFIG_CPU_SUBTYPE_SH7721=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -776,15 +780,17 @@ CONFIG_USB_HID=y
 #
 # Special HID drivers
 #
-CONFIG_HID_COMPAT=y
 CONFIG_HID_A4TECH=y
 CONFIG_HID_APPLE=y
 CONFIG_HID_BELKIN=y
 CONFIG_HID_CHERRY=y
 CONFIG_HID_CHICONY=y
 CONFIG_HID_CYPRESS=y
+# CONFIG_DRAGONRISE_FF is not set
 CONFIG_HID_EZKEY=y
+# CONFIG_HID_KYE is not set
 CONFIG_HID_GYRATION=y
+# CONFIG_HID_KENSINGTON is not set
 CONFIG_HID_LOGITECH=y
 # CONFIG_LOGITECH_FF is not set
 # CONFIG_LOGIRUMBLEPAD2_FF is not set
@@ -943,6 +949,7 @@ CONFIG_EXT2_FS_POSIX_ACL=y
 CONFIG_EXT2_FS_SECURITY=y
 # CONFIG_EXT2_FS_XIP is not set
 CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 CONFIG_EXT3_FS_XATTR=y
 # CONFIG_EXT3_FS_POSIX_ACL is not set
 # CONFIG_EXT3_FS_SECURITY is not set
@@ -964,6 +971,11 @@ CONFIG_FILE_LOCKING=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -1021,6 +1033,7 @@ CONFIG_CRAMFS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 # CONFIG_NETWORK_FILESYSTEMS is not set
 
 #
@@ -1085,6 +1098,7 @@ CONFIG_FRAME_WARN=1024
 CONFIG_DEBUG_KERNEL=y
 # CONFIG_DEBUG_SHIRQ is not set
 # CONFIG_DETECT_SOFTLOCKUP is not set
+# CONFIG_DETECT_HUNG_TASK is not set
 CONFIG_SCHED_DEBUG=y
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_TIMER_STATS is not set
@@ -1119,6 +1133,7 @@ CONFIG_FRAME_POINTER=y
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
@@ -1127,9 +1142,14 @@ CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
 # CONFIG_IRQSOFF_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
 # CONFIG_BOOT_TRACER is not set
 # CONFIG_TRACE_BRANCH_PROFILING is not set
 # CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
@@ -1248,6 +1268,7 @@ CONFIG_CRYPTO_DEFLATE=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
diff --git a/arch/sh/configs/se7722_defconfig b/arch/sh/configs/se7722_defconfig
index 82bdaac45fb5..726fdbdb2807 100644
--- a/arch/sh/configs/se7722_defconfig
+++ b/arch/sh/configs/se7722_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 18:55:10 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 13:05:29 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -69,7 +70,6 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
-CONFIG_INITRAMFS_COMPRESSION_NONE=y
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -78,6 +78,7 @@ CONFIG_UID16=y
 CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -97,6 +98,7 @@ CONFIG_COMPAT_BRK=y
 CONFIG_SLUB=y
 # CONFIG_SLOB is not set
 CONFIG_PROFILING=y
+# CONFIG_MARKERS is not set
 # CONFIG_OPROFILE is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
@@ -105,6 +107,8 @@ CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -117,7 +121,6 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -167,6 +170,7 @@ CONFIG_ARCH_SHMOBILE=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -176,8 +180,6 @@ CONFIG_ARCH_SHMOBILE=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 CONFIG_CPU_SUBTYPE_SH7722=y
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -486,6 +488,7 @@ CONFIG_SCSI_WAIT_SCAN=m
 CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_ISCSI_TCP is not set
 # CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
 # CONFIG_SCSI_DEBUG is not set
 # CONFIG_SCSI_DH is not set
 # CONFIG_SCSI_OSD_INITIATOR is not set
@@ -692,7 +695,6 @@ CONFIG_HID=y
 #
 # Special HID drivers
 #
-CONFIG_HID_COMPAT=y
 CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
 # CONFIG_USB_ARCH_HAS_OHCI is not set
@@ -766,6 +768,7 @@ CONFIG_EXT2_FS=y
 # CONFIG_EXT2_FS_XATTR is not set
 # CONFIG_EXT2_FS_XIP is not set
 CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 CONFIG_EXT3_FS_XATTR=y
 # CONFIG_EXT3_FS_POSIX_ACL is not set
 # CONFIG_EXT3_FS_SECURITY is not set
@@ -789,6 +792,11 @@ CONFIG_INOTIFY_USER=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -832,6 +840,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 # CONFIG_NFS_FS is not set
 # CONFIG_NFSD is not set
@@ -872,11 +881,25 @@ CONFIG_DEBUG_FS=y
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
 #
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_PREEMPT_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 CONFIG_SH_STANDARD_BIOS=y
@@ -977,6 +1000,7 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
diff --git a/arch/sh/configs/se7724_defconfig b/arch/sh/configs/se7724_defconfig
new file mode 100644
index 000000000000..96d2587467e6
--- /dev/null
+++ b/arch/sh/configs/se7724_defconfig
@@ -0,0 +1,1552 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.30-rc6
+# Tue May 26 13:18:09 2009
+#
+CONFIG_SUPERH=y
+CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
+CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_SYS_SUPPORTS_CMT=y
+CONFIG_SYS_SUPPORTS_TMU=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_NO_VIRT_TO_BUS=y
+CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_LOCK_KERNEL=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+CONFIG_BSD_PROCESS_ACCT=y
+# CONFIG_BSD_PROCESS_ACCT_V3 is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+CONFIG_SYSFS_DEPRECATED=y
+CONFIG_SYSFS_DEPRECATED_V2=y
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EMBEDDED=y
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+# CONFIG_KALLSYMS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_IOREMAP_PROT=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_FREEZER is not set
+
+#
+# System type
+#
+CONFIG_CPU_SH4=y
+CONFIG_CPU_SH4A=y
+CONFIG_CPU_SHX2=y
+CONFIG_ARCH_SHMOBILE=y
+# CONFIG_CPU_SUBTYPE_SH7619 is not set
+# CONFIG_CPU_SUBTYPE_SH7201 is not set
+# CONFIG_CPU_SUBTYPE_SH7203 is not set
+# CONFIG_CPU_SUBTYPE_SH7206 is not set
+# CONFIG_CPU_SUBTYPE_SH7263 is not set
+# CONFIG_CPU_SUBTYPE_MXG is not set
+# CONFIG_CPU_SUBTYPE_SH7705 is not set
+# CONFIG_CPU_SUBTYPE_SH7706 is not set
+# CONFIG_CPU_SUBTYPE_SH7707 is not set
+# CONFIG_CPU_SUBTYPE_SH7708 is not set
+# CONFIG_CPU_SUBTYPE_SH7709 is not set
+# CONFIG_CPU_SUBTYPE_SH7710 is not set
+# CONFIG_CPU_SUBTYPE_SH7712 is not set
+# CONFIG_CPU_SUBTYPE_SH7720 is not set
+# CONFIG_CPU_SUBTYPE_SH7721 is not set
+# CONFIG_CPU_SUBTYPE_SH7750 is not set
+# CONFIG_CPU_SUBTYPE_SH7091 is not set
+# CONFIG_CPU_SUBTYPE_SH7750R is not set
+# CONFIG_CPU_SUBTYPE_SH7750S is not set
+# CONFIG_CPU_SUBTYPE_SH7751 is not set
+# CONFIG_CPU_SUBTYPE_SH7751R is not set
+# CONFIG_CPU_SUBTYPE_SH7760 is not set
+# CONFIG_CPU_SUBTYPE_SH4_202 is not set
+# CONFIG_CPU_SUBTYPE_SH7723 is not set
+CONFIG_CPU_SUBTYPE_SH7724=y
+# CONFIG_CPU_SUBTYPE_SH7763 is not set
+# CONFIG_CPU_SUBTYPE_SH7770 is not set
+# CONFIG_CPU_SUBTYPE_SH7780 is not set
+# CONFIG_CPU_SUBTYPE_SH7785 is not set
+# CONFIG_CPU_SUBTYPE_SH7786 is not set
+# CONFIG_CPU_SUBTYPE_SHX3 is not set
+# CONFIG_CPU_SUBTYPE_SH7343 is not set
+# CONFIG_CPU_SUBTYPE_SH7722 is not set
+# CONFIG_CPU_SUBTYPE_SH7366 is not set
+
+#
+# Memory management options
+#
+CONFIG_QUICKLIST=y
+CONFIG_MMU=y
+CONFIG_PAGE_OFFSET=0x80000000
+CONFIG_FORCE_MAX_ZONEORDER=11
+CONFIG_MEMORY_START=0x08000000
+CONFIG_MEMORY_SIZE=0x08000000
+CONFIG_29BIT=y
+# CONFIG_X2TLB is not set
+CONFIG_VSYSCALL=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_DEFAULT=y
+CONFIG_MAX_ACTIVE_REGIONS=1
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_8KB is not set
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_SPARSEMEM_STATIC=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_NR_QUICK=2
+CONFIG_UNEVICTABLE_LRU=y
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+
+#
+# Cache configuration
+#
+CONFIG_CACHE_WRITEBACK=y
+# CONFIG_CACHE_WRITETHROUGH is not set
+# CONFIG_CACHE_OFF is not set
+
+#
+# Processor features
+#
+CONFIG_CPU_LITTLE_ENDIAN=y
+# CONFIG_CPU_BIG_ENDIAN is not set
+CONFIG_SH_FPU=y
+# CONFIG_SH_STORE_QUEUES is not set
+CONFIG_CPU_HAS_INTEVT=y
+CONFIG_CPU_HAS_SR_RB=y
+CONFIG_CPU_HAS_PTEA=y
+CONFIG_CPU_HAS_FPU=y
+
+#
+# Board support
+#
+CONFIG_SOLUTION_ENGINE=y
+CONFIG_SH_7724_SOLUTION_ENGINE=y
+
+#
+# Timer and clock configuration
+#
+CONFIG_SH_TIMER_TMU=y
+# CONFIG_SH_TIMER_CMT is not set
+CONFIG_SH_PCLK_FREQ=33333333
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+
+#
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+
+#
+# DMA support
+#
+# CONFIG_SH_DMA is not set
+
+#
+# Companion Chips
+#
+
+#
+# Additional SuperH Device Drivers
+#
+CONFIG_HEARTBEAT=y
+# CONFIG_PUSH_SWITCH is not set
+
+#
+# Kernel features
+#
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+# CONFIG_SCHED_HRTICK is not set
+# CONFIG_KEXEC is not set
+# CONFIG_CRASH_DUMP is not set
+CONFIG_SECCOMP=y
+# CONFIG_PREEMPT_NONE is not set
+# CONFIG_PREEMPT_VOLUNTARY is not set
+CONFIG_PREEMPT=y
+CONFIG_GUSA=y
+
+#
+# Boot options
+#
+CONFIG_ZERO_PAGE_OFFSET=0x00001000
+CONFIG_BOOT_LINK_OFFSET=0x00800000
+CONFIG_ENTRY_OFFSET=0x00001000
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE="console=tty1 console=ttySC3,115200 root=/dev/nfs ip=dhcp memchunk.vpu=4m"
+
+#
+# Bus options
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options (EXPERIMENTAL)
+#
+# CONFIG_PM is not set
+# CONFIG_CPU_IDLE is not set
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_ASK_IP_FIB_HASH=y
+# CONFIG_IP_FIB_TRIE is not set
+CONFIG_IP_FIB_HASH=y
+# CONFIG_IP_MULTIPLE_TABLES is not set
+# CONFIG_IP_ROUTE_MULTIPATH is not set
+# CONFIG_IP_ROUTE_VERBOSE is not set
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_IP_PNP_BOOTP is not set
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+CONFIG_WIRELESS=y
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_OLD_REGULATORY is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_LIB80211 is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_PHYSMAP=y
+# CONFIG_MTD_PHYSMAP_COMPAT is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_MTD_UBI_BEB_RESERVE=1
+# CONFIG_MTD_UBI_GLUEBI is not set
+
+#
+# UBI debugging options
+#
+# CONFIG_MTD_UBI_DEBUG is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=4
+CONFIG_BLK_DEV_RAM_SIZE=4096
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_HD is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_ICS932S401 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_ISL29003 is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_AT25 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_93CX6 is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+CONFIG_NETDEVICES=y
+CONFIG_COMPAT_NET_DEV_OPS=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+CONFIG_SMSC_PHY=y
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_FIXED_PHY is not set
+CONFIG_MDIO_BITBANG=y
+# CONFIG_MDIO_GPIO is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_AX88796 is not set
+# CONFIG_STNIC is not set
+CONFIG_SMC91X=y
+# CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMC911X is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_GPIO is not set
+CONFIG_KEYBOARD_SH_KEYSC=y
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+CONFIG_VT_HW_CONSOLE_BINDING=y
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_MAX3100 is not set
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_SH_SCI_NR_UARTS=6
+CONFIG_SERIAL_SH_SCI_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_GPIO is not set
+# CONFIG_I2C_OCORES is not set
+CONFIG_I2C_SH_MOBILE=y
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+CONFIG_SPI=y
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+CONFIG_SPI_BITBANG=y
+# CONFIG_SPI_GPIO is not set
+# CONFIG_SPI_SH_SCI is not set
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_REGULATOR is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+CONFIG_VIDEO_DEV=y
+CONFIG_VIDEO_V4L2_COMMON=y
+# CONFIG_VIDEO_ALLOW_V4L1 is not set
+CONFIG_VIDEO_V4L1_COMPAT=y
+# CONFIG_DVB_CORE is not set
+CONFIG_VIDEO_MEDIA=y
+
+#
+# Multimedia drivers
+#
+# CONFIG_MEDIA_ATTACH is not set
+CONFIG_MEDIA_TUNER=y
+# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
+CONFIG_MEDIA_TUNER_SIMPLE=y
+CONFIG_MEDIA_TUNER_TDA8290=y
+CONFIG_MEDIA_TUNER_TDA9887=y
+CONFIG_MEDIA_TUNER_TEA5761=y
+CONFIG_MEDIA_TUNER_TEA5767=y
+CONFIG_MEDIA_TUNER_MT20XX=y
+CONFIG_MEDIA_TUNER_XC2028=y
+CONFIG_MEDIA_TUNER_XC5000=y
+CONFIG_MEDIA_TUNER_MC44S803=y
+CONFIG_VIDEO_V4L2=y
+CONFIG_VIDEOBUF_GEN=y
+CONFIG_VIDEOBUF_DMA_CONTIG=y
+CONFIG_VIDEO_CAPTURE_DRIVERS=y
+# CONFIG_VIDEO_ADV_DEBUG is not set
+# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
+CONFIG_VIDEO_HELPER_CHIPS_AUTO=y
+# CONFIG_VIDEO_VIVI is not set
+# CONFIG_VIDEO_SAA5246A is not set
+# CONFIG_VIDEO_SAA5249 is not set
+CONFIG_SOC_CAMERA=y
+# CONFIG_SOC_CAMERA_MT9M001 is not set
+# CONFIG_SOC_CAMERA_MT9M111 is not set
+# CONFIG_SOC_CAMERA_MT9T031 is not set
+# CONFIG_SOC_CAMERA_MT9V022 is not set
+# CONFIG_SOC_CAMERA_TW9910 is not set
+# CONFIG_SOC_CAMERA_PLATFORM is not set
+CONFIG_SOC_CAMERA_OV772X=y
+CONFIG_VIDEO_SH_MOBILE_CEU=y
+CONFIG_V4L_USB_DRIVERS=y
+# CONFIG_USB_VIDEO_CLASS is not set
+CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
+CONFIG_USB_GSPCA=m
+# CONFIG_USB_M5602 is not set
+# CONFIG_USB_STV06XX is not set
+# CONFIG_USB_GSPCA_CONEX is not set
+# CONFIG_USB_GSPCA_ETOMS is not set
+# CONFIG_USB_GSPCA_FINEPIX is not set
+# CONFIG_USB_GSPCA_MARS is not set
+# CONFIG_USB_GSPCA_MR97310A is not set
+# CONFIG_USB_GSPCA_OV519 is not set
+# CONFIG_USB_GSPCA_OV534 is not set
+# CONFIG_USB_GSPCA_PAC207 is not set
+# CONFIG_USB_GSPCA_PAC7311 is not set
+# CONFIG_USB_GSPCA_SONIXB is not set
+# CONFIG_USB_GSPCA_SONIXJ is not set
+# CONFIG_USB_GSPCA_SPCA500 is not set
+# CONFIG_USB_GSPCA_SPCA501 is not set
+# CONFIG_USB_GSPCA_SPCA505 is not set
+# CONFIG_USB_GSPCA_SPCA506 is not set
+# CONFIG_USB_GSPCA_SPCA508 is not set
+# CONFIG_USB_GSPCA_SPCA561 is not set
+# CONFIG_USB_GSPCA_SQ905 is not set
+# CONFIG_USB_GSPCA_SQ905C is not set
+# CONFIG_USB_GSPCA_STK014 is not set
+# CONFIG_USB_GSPCA_SUNPLUS is not set
+# CONFIG_USB_GSPCA_T613 is not set
+# CONFIG_USB_GSPCA_TV8532 is not set
+# CONFIG_USB_GSPCA_VC032X is not set
+# CONFIG_USB_GSPCA_ZC3XX is not set
+# CONFIG_VIDEO_PVRUSB2 is not set
+# CONFIG_VIDEO_HDPVR is not set
+# CONFIG_VIDEO_EM28XX is not set
+# CONFIG_VIDEO_CX231XX is not set
+# CONFIG_VIDEO_USBVISION is not set
+# CONFIG_USB_ET61X251 is not set
+# CONFIG_USB_SN9C102 is not set
+# CONFIG_USB_ZC0301 is not set
+CONFIG_USB_PWC_INPUT_EVDEV=y
+# CONFIG_USB_ZR364XX is not set
+# CONFIG_USB_STKWEBCAM is not set
+# CONFIG_USB_S2255 is not set
+# CONFIG_RADIO_ADAPTERS is not set
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+# CONFIG_FB_CFB_FILLRECT is not set
+# CONFIG_FB_CFB_COPYAREA is not set
+# CONFIG_FB_CFB_IMAGEBLIT is not set
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+CONFIG_FB_SYS_FILLRECT=y
+CONFIG_FB_SYS_COPYAREA=y
+CONFIG_FB_SYS_IMAGEBLIT=y
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+CONFIG_FB_SYS_FOPS=y
+CONFIG_FB_DEFERRED_IO=y
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_SH_MOBILE_LCDC=y
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+# CONFIG_FB_BROADSHEET is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+# CONFIG_LOGO_LINUX_MONO is not set
+# CONFIG_LOGO_LINUX_VGA16 is not set
+# CONFIG_LOGO_LINUX_CLUT224 is not set
+# CONFIG_LOGO_SUPERH_MONO is not set
+# CONFIG_LOGO_SUPERH_VGA16 is not set
+CONFIG_LOGO_SUPERH_CLUT224=y
+# CONFIG_SOUND is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_HID_PID is not set
+# CONFIG_USB_HIDDEV is not set
+
+#
+# Special HID drivers
+#
+# CONFIG_HID_A4TECH is not set
+# CONFIG_HID_APPLE is not set
+# CONFIG_HID_BELKIN is not set
+# CONFIG_HID_CHERRY is not set
+# CONFIG_HID_CHICONY is not set
+# CONFIG_HID_CYPRESS is not set
+# CONFIG_DRAGONRISE_FF is not set
+# CONFIG_HID_EZKEY is not set
+# CONFIG_HID_KYE is not set
+# CONFIG_HID_GYRATION is not set
+# CONFIG_HID_KENSINGTON is not set
+# CONFIG_HID_LOGITECH is not set
+# CONFIG_HID_MICROSOFT is not set
+# CONFIG_HID_MONTEREY is not set
+# CONFIG_HID_NTRIG is not set
+# CONFIG_HID_PANTHERLORD is not set
+# CONFIG_HID_PETALYNX is not set
+# CONFIG_HID_SAMSUNG is not set
+# CONFIG_HID_SONY is not set
+# CONFIG_HID_SUNPLUS is not set
+# CONFIG_GREENASIA_FF is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_THRUSTMASTER_FF is not set
+# CONFIG_ZEROPLUS_FF is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+# CONFIG_USB_DEVICEFS is not set
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+CONFIG_USB_MON=y
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+CONFIG_USB_R8A66597_HCD=y
+# CONFIG_USB_HWA_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+# CONFIG_USB_GADGET is not set
+
+#
+# OTG and related infrastructure
+#
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_NOP_USB_XCEIV is not set
+CONFIG_MMC=y
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=y
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+# CONFIG_MMC_SDHCI is not set
+CONFIG_MMC_SPI=y
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+CONFIG_RTC_DRV_PCF8563=y
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+
+#
+# SPI RTC drivers
+#
+# CONFIG_RTC_DRV_M41T94 is not set
+# CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_R9701 is not set
+# CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_RTC_DRV_SH is not set
+# CONFIG_RTC_DRV_GENERIC is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+CONFIG_UIO=y
+# CONFIG_UIO_PDRV is not set
+CONFIG_UIO_PDRV_GENIRQ=y
+# CONFIG_UIO_SMX is not set
+# CONFIG_UIO_SERCOS3 is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+CONFIG_EXT2_FS_POSIX_ACL=y
+CONFIG_EXT2_FS_SECURITY=y
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+CONFIG_EXT3_FS_XATTR=y
+CONFIG_EXT3_FS_POSIX_ACL=y
+CONFIG_EXT3_FS_SECURITY=y
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_FILE_LOCKING=y
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+# CONFIG_MSDOS_FS is not set
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLBFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+# CONFIG_UBIFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+CONFIG_ROOT_NFS=y
+CONFIG_NFSD=y
+CONFIG_NFSD_V3=y
+# CONFIG_NFSD_V3_ACL is not set
+# CONFIG_NFSD_V4 is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+CONFIG_NLS_CODEPAGE_932=y
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_LATENCYTOP is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_TRACING_SUPPORT=y
+
+#
+# Tracers
+#
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_PREEMPT_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_DMA_API_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_SH_STANDARD_BIOS is not set
+# CONFIG_EARLY_SCIF_CONSOLE is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_WORKQUEUE=y
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+CONFIG_CRC_T10DIF=y
+CONFIG_CRC_ITU_T=y
+CONFIG_CRC32=y
+CONFIG_CRC7=y
+# CONFIG_LIBCRC32C is not set
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/sh/configs/se7750_defconfig b/arch/sh/configs/se7750_defconfig
index ceef6d9138ee..ed1a1230f636 100644
--- a/arch/sh/configs/se7750_defconfig
+++ b/arch/sh/configs/se7750_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 18:57:31 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 13:06:02 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -70,6 +71,7 @@ CONFIG_UID16=y
 # CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_HOTPLUG is not set
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -88,6 +90,7 @@ CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
 CONFIG_HAVE_IOREMAP_PROT=y
@@ -95,6 +98,8 @@ CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -106,7 +111,6 @@ CONFIG_MODULES=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -152,6 +156,7 @@ CONFIG_CPU_SUBTYPE_SH7750=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -161,8 +166,6 @@ CONFIG_CPU_SUBTYPE_SH7750=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -553,6 +556,7 @@ CONFIG_SCSI_WAIT_SCAN=m
 CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_ISCSI_TCP is not set
 # CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
 # CONFIG_SCSI_DEBUG is not set
 # CONFIG_SCSI_DH is not set
 # CONFIG_SCSI_OSD_INITIATOR is not set
@@ -775,6 +779,11 @@ CONFIG_INOTIFY_USER=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -829,6 +838,7 @@ CONFIG_JFFS2_RTIME=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 # CONFIG_NFS_V3 is not set
@@ -886,10 +896,23 @@ CONFIG_FRAME_WARN=1024
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
 #
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
@@ -989,6 +1012,7 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
diff --git a/arch/sh/configs/se7751_defconfig b/arch/sh/configs/se7751_defconfig
index 67fc26b3a7d0..55f3b788e0cb 100644
--- a/arch/sh/configs/se7751_defconfig
+++ b/arch/sh/configs/se7751_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 18:59:59 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 13:06:44 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -65,7 +66,6 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
-CONFIG_INITRAMFS_COMPRESSION_NONE=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -74,6 +74,7 @@ CONFIG_UID16=y
 # CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_HOTPLUG is not set
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -92,6 +93,7 @@ CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
 CONFIG_HAVE_IOREMAP_PROT=y
@@ -99,6 +101,8 @@ CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -110,7 +114,6 @@ CONFIG_MODULES=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -156,6 +159,7 @@ CONFIG_CPU_SUBTYPE_SH7751=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -165,8 +169,6 @@ CONFIG_CPU_SUBTYPE_SH7751=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -742,6 +744,11 @@ CONFIG_INOTIFY_USER=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -796,6 +803,7 @@ CONFIG_JFFS2_RTIME=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 # CONFIG_NFS_FS is not set
 # CONFIG_NFSD is not set
@@ -833,10 +841,23 @@ CONFIG_FRAME_WARN=1024
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
 #
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
@@ -936,6 +957,7 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
diff --git a/arch/sh/configs/se7780_defconfig b/arch/sh/configs/se7780_defconfig
index ebce23cc2ad8..c4f0af32efa9 100644
--- a/arch/sh/configs/se7780_defconfig
+++ b/arch/sh/configs/se7780_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 19:02:05 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 13:07:14 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -67,6 +68,7 @@ CONFIG_EMBEDDED=y
 CONFIG_UID16=y
 CONFIG_SYSCTL_SYSCALL=y
 # CONFIG_KALLSYMS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_HOTPLUG is not set
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -86,12 +88,15 @@ CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 CONFIG_HAVE_IOREMAP_PROT=y
 CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -103,7 +108,6 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
 #
@@ -149,6 +153,7 @@ CONFIG_CPU_SH4A=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 CONFIG_CPU_SUBTYPE_SH7780=y
@@ -158,8 +163,6 @@ CONFIG_CPU_SUBTYPE_SH7780=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -285,8 +288,6 @@ CONFIG_CMDLINE="console=ttySC0.115200 root=/dev/sda1"
 #
 CONFIG_PCI=y
 CONFIG_SH_PCIDMA_NONCOHERENT=y
-CONFIG_PCI_AUTO=y
-CONFIG_PCI_AUTO_UPDATE_RESOURCES=y
 # CONFIG_PCIEPORTBUS is not set
 # CONFIG_ARCH_SUPPORTS_MSI is not set
 CONFIG_PCI_LEGACY=y
@@ -558,6 +559,7 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_MPT2SAS is not set
 # CONFIG_SCSI_HPTIOP is not set
 # CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
 # CONFIG_FCOE is not set
 # CONFIG_SCSI_DMX3191D is not set
 # CONFIG_SCSI_FUTURE_DOMAIN is not set
@@ -957,15 +959,17 @@ CONFIG_USB_HID=y
 #
 # Special HID drivers
 #
-CONFIG_HID_COMPAT=y
 CONFIG_HID_A4TECH=y
 CONFIG_HID_APPLE=y
 CONFIG_HID_BELKIN=y
 CONFIG_HID_CHERRY=y
 CONFIG_HID_CHICONY=y
 CONFIG_HID_CYPRESS=y
+# CONFIG_DRAGONRISE_FF is not set
 CONFIG_HID_EZKEY=y
+# CONFIG_HID_KYE is not set
 CONFIG_HID_GYRATION=y
+# CONFIG_HID_KENSINGTON is not set
 CONFIG_HID_LOGITECH=y
 # CONFIG_LOGITECH_FF is not set
 # CONFIG_LOGIRUMBLEPAD2_FF is not set
@@ -1122,6 +1126,10 @@ CONFIG_INOTIFY_USER=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -1245,11 +1253,24 @@ CONFIG_DEBUG_FS=y
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
 #
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
@@ -1345,6 +1366,7 @@ CONFIG_CRYPTO=y
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
 # CONFIG_CRYPTO_DEV_HIFN_795X is not set
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
diff --git a/arch/sh/configs/sh03_defconfig b/arch/sh/configs/sh03_defconfig
index 6fcdb090cf32..f9c6e51dc0b0 100644
--- a/arch/sh/configs/sh03_defconfig
+++ b/arch/sh/configs/sh03_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 19:04:59 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 13:07:56 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -41,6 +42,7 @@ CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
 CONFIG_BSD_PROCESS_ACCT=y
 # CONFIG_BSD_PROCESS_ACCT_V3 is not set
 # CONFIG_TASKSTATS is not set
@@ -67,7 +69,6 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
-CONFIG_INITRAMFS_COMPRESSION_NONE=y
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -76,6 +77,7 @@ CONFIG_UID16=y
 # CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -105,6 +107,8 @@ CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -117,7 +121,6 @@ CONFIG_MODVERSIONS=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -163,6 +166,7 @@ CONFIG_CPU_SUBTYPE_SH7751=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -172,8 +176,6 @@ CONFIG_CPU_SUBTYPE_SH7751=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -300,8 +302,6 @@ CONFIG_CMDLINE="console=ttySC1,115200 mem=64M root=/dev/nfs"
 #
 CONFIG_PCI=y
 CONFIG_SH_PCIDMA_NONCOHERENT=y
-CONFIG_PCI_AUTO=y
-CONFIG_PCI_AUTO_UPDATE_RESOURCES=y
 # CONFIG_PCIEPORTBUS is not set
 # CONFIG_ARCH_SUPPORTS_MSI is not set
 CONFIG_PCI_LEGACY=y
@@ -562,6 +562,7 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_MPT2SAS is not set
 # CONFIG_SCSI_HPTIOP is not set
 # CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
 # CONFIG_FCOE is not set
 # CONFIG_SCSI_DMX3191D is not set
 # CONFIG_SCSI_FUTURE_DOMAIN is not set
@@ -656,6 +657,7 @@ CONFIG_NETDEV_1000=y
 # CONFIG_E1000E is not set
 # CONFIG_IP1000 is not set
 # CONFIG_IGB is not set
+# CONFIG_IGBVF is not set
 # CONFIG_NS83820 is not set
 # CONFIG_HAMACHI is not set
 # CONFIG_YELLOWFIN is not set
@@ -679,6 +681,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
 # CONFIG_S2IO is not set
+# CONFIG_VXGE is not set
 # CONFIG_MYRI10GE is not set
 # CONFIG_NETXEN_NIC is not set
 # CONFIG_NIU is not set
@@ -887,7 +890,6 @@ CONFIG_HID=y
 #
 # Special HID drivers
 #
-CONFIG_HID_COMPAT=y
 CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
 CONFIG_USB_ARCH_HAS_OHCI=y
@@ -929,6 +931,7 @@ CONFIG_EXT2_FS_XATTR=y
 # CONFIG_EXT2_FS_SECURITY is not set
 # CONFIG_EXT2_FS_XIP is not set
 CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 CONFIG_EXT3_FS_XATTR=y
 CONFIG_EXT3_FS_POSIX_ACL=y
 # CONFIG_EXT3_FS_SECURITY is not set
@@ -952,6 +955,11 @@ CONFIG_AUTOFS4_FS=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 CONFIG_ISO9660_FS=m
@@ -1001,6 +1009,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
@@ -1112,11 +1121,26 @@ CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
 CONFIG_RING_BUFFER=y
 CONFIG_TRACING=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
 #
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_PREEMPT_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_FTRACE_STARTUP_TEST is not set
 # CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 CONFIG_SH_STANDARD_BIOS=y
@@ -1228,6 +1252,7 @@ CONFIG_CRYPTO_DEFLATE=y
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
 # CONFIG_CRYPTO_DEV_HIFN_795X is not set
+CONFIG_BINARY_PRINTF=y
 
 #
 # Library routines
diff --git a/arch/sh/configs/sh7710voipgw_defconfig b/arch/sh/configs/sh7710voipgw_defconfig
index 1ab37c01da6e..48b58098cf84 100644
--- a/arch/sh/configs/sh7710voipgw_defconfig
+++ b/arch/sh/configs/sh7710voipgw_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 19:09:01 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 13:09:16 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -39,6 +40,7 @@ CONFIG_LOCALVERSION_AUTO=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_TASKSTATS is not set
 # CONFIG_AUDIT is not set
@@ -72,6 +74,7 @@ CONFIG_UID16=y
 # CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -90,6 +93,7 @@ CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
 CONFIG_HAVE_IOREMAP_PROT=y
@@ -97,6 +101,8 @@ CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_BASE_SMALL=0
@@ -108,7 +114,6 @@ CONFIG_MODULE_FORCE_UNLOAD=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -154,6 +159,7 @@ CONFIG_CPU_SUBTYPE_SH7710=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -163,8 +169,6 @@ CONFIG_CPU_SUBTYPE_SH7710=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -728,7 +732,6 @@ CONFIG_HID=y
 #
 # Special HID drivers
 #
-CONFIG_HID_COMPAT=y
 CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
 # CONFIG_USB_ARCH_HAS_OHCI is not set
@@ -780,6 +783,11 @@ CONFIG_FILE_LOCKING=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -834,6 +842,7 @@ CONFIG_JFFS2_RTIME=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 # CONFIG_NFS_FS is not set
 # CONFIG_NFSD is not set
@@ -871,11 +880,24 @@ CONFIG_DEBUG_FS=y
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
 #
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
@@ -975,6 +997,7 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
diff --git a/arch/sh/configs/sh7724_generic_defconfig b/arch/sh/configs/sh7724_generic_defconfig
new file mode 100644
index 000000000000..ec8f18c7684c
--- /dev/null
+++ b/arch/sh/configs/sh7724_generic_defconfig
@@ -0,0 +1,707 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 13:09:47 2009
+#
+CONFIG_SUPERH=y
+CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
+CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_GENERIC_IRQ_PROBE=y
+# CONFIG_GENERIC_GPIO is not set
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_SYS_SUPPORTS_CMT=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_NO_VIRT_TO_BUS=y
+CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+
+#
+# RCU Subsystem
+#
+# CONFIG_CLASSIC_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=17
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+CONFIG_RT_GROUP_SCHED=y
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+CONFIG_CGROUPS=y
+# CONFIG_CGROUP_DEBUG is not set
+# CONFIG_CGROUP_NS is not set
+# CONFIG_CGROUP_FREEZER is not set
+# CONFIG_CGROUP_DEVICE is not set
+# CONFIG_CPUSETS is not set
+# CONFIG_CGROUP_CPUACCT is not set
+# CONFIG_RESOURCE_COUNTERS is not set
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EMBEDDED=y
+# CONFIG_UID16 is not set
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_COMPAT_BRK is not set
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+CONFIG_PROFILING=y
+CONFIG_TRACEPOINTS=y
+# CONFIG_MARKERS is not set
+CONFIG_OPROFILE=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_IOREMAP_PROT=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+# CONFIG_MODULES is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+CONFIG_FREEZER=y
+
+#
+# System type
+#
+CONFIG_CPU_SH4=y
+CONFIG_CPU_SH4A=y
+CONFIG_CPU_SHX2=y
+CONFIG_ARCH_SHMOBILE=y
+# CONFIG_CPU_SUBTYPE_SH7619 is not set
+# CONFIG_CPU_SUBTYPE_SH7201 is not set
+# CONFIG_CPU_SUBTYPE_SH7203 is not set
+# CONFIG_CPU_SUBTYPE_SH7206 is not set
+# CONFIG_CPU_SUBTYPE_SH7263 is not set
+# CONFIG_CPU_SUBTYPE_MXG is not set
+# CONFIG_CPU_SUBTYPE_SH7705 is not set
+# CONFIG_CPU_SUBTYPE_SH7706 is not set
+# CONFIG_CPU_SUBTYPE_SH7707 is not set
+# CONFIG_CPU_SUBTYPE_SH7708 is not set
+# CONFIG_CPU_SUBTYPE_SH7709 is not set
+# CONFIG_CPU_SUBTYPE_SH7710 is not set
+# CONFIG_CPU_SUBTYPE_SH7712 is not set
+# CONFIG_CPU_SUBTYPE_SH7720 is not set
+# CONFIG_CPU_SUBTYPE_SH7721 is not set
+# CONFIG_CPU_SUBTYPE_SH7750 is not set
+# CONFIG_CPU_SUBTYPE_SH7091 is not set
+# CONFIG_CPU_SUBTYPE_SH7750R is not set
+# CONFIG_CPU_SUBTYPE_SH7750S is not set
+# CONFIG_CPU_SUBTYPE_SH7751 is not set
+# CONFIG_CPU_SUBTYPE_SH7751R is not set
+# CONFIG_CPU_SUBTYPE_SH7760 is not set
+# CONFIG_CPU_SUBTYPE_SH4_202 is not set
+# CONFIG_CPU_SUBTYPE_SH7723 is not set
+CONFIG_CPU_SUBTYPE_SH7724=y
+# CONFIG_CPU_SUBTYPE_SH7763 is not set
+# CONFIG_CPU_SUBTYPE_SH7770 is not set
+# CONFIG_CPU_SUBTYPE_SH7780 is not set
+# CONFIG_CPU_SUBTYPE_SH7785 is not set
+# CONFIG_CPU_SUBTYPE_SH7786 is not set
+# CONFIG_CPU_SUBTYPE_SHX3 is not set
+# CONFIG_CPU_SUBTYPE_SH7343 is not set
+# CONFIG_CPU_SUBTYPE_SH7722 is not set
+# CONFIG_CPU_SUBTYPE_SH7366 is not set
+
+#
+# Memory management options
+#
+CONFIG_QUICKLIST=y
+CONFIG_MMU=y
+CONFIG_PAGE_OFFSET=0x80000000
+CONFIG_MEMORY_START=0x08000000
+CONFIG_MEMORY_SIZE=0x04000000
+CONFIG_29BIT=y
+# CONFIG_X2TLB is not set
+CONFIG_VSYSCALL=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_DEFAULT=y
+CONFIG_MAX_ACTIVE_REGIONS=1
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_8KB is not set
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_ENTRY_OFFSET=0x00001000
+CONFIG_SELECT_MEMORY_MODEL=y
+# CONFIG_FLATMEM_MANUAL is not set
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+CONFIG_SPARSEMEM_MANUAL=y
+CONFIG_SPARSEMEM=y
+CONFIG_HAVE_MEMORY_PRESENT=y
+CONFIG_SPARSEMEM_STATIC=y
+
+#
+# Memory hotplug is currently incompatible with Software Suspend
+#
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_MIGRATION=y
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_NR_QUICK=2
+CONFIG_UNEVICTABLE_LRU=y
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+
+#
+# Cache configuration
+#
+CONFIG_CACHE_WRITEBACK=y
+# CONFIG_CACHE_WRITETHROUGH is not set
+# CONFIG_CACHE_OFF is not set
+
+#
+# Processor features
+#
+CONFIG_CPU_LITTLE_ENDIAN=y
+# CONFIG_CPU_BIG_ENDIAN is not set
+CONFIG_SH_FPU=y
+# CONFIG_SH_STORE_QUEUES is not set
+CONFIG_CPU_HAS_INTEVT=y
+CONFIG_CPU_HAS_SR_RB=y
+CONFIG_CPU_HAS_PTEA=y
+CONFIG_CPU_HAS_FPU=y
+
+#
+# Board support
+#
+
+#
+# Timer and clock configuration
+#
+CONFIG_SH_TMU=y
+CONFIG_SH_TIMER_CMT=y
+CONFIG_SH_TIMER_IRQ=16
+CONFIG_SH_PCLK_FREQ=41666666
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+
+#
+# CPU Frequency scaling
+#
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_TABLE=y
+# CONFIG_CPU_FREQ_DEBUG is not set
+CONFIG_CPU_FREQ_STAT=y
+# CONFIG_CPU_FREQ_STAT_DETAILS is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
+# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
+# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set
+# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
+CONFIG_SH_CPU_FREQ=y
+
+#
+# DMA support
+#
+# CONFIG_SH_DMA is not set
+
+#
+# Companion Chips
+#
+
+#
+# Additional SuperH Device Drivers
+#
+# CONFIG_HEARTBEAT is not set
+# CONFIG_PUSH_SWITCH is not set
+
+#
+# Kernel features
+#
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+CONFIG_SCHED_HRTICK=y
+CONFIG_KEXEC=y
+# CONFIG_CRASH_DUMP is not set
+CONFIG_KEXEC_JUMP=y
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_GUSA=y
+
+#
+# Boot options
+#
+CONFIG_ZERO_PAGE_OFFSET=0x00001000
+CONFIG_BOOT_LINK_OFFSET=0x00800000
+# CONFIG_CMDLINE_BOOL is not set
+
+#
+# Bus options
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options (EXPERIMENTAL)
+#
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+CONFIG_HIBERNATION=y
+CONFIG_PM_STD_PARTITION=""
+CONFIG_CPU_IDLE=y
+CONFIG_CPU_IDLE_GOV_LADDER=y
+CONFIG_CPU_IDLE_GOV_MENU=y
+# CONFIG_NET is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_MTD is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_BLK_DEV_HD is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+# CONFIG_INPUT is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_DEVKMEM is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_SH_SCI_NR_UARTS=6
+CONFIG_SERIAL_SH_SCI_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_UNIX98_PTYS is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_OCORES is not set
+CONFIG_I2C_SH_MOBILE=y
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_SPI is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_REGULATOR is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+# CONFIG_SOUND is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_SH=y
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+CONFIG_UIO=y
+# CONFIG_UIO_PDRV is not set
+CONFIG_UIO_PDRV_GENIRQ=y
+# CONFIG_UIO_SMX is not set
+# CONFIG_UIO_SERCOS3 is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
+# CONFIG_XFS_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+# CONFIG_PROC_FS is not set
+# CONFIG_SYSFS is not set
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLBFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_MISC_FILESYSTEMS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+CONFIG_STACKTRACE=y
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+CONFIG_NOP_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_RING_BUFFER=y
+CONFIG_TRACING=y
+CONFIG_TRACING_SUPPORT=y
+
+#
+# Tracers
+#
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_FTRACE_STARTUP_TEST is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_DMA_API_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_SH_STANDARD_BIOS is not set
+# CONFIG_EARLY_SCIF_CONSOLE is not set
+# CONFIG_MORE_COMPILE_OPTIONS is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_CRYPTO is not set
+CONFIG_BINARY_PRINTF=y
+
+#
+# Library routines
+#
+CONFIG_GENERIC_FIND_LAST_BIT=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+# CONFIG_CRC32 is not set
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/sh/configs/sh7763rdp_defconfig b/arch/sh/configs/sh7763rdp_defconfig
index c79bb84ec305..f77bc7998d2f 100644
--- a/arch/sh/configs/sh7763rdp_defconfig
+++ b/arch/sh/configs/sh7763rdp_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 19:10:57 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 13:10:12 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -78,6 +79,7 @@ CONFIG_UID16=y
 # CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -106,6 +108,8 @@ CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -117,7 +121,6 @@ CONFIG_MODULES=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -164,6 +167,7 @@ CONFIG_CPU_SH4A=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 CONFIG_CPU_SUBTYPE_SH7763=y
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -173,8 +177,6 @@ CONFIG_CPU_SUBTYPE_SH7763=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -555,6 +557,7 @@ CONFIG_SCSI_WAIT_SCAN=m
 CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_ISCSI_TCP is not set
 # CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
 # CONFIG_SCSI_DEBUG is not set
 # CONFIG_SCSI_DH is not set
 # CONFIG_SCSI_OSD_INITIATOR is not set
@@ -941,6 +944,7 @@ CONFIG_EXT2_FS=y
 # CONFIG_EXT2_FS_XATTR is not set
 # CONFIG_EXT2_FS_XIP is not set
 CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 CONFIG_EXT3_FS_XATTR=y
 # CONFIG_EXT3_FS_POSIX_ACL is not set
 # CONFIG_EXT3_FS_SECURITY is not set
@@ -965,6 +969,11 @@ CONFIG_AUTOFS4_FS=y
 CONFIG_GENERIC_ACL=y
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -1012,6 +1021,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 # CONFIG_NFS_V3 is not set
@@ -1100,11 +1110,25 @@ CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
 CONFIG_RING_BUFFER=y
 CONFIG_TRACING=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
 #
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_FTRACE_STARTUP_TEST is not set
 # CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
@@ -1204,6 +1228,7 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
+CONFIG_BINARY_PRINTF=y
 
 #
 # Library routines
diff --git a/arch/sh/configs/sh7770_generic_defconfig b/arch/sh/configs/sh7770_generic_defconfig
new file mode 100644
index 000000000000..d6489b46ca5b
--- /dev/null
+++ b/arch/sh/configs/sh7770_generic_defconfig
@@ -0,0 +1,700 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.30-rc4
+# Tue May 12 14:48:21 2009
+#
+CONFIG_SUPERH=y
+CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
+CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_GENERIC_IRQ_PROBE=y
+# CONFIG_GENERIC_GPIO is not set
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+# CONFIG_ARCH_SUSPEND_POSSIBLE is not set
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_SYS_SUPPORTS_TMU=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_ARCH_NO_VIRT_TO_BUS=y
+CONFIG_ARCH_HAS_DEFAULT_IDLE=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+
+#
+# RCU Subsystem
+#
+# CONFIG_CLASSIC_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=17
+CONFIG_GROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+CONFIG_RT_GROUP_SCHED=y
+CONFIG_USER_SCHED=y
+# CONFIG_CGROUP_SCHED is not set
+CONFIG_CGROUPS=y
+# CONFIG_CGROUP_DEBUG is not set
+# CONFIG_CGROUP_NS is not set
+# CONFIG_CGROUP_FREEZER is not set
+# CONFIG_CGROUP_DEVICE is not set
+# CONFIG_CPUSETS is not set
+# CONFIG_CGROUP_CPUACCT is not set
+# CONFIG_RESOURCE_COUNTERS is not set
+# CONFIG_RELAY is not set
+# CONFIG_NAMESPACES is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+CONFIG_EMBEDDED=y
+# CONFIG_UID16 is not set
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_COMPAT_BRK is not set
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+CONFIG_PROFILING=y
+CONFIG_TRACEPOINTS=y
+# CONFIG_MARKERS is not set
+CONFIG_OPROFILE=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_IOREMAP_PROT=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+# CONFIG_MODULES is not set
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+CONFIG_FREEZER=y
+
+#
+# System type
+#
+CONFIG_CPU_SH4=y
+CONFIG_CPU_SH4A=y
+# CONFIG_CPU_SUBTYPE_SH7619 is not set
+# CONFIG_CPU_SUBTYPE_SH7201 is not set
+# CONFIG_CPU_SUBTYPE_SH7203 is not set
+# CONFIG_CPU_SUBTYPE_SH7206 is not set
+# CONFIG_CPU_SUBTYPE_SH7263 is not set
+# CONFIG_CPU_SUBTYPE_MXG is not set
+# CONFIG_CPU_SUBTYPE_SH7705 is not set
+# CONFIG_CPU_SUBTYPE_SH7706 is not set
+# CONFIG_CPU_SUBTYPE_SH7707 is not set
+# CONFIG_CPU_SUBTYPE_SH7708 is not set
+# CONFIG_CPU_SUBTYPE_SH7709 is not set
+# CONFIG_CPU_SUBTYPE_SH7710 is not set
+# CONFIG_CPU_SUBTYPE_SH7712 is not set
+# CONFIG_CPU_SUBTYPE_SH7720 is not set
+# CONFIG_CPU_SUBTYPE_SH7721 is not set
+# CONFIG_CPU_SUBTYPE_SH7750 is not set
+# CONFIG_CPU_SUBTYPE_SH7091 is not set
+# CONFIG_CPU_SUBTYPE_SH7750R is not set
+# CONFIG_CPU_SUBTYPE_SH7750S is not set
+# CONFIG_CPU_SUBTYPE_SH7751 is not set
+# CONFIG_CPU_SUBTYPE_SH7751R is not set
+# CONFIG_CPU_SUBTYPE_SH7760 is not set
+# CONFIG_CPU_SUBTYPE_SH4_202 is not set
+# CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
+# CONFIG_CPU_SUBTYPE_SH7763 is not set
+CONFIG_CPU_SUBTYPE_SH7770=y
+# CONFIG_CPU_SUBTYPE_SH7780 is not set
+# CONFIG_CPU_SUBTYPE_SH7785 is not set
+# CONFIG_CPU_SUBTYPE_SH7786 is not set
+# CONFIG_CPU_SUBTYPE_SHX3 is not set
+# CONFIG_CPU_SUBTYPE_SH7343 is not set
+# CONFIG_CPU_SUBTYPE_SH7722 is not set
+# CONFIG_CPU_SUBTYPE_SH7366 is not set
+
+#
+# Memory management options
+#
+CONFIG_QUICKLIST=y
+CONFIG_MMU=y
+CONFIG_PAGE_OFFSET=0x80000000
+CONFIG_MEMORY_START=0x08000000
+CONFIG_MEMORY_SIZE=0x04000000
+CONFIG_29BIT=y
+CONFIG_VSYSCALL=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_DEFAULT=y
+CONFIG_MAX_ACTIVE_REGIONS=1
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
+CONFIG_PAGE_SIZE_4KB=y
+# CONFIG_PAGE_SIZE_8KB is not set
+# CONFIG_PAGE_SIZE_16KB is not set
+# CONFIG_PAGE_SIZE_64KB is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+# CONFIG_FLATMEM_MANUAL is not set
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+CONFIG_SPARSEMEM_MANUAL=y
+CONFIG_SPARSEMEM=y
+CONFIG_HAVE_MEMORY_PRESENT=y
+CONFIG_SPARSEMEM_STATIC=y
+
+#
+# Memory hotplug is currently incompatible with Software Suspend
+#
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_MIGRATION=y
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_NR_QUICK=2
+CONFIG_UNEVICTABLE_LRU=y
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+
+#
+# Cache configuration
+#
+CONFIG_CACHE_WRITEBACK=y
+# CONFIG_CACHE_WRITETHROUGH is not set
+# CONFIG_CACHE_OFF is not set
+
+#
+# Processor features
+#
+CONFIG_CPU_LITTLE_ENDIAN=y
+# CONFIG_CPU_BIG_ENDIAN is not set
+CONFIG_SH_FPU=y
+# CONFIG_SH_STORE_QUEUES is not set
+CONFIG_CPU_HAS_INTEVT=y
+CONFIG_CPU_HAS_SR_RB=y
+CONFIG_CPU_HAS_FPU=y
+
+#
+# Board support
+#
+
+#
+# Timer and clock configuration
+#
+CONFIG_SH_TMU=y
+CONFIG_SH_TIMER_IRQ=16
+CONFIG_SH_PCLK_FREQ=41666666
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+
+#
+# CPU Frequency scaling
+#
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_TABLE=y
+# CONFIG_CPU_FREQ_DEBUG is not set
+CONFIG_CPU_FREQ_STAT=y
+# CONFIG_CPU_FREQ_STAT_DETAILS is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
+# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
+# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set
+# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
+CONFIG_SH_CPU_FREQ=y
+
+#
+# DMA support
+#
+# CONFIG_SH_DMA is not set
+
+#
+# Companion Chips
+#
+
+#
+# Additional SuperH Device Drivers
+#
+# CONFIG_HEARTBEAT is not set
+# CONFIG_PUSH_SWITCH is not set
+
+#
+# Kernel features
+#
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+CONFIG_SCHED_HRTICK=y
+CONFIG_KEXEC=y
+# CONFIG_CRASH_DUMP is not set
+CONFIG_KEXEC_JUMP=y
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_GUSA=y
+
+#
+# Boot options
+#
+CONFIG_ZERO_PAGE_OFFSET=0x00001000
+CONFIG_BOOT_LINK_OFFSET=0x00800000
+CONFIG_ENTRY_OFFSET=0x00001000
+# CONFIG_CMDLINE_BOOL is not set
+
+#
+# Bus options
+#
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_HAVE_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options (EXPERIMENTAL)
+#
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_HIBERNATION=y
+CONFIG_PM_STD_PARTITION=""
+CONFIG_CPU_IDLE=y
+CONFIG_CPU_IDLE_GOV_LADDER=y
+CONFIG_CPU_IDLE_GOV_MENU=y
+# CONFIG_NET is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_MTD is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_BLK_DEV_HD is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+# CONFIG_INPUT is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_DEVKMEM is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_SH_SCI_NR_UARTS=6
+CONFIG_SERIAL_SH_SCI_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_UNIX98_PTYS is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_HELPER_AUTO=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_OCORES is not set
+CONFIG_I2C_SH_MOBILE=y
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_PCF8575 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_SPI is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_REGULATOR is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+# CONFIG_SOUND is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+CONFIG_RTC_DRV_SH=y
+# CONFIG_RTC_DRV_GENERIC is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+CONFIG_UIO=y
+# CONFIG_UIO_PDRV is not set
+CONFIG_UIO_PDRV_GENIRQ=y
+# CONFIG_UIO_SMX is not set
+# CONFIG_UIO_SERCOS3 is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
+# CONFIG_XFS_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+# CONFIG_PROC_FS is not set
+# CONFIG_SYSFS is not set
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLBFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_MISC_FILESYSTEMS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_NLS is not set
+
+#
+# Kernel hacking
+#
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+# CONFIG_PRINTK_TIME is not set
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+CONFIG_DEBUG_FS=y
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+CONFIG_STACKTRACE=y
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_MEMORY_INIT is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+CONFIG_NOP_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_RING_BUFFER=y
+CONFIG_TRACING=y
+CONFIG_TRACING_SUPPORT=y
+
+#
+# Tracers
+#
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_FTRACE_STARTUP_TEST is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_DMA_API_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_SH_STANDARD_BIOS is not set
+# CONFIG_EARLY_SCIF_CONSOLE is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_CRYPTO is not set
+CONFIG_BINARY_PRINTF=y
+
+#
+# Library routines
+#
+CONFIG_GENERIC_FIND_LAST_BIT=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+# CONFIG_CRC32 is not set
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
diff --git a/arch/sh/configs/sh7785lcr_32bit_defconfig b/arch/sh/configs/sh7785lcr_32bit_defconfig
index a6cf4505741c..1c55b800d124 100644
--- a/arch/sh/configs/sh7785lcr_32bit_defconfig
+++ b/arch/sh/configs/sh7785lcr_32bit_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 19:12:18 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 13:10:53 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -79,6 +80,7 @@ CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -98,6 +100,7 @@ CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 CONFIG_PROFILING=y
+# CONFIG_MARKERS is not set
 # CONFIG_OPROFILE is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
@@ -106,6 +109,8 @@ CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -118,7 +123,6 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -166,6 +170,7 @@ CONFIG_CPU_SHX2=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -175,8 +180,6 @@ CONFIG_CPU_SUBTYPE_SH7785=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -310,8 +313,6 @@ CONFIG_BOOT_LINK_OFFSET=0x00800000
 #
 CONFIG_PCI=y
 CONFIG_SH_PCIDMA_NONCOHERENT=y
-CONFIG_PCI_AUTO=y
-CONFIG_PCI_AUTO_UPDATE_RESOURCES=y
 # CONFIG_PCIEPORTBUS is not set
 # CONFIG_ARCH_SUPPORTS_MSI is not set
 CONFIG_PCI_LEGACY=y
@@ -672,6 +673,7 @@ CONFIG_NETDEV_1000=y
 # CONFIG_E1000E is not set
 # CONFIG_IP1000 is not set
 # CONFIG_IGB is not set
+# CONFIG_IGBVF is not set
 # CONFIG_NS83820 is not set
 # CONFIG_HAMACHI is not set
 # CONFIG_YELLOWFIN is not set
@@ -1009,15 +1011,17 @@ CONFIG_USB_HID=y
 #
 # Special HID drivers
 #
-CONFIG_HID_COMPAT=y
 CONFIG_HID_A4TECH=y
 CONFIG_HID_APPLE=y
 CONFIG_HID_BELKIN=y
 CONFIG_HID_CHERRY=y
 CONFIG_HID_CHICONY=y
 CONFIG_HID_CYPRESS=y
+# CONFIG_DRAGONRISE_FF is not set
 CONFIG_HID_EZKEY=y
+# CONFIG_HID_KYE is not set
 CONFIG_HID_GYRATION=y
+# CONFIG_HID_KENSINGTON is not set
 CONFIG_HID_LOGITECH=y
 # CONFIG_LOGITECH_FF is not set
 # CONFIG_LOGIRUMBLEPAD2_FF is not set
@@ -1218,6 +1222,7 @@ CONFIG_EXT2_FS=y
 # CONFIG_EXT2_FS_XATTR is not set
 # CONFIG_EXT2_FS_XIP is not set
 CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 CONFIG_EXT3_FS_XATTR=y
 # CONFIG_EXT3_FS_POSIX_ACL is not set
 # CONFIG_EXT3_FS_SECURITY is not set
@@ -1240,6 +1245,11 @@ CONFIG_INOTIFY_USER=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -1289,6 +1299,7 @@ CONFIG_MINIX_FS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
@@ -1377,6 +1388,9 @@ CONFIG_DEBUG_KERNEL=y
 CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
 CONFIG_SCHED_DEBUG=y
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_TIMER_STATS is not set
@@ -1413,6 +1427,7 @@ CONFIG_SYSCTL_SYSCALL_CHECK=y
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
@@ -1422,9 +1437,14 @@ CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
 # CONFIG_PREEMPT_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
 # CONFIG_BOOT_TRACER is not set
 # CONFIG_TRACE_BRANCH_PROFILING is not set
 # CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
@@ -1542,6 +1562,7 @@ CONFIG_CRYPTO_DES=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 # CONFIG_CRYPTO_HW is not set
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
diff --git a/arch/sh/configs/sh7785lcr_defconfig b/arch/sh/configs/sh7785lcr_defconfig
index e4fac2efc055..4385fe97a780 100644
--- a/arch/sh/configs/sh7785lcr_defconfig
+++ b/arch/sh/configs/sh7785lcr_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30-rc2
-# Wed Apr 22 19:17:56 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 13:11:48 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
@@ -307,8 +307,6 @@ CONFIG_BOOT_LINK_OFFSET=0x00800000
 #
 CONFIG_PCI=y
 CONFIG_SH_PCIDMA_NONCOHERENT=y
-CONFIG_PCI_AUTO=y
-CONFIG_PCI_AUTO_UPDATE_RESOURCES=y
 # CONFIG_PCIEPORTBUS is not set
 # CONFIG_ARCH_SUPPORTS_MSI is not set
 CONFIG_PCI_LEGACY=y
diff --git a/arch/sh/configs/shmin_defconfig b/arch/sh/configs/shmin_defconfig
index d695e9061874..4e120256ec63 100644
--- a/arch/sh/configs/shmin_defconfig
+++ b/arch/sh/configs/shmin_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 19:19:03 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 13:12:41 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_FIND_NEXT_BIT=y
@@ -63,6 +64,7 @@ CONFIG_EMBEDDED=y
 # CONFIG_UID16 is not set
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_KALLSYMS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_HOTPLUG is not set
 CONFIG_PRINTK=y
 # CONFIG_BUG is not set
@@ -81,12 +83,15 @@ CONFIG_COMPAT_BRK=y
 # CONFIG_SLUB is not set
 CONFIG_SLOB=y
 # CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 CONFIG_HAVE_IOREMAP_PROT=y
 CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_BASE_SMALL=1
 # CONFIG_MODULES is not set
@@ -137,6 +142,7 @@ CONFIG_CPU_SUBTYPE_SH7706=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -146,8 +152,6 @@ CONFIG_CPU_SUBTYPE_SH7706=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -675,6 +679,11 @@ CONFIG_FILE_LOCKING=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -718,6 +727,7 @@ CONFIG_CRAMFS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
@@ -762,10 +772,22 @@ CONFIG_FRAME_WARN=1024
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
 #
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 CONFIG_SH_STANDARD_BIOS=y
@@ -864,6 +886,7 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
diff --git a/arch/sh/configs/shx3_defconfig b/arch/sh/configs/shx3_defconfig
index e3651f574399..c088144925fa 100644
--- a/arch/sh/configs/shx3_defconfig
+++ b/arch/sh/configs/shx3_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 19:20:54 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 13:13:12 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -42,6 +43,7 @@ CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
 CONFIG_BSD_PROCESS_ACCT=y
 # CONFIG_BSD_PROCESS_ACCT_V3 is not set
 # CONFIG_TASKSTATS is not set
@@ -96,6 +98,7 @@ CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS=y
 CONFIG_KALLSYMS_ALL=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -126,6 +129,8 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_USE_GENERIC_SMP_HELPERS=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_RT_MUTEXES=y
 CONFIG_BASE_SMALL=0
@@ -138,7 +143,6 @@ CONFIG_MODULE_UNLOAD=y
 CONFIG_STOP_MACHINE=y
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -186,6 +190,7 @@ CONFIG_CPU_SHX3=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -195,8 +200,6 @@ CONFIG_CPU_SUBTYPE_SHX3=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -553,6 +556,7 @@ CONFIG_SCSI_WAIT_SCAN=m
 CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_ISCSI_TCP is not set
 # CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
 # CONFIG_SCSI_DEBUG is not set
 # CONFIG_SCSI_DH is not set
 # CONFIG_SCSI_OSD_INITIATOR is not set
@@ -646,6 +650,7 @@ CONFIG_DEVKMEM=y
 #
 # Non-8250 serial port support
 #
+# CONFIG_SERIAL_MAX3100 is not set
 CONFIG_SERIAL_SH_SCI=y
 CONFIG_SERIAL_SH_SCI_NR_UARTS=2
 CONFIG_SERIAL_SH_SCI_CONSOLE=y
@@ -985,6 +990,7 @@ CONFIG_EXT2_FS=y
 # CONFIG_EXT2_FS_XATTR is not set
 # CONFIG_EXT2_FS_XIP is not set
 CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 CONFIG_EXT3_FS_XATTR=y
 # CONFIG_EXT3_FS_POSIX_ACL is not set
 # CONFIG_EXT3_FS_SECURITY is not set
@@ -1008,6 +1014,11 @@ CONFIG_INOTIFY_USER=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -1051,6 +1062,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 # CONFIG_NFS_FS is not set
 # CONFIG_NFSD is not set
@@ -1085,6 +1097,9 @@ CONFIG_DEBUG_SHIRQ=y
 CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
 CONFIG_SCHED_DEBUG=y
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_TIMER_STATS is not set
@@ -1124,6 +1139,7 @@ CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
 CONFIG_RING_BUFFER=y
 CONFIG_TRACING=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
@@ -1133,11 +1149,16 @@ CONFIG_TRACING=y
 # CONFIG_PREEMPT_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
 # CONFIG_BOOT_TRACER is not set
 # CONFIG_TRACE_BRANCH_PROFILING is not set
 # CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_FTRACE_STARTUP_TEST is not set
 # CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
@@ -1245,6 +1266,7 @@ CONFIG_CRYPTO=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
+CONFIG_BINARY_PRINTF=y
 
 #
 # Library routines
diff --git a/arch/sh/configs/snapgear_defconfig b/arch/sh/configs/snapgear_defconfig
index 6960f60bf52e..54a7a3c41f34 100644
--- a/arch/sh/configs/snapgear_defconfig
+++ b/arch/sh/configs/snapgear_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 19:21:39 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 13:14:00 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -64,7 +65,6 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
-CONFIG_INITRAMFS_COMPRESSION_NONE=y
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -73,6 +73,7 @@ CONFIG_UID16=y
 # CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_HOTPLUG is not set
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -92,12 +93,15 @@ CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 CONFIG_HAVE_IOREMAP_PROT=y
 CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -105,7 +109,6 @@ CONFIG_BASE_SMALL=0
 # CONFIG_MODULES is not set
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -151,6 +154,7 @@ CONFIG_CPU_SUBTYPE_SH7751R=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -160,8 +164,6 @@ CONFIG_CPU_SUBTYPE_SH7751R=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -295,8 +297,6 @@ CONFIG_BOOT_LINK_OFFSET=0x00800000
 #
 CONFIG_PCI=y
 CONFIG_SH_PCIDMA_NONCOHERENT=y
-CONFIG_PCI_AUTO=y
-CONFIG_PCI_AUTO_UPDATE_RESOURCES=y
 # CONFIG_PCIEPORTBUS is not set
 # CONFIG_ARCH_SUPPORTS_MSI is not set
 CONFIG_PCI_LEGACY=y
@@ -763,6 +763,11 @@ CONFIG_FILE_LOCKING=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -805,8 +810,13 @@ CONFIG_CRAMFS=y
 # CONFIG_HPFS_FS is not set
 # CONFIG_QNX4FS_FS is not set
 CONFIG_ROMFS_FS=y
+CONFIG_ROMFS_BACKED_BY_BLOCK=y
+# CONFIG_ROMFS_BACKED_BY_MTD is not set
+# CONFIG_ROMFS_BACKED_BY_BOTH is not set
+CONFIG_ROMFS_ON_BLOCK=y
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 # CONFIG_NFS_FS is not set
 # CONFIG_NFSD is not set
@@ -844,10 +854,23 @@ CONFIG_FRAME_WARN=1024
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
 #
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
@@ -862,6 +885,7 @@ CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SECURITYFS is not set
 # CONFIG_SECURITY_FILE_CAPABILITIES is not set
 # CONFIG_CRYPTO is not set
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
diff --git a/arch/sh/configs/systemh_defconfig b/arch/sh/configs/systemh_defconfig
index 7ea639bc5936..dbe7e546f0bb 100644
--- a/arch/sh/configs/systemh_defconfig
+++ b/arch/sh/configs/systemh_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 19:23:31 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 13:14:33 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -61,7 +62,6 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
-CONFIG_INITRAMFS_COMPRESSION_NONE=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -70,6 +70,7 @@ CONFIG_UID16=y
 # CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_HOTPLUG is not set
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -88,6 +89,7 @@ CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
 CONFIG_HAVE_IOREMAP_PROT=y
@@ -95,6 +97,8 @@ CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -107,7 +111,6 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -153,6 +156,7 @@ CONFIG_CPU_SUBTYPE_SH7751R=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -162,8 +166,6 @@ CONFIG_CPU_SUBTYPE_SH7751R=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -506,6 +508,11 @@ CONFIG_INOTIFY_USER=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -547,8 +554,13 @@ CONFIG_CRAMFS=y
 # CONFIG_HPFS_FS is not set
 # CONFIG_QNX4FS_FS is not set
 CONFIG_ROMFS_FS=y
+CONFIG_ROMFS_BACKED_BY_BLOCK=y
+# CONFIG_ROMFS_BACKED_BY_MTD is not set
+# CONFIG_ROMFS_BACKED_BY_BOTH is not set
+CONFIG_ROMFS_ON_BLOCK=y
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 
 #
 # Partition Types
@@ -577,10 +589,24 @@ CONFIG_FRAME_WARN=1024
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
 #
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_PREEMPT_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
@@ -595,6 +621,7 @@ CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SECURITYFS is not set
 # CONFIG_SECURITY_FILE_CAPABILITIES is not set
 # CONFIG_CRYPTO is not set
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
diff --git a/arch/sh/configs/titan_defconfig b/arch/sh/configs/titan_defconfig
index bbeb4c6ebb95..8ca94ef74278 100644
--- a/arch/sh/configs/titan_defconfig
+++ b/arch/sh/configs/titan_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 19:24:55 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 13:14:55 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -40,6 +41,7 @@ CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
 # CONFIG_BSD_PROCESS_ACCT is not set
 # CONFIG_TASKSTATS is not set
 # CONFIG_AUDIT is not set
@@ -66,7 +68,6 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
-CONFIG_INITRAMFS_COMPRESSION_NONE=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -76,6 +77,7 @@ CONFIG_UID16=y
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -95,6 +97,7 @@ CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 # CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
 CONFIG_HAVE_IOREMAP_PROT=y
@@ -102,6 +105,8 @@ CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -114,7 +119,6 @@ CONFIG_MODULE_FORCE_UNLOAD=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -160,6 +164,7 @@ CONFIG_CPU_SUBTYPE_SH7751R=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -169,8 +174,6 @@ CONFIG_CPU_SUBTYPE_SH7751R=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -305,8 +308,6 @@ CONFIG_CMDLINE="console=ttySC1,38400N81 root=/dev/nfs ip=:::::eth1:autoconf rw"
 #
 CONFIG_PCI=y
 CONFIG_SH_PCIDMA_NONCOHERENT=y
-CONFIG_PCI_AUTO=y
-CONFIG_PCI_AUTO_UPDATE_RESOURCES=y
 # CONFIG_PCIEPORTBUS is not set
 # CONFIG_ARCH_SUPPORTS_MSI is not set
 CONFIG_PCI_LEGACY=y
@@ -789,6 +790,7 @@ CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_SCSI_MPT2SAS is not set
 # CONFIG_SCSI_HPTIOP is not set
 # CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
 # CONFIG_FCOE is not set
 # CONFIG_SCSI_DMX3191D is not set
 # CONFIG_SCSI_FUTURE_DOMAIN is not set
@@ -906,6 +908,7 @@ CONFIG_NETDEV_1000=y
 # CONFIG_E1000E is not set
 # CONFIG_IP1000 is not set
 # CONFIG_IGB is not set
+# CONFIG_IGBVF is not set
 # CONFIG_NS83820 is not set
 # CONFIG_HAMACHI is not set
 # CONFIG_YELLOWFIN is not set
@@ -929,6 +932,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
 # CONFIG_S2IO is not set
+# CONFIG_VXGE is not set
 # CONFIG_MYRI10GE is not set
 # CONFIG_NETXEN_NIC is not set
 # CONFIG_NIU is not set
@@ -1182,7 +1186,6 @@ CONFIG_HID=y
 #
 # Special HID drivers
 #
-CONFIG_HID_COMPAT=y
 CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
 CONFIG_USB_ARCH_HAS_OHCI=y
@@ -1393,6 +1396,7 @@ CONFIG_EXT2_FS=y
 # CONFIG_EXT2_FS_XATTR is not set
 # CONFIG_EXT2_FS_XIP is not set
 CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 # CONFIG_EXT3_FS_XATTR is not set
 # CONFIG_EXT4_FS is not set
 CONFIG_JBD=y
@@ -1419,6 +1423,11 @@ CONFIG_INOTIFY_USER=y
 CONFIG_FUSE_FS=m
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 CONFIG_ISO9660_FS=m
@@ -1467,8 +1476,13 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_HPFS_FS is not set
 # CONFIG_QNX4FS_FS is not set
 CONFIG_ROMFS_FS=y
+CONFIG_ROMFS_BACKED_BY_BLOCK=y
+# CONFIG_ROMFS_BACKED_BY_MTD is not set
+# CONFIG_ROMFS_BACKED_BY_BOTH is not set
+CONFIG_ROMFS_ON_BLOCK=y
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
@@ -1576,6 +1590,7 @@ CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_KERNEL=y
 # CONFIG_DEBUG_SHIRQ is not set
 # CONFIG_DETECT_SOFTLOCKUP is not set
+# CONFIG_DETECT_HUNG_TASK is not set
 CONFIG_SCHED_DEBUG=y
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_TIMER_STATS is not set
@@ -1610,6 +1625,7 @@ CONFIG_SCHED_DEBUG=y
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
@@ -1618,9 +1634,14 @@ CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
 # CONFIG_IRQSOFF_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
 # CONFIG_BOOT_TRACER is not set
 # CONFIG_TRACE_BRANCH_PROFILING is not set
 # CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
@@ -1741,6 +1762,7 @@ CONFIG_CRYPTO_DEFLATE=y
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
 # CONFIG_CRYPTO_DEV_HIFN_795X is not set
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
diff --git a/arch/sh/configs/ul2_defconfig b/arch/sh/configs/ul2_defconfig
index 34f5192a3241..bfb4d9806892 100644
--- a/arch/sh/configs/ul2_defconfig
+++ b/arch/sh/configs/ul2_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 19:30:27 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 13:17:05 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -69,7 +70,6 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 # CONFIG_RD_BZIP2 is not set
 # CONFIG_RD_LZMA is not set
-CONFIG_INITRAMFS_COMPRESSION_NONE=y
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -78,6 +78,7 @@ CONFIG_UID16=y
 CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -97,6 +98,7 @@ CONFIG_COMPAT_BRK=y
 CONFIG_SLUB=y
 # CONFIG_SLOB is not set
 CONFIG_PROFILING=y
+# CONFIG_MARKERS is not set
 # CONFIG_OPROFILE is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
@@ -105,6 +107,8 @@ CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -117,7 +121,6 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -167,6 +170,7 @@ CONFIG_ARCH_SHMOBILE=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -176,8 +180,6 @@ CONFIG_ARCH_SHMOBILE=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 CONFIG_CPU_SUBTYPE_SH7366=y
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -584,6 +586,7 @@ CONFIG_SCSI_WAIT_SCAN=m
 CONFIG_SCSI_LOWLEVEL=y
 # CONFIG_ISCSI_TCP is not set
 # CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
 # CONFIG_SCSI_DEBUG is not set
 # CONFIG_SCSI_DH is not set
 # CONFIG_SCSI_OSD_INITIATOR is not set
@@ -936,6 +939,7 @@ CONFIG_EXT2_FS=y
 # CONFIG_EXT2_FS_XATTR is not set
 # CONFIG_EXT2_FS_XIP is not set
 CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 CONFIG_EXT3_FS_XATTR=y
 # CONFIG_EXT3_FS_POSIX_ACL is not set
 # CONFIG_EXT3_FS_SECURITY is not set
@@ -958,6 +962,11 @@ CONFIG_INOTIFY_USER=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -1005,6 +1014,7 @@ CONFIG_CRAMFS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 # CONFIG_NFS_V3 is not set
@@ -1095,10 +1105,24 @@ CONFIG_FRAME_WARN=1024
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
 #
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_PREEMPT_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
@@ -1208,6 +1232,7 @@ CONFIG_CRYPTO_ARC4=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
diff --git a/arch/sh/configs/urquell_defconfig b/arch/sh/configs/urquell_defconfig
index d174b1a4d802..512664fed66c 100644
--- a/arch/sh/configs/urquell_defconfig
+++ b/arch/sh/configs/urquell_defconfig
@@ -1,10 +1,11 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29
-# Thu Apr  2 19:33:39 2009
+# Linux kernel version: 2.6.30-rc3
+# Mon Apr 27 14:02:55 2009
 #
 CONFIG_SUPERH=y
 CONFIG_SUPERH32=y
+# CONFIG_SUPERH64 is not set
 CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig"
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_BUG=y
@@ -76,6 +77,7 @@ CONFIG_UID16=y
 CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_EXTRA_PASS is not set
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -94,6 +96,7 @@ CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 CONFIG_PROFILING=y
+# CONFIG_MARKERS is not set
 # CONFIG_OPROFILE is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
@@ -102,6 +105,8 @@ CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_CLK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -114,7 +119,6 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -162,6 +166,7 @@ CONFIG_CPU_SHX3=y
 # CONFIG_CPU_SUBTYPE_SH7760 is not set
 # CONFIG_CPU_SUBTYPE_SH4_202 is not set
 # CONFIG_CPU_SUBTYPE_SH7723 is not set
+# CONFIG_CPU_SUBTYPE_SH7724 is not set
 # CONFIG_CPU_SUBTYPE_SH7763 is not set
 # CONFIG_CPU_SUBTYPE_SH7770 is not set
 # CONFIG_CPU_SUBTYPE_SH7780 is not set
@@ -171,8 +176,6 @@ CONFIG_CPU_SUBTYPE_SH7786=y
 # CONFIG_CPU_SUBTYPE_SH7343 is not set
 # CONFIG_CPU_SUBTYPE_SH7722 is not set
 # CONFIG_CPU_SUBTYPE_SH7366 is not set
-# CONFIG_CPU_SUBTYPE_SH5_101 is not set
-# CONFIG_CPU_SUBTYPE_SH5_103 is not set
 
 #
 # Memory management options
@@ -900,15 +903,17 @@ CONFIG_USB_HID=y
 #
 # Special HID drivers
 #
-CONFIG_HID_COMPAT=y
 CONFIG_HID_A4TECH=y
 CONFIG_HID_APPLE=y
 CONFIG_HID_BELKIN=y
 CONFIG_HID_CHERRY=y
 CONFIG_HID_CHICONY=y
 CONFIG_HID_CYPRESS=y
+# CONFIG_DRAGONRISE_FF is not set
 CONFIG_HID_EZKEY=y
+# CONFIG_HID_KYE is not set
 CONFIG_HID_GYRATION=y
+# CONFIG_HID_KENSINGTON is not set
 CONFIG_HID_LOGITECH=y
 # CONFIG_LOGITECH_FF is not set
 # CONFIG_LOGIRUMBLEPAD2_FF is not set
@@ -1046,6 +1051,7 @@ CONFIG_EXT2_FS=y
 # CONFIG_EXT2_FS_XATTR is not set
 # CONFIG_EXT2_FS_XIP is not set
 CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 CONFIG_EXT3_FS_XATTR=y
 # CONFIG_EXT3_FS_POSIX_ACL is not set
 # CONFIG_EXT3_FS_SECURITY is not set
@@ -1068,6 +1074,11 @@ CONFIG_INOTIFY_USER=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -1117,6 +1128,7 @@ CONFIG_MINIX_FS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
@@ -1209,10 +1221,24 @@ CONFIG_SYSCTL_SYSCALL_CHECK=y
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
 #
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_PREEMPT_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_SH_STANDARD_BIOS is not set
@@ -1322,6 +1348,7 @@ CONFIG_CRYPTO_DES=y
 #
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 # CONFIG_CRYPTO_HW is not set
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
diff --git a/arch/sh/drivers/dma/Kconfig b/arch/sh/drivers/dma/Kconfig
index 666713ac5fcf..63e9dd30b41c 100644
--- a/arch/sh/drivers/dma/Kconfig
+++ b/arch/sh/drivers/dma/Kconfig
@@ -16,7 +16,8 @@ config SH_DMA_IRQ_MULTI
                      CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7750R || \
                      CPU_SUBTYPE_SH7751R || CPU_SUBTYPE_SH7091  || \
                      CPU_SUBTYPE_SH7763  || CPU_SUBTYPE_SH7764  || \
-                     CPU_SUBTYPE_SH7780  || CPU_SUBTYPE_SH7785
+                     CPU_SUBTYPE_SH7780  || CPU_SUBTYPE_SH7785  || \
+                     CPU_SUBTYPE_SH7760
 
 config NR_ONCHIP_DMA_CHANNELS
         int
diff --git a/arch/sh/drivers/pci/Kconfig b/arch/sh/drivers/pci/Kconfig
index 7e816ededed7..e8db585a6638 100644
--- a/arch/sh/drivers/pci/Kconfig
+++ b/arch/sh/drivers/pci/Kconfig
@@ -17,21 +17,3 @@ config SH_PCIDMA_NONCOHERENT
           code will not have to flush the CPU's caches. If you have a PCI host
           bridge integrated with your SH CPU, refer carefully to the chip specs
           to see if you can say 'N' here. Otherwise, leave it as 'Y'.
-
-# This is also board-specific
-config PCI_AUTO
-        bool
-        depends on PCI
-        default y
-
-config PCI_AUTO_UPDATE_RESOURCES
-        bool
-        depends on PCI_AUTO
-        default y if !SH_DREAMCAST
-        help
-          Selecting this option will cause the PCI auto code to leave your
-          BAR values alone. Otherwise they will be updated automatically. If
-          for some reason, you have a board that simply refuses to work
-          with its resources updated beyond what they are when the device
-          is powered up, set this to N. Everyone else will want this as Y.
-
diff --git a/arch/sh/drivers/pci/Makefile b/arch/sh/drivers/pci/Makefile
index 847e90894d1b..d2ffc477549a 100644
--- a/arch/sh/drivers/pci/Makefile
+++ b/arch/sh/drivers/pci/Makefile
@@ -1,9 +1,7 @@
 #
 # Makefile for the PCI specific kernel interface routines under Linux.
 #
-
 obj-y                                   += pci.o
-obj-$(CONFIG_PCI_AUTO)                  += pci-auto.o
 
 obj-$(CONFIG_CPU_SUBTYPE_SH7751)        += pci-sh7751.o ops-sh4.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7751R)       += pci-sh7751.o ops-sh4.o
@@ -12,15 +10,17 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7780)	+= pci-sh7780.o ops-sh4.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7785)        += pci-sh7780.o ops-sh4.o
 obj-$(CONFIG_CPU_SH5)                   += pci-sh5.o ops-sh5.o
 
-obj-$(CONFIG_SH_DREAMCAST)              += ops-dreamcast.o fixups-dreamcast.o
-obj-$(CONFIG_SH_SECUREEDGE5410)         += ops-snapgear.o
-obj-$(CONFIG_SH_RTS7751R2D)             += ops-rts7751r2d.o fixups-rts7751r2d.o
-obj-$(CONFIG_SH_SH03)                   += ops-sh03.o fixups-sh03.o
-obj-$(CONFIG_SH_HIGHLANDER)             += ops-r7780rp.o fixups-r7780rp.o
-obj-$(CONFIG_SH_SDK7780)                += ops-sdk7780.o fixups-sdk7780.o
-obj-$(CONFIG_SH_TITAN)                  += ops-titan.o
-obj-$(CONFIG_SH_LANDISK)                += ops-landisk.o
-obj-$(CONFIG_SH_LBOX_RE2)               += ops-lboxre2.o fixups-lboxre2.o
-obj-$(CONFIG_SH_7780_SOLUTION_ENGINE)   += ops-se7780.o fixups-se7780.o
-obj-$(CONFIG_SH_CAYMAN)                 += ops-cayman.o
-obj-$(CONFIG_SH_SH7785LCR)              += ops-sh7785lcr.o fixups-sh7785lcr.o
+obj-$(CONFIG_SH_DREAMCAST)              += ops-dreamcast.o fixups-dreamcast.o \
+                                           pci-dreamcast.o
+obj-$(CONFIG_SH_SECUREEDGE5410)         += fixups-snapgear.o
+obj-$(CONFIG_SH_7751_SOLUTION_ENGINE)   += fixups-se7751.o
+obj-$(CONFIG_SH_RTS7751R2D)             += fixups-rts7751r2d.o
+obj-$(CONFIG_SH_SH03)                   += fixups-sh03.o
+obj-$(CONFIG_SH_HIGHLANDER)             += fixups-r7780rp.o
+obj-$(CONFIG_SH_SH7785LCR)              += fixups-r7780rp.o
+obj-$(CONFIG_SH_SDK7780)                += fixups-sdk7780.o
+obj-$(CONFIG_SH_7780_SOLUTION_ENGINE)   += fixups-sdk7780.o
+obj-$(CONFIG_SH_TITAN)                  += fixups-titan.o
+obj-$(CONFIG_SH_LANDISK)                += fixups-landisk.o
+obj-$(CONFIG_SH_LBOX_RE2)               += fixups-rts7751r2d.o
+obj-$(CONFIG_SH_CAYMAN)                 += fixups-cayman.o
diff --git a/arch/sh/drivers/pci/ops-cayman.c b/arch/sh/drivers/pci/fixups-cayman.c
index 38ef76207af6..b68b61d22c6c 100644
--- a/arch/sh/drivers/pci/ops-cayman.c
+++ b/arch/sh/drivers/pci/fixups-cayman.c
@@ -75,15 +75,3 @@ int __init pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin)
 
         return result;
 }
-
-struct pci_channel board_pci_channels[] = {
-        { &sh5_pci_ops, NULL, NULL, 0, 0xff },
-        { NULL, NULL, NULL, 0, 0 },
-};
-EXPORT_SYMBOL(board_pci_channels);
-
-int __init pcibios_init_platform(void)
-{
-        return sh5pci_init(__pa(memory_start),
-                           __pa(memory_end) - __pa(memory_start));
-}
diff --git a/arch/sh/drivers/pci/fixups-dreamcast.c b/arch/sh/drivers/pci/fixups-dreamcast.c
index 2bf85cf091e1..ed7f489936f1 100644
--- a/arch/sh/drivers/pci/fixups-dreamcast.c
+++ b/arch/sh/drivers/pci/fixups-dreamcast.c
@@ -30,7 +30,7 @@
 
 static void __init gapspci_fixup_resources(struct pci_dev *dev)
 {
-        struct pci_channel *p = board_pci_channels;
+        struct pci_channel *p = dev->sysdata;
 
         printk(KERN_NOTICE "PCI: Fixing up device %s\n", pci_name(dev));
 
@@ -41,6 +41,13 @@ static void __init gapspci_fixup_resources(struct pci_dev *dev)
                  */
                 dev->resource[1].start  = p->io_resource->start  + 0x100;
                 dev->resource[1].end    = dev->resource[1].start + 0x200 - 1;
+
+                /*
+                 * This is not a normal BAR, prevent any attempts to move
+                 * the BAR, as this will result in a bus lock.
+                 */
+                dev->resource[1].flags |= IORESOURCE_PCI_FIXED;
+
                 /*
                  * Redirect dma memory allocations to special memory window.
                  */
diff --git a/arch/sh/drivers/pci/ops-landisk.c b/arch/sh/drivers/pci/fixups-landisk.c
index bff09ecf3419..bb1a6bb5149e 100644
--- a/arch/sh/drivers/pci/ops-landisk.c
+++ b/arch/sh/drivers/pci/fixups-landisk.c
@@ -15,39 +15,6 @@
 #include <linux/pci.h>
 #include "pci-sh4.h"
 
-static struct resource sh7751_io_resource = {
-        .name = "SH7751 IO",
-        .start = SH7751_PCI_IO_BASE,
-        .end = SH7751_PCI_IO_BASE + SH7751_PCI_IO_SIZE - 1,
-        .flags = IORESOURCE_IO
-};
-
-static struct resource sh7751_mem_resource = {
-        .name = "SH7751 mem",
-        .start = SH7751_PCI_MEMORY_BASE,
-        .end = SH7751_PCI_MEMORY_BASE + SH7751_PCI_MEM_SIZE - 1,
-        .flags = IORESOURCE_MEM
-};
-
-struct pci_channel board_pci_channels[] = {
-        {&sh4_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0x3ff},
-        {NULL, NULL, NULL, 0, 0},
-};
-
-static struct sh4_pci_address_map sh7751_pci_map = {
-        .window0 = {
-                .base   = SH7751_CS3_BASE_ADDR,
-                .size   = (64 << 20),   /* 64MB */
-        },
-
-        .flags = SH4_PCIC_NO_RESET,
-};
-
-int __init pcibios_init_platform(void)
-{
-        return sh7751_pcic_init(&sh7751_pci_map);
-}
-
 int pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
 {
         /*
diff --git a/arch/sh/drivers/pci/fixups-lboxre2.c b/arch/sh/drivers/pci/fixups-lboxre2.c
deleted file mode 100644
index 1c1d41255ec0..000000000000
--- a/arch/sh/drivers/pci/fixups-lboxre2.c
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * arch/sh/drivers/pci/fixups-lboxre2.c
- *
- * L-BOX RE2 PCI fixups
- *
- * Copyright (C) 2007 Nobuhiro Iwamatsu
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include "pci-sh4.h"
-
-#define PCIMCR_MRSET_OFF        0xBFFFFFFF
-#define PCIMCR_RFSH_OFF         0xFFFFFFFB
-
-int pci_fixup_pcic(void)
-{
-        unsigned long bcr1, mcr;
-
-        bcr1 = ctrl_inl(SH7751_BCR1);
-        bcr1 |= 0x40080000;     /* Enable Bit 19 BREQEN, set PCIC to slave */
-        pci_write_reg(bcr1, SH4_PCIBCR1);
-
-        /* Enable all interrupts, so we known what to fix */
-        pci_write_reg(0x0000c3ff, SH4_PCIINTM);
-        pci_write_reg(0x0000380f, SH4_PCIAINTM);
-        pci_write_reg(0xfb900047, SH7751_PCICONF1);
-        pci_write_reg(0xab000001, SH7751_PCICONF4);
-
-        mcr = ctrl_inl(SH7751_MCR);
-        mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF;
-        pci_write_reg(mcr, SH4_PCIMCR);
-
-        pci_write_reg(0x0c000000, SH7751_PCICONF5);
-        pci_write_reg(0xd0000000, SH7751_PCICONF6);
-        pci_write_reg(0x0c000000, SH4_PCILAR0);
-        pci_write_reg(0x00000000, SH4_PCILAR1);
-
-        return 0;
-}
diff --git a/arch/sh/drivers/pci/fixups-r7780rp.c b/arch/sh/drivers/pci/fixups-r7780rp.c
index 3e321df65d22..15ca65cb667e 100644
--- a/arch/sh/drivers/pci/fixups-r7780rp.c
+++ b/arch/sh/drivers/pci/fixups-r7780rp.c
@@ -11,35 +11,26 @@
  * for more details.
  */
 #include <linux/pci.h>
+#include <linux/io.h>
 #include "pci-sh4.h"
-#include <asm/io.h>
 
-int pci_fixup_pcic(void)
-{
-        pci_write_reg(0x000043ff, SH4_PCIINTM);
-        pci_write_reg(0x0000380f, SH4_PCIAINTM);
-
-        pci_write_reg(0xfbb00047, SH7780_PCICMD);
-        pci_write_reg(0x00000000, SH7780_PCIIBAR);
-
-        pci_write_reg(0x00011912, SH7780_PCISVID);
-        pci_write_reg(0x08000000, SH7780_PCICSCR0);
-        pci_write_reg(0x0000001b, SH7780_PCICSAR0);
-        pci_write_reg(0xfd000000, SH7780_PCICSCR1);
-        pci_write_reg(0x0000000f, SH7780_PCICSAR1);
-
-        pci_write_reg(0xfd000000, SH7780_PCIMBR0);
-        pci_write_reg(0x00fc0000, SH7780_PCIMBMR0);
+static char irq_tab[] __initdata = {
+        65, 66, 67, 68,
+};
 
-#ifdef CONFIG_32BIT
-        pci_write_reg(0xc0000000, SH7780_PCIMBR2);
-        pci_write_reg(0x20000000 - SH7780_PCI_IO_SIZE, SH7780_PCIMBMR2);
-#endif
+int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
+{
+        return irq_tab[slot];
+}
 
-        /* Set IOBR for windows containing area specified in pci.h */
-        pci_write_reg((PCIBIOS_MIN_IO & ~(SH7780_PCI_IO_SIZE - 1)),
-                      SH7780_PCIIOBR);
-        pci_write_reg(((SH7780_PCI_IO_SIZE-1) & (7<<18)), SH7780_PCIIOBMR);
+int pci_fixup_pcic(struct pci_channel *chan)
+{
+        pci_write_reg(chan, 0x000043ff, SH4_PCIINTM);
+        pci_write_reg(chan, 0x00000000, SH7780_PCIIBAR);
+        pci_write_reg(chan, 0x08000000, SH7780_PCICSCR0);
+        pci_write_reg(chan, 0x0000001b, SH7780_PCICSAR0);
+        pci_write_reg(chan, 0xfd000000, SH7780_PCICSCR1);
+        pci_write_reg(chan, 0x0000000f, SH7780_PCICSAR1);
 
         return 0;
 }
diff --git a/arch/sh/drivers/pci/fixups-rts7751r2d.c b/arch/sh/drivers/pci/fixups-rts7751r2d.c
index 904bce8768d3..052b354236dc 100644
--- a/arch/sh/drivers/pci/fixups-rts7751r2d.c
+++ b/arch/sh/drivers/pci/fixups-rts7751r2d.c
@@ -1,43 +1,67 @@
 /*
  * arch/sh/drivers/pci/fixups-rts7751r2d.c
  *
- * RTS7751R2D PCI fixups
+ * RTS7751R2D / LBOXRE2 PCI fixups
  *
  * Copyright (C) 2003  Lineo uSolutions, Inc.
  * Copyright (C) 2004  Paul Mundt
+ * Copyright (C) 2007  Nobuhiro Iwamatsu
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  */
+#include <linux/pci.h>
+#include <mach/lboxre2.h>
+#include <mach/r2d.h>
 #include "pci-sh4.h"
+#include <asm/machtypes.h>
 
 #define PCIMCR_MRSET_OFF        0xBFFFFFFF
 #define PCIMCR_RFSH_OFF         0xFFFFFFFB
 
-int pci_fixup_pcic(void)
+static u8 rts7751r2d_irq_tab[] __initdata = {
+        IRQ_PCI_INTA,
+        IRQ_PCI_INTB,
+        IRQ_PCI_INTC,
+        IRQ_PCI_INTD,
+};
+
+static char lboxre2_irq_tab[] __initdata = {
+        IRQ_ETH0, IRQ_ETH1, IRQ_INTA, IRQ_INTD,
+};
+
+int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
+{
+        if (mach_is_lboxre2())
+                return lboxre2_irq_tab[slot];
+        else
+                return rts7751r2d_irq_tab[slot];
+}
+
+int pci_fixup_pcic(struct pci_channel *chan)
 {
         unsigned long bcr1, mcr;
 
         bcr1 = ctrl_inl(SH7751_BCR1);
         bcr1 |= 0x40080000;     /* Enable Bit 19 BREQEN, set PCIC to slave */
-        pci_write_reg(bcr1, SH4_PCIBCR1);
+        pci_write_reg(chan, bcr1, SH4_PCIBCR1);
 
         /* Enable all interrupts, so we known what to fix */
-        pci_write_reg(0x0000c3ff, SH4_PCIINTM);
-        pci_write_reg(0x0000380f, SH4_PCIAINTM);
+        pci_write_reg(chan, 0x0000c3ff, SH4_PCIINTM);
+        pci_write_reg(chan, 0x0000380f, SH4_PCIAINTM);
 
-        pci_write_reg(0xfb900047, SH7751_PCICONF1);
-        pci_write_reg(0xab000001, SH7751_PCICONF4);
+        pci_write_reg(chan, 0xfb900047, SH7751_PCICONF1);
+        pci_write_reg(chan, 0xab000001, SH7751_PCICONF4);
 
         mcr = ctrl_inl(SH7751_MCR);
         mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF;
-        pci_write_reg(mcr, SH4_PCIMCR);
+        pci_write_reg(chan, mcr, SH4_PCIMCR);
 
-        pci_write_reg(0x0c000000, SH7751_PCICONF5);
-        pci_write_reg(0xd0000000, SH7751_PCICONF6);
-        pci_write_reg(0x0c000000, SH4_PCILAR0);
-        pci_write_reg(0x00000000, SH4_PCILAR1);
+        pci_write_reg(chan, 0x0c000000, SH7751_PCICONF5);
+        pci_write_reg(chan, 0xd0000000, SH7751_PCICONF6);
+        pci_write_reg(chan, 0x0c000000, SH4_PCILAR0);
+        pci_write_reg(chan, 0x00000000, SH4_PCILAR1);
 
         return 0;
 }
diff --git a/arch/sh/drivers/pci/fixups-sdk7780.c b/arch/sh/drivers/pci/fixups-sdk7780.c
index 2f8863099dd1..250b0edd7365 100644
--- a/arch/sh/drivers/pci/fixups-sdk7780.c
+++ b/arch/sh/drivers/pci/fixups-sdk7780.c
@@ -5,55 +5,48 @@
  *
  * Copyright (C) 2003  Lineo uSolutions, Inc.
  * Copyright (C) 2004 - 2006  Paul Mundt
+ * Copyright (C) 2006  Nobuhiro Iwamatsu
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  */
 #include <linux/pci.h>
+#include <linux/io.h>
 #include "pci-sh4.h"
-#include <asm/io.h>
 
-int pci_fixup_pcic(void)
+/* IDSEL [16][17][18][19][20][21][22][23][24][25][26][27][28][29][30][31] */
+static char sdk7780_irq_tab[4][16] __initdata = {
+        /* INTA */
+        { 65, 68, 67, 68, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
+        /* INTB */
+        { 66, 65, -1, 65, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
+        /* INTC */
+        { 67, 66, -1, 66, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
+        /* INTD */
+        { 68, 67, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
+};
+
+int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
+{
+       return sdk7780_irq_tab[pin-1][slot];
+}
+int pci_fixup_pcic(struct pci_channel *chan)
 {
-        ctrl_outl(0x00000001, SH7780_PCI_VCR2);
-
         /* Enable all interrupts, so we know what to fix */
-        pci_write_reg(0x0000C3FF, SH7780_PCIIMR);
-        pci_write_reg(0x0000380F, SH7780_PCIAINTM);
+        pci_write_reg(chan, 0x0000C3FF, SH7780_PCIIMR);
 
         /* Set up standard PCI config registers */
-        pci_write_reg(0xFB00, SH7780_PCISTATUS);
-        pci_write_reg(0x0047, SH7780_PCICMD);
-        pci_write_reg(0x00, SH7780_PCIPIF);
-        pci_write_reg(0x00, SH7780_PCISUB);
-        pci_write_reg(0x06, SH7780_PCIBCC);
-        pci_write_reg(0x1912, SH7780_PCISVID);
-        pci_write_reg(0x0001, SH7780_PCISID);
-
-        pci_write_reg(0x08000000, SH7780_PCIMBAR0);     /* PCI */
-        pci_write_reg(0x08000000, SH7780_PCILAR0);      /* SHwy */
-        pci_write_reg(0x07F00001, SH7780_PCILSR);       /* size 128M w/ MBAR */
-
-        pci_write_reg(0x00000000, SH7780_PCIMBAR1);
-        pci_write_reg(0x00000000, SH7780_PCILAR1);
-        pci_write_reg(0x00000000, SH7780_PCILSR1);
-
-        pci_write_reg(0xAB000801, SH7780_PCIIBAR);
-
-        /*
-         * Set the MBR so PCI address is one-to-one with window,
-         * meaning all calls go straight through... use ifdef to
-         * catch erroneous assumption.
-         */
-        pci_write_reg(0xFD000000 , SH7780_PCIMBR0);
-        pci_write_reg(0x00FC0000 , SH7780_PCIMBMR0);    /* 16M */
+        pci_write_reg(chan, 0x08000000, SH7780_PCIMBAR0);       /* PCI */
+        pci_write_reg(chan, 0x08000000, SH4_PCILAR0);   /* SHwy */
+        pci_write_reg(chan, 0x07F00001, SH4_PCILSR0);   /* size 128M w/ MBAR */
 
-        /* Set IOBR for window containing area specified in pci.h */
-        pci_write_reg(PCIBIOS_MIN_IO & ~(SH7780_PCI_IO_SIZE-1), SH7780_PCIIOBR);
-        pci_write_reg((SH7780_PCI_IO_SIZE-1) & (7 << 18), SH7780_PCIIOBMR);
+        pci_write_reg(chan, 0x00000000, SH7780_PCIMBAR1);
+        pci_write_reg(chan, 0x00000000, SH4_PCILAR1);
+        pci_write_reg(chan, 0x00000000, SH4_PCILSR1);
 
-        pci_write_reg(0xA5000C01, SH7780_PCICR);
+        pci_write_reg(chan, 0xAB000801, SH7780_PCIIBAR);
+        pci_write_reg(chan, 0xA5000C01, SH4_PCICR);
 
         return 0;
 }
diff --git a/arch/sh/drivers/pci/fixups-se7751.c b/arch/sh/drivers/pci/fixups-se7751.c
new file mode 100644
index 000000000000..475fa9f0fe2c
--- /dev/null
+++ b/arch/sh/drivers/pci/fixups-se7751.c
@@ -0,0 +1,111 @@
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/pci.h>
+#include <linux/io.h>
+#include "pci-sh4.h"
+
+int __init pcibios_map_platform_irq(u8 slot, u8 pin)
+{
+        switch (slot) {
+        case 0: return 13;
+        case 1: return 13;      /* AMD Ethernet controller */
+        case 2: return -1;
+        case 3: return -1;
+        case 4: return -1;
+        default:
+                printk("PCI: Bad IRQ mapping request for slot %d\n", slot);
+                return -1;
+        }
+}
+
+#define PCIMCR_MRSET_OFF        0xBFFFFFFF
+#define PCIMCR_RFSH_OFF         0xFFFFFFFB
+
+/*
+ * Only long word accesses of the PCIC's internal local registers and the
+ * configuration registers from the CPU is supported.
+ */
+#define PCIC_WRITE(x,v) writel((v), PCI_REG(x))
+#define PCIC_READ(x) readl(PCI_REG(x))
+
+/*
+ * Description:  This function sets up and initializes the pcic, sets
+ * up the BARS, maps the DRAM into the address space etc, etc.
+ */
+int pci_fixup_pcic(struct pci_channel *chan)
+{
+        unsigned long bcr1, wcr1, wcr2, wcr3, mcr;
+        unsigned short bcr2;
+
+        /*
+        * Initialize the slave bus controller on the pcic.  The values used
+        * here should not be hardcoded, but they should be taken from the bsc
+        * on the processor, to make this function as generic as possible.
+        * (i.e. Another sbc may usr different SDRAM timing settings -- in order
+        * for the pcic to work, its settings need to be exactly the same.)
+        */
+        bcr1 = (*(volatile unsigned long*)(SH7751_BCR1));
+        bcr2 = (*(volatile unsigned short*)(SH7751_BCR2));
+        wcr1 = (*(volatile unsigned long*)(SH7751_WCR1));
+        wcr2 = (*(volatile unsigned long*)(SH7751_WCR2));
+        wcr3 = (*(volatile unsigned long*)(SH7751_WCR3));
+        mcr = (*(volatile unsigned long*)(SH7751_MCR));
+
+        bcr1 = bcr1 | 0x00080000;  /* Enable Bit 19, BREQEN */
+        (*(volatile unsigned long*)(SH7751_BCR1)) = bcr1;
+
+        bcr1 = bcr1 | 0x40080000;  /* Enable Bit 19 BREQEN, set PCIC to slave */
+        PCIC_WRITE(SH7751_PCIBCR1, bcr1);        /* PCIC BCR1 */
+        PCIC_WRITE(SH7751_PCIBCR2, bcr2);     /* PCIC BCR2 */
+        PCIC_WRITE(SH7751_PCIWCR1, wcr1);     /* PCIC WCR1 */
+        PCIC_WRITE(SH7751_PCIWCR2, wcr2);     /* PCIC WCR2 */
+        PCIC_WRITE(SH7751_PCIWCR3, wcr3);     /* PCIC WCR3 */
+        mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF;
+        PCIC_WRITE(SH7751_PCIMCR, mcr);      /* PCIC MCR */
+
+
+        /* Enable all interrupts, so we know what to fix */
+        PCIC_WRITE(SH7751_PCIINTM, 0x0000c3ff);
+        PCIC_WRITE(SH7751_PCIAINTM, 0x0000380f);
+
+        /* Set up standard PCI config registers */
+        PCIC_WRITE(SH7751_PCICONF1,     0xF39000C7); /* Bus Master, Mem & I/O access */
+        PCIC_WRITE(SH7751_PCICONF2,     0x00000000); /* PCI Class code & Revision ID */
+        PCIC_WRITE(SH7751_PCICONF4,     0xab000001); /* PCI I/O address (local regs) */
+        PCIC_WRITE(SH7751_PCICONF5,     0x0c000000); /* PCI MEM address (local RAM)  */
+        PCIC_WRITE(SH7751_PCICONF6,     0xd0000000); /* PCI MEM address (unused)     */
+        PCIC_WRITE(SH7751_PCICONF11, 0x35051054); /* PCI Subsystem ID & Vendor ID */
+        PCIC_WRITE(SH7751_PCILSR0, 0x03f00000);   /* MEM (full 64M exposed)       */
+        PCIC_WRITE(SH7751_PCILSR1, 0x00000000);   /* MEM (unused)                 */
+        PCIC_WRITE(SH7751_PCILAR0, 0x0c000000);   /* MEM (direct map from PCI)    */
+        PCIC_WRITE(SH7751_PCILAR1, 0x00000000);   /* MEM (unused)                 */
+
+        /* Now turn it on... */
+        PCIC_WRITE(SH7751_PCICR, 0xa5000001);
+
+        /*
+        * Set PCIMBR and PCIIOBR here, assuming a single window
+        * (16M MEM, 256K IO) is enough.  If a larger space is
+        * needed, the readx/writex and inx/outx functions will
+        * have to do more (e.g. setting registers for each call).
+        */
+
+        /*
+        * Set the MBR so PCI address is one-to-one with window,
+        * meaning all calls go straight through... use BUG_ON to
+        * catch erroneous assumption.
+        */
+        BUG_ON(chan->mem_resource->start != SH7751_PCI_MEMORY_BASE);
+
+        PCIC_WRITE(SH7751_PCIMBR, chan->mem_resource->start);
+
+        /* Set IOBR for window containing area specified in pci.h */
+        PCIC_WRITE(SH7751_PCIIOBR, (chan->io_resource->start & SH7751_PCIIOBR_MASK));
+
+        /* All done, may as well say so... */
+        printk("SH7751 PCI: Finished initialization of the PCI controller\n");
+
+        return 1;
+}
diff --git a/arch/sh/drivers/pci/fixups-se7780.c b/arch/sh/drivers/pci/fixups-se7780.c
deleted file mode 100644
index 880cea1c0d89..000000000000
--- a/arch/sh/drivers/pci/fixups-se7780.c
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * arch/sh/drivers/pci/fixups-se7780.c
- *
- * HITACHI UL Solution Engine 7780  PCI fixups
- *
- * Copyright (C) 2003  Lineo uSolutions, Inc.
- * Copyright (C) 2004 - 2006  Paul Mundt
- * Copyright (C) 2006  Nobuhiro Iwamatsu
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/pci.h>
-#include "pci-sh4.h"
-#include <asm/io.h>
-
-int pci_fixup_pcic(void)
-{
-        ctrl_outl(0x00000001, SH7780_PCI_VCR2);
-
-        /* Enable all interrupts, so we know what to fix */
-        pci_write_reg(0x0000C3FF, SH7780_PCIIMR);
-        pci_write_reg(0x0000380F, SH7780_PCIAINTM);
-
-        /* Set up standard PCI config registers */
-        ctrl_outw(0xFB00, PCI_REG(SH7780_PCISTATUS));
-        ctrl_outw(0x0047, PCI_REG(SH7780_PCICMD));
-        ctrl_outb(  0x00, PCI_REG(SH7780_PCIPIF));
-        ctrl_outb(  0x00, PCI_REG(SH7780_PCISUB));
-        ctrl_outb(  0x06, PCI_REG(SH7780_PCIBCC));
-        ctrl_outw(0x1912, PCI_REG(SH7780_PCISVID));
-        ctrl_outw(0x0001, PCI_REG(SH7780_PCISID));
-
-        pci_write_reg(0x08000000, SH7780_PCIMBAR0);     /* PCI */
-        pci_write_reg(0x08000000, SH7780_PCILAR0);     /* SHwy */
-        pci_write_reg(0x07F00001, SH7780_PCILSR);      /* size 128M w/ MBAR */
-
-        pci_write_reg(0x00000000, SH7780_PCIMBAR1);
-        pci_write_reg(0x00000000, SH7780_PCILAR1);
-        pci_write_reg(0x00000000, SH7780_PCILSR1);
-
-        pci_write_reg(0xAB000801, SH7780_PCIIBAR);
-
-        /*
-         * Set the MBR so PCI address is one-to-one with window,
-         * meaning all calls go straight through... use ifdef to
-         * catch erroneous assumption.
-         */
-        pci_write_reg(0xFD000000 , SH7780_PCIMBR0);
-        pci_write_reg(0x00FC0000 , SH7780_PCIMBMR0);    /* 16M */
-
-        /* Set IOBR for window containing area specified in pci.h */
-        pci_write_reg(PCIBIOS_MIN_IO & ~(SH7780_PCI_IO_SIZE-1), SH7780_PCIIOBR);
-        pci_write_reg((SH7780_PCI_IO_SIZE-1) & (7 << 18), SH7780_PCIIOBMR);
-
-        pci_write_reg(0xA5000C01, SH7780_PCICR);
-
-        return 0;
-}
diff --git a/arch/sh/drivers/pci/fixups-sh7785lcr.c b/arch/sh/drivers/pci/fixups-sh7785lcr.c
deleted file mode 100644
index 4949e601387a..000000000000
--- a/arch/sh/drivers/pci/fixups-sh7785lcr.c
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * arch/sh/drivers/pci/fixups-sh7785lcr.c
- *
- * R0P7785LC0011RL PCI fixups
- * Copyright (C) 2008  Yoshihiro Shimoda
- *
- * Based on arch/sh/drivers/pci/fixups-r7780rp.c
- * Copyright (C) 2003  Lineo uSolutions, Inc.
- * Copyright (C) 2004 - 2006  Paul Mundt
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/pci.h>
-#include "pci-sh4.h"
-
-int pci_fixup_pcic(void)
-{
-        pci_write_reg(0x000043ff, SH4_PCIINTM);
-        pci_write_reg(0x0000380f, SH4_PCIAINTM);
-
-        pci_write_reg(0xfbb00047, SH7780_PCICMD);
-        pci_write_reg(0x00000000, SH7780_PCIIBAR);
-
-        pci_write_reg(0x00011912, SH7780_PCISVID);
-        pci_write_reg(0x08000000, SH7780_PCICSCR0);
-        pci_write_reg(0x0000001b, SH7780_PCICSAR0);
-        pci_write_reg(0xfd000000, SH7780_PCICSCR1);
-        pci_write_reg(0x0000000f, SH7780_PCICSAR1);
-
-        pci_write_reg(0xfd000000, SH7780_PCIMBR0);
-        pci_write_reg(0x00fc0000, SH7780_PCIMBMR0);
-
-#ifdef CONFIG_32BIT
-        pci_write_reg(0xc0000000, SH7780_PCIMBR2);
-        pci_write_reg(0x20000000 - SH7780_PCI_IO_SIZE, SH7780_PCIMBMR2);
-#endif
-
-        /* Set IOBR for windows containing area specified in pci.h */
-        pci_write_reg((PCIBIOS_MIN_IO & ~(SH7780_PCI_IO_SIZE - 1)),
-                      SH7780_PCIIOBR);
-        pci_write_reg(((SH7780_PCI_IO_SIZE - 1) & (7 << 18)), SH7780_PCIIOBMR);
-
-        return 0;
-}
diff --git a/arch/sh/drivers/pci/fixups-snapgear.c b/arch/sh/drivers/pci/fixups-snapgear.c
new file mode 100644
index 000000000000..5a39ecc1adb8
--- /dev/null
+++ b/arch/sh/drivers/pci/fixups-snapgear.c
@@ -0,0 +1,38 @@
+/*
+ * arch/sh/drivers/pci/ops-snapgear.c
+ *
+ * Author:  David McCullough <davidm@snapgear.com>
+ *
+ * Ported to new API by Paul Mundt <lethal@linux-sh.org>
+ *
+ * Highly leveraged from pci-bigsur.c, written by Dustin McIntire.
+ *
+ * May be copied or modified under the terms of the GNU General Public
+ * License.  See linux/COPYING for more information.
+ *
+ * PCI initialization for the SnapGear boards
+ */
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/pci.h>
+#include "pci-sh4.h"
+
+int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
+{
+        int irq = -1;
+
+        switch (slot) {
+        case 8:  /* the PCI bridge */ break;
+        case 11: irq = 8;  break; /* USB    */
+        case 12: irq = 11; break; /* PCMCIA */
+        case 13: irq = 5;  break; /* eth0   */
+        case 14: irq = 8;  break; /* eth1   */
+        case 15: irq = 11; break; /* safenet (unused) */
+        }
+
+        printk("PCI: Mapping SnapGear IRQ for slot %d, pin %c to irq %d\n",
+               slot, pin - 1 + 'A', irq);
+
+        return irq;
+}
diff --git a/arch/sh/drivers/pci/ops-titan.c b/arch/sh/drivers/pci/fixups-titan.c
index a8f7801a34af..3a79fa8254a6 100644
--- a/arch/sh/drivers/pci/ops-titan.c
+++ b/arch/sh/drivers/pci/fixups-titan.c
@@ -36,42 +36,3 @@ int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
 
         return irq;
 }
-
-static struct resource sh7751_io_resource = {
-        .name   = "SH7751_IO",
-        .start  = SH7751_PCI_IO_BASE,
-        .end    = SH7751_PCI_IO_BASE + SH7751_PCI_IO_SIZE - 1,
-        .flags  = IORESOURCE_IO
-};
-
-static struct resource sh7751_mem_resource = {
-        .name   = "SH7751_mem",
-        .start  = SH7751_PCI_MEMORY_BASE,
-        .end    = SH7751_PCI_MEMORY_BASE + SH7751_PCI_MEM_SIZE - 1,
-        .flags  = IORESOURCE_MEM
-};
-
-struct pci_channel board_pci_channels[] = {
-        { &sh4_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff },
-        { NULL, NULL, NULL, 0, 0 },
-};
-EXPORT_SYMBOL(board_pci_channels);
-
-static struct sh4_pci_address_map sh7751_pci_map = {
-        .window0        = {
-                .base   = SH7751_CS2_BASE_ADDR,
-                .size   = SH7751_MEM_REGION_SIZE*2,     /* cs2 and cs3 */
-        },
-
-        .window1        = {
-                .base   = SH7751_CS2_BASE_ADDR,
-                .size   = SH7751_MEM_REGION_SIZE*2,
-        },
-
-        .flags  = SH4_PCIC_NO_RESET,
-};
-
-int __init pcibios_init_platform(void)
-{
-        return sh7751_pcic_init(&sh7751_pci_map);
-}
diff --git a/arch/sh/drivers/pci/ops-dreamcast.c b/arch/sh/drivers/pci/ops-dreamcast.c
index f5d2a2aa6f3f..e83d0d3aabe2 100644
--- a/arch/sh/drivers/pci/ops-dreamcast.c
+++ b/arch/sh/drivers/pci/ops-dreamcast.c
@@ -1,15 +1,9 @@
 /*
- * arch/sh/drivers/pci/ops-dreamcast.c
- *
  * PCI operations for the Sega Dreamcast
  *
  * Copyright (C) 2001, 2002  M. R. Brown
  * Copyright (C) 2002, 2003  Paul Mundt
  *
- * This file originally bore the message (with enclosed-$):
- *      Id: pci.c,v 1.3 2003/05/04 19:29:46 lethal Exp
- *      Dreamcast PCI: Supports SEGA Broadband Adaptor only.
- *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
@@ -23,34 +17,10 @@
 #include <linux/irq.h>
 #include <linux/pci.h>
 #include <linux/module.h>
-
-#include <asm/io.h>
-#include <asm/irq.h>
+#include <linux/io.h>
+#include <linux/irq.h>
 #include <mach/pci.h>
 
-static struct resource gapspci_io_resource = {
-        .name   = "GAPSPCI IO",
-        .start  = GAPSPCI_BBA_CONFIG,
-        .end    = GAPSPCI_BBA_CONFIG + GAPSPCI_BBA_CONFIG_SIZE - 1,
-        .flags  = IORESOURCE_IO,
-};
-
-static struct resource gapspci_mem_resource = {
-        .name   = "GAPSPCI mem",
-        .start  = GAPSPCI_DMA_BASE,
-        .end    = GAPSPCI_DMA_BASE + GAPSPCI_DMA_SIZE - 1,
-        .flags  = IORESOURCE_MEM,
-};
-
-static struct pci_ops gapspci_pci_ops;
-
-struct pci_channel board_pci_channels[] = {
-        { &gapspci_pci_ops, &gapspci_io_resource,
-          &gapspci_mem_resource, 0, 1 },
-        { 0, }
-};
-EXPORT_SYMBOL(board_pci_channels);
-
 /*
  * The !gapspci_config_access case really shouldn't happen, ever, unless
  * someone implicitly messes around with the last devfn value.. otherwise we
@@ -85,10 +55,10 @@ static int gapspci_read(struct pci_bus *bus, unsigned int devfn, int where, int
                 return PCIBIOS_DEVICE_NOT_FOUND;
 
         switch (size) {
-                case 1: *val = inb(GAPSPCI_BBA_CONFIG+where); break;
-                case 2: *val = inw(GAPSPCI_BBA_CONFIG+where); break;
-                case 4: *val = inl(GAPSPCI_BBA_CONFIG+where); break;
-        }       
+        case 1: *val = inb(GAPSPCI_BBA_CONFIG+where); break;
+        case 2: *val = inw(GAPSPCI_BBA_CONFIG+where); break;
+        case 4: *val = inl(GAPSPCI_BBA_CONFIG+where); break;
+        }
 
         return PCIBIOS_SUCCESSFUL;
 }
@@ -99,72 +69,15 @@ static int gapspci_write(struct pci_bus *bus, unsigned int devfn, int where, int
                 return PCIBIOS_DEVICE_NOT_FOUND;
 
         switch (size) {
-                case 1: outb(( u8)val, GAPSPCI_BBA_CONFIG+where); break;
-                case 2: outw((u16)val, GAPSPCI_BBA_CONFIG+where); break;
-                case 4: outl((u32)val, GAPSPCI_BBA_CONFIG+where); break;
+        case 1: outb(( u8)val, GAPSPCI_BBA_CONFIG+where); break;
+        case 2: outw((u16)val, GAPSPCI_BBA_CONFIG+where); break;
+        case 4: outl((u32)val, GAPSPCI_BBA_CONFIG+where); break;
         }
 
         return PCIBIOS_SUCCESSFUL;
 }
 
-static struct pci_ops gapspci_pci_ops = {
+struct pci_ops gapspci_pci_ops = {
         .read   = gapspci_read,
         .write  = gapspci_write,
 };
-
-/*
- * gapspci init
- */
-
-int __init gapspci_init(void)
-{
-        char idbuf[16];
-        int i;
-
-        /*
-         * FIXME: All of this wants documenting to some degree,
-         * even some basic register definitions would be nice.
-         *
-         * I haven't seen anything this ugly since.. maple.
-         */
-
-        for (i=0; i<16; i++)
-                idbuf[i] = inb(GAPSPCI_REGS+i);
-
-        if (strncmp(idbuf, "GAPSPCI_BRIDGE_2", 16))
-                return -ENODEV;
-
-        outl(0x5a14a501, GAPSPCI_REGS+0x18);
-
-        for (i=0; i<1000000; i++)
-                ;
-
-        if (inl(GAPSPCI_REGS+0x18) != 1)
-                return -EINVAL;
-
-        outl(0x01000000, GAPSPCI_REGS+0x20);
-        outl(0x01000000, GAPSPCI_REGS+0x24);
-
-        outl(GAPSPCI_DMA_BASE, GAPSPCI_REGS+0x28);
-        outl(GAPSPCI_DMA_BASE+GAPSPCI_DMA_SIZE, GAPSPCI_REGS+0x2c);
-
-        outl(1, GAPSPCI_REGS+0x14);
-        outl(1, GAPSPCI_REGS+0x34);
-
-        /* Setting Broadband Adapter */
-        outw(0xf900, GAPSPCI_BBA_CONFIG+0x06);
-        outl(0x00000000, GAPSPCI_BBA_CONFIG+0x30);
-        outb(0x00, GAPSPCI_BBA_CONFIG+0x3c);
-        outb(0xf0, GAPSPCI_BBA_CONFIG+0x0d);
-        outw(0x0006, GAPSPCI_BBA_CONFIG+0x04);
-        outl(0x00002001, GAPSPCI_BBA_CONFIG+0x10);
-        outl(0x01000000, GAPSPCI_BBA_CONFIG+0x14);
-
-        return 0;
-}
-
-/* Haven't done anything here as yet */
-char * __devinit pcibios_setup(char *str)
-{
-        return str;
-}
diff --git a/arch/sh/drivers/pci/ops-lboxre2.c b/arch/sh/drivers/pci/ops-lboxre2.c
deleted file mode 100644
index 86c0b6fb7375..000000000000
--- a/arch/sh/drivers/pci/ops-lboxre2.c
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * linux/arch/sh/drivers/pci/ops-lboxre2.c
- *
- * Copyright (C) 2007 Nobuhiro Iwamatsu
- *
- * PCI initialization for the NTT COMWARE L-BOX RE2
- */
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/io.h>
-#include <mach/lboxre2.h>
-#include "pci-sh4.h"
-
-static char lboxre2_irq_tab[] __initdata = {
-        IRQ_ETH0, IRQ_ETH1, IRQ_INTA, IRQ_INTD,
-};
-
-int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
-{
-        return lboxre2_irq_tab[slot];
-}
-
-static struct resource sh7751_io_resource = {
-        .name   = "SH7751_IO",
-        .start  = SH7751_PCI_IO_BASE ,
-        .end    = SH7751_PCI_IO_BASE + SH7751_PCI_IO_SIZE - 1,
-        .flags  = IORESOURCE_IO
-};
-
-static struct resource sh7751_mem_resource = {
-        .name   = "SH7751_mem",
-        .start  = SH7751_PCI_MEMORY_BASE,
-        .end    = SH7751_PCI_MEMORY_BASE + SH7751_PCI_MEM_SIZE - 1,
-        .flags  = IORESOURCE_MEM
-};
-
-extern struct pci_ops sh7751_pci_ops;
-
-struct pci_channel board_pci_channels[] = {
-        { &sh4_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff },
-        { NULL, NULL, NULL, 0, 0 },
-};
-
-EXPORT_SYMBOL(board_pci_channels);
-
-static struct sh4_pci_address_map sh7751_pci_map = {
-        .window0        = {
-                .base   = SH7751_CS3_BASE_ADDR,
-                .size   = 0x04000000,
-        },
-        .window1        = {
-                .base   = 0x00000000,   /* Unused */
-                .size   = 0x00000000,   /* Unused */
-        },
-        .flags  = SH4_PCIC_NO_RESET,
-};
-
-int __init pcibios_init_platform(void)
-{
-        return sh7751_pcic_init(&sh7751_pci_map);
-}
diff --git a/arch/sh/drivers/pci/ops-r7780rp.c b/arch/sh/drivers/pci/ops-r7780rp.c
deleted file mode 100644
index 8555238e63eb..000000000000
--- a/arch/sh/drivers/pci/ops-r7780rp.c
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * Author:  Ian DaSilva (idasilva@mvista.com)
- *
- * Highly leveraged from pci-bigsur.c, written by Dustin McIntire.
- *
- * May be copied or modified under the terms of the GNU General Public
- * License.  See linux/COPYING for more information.
- *
- * PCI initialization for the Renesas SH7780 Highlander R7780RP-1 board
- */
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/pci.h>
-#include <mach/highlander.h>
-#include <asm/io.h>
-#include "pci-sh4.h"
-
-static char irq_tab[] __initdata = {
-        65, 66, 67, 68,
-};
-
-int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
-{
-        return irq_tab[slot];
-}
-
-static struct resource sh7780_io_resource = {
-        .name   = "SH7780_IO",
-        .start  = SH7780_PCI_IO_BASE,
-        .end    = SH7780_PCI_IO_BASE + SH7780_PCI_IO_SIZE - 1,
-        .flags  = IORESOURCE_IO
-};
-
-static struct resource sh7780_mem_resource = {
-        .name   = "SH7780_mem",
-        .start  = SH7780_PCI_MEMORY_BASE,
-        .end    = SH7780_PCI_MEMORY_BASE + SH7780_PCI_MEM_SIZE - 1,
-        .flags  = IORESOURCE_MEM
-};
-
-extern struct pci_ops sh7780_pci_ops;
-
-struct pci_channel board_pci_channels[] = {
-        { &sh4_pci_ops, &sh7780_io_resource, &sh7780_mem_resource, 0, 0xff },
-        { NULL, NULL, NULL, 0, 0 },
-};
-EXPORT_SYMBOL(board_pci_channels);
-
-static struct sh4_pci_address_map sh7780_pci_map = {
-        .window0        = {
-                .base   = SH7780_CS2_BASE_ADDR,
-                .size   = 0x04000000,
-        },
-
-        .window1        = {
-                .base   = SH7780_CS3_BASE_ADDR,
-                .size   = 0x04000000,
-        },
-
-        .flags  = SH4_PCIC_NO_RESET,
-};
-
-int __init pcibios_init_platform(void)
-{
-        return sh7780_pcic_init(&sh7780_pci_map);
-}
diff --git a/arch/sh/drivers/pci/ops-rts7751r2d.c b/arch/sh/drivers/pci/ops-rts7751r2d.c
deleted file mode 100644
index d6ca74b25d5f..000000000000
--- a/arch/sh/drivers/pci/ops-rts7751r2d.c
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * linux/arch/sh/drivers/pci/ops-rts7751r2d.c
- *
- * Author:  Ian DaSilva (idasilva@mvista.com)
- *
- * Highly leveraged from pci-bigsur.c, written by Dustin McIntire.
- *
- * May be copied or modified under the terms of the GNU General Public
- * License.  See linux/COPYING for more information.
- *
- * PCI initialization for the Renesas SH7751R RTS7751R2D board
- */
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/io.h>
-#include <mach/r2d.h>
-#include "pci-sh4.h"
-
-static u8 rts7751r2d_irq_tab[] __initdata = {
-        IRQ_PCI_INTA,
-        IRQ_PCI_INTB,
-        IRQ_PCI_INTC,
-        IRQ_PCI_INTD,
-};
-
-int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
-{
-        return rts7751r2d_irq_tab[slot];
-}
-
-static struct resource sh7751_io_resource = {
-        .name   = "SH7751_IO",
-        .start  = 0x4000,
-        .end    = SH7751_PCI_IO_SIZE - 1,
-        .flags  = IORESOURCE_IO
-};
-
-static struct resource sh7751_mem_resource = {
-        .name   = "SH7751_mem",
-        .start  = SH7751_PCI_MEMORY_BASE,
-        .end    = SH7751_PCI_MEMORY_BASE + SH7751_PCI_MEM_SIZE - 1,
-        .flags  = IORESOURCE_MEM
-};
-
-extern struct pci_ops sh7751_pci_ops;
-
-struct pci_channel board_pci_channels[] = {
-        { &sh4_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff },
-        { NULL, NULL, NULL, 0, 0 },
-};
-EXPORT_SYMBOL(board_pci_channels);
-
-static struct sh4_pci_address_map sh7751_pci_map = {
-        .window0        = {
-                .base   = SH7751_CS3_BASE_ADDR,
-                .size   = 0x04000000,
-        },
-
-        .window1        = {
-                .base   = 0x00000000,   /* Unused */
-                .size   = 0x00000000,   /* Unused */
-        },
-
-        .flags  = SH4_PCIC_NO_RESET,
-};
-
-int __init pcibios_init_platform(void)
-{
-        __set_io_port_base(SH7751_PCI_IO_BASE);
-        return sh7751_pcic_init(&sh7751_pci_map);
-}
-
diff --git a/arch/sh/drivers/pci/ops-sdk7780.c b/arch/sh/drivers/pci/ops-sdk7780.c
deleted file mode 100644
index 4dcc64184b23..000000000000
--- a/arch/sh/drivers/pci/ops-sdk7780.c
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * linux/arch/sh/drivers/pci/ops-sdk7780.c
- *
- * Copyright (C) 2006  Nobuhiro Iwamatsu
- *
- * PCI initialization for the SDK7780SE03
- *
- * May be copied or modified under the terms of the GNU General Public
- * License.  See linux/COPYING for more information.
- */
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/pci.h>
-#include <mach/sdk7780.h>
-#include <asm/io.h>
-#include "pci-sh4.h"
-
-/* IDSEL [16][17][18][19][20][21][22][23][24][25][26][27][28][29][30][31] */
-static char sdk7780_irq_tab[4][16] __initdata = {
-        /* INTA */
-        { 65, 68, 67, 68, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
-        /* INTB */
-        { 66, 65, -1, 65, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
-        /* INTC */
-        { 67, 66, -1, 66, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
-        /* INTD */
-        { 68, 67, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
-};
-
-int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
-{
-       return sdk7780_irq_tab[pin-1][slot];
-}
-
-static struct resource sdk7780_io_resource = {
-        .name   = "SH7780_IO",
-        .start  = SH7780_PCI_IO_BASE,
-        .end    = SH7780_PCI_IO_BASE + SH7780_PCI_IO_SIZE - 1,
-        .flags  = IORESOURCE_IO
-};
-
-static struct resource sdk7780_mem_resource = {
-        .name   = "SH7780_mem",
-        .start  = SH7780_PCI_MEMORY_BASE,
-        .end    = SH7780_PCI_MEMORY_BASE + SH7780_PCI_MEM_SIZE - 1,
-        .flags  = IORESOURCE_MEM
-};
-
-struct pci_channel board_pci_channels[] = {
-        { &sh4_pci_ops, &sdk7780_io_resource, &sdk7780_mem_resource, 0, 0xff },
-        { NULL, NULL, NULL, 0, 0 },
-};
-EXPORT_SYMBOL(board_pci_channels);
-
-static struct sh4_pci_address_map sdk7780_pci_map = {
-        .window0        = {
-                .base   = SH7780_CS2_BASE_ADDR,
-                .size   = 0x04000000,
-        },
-        .window1        = {
-                .base   = SH7780_CS3_BASE_ADDR,
-                .size   = 0x04000000,
-        },
-        .flags  = SH4_PCIC_NO_RESET,
-};
-
-int __init pcibios_init_platform(void)
-{
-        printk(KERN_INFO "SH7780 PCI: Finished initializing PCI controller\n");
-        return sh7780_pcic_init(&sdk7780_pci_map);
-}
diff --git a/arch/sh/drivers/pci/ops-se7780.c b/arch/sh/drivers/pci/ops-se7780.c
deleted file mode 100644
index 3145c62484d6..000000000000
--- a/arch/sh/drivers/pci/ops-se7780.c
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- * linux/arch/sh/drivers/pci/ops-se7780.c
- *
- * Copyright (C) 2006  Nobuhiro Iwamatsu
- *
- * PCI initialization for the Hitachi UL Solution Engine 7780SE03
- *
- * May be copied or modified under the terms of the GNU General Public
- * License.  See linux/COPYING for more information.
- */
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/pci.h>
-#include <mach-se/mach/se7780.h>
-#include <asm/io.h>
-#include "pci-sh4.h"
-
-/*
- * IDSEL = AD16  PCI slot
- * IDSEL = AD17  PCI slot
- * IDSEL = AD18  Serial ATA Controller (Silicon Image SiL3512A)
- * IDSEL = AD19  USB Host Controller (NEC uPD7210100A)
- */
-
-/* IDSEL [16][17][18][19][20][21][22][23][24][25][26][27][28][29][30][31] */
-static char se7780_irq_tab[4][16] __initdata = {
-        /* INTA */
-        { 65, 68, 67, 68, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
-        /* INTB */
-        { 66, 65, -1, 65, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
-        /* INTC */
-        { 67, 66, -1, 66, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
-        /* INTD */
-        { 68, 67, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
-};
-
-int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
-{
-       return se7780_irq_tab[pin-1][slot];
-}
-
-static struct resource se7780_io_resource = {
-        .name   = "SH7780_IO",
-        .start  = SH7780_PCI_IO_BASE,
-        .end    = SH7780_PCI_IO_BASE + SH7780_PCI_IO_SIZE - 1,
-        .flags  = IORESOURCE_IO
-};
-
-static struct resource se7780_mem_resource = {
-        .name   = "SH7780_mem",
-        .start  = SH7780_PCI_MEMORY_BASE,
-        .end    = SH7780_PCI_MEMORY_BASE + SH7780_PCI_MEM_SIZE - 1,
-        .flags  = IORESOURCE_MEM
-};
-
-extern struct pci_ops se7780_pci_ops;
-
-struct pci_channel board_pci_channels[] = {
-        { &sh4_pci_ops, &se7780_io_resource, &se7780_mem_resource, 0, 0xff },
-        { NULL, NULL, NULL, 0, 0 },
-};
-EXPORT_SYMBOL(board_pci_channels);
-
-static struct sh4_pci_address_map se7780_pci_map = {
-        .window0        = {
-                .base   = SH7780_CS2_BASE_ADDR,
-                .size   = 0x04000000,
-        },
-        .flags  = SH4_PCIC_NO_RESET,
-};
-
-int __init pcibios_init_platform(void)
-{
-        printk("SH7780 PCI: Finished initialization of the PCI controller\n");
-
-        /*
-         * FPGA PCISEL register initialize
-         *
-         *  CPU  || SLOT1 | SLOT2 | S-ATA | USB
-         *  -------------------------------------
-         *  INTA || INTA  | INTD  |  --   | INTB
-         *  -------------------------------------
-         *  INTB || INTB  | INTA  |  --   | INTC
-         *  -------------------------------------
-         *  INTC || INTC  | INTB  | INTA  |  --
-         *  -------------------------------------
-         *  INTD || INTD  | INTC  |  --   | INTA
-         *  -------------------------------------
-         */
-        ctrl_outw(0x0013, FPGA_PCI_INTSEL1);
-        ctrl_outw(0xE402, FPGA_PCI_INTSEL2);
-
-        return sh7780_pcic_init(&se7780_pci_map);
-}
diff --git a/arch/sh/drivers/pci/ops-sh03.c b/arch/sh/drivers/pci/ops-sh03.c
deleted file mode 100644
index e1703ff5a4d2..000000000000
--- a/arch/sh/drivers/pci/ops-sh03.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * linux/arch/sh/drivers/pci/ops-sh03.c
- *
- * PCI initialization for the Interface CTP/PCI-SH03 board
- */
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/pci.h>
-#include <asm/io.h>
-#include "pci-sh7751.h"
-
-/*
- * Description:  This function sets up and initializes the pcic, sets
- * up the BARS, maps the DRAM into the address space etc, etc.
- */
-int __init pcibios_init_platform(void)
-{
-        __set_io_port_base(SH7751_PCI_IO_BASE);
-        return 1;
-}
-
-static struct resource sh7751_io_resource = {
-        .name   = "SH03 IO",
-        .start  = SH7751_PCI_IO_BASE,
-        .end    = SH7751_PCI_IO_BASE + SH7751_PCI_IO_SIZE - 1,
-        .flags  = IORESOURCE_IO
-};
-
-static struct resource sh7751_mem_resource = {
-        .name   = "SH03 mem",
-        .start  = SH7751_PCI_MEMORY_BASE,
-        .end    = SH7751_PCI_MEMORY_BASE + SH7751_PCI_MEM_SIZE - 1,
-        .flags  = IORESOURCE_MEM
-};
-
-extern struct pci_ops sh4_pci_ops;
-
-struct pci_channel board_pci_channels[] = {
-        { &sh4_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff },
-        { NULL, NULL, NULL, 0, 0 },
-};
-
diff --git a/arch/sh/drivers/pci/ops-sh4.c b/arch/sh/drivers/pci/ops-sh4.c
index 710a3b0306e5..78bebebdc99c 100644
--- a/arch/sh/drivers/pci/ops-sh4.c
+++ b/arch/sh/drivers/pci/ops-sh4.c
@@ -1,22 +1,22 @@
 /*
  * Generic SH-4 / SH-4A PCIC operations (SH7751, SH7780).
  *
- * Copyright (C) 2002 - 2006  Paul Mundt
+ * Copyright (C) 2002 - 2009  Paul Mundt
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License v2. See the file "COPYING" in the main directory of this archive
  * for more details.
  */
 #include <linux/pci.h>
+#include <linux/io.h>
 #include <asm/addrspace.h>
-#include <asm/io.h>
 #include "pci-sh4.h"
 
 /*
  * Direct access to PCI hardware...
  */
 #define CONFIG_CMD(bus, devfn, where) \
-        P1SEGADDR((bus->number << 16) | (devfn << 8) | (where & ~3))
+        (P1SEG | (bus->number << 16) | (devfn << 8) | (where & ~3))
 
 static DEFINE_SPINLOCK(sh4_pci_lock);
 
@@ -26,6 +26,7 @@ static DEFINE_SPINLOCK(sh4_pci_lock);
 static int sh4_pci_read(struct pci_bus *bus, unsigned int devfn,
                            int where, int size, u32 *val)
 {
+        struct pci_channel *chan = bus->sysdata;
         unsigned long flags;
         u32 data;
 
@@ -34,8 +35,8 @@ static int sh4_pci_read(struct pci_bus *bus, unsigned int devfn,
          * so we must do byte alignment by hand
          */
         spin_lock_irqsave(&sh4_pci_lock, flags);
-        pci_write_reg(CONFIG_CMD(bus, devfn, where), SH4_PCIPAR);
-        data = pci_read_reg(SH4_PCIPDR);
+        pci_write_reg(chan, CONFIG_CMD(bus, devfn, where), SH4_PCIPAR);
+        data = pci_read_reg(chan, SH4_PCIPDR);
         spin_unlock_irqrestore(&sh4_pci_lock, flags);
 
         switch (size) {
@@ -63,13 +64,14 @@ static int sh4_pci_read(struct pci_bus *bus, unsigned int devfn,
 static int sh4_pci_write(struct pci_bus *bus, unsigned int devfn,
                          int where, int size, u32 val)
 {
+        struct pci_channel *chan = bus->sysdata;
         unsigned long flags;
         int shift;
         u32 data;
 
         spin_lock_irqsave(&sh4_pci_lock, flags);
-        pci_write_reg(CONFIG_CMD(bus, devfn, where), SH4_PCIPAR);
-        data = pci_read_reg(SH4_PCIPDR);
+        pci_write_reg(chan, CONFIG_CMD(bus, devfn, where), SH4_PCIPAR);
+        data = pci_read_reg(chan, SH4_PCIPDR);
         spin_unlock_irqrestore(&sh4_pci_lock, flags);
 
         switch (size) {
@@ -90,7 +92,7 @@ static int sh4_pci_write(struct pci_bus *bus, unsigned int devfn,
                 return PCIBIOS_FUNC_NOT_SUPPORTED;
         }
 
-        pci_write_reg(data, SH4_PCIPDR);
+        pci_write_reg(chan, data, SH4_PCIPDR);
 
         return PCIBIOS_SUCCESSFUL;
 }
@@ -104,66 +106,31 @@ struct pci_ops sh4_pci_ops = {
  * Not really related to pci_ops, but it's common and not worth shoving
  * somewhere else for now..
  */
-static unsigned int pci_probe = PCI_PROBE_CONF1;
-
-int __init sh4_pci_check_direct(void)
+int __init sh4_pci_check_direct(struct pci_channel *chan)
 {
         /*
          * Check if configuration works.
          */
-        if (pci_probe & PCI_PROBE_CONF1) {
-                unsigned int tmp = pci_read_reg(SH4_PCIPAR);
-
-                pci_write_reg(P1SEG, SH4_PCIPAR);
+        unsigned int tmp = pci_read_reg(chan, SH4_PCIPAR);
 
-                if (pci_read_reg(SH4_PCIPAR) == P1SEG) {
-                        pci_write_reg(tmp, SH4_PCIPAR);
-                        printk(KERN_INFO "PCI: Using configuration type 1\n");
-                        request_region(PCI_REG(SH4_PCIPAR), 8, "PCI conf1");
+        pci_write_reg(chan, P1SEG, SH4_PCIPAR);
 
-                        return 0;
-                }
-
-                pci_write_reg(tmp, SH4_PCIPAR);
+        if (pci_read_reg(chan, SH4_PCIPAR) == P1SEG) {
+                pci_write_reg(chan, tmp, SH4_PCIPAR);
+                printk(KERN_INFO "PCI: Using configuration type 1\n");
+                request_region(chan->reg_base + SH4_PCIPAR, 8,
+                               "PCI conf1");
+                return 0;
         }
 
-        pr_debug("PCI: pci_check_direct failed\n");
-        return -EINVAL;
-}
+        pci_write_reg(chan, tmp, SH4_PCIPAR);
 
-/* Handle generic fixups */
-static void __init pci_fixup_ide_bases(struct pci_dev *d)
-{
-        int i;
+        printk(KERN_ERR "PCI: %s failed\n", __func__);
 
-        /*
-         * PCI IDE controllers use non-standard I/O port decoding, respect it.
-         */
-        if ((d->class >> 8) != PCI_CLASS_STORAGE_IDE)
-                return;
-        pr_debug("PCI: IDE base address fixup for %s\n", pci_name(d));
-        for(i = 0; i < 4; i++) {
-                struct resource *r = &d->resource[i];
-
-                if ((r->start & ~0x80) == 0x374) {
-                        r->start |= 2;
-                        r->end = r->start;
-                }
-        }
-}
-DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases);
-
-char * __devinit pcibios_setup(char *str)
-{
-        if (!strcmp(str, "off")) {
-                pci_probe = 0;
-                return NULL;
-        }
-
-        return str;
+        return -EINVAL;
 }
 
-int __attribute__((weak)) pci_fixup_pcic(void)
+int __attribute__((weak)) pci_fixup_pcic(struct pci_channel *chan)
 {
         /* Nothing to do. */
         return 0;
diff --git a/arch/sh/drivers/pci/ops-sh5.c b/arch/sh/drivers/pci/ops-sh5.c
index 729e38a6fe07..4ce95a001b80 100644
--- a/arch/sh/drivers/pci/ops-sh5.c
+++ b/arch/sh/drivers/pci/ops-sh5.c
@@ -22,31 +22,6 @@
 #include <asm/io.h>
 #include "pci-sh5.h"
 
-static void __init pci_fixup_ide_bases(struct pci_dev *d)
-{
-        int i;
-
-        /*
-         * PCI IDE controllers use non-standard I/O port decoding, respect it.
-         */
-        if ((d->class >> 8) != PCI_CLASS_STORAGE_IDE)
-                return;
-        printk("PCI: IDE base address fixup for %s\n", pci_name(d));
-        for(i=0; i<4; i++) {
-                struct resource *r = &d->resource[i];
-                if ((r->start & ~0x80) == 0x374) {
-                        r->start |= 2;
-                        r->end = r->start;
-                }
-        }
-}
-DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases);
-
-char * __devinit pcibios_setup(char *str)
-{
-        return str;
-}
-
 static int sh5pci_read(struct pci_bus *bus, unsigned int devfn, int where,
                         int size, u32 *val)
 {
diff --git a/arch/sh/drivers/pci/ops-sh7785lcr.c b/arch/sh/drivers/pci/ops-sh7785lcr.c
deleted file mode 100644
index fb0869f0bef8..000000000000
--- a/arch/sh/drivers/pci/ops-sh7785lcr.c
+++ /dev/null
@@ -1,66 +0,0 @@
-/*
- * Author:  Ian DaSilva (idasilva@mvista.com)
- *
- * Highly leveraged from pci-bigsur.c, written by Dustin McIntire.
- *
- * May be copied or modified under the terms of the GNU General Public
- * License.  See linux/COPYING for more information.
- *
- * PCI initialization for the Renesas R0P7785LC0011RL board
- * Based on arch/sh/drivers/pci/ops-r7780rp.c
- *
- */
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/pci.h>
-#include "pci-sh4.h"
-
-static char irq_tab[] __initdata = {
-        65, 66, 67, 68,
-};
-
-int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
-{
-        return irq_tab[slot];
-}
-
-static struct resource sh7785_io_resource = {
-        .name   = "SH7785_IO",
-        .start  = SH7780_PCI_IO_BASE,
-        .end    = SH7780_PCI_IO_BASE + SH7780_PCI_IO_SIZE - 1,
-        .flags  = IORESOURCE_IO
-};
-
-static struct resource sh7785_mem_resource = {
-        .name   = "SH7785_mem",
-        .start  = SH7780_PCI_MEMORY_BASE,
-        .end    = SH7780_PCI_MEMORY_BASE + SH7780_PCI_MEM_SIZE - 1,
-        .flags  = IORESOURCE_MEM
-};
-
-struct pci_channel board_pci_channels[] = {
-        { &sh4_pci_ops, &sh7785_io_resource, &sh7785_mem_resource, 0, 0xff },
-        { NULL, NULL, NULL, 0, 0 },
-};
-EXPORT_SYMBOL(board_pci_channels);
-
-static struct sh4_pci_address_map sh7785_pci_map = {
-        .window0        = {
-#if defined(CONFIG_32BIT)
-                .base   = SH7780_32BIT_DDR_BASE_ADDR,
-                .size   = 0x40000000,
-#else
-                .base   = SH7780_CS0_BASE_ADDR,
-                .size   = 0x20000000,
-#endif
-        },
-
-        .flags  = SH4_PCIC_NO_RESET,
-};
-
-int __init pcibios_init_platform(void)
-{
-        return sh7780_pcic_init(&sh7785_pci_map);
-}
diff --git a/arch/sh/drivers/pci/ops-snapgear.c b/arch/sh/drivers/pci/ops-snapgear.c
deleted file mode 100644
index 53dd893d4e54..000000000000
--- a/arch/sh/drivers/pci/ops-snapgear.c
+++ /dev/null
@@ -1,94 +0,0 @@
-/*
- * arch/sh/drivers/pci/ops-snapgear.c
- *
- * Author:  David McCullough <davidm@snapgear.com>
- *
- * Ported to new API by Paul Mundt <lethal@linux-sh.org>
- *
- * Highly leveraged from pci-bigsur.c, written by Dustin McIntire.
- *
- * May be copied or modified under the terms of the GNU General Public
- * License.  See linux/COPYING for more information.
- *
- * PCI initialization for the SnapGear boards
- */
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-#include "pci-sh4.h"
-
-#define SNAPGEAR_PCI_IO         0x4000
-#define SNAPGEAR_PCI_MEM        0xfd000000
-
-/* PCI: default LOCAL memory window sizes (seen from PCI bus) */
-#define SNAPGEAR_LSR0_SIZE    (64*(1<<20)) //64MB
-#define SNAPGEAR_LSR1_SIZE    (64*(1<<20)) //64MB
-
-static struct resource sh7751_io_resource = {
-        .name           = "SH7751 IO",
-        .start          = SNAPGEAR_PCI_IO,
-        .end            = SNAPGEAR_PCI_IO + (64*1024) - 1, /* 64KiB I/O */
-        .flags          = IORESOURCE_IO,
-};
-
-static struct resource sh7751_mem_resource = {
-        .name           = "SH7751 mem",
-        .start          = SNAPGEAR_PCI_MEM,
-        .end            = SNAPGEAR_PCI_MEM + (64*1024*1024) - 1, /* 64MiB mem */
-        .flags          = IORESOURCE_MEM,
-};
-
-struct pci_channel board_pci_channels[] = {
-        { &sh4_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff },
-        { 0, }
-};
-
-static struct sh4_pci_address_map sh7751_pci_map = {
-        .window0        = {
-                .base   = SH7751_CS2_BASE_ADDR,
-                .size   = SNAPGEAR_LSR0_SIZE,
-        },
-
-        .window1        = {
-                .base   = SH7751_CS2_BASE_ADDR,
-                .size   = SNAPGEAR_LSR1_SIZE,
-        },
-
-        .flags  = SH4_PCIC_NO_RESET,
-};
-
-/*
- * Initialize the SnapGear PCI interface
- * Setup hardware to be Central Funtion
- * Copy the BSR regs to the PCI interface
- * Setup PCI windows into local RAM
- */
-int __init pcibios_init_platform(void)
-{
-        return sh7751_pcic_init(&sh7751_pci_map);
-}
-
-int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
-{
-        int irq = -1;
-
-        switch (slot) {
-        case 8:  /* the PCI bridge */ break;
-        case 11: irq = 8;  break; /* USB    */
-        case 12: irq = 11; break; /* PCMCIA */
-        case 13: irq = 5;  break; /* eth0   */
-        case 14: irq = 8;  break; /* eth1   */
-        case 15: irq = 11; break; /* safenet (unused) */
-        }
-
-        printk("PCI: Mapping SnapGear IRQ for slot %d, pin %c to irq %d\n",
-               slot, pin - 1 + 'A', irq);
-
-        return irq;
-}
-
-void __init pcibios_fixup(void)
-{
-        /* Nothing to fixup .. */
-}
diff --git a/arch/sh/drivers/pci/pci-auto.c b/arch/sh/drivers/pci/pci-auto.c
deleted file mode 100644
index cf48b12ee58c..000000000000
--- a/arch/sh/drivers/pci/pci-auto.c
+++ /dev/null
@@ -1,545 +0,0 @@
-/*
- * PCI autoconfiguration library
- *
- * Author: Matt Porter <mporter@mvista.com>
- *
- * Copyright 2000, 2001 MontaVista Software Inc.
- * Copyright 2001 Bradley D. LaRonde <brad@ltc.com>
- * Copyright 2003 Paul Mundt <lethal@linux-sh.org>
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- */
-
-/*
- * Modified for MIPS by Jun Sun, jsun@mvista.com
- *
- * . Simplify the interface between pci_auto and the rest: a single function.
- * . Assign resources from low address to upper address.
- * . change most int to u32.
- *
- * Further modified to include it as mips generic code, ppopov@mvista.com.
- *
- * 2001-10-26  Bradley D. LaRonde <brad@ltc.com>
- * - Add a top_bus argument to the "early config" functions so that
- *   they can set a fake parent bus pointer to convince the underlying
- *   pci ops to use type 1 configuration for sub busses.
- * - Set bridge base and limit registers correctly.
- * - Align io and memory base properly before and after bridge setup.
- * - Don't fall through to pci_setup_bars for bridge.
- * - Reformat the debug output to look more like lspci's output.
- *
- * Cloned for SuperH by M. R. Brown, mrbrown@0xd6.org
- *
- * 2003-08-05  Paul Mundt <lethal@linux-sh.org>
- * - Don't update the BAR values on systems that already have valid addresses
- *   and don't want these updated for whatever reason, by way of a new config
- *   option check. However, we still read in the old BAR values so that they
- *   can still be reported through the debug output.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/types.h>
-#include <linux/pci.h>
-
-#define DEBUG
-#ifdef  DEBUG
-#define DBG(x...)       printk(x)
-#else
-#define DBG(x...)
-#endif
-
-/*
- * These functions are used early on before PCI scanning is done
- * and all of the pci_dev and pci_bus structures have been created.
- */
-static struct pci_dev *fake_pci_dev(struct pci_channel *hose,
-        int top_bus, int busnr, int devfn)
-{
-        static struct pci_dev dev;
-        static struct pci_bus bus;
-
-        dev.bus = &bus;
-        dev.sysdata = hose;
-        dev.devfn = devfn;
-        bus.number = busnr;
-        bus.ops = hose->pci_ops;
-
-        if(busnr != top_bus)
-                /* Fake a parent bus structure. */
-                bus.parent = &bus;
-        else
-                bus.parent = NULL;
-
-        return &dev;
-}
-
-#define EARLY_PCI_OP(rw, size, type)                                    \
-static int early_##rw##_config_##size(struct pci_channel *hose,         \
-        int top_bus, int bus, int devfn, int offset, type value)        \
-{                                                                       \
-        return pci_##rw##_config_##size(                                \
-                fake_pci_dev(hose, top_bus, bus, devfn),                \
-                offset, value);                                         \
-}
-
-EARLY_PCI_OP(read, byte, u8 *)
-EARLY_PCI_OP(read, word, u16 *)
-EARLY_PCI_OP(read, dword, u32 *)
-EARLY_PCI_OP(write, byte, u8)
-EARLY_PCI_OP(write, word, u16)
-EARLY_PCI_OP(write, dword, u32)
-
-static struct resource *io_resource_inuse;
-static struct resource *mem_resource_inuse;
-
-static u32 pciauto_lower_iospc;
-static u32 pciauto_upper_iospc;
-
-static u32 pciauto_lower_memspc;
-static u32 pciauto_upper_memspc;
-
-static void __init
-pciauto_setup_bars(struct pci_channel *hose,
-                   int top_bus,
-                   int current_bus,
-                   int pci_devfn,
-                   int bar_limit)
-{
-        u32 bar_response, bar_size, bar_value;
-        u32 bar, addr_mask, bar_nr = 0;
-        u32 * upper_limit;
-        u32 * lower_limit;
-        int found_mem64 = 0;
-
-        for (bar = PCI_BASE_ADDRESS_0; bar <= bar_limit; bar+=4) {
-                u32 bar_addr;
-
-                /* Read the old BAR value */
-                early_read_config_dword(hose, top_bus,
-                                        current_bus,
-                                        pci_devfn,
-                                        bar,
-                                        &bar_addr);
-
-                /* Tickle the BAR and get the response */
-                early_write_config_dword(hose, top_bus,
-                                         current_bus,
-                                         pci_devfn,
-                                         bar,
-                                         0xffffffff);
-
-                early_read_config_dword(hose, top_bus,
-                                        current_bus,
-                                        pci_devfn,
-                                        bar,
-                                        &bar_response);
-
-                /*
-                 * Write the old BAR value back out, only update the BAR
-                 * if we implicitly want resources to be updated, which
-                 * is done by the generic code further down. -- PFM.
-                 */
-                early_write_config_dword(hose, top_bus,
-                                         current_bus,
-                                         pci_devfn,
-                                         bar,
-                                         bar_addr);
-
-                /* If BAR is not implemented go to the next BAR */
-                if (!bar_response)
-                        continue;
-
-                /*
-                 * Workaround for a BAR that doesn't use its upper word,
-                 * like the ALi 1535D+ PCI DC-97 Controller Modem (M5457).
-                 * bdl <brad@ltc.com>
-                 */
-                if (!(bar_response & 0xffff0000))
-                        bar_response |= 0xffff0000;
-
-retry:
-                /* Check the BAR type and set our address mask */
-                if (bar_response & PCI_BASE_ADDRESS_SPACE) {
-                        addr_mask = PCI_BASE_ADDRESS_IO_MASK;
-                        upper_limit = &pciauto_upper_iospc;
-                        lower_limit = &pciauto_lower_iospc;
-                        DBG("        I/O");
-                } else {
-                        if ((bar_response & PCI_BASE_ADDRESS_MEM_TYPE_MASK) ==
-                            PCI_BASE_ADDRESS_MEM_TYPE_64)
-                                found_mem64 = 1;
-
-                        addr_mask = PCI_BASE_ADDRESS_MEM_MASK;
-                        upper_limit = &pciauto_upper_memspc;
-                        lower_limit = &pciauto_lower_memspc;
-                        DBG("        Mem");
-                }
-
-
-                /* Calculate requested size */
-                bar_size = ~(bar_response & addr_mask) + 1;
-
-                /* Allocate a base address */
-                bar_value = ((*lower_limit - 1) & ~(bar_size - 1)) + bar_size;
-
-                if ((bar_value + bar_size) > *upper_limit) {
-                        if (bar_response & PCI_BASE_ADDRESS_SPACE) {
-                                if (io_resource_inuse->child) {
-                                        io_resource_inuse =
-                                                io_resource_inuse->child;
-                                        pciauto_lower_iospc =
-                                                io_resource_inuse->start;
-                                        pciauto_upper_iospc =
-                                                io_resource_inuse->end + 1;
-                                        goto retry;
-                                }
-
-                        } else {
-                                if (mem_resource_inuse->child) {
-                                        mem_resource_inuse =
-                                                mem_resource_inuse->child;
-                                        pciauto_lower_memspc =
-                                                mem_resource_inuse->start;
-                                        pciauto_upper_memspc =
-                                                mem_resource_inuse->end + 1;
-                                        goto retry;
-                                }
-                        }
-                        DBG(" unavailable -- skipping, value %x size %x\n",
-                                        bar_value, bar_size);
-                        continue;
-                }
-
-                if (bar_value < *lower_limit || (bar_value + bar_size) >= *upper_limit) {
-                        DBG(" unavailable -- skipping, value %x size %x\n",
-                                        bar_value, bar_size);
-                        continue;
-                }
-
-#ifdef CONFIG_PCI_AUTO_UPDATE_RESOURCES
-                /* Write it out and update our limit */
-                early_write_config_dword(hose, top_bus, current_bus, pci_devfn,
-                                         bar, bar_value);
-#endif
-
-                *lower_limit = bar_value + bar_size;
-
-                /*
-                 * If we are a 64-bit decoder then increment to the
-                 * upper 32 bits of the bar and force it to locate
-                 * in the lower 4GB of memory.
-                 */
-                if (found_mem64) {
-                        bar += 4;
-                        early_write_config_dword(hose, top_bus,
-                                                 current_bus,
-                                                 pci_devfn,
-                                                 bar,
-                                                 0x00000000);
-                }
-
-                DBG(" at 0x%.8x [size=0x%x]\n", bar_value, bar_size);
-
-                bar_nr++;
-        }
-
-}
-
-static void __init
-pciauto_prescan_setup_bridge(struct pci_channel *hose,
-                             int top_bus,
-                             int current_bus,
-                             int pci_devfn,
-                             int sub_bus)
-{
-        /* Configure bus number registers */
-        early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
-                                PCI_PRIMARY_BUS, current_bus);
-        early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
-                                PCI_SECONDARY_BUS, sub_bus + 1);
-        early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
-                                PCI_SUBORDINATE_BUS, 0xff);
-
-        /* Align memory and I/O to 1MB and 4KB boundaries. */
-        pciauto_lower_memspc = (pciauto_lower_memspc + (0x100000 - 1))
-                & ~(0x100000 - 1);
-        pciauto_lower_iospc = (pciauto_lower_iospc + (0x1000 - 1))
-                & ~(0x1000 - 1);
-
-        /* Set base (lower limit) of address range behind bridge. */
-        early_write_config_word(hose, top_bus, current_bus, pci_devfn,
-                PCI_MEMORY_BASE, pciauto_lower_memspc >> 16);
-        early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
-                PCI_IO_BASE, (pciauto_lower_iospc & 0x0000f000) >> 8);
-        early_write_config_word(hose, top_bus, current_bus, pci_devfn,
-                PCI_IO_BASE_UPPER16, pciauto_lower_iospc >> 16);
-
-        /* We don't support prefetchable memory for now, so disable */
-        early_write_config_word(hose, top_bus, current_bus, pci_devfn,
-                                PCI_PREF_MEMORY_BASE, 0);
-        early_write_config_word(hose, top_bus, current_bus, pci_devfn,
-                                PCI_PREF_MEMORY_LIMIT, 0);
-}
-
-static void __init
-pciauto_postscan_setup_bridge(struct pci_channel *hose,
-                              int top_bus,
-                              int current_bus,
-                              int pci_devfn,
-                              int sub_bus)
-{
-        u32 temp;
-
-        /*
-         * [jsun] we always bump up baselines a little, so that if there
-         * nothing behind P2P bridge, we don't wind up overlapping IO/MEM
-         * spaces.
-         */
-        pciauto_lower_memspc += 1;
-        pciauto_lower_iospc += 1;
-
-        /* Configure bus number registers */
-        early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
-                                PCI_SUBORDINATE_BUS, sub_bus);
-
-        /* Set upper limit of address range behind bridge. */
-        early_write_config_word(hose, top_bus, current_bus, pci_devfn,
-                PCI_MEMORY_LIMIT, pciauto_lower_memspc >> 16);
-        early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
-                PCI_IO_LIMIT, (pciauto_lower_iospc & 0x0000f000) >> 8);
-        early_write_config_word(hose, top_bus, current_bus, pci_devfn,
-                PCI_IO_LIMIT_UPPER16, pciauto_lower_iospc >> 16);
-
-        /* Align memory and I/O to 1MB and 4KB boundaries. */
-        pciauto_lower_memspc = (pciauto_lower_memspc + (0x100000 - 1))
-                & ~(0x100000 - 1);
-        pciauto_lower_iospc = (pciauto_lower_iospc + (0x1000 - 1))
-                & ~(0x1000 - 1);
-
-        /* Enable memory and I/O accesses, enable bus master */
-        early_read_config_dword(hose, top_bus, current_bus, pci_devfn,
-                PCI_COMMAND, &temp);
-        early_write_config_dword(hose, top_bus, current_bus, pci_devfn,
-                PCI_COMMAND, temp | PCI_COMMAND_IO | PCI_COMMAND_MEMORY
-                | PCI_COMMAND_MASTER);
-}
-
-static void __init
-pciauto_prescan_setup_cardbus_bridge(struct pci_channel *hose,
-                        int top_bus,
-                        int current_bus,
-                        int pci_devfn,
-                        int sub_bus)
-{
-        /* Configure bus number registers */
-        early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
-                                PCI_PRIMARY_BUS, current_bus);
-        early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
-                                PCI_SECONDARY_BUS, sub_bus + 1);
-        early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
-                                PCI_SUBORDINATE_BUS, 0xff);
-
-        /* Align memory and I/O to 4KB and 4 byte boundaries. */
-        pciauto_lower_memspc = (pciauto_lower_memspc + (0x1000 - 1))
-                & ~(0x1000 - 1);
-        pciauto_lower_iospc = (pciauto_lower_iospc + (0x4 - 1))
-                & ~(0x4 - 1);
-
-        early_write_config_dword(hose, top_bus, current_bus, pci_devfn,
-                PCI_CB_MEMORY_BASE_0, pciauto_lower_memspc);
-        early_write_config_dword(hose, top_bus, current_bus, pci_devfn,
-                PCI_CB_IO_BASE_0, pciauto_lower_iospc);
-}
-
-static void __init
-pciauto_postscan_setup_cardbus_bridge(struct pci_channel *hose,
-                        int top_bus,
-                        int current_bus,
-                        int pci_devfn,
-                        int sub_bus)
-{
-        u32 temp;
-
-        /*
-         * [jsun] we always bump up baselines a little, so that if there
-         * nothing behind P2P bridge, we don't wind up overlapping IO/MEM
-         * spaces.
-         */
-        pciauto_lower_memspc += 1;
-        pciauto_lower_iospc += 1;
-
-        /*
-         * Configure subordinate bus number.  The PCI subsystem
-         * bus scan will renumber buses (reserving three additional
-         * for this PCI<->CardBus bridge for the case where a CardBus
-         * adapter contains a P2P or CB2CB bridge.
-         */
-
-        early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
-                                PCI_SUBORDINATE_BUS, sub_bus);
-
-        /*
-         * Reserve an additional 4MB for mem space and 16KB for
-         * I/O space.  This should cover any additional space
-         * requirement of unusual CardBus devices with
-         * additional bridges that can consume more address space.
-         *
-         * Although pcmcia-cs currently will reprogram bridge
-         * windows, the goal is to add an option to leave them
-         * alone and use the bridge window ranges as the regions
-         * that are searched for free resources upon hot-insertion
-         * of a device.  This will allow a PCI<->CardBus bridge
-         * configured by this routine to happily live behind a
-         * P2P bridge in a system.
-         */
-        /* Align memory and I/O to 4KB and 4 byte boundaries. */
-        pciauto_lower_memspc = (pciauto_lower_memspc + (0x1000 - 1))
-                & ~(0x1000 - 1);
-        pciauto_lower_iospc = (pciauto_lower_iospc + (0x4 - 1))
-                & ~(0x4 - 1);
-        /* Set up memory and I/O filter limits, assume 32-bit I/O space */
-        early_write_config_dword(hose, top_bus, current_bus, pci_devfn,
-                PCI_CB_MEMORY_LIMIT_0, pciauto_lower_memspc - 1);
-        early_write_config_dword(hose, top_bus, current_bus, pci_devfn,
-                PCI_CB_IO_LIMIT_0, pciauto_lower_iospc - 1);
-
-        /* Enable memory and I/O accesses, enable bus master */
-        early_read_config_dword(hose, top_bus, current_bus, pci_devfn,
-                PCI_COMMAND, &temp);
-        early_write_config_dword(hose, top_bus, current_bus, pci_devfn,
-                PCI_COMMAND, temp | PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
-                PCI_COMMAND_MASTER);
-}
-
-#define PCIAUTO_IDE_MODE_MASK           0x05
-
-static int __init
-pciauto_bus_scan(struct pci_channel *hose, int top_bus, int current_bus)
-{
-        int sub_bus;
-        u32 pci_devfn, pci_class, cmdstat, found_multi=0;
-        unsigned short vid, did;
-        unsigned char header_type;
-        int devfn_start = 0;
-        int devfn_stop = 0xff;
-
-        sub_bus = current_bus;
-
-        if (hose->first_devfn)
-                devfn_start = hose->first_devfn;
-        if (hose->last_devfn)
-                devfn_stop = hose->last_devfn;
-
-        for (pci_devfn=devfn_start; pci_devfn<devfn_stop; pci_devfn++) {
-
-                if (PCI_FUNC(pci_devfn) && !found_multi)
-                        continue;
-
-                early_read_config_word(hose, top_bus, current_bus, pci_devfn,
-                                       PCI_VENDOR_ID, &vid);
-
-                if (vid == 0xffff) continue;
-
-                early_read_config_byte(hose, top_bus, current_bus, pci_devfn,
-                                       PCI_HEADER_TYPE, &header_type);
-
-                if (!PCI_FUNC(pci_devfn))
-                        found_multi = header_type & 0x80;
-
-                early_read_config_word(hose, top_bus, current_bus, pci_devfn,
-                                       PCI_DEVICE_ID, &did);
-
-                early_read_config_dword(hose, top_bus, current_bus, pci_devfn,
-                                        PCI_CLASS_REVISION, &pci_class);
-
-                DBG("%.2x:%.2x.%x Class %.4x: %.4x:%.4x",
-                        current_bus, PCI_SLOT(pci_devfn), PCI_FUNC(pci_devfn),
-                        pci_class >> 16, vid, did);
-                if (pci_class & 0xff)
-                        DBG(" (rev %.2x)", pci_class & 0xff);
-                DBG("\n");
-
-                if ((pci_class >> 16) == PCI_CLASS_BRIDGE_PCI) {
-                        DBG("        Bridge: primary=%.2x, secondary=%.2x\n",
-                                current_bus, sub_bus + 1);
-                        pciauto_prescan_setup_bridge(hose, top_bus, current_bus,
-                                                     pci_devfn, sub_bus);
-                        DBG("Scanning sub bus %.2x, I/O 0x%.8x, Mem 0x%.8x\n",
-                                sub_bus + 1,
-                                pciauto_lower_iospc, pciauto_lower_memspc);
-                        sub_bus = pciauto_bus_scan(hose, top_bus, sub_bus+1);
-                        DBG("Back to bus %.2x\n", current_bus);
-                        pciauto_postscan_setup_bridge(hose, top_bus, current_bus,
-                                                        pci_devfn, sub_bus);
-                        continue;
-                } else if ((pci_class >> 16) == PCI_CLASS_BRIDGE_CARDBUS) {
-                        DBG("  CARDBUS  Bridge: primary=%.2x, secondary=%.2x\n",
-                                current_bus, sub_bus + 1);
-                        DBG("PCI Autoconfig: Found CardBus bridge, device %d function %d\n", PCI_SLOT(pci_devfn), PCI_FUNC(pci_devfn));
-                        /* Place CardBus Socket/ExCA registers */
-                        pciauto_setup_bars(hose, top_bus, current_bus, pci_devfn, PCI_BASE_ADDRESS_0);
-
-                        pciauto_prescan_setup_cardbus_bridge(hose, top_bus,
-                                        current_bus, pci_devfn, sub_bus);
-
-                        DBG("Scanning sub bus %.2x, I/O 0x%.8x, Mem 0x%.8x\n",
-                                sub_bus + 1,
-                                pciauto_lower_iospc, pciauto_lower_memspc);
-                        sub_bus = pciauto_bus_scan(hose, top_bus, sub_bus+1);
-                        DBG("Back to bus %.2x, sub_bus is %x\n", current_bus, sub_bus);
-                        pciauto_postscan_setup_cardbus_bridge(hose, top_bus,
-                                        current_bus, pci_devfn, sub_bus);
-                        continue;
-                } else if ((pci_class >> 16) == PCI_CLASS_STORAGE_IDE) {
-
-                        unsigned char prg_iface;
-
-                        early_read_config_byte(hose, top_bus, current_bus,
-                                pci_devfn, PCI_CLASS_PROG, &prg_iface);
-                        if (!(prg_iface & PCIAUTO_IDE_MODE_MASK)) {
-                                DBG("Skipping legacy mode IDE controller\n");
-                                continue;
-                        }
-                }
-
-                /*
-                 * Found a peripheral, enable some standard
-                 * settings
-                 */
-                early_read_config_dword(hose, top_bus, current_bus, pci_devfn,
-                                        PCI_COMMAND, &cmdstat);
-                early_write_config_dword(hose, top_bus, current_bus, pci_devfn,
-                                         PCI_COMMAND, cmdstat | PCI_COMMAND_IO |
-                                         PCI_COMMAND_MEMORY |
-                                         PCI_COMMAND_MASTER);
-                early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
-                                        PCI_LATENCY_TIMER, 0x80);
-
-                /* Allocate PCI I/O and/or memory space */
-                pciauto_setup_bars(hose, top_bus, current_bus, pci_devfn, PCI_BASE_ADDRESS_5);
-        }
-        return sub_bus;
-}
-
-int __init
-pciauto_assign_resources(int busno, struct pci_channel *hose)
-{
-        /* setup resource limits */
-        io_resource_inuse = hose->io_resource;
-        mem_resource_inuse = hose->mem_resource;
-
-        pciauto_lower_iospc = io_resource_inuse->start;
-        pciauto_upper_iospc = io_resource_inuse->end + 1;
-        pciauto_lower_memspc = mem_resource_inuse->start;
-        pciauto_upper_memspc = mem_resource_inuse->end + 1;
-        DBG("Autoconfig PCI channel 0x%p\n", hose);
-        DBG("Scanning bus %.2x, I/O 0x%.8x:0x%.8x, Mem 0x%.8x:0x%.8x\n",
-                busno, pciauto_lower_iospc, pciauto_upper_iospc, 
-                pciauto_lower_memspc, pciauto_upper_memspc);
-
-        return pciauto_bus_scan(hose, busno, busno);
-}
diff --git a/arch/sh/drivers/pci/pci-dreamcast.c b/arch/sh/drivers/pci/pci-dreamcast.c
new file mode 100644
index 000000000000..210f9d4af141
--- /dev/null
+++ b/arch/sh/drivers/pci/pci-dreamcast.c
@@ -0,0 +1,102 @@
+/*
+ * PCI support for the Sega Dreamcast
+ *
+ * Copyright (C) 2001, 2002  M. R. Brown
+ * Copyright (C) 2002, 2003  Paul Mundt
+ *
+ * This file originally bore the message (with enclosed-$):
+ *      Id: pci.c,v 1.3 2003/05/04 19:29:46 lethal Exp
+ *      Dreamcast PCI: Supports SEGA Broadband Adaptor only.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/sched.h>
+#include <linux/kernel.h>
+#include <linux/param.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/pci.h>
+#include <linux/module.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <mach/pci.h>
+
+static struct resource gapspci_io_resource = {
+        .name   = "GAPSPCI IO",
+        .start  = GAPSPCI_BBA_CONFIG,
+        .end    = GAPSPCI_BBA_CONFIG + GAPSPCI_BBA_CONFIG_SIZE - 1,
+        .flags  = IORESOURCE_IO,
+};
+
+static struct resource gapspci_mem_resource = {
+        .name   = "GAPSPCI mem",
+        .start  = GAPSPCI_DMA_BASE,
+        .end    = GAPSPCI_DMA_BASE + GAPSPCI_DMA_SIZE - 1,
+        .flags  = IORESOURCE_MEM,
+};
+
+static struct pci_channel dreamcast_pci_controller = {
+        .pci_ops        = &gapspci_pci_ops,
+        .io_resource    = &gapspci_io_resource,
+        .io_offset      = 0x00000000,
+        .mem_resource   = &gapspci_mem_resource,
+        .mem_offset     = 0x00000000,
+};
+
+/*
+ * gapspci init
+ */
+
+static int __init gapspci_init(void)
+{
+        char idbuf[16];
+        int i;
+
+        /*
+         * FIXME: All of this wants documenting to some degree,
+         * even some basic register definitions would be nice.
+         *
+         * I haven't seen anything this ugly since.. maple.
+         */
+
+        for (i=0; i<16; i++)
+                idbuf[i] = inb(GAPSPCI_REGS+i);
+
+        if (strncmp(idbuf, "GAPSPCI_BRIDGE_2", 16))
+                return -ENODEV;
+
+        outl(0x5a14a501, GAPSPCI_REGS+0x18);
+
+        for (i=0; i<1000000; i++)
+                cpu_relax();
+
+        if (inl(GAPSPCI_REGS+0x18) != 1)
+                return -EINVAL;
+
+        outl(0x01000000, GAPSPCI_REGS+0x20);
+        outl(0x01000000, GAPSPCI_REGS+0x24);
+
+        outl(GAPSPCI_DMA_BASE, GAPSPCI_REGS+0x28);
+        outl(GAPSPCI_DMA_BASE+GAPSPCI_DMA_SIZE, GAPSPCI_REGS+0x2c);
+
+        outl(1, GAPSPCI_REGS+0x14);
+        outl(1, GAPSPCI_REGS+0x34);
+
+        /* Setting Broadband Adapter */
+        outw(0xf900, GAPSPCI_BBA_CONFIG+0x06);
+        outl(0x00000000, GAPSPCI_BBA_CONFIG+0x30);
+        outb(0x00, GAPSPCI_BBA_CONFIG+0x3c);
+        outb(0xf0, GAPSPCI_BBA_CONFIG+0x0d);
+        outw(0x0006, GAPSPCI_BBA_CONFIG+0x04);
+        outl(0x00002001, GAPSPCI_BBA_CONFIG+0x10);
+        outl(0x01000000, GAPSPCI_BBA_CONFIG+0x14);
+
+        register_pci_controller(&dreamcast_pci_controller);
+
+        return 0;
+}
+arch_initcall(gapspci_init);
diff --git a/arch/sh/drivers/pci/pci-sh4.h b/arch/sh/drivers/pci/pci-sh4.h
index a83dcf70c13b..3d5296cde622 100644
--- a/arch/sh/drivers/pci/pci-sh4.h
+++ b/arch/sh/drivers/pci/pci-sh4.h
@@ -149,13 +149,10 @@
   #define SH4_PCIPDTR_PB0         0x000000001   /* Port 0 Enable */
 #define SH4_PCIPDR              0x220           /* Port IO Data Register */
 
-/* Flags */
-#define SH4_PCIC_NO_RESET       0x0001
-
 /* arch/sh/kernel/drivers/pci/ops-sh4.c */
 extern struct pci_ops sh4_pci_ops;
-int sh4_pci_check_direct(void);
-int pci_fixup_pcic(void);
+int sh4_pci_check_direct(struct pci_channel *chan);
+int pci_fixup_pcic(struct pci_channel *chan);
 
 struct sh4_pci_address_space {
         unsigned long base;
@@ -165,16 +162,18 @@ struct sh4_pci_address_space {
 struct sh4_pci_address_map {
         struct sh4_pci_address_space window0;
         struct sh4_pci_address_space window1;
-        unsigned long flags;
 };
 
-static inline void pci_write_reg(unsigned long val, unsigned long reg)
+static inline void pci_write_reg(struct pci_channel *chan,
+                                 unsigned long val, unsigned long reg)
 {
-        ctrl_outl(val, PCI_REG(reg));
+        ctrl_outl(val, chan->reg_base + reg);
 }
 
-static inline unsigned long pci_read_reg(unsigned long reg)
+static inline unsigned long pci_read_reg(struct pci_channel *chan,
+                                         unsigned long reg)
 {
-        return ctrl_inl(PCI_REG(reg));
+        return ctrl_inl(chan->reg_base + reg);
 }
+
 #endif /* __PCI_SH4_H */
diff --git a/arch/sh/drivers/pci/pci-sh5.c b/arch/sh/drivers/pci/pci-sh5.c
index 7a97438762c8..873ed2b44055 100644
--- a/arch/sh/drivers/pci/pci-sh5.c
+++ b/arch/sh/drivers/pci/pci-sh5.c
@@ -89,8 +89,21 @@ static irqreturn_t pcish5_serr_irq(int irq, void *dev_id)
         return IRQ_NONE;
 }
 
-int __init sh5pci_init(unsigned long memStart, unsigned long memSize)
+static struct resource sh5_io_resource = { /* place holder */ };
+static struct resource sh5_mem_resource = { /* place holder */ };
+
+static struct pci_channel sh5pci_controller = {
+        .pci_ops                = &sh5_pci_ops,
+        .mem_resource           = &sh5_mem_resource,
+        .mem_offset             = 0x00000000,
+        .io_resource            = &sh5_io_resource,
+        .io_offset              = 0x00000000,
+};
+
+static int __init sh5pci_init(void)
 {
+        unsigned long memStart = __pa(memory_start);
+        unsigned long memSize = __pa(memory_end) - memStart;
         u32 lsr0;
         u32 uval;
 
@@ -106,12 +119,12 @@ int __init sh5pci_init(unsigned long memStart, unsigned long memSize)
                 return -EINVAL;
         }
 
-        pcicr_virt = onchip_remap(SH5PCI_ICR_BASE, 1024, "PCICR");
+        pcicr_virt = (unsigned long)ioremap_nocache(SH5PCI_ICR_BASE, 1024);
         if (!pcicr_virt) {
                 panic("Unable to remap PCICR\n");
         }
 
-        PCI_IO_AREA = onchip_remap(SH5PCI_IO_BASE, 0x10000, "PCIIO");
+        PCI_IO_AREA = (unsigned long)ioremap_nocache(SH5PCI_IO_BASE, 0x10000);
         if (!PCI_IO_AREA) {
                 panic("Unable to remap PCIIO\n");
         }
@@ -197,32 +210,14 @@ int __init sh5pci_init(unsigned long memStart, unsigned long memSize)
         SH5PCI_WRITE(AINTM, ~0);
         SH5PCI_WRITE(PINTM, ~0);
 
-        return 0;
-}
+        sh5_io_resource.start = PCI_IO_AREA;
+        sh5_io_resource.end = PCI_IO_AREA + 0x10000;
 
-void __devinit pcibios_fixup_bus(struct pci_bus *bus)
-{
-        struct pci_dev *dev = bus->self;
-        int i;
-
-        if (dev) {
-                for (i= 0; i < 3; i++) {
-                        bus->resource[i] =
-                                &dev->resource[PCI_BRIDGE_RESOURCES+i];
-                        bus->resource[i]->name = bus->name;
-                }
-                bus->resource[0]->flags |= IORESOURCE_IO;
-                bus->resource[1]->flags |= IORESOURCE_MEM;
-
-                /* For now, propagate host limits to the bus;
-                 * we'll adjust them later. */
-                bus->resource[0]->end = 64*1024 - 1 ;
-                bus->resource[1]->end = PCIBIOS_MIN_MEM+(256*1024*1024)-1;
-                bus->resource[0]->start = PCIBIOS_MIN_IO;
-                bus->resource[1]->start = PCIBIOS_MIN_MEM;
-
-                /* Turn off downstream PF memory address range by default */
-                bus->resource[2]->start = 1024*1024;
-                bus->resource[2]->end = bus->resource[2]->start - 1;
-        }
+        sh5_mem_resource.start = memStart;
+        sh5_mem_resource.end = memStart + memSize;
+
+        register_pci_controller(&sh5pci_controller);
+
+        return 0;
 }
+arch_initcall(sh5pci_init);
diff --git a/arch/sh/drivers/pci/pci-sh5.h b/arch/sh/drivers/pci/pci-sh5.h
index 7cff3fc04d30..f277628221f3 100644
--- a/arch/sh/drivers/pci/pci-sh5.h
+++ b/arch/sh/drivers/pci/pci-sh5.h
@@ -107,7 +107,4 @@ extern unsigned long pcicr_virt;
 
 extern struct pci_ops sh5_pci_ops;
 
-/* arch/sh/drivers/pci/pci-sh5.c */
-int sh5pci_init(unsigned long memStart, unsigned long memSize);
-
 #endif /* __PCI_SH5_H */
diff --git a/arch/sh/drivers/pci/pci-sh7751.c b/arch/sh/drivers/pci/pci-sh7751.c
index 3065eb184f01..70c1999a0ec4 100644
--- a/arch/sh/drivers/pci/pci-sh7751.c
+++ b/arch/sh/drivers/pci/pci-sh7751.c
@@ -1,88 +1,100 @@
 /*
- *      Low-Level PCI Support for the SH7751
+ * Low-Level PCI Support for the SH7751
  *
- *  Dustin McIntire (dustin@sensoria.com)
- *      Derived from arch/i386/kernel/pci-*.c which bore the message:
- *      (c) 1999--2000 Martin Mares <mj@ucw.cz>
+ *  Copyright (C) 2003 - 2009  Paul Mundt
+ *  Copyright (C) 2001  Dustin McIntire
  *
- *  Ported to the new API by Paul Mundt <lethal@linux-sh.org>
- *  With cleanup by Paul van Gool <pvangool@mimotech.com>
- *
- *  May be copied or modified under the terms of the GNU General Public
- *  License.  See linux/COPYING for more information.
+ *  With cleanup by Paul van Gool <pvangool@mimotech.com>, 2003.
  *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
  */
-#undef DEBUG
-
 #include <linux/init.h>
 #include <linux/pci.h>
 #include <linux/types.h>
 #include <linux/errno.h>
-#include <linux/delay.h>
+#include <linux/io.h>
 #include "pci-sh4.h"
 #include <asm/addrspace.h>
-#include <asm/io.h>
 
-/*
- * Initialization. Try all known PCI access methods. Note that we support
- * using both PCI BIOS and direct access: in such cases, we use I/O ports
- * to access config space.
- *
- * Note that the platform specific initialization (BSC registers, and memory
- * space mapping) will be called via the platform defined function
- * pcibios_init_platform().
- */
-static int __init sh7751_pci_init(void)
+static int __init __area_sdram_check(struct pci_channel *chan,
+                                     unsigned int area)
 {
-        unsigned int id;
-        int ret;
-
-        pr_debug("PCI: Starting intialization.\n");
+        unsigned long word;
 
-        /* check for SH7751/SH7751R hardware */
-        id = pci_read_reg(SH7751_PCICONF0);
-        if (id != ((SH7751_DEVICE_ID << 16) | SH7751_VENDOR_ID) &&
-            id != ((SH7751R_DEVICE_ID << 16) | SH7751_VENDOR_ID)) {
-                pr_debug("PCI: This is not an SH7751(R) (%x)\n", id);
-                return -ENODEV;
-        }
-
-        if ((ret = sh4_pci_check_direct()) != 0)
-                return ret;
-
-        return pcibios_init_platform();
-}
-subsys_initcall(sh7751_pci_init);
-
-static int __init __area_sdram_check(unsigned int area)
-{
-        u32 word;
-
-        word = ctrl_inl(SH7751_BCR1);
+        word = __raw_readl(SH7751_BCR1);
         /* check BCR for SDRAM in area */
         if (((word >> area) & 1) == 0) {
-                printk("PCI: Area %d is not configured for SDRAM. BCR1=0x%x\n",
+                printk("PCI: Area %d is not configured for SDRAM. BCR1=0x%lx\n",
                        area, word);
                 return 0;
         }
-        pci_write_reg(word, SH4_PCIBCR1);
+        pci_write_reg(chan, word, SH4_PCIBCR1);
 
-        word = (u16)ctrl_inw(SH7751_BCR2);
+        word = __raw_readw(SH7751_BCR2);
         /* check BCR2 for 32bit SDRAM interface*/
         if (((word >> (area << 1)) & 0x3) != 0x3) {
-                printk("PCI: Area %d is not 32 bit SDRAM. BCR2=0x%x\n",
+                printk("PCI: Area %d is not 32 bit SDRAM. BCR2=0x%lx\n",
                        area, word);
                 return 0;
         }
-        pci_write_reg(word, SH4_PCIBCR2);
+        pci_write_reg(chan, word, SH4_PCIBCR2);
 
         return 1;
 }
 
-int __init sh7751_pcic_init(struct sh4_pci_address_map *map)
+static struct resource sh7751_io_resource = {
+        .name   = "SH7751_IO",
+        .start  = SH7751_PCI_IO_BASE,
+        .end    = SH7751_PCI_IO_BASE + SH7751_PCI_IO_SIZE - 1,
+        .flags  = IORESOURCE_IO
+};
+
+static struct resource sh7751_mem_resource = {
+        .name   = "SH7751_mem",
+        .start  = SH7751_PCI_MEMORY_BASE,
+        .end    = SH7751_PCI_MEMORY_BASE + SH7751_PCI_MEM_SIZE - 1,
+        .flags  = IORESOURCE_MEM
+};
+
+static struct pci_channel sh7751_pci_controller = {
+        .pci_ops        = &sh4_pci_ops,
+        .mem_resource   = &sh7751_mem_resource,
+        .mem_offset     = 0x00000000,
+        .io_resource    = &sh7751_io_resource,
+        .io_offset      = 0x00000000,
+        .io_map_base    = SH7751_PCI_IO_BASE,
+};
+
+static struct sh4_pci_address_map sh7751_pci_map = {
+        .window0        = {
+                .base   = SH7751_CS3_BASE_ADDR,
+                .size   = 0x04000000,
+        },
+};
+
+static int __init sh7751_pci_init(void)
 {
-        u32 reg;
-        u32 word;
+        struct pci_channel *chan = &sh7751_pci_controller;
+        unsigned int id;
+        u32 word, reg;
+        int ret;
+
+        printk(KERN_NOTICE "PCI: Starting intialization.\n");
+
+        chan->reg_base = 0xfe200000;
+
+        /* check for SH7751/SH7751R hardware */
+        id = pci_read_reg(chan, SH7751_PCICONF0);
+        if (id != ((SH7751_DEVICE_ID << 16) | SH7751_VENDOR_ID) &&
+            id != ((SH7751R_DEVICE_ID << 16) | SH7751_VENDOR_ID)) {
+                pr_debug("PCI: This is not an SH7751(R) (%x)\n", id);
+                return -ENODEV;
+        }
+
+        if ((ret = sh4_pci_check_direct(chan)) != 0)
+                return ret;
 
         /* Set the BCR's to enable PCI access */
         reg = ctrl_inl(SH7751_BCR1);
@@ -90,25 +102,10 @@ int __init sh7751_pcic_init(struct sh4_pci_address_map *map)
         ctrl_outl(reg, SH7751_BCR1);
 
         /* Turn the clocks back on (not done in reset)*/
-        pci_write_reg(0, SH4_PCICLKR);
+        pci_write_reg(chan, 0, SH4_PCICLKR);
         /* Clear Powerdown IRQ's (not done in reset) */
         word = SH4_PCIPINT_D3 | SH4_PCIPINT_D0;
-        pci_write_reg(word, SH4_PCIPINT);
-
-        /*
-         * This code is unused for some boards as it is done in the
-         * bootloader and doing it here means the MAC addresses loaded
-         * by the bootloader get lost.
-         */
-        if (!(map->flags & SH4_PCIC_NO_RESET)) {
-                /* toggle PCI reset pin */
-                word = SH4_PCICR_PREFIX | SH4_PCICR_PRST;
-                pci_write_reg(word, SH4_PCICR);
-                /* Wait for a long time... not 1 sec. but long enough */
-                mdelay(100);
-                word = SH4_PCICR_PREFIX;
-                pci_write_reg(word, SH4_PCICR);
-        }
+        pci_write_reg(chan, word, SH4_PCIPINT);
 
         /* set the command/status bits to:
          * Wait Cycle Control + Parity Enable + Bus Master +
@@ -116,89 +113,75 @@ int __init sh7751_pcic_init(struct sh4_pci_address_map *map)
          */
         word = SH7751_PCICONF1_WCC | SH7751_PCICONF1_PER |
                SH7751_PCICONF1_BUM | SH7751_PCICONF1_MES;
-        pci_write_reg(word, SH7751_PCICONF1);
+        pci_write_reg(chan, word, SH7751_PCICONF1);
 
         /* define this host as the host bridge */
         word = PCI_BASE_CLASS_BRIDGE << 24;
-        pci_write_reg(word, SH7751_PCICONF2);
+        pci_write_reg(chan, word, SH7751_PCICONF2);
 
         /* Set IO and Mem windows to local address
          * Make PCI and local address the same for easy 1 to 1 mapping
-         * Window0 = map->window0.size @ non-cached area base = SDRAM
-         * Window1 = map->window1.size @ cached area base = SDRAM
          */
-        word = map->window0.size - 1;
-        pci_write_reg(word, SH4_PCILSR0);
-        word = map->window1.size - 1;
-        pci_write_reg(word, SH4_PCILSR1);
+        word = sh7751_pci_map.window0.size - 1;
+        pci_write_reg(chan, word, SH4_PCILSR0);
         /* Set the values on window 0 PCI config registers */
-        word = P2SEGADDR(map->window0.base);
-        pci_write_reg(word, SH4_PCILAR0);
-        pci_write_reg(word, SH7751_PCICONF5);
-        /* Set the values on window 1 PCI config registers */
-        word =  PHYSADDR(map->window1.base);
-        pci_write_reg(word, SH4_PCILAR1);
-        pci_write_reg(word, SH7751_PCICONF6);
+        word = P2SEGADDR(sh7751_pci_map.window0.base);
+        pci_write_reg(chan, word, SH4_PCILAR0);
+        pci_write_reg(chan, word, SH7751_PCICONF5);
 
         /* Set the local 16MB PCI memory space window to
          * the lowest PCI mapped address
          */
-        word = PCIBIOS_MIN_MEM & SH4_PCIMBR_MASK;
+        word = chan->mem_resource->start & SH4_PCIMBR_MASK;
         pr_debug("PCI: Setting upper bits of Memory window to 0x%x\n", word);
-        pci_write_reg(word , SH4_PCIMBR);
-
-        /* Map IO space into PCI IO window
-         * The IO window is 64K-PCIBIOS_MIN_IO in size
-         * IO addresses will be translated to the
-         * PCI IO window base address
-         */
-        pr_debug("PCI: Mapping IO address 0x%x - 0x%x to base 0x%x\n",
-                 PCIBIOS_MIN_IO, (64 << 10),
-                 SH7751_PCI_IO_BASE + PCIBIOS_MIN_IO);
+        pci_write_reg(chan, word , SH4_PCIMBR);
 
         /* Make sure the MSB's of IO window are set to access PCI space
          * correctly */
-        word = PCIBIOS_MIN_IO & SH4_PCIIOBR_MASK;
+        word = chan->io_resource->start & SH4_PCIIOBR_MASK;
         pr_debug("PCI: Setting upper bits of IO window to 0x%x\n", word);
-        pci_write_reg(word, SH4_PCIIOBR);
+        pci_write_reg(chan, word, SH4_PCIIOBR);
 
         /* Set PCI WCRx, BCRx's, copy from BSC locations */
 
         /* check BCR for SDRAM in specified area */
-        switch (map->window0.base) {
-        case SH7751_CS0_BASE_ADDR: word = __area_sdram_check(0); break;
-        case SH7751_CS1_BASE_ADDR: word = __area_sdram_check(1); break;
-        case SH7751_CS2_BASE_ADDR: word = __area_sdram_check(2); break;
-        case SH7751_CS3_BASE_ADDR: word = __area_sdram_check(3); break;
-        case SH7751_CS4_BASE_ADDR: word = __area_sdram_check(4); break;
-        case SH7751_CS5_BASE_ADDR: word = __area_sdram_check(5); break;
-        case SH7751_CS6_BASE_ADDR: word = __area_sdram_check(6); break;
+        switch (sh7751_pci_map.window0.base) {
+        case SH7751_CS0_BASE_ADDR: word = __area_sdram_check(chan, 0); break;
+        case SH7751_CS1_BASE_ADDR: word = __area_sdram_check(chan, 1); break;
+        case SH7751_CS2_BASE_ADDR: word = __area_sdram_check(chan, 2); break;
+        case SH7751_CS3_BASE_ADDR: word = __area_sdram_check(chan, 3); break;
+        case SH7751_CS4_BASE_ADDR: word = __area_sdram_check(chan, 4); break;
+        case SH7751_CS5_BASE_ADDR: word = __area_sdram_check(chan, 5); break;
+        case SH7751_CS6_BASE_ADDR: word = __area_sdram_check(chan, 6); break;
         }
 
         if (!word)
-                return 0;
+                return -1;
 
         /* configure the wait control registers */
         word = ctrl_inl(SH7751_WCR1);
-        pci_write_reg(word, SH4_PCIWCR1);
+        pci_write_reg(chan, word, SH4_PCIWCR1);
         word = ctrl_inl(SH7751_WCR2);
-        pci_write_reg(word, SH4_PCIWCR2);
+        pci_write_reg(chan, word, SH4_PCIWCR2);
         word = ctrl_inl(SH7751_WCR3);
-        pci_write_reg(word, SH4_PCIWCR3);
+        pci_write_reg(chan, word, SH4_PCIWCR3);
         word = ctrl_inl(SH7751_MCR);
-        pci_write_reg(word, SH4_PCIMCR);
+        pci_write_reg(chan, word, SH4_PCIMCR);
 
         /* NOTE: I'm ignoring the PCI error IRQs for now..
          * TODO: add support for the internal error interrupts and
          * DMA interrupts...
          */
 
-        pci_fixup_pcic();
+        pci_fixup_pcic(chan);
 
         /* SH7751 init done, set central function init complete */
         /* use round robin mode to stop a device starving/overruning */
         word = SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_ARBM;
-        pci_write_reg(word, SH4_PCICR);
+        pci_write_reg(chan, word, SH4_PCICR);
 
-        return 1;
+        register_pci_controller(chan);
+
+        return 0;
 }
+arch_initcall(sh7751_pci_init);
diff --git a/arch/sh/drivers/pci/pci-sh7751.h b/arch/sh/drivers/pci/pci-sh7751.h
index 68e3cb5e6bec..4983a4d20355 100644
--- a/arch/sh/drivers/pci/pci-sh7751.h
+++ b/arch/sh/drivers/pci/pci-sh7751.h
@@ -26,7 +26,6 @@
 #define SH7751_PCI_IO_SIZE           0x40000     /* Size of IO window */
 
 #define SH7751_PCIREG_BASE           0xFE200000  /* PCI regs base address */
-#define PCI_REG(n)                  (SH7751_PCIREG_BASE+ n)
 
 #define SH7751_PCICONF0            0x0           /* PCI Config Reg 0 */
   #define SH7751_PCICONF0_DEVID      0xFFFF0000  /* Device ID */
@@ -58,7 +57,7 @@
   #define SH7751_PCICONF2_SCC        0x00FF0000  /* Sub-Class Code */
   #define SH7751_PCICONF2_RLPI       0x0000FF00  /* Programming Interface */
   #define SH7751_PCICONF2_REV        0x000000FF  /* Revision ID */
-#define SH7751_PCICONF3            0xC           /* PCI Config Reg 3 */ 
+#define SH7751_PCICONF3            0xC           /* PCI Config Reg 3 */
   #define SH7751_PCICONF3_BIST7      0x80000000  /* Bist Supported */
   #define SH7751_PCICONF3_BIST6      0x40000000  /* Bist Executing */
   #define SH7751_PCICONF3_BIST3_0    0x0F000000  /* Bist Passed */
@@ -73,12 +72,12 @@
   #define SH7751_PCICONF5_BASE       0xFFFFFFF0  /* Mem Space Base Addr */
   #define SH7751_PCICONF5_LAP        0x00000008  /* Prefetch Enabled */
   #define SH7751_PCICONF5_LAT        0x00000006  /* Local Memory type */
-  #define SH7751_PCICONF5_ASI        0x00000001  /* Address Space Type */  
+  #define SH7751_PCICONF5_ASI        0x00000001  /* Address Space Type */
 #define SH7751_PCICONF6            0x18          /* PCI Config Reg 6 */
   #define SH7751_PCICONF6_BASE       0xFFFFFFF0  /* Mem Space Base Addr */
   #define SH7751_PCICONF6_LAP        0x00000008  /* Prefetch Enabled */
   #define SH7751_PCICONF6_LAT        0x00000006  /* Local Memory type */
-  #define SH7751_PCICONF6_ASI        0x00000001  /* Address Space Type */  
+  #define SH7751_PCICONF6_ASI        0x00000001  /* Address Space Type */
 /* PCICONF7 - PCICONF10 are undefined */
 #define SH7751_PCICONF11           0x2C          /* PCI Config Reg 11 */
   #define SH7751_PCICONF11_SSID      0xFFFF0000  /* Subsystem ID */
@@ -127,9 +126,4 @@
 #define SH7751_CS5_BASE_ADDR       (SH7751_CS4_BASE_ADDR + SH7751_MEM_REGION_SIZE)
 #define SH7751_CS6_BASE_ADDR       (SH7751_CS5_BASE_ADDR + SH7751_MEM_REGION_SIZE)
 
-struct sh4_pci_address_map;
-
-/* arch/sh/drivers/pci/pci-sh7751.c */
-int sh7751_pcic_init(struct sh4_pci_address_map *map);
-
 #endif /* _PCI_SH7751_H_ */
diff --git a/arch/sh/drivers/pci/pci-sh7780.c b/arch/sh/drivers/pci/pci-sh7780.c
index bae6a2cf047d..323b92d565fe 100644
--- a/arch/sh/drivers/pci/pci-sh7780.c
+++ b/arch/sh/drivers/pci/pci-sh7780.c
@@ -1,19 +1,12 @@
 /*
- *      Low-Level PCI Support for the SH7780
+ * Low-Level PCI Support for the SH7780
  *
- *  Dustin McIntire (dustin@sensoria.com)
- *      Derived from arch/i386/kernel/pci-*.c which bore the message:
- *      (c) 1999--2000 Martin Mares <mj@ucw.cz>
- *
- *  Ported to the new API by Paul Mundt <lethal@linux-sh.org>
- *  With cleanup by Paul van Gool <pvangool@mimotech.com>
- *
- *  May be copied or modified under the terms of the GNU General Public
- *  License.  See linux/COPYING for more information.
+ *  Copyright (C) 2005 - 2009  Paul Mundt
  *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
  */
-#undef DEBUG
-
 #include <linux/types.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
@@ -22,135 +15,132 @@
 #include <linux/delay.h>
 #include "pci-sh4.h"
 
-#define INTC_BASE       0xffd00000
-#define INTC_ICR0       (INTC_BASE+0x0)
-#define INTC_ICR1       (INTC_BASE+0x1c)
-#define INTC_INTPRI     (INTC_BASE+0x10)
-#define INTC_INTREQ     (INTC_BASE+0x24)
-#define INTC_INTMSK0    (INTC_BASE+0x44)
-#define INTC_INTMSK1    (INTC_BASE+0x48)
-#define INTC_INTMSK2    (INTC_BASE+0x40080)
-#define INTC_INTMSKCLR0 (INTC_BASE+0x64)
-#define INTC_INTMSKCLR1 (INTC_BASE+0x68)
-#define INTC_INTMSKCLR2 (INTC_BASE+0x40084)
-#define INTC_INT2MSKR   (INTC_BASE+0x40038)
-#define INTC_INT2MSKCR  (INTC_BASE+0x4003c)
+static struct resource sh7785_io_resource = {
+        .name   = "SH7785_IO",
+        .start  = SH7780_PCI_IO_BASE,
+        .end    = SH7780_PCI_IO_BASE + SH7780_PCI_IO_SIZE - 1,
+        .flags  = IORESOURCE_IO
+};
+
+static struct resource sh7785_mem_resource = {
+        .name   = "SH7785_mem",
+        .start  = SH7780_PCI_MEMORY_BASE,
+        .end    = SH7780_PCI_MEMORY_BASE + SH7780_PCI_MEM_SIZE - 1,
+        .flags  = IORESOURCE_MEM
+};
+
+static struct pci_channel sh7780_pci_controller = {
+        .pci_ops        = &sh4_pci_ops,
+        .mem_resource   = &sh7785_mem_resource,
+        .mem_offset     = 0x00000000,
+        .io_resource    = &sh7785_io_resource,
+        .io_offset      = 0x00000000,
+        .io_map_base    = SH7780_PCI_IO_BASE,
+};
+
+static struct sh4_pci_address_map sh7780_pci_map = {
+        .window0        = {
+#if defined(CONFIG_32BIT)
+                .base   = SH7780_32BIT_DDR_BASE_ADDR,
+                .size   = 0x40000000,
+#else
+                .base   = SH7780_CS0_BASE_ADDR,
+                .size   = 0x20000000,
+#endif
+        },
+};
 
-/*
- * Initialization. Try all known PCI access methods. Note that we support
- * using both PCI BIOS and direct access: in such cases, we use I/O ports
- * to access config space.
- *
- * Note that the platform specific initialization (BSC registers, and memory
- * space mapping) will be called via the platform defined function
- * pcibios_init_platform().
- */
 static int __init sh7780_pci_init(void)
 {
+        struct pci_channel *chan = &sh7780_pci_controller;
         unsigned int id;
-        int ret, match = 0;
-
-        pr_debug("PCI: Starting intialization.\n");
-
-        ctrl_outl(0x00000001, SH7780_PCI_VCR2); /* Enable PCIC */
-
-        /* check for SH7780/SH7780R hardware */
-        id = pci_read_reg(SH7780_PCIVID);
-        if ((id & 0xffff) == SH7780_VENDOR_ID) {
-                switch ((id >> 16) & 0xffff) {
-                case SH7763_DEVICE_ID:
-                case SH7780_DEVICE_ID:
-                case SH7781_DEVICE_ID:
-                case SH7785_DEVICE_ID:
-                        match = 1;
-                        break;
-                }
-        }
+        const char *type = NULL;
+        int ret;
+        u32 word;
 
-        if (unlikely(!match)) {
-                printk(KERN_ERR "PCI: This is not an SH7780 (%x)\n", id);
+        printk(KERN_NOTICE "PCI: Starting intialization.\n");
+
+        chan->reg_base = 0xfe040000;
+
+        /* Enable CPU access to the PCIC registers. */
+        __raw_writel(PCIECR_ENBL, PCIECR);
+
+        id = __raw_readw(chan->reg_base + SH7780_PCIVID);
+        if (id != SH7780_VENDOR_ID) {
+                printk(KERN_ERR "PCI: Unknown vendor ID 0x%04x.\n", id);
                 return -ENODEV;
         }
 
-        /* Setup the INTC */
-        if (mach_is_7780se()) {
-                /* ICR0: IRL=use separately */
-                ctrl_outl(0x00C00020, INTC_ICR0);
-                /* ICR1: detect low level(for 2ndcut) */
-                ctrl_outl(0xAAAA0000, INTC_ICR1);
-                /* INTPRI: priority=3(all) */
-                ctrl_outl(0x33333333, INTC_INTPRI);
+        id = __raw_readw(chan->reg_base + SH7780_PCIDID);
+        type = (id == SH7763_DEVICE_ID) ? "SH7763" :
+               (id == SH7780_DEVICE_ID) ? "SH7780" :
+               (id == SH7781_DEVICE_ID) ? "SH7781" :
+               (id == SH7785_DEVICE_ID) ? "SH7785" :
+                                          NULL;
+        if (unlikely(!type)) {
+                printk(KERN_ERR "PCI: Found an unsupported Renesas host "
+                       "controller, device id 0x%04x.\n", id);
+                return -EINVAL;
         }
 
-        if ((ret = sh4_pci_check_direct()) != 0)
-                return ret;
+        printk(KERN_NOTICE "PCI: Found a Renesas %s host "
+               "controller, revision %d.\n", type,
+               __raw_readb(chan->reg_base + SH7780_PCIRID));
 
-        return pcibios_init_platform();
-}
-core_initcall(sh7780_pci_init);
-
-int __init sh7780_pcic_init(struct sh4_pci_address_map *map)
-{
-        u32 word;
+        if ((ret = sh4_pci_check_direct(chan)) != 0)
+                return ret;
 
         /*
-         * This code is unused for some boards as it is done in the
-         * bootloader and doing it here means the MAC addresses loaded
-         * by the bootloader get lost.
-         */
-        if (!(map->flags & SH4_PCIC_NO_RESET)) {
-                /* toggle PCI reset pin */
-                word = SH4_PCICR_PREFIX | SH4_PCICR_PRST;
-                pci_write_reg(word, SH4_PCICR);
-                /* Wait for a long time... not 1 sec. but long enough */
-                mdelay(100);
-                word = SH4_PCICR_PREFIX;
-                pci_write_reg(word, SH4_PCICR);
-        }
-
-        /* set the command/status bits to:
-         * Wait Cycle Control + Parity Enable + Bus Master +
-         * Mem space enable
+         * Set the class and sub-class codes.
          */
-        pci_write_reg(0x00000046, SH7780_PCICMD);
-
-        /* define this host as the host bridge */
-        word = PCI_BASE_CLASS_BRIDGE << 24;
-        pci_write_reg(word, SH7780_PCIRID);
+        __raw_writeb(PCI_CLASS_BRIDGE_HOST >> 8,
+                     chan->reg_base + SH7780_PCIBCC);
+        __raw_writeb(PCI_CLASS_BRIDGE_HOST & 0xff,
+                     chan->reg_base + SH7780_PCISUB);
 
-        /* Set IO and Mem windows to local address
+        /*
+         * Set IO and Mem windows to local address
          * Make PCI and local address the same for easy 1 to 1 mapping
          */
-        pci_write_reg(map->window0.size - 0xfffff, SH4_PCILSR0);
-        pci_write_reg(map->window1.size - 0xfffff, SH4_PCILSR1);
+        pci_write_reg(chan, sh7780_pci_map.window0.size - 0xfffff, SH4_PCILSR0);
         /* Set the values on window 0 PCI config registers */
-        pci_write_reg(map->window0.base, SH4_PCILAR0);
-        pci_write_reg(map->window0.base, SH7780_PCIMBAR0);
-        /* Set the values on window 1 PCI config registers */
-        pci_write_reg(map->window1.base, SH4_PCILAR1);
-        pci_write_reg(map->window1.base, SH7780_PCIMBAR1);
-
-        /* Map IO space into PCI IO window
-         * The IO window is 64K-PCIBIOS_MIN_IO in size
-         * IO addresses will be translated to the
-         * PCI IO window base address
-         */
-        pr_debug("PCI: Mapping IO address 0x%x - 0x%x to base 0x%x\n",
-                 PCIBIOS_MIN_IO, (64 << 10),
-                 SH7780_PCI_IO_BASE + PCIBIOS_MIN_IO);
+        pci_write_reg(chan, sh7780_pci_map.window0.base, SH4_PCILAR0);
+        pci_write_reg(chan, sh7780_pci_map.window0.base, SH7780_PCIMBAR0);
 
-        /* NOTE: I'm ignoring the PCI error IRQs for now..
-         * TODO: add support for the internal error interrupts and
-         * DMA interrupts...
-         */
+        pci_write_reg(chan, 0x0000380f, SH4_PCIAINTM);
+
+        /* Set up standard PCI config registers */
+        __raw_writew(0xFB00, chan->reg_base + SH7780_PCISTATUS);
+        __raw_writew(0x0047, chan->reg_base + SH7780_PCICMD);
+        __raw_writew(0x1912, chan->reg_base + SH7780_PCISVID);
+        __raw_writew(0x0001, chan->reg_base + SH7780_PCISID);
+
+        __raw_writeb(0x00, chan->reg_base + SH7780_PCIPIF);
 
         /* Apply any last-minute PCIC fixups */
-        pci_fixup_pcic();
+        pci_fixup_pcic(chan);
+
+        pci_write_reg(chan, 0xfd000000, SH7780_PCIMBR0);
+        pci_write_reg(chan, 0x00fc0000, SH7780_PCIMBMR0);
+
+#ifdef CONFIG_32BIT
+        pci_write_reg(chan, 0xc0000000, SH7780_PCIMBR2);
+        pci_write_reg(chan, 0x20000000 - SH7780_PCI_IO_SIZE, SH7780_PCIMBMR2);
+#endif
+
+        /* Set IOBR for windows containing area specified in pci.h */
+        pci_write_reg(chan, chan->io_resource->start & ~(SH7780_PCI_IO_SIZE-1),
+                      SH7780_PCIIOBR);
+        pci_write_reg(chan, ((SH7780_PCI_IO_SIZE-1) & (7<<18)),
+                      SH7780_PCIIOBMR);
 
         /* SH7780 init done, set central function init complete */
         /* use round robin mode to stop a device starving/overruning */
         word = SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_FTO;
-        pci_write_reg(word, SH4_PCICR);
+        pci_write_reg(chan, word, SH4_PCICR);
+
+        register_pci_controller(chan);
 
-        return 1;
+        return 0;
 }
+arch_initcall(sh7780_pci_init);
diff --git a/arch/sh/drivers/pci/pci-sh7780.h b/arch/sh/drivers/pci/pci-sh7780.h
index 93adc7119b79..4a52478c97cf 100644
--- a/arch/sh/drivers/pci/pci-sh7780.h
+++ b/arch/sh/drivers/pci/pci-sh7780.h
@@ -20,9 +20,8 @@
 #define SH7785_DEVICE_ID        0x0007
 
 /* SH7780 Control Registers */
-#define SH7780_PCI_VCR0         0xFE000000
-#define SH7780_PCI_VCR1         0xFE000004
-#define SH7780_PCI_VCR2         0xFE000008
+#define PCIECR                  0xFE000008
+#define PCIECR_ENBL             0x01
 
 /* SH7780 Specific Values */
 #define SH7780_PCI_CONFIG_BASE  0xFD000000      /* Config space base addr */
@@ -35,7 +34,6 @@
 #define SH7780_PCI_IO_SIZE      0x00400000      /* Size of IO window */
 
 #define SH7780_PCIREG_BASE      0xFE040000      /* PCI regs base address */
-#define PCI_REG(n)              (SH7780_PCIREG_BASE+n)
 
 /* SH7780 PCI Config Registers */
 #define SH7780_PCIVID           0x000           /* Vendor ID */
@@ -67,11 +65,6 @@
 #define SH7780_PCIPMCSR_BSE     0x046
 #define SH7780_PCICDD           0x047
 
-#define SH7780_PCICR            0x100           /* PCI Control Register */
-#define SH7780_PCILSR           0x104           /* PCI Local Space Register0 */
-#define SH7780_PCILSR1          0x108           /* PCI Local Space Register1 */
-#define SH7780_PCILAR0          0x10C           /* PCI Local Address Register1 */
-#define SH7780_PCILAR1          0x110           /* PCI Local Address Register1 */
 #define SH7780_PCIIR            0x114           /* PCI Interrupt Register */
 #define SH7780_PCIIMR           0x118           /* PCI Interrupt Mask Register */
 #define SH7780_PCIAIR           0x11C           /* Error Address Register */
@@ -106,9 +99,4 @@
 
 #define SH7780_32BIT_DDR_BASE_ADDR      0x40000000
 
-struct sh4_pci_address_map;
-
-/* arch/sh/drivers/pci/pci-sh7780.c */
-int sh7780_pcic_init(struct sh4_pci_address_map *map);
-
 #endif /* _PCI_SH7780_H_ */
diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c
index 0d6ac7a1db49..54d77cbb8b39 100644
--- a/arch/sh/drivers/pci/pci.c
+++ b/arch/sh/drivers/pci/pci.c
@@ -1,67 +1,156 @@
 /*
- * arch/sh/drivers/pci/pci.c
+ * New-style PCI core.
  *
- * Copyright (c) 2002 M. R. Brown  <mrbrown@linux-sh.org>
- * Copyright (c) 2004 - 2006 Paul Mundt  <lethal@linux-sh.org>
+ * Copyright (c) 2004 - 2009  Paul Mundt
+ * Copyright (c) 2002  M. R. Brown
  *
- * These functions are collected here to reduce duplication of common
- * code amongst the many platform-specific PCI support code files.
- *
- * These routines require the following board-specific routines:
- * void pcibios_fixup_irqs();
- *
- * See include/asm-sh/pci.h for more information.
+ * Modelled after arch/mips/pci/pci.c:
+ *  Copyright (C) 2003, 04 Ralf Baechle (ralf@linux-mips.org)
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  */
 #include <linux/kernel.h>
+#include <linux/mm.h>
 #include <linux/pci.h>
 #include <linux/init.h>
+#include <linux/types.h>
 #include <linux/dma-debug.h>
-#include <asm/io.h>
+#include <linux/io.h>
+#include <linux/mutex.h>
 
-static int __init pcibios_init(void)
+unsigned long PCIBIOS_MIN_IO = 0x0000;
+unsigned long PCIBIOS_MIN_MEM = 0;
+
+/*
+ * The PCI controller list.
+ */
+static struct pci_channel *hose_head, **hose_tail = &hose_head;
+
+static int pci_initialized;
+
+static void __devinit pcibios_scanbus(struct pci_channel *hose)
 {
-        struct pci_channel *p;
+        static int next_busno;
         struct pci_bus *bus;
-        int busno;
 
-#ifdef CONFIG_PCI_AUTO
-        /* assign resources */
-        busno = 0;
-        for (p = board_pci_channels; p->pci_ops != NULL; p++)
-                busno = pciauto_assign_resources(busno, p) + 1;
-#endif
+        bus = pci_scan_bus(next_busno, hose->pci_ops, hose);
+        if (bus) {
+                next_busno = bus->subordinate + 1;
+                /* Don't allow 8-bit bus number overflow inside the hose -
+                   reserve some space for bridges. */
+                if (next_busno > 224)
+                        next_busno = 0;
+
+                pci_bus_size_bridges(bus);
+                pci_bus_assign_resources(bus);
+                pci_enable_bridges(bus);
+        }
+}
+
+static DEFINE_MUTEX(pci_scan_mutex);
 
-        /* scan the buses */
-        busno = 0;
-        for (p = board_pci_channels; p->pci_ops != NULL; p++) {
-                bus = pci_scan_bus(busno, p->pci_ops, p);
-                busno = bus->subordinate + 1;
+void __devinit register_pci_controller(struct pci_channel *hose)
+{
+        if (request_resource(&iomem_resource, hose->mem_resource) < 0)
+                goto out;
+        if (request_resource(&ioport_resource, hose->io_resource) < 0) {
+                release_resource(hose->mem_resource);
+                goto out;
         }
 
+        *hose_tail = hose;
+        hose_tail = &hose->next;
+
+        /*
+         * Do not panic here but later - this might hapen before console init.
+         */
+        if (!hose->io_map_base) {
+                printk(KERN_WARNING
+                       "registering PCI controller with io_map_base unset\n");
+        }
+
+        /*
+         * Scan the bus if it is register after the PCI subsystem
+         * initialization.
+         */
+        if (pci_initialized) {
+                mutex_lock(&pci_scan_mutex);
+                pcibios_scanbus(hose);
+                mutex_unlock(&pci_scan_mutex);
+        }
+
+        return;
+
+out:
+        printk(KERN_WARNING
+               "Skipping PCI bus scan due to resource conflict\n");
+}
+
+static int __init pcibios_init(void)
+{
+        struct pci_channel *hose;
+
+        /* Scan all of the recorded PCI controllers.  */
+        for (hose = hose_head; hose; hose = hose->next)
+                pcibios_scanbus(hose);
+
         pci_fixup_irqs(pci_common_swizzle, pcibios_map_platform_irq);
 
         dma_debug_add_bus(&pci_bus_type);
 
+        pci_initialized = 1;
+
         return 0;
 }
 subsys_initcall(pcibios_init);
 
+static void pcibios_fixup_device_resources(struct pci_dev *dev,
+        struct pci_bus *bus)
+{
+        /* Update device resources.  */
+        struct pci_channel *hose = bus->sysdata;
+        unsigned long offset = 0;
+        int i;
+
+        for (i = 0; i < PCI_NUM_RESOURCES; i++) {
+                if (!dev->resource[i].start)
+                        continue;
+                if (dev->resource[i].flags & IORESOURCE_PCI_FIXED)
+                        continue;
+                if (dev->resource[i].flags & IORESOURCE_IO)
+                        offset = hose->io_offset;
+                else if (dev->resource[i].flags & IORESOURCE_MEM)
+                        offset = hose->mem_offset;
+
+                dev->resource[i].start += offset;
+                dev->resource[i].end += offset;
+        }
+}
+
 /*
  *  Called after each bus is probed, but before its children
  *  are examined.
  */
-void __devinit __weak pcibios_fixup_bus(struct pci_bus *bus)
+void __devinit pcibios_fixup_bus(struct pci_bus *bus)
 {
-        pci_read_bridge_bases(bus);
-}
+        struct pci_dev *dev = bus->self;
+        struct list_head *ln;
+        struct pci_channel *chan = bus->sysdata;
 
-void pcibios_align_resource(void *data, struct resource *res,
-                            resource_size_t size, resource_size_t align)
-                            __attribute__ ((weak));
+        if (!dev) {
+                bus->resource[0] = chan->io_resource;
+                bus->resource[1] = chan->mem_resource;
+        }
+
+        for (ln = bus->devices.next; ln != &bus->devices; ln = ln->next) {
+                dev = pci_dev_b(ln);
+
+                if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI)
+                        pcibios_fixup_device_resources(dev, bus);
+        }
+}
 
 /*
  * We need to avoid collisions with `mirrored' VGA ports
@@ -72,14 +161,58 @@ void pcibios_align_resource(void *data, struct resource *res,
 void pcibios_align_resource(void *data, struct resource *res,
                             resource_size_t size, resource_size_t align)
 {
+        struct pci_dev *dev = data;
+        struct pci_channel *chan = dev->sysdata;
+        resource_size_t start = res->start;
+
         if (res->flags & IORESOURCE_IO) {
-                resource_size_t start = res->start;
+                if (start < PCIBIOS_MIN_IO + chan->io_resource->start)
+                        start = PCIBIOS_MIN_IO + chan->io_resource->start;
 
+                /*
+                 * Put everything into 0x00-0xff region modulo 0x400.
+                 */
                 if (start & 0x300) {
                         start = (start + 0x3ff) & ~0x3ff;
                         res->start = start;
                 }
+        } else if (res->flags & IORESOURCE_MEM) {
+                if (start < PCIBIOS_MIN_MEM + chan->mem_resource->start)
+                        start = PCIBIOS_MIN_MEM + chan->mem_resource->start;
         }
+
+        res->start = start;
+}
+
+void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
+                         struct resource *res)
+{
+        struct pci_channel *hose = dev->sysdata;
+        unsigned long offset = 0;
+
+        if (res->flags & IORESOURCE_IO)
+                offset = hose->io_offset;
+        else if (res->flags & IORESOURCE_MEM)
+                offset = hose->mem_offset;
+
+        region->start = res->start - offset;
+        region->end = res->end - offset;
+}
+
+void __devinit
+pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
+                        struct pci_bus_region *region)
+{
+        struct pci_channel *hose = dev->sysdata;
+        unsigned long offset = 0;
+
+        if (res->flags & IORESOURCE_IO)
+                offset = hose->io_offset;
+        else if (res->flags & IORESOURCE_MEM)
+                offset = hose->mem_offset;
+
+        res->start = region->start + offset;
+        res->end = region->end + offset;
 }
 
 int pcibios_enable_device(struct pci_dev *dev, int mask)
@@ -90,13 +223,21 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
 
         pci_read_config_word(dev, PCI_COMMAND, &cmd);
         old_cmd = cmd;
-        for(idx=0; idx<6; idx++) {
-                if (!(mask & (1 << idx)))
+        for (idx=0; idx < PCI_NUM_RESOURCES; idx++) {
+                /* Only set up the requested stuff */
+                if (!(mask & (1<<idx)))
                         continue;
+
                 r = &dev->resource[idx];
+                if (!(r->flags & (IORESOURCE_IO | IORESOURCE_MEM)))
+                        continue;
+                if ((idx == PCI_ROM_RESOURCE) &&
+                                (!(r->flags & IORESOURCE_ROM_ENABLE)))
+                        continue;
                 if (!r->start && r->end) {
-                        printk(KERN_ERR "PCI: Device %s not available because "
-                               "of resource collisions\n", pci_name(dev));
+                        printk(KERN_ERR "PCI: Device %s not available "
+                               "because of resource collisions\n",
+                               pci_name(dev));
                         return -EINVAL;
                 }
                 if (r->flags & IORESOURCE_IO)
@@ -104,10 +245,8 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
                 if (r->flags & IORESOURCE_MEM)
                         cmd |= PCI_COMMAND_MEMORY;
         }
-        if (dev->resource[PCI_ROM_RESOURCE].start)
-                cmd |= PCI_COMMAND_MEMORY;
         if (cmd != old_cmd) {
-                printk(KERN_INFO "PCI: Enabling device %s (%04x -> %04x)\n",
+                printk("PCI: Enabling device %s (%04x -> %04x)\n",
                        pci_name(dev), old_cmd, cmd);
                 pci_write_config_word(dev, PCI_COMMAND, cmd);
         }
@@ -140,6 +279,43 @@ void __init pcibios_update_irq(struct pci_dev *dev, int irq)
         pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
 }
 
+char * __devinit pcibios_setup(char *str)
+{
+        return str;
+}
+
+int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
+                        enum pci_mmap_state mmap_state, int write_combine)
+{
+        /*
+         * I/O space can be accessed via normal processor loads and stores on
+         * this platform but for now we elect not to do this and portable
+         * drivers should not do this anyway.
+         */
+        if (mmap_state == pci_mmap_io)
+                return -EINVAL;
+
+        /*
+         * Ignore write-combine; for now only return uncached mappings.
+         */
+        vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+
+        return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
+                               vma->vm_end - vma->vm_start,
+                               vma->vm_page_prot);
+}
+
+static void __iomem *ioport_map_pci(struct pci_dev *dev,
+                                    unsigned long port, unsigned int nr)
+{
+        struct pci_channel *chan = dev->sysdata;
+
+        if (!chan->io_map_base)
+                chan->io_map_base = generic_io_base;
+
+        return (void __iomem *)(chan->io_map_base + port);
+}
+
 void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
 {
         resource_size_t start = pci_resource_start(dev, bar);
@@ -151,20 +327,24 @@ void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
         if (maxlen && len > maxlen)
                 len = maxlen;
 
+        if (flags & IORESOURCE_IO)
+                return ioport_map_pci(dev, start, len);
+
         /*
          * Presently the IORESOURCE_MEM case is a bit special, most
          * SH7751 style PCI controllers have PCI memory at a fixed
-         * location in the address space where no remapping is desired
-         * (typically at 0xfd000000, but is_pci_memaddr() will know
-         * best). With the IORESOURCE_MEM case more care has to be taken
+         * location in the address space where no remapping is desired.
+         * With the IORESOURCE_MEM case more care has to be taken
          * to inhibit page table mapping for legacy cores, but this is
          * punted off to __ioremap().
          *                                      -- PFM.
          */
-        if (flags & IORESOURCE_IO)
-                return ioport_map(start, len);
-        if (flags & IORESOURCE_MEM)
-                return ioremap(start, len);
+        if (flags & IORESOURCE_MEM) {
+                if (flags & IORESOURCE_CACHEABLE)
+                        return ioremap(start, len);
+
+                return ioremap_nocache(start, len);
+        }
 
         return NULL;
 }
@@ -175,3 +355,10 @@ void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
         iounmap(addr);
 }
 EXPORT_SYMBOL(pci_iounmap);
+
+#ifdef CONFIG_HOTPLUG
+EXPORT_SYMBOL(pcibios_resource_to_bus);
+EXPORT_SYMBOL(pcibios_bus_to_resource);
+EXPORT_SYMBOL(PCIBIOS_MIN_IO);
+EXPORT_SYMBOL(PCIBIOS_MIN_MEM);
+#endif
diff --git a/arch/sh/include/asm/atomic-llsc.h b/arch/sh/include/asm/atomic-llsc.h
index 4b00b78e3f4f..b040e1e08610 100644
--- a/arch/sh/include/asm/atomic-llsc.h
+++ b/arch/sh/include/asm/atomic-llsc.h
@@ -104,4 +104,31 @@ static inline void atomic_set_mask(unsigned int mask, atomic_t *v)
         : "t");
 }
 
+#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
+
+/**
+ * atomic_add_unless - add unless the number is a given value
+ * @v: pointer of type atomic_t
+ * @a: the amount to add to v...
+ * @u: ...unless v is equal to u.
+ *
+ * Atomically adds @a to @v, so long as it was not @u.
+ * Returns non-zero if @v was not @u, and zero otherwise.
+ */
+static inline int atomic_add_unless(atomic_t *v, int a, int u)
+{
+        int c, old;
+        c = atomic_read(v);
+        for (;;) {
+                if (unlikely(c == (u)))
+                        break;
+                old = atomic_cmpxchg((v), c, c + (a));
+                if (likely(old == c))
+                        break;
+                c = old;
+        }
+
+        return c != (u);
+}
+
 #endif /* __ASM_SH_ATOMIC_LLSC_H */
diff --git a/arch/sh/include/asm/atomic.h b/arch/sh/include/asm/atomic.h
index 6327ffbb1992..978b58efb1e9 100644
--- a/arch/sh/include/asm/atomic.h
+++ b/arch/sh/include/asm/atomic.h
@@ -45,7 +45,7 @@
 #define atomic_inc(v) atomic_add(1,(v))
 #define atomic_dec(v) atomic_sub(1,(v))
 
-#ifndef CONFIG_GUSA_RB
+#if !defined(CONFIG_GUSA_RB) && !defined(CONFIG_CPU_SH4A)
 static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
 {
         int ret;
@@ -73,7 +73,7 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u)
 
         return ret != u;
 }
-#endif
+#endif /* !CONFIG_GUSA_RB && !CONFIG_CPU_SH4A */
 
 #define atomic_xchg(v, new) (xchg(&((v)->counter), new))
 #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
diff --git a/arch/sh/include/asm/cacheflush.h b/arch/sh/include/asm/cacheflush.h
index 09acbc32d6c7..4c5462daa74c 100644
--- a/arch/sh/include/asm/cacheflush.h
+++ b/arch/sh/include/asm/cacheflush.h
@@ -75,7 +75,5 @@ extern void copy_from_user_page(struct vm_area_struct *vma,
 #define flush_cache_vmap(start, end)            flush_cache_all()
 #define flush_cache_vunmap(start, end)          flush_cache_all()
 
-#define HAVE_ARCH_UNMAPPED_AREA
-
 #endif /* __KERNEL__ */
 #endif /* __ASM_SH_CACHEFLUSH_H */
diff --git a/arch/sh/include/asm/clock.h b/arch/sh/include/asm/clock.h
index 2f6c9627bc1f..9fe7d7f8af40 100644
--- a/arch/sh/include/asm/clock.h
+++ b/arch/sh/include/asm/clock.h
@@ -1,9 +1,9 @@
 #ifndef __ASM_SH_CLOCK_H
 #define __ASM_SH_CLOCK_H
 
-#include <linux/kref.h>
 #include <linux/list.h>
 #include <linux/seq_file.h>
+#include <linux/cpufreq.h>
 #include <linux/clk.h>
 #include <linux/err.h>
 
@@ -11,9 +11,9 @@ struct clk;
 
 struct clk_ops {
         void (*init)(struct clk *clk);
-        void (*enable)(struct clk *clk);
+        int (*enable)(struct clk *clk);
         void (*disable)(struct clk *clk);
-        void (*recalc)(struct clk *clk);
+        unsigned long (*recalc)(struct clk *clk);
         int (*set_rate)(struct clk *clk, unsigned long rate, int algo_id);
         int (*set_parent)(struct clk *clk, struct clk *parent);
         long (*round_rate)(struct clk *clk, unsigned long rate);
@@ -28,43 +28,47 @@ struct clk {
         struct clk              *parent;
         struct clk_ops          *ops;
 
-        struct kref             kref;
+        struct list_head        children;
+        struct list_head        sibling;        /* node for children */
+
+        int                     usecount;
 
         unsigned long           rate;
         unsigned long           flags;
+
+        void __iomem            *enable_reg;
+        unsigned int            enable_bit;
+
         unsigned long           arch_flags;
+        void                    *priv;
+        struct dentry           *dentry;
+        struct cpufreq_frequency_table *freq_table;
+};
+
+struct clk_lookup {
+        struct list_head        node;
+        const char              *dev_id;
+        const char              *con_id;
+        struct clk              *clk;
 };
 
-#define CLK_ALWAYS_ENABLED      (1 << 0)
-#define CLK_RATE_PROPAGATES     (1 << 1)
+#define CLK_ENABLE_ON_INIT      (1 << 0)
 
 /* Should be defined by processor-specific code */
-void arch_init_clk_ops(struct clk_ops **, int type);
+void __deprecated arch_init_clk_ops(struct clk_ops **, int type);
 int __init arch_clk_init(void);
 
 /* arch/sh/kernel/cpu/clock.c */
 int clk_init(void);
-
-void clk_recalc_rate(struct clk *);
-
+unsigned long followparent_recalc(struct clk *);
+void recalculate_root_clocks(void);
+void propagate_rate(struct clk *);
+int clk_reparent(struct clk *child, struct clk *parent);
 int clk_register(struct clk *);
 void clk_unregister(struct clk *);
 
-static inline int clk_always_enable(const char *id)
-{
-        struct clk *clk;
-        int ret;
-
-        clk = clk_get(NULL, id);
-        if (IS_ERR(clk))
-                return PTR_ERR(clk);
-
-        ret = clk_enable(clk);
-        if (ret)
-                clk_put(clk);
-
-        return ret;
-}
+/* arch/sh/kernel/cpu/clock-cpg.c */
+int __init __deprecated cpg_clk_init(void);
 
 /* the exported API, in addition to clk_set_rate */
 /**
@@ -96,4 +100,63 @@ enum clk_sh_algo_id {
 
         IP_N1,
 };
+
+struct clk_div_mult_table {
+        unsigned int *divisors;
+        unsigned int nr_divisors;
+        unsigned int *multipliers;
+        unsigned int nr_multipliers;
+};
+
+struct cpufreq_frequency_table;
+void clk_rate_table_build(struct clk *clk,
+                          struct cpufreq_frequency_table *freq_table,
+                          int nr_freqs,
+                          struct clk_div_mult_table *src_table,
+                          unsigned long *bitmap);
+
+long clk_rate_table_round(struct clk *clk,
+                          struct cpufreq_frequency_table *freq_table,
+                          unsigned long rate);
+
+int clk_rate_table_find(struct clk *clk,
+                        struct cpufreq_frequency_table *freq_table,
+                        unsigned long rate);
+
+#define SH_CLK_MSTP32(_name, _id, _parent, _enable_reg, \
+            _enable_bit, _flags)                        \
+{                                                       \
+        .name           = _name,                        \
+        .id             = _id,                          \
+        .parent         = _parent,                      \
+        .enable_reg     = (void __iomem *)_enable_reg,  \
+        .enable_bit     = _enable_bit,                  \
+        .flags          = _flags,                       \
+}
+
+int sh_clk_mstp32_register(struct clk *clks, int nr);
+
+#define SH_CLK_DIV4(_name, _parent, _reg, _shift, _div_bitmap, _flags)  \
+{                                                                       \
+        .name = _name,                                                  \
+        .parent = _parent,                                              \
+        .enable_reg = (void __iomem *)_reg,                             \
+        .enable_bit = _shift,                                           \
+        .arch_flags = _div_bitmap,                                      \
+        .flags = _flags,                                                \
+}
+
+int sh_clk_div4_register(struct clk *clks, int nr,
+                         struct clk_div_mult_table *table);
+
+#define SH_CLK_DIV6(_name, _parent, _reg, _flags)       \
+{                                                       \
+        .name = _name,                                  \
+        .parent = _parent,                              \
+        .enable_reg = (void __iomem *)_reg,             \
+        .flags = _flags,                                \
+}
+
+int sh_clk_div6_register(struct clk *clks, int nr);
+
 #endif /* __ASM_SH_CLOCK_H */
diff --git a/arch/sh/include/asm/cmpxchg-llsc.h b/arch/sh/include/asm/cmpxchg-llsc.h
index 0fac3da536ca..47136661a203 100644
--- a/arch/sh/include/asm/cmpxchg-llsc.h
+++ b/arch/sh/include/asm/cmpxchg-llsc.h
@@ -55,7 +55,7 @@ __cmpxchg_u32(volatile int *m, unsigned long old, unsigned long new)
                 "mov            %0, %1                          \n\t"
                 "cmp/eq         %1, %3                          \n\t"
                 "bf             2f                              \n\t"
-                "mov            %3, %0                          \n\t"
+                "mov            %4, %0                          \n\t"
                 "2:                                             \n\t"
                 "movco.l        %0, @%2                         \n\t"
                 "bf             1b                              \n\t"
diff --git a/arch/sh/include/asm/device.h b/arch/sh/include/asm/device.h
index efd511d0803a..8688a88303ee 100644
--- a/arch/sh/include/asm/device.h
+++ b/arch/sh/include/asm/device.h
@@ -10,3 +10,5 @@ struct platform_device;
 int platform_resource_setup_memory(struct platform_device *pdev,
                                    char *name, unsigned long memsize);
 
+void plat_early_device_setup(void);
+
diff --git a/arch/sh/include/asm/hd64461.h b/arch/sh/include/asm/hd64461.h
index 52b4b6238277..977355f0a483 100644
--- a/arch/sh/include/asm/hd64461.h
+++ b/arch/sh/include/asm/hd64461.h
@@ -13,18 +13,20 @@
 #define HD64461_PCC_WINDOW      0x01000000
 
 /* Area 6 - Slot 0 - memory and/or IO card */
-#define HD64461_PCC0_BASE       (CONFIG_HD64461_IOBASE + 0x8000000)
+#define HD64461_IOBASE          0xb0000000
+#define HD64461_IO_OFFSET(x)    (HD64461_IOBASE + (x))
+#define HD64461_PCC0_BASE       HD64461_IO_OFFSET(0x8000000)
 #define HD64461_PCC0_ATTR       (HD64461_PCC0_BASE)                             /* 0xb80000000 */
 #define HD64461_PCC0_COMM       (HD64461_PCC0_BASE+HD64461_PCC_WINDOW)          /* 0xb90000000 */
 #define HD64461_PCC0_IO         (HD64461_PCC0_BASE+2*HD64461_PCC_WINDOW)        /* 0xba0000000 */
 
 /* Area 5 - Slot 1 - memory card only */
-#define HD64461_PCC1_BASE       (CONFIG_HD64461_IOBASE + 0x4000000)
+#define HD64461_PCC1_BASE       HD64461_IO_OFFSET(0x4000000)
 #define HD64461_PCC1_ATTR       (HD64461_PCC1_BASE)                             /* 0xb4000000 */
 #define HD64461_PCC1_COMM       (HD64461_PCC1_BASE+HD64461_PCC_WINDOW)          /* 0xb5000000 */
 
 /* Standby Control Register for HD64461 */
-#define HD64461_STBCR                   CONFIG_HD64461_IOBASE
+#define HD64461_STBCR                   HD64461_IO_OFFSET(0x00000000)
 #define HD64461_STBCR_CKIO_STBY         0x2000
 #define HD64461_STBCR_SAFECKE_IST       0x1000
 #define HD64461_STBCR_SLCKE_IST         0x0800
@@ -41,19 +43,19 @@
 #define HD64461_STBCR_SURTST            0x0001
 
 /* System Configuration Register */
-#define HD64461_SYSCR           (CONFIG_HD64461_IOBASE + 0x02)
+#define HD64461_SYSCR           HD64461_IO_OFFSET(0x02)
 
 /* CPU Data Bus Control Register */
-#define HD64461_SCPUCR          (CONFIG_HD64461_IOBASE + 0x04)
+#define HD64461_SCPUCR          HD64461_IO_OFFSET(0x04)
 
 /* Base Address Register */
-#define HD64461_LCDCBAR         (CONFIG_HD64461_IOBASE + 0x1000)
+#define HD64461_LCDCBAR         HD64461_IO_OFFSET(0x1000)
 
 /* Line increment address */
-#define HD64461_LCDCLOR         (CONFIG_HD64461_IOBASE + 0x1002)
+#define HD64461_LCDCLOR         HD64461_IO_OFFSET(0x1002)
 
 /* Controls LCD controller */
-#define HD64461_LCDCCR          (CONFIG_HD64461_IOBASE + 0x1004)
+#define HD64461_LCDCCR          HD64461_IO_OFFSET(0x1004)
 
 /* LCCDR control bits */
 #define HD64461_LCDCCR_STBACK   0x0400  /* Standby Back */
@@ -64,30 +66,30 @@
 #define HD64461_LCDCCR_SPON     0x0010  /* Start Power On */
 
 /* Controls LCD (1) */
-#define HD64461_LDR1            (CONFIG_HD64461_IOBASE + 0x1010)
+#define HD64461_LDR1            HD64461_IO_OFFSET(0x1010)
 #define HD64461_LDR1_DON        0x01    /* Display On */
 #define HD64461_LDR1_DINV       0x80    /* Display Invert */
 
 /* Controls LCD (2) */
-#define HD64461_LDR2            (CONFIG_HD64461_IOBASE + 0x1012)
-#define HD64461_LDHNCR          (CONFIG_HD64461_IOBASE + 0x1014)        /* Number of horizontal characters */
-#define HD64461_LDHNSR          (CONFIG_HD64461_IOBASE + 0x1016)        /* Specify output start position + width of CL1 */
-#define HD64461_LDVNTR          (CONFIG_HD64461_IOBASE + 0x1018)        /* Specify total vertical lines */
-#define HD64461_LDVNDR          (CONFIG_HD64461_IOBASE + 0x101a)        /* specify number of display vertical lines */
-#define HD64461_LDVSPR          (CONFIG_HD64461_IOBASE + 0x101c)        /* specify vertical synchronization pos and AC nr */
+#define HD64461_LDR2            HD64461_IO_OFFSET(0x1012)
+#define HD64461_LDHNCR          HD64461_IO_OFFSET(0x1014)       /* Number of horizontal characters */
+#define HD64461_LDHNSR          HD64461_IO_OFFSET(0x1016)       /* Specify output start position + width of CL1 */
+#define HD64461_LDVNTR          HD64461_IO_OFFSET(0x1018)       /* Specify total vertical lines */
+#define HD64461_LDVNDR          HD64461_IO_OFFSET(0x101a)       /* specify number of display vertical lines */
+#define HD64461_LDVSPR          HD64461_IO_OFFSET(0x101c)       /* specify vertical synchronization pos and AC nr */
 
 /* Controls LCD (3) */
-#define HD64461_LDR3            (CONFIG_HD64461_IOBASE + 0x101e)
+#define HD64461_LDR3            HD64461_IO_OFFSET(0x101e)
 
 /* Palette Registers */
-#define HD64461_CPTWAR          (CONFIG_HD64461_IOBASE + 0x1030)        /* Color Palette Write Address Register */
-#define HD64461_CPTWDR          (CONFIG_HD64461_IOBASE + 0x1032)        /* Color Palette Write Data Register */
-#define HD64461_CPTRAR          (CONFIG_HD64461_IOBASE + 0x1034)        /* Color Palette Read Address Register */
-#define HD64461_CPTRDR          (CONFIG_HD64461_IOBASE + 0x1036)        /* Color Palette Read Data Register */
+#define HD64461_CPTWAR          HD64461_IO_OFFSET(0x1030)       /* Color Palette Write Address Register */
+#define HD64461_CPTWDR          HD64461_IO_OFFSET(0x1032)       /* Color Palette Write Data Register */
+#define HD64461_CPTRAR          HD64461_IO_OFFSET(0x1034)       /* Color Palette Read Address Register */
+#define HD64461_CPTRDR          HD64461_IO_OFFSET(0x1036)       /* Color Palette Read Data Register */
 
-#define HD64461_GRDOR           (CONFIG_HD64461_IOBASE + 0x1040)        /* Display Resolution Offset Register */
-#define HD64461_GRSCR           (CONFIG_HD64461_IOBASE + 0x1042)        /* Solid Color Register */
-#define HD64461_GRCFGR          (CONFIG_HD64461_IOBASE + 0x1044)        /* Accelerator Configuration Register */
+#define HD64461_GRDOR           HD64461_IO_OFFSET(0x1040)       /* Display Resolution Offset Register */
+#define HD64461_GRSCR           HD64461_IO_OFFSET(0x1042)       /* Solid Color Register */
+#define HD64461_GRCFGR          HD64461_IO_OFFSET(0x1044)       /* Accelerator Configuration Register */
 
 #define HD64461_GRCFGR_ACCSTATUS        0x10    /* Accelerator Status */
 #define HD64461_GRCFGR_ACCRESET         0x08    /* Accelerator Reset */
@@ -97,41 +99,41 @@
 #define HD64461_GRCFGR_COLORDEPTH8      0x01    /* Sets Colordepth 8 for Accelerator */
 
 /* Line Drawing Registers */
-#define HD64461_LNSARH          (CONFIG_HD64461_IOBASE + 0x1046)        /* Line Start Address Register (H) */
-#define HD64461_LNSARL          (CONFIG_HD64461_IOBASE + 0x1048)        /* Line Start Address Register (L) */
-#define HD64461_LNAXLR          (CONFIG_HD64461_IOBASE + 0x104a)        /* Axis Pixel Length Register */
-#define HD64461_LNDGR           (CONFIG_HD64461_IOBASE + 0x104c)        /* Diagonal Register */
-#define HD64461_LNAXR           (CONFIG_HD64461_IOBASE + 0x104e)        /* Axial Register */
-#define HD64461_LNERTR          (CONFIG_HD64461_IOBASE + 0x1050)        /* Start Error Term Register */
-#define HD64461_LNMDR           (CONFIG_HD64461_IOBASE + 0x1052)        /* Line Mode Register */
+#define HD64461_LNSARH          HD64461_IO_OFFSET(0x1046)       /* Line Start Address Register (H) */
+#define HD64461_LNSARL          HD64461_IO_OFFSET(0x1048)       /* Line Start Address Register (L) */
+#define HD64461_LNAXLR          HD64461_IO_OFFSET(0x104a)       /* Axis Pixel Length Register */
+#define HD64461_LNDGR           HD64461_IO_OFFSET(0x104c)       /* Diagonal Register */
+#define HD64461_LNAXR           HD64461_IO_OFFSET(0x104e)       /* Axial Register */
+#define HD64461_LNERTR          HD64461_IO_OFFSET(0x1050)       /* Start Error Term Register */
+#define HD64461_LNMDR           HD64461_IO_OFFSET(0x1052)       /* Line Mode Register */
 
 /* BitBLT Registers */
-#define HD64461_BBTSSARH        (CONFIG_HD64461_IOBASE + 0x1054)        /* Source Start Address Register (H) */
-#define HD64461_BBTSSARL        (CONFIG_HD64461_IOBASE + 0x1056)        /* Source Start Address Register (L) */
-#define HD64461_BBTDSARH        (CONFIG_HD64461_IOBASE + 0x1058)        /* Destination Start Address Register (H) */
-#define HD64461_BBTDSARL        (CONFIG_HD64461_IOBASE + 0x105a)        /* Destination Start Address Register (L) */
-#define HD64461_BBTDWR          (CONFIG_HD64461_IOBASE + 0x105c)        /* Destination Block Width Register */
-#define HD64461_BBTDHR          (CONFIG_HD64461_IOBASE + 0x105e)        /* Destination Block Height Register */
-#define HD64461_BBTPARH         (CONFIG_HD64461_IOBASE + 0x1060)        /* Pattern Start Address Register (H) */
-#define HD64461_BBTPARL         (CONFIG_HD64461_IOBASE + 0x1062)        /* Pattern Start Address Register (L) */
-#define HD64461_BBTMARH         (CONFIG_HD64461_IOBASE + 0x1064)        /* Mask Start Address Register (H) */
-#define HD64461_BBTMARL         (CONFIG_HD64461_IOBASE + 0x1066)        /* Mask Start Address Register (L) */
-#define HD64461_BBTROPR         (CONFIG_HD64461_IOBASE + 0x1068)        /* ROP Register */
-#define HD64461_BBTMDR          (CONFIG_HD64461_IOBASE + 0x106a)        /* BitBLT Mode Register */
+#define HD64461_BBTSSARH        HD64461_IO_OFFSET(0x1054)       /* Source Start Address Register (H) */
+#define HD64461_BBTSSARL        HD64461_IO_OFFSET(0x1056)       /* Source Start Address Register (L) */
+#define HD64461_BBTDSARH        HD64461_IO_OFFSET(0x1058)       /* Destination Start Address Register (H) */
+#define HD64461_BBTDSARL        HD64461_IO_OFFSET(0x105a)       /* Destination Start Address Register (L) */
+#define HD64461_BBTDWR          HD64461_IO_OFFSET(0x105c)       /* Destination Block Width Register */
+#define HD64461_BBTDHR          HD64461_IO_OFFSET(0x105e)       /* Destination Block Height Register */
+#define HD64461_BBTPARH         HD64461_IO_OFFSET(0x1060)       /* Pattern Start Address Register (H) */
+#define HD64461_BBTPARL         HD64461_IO_OFFSET(0x1062)       /* Pattern Start Address Register (L) */
+#define HD64461_BBTMARH         HD64461_IO_OFFSET(0x1064)       /* Mask Start Address Register (H) */
+#define HD64461_BBTMARL         HD64461_IO_OFFSET(0x1066)       /* Mask Start Address Register (L) */
+#define HD64461_BBTROPR         HD64461_IO_OFFSET(0x1068)       /* ROP Register */
+#define HD64461_BBTMDR          HD64461_IO_OFFSET(0x106a)       /* BitBLT Mode Register */
 
 /* PC Card Controller Registers */
 /* Maps to Physical Area 6 */
-#define HD64461_PCC0ISR         (CONFIG_HD64461_IOBASE + 0x2000)        /* socket 0 interface status */
-#define HD64461_PCC0GCR         (CONFIG_HD64461_IOBASE + 0x2002)        /* socket 0 general control */
-#define HD64461_PCC0CSCR        (CONFIG_HD64461_IOBASE + 0x2004)        /* socket 0 card status change */
-#define HD64461_PCC0CSCIER      (CONFIG_HD64461_IOBASE + 0x2006)        /* socket 0 card status change interrupt enable */
-#define HD64461_PCC0SCR         (CONFIG_HD64461_IOBASE + 0x2008)        /* socket 0 software control */
+#define HD64461_PCC0ISR         HD64461_IO_OFFSET(0x2000)       /* socket 0 interface status */
+#define HD64461_PCC0GCR         HD64461_IO_OFFSET(0x2002)       /* socket 0 general control */
+#define HD64461_PCC0CSCR        HD64461_IO_OFFSET(0x2004)       /* socket 0 card status change */
+#define HD64461_PCC0CSCIER      HD64461_IO_OFFSET(0x2006)       /* socket 0 card status change interrupt enable */
+#define HD64461_PCC0SCR         HD64461_IO_OFFSET(0x2008)       /* socket 0 software control */
 /* Maps to Physical Area 5 */
-#define HD64461_PCC1ISR         (CONFIG_HD64461_IOBASE + 0x2010)        /* socket 1 interface status */
-#define HD64461_PCC1GCR         (CONFIG_HD64461_IOBASE + 0x2012)        /* socket 1 general control */
-#define HD64461_PCC1CSCR        (CONFIG_HD64461_IOBASE + 0x2014)        /* socket 1 card status change */
-#define HD64461_PCC1CSCIER      (CONFIG_HD64461_IOBASE + 0x2016)        /* socket 1 card status change interrupt enable */
-#define HD64461_PCC1SCR         (CONFIG_HD64461_IOBASE + 0x2018)        /* socket 1 software control */
+#define HD64461_PCC1ISR         HD64461_IO_OFFSET(0x2010)       /* socket 1 interface status */
+#define HD64461_PCC1GCR         HD64461_IO_OFFSET(0x2012)       /* socket 1 general control */
+#define HD64461_PCC1CSCR        HD64461_IO_OFFSET(0x2014)       /* socket 1 card status change */
+#define HD64461_PCC1CSCIER      HD64461_IO_OFFSET(0x2016)       /* socket 1 card status change interrupt enable */
+#define HD64461_PCC1SCR         HD64461_IO_OFFSET(0x2018)       /* socket 1 software control */
 
 /* PCC Interface Status Register */
 #define HD64461_PCCISR_READY            0x80    /* card ready */
@@ -189,41 +191,41 @@
 #define HD64461_PCCSCR_SWP              0x01    /* write protect */
 
 /* PCC0 Output Pins Control Register */
-#define HD64461_P0OCR           (CONFIG_HD64461_IOBASE + 0x202a)
+#define HD64461_P0OCR           HD64461_IO_OFFSET(0x202a)
 
 /* PCC1 Output Pins Control Register */
-#define HD64461_P1OCR           (CONFIG_HD64461_IOBASE + 0x202c)
+#define HD64461_P1OCR           HD64461_IO_OFFSET(0x202c)
 
 /* PC Card General Control Register */
-#define HD64461_PGCR            (CONFIG_HD64461_IOBASE + 0x202e)
+#define HD64461_PGCR            HD64461_IO_OFFSET(0x202e)
 
 /* Port Control Registers */
-#define HD64461_GPACR           (CONFIG_HD64461_IOBASE + 0x4000)        /* Port A - Handles IRDA/TIMER */
-#define HD64461_GPBCR           (CONFIG_HD64461_IOBASE + 0x4002)        /* Port B - Handles UART */
-#define HD64461_GPCCR           (CONFIG_HD64461_IOBASE + 0x4004)        /* Port C - Handles PCMCIA 1 */
-#define HD64461_GPDCR           (CONFIG_HD64461_IOBASE + 0x4006)        /* Port D - Handles PCMCIA 1 */
+#define HD64461_GPACR           HD64461_IO_OFFSET(0x4000)       /* Port A - Handles IRDA/TIMER */
+#define HD64461_GPBCR           HD64461_IO_OFFSET(0x4002)       /* Port B - Handles UART */
+#define HD64461_GPCCR           HD64461_IO_OFFSET(0x4004)       /* Port C - Handles PCMCIA 1 */
+#define HD64461_GPDCR           HD64461_IO_OFFSET(0x4006)       /* Port D - Handles PCMCIA 1 */
 
 /* Port Control Data Registers */
-#define HD64461_GPADR           (CONFIG_HD64461_IOBASE + 0x4010)        /* A */
-#define HD64461_GPBDR           (CONFIG_HD64461_IOBASE + 0x4012)        /* B */
-#define HD64461_GPCDR           (CONFIG_HD64461_IOBASE + 0x4014)        /* C */
-#define HD64461_GPDDR           (CONFIG_HD64461_IOBASE + 0x4016)        /* D */
+#define HD64461_GPADR           HD64461_IO_OFFSET(0x4010)       /* A */
+#define HD64461_GPBDR           HD64461_IO_OFFSET(0x4012)       /* B */
+#define HD64461_GPCDR           HD64461_IO_OFFSET(0x4014)       /* C */
+#define HD64461_GPDDR           HD64461_IO_OFFSET(0x4016)       /* D */
 
 /* Interrupt Control Registers */
-#define HD64461_GPAICR          (CONFIG_HD64461_IOBASE + 0x4020)        /* A */
-#define HD64461_GPBICR          (CONFIG_HD64461_IOBASE + 0x4022)        /* B */
-#define HD64461_GPCICR          (CONFIG_HD64461_IOBASE + 0x4024)        /* C */
-#define HD64461_GPDICR          (CONFIG_HD64461_IOBASE + 0x4026)        /* D */
+#define HD64461_GPAICR          HD64461_IO_OFFSET(0x4020)       /* A */
+#define HD64461_GPBICR          HD64461_IO_OFFSET(0x4022)       /* B */
+#define HD64461_GPCICR          HD64461_IO_OFFSET(0x4024)       /* C */
+#define HD64461_GPDICR          HD64461_IO_OFFSET(0x4026)       /* D */
 
 /* Interrupt Status Registers */
-#define HD64461_GPAISR          (CONFIG_HD64461_IOBASE + 0x4040)        /* A */
-#define HD64461_GPBISR          (CONFIG_HD64461_IOBASE + 0x4042)        /* B */
-#define HD64461_GPCISR          (CONFIG_HD64461_IOBASE + 0x4044)        /* C */
-#define HD64461_GPDISR          (CONFIG_HD64461_IOBASE + 0x4046)        /* D */
+#define HD64461_GPAISR          HD64461_IO_OFFSET(0x4040)       /* A */
+#define HD64461_GPBISR          HD64461_IO_OFFSET(0x4042)       /* B */
+#define HD64461_GPCISR          HD64461_IO_OFFSET(0x4044)       /* C */
+#define HD64461_GPDISR          HD64461_IO_OFFSET(0x4046)       /* D */
 
 /* Interrupt Request Register & Interrupt Mask Register */
-#define HD64461_NIRR            (CONFIG_HD64461_IOBASE + 0x5000)
-#define HD64461_NIMR            (CONFIG_HD64461_IOBASE + 0x5002)
+#define HD64461_NIRR            HD64461_IO_OFFSET(0x5000)
+#define HD64461_NIMR            HD64461_IO_OFFSET(0x5002)
 
 #define HD64461_IRQBASE         OFFCHIP_IRQ_BASE
 #define OFFCHIP_IRQ_BASE        64
diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h
index 0454f8d68059..25348141674b 100644
--- a/arch/sh/include/asm/io.h
+++ b/arch/sh/include/asm/io.h
@@ -123,10 +123,15 @@ static inline void __raw_reads##bwlq(volatile void __iomem *mem,	\
 
 __BUILD_MEMORY_STRING(b, u8)
 __BUILD_MEMORY_STRING(w, u16)
-__BUILD_MEMORY_STRING(q, u64)
 
+#ifdef CONFIG_SUPERH32
 void __raw_writesl(void __iomem *addr, const void *data, int longlen);
 void __raw_readsl(const void __iomem *addr, void *data, int longlen);
+#else
+__BUILD_MEMORY_STRING(l, u32)
+#endif
+
+__BUILD_MEMORY_STRING(q, u64)
 
 #define writesb                 __raw_writesb
 #define writesw                 __raw_writesw
@@ -224,17 +229,6 @@ void __iomem *__ioremap(unsigned long offset, unsigned long size,
                         unsigned long flags);
 void __iounmap(void __iomem *addr);
 
-/* arch/sh/mm/ioremap_64.c */
-unsigned long onchip_remap(unsigned long addr, unsigned long size,
-                           const char *name);
-extern void onchip_unmap(unsigned long vaddr);
-#else
-#define __ioremap(offset, size, flags)  ((void __iomem *)(offset))
-#define __iounmap(addr)                 do { } while (0)
-#define onchip_remap(addr, size, name)  (addr)
-#define onchip_unmap(addr)              do { } while (0)
-#endif /* CONFIG_MMU */
-
 static inline void __iomem *
 __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags)
 {
@@ -268,6 +262,10 @@ __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags)
 
         return __ioremap(offset, size, flags);
 }
+#else
+#define __ioremap_mode(offset, size, flags)     ((void __iomem *)(offset))
+#define __iounmap(addr)                         do { } while (0)
+#endif /* CONFIG_MMU */
 
 #define ioremap(offset, size)                           \
         __ioremap_mode((offset), (size), 0)
diff --git a/arch/sh/include/asm/irq.h b/arch/sh/include/asm/irq.h
index d319baaf4fbd..a2b8c99cc06f 100644
--- a/arch/sh/include/asm/irq.h
+++ b/arch/sh/include/asm/irq.h
@@ -8,7 +8,8 @@
  * advised to cap this at the hard limit that they're interested in
  * through the machvec.
  */
-#define NR_IRQS 256
+#define NR_IRQS                 256
+#define NR_IRQS_LEGACY          8       /* Legacy external IRQ0-7 */
 
 /*
  * Convert back and forth between INTEVT and IRQ values.
diff --git a/arch/sh/include/asm/kprobes.h b/arch/sh/include/asm/kprobes.h
index 613644a758e8..036c3311233c 100644
--- a/arch/sh/include/asm/kprobes.h
+++ b/arch/sh/include/asm/kprobes.h
@@ -6,7 +6,7 @@
 #include <linux/types.h>
 #include <linux/ptrace.h>
 
-typedef u16 kprobe_opcode_t;
+typedef insn_size_t kprobe_opcode_t;
 #define BREAKPOINT_INSTRUCTION  0xc33a
 
 #define MAX_INSN_SIZE 16
diff --git a/arch/sh/include/asm/machvec.h b/arch/sh/include/asm/machvec.h
index 64b1c16a0f03..84dd37761f56 100644
--- a/arch/sh/include/asm/machvec.h
+++ b/arch/sh/include/asm/machvec.h
@@ -46,6 +46,9 @@ struct sh_machine_vector {
 
         void __iomem *(*mv_ioport_map)(unsigned long port, unsigned int size);
         void (*mv_ioport_unmap)(void __iomem *);
+
+        int (*mv_clk_init)(void);
+        int (*mv_mode_pins)(void);
 };
 
 extern struct sh_machine_vector sh_mv;
diff --git a/arch/sh/include/asm/pci.h b/arch/sh/include/asm/pci.h
index df1d383e18a5..ae0da6f48b6d 100644
--- a/arch/sh/include/asm/pci.h
+++ b/arch/sh/include/asm/pci.h
@@ -17,54 +17,29 @@
  * external) PCI controllers.
  */
 struct pci_channel {
-        struct pci_ops *pci_ops;
-        struct resource *io_resource;
-        struct resource *mem_resource;
-        int first_devfn;
-        int last_devfn;
-};
+        struct pci_channel      *next;
 
-/*
- * Each board initializes this array and terminates it with a NULL entry.
- */
-extern struct pci_channel board_pci_channels[];
+        struct pci_ops          *pci_ops;
+        struct resource         *io_resource;
+        struct resource         *mem_resource;
 
-#define PCIBIOS_MIN_IO          board_pci_channels->io_resource->start
-#define PCIBIOS_MIN_MEM         board_pci_channels->mem_resource->start
+        unsigned long           io_offset;
+        unsigned long           mem_offset;
 
-/*
- * I/O routine helpers
- */
-#if defined(CONFIG_CPU_SUBTYPE_SH7780) || defined(CONFIG_CPU_SUBTYPE_SH7785)
-#define PCI_IO_AREA             0xFE400000
-#define PCI_IO_SIZE             0x00400000
-#elif defined(CONFIG_CPU_SH5)
-extern unsigned long PCI_IO_AREA;
-#define PCI_IO_SIZE             0x00010000
-#else
-#define PCI_IO_AREA             0xFE240000
-#define PCI_IO_SIZE             0x00040000
-#endif
+        unsigned long           reg_base;
 
-#define PCI_MEM_SIZE            0x01000000
+        unsigned long           io_map_base;
+};
 
-#define SH4_PCIIOBR_MASK        0xFFFC0000
-#define pci_ioaddr(addr)        (PCI_IO_AREA + (addr & ~SH4_PCIIOBR_MASK))
+extern void register_pci_controller(struct pci_channel *hose);
 
-#if defined(CONFIG_PCI)
-#define is_pci_ioaddr(port)             \
-        (((port) >= PCIBIOS_MIN_IO) &&  \
-         ((port) < (PCIBIOS_MIN_IO + PCI_IO_SIZE)))
-#define is_pci_memaddr(port)            \
-        (((port) >= PCIBIOS_MIN_MEM) && \
-         ((port) < (PCIBIOS_MIN_MEM + PCI_MEM_SIZE)))
-#else
-#define is_pci_ioaddr(port)     (0)
-#define is_pci_memaddr(port)    (0)
-#endif
+extern unsigned long PCIBIOS_MIN_IO, PCIBIOS_MIN_MEM;
 
 struct pci_dev;
 
+#define HAVE_PCI_MMAP
+extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
+        enum pci_mmap_state mmap_state, int write_combine);
 extern void pcibios_set_master(struct pci_dev *dev);
 
 static inline void pcibios_penalize_isa_irq(int irq, int active)
@@ -114,31 +89,76 @@ static inline void pcibios_penalize_isa_irq(int irq, int active)
 #endif
 
 #ifdef CONFIG_PCI
+/*
+ * None of the SH PCI controllers support MWI, it is always treated as a
+ * direct memory write.
+ */
+#define PCI_DISABLE_MWI
+
 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
                                         enum pci_dma_burst_strategy *strat,
                                         unsigned long *strategy_parameter)
 {
-        *strat = PCI_DMA_BURST_INFINITY;
-        *strategy_parameter = ~0UL;
+        unsigned long cacheline_size;
+        u8 byte;
+
+        pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte);
+
+        if (byte == 0)
+                cacheline_size = L1_CACHE_BYTES;
+        else
+                cacheline_size = byte << 2;
+
+        *strat = PCI_DMA_BURST_MULTIPLE;
+        *strategy_parameter = cacheline_size;
 }
 #endif
 
+#ifdef CONFIG_SUPERH32
+/*
+ * If we're on an SH7751 or SH7780 PCI controller, PCI memory is mapped
+ * at the end of the address space in a special non-translatable area.
+ */
+#define PCI_MEM_FIXED_START     0xfd000000
+#define PCI_MEM_FIXED_END       (PCI_MEM_FIXED_START + 0x01000000)
+
+#define is_pci_memory_fixed_range(s, e) \
+        ((s) >= PCI_MEM_FIXED_START && (e) < PCI_MEM_FIXED_END)
+#else
+#define is_pci_memory_fixed_range(s, e) (0)
+#endif
+
 /* Board-specific fixup routines. */
-void pcibios_fixup(void);
-int pcibios_init_platform(void);
 int pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin);
 
-#ifdef CONFIG_PCI_AUTO
-int pciauto_assign_resources(int busno, struct pci_channel *hose);
-#endif
+extern void pcibios_resource_to_bus(struct pci_dev *dev,
+        struct pci_bus_region *region, struct resource *res);
 
-#endif /* __KERNEL__ */
+extern void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
+                                    struct pci_bus_region *region);
 
-/* generic pci stuff */
-#include <asm-generic/pci.h>
+static inline struct resource *
+pcibios_select_root(struct pci_dev *pdev, struct resource *res)
+{
+        struct resource *root = NULL;
+
+        if (res->flags & IORESOURCE_IO)
+                root = &ioport_resource;
+        if (res->flags & IORESOURCE_MEM)
+                root = &iomem_resource;
+
+        return root;
+}
+
+/* Chances are this interrupt is wired PC-style ...  */
+static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
+{
+        return channel ? 15 : 14;
+}
 
 /* generic DMA-mapping stuff */
 #include <asm-generic/pci-dma-compat.h>
 
+#endif /* __KERNEL__ */
 #endif /* __ASM_SH_PCI_H */
 
diff --git a/arch/sh/include/asm/pgtable.h b/arch/sh/include/asm/pgtable.h
index b517ae08b9c0..2a011b18090b 100644
--- a/arch/sh/include/asm/pgtable.h
+++ b/arch/sh/include/asm/pgtable.h
@@ -154,6 +154,10 @@ extern void kmap_coherent_init(void);
 #define kmap_coherent_init()    do { } while (0)
 #endif
 
+/* arch/sh/mm/mmap.c */
+#define HAVE_ARCH_UNMAPPED_AREA
+#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
+
 #include <asm-generic/pgtable.h>
 
 #endif /* __ASM_SH_PGTABLE_H */
diff --git a/arch/sh/include/asm/processor.h b/arch/sh/include/asm/processor.h
index 1fd58b421438..ff7daaf9a620 100644
--- a/arch/sh/include/asm/processor.h
+++ b/arch/sh/include/asm/processor.h
@@ -32,7 +32,7 @@ enum cpu_type {
 
         /* SH-4A types */
         CPU_SH7763, CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785, CPU_SH7786,
-        CPU_SH7723, CPU_SHX3,
+        CPU_SH7723, CPU_SH7724, CPU_SHX3,
 
         /* SH4AL-DSP types */
         CPU_SH7343, CPU_SH7722, CPU_SH7366,
@@ -94,6 +94,27 @@ extern struct pt_regs fake_swapper_regs;
 const char *get_cpu_subtype(struct sh_cpuinfo *c);
 extern const struct seq_operations cpuinfo_op;
 
+/* processor boot mode configuration */
+#define MODE_PIN0 (1 << 0)
+#define MODE_PIN1 (1 << 1)
+#define MODE_PIN2 (1 << 2)
+#define MODE_PIN3 (1 << 3)
+#define MODE_PIN4 (1 << 4)
+#define MODE_PIN5 (1 << 5)
+#define MODE_PIN6 (1 << 6)
+#define MODE_PIN7 (1 << 7)
+#define MODE_PIN8 (1 << 8)
+#define MODE_PIN9 (1 << 9)
+#define MODE_PIN10 (1 << 10)
+#define MODE_PIN11 (1 << 11)
+#define MODE_PIN12 (1 << 12)
+#define MODE_PIN13 (1 << 13)
+#define MODE_PIN14 (1 << 14)
+#define MODE_PIN15 (1 << 15)
+
+int generic_mode_pins(void);
+int test_mode_pin(int pin);
+
 #ifdef CONFIG_VSYSCALL
 int vsyscall_init(void);
 #else
diff --git a/arch/sh/include/asm/ptrace.h b/arch/sh/include/asm/ptrace.h
index 68e20ff9aa9b..1dc12cb44a2d 100644
--- a/arch/sh/include/asm/ptrace.h
+++ b/arch/sh/include/asm/ptrace.h
@@ -102,6 +102,11 @@ struct pt_dspregs {
 #define PTRACE_GETDSPREGS       55      /* DSP registers */
 #define PTRACE_SETDSPREGS       56
 
+#define PT_TEXT_END_ADDR        240
+#define PT_TEXT_ADDR            244     /* &(struct user)->start_code */
+#define PT_DATA_ADDR            248     /* &(struct user)->start_data */
+#define PT_TEXT_LEN             252
+
 #ifdef __KERNEL__
 #include <asm/addrspace.h>
 
diff --git a/arch/sh/include/asm/rtc.h b/arch/sh/include/asm/rtc.h
index f7b010d48af7..52b0c2dba979 100644
--- a/arch/sh/include/asm/rtc.h
+++ b/arch/sh/include/asm/rtc.h
@@ -6,6 +6,17 @@ extern void (*board_time_init)(void);
 extern void (*rtc_sh_get_time)(struct timespec *);
 extern int (*rtc_sh_set_time)(const time_t);
 
+/* some dummy definitions */
+#define RTC_BATT_BAD 0x100      /* battery bad */
+#define RTC_SQWE 0x08           /* enable square-wave output */
+#define RTC_DM_BINARY 0x04      /* all time/date values are BCD if clear */
+#define RTC_24H 0x02            /* 24 hour mode - else hours bit 7 means pm */
+#define RTC_DST_EN 0x01         /* auto switch DST - works f. USA only */
+
+struct rtc_time;
+unsigned int get_rtc_time(struct rtc_time *);
+int set_rtc_time(struct rtc_time *);
+
 #define RTC_CAP_4_DIGIT_YEAR    (1 << 0)
 
 struct sh_rtc_platform_info {
diff --git a/arch/sh/include/asm/spinlock.h b/arch/sh/include/asm/spinlock.h
index 60283565f89b..a28c9f0053fd 100644
--- a/arch/sh/include/asm/spinlock.h
+++ b/arch/sh/include/asm/spinlock.h
@@ -26,7 +26,7 @@
 #define __raw_spin_is_locked(x)         ((x)->lock <= 0)
 #define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
 #define __raw_spin_unlock_wait(x) \
-        do { cpu_relax(); } while ((x)->lock)
+        do { while (__raw_spin_is_locked(x)) cpu_relax(); } while (0)
 
 /*
  * Simple spin lock operations.  There are two variants, one clears IRQ's
diff --git a/arch/sh/include/asm/swab.h b/arch/sh/include/asm/swab.h
index e69315935107..0e08fe54ad71 100644
--- a/arch/sh/include/asm/swab.h
+++ b/arch/sh/include/asm/swab.h
@@ -14,15 +14,15 @@ static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
 {
         __asm__(
 #ifdef __SH5__
-                "byterev        %0, %0\n\t"
+                "byterev        %1, %0\n\t"
                 "shari          %0, 32, %0"
 #else
-                "swap.b         %0, %0\n\t"
+                "swap.b         %1, %0\n\t"
                 "swap.w         %0, %0\n\t"
                 "swap.b         %0, %0"
 #endif
                 : "=r" (x)
-                : "0" (x));
+                : "r" (x));
 
         return x;
 }
@@ -32,13 +32,13 @@ static inline __attribute_const__ __u16 __arch_swab16(__u16 x)
 {
         __asm__(
 #ifdef __SH5__
-                "byterev        %0, %0\n\t"
+                "byterev        %1, %0\n\t"
                 "shari          %0, 32, %0"
 #else
-                "swap.b         %0, %0"
+                "swap.b         %1, %0"
 #endif
                 : "=r" (x)
-                :  "0" (x));
+                :  "r" (x));
 
         return x;
 }
diff --git a/arch/sh/include/asm/system_32.h b/arch/sh/include/asm/system_32.h
index 240b31e1142c..6c68a51f1cc5 100644
--- a/arch/sh/include/asm/system_32.h
+++ b/arch/sh/include/asm/system_32.h
@@ -198,7 +198,7 @@ do {							\
 })
 #endif
 
-int handle_unaligned_access(opcode_t instruction, struct pt_regs *regs,
+int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs,
                             struct mem_access *ma);
 
 asmlinkage void do_address_error(struct pt_regs *regs,
diff --git a/arch/sh/include/asm/timer.h b/arch/sh/include/asm/timer.h
deleted file mode 100644
index 4c3b66e30af2..000000000000
--- a/arch/sh/include/asm/timer.h
+++ /dev/null
@@ -1,44 +0,0 @@
-#ifndef __ASM_SH_TIMER_H
-#define __ASM_SH_TIMER_H
-
-#include <linux/sysdev.h>
-#include <linux/clocksource.h>
-#include <cpu/timer.h>
-
-struct sys_timer_ops {
-        int (*init)(void);
-        int (*start)(void);
-        int (*stop)(void);
-#ifndef CONFIG_GENERIC_TIME
-        unsigned long (*get_offset)(void);
-#endif
-};
-
-struct sys_timer {
-        const char              *name;
-
-        struct sys_device       dev;
-        struct sys_timer_ops    *ops;
-};
-
-#define TICK_SIZE (tick_nsec / 1000)
-
-extern struct sys_timer tmu_timer, cmt_timer, mtu2_timer;
-extern struct sys_timer *sys_timer;
-
-#ifndef CONFIG_GENERIC_TIME
-static inline unsigned long get_timer_offset(void)
-{
-        return sys_timer->ops->get_offset();
-}
-#endif
-
-/* arch/sh/kernel/timers/timer.c */
-struct sys_timer *get_sys_timer(void);
-
-/* arch/sh/kernel/time.c */
-void handle_timer_tick(void);
-
-extern struct clocksource clocksource_sh;
-
-#endif /* __ASM_SH_TIMER_H */
diff --git a/arch/sh/include/asm/types.h b/arch/sh/include/asm/types.h
index beea4e6f8dfd..b13caca62a76 100644
--- a/arch/sh/include/asm/types.h
+++ b/arch/sh/include/asm/types.h
@@ -23,9 +23,9 @@ typedef unsigned short umode_t;
 typedef u32 dma_addr_t;
 
 #ifdef CONFIG_SUPERH32
-typedef u16 opcode_t;
+typedef u16 insn_size_t;
 #else
-typedef u32 opcode_t;
+typedef u32 insn_size_t;
 #endif
 
 #endif /* __ASSEMBLY__ */
diff --git a/arch/sh/include/asm/ubc.h b/arch/sh/include/asm/ubc.h
index a7b9028bbfbb..4ca4b7717371 100644
--- a/arch/sh/include/asm/ubc.h
+++ b/arch/sh/include/asm/ubc.h
@@ -42,12 +42,23 @@
 
 #define BRCR_CMFA               (1 << 15)
 #define BRCR_CMFB               (1 << 14)
+
+#if defined CONFIG_CPU_SH2A
+#define BRCR_CMFCA              (1 << 15)
+#define BRCR_CMFCB              (1 << 14)
+#define BRCR_CMFDA              (1 << 13)
+#define BRCR_CMFDB              (1 << 12)
+#define BRCR_PCBB               (1 << 6)        /* 1: after execution */
+#define BRCR_PCBA               (1 << 5)        /* 1: after execution */
+#define BRCR_PCTE               0
+#else
 #define BRCR_PCTE               (1 << 11)
 #define BRCR_PCBA               (1 << 10)       /* 1: after execution */
 #define BRCR_DBEB               (1 << 7)
 #define BRCR_PCBB               (1 << 6)
 #define BRCR_SEQ                (1 << 3)
 #define BRCR_UBDE               (1 << 0)
+#endif
 
 #ifndef __ASSEMBLY__
 /* arch/sh/kernel/cpu/ubc.S */
diff --git a/arch/sh/include/asm/unaligned-sh4a.h b/arch/sh/include/asm/unaligned-sh4a.h
index d8f89770275b..9f4dd252c981 100644
--- a/arch/sh/include/asm/unaligned-sh4a.h
+++ b/arch/sh/include/asm/unaligned-sh4a.h
@@ -3,9 +3,9 @@
 
 /*
  * SH-4A has support for unaligned 32-bit loads, and 32-bit loads only.
- * Support for 16 and 64-bit accesses are done through shifting and
- * masking relative to the endianness. Unaligned stores are not supported
- * by the instruction encoding, so these continue to use the packed
+ * Support for 64-bit accesses are done through shifting and masking
+ * relative to the endianness. Unaligned stores are not supported by the
+ * instruction encoding, so these continue to use the packed
  * struct.
  *
  * The same note as with the movli.l/movco.l pair applies here, as long
@@ -41,9 +41,9 @@ struct __una_u64 { u64 x __attribute__((packed)); };
 static inline u16 __get_unaligned_cpu16(const u8 *p)
 {
 #ifdef __LITTLE_ENDIAN
-        return __get_unaligned_cpu32(p) & 0xffff;
+        return p[0] | p[1] << 8;
 #else
-        return __get_unaligned_cpu32(p) >> 16;
+        return p[0] << 8 | p[1];
 #endif
 }
 
diff --git a/arch/sh/include/asm/unistd_32.h b/arch/sh/include/asm/unistd_32.h
index 2efb819e2db3..65197086a1c5 100644
--- a/arch/sh/include/asm/unistd_32.h
+++ b/arch/sh/include/asm/unistd_32.h
@@ -343,8 +343,9 @@
 #define __NR_inotify_init1      332
 #define __NR_preadv             333
 #define __NR_pwritev            334
+#define __NR_rt_tgsigqueueinfo  335
 
-#define NR_syscalls 335
+#define NR_syscalls 336
 
 #ifdef __KERNEL__
 
diff --git a/arch/sh/include/asm/unistd_64.h b/arch/sh/include/asm/unistd_64.h
index 6eb9d2934c0f..8014aea88ec3 100644
--- a/arch/sh/include/asm/unistd_64.h
+++ b/arch/sh/include/asm/unistd_64.h
@@ -383,10 +383,11 @@
 #define __NR_inotify_init1      360
 #define __NR_preadv             361
 #define __NR_pwritev            362
+#define __NR_rt_tgsigqueueinfo  363
 
 #ifdef __KERNEL__
 
-#define NR_syscalls 363
+#define NR_syscalls 364
 
 #define __ARCH_WANT_IPC_PARSE_VERSION
 #define __ARCH_WANT_OLD_READDIR
diff --git a/arch/sh/include/cpu-sh2a/cpu/ubc.h b/arch/sh/include/cpu-sh2a/cpu/ubc.h
index 8ce2fc1cf625..1192e1c761a7 100644
--- a/arch/sh/include/cpu-sh2a/cpu/ubc.h
+++ b/arch/sh/include/cpu-sh2a/cpu/ubc.h
@@ -1 +1,28 @@
-#include <cpu-sh2/cpu/ubc.h>
+/*
+ * SH-2A UBC definitions
+ *
+ * Copyright (C) 2008 Kieran Bingham
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#ifndef __ASM_CPU_SH2A_UBC_H
+#define __ASM_CPU_SH2A_UBC_H
+
+#define UBC_BARA                0xfffc0400
+#define UBC_BAMRA               0xfffc0404
+#define UBC_BBRA                0xfffc04a0      /* 16 bit access */
+#define UBC_BDRA                0xfffc0408
+#define UBC_BDMRA               0xfffc040c
+
+#define UBC_BARB                0xfffc0410
+#define UBC_BAMRB               0xfffc0414
+#define UBC_BBRB                0xfffc04b0      /* 16 bit access */
+#define UBC_BDRB                0xfffc0418
+#define UBC_BDMRB               0xfffc041c
+
+#define UBC_BRCR                0xfffc04c0
+
+#endif /* __ASM_CPU_SH2A_UBC_H */
diff --git a/arch/sh/include/cpu-sh3/cpu/timer.h b/arch/sh/include/cpu-sh3/cpu/timer.h
deleted file mode 100644
index 793acf12aa08..000000000000
--- a/arch/sh/include/cpu-sh3/cpu/timer.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- * include/asm-sh/cpu-sh3/timer.h
- *
- * Copyright (C) 2004 Lineo Solutions, Inc.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef __ASM_CPU_SH3_TIMER_H
-#define __ASM_CPU_SH3_TIMER_H
-
-/*
- * ---------------------------------------------------------------------------
- * TMU Common definitions for SH3 processors
- *      SH7706
- *      SH7709S
- *      SH7727
- *      SH7729R
- *      SH7710
- *      SH7720
- *      SH7710
- * ---------------------------------------------------------------------------
- */
-
-#if  !defined(CONFIG_CPU_SUBTYPE_SH7720) && !defined(CONFIG_CPU_SUBTYPE_SH7721)
-#define TMU_TOCR        0xfffffe90      /* Byte access */
-#endif
-
-#if defined(CONFIG_CPU_SUBTYPE_SH7710) || \
-    defined(CONFIG_CPU_SUBTYPE_SH7720) || \
-    defined(CONFIG_CPU_SUBTYPE_SH7721)
-#define TMU_012_TSTR    0xa412fe92      /* Byte access */
-
-#define TMU0_TCOR       0xa412fe94      /* Long access */
-#define TMU0_TCNT       0xa412fe98      /* Long access */
-#define TMU0_TCR        0xa412fe9c      /* Word access */
-
-#define TMU1_TCOR       0xa412fea0      /* Long access */
-#define TMU1_TCNT       0xa412fea4      /* Long access */
-#define TMU1_TCR        0xa412fea8      /* Word access */
-
-#define TMU2_TCOR       0xa412feac      /* Long access */
-#define TMU2_TCNT       0xa412feb0      /* Long access */
-#define TMU2_TCR        0xa412feb4      /* Word access */
-
-#else
-#define TMU_012_TSTR    0xfffffe92      /* Byte access */
-
-#define TMU0_TCOR       0xfffffe94      /* Long access */
-#define TMU0_TCNT       0xfffffe98      /* Long access */
-#define TMU0_TCR        0xfffffe9c      /* Word access */
-
-#define TMU1_TCOR       0xfffffea0      /* Long access */
-#define TMU1_TCNT       0xfffffea4      /* Long access */
-#define TMU1_TCR        0xfffffea8      /* Word access */
-
-#define TMU2_TCOR       0xfffffeac      /* Long access */
-#define TMU2_TCNT       0xfffffeb0      /* Long access */
-#define TMU2_TCR        0xfffffeb4      /* Word access */
-#if !defined(CONFIG_CPU_SUBTYPE_SH7720) && !defined(CONFIG_CPU_SUBTYPE_SH7721)
-#define TMU2_TCPR2      0xfffffeb8      /* Long access */
-#endif
-#endif
-
-#endif /* __ASM_CPU_SH3_TIMER_H */
-
diff --git a/arch/sh/include/cpu-sh4/cpu/cache.h b/arch/sh/include/cpu-sh4/cpu/cache.h
index 1c61ebf5c8e3..7bfb9e8b069c 100644
--- a/arch/sh/include/cpu-sh4/cpu/cache.h
+++ b/arch/sh/include/cpu-sh4/cpu/cache.h
@@ -38,5 +38,7 @@
 #define CACHE_IC_ADDRESS_ARRAY  0xf0000000
 #define CACHE_OC_ADDRESS_ARRAY  0xf4000000
 
+#define RAMCR                   0xFF000074
+
 #endif /* __ASM_CPU_SH4_CACHE_H */
 
diff --git a/arch/sh/include/cpu-sh4/cpu/freq.h b/arch/sh/include/cpu-sh4/cpu/freq.h
index 749d1c434337..ccf1d999db6d 100644
--- a/arch/sh/include/cpu-sh4/cpu/freq.h
+++ b/arch/sh/include/cpu-sh4/cpu/freq.h
@@ -25,6 +25,24 @@
 #elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \
       defined(CONFIG_CPU_SUBTYPE_SH7780)
 #define FRQCR                   0xffc80000
+#elif defined(CONFIG_CPU_SUBTYPE_SH7724)
+#define FRQCRA                  0xa4150000
+#define FRQCRB                  0xa4150004
+#define VCLKCR                  0xa4150048
+
+#define FCLKACR                 0xa4150008
+#define FCLKBCR                 0xa415000c
+#define FRQCR                   FRQCRA
+#define SCLKACR                 FCLKACR
+#define SCLKBCR                 FCLKBCR
+#define FCLKACR                 0xa4150008
+#define FCLKBCR                 0xa415000c
+#define IrDACLKCR               0xa4150018
+
+#define MSTPCR0                 0xa4150030
+#define MSTPCR1                 0xa4150034
+#define MSTPCR2                 0xa4150038
+
 #elif defined(CONFIG_CPU_SUBTYPE_SH7785)
 #define FRQCR0                  0xffc80000
 #define FRQCR1                  0xffc80004
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7722.h b/arch/sh/include/cpu-sh4/cpu/sh7722.h
index 4b3096f5307b..738ea43c5038 100644
--- a/arch/sh/include/cpu-sh4/cpu/sh7722.h
+++ b/arch/sh/include/cpu-sh4/cpu/sh7722.h
@@ -1,6 +1,20 @@
 #ifndef __ASM_SH7722_H__
 #define __ASM_SH7722_H__
 
+/* Boot Mode Pins:
+ *
+ * MD0: CPG - Clock Mode 0->3
+ * MD1: CPG - Clock Mode 0->3
+ * MD2: CPG - Reserved (L: Normal operation)
+ * MD3: BSC - Area0 Bus Width (16/32-bit) [CS0BCR.9,10]
+ * MD5: BSC - Endian Mode (L: Big, H: Little) [CMNCR.3]
+ * MD8: Test Mode
+ */
+
+/* Pin Function Controller:
+ * GPIO_FN_xx - GPIO used to select pin function
+ * GPIO_Pxx - GPIO mapped to real I/O pin on CPU
+ */
 enum {
         /* PTA */
         GPIO_PTA7, GPIO_PTA6, GPIO_PTA5, GPIO_PTA4,
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7723.h b/arch/sh/include/cpu-sh4/cpu/sh7723.h
index 9d2f6d7aa938..14c8ca936781 100644
--- a/arch/sh/include/cpu-sh4/cpu/sh7723.h
+++ b/arch/sh/include/cpu-sh4/cpu/sh7723.h
@@ -1,6 +1,20 @@
 #ifndef __ASM_SH7723_H__
 #define __ASM_SH7723_H__
 
+/* Boot Mode Pins:
+ *
+ * MD0: CPG - Clock Mode 0->3
+ * MD1: CPG - Clock Mode 0->3
+ * MD2: CPG - Reserved (L: Normal operation)
+ * MD3: BSC - Area0 Bus Width (16/32-bit) [CS0BCR.9,10]
+ * MD5: BSC - Endian Mode (L: Big, H: Little) [CMNCR.3]
+ * MD8: Test Mode
+ */
+
+/* Pin Function Controller:
+ * GPIO_FN_xx - GPIO used to select pin function
+ * GPIO_Pxx - GPIO mapped to real I/O pin on CPU
+ */
 enum {
         /* PTA */
         GPIO_PTA7, GPIO_PTA6, GPIO_PTA5, GPIO_PTA4,
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7724.h b/arch/sh/include/cpu-sh4/cpu/sh7724.h
new file mode 100644
index 000000000000..66fd1184359e
--- /dev/null
+++ b/arch/sh/include/cpu-sh4/cpu/sh7724.h
@@ -0,0 +1,269 @@
+#ifndef __ASM_SH7724_H__
+#define __ASM_SH7724_H__
+
+/* Boot Mode Pins:
+ *
+ * MD0: CPG - Clock Mode 0->7
+ * MD1: CPG - Clock Mode 0->7
+ * MD2: CPG - Clock Mode 0->7
+ * MD3: BSC - Area0 Bus Width (16/32-bit) [CS0BCR.9,10]
+ * MD5: BSC - Endian Mode (L: Big, H: Little) [CMNCR.3]
+ * MD8: Test Mode
+ */
+
+/* Pin Function Controller:
+ * GPIO_FN_xx - GPIO used to select pin function
+ * GPIO_Pxx - GPIO mapped to real I/O pin on CPU
+ */
+enum {
+        /* PTA */
+        GPIO_PTA7, GPIO_PTA6, GPIO_PTA5, GPIO_PTA4,
+        GPIO_PTA3, GPIO_PTA2, GPIO_PTA1, GPIO_PTA0,
+
+        /* PTB */
+        GPIO_PTB7, GPIO_PTB6, GPIO_PTB5, GPIO_PTB4,
+        GPIO_PTB3, GPIO_PTB2, GPIO_PTB1, GPIO_PTB0,
+
+        /* PTC */
+        GPIO_PTC7, GPIO_PTC6, GPIO_PTC5, GPIO_PTC4,
+        GPIO_PTC3, GPIO_PTC2, GPIO_PTC1, GPIO_PTC0,
+
+        /* PTD */
+        GPIO_PTD7, GPIO_PTD6, GPIO_PTD5, GPIO_PTD4,
+        GPIO_PTD3, GPIO_PTD2, GPIO_PTD1, GPIO_PTD0,
+
+        /* PTE */
+        GPIO_PTE7, GPIO_PTE6, GPIO_PTE5, GPIO_PTE4,
+        GPIO_PTE3, GPIO_PTE2, GPIO_PTE1, GPIO_PTE0,
+
+        /* PTF */
+        GPIO_PTF7, GPIO_PTF6, GPIO_PTF5, GPIO_PTF4,
+        GPIO_PTF3, GPIO_PTF2, GPIO_PTF1, GPIO_PTF0,
+
+        /* PTG */
+                              GPIO_PTG5, GPIO_PTG4,
+        GPIO_PTG3, GPIO_PTG2, GPIO_PTG1, GPIO_PTG0,
+
+        /* PTH */
+        GPIO_PTH7, GPIO_PTH6, GPIO_PTH5, GPIO_PTH4,
+        GPIO_PTH3, GPIO_PTH2, GPIO_PTH1, GPIO_PTH0,
+
+        /* PTJ */
+        GPIO_PTJ7, GPIO_PTJ6, GPIO_PTJ5,
+        GPIO_PTJ3, GPIO_PTJ2, GPIO_PTJ1, GPIO_PTJ0,
+
+        /* PTK */
+        GPIO_PTK7, GPIO_PTK6, GPIO_PTK5, GPIO_PTK4,
+        GPIO_PTK3, GPIO_PTK2, GPIO_PTK1, GPIO_PTK0,
+
+        /* PTL */
+        GPIO_PTL7, GPIO_PTL6, GPIO_PTL5, GPIO_PTL4,
+        GPIO_PTL3, GPIO_PTL2, GPIO_PTL1, GPIO_PTL0,
+
+        /* PTM */
+        GPIO_PTM7, GPIO_PTM6, GPIO_PTM5, GPIO_PTM4,
+        GPIO_PTM3, GPIO_PTM2, GPIO_PTM1, GPIO_PTM0,
+
+        /* PTN */
+        GPIO_PTN7, GPIO_PTN6, GPIO_PTN5, GPIO_PTN4,
+        GPIO_PTN3, GPIO_PTN2, GPIO_PTN1, GPIO_PTN0,
+
+        /* PTQ */
+        GPIO_PTQ7, GPIO_PTQ6, GPIO_PTQ5, GPIO_PTQ4,
+        GPIO_PTQ3, GPIO_PTQ2, GPIO_PTQ1, GPIO_PTQ0,
+
+        /* PTR */
+        GPIO_PTR7, GPIO_PTR6, GPIO_PTR5, GPIO_PTR4,
+        GPIO_PTR3, GPIO_PTR2, GPIO_PTR1, GPIO_PTR0,
+
+        /* PTS */
+                   GPIO_PTS6, GPIO_PTS5, GPIO_PTS4,
+        GPIO_PTS3, GPIO_PTS2, GPIO_PTS1, GPIO_PTS0,
+
+        /* PTT */
+        GPIO_PTT7, GPIO_PTT6, GPIO_PTT5, GPIO_PTT4,
+        GPIO_PTT3, GPIO_PTT2, GPIO_PTT1, GPIO_PTT0,
+
+        /* PTU */
+        GPIO_PTU7, GPIO_PTU6, GPIO_PTU5, GPIO_PTU4,
+        GPIO_PTU3, GPIO_PTU2, GPIO_PTU1, GPIO_PTU0,
+
+        /* PTV */
+        GPIO_PTV7, GPIO_PTV6, GPIO_PTV5, GPIO_PTV4,
+        GPIO_PTV3, GPIO_PTV2, GPIO_PTV1, GPIO_PTV0,
+
+        /* PTW */
+        GPIO_PTW7, GPIO_PTW6, GPIO_PTW5, GPIO_PTW4,
+        GPIO_PTW3, GPIO_PTW2, GPIO_PTW1, GPIO_PTW0,
+
+        /* PTX */
+        GPIO_PTX7, GPIO_PTX6, GPIO_PTX5, GPIO_PTX4,
+        GPIO_PTX3, GPIO_PTX2, GPIO_PTX1, GPIO_PTX0,
+
+        /* PTY */
+        GPIO_PTY7, GPIO_PTY6, GPIO_PTY5, GPIO_PTY4,
+        GPIO_PTY3, GPIO_PTY2, GPIO_PTY1, GPIO_PTY0,
+
+        /* PTZ */
+        GPIO_PTZ7, GPIO_PTZ6, GPIO_PTZ5, GPIO_PTZ4,
+        GPIO_PTZ3, GPIO_PTZ2, GPIO_PTZ1, GPIO_PTZ0,
+
+        /* BSC (PTA/PTB/PTJ/PTQ/PTR/PTT) */
+        GPIO_FN_D31, GPIO_FN_D30, GPIO_FN_D29, GPIO_FN_D28,
+        GPIO_FN_D27, GPIO_FN_D26, GPIO_FN_D25, GPIO_FN_D24,
+        GPIO_FN_D23, GPIO_FN_D22, GPIO_FN_D21, GPIO_FN_D20,
+        GPIO_FN_D19, GPIO_FN_D18, GPIO_FN_D17, GPIO_FN_D16,
+        GPIO_FN_D15, GPIO_FN_D14, GPIO_FN_D13, GPIO_FN_D12,
+        GPIO_FN_D11, GPIO_FN_D10, GPIO_FN_D9,  GPIO_FN_D8,
+        GPIO_FN_D7,  GPIO_FN_D6,  GPIO_FN_D5,  GPIO_FN_D4,
+        GPIO_FN_D3,  GPIO_FN_D2,  GPIO_FN_D1,  GPIO_FN_D0,
+        GPIO_FN_A25, GPIO_FN_A24, GPIO_FN_A23, GPIO_FN_A22,
+        GPIO_FN_CS6B_CE1B,  GPIO_FN_CS6A_CE2B,
+        GPIO_FN_CS5B_CE1A,  GPIO_FN_CS5A_CE2A,
+        GPIO_FN_WE3_ICIOWR, GPIO_FN_WE2_ICIORD,
+        GPIO_FN_IOIS16,     GPIO_FN_WAIT,
+        GPIO_FN_BS,
+
+        /* KEYSC (PTA/PTB)*/
+        GPIO_FN_KEYOUT5_IN5, GPIO_FN_KEYOUT4_IN6, GPIO_FN_KEYIN4,
+        GPIO_FN_KEYIN3,  GPIO_FN_KEYIN2,  GPIO_FN_KEYIN1,  GPIO_FN_KEYIN0,
+        GPIO_FN_KEYOUT3, GPIO_FN_KEYOUT2, GPIO_FN_KEYOUT1, GPIO_FN_KEYOUT0,
+
+        /* ATAPI (PTA/PTB/PTK/PTR/PTS/PTW) */
+        GPIO_FN_IDED15, GPIO_FN_IDED14, GPIO_FN_IDED13, GPIO_FN_IDED12,
+        GPIO_FN_IDED11, GPIO_FN_IDED10, GPIO_FN_IDED9,  GPIO_FN_IDED8,
+        GPIO_FN_IDED7,  GPIO_FN_IDED6,  GPIO_FN_IDED5,  GPIO_FN_IDED4,
+        GPIO_FN_IDED3,  GPIO_FN_IDED2,  GPIO_FN_IDED1,  GPIO_FN_IDED0,
+        GPIO_FN_IDEA2,     GPIO_FN_IDEA1,     GPIO_FN_IDEA0,  GPIO_FN_IDEIOWR,
+        GPIO_FN_IODREQ,    GPIO_FN_IDECS0,    GPIO_FN_IDECS1, GPIO_FN_IDEIORD,
+        GPIO_FN_DIRECTION, GPIO_FN_EXBUF_ENB, GPIO_FN_IDERST, GPIO_FN_IODACK,
+        GPIO_FN_IDEINT,    GPIO_FN_IDEIORDY,
+
+        /* TPU (PTB/PTR/PTS) */
+        GPIO_FN_TPUTO3, GPIO_FN_TPUTO2, GPIO_FN_TPUTO1, GPIO_FN_TPUTO0,
+        GPIO_FN_TPUTI3, GPIO_FN_TPUTI2,
+
+        /* LCDC (PTC/PTD/PTE/PTF/PTM/PTR) */
+        GPIO_FN_LCDD23, GPIO_FN_LCDD22, GPIO_FN_LCDD21, GPIO_FN_LCDD20,
+        GPIO_FN_LCDD19, GPIO_FN_LCDD18, GPIO_FN_LCDD17, GPIO_FN_LCDD16,
+        GPIO_FN_LCDD15, GPIO_FN_LCDD14, GPIO_FN_LCDD13, GPIO_FN_LCDD12,
+        GPIO_FN_LCDD11, GPIO_FN_LCDD10, GPIO_FN_LCDD9,  GPIO_FN_LCDD8,
+        GPIO_FN_LCDD7,  GPIO_FN_LCDD6,  GPIO_FN_LCDD5,  GPIO_FN_LCDD4,
+        GPIO_FN_LCDD3,  GPIO_FN_LCDD2,  GPIO_FN_LCDD1,  GPIO_FN_LCDD0,
+        GPIO_FN_LCDVSYN,  GPIO_FN_LCDDISP,  GPIO_FN_LCDRS,  GPIO_FN_LCDHSYN,
+        GPIO_FN_LCDCS,    GPIO_FN_LCDDON,   GPIO_FN_LCDDCK, GPIO_FN_LCDWR,
+        GPIO_FN_LCDVEPWC, GPIO_FN_LCDVCPWC, GPIO_FN_LCDRD,  GPIO_FN_LCDLCLK,
+
+        /* SCIF0 (PTF/PTM) */
+        GPIO_FN_SCIF0_TXD, GPIO_FN_SCIF0_RXD, GPIO_FN_SCIF0_SCK,
+
+        /* SCIF1 (PTL) */
+        GPIO_FN_SCIF1_SCK, GPIO_FN_SCIF1_RXD, GPIO_FN_SCIF1_TXD,
+
+        /* SCIF2 (PTE/PTF/PTN) with LCDC, VOU */
+        GPIO_FN_SCIF2_L_TXD, GPIO_FN_SCIF2_L_SCK, GPIO_FN_SCIF2_L_RXD,
+        GPIO_FN_SCIF2_V_TXD, GPIO_FN_SCIF2_V_SCK, GPIO_FN_SCIF2_V_RXD,
+
+        /* SCIF3 (PTL/PTN/PTZ) with VOU, IRQ */
+        GPIO_FN_SCIF3_V_SCK, GPIO_FN_SCIF3_V_RXD, GPIO_FN_SCIF3_V_TXD,
+        GPIO_FN_SCIF3_V_CTS, GPIO_FN_SCIF3_V_RTS,
+        GPIO_FN_SCIF3_I_SCK, GPIO_FN_SCIF3_I_RXD, GPIO_FN_SCIF3_I_TXD,
+        GPIO_FN_SCIF3_I_CTS, GPIO_FN_SCIF3_I_RTS,
+
+        /* SCIF4 (PTE) */
+        GPIO_FN_SCIF4_SCK, GPIO_FN_SCIF4_RXD, GPIO_FN_SCIF4_TXD,
+
+        /* SCIF5 (PTS) */
+        GPIO_FN_SCIF5_SCK, GPIO_FN_SCIF5_RXD, GPIO_FN_SCIF5_TXD,
+
+        /* FSI (PTE/PTU/PTV) */
+        GPIO_FN_FSIMCKB,   GPIO_FN_FSIMCKA,    GPIO_FN_FSIOASD,
+        GPIO_FN_FSIIABCK,  GPIO_FN_FSIIALRCK,  GPIO_FN_FSIOABCK,
+        GPIO_FN_FSIOALRCK, GPIO_FN_CLKAUDIOAO, GPIO_FN_FSIIBSD,
+        GPIO_FN_FSIOBSD,   GPIO_FN_FSIIBBCK,   GPIO_FN_FSIIBLRCK,
+        GPIO_FN_FSIOBBCK,  GPIO_FN_FSIOBLRCK,  GPIO_FN_CLKAUDIOBO,
+        GPIO_FN_FSIIASD,
+
+        /* AUD (PTG) */
+        GPIO_FN_AUDCK,   GPIO_FN_AUDSYNC, GPIO_FN_AUDATA3,
+        GPIO_FN_AUDATA2, GPIO_FN_AUDATA1, GPIO_FN_AUDATA0,
+
+        /* VIO (PTS) (common?) */
+        GPIO_FN_VIO_CKO,
+
+        /* VIO0 (PTH/PTK) */
+        GPIO_FN_VIO0_D15, GPIO_FN_VIO0_D14, GPIO_FN_VIO0_D13, GPIO_FN_VIO0_D12,
+        GPIO_FN_VIO0_D11, GPIO_FN_VIO0_D10, GPIO_FN_VIO0_D9,  GPIO_FN_VIO0_D8,
+        GPIO_FN_VIO0_D7,  GPIO_FN_VIO0_D6,  GPIO_FN_VIO0_D5,  GPIO_FN_VIO0_D4,
+        GPIO_FN_VIO0_D3,  GPIO_FN_VIO0_D2,  GPIO_FN_VIO0_D1,  GPIO_FN_VIO0_D0,
+        GPIO_FN_VIO0_VD,  GPIO_FN_VIO0_CLK,
+        GPIO_FN_VIO0_FLD, GPIO_FN_VIO0_HD,
+
+        /* VIO1 (PTK/PTS) */
+        GPIO_FN_VIO1_D7,  GPIO_FN_VIO1_D6, GPIO_FN_VIO1_D5, GPIO_FN_VIO1_D4,
+        GPIO_FN_VIO1_D3,  GPIO_FN_VIO1_D2, GPIO_FN_VIO1_D1, GPIO_FN_VIO1_D0,
+        GPIO_FN_VIO1_FLD, GPIO_FN_VIO1_HD, GPIO_FN_VIO1_VD, GPIO_FN_VIO1_CLK,
+
+        /* Eth  (PTL/PTN/PTX) */
+        GPIO_FN_RMII_RXD0,    GPIO_FN_RMII_RXD1,
+        GPIO_FN_RMII_TXD0,    GPIO_FN_RMII_TXD1,
+        GPIO_FN_RMII_REF_CLK, GPIO_FN_RMII_TX_EN,
+        GPIO_FN_RMII_RX_ER,   GPIO_FN_RMII_CRS_DV,
+        GPIO_FN_LNKSTA,       GPIO_FN_MDIO,
+        GPIO_FN_MDC,
+
+        /* System (PTJ) */
+        GPIO_FN_PDSTATUS, GPIO_FN_STATUS2, GPIO_FN_STATUS0,
+
+        /* VOU (PTL/PTM/PTN*/
+        GPIO_FN_DV_D15,  GPIO_FN_DV_D14, GPIO_FN_DV_D13,   GPIO_FN_DV_D12,
+        GPIO_FN_DV_D11,  GPIO_FN_DV_D10, GPIO_FN_DV_D9,    GPIO_FN_DV_D8,
+        GPIO_FN_DV_D7,   GPIO_FN_DV_D6,  GPIO_FN_DV_D5,    GPIO_FN_DV_D4,
+        GPIO_FN_DV_D3,   GPIO_FN_DV_D2,  GPIO_FN_DV_D1,    GPIO_FN_DV_D0,
+        GPIO_FN_DV_CLKI, GPIO_FN_DV_CLK, GPIO_FN_DV_VSYNC, GPIO_FN_DV_HSYNC,
+
+        /* MSIOF0 (PTL/PTM) */
+        GPIO_FN_MSIOF0_RXD,   GPIO_FN_MSIOF0_TXD,
+        GPIO_FN_MSIOF0_MCK,   GPIO_FN_MSIOF0_TSCK,
+        GPIO_FN_MSIOF0_SS1,   GPIO_FN_MSIOF0_SS2,
+        GPIO_FN_MSIOF0_TSYNC, GPIO_FN_MSIOF0_RSCK,
+        GPIO_FN_MSIOF0_RSYNC,
+
+        /* MSIOF1 (PTV) */
+        GPIO_FN_MSIOF1_RXD,   GPIO_FN_MSIOF1_TXD,
+        GPIO_FN_MSIOF1_MCK,   GPIO_FN_MSIOF1_TSCK,
+        GPIO_FN_MSIOF1_SS1,   GPIO_FN_MSIOF1_SS2,
+        GPIO_FN_MSIOF1_TSYNC, GPIO_FN_MSIOF1_RSCK,
+        GPIO_FN_MSIOF1_RSYNC,
+
+        /* DMAC (PTU/PTX) */
+        GPIO_FN_DMAC_DACK0, GPIO_FN_DMAC_DREQ0,
+        GPIO_FN_DMAC_DACK1, GPIO_FN_DMAC_DREQ1,
+
+        /* SDHI0 (PTY) */
+        GPIO_FN_SDHI0CD, GPIO_FN_SDHI0WP, GPIO_FN_SDHI0CMD, GPIO_FN_SDHI0CLK,
+        GPIO_FN_SDHI0D3, GPIO_FN_SDHI0D2, GPIO_FN_SDHI0D1,  GPIO_FN_SDHI0D0,
+
+        /* SDHI1 (PTW) */
+        GPIO_FN_SDHI1CD, GPIO_FN_SDHI1WP, GPIO_FN_SDHI1CMD, GPIO_FN_SDHI1CLK,
+        GPIO_FN_SDHI1D3, GPIO_FN_SDHI1D2, GPIO_FN_SDHI1D1,  GPIO_FN_SDHI1D0,
+
+        /* MMC (PTW/PTX)*/
+        GPIO_FN_MMC_D7,  GPIO_FN_MMC_D6,  GPIO_FN_MMC_D5, GPIO_FN_MMC_D4,
+        GPIO_FN_MMC_D3,  GPIO_FN_MMC_D2,  GPIO_FN_MMC_D1, GPIO_FN_MMC_D0,
+        GPIO_FN_MMC_CLK, GPIO_FN_MMC_CMD,
+
+        /* IrDA (PTX) */
+        GPIO_FN_IRDA_OUT, GPIO_FN_IRDA_IN,
+
+        /* TSIF (PTX) */
+        GPIO_FN_TSIF_TS0_SDAT, GPIO_FN_TSIF_TS0_SCK,
+        GPIO_FN_TSIF_TS0_SDEN, GPIO_FN_TSIF_TS0_SPSYNC,
+
+        /* IRQ (PTZ) */
+        GPIO_FN_INTC_IRQ7, GPIO_FN_INTC_IRQ6, GPIO_FN_INTC_IRQ5,
+        GPIO_FN_INTC_IRQ4, GPIO_FN_INTC_IRQ3, GPIO_FN_INTC_IRQ2,
+        GPIO_FN_INTC_IRQ1, GPIO_FN_INTC_IRQ0,
+};
+
+#endif /* __ASM_SH7724_H__ */
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7785.h b/arch/sh/include/cpu-sh4/cpu/sh7785.h
index e4006afb735e..9dc9d91e0a8e 100644
--- a/arch/sh/include/cpu-sh4/cpu/sh7785.h
+++ b/arch/sh/include/cpu-sh4/cpu/sh7785.h
@@ -1,6 +1,31 @@
 #ifndef __ASM_SH7785_H__
 #define __ASM_SH7785_H__
 
+/* Boot Mode Pins:
+ *
+ * MODE0: CPG - Initial Pck/Bck Frequency [FRQMR1]
+ * MODE1: CPG - Initial Uck/SHck/DDRck Frequency [FRQMR1]
+ * MODE2: CPG - Reserved (L: Normal operation)
+ * MODE3: CPG - Reserved (L: Normal operation)
+ * MODE4: CPG - Initial PLL setting (72x/36x)
+ * MODE5: LBSC - Area0 Memory Type / Bus Width [CS0BCR.8]
+ * MODE6: LBSC - Area0 Memory Type / Bus Width [CS0BCR.9]
+ * MODE7: LBSC - Area0 Memory Type / Bus Width [CS0BCR.3]
+ * MODE8: LBSC - Endian Mode (L: Big, H: Little) [BCR.31]
+ * MODE9: LBSC - Master/Slave Mode (L: Slave) [BCR.30]
+ * MODE10: CPG - Clock Input (L: Ext Clk, H: Crystal)
+ * MODE11: PCI - Pin Mode (LL: PCI host, LH: PCI slave)
+ * MODE12: PCI - Pin Mode (HL: Local bus, HH: DU)
+ * MODE13: Boot Address Mode (L: 29-bit, H: 32-bit)
+ * MODE14: Reserved (H: Normal operation)
+ *
+ * More information in sh7785 manual Rev.1.00, page 1628.
+ */
+
+/* Pin Function Controller:
+ * GPIO_FN_xx - GPIO used to select pin function
+ * GPIO_Pxx - GPIO mapped to real I/O pin on CPU
+ */
 enum {
         /* PA */
         GPIO_PA7, GPIO_PA6, GPIO_PA5, GPIO_PA4,
diff --git a/arch/sh/include/cpu-sh4/cpu/timer.h b/arch/sh/include/cpu-sh4/cpu/timer.h
deleted file mode 100644
index d1e796b96888..000000000000
--- a/arch/sh/include/cpu-sh4/cpu/timer.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * include/asm-sh/cpu-sh4/timer.h
- *
- * Copyright (C) 2004 Lineo Solutions, Inc.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef __ASM_CPU_SH4_TIMER_H
-#define __ASM_CPU_SH4_TIMER_H
-
-/*
- * ---------------------------------------------------------------------------
- * TMU Common definitions for SH4 processors
- *      SH7750S/SH7750R
- *      SH7751/SH7751R
- *      SH7760
- *      SH-X3
- * ---------------------------------------------------------------------------
- */
-#ifdef CONFIG_CPU_SUBTYPE_SHX3
-#define TMU_012_BASE    0xffc10000
-#define TMU_345_BASE    0xffc20000
-#else
-#define TMU_012_BASE    0xffd80000
-#define TMU_345_BASE    0xfe100000
-#endif
-
-#define TMU_TOCR        TMU_012_BASE    /* Not supported on all CPUs */
-
-#define TMU_012_TSTR    (TMU_012_BASE + 0x04)
-#define TMU_345_TSTR    (TMU_345_BASE + 0x04)
-
-#define TMU0_TCOR       (TMU_012_BASE + 0x08)
-#define TMU0_TCNT       (TMU_012_BASE + 0x0c)
-#define TMU0_TCR        (TMU_012_BASE + 0x10)
-
-#define TMU1_TCOR       (TMU_012_BASE + 0x14)
-#define TMU1_TCNT       (TMU_012_BASE + 0x18)
-#define TMU1_TCR        (TMU_012_BASE + 0x1c)
-
-#define TMU2_TCOR       (TMU_012_BASE + 0x20)
-#define TMU2_TCNT       (TMU_012_BASE + 0x24)
-#define TMU2_TCR        (TMU_012_BASE + 0x28)
-#define TMU2_TCPR       (TMU_012_BASE + 0x2c)
-
-#define TMU3_TCOR       (TMU_345_BASE + 0x08)
-#define TMU3_TCNT       (TMU_345_BASE + 0x0c)
-#define TMU3_TCR        (TMU_345_BASE + 0x10)
-
-#define TMU4_TCOR       (TMU_345_BASE + 0x14)
-#define TMU4_TCNT       (TMU_345_BASE + 0x18)
-#define TMU4_TCR        (TMU_345_BASE + 0x1c)
-
-#define TMU5_TCOR       (TMU_345_BASE + 0x20)
-#define TMU5_TCNT       (TMU_345_BASE + 0x24)
-#define TMU5_TCR        (TMU_345_BASE + 0x28)
-
-#endif /* __ASM_CPU_SH4_TIMER_H */
diff --git a/arch/sh/include/cpu-sh5/cpu/irq.h b/arch/sh/include/cpu-sh5/cpu/irq.h
index f0f0756e6e84..0ccf257a72d1 100644
--- a/arch/sh/include/cpu-sh5/cpu/irq.h
+++ b/arch/sh/include/cpu-sh5/cpu/irq.h
@@ -111,7 +111,6 @@
 #define TOP_PRIORITY    15
 
 extern int intc_evt_to_irq[(0xE20/0x20)+1];
-int intc_irq_describe(char* p, int irq);
 extern int platform_int_priority[NR_INTC_IRQS];
 
 #endif /* __ASM_SH_CPU_SH5_IRQ_H */
diff --git a/arch/sh/include/mach-common/mach/sh7785lcr.h b/arch/sh/include/mach-common/mach/sh7785lcr.h
index 1ce27d5c7491..90011d435f30 100644
--- a/arch/sh/include/mach-common/mach/sh7785lcr.h
+++ b/arch/sh/include/mach-common/mach/sh7785lcr.h
@@ -9,11 +9,11 @@
  * -----------------------------+---------------+---------------
  * 0x00000000 - 0x03ffffff(CS0) | NOR Flash     | NOR Flash
  * 0x04000000 - 0x05ffffff(CS1) | PLD           | PLD
- * 0x06000000 - 0x07ffffff(CS1) | reserved      | I2C
+ * 0x06000000 - 0x07ffffff(CS1) | I2C           | I2C
  * 0x08000000 - 0x0bffffff(CS2) | USB           | DDR SDRAM
  * 0x0c000000 - 0x0fffffff(CS3) | SD            | DDR SDRAM
  * 0x10000000 - 0x13ffffff(CS4) | SM107         | SM107
- * 0x14000000 - 0x17ffffff(CS5) | I2C           | USB
+ * 0x14000000 - 0x17ffffff(CS5) | reserved      | USB
  * 0x18000000 - 0x1bffffff(CS6) | reserved      | SD
  * 0x40000000 - 0x5fffffff      | DDR SDRAM     | (cannot use)
  *
@@ -32,6 +32,9 @@
 #define PLD_VERSR               (PLD_BASE_ADDR + 0x0c)
 #define PLD_MMSR                (PLD_BASE_ADDR + 0x0e)
 
+#define PCA9564_ADDR            0x06000000      /* I2C */
+#define PCA9564_SIZE            0x00000100
+
 #define SM107_MEM_ADDR          0x10000000
 #define SM107_MEM_SIZE          0x00e00000
 #define SM107_REG_ADDR          0x13e00000
@@ -40,16 +43,13 @@
 #if defined(CONFIG_SH_SH7785LCR_29BIT_PHYSMAPS)
 #define R8A66597_ADDR           0x14000000      /* USB */
 #define CG200_ADDR              0x18000000      /* SD */
-#define PCA9564_ADDR            0x06000000      /* I2C */
 #else
 #define R8A66597_ADDR           0x08000000
 #define CG200_ADDR              0x0c000000
-#define PCA9564_ADDR            0x14000000
 #endif
 
 #define R8A66597_SIZE           0x00000100
 #define CG200_SIZE              0x00010000
-#define PCA9564_SIZE            0x00000100
 
 #endif  /* __ASM_SH_RENESAS_SH7785LCR_H */
 
diff --git a/arch/sh/include/mach-dreamcast/mach/pci.h b/arch/sh/include/mach-dreamcast/mach/pci.h
index 75fc9009e092..0314d975e626 100644
--- a/arch/sh/include/mach-dreamcast/mach/pci.h
+++ b/arch/sh/include/mach-dreamcast/mach/pci.h
@@ -21,5 +21,7 @@
 
 #define GAPSPCI_IRQ             HW_EVENT_EXTERNAL
 
+extern struct pci_ops gapspci_pci_ops;
+
 #endif /* __ASM_SH_DREAMCAST_PCI_H */
 
diff --git a/arch/sh/include/mach-se/mach/se7724.h b/arch/sh/include/mach-se/mach/se7724.h
new file mode 100644
index 000000000000..74164b60d0db
--- /dev/null
+++ b/arch/sh/include/mach-se/mach/se7724.h
@@ -0,0 +1,67 @@
+#ifndef __ASM_SH_SE7724_H
+#define __ASM_SH_SE7724_H
+
+/*
+ * linux/include/asm-sh/se7724.h
+ *
+ * Copyright (C) 2009 Renesas Solutions Corp.
+ *
+ * Kuninori Morimoto <morimoto.kuninori@renesas.com>
+ *
+ * Hitachi UL SolutionEngine 7724 Support.
+ *
+ * Based on se7722.h
+ * Copyright (C) 2007  Nobuhiro Iwamatsu
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ */
+#include <asm/addrspace.h>
+
+#define PA_LED          (0xba203000)    /* 8bit LED */
+#define IRQ_MODE        (0xba200010)
+#define IRQ0_SR         (0xba200014)
+#define IRQ1_SR         (0xba200018)
+#define IRQ2_SR         (0xba20001c)
+#define IRQ0_MR         (0xba200020)
+#define IRQ1_MR         (0xba200024)
+#define IRQ2_MR         (0xba200028)
+
+/* IRQ */
+#define IRQ0_IRQ        32
+#define IRQ1_IRQ        33
+#define IRQ2_IRQ        34
+
+/* Bits in IRQ012 registers */
+#define SE7724_FPGA_IRQ_BASE    220
+
+/* IRQ0 */
+#define IRQ0_BASE       SE7724_FPGA_IRQ_BASE
+#define IRQ0_KEY        (IRQ0_BASE + 12)
+#define IRQ0_RMII       (IRQ0_BASE + 13)
+#define IRQ0_SMC        (IRQ0_BASE + 14)
+#define IRQ0_MASK       0x7fff
+#define IRQ0_END        IRQ0_SMC
+/* IRQ1 */
+#define IRQ1_BASE       (IRQ0_END + 1)
+#define IRQ1_TS         (IRQ1_BASE + 0)
+#define IRQ1_MASK       0x0001
+#define IRQ1_END        IRQ1_TS
+/* IRQ2 */
+#define IRQ2_BASE       (IRQ1_END + 1)
+#define IRQ2_USB0       (IRQ1_BASE + 0)
+#define IRQ2_USB1       (IRQ1_BASE + 1)
+#define IRQ2_MASK       0x0003
+#define IRQ2_END        IRQ2_USB1
+
+#define SE7724_FPGA_IRQ_NR      (IRQ2_END - IRQ0_BASE)
+
+/* arch/sh/boards/se/7724/irq.c */
+void init_se7724_IRQ(void);
+
+#define __IO_PREFIX             se7724
+#include <asm/io_generic.h>
+
+#endif  /* __ASM_SH_SE7724_H */
diff --git a/arch/sh/kernel/Makefile_32 b/arch/sh/kernel/Makefile_32
index 82a3a150c00d..9411e3e31e68 100644
--- a/arch/sh/kernel/Makefile_32
+++ b/arch/sh/kernel/Makefile_32
@@ -11,10 +11,10 @@ endif
 
 obj-y   := debugtraps.o idle.o io.o io_generic.o irq.o                  \
            machvec.o process_32.o ptrace_32.o setup.o signal_32.o       \
-           sys_sh.o sys_sh32.o syscalls_32.o time_32.o topology.o       \
+           sys_sh.o sys_sh32.o syscalls_32.o time.o topology.o  \
            traps.o traps_32.o
 
-obj-y                           += cpu/ timers/
+obj-y                           += cpu/
 obj-$(CONFIG_VSYSCALL)          += vsyscall/
 obj-$(CONFIG_SMP)               += smp.o
 obj-$(CONFIG_SH_STANDARD_BIOS)  += sh_bios.o
@@ -32,4 +32,6 @@ obj-$(CONFIG_DYNAMIC_FTRACE)	+= ftrace.o
 obj-$(CONFIG_DUMP_CODE)         += disassemble.o
 obj-$(CONFIG_HIBERNATION)       += swsusp.o
 
+obj-$(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)     += localtimer.o
+
 EXTRA_CFLAGS += -Werror
diff --git a/arch/sh/kernel/Makefile_64 b/arch/sh/kernel/Makefile_64
index fe425d7f6871..67b9f6c6326b 100644
--- a/arch/sh/kernel/Makefile_64
+++ b/arch/sh/kernel/Makefile_64
@@ -2,19 +2,18 @@ extra-y	:= head_64.o init_task.o vmlinux.lds
 
 obj-y   := debugtraps.o idle.o io.o io_generic.o irq.o machvec.o process_64.o \
            ptrace_64.o setup.o signal_64.o sys_sh.o sys_sh64.o \
-           syscalls_64.o time_64.o topology.o traps.o traps_64.o
+           syscalls_64.o time.o topology.o traps.o traps_64.o
 
-obj-y                           += cpu/ timers/
-obj-$(CONFIG_VSYSCALL)          += vsyscall/
+obj-y                           += cpu/
 obj-$(CONFIG_SMP)               += smp.o
-obj-$(CONFIG_SH_STANDARD_BIOS)  += sh_bios.o
 obj-$(CONFIG_SH_CPU_FREQ)       += cpufreq.o
 obj-$(CONFIG_MODULES)           += sh_ksyms_64.o module.o
 obj-$(CONFIG_EARLY_PRINTK)      += early_printk.o
-obj-$(CONFIG_KEXEC)             += machine_kexec.o relocate_kernel.o
 obj-$(CONFIG_CRASH_DUMP)        += crash_dump.o
 obj-$(CONFIG_STACKTRACE)        += stacktrace.o
 obj-$(CONFIG_IO_TRAPPED)        += io_trapped.o
 obj-$(CONFIG_GENERIC_GPIO)      += gpio.o
 
+obj-$(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)     += localtimer.o
+
 EXTRA_CFLAGS += -Werror
diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile
index 2600641a483f..eecad7cbd61e 100644
--- a/arch/sh/kernel/cpu/Makefile
+++ b/arch/sh/kernel/cpu/Makefile
@@ -17,5 +17,6 @@ obj-$(CONFIG_ARCH_SHMOBILE)	+= shmobile/
 
 obj-$(CONFIG_UBC_WAKEUP)        += ubc.o
 obj-$(CONFIG_SH_ADC)            += adc.o
+obj-$(CONFIG_SH_CLK_CPG)        += clock-cpg.o
 
 obj-y   += irq/ init.o clock.o
diff --git a/arch/sh/kernel/cpu/clock-cpg.c b/arch/sh/kernel/cpu/clock-cpg.c
new file mode 100644
index 000000000000..275942e58e4f
--- /dev/null
+++ b/arch/sh/kernel/cpu/clock-cpg.c
@@ -0,0 +1,256 @@
+#include <linux/clk.h>
+#include <linux/compiler.h>
+#include <linux/bootmem.h>
+#include <linux/io.h>
+#include <asm/clock.h>
+
+static int sh_clk_mstp32_enable(struct clk *clk)
+{
+        __raw_writel(__raw_readl(clk->enable_reg) & ~(1 << clk->enable_bit),
+                     clk->enable_reg);
+        return 0;
+}
+
+static void sh_clk_mstp32_disable(struct clk *clk)
+{
+        __raw_writel(__raw_readl(clk->enable_reg) | (1 << clk->enable_bit),
+                     clk->enable_reg);
+}
+
+static struct clk_ops sh_clk_mstp32_clk_ops = {
+        .enable         = sh_clk_mstp32_enable,
+        .disable        = sh_clk_mstp32_disable,
+        .recalc         = followparent_recalc,
+};
+
+int __init sh_clk_mstp32_register(struct clk *clks, int nr)
+{
+        struct clk *clkp;
+        int ret = 0;
+        int k;
+
+        for (k = 0; !ret && (k < nr); k++) {
+                clkp = clks + k;
+                clkp->ops = &sh_clk_mstp32_clk_ops;
+                ret |= clk_register(clkp);
+        }
+
+        return ret;
+}
+
+static long sh_clk_div_round_rate(struct clk *clk, unsigned long rate)
+{
+        return clk_rate_table_round(clk, clk->freq_table, rate);
+}
+
+static int sh_clk_div6_divisors[64] = {
+        1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16,
+        17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32,
+        33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48,
+        49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64
+};
+
+static struct clk_div_mult_table sh_clk_div6_table = {
+        .divisors = sh_clk_div6_divisors,
+        .nr_divisors = ARRAY_SIZE(sh_clk_div6_divisors),
+};
+
+static unsigned long sh_clk_div6_recalc(struct clk *clk)
+{
+        struct clk_div_mult_table *table = &sh_clk_div6_table;
+        unsigned int idx;
+
+        clk_rate_table_build(clk, clk->freq_table, table->nr_divisors,
+                             table, NULL);
+
+        idx = __raw_readl(clk->enable_reg) & 0x003f;
+
+        return clk->freq_table[idx].frequency;
+}
+
+static int sh_clk_div6_set_rate(struct clk *clk,
+                                unsigned long rate, int algo_id)
+{
+        unsigned long value;
+        int idx;
+
+        idx = clk_rate_table_find(clk, clk->freq_table, rate);
+        if (idx < 0)
+                return idx;
+
+        value = __raw_readl(clk->enable_reg);
+        value &= ~0x3f;
+        value |= idx;
+        __raw_writel(value, clk->enable_reg);
+        return 0;
+}
+
+static int sh_clk_div6_enable(struct clk *clk)
+{
+        unsigned long value;
+        int ret;
+
+        ret = sh_clk_div6_set_rate(clk, clk->rate, 0);
+        if (ret == 0) {
+                value = __raw_readl(clk->enable_reg);
+                value &= ~0x100; /* clear stop bit to enable clock */
+                __raw_writel(value, clk->enable_reg);
+        }
+        return ret;
+}
+
+static void sh_clk_div6_disable(struct clk *clk)
+{
+        unsigned long value;
+
+        value = __raw_readl(clk->enable_reg);
+        value |= 0x100; /* stop clock */
+        value |= 0x3f; /* VDIV bits must be non-zero, overwrite divider */
+        __raw_writel(value, clk->enable_reg);
+}
+
+static struct clk_ops sh_clk_div6_clk_ops = {
+        .recalc         = sh_clk_div6_recalc,
+        .round_rate     = sh_clk_div_round_rate,
+        .set_rate       = sh_clk_div6_set_rate,
+        .enable         = sh_clk_div6_enable,
+        .disable        = sh_clk_div6_disable,
+};
+
+int __init sh_clk_div6_register(struct clk *clks, int nr)
+{
+        struct clk *clkp;
+        void *freq_table;
+        int nr_divs = sh_clk_div6_table.nr_divisors;
+        int freq_table_size = sizeof(struct cpufreq_frequency_table);
+        int ret = 0;
+        int k;
+
+        freq_table_size *= (nr_divs + 1);
+
+        freq_table = alloc_bootmem(freq_table_size * nr);
+        if (!freq_table)
+                return -ENOMEM;
+
+        for (k = 0; !ret && (k < nr); k++) {
+                clkp = clks + k;
+
+                clkp->ops = &sh_clk_div6_clk_ops;
+                clkp->id = -1;
+                clkp->freq_table = freq_table + (k * freq_table_size);
+                clkp->freq_table[nr_divs].frequency = CPUFREQ_TABLE_END;
+
+                ret = clk_register(clkp);
+        }
+
+        return ret;
+}
+
+static unsigned long sh_clk_div4_recalc(struct clk *clk)
+{
+        struct clk_div_mult_table *table = clk->priv;
+        unsigned int idx;
+
+        clk_rate_table_build(clk, clk->freq_table, table->nr_divisors,
+                             table, &clk->arch_flags);
+
+        idx = (__raw_readl(clk->enable_reg) >> clk->enable_bit) & 0x000f;
+
+        return clk->freq_table[idx].frequency;
+}
+
+static struct clk_ops sh_clk_div4_clk_ops = {
+        .recalc         = sh_clk_div4_recalc,
+        .round_rate     = sh_clk_div_round_rate,
+};
+
+int __init sh_clk_div4_register(struct clk *clks, int nr,
+                                struct clk_div_mult_table *table)
+{
+        struct clk *clkp;
+        void *freq_table;
+        int nr_divs = table->nr_divisors;
+        int freq_table_size = sizeof(struct cpufreq_frequency_table);
+        int ret = 0;
+        int k;
+
+        freq_table_size *= (nr_divs + 1);
+
+        freq_table = alloc_bootmem(freq_table_size * nr);
+        if (!freq_table)
+                return -ENOMEM;
+
+        for (k = 0; !ret && (k < nr); k++) {
+                clkp = clks + k;
+
+                clkp->ops = &sh_clk_div4_clk_ops;
+                clkp->id = -1;
+                clkp->priv = table;
+
+                clkp->freq_table = freq_table + (k * freq_table_size);
+                clkp->freq_table[nr_divs].frequency = CPUFREQ_TABLE_END;
+
+                ret = clk_register(clkp);
+        }
+
+        return ret;
+}
+
+#ifdef CONFIG_SH_CLK_CPG_LEGACY
+static struct clk master_clk = {
+        .name           = "master_clk",
+        .flags          = CLK_ENABLE_ON_INIT,
+        .rate           = CONFIG_SH_PCLK_FREQ,
+};
+
+static struct clk peripheral_clk = {
+        .name           = "peripheral_clk",
+        .parent         = &master_clk,
+        .flags          = CLK_ENABLE_ON_INIT,
+};
+
+static struct clk bus_clk = {
+        .name           = "bus_clk",
+        .parent         = &master_clk,
+        .flags          = CLK_ENABLE_ON_INIT,
+};
+
+static struct clk cpu_clk = {
+        .name           = "cpu_clk",
+        .parent         = &master_clk,
+        .flags          = CLK_ENABLE_ON_INIT,
+};
+
+/*
+ * The ordering of these clocks matters, do not change it.
+ */
+static struct clk *onchip_clocks[] = {
+        &master_clk,
+        &peripheral_clk,
+        &bus_clk,
+        &cpu_clk,
+};
+
+int __init __deprecated cpg_clk_init(void)
+{
+        int i, ret = 0;
+
+        for (i = 0; i < ARRAY_SIZE(onchip_clocks); i++) {
+                struct clk *clk = onchip_clocks[i];
+                arch_init_clk_ops(&clk->ops, i);
+                if (clk->ops)
+                        ret |= clk_register(clk);
+        }
+
+        return ret;
+}
+
+/*
+ * Placeholder for compatability, until the lazy CPUs do this
+ * on their own.
+ */
+int __init __weak arch_clk_init(void)
+{
+        return cpg_clk_init();
+}
+#endif /* CONFIG_SH_CPG_CLK_LEGACY */
diff --git a/arch/sh/kernel/cpu/clock.c b/arch/sh/kernel/cpu/clock.c
index 1dc896483b59..f3a46be2ae81 100644
--- a/arch/sh/kernel/cpu/clock.c
+++ b/arch/sh/kernel/cpu/clock.c
@@ -1,15 +1,19 @@
 /*
  * arch/sh/kernel/cpu/clock.c - SuperH clock framework
  *
- *  Copyright (C) 2005, 2006, 2007  Paul Mundt
+ *  Copyright (C) 2005 - 2009  Paul Mundt
  *
  * This clock framework is derived from the OMAP version by:
  *
- *      Copyright (C) 2004 - 2005 Nokia Corporation
+ *      Copyright (C) 2004 - 2008 Nokia Corporation
  *      Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
  *
  *  Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com>
  *
+ *  With clkdev bits:
+ *
+ *      Copyright (C) 2008 Russell King.
+ *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
@@ -19,134 +23,159 @@
 #include <linux/module.h>
 #include <linux/mutex.h>
 #include <linux/list.h>
-#include <linux/kref.h>
 #include <linux/kobject.h>
 #include <linux/sysdev.h>
 #include <linux/seq_file.h>
 #include <linux/err.h>
 #include <linux/platform_device.h>
-#include <linux/proc_fs.h>
+#include <linux/debugfs.h>
+#include <linux/cpufreq.h>
 #include <asm/clock.h>
-#include <asm/timer.h>
+#include <asm/machvec.h>
 
 static LIST_HEAD(clock_list);
 static DEFINE_SPINLOCK(clock_lock);
 static DEFINE_MUTEX(clock_list_sem);
 
-/*
- * Each subtype is expected to define the init routines for these clocks,
- * as each subtype (or processor family) will have these clocks at the
- * very least. These are all provided through the CPG, which even some of
- * the more quirky parts (such as ST40, SH4-202, etc.) still have.
- *
- * The processor-specific code is expected to register any additional
- * clock sources that are of interest.
- */
-static struct clk master_clk = {
-        .name           = "master_clk",
-        .flags          = CLK_ALWAYS_ENABLED | CLK_RATE_PROPAGATES,
-        .rate           = CONFIG_SH_PCLK_FREQ,
-};
+void clk_rate_table_build(struct clk *clk,
+                          struct cpufreq_frequency_table *freq_table,
+                          int nr_freqs,
+                          struct clk_div_mult_table *src_table,
+                          unsigned long *bitmap)
+{
+        unsigned long mult, div;
+        unsigned long freq;
+        int i;
 
-static struct clk module_clk = {
-        .name           = "module_clk",
-        .parent         = &master_clk,
-        .flags          = CLK_ALWAYS_ENABLED | CLK_RATE_PROPAGATES,
-};
+        for (i = 0; i < nr_freqs; i++) {
+                div = 1;
+                mult = 1;
 
-static struct clk bus_clk = {
-        .name           = "bus_clk",
-        .parent         = &master_clk,
-        .flags          = CLK_ALWAYS_ENABLED | CLK_RATE_PROPAGATES,
-};
+                if (src_table->divisors && i < src_table->nr_divisors)
+                        div = src_table->divisors[i];
 
-static struct clk cpu_clk = {
-        .name           = "cpu_clk",
-        .parent         = &master_clk,
-        .flags          = CLK_ALWAYS_ENABLED,
-};
+                if (src_table->multipliers && i < src_table->nr_multipliers)
+                        mult = src_table->multipliers[i];
 
-/*
- * The ordering of these clocks matters, do not change it.
- */
-static struct clk *onchip_clocks[] = {
-        &master_clk,
-        &module_clk,
-        &bus_clk,
-        &cpu_clk,
-};
+                if (!div || !mult || (bitmap && !test_bit(i, bitmap)))
+                        freq = CPUFREQ_ENTRY_INVALID;
+                else
+                        freq = clk->parent->rate * mult / div;
 
-static void propagate_rate(struct clk *clk)
+                freq_table[i].index = i;
+                freq_table[i].frequency = freq;
+        }
+
+        /* Termination entry */
+        freq_table[i].index = i;
+        freq_table[i].frequency = CPUFREQ_TABLE_END;
+}
+
+long clk_rate_table_round(struct clk *clk,
+                          struct cpufreq_frequency_table *freq_table,
+                          unsigned long rate)
 {
-        struct clk *clkp;
+        unsigned long rate_error, rate_error_prev = ~0UL;
+        unsigned long rate_best_fit = rate;
+        unsigned long highest, lowest;
+        int i;
+
+        highest = lowest = 0;
+
+        for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
+                unsigned long freq = freq_table[i].frequency;
 
-        list_for_each_entry(clkp, &clock_list, node) {
-                if (likely(clkp->parent != clk))
+                if (freq == CPUFREQ_ENTRY_INVALID)
                         continue;
-                if (likely(clkp->ops && clkp->ops->recalc))
-                        clkp->ops->recalc(clkp);
-                if (unlikely(clkp->flags & CLK_RATE_PROPAGATES))
-                        propagate_rate(clkp);
+
+                if (freq > highest)
+                        highest = freq;
+                if (freq < lowest)
+                        lowest = freq;
+
+                rate_error = abs(freq - rate);
+                if (rate_error < rate_error_prev) {
+                        rate_best_fit = freq;
+                        rate_error_prev = rate_error;
+                }
+
+                if (rate_error == 0)
+                        break;
         }
+
+        if (rate >= highest)
+                rate_best_fit = highest;
+        if (rate <= lowest)
+                rate_best_fit = lowest;
+
+        return rate_best_fit;
 }
 
-static int __clk_enable(struct clk *clk)
+int clk_rate_table_find(struct clk *clk,
+                        struct cpufreq_frequency_table *freq_table,
+                        unsigned long rate)
 {
-        /*
-         * See if this is the first time we're enabling the clock, some
-         * clocks that are always enabled still require "special"
-         * initialization. This is especially true if the clock mode
-         * changes and the clock needs to hunt for the proper set of
-         * divisors to use before it can effectively recalc.
-         */
-        if (unlikely(atomic_read(&clk->kref.refcount) == 1))
-                if (clk->ops && clk->ops->init)
-                        clk->ops->init(clk);
+        int i;
 
-        kref_get(&clk->kref);
+        for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
+                unsigned long freq = freq_table[i].frequency;
 
-        if (clk->flags & CLK_ALWAYS_ENABLED)
-                return 0;
+                if (freq == CPUFREQ_ENTRY_INVALID)
+                        continue;
 
-        if (likely(clk->ops && clk->ops->enable))
-                clk->ops->enable(clk);
+                if (freq == rate)
+                        return i;
+        }
 
-        return 0;
+        return -ENOENT;
 }
 
-int clk_enable(struct clk *clk)
+/* Used for clocks that always have same value as the parent clock */
+unsigned long followparent_recalc(struct clk *clk)
 {
-        unsigned long flags;
-        int ret;
-
-        if (!clk)
-                return -EINVAL;
+        return clk->parent ? clk->parent->rate : 0;
+}
 
-        clk_enable(clk->parent);
+int clk_reparent(struct clk *child, struct clk *parent)
+{
+        list_del_init(&child->sibling);
+        if (parent)
+                list_add(&child->sibling, &parent->children);
+        child->parent = parent;
 
-        spin_lock_irqsave(&clock_lock, flags);
-        ret = __clk_enable(clk);
-        spin_unlock_irqrestore(&clock_lock, flags);
+        /* now do the debugfs renaming to reattach the child
+           to the proper parent */
 
-        return ret;
+        return 0;
 }
-EXPORT_SYMBOL_GPL(clk_enable);
 
-static void clk_kref_release(struct kref *kref)
+/* Propagate rate to children */
+void propagate_rate(struct clk *tclk)
 {
-        /* Nothing to do */
+        struct clk *clkp;
+
+        list_for_each_entry(clkp, &tclk->children, sibling) {
+                if (clkp->ops && clkp->ops->recalc)
+                        clkp->rate = clkp->ops->recalc(clkp);
+
+                propagate_rate(clkp);
+        }
 }
 
 static void __clk_disable(struct clk *clk)
 {
-        int count = kref_put(&clk->kref, clk_kref_release);
-
-        if (clk->flags & CLK_ALWAYS_ENABLED)
+        if (clk->usecount == 0) {
+                printk(KERN_ERR "Trying disable clock %s with 0 usecount\n",
+                       clk->name);
+                WARN_ON(1);
                 return;
+        }
 
-        if (!count) {   /* count reaches zero, disable the clock */
+        if (!(--clk->usecount)) {
                 if (likely(clk->ops && clk->ops->disable))
                         clk->ops->disable(clk);
+                if (likely(clk->parent))
+                        __clk_disable(clk->parent);
         }
 }
 
@@ -160,28 +189,97 @@ void clk_disable(struct clk *clk)
         spin_lock_irqsave(&clock_lock, flags);
         __clk_disable(clk);
         spin_unlock_irqrestore(&clock_lock, flags);
-
-        clk_disable(clk->parent);
 }
 EXPORT_SYMBOL_GPL(clk_disable);
 
+static int __clk_enable(struct clk *clk)
+{
+        int ret = 0;
+
+        if (clk->usecount++ == 0) {
+                if (clk->parent) {
+                        ret = __clk_enable(clk->parent);
+                        if (unlikely(ret))
+                                goto err;
+                }
+
+                if (clk->ops && clk->ops->enable) {
+                        ret = clk->ops->enable(clk);
+                        if (ret) {
+                                if (clk->parent)
+                                        __clk_disable(clk->parent);
+                                goto err;
+                        }
+                }
+        }
+
+        return ret;
+err:
+        clk->usecount--;
+        return ret;
+}
+
+int clk_enable(struct clk *clk)
+{
+        unsigned long flags;
+        int ret;
+
+        if (!clk)
+                return -EINVAL;
+
+        spin_lock_irqsave(&clock_lock, flags);
+        ret = __clk_enable(clk);
+        spin_unlock_irqrestore(&clock_lock, flags);
+
+        return ret;
+}
+EXPORT_SYMBOL_GPL(clk_enable);
+
+static LIST_HEAD(root_clks);
+
+/**
+ * recalculate_root_clocks - recalculate and propagate all root clocks
+ *
+ * Recalculates all root clocks (clocks with no parent), which if the
+ * clock's .recalc is set correctly, should also propagate their rates.
+ * Called at init.
+ */
+void recalculate_root_clocks(void)
+{
+        struct clk *clkp;
+
+        list_for_each_entry(clkp, &root_clks, sibling) {
+                if (clkp->ops && clkp->ops->recalc)
+                        clkp->rate = clkp->ops->recalc(clkp);
+                propagate_rate(clkp);
+        }
+}
+
 int clk_register(struct clk *clk)
 {
+        if (clk == NULL || IS_ERR(clk))
+                return -EINVAL;
+
+        /*
+         * trap out already registered clocks
+         */
+        if (clk->node.next || clk->node.prev)
+                return 0;
+
         mutex_lock(&clock_list_sem);
 
-        list_add(&clk->node, &clock_list);
-        kref_init(&clk->kref);
+        INIT_LIST_HEAD(&clk->children);
+        clk->usecount = 0;
 
-        mutex_unlock(&clock_list_sem);
+        if (clk->parent)
+                list_add(&clk->sibling, &clk->parent->children);
+        else
+                list_add(&clk->sibling, &root_clks);
 
-        if (clk->flags & CLK_ALWAYS_ENABLED) {
-                pr_debug( "Clock '%s' is ALWAYS_ENABLED\n", clk->name);
-                if (clk->ops && clk->ops->init)
-                        clk->ops->init(clk);
-                if (clk->ops && clk->ops->enable)
-                        clk->ops->enable(clk);
-                pr_debug( "Enabled.");
-        }
+        list_add(&clk->node, &clock_list);
+        if (clk->ops && clk->ops->init)
+                clk->ops->init(clk);
+        mutex_unlock(&clock_list_sem);
 
         return 0;
 }
@@ -190,11 +288,21 @@ EXPORT_SYMBOL_GPL(clk_register);
 void clk_unregister(struct clk *clk)
 {
         mutex_lock(&clock_list_sem);
+        list_del(&clk->sibling);
         list_del(&clk->node);
         mutex_unlock(&clock_list_sem);
 }
 EXPORT_SYMBOL_GPL(clk_unregister);
 
+static void clk_enable_init_clocks(void)
+{
+        struct clk *clkp;
+
+        list_for_each_entry(clkp, &clock_list, node)
+                if (clkp->flags & CLK_ENABLE_ON_INIT)
+                        clk_enable(clkp);
+}
+
 unsigned long clk_get_rate(struct clk *clk)
 {
         return clk->rate;
@@ -210,56 +318,59 @@ EXPORT_SYMBOL_GPL(clk_set_rate);
 int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id)
 {
         int ret = -EOPNOTSUPP;
+        unsigned long flags;
 
-        if (likely(clk->ops && clk->ops->set_rate)) {
-                unsigned long flags;
+        spin_lock_irqsave(&clock_lock, flags);
 
-                spin_lock_irqsave(&clock_lock, flags);
+        if (likely(clk->ops && clk->ops->set_rate)) {
                 ret = clk->ops->set_rate(clk, rate, algo_id);
-                spin_unlock_irqrestore(&clock_lock, flags);
+                if (ret != 0)
+                        goto out_unlock;
+        } else {
+                clk->rate = rate;
+                ret = 0;
         }
 
-        if (unlikely(clk->flags & CLK_RATE_PROPAGATES))
-                propagate_rate(clk);
+        if (clk->ops && clk->ops->recalc)
+                clk->rate = clk->ops->recalc(clk);
 
-        return ret;
-}
-EXPORT_SYMBOL_GPL(clk_set_rate_ex);
+        propagate_rate(clk);
 
-void clk_recalc_rate(struct clk *clk)
-{
-        if (likely(clk->ops && clk->ops->recalc)) {
-                unsigned long flags;
-
-                spin_lock_irqsave(&clock_lock, flags);
-                clk->ops->recalc(clk);
-                spin_unlock_irqrestore(&clock_lock, flags);
-        }
+out_unlock:
+        spin_unlock_irqrestore(&clock_lock, flags);
 
-        if (unlikely(clk->flags & CLK_RATE_PROPAGATES))
-                propagate_rate(clk);
+        return ret;
 }
-EXPORT_SYMBOL_GPL(clk_recalc_rate);
+EXPORT_SYMBOL_GPL(clk_set_rate_ex);
 
 int clk_set_parent(struct clk *clk, struct clk *parent)
 {
+        unsigned long flags;
         int ret = -EINVAL;
-        struct clk *old;
 
         if (!parent || !clk)
                 return ret;
+        if (clk->parent == parent)
+                return 0;
 
-        old = clk->parent;
-        if (likely(clk->ops && clk->ops->set_parent)) {
-                unsigned long flags;
-                spin_lock_irqsave(&clock_lock, flags);
-                ret = clk->ops->set_parent(clk, parent);
-                spin_unlock_irqrestore(&clock_lock, flags);
-                clk->parent = (ret ? old : parent);
-        }
+        spin_lock_irqsave(&clock_lock, flags);
+        if (clk->usecount == 0) {
+                if (clk->ops->set_parent)
+                        ret = clk->ops->set_parent(clk, parent);
+                else
+                        ret = clk_reparent(clk, parent);
+
+                if (ret == 0) {
+                        pr_debug("clock: set parent of %s to %s (new rate %ld)\n",
+                                 clk->name, clk->parent->name, clk->rate);
+                        if (clk->ops->recalc)
+                                clk->rate = clk->ops->recalc(clk);
+                        propagate_rate(clk);
+                }
+        } else
+                ret = -EBUSY;
+        spin_unlock_irqrestore(&clock_lock, flags);
 
-        if (unlikely(clk->flags & CLK_RATE_PROPAGATES))
-                propagate_rate(clk);
         return ret;
 }
 EXPORT_SYMBOL_GPL(clk_set_parent);
@@ -287,14 +398,69 @@ long clk_round_rate(struct clk *clk, unsigned long rate)
 EXPORT_SYMBOL_GPL(clk_round_rate);
 
 /*
+ * Find the correct struct clk for the device and connection ID.
+ * We do slightly fuzzy matching here:
+ *  An entry with a NULL ID is assumed to be a wildcard.
+ *  If an entry has a device ID, it must match
+ *  If an entry has a connection ID, it must match
+ * Then we take the most specific entry - with the following
+ * order of precidence: dev+con > dev only > con only.
+ */
+static struct clk *clk_find(const char *dev_id, const char *con_id)
+{
+        struct clk_lookup *p;
+        struct clk *clk = NULL;
+        int match, best = 0;
+
+        list_for_each_entry(p, &clock_list, node) {
+                match = 0;
+                if (p->dev_id) {
+                        if (!dev_id || strcmp(p->dev_id, dev_id))
+                                continue;
+                        match += 2;
+                }
+                if (p->con_id) {
+                        if (!con_id || strcmp(p->con_id, con_id))
+                                continue;
+                        match += 1;
+                }
+                if (match == 0)
+                        continue;
+
+                if (match > best) {
+                        clk = p->clk;
+                        best = match;
+                }
+        }
+        return clk;
+}
+
+struct clk *clk_get_sys(const char *dev_id, const char *con_id)
+{
+        struct clk *clk;
+
+        mutex_lock(&clock_list_sem);
+        clk = clk_find(dev_id, con_id);
+        mutex_unlock(&clock_list_sem);
+
+        return clk ? clk : ERR_PTR(-ENOENT);
+}
+EXPORT_SYMBOL_GPL(clk_get_sys);
+
+/*
  * Returns a clock. Note that we first try to use device id on the bus
  * and clock name. If this fails, we try to use clock name only.
  */
 struct clk *clk_get(struct device *dev, const char *id)
 {
+        const char *dev_id = dev ? dev_name(dev) : NULL;
         struct clk *p, *clk = ERR_PTR(-ENOENT);
         int idno;
 
+        clk = clk_get_sys(dev_id, id);
+        if (clk && !IS_ERR(clk))
+                return clk;
+
         if (dev == NULL || dev->bus != &platform_bus_type)
                 idno = -1;
         else
@@ -330,36 +496,6 @@ void clk_put(struct clk *clk)
 }
 EXPORT_SYMBOL_GPL(clk_put);
 
-void __init __attribute__ ((weak))
-arch_init_clk_ops(struct clk_ops **ops, int type)
-{
-}
-
-int __init __attribute__ ((weak))
-arch_clk_init(void)
-{
-        return 0;
-}
-
-static int show_clocks(char *buf, char **start, off_t off,
-                       int len, int *eof, void *data)
-{
-        struct clk *clk;
-        char *p = buf;
-
-        list_for_each_entry_reverse(clk, &clock_list, node) {
-                unsigned long rate = clk_get_rate(clk);
-
-                p += sprintf(p, "%-12s\t: %ld.%02ldMHz\t%s\n", clk->name,
-                             rate / 1000000, (rate % 1000000) / 10000,
-                             ((clk->flags & CLK_ALWAYS_ENABLED) ||
-                              (atomic_read(&clk->kref.refcount) != 1)) ?
-                             "enabled" : "disabled");
-        }
-
-        return p - buf;
-}
-
 #ifdef CONFIG_PM
 static int clks_sysdev_suspend(struct sys_device *dev, pm_message_t state)
 {
@@ -369,20 +505,22 @@ static int clks_sysdev_suspend(struct sys_device *dev, pm_message_t state)
         switch (state.event) {
         case PM_EVENT_ON:
                 /* Resumeing from hibernation */
-                if (prev_state.event == PM_EVENT_FREEZE) {
-                        list_for_each_entry(clkp, &clock_list, node)
-                                if (likely(clkp->ops)) {
-                                        unsigned long rate = clkp->rate;
-
-                                        if (likely(clkp->ops->set_parent))
-                                                clkp->ops->set_parent(clkp,
-                                                        clkp->parent);
-                                        if (likely(clkp->ops->set_rate))
-                                                clkp->ops->set_rate(clkp,
-                                                        rate, NO_CHANGE);
-                                        else if (likely(clkp->ops->recalc))
-                                                clkp->ops->recalc(clkp);
-                                        }
+                if (prev_state.event != PM_EVENT_FREEZE)
+                        break;
+
+                list_for_each_entry(clkp, &clock_list, node) {
+                        if (likely(clkp->ops)) {
+                                unsigned long rate = clkp->rate;
+
+                                if (likely(clkp->ops->set_parent))
+                                        clkp->ops->set_parent(clkp,
+                                                clkp->parent);
+                                if (likely(clkp->ops->set_rate))
+                                        clkp->ops->set_rate(clkp,
+                                                rate, NO_CHANGE);
+                                else if (likely(clkp->ops->recalc))
+                                        clkp->rate = clkp->ops->recalc(clkp);
+                        }
                 }
                 break;
         case PM_EVENT_FREEZE:
@@ -426,34 +564,116 @@ subsys_initcall(clk_sysdev_init);
 
 int __init clk_init(void)
 {
-        int i, ret = 0;
-
-        BUG_ON(!master_clk.rate);
-
-        for (i = 0; i < ARRAY_SIZE(onchip_clocks); i++) {
-                struct clk *clk = onchip_clocks[i];
+        int ret;
 
-                arch_init_clk_ops(&clk->ops, i);
-                ret |= clk_register(clk);
+        ret = arch_clk_init();
+        if (unlikely(ret)) {
+                pr_err("%s: CPU clock registration failed.\n", __func__);
+                return ret;
         }
 
-        ret |= arch_clk_init();
+        if (sh_mv.mv_clk_init) {
+                ret = sh_mv.mv_clk_init();
+                if (unlikely(ret)) {
+                        pr_err("%s: machvec clock initialization failed.\n",
+                               __func__);
+                        return ret;
+                }
+        }
 
         /* Kick the child clocks.. */
-        propagate_rate(&master_clk);
-        propagate_rate(&bus_clk);
+        recalculate_root_clocks();
+
+        /* Enable the necessary init clocks */
+        clk_enable_init_clocks();
 
         return ret;
 }
 
-static int __init clk_proc_init(void)
+/*
+ *      debugfs support to trace clock tree hierarchy and attributes
+ */
+static struct dentry *clk_debugfs_root;
+
+static int clk_debugfs_register_one(struct clk *c)
 {
-        struct proc_dir_entry *p;
-        p = create_proc_read_entry("clocks", S_IRUSR, NULL,
-                                   show_clocks, NULL);
-        if (unlikely(!p))
-                return -EINVAL;
+        int err;
+        struct dentry *d, *child;
+        struct clk *pa = c->parent;
+        char s[255];
+        char *p = s;
+
+        p += sprintf(p, "%s", c->name);
+        if (c->id >= 0)
+                sprintf(p, ":%d", c->id);
+        d = debugfs_create_dir(s, pa ? pa->dentry : clk_debugfs_root);
+        if (!d)
+                return -ENOMEM;
+        c->dentry = d;
+
+        d = debugfs_create_u8("usecount", S_IRUGO, c->dentry, (u8 *)&c->usecount);
+        if (!d) {
+                err = -ENOMEM;
+                goto err_out;
+        }
+        d = debugfs_create_u32("rate", S_IRUGO, c->dentry, (u32 *)&c->rate);
+        if (!d) {
+                err = -ENOMEM;
+                goto err_out;
+        }
+        d = debugfs_create_x32("flags", S_IRUGO, c->dentry, (u32 *)&c->flags);
+        if (!d) {
+                err = -ENOMEM;
+                goto err_out;
+        }
+        return 0;
 
+err_out:
+        d = c->dentry;
+        list_for_each_entry(child, &d->d_subdirs, d_u.d_child)
+                debugfs_remove(child);
+        debugfs_remove(c->dentry);
+        return err;
+}
+
+static int clk_debugfs_register(struct clk *c)
+{
+        int err;
+        struct clk *pa = c->parent;
+
+        if (pa && !pa->dentry) {
+                err = clk_debugfs_register(pa);
+                if (err)
+                        return err;
+        }
+
+        if (!c->dentry) {
+                err = clk_debugfs_register_one(c);
+                if (err)
+                        return err;
+        }
+        return 0;
+}
+
+static int __init clk_debugfs_init(void)
+{
+        struct clk *c;
+        struct dentry *d;
+        int err;
+
+        d = debugfs_create_dir("clock", NULL);
+        if (!d)
+                return -ENOMEM;
+        clk_debugfs_root = d;
+
+        list_for_each_entry(c, &clock_list, node) {
+                err = clk_debugfs_register(c);
+                if (err)
+                        goto err_out;
+        }
         return 0;
+err_out:
+        debugfs_remove(clk_debugfs_root); /* REVISIT: Cleanup correctly */
+        return err;
 }
-subsys_initcall(clk_proc_init);
+late_initcall(clk_debugfs_init);
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c
index d29e69c156f0..ad85421099cd 100644
--- a/arch/sh/kernel/cpu/init.c
+++ b/arch/sh/kernel/cpu/init.c
@@ -62,6 +62,11 @@ static void __init speculative_execution_init(void)
 #define speculative_execution_init()    do { } while (0)
 #endif
 
+/* 2nd-level cache init */
+void __uses_jump_to_uncached __attribute__ ((weak)) l2_cache_init(void)
+{
+}
+
 /*
  * Generic first-level cache init
  */
@@ -146,6 +151,8 @@ static void __uses_jump_to_uncached cache_init(void)
         flags &= ~CCR_CACHE_ENABLE;
 #endif
 
+        l2_cache_init();
+
         ctrl_outl(flags, CCR);
         back_to_cached();
 }
diff --git a/arch/sh/kernel/cpu/irq/imask.c b/arch/sh/kernel/cpu/irq/imask.c
index 301b505c4278..6b5d191eec3a 100644
--- a/arch/sh/kernel/cpu/irq/imask.c
+++ b/arch/sh/kernel/cpu/irq/imask.c
@@ -18,38 +18,17 @@
 #include <linux/spinlock.h>
 #include <linux/cache.h>
 #include <linux/irq.h>
+#include <linux/bitmap.h>
 #include <asm/system.h>
 #include <asm/irq.h>
 
 /* Bitmap of IRQ masked */
-static unsigned long imask_mask = 0x7fff;
-static int interrupt_priority = 0;
-
-static void enable_imask_irq(unsigned int irq);
-static void disable_imask_irq(unsigned int irq);
-static void shutdown_imask_irq(unsigned int irq);
-static void mask_and_ack_imask(unsigned int);
-static void end_imask_irq(unsigned int irq);
-
 #define IMASK_PRIORITY  15
 
-static unsigned int startup_imask_irq(unsigned int irq)
-{
-        /* Nothing to do */
-        return 0; /* never anything pending */
-}
+static DECLARE_BITMAP(imask_mask, IMASK_PRIORITY);
+static int interrupt_priority;
 
-static struct hw_interrupt_type imask_irq_type = {
-        .typename = "SR.IMASK",
-        .startup = startup_imask_irq,
-        .shutdown = shutdown_imask_irq,
-        .enable = enable_imask_irq,
-        .disable = disable_imask_irq,
-        .ack = mask_and_ack_imask,
-        .end = end_imask_irq
-};
-
-void static inline set_interrupt_registers(int ip)
+static inline void set_interrupt_registers(int ip)
 {
         unsigned long __dummy;
 
@@ -72,42 +51,31 @@ void static inline set_interrupt_registers(int ip)
                      : "t");
 }
 
-static void disable_imask_irq(unsigned int irq)
+static void mask_imask_irq(unsigned int irq)
 {
-        clear_bit(irq, &imask_mask);
+        clear_bit(irq, imask_mask);
         if (interrupt_priority < IMASK_PRIORITY - irq)
                 interrupt_priority = IMASK_PRIORITY - irq;
-
         set_interrupt_registers(interrupt_priority);
 }
 
-static void enable_imask_irq(unsigned int irq)
+static void unmask_imask_irq(unsigned int irq)
 {
-        set_bit(irq, &imask_mask);
-        interrupt_priority = IMASK_PRIORITY - ffz(imask_mask);
-
+        set_bit(irq, imask_mask);
+        interrupt_priority = IMASK_PRIORITY -
+                find_first_zero_bit(imask_mask, IMASK_PRIORITY);
         set_interrupt_registers(interrupt_priority);
 }
 
-static void mask_and_ack_imask(unsigned int irq)
-{
-        disable_imask_irq(irq);
-}
-
-static void end_imask_irq(unsigned int irq)
-{
-        if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
-                enable_imask_irq(irq);
-}
-
-static void shutdown_imask_irq(unsigned int irq)
-{
-        /* Nothing to do */
-}
+static struct irq_chip imask_irq_chip = {
+        .typename       = "SR.IMASK",
+        .mask           = mask_imask_irq,
+        .unmask         = unmask_imask_irq,
+        .mask_ack       = mask_imask_irq,
+};
 
 void make_imask_irq(unsigned int irq)
 {
-        disable_irq_nosync(irq);
-        irq_desc[irq].chip = &imask_irq_type;
-        enable_irq(irq);
+        set_irq_chip_and_handler_name(irq, &imask_irq_chip,
+                                      handle_level_irq, "level");
 }
diff --git a/arch/sh/kernel/cpu/irq/intc-sh5.c b/arch/sh/kernel/cpu/irq/intc-sh5.c
index 726f0335da76..6c092f1f5557 100644
--- a/arch/sh/kernel/cpu/irq/intc-sh5.c
+++ b/arch/sh/kernel/cpu/irq/intc-sh5.c
@@ -84,7 +84,7 @@ static void disable_intc_irq(unsigned int irq);
 static void mask_and_ack_intc(unsigned int);
 static void end_intc_irq(unsigned int irq);
 
-static struct hw_interrupt_type intc_irq_type = {
+static struct irq_chip intc_irq_type = {
         .typename = "INTC",
         .startup = startup_intc_irq,
         .shutdown = shutdown_intc_irq,
@@ -152,43 +152,13 @@ static void end_intc_irq(unsigned int irq)
         enable_intc_irq(irq);
 }
 
-/* For future use, if we ever support IRLM=0) */
-void make_intc_irq(unsigned int irq)
-{
-        disable_irq_nosync(irq);
-        irq_desc[irq].chip = &intc_irq_type;
-        disable_intc_irq(irq);
-}
-
-#if defined(CONFIG_PROC_FS) && defined(CONFIG_SYSCTL)
-static int IRQ_to_vectorN[NR_INTC_IRQS] = {
-        0x12, 0x15, 0x18, 0x1B, 0x40, 0x41, 0x42, 0x43, /*  0- 7 */
-          -1,   -1,   -1,   -1, 0x50, 0x51, 0x52, 0x53, /*  8-15 */
-        0x54, 0x55, 0x32, 0x33, 0x34, 0x35, 0x36,   -1, /* 16-23 */
-          -1,   -1,   -1,   -1,   -1,   -1,   -1,   -1, /* 24-31 */
-        0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x38, /* 32-39 */
-        0x39, 0x3A, 0x3B,   -1,   -1,   -1,   -1,   -1, /* 40-47 */
-          -1,   -1,   -1,   -1,   -1,   -1,   -1,   -1, /* 48-55 */
-          -1,   -1,   -1,   -1,   -1,   -1,   -1, 0x2B, /* 56-63 */
-
-};
-
-int intc_irq_describe(char* p, int irq)
-{
-        if (irq < NR_INTC_IRQS)
-                return sprintf(p, "(0x%3x)", IRQ_to_vectorN[irq]*0x20);
-        else
-                return 0;
-}
-#endif
-
 void __init plat_irq_setup(void)
 {
         unsigned long long __dummy0, __dummy1=~0x00000000100000f0;
         unsigned long reg;
         int i;
 
-        intc_virt = onchip_remap(INTC_BASE, 1024, "INTC");
+        intc_virt = (unsigned long)ioremap_nocache(INTC_BASE, 1024);
         if (!intc_virt) {
                 panic("Unable to remap INTC\n");
         }
@@ -196,7 +166,7 @@ void __init plat_irq_setup(void)
 
         /* Set default: per-line enable/disable, priority driven ack/eoi */
         for (i = 0; i < NR_INTC_IRQS; i++)
-                irq_desc[i].chip = &intc_irq_type;
+                set_irq_chip_and_handler(i, &intc_irq_type, handle_level_irq);
 
 
         /* Disable all interrupts and set all priorities to 0 to avoid trouble */
diff --git a/arch/sh/kernel/cpu/irq/ipr.c b/arch/sh/kernel/cpu/irq/ipr.c
index 3eb17ee5540e..808d99a48efb 100644
--- a/arch/sh/kernel/cpu/irq/ipr.c
+++ b/arch/sh/kernel/cpu/irq/ipr.c
@@ -21,6 +21,7 @@
 #include <linux/module.h>
 #include <linux/io.h>
 #include <linux/interrupt.h>
+#include <linux/topology.h>
 
 static inline struct ipr_desc *get_ipr_desc(unsigned int irq)
 {
@@ -59,10 +60,18 @@ void register_ipr_controller(struct ipr_desc *desc)
 
         for (i = 0; i < desc->nr_irqs; i++) {
                 struct ipr_data *p = desc->ipr_data + i;
+                struct irq_desc *irq_desc;
 
                 BUG_ON(p->ipr_idx >= desc->nr_offsets);
                 BUG_ON(!desc->ipr_offsets[p->ipr_idx]);
 
+                irq_desc = irq_to_desc_alloc_node(p->irq, numa_node_id());
+                if (unlikely(!irq_desc)) {
+                        printk(KERN_INFO "can not get irq_desc for %d\n",
+                               p->irq);
+                        continue;
+                }
+
                 disable_irq_nosync(p->irq);
                 set_irq_chip_and_handler_name(p->irq, &desc->chip,
                                       handle_level_irq, "level");
diff --git a/arch/sh/kernel/cpu/sh2/clock-sh7619.c b/arch/sh/kernel/cpu/sh2/clock-sh7619.c
index d2c157917999..4fe863170e31 100644
--- a/arch/sh/kernel/cpu/sh2/clock-sh7619.c
+++ b/arch/sh/kernel/cpu/sh2/clock-sh7619.c
@@ -38,32 +38,27 @@ static struct clk_ops sh7619_master_clk_ops = {
         .init           = master_clk_init,
 };
 
-static void module_clk_recalc(struct clk *clk)
+static unsigned long module_clk_recalc(struct clk *clk)
 {
         int idx = (ctrl_inw(FREQCR) & 0x0007);
-        clk->rate = clk->parent->rate / pfc_divisors[idx];
+        return clk->parent->rate / pfc_divisors[idx];
 }
 
 static struct clk_ops sh7619_module_clk_ops = {
         .recalc         = module_clk_recalc,
 };
 
-static void bus_clk_recalc(struct clk *clk)
+static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        clk->rate = clk->parent->rate / pll1rate[(ctrl_inw(FREQCR) >> 8) & 7];
+        return clk->parent->rate / pll1rate[(ctrl_inw(FREQCR) >> 8) & 7];
 }
 
 static struct clk_ops sh7619_bus_clk_ops = {
         .recalc         = bus_clk_recalc,
 };
 
-static void cpu_clk_recalc(struct clk *clk)
-{
-        clk->rate = clk->parent->rate;
-}
-
 static struct clk_ops sh7619_cpu_clk_ops = {
-        .recalc         = cpu_clk_recalc,
+        .recalc         = followparent_recalc,
 };
 
 static struct clk_ops *sh7619_clk_ops[] = {
@@ -78,4 +73,3 @@ void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
         if (idx < ARRAY_SIZE(sh7619_clk_ops))
                 *ops = sh7619_clk_ops[idx];
 }
-
diff --git a/arch/sh/kernel/cpu/sh2/setup-sh7619.c b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
index 0e32d8e448ca..13798733f2db 100644
--- a/arch/sh/kernel/cpu/sh2/setup-sh7619.c
+++ b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
@@ -12,6 +12,8 @@
 #include <linux/init.h>
 #include <linux/serial.h>
 #include <linux/serial_sci.h>
+#include <linux/sh_timer.h>
+#include <linux/io.h>
 
 enum {
         UNUSED = 0,
@@ -109,9 +111,75 @@ static struct platform_device eth_device = {
         .resource = eth_resources,
 };
 
+static struct sh_timer_config cmt0_platform_data = {
+        .name = "CMT0",
+        .channel_offset = 0x02,
+        .timer_bit = 0,
+        .clk = "peripheral_clk",
+        .clockevent_rating = 125,
+        .clocksource_rating = 0, /* disabled due to code generation issues */
+};
+
+static struct resource cmt0_resources[] = {
+        [0] = {
+                .name   = "CMT0",
+                .start  = 0xf84a0072,
+                .end    = 0xf84a0077,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 86,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device cmt0_device = {
+        .name           = "sh_cmt",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &cmt0_platform_data,
+        },
+        .resource       = cmt0_resources,
+        .num_resources  = ARRAY_SIZE(cmt0_resources),
+};
+
+static struct sh_timer_config cmt1_platform_data = {
+        .name = "CMT1",
+        .channel_offset = 0x08,
+        .timer_bit = 1,
+        .clk = "peripheral_clk",
+        .clockevent_rating = 125,
+        .clocksource_rating = 0, /* disabled due to code generation issues */
+};
+
+static struct resource cmt1_resources[] = {
+        [0] = {
+                .name   = "CMT1",
+                .start  = 0xf84a0078,
+                .end    = 0xf84a007d,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 87,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device cmt1_device = {
+        .name           = "sh_cmt",
+        .id             = 1,
+        .dev = {
+                .platform_data  = &cmt1_platform_data,
+        },
+        .resource       = cmt1_resources,
+        .num_resources  = ARRAY_SIZE(cmt1_resources),
+};
+
 static struct platform_device *sh7619_devices[] __initdata = {
         &sci_device,
         &eth_device,
+        &cmt0_device,
+        &cmt1_device,
 };
 
 static int __init sh7619_devices_setup(void)
@@ -125,3 +193,19 @@ void __init plat_irq_setup(void)
 {
         register_intc_controller(&intc_desc);
 }
+
+static struct platform_device *sh7619_early_devices[] __initdata = {
+        &cmt0_device,
+        &cmt1_device,
+};
+
+#define STBCR3 0xf80a0000
+
+void __init plat_early_device_setup(void)
+{
+        /* enable CMT clock */
+        __raw_writeb(__raw_readb(STBCR3) & ~0x10, STBCR3);
+
+        early_platform_add_devices(sh7619_early_devices,
+                                   ARRAY_SIZE(sh7619_early_devices));
+}
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
index 4a5e59732334..7814c76159a7 100644
--- a/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7201.c
@@ -34,37 +34,37 @@ static const int pfc_divisors[]={1,2,3,4,6,8,12};
 
 static void master_clk_init(struct clk *clk)
 {
-        clk->rate = 10000000 * PLL2 * pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0007];
+        return 10000000 * PLL2 * pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0007];
 }
 
 static struct clk_ops sh7201_master_clk_ops = {
         .init           = master_clk_init,
 };
 
-static void module_clk_recalc(struct clk *clk)
+static unsigned long module_clk_recalc(struct clk *clk)
 {
         int idx = (ctrl_inw(FREQCR) & 0x0007);
-        clk->rate = clk->parent->rate / pfc_divisors[idx];
+        return clk->parent->rate / pfc_divisors[idx];
 }
 
 static struct clk_ops sh7201_module_clk_ops = {
         .recalc         = module_clk_recalc,
 };
 
-static void bus_clk_recalc(struct clk *clk)
+static unsigned long bus_clk_recalc(struct clk *clk)
 {
         int idx = (ctrl_inw(FREQCR) & 0x0007);
-        clk->rate = clk->parent->rate / pfc_divisors[idx];
+        return clk->parent->rate / pfc_divisors[idx];
 }
 
 static struct clk_ops sh7201_bus_clk_ops = {
         .recalc         = bus_clk_recalc,
 };
 
-static void cpu_clk_recalc(struct clk *clk)
+static unsigned long cpu_clk_recalc(struct clk *clk)
 {
         int idx = ((ctrl_inw(FREQCR) >> 4) & 0x0007);
-        clk->rate = clk->parent->rate / ifc_divisors[idx];
+        return clk->parent->rate / ifc_divisors[idx];
 }
 
 static struct clk_ops sh7201_cpu_clk_ops = {
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7203.c b/arch/sh/kernel/cpu/sh2a/clock-sh7203.c
index fb781329848a..940986965102 100644
--- a/arch/sh/kernel/cpu/sh2a/clock-sh7203.c
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7203.c
@@ -46,33 +46,28 @@ static struct clk_ops sh7203_master_clk_ops = {
         .init           = master_clk_init,
 };
 
-static void module_clk_recalc(struct clk *clk)
+static unsigned long module_clk_recalc(struct clk *clk)
 {
         int idx = (ctrl_inw(FREQCR) & 0x0007);
-        clk->rate = clk->parent->rate / pfc_divisors[idx];
+        return clk->parent->rate / pfc_divisors[idx];
 }
 
 static struct clk_ops sh7203_module_clk_ops = {
         .recalc         = module_clk_recalc,
 };
 
-static void bus_clk_recalc(struct clk *clk)
+static unsigned long bus_clk_recalc(struct clk *clk)
 {
         int idx = (ctrl_inw(FREQCR) & 0x0007);
-        clk->rate = clk->parent->rate / pfc_divisors[idx-2];
+        return clk->parent->rate / pfc_divisors[idx-2];
 }
 
 static struct clk_ops sh7203_bus_clk_ops = {
         .recalc         = bus_clk_recalc,
 };
 
-static void cpu_clk_recalc(struct clk *clk)
-{
-        clk->rate = clk->parent->rate;
-}
-
 static struct clk_ops sh7203_cpu_clk_ops = {
-        .recalc         = cpu_clk_recalc,
+        .recalc         = followparent_recalc,
 };
 
 static struct clk_ops *sh7203_clk_ops[] = {
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7206.c b/arch/sh/kernel/cpu/sh2a/clock-sh7206.c
index 82d7f991ef6b..c2268bdeceeb 100644
--- a/arch/sh/kernel/cpu/sh2a/clock-sh7206.c
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7206.c
@@ -41,29 +41,29 @@ static struct clk_ops sh7206_master_clk_ops = {
         .init           = master_clk_init,
 };
 
-static void module_clk_recalc(struct clk *clk)
+static unsigned long module_clk_recalc(struct clk *clk)
 {
         int idx = (ctrl_inw(FREQCR) & 0x0007);
-        clk->rate = clk->parent->rate / pfc_divisors[idx];
+        return clk->parent->rate / pfc_divisors[idx];
 }
 
 static struct clk_ops sh7206_module_clk_ops = {
         .recalc         = module_clk_recalc,
 };
 
-static void bus_clk_recalc(struct clk *clk)
+static unsigned long bus_clk_recalc(struct clk *clk)
 {
-        clk->rate = clk->parent->rate / pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0007];
+        return clk->parent->rate / pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0007];
 }
 
 static struct clk_ops sh7206_bus_clk_ops = {
         .recalc         = bus_clk_recalc,
 };
 
-static void cpu_clk_recalc(struct clk *clk)
+static unsigned long cpu_clk_recalc(struct clk *clk)
 {
         int idx = (ctrl_inw(FREQCR) & 0x0007);
-        clk->rate = clk->parent->rate / ifc_divisors[idx];
+        return clk->parent->rate / ifc_divisors[idx];
 }
 
 static struct clk_ops sh7206_cpu_clk_ops = {
diff --git a/arch/sh/kernel/cpu/sh2a/setup-mxg.c b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
index 844293723cfc..869c2da4820b 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-mxg.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-mxg.c
@@ -11,6 +11,7 @@
 #include <linux/init.h>
 #include <linux/serial.h>
 #include <linux/serial_sci.h>
+#include <linux/sh_timer.h>
 
 enum {
         UNUSED = 0,
@@ -24,7 +25,7 @@ enum {
 
         SCIF0, SCIF1,
 
-        MTU2_GROUP1, MTU2_GROUP2, MTU2_GROUP3, MTU2_GROUP4, MTU2_GROUP5
+        MTU2_GROUP1, MTU2_GROUP2, MTU2_GROUP3, MTU2_GROUP4, MTU2_GROUP5,
         MTU2_TGI3B, MTU2_TGI3C,
 
         /* interrupt groups */
@@ -113,6 +114,99 @@ static struct intc_mask_reg mask_registers[] __initdata = {
 static DECLARE_INTC_DESC(intc_desc, "mxg", vectors, groups,
                          mask_registers, prio_registers, NULL);
 
+static struct sh_timer_config mtu2_0_platform_data = {
+        .name = "MTU2_0",
+        .channel_offset = -0x80,
+        .timer_bit = 0,
+        .clk = "peripheral_clk",
+        .clockevent_rating = 200,
+};
+
+static struct resource mtu2_0_resources[] = {
+        [0] = {
+                .name   = "MTU2_0",
+                .start  = 0xff801300,
+                .end    = 0xff801326,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 228,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device mtu2_0_device = {
+        .name           = "sh_mtu2",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &mtu2_0_platform_data,
+        },
+        .resource       = mtu2_0_resources,
+        .num_resources  = ARRAY_SIZE(mtu2_0_resources),
+};
+
+static struct sh_timer_config mtu2_1_platform_data = {
+        .name = "MTU2_1",
+        .channel_offset = -0x100,
+        .timer_bit = 1,
+        .clk = "peripheral_clk",
+        .clockevent_rating = 200,
+};
+
+static struct resource mtu2_1_resources[] = {
+        [0] = {
+                .name   = "MTU2_1",
+                .start  = 0xff801380,
+                .end    = 0xff801390,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 234,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device mtu2_1_device = {
+        .name           = "sh_mtu2",
+        .id             = 1,
+        .dev = {
+                .platform_data  = &mtu2_1_platform_data,
+        },
+        .resource       = mtu2_1_resources,
+        .num_resources  = ARRAY_SIZE(mtu2_1_resources),
+};
+
+static struct sh_timer_config mtu2_2_platform_data = {
+        .name = "MTU2_2",
+        .channel_offset = 0x80,
+        .timer_bit = 2,
+        .clk = "peripheral_clk",
+        .clockevent_rating = 200,
+};
+
+static struct resource mtu2_2_resources[] = {
+        [0] = {
+                .name   = "MTU2_2",
+                .start  = 0xff801000,
+                .end    = 0xff80100a,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 240,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device mtu2_2_device = {
+        .name           = "sh_mtu2",
+        .id             = 2,
+        .dev = {
+                .platform_data  = &mtu2_2_platform_data,
+        },
+        .resource       = mtu2_2_resources,
+        .num_resources  = ARRAY_SIZE(mtu2_2_resources),
+};
+
 static struct plat_sci_port sci_platform_data[] = {
         {
                 .mapbase        = 0xff804000,
@@ -134,6 +228,9 @@ static struct platform_device sci_device = {
 
 static struct platform_device *mxg_devices[] __initdata = {
         &sci_device,
+        &mtu2_0_device,
+        &mtu2_1_device,
+        &mtu2_2_device,
 };
 
 static int __init mxg_devices_setup(void)
@@ -147,3 +244,15 @@ void __init plat_irq_setup(void)
 {
         register_intc_controller(&intc_desc);
 }
+
+static struct platform_device *mxg_early_devices[] __initdata = {
+        &mtu2_0_device,
+        &mtu2_1_device,
+        &mtu2_2_device,
+};
+
+void __init plat_early_device_setup(void)
+{
+        early_platform_add_devices(mxg_early_devices,
+                                   ARRAY_SIZE(mxg_early_devices));
+}
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
index 00f42f9e3f5c..d8febe128066 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7201.c
@@ -12,6 +12,8 @@
 #include <linux/init.h>
 #include <linux/serial.h>
 #include <linux/serial_sci.h>
+#include <linux/sh_timer.h>
+#include <linux/io.h>
 
 enum {
         UNUSED = 0,
@@ -249,9 +251,105 @@ static struct platform_device rtc_device = {
         .resource       = rtc_resources,
 };
 
+static struct sh_timer_config mtu2_0_platform_data = {
+        .name = "MTU2_0",
+        .channel_offset = -0x80,
+        .timer_bit = 0,
+        .clk = "peripheral_clk",
+        .clockevent_rating = 200,
+};
+
+static struct resource mtu2_0_resources[] = {
+        [0] = {
+                .name   = "MTU2_0",
+                .start  = 0xfffe4300,
+                .end    = 0xfffe4326,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 108,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device mtu2_0_device = {
+        .name           = "sh_mtu2",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &mtu2_0_platform_data,
+        },
+        .resource       = mtu2_0_resources,
+        .num_resources  = ARRAY_SIZE(mtu2_0_resources),
+};
+
+static struct sh_timer_config mtu2_1_platform_data = {
+        .name = "MTU2_1",
+        .channel_offset = -0x100,
+        .timer_bit = 1,
+        .clk = "peripheral_clk",
+        .clockevent_rating = 200,
+};
+
+static struct resource mtu2_1_resources[] = {
+        [0] = {
+                .name   = "MTU2_1",
+                .start  = 0xfffe4380,
+                .end    = 0xfffe4390,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 116,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device mtu2_1_device = {
+        .name           = "sh_mtu2",
+        .id             = 1,
+        .dev = {
+                .platform_data  = &mtu2_1_platform_data,
+        },
+        .resource       = mtu2_1_resources,
+        .num_resources  = ARRAY_SIZE(mtu2_1_resources),
+};
+
+static struct sh_timer_config mtu2_2_platform_data = {
+        .name = "MTU2_2",
+        .channel_offset = 0x80,
+        .timer_bit = 2,
+        .clk = "peripheral_clk",
+        .clockevent_rating = 200,
+};
+
+static struct resource mtu2_2_resources[] = {
+        [0] = {
+                .name   = "MTU2_2",
+                .start  = 0xfffe4000,
+                .end    = 0xfffe400a,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 124,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device mtu2_2_device = {
+        .name           = "sh_mtu2",
+        .id             = 2,
+        .dev = {
+                .platform_data  = &mtu2_2_platform_data,
+        },
+        .resource       = mtu2_2_resources,
+        .num_resources  = ARRAY_SIZE(mtu2_2_resources),
+};
+
 static struct platform_device *sh7201_devices[] __initdata = {
         &sci_device,
         &rtc_device,
+        &mtu2_0_device,
+        &mtu2_1_device,
+        &mtu2_2_device,
 };
 
 static int __init sh7201_devices_setup(void)
@@ -265,3 +363,20 @@ void __init plat_irq_setup(void)
 {
         register_intc_controller(&intc_desc);
 }
+
+static struct platform_device *sh7201_early_devices[] __initdata = {
+        &mtu2_0_device,
+        &mtu2_1_device,
+        &mtu2_2_device,
+};
+
+#define STBCR3 0xfffe0408
+
+void __init plat_early_device_setup(void)
+{
+        /* enable MTU2 clock */
+        __raw_writeb(__raw_readb(STBCR3) & ~0x20, STBCR3);
+
+        early_platform_add_devices(sh7201_early_devices,
+                                   ARRAY_SIZE(sh7201_early_devices));
+}
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
index 820dfb2e8656..62e3039d2398 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
@@ -11,6 +11,8 @@
 #include <linux/init.h>
 #include <linux/serial.h>
 #include <linux/serial_sci.h>
+#include <linux/sh_timer.h>
+#include <linux/io.h>
 
 enum {
         UNUSED = 0,
@@ -205,6 +207,132 @@ static struct platform_device sci_device = {
         },
 };
 
+static struct sh_timer_config cmt0_platform_data = {
+        .name = "CMT0",
+        .channel_offset = 0x02,
+        .timer_bit = 0,
+        .clk = "peripheral_clk",
+        .clockevent_rating = 125,
+        .clocksource_rating = 0, /* disabled due to code generation issues */
+};
+
+static struct resource cmt0_resources[] = {
+        [0] = {
+                .name   = "CMT0",
+                .start  = 0xfffec002,
+                .end    = 0xfffec007,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 142,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device cmt0_device = {
+        .name           = "sh_cmt",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &cmt0_platform_data,
+        },
+        .resource       = cmt0_resources,
+        .num_resources  = ARRAY_SIZE(cmt0_resources),
+};
+
+static struct sh_timer_config cmt1_platform_data = {
+        .name = "CMT1",
+        .channel_offset = 0x08,
+        .timer_bit = 1,
+        .clk = "peripheral_clk",
+        .clockevent_rating = 125,
+        .clocksource_rating = 0, /* disabled due to code generation issues */
+};
+
+static struct resource cmt1_resources[] = {
+        [0] = {
+                .name   = "CMT1",
+                .start  = 0xfffec008,
+                .end    = 0xfffec00d,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 143,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device cmt1_device = {
+        .name           = "sh_cmt",
+        .id             = 1,
+        .dev = {
+                .platform_data  = &cmt1_platform_data,
+        },
+        .resource       = cmt1_resources,
+        .num_resources  = ARRAY_SIZE(cmt1_resources),
+};
+
+static struct sh_timer_config mtu2_0_platform_data = {
+        .name = "MTU2_0",
+        .channel_offset = -0x80,
+        .timer_bit = 0,
+        .clk = "peripheral_clk",
+        .clockevent_rating = 200,
+};
+
+static struct resource mtu2_0_resources[] = {
+        [0] = {
+                .name   = "MTU2_0",
+                .start  = 0xfffe4300,
+                .end    = 0xfffe4326,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 146,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device mtu2_0_device = {
+        .name           = "sh_mtu2",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &mtu2_0_platform_data,
+        },
+        .resource       = mtu2_0_resources,
+        .num_resources  = ARRAY_SIZE(mtu2_0_resources),
+};
+
+static struct sh_timer_config mtu2_1_platform_data = {
+        .name = "MTU2_1",
+        .channel_offset = -0x100,
+        .timer_bit = 1,
+        .clk = "peripheral_clk",
+        .clockevent_rating = 200,
+};
+
+static struct resource mtu2_1_resources[] = {
+        [0] = {
+                .name   = "MTU2_1",
+                .start  = 0xfffe4380,
+                .end    = 0xfffe4390,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 153,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device mtu2_1_device = {
+        .name           = "sh_mtu2",
+        .id             = 1,
+        .dev = {
+                .platform_data  = &mtu2_1_platform_data,
+        },
+        .resource       = mtu2_1_resources,
+        .num_resources  = ARRAY_SIZE(mtu2_1_resources),
+};
+
 static struct resource rtc_resources[] = {
         [0] = {
                 .start  = 0xffff2000,
@@ -227,6 +355,10 @@ static struct platform_device rtc_device = {
 
 static struct platform_device *sh7203_devices[] __initdata = {
         &sci_device,
+        &cmt0_device,
+        &cmt1_device,
+        &mtu2_0_device,
+        &mtu2_1_device,
         &rtc_device,
 };
 
@@ -241,3 +373,25 @@ void __init plat_irq_setup(void)
 {
         register_intc_controller(&intc_desc);
 }
+
+static struct platform_device *sh7203_early_devices[] __initdata = {
+        &cmt0_device,
+        &cmt1_device,
+        &mtu2_0_device,
+        &mtu2_1_device,
+};
+
+#define STBCR3 0xfffe0408
+#define STBCR4 0xfffe040c
+
+void __init plat_early_device_setup(void)
+{
+        /* enable CMT clock */
+        __raw_writeb(__raw_readb(STBCR4) & ~0x04, STBCR4);
+
+        /* enable MTU2 clock */
+        __raw_writeb(__raw_readb(STBCR3) & ~0x20, STBCR3);
+
+        early_platform_add_devices(sh7203_early_devices,
+                                   ARRAY_SIZE(sh7203_early_devices));
+}
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
index c46a8355726d..3e6f3d7a58be 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
@@ -12,6 +12,8 @@
 #include <linux/init.h>
 #include <linux/serial.h>
 #include <linux/serial_sci.h>
+#include <linux/sh_timer.h>
+#include <linux/io.h>
 
 enum {
         UNUSED = 0,
@@ -165,8 +167,170 @@ static struct platform_device sci_device = {
         },
 };
 
+static struct sh_timer_config cmt0_platform_data = {
+        .name = "CMT0",
+        .channel_offset = 0x02,
+        .timer_bit = 0,
+        .clk = "peripheral_clk",
+        .clockevent_rating = 125,
+        .clocksource_rating = 0, /* disabled due to code generation issues */
+};
+
+static struct resource cmt0_resources[] = {
+        [0] = {
+                .name   = "CMT0",
+                .start  = 0xfffec002,
+                .end    = 0xfffec007,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 140,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device cmt0_device = {
+        .name           = "sh_cmt",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &cmt0_platform_data,
+        },
+        .resource       = cmt0_resources,
+        .num_resources  = ARRAY_SIZE(cmt0_resources),
+};
+
+static struct sh_timer_config cmt1_platform_data = {
+        .name = "CMT1",
+        .channel_offset = 0x08,
+        .timer_bit = 1,
+        .clk = "peripheral_clk",
+        .clockevent_rating = 125,
+        .clocksource_rating = 0, /* disabled due to code generation issues */
+};
+
+static struct resource cmt1_resources[] = {
+        [0] = {
+                .name   = "CMT1",
+                .start  = 0xfffec008,
+                .end    = 0xfffec00d,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 144,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device cmt1_device = {
+        .name           = "sh_cmt",
+        .id             = 1,
+        .dev = {
+                .platform_data  = &cmt1_platform_data,
+        },
+        .resource       = cmt1_resources,
+        .num_resources  = ARRAY_SIZE(cmt1_resources),
+};
+
+static struct sh_timer_config mtu2_0_platform_data = {
+        .name = "MTU2_0",
+        .channel_offset = -0x80,
+        .timer_bit = 0,
+        .clk = "peripheral_clk",
+        .clockevent_rating = 200,
+};
+
+static struct resource mtu2_0_resources[] = {
+        [0] = {
+                .name   = "MTU2_0",
+                .start  = 0xfffe4300,
+                .end    = 0xfffe4326,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 156,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device mtu2_0_device = {
+        .name           = "sh_mtu2",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &mtu2_0_platform_data,
+        },
+        .resource       = mtu2_0_resources,
+        .num_resources  = ARRAY_SIZE(mtu2_0_resources),
+};
+
+static struct sh_timer_config mtu2_1_platform_data = {
+        .name = "MTU2_1",
+        .channel_offset = -0x100,
+        .timer_bit = 1,
+        .clk = "peripheral_clk",
+        .clockevent_rating = 200,
+};
+
+static struct resource mtu2_1_resources[] = {
+        [0] = {
+                .name   = "MTU2_1",
+                .start  = 0xfffe4380,
+                .end    = 0xfffe4390,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 164,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device mtu2_1_device = {
+        .name           = "sh_mtu2",
+        .id             = 1,
+        .dev = {
+                .platform_data  = &mtu2_1_platform_data,
+        },
+        .resource       = mtu2_1_resources,
+        .num_resources  = ARRAY_SIZE(mtu2_1_resources),
+};
+
+static struct sh_timer_config mtu2_2_platform_data = {
+        .name = "MTU2_2",
+        .channel_offset = 0x80,
+        .timer_bit = 2,
+        .clk = "peripheral_clk",
+        .clockevent_rating = 200,
+};
+
+static struct resource mtu2_2_resources[] = {
+        [0] = {
+                .name   = "MTU2_2",
+                .start  = 0xfffe4000,
+                .end    = 0xfffe400a,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 180,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device mtu2_2_device = {
+        .name           = "sh_mtu2",
+        .id             = 2,
+        .dev = {
+                .platform_data  = &mtu2_2_platform_data,
+        },
+        .resource       = mtu2_2_resources,
+        .num_resources  = ARRAY_SIZE(mtu2_2_resources),
+};
+
 static struct platform_device *sh7206_devices[] __initdata = {
         &sci_device,
+        &cmt0_device,
+        &cmt1_device,
+        &mtu2_0_device,
+        &mtu2_1_device,
+        &mtu2_2_device,
 };
 
 static int __init sh7206_devices_setup(void)
@@ -180,3 +344,26 @@ void __init plat_irq_setup(void)
 {
         register_intc_controller(&intc_desc);
 }
+
+static struct platform_device *sh7206_early_devices[] __initdata = {
+        &cmt0_device,
+        &cmt1_device,
+        &mtu2_0_device,
+        &mtu2_1_device,
+        &mtu2_2_device,
+};
+
+#define STBCR3 0xfffe0408
+#define STBCR4 0xfffe040c
+
+void __init plat_early_device_setup(void)
+{
+        /* enable CMT clock */
+        __raw_writeb(__raw_readb(STBCR4) & ~0x04, STBCR4);
+
+        /* enable MTU2 clock */
+        __raw_writeb(__raw_readb(STBCR3) & ~0x20, STBCR3);
+
+        early_platform_add_devices(sh7206_early_devices,
+                                   ARRAY_SIZE(sh7206_early_devices));
+}
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh3.c b/arch/sh/kernel/cpu/sh3/clock-sh3.c
index c3c945958baf..27b8738f0b09 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh3.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh3.c
@@ -38,36 +38,36 @@ static struct clk_ops sh3_master_clk_ops = {
         .init           = master_clk_init,
 };
 
-static void module_clk_recalc(struct clk *clk)
+static unsigned long module_clk_recalc(struct clk *clk)
 {
         int frqcr = ctrl_inw(FRQCR);
         int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
 
-        clk->rate = clk->parent->rate / pfc_divisors[idx];
+        return clk->parent->rate / pfc_divisors[idx];
 }
 
 static struct clk_ops sh3_module_clk_ops = {
         .recalc         = module_clk_recalc,
 };
 
-static void bus_clk_recalc(struct clk *clk)
+static unsigned long bus_clk_recalc(struct clk *clk)
 {
         int frqcr = ctrl_inw(FRQCR);
         int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4);
 
-        clk->rate = clk->parent->rate / stc_multipliers[idx];
+        return clk->parent->rate / stc_multipliers[idx];
 }
 
 static struct clk_ops sh3_bus_clk_ops = {
         .recalc         = bus_clk_recalc,
 };
 
-static void cpu_clk_recalc(struct clk *clk)
+static unsigned long cpu_clk_recalc(struct clk *clk)
 {
         int frqcr = ctrl_inw(FRQCR);
         int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2);
 
-        clk->rate = clk->parent->rate / ifc_divisors[idx];
+        return clk->parent->rate / ifc_divisors[idx];
 }
 
 static struct clk_ops sh3_cpu_clk_ops = {
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7705.c b/arch/sh/kernel/cpu/sh3/clock-sh7705.c
index dfdbf3277fd7..0ca8f2c3646c 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7705.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7705.c
@@ -39,30 +39,30 @@ static struct clk_ops sh7705_master_clk_ops = {
         .init           = master_clk_init,
 };
 
-static void module_clk_recalc(struct clk *clk)
+static unsigned long module_clk_recalc(struct clk *clk)
 {
         int idx = ctrl_inw(FRQCR) & 0x0003;
-        clk->rate = clk->parent->rate / pfc_divisors[idx];
+        return clk->parent->rate / pfc_divisors[idx];
 }
 
 static struct clk_ops sh7705_module_clk_ops = {
         .recalc         = module_clk_recalc,
 };
 
-static void bus_clk_recalc(struct clk *clk)
+static unsigned long bus_clk_recalc(struct clk *clk)
 {
         int idx = (ctrl_inw(FRQCR) & 0x0300) >> 8;
-        clk->rate = clk->parent->rate / stc_multipliers[idx];
+        return clk->parent->rate / stc_multipliers[idx];
 }
 
 static struct clk_ops sh7705_bus_clk_ops = {
         .recalc         = bus_clk_recalc,
 };
 
-static void cpu_clk_recalc(struct clk *clk)
+static unsigned long cpu_clk_recalc(struct clk *clk)
 {
         int idx = (ctrl_inw(FRQCR) & 0x0030) >> 4;
-        clk->rate = clk->parent->rate / ifc_divisors[idx];
+        return clk->parent->rate / ifc_divisors[idx];
 }
 
 static struct clk_ops sh7705_cpu_clk_ops = {
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7706.c b/arch/sh/kernel/cpu/sh3/clock-sh7706.c
index 0cf96f9833bc..4bf7887d310a 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7706.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7706.c
@@ -34,36 +34,36 @@ static struct clk_ops sh7706_master_clk_ops = {
         .init           = master_clk_init,
 };
 
-static void module_clk_recalc(struct clk *clk)
+static unsigned long module_clk_recalc(struct clk *clk)
 {
         int frqcr = ctrl_inw(FRQCR);
         int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
 
-        clk->rate = clk->parent->rate / pfc_divisors[idx];
+        return clk->parent->rate / pfc_divisors[idx];
 }
 
 static struct clk_ops sh7706_module_clk_ops = {
         .recalc         = module_clk_recalc,
 };
 
-static void bus_clk_recalc(struct clk *clk)
+static unsigned long bus_clk_recalc(struct clk *clk)
 {
         int frqcr = ctrl_inw(FRQCR);
         int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4);
 
-        clk->rate = clk->parent->rate / stc_multipliers[idx];
+        return clk->parent->rate / stc_multipliers[idx];
 }
 
 static struct clk_ops sh7706_bus_clk_ops = {
         .recalc         = bus_clk_recalc,
 };
 
-static void cpu_clk_recalc(struct clk *clk)
+static unsigned long cpu_clk_recalc(struct clk *clk)
 {
         int frqcr = ctrl_inw(FRQCR);
         int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2);
 
-        clk->rate = clk->parent->rate / ifc_divisors[idx];
+        return clk->parent->rate / ifc_divisors[idx];
 }
 
 static struct clk_ops sh7706_cpu_clk_ops = {
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7709.c b/arch/sh/kernel/cpu/sh3/clock-sh7709.c
index b791a29fdb62..fa30b6017730 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7709.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7709.c
@@ -41,12 +41,12 @@ static struct clk_ops sh7709_master_clk_ops = {
         .init           = master_clk_init,
 };
 
-static void module_clk_recalc(struct clk *clk)
+static unsigned long module_clk_recalc(struct clk *clk)
 {
         int frqcr = ctrl_inw(FRQCR);
         int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
 
-        clk->rate = clk->parent->rate / pfc_divisors[idx];
+        return clk->parent->rate / pfc_divisors[idx];
 }
 
 static struct clk_ops sh7709_module_clk_ops = {
@@ -56,25 +56,25 @@ static struct clk_ops sh7709_module_clk_ops = {
         .recalc         = module_clk_recalc,
 };
 
-static void bus_clk_recalc(struct clk *clk)
+static unsigned long bus_clk_recalc(struct clk *clk)
 {
         int frqcr = ctrl_inw(FRQCR);
         int idx = (frqcr & 0x0080) ?
                 ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4) : 1;
 
-        clk->rate = clk->parent->rate * stc_multipliers[idx];
+        return clk->parent->rate * stc_multipliers[idx];
 }
 
 static struct clk_ops sh7709_bus_clk_ops = {
         .recalc         = bus_clk_recalc,
 };
 
-static void cpu_clk_recalc(struct clk *clk)
+static unsigned long cpu_clk_recalc(struct clk *clk)
 {
         int frqcr = ctrl_inw(FRQCR);
         int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2);
 
-        clk->rate = clk->parent->rate / ifc_divisors[idx];
+        return clk->parent->rate / ifc_divisors[idx];
 }
 
 static struct clk_ops sh7709_cpu_clk_ops = {
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7710.c b/arch/sh/kernel/cpu/sh3/clock-sh7710.c
index 4744c50ec449..030a58ba18a5 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7710.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7710.c
@@ -33,30 +33,30 @@ static struct clk_ops sh7710_master_clk_ops = {
         .init           = master_clk_init,
 };
 
-static void module_clk_recalc(struct clk *clk)
+static unsigned long module_clk_recalc(struct clk *clk)
 {
         int idx = (ctrl_inw(FRQCR) & 0x0007);
-        clk->rate = clk->parent->rate / md_table[idx];
+        return clk->parent->rate / md_table[idx];
 }
 
 static struct clk_ops sh7710_module_clk_ops = {
         .recalc         = module_clk_recalc,
 };
 
-static void bus_clk_recalc(struct clk *clk)
+static unsigned long bus_clk_recalc(struct clk *clk)
 {
         int idx = (ctrl_inw(FRQCR) & 0x0700) >> 8;
-        clk->rate = clk->parent->rate / md_table[idx];
+        return clk->parent->rate / md_table[idx];
 }
 
 static struct clk_ops sh7710_bus_clk_ops = {
         .recalc         = bus_clk_recalc,
 };
 
-static void cpu_clk_recalc(struct clk *clk)
+static unsigned long cpu_clk_recalc(struct clk *clk)
 {
         int idx = (ctrl_inw(FRQCR) & 0x0070) >> 4;
-        clk->rate = clk->parent->rate / md_table[idx];
+        return clk->parent->rate / md_table[idx];
 }
 
 static struct clk_ops sh7710_cpu_clk_ops = {
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7712.c b/arch/sh/kernel/cpu/sh3/clock-sh7712.c
index 54f54df51ef0..6428ee6c77ed 100644
--- a/arch/sh/kernel/cpu/sh3/clock-sh7712.c
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7712.c
@@ -33,24 +33,24 @@ static struct clk_ops sh7712_master_clk_ops = {
         .init           = master_clk_init,
 };
 
-static void module_clk_recalc(struct clk *clk)
+static unsigned long module_clk_recalc(struct clk *clk)
 {
         int frqcr = ctrl_inw(FRQCR);
         int idx = frqcr & 0x0007;
 
-        clk->rate = clk->parent->rate / divisors[idx];
+        return clk->parent->rate / divisors[idx];
 }
 
 static struct clk_ops sh7712_module_clk_ops = {
         .recalc         = module_clk_recalc,
 };
 
-static void cpu_clk_recalc(struct clk *clk)
+static unsigned long cpu_clk_recalc(struct clk *clk)
 {
         int frqcr = ctrl_inw(FRQCR);
         int idx = (frqcr & 0x0030) >> 4;
 
-        clk->rate = clk->parent->rate / divisors[idx];
+        return clk->parent->rate / divisors[idx];
 }
 
 static struct clk_ops sh7712_cpu_clk_ops = {
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
index 63b67badd67e..88f742fed9ed 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
@@ -13,6 +13,7 @@
 #include <linux/irq.h>
 #include <linux/serial.h>
 #include <linux/serial_sci.h>
+#include <linux/sh_timer.h>
 #include <asm/rtc.h>
 
 enum {
@@ -116,7 +117,102 @@ static struct platform_device rtc_device = {
         },
 };
 
+static struct sh_timer_config tmu0_platform_data = {
+        .name = "TMU0",
+        .channel_offset = 0x02,
+        .timer_bit = 0,
+        .clk = "peripheral_clk",
+        .clockevent_rating = 200,
+};
+
+static struct resource tmu0_resources[] = {
+        [0] = {
+                .name   = "TMU0",
+                .start  = 0xfffffe94,
+                .end    = 0xfffffe9f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 16,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu0_device = {
+        .name           = "sh_tmu",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &tmu0_platform_data,
+        },
+        .resource       = tmu0_resources,
+        .num_resources  = ARRAY_SIZE(tmu0_resources),
+};
+
+static struct sh_timer_config tmu1_platform_data = {
+        .name = "TMU1",
+        .channel_offset = 0xe,
+        .timer_bit = 1,
+        .clk = "peripheral_clk",
+        .clocksource_rating = 200,
+};
+
+static struct resource tmu1_resources[] = {
+        [0] = {
+                .name   = "TMU1",
+                .start  = 0xfffffea0,
+                .end    = 0xfffffeab,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 17,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu1_device = {
+        .name           = "sh_tmu",
+        .id             = 1,
+        .dev = {
+                .platform_data  = &tmu1_platform_data,
+        },
+        .resource       = tmu1_resources,
+        .num_resources  = ARRAY_SIZE(tmu1_resources),
+};
+
+static struct sh_timer_config tmu2_platform_data = {
+        .name = "TMU2",
+        .channel_offset = 0x1a,
+        .timer_bit = 2,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu2_resources[] = {
+        [0] = {
+                .name   = "TMU2",
+                .start  = 0xfffffeac,
+                .end    = 0xfffffebb,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 18,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu2_device = {
+        .name           = "sh_tmu",
+        .id             = 2,
+        .dev = {
+                .platform_data  = &tmu2_platform_data,
+        },
+        .resource       = tmu2_resources,
+        .num_resources  = ARRAY_SIZE(tmu2_resources),
+};
+
 static struct platform_device *sh7705_devices[] __initdata = {
+        &tmu0_device,
+        &tmu1_device,
+        &tmu2_device,
         &sci_device,
         &rtc_device,
 };
@@ -128,6 +224,18 @@ static int __init sh7705_devices_setup(void)
 }
 __initcall(sh7705_devices_setup);
 
+static struct platform_device *sh7705_early_devices[] __initdata = {
+        &tmu0_device,
+        &tmu1_device,
+        &tmu2_device,
+};
+
+void __init plat_early_device_setup(void)
+{
+        early_platform_add_devices(sh7705_early_devices,
+                                   ARRAY_SIZE(sh7705_early_devices));
+}
+
 void __init plat_irq_setup(void)
 {
         register_intc_controller(&intc_desc);
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
index a74f960b5e79..c56306798584 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh770x.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
@@ -18,6 +18,7 @@
 #include <linux/platform_device.h>
 #include <linux/serial.h>
 #include <linux/serial_sci.h>
+#include <linux/sh_timer.h>
 
 enum {
         UNUSED = 0,
@@ -144,7 +145,102 @@ static struct platform_device sci_device = {
         },
 };
 
+static struct sh_timer_config tmu0_platform_data = {
+        .name = "TMU0",
+        .channel_offset = 0x02,
+        .timer_bit = 0,
+        .clk = "peripheral_clk",
+        .clockevent_rating = 200,
+};
+
+static struct resource tmu0_resources[] = {
+        [0] = {
+                .name   = "TMU0",
+                .start  = 0xfffffe94,
+                .end    = 0xfffffe9f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 16,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu0_device = {
+        .name           = "sh_tmu",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &tmu0_platform_data,
+        },
+        .resource       = tmu0_resources,
+        .num_resources  = ARRAY_SIZE(tmu0_resources),
+};
+
+static struct sh_timer_config tmu1_platform_data = {
+        .name = "TMU1",
+        .channel_offset = 0xe,
+        .timer_bit = 1,
+        .clk = "peripheral_clk",
+        .clocksource_rating = 200,
+};
+
+static struct resource tmu1_resources[] = {
+        [0] = {
+                .name   = "TMU1",
+                .start  = 0xfffffea0,
+                .end    = 0xfffffeab,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 17,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu1_device = {
+        .name           = "sh_tmu",
+        .id             = 1,
+        .dev = {
+                .platform_data  = &tmu1_platform_data,
+        },
+        .resource       = tmu1_resources,
+        .num_resources  = ARRAY_SIZE(tmu1_resources),
+};
+
+static struct sh_timer_config tmu2_platform_data = {
+        .name = "TMU2",
+        .channel_offset = 0x1a,
+        .timer_bit = 2,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu2_resources[] = {
+        [0] = {
+                .name   = "TMU2",
+                .start  = 0xfffffeac,
+                .end    = 0xfffffebb,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 18,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu2_device = {
+        .name           = "sh_tmu",
+        .id             = 2,
+        .dev = {
+                .platform_data  = &tmu2_platform_data,
+        },
+        .resource       = tmu2_resources,
+        .num_resources  = ARRAY_SIZE(tmu2_resources),
+};
+
 static struct platform_device *sh770x_devices[] __initdata = {
+        &tmu0_device,
+        &tmu1_device,
+        &tmu2_device,
         &sci_device,
         &rtc_device,
 };
@@ -156,6 +252,18 @@ static int __init sh770x_devices_setup(void)
 }
 __initcall(sh770x_devices_setup);
 
+static struct platform_device *sh770x_early_devices[] __initdata = {
+        &tmu0_device,
+        &tmu1_device,
+        &tmu2_device,
+};
+
+void __init plat_early_device_setup(void)
+{
+        early_platform_add_devices(sh770x_early_devices,
+                                   ARRAY_SIZE(sh770x_early_devices));
+}
+
 void __init plat_irq_setup(void)
 {
         register_intc_controller(&intc_desc);
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
index 335098b66e2f..efa76c8148f4 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7710.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
@@ -13,6 +13,7 @@
 #include <linux/irq.h>
 #include <linux/serial.h>
 #include <linux/serial_sci.h>
+#include <linux/sh_timer.h>
 #include <asm/rtc.h>
 
 enum {
@@ -120,7 +121,102 @@ static struct platform_device sci_device = {
         },
 };
 
+static struct sh_timer_config tmu0_platform_data = {
+        .name = "TMU0",
+        .channel_offset = 0x02,
+        .timer_bit = 0,
+        .clk = "peripheral_clk",
+        .clockevent_rating = 200,
+};
+
+static struct resource tmu0_resources[] = {
+        [0] = {
+                .name   = "TMU0",
+                .start  = 0xa412fe94,
+                .end    = 0xa412fe9f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 16,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu0_device = {
+        .name           = "sh_tmu",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &tmu0_platform_data,
+        },
+        .resource       = tmu0_resources,
+        .num_resources  = ARRAY_SIZE(tmu0_resources),
+};
+
+static struct sh_timer_config tmu1_platform_data = {
+        .name = "TMU1",
+        .channel_offset = 0xe,
+        .timer_bit = 1,
+        .clk = "peripheral_clk",
+        .clocksource_rating = 200,
+};
+
+static struct resource tmu1_resources[] = {
+        [0] = {
+                .name   = "TMU1",
+                .start  = 0xa412fea0,
+                .end    = 0xa412feab,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 17,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu1_device = {
+        .name           = "sh_tmu",
+        .id             = 1,
+        .dev = {
+                .platform_data  = &tmu1_platform_data,
+        },
+        .resource       = tmu1_resources,
+        .num_resources  = ARRAY_SIZE(tmu1_resources),
+};
+
+static struct sh_timer_config tmu2_platform_data = {
+        .name = "TMU2",
+        .channel_offset = 0x1a,
+        .timer_bit = 2,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu2_resources[] = {
+        [0] = {
+                .name   = "TMU2",
+                .start  = 0xa412feac,
+                .end    = 0xa412feb5,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 18,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu2_device = {
+        .name           = "sh_tmu",
+        .id             = 2,
+        .dev = {
+                .platform_data  = &tmu2_platform_data,
+        },
+        .resource       = tmu2_resources,
+        .num_resources  = ARRAY_SIZE(tmu2_resources),
+};
+
 static struct platform_device *sh7710_devices[] __initdata = {
+        &tmu0_device,
+        &tmu1_device,
+        &tmu2_device,
         &sci_device,
         &rtc_device,
 };
@@ -132,6 +228,18 @@ static int __init sh7710_devices_setup(void)
 }
 __initcall(sh7710_devices_setup);
 
+static struct platform_device *sh7710_early_devices[] __initdata = {
+        &tmu0_device,
+        &tmu1_device,
+        &tmu2_device,
+};
+
+void __init plat_early_device_setup(void)
+{
+        early_platform_add_devices(sh7710_early_devices,
+                                   ARRAY_SIZE(sh7710_early_devices));
+}
+
 void __init plat_irq_setup(void)
 {
         register_intc_controller(&intc_desc);
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
index 003874a2fd2a..5b2107798edb 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7720.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
@@ -18,6 +18,7 @@
 #include <linux/serial.h>
 #include <linux/io.h>
 #include <linux/serial_sci.h>
+#include <linux/sh_timer.h>
 #include <asm/rtc.h>
 
 static struct resource rtc_resources[] = {
@@ -123,7 +124,259 @@ static struct platform_device usbf_device = {
         .resource       = usbf_resources,
 };
 
+static struct sh_timer_config cmt0_platform_data = {
+        .name = "CMT0",
+        .channel_offset = 0x10,
+        .timer_bit = 0,
+        .clk = "peripheral_clk",
+        .clockevent_rating = 125,
+        .clocksource_rating = 125,
+};
+
+static struct resource cmt0_resources[] = {
+        [0] = {
+                .name   = "CMT0",
+                .start  = 0x044a0010,
+                .end    = 0x044a001b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 104,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device cmt0_device = {
+        .name           = "sh_cmt",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &cmt0_platform_data,
+        },
+        .resource       = cmt0_resources,
+        .num_resources  = ARRAY_SIZE(cmt0_resources),
+};
+
+static struct sh_timer_config cmt1_platform_data = {
+        .name = "CMT1",
+        .channel_offset = 0x20,
+        .timer_bit = 1,
+        .clk = "peripheral_clk",
+};
+
+static struct resource cmt1_resources[] = {
+        [0] = {
+                .name   = "CMT1",
+                .start  = 0x044a0020,
+                .end    = 0x044a002b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 104,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device cmt1_device = {
+        .name           = "sh_cmt",
+        .id             = 1,
+        .dev = {
+                .platform_data  = &cmt1_platform_data,
+        },
+        .resource       = cmt1_resources,
+        .num_resources  = ARRAY_SIZE(cmt1_resources),
+};
+
+static struct sh_timer_config cmt2_platform_data = {
+        .name = "CMT2",
+        .channel_offset = 0x30,
+        .timer_bit = 2,
+        .clk = "peripheral_clk",
+};
+
+static struct resource cmt2_resources[] = {
+        [0] = {
+                .name   = "CMT2",
+                .start  = 0x044a0030,
+                .end    = 0x044a003b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 104,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device cmt2_device = {
+        .name           = "sh_cmt",
+        .id             = 2,
+        .dev = {
+                .platform_data  = &cmt2_platform_data,
+        },
+        .resource       = cmt2_resources,
+        .num_resources  = ARRAY_SIZE(cmt2_resources),
+};
+
+static struct sh_timer_config cmt3_platform_data = {
+        .name = "CMT3",
+        .channel_offset = 0x40,
+        .timer_bit = 3,
+        .clk = "peripheral_clk",
+};
+
+static struct resource cmt3_resources[] = {
+        [0] = {
+                .name   = "CMT3",
+                .start  = 0x044a0040,
+                .end    = 0x044a004b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 104,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device cmt3_device = {
+        .name           = "sh_cmt",
+        .id             = 3,
+        .dev = {
+                .platform_data  = &cmt3_platform_data,
+        },
+        .resource       = cmt3_resources,
+        .num_resources  = ARRAY_SIZE(cmt3_resources),
+};
+
+static struct sh_timer_config cmt4_platform_data = {
+        .name = "CMT4",
+        .channel_offset = 0x50,
+        .timer_bit = 4,
+        .clk = "peripheral_clk",
+};
+
+static struct resource cmt4_resources[] = {
+        [0] = {
+                .name   = "CMT4",
+                .start  = 0x044a0050,
+                .end    = 0x044a005b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 104,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device cmt4_device = {
+        .name           = "sh_cmt",
+        .id             = 4,
+        .dev = {
+                .platform_data  = &cmt4_platform_data,
+        },
+        .resource       = cmt4_resources,
+        .num_resources  = ARRAY_SIZE(cmt4_resources),
+};
+
+static struct sh_timer_config tmu0_platform_data = {
+        .name = "TMU0",
+        .channel_offset = 0x02,
+        .timer_bit = 0,
+        .clk = "peripheral_clk",
+        .clockevent_rating = 200,
+};
+
+static struct resource tmu0_resources[] = {
+        [0] = {
+                .name   = "TMU0",
+                .start  = 0xa412fe94,
+                .end    = 0xa412fe9f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 16,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu0_device = {
+        .name           = "sh_tmu",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &tmu0_platform_data,
+        },
+        .resource       = tmu0_resources,
+        .num_resources  = ARRAY_SIZE(tmu0_resources),
+};
+
+static struct sh_timer_config tmu1_platform_data = {
+        .name = "TMU1",
+        .channel_offset = 0xe,
+        .timer_bit = 1,
+        .clk = "peripheral_clk",
+        .clocksource_rating = 200,
+};
+
+static struct resource tmu1_resources[] = {
+        [0] = {
+                .name   = "TMU1",
+                .start  = 0xa412fea0,
+                .end    = 0xa412feab,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 17,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu1_device = {
+        .name           = "sh_tmu",
+        .id             = 1,
+        .dev = {
+                .platform_data  = &tmu1_platform_data,
+        },
+        .resource       = tmu1_resources,
+        .num_resources  = ARRAY_SIZE(tmu1_resources),
+};
+
+static struct sh_timer_config tmu2_platform_data = {
+        .name = "TMU2",
+        .channel_offset = 0x1a,
+        .timer_bit = 2,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu2_resources[] = {
+        [0] = {
+                .name   = "TMU2",
+                .start  = 0xa412feac,
+                .end    = 0xa412feb5,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 18,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu2_device = {
+        .name           = "sh_tmu",
+        .id             = 2,
+        .dev = {
+                .platform_data  = &tmu2_platform_data,
+        },
+        .resource       = tmu2_resources,
+        .num_resources  = ARRAY_SIZE(tmu2_resources),
+};
+
 static struct platform_device *sh7720_devices[] __initdata = {
+        &cmt0_device,
+        &cmt1_device,
+        &cmt2_device,
+        &cmt3_device,
+        &cmt4_device,
+        &tmu0_device,
+        &tmu1_device,
+        &tmu2_device,
         &rtc_device,
         &sci_device,
         &usb_ohci_device,
@@ -137,6 +390,23 @@ static int __init sh7720_devices_setup(void)
 }
 __initcall(sh7720_devices_setup);
 
+static struct platform_device *sh7720_early_devices[] __initdata = {
+        &cmt0_device,
+        &cmt1_device,
+        &cmt2_device,
+        &cmt3_device,
+        &cmt4_device,
+        &tmu0_device,
+        &tmu1_device,
+        &tmu2_device,
+};
+
+void __init plat_early_device_setup(void)
+{
+        early_platform_add_devices(sh7720_early_devices,
+                                   ARRAY_SIZE(sh7720_early_devices));
+}
+
 enum {
         UNUSED = 0,
 
diff --git a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
index a33429463e96..21421e34e7d5 100644
--- a/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
+++ b/arch/sh/kernel/cpu/sh4/clock-sh4-202.c
@@ -21,10 +21,10 @@
 static int frqcr3_divisors[] = { 1, 2, 3, 4, 6, 8, 16 };
 static int frqcr3_values[]   = { 0, 1, 2, 3, 4, 5, 6  };
 
-static void emi_clk_recalc(struct clk *clk)
+static unsigned long emi_clk_recalc(struct clk *clk)
 {
         int idx = ctrl_inl(CPG2_FRQCR3) & 0x0007;
-        clk->rate = clk->parent->rate / frqcr3_divisors[idx];
+        return clk->parent->rate / frqcr3_divisors[idx];
 }
 
 static inline int frqcr3_lookup(struct clk *clk, unsigned long rate)
@@ -46,14 +46,14 @@ static struct clk_ops sh4202_emi_clk_ops = {
 
 static struct clk sh4202_emi_clk = {
         .name           = "emi_clk",
-        .flags          = CLK_ALWAYS_ENABLED,
+        .flags          = CLK_ENABLE_ON_INIT,
         .ops            = &sh4202_emi_clk_ops,
 };
 
-static void femi_clk_recalc(struct clk *clk)
+static unsigned long femi_clk_recalc(struct clk *clk)
 {
         int idx = (ctrl_inl(CPG2_FRQCR3) >> 3) & 0x0007;
-        clk->rate = clk->parent->rate / frqcr3_divisors[idx];
+        return clk->parent->rate / frqcr3_divisors[idx];
 }
 
 static struct clk_ops sh4202_femi_clk_ops = {
@@ -62,7 +62,7 @@ static struct clk_ops sh4202_femi_clk_ops = {
 
 static struct clk sh4202_femi_clk = {
         .name           = "femi_clk",
-        .flags          = CLK_ALWAYS_ENABLED,
+        .flags          = CLK_ENABLE_ON_INIT,
         .ops            = &sh4202_femi_clk_ops,
 };
 
@@ -90,10 +90,10 @@ static void shoc_clk_init(struct clk *clk)
         WARN_ON(i == ARRAY_SIZE(frqcr3_divisors));      /* Undefined clock */
 }
 
-static void shoc_clk_recalc(struct clk *clk)
+static unsigned long shoc_clk_recalc(struct clk *clk)
 {
         int idx = (ctrl_inl(CPG2_FRQCR3) >> 6) & 0x0007;
-        clk->rate = clk->parent->rate / frqcr3_divisors[idx];
+        return clk->parent->rate / frqcr3_divisors[idx];
 }
 
 static int shoc_clk_verify_rate(struct clk *clk, unsigned long rate)
@@ -140,7 +140,7 @@ static struct clk_ops sh4202_shoc_clk_ops = {
 
 static struct clk sh4202_shoc_clk = {
         .name           = "shoc_clk",
-        .flags          = CLK_ALWAYS_ENABLED,
+        .flags          = CLK_ENABLE_ON_INIT,
         .ops            = &sh4202_shoc_clk_ops,
 };
 
@@ -150,31 +150,22 @@ static struct clk *sh4202_onchip_clocks[] = {
         &sh4202_shoc_clk,
 };
 
-static int __init sh4202_clk_init(void)
+int __init arch_clk_init(void)
 {
-        struct clk *clk = clk_get(NULL, "master_clk");
-        int i;
+        struct clk *clk;
+        int i, ret = 0;
+
+        cpg_clk_init();
 
+        clk = clk_get(NULL, "master_clk");
         for (i = 0; i < ARRAY_SIZE(sh4202_onchip_clocks); i++) {
                 struct clk *clkp = sh4202_onchip_clocks[i];
 
                 clkp->parent = clk;
-                clk_register(clkp);
-                clk_enable(clkp);
+                ret |= clk_register(clkp);
         }
 
-        /*
-         * Now that we have the rest of the clocks registered, we need to
-         * force the parent clock to propagate so that these clocks will
-         * automatically figure out their rate. We cheat by handing the
-         * parent clock its current rate and forcing child propagation.
-         */
-        clk_set_rate(clk, clk_get_rate(clk));
-
         clk_put(clk);
 
-        return 0;
+        return ret;
 }
-
-arch_initcall(sh4202_clk_init);
-
diff --git a/arch/sh/kernel/cpu/sh4/clock-sh4.c b/arch/sh/kernel/cpu/sh4/clock-sh4.c
index dca9f87a12d6..73294d9cd049 100644
--- a/arch/sh/kernel/cpu/sh4/clock-sh4.c
+++ b/arch/sh/kernel/cpu/sh4/clock-sh4.c
@@ -35,30 +35,30 @@ static struct clk_ops sh4_master_clk_ops = {
         .init           = master_clk_init,
 };
 
-static void module_clk_recalc(struct clk *clk)
+static unsigned long module_clk_recalc(struct clk *clk)
 {
         int idx = (ctrl_inw(FRQCR) & 0x0007);
-        clk->rate = clk->parent->rate / pfc_divisors[idx];
+        return clk->parent->rate / pfc_divisors[idx];
 }
 
 static struct clk_ops sh4_module_clk_ops = {
         .recalc         = module_clk_recalc,
 };
 
-static void bus_clk_recalc(struct clk *clk)
+static unsigned long bus_clk_recalc(struct clk *clk)
 {
         int idx = (ctrl_inw(FRQCR) >> 3) & 0x0007;
-        clk->rate = clk->parent->rate / bfc_divisors[idx];
+        return clk->parent->rate / bfc_divisors[idx];
 }
 
 static struct clk_ops sh4_bus_clk_ops = {
         .recalc         = bus_clk_recalc,
 };
 
-static void cpu_clk_recalc(struct clk *clk)
+static unsigned long cpu_clk_recalc(struct clk *clk)
 {
         int idx = (ctrl_inw(FRQCR) >> 6) & 0x0007;
-        clk->rate = clk->parent->rate / ifc_divisors[idx];
+        return clk->parent->rate / ifc_divisors[idx];
 }
 
 static struct clk_ops sh4_cpu_clk_ops = {
diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c
index 91e3677ae09d..6c78d0a9c857 100644
--- a/arch/sh/kernel/cpu/sh4/probe.c
+++ b/arch/sh/kernel/cpu/sh4/probe.c
@@ -60,12 +60,18 @@ int __init detect_cpu_and_cache_system(void)
                 if ((cvr & 0x10000000) == 0)
                         boot_cpu_data.flags |= CPU_HAS_DSP;
 
-                boot_cpu_data.flags |= CPU_HAS_LLSC;
+                boot_cpu_data.flags |= CPU_HAS_LLSC | CPU_HAS_PERF_COUNTER;
                 boot_cpu_data.cut_major = pvr & 0x7f;
+
+                boot_cpu_data.icache.ways = 4;
+                boot_cpu_data.dcache.ways = 4;
+        } else {
+                /* And some SH-4 defaults.. */
+                boot_cpu_data.flags |= CPU_HAS_PTEA;
         }
 
         /* FPU detection works for everyone */
-        if ((cvr & 0x20000000) == 1)
+        if ((cvr & 0x20000000))
                 boot_cpu_data.flags |= CPU_HAS_FPU;
 
         /* Mask off the upper chip ID */
@@ -78,25 +84,20 @@ int __init detect_cpu_and_cache_system(void)
         switch (pvr) {
         case 0x205:
                 boot_cpu_data.type = CPU_SH7750;
-                boot_cpu_data.flags |= CPU_HAS_P2_FLUSH_BUG | CPU_HAS_FPU |
-                                   CPU_HAS_PERF_COUNTER;
+                boot_cpu_data.flags |= CPU_HAS_P2_FLUSH_BUG |
+                                       CPU_HAS_PERF_COUNTER;
                 break;
         case 0x206:
                 boot_cpu_data.type = CPU_SH7750S;
-                boot_cpu_data.flags |= CPU_HAS_P2_FLUSH_BUG | CPU_HAS_FPU |
-                                   CPU_HAS_PERF_COUNTER;
+                boot_cpu_data.flags |= CPU_HAS_P2_FLUSH_BUG |
+                                       CPU_HAS_PERF_COUNTER;
                 break;
         case 0x1100:
                 boot_cpu_data.type = CPU_SH7751;
-                boot_cpu_data.flags |= CPU_HAS_FPU;
                 break;
         case 0x2001:
         case 0x2004:
                 boot_cpu_data.type = CPU_SH7770;
-                boot_cpu_data.icache.ways = 4;
-                boot_cpu_data.dcache.ways = 4;
-
-                boot_cpu_data.flags |= CPU_HAS_FPU | CPU_HAS_LLSC;
                 break;
         case 0x2006:
         case 0x200A:
@@ -107,45 +108,26 @@ int __init detect_cpu_and_cache_system(void)
                 else
                         boot_cpu_data.type = CPU_SH7780;
 
-                boot_cpu_data.icache.ways = 4;
-                boot_cpu_data.dcache.ways = 4;
-
-                boot_cpu_data.flags |= CPU_HAS_FPU | CPU_HAS_PERF_COUNTER |
-                                   CPU_HAS_LLSC;
                 break;
         case 0x3000:
         case 0x3003:
         case 0x3009:
                 boot_cpu_data.type = CPU_SH7343;
-                boot_cpu_data.icache.ways = 4;
-                boot_cpu_data.dcache.ways = 4;
-                boot_cpu_data.flags |= CPU_HAS_LLSC;
                 break;
         case 0x3004:
         case 0x3007:
                 boot_cpu_data.type = CPU_SH7785;
-                boot_cpu_data.icache.ways = 4;
-                boot_cpu_data.dcache.ways = 4;
-                boot_cpu_data.flags |= CPU_HAS_FPU | CPU_HAS_PERF_COUNTER |
-                                          CPU_HAS_LLSC;
                 break;
         case 0x4004:
                 boot_cpu_data.type = CPU_SH7786;
-                boot_cpu_data.icache.ways = 4;
-                boot_cpu_data.dcache.ways = 4;
-                boot_cpu_data.flags |= CPU_HAS_FPU | CPU_HAS_PERF_COUNTER |
-                        CPU_HAS_LLSC | CPU_HAS_PTEAEX;
+                boot_cpu_data.flags |= CPU_HAS_PTEAEX | CPU_HAS_L2_CACHE;
                 break;
         case 0x3008:
-                boot_cpu_data.icache.ways = 4;
-                boot_cpu_data.dcache.ways = 4;
-                boot_cpu_data.flags |= CPU_HAS_LLSC;
-
                 switch (prr) {
                 case 0x50:
                 case 0x51:
                         boot_cpu_data.type = CPU_SH7723;
-                        boot_cpu_data.flags |= CPU_HAS_FPU | CPU_HAS_L2_CACHE;
+                        boot_cpu_data.flags |= CPU_HAS_L2_CACHE;
                         break;
                 case 0x70:
                         boot_cpu_data.type = CPU_SH7366;
@@ -156,13 +138,13 @@ int __init detect_cpu_and_cache_system(void)
                         break;
                 }
                 break;
+        case 0x300b:
+                boot_cpu_data.type = CPU_SH7724;
+                boot_cpu_data.flags |= CPU_HAS_L2_CACHE;
+                break;
         case 0x4000:    /* 1st cut */
         case 0x4001:    /* 2nd cut */
                 boot_cpu_data.type = CPU_SHX3;
-                boot_cpu_data.icache.ways = 4;
-                boot_cpu_data.dcache.ways = 4;
-                boot_cpu_data.flags |= CPU_HAS_FPU | CPU_HAS_PERF_COUNTER |
-                                          CPU_HAS_LLSC;
                 break;
         case 0x700:
                 boot_cpu_data.type = CPU_SH4_501;
@@ -173,7 +155,6 @@ int __init detect_cpu_and_cache_system(void)
                 boot_cpu_data.type = CPU_SH4_202;
                 boot_cpu_data.icache.ways = 2;
                 boot_cpu_data.dcache.ways = 2;
-                boot_cpu_data.flags |= CPU_HAS_FPU;
                 break;
         case 0x500 ... 0x501:
                 switch (prr) {
@@ -191,18 +172,12 @@ int __init detect_cpu_and_cache_system(void)
                 boot_cpu_data.icache.ways = 2;
                 boot_cpu_data.dcache.ways = 2;
 
-                boot_cpu_data.flags |= CPU_HAS_FPU;
-
                 break;
         default:
                 boot_cpu_data.type = CPU_SH_NONE;
                 break;
         }
 
-#ifdef CONFIG_CPU_HAS_PTEA
-        boot_cpu_data.flags |= CPU_HAS_PTEA;
-#endif
-
         /*
          * On anything that's not a direct-mapped cache, look to the CVR
          * for I/D-cache specifics.
@@ -222,43 +197,48 @@ int __init detect_cpu_and_cache_system(void)
         }
 
         /*
-         * Setup the L2 cache desc
-         *
          * SH-4A's have an optional PIPT L2.
          */
         if (boot_cpu_data.flags & CPU_HAS_L2_CACHE) {
-                /* Bug if we can't decode the L2 info */
-                BUG_ON(!(cvr & 0xf));
-
-                /* Silicon and specifications have clearly never met.. */
-                cvr ^= 0xf;
-
                 /*
-                 * Size calculation is much more sensible
-                 * than it is for the L1.
-                 *
-                 * Sizes are 128KB, 258KB, 512KB, and 1MB.
+                 * Verify that it really has something hooked up, this
+                 * is the safety net for CPUs that have optional L2
+                 * support yet do not implement it.
                  */
-                size = (cvr & 0xf) << 17;
-
-                BUG_ON(!size);
-
-                boot_cpu_data.scache.way_incr           = (1 << 16);
-                boot_cpu_data.scache.entry_shift        = 5;
-                boot_cpu_data.scache.ways               = 4;
-                boot_cpu_data.scache.linesz             = L1_CACHE_BYTES;
-
-                boot_cpu_data.scache.entry_mask =
-                        (boot_cpu_data.scache.way_incr -
-                         boot_cpu_data.scache.linesz);
-
-                boot_cpu_data.scache.sets       = size /
-                        (boot_cpu_data.scache.linesz *
-                         boot_cpu_data.scache.ways);
-
-                boot_cpu_data.scache.way_size   =
-                        (boot_cpu_data.scache.sets *
-                         boot_cpu_data.scache.linesz);
+                if ((cvr & 0xf) == 0)
+                        boot_cpu_data.flags &= ~CPU_HAS_L2_CACHE;
+                else {
+                        /*
+                         * Silicon and specifications have clearly never
+                         * met..
+                         */
+                        cvr ^= 0xf;
+
+                        /*
+                         * Size calculation is much more sensible
+                         * than it is for the L1.
+                         *
+                         * Sizes are 128KB, 258KB, 512KB, and 1MB.
+                         */
+                        size = (cvr & 0xf) << 17;
+
+                        boot_cpu_data.scache.way_incr           = (1 << 16);
+                        boot_cpu_data.scache.entry_shift        = 5;
+                        boot_cpu_data.scache.ways               = 4;
+                        boot_cpu_data.scache.linesz             = L1_CACHE_BYTES;
+
+                        boot_cpu_data.scache.entry_mask =
+                                (boot_cpu_data.scache.way_incr -
+                                 boot_cpu_data.scache.linesz);
+
+                        boot_cpu_data.scache.sets       = size /
+                                (boot_cpu_data.scache.linesz *
+                                 boot_cpu_data.scache.ways);
+
+                        boot_cpu_data.scache.way_size   =
+                                (boot_cpu_data.scache.sets *
+                                 boot_cpu_data.scache.linesz);
+                }
         }
 
         return 0;
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
index 7371abf64f80..6d088d123591 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh4-202.c
@@ -2,6 +2,7 @@
  * SH4-202 Setup
  *
  *  Copyright (C) 2006  Paul Mundt
+ *  Copyright (C) 2009  Magnus Damm
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -11,6 +12,8 @@
 #include <linux/init.h>
 #include <linux/serial.h>
 #include <linux/serial_sci.h>
+#include <linux/sh_timer.h>
+#include <linux/io.h>
 
 static struct plat_sci_port sci_platform_data[] = {
         {
@@ -31,8 +34,103 @@ static struct platform_device sci_device = {
         },
 };
 
+static struct sh_timer_config tmu0_platform_data = {
+        .name = "TMU0",
+        .channel_offset = 0x04,
+        .timer_bit = 0,
+        .clk = "peripheral_clk",
+        .clockevent_rating = 200,
+};
+
+static struct resource tmu0_resources[] = {
+        [0] = {
+                .name   = "TMU0",
+                .start  = 0xffd80008,
+                .end    = 0xffd80013,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 16,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu0_device = {
+        .name           = "sh_tmu",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &tmu0_platform_data,
+        },
+        .resource       = tmu0_resources,
+        .num_resources  = ARRAY_SIZE(tmu0_resources),
+};
+
+static struct sh_timer_config tmu1_platform_data = {
+        .name = "TMU1",
+        .channel_offset = 0x10,
+        .timer_bit = 1,
+        .clk = "peripheral_clk",
+        .clocksource_rating = 200,
+};
+
+static struct resource tmu1_resources[] = {
+        [0] = {
+                .name   = "TMU1",
+                .start  = 0xffd80014,
+                .end    = 0xffd8001f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 17,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu1_device = {
+        .name           = "sh_tmu",
+        .id             = 1,
+        .dev = {
+                .platform_data  = &tmu1_platform_data,
+        },
+        .resource       = tmu1_resources,
+        .num_resources  = ARRAY_SIZE(tmu1_resources),
+};
+
+static struct sh_timer_config tmu2_platform_data = {
+        .name = "TMU2",
+        .channel_offset = 0x1c,
+        .timer_bit = 2,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu2_resources[] = {
+        [0] = {
+                .name   = "TMU2",
+                .start  = 0xffd80020,
+                .end    = 0xffd8002f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 18,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu2_device = {
+        .name           = "sh_tmu",
+        .id             = 2,
+        .dev = {
+                .platform_data  = &tmu2_platform_data,
+        },
+        .resource       = tmu2_resources,
+        .num_resources  = ARRAY_SIZE(tmu2_resources),
+};
+
 static struct platform_device *sh4202_devices[] __initdata = {
         &sci_device,
+        &tmu0_device,
+        &tmu1_device,
+        &tmu2_device,
 };
 
 static int __init sh4202_devices_setup(void)
@@ -42,7 +140,71 @@ static int __init sh4202_devices_setup(void)
 }
 __initcall(sh4202_devices_setup);
 
+static struct platform_device *sh4202_early_devices[] __initdata = {
+        &tmu0_device,
+        &tmu1_device,
+        &tmu2_device,
+};
+
+void __init plat_early_device_setup(void)
+{
+        early_platform_add_devices(sh4202_early_devices,
+                                   ARRAY_SIZE(sh4202_early_devices));
+}
+
+enum {
+        UNUSED = 0,
+
+        /* interrupt sources */
+        IRL0, IRL1, IRL2, IRL3, /* only IRLM mode supported */
+        HUDI, TMU0, TMU1, TMU2, RTC, SCIF, WDT,
+};
+
+static struct intc_vect vectors[] __initdata = {
+        INTC_VECT(HUDI, 0x600),
+        INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
+        INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460),
+        INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
+        INTC_VECT(RTC, 0x4c0),
+        INTC_VECT(SCIF, 0x700), INTC_VECT(SCIF, 0x720),
+        INTC_VECT(SCIF, 0x740), INTC_VECT(SCIF, 0x760),
+        INTC_VECT(WDT, 0x560),
+};
+
+static struct intc_prio_reg prio_registers[] __initdata = {
+        { 0xffd00004, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
+        { 0xffd00008, 0, 16, 4, /* IPRB */ { WDT, 0, 0, 0 } },
+        { 0xffd0000c, 0, 16, 4, /* IPRC */ { 0, 0, SCIF, HUDI } },
+        { 0xffd00010, 0, 16, 4, /* IPRD */ { IRL0, IRL1, IRL2, IRL3 } },
+};
+
+static DECLARE_INTC_DESC(intc_desc, "sh4-202", vectors, NULL,
+                         NULL, prio_registers, NULL);
+
+static struct intc_vect vectors_irlm[] __initdata = {
+        INTC_VECT(IRL0, 0x240), INTC_VECT(IRL1, 0x2a0),
+        INTC_VECT(IRL2, 0x300), INTC_VECT(IRL3, 0x360),
+};
+
+static DECLARE_INTC_DESC(intc_desc_irlm, "sh4-202_irlm", vectors_irlm, NULL,
+                         NULL, prio_registers, NULL);
+
 void __init plat_irq_setup(void)
 {
-        /* do nothing - all IRL interrupts are handled by the board code */
+        register_intc_controller(&intc_desc);
+}
+
+#define INTC_ICR        0xffd00000UL
+#define INTC_ICR_IRLM   (1<<7)
+
+void __init plat_irq_setup_pins(int mode)
+{
+        switch (mode) {
+        case IRQ_MODE_IRQ: /* individual interrupt mode for IRL3-0 */
+                ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
+                register_intc_controller(&intc_desc_irlm);
+                break;
+        default:
+                BUG();
+        }
 }
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
index a1c80d909cd6..851672d15cf4 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
@@ -12,6 +12,7 @@
 #include <linux/init.h>
 #include <linux/serial.h>
 #include <linux/io.h>
+#include <linux/sh_timer.h>
 #include <linux/serial_sci.h>
 
 static struct resource rtc_resources[] = {
@@ -60,9 +61,177 @@ static struct platform_device sci_device = {
         },
 };
 
+static struct sh_timer_config tmu0_platform_data = {
+        .name = "TMU0",
+        .channel_offset = 0x04,
+        .timer_bit = 0,
+        .clk = "peripheral_clk",
+        .clockevent_rating = 200,
+};
+
+static struct resource tmu0_resources[] = {
+        [0] = {
+                .name   = "TMU0",
+                .start  = 0xffd80008,
+                .end    = 0xffd80013,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 16,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu0_device = {
+        .name           = "sh_tmu",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &tmu0_platform_data,
+        },
+        .resource       = tmu0_resources,
+        .num_resources  = ARRAY_SIZE(tmu0_resources),
+};
+
+static struct sh_timer_config tmu1_platform_data = {
+        .name = "TMU1",
+        .channel_offset = 0x10,
+        .timer_bit = 1,
+        .clk = "peripheral_clk",
+        .clocksource_rating = 200,
+};
+
+static struct resource tmu1_resources[] = {
+        [0] = {
+                .name   = "TMU1",
+                .start  = 0xffd80014,
+                .end    = 0xffd8001f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 17,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu1_device = {
+        .name           = "sh_tmu",
+        .id             = 1,
+        .dev = {
+                .platform_data  = &tmu1_platform_data,
+        },
+        .resource       = tmu1_resources,
+        .num_resources  = ARRAY_SIZE(tmu1_resources),
+};
+
+static struct sh_timer_config tmu2_platform_data = {
+        .name = "TMU2",
+        .channel_offset = 0x1c,
+        .timer_bit = 2,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu2_resources[] = {
+        [0] = {
+                .name   = "TMU2",
+                .start  = 0xffd80020,
+                .end    = 0xffd8002f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 18,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu2_device = {
+        .name           = "sh_tmu",
+        .id             = 2,
+        .dev = {
+                .platform_data  = &tmu2_platform_data,
+        },
+        .resource       = tmu2_resources,
+        .num_resources  = ARRAY_SIZE(tmu2_resources),
+};
+
+/* SH7750R, SH7751 and SH7751R all have two extra timer channels */
+#if defined(CONFIG_CPU_SUBTYPE_SH7750R) || \
+        defined(CONFIG_CPU_SUBTYPE_SH7751) || \
+        defined(CONFIG_CPU_SUBTYPE_SH7751R)
+
+static struct sh_timer_config tmu3_platform_data = {
+        .name = "TMU3",
+        .channel_offset = 0x04,
+        .timer_bit = 0,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu3_resources[] = {
+        [0] = {
+                .name   = "TMU3",
+                .start  = 0xfe100008,
+                .end    = 0xfe100013,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 72,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu3_device = {
+        .name           = "sh_tmu",
+        .id             = 3,
+        .dev = {
+                .platform_data  = &tmu3_platform_data,
+        },
+        .resource       = tmu3_resources,
+        .num_resources  = ARRAY_SIZE(tmu3_resources),
+};
+
+static struct sh_timer_config tmu4_platform_data = {
+        .name = "TMU4",
+        .channel_offset = 0x10,
+        .timer_bit = 1,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu4_resources[] = {
+        [0] = {
+                .name   = "TMU4",
+                .start  = 0xfe100014,
+                .end    = 0xfe10001f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 76,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu4_device = {
+        .name           = "sh_tmu",
+        .id             = 4,
+        .dev = {
+                .platform_data  = &tmu4_platform_data,
+        },
+        .resource       = tmu4_resources,
+        .num_resources  = ARRAY_SIZE(tmu4_resources),
+};
+
+#endif
+
 static struct platform_device *sh7750_devices[] __initdata = {
         &rtc_device,
         &sci_device,
+        &tmu0_device,
+        &tmu1_device,
+        &tmu2_device,
+#if defined(CONFIG_CPU_SUBTYPE_SH7750R) || \
+        defined(CONFIG_CPU_SUBTYPE_SH7751) || \
+        defined(CONFIG_CPU_SUBTYPE_SH7751R)
+        &tmu3_device,
+        &tmu4_device,
+#endif
 };
 
 static int __init sh7750_devices_setup(void)
@@ -72,6 +241,24 @@ static int __init sh7750_devices_setup(void)
 }
 __initcall(sh7750_devices_setup);
 
+static struct platform_device *sh7750_early_devices[] __initdata = {
+        &tmu0_device,
+        &tmu1_device,
+        &tmu2_device,
+#if defined(CONFIG_CPU_SUBTYPE_SH7750R) || \
+        defined(CONFIG_CPU_SUBTYPE_SH7751) || \
+        defined(CONFIG_CPU_SUBTYPE_SH7751R)
+        &tmu3_device,
+        &tmu4_device,
+#endif
+};
+
+void __init plat_early_device_setup(void)
+{
+        early_platform_add_devices(sh7750_early_devices,
+                                   ARRAY_SIZE(sh7750_early_devices));
+}
+
 enum {
         UNUSED = 0,
 
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7760.c b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
index d9bdc931ac09..5b822519bd90 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7760.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
@@ -10,6 +10,7 @@
 #include <linux/platform_device.h>
 #include <linux/init.h>
 #include <linux/serial.h>
+#include <linux/sh_timer.h>
 #include <linux/serial_sci.h>
 #include <linux/io.h>
 
@@ -18,10 +19,7 @@ enum {
 
         /* interrupt sources */
         IRL0, IRL1, IRL2, IRL3,
-        HUDI, GPIOI,
-        DMAC_DMTE0, DMAC_DMTE1, DMAC_DMTE2, DMAC_DMTE3,
-        DMAC_DMTE4, DMAC_DMTE5, DMAC_DMTE6, DMAC_DMTE7,
-        DMAC_DMAE,
+        HUDI, GPIOI, DMAC,
         IRQ4, IRQ5, IRQ6, IRQ7,
         HCAN20, HCAN21,
         SSI0, SSI1,
@@ -36,21 +34,20 @@ enum {
         HSPI,
         MMCIF0, MMCIF1, MMCIF2, MMCIF3,
         MFI, ADC, CMT,
-        TMU0, TMU1, TMU2_TUNI, TMU2_TICPI,
-        WDT,
-        REF_RCMI, REF_ROVI,
+        TMU0, TMU1, TMU2,
+        WDT, REF,
 
         /* interrupt groups */
-        DMAC, DMABRG, SCIF0, SCIF1, SCIF2, SIM, MMCIF, TMU2, REF,
+        DMABRG, SCIF0, SCIF1, SCIF2, SIM, MMCIF,
 };
 
 static struct intc_vect vectors[] __initdata = {
         INTC_VECT(HUDI, 0x600), INTC_VECT(GPIOI, 0x620),
-        INTC_VECT(DMAC_DMTE0, 0x640), INTC_VECT(DMAC_DMTE1, 0x660),
-        INTC_VECT(DMAC_DMTE2, 0x680), INTC_VECT(DMAC_DMTE3, 0x6a0),
-        INTC_VECT(DMAC_DMTE4, 0x780), INTC_VECT(DMAC_DMTE5, 0x7a0),
-        INTC_VECT(DMAC_DMTE6, 0x7c0), INTC_VECT(DMAC_DMTE7, 0x7e0),
-        INTC_VECT(DMAC_DMAE, 0x6c0),
+        INTC_VECT(DMAC, 0x640), INTC_VECT(DMAC, 0x660),
+        INTC_VECT(DMAC, 0x680), INTC_VECT(DMAC, 0x6a0),
+        INTC_VECT(DMAC, 0x780), INTC_VECT(DMAC, 0x7a0),
+        INTC_VECT(DMAC, 0x7c0), INTC_VECT(DMAC, 0x7e0),
+        INTC_VECT(DMAC, 0x6c0),
         INTC_VECT(IRQ4, 0x800), INTC_VECT(IRQ5, 0x820),
         INTC_VECT(IRQ6, 0x840), INTC_VECT(IRQ6, 0x860),
         INTC_VECT(HCAN20, 0x900), INTC_VECT(HCAN21, 0x920),
@@ -74,23 +71,18 @@ static struct intc_vect vectors[] __initdata = {
         INTC_VECT(MFI, 0xe80), /* 0xf80 according to data sheet */
         INTC_VECT(ADC, 0xf80), INTC_VECT(CMT, 0xfa0),
         INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
-        INTC_VECT(TMU2_TUNI, 0x440), INTC_VECT(TMU2_TICPI, 0x460),
+        INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460),
         INTC_VECT(WDT, 0x560),
-        INTC_VECT(REF_RCMI, 0x580), INTC_VECT(REF_ROVI, 0x5a0),
+        INTC_VECT(REF, 0x580), INTC_VECT(REF, 0x5a0),
 };
 
 static struct intc_group groups[] __initdata = {
-        INTC_GROUP(DMAC, DMAC_DMTE0, DMAC_DMTE1, DMAC_DMTE2,
-                   DMAC_DMTE3, DMAC_DMTE4, DMAC_DMTE5,
-                   DMAC_DMTE6, DMAC_DMTE7, DMAC_DMAE),
         INTC_GROUP(DMABRG, DMABRG0, DMABRG1, DMABRG2),
         INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
         INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI),
         INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI),
         INTC_GROUP(SIM, SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEI),
         INTC_GROUP(MMCIF, MMCIF0, MMCIF1, MMCIF2, MMCIF3),
-        INTC_GROUP(TMU2, TMU2_TUNI, TMU2_TICPI),
-        INTC_GROUP(REF, REF_RCMI, REF_ROVI),
 };
 
 static struct intc_mask_reg mask_registers[] __initdata = {
@@ -168,8 +160,104 @@ static struct platform_device sci_device = {
         },
 };
 
+static struct sh_timer_config tmu0_platform_data = {
+        .name = "TMU0",
+        .channel_offset = 0x04,
+        .timer_bit = 0,
+        .clk = "peripheral_clk",
+        .clockevent_rating = 200,
+};
+
+static struct resource tmu0_resources[] = {
+        [0] = {
+                .name   = "TMU0",
+                .start  = 0xffd80008,
+                .end    = 0xffd80013,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 16,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu0_device = {
+        .name           = "sh_tmu",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &tmu0_platform_data,
+        },
+        .resource       = tmu0_resources,
+        .num_resources  = ARRAY_SIZE(tmu0_resources),
+};
+
+static struct sh_timer_config tmu1_platform_data = {
+        .name = "TMU1",
+        .channel_offset = 0x10,
+        .timer_bit = 1,
+        .clk = "peripheral_clk",
+        .clocksource_rating = 200,
+};
+
+static struct resource tmu1_resources[] = {
+        [0] = {
+                .name   = "TMU1",
+                .start  = 0xffd80014,
+                .end    = 0xffd8001f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 17,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu1_device = {
+        .name           = "sh_tmu",
+        .id             = 1,
+        .dev = {
+                .platform_data  = &tmu1_platform_data,
+        },
+        .resource       = tmu1_resources,
+        .num_resources  = ARRAY_SIZE(tmu1_resources),
+};
+
+static struct sh_timer_config tmu2_platform_data = {
+        .name = "TMU2",
+        .channel_offset = 0x1c,
+        .timer_bit = 2,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu2_resources[] = {
+        [0] = {
+                .name   = "TMU2",
+                .start  = 0xffd80020,
+                .end    = 0xffd8002f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 18,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu2_device = {
+        .name           = "sh_tmu",
+        .id             = 2,
+        .dev = {
+                .platform_data  = &tmu2_platform_data,
+        },
+        .resource       = tmu2_resources,
+        .num_resources  = ARRAY_SIZE(tmu2_resources),
+};
+
+
 static struct platform_device *sh7760_devices[] __initdata = {
         &sci_device,
+        &tmu0_device,
+        &tmu1_device,
+        &tmu2_device,
 };
 
 static int __init sh7760_devices_setup(void)
@@ -179,6 +267,18 @@ static int __init sh7760_devices_setup(void)
 }
 __initcall(sh7760_devices_setup);
 
+static struct platform_device *sh7760_early_devices[] __initdata = {
+        &tmu0_device,
+        &tmu1_device,
+        &tmu2_device,
+};
+
+void __init plat_early_device_setup(void)
+{
+        early_platform_add_devices(sh7760_early_devices,
+                                   ARRAY_SIZE(sh7760_early_devices));
+}
+
 #define INTC_ICR        0xffd00000UL
 #define INTC_ICR_IRLM   (1 << 7)
 
diff --git a/arch/sh/kernel/cpu/sh4a/Makefile b/arch/sh/kernel/cpu/sh4a/Makefile
index 1a92361feeb9..96ea09ca8cc1 100644
--- a/arch/sh/kernel/cpu/sh4a/Makefile
+++ b/arch/sh/kernel/cpu/sh4a/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7786)	+= setup-sh7786.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7343)        += setup-sh7343.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7722)        += setup-sh7722.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7723)        += setup-sh7723.o
+obj-$(CONFIG_CPU_SUBTYPE_SH7724)        += setup-sh7724.o
 obj-$(CONFIG_CPU_SUBTYPE_SH7366)        += setup-sh7366.o
 obj-$(CONFIG_CPU_SUBTYPE_SHX3)          += setup-shx3.o
 
@@ -23,15 +24,17 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7770)	:= clock-sh7770.o
 clock-$(CONFIG_CPU_SUBTYPE_SH7780)      := clock-sh7780.o
 clock-$(CONFIG_CPU_SUBTYPE_SH7785)      := clock-sh7785.o
 clock-$(CONFIG_CPU_SUBTYPE_SH7786)      := clock-sh7786.o
-clock-$(CONFIG_CPU_SUBTYPE_SH7343)      := clock-sh7722.o
+clock-$(CONFIG_CPU_SUBTYPE_SH7343)      := clock-sh7343.o
 clock-$(CONFIG_CPU_SUBTYPE_SH7722)      := clock-sh7722.o
-clock-$(CONFIG_CPU_SUBTYPE_SH7723)      := clock-sh7722.o
-clock-$(CONFIG_CPU_SUBTYPE_SH7366)      := clock-sh7722.o
+clock-$(CONFIG_CPU_SUBTYPE_SH7723)      := clock-sh7723.o
+clock-$(CONFIG_CPU_SUBTYPE_SH7724)      := clock-sh7724.o
+clock-$(CONFIG_CPU_SUBTYPE_SH7366)      := clock-sh7366.o
 clock-$(CONFIG_CPU_SUBTYPE_SHX3)        := clock-shx3.o
 
 # Pinmux setup
 pinmux-$(CONFIG_CPU_SUBTYPE_SH7722)     := pinmux-sh7722.o
 pinmux-$(CONFIG_CPU_SUBTYPE_SH7723)     := pinmux-sh7723.o
+pinmux-$(CONFIG_CPU_SUBTYPE_SH7724)     := pinmux-sh7724.o
 pinmux-$(CONFIG_CPU_SUBTYPE_SH7785)     := pinmux-sh7785.o
 pinmux-$(CONFIG_CPU_SUBTYPE_SH7786)     := pinmux-sh7786.o
 
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
new file mode 100644
index 000000000000..0ee3ee861252
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
@@ -0,0 +1,211 @@
+/*
+ * arch/sh/kernel/cpu/sh4a/clock-sh7343.c
+ *
+ * SH7343 clock framework support
+ *
+ * Copyright (C) 2009 Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <asm/clock.h>
+
+/* SH7343 registers */
+#define FRQCR           0xa4150000
+#define VCLKCR          0xa4150004
+#define SCLKACR         0xa4150008
+#define SCLKBCR         0xa415000c
+#define PLLCR           0xa4150024
+#define MSTPCR0         0xa4150030
+#define MSTPCR1         0xa4150034
+#define MSTPCR2         0xa4150038
+#define DLLFRQ          0xa4150050
+
+/* Fixed 32 KHz root clock for RTC and Power Management purposes */
+static struct clk r_clk = {
+        .name           = "rclk",
+        .id             = -1,
+        .rate           = 32768,
+};
+
+/*
+ * Default rate for the root input clock, reset this with clk_set_rate()
+ * from the platform code.
+ */
+struct clk extal_clk = {
+        .name           = "extal",
+        .id             = -1,
+        .rate           = 33333333,
+};
+
+/* The dll block multiplies the 32khz r_clk, may be used instead of extal */
+static unsigned long dll_recalc(struct clk *clk)
+{
+        unsigned long mult;
+
+        if (__raw_readl(PLLCR) & 0x1000)
+                mult = __raw_readl(DLLFRQ);
+        else
+                mult = 0;
+
+        return clk->parent->rate * mult;
+}
+
+static struct clk_ops dll_clk_ops = {
+        .recalc         = dll_recalc,
+};
+
+static struct clk dll_clk = {
+        .name           = "dll_clk",
+        .id             = -1,
+        .ops            = &dll_clk_ops,
+        .parent         = &r_clk,
+        .flags          = CLK_ENABLE_ON_INIT,
+};
+
+static unsigned long pll_recalc(struct clk *clk)
+{
+        unsigned long mult = 1;
+
+        if (__raw_readl(PLLCR) & 0x4000)
+                mult = (((__raw_readl(FRQCR) >> 24) & 0x1f) + 1);
+
+        return clk->parent->rate * mult;
+}
+
+static struct clk_ops pll_clk_ops = {
+        .recalc         = pll_recalc,
+};
+
+static struct clk pll_clk = {
+        .name           = "pll_clk",
+        .id             = -1,
+        .ops            = &pll_clk_ops,
+        .flags          = CLK_ENABLE_ON_INIT,
+};
+
+struct clk *main_clks[] = {
+        &r_clk,
+        &extal_clk,
+        &dll_clk,
+        &pll_clk,
+};
+
+static int multipliers[] = { 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1 };
+static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 };
+
+static struct clk_div_mult_table div4_table = {
+        .divisors = divisors,
+        .nr_divisors = ARRAY_SIZE(divisors),
+        .multipliers = multipliers,
+        .nr_multipliers = ARRAY_SIZE(multipliers),
+};
+
+enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P,
+       DIV4_SIUA, DIV4_SIUB, DIV4_NR };
+
+#define DIV4(_str, _reg, _bit, _mask, _flags) \
+  SH_CLK_DIV4(_str, &pll_clk, _reg, _bit, _mask, _flags)
+
+struct clk div4_clks[DIV4_NR] = {
+        [DIV4_I] = DIV4("cpu_clk", FRQCR, 20, 0x1fff, CLK_ENABLE_ON_INIT),
+        [DIV4_U] = DIV4("umem_clk", FRQCR, 16, 0x1fff, CLK_ENABLE_ON_INIT),
+        [DIV4_SH] = DIV4("shyway_clk", FRQCR, 12, 0x1fff, CLK_ENABLE_ON_INIT),
+        [DIV4_B] = DIV4("bus_clk", FRQCR, 8, 0x1fff, CLK_ENABLE_ON_INIT),
+        [DIV4_B3] = DIV4("b3_clk", FRQCR, 4, 0x1fff, CLK_ENABLE_ON_INIT),
+        [DIV4_P] = DIV4("peripheral_clk", FRQCR, 0, 0x1fff, 0),
+        [DIV4_SIUA] = DIV4("siua_clk", SCLKACR, 0, 0x1fff, 0),
+        [DIV4_SIUB] = DIV4("siub_clk", SCLKBCR, 0, 0x1fff, 0),
+};
+
+struct clk div6_clks[] = {
+        SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0),
+};
+
+#define MSTP(_str, _parent, _reg, _bit, _flags) \
+  SH_CLK_MSTP32(_str, -1, _parent, _reg, _bit, _flags)
+
+static struct clk mstp_clks[] = {
+        MSTP("tlb0", &div4_clks[DIV4_I], MSTPCR0, 31, CLK_ENABLE_ON_INIT),
+        MSTP("ic0", &div4_clks[DIV4_I], MSTPCR0, 30, CLK_ENABLE_ON_INIT),
+        MSTP("oc0", &div4_clks[DIV4_I], MSTPCR0, 29, CLK_ENABLE_ON_INIT),
+        MSTP("uram0", &div4_clks[DIV4_U], MSTPCR0, 28, CLK_ENABLE_ON_INIT),
+        MSTP("xymem0", &div4_clks[DIV4_B], MSTPCR0, 26, CLK_ENABLE_ON_INIT),
+        MSTP("intc3", &div4_clks[DIV4_P], MSTPCR0, 23, 0),
+        MSTP("intc0", &div4_clks[DIV4_P], MSTPCR0, 22, 0),
+        MSTP("dmac0", &div4_clks[DIV4_P], MSTPCR0, 21, 0),
+        MSTP("sh0", &div4_clks[DIV4_P], MSTPCR0, 20, 0),
+        MSTP("hudi0", &div4_clks[DIV4_P], MSTPCR0, 19, 0),
+        MSTP("ubc0", &div4_clks[DIV4_P], MSTPCR0, 17, 0),
+        MSTP("tmu0", &div4_clks[DIV4_P], MSTPCR0, 15, 0),
+        MSTP("cmt0", &r_clk, MSTPCR0, 14, 0),
+        MSTP("rwdt0", &r_clk, MSTPCR0, 13, 0),
+        MSTP("mfi0", &div4_clks[DIV4_P], MSTPCR0, 11, 0),
+        MSTP("flctl0", &div4_clks[DIV4_P], MSTPCR0, 10, 0),
+        MSTP("scif0", &div4_clks[DIV4_P], MSTPCR0, 7, 0),
+        MSTP("scif1", &div4_clks[DIV4_P], MSTPCR0, 6, 0),
+        MSTP("scif2", &div4_clks[DIV4_P], MSTPCR0, 5, 0),
+        MSTP("scif3", &div4_clks[DIV4_P], MSTPCR0, 4, 0),
+        MSTP("sio0", &div4_clks[DIV4_P], MSTPCR0, 3, 0),
+        MSTP("siof0", &div4_clks[DIV4_P], MSTPCR0, 2, 0),
+        MSTP("siof1", &div4_clks[DIV4_P], MSTPCR0, 1, 0),
+
+        MSTP("i2c0", &div4_clks[DIV4_P], MSTPCR1, 9, 0),
+        MSTP("i2c1", &div4_clks[DIV4_P], MSTPCR1, 8, 0),
+
+        MSTP("tpu0", &div4_clks[DIV4_P], MSTPCR2, 25, 0),
+        MSTP("irda0", &div4_clks[DIV4_P], MSTPCR2, 24, 0),
+        MSTP("sdhi0", &div4_clks[DIV4_P], MSTPCR2, 18, 0),
+        MSTP("mmcif0", &div4_clks[DIV4_P], MSTPCR2, 17, 0),
+        MSTP("sim0", &div4_clks[DIV4_P], MSTPCR2, 16, 0),
+        MSTP("keysc0", &r_clk, MSTPCR2, 14, 0),
+        MSTP("tsif0", &div4_clks[DIV4_P], MSTPCR2, 13, 0),
+        MSTP("s3d40", &div4_clks[DIV4_P], MSTPCR2, 12, 0),
+        MSTP("usbf0", &div4_clks[DIV4_P], MSTPCR2, 11, 0),
+        MSTP("siu0", &div4_clks[DIV4_B], MSTPCR2, 8, 0),
+        MSTP("jpu0", &div4_clks[DIV4_B], MSTPCR2, 6, CLK_ENABLE_ON_INIT),
+        MSTP("vou0", &div4_clks[DIV4_B], MSTPCR2, 5, 0),
+        MSTP("beu0", &div4_clks[DIV4_B], MSTPCR2, 4, 0),
+        MSTP("ceu0", &div4_clks[DIV4_B], MSTPCR2, 3, 0),
+        MSTP("veu0", &div4_clks[DIV4_B], MSTPCR2, 2, CLK_ENABLE_ON_INIT),
+        MSTP("vpu0", &div4_clks[DIV4_B], MSTPCR2, 1, CLK_ENABLE_ON_INIT),
+        MSTP("lcdc0", &div4_clks[DIV4_B], MSTPCR2, 0, 0),
+};
+
+int __init arch_clk_init(void)
+{
+        int k, ret = 0;
+
+        /* autodetect extal or dll configuration */
+        if (__raw_readl(PLLCR) & 0x1000)
+                pll_clk.parent = &dll_clk;
+        else
+                pll_clk.parent = &extal_clk;
+
+        for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
+                ret = clk_register(main_clks[k]);
+
+        if (!ret)
+                ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
+
+        if (!ret)
+                ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks));
+
+        if (!ret)
+                ret = sh_clk_mstp32_register(mstp_clks, ARRAY_SIZE(mstp_clks));
+
+        return ret;
+}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7366.c b/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
new file mode 100644
index 000000000000..a95ebaba095c
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
@@ -0,0 +1,211 @@
+/*
+ * arch/sh/kernel/cpu/sh4a/clock-sh7366.c
+ *
+ * SH7366 clock framework support
+ *
+ * Copyright (C) 2009 Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <asm/clock.h>
+
+/* SH7366 registers */
+#define FRQCR           0xa4150000
+#define VCLKCR          0xa4150004
+#define SCLKACR         0xa4150008
+#define SCLKBCR         0xa415000c
+#define PLLCR           0xa4150024
+#define MSTPCR0         0xa4150030
+#define MSTPCR1         0xa4150034
+#define MSTPCR2         0xa4150038
+#define DLLFRQ          0xa4150050
+
+/* Fixed 32 KHz root clock for RTC and Power Management purposes */
+static struct clk r_clk = {
+        .name           = "rclk",
+        .id             = -1,
+        .rate           = 32768,
+};
+
+/*
+ * Default rate for the root input clock, reset this with clk_set_rate()
+ * from the platform code.
+ */
+struct clk extal_clk = {
+        .name           = "extal",
+        .id             = -1,
+        .rate           = 33333333,
+};
+
+/* The dll block multiplies the 32khz r_clk, may be used instead of extal */
+static unsigned long dll_recalc(struct clk *clk)
+{
+        unsigned long mult;
+
+        if (__raw_readl(PLLCR) & 0x1000)
+                mult = __raw_readl(DLLFRQ);
+        else
+                mult = 0;
+
+        return clk->parent->rate * mult;
+}
+
+static struct clk_ops dll_clk_ops = {
+        .recalc         = dll_recalc,
+};
+
+static struct clk dll_clk = {
+        .name           = "dll_clk",
+        .id             = -1,
+        .ops            = &dll_clk_ops,
+        .parent         = &r_clk,
+        .flags          = CLK_ENABLE_ON_INIT,
+};
+
+static unsigned long pll_recalc(struct clk *clk)
+{
+        unsigned long mult = 1;
+        unsigned long div = 1;
+
+        if (__raw_readl(PLLCR) & 0x4000)
+                mult = (((__raw_readl(FRQCR) >> 24) & 0x1f) + 1);
+        else
+                div = 2;
+
+        return (clk->parent->rate * mult) / div;
+}
+
+static struct clk_ops pll_clk_ops = {
+        .recalc         = pll_recalc,
+};
+
+static struct clk pll_clk = {
+        .name           = "pll_clk",
+        .id             = -1,
+        .ops            = &pll_clk_ops,
+        .flags          = CLK_ENABLE_ON_INIT,
+};
+
+struct clk *main_clks[] = {
+        &r_clk,
+        &extal_clk,
+        &dll_clk,
+        &pll_clk,
+};
+
+static int multipliers[] = { 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1 };
+static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 };
+
+static struct clk_div_mult_table div4_table = {
+        .divisors = divisors,
+        .nr_divisors = ARRAY_SIZE(divisors),
+        .multipliers = multipliers,
+        .nr_multipliers = ARRAY_SIZE(multipliers),
+};
+
+enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P,
+       DIV4_SIUA, DIV4_SIUB, DIV4_NR };
+
+#define DIV4(_str, _reg, _bit, _mask, _flags) \
+  SH_CLK_DIV4(_str, &pll_clk, _reg, _bit, _mask, _flags)
+
+struct clk div4_clks[DIV4_NR] = {
+        [DIV4_I] = DIV4("cpu_clk", FRQCR, 20, 0x1fef, CLK_ENABLE_ON_INIT),
+        [DIV4_U] = DIV4("umem_clk", FRQCR, 16, 0x1fff, CLK_ENABLE_ON_INIT),
+        [DIV4_SH] = DIV4("shyway_clk", FRQCR, 12, 0x1fff, CLK_ENABLE_ON_INIT),
+        [DIV4_B] = DIV4("bus_clk", FRQCR, 8, 0x1fff, CLK_ENABLE_ON_INIT),
+        [DIV4_B3] = DIV4("b3_clk", FRQCR, 4, 0x1fff, CLK_ENABLE_ON_INIT),
+        [DIV4_P] = DIV4("peripheral_clk", FRQCR, 0, 0x1fff, 0),
+        [DIV4_SIUA] = DIV4("siua_clk", SCLKACR, 0, 0x1fff, 0),
+        [DIV4_SIUB] = DIV4("siub_clk", SCLKBCR, 0, 0x1fff, 0),
+};
+
+struct clk div6_clks[] = {
+        SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0),
+};
+
+#define MSTP(_str, _parent, _reg, _bit, _flags) \
+  SH_CLK_MSTP32(_str, -1, _parent, _reg, _bit, _flags)
+
+static struct clk mstp_clks[] = {
+        /* See page 52 of Datasheet V0.40: Overview -> Block Diagram */
+        MSTP("tlb0", &div4_clks[DIV4_I], MSTPCR0, 31, CLK_ENABLE_ON_INIT),
+        MSTP("ic0", &div4_clks[DIV4_I], MSTPCR0, 30, CLK_ENABLE_ON_INIT),
+        MSTP("oc0", &div4_clks[DIV4_I], MSTPCR0, 29, CLK_ENABLE_ON_INIT),
+        MSTP("rsmem0", &div4_clks[DIV4_SH], MSTPCR0, 28, CLK_ENABLE_ON_INIT),
+        MSTP("xymem0", &div4_clks[DIV4_B], MSTPCR0, 26, CLK_ENABLE_ON_INIT),
+        MSTP("intc3", &div4_clks[DIV4_P], MSTPCR0, 23, 0),
+        MSTP("intc0", &div4_clks[DIV4_P], MSTPCR0, 22, 0),
+        MSTP("dmac0", &div4_clks[DIV4_P], MSTPCR0, 21, 0),
+        MSTP("sh0", &div4_clks[DIV4_P], MSTPCR0, 20, 0),
+        MSTP("hudi0", &div4_clks[DIV4_P], MSTPCR0, 19, 0),
+        MSTP("ubc0", &div4_clks[DIV4_P], MSTPCR0, 17, 0),
+        MSTP("tmu0", &div4_clks[DIV4_P], MSTPCR0, 15, 0),
+        MSTP("cmt0", &r_clk, MSTPCR0, 14, 0),
+        MSTP("rwdt0", &r_clk, MSTPCR0, 13, 0),
+        MSTP("mfi0", &div4_clks[DIV4_P], MSTPCR0, 11, 0),
+        MSTP("flctl0", &div4_clks[DIV4_P], MSTPCR0, 10, 0),
+        MSTP("scif0", &div4_clks[DIV4_P], MSTPCR0, 7, 0),
+        MSTP("scif1", &div4_clks[DIV4_P], MSTPCR0, 6, 0),
+        MSTP("scif2", &div4_clks[DIV4_P], MSTPCR0, 5, 0),
+        MSTP("msiof0", &div4_clks[DIV4_P], MSTPCR0, 2, 0),
+        MSTP("sbr0", &div4_clks[DIV4_P], MSTPCR0, 1, 0),
+
+        MSTP("i2c0", &div4_clks[DIV4_P], MSTPCR1, 9, 0),
+
+        MSTP("icb0", &div4_clks[DIV4_P], MSTPCR2, 27, 0),
+        MSTP("meram0", &div4_clks[DIV4_P], MSTPCR2, 26, 0),
+        MSTP("dacy1", &div4_clks[DIV4_P], MSTPCR2, 24, 0),
+        MSTP("dacy0", &div4_clks[DIV4_P], MSTPCR2, 23, 0),
+        MSTP("tsif0", &div4_clks[DIV4_P], MSTPCR2, 22, 0),
+        MSTP("sdhi0", &div4_clks[DIV4_P], MSTPCR2, 18, 0),
+        MSTP("mmcif0", &div4_clks[DIV4_P], MSTPCR2, 17, 0),
+        MSTP("usbf0", &div4_clks[DIV4_P], MSTPCR2, 11, 0),
+        MSTP("siu0", &div4_clks[DIV4_B], MSTPCR2, 9, 0),
+        MSTP("veu1", &div4_clks[DIV4_B], MSTPCR2, 7, CLK_ENABLE_ON_INIT),
+        MSTP("vou0", &div4_clks[DIV4_B], MSTPCR2, 5, 0),
+        MSTP("beu0", &div4_clks[DIV4_B], MSTPCR2, 4, 0),
+        MSTP("ceu0", &div4_clks[DIV4_B], MSTPCR2, 3, 0),
+        MSTP("veu0", &div4_clks[DIV4_B], MSTPCR2, 2, CLK_ENABLE_ON_INIT),
+        MSTP("vpu0", &div4_clks[DIV4_B], MSTPCR2, 1, CLK_ENABLE_ON_INIT),
+        MSTP("lcdc0", &div4_clks[DIV4_B], MSTPCR2, 0, 0),
+};
+
+int __init arch_clk_init(void)
+{
+        int k, ret = 0;
+
+        /* autodetect extal or dll configuration */
+        if (__raw_readl(PLLCR) & 0x1000)
+                pll_clk.parent = &dll_clk;
+        else
+                pll_clk.parent = &extal_clk;
+
+        for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
+                ret = clk_register(main_clks[k]);
+
+        if (!ret)
+                ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
+
+        if (!ret)
+                ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks));
+
+        if (!ret)
+                ret = sh_clk_mstp32_register(mstp_clks, ARRAY_SIZE(mstp_clks));
+
+        return ret;
+}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
index 0e174af21874..40f859354f79 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
@@ -1,844 +1,197 @@
 /*
  * arch/sh/kernel/cpu/sh4a/clock-sh7722.c
  *
- * SH7343, SH7722, SH7723 & SH7366 support for the clock framework
+ * SH7722 clock framework support
  *
- * Copyright (c) 2006-2007 Nomad Global Solutions Inc
- * Based on code for sh7343 by Paul Mundt
+ * Copyright (C) 2009 Magnus Damm
  *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/io.h>
-#include <linux/errno.h>
-#include <linux/stringify.h>
 #include <asm/clock.h>
-#include <asm/freq.h>
-
-#define N  (-1)
-#define NM (-2)
-#define ROUND_NEAREST 0
-#define ROUND_DOWN -1
-#define ROUND_UP   +1
-
-static int adjust_algos[][3] = {
-        {},     /* NO_CHANGE */
-        { NM, N, 1 },   /* N:1, N:1 */
-        { 3, 2, 2 },    /* 3:2:2 */
-        { 5, 2, 2 },    /* 5:2:2 */
-        { N, 1, 1 },    /* N:1:1 */
-
-        { N, 1 },       /* N:1 */
 
-        { N, 1 },       /* N:1 */
-        { 3, 2 },
-        { 4, 3 },
-        { 5, 4 },
-
-        { N, 1 }
+/* SH7722 registers */
+#define FRQCR           0xa4150000
+#define VCLKCR          0xa4150004
+#define SCLKACR         0xa4150008
+#define SCLKBCR         0xa415000c
+#define IRDACLKCR       0xa4150018
+#define PLLCR           0xa4150024
+#define MSTPCR0         0xa4150030
+#define MSTPCR1         0xa4150034
+#define MSTPCR2         0xa4150038
+#define DLLFRQ          0xa4150050
+
+/* Fixed 32 KHz root clock for RTC and Power Management purposes */
+static struct clk r_clk = {
+        .name           = "rclk",
+        .id             = -1,
+        .rate           = 32768,
 };
 
-static unsigned long adjust_pair_of_clocks(unsigned long r1, unsigned long r2,
-                        int m1, int m2, int round_flag)
-{
-        unsigned long rem, div;
-        int the_one = 0;
-
-        pr_debug( "Actual values: r1 = %ld\n", r1);
-        pr_debug( "...............r2 = %ld\n", r2);
-
-        if (m1 == m2) {
-                r2 = r1;
-                pr_debug( "setting equal rates: r2 now %ld\n", r2);
-        } else if ((m2 == N  && m1 == 1) ||
-                   (m2 == NM && m1 == N)) { /* N:1 or NM:N */
-                pr_debug( "Setting rates as 1:N (N:N*M)\n");
-                rem = r2 % r1;
-                pr_debug( "...remainder = %ld\n", rem);
-                if (rem) {
-                        div = r2 / r1;
-                        pr_debug( "...div = %ld\n", div);
-                        switch (round_flag) {
-                        case ROUND_NEAREST:
-                                the_one = rem >= r1/2 ? 1 : 0; break;
-                        case ROUND_UP:
-                                the_one = 1; break;
-                        case ROUND_DOWN:
-                                the_one = 0; break;
-                        }
-
-                        r2 = r1 * (div + the_one);
-                        pr_debug( "...setting r2 to %ld\n", r2);
-                }
-        } else if ((m2 == 1  && m1 == N) ||
-                   (m2 == N && m1 == NM)) { /* 1:N or N:NM */
-                pr_debug( "Setting rates as N:1 (N*M:N)\n");
-                rem = r1 % r2;
-                pr_debug( "...remainder = %ld\n", rem);
-                if (rem) {
-                        div = r1 / r2;
-                        pr_debug( "...div = %ld\n", div);
-                        switch (round_flag) {
-                        case ROUND_NEAREST:
-                                the_one = rem > r2/2 ? 1 : 0; break;
-                        case ROUND_UP:
-                                the_one = 0; break;
-                        case ROUND_DOWN:
-                                the_one = 1; break;
-                        }
-
-                        r2 = r1 / (div + the_one);
-                        pr_debug( "...setting r2 to %ld\n", r2);
-                }
-        } else { /* value:value */
-                pr_debug( "Setting rates as %d:%d\n", m1, m2);
-                div = r1 / m1;
-                r2 = div * m2;
-                pr_debug( "...div = %ld\n", div);
-                pr_debug( "...setting r2 to %ld\n", r2);
-        }
-
-        return r2;
-}
-
-static void adjust_clocks(int originate, int *l, unsigned long v[],
-                          int n_in_line)
-{
-        int x;
-
-        pr_debug( "Go down from %d...\n", originate);
-        /* go up recalculation clocks */
-        for (x = originate; x>0; x -- )
-                v[x-1] = adjust_pair_of_clocks(v[x], v[x-1],
-                                        l[x], l[x-1],
-                                        ROUND_UP);
-
-        pr_debug( "Go up from %d...\n", originate);
-        /* go down recalculation clocks */
-        for (x = originate; x<n_in_line - 1; x ++ )
-                v[x+1] = adjust_pair_of_clocks(v[x], v[x+1],
-                                        l[x], l[x+1],
-                                        ROUND_UP);
-}
-
-
 /*
- * SH7722 uses a common set of multipliers and divisors, so this
- * is quite simple..
+ * Default rate for the root input clock, reset this with clk_set_rate()
+ * from the platform code.
  */
-
-/*
- * Instead of having two separate multipliers/divisors set, like this:
- *
- * static int multipliers[] = { 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1 };
- * static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 };
- *
- * I created the divisors2 array, which is used to calculate rate like
- *   rate = parent * 2 / divisors2[ divisor ];
-*/
-static int divisors2[] = { 2, 3, 4, 5, 6, 8, 10, 12, 16, 20, 24, 32, 40 };
-
-static void master_clk_recalc(struct clk *clk)
-{
-        unsigned frqcr = ctrl_inl(FRQCR);
-
-        clk->rate = CONFIG_SH_PCLK_FREQ * (((frqcr >> 24) & 0x1f) + 1);
-}
-
-static void master_clk_init(struct clk *clk)
-{
-        clk->parent = NULL;
-        clk->flags |= CLK_RATE_PROPAGATES;
-        clk->rate = CONFIG_SH_PCLK_FREQ;
-        master_clk_recalc(clk);
-}
-
-
-static void module_clk_recalc(struct clk *clk)
-{
-        unsigned long frqcr = ctrl_inl(FRQCR);
-
-        clk->rate = clk->parent->rate / (((frqcr >> 24) & 0x1f) + 1);
-}
-
-static int master_clk_setrate(struct clk *clk, unsigned long rate, int id)
-{
-        int div = rate / clk->rate;
-        int master_divs[] = { 2, 3, 4, 6, 8, 16 };
-        int index;
-        unsigned long frqcr;
-
-        for (index = 1; index < ARRAY_SIZE(master_divs); index++)
-                if (div >= master_divs[index - 1] && div < master_divs[index])
-                        break;
-
-        if (index >= ARRAY_SIZE(master_divs))
-                index = ARRAY_SIZE(master_divs);
-        div = master_divs[index - 1];
-
-        frqcr = ctrl_inl(FRQCR);
-        frqcr &= ~(0xF << 24);
-        frqcr |= ( (div-1) << 24);
-        ctrl_outl(frqcr, FRQCR);
-
-        return 0;
-}
-
-static struct clk_ops sh7722_master_clk_ops = {
-        .init = master_clk_init,
-        .recalc = master_clk_recalc,
-        .set_rate = master_clk_setrate,
-};
-
-static struct clk_ops sh7722_module_clk_ops = {
-       .recalc = module_clk_recalc,
-};
-
-struct frqcr_context {
-        unsigned mask;
-        unsigned shift;
-};
-
-struct frqcr_context sh7722_get_clk_context(const char *name)
-{
-        struct frqcr_context ctx = { 0, };
-
-        if (!strcmp(name, "peripheral_clk")) {
-                ctx.shift = 0;
-                ctx.mask = 0xF;
-        } else if (!strcmp(name, "sdram_clk")) {
-                ctx.shift = 4;
-                ctx.mask = 0xF;
-        } else if (!strcmp(name, "bus_clk")) {
-                ctx.shift = 8;
-                ctx.mask = 0xF;
-        } else if (!strcmp(name, "sh_clk")) {
-                ctx.shift = 12;
-                ctx.mask = 0xF;
-        } else if (!strcmp(name, "umem_clk")) {
-                ctx.shift = 16;
-                ctx.mask = 0xF;
-        } else if (!strcmp(name, "cpu_clk")) {
-                ctx.shift = 20;
-                ctx.mask = 7;
-        }
-        return ctx;
-}
-
-/**
- * sh7722_find_div_index - find divisor for setting rate
- *
- * All sh7722 clocks use the same set of multipliers/divisors. This function
- * chooses correct divisor to set the rate of clock with parent clock that
- * generates frequency of 'parent_rate'
- *
- * @parent_rate: rate of parent clock
- * @rate: requested rate to be set
- */
-static int sh7722_find_div_index(unsigned long parent_rate, unsigned rate)
-{
-        unsigned div2 = parent_rate * 2 / rate;
-        int index;
-
-        if (rate > parent_rate)
-                return -EINVAL;
-
-        for (index = 1; index < ARRAY_SIZE(divisors2); index++) {
-                if (div2 > divisors2[index - 1] && div2 <= divisors2[index])
-                        break;
-        }
-        if (index >= ARRAY_SIZE(divisors2))
-                index = ARRAY_SIZE(divisors2) - 1;
-        return index;
-}
-
-static void sh7722_frqcr_recalc(struct clk *clk)
-{
-        struct frqcr_context ctx = sh7722_get_clk_context(clk->name);
-        unsigned long frqcr = ctrl_inl(FRQCR);
-        int index;
-
-        index = (frqcr >> ctx.shift) & ctx.mask;
-        clk->rate = clk->parent->rate * 2 / divisors2[index];
-}
-
-static int sh7722_frqcr_set_rate(struct clk *clk, unsigned long rate,
-                                 int algo_id)
-{
-        struct frqcr_context ctx = sh7722_get_clk_context(clk->name);
-        unsigned long parent_rate = clk->parent->rate;
-        int div;
-        unsigned long frqcr;
-        int err = 0;
-
-        /* pretty invalid */
-        if (parent_rate < rate)
-                return -EINVAL;
-
-        /* look for multiplier/divisor pair */
-        div = sh7722_find_div_index(parent_rate, rate);
-        if (div<0)
-                return div;
-
-        /* calculate new value of clock rate */
-        clk->rate = parent_rate * 2 / divisors2[div];
-        frqcr = ctrl_inl(FRQCR);
-
-        /* FIXME: adjust as algo_id specifies */
-        if (algo_id != NO_CHANGE) {
-                int originator;
-                char *algo_group_1[] = { "cpu_clk", "umem_clk", "sh_clk" };
-                char *algo_group_2[] = { "sh_clk", "bus_clk" };
-                char *algo_group_3[] = { "sh_clk", "sdram_clk" };
-                char *algo_group_4[] = { "bus_clk", "peripheral_clk" };
-                char *algo_group_5[] = { "cpu_clk", "peripheral_clk" };
-                char **algo_current = NULL;
-                /* 3 is the maximum number of clocks in relation */
-                struct clk *ck[3];
-                unsigned long values[3]; /* the same comment as above */
-                int part_length = -1;
-                int i;
-
-                /*
-                 * all the steps below only required if adjustion was
-                 * requested
-                 */
-                if (algo_id == IUS_N1_N1 ||
-                    algo_id == IUS_322 ||
-                    algo_id == IUS_522 ||
-                    algo_id == IUS_N11) {
-                        algo_current = algo_group_1;
-                        part_length = 3;
-                }
-                if (algo_id == SB_N1) {
-                        algo_current = algo_group_2;
-                        part_length = 2;
-                }
-                if (algo_id == SB3_N1 ||
-                    algo_id == SB3_32 ||
-                    algo_id == SB3_43 ||
-                    algo_id == SB3_54) {
-                        algo_current = algo_group_3;
-                        part_length = 2;
-                }
-                if (algo_id == BP_N1) {
-                        algo_current = algo_group_4;
-                        part_length = 2;
-                }
-                if (algo_id == IP_N1) {
-                        algo_current = algo_group_5;
-                        part_length = 2;
-                }
-                if (!algo_current)
-                        goto incorrect_algo_id;
-
-                originator = -1;
-                for (i = 0; i < part_length; i ++ ) {
-                        if (originator >= 0 && !strcmp(clk->name,
-                                                       algo_current[i]))
-                                originator = i;
-                        ck[i] = clk_get(NULL, algo_current[i]);
-                        values[i] = clk_get_rate(ck[i]);
-                }
-
-                if (originator >= 0)
-                        adjust_clocks(originator, adjust_algos[algo_id],
-                                      values, part_length);
-
-                for (i = 0; i < part_length; i ++ ) {
-                        struct frqcr_context part_ctx;
-                        int part_div;
-
-                        if (likely(!err)) {
-                                part_div = sh7722_find_div_index(parent_rate,
-                                                                rate);
-                                if (part_div > 0) {
-                                        part_ctx = sh7722_get_clk_context(
-                                                                ck[i]->name);
-                                        frqcr &= ~(part_ctx.mask <<
-                                                   part_ctx.shift);
-                                        frqcr |= part_div << part_ctx.shift;
-                                } else
-                                        err = part_div;
-                        }
-
-                        ck[i]->ops->recalc(ck[i]);
-                        clk_put(ck[i]);
-                }
-        }
-
-        /* was there any error during recalculation ? If so, bail out.. */
-        if (unlikely(err!=0))
-                goto out_err;
-
-        /* clear FRQCR bits */
-        frqcr &= ~(ctx.mask << ctx.shift);
-        frqcr |= div << ctx.shift;
-
-        /* ...and perform actual change */
-        ctrl_outl(frqcr, FRQCR);
-        return 0;
-
-incorrect_algo_id:
-        return -EINVAL;
-out_err:
-        return err;
-}
-
-static long sh7722_frqcr_round_rate(struct clk *clk, unsigned long rate)
-{
-        unsigned long parent_rate = clk->parent->rate;
-        int div;
-
-        /* look for multiplier/divisor pair */
-        div = sh7722_find_div_index(parent_rate, rate);
-        if (div < 0)
-                return clk->rate;
-
-        /* calculate new value of clock rate */
-        return parent_rate * 2 / divisors2[div];
-}
-
-static struct clk_ops sh7722_frqcr_clk_ops = {
-        .recalc = sh7722_frqcr_recalc,
-        .set_rate = sh7722_frqcr_set_rate,
-        .round_rate = sh7722_frqcr_round_rate,
+struct clk extal_clk = {
+        .name           = "extal",
+        .id             = -1,
+        .rate           = 33333333,
 };
 
-/*
- * clock ops methods for SIU A/B and IrDA clock
- *
- */
-
-#ifndef CONFIG_CPU_SUBTYPE_SH7343
-
-static int sh7722_siu_set_rate(struct clk *clk, unsigned long rate, int algo_id)
-{
-        unsigned long r;
-        int div;
-
-        r = ctrl_inl(clk->arch_flags);
-        div = sh7722_find_div_index(clk->parent->rate, rate);
-        if (div < 0)
-                return div;
-        r = (r & ~0xF) | div;
-        ctrl_outl(r, clk->arch_flags);
-        return 0;
-}
-
-static void sh7722_siu_recalc(struct clk *clk)
-{
-        unsigned long r;
-
-        r = ctrl_inl(clk->arch_flags);
-        clk->rate = clk->parent->rate * 2 / divisors2[r & 0xF];
-}
-
-static int sh7722_siu_start_stop(struct clk *clk, int enable)
+/* The dll block multiplies the 32khz r_clk, may be used instead of extal */
+static unsigned long dll_recalc(struct clk *clk)
 {
-        unsigned long r;
+        unsigned long mult;
 
-        r = ctrl_inl(clk->arch_flags);
-        if (enable)
-                ctrl_outl(r & ~(1 << 8), clk->arch_flags);
+        if (__raw_readl(PLLCR) & 0x1000)
+                mult = __raw_readl(DLLFRQ);
         else
-                ctrl_outl(r | (1 << 8), clk->arch_flags);
-        return 0;
-}
-
-static void sh7722_siu_enable(struct clk *clk)
-{
-        sh7722_siu_start_stop(clk, 1);
-}
+                mult = 0;
 
-static void sh7722_siu_disable(struct clk *clk)
-{
-        sh7722_siu_start_stop(clk, 0);
+        return clk->parent->rate * mult;
 }
 
-static struct clk_ops sh7722_siu_clk_ops = {
-        .recalc = sh7722_siu_recalc,
-        .set_rate = sh7722_siu_set_rate,
-        .enable = sh7722_siu_enable,
-        .disable = sh7722_siu_disable,
+static struct clk_ops dll_clk_ops = {
+        .recalc         = dll_recalc,
 };
 
-#endif /* CONFIG_CPU_SUBTYPE_SH7343 */
-
-static void sh7722_video_enable(struct clk *clk)
-{
-        unsigned long r;
-
-        r = ctrl_inl(VCLKCR);
-        ctrl_outl( r & ~(1<<8), VCLKCR);
-}
-
-static void sh7722_video_disable(struct clk *clk)
-{
-        unsigned long r;
-
-        r = ctrl_inl(VCLKCR);
-        ctrl_outl( r | (1<<8), VCLKCR);
-}
+static struct clk dll_clk = {
+        .name           = "dll_clk",
+        .id             = -1,
+        .ops            = &dll_clk_ops,
+        .parent         = &r_clk,
+        .flags          = CLK_ENABLE_ON_INIT,
+};
 
-static int sh7722_video_set_rate(struct clk *clk, unsigned long rate,
-                                 int algo_id)
+static unsigned long pll_recalc(struct clk *clk)
 {
-        unsigned long r;
-
-        r = ctrl_inl(VCLKCR);
-        r &= ~0x3F;
-        r |= ((clk->parent->rate / rate - 1) & 0x3F);
-        ctrl_outl(r, VCLKCR);
-        return 0;
-}
+        unsigned long mult = 1;
+        unsigned long div = 1;
 
-static void sh7722_video_recalc(struct clk *clk)
-{
-        unsigned long r;
+        if (__raw_readl(PLLCR) & 0x4000)
+                mult = (((__raw_readl(FRQCR) >> 24) & 0x1f) + 1);
+        else
+                div = 2;
 
-        r = ctrl_inl(VCLKCR);
-        clk->rate = clk->parent->rate / ((r & 0x3F) + 1);
+        return (clk->parent->rate * mult) / div;
 }
 
-static struct clk_ops sh7722_video_clk_ops = {
-        .recalc = sh7722_video_recalc,
-        .set_rate = sh7722_video_set_rate,
-        .enable = sh7722_video_enable,
-        .disable = sh7722_video_disable,
-};
-/*
- * and at last, clock definitions themselves
- */
-static struct clk sh7722_umem_clock = {
-        .name = "umem_clk",
-        .ops = &sh7722_frqcr_clk_ops,
-        .flags = CLK_RATE_PROPAGATES,
+static struct clk_ops pll_clk_ops = {
+        .recalc         = pll_recalc,
 };
 
-static struct clk sh7722_sh_clock = {
-        .name = "sh_clk",
-        .ops = &sh7722_frqcr_clk_ops,
-        .flags = CLK_RATE_PROPAGATES,
+static struct clk pll_clk = {
+        .name           = "pll_clk",
+        .id             = -1,
+        .ops            = &pll_clk_ops,
+        .flags          = CLK_ENABLE_ON_INIT,
 };
 
-static struct clk sh7722_peripheral_clock = {
-        .name = "peripheral_clk",
-        .ops = &sh7722_frqcr_clk_ops,
-        .flags = CLK_RATE_PROPAGATES,
+struct clk *main_clks[] = {
+        &r_clk,
+        &extal_clk,
+        &dll_clk,
+        &pll_clk,
 };
 
-static struct clk sh7722_sdram_clock = {
-        .name = "sdram_clk",
-        .ops = &sh7722_frqcr_clk_ops,
-};
+static int multipliers[] = { 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1 };
+static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 };
 
-static struct clk sh7722_r_clock = {
-        .name = "r_clk",
-        .rate = 32768,
-        .flags = CLK_RATE_PROPAGATES,
+static struct clk_div_mult_table div4_table = {
+        .divisors = divisors,
+        .nr_divisors = ARRAY_SIZE(divisors),
+        .multipliers = multipliers,
+        .nr_multipliers = ARRAY_SIZE(multipliers),
 };
 
-#ifndef CONFIG_CPU_SUBTYPE_SH7343
-
-/*
- * these three clocks - SIU A, SIU B, IrDA - share the same clk_ops
- * methods of clk_ops determine which register they should access by
- * examining clk->name field
- */
-static struct clk sh7722_siu_a_clock = {
-        .name = "siu_a_clk",
-        .arch_flags = SCLKACR,
-        .ops = &sh7722_siu_clk_ops,
-};
+enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P,
+       DIV4_SIUA, DIV4_SIUB, DIV4_IRDA, DIV4_NR };
 
-static struct clk sh7722_siu_b_clock = {
-        .name = "siu_b_clk",
-        .arch_flags = SCLKBCR,
-        .ops = &sh7722_siu_clk_ops,
-};
+#define DIV4(_str, _reg, _bit, _mask, _flags) \
+  SH_CLK_DIV4(_str, &pll_clk, _reg, _bit, _mask, _flags)
 
-#if defined(CONFIG_CPU_SUBTYPE_SH7722)
-static struct clk sh7722_irda_clock = {
-        .name = "irda_clk",
-        .arch_flags = IrDACLKCR,
-        .ops = &sh7722_siu_clk_ops,
+struct clk div4_clks[DIV4_NR] = {
+        [DIV4_I] = DIV4("cpu_clk", FRQCR, 20, 0x1fef, CLK_ENABLE_ON_INIT),
+        [DIV4_U] = DIV4("umem_clk", FRQCR, 16, 0x1fff, CLK_ENABLE_ON_INIT),
+        [DIV4_SH] = DIV4("shyway_clk", FRQCR, 12, 0x1fff, CLK_ENABLE_ON_INIT),
+        [DIV4_B] = DIV4("bus_clk", FRQCR, 8, 0x1fff, CLK_ENABLE_ON_INIT),
+        [DIV4_B3] = DIV4("b3_clk", FRQCR, 4, 0x1fff, CLK_ENABLE_ON_INIT),
+        [DIV4_P] = DIV4("peripheral_clk", FRQCR, 0, 0x1fff, 0),
+        [DIV4_SIUA] = DIV4("siua_clk", SCLKACR, 0, 0x1fff, 0),
+        [DIV4_SIUB] = DIV4("siub_clk", SCLKBCR, 0, 0x1fff, 0),
+        [DIV4_IRDA] = DIV4("irda_clk", IRDACLKCR, 0, 0x1fff, 0),
 };
-#endif
-#endif /* CONFIG_CPU_SUBTYPE_SH7343 */
 
-static struct clk sh7722_video_clock = {
-        .name = "video_clk",
-        .ops = &sh7722_video_clk_ops,
+struct clk div6_clks[] = {
+        SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0),
 };
 
-#define MSTPCR_ARCH_FLAGS(reg, bit) (((reg) << 8) | (bit))
-#define MSTPCR_ARCH_FLAGS_REG(value) ((value) >> 8)
-#define MSTPCR_ARCH_FLAGS_BIT(value) ((value) & 0xff)
-
-static int sh7722_mstpcr_start_stop(struct clk *clk, int enable)
-{
-        unsigned long bit = MSTPCR_ARCH_FLAGS_BIT(clk->arch_flags);
-        unsigned long reg;
-        unsigned long r;
-
-        switch(MSTPCR_ARCH_FLAGS_REG(clk->arch_flags)) {
-        case 0:
-                reg = MSTPCR0;
-                break;
-        case 1:
-                reg = MSTPCR1;
-                break;
-        case 2:
-                reg = MSTPCR2;
-                break;
-        default:
-                return -EINVAL;
-        }  
-
-        r = ctrl_inl(reg);
-
-        if (enable)
-                r &= ~(1 << bit);
-        else
-                r |= (1 << bit);
+#define MSTP(_str, _parent, _reg, _bit, _flags) \
+  SH_CLK_MSTP32(_str, -1, _parent, _reg, _bit, _flags)
 
-        ctrl_outl(r, reg);
-        return 0;
-}
+static struct clk mstp_clks[] = {
+        MSTP("uram0", &div4_clks[DIV4_U], MSTPCR0, 28, CLK_ENABLE_ON_INIT),
+        MSTP("xymem0", &div4_clks[DIV4_B], MSTPCR0, 26, CLK_ENABLE_ON_INIT),
+        MSTP("tmu0", &div4_clks[DIV4_P], MSTPCR0, 15, 0),
+        MSTP("cmt0", &r_clk, MSTPCR0, 14, 0),
+        MSTP("rwdt0", &r_clk, MSTPCR0, 13, 0),
+        MSTP("flctl0", &div4_clks[DIV4_P], MSTPCR0, 10, 0),
+        MSTP("scif0", &div4_clks[DIV4_P], MSTPCR0, 7, 0),
+        MSTP("scif1", &div4_clks[DIV4_P], MSTPCR0, 6, 0),
+        MSTP("scif2", &div4_clks[DIV4_P], MSTPCR0, 5, 0),
 
-static void sh7722_mstpcr_enable(struct clk *clk)
-{
-        sh7722_mstpcr_start_stop(clk, 1);
-}
+        MSTP("i2c0", &div4_clks[DIV4_P], MSTPCR1, 9, 0),
+        MSTP("rtc0", &r_clk, MSTPCR1, 8, 0),
 
-static void sh7722_mstpcr_disable(struct clk *clk)
-{
-        sh7722_mstpcr_start_stop(clk, 0);
-}
-
-static void sh7722_mstpcr_recalc(struct clk *clk)
-{
-        if (clk->parent)
-                clk->rate = clk->parent->rate;
-}
-
-static struct clk_ops sh7722_mstpcr_clk_ops = {
-        .enable = sh7722_mstpcr_enable,
-        .disable = sh7722_mstpcr_disable,
-        .recalc = sh7722_mstpcr_recalc,
-};
-
-#define MSTPCR(_name, _parent, regnr, bitnr) \
-{                                               \
-        .name = _name,                          \
-        .arch_flags = MSTPCR_ARCH_FLAGS(regnr, bitnr),  \
-        .ops = (void *)_parent,         \
-}
-
-static struct clk sh7722_mstpcr_clocks[] = {
-#if defined(CONFIG_CPU_SUBTYPE_SH7722)
-        MSTPCR("uram0", "umem_clk", 0, 28),
-        MSTPCR("xymem0", "bus_clk", 0, 26),
-        MSTPCR("tmu0", "peripheral_clk", 0, 15),
-        MSTPCR("cmt0", "r_clk", 0, 14),
-        MSTPCR("rwdt0", "r_clk", 0, 13),
-        MSTPCR("flctl0", "peripheral_clk", 0, 10),
-        MSTPCR("scif0", "peripheral_clk", 0, 7),
-        MSTPCR("scif1", "peripheral_clk", 0, 6),
-        MSTPCR("scif2", "peripheral_clk", 0, 5),
-        MSTPCR("i2c0", "peripheral_clk", 1, 9),
-        MSTPCR("rtc0", "r_clk", 1, 8),
-        MSTPCR("sdhi0", "peripheral_clk", 2, 18),
-        MSTPCR("keysc0", "r_clk", 2, 14),
-        MSTPCR("usbf0", "peripheral_clk", 2, 11),
-        MSTPCR("2dg0", "bus_clk", 2, 9),
-        MSTPCR("siu0", "bus_clk", 2, 8),
-        MSTPCR("vou0", "bus_clk", 2, 5),
-        MSTPCR("jpu0", "bus_clk", 2, 6),
-        MSTPCR("beu0", "bus_clk", 2, 4),
-        MSTPCR("ceu0", "bus_clk", 2, 3),
-        MSTPCR("veu0", "bus_clk", 2, 2),
-        MSTPCR("vpu0", "bus_clk", 2, 1),
-        MSTPCR("lcdc0", "bus_clk", 2, 0),
-#endif
-#if defined(CONFIG_CPU_SUBTYPE_SH7723)
-        /* See page 60 of Datasheet V1.0: Overview -> Block Diagram */
-        MSTPCR("tlb0", "cpu_clk", 0, 31),
-        MSTPCR("ic0", "cpu_clk", 0, 30),
-        MSTPCR("oc0", "cpu_clk", 0, 29),
-        MSTPCR("l2c0", "sh_clk", 0, 28),
-        MSTPCR("ilmem0", "cpu_clk", 0, 27),
-        MSTPCR("fpu0", "cpu_clk", 0, 24),
-        MSTPCR("intc0", "cpu_clk", 0, 22),
-        MSTPCR("dmac0", "bus_clk", 0, 21),
-        MSTPCR("sh0", "sh_clk", 0, 20),
-        MSTPCR("hudi0", "peripheral_clk", 0, 19),
-        MSTPCR("ubc0", "cpu_clk", 0, 17),
-        MSTPCR("tmu0", "peripheral_clk", 0, 15),
-        MSTPCR("cmt0", "r_clk", 0, 14),
-        MSTPCR("rwdt0", "r_clk", 0, 13),
-        MSTPCR("dmac1", "bus_clk", 0, 12),
-        MSTPCR("tmu1", "peripheral_clk", 0, 11),
-        MSTPCR("flctl0", "peripheral_clk", 0, 10),
-        MSTPCR("scif0", "peripheral_clk", 0, 9),
-        MSTPCR("scif1", "peripheral_clk", 0, 8),
-        MSTPCR("scif2", "peripheral_clk", 0, 7),
-        MSTPCR("scif3", "bus_clk", 0, 6),
-        MSTPCR("scif4", "bus_clk", 0, 5),
-        MSTPCR("scif5", "bus_clk", 0, 4),
-        MSTPCR("msiof0", "bus_clk", 0, 2),
-        MSTPCR("msiof1", "bus_clk", 0, 1),
-        MSTPCR("meram0", "sh_clk", 0, 0),
-        MSTPCR("i2c0", "peripheral_clk", 1, 9),
-        MSTPCR("rtc0", "r_clk", 1, 8),
-        MSTPCR("atapi0", "sh_clk", 2, 28),
-        MSTPCR("adc0", "peripheral_clk", 2, 28),
-        MSTPCR("tpu0", "bus_clk", 2, 25),
-        MSTPCR("irda0", "peripheral_clk", 2, 24),
-        MSTPCR("tsif0", "bus_clk", 2, 22),
-        MSTPCR("icb0", "bus_clk", 2, 21),
-        MSTPCR("sdhi0", "bus_clk", 2, 18),
-        MSTPCR("sdhi1", "bus_clk", 2, 17),
-        MSTPCR("keysc0", "r_clk", 2, 14),
-        MSTPCR("usb0", "bus_clk", 2, 11),
-        MSTPCR("2dg0", "bus_clk", 2, 10),
-        MSTPCR("siu0", "bus_clk", 2, 8),
-        MSTPCR("veu1", "bus_clk", 2, 6),
-        MSTPCR("vou0", "bus_clk", 2, 5),
-        MSTPCR("beu0", "bus_clk", 2, 4),
-        MSTPCR("ceu0", "bus_clk", 2, 3),
-        MSTPCR("veu0", "bus_clk", 2, 2),
-        MSTPCR("vpu0", "bus_clk", 2, 1),
-        MSTPCR("lcdc0", "bus_clk", 2, 0),
-#endif
-#if defined(CONFIG_CPU_SUBTYPE_SH7343)
-        MSTPCR("uram0", "umem_clk", 0, 28),
-        MSTPCR("xymem0", "bus_clk", 0, 26),
-        MSTPCR("tmu0", "peripheral_clk", 0, 15),
-        MSTPCR("cmt0", "r_clk", 0, 14),
-        MSTPCR("rwdt0", "r_clk", 0, 13),
-        MSTPCR("scif0", "peripheral_clk", 0, 7),
-        MSTPCR("scif1", "peripheral_clk", 0, 6),
-        MSTPCR("scif2", "peripheral_clk", 0, 5),
-        MSTPCR("scif3", "peripheral_clk", 0, 4),
-        MSTPCR("i2c0", "peripheral_clk", 1, 9),
-        MSTPCR("i2c1", "peripheral_clk", 1, 8),
-        MSTPCR("sdhi0", "peripheral_clk", 2, 18),
-        MSTPCR("keysc0", "r_clk", 2, 14),
-        MSTPCR("usbf0", "peripheral_clk", 2, 11),
-        MSTPCR("siu0", "bus_clk", 2, 8),
-        MSTPCR("jpu0", "bus_clk", 2, 6),
-        MSTPCR("vou0", "bus_clk", 2, 5),
-        MSTPCR("beu0", "bus_clk", 2, 4),
-        MSTPCR("ceu0", "bus_clk", 2, 3),
-        MSTPCR("veu0", "bus_clk", 2, 2),
-        MSTPCR("vpu0", "bus_clk", 2, 1),
-        MSTPCR("lcdc0", "bus_clk", 2, 0),
-#endif
-#if defined(CONFIG_CPU_SUBTYPE_SH7366)
-        /* See page 52 of Datasheet V0.40: Overview -> Block Diagram */
-        MSTPCR("tlb0", "cpu_clk", 0, 31),
-        MSTPCR("ic0", "cpu_clk", 0, 30),
-        MSTPCR("oc0", "cpu_clk", 0, 29),
-        MSTPCR("rsmem0", "sh_clk", 0, 28),
-        MSTPCR("xymem0", "cpu_clk", 0, 26),
-        MSTPCR("intc30", "peripheral_clk", 0, 23),
-        MSTPCR("intc0", "peripheral_clk", 0, 22),
-        MSTPCR("dmac0", "bus_clk", 0, 21),
-        MSTPCR("sh0", "sh_clk", 0, 20),
-        MSTPCR("hudi0", "peripheral_clk", 0, 19),
-        MSTPCR("ubc0", "cpu_clk", 0, 17),
-        MSTPCR("tmu0", "peripheral_clk", 0, 15),
-        MSTPCR("cmt0", "r_clk", 0, 14),
-        MSTPCR("rwdt0", "r_clk", 0, 13),
-        MSTPCR("flctl0", "peripheral_clk", 0, 10),
-        MSTPCR("scif0", "peripheral_clk", 0, 7),
-        MSTPCR("scif1", "bus_clk", 0, 6),
-        MSTPCR("scif2", "bus_clk", 0, 5),
-        MSTPCR("msiof0", "peripheral_clk", 0, 2),
-        MSTPCR("sbr0", "peripheral_clk", 0, 1),
-        MSTPCR("i2c0", "peripheral_clk", 1, 9),
-        MSTPCR("icb0", "bus_clk", 2, 27),
-        MSTPCR("meram0", "sh_clk", 2, 26),
-        MSTPCR("dacc0", "peripheral_clk", 2, 24),
-        MSTPCR("dacy0", "peripheral_clk", 2, 23),
-        MSTPCR("tsif0", "bus_clk", 2, 22),
-        MSTPCR("sdhi0", "bus_clk", 2, 18),
-        MSTPCR("mmcif0", "bus_clk", 2, 17),
-        MSTPCR("usb0", "bus_clk", 2, 11),
-        MSTPCR("siu0", "bus_clk", 2, 8),
-        MSTPCR("veu1", "bus_clk", 2, 7),
-        MSTPCR("vou0", "bus_clk", 2, 5),
-        MSTPCR("beu0", "bus_clk", 2, 4),
-        MSTPCR("ceu0", "bus_clk", 2, 3),
-        MSTPCR("veu0", "bus_clk", 2, 2),
-        MSTPCR("vpu0", "bus_clk", 2, 1),
-        MSTPCR("lcdc0", "bus_clk", 2, 0),
-#endif
-};
-
-static struct clk *sh7722_clocks[] = {
-        &sh7722_umem_clock,
-        &sh7722_sh_clock,
-        &sh7722_peripheral_clock,
-        &sh7722_sdram_clock,
-#ifndef CONFIG_CPU_SUBTYPE_SH7343
-        &sh7722_siu_a_clock,
-        &sh7722_siu_b_clock,
-#if defined(CONFIG_CPU_SUBTYPE_SH7722)
-        &sh7722_irda_clock,
-#endif
-#endif
-        &sh7722_video_clock,
+        MSTP("sdhi0", &div4_clks[DIV4_P], MSTPCR2, 18, 0),
+        MSTP("keysc0", &r_clk, MSTPCR2, 14, 0),
+        MSTP("usbf0", &div4_clks[DIV4_P], MSTPCR2, 11, 0),
+        MSTP("2dg0", &div4_clks[DIV4_B], MSTPCR2, 9, 0),
+        MSTP("siu0", &div4_clks[DIV4_B], MSTPCR2, 8, 0),
+        MSTP("vou0", &div4_clks[DIV4_B], MSTPCR2, 5, 0),
+        MSTP("jpu0", &div4_clks[DIV4_B], MSTPCR2, 6, CLK_ENABLE_ON_INIT),
+        MSTP("beu0", &div4_clks[DIV4_B], MSTPCR2, 4, 0),
+        MSTP("ceu0", &div4_clks[DIV4_B], MSTPCR2, 3, 0),
+        MSTP("veu0", &div4_clks[DIV4_B], MSTPCR2, 2, CLK_ENABLE_ON_INIT),
+        MSTP("vpu0", &div4_clks[DIV4_B], MSTPCR2, 1, CLK_ENABLE_ON_INIT),
+        MSTP("lcdc0", &div4_clks[DIV4_B], MSTPCR2, 0, 0),
 };
 
-/*
- * init in order: master, module, bus, cpu
- */
-struct clk_ops *onchip_ops[] = {
-        &sh7722_master_clk_ops,
-        &sh7722_module_clk_ops,
-        &sh7722_frqcr_clk_ops,
-        &sh7722_frqcr_clk_ops,
-};
-
-void __init
-arch_init_clk_ops(struct clk_ops **ops, int type)
-{
-        BUG_ON(type < 0 || type > ARRAY_SIZE(onchip_ops));
-        *ops = onchip_ops[type];
-}
-
 int __init arch_clk_init(void)
 {
-        struct clk *clk;
-        int i;
+        int k, ret = 0;
+
+        /* autodetect extal or dll configuration */
+        if (__raw_readl(PLLCR) & 0x1000)
+                pll_clk.parent = &dll_clk;
+        else
+                pll_clk.parent = &extal_clk;
 
-        clk = clk_get(NULL, "master_clk");
-        for (i = 0; i < ARRAY_SIZE(sh7722_clocks); i++) {
-                pr_debug( "Registering clock '%s'\n", sh7722_clocks[i]->name);
-                sh7722_clocks[i]->parent = clk;
-                clk_register(sh7722_clocks[i]);
-        }
-        clk_put(clk);
+        for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
+                ret = clk_register(main_clks[k]);
 
-        clk_register(&sh7722_r_clock);
+        if (!ret)
+                ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
 
-        for (i = 0; i < ARRAY_SIZE(sh7722_mstpcr_clocks); i++) {
-                pr_debug( "Registering mstpcr clock '%s'\n",
-                          sh7722_mstpcr_clocks[i].name);
-                clk = clk_get(NULL, (void *) sh7722_mstpcr_clocks[i].ops);
-                sh7722_mstpcr_clocks[i].parent = clk;
-                sh7722_mstpcr_clocks[i].ops = &sh7722_mstpcr_clk_ops;
-                clk_register(&sh7722_mstpcr_clocks[i]);
-                clk_put(clk);
-        }
+        if (!ret)
+                ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks));
 
-        clk_recalc_rate(&sh7722_r_clock); /* make sure rate gets propagated */
+        if (!ret)
+                ret = sh_clk_mstp32_register(mstp_clks, ARRAY_SIZE(mstp_clks));
 
-        return 0;
+        return ret;
 }
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
new file mode 100644
index 000000000000..e67c2678b8ae
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
@@ -0,0 +1,222 @@
+/*
+ * arch/sh/kernel/cpu/sh4a/clock-sh7723.c
+ *
+ * SH7723 clock framework support
+ *
+ * Copyright (C) 2009 Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <asm/clock.h>
+
+/* SH7723 registers */
+#define FRQCR           0xa4150000
+#define VCLKCR          0xa4150004
+#define SCLKACR         0xa4150008
+#define SCLKBCR         0xa415000c
+#define IRDACLKCR       0xa4150018
+#define PLLCR           0xa4150024
+#define MSTPCR0         0xa4150030
+#define MSTPCR1         0xa4150034
+#define MSTPCR2         0xa4150038
+#define DLLFRQ          0xa4150050
+
+/* Fixed 32 KHz root clock for RTC and Power Management purposes */
+static struct clk r_clk = {
+        .name           = "rclk",
+        .id             = -1,
+        .rate           = 32768,
+};
+
+/*
+ * Default rate for the root input clock, reset this with clk_set_rate()
+ * from the platform code.
+ */
+struct clk extal_clk = {
+        .name           = "extal",
+        .id             = -1,
+        .rate           = 33333333,
+};
+
+/* The dll multiplies the 32khz r_clk, may be used instead of extal */
+static unsigned long dll_recalc(struct clk *clk)
+{
+        unsigned long mult;
+
+        if (__raw_readl(PLLCR) & 0x1000)
+                mult = __raw_readl(DLLFRQ);
+        else
+                mult = 0;
+
+        return clk->parent->rate * mult;
+}
+
+static struct clk_ops dll_clk_ops = {
+        .recalc         = dll_recalc,
+};
+
+static struct clk dll_clk = {
+        .name           = "dll_clk",
+        .id             = -1,
+        .ops            = &dll_clk_ops,
+        .parent         = &r_clk,
+        .flags          = CLK_ENABLE_ON_INIT,
+};
+
+static unsigned long pll_recalc(struct clk *clk)
+{
+        unsigned long mult = 1;
+        unsigned long div = 1;
+
+        if (__raw_readl(PLLCR) & 0x4000)
+                mult = (((__raw_readl(FRQCR) >> 24) & 0x1f) + 1);
+        else
+                div = 2;
+
+        return (clk->parent->rate * mult) / div;
+}
+
+static struct clk_ops pll_clk_ops = {
+        .recalc         = pll_recalc,
+};
+
+static struct clk pll_clk = {
+        .name           = "pll_clk",
+        .id             = -1,
+        .ops            = &pll_clk_ops,
+        .flags          = CLK_ENABLE_ON_INIT,
+};
+
+struct clk *main_clks[] = {
+        &r_clk,
+        &extal_clk,
+        &dll_clk,
+        &pll_clk,
+};
+
+static int multipliers[] = { 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1 };
+static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 };
+
+static struct clk_div_mult_table div4_table = {
+        .divisors = divisors,
+        .nr_divisors = ARRAY_SIZE(divisors),
+        .multipliers = multipliers,
+        .nr_multipliers = ARRAY_SIZE(multipliers),
+};
+
+enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P,
+       DIV4_SIUA, DIV4_SIUB, DIV4_IRDA, DIV4_NR };
+
+#define DIV4(_str, _reg, _bit, _mask, _flags) \
+  SH_CLK_DIV4(_str, &pll_clk, _reg, _bit, _mask, _flags)
+
+struct clk div4_clks[DIV4_NR] = {
+        [DIV4_I] = DIV4("cpu_clk", FRQCR, 20, 0x0dbf, CLK_ENABLE_ON_INIT),
+        [DIV4_U] = DIV4("umem_clk", FRQCR, 16, 0x0dbf, CLK_ENABLE_ON_INIT),
+        [DIV4_SH] = DIV4("shyway_clk", FRQCR, 12, 0x0dbf, CLK_ENABLE_ON_INIT),
+        [DIV4_B] = DIV4("bus_clk", FRQCR, 8, 0x0dbf, CLK_ENABLE_ON_INIT),
+        [DIV4_B3] = DIV4("b3_clk", FRQCR, 4, 0x0db4, CLK_ENABLE_ON_INIT),
+        [DIV4_P] = DIV4("peripheral_clk", FRQCR, 0, 0x0dbf, 0),
+        [DIV4_SIUA] = DIV4("siua_clk", SCLKACR, 0, 0x0dbf, 0),
+        [DIV4_SIUB] = DIV4("siub_clk", SCLKBCR, 0, 0x0dbf, 0),
+        [DIV4_IRDA] = DIV4("irda_clk", IRDACLKCR, 0, 0x0dbf, 0),
+};
+
+struct clk div6_clks[] = {
+        SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0),
+};
+
+#define MSTP(_str, _parent, _reg, _bit, _force_on, _need_cpg, _need_ram) \
+  SH_CLK_MSTP32(_str, -1, _parent, _reg, _bit, _force_on * CLK_ENABLE_ON_INIT)
+
+static struct clk mstp_clks[] = {
+        /* See page 60 of Datasheet V1.0: Overview -> Block Diagram */
+        MSTP("tlb0", &div4_clks[DIV4_I], MSTPCR0, 31, 1, 1, 0),
+        MSTP("ic0", &div4_clks[DIV4_I], MSTPCR0, 30, 1, 1, 0),
+        MSTP("oc0", &div4_clks[DIV4_I], MSTPCR0, 29, 1, 1, 0),
+        MSTP("l2c0", &div4_clks[DIV4_SH], MSTPCR0, 28, 1, 1, 0),
+        MSTP("ilmem0", &div4_clks[DIV4_I], MSTPCR0, 27, 1, 1, 0),
+        MSTP("fpu0", &div4_clks[DIV4_I], MSTPCR0, 24, 1, 1, 0),
+        MSTP("intc0", &div4_clks[DIV4_I], MSTPCR0, 22, 1, 1, 0),
+        MSTP("dmac0", &div4_clks[DIV4_B], MSTPCR0, 21, 0, 1, 1),
+        MSTP("sh0", &div4_clks[DIV4_SH], MSTPCR0, 20, 0, 1, 0),
+        MSTP("hudi0", &div4_clks[DIV4_P], MSTPCR0, 19, 0, 1, 0),
+        MSTP("ubc0", &div4_clks[DIV4_I], MSTPCR0, 17, 0, 1, 0),
+        MSTP("tmu0", &div4_clks[DIV4_P], MSTPCR0, 15, 0, 1, 0),
+        MSTP("cmt0", &r_clk, MSTPCR0, 14, 0, 0, 0),
+        MSTP("rwdt0", &r_clk, MSTPCR0, 13, 0, 0, 0),
+        MSTP("dmac1", &div4_clks[DIV4_B], MSTPCR0, 12, 0, 1, 1),
+        MSTP("tmu1", &div4_clks[DIV4_P], MSTPCR0, 11, 0, 1, 0),
+        MSTP("flctl0", &div4_clks[DIV4_P], MSTPCR0, 10, 0, 1, 0),
+        MSTP("scif0", &div4_clks[DIV4_P], MSTPCR0, 9, 0, 1, 0),
+        MSTP("scif1", &div4_clks[DIV4_P], MSTPCR0, 8, 0, 1, 0),
+        MSTP("scif2", &div4_clks[DIV4_P], MSTPCR0, 7, 0, 1, 0),
+        MSTP("scif3", &div4_clks[DIV4_B], MSTPCR0, 6, 0, 1, 0),
+        MSTP("scif4", &div4_clks[DIV4_B], MSTPCR0, 5, 0, 1, 0),
+        MSTP("scif5", &div4_clks[DIV4_B], MSTPCR0, 4, 0, 1, 0),
+        MSTP("msiof0", &div4_clks[DIV4_B], MSTPCR0, 2, 0, 1, 0),
+        MSTP("msiof1", &div4_clks[DIV4_B], MSTPCR0, 1, 0, 1, 0),
+        MSTP("meram0", &div4_clks[DIV4_SH], MSTPCR0, 0, 1, 1, 0),
+
+        MSTP("i2c0", &div4_clks[DIV4_P], MSTPCR1, 9, 0, 1, 0),
+        MSTP("rtc0", &r_clk, MSTPCR1, 8, 0, 0, 0),
+
+        MSTP("atapi0", &div4_clks[DIV4_SH], MSTPCR2, 28, 0, 1, 0),
+        MSTP("adc0", &div4_clks[DIV4_P], MSTPCR2, 27, 0, 1, 0),
+        MSTP("tpu0", &div4_clks[DIV4_B], MSTPCR2, 25, 0, 1, 0),
+        MSTP("irda0", &div4_clks[DIV4_P], MSTPCR2, 24, 0, 1, 0),
+        MSTP("tsif0", &div4_clks[DIV4_B], MSTPCR2, 22, 0, 1, 0),
+        MSTP("icb0", &div4_clks[DIV4_B], MSTPCR2, 21, 0, 1, 1),
+        MSTP("sdhi0", &div4_clks[DIV4_B], MSTPCR2, 18, 0, 1, 0),
+        MSTP("sdhi1", &div4_clks[DIV4_B], MSTPCR2, 17, 0, 1, 0),
+        MSTP("keysc0", &r_clk, MSTPCR2, 14, 0, 0, 0),
+        MSTP("usb0", &div4_clks[DIV4_B], MSTPCR2, 11, 0, 1, 0),
+        MSTP("2dg0", &div4_clks[DIV4_B], MSTPCR2, 10, 0, 1, 1),
+        MSTP("siu0", &div4_clks[DIV4_B], MSTPCR2, 8, 0, 1, 0),
+        MSTP("veu1", &div4_clks[DIV4_B], MSTPCR2, 6, 1, 1, 1),
+        MSTP("vou0", &div4_clks[DIV4_B], MSTPCR2, 5, 0, 1, 1),
+        MSTP("beu0", &div4_clks[DIV4_B], MSTPCR2, 4, 0, 1, 1),
+        MSTP("ceu0", &div4_clks[DIV4_B], MSTPCR2, 3, 0, 1, 1),
+        MSTP("veu0", &div4_clks[DIV4_B], MSTPCR2, 2, 1, 1, 1),
+        MSTP("vpu0", &div4_clks[DIV4_B], MSTPCR2, 1, 1, 1, 1),
+        MSTP("lcdc0", &div4_clks[DIV4_B], MSTPCR2, 0, 0, 1, 1),
+};
+
+int __init arch_clk_init(void)
+{
+        int k, ret = 0;
+
+        /* autodetect extal or dll configuration */
+        if (__raw_readl(PLLCR) & 0x1000)
+                pll_clk.parent = &dll_clk;
+        else
+                pll_clk.parent = &extal_clk;
+
+        for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
+                ret = clk_register(main_clks[k]);
+
+        if (!ret)
+                ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
+
+        if (!ret)
+                ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks));
+
+        if (!ret)
+                ret = sh_clk_mstp32_register(mstp_clks, ARRAY_SIZE(mstp_clks));
+
+        return ret;
+}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
new file mode 100644
index 000000000000..5d5c9b952883
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
@@ -0,0 +1,242 @@
+/*
+ * arch/sh/kernel/cpu/sh4a/clock-sh7724.c
+ *
+ * SH7724 clock framework support
+ *
+ * Copyright (C) 2009 Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <asm/clock.h>
+
+/* SH7724 registers */
+#define FRQCRA          0xa4150000
+#define FRQCRB          0xa4150004
+#define VCLKCR          0xa4150048
+#define FCLKACR         0xa4150008
+#define FCLKBCR         0xa415000c
+#define IRDACLKCR       0xa4150018
+#define PLLCR           0xa4150024
+#define MSTPCR0         0xa4150030
+#define MSTPCR1         0xa4150034
+#define MSTPCR2         0xa4150038
+#define SPUCLKCR        0xa415003c
+#define FLLFRQ          0xa4150050
+#define LSTATS          0xa4150060
+
+/* Fixed 32 KHz root clock for RTC and Power Management purposes */
+static struct clk r_clk = {
+        .name           = "rclk",
+        .id             = -1,
+        .rate           = 32768,
+};
+
+/*
+ * Default rate for the root input clock, reset this with clk_set_rate()
+ * from the platform code.
+ */
+struct clk extal_clk = {
+        .name           = "extal",
+        .id             = -1,
+        .rate           = 33333333,
+};
+
+/* The fll multiplies the 32khz r_clk, may be used instead of extal */
+static unsigned long fll_recalc(struct clk *clk)
+{
+        unsigned long mult = 0;
+        unsigned long div = 1;
+
+        if (__raw_readl(PLLCR) & 0x1000)
+                mult = __raw_readl(FLLFRQ) & 0x3ff;
+
+        if (__raw_readl(FLLFRQ) & 0x4000)
+                div = 2;
+
+        return (clk->parent->rate * mult) / div;
+}
+
+static struct clk_ops fll_clk_ops = {
+        .recalc         = fll_recalc,
+};
+
+static struct clk fll_clk = {
+        .name           = "fll_clk",
+        .id             = -1,
+        .ops            = &fll_clk_ops,
+        .parent         = &r_clk,
+        .flags          = CLK_ENABLE_ON_INIT,
+};
+
+static unsigned long pll_recalc(struct clk *clk)
+{
+        unsigned long mult = 1;
+
+        if (__raw_readl(PLLCR) & 0x4000)
+                mult = (((__raw_readl(FRQCRA) >> 24) & 0x3f) + 1) * 2;
+
+        return clk->parent->rate * mult;
+}
+
+static struct clk_ops pll_clk_ops = {
+        .recalc         = pll_recalc,
+};
+
+static struct clk pll_clk = {
+        .name           = "pll_clk",
+        .id             = -1,
+        .ops            = &pll_clk_ops,
+        .flags          = CLK_ENABLE_ON_INIT,
+};
+
+/* A fixed divide-by-3 block use by the div6 clocks */
+static unsigned long div3_recalc(struct clk *clk)
+{
+        return clk->parent->rate / 3;
+}
+
+static struct clk_ops div3_clk_ops = {
+        .recalc         = div3_recalc,
+};
+
+static struct clk div3_clk = {
+        .name           = "div3_clk",
+        .id             = -1,
+        .ops            = &div3_clk_ops,
+        .parent         = &pll_clk,
+};
+
+struct clk *main_clks[] = {
+        &r_clk,
+        &extal_clk,
+        &fll_clk,
+        &pll_clk,
+        &div3_clk,
+};
+
+static int divisors[] = { 2, 0, 4, 6, 8, 12, 16, 0, 24, 32, 36, 48, 0, 72 };
+
+static struct clk_div_mult_table div4_table = {
+        .divisors = divisors,
+        .nr_divisors = ARRAY_SIZE(divisors),
+};
+
+enum { DIV4_I, DIV4_SH, DIV4_B, DIV4_P, DIV4_M1, DIV4_NR };
+
+#define DIV4(_str, _reg, _bit, _mask, _flags) \
+  SH_CLK_DIV4(_str, &pll_clk, _reg, _bit, _mask, _flags)
+
+struct clk div4_clks[DIV4_NR] = {
+        [DIV4_I] = DIV4("cpu_clk", FRQCRA, 20, 0x2f7d, CLK_ENABLE_ON_INIT),
+        [DIV4_SH] = DIV4("shyway_clk", FRQCRA, 12, 0x2f7c, CLK_ENABLE_ON_INIT),
+        [DIV4_B] = DIV4("bus_clk", FRQCRA, 8, 0x2f7c, CLK_ENABLE_ON_INIT),
+        [DIV4_P] = DIV4("peripheral_clk", FRQCRA, 0, 0x2f7c, 0),
+        [DIV4_M1] = DIV4("vpu_clk", FRQCRB, 4, 0x2f7c, 0),
+};
+
+struct clk div6_clks[] = {
+        SH_CLK_DIV6("video_clk", &div3_clk, VCLKCR, 0),
+        SH_CLK_DIV6("fsia_clk", &div3_clk, FCLKACR, 0),
+        SH_CLK_DIV6("fsib_clk", &div3_clk, FCLKBCR, 0),
+        SH_CLK_DIV6("irda_clk", &div3_clk, IRDACLKCR, 0),
+        SH_CLK_DIV6("spu_clk", &div3_clk, SPUCLKCR, 0),
+};
+
+#define MSTP(_str, _parent, _reg, _bit, _force_on, _need_cpg, _need_ram) \
+  SH_CLK_MSTP32(_str, -1, _parent, _reg, _bit, _force_on * CLK_ENABLE_ON_INIT)
+
+static struct clk mstp_clks[] = {
+        MSTP("tlb0", &div4_clks[DIV4_I], MSTPCR0, 31, 1, 1, 0),
+        MSTP("ic0", &div4_clks[DIV4_I], MSTPCR0, 30, 1, 1, 0),
+        MSTP("oc0", &div4_clks[DIV4_I], MSTPCR0, 29, 1, 1, 0),
+        MSTP("rs0", &div4_clks[DIV4_B], MSTPCR0, 28, 1, 1, 0),
+        MSTP("ilmem0", &div4_clks[DIV4_I], MSTPCR0, 27, 1, 1, 0),
+        MSTP("l2c0", &div4_clks[DIV4_SH], MSTPCR0, 26, 1, 1, 0),
+        MSTP("fpu0", &div4_clks[DIV4_I], MSTPCR0, 24, 1, 1, 0),
+        MSTP("intc0", &div4_clks[DIV4_P], MSTPCR0, 22, 1, 1, 0),
+        MSTP("dmac0", &div4_clks[DIV4_B], MSTPCR0, 21, 0, 1, 1),
+        MSTP("sh0", &div4_clks[DIV4_SH], MSTPCR0, 20, 0, 1, 0),
+        MSTP("hudi0", &div4_clks[DIV4_P], MSTPCR0, 19, 0, 1, 0),
+        MSTP("ubc0", &div4_clks[DIV4_I], MSTPCR0, 17, 0, 1, 0),
+        MSTP("tmu0", &div4_clks[DIV4_P], MSTPCR0, 15, 0, 1, 0),
+        MSTP("cmt0", &r_clk, MSTPCR0, 14, 0, 0, 0),
+        MSTP("rwdt0", &r_clk, MSTPCR0, 13, 0, 0, 0),
+        MSTP("dmac1", &div4_clks[DIV4_B], MSTPCR0, 12, 0, 1, 1),
+        MSTP("tmu1", &div4_clks[DIV4_P], MSTPCR0, 10, 0, 1, 0),
+        MSTP("scif0", &div4_clks[DIV4_P], MSTPCR0, 9, 0, 1, 0),
+        MSTP("scif1", &div4_clks[DIV4_P], MSTPCR0, 8, 0, 1, 0),
+        MSTP("scif2", &div4_clks[DIV4_P], MSTPCR0, 7, 0, 1, 0),
+        MSTP("scif3", &div4_clks[DIV4_B], MSTPCR0, 6, 0, 1, 0),
+        MSTP("scif4", &div4_clks[DIV4_B], MSTPCR0, 5, 0, 1, 0),
+        MSTP("scif5", &div4_clks[DIV4_B], MSTPCR0, 4, 0, 1, 0),
+        MSTP("msiof0", &div4_clks[DIV4_B], MSTPCR0, 2, 0, 1, 0),
+        MSTP("msiof1", &div4_clks[DIV4_B], MSTPCR0, 1, 0, 1, 0),
+
+        MSTP("keysc0", &r_clk, MSTPCR1, 12, 0, 0, 0),
+        MSTP("rtc0", &r_clk, MSTPCR1, 11, 0, 0, 0),
+        MSTP("i2c0", &div4_clks[DIV4_P], MSTPCR1, 9, 0, 1, 0),
+        MSTP("i2c1", &div4_clks[DIV4_P], MSTPCR1, 8, 0, 1, 0),
+
+        MSTP("mmc0", &div4_clks[DIV4_B], MSTPCR2, 29, 0, 1, 0),
+        MSTP("eth0", &div4_clks[DIV4_B], MSTPCR2, 28, 0, 1, 0),
+        MSTP("atapi0", &div4_clks[DIV4_B], MSTPCR2, 26, 0, 1, 0),
+        MSTP("tpu0", &div4_clks[DIV4_B], MSTPCR2, 25, 0, 1, 0),
+        MSTP("irda0", &div4_clks[DIV4_P], MSTPCR2, 24, 0, 1, 0),
+        MSTP("tsif0", &div4_clks[DIV4_B], MSTPCR2, 22, 0, 1, 0),
+        MSTP("usb1", &div4_clks[DIV4_B], MSTPCR2, 21, 0, 1, 1),
+        MSTP("usb0", &div4_clks[DIV4_B], MSTPCR2, 20, 0, 1, 1),
+        MSTP("2dg0", &div4_clks[DIV4_B], MSTPCR2, 19, 0, 1, 1),
+        MSTP("sdhi0", &div4_clks[DIV4_B], MSTPCR2, 18, 0, 1, 0),
+        MSTP("sdhi1", &div4_clks[DIV4_B], MSTPCR2, 17, 0, 1, 0),
+        MSTP("veu1", &div4_clks[DIV4_B], MSTPCR2, 15, 1, 1, 1),
+        MSTP("ceu1", &div4_clks[DIV4_B], MSTPCR2, 13, 0, 1, 1),
+        MSTP("beu1", &div4_clks[DIV4_B], MSTPCR2, 12, 0, 1, 1),
+        MSTP("2ddmac0", &div4_clks[DIV4_SH], MSTPCR2, 10, 0, 1, 1),
+        MSTP("spu0", &div4_clks[DIV4_B], MSTPCR2, 9, 0, 1, 0),
+        MSTP("jpu0", &div4_clks[DIV4_B], MSTPCR2, 6, 1, 1, 1),
+        MSTP("vou0", &div4_clks[DIV4_B], MSTPCR2, 5, 0, 1, 1),
+        MSTP("beu0", &div4_clks[DIV4_B], MSTPCR2, 4, 0, 1, 1),
+        MSTP("ceu0", &div4_clks[DIV4_B], MSTPCR2, 3, 0, 1, 1),
+        MSTP("veu0", &div4_clks[DIV4_B], MSTPCR2, 2, 1, 1, 1),
+        MSTP("vpu0", &div4_clks[DIV4_B], MSTPCR2, 1, 1, 1, 1),
+        MSTP("lcdc0", &div4_clks[DIV4_B], MSTPCR2, 0, 0, 1, 1),
+};
+
+int __init arch_clk_init(void)
+{
+        int k, ret = 0;
+
+        /* autodetect extal or fll configuration */
+        if (__raw_readl(PLLCR) & 0x1000)
+                pll_clk.parent = &fll_clk;
+        else
+                pll_clk.parent = &extal_clk;
+
+        for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
+                ret = clk_register(main_clks[k]);
+
+        if (!ret)
+                ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
+
+        if (!ret)
+                ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks));
+
+        if (!ret)
+                ret = sh_clk_mstp32_register(mstp_clks, ARRAY_SIZE(mstp_clks));
+
+        return ret;
+}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7763.c b/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
index 3177d0d1e06d..370cd47642ef 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
@@ -29,33 +29,28 @@ static struct clk_ops sh7763_master_clk_ops = {
         .init           = master_clk_init,
 };
 
-static void module_clk_recalc(struct clk *clk)
+static unsigned long module_clk_recalc(struct clk *clk)
 {
         int idx = ((ctrl_inl(FRQCR) >> 4) & 0x07);
-        clk->rate = clk->parent->rate / p0fc_divisors[idx];
+        return clk->parent->rate / p0fc_divisors[idx];
 }
 
 static struct clk_ops sh7763_module_clk_ops = {
         .recalc         = module_clk_recalc,
 };
 
-static void bus_clk_recalc(struct clk *clk)
+static unsigned long bus_clk_recalc(struct clk *clk)
 {
         int idx = ((ctrl_inl(FRQCR) >> 16) & 0x07);
-        clk->rate = clk->parent->rate / bfc_divisors[idx];
+        return clk->parent->rate / bfc_divisors[idx];
 }
 
 static struct clk_ops sh7763_bus_clk_ops = {
         .recalc         = bus_clk_recalc,
 };
 
-static void cpu_clk_recalc(struct clk *clk)
-{
-        clk->rate = clk->parent->rate;
-}
-
 static struct clk_ops sh7763_cpu_clk_ops = {
-        .recalc         = cpu_clk_recalc,
+        .recalc         = followparent_recalc,
 };
 
 static struct clk_ops *sh7763_clk_ops[] = {
@@ -71,10 +66,10 @@ void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
                 *ops = sh7763_clk_ops[idx];
 }
 
-static void shyway_clk_recalc(struct clk *clk)
+static unsigned long shyway_clk_recalc(struct clk *clk)
 {
         int idx = ((ctrl_inl(FRQCR) >> 20) & 0x07);
-        clk->rate = clk->parent->rate / cfc_divisors[idx];
+        return clk->parent->rate / cfc_divisors[idx];
 }
 
 static struct clk_ops sh7763_shyway_clk_ops = {
@@ -83,7 +78,7 @@ static struct clk_ops sh7763_shyway_clk_ops = {
 
 static struct clk sh7763_shyway_clk = {
         .name           = "shyway_clk",
-        .flags          = CLK_ALWAYS_ENABLED,
+        .flags          = CLK_ENABLE_ON_INIT,
         .ops            = &sh7763_shyway_clk_ops,
 };
 
@@ -95,31 +90,22 @@ static struct clk *sh7763_onchip_clocks[] = {
         &sh7763_shyway_clk,
 };
 
-static int __init sh7763_clk_init(void)
+int __init arch_clk_init(void)
 {
-        struct clk *clk = clk_get(NULL, "master_clk");
-        int i;
+        struct clk *clk;
+        int i, ret = 0;
+
+        cpg_clk_init();
 
+        clk = clk_get(NULL, "master_clk");
         for (i = 0; i < ARRAY_SIZE(sh7763_onchip_clocks); i++) {
                 struct clk *clkp = sh7763_onchip_clocks[i];
 
                 clkp->parent = clk;
-                clk_register(clkp);
-                clk_enable(clkp);
+                ret |= clk_register(clkp);
         }
 
-        /*
-         * Now that we have the rest of the clocks registered, we need to
-         * force the parent clock to propagate so that these clocks will
-         * automatically figure out their rate. We cheat by handing the
-         * parent clock its current rate and forcing child propagation.
-         */
-        clk_set_rate(clk, clk_get_rate(clk));
-
         clk_put(clk);
 
-        return 0;
+        return ret;
 }
-
-arch_initcall(sh7763_clk_init);
-
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7770.c b/arch/sh/kernel/cpu/sh4a/clock-sh7770.c
index 8e236062c721..e0b896769205 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7770.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7770.c
@@ -28,30 +28,30 @@ static struct clk_ops sh7770_master_clk_ops = {
         .init           = master_clk_init,
 };
 
-static void module_clk_recalc(struct clk *clk)
+static unsigned long module_clk_recalc(struct clk *clk)
 {
         int idx = ((ctrl_inl(FRQCR) >> 28) & 0x000f);
-        clk->rate = clk->parent->rate / pfc_divisors[idx];
+        return clk->parent->rate / pfc_divisors[idx];
 }
 
 static struct clk_ops sh7770_module_clk_ops = {
         .recalc         = module_clk_recalc,
 };
 
-static void bus_clk_recalc(struct clk *clk)
+static unsigned long bus_clk_recalc(struct clk *clk)
 {
         int idx = (ctrl_inl(FRQCR) & 0x000f);
-        clk->rate = clk->parent->rate / bfc_divisors[idx];
+        return clk->parent->rate / bfc_divisors[idx];
 }
 
 static struct clk_ops sh7770_bus_clk_ops = {
         .recalc         = bus_clk_recalc,
 };
 
-static void cpu_clk_recalc(struct clk *clk)
+static unsigned long cpu_clk_recalc(struct clk *clk)
 {
         int idx = ((ctrl_inl(FRQCR) >> 24) & 0x000f);
-        clk->rate = clk->parent->rate / ifc_divisors[idx];
+        return clk->parent->rate / ifc_divisors[idx];
 }
 
 static struct clk_ops sh7770_cpu_clk_ops = {
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7780.c b/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
index 01f3da619d3d..a249d823578e 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7780.c
@@ -29,30 +29,30 @@ static struct clk_ops sh7780_master_clk_ops = {
         .init           = master_clk_init,
 };
 
-static void module_clk_recalc(struct clk *clk)
+static unsigned long module_clk_recalc(struct clk *clk)
 {
         int idx = (ctrl_inl(FRQCR) & 0x0003);
-        clk->rate = clk->parent->rate / pfc_divisors[idx];
+        return clk->parent->rate / pfc_divisors[idx];
 }
 
 static struct clk_ops sh7780_module_clk_ops = {
         .recalc         = module_clk_recalc,
 };
 
-static void bus_clk_recalc(struct clk *clk)
+static unsigned long bus_clk_recalc(struct clk *clk)
 {
         int idx = ((ctrl_inl(FRQCR) >> 16) & 0x0007);
-        clk->rate = clk->parent->rate / bfc_divisors[idx];
+        return clk->parent->rate / bfc_divisors[idx];
 }
 
 static struct clk_ops sh7780_bus_clk_ops = {
         .recalc         = bus_clk_recalc,
 };
 
-static void cpu_clk_recalc(struct clk *clk)
+static unsigned long cpu_clk_recalc(struct clk *clk)
 {
         int idx = ((ctrl_inl(FRQCR) >> 24) & 0x0001);
-        clk->rate = clk->parent->rate / ifc_divisors[idx];
+        return clk->parent->rate / ifc_divisors[idx];
 }
 
 static struct clk_ops sh7780_cpu_clk_ops = {
@@ -72,10 +72,10 @@ void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
                 *ops = sh7780_clk_ops[idx];
 }
 
-static void shyway_clk_recalc(struct clk *clk)
+static unsigned long shyway_clk_recalc(struct clk *clk)
 {
         int idx = ((ctrl_inl(FRQCR) >> 20) & 0x0007);
-        clk->rate = clk->parent->rate / cfc_divisors[idx];
+        return clk->parent->rate / cfc_divisors[idx];
 }
 
 static struct clk_ops sh7780_shyway_clk_ops = {
@@ -84,7 +84,7 @@ static struct clk_ops sh7780_shyway_clk_ops = {
 
 static struct clk sh7780_shyway_clk = {
         .name           = "shyway_clk",
-        .flags          = CLK_ALWAYS_ENABLED,
+        .flags          = CLK_ENABLE_ON_INIT,
         .ops            = &sh7780_shyway_clk_ops,
 };
 
@@ -96,31 +96,22 @@ static struct clk *sh7780_onchip_clocks[] = {
         &sh7780_shyway_clk,
 };
 
-static int __init sh7780_clk_init(void)
+int __init arch_clk_init(void)
 {
-        struct clk *clk = clk_get(NULL, "master_clk");
-        int i;
+        struct clk *clk;
+        int i, ret = 0;
 
+        cpg_clk_init();
+
+        clk = clk_get(NULL, "master_clk");
         for (i = 0; i < ARRAY_SIZE(sh7780_onchip_clocks); i++) {
                 struct clk *clkp = sh7780_onchip_clocks[i];
 
                 clkp->parent = clk;
-                clk_register(clkp);
-                clk_enable(clkp);
+                ret |= clk_register(clkp);
         }
 
-        /*
-         * Now that we have the rest of the clocks registered, we need to
-         * force the parent clock to propagate so that these clocks will
-         * automatically figure out their rate. We cheat by handing the
-         * parent clock its current rate and forcing child propagation.
-         */
-        clk_set_rate(clk, clk_get_rate(clk));
-
         clk_put(clk);
 
-        return 0;
+        return ret;
 }
-
-arch_initcall(sh7780_clk_init);
-
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
index 27fa81bef6a0..73abfbf2f16d 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
@@ -3,7 +3,7 @@
  *
  * SH7785 support for the clock framework
  *
- *  Copyright (C) 2007  Paul Mundt
+ *  Copyright (C) 2007 - 2009  Paul Mundt
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -11,152 +11,116 @@
  */
 #include <linux/init.h>
 #include <linux/kernel.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/cpufreq.h>
 #include <asm/clock.h>
 #include <asm/freq.h>
-#include <asm/io.h>
-
-static int ifc_divisors[] = { 1, 2, 4, 6 };
-static int ufc_divisors[] = { 1, 1, 4, 6 };
-static int sfc_divisors[] = { 1, 1, 4, 6 };
-static int bfc_divisors[] = { 1, 1, 1, 1, 1, 12, 16, 18,
-                             24, 32, 36, 48, 1, 1, 1, 1 };
-static int mfc_divisors[] = { 1, 1, 4, 6 };
-static int pfc_divisors[] = { 1, 1, 1, 1, 1, 1, 1, 18,
-                              24, 32, 36, 48, 1, 1, 1, 1 };
-
-static void master_clk_init(struct clk *clk)
-{
-        clk->rate *= pfc_divisors[ctrl_inl(FRQMR1) & 0x000f];
-}
+#include <cpu/sh7785.h>
 
-static struct clk_ops sh7785_master_clk_ops = {
-        .init           = master_clk_init,
+/*
+ * Default rate for the root input clock, reset this with clk_set_rate()
+ * from the platform code.
+ */
+static struct clk extal_clk = {
+        .name           = "extal",
+        .id             = -1,
+        .rate           = 33333333,
 };
 
-static void module_clk_recalc(struct clk *clk)
+static unsigned long pll_recalc(struct clk *clk)
 {
-        int idx = (ctrl_inl(FRQMR1) & 0x000f);
-        clk->rate = clk->parent->rate / pfc_divisors[idx];
-}
+        int multiplier;
 
-static struct clk_ops sh7785_module_clk_ops = {
-        .recalc         = module_clk_recalc,
-};
+        multiplier = test_mode_pin(MODE_PIN4) ? 36 : 72;
 
-static void bus_clk_recalc(struct clk *clk)
-{
-        int idx = ((ctrl_inl(FRQMR1) >> 16) & 0x000f);
-        clk->rate = clk->parent->rate / bfc_divisors[idx];
+        return clk->parent->rate * multiplier;
 }
 
-static struct clk_ops sh7785_bus_clk_ops = {
-        .recalc         = bus_clk_recalc,
+static struct clk_ops pll_clk_ops = {
+        .recalc         = pll_recalc,
 };
 
-static void cpu_clk_recalc(struct clk *clk)
-{
-        int idx = ((ctrl_inl(FRQMR1) >> 28) & 0x0003);
-        clk->rate = clk->parent->rate / ifc_divisors[idx];
-}
-
-static struct clk_ops sh7785_cpu_clk_ops = {
-        .recalc         = cpu_clk_recalc,
+static struct clk pll_clk = {
+        .name           = "pll_clk",
+        .id             = -1,
+        .ops            = &pll_clk_ops,
+        .parent         = &extal_clk,
+        .flags          = CLK_ENABLE_ON_INIT,
 };
 
-static struct clk_ops *sh7785_clk_ops[] = {
-        &sh7785_master_clk_ops,
-        &sh7785_module_clk_ops,
-        &sh7785_bus_clk_ops,
-        &sh7785_cpu_clk_ops,
+static struct clk *clks[] = {
+        &extal_clk,
+        &pll_clk,
 };
 
-void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
-{
-        if (idx < ARRAY_SIZE(sh7785_clk_ops))
-                *ops = sh7785_clk_ops[idx];
-}
-
-static void shyway_clk_recalc(struct clk *clk)
-{
-        int idx = ((ctrl_inl(FRQMR1) >> 20) & 0x0003);
-        clk->rate = clk->parent->rate / sfc_divisors[idx];
-}
+static unsigned int div2[] = { 1, 2, 4, 6, 8, 12, 16, 18,
+                               24, 32, 36, 48 };
 
-static struct clk_ops sh7785_shyway_clk_ops = {
-        .recalc         = shyway_clk_recalc,
+static struct clk_div_mult_table div4_table = {
+        .divisors = div2,
+        .nr_divisors = ARRAY_SIZE(div2),
 };
 
-static struct clk sh7785_shyway_clk = {
-        .name           = "shyway_clk",
-        .flags          = CLK_ALWAYS_ENABLED,
-        .ops            = &sh7785_shyway_clk_ops,
+enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_DDR, DIV4_GA,
+        DIV4_DU, DIV4_P, DIV4_NR };
+
+#define DIV4(_str, _bit, _mask, _flags) \
+  SH_CLK_DIV4(_str, &pll_clk, FRQMR1, _bit, _mask, _flags)
+
+struct clk div4_clks[DIV4_NR] = {
+        [DIV4_P] = DIV4("peripheral_clk", 0, 0x0f80, 0),
+        [DIV4_DU] = DIV4("du_clk", 4, 0x0ff0, 0),
+        [DIV4_GA] = DIV4("ga_clk", 8, 0x0030, 0),
+        [DIV4_DDR] = DIV4("ddr_clk", 12, 0x000c, CLK_ENABLE_ON_INIT),
+        [DIV4_B] = DIV4("bus_clk", 16, 0x0fe0, CLK_ENABLE_ON_INIT),
+        [DIV4_SH] = DIV4("shyway_clk", 20, 0x000c, CLK_ENABLE_ON_INIT),
+        [DIV4_U] = DIV4("umem_clk", 24, 0x000c, CLK_ENABLE_ON_INIT),
+        [DIV4_I] = DIV4("cpu_clk", 28, 0x000e, CLK_ENABLE_ON_INIT),
 };
 
-static void ddr_clk_recalc(struct clk *clk)
-{
-        int idx = ((ctrl_inl(FRQMR1) >> 12) & 0x0003);
-        clk->rate = clk->parent->rate / mfc_divisors[idx];
-}
-
-static struct clk_ops sh7785_ddr_clk_ops = {
-        .recalc         = ddr_clk_recalc,
-};
-
-static struct clk sh7785_ddr_clk = {
-        .name           = "ddr_clk",
-        .flags          = CLK_ALWAYS_ENABLED,
-        .ops            = &sh7785_ddr_clk_ops,
-};
-
-static void ram_clk_recalc(struct clk *clk)
-{
-        int idx = ((ctrl_inl(FRQMR1) >> 24) & 0x0003);
-        clk->rate = clk->parent->rate / ufc_divisors[idx];
-}
-
-static struct clk_ops sh7785_ram_clk_ops = {
-        .recalc         = ram_clk_recalc,
+#define MSTPCR0         0xffc80030
+#define MSTPCR1         0xffc80034
+
+static struct clk mstp_clks[] = {
+        /* MSTPCR0 */
+        SH_CLK_MSTP32("scif_fck", 5, &div4_clks[DIV4_P], MSTPCR0, 29, 0),
+        SH_CLK_MSTP32("scif_fck", 4, &div4_clks[DIV4_P], MSTPCR0, 28, 0),
+        SH_CLK_MSTP32("scif_fck", 3, &div4_clks[DIV4_P], MSTPCR0, 27, 0),
+        SH_CLK_MSTP32("scif_fck", 2, &div4_clks[DIV4_P], MSTPCR0, 26, 0),
+        SH_CLK_MSTP32("scif_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 25, 0),
+        SH_CLK_MSTP32("scif_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 24, 0),
+        SH_CLK_MSTP32("ssi_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 21, 0),
+        SH_CLK_MSTP32("ssi_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 20, 0),
+        SH_CLK_MSTP32("hac_fck", 1, &div4_clks[DIV4_P], MSTPCR0, 17, 0),
+        SH_CLK_MSTP32("hac_fck", 0, &div4_clks[DIV4_P], MSTPCR0, 16, 0),
+        SH_CLK_MSTP32("mmcif_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 13, 0),
+        SH_CLK_MSTP32("flctl_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 12, 0),
+        SH_CLK_MSTP32("tmu345_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 9, 0),
+        SH_CLK_MSTP32("tmu012_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 8, 0),
+        SH_CLK_MSTP32("siof_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 3, 0),
+        SH_CLK_MSTP32("hspi_fck", -1, &div4_clks[DIV4_P], MSTPCR0, 2, 0),
+
+        /* MSTPCR1 */
+        SH_CLK_MSTP32("hudi_fck", -1, NULL, MSTPCR1, 19, 0),
+        SH_CLK_MSTP32("ubc_fck", -1, NULL, MSTPCR1, 17, 0),
+        SH_CLK_MSTP32("dmac_11_6_fck", -1, NULL, MSTPCR1, 5, 0),
+        SH_CLK_MSTP32("dmac_5_0_fck", -1, NULL, MSTPCR1, 4, 0),
+        SH_CLK_MSTP32("gdta_fck", -1, NULL, MSTPCR1, 0, 0),
 };
 
-static struct clk sh7785_ram_clk = {
-        .name           = "ram_clk",
-        .flags          = CLK_ALWAYS_ENABLED,
-        .ops            = &sh7785_ram_clk_ops,
-};
-
-/*
- * Additional SH7785-specific on-chip clocks that aren't already part of the
- * clock framework
- */
-static struct clk *sh7785_onchip_clocks[] = {
-        &sh7785_shyway_clk,
-        &sh7785_ddr_clk,
-        &sh7785_ram_clk,
-};
-
-static int __init sh7785_clk_init(void)
+int __init arch_clk_init(void)
 {
-        struct clk *clk = clk_get(NULL, "master_clk");
-        int i;
-
-        for (i = 0; i < ARRAY_SIZE(sh7785_onchip_clocks); i++) {
-                struct clk *clkp = sh7785_onchip_clocks[i];
-
-                clkp->parent = clk;
-                clk_register(clkp);
-                clk_enable(clkp);
-        }
+        int i, ret = 0;
 
-        /*
-         * Now that we have the rest of the clocks registered, we need to
-         * force the parent clock to propagate so that these clocks will
-         * automatically figure out their rate. We cheat by handing the
-         * parent clock its current rate and forcing child propagation.
-         */
-        clk_set_rate(clk, clk_get_rate(clk));
+        for (i = 0; i < ARRAY_SIZE(clks); i++)
+                ret |= clk_register(clks[i]);
 
-        clk_put(clk);
+        if (!ret)
+                ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks),
+                                           &div4_table);
+        if (!ret)
+                ret = sh_clk_mstp32_register(mstp_clks, ARRAY_SIZE(mstp_clks));
 
-        return 0;
+        return ret;
 }
-arch_initcall(sh7785_clk_init);
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
index f84a9c134471..a0e8869071ac 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
@@ -36,30 +36,30 @@ static struct clk_ops sh7786_master_clk_ops = {
         .init           = master_clk_init,
 };
 
-static void module_clk_recalc(struct clk *clk)
+static unsigned long module_clk_recalc(struct clk *clk)
 {
         int idx = (ctrl_inl(FRQMR1) & 0x000f);
-        clk->rate = clk->parent->rate / pfc_divisors[idx];
+        return clk->parent->rate / pfc_divisors[idx];
 }
 
 static struct clk_ops sh7786_module_clk_ops = {
         .recalc         = module_clk_recalc,
 };
 
-static void bus_clk_recalc(struct clk *clk)
+static unsigned long bus_clk_recalc(struct clk *clk)
 {
         int idx = ((ctrl_inl(FRQMR1) >> 16) & 0x000f);
-        clk->rate = clk->parent->rate / bfc_divisors[idx];
+        return clk->parent->rate / bfc_divisors[idx];
 }
 
 static struct clk_ops sh7786_bus_clk_ops = {
         .recalc         = bus_clk_recalc,
 };
 
-static void cpu_clk_recalc(struct clk *clk)
+static unsigned long cpu_clk_recalc(struct clk *clk)
 {
         int idx = ((ctrl_inl(FRQMR1) >> 28) & 0x0003);
-        clk->rate = clk->parent->rate / ifc_divisors[idx];
+        return clk->parent->rate / ifc_divisors[idx];
 }
 
 static struct clk_ops sh7786_cpu_clk_ops = {
@@ -79,10 +79,10 @@ void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
                 *ops = sh7786_clk_ops[idx];
 }
 
-static void shyway_clk_recalc(struct clk *clk)
+static unsigned long shyway_clk_recalc(struct clk *clk)
 {
         int idx = ((ctrl_inl(FRQMR1) >> 20) & 0x0003);
-        clk->rate = clk->parent->rate / sfc_divisors[idx];
+        return clk->parent->rate / sfc_divisors[idx];
 }
 
 static struct clk_ops sh7786_shyway_clk_ops = {
@@ -91,14 +91,14 @@ static struct clk_ops sh7786_shyway_clk_ops = {
 
 static struct clk sh7786_shyway_clk = {
         .name           = "shyway_clk",
-        .flags          = CLK_ALWAYS_ENABLED,
+        .flags          = CLK_ENABLE_ON_INIT,
         .ops            = &sh7786_shyway_clk_ops,
 };
 
-static void ddr_clk_recalc(struct clk *clk)
+static unsigned long ddr_clk_recalc(struct clk *clk)
 {
         int idx = ((ctrl_inl(FRQMR1) >> 12) & 0x0003);
-        clk->rate = clk->parent->rate / mfc_divisors[idx];
+        return clk->parent->rate / mfc_divisors[idx];
 }
 
 static struct clk_ops sh7786_ddr_clk_ops = {
@@ -107,7 +107,7 @@ static struct clk_ops sh7786_ddr_clk_ops = {
 
 static struct clk sh7786_ddr_clk = {
         .name           = "ddr_clk",
-        .flags          = CLK_ALWAYS_ENABLED,
+        .flags          = CLK_ENABLE_ON_INIT,
         .ops            = &sh7786_ddr_clk_ops,
 };
 
@@ -120,29 +120,22 @@ static struct clk *sh7786_onchip_clocks[] = {
         &sh7786_ddr_clk,
 };
 
-static int __init sh7786_clk_init(void)
+int __init arch_clk_init(void)
 {
-        struct clk *clk = clk_get(NULL, "master_clk");
-        int i;
+        struct clk *clk;
+        int i, ret = 0;
 
+        cpg_clk_init();
+
+        clk = clk_get(NULL, "master_clk");
         for (i = 0; i < ARRAY_SIZE(sh7786_onchip_clocks); i++) {
                 struct clk *clkp = sh7786_onchip_clocks[i];
 
                 clkp->parent = clk;
-                clk_register(clkp);
-                clk_enable(clkp);
+                ret |= clk_register(clkp);
         }
 
-        /*
-         * Now that we have the rest of the clocks registered, we need to
-         * force the parent clock to propagate so that these clocks will
-         * automatically figure out their rate. We cheat by handing the
-         * parent clock its current rate and forcing child propagation.
-         */
-        clk_set_rate(clk, clk_get_rate(clk));
-
         clk_put(clk);
 
-        return 0;
+        return ret;
 }
-arch_initcall(sh7786_clk_init);
diff --git a/arch/sh/kernel/cpu/sh4a/clock-shx3.c b/arch/sh/kernel/cpu/sh4a/clock-shx3.c
index c630b29e06a8..23c27d32d982 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-shx3.c
@@ -40,30 +40,30 @@ static struct clk_ops shx3_master_clk_ops = {
         .init           = master_clk_init,
 };
 
-static void module_clk_recalc(struct clk *clk)
+static unsigned long module_clk_recalc(struct clk *clk)
 {
         int idx = ((ctrl_inl(FRQCR) >> PFC_POS) & PFC_MSK);
-        clk->rate = clk->parent->rate / pfc_divisors[idx];
+        return clk->parent->rate / pfc_divisors[idx];
 }
 
 static struct clk_ops shx3_module_clk_ops = {
         .recalc         = module_clk_recalc,
 };
 
-static void bus_clk_recalc(struct clk *clk)
+static unsigned long bus_clk_recalc(struct clk *clk)
 {
         int idx = ((ctrl_inl(FRQCR) >> BFC_POS) & BFC_MSK);
-        clk->rate = clk->parent->rate / bfc_divisors[idx];
+        return clk->parent->rate / bfc_divisors[idx];
 }
 
 static struct clk_ops shx3_bus_clk_ops = {
         .recalc         = bus_clk_recalc,
 };
 
-static void cpu_clk_recalc(struct clk *clk)
+static unsigned long cpu_clk_recalc(struct clk *clk)
 {
         int idx = ((ctrl_inl(FRQCR) >> IFC_POS) & IFC_MSK);
-        clk->rate = clk->parent->rate / ifc_divisors[idx];
+        return clk->parent->rate / ifc_divisors[idx];
 }
 
 static struct clk_ops shx3_cpu_clk_ops = {
@@ -83,10 +83,10 @@ void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
                 *ops = shx3_clk_ops[idx];
 }
 
-static void shyway_clk_recalc(struct clk *clk)
+static unsigned long shyway_clk_recalc(struct clk *clk)
 {
         int idx = ((ctrl_inl(FRQCR) >> CFC_POS) & CFC_MSK);
-        clk->rate = clk->parent->rate / cfc_divisors[idx];
+        return clk->parent->rate / cfc_divisors[idx];
 }
 
 static struct clk_ops shx3_shyway_clk_ops = {
@@ -95,7 +95,7 @@ static struct clk_ops shx3_shyway_clk_ops = {
 
 static struct clk shx3_shyway_clk = {
         .name           = "shyway_clk",
-        .flags          = CLK_ALWAYS_ENABLED,
+        .flags          = CLK_ENABLE_ON_INIT,
         .ops            = &shx3_shyway_clk_ops,
 };
 
@@ -107,29 +107,22 @@ static struct clk *shx3_onchip_clocks[] = {
         &shx3_shyway_clk,
 };
 
-static int __init shx3_clk_init(void)
+int __init arch_clk_init(void)
 {
-        struct clk *clk = clk_get(NULL, "master_clk");
-        int i;
+        struct clk *clk;
+        int i, ret = 0;
 
+        cpg_clk_init();
+
+        clk = clk_get(NULL, "master_clk");
         for (i = 0; i < ARRAY_SIZE(shx3_onchip_clocks); i++) {
                 struct clk *clkp = shx3_onchip_clocks[i];
 
                 clkp->parent = clk;
-                clk_register(clkp);
-                clk_enable(clkp);
+                ret |= clk_register(clkp);
         }
 
-        /*
-         * Now that we have the rest of the clocks registered, we need to
-         * force the parent clock to propagate so that these clocks will
-         * automatically figure out their rate. We cheat by handing the
-         * parent clock its current rate and forcing child propagation.
-         */
-        clk_set_rate(clk, clk_get_rate(clk));
-
         clk_put(clk);
 
-        return 0;
+        return ret;
 }
-arch_initcall(shx3_clk_init);
diff --git a/arch/sh/kernel/cpu/sh4a/pinmux-sh7724.c b/arch/sh/kernel/cpu/sh4a/pinmux-sh7724.c
new file mode 100644
index 000000000000..1af0f9586379
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/pinmux-sh7724.c
@@ -0,0 +1,2230 @@
+/*
+ * SH7724 Pinmux
+ *
+ * Copyright (C) 2009 Renesas Solutions Corp.
+ *
+ * Kuninori Morimoto <morimoto.kuninori@renesas.com>
+ *
+ * Based on SH7723 Pinmux
+ *  Copyright (C) 2008  Magnus Damm
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/gpio.h>
+#include <cpu/sh7724.h>
+
+enum {
+        PINMUX_RESERVED = 0,
+
+        PINMUX_DATA_BEGIN,
+        PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
+        PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA,
+        PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
+        PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA,
+        PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA,
+        PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA,
+        PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
+        PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA,
+        PTE7_DATA, PTE6_DATA, PTE5_DATA, PTE4_DATA,
+        PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA,
+        PTF7_DATA, PTF6_DATA, PTF5_DATA, PTF4_DATA,
+        PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA,
+                              PTG5_DATA, PTG4_DATA,
+        PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA,
+        PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA,
+        PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA,
+        PTJ7_DATA, PTJ6_DATA, PTJ5_DATA,
+        PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA,
+        PTK7_DATA, PTK6_DATA, PTK5_DATA, PTK4_DATA,
+        PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA,
+        PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA,
+        PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA,
+        PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
+        PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA,
+        PTN7_DATA, PTN6_DATA, PTN5_DATA, PTN4_DATA,
+        PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA,
+        PTQ7_DATA, PTQ6_DATA, PTQ5_DATA, PTQ4_DATA,
+        PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA,
+        PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA,
+        PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA,
+                   PTS6_DATA, PTS5_DATA, PTS4_DATA,
+        PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA,
+        PTT7_DATA, PTT6_DATA, PTT5_DATA, PTT4_DATA,
+        PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA,
+        PTU7_DATA, PTU6_DATA, PTU5_DATA, PTU4_DATA,
+        PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA,
+        PTV7_DATA, PTV6_DATA, PTV5_DATA, PTV4_DATA,
+        PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA,
+        PTW7_DATA, PTW6_DATA, PTW5_DATA, PTW4_DATA,
+        PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA,
+        PTX7_DATA, PTX6_DATA, PTX5_DATA, PTX4_DATA,
+        PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA,
+        PTY7_DATA, PTY6_DATA, PTY5_DATA, PTY4_DATA,
+        PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA,
+        PTZ7_DATA, PTZ6_DATA, PTZ5_DATA, PTZ4_DATA,
+        PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA,
+        PINMUX_DATA_END,
+
+        PINMUX_INPUT_BEGIN,
+        PTA7_IN, PTA6_IN, PTA5_IN, PTA4_IN,
+        PTA3_IN, PTA2_IN, PTA1_IN, PTA0_IN,
+        PTB7_IN, PTB6_IN, PTB5_IN, PTB4_IN,
+        PTB3_IN, PTB2_IN, PTB1_IN, PTB0_IN,
+        PTC7_IN, PTC6_IN, PTC5_IN, PTC4_IN,
+        PTC3_IN, PTC2_IN, PTC1_IN, PTC0_IN,
+        PTD7_IN, PTD6_IN, PTD5_IN, PTD4_IN,
+        PTD3_IN, PTD2_IN, PTD1_IN, PTD0_IN,
+        PTE7_IN, PTE6_IN, PTE5_IN, PTE4_IN,
+        PTE3_IN, PTE2_IN, PTE1_IN, PTE0_IN,
+        PTF7_IN, PTF6_IN, PTF5_IN, PTF4_IN,
+        PTF3_IN, PTF2_IN, PTF1_IN, PTF0_IN,
+        PTH7_IN, PTH6_IN, PTH5_IN, PTH4_IN,
+        PTH3_IN, PTH2_IN, PTH1_IN, PTH0_IN,
+        PTJ3_IN, PTJ2_IN, PTJ1_IN, PTJ0_IN,
+        PTK7_IN, PTK6_IN, PTK5_IN, PTK4_IN,
+        PTK3_IN, PTK2_IN, PTK1_IN, PTK0_IN,
+        PTL7_IN, PTL6_IN, PTL5_IN, PTL4_IN,
+        PTL3_IN, PTL2_IN, PTL1_IN, PTL0_IN,
+        PTM7_IN, PTM6_IN, PTM5_IN, PTM4_IN,
+        PTM3_IN, PTM2_IN, PTM1_IN, PTM0_IN,
+        PTN7_IN, PTN6_IN, PTN5_IN, PTN4_IN,
+        PTN3_IN, PTN2_IN, PTN1_IN, PTN0_IN,
+        PTQ7_IN, PTQ6_IN, PTQ5_IN, PTQ4_IN,
+        PTQ3_IN, PTQ2_IN, PTQ1_IN, PTQ0_IN,
+        PTR7_IN, PTR6_IN, PTR5_IN, PTR4_IN,
+        PTR3_IN, PTR2_IN, PTR1_IN, PTR0_IN,
+                 PTS6_IN, PTS5_IN, PTS4_IN,
+        PTS3_IN, PTS2_IN, PTS1_IN, PTS0_IN,
+        PTT7_IN, PTT6_IN, PTT5_IN, PTT4_IN,
+        PTT3_IN, PTT2_IN, PTT1_IN, PTT0_IN,
+        PTU7_IN, PTU6_IN, PTU5_IN, PTU4_IN,
+        PTU3_IN, PTU2_IN, PTU1_IN, PTU0_IN,
+        PTV7_IN, PTV6_IN, PTV5_IN, PTV4_IN,
+        PTV3_IN, PTV2_IN, PTV1_IN, PTV0_IN,
+        PTW7_IN, PTW6_IN, PTW5_IN, PTW4_IN,
+        PTW3_IN, PTW2_IN, PTW1_IN, PTW0_IN,
+        PTX7_IN, PTX6_IN, PTX5_IN, PTX4_IN,
+        PTX3_IN, PTX2_IN, PTX1_IN, PTX0_IN,
+        PTY7_IN, PTY6_IN, PTY5_IN, PTY4_IN,
+        PTY3_IN, PTY2_IN, PTY1_IN, PTY0_IN,
+        PTZ7_IN, PTZ6_IN, PTZ5_IN, PTZ4_IN,
+        PTZ3_IN, PTZ2_IN, PTZ1_IN, PTZ0_IN,
+        PINMUX_INPUT_END,
+
+        PINMUX_INPUT_PULLUP_BEGIN,
+        PTA7_IN_PU, PTA6_IN_PU, PTA5_IN_PU, PTA4_IN_PU,
+        PTA3_IN_PU, PTA2_IN_PU, PTA1_IN_PU, PTA0_IN_PU,
+        PTB7_IN_PU, PTB6_IN_PU, PTB5_IN_PU, PTB4_IN_PU,
+        PTB3_IN_PU, PTB2_IN_PU, PTB1_IN_PU, PTB0_IN_PU,
+        PTC7_IN_PU, PTC6_IN_PU, PTC5_IN_PU, PTC4_IN_PU,
+        PTC3_IN_PU, PTC2_IN_PU, PTC1_IN_PU, PTC0_IN_PU,
+        PTD7_IN_PU, PTD6_IN_PU, PTD5_IN_PU, PTD4_IN_PU,
+        PTD3_IN_PU, PTD2_IN_PU, PTD1_IN_PU, PTD0_IN_PU,
+        PTE7_IN_PU, PTE6_IN_PU, PTE5_IN_PU, PTE4_IN_PU,
+        PTE3_IN_PU, PTE2_IN_PU, PTE1_IN_PU, PTE0_IN_PU,
+        PTF7_IN_PU, PTF6_IN_PU, PTF5_IN_PU, PTF4_IN_PU,
+        PTF3_IN_PU, PTF2_IN_PU, PTF1_IN_PU, PTF0_IN_PU,
+        PTH7_IN_PU, PTH6_IN_PU, PTH5_IN_PU, PTH4_IN_PU,
+        PTH3_IN_PU, PTH2_IN_PU, PTH1_IN_PU, PTH0_IN_PU,
+        PTJ3_IN_PU, PTJ2_IN_PU, PTJ1_IN_PU, PTJ0_IN_PU,
+        PTK7_IN_PU, PTK6_IN_PU, PTK5_IN_PU, PTK4_IN_PU,
+        PTK3_IN_PU, PTK2_IN_PU, PTK1_IN_PU, PTK0_IN_PU,
+        PTL7_IN_PU, PTL6_IN_PU, PTL5_IN_PU, PTL4_IN_PU,
+        PTL3_IN_PU, PTL2_IN_PU, PTL1_IN_PU, PTL0_IN_PU,
+        PTM7_IN_PU, PTM6_IN_PU, PTM5_IN_PU, PTM4_IN_PU,
+        PTM3_IN_PU, PTM2_IN_PU, PTM1_IN_PU, PTM0_IN_PU,
+        PTN7_IN_PU, PTN6_IN_PU, PTN5_IN_PU, PTN4_IN_PU,
+        PTN3_IN_PU, PTN2_IN_PU, PTN1_IN_PU, PTN0_IN_PU,
+        PTQ7_IN_PU, PTQ6_IN_PU, PTQ5_IN_PU, PTQ4_IN_PU,
+        PTQ3_IN_PU, PTQ2_IN_PU, PTQ1_IN_PU, PTQ0_IN_PU,
+        PTR7_IN_PU, PTR6_IN_PU, PTR5_IN_PU, PTR4_IN_PU,
+        PTR3_IN_PU, PTR2_IN_PU, PTR1_IN_PU, PTR0_IN_PU,
+                    PTS6_IN_PU, PTS5_IN_PU, PTS4_IN_PU,
+        PTS3_IN_PU, PTS2_IN_PU, PTS1_IN_PU, PTS0_IN_PU,
+        PTT7_IN_PU, PTT6_IN_PU, PTT5_IN_PU, PTT4_IN_PU,
+        PTT3_IN_PU, PTT2_IN_PU, PTT1_IN_PU, PTT0_IN_PU,
+        PTU7_IN_PU, PTU6_IN_PU, PTU5_IN_PU, PTU4_IN_PU,
+        PTU3_IN_PU, PTU2_IN_PU, PTU1_IN_PU, PTU0_IN_PU,
+        PTV7_IN_PU, PTV6_IN_PU, PTV5_IN_PU, PTV4_IN_PU,
+        PTV3_IN_PU, PTV2_IN_PU, PTV1_IN_PU, PTV0_IN_PU,
+        PTW7_IN_PU, PTW6_IN_PU, PTW5_IN_PU, PTW4_IN_PU,
+        PTW3_IN_PU, PTW2_IN_PU, PTW1_IN_PU, PTW0_IN_PU,
+        PTX7_IN_PU, PTX6_IN_PU, PTX5_IN_PU, PTX4_IN_PU,
+        PTX3_IN_PU, PTX2_IN_PU, PTX1_IN_PU, PTX0_IN_PU,
+        PTY7_IN_PU, PTY6_IN_PU, PTY5_IN_PU, PTY4_IN_PU,
+        PTY3_IN_PU, PTY2_IN_PU, PTY1_IN_PU, PTY0_IN_PU,
+        PTZ7_IN_PU, PTZ6_IN_PU, PTZ5_IN_PU, PTZ4_IN_PU,
+        PTZ3_IN_PU, PTZ2_IN_PU, PTZ1_IN_PU, PTZ0_IN_PU,
+        PINMUX_INPUT_PULLUP_END,
+
+        PINMUX_OUTPUT_BEGIN,
+        PTA7_OUT, PTA6_OUT, PTA5_OUT, PTA4_OUT,
+        PTA3_OUT, PTA2_OUT, PTA1_OUT, PTA0_OUT,
+        PTB7_OUT, PTB6_OUT, PTB5_OUT, PTB4_OUT,
+        PTB3_OUT, PTB2_OUT, PTB1_OUT, PTB0_OUT,
+        PTC7_OUT, PTC6_OUT, PTC5_OUT, PTC4_OUT,
+        PTC3_OUT, PTC2_OUT, PTC1_OUT, PTC0_OUT,
+        PTD7_OUT, PTD6_OUT, PTD5_OUT, PTD4_OUT,
+        PTD3_OUT, PTD2_OUT, PTD1_OUT, PTD0_OUT,
+        PTE7_OUT, PTE6_OUT, PTE5_OUT, PTE4_OUT,
+        PTE3_OUT, PTE2_OUT, PTE1_OUT, PTE0_OUT,
+        PTF7_OUT, PTF6_OUT, PTF5_OUT, PTF4_OUT,
+        PTF3_OUT, PTF2_OUT, PTF1_OUT, PTF0_OUT,
+                            PTG5_OUT, PTG4_OUT,
+        PTG3_OUT, PTG2_OUT, PTG1_OUT, PTG0_OUT,
+        PTH7_OUT, PTH6_OUT, PTH5_OUT, PTH4_OUT,
+        PTH3_OUT, PTH2_OUT, PTH1_OUT, PTH0_OUT,
+        PTJ7_OUT, PTJ6_OUT, PTJ5_OUT,
+        PTJ3_OUT, PTJ2_OUT, PTJ1_OUT, PTJ0_OUT,
+        PTK7_OUT, PTK6_OUT, PTK5_OUT, PTK4_OUT,
+        PTK3_OUT, PTK2_OUT, PTK1_OUT, PTK0_OUT,
+        PTL7_OUT, PTL6_OUT, PTL5_OUT, PTL4_OUT,
+        PTL3_OUT, PTL2_OUT, PTL1_OUT, PTL0_OUT,
+        PTM7_OUT, PTM6_OUT, PTM5_OUT, PTM4_OUT,
+        PTM3_OUT, PTM2_OUT, PTM1_OUT, PTM0_OUT,
+        PTN7_OUT, PTN6_OUT, PTN5_OUT, PTN4_OUT,
+        PTN3_OUT, PTN2_OUT, PTN1_OUT, PTN0_OUT,
+        PTQ7_OUT, PTQ6_OUT, PTQ5_OUT, PTQ4_OUT,
+        PTQ3_OUT, PTQ2_OUT, PTQ1_OUT, PTQ0_OUT,
+        PTR7_OUT, PTR6_OUT, PTR5_OUT, PTR4_OUT,
+                            PTR1_OUT, PTR0_OUT,
+                  PTS6_OUT, PTS5_OUT, PTS4_OUT,
+        PTS3_OUT, PTS2_OUT, PTS1_OUT, PTS0_OUT,
+        PTT7_OUT, PTT6_OUT, PTT5_OUT, PTT4_OUT,
+        PTT3_OUT, PTT2_OUT, PTT1_OUT, PTT0_OUT,
+        PTU7_OUT, PTU6_OUT, PTU5_OUT, PTU4_OUT,
+        PTU3_OUT, PTU2_OUT, PTU1_OUT, PTU0_OUT,
+        PTV7_OUT, PTV6_OUT, PTV5_OUT, PTV4_OUT,
+        PTV3_OUT, PTV2_OUT, PTV1_OUT, PTV0_OUT,
+        PTW7_OUT, PTW6_OUT, PTW5_OUT, PTW4_OUT,
+        PTW3_OUT, PTW2_OUT, PTW1_OUT, PTW0_OUT,
+        PTX7_OUT, PTX6_OUT, PTX5_OUT, PTX4_OUT,
+        PTX3_OUT, PTX2_OUT, PTX1_OUT, PTX0_OUT,
+        PTY7_OUT, PTY6_OUT, PTY5_OUT, PTY4_OUT,
+        PTY3_OUT, PTY2_OUT, PTY1_OUT, PTY0_OUT,
+        PTZ7_OUT, PTZ6_OUT, PTZ5_OUT, PTZ4_OUT,
+        PTZ3_OUT, PTZ2_OUT, PTZ1_OUT, PTZ0_OUT,
+        PINMUX_OUTPUT_END,
+
+        PINMUX_FUNCTION_BEGIN,
+        PTA7_FN, PTA6_FN, PTA5_FN, PTA4_FN,
+        PTA3_FN, PTA2_FN, PTA1_FN, PTA0_FN,
+        PTB7_FN, PTB6_FN, PTB5_FN, PTB4_FN,
+        PTB3_FN, PTB2_FN, PTB1_FN, PTB0_FN,
+        PTC7_FN, PTC6_FN, PTC5_FN, PTC4_FN,
+        PTC3_FN, PTC2_FN, PTC1_FN, PTC0_FN,
+        PTD7_FN, PTD6_FN, PTD5_FN, PTD4_FN,
+        PTD3_FN, PTD2_FN, PTD1_FN, PTD0_FN,
+        PTE7_FN, PTE6_FN, PTE5_FN, PTE4_FN,
+        PTE3_FN, PTE2_FN, PTE1_FN, PTE0_FN,
+        PTF7_FN, PTF6_FN, PTF5_FN, PTF4_FN,
+        PTF3_FN, PTF2_FN, PTF1_FN, PTF0_FN,
+                          PTG5_FN, PTG4_FN,
+        PTG3_FN, PTG2_FN, PTG1_FN, PTG0_FN,
+        PTH7_FN, PTH6_FN, PTH5_FN, PTH4_FN,
+        PTH3_FN, PTH2_FN, PTH1_FN, PTH0_FN,
+        PTJ7_FN, PTJ6_FN, PTJ5_FN,
+        PTJ3_FN, PTJ2_FN, PTJ1_FN, PTJ0_FN,
+        PTK7_FN, PTK6_FN, PTK5_FN, PTK4_FN,
+        PTK3_FN, PTK2_FN, PTK1_FN, PTK0_FN,
+        PTL7_FN, PTL6_FN, PTL5_FN, PTL4_FN,
+        PTL3_FN, PTL2_FN, PTL1_FN, PTL0_FN,
+        PTM7_FN, PTM6_FN, PTM5_FN, PTM4_FN,
+        PTM3_FN, PTM2_FN, PTM1_FN, PTM0_FN,
+        PTN7_FN, PTN6_FN, PTN5_FN, PTN4_FN,
+        PTN3_FN, PTN2_FN, PTN1_FN, PTN0_FN,
+        PTQ7_FN, PTQ6_FN, PTQ5_FN, PTQ4_FN,
+        PTQ3_FN, PTQ2_FN, PTQ1_FN, PTQ0_FN,
+        PTR7_FN, PTR6_FN, PTR5_FN, PTR4_FN,
+        PTR3_FN, PTR2_FN, PTR1_FN, PTR0_FN,
+                 PTS6_FN, PTS5_FN, PTS4_FN,
+        PTS3_FN, PTS2_FN, PTS1_FN, PTS0_FN,
+        PTT7_FN, PTT6_FN, PTT5_FN, PTT4_FN,
+        PTT3_FN, PTT2_FN, PTT1_FN, PTT0_FN,
+        PTU7_FN, PTU6_FN, PTU5_FN, PTU4_FN,
+        PTU3_FN, PTU2_FN, PTU1_FN, PTU0_FN,
+        PTV7_FN, PTV6_FN, PTV5_FN, PTV4_FN,
+        PTV3_FN, PTV2_FN, PTV1_FN, PTV0_FN,
+        PTW7_FN, PTW6_FN, PTW5_FN, PTW4_FN,
+        PTW3_FN, PTW2_FN, PTW1_FN, PTW0_FN,
+        PTX7_FN, PTX6_FN, PTX5_FN, PTX4_FN,
+        PTX3_FN, PTX2_FN, PTX1_FN, PTX0_FN,
+        PTY7_FN, PTY6_FN, PTY5_FN, PTY4_FN,
+        PTY3_FN, PTY2_FN, PTY1_FN, PTY0_FN,
+        PTZ7_FN, PTZ6_FN, PTZ5_FN, PTZ4_FN,
+        PTZ3_FN, PTZ2_FN, PTZ1_FN, PTZ0_FN,
+
+
+        PSA15_0, PSA15_1,
+        PSA14_0, PSA14_1,
+        PSA13_0, PSA13_1,
+        PSA12_0, PSA12_1,
+        PSA10_0, PSA10_1,
+        PSA9_0,  PSA9_1,
+        PSA8_0,  PSA8_1,
+        PSA7_0,  PSA7_1,
+        PSA6_0,  PSA6_1,
+        PSA5_0,  PSA5_1,
+        PSA3_0,  PSA3_1,
+        PSA2_0,  PSA2_1,
+        PSA1_0,  PSA1_1,
+        PSA0_0,  PSA0_1,
+
+        PSB14_0, PSB14_1,
+        PSB13_0, PSB13_1,
+        PSB12_0, PSB12_1,
+        PSB11_0, PSB11_1,
+        PSB10_0, PSB10_1,
+        PSB9_0,  PSB9_1,
+        PSB8_0,  PSB8_1,
+        PSB7_0,  PSB7_1,
+        PSB6_0,  PSB6_1,
+        PSB5_0,  PSB5_1,
+        PSB4_0,  PSB4_1,
+        PSB3_0,  PSB3_1,
+        PSB2_0,  PSB2_1,
+        PSB1_0,  PSB1_1,
+        PSB0_0,  PSB0_1,
+
+        PSC15_0, PSC15_1,
+        PSC14_0, PSC14_1,
+        PSC13_0, PSC13_1,
+        PSC12_0, PSC12_1,
+        PSC11_0, PSC11_1,
+        PSC10_0, PSC10_1,
+        PSC9_0,  PSC9_1,
+        PSC8_0,  PSC8_1,
+        PSC7_0,  PSC7_1,
+        PSC6_0,  PSC6_1,
+        PSC5_0,  PSC5_1,
+        PSC4_0,  PSC4_1,
+        PSC2_0,  PSC2_1,
+        PSC1_0,  PSC1_1,
+        PSC0_0,  PSC0_1,
+
+        PSD15_0, PSD15_1,
+        PSD14_0, PSD14_1,
+        PSD13_0, PSD13_1,
+        PSD12_0, PSD12_1,
+        PSD11_0, PSD11_1,
+        PSD10_0, PSD10_1,
+        PSD9_0,  PSD9_1,
+        PSD8_0,  PSD8_1,
+        PSD7_0,  PSD7_1,
+        PSD6_0,  PSD6_1,
+        PSD5_0,  PSD5_1,
+        PSD4_0,  PSD4_1,
+        PSD3_0,  PSD3_1,
+        PSD2_0,  PSD2_1,
+        PSD1_0,  PSD1_1,
+        PSD0_0,  PSD0_1,
+
+        PSE15_0, PSE15_1,
+        PSE14_0, PSE14_1,
+        PSE13_0, PSE13_1,
+        PSE12_0, PSE12_1,
+        PSE11_0, PSE11_1,
+        PSE10_0, PSE10_1,
+        PSE9_0,  PSE9_1,
+        PSE8_0,  PSE8_1,
+        PSE7_0,  PSE7_1,
+        PSE6_0,  PSE6_1,
+        PSE5_0,  PSE5_1,
+        PSE4_0,  PSE4_1,
+        PSE3_0,  PSE3_1,
+        PSE2_0,  PSE2_1,
+        PSE1_0,  PSE1_1,
+        PSE0_0,  PSE0_1,
+        PINMUX_FUNCTION_END,
+
+        PINMUX_MARK_BEGIN,
+        /*PTA*/
+        D23_MARK,       KEYOUT2_MARK,           IDED15_MARK,
+        D22_MARK,       KEYOUT1_MARK,           IDED14_MARK,
+        D21_MARK,       KEYOUT0_MARK,           IDED13_MARK,
+        D20_MARK,       KEYIN4_MARK,            IDED12_MARK,
+        D19_MARK,       KEYIN3_MARK,            IDED11_MARK,
+        D18_MARK,       KEYIN2_MARK,            IDED10_MARK,
+        D17_MARK,       KEYIN1_MARK,            IDED9_MARK,
+        D16_MARK,       KEYIN0_MARK,            IDED8_MARK,
+
+        /*PTB*/
+        D31_MARK,       TPUTO1_MARK,            IDEA1_MARK,
+        D30_MARK,       TPUTO0_MARK,            IDEA0_MARK,
+        D29_MARK,                               IODREQ_MARK,
+        D28_MARK,                               IDECS0_MARK,
+        D27_MARK,                               IDECS1_MARK,
+        D26_MARK,       KEYOUT5_IN5_MARK,       IDEIORD_MARK,
+        D25_MARK,       KEYOUT4_IN6_MARK,       IDEIOWR_MARK,
+        D24_MARK,       KEYOUT3_MARK,           IDEINT_MARK,
+
+        /*PTC*/
+        LCDD7_MARK,
+        LCDD6_MARK,
+        LCDD5_MARK,
+        LCDD4_MARK,
+        LCDD3_MARK,
+        LCDD2_MARK,
+        LCDD1_MARK,
+        LCDD0_MARK,
+
+        /*PTD*/
+        LCDD15_MARK,
+        LCDD14_MARK,
+        LCDD13_MARK,
+        LCDD12_MARK,
+        LCDD11_MARK,
+        LCDD10_MARK,
+        LCDD9_MARK,
+        LCDD8_MARK,
+
+        /*PTE*/
+        FSIMCKB_MARK,
+        FSIMCKA_MARK,
+        LCDD21_MARK,    SCIF2_L_TXD_MARK,
+        LCDD20_MARK,    SCIF4_SCK_MARK,
+        LCDD19_MARK,    SCIF4_RXD_MARK,
+        LCDD18_MARK,    SCIF4_TXD_MARK,
+        LCDD17_MARK,
+        LCDD16_MARK,
+
+        /*PTF*/
+        LCDVSYN_MARK,
+        LCDDISP_MARK,   LCDRS_MARK,
+        LCDHSYN_MARK,   LCDCS_MARK,
+        LCDDON_MARK,
+        LCDDCK_MARK,    LCDWR_MARK,
+        LCDVEPWC_MARK,  SCIF0_TXD_MARK,
+        LCDD23_MARK,    SCIF2_L_SCK_MARK,
+        LCDD22_MARK,    SCIF2_L_RXD_MARK,
+
+        /*PTG*/
+        AUDCK_MARK,
+        AUDSYNC_MARK,
+        AUDATA3_MARK,
+        AUDATA2_MARK,
+        AUDATA1_MARK,
+        AUDATA0_MARK,
+
+        /*PTH*/
+        VIO0_VD_MARK,
+        VIO0_CLK_MARK,
+        VIO0_D7_MARK,
+        VIO0_D6_MARK,
+        VIO0_D5_MARK,
+        VIO0_D4_MARK,
+        VIO0_D3_MARK,
+        VIO0_D2_MARK,
+
+        /*PTJ*/
+        PDSTATUS_MARK,
+        STATUS2_MARK,
+        STATUS0_MARK,
+        A25_MARK,               BS_MARK,
+        A24_MARK,
+        A23_MARK,
+        A22_MARK,
+
+        /*PTK*/
+        VIO1_D5_MARK,   VIO0_D13_MARK,  IDED5_MARK,
+        VIO1_D4_MARK,   VIO0_D12_MARK,  IDED4_MARK,
+        VIO1_D3_MARK,   VIO0_D11_MARK,  IDED3_MARK,
+        VIO1_D2_MARK,   VIO0_D10_MARK,  IDED2_MARK,
+        VIO1_D1_MARK,   VIO0_D9_MARK,   IDED1_MARK,
+        VIO1_D0_MARK,   VIO0_D8_MARK,   IDED0_MARK,
+        VIO0_FLD_MARK,
+        VIO0_HD_MARK,
+
+        /*PTL*/
+        DV_D5_MARK,     SCIF3_V_SCK_MARK,       RMII_RXD0_MARK,
+        DV_D4_MARK,     SCIF3_V_RXD_MARK,       RMII_RXD1_MARK,
+        DV_D3_MARK,     SCIF3_V_TXD_MARK,       RMII_REF_CLK_MARK,
+        DV_D2_MARK,     SCIF1_SCK_MARK,         RMII_TX_EN_MARK,
+        DV_D1_MARK,     SCIF1_RXD_MARK,         RMII_TXD0_MARK,
+        DV_D0_MARK,     SCIF1_TXD_MARK,         RMII_TXD1_MARK,
+        DV_D15_MARK,
+        DV_D14_MARK,    MSIOF0_MCK_MARK,
+
+        /*PTM*/
+        DV_D13_MARK,    MSIOF0_TSCK_MARK,
+        DV_D12_MARK,    MSIOF0_RXD_MARK,
+        DV_D11_MARK,    MSIOF0_TXD_MARK,
+        DV_D10_MARK,    MSIOF0_TSYNC_MARK,
+        DV_D9_MARK,     MSIOF0_SS1_MARK,        MSIOF0_RSCK_MARK,
+        DV_D8_MARK,     MSIOF0_SS2_MARK,        MSIOF0_RSYNC_MARK,
+        LCDVCPWC_MARK,  SCIF0_RXD_MARK,
+        LCDRD_MARK,     SCIF0_SCK_MARK,
+
+        /*PTN*/
+        VIO0_D1_MARK,
+        VIO0_D0_MARK,
+        DV_CLKI_MARK,
+        DV_CLK_MARK,    SCIF2_V_SCK_MARK,
+        DV_VSYNC_MARK,  SCIF2_V_RXD_MARK,
+        DV_HSYNC_MARK,  SCIF2_V_TXD_MARK,
+        DV_D7_MARK,     SCIF3_V_CTS_MARK,       RMII_RX_ER_MARK,
+        DV_D6_MARK,     SCIF3_V_RTS_MARK,       RMII_CRS_DV_MARK,
+
+        /*PTQ*/
+        D7_MARK,
+        D6_MARK,
+        D5_MARK,
+        D4_MARK,
+        D3_MARK,
+        D2_MARK,
+        D1_MARK,
+        D0_MARK,
+
+        /*PTR*/
+        CS6B_CE1B_MARK,
+        CS6A_CE2B_MARK,
+        CS5B_CE1A_MARK,
+        CS5A_CE2A_MARK,
+        IOIS16_MARK,            LCDLCLK_MARK,
+        WAIT_MARK,
+        WE3_ICIOWR_MARK,        TPUTO3_MARK,    TPUTI3_MARK,
+        WE2_ICIORD_MARK,        TPUTO2_MARK,    IDEA2_MARK,
+
+        /*PTS*/
+        VIO_CKO_MARK,
+        VIO1_FLD_MARK,  TPUTI2_MARK,            IDEIORDY_MARK,
+        VIO1_HD_MARK,   SCIF5_SCK_MARK,
+        VIO1_VD_MARK,   SCIF5_RXD_MARK,
+        VIO1_CLK_MARK,  SCIF5_TXD_MARK,
+        VIO1_D7_MARK,   VIO0_D15_MARK,          IDED7_MARK,
+        VIO1_D6_MARK,   VIO0_D14_MARK,          IDED6_MARK,
+
+        /*PTT*/
+        D15_MARK,
+        D14_MARK,
+        D13_MARK,
+        D12_MARK,
+        D11_MARK,
+        D10_MARK,
+        D9_MARK,
+        D8_MARK,
+
+        /*PTU*/
+        DMAC_DACK0_MARK,
+        DMAC_DREQ0_MARK,
+        FSIOASD_MARK,
+        FSIIABCK_MARK,
+        FSIIALRCK_MARK,
+        FSIOABCK_MARK,
+        FSIOALRCK_MARK,
+        CLKAUDIOAO_MARK,
+
+        /*PTV*/
+        FSIIBSD_MARK,           MSIOF1_SS2_MARK,        MSIOF1_RSYNC_MARK,
+        FSIOBSD_MARK,           MSIOF1_SS1_MARK,        MSIOF1_RSCK_MARK,
+        FSIIBBCK_MARK,          MSIOF1_RXD_MARK,
+        FSIIBLRCK_MARK,         MSIOF1_TSYNC_MARK,
+        FSIOBBCK_MARK,          MSIOF1_TSCK_MARK,
+        FSIOBLRCK_MARK,         MSIOF1_TXD_MARK,
+        CLKAUDIOBO_MARK,        MSIOF1_MCK_MARK,
+        FSIIASD_MARK,
+
+        /*PTW*/
+        MMC_D7_MARK,            SDHI1CD_MARK,           IODACK_MARK,
+        MMC_D6_MARK,            SDHI1WP_MARK,           IDERST_MARK,
+        MMC_D5_MARK,            SDHI1D3_MARK,           EXBUF_ENB_MARK,
+        MMC_D4_MARK,            SDHI1D2_MARK,           DIRECTION_MARK,
+        MMC_D3_MARK,            SDHI1D1_MARK,
+        MMC_D2_MARK,            SDHI1D0_MARK,
+        MMC_D1_MARK,            SDHI1CMD_MARK,
+        MMC_D0_MARK,            SDHI1CLK_MARK,
+
+        /*PTX*/
+        DMAC_DACK1_MARK,        IRDA_OUT_MARK,
+        DMAC_DREQ1_MARK,        IRDA_IN_MARK,
+        TSIF_TS0_SDAT_MARK,                             LNKSTA_MARK,
+        TSIF_TS0_SCK_MARK,                              MDIO_MARK,
+        TSIF_TS0_SDEN_MARK,                             MDC_MARK,
+        TSIF_TS0_SPSYNC_MARK,
+        MMC_CLK_MARK,
+        MMC_CMD_MARK,
+
+        /*PTY*/
+        SDHI0CD_MARK,
+        SDHI0WP_MARK,
+        SDHI0D3_MARK,
+        SDHI0D2_MARK,
+        SDHI0D1_MARK,
+        SDHI0D0_MARK,
+        SDHI0CMD_MARK,
+        SDHI0CLK_MARK,
+
+        /*PTZ*/
+        INTC_IRQ7_MARK,         SCIF3_I_CTS_MARK,
+        INTC_IRQ6_MARK,         SCIF3_I_RTS_MARK,
+        INTC_IRQ5_MARK,         SCIF3_I_SCK_MARK,
+        INTC_IRQ4_MARK,         SCIF3_I_RXD_MARK,
+        INTC_IRQ3_MARK,         SCIF3_I_TXD_MARK,
+        INTC_IRQ2_MARK,
+        INTC_IRQ1_MARK,
+        INTC_IRQ0_MARK,
+        PINMUX_MARK_END,
+};
+
+static pinmux_enum_t pinmux_data[] = {
+        /* PTA GPIO */
+        PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT, PTA7_IN_PU),
+        PINMUX_DATA(PTA6_DATA, PTA6_IN, PTA6_OUT, PTA6_IN_PU),
+        PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_OUT, PTA5_IN_PU),
+        PINMUX_DATA(PTA4_DATA, PTA4_IN, PTA4_OUT, PTA4_IN_PU),
+        PINMUX_DATA(PTA3_DATA, PTA3_IN, PTA3_OUT, PTA3_IN_PU),
+        PINMUX_DATA(PTA2_DATA, PTA2_IN, PTA2_OUT, PTA2_IN_PU),
+        PINMUX_DATA(PTA1_DATA, PTA1_IN, PTA1_OUT, PTA1_IN_PU),
+        PINMUX_DATA(PTA0_DATA, PTA0_IN, PTA0_OUT, PTA0_IN_PU),
+
+        /* PTB GPIO */
+        PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT, PTB7_IN_PU),
+        PINMUX_DATA(PTB6_DATA, PTB6_IN, PTB6_OUT, PTB6_IN_PU),
+        PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT, PTB5_IN_PU),
+        PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT, PTB4_IN_PU),
+        PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT, PTB3_IN_PU),
+        PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT, PTB2_IN_PU),
+        PINMUX_DATA(PTB1_DATA, PTB1_IN, PTB1_OUT, PTB1_IN_PU),
+        PINMUX_DATA(PTB0_DATA, PTB0_IN, PTB0_OUT, PTB0_IN_PU),
+
+        /* PTC GPIO */
+        PINMUX_DATA(PTC7_DATA, PTC7_IN, PTC7_OUT, PTC7_IN_PU),
+        PINMUX_DATA(PTC6_DATA, PTC6_IN, PTC6_OUT, PTC6_IN_PU),
+        PINMUX_DATA(PTC5_DATA, PTC5_IN, PTC5_OUT, PTC5_IN_PU),
+        PINMUX_DATA(PTC4_DATA, PTC4_IN, PTC4_OUT, PTC4_IN_PU),
+        PINMUX_DATA(PTC3_DATA, PTC3_IN, PTC3_OUT, PTC3_IN_PU),
+        PINMUX_DATA(PTC2_DATA, PTC2_IN, PTC2_OUT, PTC2_IN_PU),
+        PINMUX_DATA(PTC1_DATA, PTC1_IN, PTC1_OUT, PTC1_IN_PU),
+        PINMUX_DATA(PTC0_DATA, PTC0_IN, PTC0_OUT, PTC0_IN_PU),
+
+        /* PTD GPIO */
+        PINMUX_DATA(PTD7_DATA, PTD7_IN, PTD7_OUT, PTD7_IN_PU),
+        PINMUX_DATA(PTD6_DATA, PTD6_IN, PTD6_OUT, PTD6_IN_PU),
+        PINMUX_DATA(PTD5_DATA, PTD5_IN, PTD5_OUT, PTD5_IN_PU),
+        PINMUX_DATA(PTD4_DATA, PTD4_IN, PTD4_OUT, PTD4_IN_PU),
+        PINMUX_DATA(PTD3_DATA, PTD3_IN, PTD3_OUT, PTD3_IN_PU),
+        PINMUX_DATA(PTD2_DATA, PTD2_IN, PTD2_OUT, PTD2_IN_PU),
+        PINMUX_DATA(PTD1_DATA, PTD1_IN, PTD1_OUT, PTD1_IN_PU),
+        PINMUX_DATA(PTD0_DATA, PTD0_IN, PTD0_OUT, PTD0_IN_PU),
+
+        /* PTE GPIO */
+        PINMUX_DATA(PTE7_DATA, PTE7_IN, PTE7_OUT, PTE7_IN_PU),
+        PINMUX_DATA(PTE6_DATA, PTE6_IN, PTE6_OUT, PTE6_IN_PU),
+        PINMUX_DATA(PTE5_DATA, PTE5_IN, PTE5_OUT, PTE5_IN_PU),
+        PINMUX_DATA(PTE4_DATA, PTE4_IN, PTE4_OUT, PTE4_IN_PU),
+        PINMUX_DATA(PTE3_DATA, PTE3_IN, PTE3_OUT, PTE3_IN_PU),
+        PINMUX_DATA(PTE2_DATA, PTE2_IN, PTE2_OUT, PTE2_IN_PU),
+        PINMUX_DATA(PTE1_DATA, PTE1_IN, PTE1_OUT, PTE1_IN_PU),
+        PINMUX_DATA(PTE0_DATA, PTE0_IN, PTE0_OUT, PTE0_IN_PU),
+
+        /* PTF GPIO */
+        PINMUX_DATA(PTF7_DATA, PTF7_IN, PTF7_OUT, PTF7_IN_PU),
+        PINMUX_DATA(PTF6_DATA, PTF6_IN, PTF6_OUT, PTF6_IN_PU),
+        PINMUX_DATA(PTF5_DATA, PTF5_IN, PTF5_OUT, PTF5_IN_PU),
+        PINMUX_DATA(PTF4_DATA, PTF4_IN, PTF4_OUT, PTF4_IN_PU),
+        PINMUX_DATA(PTF3_DATA, PTF3_IN, PTF3_OUT, PTF3_IN_PU),
+        PINMUX_DATA(PTF2_DATA, PTF2_IN, PTF2_OUT, PTF2_IN_PU),
+        PINMUX_DATA(PTF1_DATA, PTF1_IN, PTF1_OUT, PTF1_IN_PU),
+        PINMUX_DATA(PTF0_DATA, PTF0_IN, PTF0_OUT, PTF0_IN_PU),
+
+        /* PTG GPIO */
+        PINMUX_DATA(PTG5_DATA, PTG5_OUT),
+        PINMUX_DATA(PTG4_DATA, PTG4_OUT),
+        PINMUX_DATA(PTG3_DATA, PTG3_OUT),
+        PINMUX_DATA(PTG2_DATA, PTG2_OUT),
+        PINMUX_DATA(PTG1_DATA, PTG1_OUT),
+        PINMUX_DATA(PTG0_DATA, PTG0_OUT),
+
+        /* PTH GPIO */
+        PINMUX_DATA(PTH7_DATA, PTH7_IN, PTH7_OUT, PTH7_IN_PU),
+        PINMUX_DATA(PTH6_DATA, PTH6_IN, PTH6_OUT, PTH6_IN_PU),
+        PINMUX_DATA(PTH5_DATA, PTH5_IN, PTH5_OUT, PTH5_IN_PU),
+        PINMUX_DATA(PTH4_DATA, PTH4_IN, PTH4_OUT, PTH4_IN_PU),
+        PINMUX_DATA(PTH3_DATA, PTH3_IN, PTH3_OUT, PTH3_IN_PU),
+        PINMUX_DATA(PTH2_DATA, PTH2_IN, PTH2_OUT, PTH2_IN_PU),
+        PINMUX_DATA(PTH1_DATA, PTH1_IN, PTH1_OUT, PTH1_IN_PU),
+        PINMUX_DATA(PTH0_DATA, PTH0_IN, PTH0_OUT, PTH0_IN_PU),
+
+        /* PTJ GPIO */
+        PINMUX_DATA(PTJ7_DATA, PTJ7_OUT),
+        PINMUX_DATA(PTJ6_DATA, PTJ6_OUT),
+        PINMUX_DATA(PTJ5_DATA, PTJ5_OUT),
+        PINMUX_DATA(PTJ3_DATA, PTJ3_IN, PTJ3_OUT, PTJ3_IN_PU),
+        PINMUX_DATA(PTJ2_DATA, PTJ2_IN, PTJ2_OUT, PTJ2_IN_PU),
+        PINMUX_DATA(PTJ1_DATA, PTJ1_IN, PTJ1_OUT, PTJ1_IN_PU),
+        PINMUX_DATA(PTJ0_DATA, PTJ0_IN, PTJ0_OUT, PTJ0_IN_PU),
+
+        /* PTK GPIO */
+        PINMUX_DATA(PTK7_DATA, PTK7_IN, PTK7_OUT, PTK7_IN_PU),
+        PINMUX_DATA(PTK6_DATA, PTK6_IN, PTK6_OUT, PTK6_IN_PU),
+        PINMUX_DATA(PTK5_DATA, PTK5_IN, PTK5_OUT, PTK5_IN_PU),
+        PINMUX_DATA(PTK4_DATA, PTK4_IN, PTK4_OUT, PTK4_IN_PU),
+        PINMUX_DATA(PTK3_DATA, PTK3_IN, PTK3_OUT, PTK3_IN_PU),
+        PINMUX_DATA(PTK2_DATA, PTK2_IN, PTK2_OUT, PTK2_IN_PU),
+        PINMUX_DATA(PTK1_DATA, PTK1_IN, PTK1_OUT, PTK1_IN_PU),
+        PINMUX_DATA(PTK0_DATA, PTK0_IN, PTK0_OUT, PTK0_IN_PU),
+
+        /* PTL GPIO */
+        PINMUX_DATA(PTL7_DATA, PTL7_IN, PTL7_OUT, PTL7_IN_PU),
+        PINMUX_DATA(PTL6_DATA, PTL6_IN, PTL6_OUT, PTL6_IN_PU),
+        PINMUX_DATA(PTL5_DATA, PTL5_IN, PTL5_OUT, PTL5_IN_PU),
+        PINMUX_DATA(PTL4_DATA, PTL4_IN, PTL4_OUT, PTL4_IN_PU),
+        PINMUX_DATA(PTL3_DATA, PTL3_IN, PTL3_OUT, PTL3_IN_PU),
+        PINMUX_DATA(PTL2_DATA, PTL2_IN, PTL2_OUT, PTL2_IN_PU),
+        PINMUX_DATA(PTL1_DATA, PTL1_IN, PTL1_OUT, PTL1_IN_PU),
+        PINMUX_DATA(PTL0_DATA, PTL0_IN, PTL0_OUT, PTL0_IN_PU),
+
+        /* PTM GPIO */
+        PINMUX_DATA(PTM7_DATA, PTM7_IN, PTM7_OUT, PTM7_IN_PU),
+        PINMUX_DATA(PTM6_DATA, PTM6_IN, PTM6_OUT, PTM6_IN_PU),
+        PINMUX_DATA(PTM5_DATA, PTM5_IN, PTM5_OUT, PTM5_IN_PU),
+        PINMUX_DATA(PTM4_DATA, PTM4_IN, PTM4_OUT, PTM4_IN_PU),
+        PINMUX_DATA(PTM3_DATA, PTM3_IN, PTM3_OUT, PTM3_IN_PU),
+        PINMUX_DATA(PTM2_DATA, PTM2_IN, PTM2_OUT, PTM2_IN_PU),
+        PINMUX_DATA(PTM1_DATA, PTM1_IN, PTM1_OUT, PTM1_IN_PU),
+        PINMUX_DATA(PTM0_DATA, PTM0_IN, PTM0_OUT, PTM0_IN_PU),
+
+        /* PTN GPIO */
+        PINMUX_DATA(PTN7_DATA, PTN7_IN, PTN7_OUT, PTN7_IN_PU),
+        PINMUX_DATA(PTN6_DATA, PTN6_IN, PTN6_OUT, PTN6_IN_PU),
+        PINMUX_DATA(PTN5_DATA, PTN5_IN, PTN5_OUT, PTN5_IN_PU),
+        PINMUX_DATA(PTN4_DATA, PTN4_IN, PTN4_OUT, PTN4_IN_PU),
+        PINMUX_DATA(PTN3_DATA, PTN3_IN, PTN3_OUT, PTN3_IN_PU),
+        PINMUX_DATA(PTN2_DATA, PTN2_IN, PTN2_OUT, PTN2_IN_PU),
+        PINMUX_DATA(PTN1_DATA, PTN1_IN, PTN1_OUT, PTN1_IN_PU),
+        PINMUX_DATA(PTN0_DATA, PTN0_IN, PTN0_OUT, PTN0_IN_PU),
+
+        /* PTQ GPIO */
+        PINMUX_DATA(PTQ7_DATA, PTQ7_IN, PTQ7_OUT, PTQ7_IN_PU),
+        PINMUX_DATA(PTQ6_DATA, PTQ6_IN, PTQ6_OUT, PTQ6_IN_PU),
+        PINMUX_DATA(PTQ5_DATA, PTQ5_IN, PTQ5_OUT, PTQ5_IN_PU),
+        PINMUX_DATA(PTQ4_DATA, PTQ4_IN, PTQ4_OUT, PTQ4_IN_PU),
+        PINMUX_DATA(PTQ3_DATA, PTQ3_IN, PTQ3_OUT, PTQ3_IN_PU),
+        PINMUX_DATA(PTQ2_DATA, PTQ2_IN, PTQ2_OUT, PTQ2_IN_PU),
+        PINMUX_DATA(PTQ1_DATA, PTQ1_IN, PTQ1_OUT, PTQ1_IN_PU),
+        PINMUX_DATA(PTQ0_DATA, PTQ0_IN, PTQ0_OUT, PTQ0_IN_PU),
+
+        /* PTR GPIO */
+        PINMUX_DATA(PTR7_DATA, PTR7_IN, PTR7_OUT, PTR7_IN_PU),
+        PINMUX_DATA(PTR6_DATA, PTR6_IN, PTR6_OUT, PTR6_IN_PU),
+        PINMUX_DATA(PTR5_DATA, PTR5_IN, PTR5_OUT, PTR5_IN_PU),
+        PINMUX_DATA(PTR4_DATA, PTR4_IN, PTR4_OUT, PTR4_IN_PU),
+        PINMUX_DATA(PTR3_DATA, PTR3_IN,           PTR3_IN_PU),
+        PINMUX_DATA(PTR2_DATA, PTR2_IN,           PTR2_IN_PU),
+        PINMUX_DATA(PTR1_DATA, PTR1_IN, PTR1_OUT, PTR1_IN_PU),
+        PINMUX_DATA(PTR0_DATA, PTR0_IN, PTR0_OUT, PTR0_IN_PU),
+
+        /* PTS GPIO */
+        PINMUX_DATA(PTS6_DATA, PTS6_IN, PTS6_OUT, PTS6_IN_PU),
+        PINMUX_DATA(PTS5_DATA, PTS5_IN, PTS5_OUT, PTS5_IN_PU),
+        PINMUX_DATA(PTS4_DATA, PTS4_IN, PTS4_OUT, PTS4_IN_PU),
+        PINMUX_DATA(PTS3_DATA, PTS3_IN, PTS3_OUT, PTS3_IN_PU),
+        PINMUX_DATA(PTS2_DATA, PTS2_IN, PTS2_OUT, PTS2_IN_PU),
+        PINMUX_DATA(PTS1_DATA, PTS1_IN, PTS1_OUT, PTS1_IN_PU),
+        PINMUX_DATA(PTS0_DATA, PTS0_IN, PTS0_OUT, PTS0_IN_PU),
+
+        /* PTT GPIO */
+        PINMUX_DATA(PTT7_DATA, PTT7_IN, PTT7_OUT, PTT7_IN_PU),
+        PINMUX_DATA(PTT6_DATA, PTT6_IN, PTT6_OUT, PTT6_IN_PU),
+        PINMUX_DATA(PTT5_DATA, PTT5_IN, PTT5_OUT, PTT5_IN_PU),
+        PINMUX_DATA(PTT4_DATA, PTT4_IN, PTT4_OUT, PTT4_IN_PU),
+        PINMUX_DATA(PTT3_DATA, PTT3_IN, PTT3_OUT, PTT3_IN_PU),
+        PINMUX_DATA(PTT2_DATA, PTT2_IN, PTT2_OUT, PTT2_IN_PU),
+        PINMUX_DATA(PTT1_DATA, PTT1_IN, PTT1_OUT, PTT1_IN_PU),
+        PINMUX_DATA(PTT0_DATA, PTT0_IN, PTT0_OUT, PTT0_IN_PU),
+
+        /* PTU GPIO */
+        PINMUX_DATA(PTU7_DATA, PTU7_IN, PTU7_OUT, PTU7_IN_PU),
+        PINMUX_DATA(PTU6_DATA, PTU6_IN, PTU6_OUT, PTU6_IN_PU),
+        PINMUX_DATA(PTU5_DATA, PTU5_IN, PTU5_OUT, PTU5_IN_PU),
+        PINMUX_DATA(PTU4_DATA, PTU4_IN, PTU4_OUT, PTU4_IN_PU),
+        PINMUX_DATA(PTU3_DATA, PTU3_IN, PTU3_OUT, PTU3_IN_PU),
+        PINMUX_DATA(PTU2_DATA, PTU2_IN, PTU2_OUT, PTU2_IN_PU),
+        PINMUX_DATA(PTU1_DATA, PTU1_IN, PTU1_OUT, PTU1_IN_PU),
+        PINMUX_DATA(PTU0_DATA, PTU0_IN, PTU0_OUT, PTU0_IN_PU),
+
+        /* PTV GPIO */
+        PINMUX_DATA(PTV7_DATA, PTV7_IN, PTV7_OUT, PTV7_IN_PU),
+        PINMUX_DATA(PTV6_DATA, PTV6_IN, PTV6_OUT, PTV6_IN_PU),
+        PINMUX_DATA(PTV5_DATA, PTV5_IN, PTV5_OUT, PTV5_IN_PU),
+        PINMUX_DATA(PTV4_DATA, PTV4_IN, PTV4_OUT, PTV4_IN_PU),
+        PINMUX_DATA(PTV3_DATA, PTV3_IN, PTV3_OUT, PTV3_IN_PU),
+        PINMUX_DATA(PTV2_DATA, PTV2_IN, PTV2_OUT, PTV2_IN_PU),
+        PINMUX_DATA(PTV1_DATA, PTV1_IN, PTV1_OUT, PTV1_IN_PU),
+        PINMUX_DATA(PTV0_DATA, PTV0_IN, PTV0_OUT, PTV0_IN_PU),
+
+        /* PTW GPIO */
+        PINMUX_DATA(PTW7_DATA, PTW7_IN, PTW7_OUT, PTW7_IN_PU),
+        PINMUX_DATA(PTW6_DATA, PTW6_IN, PTW6_OUT, PTW6_IN_PU),
+        PINMUX_DATA(PTW5_DATA, PTW5_IN, PTW5_OUT, PTW5_IN_PU),
+        PINMUX_DATA(PTW4_DATA, PTW4_IN, PTW4_OUT, PTW4_IN_PU),
+        PINMUX_DATA(PTW3_DATA, PTW3_IN, PTW3_OUT, PTW3_IN_PU),
+        PINMUX_DATA(PTW2_DATA, PTW2_IN, PTW2_OUT, PTW2_IN_PU),
+        PINMUX_DATA(PTW1_DATA, PTW1_IN, PTW1_OUT, PTW1_IN_PU),
+        PINMUX_DATA(PTW0_DATA, PTW0_IN, PTW0_OUT, PTW0_IN_PU),
+
+        /* PTX GPIO */
+        PINMUX_DATA(PTX7_DATA, PTX7_IN, PTX7_OUT, PTX7_IN_PU),
+        PINMUX_DATA(PTX6_DATA, PTX6_IN, PTX6_OUT, PTX6_IN_PU),
+        PINMUX_DATA(PTX5_DATA, PTX5_IN, PTX5_OUT, PTX5_IN_PU),
+        PINMUX_DATA(PTX4_DATA, PTX4_IN, PTX4_OUT, PTX4_IN_PU),
+        PINMUX_DATA(PTX3_DATA, PTX3_IN, PTX3_OUT, PTX3_IN_PU),
+        PINMUX_DATA(PTX2_DATA, PTX2_IN, PTX2_OUT, PTX2_IN_PU),
+        PINMUX_DATA(PTX1_DATA, PTX1_IN, PTX1_OUT, PTX1_IN_PU),
+        PINMUX_DATA(PTX0_DATA, PTX0_IN, PTX0_OUT, PTX0_IN_PU),
+
+        /* PTY GPIO */
+        PINMUX_DATA(PTY7_DATA, PTY7_IN, PTY7_OUT, PTY7_IN_PU),
+        PINMUX_DATA(PTY6_DATA, PTY6_IN, PTY6_OUT, PTY6_IN_PU),
+        PINMUX_DATA(PTY5_DATA, PTY5_IN, PTY5_OUT, PTY5_IN_PU),
+        PINMUX_DATA(PTY4_DATA, PTY4_IN, PTY4_OUT, PTY4_IN_PU),
+        PINMUX_DATA(PTY3_DATA, PTY3_IN, PTY3_OUT, PTY3_IN_PU),
+        PINMUX_DATA(PTY2_DATA, PTY2_IN, PTY2_OUT, PTY2_IN_PU),
+        PINMUX_DATA(PTY1_DATA, PTY1_IN, PTY1_OUT, PTY1_IN_PU),
+        PINMUX_DATA(PTY0_DATA, PTY0_IN, PTY0_OUT, PTY0_IN_PU),
+
+        /* PTZ GPIO */
+        PINMUX_DATA(PTZ7_DATA, PTZ7_IN, PTZ7_OUT, PTZ7_IN_PU),
+        PINMUX_DATA(PTZ6_DATA, PTZ6_IN, PTZ6_OUT, PTZ6_IN_PU),
+        PINMUX_DATA(PTZ5_DATA, PTZ5_IN, PTZ5_OUT, PTZ5_IN_PU),
+        PINMUX_DATA(PTZ4_DATA, PTZ4_IN, PTZ4_OUT, PTZ4_IN_PU),
+        PINMUX_DATA(PTZ3_DATA, PTZ3_IN, PTZ3_OUT, PTZ3_IN_PU),
+        PINMUX_DATA(PTZ2_DATA, PTZ2_IN, PTZ2_OUT, PTZ2_IN_PU),
+        PINMUX_DATA(PTZ1_DATA, PTZ1_IN, PTZ1_OUT, PTZ1_IN_PU),
+        PINMUX_DATA(PTZ0_DATA, PTZ0_IN, PTZ0_OUT, PTZ0_IN_PU),
+
+        /* PTA FN */
+        PINMUX_DATA(D23_MARK,   PSA15_0, PSA14_0, PTA7_FN),
+        PINMUX_DATA(D22_MARK,   PSA15_0, PSA14_0, PTA6_FN),
+        PINMUX_DATA(D21_MARK,   PSA15_0, PSA14_0, PTA5_FN),
+        PINMUX_DATA(D20_MARK,   PSA15_0, PSA14_0, PTA4_FN),
+        PINMUX_DATA(D19_MARK,   PSA15_0, PSA14_0, PTA3_FN),
+        PINMUX_DATA(D18_MARK,   PSA15_0, PSA14_0, PTA2_FN),
+        PINMUX_DATA(D17_MARK,   PSA15_0, PSA14_0, PTA1_FN),
+        PINMUX_DATA(D16_MARK,   PSA15_0, PSA14_0, PTA0_FN),
+
+        PINMUX_DATA(KEYOUT2_MARK,       PSA15_0, PSA14_1, PTA7_FN),
+        PINMUX_DATA(KEYOUT1_MARK,       PSA15_0, PSA14_1, PTA6_FN),
+        PINMUX_DATA(KEYOUT0_MARK,       PSA15_0, PSA14_1, PTA5_FN),
+        PINMUX_DATA(KEYIN4_MARK,        PSA15_0, PSA14_1, PTA4_FN),
+        PINMUX_DATA(KEYIN3_MARK,        PSA15_0, PSA14_1, PTA3_FN),
+        PINMUX_DATA(KEYIN2_MARK,        PSA15_0, PSA14_1, PTA2_FN),
+        PINMUX_DATA(KEYIN1_MARK,        PSA15_0, PSA14_1, PTA1_FN),
+        PINMUX_DATA(KEYIN0_MARK,        PSA15_0, PSA14_1, PTA0_FN),
+
+        PINMUX_DATA(IDED15_MARK,        PSA15_1, PSA14_0, PTA7_FN),
+        PINMUX_DATA(IDED14_MARK,        PSA15_1, PSA14_0, PTA6_FN),
+        PINMUX_DATA(IDED13_MARK,        PSA15_1, PSA14_0, PTA5_FN),
+        PINMUX_DATA(IDED12_MARK,        PSA15_1, PSA14_0, PTA4_FN),
+        PINMUX_DATA(IDED11_MARK,        PSA15_1, PSA14_0, PTA3_FN),
+        PINMUX_DATA(IDED10_MARK,        PSA15_1, PSA14_0, PTA2_FN),
+        PINMUX_DATA(IDED9_MARK,         PSA15_1, PSA14_0, PTA1_FN),
+        PINMUX_DATA(IDED8_MARK,         PSA15_1, PSA14_0, PTA0_FN),
+
+        /* PTB FN */
+        PINMUX_DATA(D31_MARK,           PSE15_0, PSE14_0, PTB7_FN),
+        PINMUX_DATA(D30_MARK,           PSE15_0, PSE14_0, PTB6_FN),
+        PINMUX_DATA(D29_MARK,           PSE11_0,          PTB5_FN),
+        PINMUX_DATA(D28_MARK,           PSE11_0,          PTB4_FN),
+        PINMUX_DATA(D27_MARK,           PSE11_0,          PTB3_FN),
+        PINMUX_DATA(D26_MARK,           PSA15_0, PSA14_0, PTB2_FN),
+        PINMUX_DATA(D25_MARK,           PSA15_0, PSA14_0, PTB1_FN),
+        PINMUX_DATA(D24_MARK,           PSA15_0, PSA14_0, PTB0_FN),
+
+        PINMUX_DATA(IDEA1_MARK,         PSE15_1, PSE14_0, PTB7_FN),
+        PINMUX_DATA(IDEA0_MARK,         PSE15_1, PSE14_0, PTB6_FN),
+        PINMUX_DATA(IODREQ_MARK,        PSE11_1,          PTB5_FN),
+        PINMUX_DATA(IDECS0_MARK,        PSE11_1,          PTB4_FN),
+        PINMUX_DATA(IDECS1_MARK,        PSE11_1,          PTB3_FN),
+        PINMUX_DATA(IDEIORD_MARK,       PSA15_1, PSA14_0, PTB2_FN),
+        PINMUX_DATA(IDEIOWR_MARK,       PSA15_1, PSA14_0, PTB1_FN),
+        PINMUX_DATA(IDEINT_MARK,        PSA15_1, PSA14_0, PTB0_FN),
+
+        PINMUX_DATA(TPUTO1_MARK,        PSE15_0, PSE14_1, PTB7_FN),
+        PINMUX_DATA(TPUTO0_MARK,        PSE15_0, PSE14_1, PTB6_FN),
+
+        PINMUX_DATA(KEYOUT5_IN5_MARK,   PSA15_0, PSA14_1, PTB2_FN),
+        PINMUX_DATA(KEYOUT4_IN6_MARK,   PSA15_0, PSA14_1, PTB1_FN),
+        PINMUX_DATA(KEYOUT3_MARK,       PSA15_0, PSA14_1, PTB0_FN),
+
+        /* PTC FN */
+        PINMUX_DATA(LCDD7_MARK, PSD5_0, PTC7_FN),
+        PINMUX_DATA(LCDD6_MARK, PSD5_0, PTC6_FN),
+        PINMUX_DATA(LCDD5_MARK, PSD5_0, PTC5_FN),
+        PINMUX_DATA(LCDD4_MARK, PSD5_0, PTC4_FN),
+        PINMUX_DATA(LCDD3_MARK, PSD5_0, PTC3_FN),
+        PINMUX_DATA(LCDD2_MARK, PSD5_0, PTC2_FN),
+        PINMUX_DATA(LCDD1_MARK, PSD5_0, PTC1_FN),
+        PINMUX_DATA(LCDD0_MARK, PSD5_0, PTC0_FN),
+
+        /* PTD FN */
+        PINMUX_DATA(LCDD15_MARK, PSD5_0, PTD7_FN),
+        PINMUX_DATA(LCDD14_MARK, PSD5_0, PTD6_FN),
+        PINMUX_DATA(LCDD13_MARK, PSD5_0, PTD5_FN),
+        PINMUX_DATA(LCDD12_MARK, PSD5_0, PTD4_FN),
+        PINMUX_DATA(LCDD11_MARK, PSD5_0, PTD3_FN),
+        PINMUX_DATA(LCDD10_MARK, PSD5_0, PTD2_FN),
+        PINMUX_DATA(LCDD9_MARK,  PSD5_0, PTD1_FN),
+        PINMUX_DATA(LCDD8_MARK,  PSD5_0, PTD0_FN),
+
+        /* PTE FN */
+        PINMUX_DATA(FSIMCKB_MARK, PTE7_FN),
+        PINMUX_DATA(FSIMCKA_MARK, PTE6_FN),
+
+        PINMUX_DATA(LCDD21_MARK,        PSC5_0, PSC4_0, PTE5_FN),
+        PINMUX_DATA(LCDD20_MARK,        PSD3_0, PSD2_0, PTE4_FN),
+        PINMUX_DATA(LCDD19_MARK,        PSA3_0, PSA2_0, PTE3_FN),
+        PINMUX_DATA(LCDD18_MARK,        PSA3_0, PSA2_0, PTE2_FN),
+        PINMUX_DATA(LCDD17_MARK,        PSD5_0,         PTE1_FN),
+        PINMUX_DATA(LCDD16_MARK,        PSD5_0,         PTE0_FN),
+
+        PINMUX_DATA(SCIF2_L_TXD_MARK,   PSC5_0, PSC4_1, PTE5_FN),
+        PINMUX_DATA(SCIF4_SCK_MARK,     PSD3_0, PSD2_1, PTE4_FN),
+        PINMUX_DATA(SCIF4_RXD_MARK,     PSA3_0, PSA2_1, PTE3_FN),
+        PINMUX_DATA(SCIF4_TXD_MARK,     PSA3_0, PSA2_1, PTE2_FN),
+
+        /* PTF FN */
+        PINMUX_DATA(LCDVSYN_MARK,       PSD8_0,          PTF7_FN),
+        PINMUX_DATA(LCDDISP_MARK,       PSD10_0, PSD9_0, PTF6_FN),
+        PINMUX_DATA(LCDHSYN_MARK,       PSD10_0, PSD9_0, PTF5_FN),
+        PINMUX_DATA(LCDDON_MARK,        PSD8_0,          PTF4_FN),
+        PINMUX_DATA(LCDDCK_MARK,        PSD10_0, PSD9_0, PTF3_FN),
+        PINMUX_DATA(LCDVEPWC_MARK,      PSA6_0,          PTF2_FN),
+        PINMUX_DATA(LCDD23_MARK,        PSC7_0,  PSC6_0, PTF1_FN),
+        PINMUX_DATA(LCDD22_MARK,        PSC5_0,  PSC4_0, PTF0_FN),
+
+        PINMUX_DATA(LCDRS_MARK,         PSD10_0, PSD9_1, PTF6_FN),
+        PINMUX_DATA(LCDCS_MARK,         PSD10_0, PSD9_1, PTF5_FN),
+        PINMUX_DATA(LCDWR_MARK,         PSD10_0, PSD9_1, PTF3_FN),
+
+        PINMUX_DATA(SCIF0_TXD_MARK,     PSA6_1,          PTF2_FN),
+        PINMUX_DATA(SCIF2_L_SCK_MARK,   PSC7_0,  PSC6_1, PTF1_FN),
+        PINMUX_DATA(SCIF2_L_RXD_MARK,   PSC5_0,  PSC4_1, PTF0_FN),
+
+        /* PTG FN */
+        PINMUX_DATA(AUDCK_MARK,   PTG5_FN),
+        PINMUX_DATA(AUDSYNC_MARK, PTG4_FN),
+        PINMUX_DATA(AUDATA3_MARK, PTG3_FN),
+        PINMUX_DATA(AUDATA2_MARK, PTG2_FN),
+        PINMUX_DATA(AUDATA1_MARK, PTG1_FN),
+        PINMUX_DATA(AUDATA0_MARK, PTG0_FN),
+
+        /* PTH FN */
+        PINMUX_DATA(VIO0_VD_MARK,  PTH7_FN),
+        PINMUX_DATA(VIO0_CLK_MARK, PTH6_FN),
+        PINMUX_DATA(VIO0_D7_MARK,  PTH5_FN),
+        PINMUX_DATA(VIO0_D6_MARK,  PTH4_FN),
+        PINMUX_DATA(VIO0_D5_MARK,  PTH3_FN),
+        PINMUX_DATA(VIO0_D4_MARK,  PTH2_FN),
+        PINMUX_DATA(VIO0_D3_MARK,  PTH1_FN),
+        PINMUX_DATA(VIO0_D2_MARK,  PTH0_FN),
+
+        /* PTJ FN */
+        PINMUX_DATA(PDSTATUS_MARK,      PTJ7_FN),
+        PINMUX_DATA(STATUS2_MARK,       PTJ6_FN),
+        PINMUX_DATA(STATUS0_MARK,       PTJ5_FN),
+        PINMUX_DATA(A25_MARK,           PSA8_0, PTJ3_FN),
+        PINMUX_DATA(BS_MARK,            PSA8_1, PTJ3_FN),
+        PINMUX_DATA(A24_MARK,           PTJ2_FN),
+        PINMUX_DATA(A23_MARK,           PTJ1_FN),
+        PINMUX_DATA(A22_MARK,           PTJ0_FN),
+
+        /* PTK FN */
+        PINMUX_DATA(VIO1_D5_MARK,       PSB7_0, PSB6_0, PTK7_FN),
+        PINMUX_DATA(VIO1_D4_MARK,       PSB7_0, PSB6_0, PTK6_FN),
+        PINMUX_DATA(VIO1_D3_MARK,       PSB7_0, PSB6_0, PTK5_FN),
+        PINMUX_DATA(VIO1_D2_MARK,       PSB7_0, PSB6_0, PTK4_FN),
+        PINMUX_DATA(VIO1_D1_MARK,       PSB7_0, PSB6_0, PTK3_FN),
+        PINMUX_DATA(VIO1_D0_MARK,       PSB7_0, PSB6_0, PTK2_FN),
+
+        PINMUX_DATA(VIO0_D13_MARK,      PSB7_0, PSB6_1, PTK7_FN),
+        PINMUX_DATA(VIO0_D12_MARK,      PSB7_0, PSB6_1, PTK6_FN),
+        PINMUX_DATA(VIO0_D11_MARK,      PSB7_0, PSB6_1, PTK5_FN),
+        PINMUX_DATA(VIO0_D10_MARK,      PSB7_0, PSB6_1, PTK4_FN),
+        PINMUX_DATA(VIO0_D9_MARK,       PSB7_0, PSB6_1, PTK3_FN),
+        PINMUX_DATA(VIO0_D8_MARK,       PSB7_0, PSB6_1, PTK2_FN),
+
+        PINMUX_DATA(IDED5_MARK,         PSB7_1, PSB6_0, PTK7_FN),
+        PINMUX_DATA(IDED4_MARK,         PSB7_1, PSB6_0, PTK6_FN),
+        PINMUX_DATA(IDED3_MARK,         PSB7_1, PSB6_0, PTK5_FN),
+        PINMUX_DATA(IDED2_MARK,         PSB7_1, PSB6_0, PTK4_FN),
+        PINMUX_DATA(IDED1_MARK,         PSB7_1, PSB6_0, PTK3_FN),
+        PINMUX_DATA(IDED0_MARK,         PSB7_1, PSB6_0, PTK2_FN),
+
+        PINMUX_DATA(VIO0_FLD_MARK,      PTK1_FN),
+        PINMUX_DATA(VIO0_HD_MARK,       PTK0_FN),
+
+        /* PTL FN */
+        PINMUX_DATA(DV_D5_MARK,         PSB9_0, PSB8_0, PTL7_FN),
+        PINMUX_DATA(DV_D4_MARK,         PSB9_0, PSB8_0, PTL6_FN),
+        PINMUX_DATA(DV_D3_MARK,         PSE7_0, PSE6_0, PTL5_FN),
+        PINMUX_DATA(DV_D2_MARK,         PSC9_0, PSC8_0, PTL4_FN),
+        PINMUX_DATA(DV_D1_MARK,         PSC9_0, PSC8_0, PTL3_FN),
+        PINMUX_DATA(DV_D0_MARK,         PSC9_0, PSC8_0, PTL2_FN),
+        PINMUX_DATA(DV_D15_MARK,        PSD4_0,         PTL1_FN),
+        PINMUX_DATA(DV_D14_MARK,        PSE5_0, PSE4_0, PTL0_FN),
+
+        PINMUX_DATA(SCIF3_V_SCK_MARK,   PSB9_0, PSB8_1, PTL7_FN),
+        PINMUX_DATA(SCIF3_V_RXD_MARK,   PSB9_0, PSB8_1, PTL6_FN),
+        PINMUX_DATA(SCIF3_V_TXD_MARK,   PSE7_0, PSE6_1, PTL5_FN),
+        PINMUX_DATA(SCIF1_SCK_MARK,     PSC9_0, PSC8_1, PTL4_FN),
+        PINMUX_DATA(SCIF1_RXD_MARK,     PSC9_0, PSC8_1, PTL3_FN),
+        PINMUX_DATA(SCIF1_TXD_MARK,     PSC9_0, PSC8_1, PTL2_FN),
+
+        PINMUX_DATA(RMII_RXD0_MARK,     PSB9_1, PSB8_0, PTL7_FN),
+        PINMUX_DATA(RMII_RXD1_MARK,     PSB9_1, PSB8_0, PTL6_FN),
+        PINMUX_DATA(RMII_REF_CLK_MARK,  PSE7_1, PSE6_0, PTL5_FN),
+        PINMUX_DATA(RMII_TX_EN_MARK,    PSC9_1, PSC8_0, PTL4_FN),
+        PINMUX_DATA(RMII_TXD0_MARK,     PSC9_1, PSC8_0, PTL3_FN),
+        PINMUX_DATA(RMII_TXD1_MARK,     PSC9_1, PSC8_0, PTL2_FN),
+
+        PINMUX_DATA(MSIOF0_MCK_MARK,    PSE5_0, PSE4_1, PTL0_FN),
+
+        /* PTM FN */
+        PINMUX_DATA(DV_D13_MARK,        PSC13_0, PSC12_0, PTM7_FN),
+        PINMUX_DATA(DV_D12_MARK,        PSC13_0, PSC12_0, PTM6_FN),
+        PINMUX_DATA(DV_D11_MARK,        PSC13_0, PSC12_0, PTM5_FN),
+        PINMUX_DATA(DV_D10_MARK,        PSC13_0, PSC12_0, PTM4_FN),
+        PINMUX_DATA(DV_D9_MARK,         PSC11_0, PSC10_0, PTM3_FN),
+        PINMUX_DATA(DV_D8_MARK,         PSC11_0, PSC10_0, PTM2_FN),
+
+        PINMUX_DATA(MSIOF0_TSCK_MARK,   PSC13_0, PSC12_1, PTM7_FN),
+        PINMUX_DATA(MSIOF0_RXD_MARK,    PSC13_0, PSC12_1, PTM6_FN),
+        PINMUX_DATA(MSIOF0_TXD_MARK,    PSC13_0, PSC12_1, PTM5_FN),
+        PINMUX_DATA(MSIOF0_TSYNC_MARK,  PSC13_0, PSC12_1, PTM4_FN),
+        PINMUX_DATA(MSIOF0_SS1_MARK,    PSC11_0, PSC10_1, PTM3_FN),
+        PINMUX_DATA(MSIOF0_RSCK_MARK,   PSC11_1, PSC10_0, PTM3_FN),
+        PINMUX_DATA(MSIOF0_SS2_MARK,    PSC11_0, PSC10_1, PTM2_FN),
+        PINMUX_DATA(MSIOF0_RSYNC_MARK,  PSC11_1, PSC10_0, PTM2_FN),
+
+        PINMUX_DATA(LCDVCPWC_MARK,      PSA6_0, PTM1_FN),
+        PINMUX_DATA(LCDRD_MARK,         PSA7_0, PTM0_FN),
+
+        PINMUX_DATA(SCIF0_RXD_MARK,     PSA6_1, PTM1_FN),
+        PINMUX_DATA(SCIF0_SCK_MARK,     PSA7_1, PTM0_FN),
+
+        /* PTN FN */
+        PINMUX_DATA(VIO0_D1_MARK,       PTN7_FN),
+        PINMUX_DATA(VIO0_D0_MARK,       PTN6_FN),
+
+        PINMUX_DATA(DV_CLKI_MARK,       PSD11_0,          PTN5_FN),
+        PINMUX_DATA(DV_CLK_MARK,        PSD13_0, PSD12_0, PTN4_FN),
+        PINMUX_DATA(DV_VSYNC_MARK,      PSD15_0, PSD14_0, PTN3_FN),
+        PINMUX_DATA(DV_HSYNC_MARK,      PSB5_0,  PSB4_0,  PTN2_FN),
+        PINMUX_DATA(DV_D7_MARK,         PSB3_0,  PSB2_0,  PTN1_FN),
+        PINMUX_DATA(DV_D6_MARK,         PSB1_0,  PSB0_0,  PTN0_FN),
+
+        PINMUX_DATA(SCIF2_V_SCK_MARK,   PSD13_0, PSD12_1, PTN4_FN),
+        PINMUX_DATA(SCIF2_V_RXD_MARK,   PSD15_0, PSD14_1, PTN3_FN),
+        PINMUX_DATA(SCIF2_V_TXD_MARK,   PSB5_0,  PSB4_1,  PTN2_FN),
+        PINMUX_DATA(SCIF3_V_CTS_MARK,   PSB3_0,  PSB2_1,  PTN1_FN),
+        PINMUX_DATA(SCIF3_V_RTS_MARK,   PSB1_0,  PSB0_1,  PTN0_FN),
+
+        PINMUX_DATA(RMII_RX_ER_MARK,    PSB3_1, PSB2_0, PTN1_FN),
+        PINMUX_DATA(RMII_CRS_DV_MARK,   PSB1_1, PSB0_0, PTN0_FN),
+
+        /* PTQ FN */
+        PINMUX_DATA(D7_MARK, PTQ7_FN),
+        PINMUX_DATA(D6_MARK, PTQ6_FN),
+        PINMUX_DATA(D5_MARK, PTQ5_FN),
+        PINMUX_DATA(D4_MARK, PTQ4_FN),
+        PINMUX_DATA(D3_MARK, PTQ3_FN),
+        PINMUX_DATA(D2_MARK, PTQ2_FN),
+        PINMUX_DATA(D1_MARK, PTQ1_FN),
+        PINMUX_DATA(D0_MARK, PTQ0_FN),
+
+        /* PTR FN */
+        PINMUX_DATA(CS6B_CE1B_MARK,                     PTR7_FN),
+        PINMUX_DATA(CS6A_CE2B_MARK,                     PTR6_FN),
+        PINMUX_DATA(CS5B_CE1A_MARK,                     PTR5_FN),
+        PINMUX_DATA(CS5A_CE2A_MARK,                     PTR4_FN),
+        PINMUX_DATA(IOIS16_MARK,        PSA5_0,         PTR3_FN),
+        PINMUX_DATA(WAIT_MARK,                          PTR2_FN),
+        PINMUX_DATA(WE3_ICIOWR_MARK,    PSA1_0, PSA0_0, PTR1_FN),
+        PINMUX_DATA(WE2_ICIORD_MARK,    PSD1_0, PSD0_0, PTR0_FN),
+
+        PINMUX_DATA(LCDLCLK_MARK,       PSA5_1,         PTR3_FN),
+
+        PINMUX_DATA(IDEA2_MARK,         PSD1_1, PSD0_0, PTR0_FN),
+
+        PINMUX_DATA(TPUTO3_MARK,        PSA1_0, PSA0_1, PTR1_FN),
+        PINMUX_DATA(TPUTI3_MARK,        PSA1_1, PSA0_0, PTR1_FN),
+        PINMUX_DATA(TPUTO2_MARK,        PSD1_0, PSD0_1, PTR0_FN),
+
+        /* PTS FN */
+        PINMUX_DATA(VIO_CKO_MARK,       PTS6_FN),
+
+        PINMUX_DATA(TPUTI2_MARK,        PSE9_0, PSE8_1, PTS5_FN),
+
+        PINMUX_DATA(IDEIORDY_MARK,      PSE9_1, PSE8_0, PTS5_FN),
+
+        PINMUX_DATA(VIO1_FLD_MARK,      PSE9_0, PSE8_0, PTS5_FN),
+        PINMUX_DATA(VIO1_HD_MARK,       PSA10_0,        PTS4_FN),
+        PINMUX_DATA(VIO1_VD_MARK,       PSA9_0,         PTS3_FN),
+        PINMUX_DATA(VIO1_CLK_MARK,      PSA9_0,         PTS2_FN),
+        PINMUX_DATA(VIO1_D7_MARK,       PSB7_0, PSB6_0, PTS1_FN),
+        PINMUX_DATA(VIO1_D6_MARK,       PSB7_0, PSB6_0, PTS0_FN),
+
+        PINMUX_DATA(SCIF5_SCK_MARK,     PSA10_1, PTS4_FN),
+        PINMUX_DATA(SCIF5_RXD_MARK,     PSA9_1,  PTS3_FN),
+        PINMUX_DATA(SCIF5_TXD_MARK,     PSA9_1,  PTS2_FN),
+
+        PINMUX_DATA(VIO0_D15_MARK,      PSB7_0, PSB6_1, PTS1_FN),
+        PINMUX_DATA(VIO0_D14_MARK,      PSB7_0, PSB6_1, PTS0_FN),
+
+        PINMUX_DATA(IDED7_MARK,         PSB7_1, PSB6_0, PTS1_FN),
+        PINMUX_DATA(IDED6_MARK,         PSB7_1, PSB6_0, PTS0_FN),
+
+        /* PTT FN */
+        PINMUX_DATA(D15_MARK, PTT7_FN),
+        PINMUX_DATA(D14_MARK, PTT6_FN),
+        PINMUX_DATA(D13_MARK, PTT5_FN),
+        PINMUX_DATA(D12_MARK, PTT4_FN),
+        PINMUX_DATA(D11_MARK, PTT3_FN),
+        PINMUX_DATA(D10_MARK, PTT2_FN),
+        PINMUX_DATA(D9_MARK,  PTT1_FN),
+        PINMUX_DATA(D8_MARK,  PTT0_FN),
+
+        /* PTU FN */
+        PINMUX_DATA(DMAC_DACK0_MARK, PTU7_FN),
+        PINMUX_DATA(DMAC_DREQ0_MARK, PTU6_FN),
+
+        PINMUX_DATA(FSIOASD_MARK,       PSE1_0, PTU5_FN),
+        PINMUX_DATA(FSIIABCK_MARK,      PSE1_0, PTU4_FN),
+        PINMUX_DATA(FSIIALRCK_MARK,     PSE1_0, PTU3_FN),
+        PINMUX_DATA(FSIOABCK_MARK,      PSE1_0, PTU2_FN),
+        PINMUX_DATA(FSIOALRCK_MARK,     PSE1_0, PTU1_FN),
+        PINMUX_DATA(CLKAUDIOAO_MARK,    PSE0_0, PTU0_FN),
+
+        /* PTV FN */
+        PINMUX_DATA(FSIIBSD_MARK,       PSD7_0,  PSD6_0,  PTV7_FN),
+        PINMUX_DATA(FSIOBSD_MARK,       PSD7_0,  PSD6_0,  PTV6_FN),
+        PINMUX_DATA(FSIIBBCK_MARK,      PSC15_0, PSC14_0, PTV5_FN),
+        PINMUX_DATA(FSIIBLRCK_MARK,     PSC15_0, PSC14_0, PTV4_FN),
+        PINMUX_DATA(FSIOBBCK_MARK,      PSC15_0, PSC14_0, PTV3_FN),
+        PINMUX_DATA(FSIOBLRCK_MARK,     PSC15_0, PSC14_0, PTV2_FN),
+        PINMUX_DATA(CLKAUDIOBO_MARK,    PSE3_0,  PSE2_0,  PTV1_FN),
+        PINMUX_DATA(FSIIASD_MARK,       PSE10_0,          PTV0_FN),
+
+        PINMUX_DATA(MSIOF1_SS2_MARK,    PSD7_0,  PSD6_1,  PTV7_FN),
+        PINMUX_DATA(MSIOF1_RSYNC_MARK,  PSD7_1,  PSD6_0,  PTV7_FN),
+        PINMUX_DATA(MSIOF1_SS1_MARK,    PSD7_0,  PSD6_1,  PTV6_FN),
+        PINMUX_DATA(MSIOF1_RSCK_MARK,   PSD7_1,  PSD6_0,  PTV6_FN),
+        PINMUX_DATA(MSIOF1_RXD_MARK,    PSC15_0, PSC14_1, PTV5_FN),
+        PINMUX_DATA(MSIOF1_TSYNC_MARK,  PSC15_0, PSC14_1, PTV4_FN),
+        PINMUX_DATA(MSIOF1_TSCK_MARK,   PSC15_0, PSC14_1, PTV3_FN),
+        PINMUX_DATA(MSIOF1_TXD_MARK,    PSC15_0, PSC14_1, PTV2_FN),
+        PINMUX_DATA(MSIOF1_MCK_MARK,    PSE3_0,  PSE2_1,  PTV1_FN),
+
+        /* PTW FN */
+        PINMUX_DATA(MMC_D7_MARK,        PSE13_0, PSE12_0, PTW7_FN),
+        PINMUX_DATA(MMC_D6_MARK,        PSE13_0, PSE12_0, PTW6_FN),
+        PINMUX_DATA(MMC_D5_MARK,        PSE13_0, PSE12_0, PTW5_FN),
+        PINMUX_DATA(MMC_D4_MARK,        PSE13_0, PSE12_0, PTW4_FN),
+        PINMUX_DATA(MMC_D3_MARK,        PSA13_0,          PTW3_FN),
+        PINMUX_DATA(MMC_D2_MARK,        PSA13_0,          PTW2_FN),
+        PINMUX_DATA(MMC_D1_MARK,        PSA13_0,          PTW1_FN),
+        PINMUX_DATA(MMC_D0_MARK,        PSA13_0,          PTW0_FN),
+
+        PINMUX_DATA(SDHI1CD_MARK,       PSE13_0, PSE12_1, PTW7_FN),
+        PINMUX_DATA(SDHI1WP_MARK,       PSE13_0, PSE12_1, PTW6_FN),
+        PINMUX_DATA(SDHI1D3_MARK,       PSE13_0, PSE12_1, PTW5_FN),
+        PINMUX_DATA(SDHI1D2_MARK,       PSE13_0, PSE12_1, PTW4_FN),
+        PINMUX_DATA(SDHI1D1_MARK,       PSA13_1,          PTW3_FN),
+        PINMUX_DATA(SDHI1D0_MARK,       PSA13_1,          PTW2_FN),
+        PINMUX_DATA(SDHI1CMD_MARK,      PSA13_1,          PTW1_FN),
+        PINMUX_DATA(SDHI1CLK_MARK,      PSA13_1,          PTW0_FN),
+
+        PINMUX_DATA(IODACK_MARK,        PSE13_1, PSE12_0, PTW7_FN),
+        PINMUX_DATA(IDERST_MARK,        PSE13_1, PSE12_0, PTW6_FN),
+        PINMUX_DATA(EXBUF_ENB_MARK,     PSE13_1, PSE12_0, PTW5_FN),
+        PINMUX_DATA(DIRECTION_MARK,     PSE13_1, PSE12_0, PTW4_FN),
+
+        /* PTX FN */
+        PINMUX_DATA(DMAC_DACK1_MARK,    PSA12_0, PTX7_FN),
+        PINMUX_DATA(DMAC_DREQ1_MARK,    PSA12_0, PTX6_FN),
+
+        PINMUX_DATA(IRDA_OUT_MARK,      PSA12_1, PTX7_FN),
+        PINMUX_DATA(IRDA_IN_MARK,       PSA12_1, PTX6_FN),
+
+        PINMUX_DATA(TSIF_TS0_SDAT_MARK, PSC0_0, PTX5_FN),
+        PINMUX_DATA(TSIF_TS0_SCK_MARK,  PSC1_0, PTX4_FN),
+        PINMUX_DATA(TSIF_TS0_SDEN_MARK, PSC2_0, PTX3_FN),
+        PINMUX_DATA(TSIF_TS0_SPSYNC_MARK,       PTX2_FN),
+
+        PINMUX_DATA(LNKSTA_MARK,        PSC0_1, PTX5_FN),
+        PINMUX_DATA(MDIO_MARK,          PSC1_1, PTX4_FN),
+        PINMUX_DATA(MDC_MARK,           PSC2_1, PTX3_FN),
+
+        PINMUX_DATA(MMC_CLK_MARK, PTX1_FN),
+        PINMUX_DATA(MMC_CMD_MARK, PTX0_FN),
+
+        /* PTY FN */
+        PINMUX_DATA(SDHI0CD_MARK,  PTY7_FN),
+        PINMUX_DATA(SDHI0WP_MARK,  PTY6_FN),
+        PINMUX_DATA(SDHI0D3_MARK,  PTY5_FN),
+        PINMUX_DATA(SDHI0D2_MARK,  PTY4_FN),
+        PINMUX_DATA(SDHI0D1_MARK,  PTY3_FN),
+        PINMUX_DATA(SDHI0D0_MARK,  PTY2_FN),
+        PINMUX_DATA(SDHI0CMD_MARK, PTY1_FN),
+        PINMUX_DATA(SDHI0CLK_MARK, PTY0_FN),
+
+        /* PTZ FN */
+        PINMUX_DATA(INTC_IRQ7_MARK,     PSB10_0, PTZ7_FN),
+        PINMUX_DATA(INTC_IRQ6_MARK,     PSB11_0, PTZ6_FN),
+        PINMUX_DATA(INTC_IRQ5_MARK,     PSB12_0, PTZ5_FN),
+        PINMUX_DATA(INTC_IRQ4_MARK,     PSB13_0, PTZ4_FN),
+        PINMUX_DATA(INTC_IRQ3_MARK,     PSB14_0, PTZ3_FN),
+        PINMUX_DATA(INTC_IRQ2_MARK,              PTZ2_FN),
+        PINMUX_DATA(INTC_IRQ1_MARK,              PTZ1_FN),
+        PINMUX_DATA(INTC_IRQ0_MARK,              PTZ0_FN),
+
+        PINMUX_DATA(SCIF3_I_CTS_MARK,   PSB10_1, PTZ7_FN),
+        PINMUX_DATA(SCIF3_I_RTS_MARK,   PSB11_1, PTZ6_FN),
+        PINMUX_DATA(SCIF3_I_SCK_MARK,   PSB12_1, PTZ5_FN),
+        PINMUX_DATA(SCIF3_I_RXD_MARK,   PSB13_1, PTZ4_FN),
+        PINMUX_DATA(SCIF3_I_TXD_MARK,   PSB14_1, PTZ3_FN),
+};
+
+static struct pinmux_gpio pinmux_gpios[] = {
+        /* PTA */
+        PINMUX_GPIO(GPIO_PTA7, PTA7_DATA),
+        PINMUX_GPIO(GPIO_PTA6, PTA6_DATA),
+        PINMUX_GPIO(GPIO_PTA5, PTA5_DATA),
+        PINMUX_GPIO(GPIO_PTA4, PTA4_DATA),
+        PINMUX_GPIO(GPIO_PTA3, PTA3_DATA),
+        PINMUX_GPIO(GPIO_PTA2, PTA2_DATA),
+        PINMUX_GPIO(GPIO_PTA1, PTA1_DATA),
+        PINMUX_GPIO(GPIO_PTA0, PTA0_DATA),
+
+        /* PTB */
+        PINMUX_GPIO(GPIO_PTB7, PTB7_DATA),
+        PINMUX_GPIO(GPIO_PTB6, PTB6_DATA),
+        PINMUX_GPIO(GPIO_PTB5, PTB5_DATA),
+        PINMUX_GPIO(GPIO_PTB4, PTB4_DATA),
+        PINMUX_GPIO(GPIO_PTB3, PTB3_DATA),
+        PINMUX_GPIO(GPIO_PTB2, PTB2_DATA),
+        PINMUX_GPIO(GPIO_PTB1, PTB1_DATA),
+        PINMUX_GPIO(GPIO_PTB0, PTB0_DATA),
+
+        /* PTC */
+        PINMUX_GPIO(GPIO_PTC7, PTC7_DATA),
+        PINMUX_GPIO(GPIO_PTC6, PTC6_DATA),
+        PINMUX_GPIO(GPIO_PTC5, PTC5_DATA),
+        PINMUX_GPIO(GPIO_PTC4, PTC4_DATA),
+        PINMUX_GPIO(GPIO_PTC3, PTC3_DATA),
+        PINMUX_GPIO(GPIO_PTC2, PTC2_DATA),
+        PINMUX_GPIO(GPIO_PTC1, PTC1_DATA),
+        PINMUX_GPIO(GPIO_PTC0, PTC0_DATA),
+
+        /* PTD */
+        PINMUX_GPIO(GPIO_PTD7, PTD7_DATA),
+        PINMUX_GPIO(GPIO_PTD6, PTD6_DATA),
+        PINMUX_GPIO(GPIO_PTD5, PTD5_DATA),
+        PINMUX_GPIO(GPIO_PTD4, PTD4_DATA),
+        PINMUX_GPIO(GPIO_PTD3, PTD3_DATA),
+        PINMUX_GPIO(GPIO_PTD2, PTD2_DATA),
+        PINMUX_GPIO(GPIO_PTD1, PTD1_DATA),
+        PINMUX_GPIO(GPIO_PTD0, PTD0_DATA),
+
+        /* PTE */
+        PINMUX_GPIO(GPIO_PTE7, PTE7_DATA),
+        PINMUX_GPIO(GPIO_PTE6, PTE6_DATA),
+        PINMUX_GPIO(GPIO_PTE5, PTE5_DATA),
+        PINMUX_GPIO(GPIO_PTE4, PTE4_DATA),
+        PINMUX_GPIO(GPIO_PTE3, PTE3_DATA),
+        PINMUX_GPIO(GPIO_PTE2, PTE2_DATA),
+        PINMUX_GPIO(GPIO_PTE1, PTE1_DATA),
+        PINMUX_GPIO(GPIO_PTE0, PTE0_DATA),
+
+        /* PTF */
+        PINMUX_GPIO(GPIO_PTF7, PTF7_DATA),
+        PINMUX_GPIO(GPIO_PTF6, PTF6_DATA),
+        PINMUX_GPIO(GPIO_PTF5, PTF5_DATA),
+        PINMUX_GPIO(GPIO_PTF4, PTF4_DATA),
+        PINMUX_GPIO(GPIO_PTF3, PTF3_DATA),
+        PINMUX_GPIO(GPIO_PTF2, PTF2_DATA),
+        PINMUX_GPIO(GPIO_PTF1, PTF1_DATA),
+        PINMUX_GPIO(GPIO_PTF0, PTF0_DATA),
+
+        /* PTG */
+        PINMUX_GPIO(GPIO_PTG5, PTG5_DATA),
+        PINMUX_GPIO(GPIO_PTG4, PTG4_DATA),
+        PINMUX_GPIO(GPIO_PTG3, PTG3_DATA),
+        PINMUX_GPIO(GPIO_PTG2, PTG2_DATA),
+        PINMUX_GPIO(GPIO_PTG1, PTG1_DATA),
+        PINMUX_GPIO(GPIO_PTG0, PTG0_DATA),
+
+        /* PTH */
+        PINMUX_GPIO(GPIO_PTH7, PTH7_DATA),
+        PINMUX_GPIO(GPIO_PTH6, PTH6_DATA),
+        PINMUX_GPIO(GPIO_PTH5, PTH5_DATA),
+        PINMUX_GPIO(GPIO_PTH4, PTH4_DATA),
+        PINMUX_GPIO(GPIO_PTH3, PTH3_DATA),
+        PINMUX_GPIO(GPIO_PTH2, PTH2_DATA),
+        PINMUX_GPIO(GPIO_PTH1, PTH1_DATA),
+        PINMUX_GPIO(GPIO_PTH0, PTH0_DATA),
+
+        /* PTJ */
+        PINMUX_GPIO(GPIO_PTJ7, PTJ7_DATA),
+        PINMUX_GPIO(GPIO_PTJ6, PTJ6_DATA),
+        PINMUX_GPIO(GPIO_PTJ5, PTJ5_DATA),
+        PINMUX_GPIO(GPIO_PTJ3, PTJ3_DATA),
+        PINMUX_GPIO(GPIO_PTJ2, PTJ2_DATA),
+        PINMUX_GPIO(GPIO_PTJ1, PTJ1_DATA),
+        PINMUX_GPIO(GPIO_PTJ0, PTJ0_DATA),
+
+        /* PTK */
+        PINMUX_GPIO(GPIO_PTK7, PTK7_DATA),
+        PINMUX_GPIO(GPIO_PTK6, PTK6_DATA),
+        PINMUX_GPIO(GPIO_PTK5, PTK5_DATA),
+        PINMUX_GPIO(GPIO_PTK4, PTK4_DATA),
+        PINMUX_GPIO(GPIO_PTK3, PTK3_DATA),
+        PINMUX_GPIO(GPIO_PTK2, PTK2_DATA),
+        PINMUX_GPIO(GPIO_PTK1, PTK1_DATA),
+        PINMUX_GPIO(GPIO_PTK0, PTK0_DATA),
+
+        /* PTL */
+        PINMUX_GPIO(GPIO_PTL7, PTL7_DATA),
+        PINMUX_GPIO(GPIO_PTL6, PTL6_DATA),
+        PINMUX_GPIO(GPIO_PTL5, PTL5_DATA),
+        PINMUX_GPIO(GPIO_PTL4, PTL4_DATA),
+        PINMUX_GPIO(GPIO_PTL3, PTL3_DATA),
+        PINMUX_GPIO(GPIO_PTL2, PTL2_DATA),
+        PINMUX_GPIO(GPIO_PTL1, PTL1_DATA),
+        PINMUX_GPIO(GPIO_PTL0, PTL0_DATA),
+
+        /* PTM */
+        PINMUX_GPIO(GPIO_PTM7, PTM7_DATA),
+        PINMUX_GPIO(GPIO_PTM6, PTM6_DATA),
+        PINMUX_GPIO(GPIO_PTM5, PTM5_DATA),
+        PINMUX_GPIO(GPIO_PTM4, PTM4_DATA),
+        PINMUX_GPIO(GPIO_PTM3, PTM3_DATA),
+        PINMUX_GPIO(GPIO_PTM2, PTM2_DATA),
+        PINMUX_GPIO(GPIO_PTM1, PTM1_DATA),
+        PINMUX_GPIO(GPIO_PTM0, PTM0_DATA),
+
+        /* PTN */
+        PINMUX_GPIO(GPIO_PTN7, PTN7_DATA),
+        PINMUX_GPIO(GPIO_PTN6, PTN6_DATA),
+        PINMUX_GPIO(GPIO_PTN5, PTN5_DATA),
+        PINMUX_GPIO(GPIO_PTN4, PTN4_DATA),
+        PINMUX_GPIO(GPIO_PTN3, PTN3_DATA),
+        PINMUX_GPIO(GPIO_PTN2, PTN2_DATA),
+        PINMUX_GPIO(GPIO_PTN1, PTN1_DATA),
+        PINMUX_GPIO(GPIO_PTN0, PTN0_DATA),
+
+        /* PTQ */
+        PINMUX_GPIO(GPIO_PTQ7, PTQ7_DATA),
+        PINMUX_GPIO(GPIO_PTQ6, PTQ6_DATA),
+        PINMUX_GPIO(GPIO_PTQ5, PTQ5_DATA),
+        PINMUX_GPIO(GPIO_PTQ4, PTQ4_DATA),
+        PINMUX_GPIO(GPIO_PTQ3, PTQ3_DATA),
+        PINMUX_GPIO(GPIO_PTQ2, PTQ2_DATA),
+        PINMUX_GPIO(GPIO_PTQ1, PTQ1_DATA),
+        PINMUX_GPIO(GPIO_PTQ0, PTQ0_DATA),
+
+        /* PTR */
+        PINMUX_GPIO(GPIO_PTR7, PTR7_DATA),
+        PINMUX_GPIO(GPIO_PTR6, PTR6_DATA),
+        PINMUX_GPIO(GPIO_PTR5, PTR5_DATA),
+        PINMUX_GPIO(GPIO_PTR4, PTR4_DATA),
+        PINMUX_GPIO(GPIO_PTR3, PTR3_DATA),
+        PINMUX_GPIO(GPIO_PTR2, PTR2_DATA),
+        PINMUX_GPIO(GPIO_PTR1, PTR1_DATA),
+        PINMUX_GPIO(GPIO_PTR0, PTR0_DATA),
+
+        /* PTS */
+        PINMUX_GPIO(GPIO_PTS6, PTS6_DATA),
+        PINMUX_GPIO(GPIO_PTS5, PTS5_DATA),
+        PINMUX_GPIO(GPIO_PTS4, PTS4_DATA),
+        PINMUX_GPIO(GPIO_PTS3, PTS3_DATA),
+        PINMUX_GPIO(GPIO_PTS2, PTS2_DATA),
+        PINMUX_GPIO(GPIO_PTS1, PTS1_DATA),
+        PINMUX_GPIO(GPIO_PTS0, PTS0_DATA),
+
+        /* PTT */
+        PINMUX_GPIO(GPIO_PTT7, PTT7_DATA),
+        PINMUX_GPIO(GPIO_PTT6, PTT6_DATA),
+        PINMUX_GPIO(GPIO_PTT5, PTT5_DATA),
+        PINMUX_GPIO(GPIO_PTT4, PTT4_DATA),
+        PINMUX_GPIO(GPIO_PTT3, PTT3_DATA),
+        PINMUX_GPIO(GPIO_PTT2, PTT2_DATA),
+        PINMUX_GPIO(GPIO_PTT1, PTT1_DATA),
+        PINMUX_GPIO(GPIO_PTT0, PTT0_DATA),
+
+        /* PTU */
+        PINMUX_GPIO(GPIO_PTU7, PTU7_DATA),
+        PINMUX_GPIO(GPIO_PTU6, PTU6_DATA),
+        PINMUX_GPIO(GPIO_PTU5, PTU5_DATA),
+        PINMUX_GPIO(GPIO_PTU4, PTU4_DATA),
+        PINMUX_GPIO(GPIO_PTU3, PTU3_DATA),
+        PINMUX_GPIO(GPIO_PTU2, PTU2_DATA),
+        PINMUX_GPIO(GPIO_PTU1, PTU1_DATA),
+        PINMUX_GPIO(GPIO_PTU0, PTU0_DATA),
+
+        /* PTV */
+        PINMUX_GPIO(GPIO_PTV7, PTV7_DATA),
+        PINMUX_GPIO(GPIO_PTV6, PTV6_DATA),
+        PINMUX_GPIO(GPIO_PTV5, PTV5_DATA),
+        PINMUX_GPIO(GPIO_PTV4, PTV4_DATA),
+        PINMUX_GPIO(GPIO_PTV3, PTV3_DATA),
+        PINMUX_GPIO(GPIO_PTV2, PTV2_DATA),
+        PINMUX_GPIO(GPIO_PTV1, PTV1_DATA),
+        PINMUX_GPIO(GPIO_PTV0, PTV0_DATA),
+
+        /* PTW */
+        PINMUX_GPIO(GPIO_PTW7, PTW7_DATA),
+        PINMUX_GPIO(GPIO_PTW6, PTW6_DATA),
+        PINMUX_GPIO(GPIO_PTW5, PTW5_DATA),
+        PINMUX_GPIO(GPIO_PTW4, PTW4_DATA),
+        PINMUX_GPIO(GPIO_PTW3, PTW3_DATA),
+        PINMUX_GPIO(GPIO_PTW2, PTW2_DATA),
+        PINMUX_GPIO(GPIO_PTW1, PTW1_DATA),
+        PINMUX_GPIO(GPIO_PTW0, PTW0_DATA),
+
+        /* PTX */
+        PINMUX_GPIO(GPIO_PTX7, PTX7_DATA),
+        PINMUX_GPIO(GPIO_PTX6, PTX6_DATA),
+        PINMUX_GPIO(GPIO_PTX5, PTX5_DATA),
+        PINMUX_GPIO(GPIO_PTX4, PTX4_DATA),
+        PINMUX_GPIO(GPIO_PTX3, PTX3_DATA),
+        PINMUX_GPIO(GPIO_PTX2, PTX2_DATA),
+        PINMUX_GPIO(GPIO_PTX1, PTX1_DATA),
+        PINMUX_GPIO(GPIO_PTX0, PTX0_DATA),
+
+        /* PTY */
+        PINMUX_GPIO(GPIO_PTY7, PTY7_DATA),
+        PINMUX_GPIO(GPIO_PTY6, PTY6_DATA),
+        PINMUX_GPIO(GPIO_PTY5, PTY5_DATA),
+        PINMUX_GPIO(GPIO_PTY4, PTY4_DATA),
+        PINMUX_GPIO(GPIO_PTY3, PTY3_DATA),
+        PINMUX_GPIO(GPIO_PTY2, PTY2_DATA),
+        PINMUX_GPIO(GPIO_PTY1, PTY1_DATA),
+        PINMUX_GPIO(GPIO_PTY0, PTY0_DATA),
+
+        /* PTZ */
+        PINMUX_GPIO(GPIO_PTZ7, PTZ7_DATA),
+        PINMUX_GPIO(GPIO_PTZ6, PTZ6_DATA),
+        PINMUX_GPIO(GPIO_PTZ5, PTZ5_DATA),
+        PINMUX_GPIO(GPIO_PTZ4, PTZ4_DATA),
+        PINMUX_GPIO(GPIO_PTZ3, PTZ3_DATA),
+        PINMUX_GPIO(GPIO_PTZ2, PTZ2_DATA),
+        PINMUX_GPIO(GPIO_PTZ1, PTZ1_DATA),
+        PINMUX_GPIO(GPIO_PTZ0, PTZ0_DATA),
+
+        /* BSC */
+        PINMUX_GPIO(GPIO_FN_D31,        D31_MARK),
+        PINMUX_GPIO(GPIO_FN_D30,        D30_MARK),
+        PINMUX_GPIO(GPIO_FN_D29,        D29_MARK),
+        PINMUX_GPIO(GPIO_FN_D28,        D28_MARK),
+        PINMUX_GPIO(GPIO_FN_D27,        D27_MARK),
+        PINMUX_GPIO(GPIO_FN_D26,        D26_MARK),
+        PINMUX_GPIO(GPIO_FN_D25,        D25_MARK),
+        PINMUX_GPIO(GPIO_FN_D24,        D24_MARK),
+        PINMUX_GPIO(GPIO_FN_D23,        D23_MARK),
+        PINMUX_GPIO(GPIO_FN_D22,        D22_MARK),
+        PINMUX_GPIO(GPIO_FN_D21,        D21_MARK),
+        PINMUX_GPIO(GPIO_FN_D20,        D20_MARK),
+        PINMUX_GPIO(GPIO_FN_D19,        D19_MARK),
+        PINMUX_GPIO(GPIO_FN_D18,        D18_MARK),
+        PINMUX_GPIO(GPIO_FN_D17,        D17_MARK),
+        PINMUX_GPIO(GPIO_FN_D16,        D16_MARK),
+        PINMUX_GPIO(GPIO_FN_D15,        D15_MARK),
+        PINMUX_GPIO(GPIO_FN_D14,        D14_MARK),
+        PINMUX_GPIO(GPIO_FN_D13,        D13_MARK),
+        PINMUX_GPIO(GPIO_FN_D12,        D12_MARK),
+        PINMUX_GPIO(GPIO_FN_D11,        D11_MARK),
+        PINMUX_GPIO(GPIO_FN_D10,        D10_MARK),
+        PINMUX_GPIO(GPIO_FN_D9,         D9_MARK),
+        PINMUX_GPIO(GPIO_FN_D8,         D8_MARK),
+        PINMUX_GPIO(GPIO_FN_D7,         D7_MARK),
+        PINMUX_GPIO(GPIO_FN_D6,         D6_MARK),
+        PINMUX_GPIO(GPIO_FN_D5,         D5_MARK),
+        PINMUX_GPIO(GPIO_FN_D4,         D4_MARK),
+        PINMUX_GPIO(GPIO_FN_D3,         D3_MARK),
+        PINMUX_GPIO(GPIO_FN_D2,         D2_MARK),
+        PINMUX_GPIO(GPIO_FN_D1,         D1_MARK),
+        PINMUX_GPIO(GPIO_FN_D0,         D0_MARK),
+        PINMUX_GPIO(GPIO_FN_A25,        A25_MARK),
+        PINMUX_GPIO(GPIO_FN_A24,        A24_MARK),
+        PINMUX_GPIO(GPIO_FN_A23,        A23_MARK),
+        PINMUX_GPIO(GPIO_FN_A22,        A22_MARK),
+        PINMUX_GPIO(GPIO_FN_CS6B_CE1B,  CS6B_CE1B_MARK),
+        PINMUX_GPIO(GPIO_FN_CS6A_CE2B,  CS6A_CE2B_MARK),
+        PINMUX_GPIO(GPIO_FN_CS5B_CE1A,  CS5B_CE1A_MARK),
+        PINMUX_GPIO(GPIO_FN_CS5A_CE2A,  CS5A_CE2A_MARK),
+        PINMUX_GPIO(GPIO_FN_WE3_ICIOWR, WE3_ICIOWR_MARK),
+        PINMUX_GPIO(GPIO_FN_WE2_ICIORD, WE2_ICIORD_MARK),
+        PINMUX_GPIO(GPIO_FN_IOIS16,     IOIS16_MARK),
+        PINMUX_GPIO(GPIO_FN_WAIT,       WAIT_MARK),
+        PINMUX_GPIO(GPIO_FN_BS,         BS_MARK),
+
+        /* KEYSC */
+        PINMUX_GPIO(GPIO_FN_KEYOUT5_IN5,        KEYOUT5_IN5_MARK),
+        PINMUX_GPIO(GPIO_FN_KEYOUT4_IN6,        KEYOUT4_IN6_MARK),
+        PINMUX_GPIO(GPIO_FN_KEYIN4,             KEYIN4_MARK),
+        PINMUX_GPIO(GPIO_FN_KEYIN3,             KEYIN3_MARK),
+        PINMUX_GPIO(GPIO_FN_KEYIN2,             KEYIN2_MARK),
+        PINMUX_GPIO(GPIO_FN_KEYIN1,             KEYIN1_MARK),
+        PINMUX_GPIO(GPIO_FN_KEYIN0,             KEYIN0_MARK),
+        PINMUX_GPIO(GPIO_FN_KEYOUT3,            KEYOUT3_MARK),
+        PINMUX_GPIO(GPIO_FN_KEYOUT2,            KEYOUT2_MARK),
+        PINMUX_GPIO(GPIO_FN_KEYOUT1,            KEYOUT1_MARK),
+        PINMUX_GPIO(GPIO_FN_KEYOUT0,            KEYOUT0_MARK),
+
+        /* ATAPI */
+        PINMUX_GPIO(GPIO_FN_IDED15,     IDED15_MARK),
+        PINMUX_GPIO(GPIO_FN_IDED14,     IDED14_MARK),
+        PINMUX_GPIO(GPIO_FN_IDED13,     IDED13_MARK),
+        PINMUX_GPIO(GPIO_FN_IDED12,     IDED12_MARK),
+        PINMUX_GPIO(GPIO_FN_IDED11,     IDED11_MARK),
+        PINMUX_GPIO(GPIO_FN_IDED10,     IDED10_MARK),
+        PINMUX_GPIO(GPIO_FN_IDED9,      IDED9_MARK),
+        PINMUX_GPIO(GPIO_FN_IDED8,      IDED8_MARK),
+        PINMUX_GPIO(GPIO_FN_IDED7,      IDED7_MARK),
+        PINMUX_GPIO(GPIO_FN_IDED6,      IDED6_MARK),
+        PINMUX_GPIO(GPIO_FN_IDED5,      IDED5_MARK),
+        PINMUX_GPIO(GPIO_FN_IDED4,      IDED4_MARK),
+        PINMUX_GPIO(GPIO_FN_IDED3,      IDED3_MARK),
+        PINMUX_GPIO(GPIO_FN_IDED2,      IDED2_MARK),
+        PINMUX_GPIO(GPIO_FN_IDED1,      IDED1_MARK),
+        PINMUX_GPIO(GPIO_FN_IDED0,      IDED0_MARK),
+        PINMUX_GPIO(GPIO_FN_IDEA2,      IDEA2_MARK),
+        PINMUX_GPIO(GPIO_FN_IDEA1,      IDEA1_MARK),
+        PINMUX_GPIO(GPIO_FN_IDEA0,      IDEA0_MARK),
+        PINMUX_GPIO(GPIO_FN_IDEIOWR,    IDEIOWR_MARK),
+        PINMUX_GPIO(GPIO_FN_IODREQ,     IODREQ_MARK),
+        PINMUX_GPIO(GPIO_FN_IDECS0,     IDECS0_MARK),
+        PINMUX_GPIO(GPIO_FN_IDECS1,     IDECS1_MARK),
+        PINMUX_GPIO(GPIO_FN_IDEIORD,    IDEIORD_MARK),
+        PINMUX_GPIO(GPIO_FN_DIRECTION,  DIRECTION_MARK),
+        PINMUX_GPIO(GPIO_FN_EXBUF_ENB,  EXBUF_ENB_MARK),
+        PINMUX_GPIO(GPIO_FN_IDERST,     IDERST_MARK),
+        PINMUX_GPIO(GPIO_FN_IODACK,     IODACK_MARK),
+        PINMUX_GPIO(GPIO_FN_IDEINT,     IDEINT_MARK),
+        PINMUX_GPIO(GPIO_FN_IDEIORDY,   IDEIORDY_MARK),
+
+        /* TPU */
+        PINMUX_GPIO(GPIO_FN_TPUTO3,     TPUTO3_MARK),
+        PINMUX_GPIO(GPIO_FN_TPUTO2,     TPUTO2_MARK),
+        PINMUX_GPIO(GPIO_FN_TPUTO1,     TPUTO1_MARK),
+        PINMUX_GPIO(GPIO_FN_TPUTO0,     TPUTO0_MARK),
+        PINMUX_GPIO(GPIO_FN_TPUTI3,     TPUTI3_MARK),
+        PINMUX_GPIO(GPIO_FN_TPUTI2,     TPUTI2_MARK),
+
+        /* LCDC */
+        PINMUX_GPIO(GPIO_FN_LCDD23,     LCDD23_MARK),
+        PINMUX_GPIO(GPIO_FN_LCDD22,     LCDD22_MARK),
+        PINMUX_GPIO(GPIO_FN_LCDD21,     LCDD21_MARK),
+        PINMUX_GPIO(GPIO_FN_LCDD20,     LCDD20_MARK),
+        PINMUX_GPIO(GPIO_FN_LCDD19,     LCDD19_MARK),
+        PINMUX_GPIO(GPIO_FN_LCDD18,     LCDD18_MARK),
+        PINMUX_GPIO(GPIO_FN_LCDD17,     LCDD17_MARK),
+        PINMUX_GPIO(GPIO_FN_LCDD16,     LCDD16_MARK),
+        PINMUX_GPIO(GPIO_FN_LCDD15,     LCDD15_MARK),
+        PINMUX_GPIO(GPIO_FN_LCDD14,     LCDD14_MARK),
+        PINMUX_GPIO(GPIO_FN_LCDD13,     LCDD13_MARK),
+        PINMUX_GPIO(GPIO_FN_LCDD12,     LCDD12_MARK),
+        PINMUX_GPIO(GPIO_FN_LCDD11,     LCDD11_MARK),
+        PINMUX_GPIO(GPIO_FN_LCDD10,     LCDD10_MARK),
+        PINMUX_GPIO(GPIO_FN_LCDD9,      LCDD9_MARK),
+        PINMUX_GPIO(GPIO_FN_LCDD8,      LCDD8_MARK),
+        PINMUX_GPIO(GPIO_FN_LCDD7,      LCDD7_MARK),
+        PINMUX_GPIO(GPIO_FN_LCDD6,      LCDD6_MARK),
+        PINMUX_GPIO(GPIO_FN_LCDD5,      LCDD5_MARK),
+        PINMUX_GPIO(GPIO_FN_LCDD4,      LCDD4_MARK),
+        PINMUX_GPIO(GPIO_FN_LCDD3,      LCDD3_MARK),
+        PINMUX_GPIO(GPIO_FN_LCDD2,      LCDD2_MARK),
+        PINMUX_GPIO(GPIO_FN_LCDD1,      LCDD1_MARK),
+        PINMUX_GPIO(GPIO_FN_LCDD0,      LCDD0_MARK),
+        PINMUX_GPIO(GPIO_FN_LCDVSYN,    LCDVSYN_MARK),
+        PINMUX_GPIO(GPIO_FN_LCDDISP,    LCDDISP_MARK),
+        PINMUX_GPIO(GPIO_FN_LCDRS,      LCDRS_MARK),
+        PINMUX_GPIO(GPIO_FN_LCDHSYN,    LCDHSYN_MARK),
+        PINMUX_GPIO(GPIO_FN_LCDCS,      LCDCS_MARK),
+        PINMUX_GPIO(GPIO_FN_LCDDON,     LCDDON_MARK),
+        PINMUX_GPIO(GPIO_FN_LCDDCK,     LCDDCK_MARK),
+        PINMUX_GPIO(GPIO_FN_LCDWR,      LCDWR_MARK),
+        PINMUX_GPIO(GPIO_FN_LCDVEPWC,   LCDVEPWC_MARK),
+        PINMUX_GPIO(GPIO_FN_LCDVCPWC,   LCDVCPWC_MARK),
+        PINMUX_GPIO(GPIO_FN_LCDRD,      LCDRD_MARK),
+        PINMUX_GPIO(GPIO_FN_LCDLCLK,    LCDLCLK_MARK),
+
+        /* SCIF0 */
+        PINMUX_GPIO(GPIO_FN_SCIF0_TXD,  SCIF0_TXD_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF0_RXD,  SCIF0_RXD_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF0_SCK,  SCIF0_SCK_MARK),
+
+        /* SCIF1 */
+        PINMUX_GPIO(GPIO_FN_SCIF1_SCK,  SCIF1_SCK_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF1_RXD,  SCIF1_RXD_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF1_TXD,  SCIF1_TXD_MARK),
+
+        /* SCIF2 */
+        PINMUX_GPIO(GPIO_FN_SCIF2_L_TXD,        SCIF2_L_TXD_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF2_L_SCK,        SCIF2_L_SCK_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF2_L_RXD,        SCIF2_L_RXD_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF2_V_TXD,        SCIF2_V_TXD_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF2_V_SCK,        SCIF2_V_SCK_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF2_V_RXD,        SCIF2_V_RXD_MARK),
+
+        /* SCIF3 */
+        PINMUX_GPIO(GPIO_FN_SCIF3_V_SCK,        SCIF3_V_SCK_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF3_V_RXD,        SCIF3_V_RXD_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF3_V_TXD,        SCIF3_V_TXD_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF3_V_CTS,        SCIF3_V_CTS_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF3_V_RTS,        SCIF3_V_RTS_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF3_I_SCK,        SCIF3_I_SCK_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF3_I_RXD,        SCIF3_I_RXD_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF3_I_TXD,        SCIF3_I_TXD_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF3_I_CTS,        SCIF3_I_CTS_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF3_I_RTS,        SCIF3_I_RTS_MARK),
+
+        /* SCIF4 */
+        PINMUX_GPIO(GPIO_FN_SCIF4_SCK,  SCIF4_SCK_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF4_RXD,  SCIF4_RXD_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF4_TXD,  SCIF4_TXD_MARK),
+
+        /* SCIF5 */
+        PINMUX_GPIO(GPIO_FN_SCIF5_SCK,  SCIF5_SCK_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF5_RXD,  SCIF5_RXD_MARK),
+        PINMUX_GPIO(GPIO_FN_SCIF5_TXD,  SCIF5_TXD_MARK),
+
+        /* FSI */
+        PINMUX_GPIO(GPIO_FN_FSIMCKB,    FSIMCKB_MARK),
+        PINMUX_GPIO(GPIO_FN_FSIMCKA,    FSIMCKA_MARK),
+        PINMUX_GPIO(GPIO_FN_FSIOASD,    FSIOASD_MARK),
+        PINMUX_GPIO(GPIO_FN_FSIIABCK,   FSIIABCK_MARK),
+        PINMUX_GPIO(GPIO_FN_FSIIALRCK,  FSIIALRCK_MARK),
+        PINMUX_GPIO(GPIO_FN_FSIOABCK,   FSIOABCK_MARK),
+        PINMUX_GPIO(GPIO_FN_FSIOALRCK,  FSIOALRCK_MARK),
+        PINMUX_GPIO(GPIO_FN_CLKAUDIOAO, CLKAUDIOAO_MARK),
+        PINMUX_GPIO(GPIO_FN_FSIIBSD,    FSIIBSD_MARK),
+        PINMUX_GPIO(GPIO_FN_FSIOBSD,    FSIOBSD_MARK),
+        PINMUX_GPIO(GPIO_FN_FSIIBBCK,   FSIIBBCK_MARK),
+        PINMUX_GPIO(GPIO_FN_FSIIBLRCK,  FSIIBLRCK_MARK),
+        PINMUX_GPIO(GPIO_FN_FSIOBBCK,   FSIOBBCK_MARK),
+        PINMUX_GPIO(GPIO_FN_FSIOBLRCK,  FSIOBLRCK_MARK),
+        PINMUX_GPIO(GPIO_FN_CLKAUDIOBO, CLKAUDIOBO_MARK),
+        PINMUX_GPIO(GPIO_FN_FSIIASD,    FSIIASD_MARK),
+
+        /* AUD */
+        PINMUX_GPIO(GPIO_FN_AUDCK,      AUDCK_MARK),
+        PINMUX_GPIO(GPIO_FN_AUDSYNC,    AUDSYNC_MARK),
+        PINMUX_GPIO(GPIO_FN_AUDATA3,    AUDATA3_MARK),
+        PINMUX_GPIO(GPIO_FN_AUDATA2,    AUDATA2_MARK),
+        PINMUX_GPIO(GPIO_FN_AUDATA1,    AUDATA1_MARK),
+        PINMUX_GPIO(GPIO_FN_AUDATA0,    AUDATA0_MARK),
+
+        /* VIO */
+        PINMUX_GPIO(GPIO_FN_VIO_CKO,    VIO_CKO_MARK),
+
+        /* VIO0 */
+        PINMUX_GPIO(GPIO_FN_VIO0_D15,   VIO0_D15_MARK),
+        PINMUX_GPIO(GPIO_FN_VIO0_D14,   VIO0_D14_MARK),
+        PINMUX_GPIO(GPIO_FN_VIO0_D13,   VIO0_D13_MARK),
+        PINMUX_GPIO(GPIO_FN_VIO0_D12,   VIO0_D12_MARK),
+        PINMUX_GPIO(GPIO_FN_VIO0_D11,   VIO0_D11_MARK),
+        PINMUX_GPIO(GPIO_FN_VIO0_D10,   VIO0_D10_MARK),
+        PINMUX_GPIO(GPIO_FN_VIO0_D9,    VIO0_D9_MARK),
+        PINMUX_GPIO(GPIO_FN_VIO0_D8,    VIO0_D8_MARK),
+        PINMUX_GPIO(GPIO_FN_VIO0_D7,    VIO0_D7_MARK),
+        PINMUX_GPIO(GPIO_FN_VIO0_D6,    VIO0_D6_MARK),
+        PINMUX_GPIO(GPIO_FN_VIO0_D5,    VIO0_D5_MARK),
+        PINMUX_GPIO(GPIO_FN_VIO0_D4,    VIO0_D4_MARK),
+        PINMUX_GPIO(GPIO_FN_VIO0_D3,    VIO0_D3_MARK),
+        PINMUX_GPIO(GPIO_FN_VIO0_D2,    VIO0_D2_MARK),
+        PINMUX_GPIO(GPIO_FN_VIO0_D1,    VIO0_D1_MARK),
+        PINMUX_GPIO(GPIO_FN_VIO0_D0,    VIO0_D0_MARK),
+        PINMUX_GPIO(GPIO_FN_VIO0_VD,    VIO0_VD_MARK),
+        PINMUX_GPIO(GPIO_FN_VIO0_CLK,   VIO0_CLK_MARK),
+        PINMUX_GPIO(GPIO_FN_VIO0_FLD,   VIO0_FLD_MARK),
+        PINMUX_GPIO(GPIO_FN_VIO0_HD,    VIO0_HD_MARK),
+
+        /* VIO1 */
+        PINMUX_GPIO(GPIO_FN_VIO1_D7,    VIO1_D7_MARK),
+        PINMUX_GPIO(GPIO_FN_VIO1_D6,    VIO1_D6_MARK),
+        PINMUX_GPIO(GPIO_FN_VIO1_D5,    VIO1_D5_MARK),
+        PINMUX_GPIO(GPIO_FN_VIO1_D4,    VIO1_D4_MARK),
+        PINMUX_GPIO(GPIO_FN_VIO1_D3,    VIO1_D3_MARK),
+        PINMUX_GPIO(GPIO_FN_VIO1_D2,    VIO1_D2_MARK),
+        PINMUX_GPIO(GPIO_FN_VIO1_D1,    VIO1_D1_MARK),
+        PINMUX_GPIO(GPIO_FN_VIO1_D0,    VIO1_D0_MARK),
+        PINMUX_GPIO(GPIO_FN_VIO1_FLD,   VIO1_FLD_MARK),
+        PINMUX_GPIO(GPIO_FN_VIO1_HD,    VIO1_HD_MARK),
+        PINMUX_GPIO(GPIO_FN_VIO1_VD,    VIO1_VD_MARK),
+        PINMUX_GPIO(GPIO_FN_VIO1_CLK,   VIO1_CLK_MARK),
+
+        /* Eth */
+        PINMUX_GPIO(GPIO_FN_RMII_RXD0,          RMII_RXD0_MARK),
+        PINMUX_GPIO(GPIO_FN_RMII_RXD1,          RMII_RXD1_MARK),
+        PINMUX_GPIO(GPIO_FN_RMII_TXD0,          RMII_TXD0_MARK),
+        PINMUX_GPIO(GPIO_FN_RMII_TXD1,          RMII_TXD1_MARK),
+        PINMUX_GPIO(GPIO_FN_RMII_REF_CLK,       RMII_REF_CLK_MARK),
+        PINMUX_GPIO(GPIO_FN_RMII_TX_EN,         RMII_TX_EN_MARK),
+        PINMUX_GPIO(GPIO_FN_RMII_RX_ER,         RMII_RX_ER_MARK),
+        PINMUX_GPIO(GPIO_FN_RMII_CRS_DV,        RMII_CRS_DV_MARK),
+        PINMUX_GPIO(GPIO_FN_LNKSTA,             LNKSTA_MARK),
+        PINMUX_GPIO(GPIO_FN_MDIO,               MDIO_MARK),
+        PINMUX_GPIO(GPIO_FN_MDC,                MDC_MARK),
+
+        /* System */
+        PINMUX_GPIO(GPIO_FN_PDSTATUS,   PDSTATUS_MARK),
+        PINMUX_GPIO(GPIO_FN_STATUS2,    STATUS2_MARK),
+        PINMUX_GPIO(GPIO_FN_STATUS0,    STATUS0_MARK),
+
+        /* VOU */
+        PINMUX_GPIO(GPIO_FN_DV_D15,     DV_D15_MARK),
+        PINMUX_GPIO(GPIO_FN_DV_D14,     DV_D14_MARK),
+        PINMUX_GPIO(GPIO_FN_DV_D13,     DV_D13_MARK),
+        PINMUX_GPIO(GPIO_FN_DV_D12,     DV_D12_MARK),
+        PINMUX_GPIO(GPIO_FN_DV_D11,     DV_D11_MARK),
+        PINMUX_GPIO(GPIO_FN_DV_D10,     DV_D10_MARK),
+        PINMUX_GPIO(GPIO_FN_DV_D9,      DV_D9_MARK),
+        PINMUX_GPIO(GPIO_FN_DV_D8,      DV_D8_MARK),
+        PINMUX_GPIO(GPIO_FN_DV_D7,      DV_D7_MARK),
+        PINMUX_GPIO(GPIO_FN_DV_D6,      DV_D6_MARK),
+        PINMUX_GPIO(GPIO_FN_DV_D5,      DV_D5_MARK),
+        PINMUX_GPIO(GPIO_FN_DV_D4,      DV_D4_MARK),
+        PINMUX_GPIO(GPIO_FN_DV_D3,      DV_D3_MARK),
+        PINMUX_GPIO(GPIO_FN_DV_D2,      DV_D2_MARK),
+        PINMUX_GPIO(GPIO_FN_DV_D1,      DV_D1_MARK),
+        PINMUX_GPIO(GPIO_FN_DV_D0,      DV_D0_MARK),
+        PINMUX_GPIO(GPIO_FN_DV_CLKI,    DV_CLKI_MARK),
+        PINMUX_GPIO(GPIO_FN_DV_CLK,     DV_CLK_MARK),
+        PINMUX_GPIO(GPIO_FN_DV_VSYNC,   DV_VSYNC_MARK),
+        PINMUX_GPIO(GPIO_FN_DV_HSYNC,   DV_HSYNC_MARK),
+
+        /* MSIOF0 */
+        PINMUX_GPIO(GPIO_FN_MSIOF0_RXD,         MSIOF0_RXD_MARK),
+        PINMUX_GPIO(GPIO_FN_MSIOF0_TXD,         MSIOF0_TXD_MARK),
+        PINMUX_GPIO(GPIO_FN_MSIOF0_MCK,         MSIOF0_MCK_MARK),
+        PINMUX_GPIO(GPIO_FN_MSIOF0_TSCK,        MSIOF0_TSCK_MARK),
+        PINMUX_GPIO(GPIO_FN_MSIOF0_SS1,         MSIOF0_SS1_MARK),
+        PINMUX_GPIO(GPIO_FN_MSIOF0_SS2,         MSIOF0_SS2_MARK),
+        PINMUX_GPIO(GPIO_FN_MSIOF0_TSYNC,       MSIOF0_TSYNC_MARK),
+        PINMUX_GPIO(GPIO_FN_MSIOF0_RSCK,        MSIOF0_RSCK_MARK),
+        PINMUX_GPIO(GPIO_FN_MSIOF0_RSYNC,       MSIOF0_RSYNC_MARK),
+
+        /* MSIOF1 */
+        PINMUX_GPIO(GPIO_FN_MSIOF1_RXD,         MSIOF1_RXD_MARK),
+        PINMUX_GPIO(GPIO_FN_MSIOF1_TXD,         MSIOF1_TXD_MARK),
+        PINMUX_GPIO(GPIO_FN_MSIOF1_MCK,         MSIOF1_MCK_MARK),
+        PINMUX_GPIO(GPIO_FN_MSIOF1_TSCK,        MSIOF1_TSCK_MARK),
+        PINMUX_GPIO(GPIO_FN_MSIOF1_SS1,         MSIOF1_SS1_MARK),
+        PINMUX_GPIO(GPIO_FN_MSIOF1_SS2,         MSIOF1_SS2_MARK),
+        PINMUX_GPIO(GPIO_FN_MSIOF1_TSYNC,       MSIOF1_TSYNC_MARK),
+        PINMUX_GPIO(GPIO_FN_MSIOF1_RSCK,        MSIOF1_RSCK_MARK),
+        PINMUX_GPIO(GPIO_FN_MSIOF1_RSYNC,       MSIOF1_RSYNC_MARK),
+
+        /* DMAC */
+        PINMUX_GPIO(GPIO_FN_DMAC_DACK0, DMAC_DACK0_MARK),
+        PINMUX_GPIO(GPIO_FN_DMAC_DREQ0, DMAC_DREQ0_MARK),
+        PINMUX_GPIO(GPIO_FN_DMAC_DACK1, DMAC_DACK1_MARK),
+        PINMUX_GPIO(GPIO_FN_DMAC_DREQ1, DMAC_DREQ1_MARK),
+
+        /* SDHI0 */
+        PINMUX_GPIO(GPIO_FN_SDHI0CD,    SDHI0CD_MARK),
+        PINMUX_GPIO(GPIO_FN_SDHI0WP,    SDHI0WP_MARK),
+        PINMUX_GPIO(GPIO_FN_SDHI0CMD,   SDHI0CMD_MARK),
+        PINMUX_GPIO(GPIO_FN_SDHI0CLK,   SDHI0CLK_MARK),
+        PINMUX_GPIO(GPIO_FN_SDHI0D3,    SDHI0D3_MARK),
+        PINMUX_GPIO(GPIO_FN_SDHI0D2,    SDHI0D2_MARK),
+        PINMUX_GPIO(GPIO_FN_SDHI0D1,    SDHI0D1_MARK),
+        PINMUX_GPIO(GPIO_FN_SDHI0D0,    SDHI0D0_MARK),
+
+        /* SDHI1 */
+        PINMUX_GPIO(GPIO_FN_SDHI1CD,    SDHI1CD_MARK),
+        PINMUX_GPIO(GPIO_FN_SDHI1WP,    SDHI1WP_MARK),
+        PINMUX_GPIO(GPIO_FN_SDHI1CMD,   SDHI1CMD_MARK),
+        PINMUX_GPIO(GPIO_FN_SDHI1CLK,   SDHI1CLK_MARK),
+        PINMUX_GPIO(GPIO_FN_SDHI1D3,    SDHI1D3_MARK),
+        PINMUX_GPIO(GPIO_FN_SDHI1D2,    SDHI1D2_MARK),
+        PINMUX_GPIO(GPIO_FN_SDHI1D1,    SDHI1D1_MARK),
+        PINMUX_GPIO(GPIO_FN_SDHI1D0,    SDHI1D0_MARK),
+
+        /* MMC */
+        PINMUX_GPIO(GPIO_FN_MMC_D7,     MMC_D7_MARK),
+        PINMUX_GPIO(GPIO_FN_MMC_D6,     MMC_D6_MARK),
+        PINMUX_GPIO(GPIO_FN_MMC_D5,     MMC_D5_MARK),
+        PINMUX_GPIO(GPIO_FN_MMC_D4,     MMC_D4_MARK),
+        PINMUX_GPIO(GPIO_FN_MMC_D3,     MMC_D3_MARK),
+        PINMUX_GPIO(GPIO_FN_MMC_D2,     MMC_D2_MARK),
+        PINMUX_GPIO(GPIO_FN_MMC_D1,     MMC_D1_MARK),
+        PINMUX_GPIO(GPIO_FN_MMC_D0,     MMC_D0_MARK),
+        PINMUX_GPIO(GPIO_FN_MMC_CLK,    MMC_CLK_MARK),
+        PINMUX_GPIO(GPIO_FN_MMC_CMD,    MMC_CMD_MARK),
+
+        /* IrDA */
+        PINMUX_GPIO(GPIO_FN_IRDA_OUT,   IRDA_OUT_MARK),
+        PINMUX_GPIO(GPIO_FN_IRDA_IN,    IRDA_IN_MARK),
+
+        /* TSIF */
+        PINMUX_GPIO(GPIO_FN_TSIF_TS0_SDAT,      TSIF_TS0_SDAT_MARK),
+        PINMUX_GPIO(GPIO_FN_TSIF_TS0_SCK,       TSIF_TS0_SCK_MARK),
+        PINMUX_GPIO(GPIO_FN_TSIF_TS0_SDEN,      TSIF_TS0_SDEN_MARK),
+        PINMUX_GPIO(GPIO_FN_TSIF_TS0_SPSYNC,    TSIF_TS0_SPSYNC_MARK),
+
+        /* IRQ */
+        PINMUX_GPIO(GPIO_FN_INTC_IRQ7,  INTC_IRQ7_MARK),
+        PINMUX_GPIO(GPIO_FN_INTC_IRQ6,  INTC_IRQ6_MARK),
+        PINMUX_GPIO(GPIO_FN_INTC_IRQ5,  INTC_IRQ5_MARK),
+        PINMUX_GPIO(GPIO_FN_INTC_IRQ4,  INTC_IRQ4_MARK),
+        PINMUX_GPIO(GPIO_FN_INTC_IRQ3,  INTC_IRQ3_MARK),
+        PINMUX_GPIO(GPIO_FN_INTC_IRQ2,  INTC_IRQ2_MARK),
+        PINMUX_GPIO(GPIO_FN_INTC_IRQ1,  INTC_IRQ1_MARK),
+        PINMUX_GPIO(GPIO_FN_INTC_IRQ0,  INTC_IRQ0_MARK),
+ };
+
+static struct pinmux_cfg_reg pinmux_config_regs[] = {
+        { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2) {
+                PTA7_FN, PTA7_OUT, PTA7_IN_PU, PTA7_IN,
+                PTA6_FN, PTA6_OUT, PTA6_IN_PU, PTA6_IN,
+                PTA5_FN, PTA5_OUT, PTA5_IN_PU, PTA5_IN,
+                PTA4_FN, PTA4_OUT, PTA4_IN_PU, PTA4_IN,
+                PTA3_FN, PTA3_OUT, PTA3_IN_PU, PTA3_IN,
+                PTA2_FN, PTA2_OUT, PTA2_IN_PU, PTA2_IN,
+                PTA1_FN, PTA1_OUT, PTA1_IN_PU, PTA1_IN,
+                PTA0_FN, PTA0_OUT, PTA0_IN_PU, PTA0_IN }
+        },
+        { PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2) {
+                PTB7_FN, PTB7_OUT, PTB7_IN_PU, PTB7_IN,
+                PTB6_FN, PTB6_OUT, PTB6_IN_PU, PTB6_IN,
+                PTB5_FN, PTB5_OUT, PTB5_IN_PU, PTB5_IN,
+                PTB4_FN, PTB4_OUT, PTB4_IN_PU, PTB4_IN,
+                PTB3_FN, PTB3_OUT, PTB3_IN_PU, PTB3_IN,
+                PTB2_FN, PTB2_OUT, PTB2_IN_PU, PTB2_IN,
+                PTB1_FN, PTB1_OUT, PTB1_IN_PU, PTB1_IN,
+                PTB0_FN, PTB0_OUT, PTB0_IN_PU, PTB0_IN }
+        },
+        { PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2) {
+                PTC7_FN, PTC7_OUT, PTC7_IN_PU, PTC7_IN,
+                PTC6_FN, PTC6_OUT, PTC6_IN_PU, PTC6_IN,
+                PTC5_FN, PTC5_OUT, PTC5_IN_PU, PTC5_IN,
+                PTC4_FN, PTC4_OUT, PTC4_IN_PU, PTC4_IN,
+                PTC3_FN, PTC3_OUT, PTC3_IN_PU, PTC3_IN,
+                PTC2_FN, PTC2_OUT, PTC2_IN_PU, PTC2_IN,
+                PTC1_FN, PTC1_OUT, PTC1_IN_PU, PTC1_IN,
+                PTC0_FN, PTC0_OUT, PTC0_IN_PU, PTC0_IN }
+        },
+        { PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2) {
+                PTD7_FN, PTD7_OUT, PTD7_IN_PU, PTD7_IN,
+                PTD6_FN, PTD6_OUT, PTD6_IN_PU, PTD6_IN,
+                PTD5_FN, PTD5_OUT, PTD5_IN_PU, PTD5_IN,
+                PTD4_FN, PTD4_OUT, PTD4_IN_PU, PTD4_IN,
+                PTD3_FN, PTD3_OUT, PTD3_IN_PU, PTD3_IN,
+                PTD2_FN, PTD2_OUT, PTD2_IN_PU, PTD2_IN,
+                PTD1_FN, PTD1_OUT, PTD1_IN_PU, PTD1_IN,
+                PTD0_FN, PTD0_OUT, PTD0_IN_PU, PTD0_IN }
+        },
+        { PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2) {
+                PTE7_FN, PTE7_OUT, PTE7_IN_PU, PTE7_IN,
+                PTE6_FN, PTE6_OUT, PTE6_IN_PU, PTE6_IN,
+                PTE5_FN, PTE5_OUT, PTE5_IN_PU, PTE5_IN,
+                PTE4_FN, PTE4_OUT, PTE4_IN_PU, PTE4_IN,
+                PTE3_FN, PTE3_OUT, PTE3_IN_PU, PTE3_IN,
+                PTE2_FN, PTE2_OUT, PTE2_IN_PU, PTE2_IN,
+                PTE1_FN, PTE1_OUT, PTE1_IN_PU, PTE1_IN,
+                PTE0_FN, PTE0_OUT, PTE0_IN_PU, PTE0_IN }
+        },
+        { PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2) {
+                PTF7_FN, PTF7_OUT, PTF7_IN_PU, PTF7_IN,
+                PTF6_FN, PTF6_OUT, PTF6_IN_PU, PTF6_IN,
+                PTF5_FN, PTF5_OUT, PTF5_IN_PU, PTF5_IN,
+                PTF4_FN, PTF4_OUT, PTF4_IN_PU, PTF4_IN,
+                PTF3_FN, PTF3_OUT, PTF3_IN_PU, PTF3_IN,
+                PTF2_FN, PTF2_OUT, PTF2_IN_PU, PTF2_IN,
+                PTF1_FN, PTF1_OUT, PTF1_IN_PU, PTF1_IN,
+                PTF0_FN, PTF0_OUT, PTF0_IN_PU, PTF0_IN }
+        },
+        { PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2) {
+                0, 0, 0, 0,
+                0, 0, 0, 0,
+                PTG5_FN, PTG5_OUT, 0, 0,
+                PTG4_FN, PTG4_OUT, 0, 0,
+                PTG3_FN, PTG3_OUT, 0, 0,
+                PTG2_FN, PTG2_OUT, 0, 0,
+                PTG1_FN, PTG1_OUT, 0, 0,
+                PTG0_FN, PTG0_OUT, 0, 0 }
+        },
+        { PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2) {
+                PTH7_FN, PTH7_OUT, PTH7_IN_PU, PTH7_IN,
+                PTH6_FN, PTH6_OUT, PTH6_IN_PU, PTH6_IN,
+                PTH5_FN, PTH5_OUT, PTH5_IN_PU, PTH5_IN,
+                PTH4_FN, PTH4_OUT, PTH4_IN_PU, PTH4_IN,
+                PTH3_FN, PTH3_OUT, PTH3_IN_PU, PTH3_IN,
+                PTH2_FN, PTH2_OUT, PTH2_IN_PU, PTH2_IN,
+                PTH1_FN, PTH1_OUT, PTH1_IN_PU, PTH1_IN,
+                PTH0_FN, PTH0_OUT, PTH0_IN_PU, PTH0_IN }
+        },
+        { PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2) {
+                PTJ7_FN, PTJ7_OUT, 0, 0,
+                PTJ6_FN, PTJ6_OUT, 0, 0,
+                PTJ5_FN, PTJ5_OUT, 0, 0,
+                0, 0, 0, 0,
+                PTJ3_FN, PTJ3_OUT, PTJ3_IN_PU, PTJ3_IN,
+                PTJ2_FN, PTJ2_OUT, PTJ2_IN_PU, PTJ2_IN,
+                PTJ1_FN, PTJ1_OUT, PTJ1_IN_PU, PTJ1_IN,
+                PTJ0_FN, PTJ0_OUT, PTJ0_IN_PU, PTJ0_IN }
+        },
+        { PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2) {
+                PTK7_FN, PTK7_OUT, PTK7_IN_PU, PTK7_IN,
+                PTK6_FN, PTK6_OUT, PTK6_IN_PU, PTK6_IN,
+                PTK5_FN, PTK5_OUT, PTK5_IN_PU, PTK5_IN,
+                PTK4_FN, PTK4_OUT, PTK4_IN_PU, PTK4_IN,
+                PTK3_FN, PTK3_OUT, PTK3_IN_PU, PTK3_IN,
+                PTK2_FN, PTK2_OUT, PTK2_IN_PU, PTK2_IN,
+                PTK1_FN, PTK1_OUT, PTK1_IN_PU, PTK1_IN,
+                PTK0_FN, PTK0_OUT, PTK0_IN_PU, PTK0_IN }
+        },
+        { PINMUX_CFG_REG("PLCR", 0xa4050114, 16, 2) {
+                PTL7_FN, PTL7_OUT, PTL7_IN_PU, PTL7_IN,
+                PTL6_FN, PTL6_OUT, PTL6_IN_PU, PTL6_IN,
+                PTL5_FN, PTL5_OUT, PTL5_IN_PU, PTL5_IN,
+                PTL4_FN, PTL4_OUT, PTL4_IN_PU, PTL4_IN,
+                PTL3_FN, PTL3_OUT, PTL3_IN_PU, PTL3_IN,
+                PTL2_FN, PTL2_OUT, PTL2_IN_PU, PTL2_IN,
+                PTL1_FN, PTL1_OUT, PTL1_IN_PU, PTL1_IN,
+                PTL0_FN, PTL0_OUT, PTL0_IN_PU, PTL0_IN }
+        },
+        { PINMUX_CFG_REG("PMCR", 0xa4050116, 16, 2) {
+                PTM7_FN, PTM7_OUT, PTM7_IN_PU, PTM7_IN,
+                PTM6_FN, PTM6_OUT, PTM6_IN_PU, PTM6_IN,
+                PTM5_FN, PTM5_OUT, PTM5_IN_PU, PTM5_IN,
+                PTM4_FN, PTM4_OUT, PTM4_IN_PU, PTM4_IN,
+                PTM3_FN, PTM3_OUT, PTM3_IN_PU, PTM3_IN,
+                PTM2_FN, PTM2_OUT, PTM2_IN_PU, PTM2_IN,
+                PTM1_FN, PTM1_OUT, PTM1_IN_PU, PTM1_IN,
+                PTM0_FN, PTM0_OUT, PTM0_IN_PU, PTM0_IN }
+        },
+        { PINMUX_CFG_REG("PNCR", 0xa4050118, 16, 2) {
+                PTN7_FN, PTN7_OUT, PTN7_IN_PU, PTN7_IN,
+                PTN6_FN, PTN6_OUT, PTN6_IN_PU, PTN6_IN,
+                PTN5_FN, PTN5_OUT, PTN5_IN_PU, PTN5_IN,
+                PTN4_FN, PTN4_OUT, PTN4_IN_PU, PTN4_IN,
+                PTN3_FN, PTN3_OUT, PTN3_IN_PU, PTN3_IN,
+                PTN2_FN, PTN2_OUT, PTN2_IN_PU, PTN2_IN,
+                PTN1_FN, PTN1_OUT, PTN1_IN_PU, PTN1_IN,
+                PTN0_FN, PTN0_OUT, PTN0_IN_PU, PTN0_IN }
+        },
+        { PINMUX_CFG_REG("PQCR", 0xa405011a, 16, 2) {
+                PTQ7_FN, PTQ7_OUT, PTQ7_IN_PU, PTQ7_IN,
+                PTQ6_FN, PTQ6_OUT, PTQ6_IN_PU, PTQ6_IN,
+                PTQ5_FN, PTQ5_OUT, PTQ5_IN_PU, PTQ5_IN,
+                PTQ4_FN, PTQ4_OUT, PTQ4_IN_PU, PTQ4_IN,
+                PTQ3_FN, PTQ3_OUT, PTQ3_IN_PU, PTQ3_IN,
+                PTQ2_FN, PTQ2_OUT, PTQ2_IN_PU, PTQ2_IN,
+                PTQ1_FN, PTQ1_OUT, PTQ1_IN_PU, PTQ1_IN,
+                PTQ0_FN, PTQ0_OUT, PTQ0_IN_PU, PTQ0_IN }
+        },
+        { PINMUX_CFG_REG("PRCR", 0xa405011c, 16, 2) {
+                PTR7_FN, PTR7_OUT, PTR7_IN_PU, PTR7_IN,
+                PTR6_FN, PTR6_OUT, PTR6_IN_PU, PTR6_IN,
+                PTR5_FN, PTR5_OUT, PTR5_IN_PU, PTR5_IN,
+                PTR4_FN, PTR4_OUT, PTR4_IN_PU, PTR4_IN,
+                PTR3_FN, 0,        PTR3_IN_PU, PTR3_IN,
+                PTR2_FN, 0,        PTR2_IN_PU, PTR2_IN,
+                PTR1_FN, PTR1_OUT, PTR1_IN_PU, PTR1_IN,
+                PTR0_FN, PTR0_OUT, PTR0_IN_PU, PTR0_IN }
+        },
+        { PINMUX_CFG_REG("PSCR", 0xa405011e, 16, 2) {
+                0, 0, 0, 0,
+                PTS6_FN, PTS6_OUT, PTS6_IN_PU, PTS6_IN,
+                PTS5_FN, PTS5_OUT, PTS5_IN_PU, PTS5_IN,
+                PTS4_FN, PTS4_OUT, PTS4_IN_PU, PTS4_IN,
+                PTS3_FN, PTS3_OUT, PTS3_IN_PU, PTS3_IN,
+                PTS2_FN, PTS2_OUT, PTS2_IN_PU, PTS2_IN,
+                PTS1_FN, PTS1_OUT, PTS1_IN_PU, PTS1_IN,
+                PTS0_FN, PTS0_OUT, PTS0_IN_PU, PTS0_IN }
+        },
+        { PINMUX_CFG_REG("PTCR", 0xa4050140, 16, 2) {
+                PTT7_FN, PTT7_OUT, PTT7_IN_PU, PTT7_IN,
+                PTT6_FN, PTT6_OUT, PTT6_IN_PU, PTT6_IN,
+                PTT5_FN, PTT5_OUT, PTT5_IN_PU, PTT5_IN,
+                PTT4_FN, PTT4_OUT, PTT4_IN_PU, PTT4_IN,
+                PTT3_FN, PTT3_OUT, PTT3_IN_PU, PTT3_IN,
+                PTT2_FN, PTT2_OUT, PTT2_IN_PU, PTT2_IN,
+                PTT1_FN, PTT1_OUT, PTT1_IN_PU, PTT1_IN,
+                PTT0_FN, PTT0_OUT, PTT0_IN_PU, PTT0_IN }
+        },
+        { PINMUX_CFG_REG("PUCR", 0xa4050142, 16, 2) {
+                PTU7_FN, PTU7_OUT, PTU7_IN_PU, PTU7_IN,
+                PTU6_FN, PTU6_OUT, PTU6_IN_PU, PTU6_IN,
+                PTU5_FN, PTU5_OUT, PTU5_IN_PU, PTU5_IN,
+                PTU4_FN, PTU4_OUT, PTU4_IN_PU, PTU4_IN,
+                PTU3_FN, PTU3_OUT, PTU3_IN_PU, PTU3_IN,
+                PTU2_FN, PTU2_OUT, PTU2_IN_PU, PTU2_IN,
+                PTU1_FN, PTU1_OUT, PTU1_IN_PU, PTU1_IN,
+                PTU0_FN, PTU0_OUT, PTU0_IN_PU, PTU0_IN }
+        },
+        { PINMUX_CFG_REG("PVCR", 0xa4050144, 16, 2) {
+                PTV7_FN, PTV7_OUT, PTV7_IN_PU, PTV7_IN,
+                PTV6_FN, PTV6_OUT, PTV6_IN_PU, PTV6_IN,
+                PTV5_FN, PTV5_OUT, PTV5_IN_PU, PTV5_IN,
+                PTV4_FN, PTV4_OUT, PTV4_IN_PU, PTV4_IN,
+                PTV3_FN, PTV3_OUT, PTV3_IN_PU, PTV3_IN,
+                PTV2_FN, PTV2_OUT, PTV2_IN_PU, PTV2_IN,
+                PTV1_FN, PTV1_OUT, PTV1_IN_PU, PTV1_IN,
+                PTV0_FN, PTV0_OUT, PTV0_IN_PU, PTV0_IN }
+        },
+        { PINMUX_CFG_REG("PWCR", 0xa4050146, 16, 2) {
+                PTW7_FN, PTW7_OUT, PTW7_IN_PU, PTW7_IN,
+                PTW6_FN, PTW6_OUT, PTW6_IN_PU, PTW6_IN,
+                PTW5_FN, PTW5_OUT, PTW5_IN_PU, PTW5_IN,
+                PTW4_FN, PTW4_OUT, PTW4_IN_PU, PTW4_IN,
+                PTW3_FN, PTW3_OUT, PTW3_IN_PU, PTW3_IN,
+                PTW2_FN, PTW2_OUT, PTW2_IN_PU, PTW2_IN,
+                PTW1_FN, PTW1_OUT, PTW1_IN_PU, PTW1_IN,
+                PTW0_FN, PTW0_OUT, PTW0_IN_PU, PTW0_IN }
+        },
+        { PINMUX_CFG_REG("PXCR", 0xa4050148, 16, 2) {
+                PTX7_FN, PTX7_OUT, PTX7_IN_PU, PTX7_IN,
+                PTX6_FN, PTX6_OUT, PTX6_IN_PU, PTX6_IN,
+                PTX5_FN, PTX5_OUT, PTX5_IN_PU, PTX5_IN,
+                PTX4_FN, PTX4_OUT, PTX4_IN_PU, PTX4_IN,
+                PTX3_FN, PTX3_OUT, PTX3_IN_PU, PTX3_IN,
+                PTX2_FN, PTX2_OUT, PTX2_IN_PU, PTX2_IN,
+                PTX1_FN, PTX1_OUT, PTX1_IN_PU, PTX1_IN,
+                PTX0_FN, PTX0_OUT, PTX0_IN_PU, PTX0_IN }
+        },
+        { PINMUX_CFG_REG("PYCR", 0xa405014a, 16, 2) {
+                PTY7_FN, PTY7_OUT, PTY7_IN_PU, PTY7_IN,
+                PTY6_FN, PTY6_OUT, PTY6_IN_PU, PTY6_IN,
+                PTY5_FN, PTY5_OUT, PTY5_IN_PU, PTY5_IN,
+                PTY4_FN, PTY4_OUT, PTY4_IN_PU, PTY4_IN,
+                PTY3_FN, PTY3_OUT, PTY3_IN_PU, PTY3_IN,
+                PTY2_FN, PTY2_OUT, PTY2_IN_PU, PTY2_IN,
+                PTY1_FN, PTY1_OUT, PTY1_IN_PU, PTY1_IN,
+                PTY0_FN, PTY0_OUT, PTY0_IN_PU, PTY0_IN }
+        },
+        { PINMUX_CFG_REG("PZCR", 0xa405014c, 16, 2) {
+                PTZ7_FN, PTZ7_OUT, PTZ7_IN_PU, PTZ7_IN,
+                PTZ6_FN, PTZ6_OUT, PTZ6_IN_PU, PTZ6_IN,
+                PTZ5_FN, PTZ5_OUT, PTZ5_IN_PU, PTZ5_IN,
+                PTZ4_FN, PTZ4_OUT, PTZ4_IN_PU, PTZ4_IN,
+                PTZ3_FN, PTZ3_OUT, PTZ3_IN_PU, PTZ3_IN,
+                PTZ2_FN, PTZ2_OUT, PTZ2_IN_PU, PTZ2_IN,
+                PTZ1_FN, PTZ1_OUT, PTZ1_IN_PU, PTZ1_IN,
+                PTZ0_FN, PTZ0_OUT, PTZ0_IN_PU, PTZ0_IN }
+        },
+        { PINMUX_CFG_REG("PSELA", 0xa405014e, 16, 1) {
+                PSA15_0, PSA15_1,
+                PSA14_0, PSA14_1,
+                PSA13_0, PSA13_1,
+                PSA12_0, PSA12_1,
+                0, 0,
+                PSA10_0, PSA10_1,
+                PSA9_0,  PSA9_1,
+                PSA8_0,  PSA8_1,
+                PSA7_0,  PSA7_1,
+                PSA6_0,  PSA6_1,
+                PSA5_0,  PSA5_1,
+                0, 0,
+                PSA3_0,  PSA3_1,
+                PSA2_0,  PSA2_1,
+                PSA1_0,  PSA1_1,
+                PSA0_0,  PSA0_1}
+        },
+        { PINMUX_CFG_REG("PSELB", 0xa4050150, 16, 1) {
+                0, 0,
+                PSB14_0, PSB14_1,
+                PSB13_0, PSB13_1,
+                PSB12_0, PSB12_1,
+                PSB11_0, PSB11_1,
+                PSB10_0, PSB10_1,
+                PSB9_0,  PSB9_1,
+                PSB8_0,  PSB8_1,
+                PSB7_0,  PSB7_1,
+                PSB6_0,  PSB6_1,
+                PSB5_0,  PSB5_1,
+                PSB4_0,  PSB4_1,
+                PSB3_0,  PSB3_1,
+                PSB2_0,  PSB2_1,
+                PSB1_0,  PSB1_1,
+                PSB0_0,  PSB0_1}
+        },
+        { PINMUX_CFG_REG("PSELC", 0xa4050152, 16, 1) {
+                PSC15_0, PSC15_1,
+                PSC14_0, PSC14_1,
+                PSC13_0, PSC13_1,
+                PSC12_0, PSC12_1,
+                PSC11_0, PSC11_1,
+                PSC10_0, PSC10_1,
+                PSC9_0,  PSC9_1,
+                PSC8_0,  PSC8_1,
+                PSC7_0,  PSC7_1,
+                PSC6_0,  PSC6_1,
+                PSC5_0,  PSC5_1,
+                PSC4_0,  PSC4_1,
+                0, 0,
+                PSC2_0,  PSC2_1,
+                PSC1_0,  PSC1_1,
+                PSC0_0,  PSC0_1}
+        },
+        { PINMUX_CFG_REG("PSELD", 0xa4050154, 16, 1) {
+                PSD15_0, PSD15_1,
+                PSD14_0, PSD14_1,
+                PSD13_0, PSD13_1,
+                PSD12_0, PSD12_1,
+                PSD11_0, PSD11_1,
+                PSD10_0, PSD10_1,
+                PSD9_0,  PSD9_1,
+                PSD8_0,  PSD8_1,
+                PSD7_0,  PSD7_1,
+                PSD6_0,  PSD6_1,
+                PSD5_0,  PSD5_1,
+                PSD4_0,  PSD4_1,
+                PSD3_0,  PSD3_1,
+                PSD2_0,  PSD2_1,
+                PSD1_0,  PSD1_1,
+                PSD0_0,  PSD0_1}
+        },
+        { PINMUX_CFG_REG("PSELE", 0xa4050156, 16, 1) {
+                PSE15_0, PSE15_1,
+                PSE14_0, PSE14_1,
+                PSE13_0, PSE13_1,
+                PSE12_0, PSE12_1,
+                PSE11_0, PSE11_1,
+                PSE10_0, PSE10_1,
+                PSE9_0,  PSE9_1,
+                PSE8_0,  PSE8_1,
+                PSE7_0,  PSE7_1,
+                PSE6_0,  PSE6_1,
+                PSE5_0,  PSE5_1,
+                PSE4_0,  PSE4_1,
+                PSE3_0,  PSE3_1,
+                PSE2_0,  PSE2_1,
+                PSE1_0,  PSE1_1,
+                PSE0_0,  PSE0_1}
+        },
+        {}
+};
+
+static struct pinmux_data_reg pinmux_data_regs[] = {
+        { PINMUX_DATA_REG("PADR", 0xa4050120, 8) {
+                PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
+                PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA }
+        },
+        { PINMUX_DATA_REG("PBDR", 0xa4050122, 8) {
+                PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
+                PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA }
+        },
+        { PINMUX_DATA_REG("PCDR", 0xa4050124, 8) {
+                PTC7_DATA, PTC6_DATA, PTC5_DATA, PTC4_DATA,
+                PTC3_DATA, PTC2_DATA, PTC1_DATA, PTC0_DATA }
+        },
+        { PINMUX_DATA_REG("PDDR", 0xa4050126, 8) {
+                PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
+                PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA }
+        },
+        { PINMUX_DATA_REG("PEDR", 0xa4050128, 8) {
+                PTE7_DATA, PTE6_DATA, PTE5_DATA, PTE4_DATA,
+                PTE3_DATA, PTE2_DATA, PTE1_DATA, PTE0_DATA }
+        },
+        { PINMUX_DATA_REG("PFDR", 0xa405012a, 8) {
+                PTF7_DATA, PTF6_DATA, PTF5_DATA, PTF4_DATA,
+                PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA }
+        },
+        { PINMUX_DATA_REG("PGDR", 0xa405012c, 8) {
+                0,         0,         PTG5_DATA, PTG4_DATA,
+                PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA }
+        },
+        { PINMUX_DATA_REG("PHDR", 0xa405012e, 8) {
+                PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA,
+                PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA }
+        },
+        { PINMUX_DATA_REG("PJDR", 0xa4050130, 8) {
+                PTJ7_DATA, PTJ6_DATA, PTJ5_DATA, 0,
+                PTJ3_DATA, PTJ2_DATA, PTJ1_DATA, PTJ0_DATA }
+        },
+        { PINMUX_DATA_REG("PKDR", 0xa4050132, 8) {
+                PTK7_DATA, PTK6_DATA, PTK5_DATA, PTK4_DATA,
+                PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA }
+        },
+        { PINMUX_DATA_REG("PLDR", 0xa4050134, 8) {
+                PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA,
+                PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA }
+        },
+        { PINMUX_DATA_REG("PMDR", 0xa4050136, 8) {
+                PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
+                PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA }
+        },
+        { PINMUX_DATA_REG("PNDR", 0xa4050138, 8) {
+                PTN7_DATA, PTN6_DATA, PTN5_DATA, PTN4_DATA,
+                PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA }
+        },
+        { PINMUX_DATA_REG("PQDR", 0xa405013a, 8) {
+                PTQ7_DATA, PTQ6_DATA, PTQ5_DATA, PTQ4_DATA,
+                PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA }
+        },
+        { PINMUX_DATA_REG("PRDR", 0xa405013c, 8) {
+                PTR7_DATA, PTR6_DATA, PTR5_DATA, PTR4_DATA,
+                PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA }
+        },
+        { PINMUX_DATA_REG("PSDR", 0xa405013e, 8) {
+                0,         PTS6_DATA, PTS5_DATA, PTS4_DATA,
+                PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA }
+        },
+        { PINMUX_DATA_REG("PTDR", 0xa4050160, 8) {
+                PTT7_DATA, PTT6_DATA, PTT5_DATA, PTT4_DATA,
+                PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA }
+        },
+        { PINMUX_DATA_REG("PUDR", 0xa4050162, 8) {
+                PTU7_DATA, PTU6_DATA, PTU5_DATA, PTU4_DATA,
+                PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA }
+        },
+        { PINMUX_DATA_REG("PVDR", 0xa4050164, 8) {
+                PTV7_DATA, PTV6_DATA, PTV5_DATA, PTV4_DATA,
+                PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA }
+        },
+        { PINMUX_DATA_REG("PWDR", 0xa4050166, 8) {
+                PTW7_DATA, PTW6_DATA, PTW5_DATA, PTW4_DATA,
+                PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA }
+        },
+        { PINMUX_DATA_REG("PXDR", 0xa4050168, 8) {
+                PTX7_DATA, PTX6_DATA, PTX5_DATA, PTX4_DATA,
+                PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA }
+        },
+        { PINMUX_DATA_REG("PYDR", 0xa405016a, 8) {
+                PTY7_DATA, PTY6_DATA, PTY5_DATA, PTY4_DATA,
+                PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA }
+        },
+        { PINMUX_DATA_REG("PZDR", 0xa405016c, 8) {
+                PTZ7_DATA, PTZ6_DATA, PTZ5_DATA, PTZ4_DATA,
+                PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA }
+        },
+        { },
+};
+
+static struct pinmux_info sh7724_pinmux_info = {
+        .name = "sh7724_pfc",
+        .reserved_id = PINMUX_RESERVED,
+        .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
+        .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
+        .input_pu = { PINMUX_INPUT_PULLUP_BEGIN, PINMUX_INPUT_PULLUP_END },
+        .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
+        .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
+        .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
+
+        .first_gpio = GPIO_PTA7,
+        .last_gpio = GPIO_FN_INTC_IRQ0,
+
+        .gpios = pinmux_gpios,
+        .cfg_regs = pinmux_config_regs,
+        .data_regs = pinmux_data_regs,
+
+        .gpio_data = pinmux_data,
+        .gpio_data_size = ARRAY_SIZE(pinmux_data),
+};
+
+static int __init plat_pinmux_setup(void)
+{
+        return register_pinmux(&sh7724_pinmux_info);
+}
+arch_initcall(plat_pinmux_setup);
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
index c1549382c87c..6307e087c864 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7343.c
@@ -12,7 +12,7 @@
 #include <linux/serial.h>
 #include <linux/serial_sci.h>
 #include <linux/uio_driver.h>
-#include <linux/sh_cmt.h>
+#include <linux/sh_timer.h>
 #include <asm/clock.h>
 
 static struct resource iic0_resources[] = {
@@ -141,7 +141,7 @@ static struct platform_device jpu_device = {
         .num_resources  = ARRAY_SIZE(jpu_resources),
 };
 
-static struct sh_cmt_config cmt_platform_data = {
+static struct sh_timer_config cmt_platform_data = {
         .name = "CMT",
         .channel_offset = 0x60,
         .timer_bit = 5,
@@ -173,27 +173,123 @@ static struct platform_device cmt_device = {
         .num_resources  = ARRAY_SIZE(cmt_resources),
 };
 
+static struct sh_timer_config tmu0_platform_data = {
+        .name = "TMU0",
+        .channel_offset = 0x04,
+        .timer_bit = 0,
+        .clk = "tmu0",
+        .clockevent_rating = 200,
+};
+
+static struct resource tmu0_resources[] = {
+        [0] = {
+                .name   = "TMU0",
+                .start  = 0xffd80008,
+                .end    = 0xffd80013,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 16,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu0_device = {
+        .name           = "sh_tmu",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &tmu0_platform_data,
+        },
+        .resource       = tmu0_resources,
+        .num_resources  = ARRAY_SIZE(tmu0_resources),
+};
+
+static struct sh_timer_config tmu1_platform_data = {
+        .name = "TMU1",
+        .channel_offset = 0x10,
+        .timer_bit = 1,
+        .clk = "tmu0",
+        .clocksource_rating = 200,
+};
+
+static struct resource tmu1_resources[] = {
+        [0] = {
+                .name   = "TMU1",
+                .start  = 0xffd80014,
+                .end    = 0xffd8001f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 17,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu1_device = {
+        .name           = "sh_tmu",
+        .id             = 1,
+        .dev = {
+                .platform_data  = &tmu1_platform_data,
+        },
+        .resource       = tmu1_resources,
+        .num_resources  = ARRAY_SIZE(tmu1_resources),
+};
+
+static struct sh_timer_config tmu2_platform_data = {
+        .name = "TMU2",
+        .channel_offset = 0x1c,
+        .timer_bit = 2,
+        .clk = "tmu0",
+};
+
+static struct resource tmu2_resources[] = {
+        [0] = {
+                .name   = "TMU2",
+                .start  = 0xffd80020,
+                .end    = 0xffd8002b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 18,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu2_device = {
+        .name           = "sh_tmu",
+        .id             = 2,
+        .dev = {
+                .platform_data  = &tmu2_platform_data,
+        },
+        .resource       = tmu2_resources,
+        .num_resources  = ARRAY_SIZE(tmu2_resources),
+};
+
 static struct plat_sci_port sci_platform_data[] = {
         {
                 .mapbase        = 0xffe00000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
                 .irqs           = { 80, 80, 80, 80 },
+                .clk            = "scif0",
         }, {
                 .mapbase        = 0xffe10000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
                 .irqs           = { 81, 81, 81, 81 },
+                .clk            = "scif1",
         }, {
                 .mapbase        = 0xffe20000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
                 .irqs           = { 82, 82, 82, 82 },
+                .clk            = "scif2",
         }, {
                 .mapbase        = 0xffe30000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
                 .irqs           = { 83, 83, 83, 83 },
+                .clk            = "scif3",
         }, {
                 .flags = 0,
         }
@@ -209,6 +305,9 @@ static struct platform_device sci_device = {
 
 static struct platform_device *sh7343_devices[] __initdata = {
         &cmt_device,
+        &tmu0_device,
+        &tmu1_device,
+        &tmu2_device,
         &iic0_device,
         &iic1_device,
         &sci_device,
@@ -219,12 +318,6 @@ static struct platform_device *sh7343_devices[] __initdata = {
 
 static int __init sh7343_devices_setup(void)
 {
-        clk_always_enable("uram0"); /* URAM */
-        clk_always_enable("xymem0"); /* XYMEM */
-        clk_always_enable("veu0"); /* VEU */
-        clk_always_enable("vpu0"); /* VPU */
-        clk_always_enable("jpu0"); /* JPU */
-
         platform_resource_setup_memory(&vpu_device, "vpu", 1 << 20);
         platform_resource_setup_memory(&veu_device, "veu", 2 << 20);
         platform_resource_setup_memory(&jpu_device, "jpu", 2 << 20);
@@ -234,6 +327,19 @@ static int __init sh7343_devices_setup(void)
 }
 __initcall(sh7343_devices_setup);
 
+static struct platform_device *sh7343_early_devices[] __initdata = {
+        &cmt_device,
+        &tmu0_device,
+        &tmu1_device,
+        &tmu2_device,
+};
+
+void __init plat_early_device_setup(void)
+{
+        early_platform_add_devices(sh7343_early_devices,
+                                   ARRAY_SIZE(sh7343_early_devices));
+}
+
 enum {
         UNUSED = 0,
 
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
index 93ecf8ed5c6c..318516f6bfad 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c
@@ -14,7 +14,7 @@
 #include <linux/serial.h>
 #include <linux/serial_sci.h>
 #include <linux/uio_driver.h>
-#include <linux/sh_cmt.h>
+#include <linux/sh_timer.h>
 #include <asm/clock.h>
 
 static struct resource iic_resources[] = {
@@ -148,7 +148,7 @@ static struct platform_device veu1_device = {
         .num_resources  = ARRAY_SIZE(veu1_resources),
 };
 
-static struct sh_cmt_config cmt_platform_data = {
+static struct sh_timer_config cmt_platform_data = {
         .name = "CMT",
         .channel_offset = 0x60,
         .timer_bit = 5,
@@ -180,12 +180,105 @@ static struct platform_device cmt_device = {
         .num_resources  = ARRAY_SIZE(cmt_resources),
 };
 
+static struct sh_timer_config tmu0_platform_data = {
+        .name = "TMU0",
+        .channel_offset = 0x04,
+        .timer_bit = 0,
+        .clk = "tmu0",
+        .clockevent_rating = 200,
+};
+
+static struct resource tmu0_resources[] = {
+        [0] = {
+                .name   = "TMU0",
+                .start  = 0xffd80008,
+                .end    = 0xffd80013,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 16,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu0_device = {
+        .name           = "sh_tmu",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &tmu0_platform_data,
+        },
+        .resource       = tmu0_resources,
+        .num_resources  = ARRAY_SIZE(tmu0_resources),
+};
+
+static struct sh_timer_config tmu1_platform_data = {
+        .name = "TMU1",
+        .channel_offset = 0x10,
+        .timer_bit = 1,
+        .clk = "tmu0",
+        .clocksource_rating = 200,
+};
+
+static struct resource tmu1_resources[] = {
+        [0] = {
+                .name   = "TMU1",
+                .start  = 0xffd80014,
+                .end    = 0xffd8001f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 17,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu1_device = {
+        .name           = "sh_tmu",
+        .id             = 1,
+        .dev = {
+                .platform_data  = &tmu1_platform_data,
+        },
+        .resource       = tmu1_resources,
+        .num_resources  = ARRAY_SIZE(tmu1_resources),
+};
+
+static struct sh_timer_config tmu2_platform_data = {
+        .name = "TMU2",
+        .channel_offset = 0x1c,
+        .timer_bit = 2,
+        .clk = "tmu0",
+};
+
+static struct resource tmu2_resources[] = {
+        [0] = {
+                .name   = "TMU2",
+                .start  = 0xffd80020,
+                .end    = 0xffd8002b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 18,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu2_device = {
+        .name           = "sh_tmu",
+        .id             = 2,
+        .dev = {
+                .platform_data  = &tmu2_platform_data,
+        },
+        .resource       = tmu2_resources,
+        .num_resources  = ARRAY_SIZE(tmu2_resources),
+};
+
 static struct plat_sci_port sci_platform_data[] = {
         {
                 .mapbase        = 0xffe00000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
                 .irqs           = { 80, 80, 80, 80 },
+                .clk            = "scif0",
         }, {
                 .flags = 0,
         }
@@ -201,6 +294,9 @@ static struct platform_device sci_device = {
 
 static struct platform_device *sh7366_devices[] __initdata = {
         &cmt_device,
+        &tmu0_device,
+        &tmu1_device,
+        &tmu2_device,
         &iic_device,
         &sci_device,
         &usb_host_device,
@@ -211,12 +307,6 @@ static struct platform_device *sh7366_devices[] __initdata = {
 
 static int __init sh7366_devices_setup(void)
 {
-        clk_always_enable("rsmem0"); /* RSMEM */
-        clk_always_enable("xymem0"); /* XYMEM */
-        clk_always_enable("veu1"); /* VEU-2 */
-        clk_always_enable("veu0"); /* VEU-1 */
-        clk_always_enable("vpu0"); /* VPU */
-
         platform_resource_setup_memory(&vpu_device, "vpu", 2 << 20);
         platform_resource_setup_memory(&veu0_device, "veu0", 2 << 20);
         platform_resource_setup_memory(&veu1_device, "veu1", 2 << 20);
@@ -226,6 +316,19 @@ static int __init sh7366_devices_setup(void)
 }
 __initcall(sh7366_devices_setup);
 
+static struct platform_device *sh7366_early_devices[] __initdata = {
+        &cmt_device,
+        &tmu0_device,
+        &tmu1_device,
+        &tmu2_device,
+};
+
+void __init plat_early_device_setup(void)
+{
+        early_platform_add_devices(sh7366_early_devices,
+                                   ARRAY_SIZE(sh7366_early_devices));
+}
+
 enum {
         UNUSED=0,
 
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
index 406747f07dc0..ea524a2da3e4 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -13,7 +13,7 @@
 #include <linux/serial_sci.h>
 #include <linux/mm.h>
 #include <linux/uio_driver.h>
-#include <linux/sh_cmt.h>
+#include <linux/sh_timer.h>
 #include <asm/clock.h>
 #include <asm/mmzone.h>
 
@@ -177,13 +177,13 @@ static struct platform_device jpu_device = {
         .num_resources  = ARRAY_SIZE(jpu_resources),
 };
 
-static struct sh_cmt_config cmt_platform_data = {
+static struct sh_timer_config cmt_platform_data = {
         .name = "CMT",
         .channel_offset = 0x60,
         .timer_bit = 5,
         .clk = "cmt0",
         .clockevent_rating = 125,
-        .clocksource_rating = 200,
+        .clocksource_rating = 125,
 };
 
 static struct resource cmt_resources[] = {
@@ -209,24 +209,119 @@ static struct platform_device cmt_device = {
         .num_resources  = ARRAY_SIZE(cmt_resources),
 };
 
+static struct sh_timer_config tmu0_platform_data = {
+        .name = "TMU0",
+        .channel_offset = 0x04,
+        .timer_bit = 0,
+        .clk = "tmu0",
+        .clockevent_rating = 200,
+};
+
+static struct resource tmu0_resources[] = {
+        [0] = {
+                .name   = "TMU0",
+                .start  = 0xffd80008,
+                .end    = 0xffd80013,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 16,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu0_device = {
+        .name           = "sh_tmu",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &tmu0_platform_data,
+        },
+        .resource       = tmu0_resources,
+        .num_resources  = ARRAY_SIZE(tmu0_resources),
+};
+
+static struct sh_timer_config tmu1_platform_data = {
+        .name = "TMU1",
+        .channel_offset = 0x10,
+        .timer_bit = 1,
+        .clk = "tmu0",
+        .clocksource_rating = 200,
+};
+
+static struct resource tmu1_resources[] = {
+        [0] = {
+                .name   = "TMU1",
+                .start  = 0xffd80014,
+                .end    = 0xffd8001f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 17,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu1_device = {
+        .name           = "sh_tmu",
+        .id             = 1,
+        .dev = {
+                .platform_data  = &tmu1_platform_data,
+        },
+        .resource       = tmu1_resources,
+        .num_resources  = ARRAY_SIZE(tmu1_resources),
+};
+
+static struct sh_timer_config tmu2_platform_data = {
+        .name = "TMU2",
+        .channel_offset = 0x1c,
+        .timer_bit = 2,
+        .clk = "tmu0",
+};
+
+static struct resource tmu2_resources[] = {
+        [0] = {
+                .name   = "TMU2",
+                .start  = 0xffd80020,
+                .end    = 0xffd8002b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 18,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu2_device = {
+        .name           = "sh_tmu",
+        .id             = 2,
+        .dev = {
+                .platform_data  = &tmu2_platform_data,
+        },
+        .resource       = tmu2_resources,
+        .num_resources  = ARRAY_SIZE(tmu2_resources),
+};
+
 static struct plat_sci_port sci_platform_data[] = {
         {
                 .mapbase        = 0xffe00000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
                 .irqs           = { 80, 80, 80, 80 },
+                .clk            = "scif0",
         },
         {
                 .mapbase        = 0xffe10000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
                 .irqs           = { 81, 81, 81, 81 },
+                .clk            = "scif1",
         },
         {
                 .mapbase        = 0xffe20000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
                 .irqs           = { 82, 82, 82, 82 },
+                .clk            = "scif2",
         },
         {
                 .flags = 0,
@@ -243,6 +338,9 @@ static struct platform_device sci_device = {
 
 static struct platform_device *sh7722_devices[] __initdata = {
         &cmt_device,
+        &tmu0_device,
+        &tmu1_device,
+        &tmu2_device,
         &rtc_device,
         &usbf_device,
         &iic_device,
@@ -254,12 +352,6 @@ static struct platform_device *sh7722_devices[] __initdata = {
 
 static int __init sh7722_devices_setup(void)
 {
-        clk_always_enable("uram0"); /* URAM */
-        clk_always_enable("xymem0"); /* XYMEM */
-        clk_always_enable("veu0"); /* VEU */
-        clk_always_enable("vpu0"); /* VPU */
-        clk_always_enable("jpu0"); /* JPU */
-
         platform_resource_setup_memory(&vpu_device, "vpu", 1 << 20);
         platform_resource_setup_memory(&veu_device, "veu", 2 << 20);
         platform_resource_setup_memory(&jpu_device, "jpu", 2 << 20);
@@ -269,6 +361,19 @@ static int __init sh7722_devices_setup(void)
 }
 __initcall(sh7722_devices_setup);
 
+static struct platform_device *sh7722_early_devices[] __initdata = {
+        &cmt_device,
+        &tmu0_device,
+        &tmu1_device,
+        &tmu2_device,
+};
+
+void __init plat_early_device_setup(void)
+{
+        early_platform_add_devices(sh7722_early_devices,
+                                   ARRAY_SIZE(sh7722_early_devices));
+}
+
 enum {
         UNUSED=0,
 
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
index a800466b938c..d8f4a13aeff9 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7723.c
@@ -13,7 +13,8 @@
 #include <linux/mm.h>
 #include <linux/serial_sci.h>
 #include <linux/uio_driver.h>
-#include <linux/sh_cmt.h>
+#include <linux/sh_timer.h>
+#include <linux/io.h>
 #include <asm/clock.h>
 #include <asm/mmzone.h>
 
@@ -101,13 +102,13 @@ static struct platform_device veu1_device = {
         .num_resources  = ARRAY_SIZE(veu1_resources),
 };
 
-static struct sh_cmt_config cmt_platform_data = {
+static struct sh_timer_config cmt_platform_data = {
         .name = "CMT",
         .channel_offset = 0x60,
         .timer_bit = 5,
         .clk = "cmt0",
         .clockevent_rating = 125,
-        .clocksource_rating = 200,
+        .clocksource_rating = 125,
 };
 
 static struct resource cmt_resources[] = {
@@ -133,37 +134,225 @@ static struct platform_device cmt_device = {
         .num_resources  = ARRAY_SIZE(cmt_resources),
 };
 
+static struct sh_timer_config tmu0_platform_data = {
+        .name = "TMU0",
+        .channel_offset = 0x04,
+        .timer_bit = 0,
+        .clk = "tmu0",
+        .clockevent_rating = 200,
+};
+
+static struct resource tmu0_resources[] = {
+        [0] = {
+                .name   = "TMU0",
+                .start  = 0xffd80008,
+                .end    = 0xffd80013,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 16,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu0_device = {
+        .name           = "sh_tmu",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &tmu0_platform_data,
+        },
+        .resource       = tmu0_resources,
+        .num_resources  = ARRAY_SIZE(tmu0_resources),
+};
+
+static struct sh_timer_config tmu1_platform_data = {
+        .name = "TMU1",
+        .channel_offset = 0x10,
+        .timer_bit = 1,
+        .clk = "tmu0",
+        .clocksource_rating = 200,
+};
+
+static struct resource tmu1_resources[] = {
+        [0] = {
+                .name   = "TMU1",
+                .start  = 0xffd80014,
+                .end    = 0xffd8001f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 17,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu1_device = {
+        .name           = "sh_tmu",
+        .id             = 1,
+        .dev = {
+                .platform_data  = &tmu1_platform_data,
+        },
+        .resource       = tmu1_resources,
+        .num_resources  = ARRAY_SIZE(tmu1_resources),
+};
+
+static struct sh_timer_config tmu2_platform_data = {
+        .name = "TMU2",
+        .channel_offset = 0x1c,
+        .timer_bit = 2,
+        .clk = "tmu0",
+};
+
+static struct resource tmu2_resources[] = {
+        [0] = {
+                .name   = "TMU2",
+                .start  = 0xffd80020,
+                .end    = 0xffd8002b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 18,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu2_device = {
+        .name           = "sh_tmu",
+        .id             = 2,
+        .dev = {
+                .platform_data  = &tmu2_platform_data,
+        },
+        .resource       = tmu2_resources,
+        .num_resources  = ARRAY_SIZE(tmu2_resources),
+};
+
+static struct sh_timer_config tmu3_platform_data = {
+        .name = "TMU3",
+        .channel_offset = 0x04,
+        .timer_bit = 0,
+        .clk = "tmu1",
+};
+
+static struct resource tmu3_resources[] = {
+        [0] = {
+                .name   = "TMU3",
+                .start  = 0xffd90008,
+                .end    = 0xffd90013,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 57,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu3_device = {
+        .name           = "sh_tmu",
+        .id             = 3,
+        .dev = {
+                .platform_data  = &tmu3_platform_data,
+        },
+        .resource       = tmu3_resources,
+        .num_resources  = ARRAY_SIZE(tmu3_resources),
+};
+
+static struct sh_timer_config tmu4_platform_data = {
+        .name = "TMU4",
+        .channel_offset = 0x10,
+        .timer_bit = 1,
+        .clk = "tmu1",
+};
+
+static struct resource tmu4_resources[] = {
+        [0] = {
+                .name   = "TMU4",
+                .start  = 0xffd90014,
+                .end    = 0xffd9001f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 58,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu4_device = {
+        .name           = "sh_tmu",
+        .id             = 4,
+        .dev = {
+                .platform_data  = &tmu4_platform_data,
+        },
+        .resource       = tmu4_resources,
+        .num_resources  = ARRAY_SIZE(tmu4_resources),
+};
+
+static struct sh_timer_config tmu5_platform_data = {
+        .name = "TMU5",
+        .channel_offset = 0x1c,
+        .timer_bit = 2,
+        .clk = "tmu1",
+};
+
+static struct resource tmu5_resources[] = {
+        [0] = {
+                .name   = "TMU5",
+                .start  = 0xffd90020,
+                .end    = 0xffd9002b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 57,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu5_device = {
+        .name           = "sh_tmu",
+        .id             = 5,
+        .dev = {
+                .platform_data  = &tmu5_platform_data,
+        },
+        .resource       = tmu5_resources,
+        .num_resources  = ARRAY_SIZE(tmu5_resources),
+};
+
 static struct plat_sci_port sci_platform_data[] = {
         {
                 .mapbase        = 0xffe00000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
                 .irqs           = { 80, 80, 80, 80 },
+                .clk            = "scif0",
         },{
                 .mapbase        = 0xffe10000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
                 .irqs           = { 81, 81, 81, 81 },
+                .clk            = "scif1",
         },{
                 .mapbase        = 0xffe20000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
                 .irqs           = { 82, 82, 82, 82 },
+                .clk            = "scif2",
         },{
                 .mapbase        = 0xa4e30000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIFA,
                 .irqs           = { 56, 56, 56, 56 },
+                .clk            = "scif3",
         },{
                 .mapbase        = 0xa4e40000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIFA,
                 .irqs           = { 88, 88, 88, 88 },
+                .clk            = "scif4",
         },{
                 .mapbase        = 0xa4e50000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIFA,
                 .irqs           = { 109, 109, 109, 109 },
+                .clk            = "scif5",
         }, {
                 .flags = 0,
         }
@@ -255,6 +444,12 @@ static struct platform_device iic_device = {
 
 static struct platform_device *sh7723_devices[] __initdata = {
         &cmt_device,
+        &tmu0_device,
+        &tmu1_device,
+        &tmu2_device,
+        &tmu3_device,
+        &tmu4_device,
+        &tmu5_device,
         &sci_device,
         &rtc_device,
         &iic_device,
@@ -266,11 +461,6 @@ static struct platform_device *sh7723_devices[] __initdata = {
 
 static int __init sh7723_devices_setup(void)
 {
-        clk_always_enable("meram0"); /* MERAM */
-        clk_always_enable("veu1"); /* VEU2H1 */
-        clk_always_enable("veu0"); /* VEU2H0 */
-        clk_always_enable("vpu0"); /* VPU */
-
         platform_resource_setup_memory(&vpu_device, "vpu", 2 << 20);
         platform_resource_setup_memory(&veu0_device, "veu0", 2 << 20);
         platform_resource_setup_memory(&veu1_device, "veu1", 2 << 20);
@@ -280,6 +470,31 @@ static int __init sh7723_devices_setup(void)
 }
 __initcall(sh7723_devices_setup);
 
+static struct platform_device *sh7723_early_devices[] __initdata = {
+        &cmt_device,
+        &tmu0_device,
+        &tmu1_device,
+        &tmu2_device,
+        &tmu3_device,
+        &tmu4_device,
+        &tmu5_device,
+};
+
+void __init plat_early_device_setup(void)
+{
+        early_platform_add_devices(sh7723_early_devices,
+                                   ARRAY_SIZE(sh7723_early_devices));
+}
+
+#define RAMCR_CACHE_L2FC        0x0002
+#define RAMCR_CACHE_L2E         0x0001
+#define L2_CACHE_ENABLE         (RAMCR_CACHE_L2E|RAMCR_CACHE_L2FC)
+void __uses_jump_to_uncached l2_cache_init(void)
+{
+        /* Enable L2 cache */
+        ctrl_outl(L2_CACHE_ENABLE, RAMCR);
+}
+
 enum {
         UNUSED=0,
 
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7724.c b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
new file mode 100644
index 000000000000..e5ac9eb11c63
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7724.c
@@ -0,0 +1,786 @@
+/*
+ * SH7724 Setup
+ *
+ * Copyright (C) 2009 Renesas Solutions Corp.
+ *
+ * Kuninori Morimoto <morimoto.kuninori@renesas.com>
+ *
+ * Based on SH7723 Setup
+ * Copyright (C) 2008  Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/platform_device.h>
+#include <linux/init.h>
+#include <linux/serial.h>
+#include <linux/mm.h>
+#include <linux/serial_sci.h>
+#include <linux/uio_driver.h>
+#include <linux/sh_timer.h>
+#include <linux/io.h>
+#include <asm/clock.h>
+#include <asm/mmzone.h>
+
+/* Serial */
+static struct plat_sci_port sci_platform_data[] = {
+        {
+                .mapbase        = 0xffe00000,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .type           = PORT_SCIF,
+                .irqs           = { 80, 80, 80, 80 },
+                .clk            = "scif0",
+        }, {
+                .mapbase        = 0xffe10000,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .type           = PORT_SCIF,
+                .irqs           = { 81, 81, 81, 81 },
+                .clk            = "scif1",
+        }, {
+                .mapbase        = 0xffe20000,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .type           = PORT_SCIF,
+                .irqs           = { 82, 82, 82, 82 },
+                .clk            = "scif2",
+        }, {
+                .mapbase        = 0xa4e30000,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .type           = PORT_SCIFA,
+                .irqs           = { 56, 56, 56, 56 },
+                .clk            = "scif3",
+        }, {
+                .mapbase        = 0xa4e40000,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .type           = PORT_SCIFA,
+                .irqs           = { 88, 88, 88, 88 },
+                .clk            = "scif4",
+        }, {
+                .mapbase        = 0xa4e50000,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .type           = PORT_SCIFA,
+                .irqs           = { 109, 109, 109, 109 },
+                .clk            = "scif5",
+        }, {
+                .flags = 0,
+        }
+};
+
+static struct platform_device sci_device = {
+        .name           = "sh-sci",
+        .id             = -1,
+        .dev            = {
+                .platform_data  = sci_platform_data,
+        },
+};
+
+/* RTC */
+static struct resource rtc_resources[] = {
+        [0] = {
+                .start  = 0xa465fec0,
+                .end    = 0xa465fec0 + 0x58 - 1,
+                .flags  = IORESOURCE_IO,
+        },
+        [1] = {
+                /* Period IRQ */
+                .start  = 69,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                /* Carry IRQ */
+                .start  = 70,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [3] = {
+                /* Alarm IRQ */
+                .start  = 68,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device rtc_device = {
+        .name           = "sh-rtc",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(rtc_resources),
+        .resource       = rtc_resources,
+};
+
+/* I2C0 */
+static struct resource iic0_resources[] = {
+        [0] = {
+                .name   = "IIC0",
+                .start  = 0x04470000,
+                .end    = 0x04470018 - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 96,
+                .end    = 99,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device iic0_device = {
+        .name           = "i2c-sh_mobile",
+        .id             = 0, /* "i2c0" clock */
+        .num_resources  = ARRAY_SIZE(iic0_resources),
+        .resource       = iic0_resources,
+};
+
+/* I2C1 */
+static struct resource iic1_resources[] = {
+        [0] = {
+                .name   = "IIC1",
+                .start  = 0x04750000,
+                .end    = 0x04750018 - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 92,
+                .end    = 95,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device iic1_device = {
+        .name           = "i2c-sh_mobile",
+        .id             = 1, /* "i2c1" clock */
+        .num_resources  = ARRAY_SIZE(iic1_resources),
+        .resource       = iic1_resources,
+};
+
+/* VPU */
+static struct uio_info vpu_platform_data = {
+        .name = "VPU5F",
+        .version = "0",
+        .irq = 60,
+};
+
+static struct resource vpu_resources[] = {
+        [0] = {
+                .name   = "VPU",
+                .start  = 0xfe900000,
+                .end    = 0xfe902807,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                /* place holder for contiguous memory */
+        },
+};
+
+static struct platform_device vpu_device = {
+        .name           = "uio_pdrv_genirq",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &vpu_platform_data,
+        },
+        .resource       = vpu_resources,
+        .num_resources  = ARRAY_SIZE(vpu_resources),
+};
+
+/* VEU0 */
+static struct uio_info veu0_platform_data = {
+        .name = "VEU3F0",
+        .version = "0",
+        .irq = 83,
+};
+
+static struct resource veu0_resources[] = {
+        [0] = {
+                .name   = "VEU3F0",
+                .start  = 0xfe920000,
+                .end    = 0xfe9200cb - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                /* place holder for contiguous memory */
+        },
+};
+
+static struct platform_device veu0_device = {
+        .name           = "uio_pdrv_genirq",
+        .id             = 1,
+        .dev = {
+                .platform_data  = &veu0_platform_data,
+        },
+        .resource       = veu0_resources,
+        .num_resources  = ARRAY_SIZE(veu0_resources),
+};
+
+/* VEU1 */
+static struct uio_info veu1_platform_data = {
+        .name = "VEU3F1",
+        .version = "0",
+        .irq = 54,
+};
+
+static struct resource veu1_resources[] = {
+        [0] = {
+                .name   = "VEU3F1",
+                .start  = 0xfe924000,
+                .end    = 0xfe9240cb - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                /* place holder for contiguous memory */
+        },
+};
+
+static struct platform_device veu1_device = {
+        .name           = "uio_pdrv_genirq",
+        .id             = 2,
+        .dev = {
+                .platform_data  = &veu1_platform_data,
+        },
+        .resource       = veu1_resources,
+        .num_resources  = ARRAY_SIZE(veu1_resources),
+};
+
+static struct sh_timer_config cmt_platform_data = {
+        .name = "CMT",
+        .channel_offset = 0x60,
+        .timer_bit = 5,
+        .clk = "cmt0",
+        .clockevent_rating = 125,
+        .clocksource_rating = 200,
+};
+
+static struct resource cmt_resources[] = {
+        [0] = {
+                .name   = "CMT",
+                .start  = 0x044a0060,
+                .end    = 0x044a006b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 104,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device cmt_device = {
+        .name           = "sh_cmt",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &cmt_platform_data,
+        },
+        .resource       = cmt_resources,
+        .num_resources  = ARRAY_SIZE(cmt_resources),
+};
+
+static struct sh_timer_config tmu0_platform_data = {
+        .name = "TMU0",
+        .channel_offset = 0x04,
+        .timer_bit = 0,
+        .clk = "tmu0",
+        .clockevent_rating = 200,
+};
+
+static struct resource tmu0_resources[] = {
+        [0] = {
+                .name   = "TMU0",
+                .start  = 0xffd80008,
+                .end    = 0xffd80013,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 16,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu0_device = {
+        .name           = "sh_tmu",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &tmu0_platform_data,
+        },
+        .resource       = tmu0_resources,
+        .num_resources  = ARRAY_SIZE(tmu0_resources),
+};
+
+static struct sh_timer_config tmu1_platform_data = {
+        .name = "TMU1",
+        .channel_offset = 0x10,
+        .timer_bit = 1,
+        .clk = "tmu0",
+        .clocksource_rating = 200,
+};
+
+static struct resource tmu1_resources[] = {
+        [0] = {
+                .name   = "TMU1",
+                .start  = 0xffd80014,
+                .end    = 0xffd8001f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 17,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu1_device = {
+        .name           = "sh_tmu",
+        .id             = 1,
+        .dev = {
+                .platform_data  = &tmu1_platform_data,
+        },
+        .resource       = tmu1_resources,
+        .num_resources  = ARRAY_SIZE(tmu1_resources),
+};
+
+static struct sh_timer_config tmu2_platform_data = {
+        .name = "TMU2",
+        .channel_offset = 0x1c,
+        .timer_bit = 2,
+        .clk = "tmu0",
+};
+
+static struct resource tmu2_resources[] = {
+        [0] = {
+                .name   = "TMU2",
+                .start  = 0xffd80020,
+                .end    = 0xffd8002b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 18,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu2_device = {
+        .name           = "sh_tmu",
+        .id             = 2,
+        .dev = {
+                .platform_data  = &tmu2_platform_data,
+        },
+        .resource       = tmu2_resources,
+        .num_resources  = ARRAY_SIZE(tmu2_resources),
+};
+
+
+static struct sh_timer_config tmu3_platform_data = {
+        .name = "TMU3",
+        .channel_offset = 0x04,
+        .timer_bit = 0,
+        .clk = "tmu1",
+};
+
+static struct resource tmu3_resources[] = {
+        [0] = {
+                .name   = "TMU3",
+                .start  = 0xffd90008,
+                .end    = 0xffd90013,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 57,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu3_device = {
+        .name           = "sh_tmu",
+        .id             = 3,
+        .dev = {
+                .platform_data  = &tmu3_platform_data,
+        },
+        .resource       = tmu3_resources,
+        .num_resources  = ARRAY_SIZE(tmu3_resources),
+};
+
+static struct sh_timer_config tmu4_platform_data = {
+        .name = "TMU4",
+        .channel_offset = 0x10,
+        .timer_bit = 1,
+        .clk = "tmu1",
+};
+
+static struct resource tmu4_resources[] = {
+        [0] = {
+                .name   = "TMU4",
+                .start  = 0xffd90014,
+                .end    = 0xffd9001f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 58,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu4_device = {
+        .name           = "sh_tmu",
+        .id             = 4,
+        .dev = {
+                .platform_data  = &tmu4_platform_data,
+        },
+        .resource       = tmu4_resources,
+        .num_resources  = ARRAY_SIZE(tmu4_resources),
+};
+
+static struct sh_timer_config tmu5_platform_data = {
+        .name = "TMU5",
+        .channel_offset = 0x1c,
+        .timer_bit = 2,
+        .clk = "tmu1",
+};
+
+static struct resource tmu5_resources[] = {
+        [0] = {
+                .name   = "TMU5",
+                .start  = 0xffd90020,
+                .end    = 0xffd9002b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 57,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu5_device = {
+        .name           = "sh_tmu",
+        .id             = 5,
+        .dev = {
+                .platform_data  = &tmu5_platform_data,
+        },
+        .resource       = tmu5_resources,
+        .num_resources  = ARRAY_SIZE(tmu5_resources),
+};
+
+/* JPU */
+static struct uio_info jpu_platform_data = {
+        .name = "JPU",
+        .version = "0",
+        .irq = 27,
+};
+
+static struct resource jpu_resources[] = {
+        [0] = {
+                .name   = "JPU",
+                .start  = 0xfe980000,
+                .end    = 0xfe9902d3,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                /* place holder for contiguous memory */
+        },
+};
+
+static struct platform_device jpu_device = {
+        .name           = "uio_pdrv_genirq",
+        .id             = 3,
+        .dev = {
+                .platform_data  = &jpu_platform_data,
+        },
+        .resource       = jpu_resources,
+        .num_resources  = ARRAY_SIZE(jpu_resources),
+};
+
+static struct platform_device *sh7724_devices[] __initdata = {
+        &cmt_device,
+        &tmu0_device,
+        &tmu1_device,
+        &tmu2_device,
+        &tmu3_device,
+        &tmu4_device,
+        &tmu5_device,
+        &sci_device,
+        &rtc_device,
+        &iic0_device,
+        &iic1_device,
+        &vpu_device,
+        &veu0_device,
+        &veu1_device,
+        &jpu_device,
+};
+
+static int __init sh7724_devices_setup(void)
+{
+        platform_resource_setup_memory(&vpu_device, "vpu", 2 << 20);
+        platform_resource_setup_memory(&veu0_device, "veu0", 2 << 20);
+        platform_resource_setup_memory(&veu1_device, "veu1", 2 << 20);
+        platform_resource_setup_memory(&jpu_device,  "jpu",  2 << 20);
+
+        return platform_add_devices(sh7724_devices,
+                                    ARRAY_SIZE(sh7724_devices));
+}
+device_initcall(sh7724_devices_setup);
+
+static struct platform_device *sh7724_early_devices[] __initdata = {
+        &cmt_device,
+        &tmu0_device,
+        &tmu1_device,
+        &tmu2_device,
+        &tmu3_device,
+        &tmu4_device,
+        &tmu5_device,
+};
+
+void __init plat_early_device_setup(void)
+{
+        early_platform_add_devices(sh7724_early_devices,
+                                   ARRAY_SIZE(sh7724_early_devices));
+}
+
+#define RAMCR_CACHE_L2FC        0x0002
+#define RAMCR_CACHE_L2E         0x0001
+#define L2_CACHE_ENABLE         (RAMCR_CACHE_L2E|RAMCR_CACHE_L2FC)
+void __uses_jump_to_uncached l2_cache_init(void)
+{
+        /* Enable L2 cache */
+        ctrl_outl(L2_CACHE_ENABLE, RAMCR);
+}
+
+enum {
+        UNUSED = 0,
+
+        /* interrupt sources */
+        IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
+        HUDI,
+        DMAC1A_DEI0, DMAC1A_DEI1, DMAC1A_DEI2, DMAC1A_DEI3,
+        _2DG_TRI, _2DG_INI, _2DG_CEI,
+        DMAC0A_DEI0, DMAC0A_DEI1, DMAC0A_DEI2, DMAC0A_DEI3,
+        VIO_CEU0, VIO_BEU0, VIO_VEU1, VIO_VOU,
+        SCIFA3,
+        VPU,
+        TPU,
+        CEU1,
+        BEU1,
+        USB0, USB1,
+        ATAPI,
+        RTC_ATI, RTC_PRI, RTC_CUI,
+        DMAC1B_DEI4, DMAC1B_DEI5, DMAC1B_DADERR,
+        DMAC0B_DEI4, DMAC0B_DEI5, DMAC0B_DADERR,
+        KEYSC,
+        SCIF_SCIF0, SCIF_SCIF1, SCIF_SCIF2,
+        VEU0,
+        MSIOF_MSIOFI0, MSIOF_MSIOFI1,
+        SPU_SPUI0, SPU_SPUI1,
+        SCIFA4,
+        ICB,
+        ETHI,
+        I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI,
+        I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI,
+        SDHI0_SDHII0, SDHI0_SDHII1, SDHI0_SDHII2, SDHI0_SDHII3,
+        CMT,
+        TSIF,
+        FSI,
+        SCIFA5,
+        TMU0_TUNI0, TMU0_TUNI1, TMU0_TUNI2,
+        IRDA,
+        SDHI1_SDHII0, SDHI1_SDHII1, SDHI1_SDHII2,
+        JPU,
+        _2DDMAC,
+        MMC_MMC2I, MMC_MMC3I,
+        LCDC,
+        TMU1_TUNI0, TMU1_TUNI1, TMU1_TUNI2,
+
+        /* interrupt groups */
+        DMAC1A, _2DG, DMAC0A, VIO, USB, RTC,
+        DMAC1B, DMAC0B, I2C0, I2C1, SDHI0, SDHI1, SPU, MMCIF,
+};
+
+static struct intc_vect vectors[] __initdata = {
+        INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
+        INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
+        INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0),
+        INTC_VECT(IRQ6, 0x6c0), INTC_VECT(IRQ7, 0x6e0),
+
+        INTC_VECT(DMAC1A_DEI0, 0x700),
+        INTC_VECT(DMAC1A_DEI1, 0x720),
+        INTC_VECT(DMAC1A_DEI2, 0x740),
+        INTC_VECT(DMAC1A_DEI3, 0x760),
+
+        INTC_VECT(_2DG_TRI, 0x780),
+        INTC_VECT(_2DG_INI, 0x7A0),
+        INTC_VECT(_2DG_CEI, 0x7C0),
+
+        INTC_VECT(DMAC0A_DEI0, 0x800),
+        INTC_VECT(DMAC0A_DEI1, 0x820),
+        INTC_VECT(DMAC0A_DEI2, 0x840),
+        INTC_VECT(DMAC0A_DEI3, 0x860),
+
+        INTC_VECT(VIO_CEU0, 0x880),
+        INTC_VECT(VIO_BEU0, 0x8A0),
+        INTC_VECT(VIO_VEU1, 0x8C0),
+        INTC_VECT(VIO_VOU,  0x8E0),
+
+        INTC_VECT(SCIFA3, 0x900),
+        INTC_VECT(VPU,    0x980),
+        INTC_VECT(TPU,    0x9A0),
+        INTC_VECT(CEU1,   0x9E0),
+        INTC_VECT(BEU1,   0xA00),
+        INTC_VECT(USB0,   0xA20),
+        INTC_VECT(USB1,   0xA40),
+        INTC_VECT(ATAPI,  0xA60),
+
+        INTC_VECT(RTC_ATI, 0xA80),
+        INTC_VECT(RTC_PRI, 0xAA0),
+        INTC_VECT(RTC_CUI, 0xAC0),
+
+        INTC_VECT(DMAC1B_DEI4, 0xB00),
+        INTC_VECT(DMAC1B_DEI5, 0xB20),
+        INTC_VECT(DMAC1B_DADERR, 0xB40),
+
+        INTC_VECT(DMAC0B_DEI4, 0xB80),
+        INTC_VECT(DMAC0B_DEI5, 0xBA0),
+        INTC_VECT(DMAC0B_DADERR, 0xBC0),
+
+        INTC_VECT(KEYSC,      0xBE0),
+        INTC_VECT(SCIF_SCIF0, 0xC00),
+        INTC_VECT(SCIF_SCIF1, 0xC20),
+        INTC_VECT(SCIF_SCIF2, 0xC40),
+        INTC_VECT(VEU0,       0xC60),
+        INTC_VECT(MSIOF_MSIOFI0, 0xC80),
+        INTC_VECT(MSIOF_MSIOFI1, 0xCA0),
+        INTC_VECT(SPU_SPUI0, 0xCC0),
+        INTC_VECT(SPU_SPUI1, 0xCE0),
+        INTC_VECT(SCIFA4,    0xD00),
+
+        INTC_VECT(ICB,  0xD20),
+        INTC_VECT(ETHI, 0xD60),
+
+        INTC_VECT(I2C1_ALI, 0xD80),
+        INTC_VECT(I2C1_TACKI, 0xDA0),
+        INTC_VECT(I2C1_WAITI, 0xDC0),
+        INTC_VECT(I2C1_DTEI, 0xDE0),
+
+        INTC_VECT(I2C0_ALI, 0xE00),
+        INTC_VECT(I2C0_TACKI, 0xE20),
+        INTC_VECT(I2C0_WAITI, 0xE40),
+        INTC_VECT(I2C0_DTEI, 0xE60),
+
+        INTC_VECT(SDHI0_SDHII0, 0xE80),
+        INTC_VECT(SDHI0_SDHII1, 0xEA0),
+        INTC_VECT(SDHI0_SDHII2, 0xEC0),
+        INTC_VECT(SDHI0_SDHII3, 0xEE0),
+
+        INTC_VECT(CMT,    0xF00),
+        INTC_VECT(TSIF,   0xF20),
+        INTC_VECT(FSI,    0xF80),
+        INTC_VECT(SCIFA5, 0xFA0),
+
+        INTC_VECT(TMU0_TUNI0, 0x400),
+        INTC_VECT(TMU0_TUNI1, 0x420),
+        INTC_VECT(TMU0_TUNI2, 0x440),
+
+        INTC_VECT(IRDA,    0x480),
+
+        INTC_VECT(SDHI1_SDHII0, 0x4E0),
+        INTC_VECT(SDHI1_SDHII1, 0x500),
+        INTC_VECT(SDHI1_SDHII2, 0x520),
+
+        INTC_VECT(JPU, 0x560),
+        INTC_VECT(_2DDMAC, 0x4A0),
+
+        INTC_VECT(MMC_MMC2I, 0x5A0),
+        INTC_VECT(MMC_MMC3I, 0x5C0),
+
+        INTC_VECT(LCDC, 0xF40),
+
+        INTC_VECT(TMU1_TUNI0, 0x920),
+        INTC_VECT(TMU1_TUNI1, 0x940),
+        INTC_VECT(TMU1_TUNI2, 0x960),
+};
+
+static struct intc_group groups[] __initdata = {
+        INTC_GROUP(DMAC1A, DMAC1A_DEI0, DMAC1A_DEI1, DMAC1A_DEI2, DMAC1A_DEI3),
+        INTC_GROUP(_2DG, _2DG_TRI, _2DG_INI, _2DG_CEI),
+        INTC_GROUP(DMAC0A, DMAC0A_DEI0, DMAC0A_DEI1, DMAC0A_DEI2, DMAC0A_DEI3),
+        INTC_GROUP(VIO, VIO_CEU0, VIO_BEU0, VIO_VEU1, VIO_VOU),
+        INTC_GROUP(USB, USB0, USB1),
+        INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),
+        INTC_GROUP(DMAC1B, DMAC1B_DEI4, DMAC1B_DEI5, DMAC1B_DADERR),
+        INTC_GROUP(DMAC0B, DMAC0B_DEI4, DMAC0B_DEI5, DMAC0B_DADERR),
+        INTC_GROUP(I2C0, I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI),
+        INTC_GROUP(I2C1, I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI),
+        INTC_GROUP(SDHI0, SDHI0_SDHII0, SDHI0_SDHII1, SDHI0_SDHII2, SDHI0_SDHII3),
+        INTC_GROUP(SDHI1, SDHI1_SDHII0, SDHI1_SDHII1, SDHI1_SDHII2),
+        INTC_GROUP(SPU, SPU_SPUI0, SPU_SPUI1),
+        INTC_GROUP(MMCIF, MMC_MMC2I, MMC_MMC3I),
+};
+
+static struct intc_mask_reg mask_registers[] __initdata = {
+        { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */
+          { 0, TMU1_TUNI2, TMU1_TUNI1, TMU1_TUNI0,
+            0, SDHI1_SDHII2, SDHI1_SDHII1, SDHI1_SDHII0 } },
+        { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */
+          { VIO_VOU, VIO_VEU1, VIO_BEU0, VIO_CEU0,
+            DMAC0A_DEI3, DMAC0A_DEI2, DMAC0A_DEI1, DMAC0A_DEI0 } },
+        { 0xa4080088, 0xa40800c8, 8, /* IMR2 / IMCR2 */
+          { 0, 0, 0, VPU, ATAPI, ETHI, 0, SCIFA3 } },
+        { 0xa408008c, 0xa40800cc, 8, /* IMR3 / IMCR3 */
+          { DMAC1A_DEI3, DMAC1A_DEI2, DMAC1A_DEI1, DMAC1A_DEI0,
+            SPU_SPUI1, SPU_SPUI0, BEU1, IRDA } },
+        { 0xa4080090, 0xa40800d0, 8, /* IMR4 / IMCR4 */
+          { 0, TMU0_TUNI2, TMU0_TUNI1, TMU0_TUNI0,
+            JPU, 0, 0, LCDC } },
+        { 0xa4080094, 0xa40800d4, 8, /* IMR5 / IMCR5 */
+          { KEYSC, DMAC0B_DADERR, DMAC0B_DEI5, DMAC0B_DEI4,
+            VEU0, SCIF_SCIF2, SCIF_SCIF1, SCIF_SCIF0 } },
+        { 0xa4080098, 0xa40800d8, 8, /* IMR6 / IMCR6 */
+          { 0, 0, ICB, SCIFA4,
+            CEU1, 0, MSIOF_MSIOFI1, MSIOF_MSIOFI0 } },
+        { 0xa408009c, 0xa40800dc, 8, /* IMR7 / IMCR7 */
+          { I2C0_DTEI, I2C0_WAITI, I2C0_TACKI, I2C0_ALI,
+            I2C1_DTEI, I2C1_WAITI, I2C1_TACKI, I2C1_ALI } },
+        { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */
+          { SDHI0_SDHII3, SDHI0_SDHII2, SDHI0_SDHII1, SDHI0_SDHII0,
+            0, 0, SCIFA5, FSI } },
+        { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */
+          { 0, 0, 0, CMT, 0, USB1, USB0, 0 } },
+        { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */
+          { 0, DMAC1B_DADERR, DMAC1B_DEI5, DMAC1B_DEI4,
+            0, RTC_CUI, RTC_PRI, RTC_ATI } },
+        { 0xa40800ac, 0xa40800ec, 8, /* IMR11 / IMCR11 */
+          { 0, _2DG_CEI, _2DG_INI, _2DG_TRI,
+            0, TPU, 0, TSIF } },
+        { 0xa40800b0, 0xa40800f0, 8, /* IMR12 / IMCR12 */
+          { 0, 0, MMC_MMC3I, MMC_MMC2I, 0, 0, 0, _2DDMAC } },
+        { 0xa4140044, 0xa4140064, 8, /* INTMSK00 / INTMSKCLR00 */
+          { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
+};
+
+static struct intc_prio_reg prio_registers[] __initdata = {
+        { 0xa4080000, 0, 16, 4, /* IPRA */ { TMU0_TUNI0, TMU0_TUNI1,
+                                             TMU0_TUNI2, IRDA } },
+        { 0xa4080004, 0, 16, 4, /* IPRB */ { JPU, LCDC, DMAC1A, BEU1 } },
+        { 0xa4080008, 0, 16, 4, /* IPRC */ { TMU1_TUNI0, TMU1_TUNI1,
+                                             TMU1_TUNI2, SPU } },
+        { 0xa408000c, 0, 16, 4, /* IPRD */ { 0, MMCIF, 0, ATAPI } },
+        { 0xa4080010, 0, 16, 4, /* IPRE */ { DMAC0A, VIO, SCIFA3, VPU } },
+        { 0xa4080014, 0, 16, 4, /* IPRF */ { KEYSC, DMAC0B, USB, CMT } },
+        { 0xa4080018, 0, 16, 4, /* IPRG */ { SCIF_SCIF0, SCIF_SCIF1,
+                                             SCIF_SCIF2, VEU0 } },
+        { 0xa408001c, 0, 16, 4, /* IPRH */ { MSIOF_MSIOFI0, MSIOF_MSIOFI1,
+                                             I2C1, I2C0 } },
+        { 0xa4080020, 0, 16, 4, /* IPRI */ { SCIFA4, ICB, TSIF, _2DG } },
+        { 0xa4080024, 0, 16, 4, /* IPRJ */ { CEU1, ETHI, FSI, SDHI1 } },
+        { 0xa4080028, 0, 16, 4, /* IPRK */ { RTC, DMAC1B, 0, SDHI0 } },
+        { 0xa408002c, 0, 16, 4, /* IPRL */ { SCIFA5, 0, TPU, _2DDMAC } },
+        { 0xa4140010, 0, 32, 4, /* INTPRI00 */
+          { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
+};
+
+static struct intc_sense_reg sense_registers[] __initdata = {
+        { 0xa414001c, 16, 2, /* ICR1 */
+          { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
+};
+
+static struct intc_mask_reg ack_registers[] __initdata = {
+        { 0xa4140024, 0, 8, /* INTREQ00 */
+          { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
+};
+
+static DECLARE_INTC_DESC_ACK(intc_desc, "sh7724", vectors, groups,
+                             mask_registers, prio_registers, sense_registers,
+                             ack_registers);
+
+void __init plat_irq_setup(void)
+{
+        register_intc_controller(&intc_desc);
+}
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
index bdf0f61ae1ed..f1e0c0d36da7 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
@@ -12,6 +12,7 @@
 #include <linux/platform_device.h>
 #include <linux/init.h>
 #include <linux/serial.h>
+#include <linux/sh_timer.h>
 #include <linux/io.h>
 #include <linux/serial_sci.h>
 
@@ -113,7 +114,195 @@ static struct platform_device usbf_device = {
         .resource       = usbf_resources,
 };
 
+static struct sh_timer_config tmu0_platform_data = {
+        .name = "TMU0",
+        .channel_offset = 0x04,
+        .timer_bit = 0,
+        .clk = "peripheral_clk",
+        .clockevent_rating = 200,
+};
+
+static struct resource tmu0_resources[] = {
+        [0] = {
+                .name   = "TMU0",
+                .start  = 0xffd80008,
+                .end    = 0xffd80013,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 28,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu0_device = {
+        .name           = "sh_tmu",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &tmu0_platform_data,
+        },
+        .resource       = tmu0_resources,
+        .num_resources  = ARRAY_SIZE(tmu0_resources),
+};
+
+static struct sh_timer_config tmu1_platform_data = {
+        .name = "TMU1",
+        .channel_offset = 0x10,
+        .timer_bit = 1,
+        .clk = "peripheral_clk",
+        .clocksource_rating = 200,
+};
+
+static struct resource tmu1_resources[] = {
+        [0] = {
+                .name   = "TMU1",
+                .start  = 0xffd80014,
+                .end    = 0xffd8001f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 29,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu1_device = {
+        .name           = "sh_tmu",
+        .id             = 1,
+        .dev = {
+                .platform_data  = &tmu1_platform_data,
+        },
+        .resource       = tmu1_resources,
+        .num_resources  = ARRAY_SIZE(tmu1_resources),
+};
+
+static struct sh_timer_config tmu2_platform_data = {
+        .name = "TMU2",
+        .channel_offset = 0x1c,
+        .timer_bit = 2,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu2_resources[] = {
+        [0] = {
+                .name   = "TMU2",
+                .start  = 0xffd80020,
+                .end    = 0xffd8002f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 30,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu2_device = {
+        .name           = "sh_tmu",
+        .id             = 2,
+        .dev = {
+                .platform_data  = &tmu2_platform_data,
+        },
+        .resource       = tmu2_resources,
+        .num_resources  = ARRAY_SIZE(tmu2_resources),
+};
+
+static struct sh_timer_config tmu3_platform_data = {
+        .name = "TMU3",
+        .channel_offset = 0x04,
+        .timer_bit = 0,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu3_resources[] = {
+        [0] = {
+                .name   = "TMU3",
+                .start  = 0xffd88008,
+                .end    = 0xffd88013,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 96,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu3_device = {
+        .name           = "sh_tmu",
+        .id             = 3,
+        .dev = {
+                .platform_data  = &tmu3_platform_data,
+        },
+        .resource       = tmu3_resources,
+        .num_resources  = ARRAY_SIZE(tmu3_resources),
+};
+
+static struct sh_timer_config tmu4_platform_data = {
+        .name = "TMU4",
+        .channel_offset = 0x10,
+        .timer_bit = 1,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu4_resources[] = {
+        [0] = {
+                .name   = "TMU4",
+                .start  = 0xffd88014,
+                .end    = 0xffd8801f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 97,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu4_device = {
+        .name           = "sh_tmu",
+        .id             = 4,
+        .dev = {
+                .platform_data  = &tmu4_platform_data,
+        },
+        .resource       = tmu4_resources,
+        .num_resources  = ARRAY_SIZE(tmu4_resources),
+};
+
+static struct sh_timer_config tmu5_platform_data = {
+        .name = "TMU5",
+        .channel_offset = 0x1c,
+        .timer_bit = 2,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu5_resources[] = {
+        [0] = {
+                .name   = "TMU5",
+                .start  = 0xffd88020,
+                .end    = 0xffd8802b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 98,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu5_device = {
+        .name           = "sh_tmu",
+        .id             = 5,
+        .dev = {
+                .platform_data  = &tmu5_platform_data,
+        },
+        .resource       = tmu5_resources,
+        .num_resources  = ARRAY_SIZE(tmu5_resources),
+};
+
 static struct platform_device *sh7763_devices[] __initdata = {
+        &tmu0_device,
+        &tmu1_device,
+        &tmu2_device,
+        &tmu3_device,
+        &tmu4_device,
+        &tmu5_device,
         &rtc_device,
         &sci_device,
         &usb_ohci_device,
@@ -127,6 +316,21 @@ static int __init sh7763_devices_setup(void)
 }
 __initcall(sh7763_devices_setup);
 
+static struct platform_device *sh7763_early_devices[] __initdata = {
+        &tmu0_device,
+        &tmu1_device,
+        &tmu2_device,
+        &tmu3_device,
+        &tmu4_device,
+        &tmu5_device,
+};
+
+void __init plat_early_device_setup(void)
+{
+        early_platform_add_devices(sh7763_early_devices,
+                                   ARRAY_SIZE(sh7763_early_devices));
+}
+
 enum {
         UNUSED = 0,
 
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
index b73578ee295d..1e86209db284 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7770.c
@@ -11,6 +11,8 @@
 #include <linux/init.h>
 #include <linux/serial.h>
 #include <linux/serial_sci.h>
+#include <linux/sh_timer.h>
+#include <linux/io.h>
 
 static struct plat_sci_port sci_platform_data[] = {
         {
@@ -76,7 +78,288 @@ static struct platform_device sci_device = {
         },
 };
 
+static struct sh_timer_config tmu0_platform_data = {
+        .name = "TMU0",
+        .channel_offset = 0x04,
+        .timer_bit = 0,
+        .clk = "peripheral_clk",
+        .clockevent_rating = 200,
+};
+
+static struct resource tmu0_resources[] = {
+        [0] = {
+                .name   = "TMU0",
+                .start  = 0xffd80008,
+                .end    = 0xffd80013,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 16,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu0_device = {
+        .name           = "sh_tmu",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &tmu0_platform_data,
+        },
+        .resource       = tmu0_resources,
+        .num_resources  = ARRAY_SIZE(tmu0_resources),
+};
+
+static struct sh_timer_config tmu1_platform_data = {
+        .name = "TMU1",
+        .channel_offset = 0x10,
+        .timer_bit = 1,
+        .clk = "peripheral_clk",
+        .clocksource_rating = 200,
+};
+
+static struct resource tmu1_resources[] = {
+        [0] = {
+                .name   = "TMU1",
+                .start  = 0xffd80014,
+                .end    = 0xffd8001f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 17,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu1_device = {
+        .name           = "sh_tmu",
+        .id             = 1,
+        .dev = {
+                .platform_data  = &tmu1_platform_data,
+        },
+        .resource       = tmu1_resources,
+        .num_resources  = ARRAY_SIZE(tmu1_resources),
+};
+
+static struct sh_timer_config tmu2_platform_data = {
+        .name = "TMU2",
+        .channel_offset = 0x1c,
+        .timer_bit = 2,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu2_resources[] = {
+        [0] = {
+                .name   = "TMU2",
+                .start  = 0xffd80020,
+                .end    = 0xffd8002f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 18,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu2_device = {
+        .name           = "sh_tmu",
+        .id             = 2,
+        .dev = {
+                .platform_data  = &tmu2_platform_data,
+        },
+        .resource       = tmu2_resources,
+        .num_resources  = ARRAY_SIZE(tmu2_resources),
+};
+
+static struct sh_timer_config tmu3_platform_data = {
+        .name = "TMU3",
+        .channel_offset = 0x04,
+        .timer_bit = 0,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu3_resources[] = {
+        [0] = {
+                .name   = "TMU3",
+                .start  = 0xffd81008,
+                .end    = 0xffd81013,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 19,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu3_device = {
+        .name           = "sh_tmu",
+        .id             = 3,
+        .dev = {
+                .platform_data  = &tmu3_platform_data,
+        },
+        .resource       = tmu3_resources,
+        .num_resources  = ARRAY_SIZE(tmu3_resources),
+};
+
+static struct sh_timer_config tmu4_platform_data = {
+        .name = "TMU4",
+        .channel_offset = 0x10,
+        .timer_bit = 1,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu4_resources[] = {
+        [0] = {
+                .name   = "TMU4",
+                .start  = 0xffd81014,
+                .end    = 0xffd8101f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 20,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu4_device = {
+        .name           = "sh_tmu",
+        .id             = 4,
+        .dev = {
+                .platform_data  = &tmu4_platform_data,
+        },
+        .resource       = tmu4_resources,
+        .num_resources  = ARRAY_SIZE(tmu4_resources),
+};
+
+static struct sh_timer_config tmu5_platform_data = {
+        .name = "TMU5",
+        .channel_offset = 0x1c,
+        .timer_bit = 2,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu5_resources[] = {
+        [0] = {
+                .name   = "TMU5",
+                .start  = 0xffd81020,
+                .end    = 0xffd8102f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 21,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu5_device = {
+        .name           = "sh_tmu",
+        .id             = 5,
+        .dev = {
+                .platform_data  = &tmu5_platform_data,
+        },
+        .resource       = tmu5_resources,
+        .num_resources  = ARRAY_SIZE(tmu5_resources),
+};
+
+static struct sh_timer_config tmu6_platform_data = {
+        .name = "TMU6",
+        .channel_offset = 0x04,
+        .timer_bit = 0,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu6_resources[] = {
+        [0] = {
+                .name   = "TMU6",
+                .start  = 0xffd82008,
+                .end    = 0xffd82013,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 22,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu6_device = {
+        .name           = "sh_tmu",
+        .id             = 6,
+        .dev = {
+                .platform_data  = &tmu6_platform_data,
+        },
+        .resource       = tmu6_resources,
+        .num_resources  = ARRAY_SIZE(tmu6_resources),
+};
+
+static struct sh_timer_config tmu7_platform_data = {
+        .name = "TMU7",
+        .channel_offset = 0x10,
+        .timer_bit = 1,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu7_resources[] = {
+        [0] = {
+                .name   = "TMU7",
+                .start  = 0xffd82014,
+                .end    = 0xffd8201f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 23,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu7_device = {
+        .name           = "sh_tmu",
+        .id             = 7,
+        .dev = {
+                .platform_data  = &tmu7_platform_data,
+        },
+        .resource       = tmu7_resources,
+        .num_resources  = ARRAY_SIZE(tmu7_resources),
+};
+
+static struct sh_timer_config tmu8_platform_data = {
+        .name = "TMU8",
+        .channel_offset = 0x1c,
+        .timer_bit = 2,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu8_resources[] = {
+        [0] = {
+                .name   = "TMU8",
+                .start  = 0xffd82020,
+                .end    = 0xffd8202b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 24,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu8_device = {
+        .name           = "sh_tmu",
+        .id             = 8,
+        .dev = {
+                .platform_data  = &tmu8_platform_data,
+        },
+        .resource       = tmu8_resources,
+        .num_resources  = ARRAY_SIZE(tmu8_resources),
+};
+
 static struct platform_device *sh7770_devices[] __initdata = {
+        &tmu0_device,
+        &tmu1_device,
+        &tmu2_device,
+        &tmu3_device,
+        &tmu4_device,
+        &tmu5_device,
+        &tmu6_device,
+        &tmu7_device,
+        &tmu8_device,
         &sci_device,
 };
 
@@ -87,6 +370,269 @@ static int __init sh7770_devices_setup(void)
 }
 __initcall(sh7770_devices_setup);
 
+static struct platform_device *sh7770_early_devices[] __initdata = {
+        &tmu0_device,
+        &tmu1_device,
+        &tmu2_device,
+        &tmu3_device,
+        &tmu4_device,
+        &tmu5_device,
+        &tmu6_device,
+        &tmu7_device,
+        &tmu8_device,
+};
+
+void __init plat_early_device_setup(void)
+{
+        early_platform_add_devices(sh7770_early_devices,
+                                   ARRAY_SIZE(sh7770_early_devices));
+}
+
+enum {
+        UNUSED = 0,
+
+        /* interrupt sources */
+        IRL_LLLL, IRL_LLLH, IRL_LLHL, IRL_LLHH,
+        IRL_LHLL, IRL_LHLH, IRL_LHHL, IRL_LHHH,
+        IRL_HLLL, IRL_HLLH, IRL_HLHL, IRL_HLHH,
+        IRL_HHLL, IRL_HHLH, IRL_HHHL,
+
+        IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
+
+        GPIO,
+        TMU0, TMU1, TMU2, TMU2_TICPI,
+        TMU3, TMU4, TMU5, TMU5_TICPI,
+        TMU6, TMU7, TMU8,
+        HAC, IPI, SPDIF, HUDI, I2C,
+        DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2,
+        I2S0, I2S1, I2S2, I2S3,
+        SRC_RX, SRC_TX, SRC_SPDIF,
+        DU, VIDEO_IN, REMOTE, YUV, USB, ATAPI, CAN, GPS, GFX2D,
+        GFX3D_MBX, GFX3D_DMAC,
+        EXBUS_ATA,
+        SPI0, SPI1,
+        SCIF089, SCIF1234, SCIF567,
+        ADC,
+        BBDMAC_0_3, BBDMAC_4_7, BBDMAC_8_10, BBDMAC_11_14,
+        BBDMAC_15_18, BBDMAC_19_22, BBDMAC_23_26, BBDMAC_27,
+        BBDMAC_28, BBDMAC_29, BBDMAC_30, BBDMAC_31,
+
+        /* interrupt groups */
+        TMU, DMAC, I2S, SRC, GFX3D, SPI, SCIF, BBDMAC,
+};
+
+static struct intc_vect vectors[] __initdata = {
+        INTC_VECT(GPIO, 0x3e0),
+        INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
+        INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2_TICPI, 0x460),
+        INTC_VECT(TMU3, 0x480), INTC_VECT(TMU4, 0x4a0),
+        INTC_VECT(TMU5, 0x4c0), INTC_VECT(TMU5_TICPI, 0x4e0),
+        INTC_VECT(TMU6, 0x500), INTC_VECT(TMU7, 0x520),
+        INTC_VECT(TMU8, 0x540),
+        INTC_VECT(HAC, 0x580), INTC_VECT(IPI, 0x5c0),
+        INTC_VECT(SPDIF, 0x5e0),
+        INTC_VECT(HUDI, 0x600), INTC_VECT(I2C, 0x620),
+        INTC_VECT(DMAC0_DMINT0, 0x640), INTC_VECT(DMAC0_DMINT1, 0x660),
+        INTC_VECT(DMAC0_DMINT2, 0x680),
+        INTC_VECT(I2S0, 0x6a0), INTC_VECT(I2S1, 0x6c0),
+        INTC_VECT(I2S2, 0x6e0), INTC_VECT(I2S3, 0x700),
+        INTC_VECT(SRC_RX, 0x720), INTC_VECT(SRC_TX, 0x740),
+        INTC_VECT(SRC_SPDIF, 0x760),
+        INTC_VECT(DU, 0x780), INTC_VECT(VIDEO_IN, 0x7a0),
+        INTC_VECT(REMOTE, 0x7c0), INTC_VECT(YUV, 0x7e0),
+        INTC_VECT(USB, 0x840), INTC_VECT(ATAPI, 0x860),
+        INTC_VECT(CAN, 0x880), INTC_VECT(GPS, 0x8a0),
+        INTC_VECT(GFX2D, 0x8c0),
+        INTC_VECT(GFX3D_MBX, 0x900), INTC_VECT(GFX3D_DMAC, 0x920),
+        INTC_VECT(EXBUS_ATA, 0x940),
+        INTC_VECT(SPI0, 0x960), INTC_VECT(SPI1, 0x980),
+        INTC_VECT(SCIF089, 0x9a0), INTC_VECT(SCIF1234, 0x9c0),
+        INTC_VECT(SCIF1234, 0x9e0), INTC_VECT(SCIF1234, 0xa00),
+        INTC_VECT(SCIF1234, 0xa20), INTC_VECT(SCIF567, 0xa40),
+        INTC_VECT(SCIF567, 0xa60), INTC_VECT(SCIF567, 0xa80),
+        INTC_VECT(SCIF089, 0xaa0), INTC_VECT(SCIF089, 0xac0),
+        INTC_VECT(ADC, 0xb20),
+        INTC_VECT(BBDMAC_0_3, 0xba0), INTC_VECT(BBDMAC_0_3, 0xbc0),
+        INTC_VECT(BBDMAC_0_3, 0xbe0), INTC_VECT(BBDMAC_0_3, 0xc00),
+        INTC_VECT(BBDMAC_4_7, 0xc20), INTC_VECT(BBDMAC_4_7, 0xc40),
+        INTC_VECT(BBDMAC_4_7, 0xc60), INTC_VECT(BBDMAC_4_7, 0xc80),
+        INTC_VECT(BBDMAC_8_10, 0xca0), INTC_VECT(BBDMAC_8_10, 0xcc0),
+        INTC_VECT(BBDMAC_8_10, 0xce0), INTC_VECT(BBDMAC_11_14, 0xd00),
+        INTC_VECT(BBDMAC_11_14, 0xd20), INTC_VECT(BBDMAC_11_14, 0xd40),
+        INTC_VECT(BBDMAC_11_14, 0xd60), INTC_VECT(BBDMAC_15_18, 0xd80),
+        INTC_VECT(BBDMAC_15_18, 0xda0), INTC_VECT(BBDMAC_15_18, 0xdc0),
+        INTC_VECT(BBDMAC_15_18, 0xde0), INTC_VECT(BBDMAC_19_22, 0xe00),
+        INTC_VECT(BBDMAC_19_22, 0xe20), INTC_VECT(BBDMAC_19_22, 0xe40),
+        INTC_VECT(BBDMAC_19_22, 0xe60), INTC_VECT(BBDMAC_23_26, 0xe80),
+        INTC_VECT(BBDMAC_23_26, 0xea0), INTC_VECT(BBDMAC_23_26, 0xec0),
+        INTC_VECT(BBDMAC_23_26, 0xee0), INTC_VECT(BBDMAC_27, 0xf00),
+        INTC_VECT(BBDMAC_28, 0xf20), INTC_VECT(BBDMAC_29, 0xf40),
+        INTC_VECT(BBDMAC_30, 0xf60), INTC_VECT(BBDMAC_31, 0xf80),
+};
+
+static struct intc_group groups[] __initdata = {
+        INTC_GROUP(TMU, TMU0, TMU1, TMU2, TMU2_TICPI, TMU3, TMU4, TMU5,
+                   TMU5_TICPI, TMU6, TMU7, TMU8),
+        INTC_GROUP(DMAC, DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2),
+        INTC_GROUP(I2S, I2S0, I2S1, I2S2, I2S3),
+        INTC_GROUP(SRC, SRC_RX, SRC_TX, SRC_SPDIF),
+        INTC_GROUP(GFX3D, GFX3D_MBX, GFX3D_DMAC),
+        INTC_GROUP(SPI, SPI0, SPI1),
+        INTC_GROUP(SCIF, SCIF089, SCIF1234, SCIF567),
+        INTC_GROUP(BBDMAC,
+                   BBDMAC_0_3, BBDMAC_4_7, BBDMAC_8_10, BBDMAC_11_14,
+                   BBDMAC_15_18, BBDMAC_19_22, BBDMAC_23_26, BBDMAC_27,
+                   BBDMAC_28, BBDMAC_29, BBDMAC_30, BBDMAC_31),
+};
+
+static struct intc_mask_reg mask_registers[] __initdata = {
+        { 0xffe00040, 0xffe00044, 32, /* INT2MSKR / INT2MSKCR */
+          { 0, BBDMAC, ADC, SCIF, SPI, EXBUS_ATA, GFX3D, GFX2D,
+            GPS, CAN, ATAPI, USB, YUV, REMOTE, VIDEO_IN, DU, SRC, I2S,
+            DMAC, I2C, HUDI, SPDIF, IPI, HAC, TMU, GPIO } },
+};
+
+static struct intc_prio_reg prio_registers[] __initdata = {
+        { 0xffe00000, 0, 32, 8, /* INT2PRI0 */ { GPIO, TMU0, 0, HAC } },
+        { 0xffe00004, 0, 32, 8, /* INT2PRI1 */ { IPI, SPDIF, HUDI, I2C } },
+        { 0xffe00008, 0, 32, 8, /* INT2PRI2 */ { DMAC, I2S, SRC, DU } },
+        { 0xffe0000c, 0, 32, 8, /* INT2PRI3 */ { VIDEO_IN, REMOTE, YUV, USB } },
+        { 0xffe00010, 0, 32, 8, /* INT2PRI4 */ { ATAPI, CAN, GPS, GFX2D } },
+        { 0xffe00014, 0, 32, 8, /* INT2PRI5 */ { 0, GFX3D, EXBUS_ATA, SPI } },
+        { 0xffe00018, 0, 32, 8, /* INT2PRI6 */ { SCIF1234, SCIF567, SCIF089 } },
+        { 0xffe0001c, 0, 32, 8, /* INT2PRI7 */ { ADC, 0, 0, BBDMAC_0_3 } },
+        { 0xffe00020, 0, 32, 8, /* INT2PRI8 */
+          { BBDMAC_4_7, BBDMAC_8_10, BBDMAC_11_14, BBDMAC_15_18 } },
+        { 0xffe00024, 0, 32, 8, /* INT2PRI9 */
+          { BBDMAC_19_22, BBDMAC_23_26, BBDMAC_27, BBDMAC_28 } },
+        { 0xffe00028, 0, 32, 8, /* INT2PRI10 */
+          { BBDMAC_29, BBDMAC_30, BBDMAC_31 } },
+        { 0xffe0002c, 0, 32, 8, /* INT2PRI11 */
+          { TMU1, TMU2, TMU2_TICPI, TMU3 } },
+        { 0xffe00030, 0, 32, 8, /* INT2PRI12 */
+          { TMU4, TMU5, TMU5_TICPI, TMU6 } },
+        { 0xffe00034, 0, 32, 8, /* INT2PRI13 */
+          { TMU7, TMU8 } },
+};
+
+static DECLARE_INTC_DESC(intc_desc, "sh7770", vectors, groups,
+                         mask_registers, prio_registers, NULL);
+
+/* Support for external interrupt pins in IRQ mode */
+static struct intc_vect irq_vectors[] __initdata = {
+        INTC_VECT(IRQ0, 0x240), INTC_VECT(IRQ1, 0x280),
+        INTC_VECT(IRQ2, 0x2c0), INTC_VECT(IRQ3, 0x300),
+        INTC_VECT(IRQ4, 0x340), INTC_VECT(IRQ5, 0x380),
+};
+
+static struct intc_mask_reg irq_mask_registers[] __initdata = {
+        { 0xffd00044, 0xffd00064, 32, /* INTMSK0 / INTMSKCLR0 */
+          { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, } },
+};
+
+static struct intc_prio_reg irq_prio_registers[] __initdata = {
+        { 0xffd00010, 0, 32, 4, /* INTPRI */ { IRQ0, IRQ1, IRQ2, IRQ3,
+                                               IRQ4, IRQ5, } },
+};
+
+static struct intc_sense_reg irq_sense_registers[] __initdata = {
+        { 0xffd0001c, 32, 2, /* ICR1 */   { IRQ0, IRQ1, IRQ2, IRQ3,
+                                            IRQ4, IRQ5, } },
+};
+
+static DECLARE_INTC_DESC(intc_irq_desc, "sh7770-irq", irq_vectors,
+                         NULL, irq_mask_registers, irq_prio_registers,
+                         irq_sense_registers);
+
+/* External interrupt pins in IRL mode */
+static struct intc_vect irl_vectors[] __initdata = {
+        INTC_VECT(IRL_LLLL, 0x200), INTC_VECT(IRL_LLLH, 0x220),
+        INTC_VECT(IRL_LLHL, 0x240), INTC_VECT(IRL_LLHH, 0x260),
+        INTC_VECT(IRL_LHLL, 0x280), INTC_VECT(IRL_LHLH, 0x2a0),
+        INTC_VECT(IRL_LHHL, 0x2c0), INTC_VECT(IRL_LHHH, 0x2e0),
+        INTC_VECT(IRL_HLLL, 0x300), INTC_VECT(IRL_HLLH, 0x320),
+        INTC_VECT(IRL_HLHL, 0x340), INTC_VECT(IRL_HLHH, 0x360),
+        INTC_VECT(IRL_HHLL, 0x380), INTC_VECT(IRL_HHLH, 0x3a0),
+        INTC_VECT(IRL_HHHL, 0x3c0),
+};
+
+static struct intc_mask_reg irl3210_mask_registers[] __initdata = {
+        { 0xffd40080, 0xffd40084, 32, /* INTMSK2 / INTMSKCLR2 */
+          { IRL_LLLL, IRL_LLLH, IRL_LLHL, IRL_LLHH,
+            IRL_LHLL, IRL_LHLH, IRL_LHHL, IRL_LHHH,
+            IRL_HLLL, IRL_HLLH, IRL_HLHL, IRL_HLHH,
+            IRL_HHLL, IRL_HHLH, IRL_HHHL, } },
+};
+
+static struct intc_mask_reg irl7654_mask_registers[] __initdata = {
+        { 0xffd40080, 0xffd40084, 32, /* INTMSK2 / INTMSKCLR2 */
+          { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+            IRL_LLLL, IRL_LLLH, IRL_LLHL, IRL_LLHH,
+            IRL_LHLL, IRL_LHLH, IRL_LHHL, IRL_LHHH,
+            IRL_HLLL, IRL_HLLH, IRL_HLHL, IRL_HLHH,
+            IRL_HHLL, IRL_HHLH, IRL_HHHL, } },
+};
+
+static DECLARE_INTC_DESC(intc_irl7654_desc, "sh7780-irl7654", irl_vectors,
+                         NULL, irl7654_mask_registers, NULL, NULL);
+
+static DECLARE_INTC_DESC(intc_irl3210_desc, "sh7780-irl3210", irl_vectors,
+                         NULL, irl3210_mask_registers, NULL, NULL);
+
+#define INTC_ICR0       0xffd00000
+#define INTC_INTMSK0    0xffd00044
+#define INTC_INTMSK1    0xffd00048
+#define INTC_INTMSK2    0xffd40080
+#define INTC_INTMSKCLR1 0xffd00068
+#define INTC_INTMSKCLR2 0xffd40084
+
 void __init plat_irq_setup(void)
 {
+        /* disable IRQ7-0 */
+        ctrl_outl(0xff000000, INTC_INTMSK0);
+
+        /* disable IRL3-0 + IRL7-4 */
+        ctrl_outl(0xc0000000, INTC_INTMSK1);
+        ctrl_outl(0xfffefffe, INTC_INTMSK2);
+
+        /* select IRL mode for IRL3-0 + IRL7-4 */
+        ctrl_outl(ctrl_inl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
+
+        /* disable holding function, ie enable "SH-4 Mode" */
+        ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00200000, INTC_ICR0);
+
+        register_intc_controller(&intc_desc);
+}
+
+void __init plat_irq_setup_pins(int mode)
+{
+        switch (mode) {
+        case IRQ_MODE_IRQ:
+                /* select IRQ mode for IRL3-0 + IRL7-4 */
+                ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00c00000, INTC_ICR0);
+                register_intc_controller(&intc_irq_desc);
+                break;
+        case IRQ_MODE_IRL7654:
+                /* enable IRL7-4 but don't provide any masking */
+                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
+                ctrl_outl(0x0000fffe, INTC_INTMSKCLR2);
+                break;
+        case IRQ_MODE_IRL3210:
+                /* enable IRL0-3 but don't provide any masking */
+                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
+                ctrl_outl(0xfffe0000, INTC_INTMSKCLR2);
+                break;
+        case IRQ_MODE_IRL7654_MASK:
+                /* enable IRL7-4 and mask using cpu intc controller */
+                ctrl_outl(0x40000000, INTC_INTMSKCLR1);
+                register_intc_controller(&intc_irl7654_desc);
+                break;
+        case IRQ_MODE_IRL3210_MASK:
+                /* enable IRL0-3 and mask using cpu intc controller */
+                ctrl_outl(0x80000000, INTC_INTMSKCLR1);
+                register_intc_controller(&intc_irl3210_desc);
+                break;
+        default:
+                BUG();
+        }
 }
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
index 6f7227cd65bf..715e05b431e5 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
@@ -12,6 +12,189 @@
 #include <linux/serial.h>
 #include <linux/io.h>
 #include <linux/serial_sci.h>
+#include <linux/sh_timer.h>
+
+static struct sh_timer_config tmu0_platform_data = {
+        .name = "TMU0",
+        .channel_offset = 0x04,
+        .timer_bit = 0,
+        .clk = "peripheral_clk",
+        .clockevent_rating = 200,
+};
+
+static struct resource tmu0_resources[] = {
+        [0] = {
+                .name   = "TMU0",
+                .start  = 0xffd80008,
+                .end    = 0xffd80013,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 28,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu0_device = {
+        .name           = "sh_tmu",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &tmu0_platform_data,
+        },
+        .resource       = tmu0_resources,
+        .num_resources  = ARRAY_SIZE(tmu0_resources),
+};
+
+static struct sh_timer_config tmu1_platform_data = {
+        .name = "TMU1",
+        .channel_offset = 0x10,
+        .timer_bit = 1,
+        .clk = "peripheral_clk",
+        .clocksource_rating = 200,
+};
+
+static struct resource tmu1_resources[] = {
+        [0] = {
+                .name   = "TMU1",
+                .start  = 0xffd80014,
+                .end    = 0xffd8001f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 29,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu1_device = {
+        .name           = "sh_tmu",
+        .id             = 1,
+        .dev = {
+                .platform_data  = &tmu1_platform_data,
+        },
+        .resource       = tmu1_resources,
+        .num_resources  = ARRAY_SIZE(tmu1_resources),
+};
+
+static struct sh_timer_config tmu2_platform_data = {
+        .name = "TMU2",
+        .channel_offset = 0x1c,
+        .timer_bit = 2,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu2_resources[] = {
+        [0] = {
+                .name   = "TMU2",
+                .start  = 0xffd80020,
+                .end    = 0xffd8002f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 30,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu2_device = {
+        .name           = "sh_tmu",
+        .id             = 2,
+        .dev = {
+                .platform_data  = &tmu2_platform_data,
+        },
+        .resource       = tmu2_resources,
+        .num_resources  = ARRAY_SIZE(tmu2_resources),
+};
+
+static struct sh_timer_config tmu3_platform_data = {
+        .name = "TMU3",
+        .channel_offset = 0x04,
+        .timer_bit = 0,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu3_resources[] = {
+        [0] = {
+                .name   = "TMU3",
+                .start  = 0xffdc0008,
+                .end    = 0xffdc0013,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 96,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu3_device = {
+        .name           = "sh_tmu",
+        .id             = 3,
+        .dev = {
+                .platform_data  = &tmu3_platform_data,
+        },
+        .resource       = tmu3_resources,
+        .num_resources  = ARRAY_SIZE(tmu3_resources),
+};
+
+static struct sh_timer_config tmu4_platform_data = {
+        .name = "TMU4",
+        .channel_offset = 0x10,
+        .timer_bit = 1,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu4_resources[] = {
+        [0] = {
+                .name   = "TMU4",
+                .start  = 0xffdc0014,
+                .end    = 0xffdc001f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 97,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu4_device = {
+        .name           = "sh_tmu",
+        .id             = 4,
+        .dev = {
+                .platform_data  = &tmu4_platform_data,
+        },
+        .resource       = tmu4_resources,
+        .num_resources  = ARRAY_SIZE(tmu4_resources),
+};
+
+static struct sh_timer_config tmu5_platform_data = {
+        .name = "TMU5",
+        .channel_offset = 0x1c,
+        .timer_bit = 2,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu5_resources[] = {
+        [0] = {
+                .name   = "TMU5",
+                .start  = 0xffdc0020,
+                .end    = 0xffdc002b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 98,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu5_device = {
+        .name           = "sh_tmu",
+        .id             = 5,
+        .dev = {
+                .platform_data  = &tmu5_platform_data,
+        },
+        .resource       = tmu5_resources,
+        .num_resources  = ARRAY_SIZE(tmu5_resources),
+};
 
 static struct resource rtc_resources[] = {
         [0] = {
@@ -58,6 +241,12 @@ static struct platform_device sci_device = {
 };
 
 static struct platform_device *sh7780_devices[] __initdata = {
+        &tmu0_device,
+        &tmu1_device,
+        &tmu2_device,
+        &tmu3_device,
+        &tmu4_device,
+        &tmu5_device,
         &rtc_device,
         &sci_device,
 };
@@ -69,6 +258,21 @@ static int __init sh7780_devices_setup(void)
 }
 __initcall(sh7780_devices_setup);
 
+static struct platform_device *sh7780_early_devices[] __initdata = {
+        &tmu0_device,
+        &tmu1_device,
+        &tmu2_device,
+        &tmu3_device,
+        &tmu4_device,
+        &tmu5_device,
+};
+
+void __init plat_early_device_setup(void)
+{
+        early_platform_add_devices(sh7780_early_devices,
+                                   ARRAY_SIZE(sh7780_early_devices));
+}
+
 enum {
         UNUSED = 0,
 
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
index d80802a49dbd..af561402570b 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
@@ -13,39 +13,228 @@
 #include <linux/serial_sci.h>
 #include <linux/io.h>
 #include <linux/mm.h>
+#include <linux/sh_timer.h>
 #include <asm/mmzone.h>
 
+static struct sh_timer_config tmu0_platform_data = {
+        .name = "TMU0",
+        .channel_offset = 0x04,
+        .timer_bit = 0,
+        .clk = "tmu012_fck",
+        .clockevent_rating = 200,
+};
+
+static struct resource tmu0_resources[] = {
+        [0] = {
+                .name   = "TMU0",
+                .start  = 0xffd80008,
+                .end    = 0xffd80013,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 28,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu0_device = {
+        .name           = "sh_tmu",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &tmu0_platform_data,
+        },
+        .resource       = tmu0_resources,
+        .num_resources  = ARRAY_SIZE(tmu0_resources),
+};
+
+static struct sh_timer_config tmu1_platform_data = {
+        .name = "TMU1",
+        .channel_offset = 0x10,
+        .timer_bit = 1,
+        .clk = "tmu012_fck",
+        .clocksource_rating = 200,
+};
+
+static struct resource tmu1_resources[] = {
+        [0] = {
+                .name   = "TMU1",
+                .start  = 0xffd80014,
+                .end    = 0xffd8001f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 29,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu1_device = {
+        .name           = "sh_tmu",
+        .id             = 1,
+        .dev = {
+                .platform_data  = &tmu1_platform_data,
+        },
+        .resource       = tmu1_resources,
+        .num_resources  = ARRAY_SIZE(tmu1_resources),
+};
+
+static struct sh_timer_config tmu2_platform_data = {
+        .name = "TMU2",
+        .channel_offset = 0x1c,
+        .timer_bit = 2,
+        .clk = "tmu012_fck",
+};
+
+static struct resource tmu2_resources[] = {
+        [0] = {
+                .name   = "TMU2",
+                .start  = 0xffd80020,
+                .end    = 0xffd8002f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 30,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu2_device = {
+        .name           = "sh_tmu",
+        .id             = 2,
+        .dev = {
+                .platform_data  = &tmu2_platform_data,
+        },
+        .resource       = tmu2_resources,
+        .num_resources  = ARRAY_SIZE(tmu2_resources),
+};
+
+static struct sh_timer_config tmu3_platform_data = {
+        .name = "TMU3",
+        .channel_offset = 0x04,
+        .timer_bit = 0,
+        .clk = "tmu345_fck",
+};
+
+static struct resource tmu3_resources[] = {
+        [0] = {
+                .name   = "TMU3",
+                .start  = 0xffdc0008,
+                .end    = 0xffdc0013,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 96,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu3_device = {
+        .name           = "sh_tmu",
+        .id             = 3,
+        .dev = {
+                .platform_data  = &tmu3_platform_data,
+        },
+        .resource       = tmu3_resources,
+        .num_resources  = ARRAY_SIZE(tmu3_resources),
+};
+
+static struct sh_timer_config tmu4_platform_data = {
+        .name = "TMU4",
+        .channel_offset = 0x10,
+        .timer_bit = 1,
+        .clk = "tmu345_fck",
+};
+
+static struct resource tmu4_resources[] = {
+        [0] = {
+                .name   = "TMU4",
+                .start  = 0xffdc0014,
+                .end    = 0xffdc001f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 97,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu4_device = {
+        .name           = "sh_tmu",
+        .id             = 4,
+        .dev = {
+                .platform_data  = &tmu4_platform_data,
+        },
+        .resource       = tmu4_resources,
+        .num_resources  = ARRAY_SIZE(tmu4_resources),
+};
+
+static struct sh_timer_config tmu5_platform_data = {
+        .name = "TMU5",
+        .channel_offset = 0x1c,
+        .timer_bit = 2,
+        .clk = "tmu345_fck",
+};
+
+static struct resource tmu5_resources[] = {
+        [0] = {
+                .name   = "TMU5",
+                .start  = 0xffdc0020,
+                .end    = 0xffdc002b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 98,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu5_device = {
+        .name           = "sh_tmu",
+        .id             = 5,
+        .dev = {
+                .platform_data  = &tmu5_platform_data,
+        },
+        .resource       = tmu5_resources,
+        .num_resources  = ARRAY_SIZE(tmu5_resources),
+};
+
 static struct plat_sci_port sci_platform_data[] = {
         {
                 .mapbase        = 0xffea0000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
                 .irqs           = { 40, 40, 40, 40 },
+                .clk            = "scif_fck",
         }, {
                 .mapbase        = 0xffeb0000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
                 .irqs           = { 44, 44, 44, 44 },
+                .clk            = "scif_fck",
         }, {
                 .mapbase        = 0xffec0000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
                 .irqs           = { 60, 60, 60, 60 },
+                .clk            = "scif_fck",
         }, {
                 .mapbase        = 0xffed0000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
                 .irqs           = { 61, 61, 61, 61 },
+                .clk            = "scif_fck",
         }, {
                 .mapbase        = 0xffee0000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
                 .irqs           = { 62, 62, 62, 62 },
+                .clk            = "scif_fck",
         }, {
                 .mapbase        = 0xffef0000,
                 .flags          = UPF_BOOT_AUTOCONF,
                 .type           = PORT_SCIF,
                 .irqs           = { 63, 63, 63, 63 },
+                .clk            = "scif_fck",
         }, {
                 .flags = 0,
         }
@@ -60,6 +249,12 @@ static struct platform_device sci_device = {
 };
 
 static struct platform_device *sh7785_devices[] __initdata = {
+        &tmu0_device,
+        &tmu1_device,
+        &tmu2_device,
+        &tmu3_device,
+        &tmu4_device,
+        &tmu5_device,
         &sci_device,
 };
 
@@ -70,6 +265,21 @@ static int __init sh7785_devices_setup(void)
 }
 __initcall(sh7785_devices_setup);
 
+static struct platform_device *sh7785_early_devices[] __initdata = {
+        &tmu0_device,
+        &tmu1_device,
+        &tmu2_device,
+        &tmu3_device,
+        &tmu4_device,
+        &tmu5_device,
+};
+
+void __init plat_early_device_setup(void)
+{
+        early_platform_add_devices(sh7785_early_devices,
+                                   ARRAY_SIZE(sh7785_early_devices));
+}
+
 enum {
         UNUSED = 0,
 
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
index 90e8cfff55fd..93e0d2c017e8 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c
@@ -3,6 +3,7 @@
  *
  * Copyright (C) 2009  Renesas Solutions Corp.
  * Kuninori Morimoto <morimoto.kuninori@renesas.com>
+ * Paul Mundt <paul.mundt@renesas.com>
  *
  * Based on SH7785 Setup
  *
@@ -19,6 +20,7 @@
 #include <linux/io.h>
 #include <linux/mm.h>
 #include <linux/dma-mapping.h>
+#include <linux/sh_timer.h>
 #include <asm/mmzone.h>
 
 static struct plat_sci_port sci_platform_data[] = {
@@ -69,6 +71,368 @@ static struct platform_device sci_device = {
         },
 };
 
+static struct sh_timer_config tmu0_platform_data = {
+        .name = "TMU0",
+        .channel_offset = 0x04,
+        .timer_bit = 0,
+        .clk = "peripheral_clk",
+        .clockevent_rating = 200,
+};
+
+static struct resource tmu0_resources[] = {
+        [0] = {
+                .name   = "TMU0",
+                .start  = 0xffd80008,
+                .end    = 0xffd80013,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 16,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu0_device = {
+        .name           = "sh_tmu",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &tmu0_platform_data,
+        },
+        .resource       = tmu0_resources,
+        .num_resources  = ARRAY_SIZE(tmu0_resources),
+};
+
+static struct sh_timer_config tmu1_platform_data = {
+        .name = "TMU1",
+        .channel_offset = 0x10,
+        .timer_bit = 1,
+        .clk = "peripheral_clk",
+        .clocksource_rating = 200,
+};
+
+static struct resource tmu1_resources[] = {
+        [0] = {
+                .name   = "TMU1",
+                .start  = 0xffd80014,
+                .end    = 0xffd8001f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 17,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu1_device = {
+        .name           = "sh_tmu",
+        .id             = 1,
+        .dev = {
+                .platform_data  = &tmu1_platform_data,
+        },
+        .resource       = tmu1_resources,
+        .num_resources  = ARRAY_SIZE(tmu1_resources),
+};
+
+static struct sh_timer_config tmu2_platform_data = {
+        .name = "TMU2",
+        .channel_offset = 0x1c,
+        .timer_bit = 2,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu2_resources[] = {
+        [0] = {
+                .name   = "TMU2",
+                .start  = 0xffd80020,
+                .end    = 0xffd8002f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 18,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu2_device = {
+        .name           = "sh_tmu",
+        .id             = 2,
+        .dev = {
+                .platform_data  = &tmu2_platform_data,
+        },
+        .resource       = tmu2_resources,
+        .num_resources  = ARRAY_SIZE(tmu2_resources),
+};
+
+static struct sh_timer_config tmu3_platform_data = {
+        .name = "TMU3",
+        .channel_offset = 0x04,
+        .timer_bit = 0,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu3_resources[] = {
+        [0] = {
+                .name   = "TMU3",
+                .start  = 0xffda0008,
+                .end    = 0xffda0013,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 20,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu3_device = {
+        .name           = "sh_tmu",
+        .id             = 3,
+        .dev = {
+                .platform_data  = &tmu3_platform_data,
+        },
+        .resource       = tmu3_resources,
+        .num_resources  = ARRAY_SIZE(tmu3_resources),
+};
+
+static struct sh_timer_config tmu4_platform_data = {
+        .name = "TMU4",
+        .channel_offset = 0x10,
+        .timer_bit = 1,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu4_resources[] = {
+        [0] = {
+                .name   = "TMU4",
+                .start  = 0xffda0014,
+                .end    = 0xffda001f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 21,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu4_device = {
+        .name           = "sh_tmu",
+        .id             = 4,
+        .dev = {
+                .platform_data  = &tmu4_platform_data,
+        },
+        .resource       = tmu4_resources,
+        .num_resources  = ARRAY_SIZE(tmu4_resources),
+};
+
+static struct sh_timer_config tmu5_platform_data = {
+        .name = "TMU5",
+        .channel_offset = 0x1c,
+        .timer_bit = 2,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu5_resources[] = {
+        [0] = {
+                .name   = "TMU5",
+                .start  = 0xffda0020,
+                .end    = 0xffda002b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 22,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu5_device = {
+        .name           = "sh_tmu",
+        .id             = 5,
+        .dev = {
+                .platform_data  = &tmu5_platform_data,
+        },
+        .resource       = tmu5_resources,
+        .num_resources  = ARRAY_SIZE(tmu5_resources),
+};
+
+static struct sh_timer_config tmu6_platform_data = {
+        .name = "TMU6",
+        .channel_offset = 0x04,
+        .timer_bit = 0,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu6_resources[] = {
+        [0] = {
+                .name   = "TMU6",
+                .start  = 0xffdc0008,
+                .end    = 0xffdc0013,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 45,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu6_device = {
+        .name           = "sh_tmu",
+        .id             = 6,
+        .dev = {
+                .platform_data  = &tmu6_platform_data,
+        },
+        .resource       = tmu6_resources,
+        .num_resources  = ARRAY_SIZE(tmu6_resources),
+};
+
+static struct sh_timer_config tmu7_platform_data = {
+        .name = "TMU7",
+        .channel_offset = 0x10,
+        .timer_bit = 1,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu7_resources[] = {
+        [0] = {
+                .name   = "TMU7",
+                .start  = 0xffdc0014,
+                .end    = 0xffdc001f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 45,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu7_device = {
+        .name           = "sh_tmu",
+        .id             = 7,
+        .dev = {
+                .platform_data  = &tmu7_platform_data,
+        },
+        .resource       = tmu7_resources,
+        .num_resources  = ARRAY_SIZE(tmu7_resources),
+};
+
+static struct sh_timer_config tmu8_platform_data = {
+        .name = "TMU8",
+        .channel_offset = 0x1c,
+        .timer_bit = 2,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu8_resources[] = {
+        [0] = {
+                .name   = "TMU8",
+                .start  = 0xffdc0020,
+                .end    = 0xffdc002b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 45,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu8_device = {
+        .name           = "sh_tmu",
+        .id             = 8,
+        .dev = {
+                .platform_data  = &tmu8_platform_data,
+        },
+        .resource       = tmu8_resources,
+        .num_resources  = ARRAY_SIZE(tmu8_resources),
+};
+
+static struct sh_timer_config tmu9_platform_data = {
+        .name = "TMU9",
+        .channel_offset = 0x04,
+        .timer_bit = 0,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu9_resources[] = {
+        [0] = {
+                .name   = "TMU9",
+                .start  = 0xffde0008,
+                .end    = 0xffde0013,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 46,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu9_device = {
+        .name           = "sh_tmu",
+        .id             = 9,
+        .dev = {
+                .platform_data  = &tmu9_platform_data,
+        },
+        .resource       = tmu9_resources,
+        .num_resources  = ARRAY_SIZE(tmu9_resources),
+};
+
+static struct sh_timer_config tmu10_platform_data = {
+        .name = "TMU10",
+        .channel_offset = 0x10,
+        .timer_bit = 1,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu10_resources[] = {
+        [0] = {
+                .name   = "TMU10",
+                .start  = 0xffde0014,
+                .end    = 0xffde001f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 46,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu10_device = {
+        .name           = "sh_tmu",
+        .id             = 10,
+        .dev = {
+                .platform_data  = &tmu10_platform_data,
+        },
+        .resource       = tmu10_resources,
+        .num_resources  = ARRAY_SIZE(tmu10_resources),
+};
+
+static struct sh_timer_config tmu11_platform_data = {
+        .name = "TMU11",
+        .channel_offset = 0x1c,
+        .timer_bit = 2,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu11_resources[] = {
+        [0] = {
+                .name   = "TMU11",
+                .start  = 0xffde0020,
+                .end    = 0xffde002b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 46,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu11_device = {
+        .name           = "sh_tmu",
+        .id             = 11,
+        .dev = {
+                .platform_data  = &tmu11_platform_data,
+        },
+        .resource       = tmu11_resources,
+        .num_resources  = ARRAY_SIZE(tmu11_resources),
+};
+
 static struct resource usb_ohci_resources[] = {
         [0] = {
                 .start  = 0xffe70400,
@@ -94,6 +458,21 @@ static struct platform_device usb_ohci_device = {
         .resource       = usb_ohci_resources,
 };
 
+static struct platform_device *sh7786_early_devices[] __initdata = {
+        &tmu0_device,
+        &tmu1_device,
+        &tmu2_device,
+        &tmu3_device,
+        &tmu4_device,
+        &tmu5_device,
+        &tmu6_device,
+        &tmu7_device,
+        &tmu8_device,
+        &tmu9_device,
+        &tmu10_device,
+        &tmu11_device,
+};
+
 static struct platform_device *sh7786_devices[] __initdata = {
         &sci_device,
         &usb_ohci_device,
@@ -156,12 +535,26 @@ static void __init sh7786_usb_setup(void)
 
 static int __init sh7786_devices_setup(void)
 {
+        int ret;
+
         sh7786_usb_setup();
+
+        ret = platform_add_devices(sh7786_early_devices,
+                                   ARRAY_SIZE(sh7786_early_devices));
+        if (unlikely(ret != 0))
+                return ret;
+
         return platform_add_devices(sh7786_devices,
                                     ARRAY_SIZE(sh7786_devices));
 }
 device_initcall(sh7786_devices_setup);
 
+void __init plat_early_device_setup(void)
+{
+        early_platform_add_devices(sh7786_early_devices,
+                                   ARRAY_SIZE(sh7786_early_devices));
+}
+
 enum {
         UNUSED = 0,
 
diff --git a/arch/sh/kernel/cpu/sh4a/setup-shx3.c b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
index bd35f32534b9..53c65fd9ccef 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
@@ -1,7 +1,7 @@
 /*
- * SH-X3 Setup
+ * SH-X3 Prototype Setup
  *
- *  Copyright (C) 2007  Paul Mundt
+ *  Copyright (C) 2007 - 2009  Paul Mundt
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -12,6 +12,7 @@
 #include <linux/serial.h>
 #include <linux/serial_sci.h>
 #include <linux/io.h>
+#include <linux/sh_timer.h>
 #include <asm/mmzone.h>
 
 static struct plat_sci_port sci_platform_data[] = {
@@ -48,17 +49,221 @@ static struct platform_device sci_device = {
         },
 };
 
+static struct sh_timer_config tmu0_platform_data = {
+        .name = "TMU0",
+        .channel_offset = 0x04,
+        .timer_bit = 0,
+        .clk = "peripheral_clk",
+        .clockevent_rating = 200,
+};
+
+static struct resource tmu0_resources[] = {
+        [0] = {
+                .name   = "TMU0",
+                .start  = 0xffc10008,
+                .end    = 0xffc10013,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 16,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu0_device = {
+        .name           = "sh_tmu",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &tmu0_platform_data,
+        },
+        .resource       = tmu0_resources,
+        .num_resources  = ARRAY_SIZE(tmu0_resources),
+};
+
+static struct sh_timer_config tmu1_platform_data = {
+        .name = "TMU1",
+        .channel_offset = 0x10,
+        .timer_bit = 1,
+        .clk = "peripheral_clk",
+        .clocksource_rating = 200,
+};
+
+static struct resource tmu1_resources[] = {
+        [0] = {
+                .name   = "TMU1",
+                .start  = 0xffc10014,
+                .end    = 0xffc1001f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 17,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu1_device = {
+        .name           = "sh_tmu",
+        .id             = 1,
+        .dev = {
+                .platform_data  = &tmu1_platform_data,
+        },
+        .resource       = tmu1_resources,
+        .num_resources  = ARRAY_SIZE(tmu1_resources),
+};
+
+static struct sh_timer_config tmu2_platform_data = {
+        .name = "TMU2",
+        .channel_offset = 0x1c,
+        .timer_bit = 2,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu2_resources[] = {
+        [0] = {
+                .name   = "TMU2",
+                .start  = 0xffc10020,
+                .end    = 0xffc1002f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 18,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu2_device = {
+        .name           = "sh_tmu",
+        .id             = 2,
+        .dev = {
+                .platform_data  = &tmu2_platform_data,
+        },
+        .resource       = tmu2_resources,
+        .num_resources  = ARRAY_SIZE(tmu2_resources),
+};
+
+static struct sh_timer_config tmu3_platform_data = {
+        .name = "TMU3",
+        .channel_offset = 0x04,
+        .timer_bit = 0,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu3_resources[] = {
+        [0] = {
+                .name   = "TMU3",
+                .start  = 0xffc20008,
+                .end    = 0xffc20013,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 19,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu3_device = {
+        .name           = "sh_tmu",
+        .id             = 3,
+        .dev = {
+                .platform_data  = &tmu3_platform_data,
+        },
+        .resource       = tmu3_resources,
+        .num_resources  = ARRAY_SIZE(tmu3_resources),
+};
+
+static struct sh_timer_config tmu4_platform_data = {
+        .name = "TMU4",
+        .channel_offset = 0x10,
+        .timer_bit = 1,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu4_resources[] = {
+        [0] = {
+                .name   = "TMU4",
+                .start  = 0xffc20014,
+                .end    = 0xffc2001f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 20,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu4_device = {
+        .name           = "sh_tmu",
+        .id             = 4,
+        .dev = {
+                .platform_data  = &tmu4_platform_data,
+        },
+        .resource       = tmu4_resources,
+        .num_resources  = ARRAY_SIZE(tmu4_resources),
+};
+
+static struct sh_timer_config tmu5_platform_data = {
+        .name = "TMU5",
+        .channel_offset = 0x1c,
+        .timer_bit = 2,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu5_resources[] = {
+        [0] = {
+                .name   = "TMU5",
+                .start  = 0xffc20020,
+                .end    = 0xffc2002b,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = 21,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu5_device = {
+        .name           = "sh_tmu",
+        .id             = 5,
+        .dev = {
+                .platform_data  = &tmu5_platform_data,
+        },
+        .resource       = tmu5_resources,
+        .num_resources  = ARRAY_SIZE(tmu5_resources),
+};
+
+static struct platform_device *shx3_early_devices[] __initdata = {
+        &tmu0_device,
+        &tmu1_device,
+        &tmu2_device,
+        &tmu3_device,
+        &tmu4_device,
+        &tmu5_device,
+};
+
 static struct platform_device *shx3_devices[] __initdata = {
         &sci_device,
 };
 
 static int __init shx3_devices_setup(void)
 {
+        int ret;
+
+        ret = platform_add_devices(shx3_early_devices,
+                                   ARRAY_SIZE(shx3_early_devices));
+        if (unlikely(ret != 0))
+                return ret;
+
         return platform_add_devices(shx3_devices,
                                     ARRAY_SIZE(shx3_devices));
 }
 __initcall(shx3_devices_setup);
 
+void __init plat_early_device_setup(void)
+{
+        early_platform_add_devices(shx3_early_devices,
+                                   ARRAY_SIZE(shx3_early_devices));
+}
+
 enum {
         UNUSED = 0,
 
diff --git a/arch/sh/kernel/cpu/sh5/Makefile b/arch/sh/kernel/cpu/sh5/Makefile
index ce4602ea23a8..a184a31e686e 100644
--- a/arch/sh/kernel/cpu/sh5/Makefile
+++ b/arch/sh/kernel/cpu/sh5/Makefile
@@ -6,6 +6,9 @@ obj-y := entry.o probe.o switchto.o
 obj-$(CONFIG_SH_FPU)            += fpu.o
 obj-$(CONFIG_KALLSYMS)          += unwind.o
 
+# CPU subtype setup
+obj-$(CONFIG_CPU_SH5)           += setup-sh5.o
+
 # Primary on-chip clocks (common)
 clock-$(CONFIG_CPU_SH5)         := clock-sh5.o
 
diff --git a/arch/sh/kernel/cpu/sh5/clock-sh5.c b/arch/sh/kernel/cpu/sh5/clock-sh5.c
index 52c49248833a..7f864ebc51d3 100644
--- a/arch/sh/kernel/cpu/sh5/clock-sh5.c
+++ b/arch/sh/kernel/cpu/sh5/clock-sh5.c
@@ -32,30 +32,30 @@ static struct clk_ops sh5_master_clk_ops = {
         .init           = master_clk_init,
 };
 
-static void module_clk_recalc(struct clk *clk)
+static unsigned long module_clk_recalc(struct clk *clk)
 {
         int idx = (ctrl_inw(cprc_base) >> 12) & 0x0007;
-        clk->rate = clk->parent->rate / ifc_table[idx];
+        return clk->parent->rate / ifc_table[idx];
 }
 
 static struct clk_ops sh5_module_clk_ops = {
         .recalc         = module_clk_recalc,
 };
 
-static void bus_clk_recalc(struct clk *clk)
+static unsigned long bus_clk_recalc(struct clk *clk)
 {
         int idx = (ctrl_inw(cprc_base) >> 3) & 0x0007;
-        clk->rate = clk->parent->rate / ifc_table[idx];
+        return clk->parent->rate / ifc_table[idx];
 }
 
 static struct clk_ops sh5_bus_clk_ops = {
         .recalc         = bus_clk_recalc,
 };
 
-static void cpu_clk_recalc(struct clk *clk)
+static unsigned long cpu_clk_recalc(struct clk *clk)
 {
         int idx = (ctrl_inw(cprc_base) & 0x0007);
-        clk->rate = clk->parent->rate / ifc_table[idx];
+        return clk->parent->rate / ifc_table[idx];
 }
 
 static struct clk_ops sh5_cpu_clk_ops = {
@@ -71,7 +71,7 @@ static struct clk_ops *sh5_clk_ops[] = {
 
 void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
 {
-        cprc_base = onchip_remap(CPRC_BASE, 1024, "CPRC");
+        cprc_base = (unsigned long)ioremap_nocache(CPRC_BASE, 1024);
         BUG_ON(!cprc_base);
 
         if (idx < ARRAY_SIZE(sh5_clk_ops))
diff --git a/arch/sh/kernel/cpu/sh5/entry.S b/arch/sh/kernel/cpu/sh5/entry.S
index 7e49cb812f8b..b0aacf675258 100644
--- a/arch/sh/kernel/cpu/sh5/entry.S
+++ b/arch/sh/kernel/cpu/sh5/entry.S
@@ -812,27 +812,6 @@ no_underflow:
         ! exceptions
         add     SP, ZERO, r14
 
-#ifdef CONFIG_POOR_MANS_STRACE
-        /* We've pushed all the registers now, so only r2-r4 hold anything
-         * useful. Move them into callee save registers */
-        or      r2, ZERO, r28
-        or      r3, ZERO, r29
-        or      r4, ZERO, r30
-
-        /* Preserve r2 as the event code */
-        movi    evt_debug, r3
-        ori     r3, 1, r3
-        ptabs   r3, tr0
-
-        or      SP, ZERO, r6
-        getcon  TRA, r5
-        blink   tr0, LINK
-
-        or      r28, ZERO, r2
-        or      r29, ZERO, r3
-        or      r30, ZERO, r4
-#endif
-
         /* For syscall and debug race condition, get TRA now */
         getcon  TRA, r5
 
@@ -887,11 +866,6 @@ no_underflow:
  */
         .global ret_from_irq
 ret_from_irq:
-#ifdef CONFIG_POOR_MANS_STRACE
-        pta     evt_debug_ret_from_irq, tr0
-        ori     SP, 0, r2
-        blink   tr0, LINK
-#endif
         ld.q    SP, FRAME_S(FSSR), r6
         shlri   r6, 30, r6
         andi    r6, 1, r6
@@ -905,12 +879,6 @@ ret_from_irq:
 ret_from_exception:
         preempt_stop()
 
-#ifdef CONFIG_POOR_MANS_STRACE
-        pta     evt_debug_ret_from_exc, tr0
-        ori     SP, 0, r2
-        blink   tr0, LINK
-#endif
-
         ld.q    SP, FRAME_S(FSSR), r6
         shlri   r6, 30, r6
         andi    r6, 1, r6
@@ -1236,18 +1204,6 @@ syscall_bad:
         .global syscall_ret
 syscall_ret:
         st.q    SP, FRAME_R(9), r2      /* Expecting SP back to BASIC frame */
-
-#ifdef CONFIG_POOR_MANS_STRACE
-        /* nothing useful in registers at this point */
-
-        movi    evt_debug2, r5
-        ori     r5, 1, r5
-        ptabs   r5, tr0
-        ld.q    SP, FRAME_R(9), r2
-        or      SP, ZERO, r3
-        blink   tr0, LINK
-#endif
-
         ld.q    SP, FRAME_S(FSPC), r2
         addi    r2, 4, r2               /* Move PC, being pre-execution event */
         st.q    SP, FRAME_S(FSPC), r2
@@ -1268,25 +1224,12 @@ ret_from_fork:
         ptabs   r5, tr0
         blink   tr0, LINK
 
-#ifdef CONFIG_POOR_MANS_STRACE
-        /* nothing useful in registers at this point */
-
-        movi    evt_debug2, r5
-        ori     r5, 1, r5
-        ptabs   r5, tr0
-        ld.q    SP, FRAME_R(9), r2
-        or      SP, ZERO, r3
-        blink   tr0, LINK
-#endif
-
         ld.q    SP, FRAME_S(FSPC), r2
         addi    r2, 4, r2               /* Move PC, being pre-execution event */
         st.q    SP, FRAME_S(FSPC), r2
         pta     ret_from_syscall, tr0
         blink   tr0, ZERO
 
-
-
 syscall_allowed:
         /* Use LINK to deflect the exit point, default is syscall_ret */
         pta     syscall_ret, tr0
@@ -1410,8 +1353,8 @@ peek_real_address_q:
            r2(out) : result quadword
 
            This is provided as a cheapskate way of manipulating device
-           registers for debugging (to avoid the need to onchip_remap the debug
-           module, and to avoid the need to onchip_remap the watchpoint
+           registers for debugging (to avoid the need to ioremap the debug
+           module, and to avoid the need to ioremap the watchpoint
            controller in a way that identity maps sufficient bits to avoid the
            SH5-101 cut2 silicon defect).
 
@@ -1459,8 +1402,8 @@ poke_real_address_q:
            r3 : quadword value to write.
 
            This is provided as a cheapskate way of manipulating device
-           registers for debugging (to avoid the need to onchip_remap the debug
-           module, and to avoid the need to onchip_remap the watchpoint
+           registers for debugging (to avoid the need to ioremap the debug
+           module, and to avoid the need to ioremap the watchpoint
            controller in a way that identity maps sufficient bits to avoid the
            SH5-101 cut2 silicon defect).
 
diff --git a/arch/sh/kernel/cpu/sh5/setup-sh5.c b/arch/sh/kernel/cpu/sh5/setup-sh5.c
new file mode 100644
index 000000000000..f5ff1ac57fc2
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh5/setup-sh5.c
@@ -0,0 +1,195 @@
+/*
+ * SH5-101/SH5-103 CPU Setup
+ *
+ *  Copyright (C) 2009  Paul Mundt
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/platform_device.h>
+#include <linux/init.h>
+#include <linux/serial.h>
+#include <linux/serial_sci.h>
+#include <linux/io.h>
+#include <linux/mm.h>
+#include <linux/sh_timer.h>
+#include <asm/addrspace.h>
+
+static struct plat_sci_port sci_platform_data[] = {
+        {
+                .mapbase        = PHYS_PERIPHERAL_BLOCK + 0x01030000,
+                .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
+                .type           = PORT_SCIF,
+                .irqs           = { 39, 40, 42, 0 },
+        }, {
+                .flags = 0,
+        }
+};
+
+static struct platform_device sci_device = {
+        .name           = "sh-sci",
+        .id             = -1,
+        .dev            = {
+                .platform_data  = sci_platform_data,
+        },
+};
+
+static struct resource rtc_resources[] = {
+        [0] = {
+                .start  = PHYS_PERIPHERAL_BLOCK + 0x01040000,
+                .end    = PHYS_PERIPHERAL_BLOCK + 0x01040000 + 0x58 - 1,
+                .flags  = IORESOURCE_IO,
+        },
+        [1] = {
+                /* Period IRQ */
+                .start  = IRQ_PRI,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                /* Carry IRQ */
+                .start  = IRQ_CUI,
+                .flags  = IORESOURCE_IRQ,
+        },
+        [3] = {
+                /* Alarm IRQ */
+                .start  = IRQ_ATI,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device rtc_device = {
+        .name           = "sh-rtc",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(rtc_resources),
+        .resource       = rtc_resources,
+};
+
+#define TMU_BLOCK_OFF   0x01020000
+#define TMU_BASE        PHYS_PERIPHERAL_BLOCK + TMU_BLOCK_OFF
+#define TMU0_BASE       (TMU_BASE + 0x8 + (0xc * 0x0))
+#define TMU1_BASE       (TMU_BASE + 0x8 + (0xc * 0x1))
+#define TMU2_BASE       (TMU_BASE + 0x8 + (0xc * 0x2))
+
+static struct sh_timer_config tmu0_platform_data = {
+        .name = "TMU0",
+        .channel_offset = 0x04,
+        .timer_bit = 0,
+        .clk = "peripheral_clk",
+        .clockevent_rating = 200,
+};
+
+static struct resource tmu0_resources[] = {
+        [0] = {
+                .name   = "TMU0",
+                .start  = TMU0_BASE,
+                .end    = TMU0_BASE + 0xc - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_TUNI0,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu0_device = {
+        .name           = "sh_tmu",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &tmu0_platform_data,
+        },
+        .resource       = tmu0_resources,
+        .num_resources  = ARRAY_SIZE(tmu0_resources),
+};
+
+static struct sh_timer_config tmu1_platform_data = {
+        .name = "TMU1",
+        .channel_offset = 0x10,
+        .timer_bit = 1,
+        .clk = "peripheral_clk",
+        .clocksource_rating = 200,
+};
+
+static struct resource tmu1_resources[] = {
+        [0] = {
+                .name   = "TMU1",
+                .start  = TMU1_BASE,
+                .end    = TMU1_BASE + 0xc - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_TUNI1,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu1_device = {
+        .name           = "sh_tmu",
+        .id             = 1,
+        .dev = {
+                .platform_data  = &tmu1_platform_data,
+        },
+        .resource       = tmu1_resources,
+        .num_resources  = ARRAY_SIZE(tmu1_resources),
+};
+
+static struct sh_timer_config tmu2_platform_data = {
+        .name = "TMU2",
+        .channel_offset = 0x1c,
+        .timer_bit = 2,
+        .clk = "peripheral_clk",
+};
+
+static struct resource tmu2_resources[] = {
+        [0] = {
+                .name   = "TMU2",
+                .start  = TMU2_BASE,
+                .end    = TMU2_BASE + 0xc - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_TUNI2,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu2_device = {
+        .name           = "sh_tmu",
+        .id             = 2,
+        .dev = {
+                .platform_data  = &tmu2_platform_data,
+        },
+        .resource       = tmu2_resources,
+        .num_resources  = ARRAY_SIZE(tmu2_resources),
+};
+
+static struct platform_device *sh5_early_devices[] __initdata = {
+        &tmu0_device,
+        &tmu1_device,
+        &tmu2_device,
+};
+
+static struct platform_device *sh5_devices[] __initdata = {
+        &sci_device,
+        &rtc_device,
+};
+
+static int __init sh5_devices_setup(void)
+{
+        int ret;
+
+        ret = platform_add_devices(sh5_early_devices,
+                                   ARRAY_SIZE(sh5_early_devices));
+        if (unlikely(ret != 0))
+                return ret;
+
+        return platform_add_devices(sh5_devices,
+                                    ARRAY_SIZE(sh5_devices));
+}
+__initcall(sh5_devices_setup);
+
+void __init plat_early_device_setup(void)
+{
+        early_platform_add_devices(sh5_early_devices,
+                                   ARRAY_SIZE(sh5_early_devices));
+}
diff --git a/arch/sh/kernel/io.c b/arch/sh/kernel/io.c
index 29cf4588fc05..4f85fffaa557 100644
--- a/arch/sh/kernel/io.c
+++ b/arch/sh/kernel/io.c
@@ -12,6 +12,7 @@
  * for more details.
  */
 #include <linux/module.h>
+#include <linux/pci.h>
 #include <asm/machvec.h>
 #include <asm/io.h>
 
diff --git a/arch/sh/kernel/io_trapped.c b/arch/sh/kernel/io_trapped.c
index c22853b059ef..77dfecb64373 100644
--- a/arch/sh/kernel/io_trapped.c
+++ b/arch/sh/kernel/io_trapped.c
@@ -267,7 +267,7 @@ static struct mem_access trapped_io_access = {
 int handle_trapped_io(struct pt_regs *regs, unsigned long address)
 {
         mm_segment_t oldfs;
-        opcode_t instruction;
+        insn_size_t instruction;
         int tmp;
 
         if (!lookup_tiop(address))
diff --git a/arch/sh/kernel/irq.c b/arch/sh/kernel/irq.c
index 3f1372eb0091..3d09062f4682 100644
--- a/arch/sh/kernel/irq.c
+++ b/arch/sh/kernel/irq.c
@@ -31,39 +31,64 @@ void ack_bad_irq(unsigned int irq)
 }
 
 #if defined(CONFIG_PROC_FS)
+/*
+ * /proc/interrupts printing:
+ */
+static int show_other_interrupts(struct seq_file *p, int prec)
+{
+        seq_printf(p, "%*s: %10u\n", prec, "ERR", atomic_read(&irq_err_count));
+        return 0;
+}
+
 int show_interrupts(struct seq_file *p, void *v)
 {
-        int i = *(loff_t *) v, j;
-        struct irqaction * action;
-        unsigned long flags;
+        unsigned long flags, any_count = 0;
+        int i = *(loff_t *)v, j, prec;
+        struct irqaction *action;
+        struct irq_desc *desc;
+
+        if (i > nr_irqs)
+                return 0;
+
+        for (prec = 3, j = 1000; prec < 10 && j <= nr_irqs; ++prec)
+                j *= 10;
+
+        if (i == nr_irqs)
+                return show_other_interrupts(p, prec);
 
         if (i == 0) {
-                seq_puts(p, "           ");
+                seq_printf(p, "%*s", prec + 8, "");
                 for_each_online_cpu(j)
-                        seq_printf(p, "CPU%d       ",j);
+                        seq_printf(p, "CPU%-8d", j);
                 seq_putc(p, '\n');
         }
 
-        if (i < sh_mv.mv_nr_irqs) {
-                spin_lock_irqsave(&irq_desc[i].lock, flags);
-                action = irq_desc[i].action;
-                if (!action)
-                        goto unlock;
-                seq_printf(p, "%3d: ",i);
-                for_each_online_cpu(j)
-                        seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
-                seq_printf(p, " %14s", irq_desc[i].chip->name);
-                seq_printf(p, "-%-8s", irq_desc[i].name);
-                seq_printf(p, "  %s", action->name);
+        desc = irq_to_desc(i);
+        if (!desc)
+                return 0;
+
+        spin_lock_irqsave(&desc->lock, flags);
+        for_each_online_cpu(j)
+                any_count |= kstat_irqs_cpu(i, j);
+        action = desc->action;
+        if (!action && !any_count)
+                goto out;
+
+        seq_printf(p, "%*d: ", prec, i);
+        for_each_online_cpu(j)
+                seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
+        seq_printf(p, " %14s", desc->chip->name);
+        seq_printf(p, "-%-8s", desc->name);
 
-                for (action=action->next; action; action = action->next)
+        if (action) {
+                seq_printf(p, "  %s", action->name);
+                while ((action = action->next) != NULL)
                         seq_printf(p, ", %s", action->name);
-                seq_putc(p, '\n');
-unlock:
-                spin_unlock_irqrestore(&irq_desc[i].lock, flags);
-        } else if (i == sh_mv.mv_nr_irqs)
-                seq_printf(p, "Err: %10u\n", atomic_read(&irq_err_count));
+        }
 
+        seq_putc(p, '\n');
+out:
+        spin_unlock_irqrestore(&desc->lock, flags);
         return 0;
 }
 #endif
@@ -254,3 +279,11 @@ void __init init_IRQ(void)
 
         irq_ctx_init(smp_processor_id());
 }
+
+#ifdef CONFIG_SPARSE_IRQ
+int __init arch_probe_nr_irqs(void)
+{
+        nr_irqs = sh_mv.mv_nr_irqs;
+        return 0;
+}
+#endif
diff --git a/arch/sh/kernel/kgdb.c b/arch/sh/kernel/kgdb.c
index 7c747e7d71b8..305aad742aec 100644
--- a/arch/sh/kernel/kgdb.c
+++ b/arch/sh/kernel/kgdb.c
@@ -47,7 +47,7 @@ char in_nmi = 0;	/* Set during NMI to prevent re-entry */
 /* Calculate the new address for after a step */
 static short *get_step_address(struct pt_regs *linux_regs)
 {
-        opcode_t op = __raw_readw(linux_regs->pc);
+        insn_size_t op = __raw_readw(linux_regs->pc);
         long addr;
 
         /* BT */
@@ -134,7 +134,7 @@ static short *get_step_address(struct pt_regs *linux_regs)
  */
 
 static unsigned long stepped_address;
-static opcode_t stepped_opcode;
+static insn_size_t stepped_opcode;
 
 static void do_single_step(struct pt_regs *linux_regs)
 {
diff --git a/arch/sh/kernel/timers/timer-broadcast.c b/arch/sh/kernel/localtimer.c
index 96e8eaea1e62..96e8eaea1e62 100644
--- a/arch/sh/kernel/timers/timer-broadcast.c
+++ b/arch/sh/kernel/localtimer.c
diff --git a/arch/sh/kernel/machvec.c b/arch/sh/kernel/machvec.c
index c1ea41e5812a..548f6607fd0f 100644
--- a/arch/sh/kernel/machvec.c
+++ b/arch/sh/kernel/machvec.c
@@ -129,6 +129,7 @@ void __init sh_mv_setup(void)
         mv_set(ioport_map);
         mv_set(ioport_unmap);
         mv_set(irq_demux);
+        mv_set(mode_pins);
 
         if (!sh_mv.mv_nr_irqs)
                 sh_mv.mv_nr_irqs = NR_IRQS;
diff --git a/arch/sh/kernel/module.c b/arch/sh/kernel/module.c
index c43081039dd5..c19b0f7d2cc1 100644
--- a/arch/sh/kernel/module.c
+++ b/arch/sh/kernel/module.c
@@ -90,7 +90,7 @@ int apply_relocate_add(Elf32_Shdr *sechdrs,
                  * SHmedia, the LSB of the symbol needs to be asserted
                  * for the CPU to be in SHmedia mode when it starts executing
                  * the branch target. */
-                relocation |= (sym->st_other & 4);
+                relocation |= !!(sym->st_other & 4);
 #endif
 
                 switch (ELF32_R_TYPE(rel[i].r_info)) {
diff --git a/arch/sh/kernel/process_32.c b/arch/sh/kernel/process_32.c
index 6d94725d22f2..9289ede29c7b 100644
--- a/arch/sh/kernel/process_32.c
+++ b/arch/sh/kernel/process_32.c
@@ -251,7 +251,8 @@ static void ubc_set_tracing(int asid, unsigned long pc)
 
         if (current_cpu_data.type == CPU_SH7729 ||
             current_cpu_data.type == CPU_SH7710 ||
-            current_cpu_data.type == CPU_SH7712) {
+            current_cpu_data.type == CPU_SH7712 ||
+            current_cpu_data.type == CPU_SH7203){
                 ctrl_outw(BBR_INST | BBR_READ | BBR_CPU, UBC_BBRA);
                 ctrl_outl(BRCR_PCBA | BRCR_PCTE, UBC_BRCR);
         } else {
@@ -407,6 +408,7 @@ asmlinkage void break_point_trap(void)
 #else
         ctrl_outw(0, UBC_BBRA);
         ctrl_outw(0, UBC_BBRB);
+        ctrl_outl(0, UBC_BRCR);
 #endif
         current->thread.ubc_pc = 0;
         ubc_usercnt -= 1;
diff --git a/arch/sh/kernel/ptrace_32.c b/arch/sh/kernel/ptrace_32.c
index f7b22dd83b0c..3392e835a374 100644
--- a/arch/sh/kernel/ptrace_32.c
+++ b/arch/sh/kernel/ptrace_32.c
@@ -334,6 +334,14 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                                         [(addr - (long)&dummy->fpu) >> 2];
                 } else if (addr == (long) &dummy->u_fpvalid)
                         tmp = !!tsk_used_math(child);
+                else if (addr == PT_TEXT_ADDR)
+                        tmp = child->mm->start_code;
+                else if (addr == PT_DATA_ADDR)
+                        tmp = child->mm->start_data;
+                else if (addr == PT_TEXT_END_ADDR)
+                        tmp = child->mm->end_code;
+                else if (addr == PT_TEXT_LEN)
+                        tmp = child->mm->end_code - child->mm->start_code;
                 else
                         tmp = 0;
                 ret = put_user(tmp, datap);
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index 04a6004fccc4..dd38338553ef 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -29,6 +29,7 @@
 #include <linux/mmzone.h>
 #include <linux/clk.h>
 #include <linux/delay.h>
+#include <linux/platform_device.h>
 #include <asm/uaccess.h>
 #include <asm/io.h>
 #include <asm/page.h>
@@ -155,7 +156,7 @@ static void __init reserve_crashkernel(void)
                         &crash_size, &crash_base);
         if (ret == 0 && crash_size) {
                 if (crash_base <= 0) {
-                        vp = alloc_bootmem_nopanic(crash_size); 
+                        vp = alloc_bootmem_nopanic(crash_size);
                         if (!vp) {
                                 printk(KERN_INFO "crashkernel allocation "
                                        "failed\n");
@@ -184,7 +185,6 @@ static inline void __init reserve_crashkernel(void)
 {}
 #endif
 
-#ifndef CONFIG_GENERIC_CALIBRATE_DELAY
 void __cpuinit calibrate_delay(void)
 {
         struct clk *clk = clk_get(NULL, "cpu_clk");
@@ -200,7 +200,6 @@ void __cpuinit calibrate_delay(void)
                          (loops_per_jiffy/(5000/HZ)) % 100,
                          loops_per_jiffy);
 }
-#endif
 
 void __init __add_active_range(unsigned int nid, unsigned long start_pfn,
                                                 unsigned long end_pfn)
@@ -328,6 +327,10 @@ static int __init parse_elfcorehdr(char *arg)
 early_param("elfcorehdr", parse_elfcorehdr);
 #endif
 
+void __init __attribute__ ((weak)) plat_early_device_setup(void)
+{
+}
+
 void __init setup_arch(char **cmdline_p)
 {
         enable_mmu();
@@ -381,6 +384,8 @@ void __init setup_arch(char **cmdline_p)
 
         parse_early_param();
 
+        plat_early_device_setup();
+
         sh_mv_setup();
 
         /*
@@ -415,6 +420,18 @@ void __init setup_arch(char **cmdline_p)
 #endif
 }
 
+/* processor boot mode configuration */
+int generic_mode_pins(void)
+{
+        pr_warning("generic_mode_pins(): missing mode pin configuration\n");
+        return 0;
+}
+
+int test_mode_pin(int pin)
+{
+        return sh_mv.mv_mode_pins() & pin;
+}
+
 static const char *cpu_name[] = {
         [CPU_SH7201]    = "SH7201",
         [CPU_SH7203]    = "SH7203",     [CPU_SH7263]    = "SH7263",
@@ -435,7 +452,8 @@ static const char *cpu_name[] = {
         [CPU_SH7722]    = "SH7722",     [CPU_SHX3]      = "SH-X3",
         [CPU_SH5_101]   = "SH5-101",    [CPU_SH5_103]   = "SH5-103",
         [CPU_MXG]       = "MX-G",       [CPU_SH7723]    = "SH7723",
-        [CPU_SH7366]    = "SH7366",     [CPU_SH_NONE]   = "Unknown"
+        [CPU_SH7366]    = "SH7366",     [CPU_SH7724]    = "SH7724",
+        [CPU_SH_NONE]   = "Unknown"
 };
 
 const char *get_cpu_subtype(struct sh_cpuinfo *c)
diff --git a/arch/sh/kernel/sh_ksyms_32.c b/arch/sh/kernel/sh_ksyms_32.c
index 528de2955c81..fcc5de31f83b 100644
--- a/arch/sh/kernel/sh_ksyms_32.c
+++ b/arch/sh/kernel/sh_ksyms_32.c
@@ -19,14 +19,10 @@
 #include <asm/ftrace.h>
 
 extern int dump_fpu(struct pt_regs *, elf_fpregset_t *);
-extern struct hw_interrupt_type no_irq_type;
 
 /* platform dependent support */
 EXPORT_SYMBOL(dump_fpu);
 EXPORT_SYMBOL(kernel_thread);
-EXPORT_SYMBOL(irq_desc);
-EXPORT_SYMBOL(no_irq_type);
-
 EXPORT_SYMBOL(strlen);
 
 /* PCI exports */
@@ -41,11 +37,6 @@ EXPORT_SYMBOL(memcpy);
 EXPORT_SYMBOL(memset);
 EXPORT_SYMBOL(memmove);
 EXPORT_SYMBOL(__copy_user);
-
-#ifdef CONFIG_MMU
-EXPORT_SYMBOL(get_vm_area);
-#endif
-
 EXPORT_SYMBOL(__udelay);
 EXPORT_SYMBOL(__ndelay);
 EXPORT_SYMBOL(__const_udelay);
diff --git a/arch/sh/kernel/sh_ksyms_64.c b/arch/sh/kernel/sh_ksyms_64.c
index 0d74d6b8774e..8f54ef0cfbca 100644
--- a/arch/sh/kernel/sh_ksyms_64.c
+++ b/arch/sh/kernel/sh_ksyms_64.c
@@ -76,5 +76,7 @@ EXPORT_SYMBOL(strcpy);
 #define DECLARE_EXPORT(name) extern void name(void);EXPORT_SYMBOL(name)
 
 DECLARE_EXPORT(__sdivsi3);
+DECLARE_EXPORT(__sdivsi3_1);
+DECLARE_EXPORT(__sdivsi3_2);
 DECLARE_EXPORT(__udivsi3);
 DECLARE_EXPORT(__div_table);
diff --git a/arch/sh/kernel/syscalls_32.S b/arch/sh/kernel/syscalls_32.S
index 05202edd8e21..a9fff9f731ec 100644
--- a/arch/sh/kernel/syscalls_32.S
+++ b/arch/sh/kernel/syscalls_32.S
@@ -350,4 +350,5 @@ ENTRY(sys_call_table)
         .long sys_pipe2
         .long sys_inotify_init1
         .long sys_preadv
-        .long sys_writev
+        .long sys_pwritev
+        .long sys_rt_tgsigqueueinfo     /* 335 */
diff --git a/arch/sh/kernel/syscalls_64.S b/arch/sh/kernel/syscalls_64.S
index a083609f9284..75c1889af1ed 100644
--- a/arch/sh/kernel/syscalls_64.S
+++ b/arch/sh/kernel/syscalls_64.S
@@ -389,3 +389,4 @@ sys_call_table:
         .long sys_inotify_init1         /* 360 */
         .long sys_preadv
         .long sys_pwritev
+        .long sys_rt_tgsigqueueinfo
diff --git a/arch/sh/kernel/time.c b/arch/sh/kernel/time.c
new file mode 100644
index 000000000000..2edde32c764b
--- /dev/null
+++ b/arch/sh/kernel/time.c
@@ -0,0 +1,125 @@
+/*
+ *  arch/sh/kernel/time.c
+ *
+ *  Copyright (C) 1999  Tetsuya Okada & Niibe Yutaka
+ *  Copyright (C) 2000  Philipp Rumpf <prumpf@tux.org>
+ *  Copyright (C) 2002 - 2009  Paul Mundt
+ *  Copyright (C) 2002  M. R. Brown  <mrbrown@linux-sh.org>
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/profile.h>
+#include <linux/timex.h>
+#include <linux/sched.h>
+#include <linux/clockchips.h>
+#include <linux/platform_device.h>
+#include <linux/smp.h>
+#include <linux/rtc.h>
+#include <asm/clock.h>
+#include <asm/rtc.h>
+
+/* Dummy RTC ops */
+static void null_rtc_get_time(struct timespec *tv)
+{
+        tv->tv_sec = mktime(2000, 1, 1, 0, 0, 0);
+        tv->tv_nsec = 0;
+}
+
+static int null_rtc_set_time(const time_t secs)
+{
+        return 0;
+}
+
+void (*rtc_sh_get_time)(struct timespec *) = null_rtc_get_time;
+int (*rtc_sh_set_time)(const time_t) = null_rtc_set_time;
+
+#ifdef CONFIG_GENERIC_CMOS_UPDATE
+unsigned long read_persistent_clock(void)
+{
+        struct timespec tv;
+        rtc_sh_get_time(&tv);
+        return tv.tv_sec;
+}
+
+int update_persistent_clock(struct timespec now)
+{
+        return rtc_sh_set_time(now.tv_sec);
+}
+#endif
+
+unsigned int get_rtc_time(struct rtc_time *tm)
+{
+        if (rtc_sh_get_time != null_rtc_get_time) {
+                struct timespec tv;
+
+                rtc_sh_get_time(&tv);
+                rtc_time_to_tm(tv.tv_sec, tm);
+        }
+
+        return RTC_24H;
+}
+EXPORT_SYMBOL(get_rtc_time);
+
+int set_rtc_time(struct rtc_time *tm)
+{
+        unsigned long secs;
+
+        rtc_tm_to_time(tm, &secs);
+        return rtc_sh_set_time(secs);
+}
+EXPORT_SYMBOL(set_rtc_time);
+
+static int __init rtc_generic_init(void)
+{
+        struct platform_device *pdev;
+
+        if (rtc_sh_get_time == null_rtc_get_time)
+                return -ENODEV;
+
+        pdev = platform_device_register_simple("rtc-generic", -1, NULL, 0);
+        if (IS_ERR(pdev))
+                return PTR_ERR(pdev);
+
+        return 0;
+}
+module_init(rtc_generic_init);
+
+void (*board_time_init)(void);
+
+unsigned long long sched_clock(void)
+{
+        return (jiffies_64 - INITIAL_JIFFIES) * (NSEC_PER_SEC / HZ);
+}
+
+static void __init sh_late_time_init(void)
+{
+        /*
+         * Make sure all compiled-in early timers register themselves.
+         * Run probe() for one "earlytimer" device.
+         */
+        early_platform_driver_register_all("earlytimer");
+        early_platform_driver_probe("earlytimer", 1, 0);
+}
+
+void __init time_init(void)
+{
+        if (board_time_init)
+                board_time_init();
+
+        clk_init();
+
+        rtc_sh_get_time(&xtime);
+        set_normalized_timespec(&wall_to_monotonic,
+                                -xtime.tv_sec, -xtime.tv_nsec);
+
+#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
+        local_timer_setup(smp_processor_id());
+#endif
+
+        late_time_init = sh_late_time_init;
+}
diff --git a/arch/sh/kernel/time_32.c b/arch/sh/kernel/time_32.c
deleted file mode 100644
index 1700d2465f6c..000000000000
--- a/arch/sh/kernel/time_32.c
+++ /dev/null
@@ -1,240 +0,0 @@
-/*
- *  arch/sh/kernel/time_32.c
- *
- *  Copyright (C) 1999  Tetsuya Okada & Niibe Yutaka
- *  Copyright (C) 2000  Philipp Rumpf <prumpf@tux.org>
- *  Copyright (C) 2002 - 2008  Paul Mundt
- *  Copyright (C) 2002  M. R. Brown  <mrbrown@linux-sh.org>
- *
- *  Some code taken from i386 version.
- *    Copyright (C) 1991, 1992, 1995  Linus Torvalds
- */
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/init.h>
-#include <linux/profile.h>
-#include <linux/timex.h>
-#include <linux/sched.h>
-#include <linux/clockchips.h>
-#include <linux/mc146818rtc.h>  /* for rtc_lock */
-#include <linux/smp.h>
-#include <asm/clock.h>
-#include <asm/rtc.h>
-#include <asm/timer.h>
-#include <asm/kgdb.h>
-
-struct sys_timer *sys_timer;
-
-/* Move this somewhere more sensible.. */
-DEFINE_SPINLOCK(rtc_lock);
-EXPORT_SYMBOL(rtc_lock);
-
-/* Dummy RTC ops */
-static void null_rtc_get_time(struct timespec *tv)
-{
-        tv->tv_sec = mktime(2000, 1, 1, 0, 0, 0);
-        tv->tv_nsec = 0;
-}
-
-static int null_rtc_set_time(const time_t secs)
-{
-        return 0;
-}
-
-void (*rtc_sh_get_time)(struct timespec *) = null_rtc_get_time;
-int (*rtc_sh_set_time)(const time_t) = null_rtc_set_time;
-
-#ifndef CONFIG_GENERIC_TIME
-void do_gettimeofday(struct timeval *tv)
-{
-        unsigned long flags;
-        unsigned long seq;
-        unsigned long usec, sec;
-
-        do {
-                /*
-                 * Turn off IRQs when grabbing xtime_lock, so that
-                 * the sys_timer get_offset code doesn't have to handle it.
-                 */
-                seq = read_seqbegin_irqsave(&xtime_lock, flags);
-                usec = get_timer_offset();
-                sec = xtime.tv_sec;
-                usec += xtime.tv_nsec / NSEC_PER_USEC;
-        } while (read_seqretry_irqrestore(&xtime_lock, seq, flags));
-
-        while (usec >= 1000000) {
-                usec -= 1000000;
-                sec++;
-        }
-
-        tv->tv_sec = sec;
-        tv->tv_usec = usec;
-}
-EXPORT_SYMBOL(do_gettimeofday);
-
-int do_settimeofday(struct timespec *tv)
-{
-        time_t wtm_sec, sec = tv->tv_sec;
-        long wtm_nsec, nsec = tv->tv_nsec;
-
-        if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
-                return -EINVAL;
-
-        write_seqlock_irq(&xtime_lock);
-        /*
-         * This is revolting. We need to set "xtime" correctly. However, the
-         * value in this location is the value at the most recent update of
-         * wall time.  Discover what correction gettimeofday() would have
-         * made, and then undo it!
-         */
-        nsec -= get_timer_offset() * NSEC_PER_USEC;
-
-        wtm_sec  = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
-        wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
-
-        set_normalized_timespec(&xtime, sec, nsec);
-        set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
-
-        ntp_clear();
-        write_sequnlock_irq(&xtime_lock);
-        clock_was_set();
-
-        return 0;
-}
-EXPORT_SYMBOL(do_settimeofday);
-#endif /* !CONFIG_GENERIC_TIME */
-
-/* last time the RTC clock got updated */
-static long last_rtc_update;
-
-/*
- * handle_timer_tick() needs to keep up the real-time clock,
- * as well as call the "do_timer()" routine every clocktick
- */
-void handle_timer_tick(void)
-{
-        if (current->pid)
-                profile_tick(CPU_PROFILING);
-
-        /*
-         * Here we are in the timer irq handler. We just have irqs locally
-         * disabled but we don't know if the timer_bh is running on the other
-         * CPU. We need to avoid to SMP race with it. NOTE: we don' t need
-         * the irq version of write_lock because as just said we have irq
-         * locally disabled. -arca
-         */
-        write_seqlock(&xtime_lock);
-        do_timer(1);
-
-        /*
-         * If we have an externally synchronized Linux clock, then update
-         * RTC clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
-         * called as close as possible to 500 ms before the new second starts.
-         */
-        if (ntp_synced() &&
-            xtime.tv_sec > last_rtc_update + 660 &&
-            (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
-            (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
-                if (rtc_sh_set_time(xtime.tv_sec) == 0)
-                        last_rtc_update = xtime.tv_sec;
-                else
-                        /* do it again in 60s */
-                        last_rtc_update = xtime.tv_sec - 600;
-        }
-        write_sequnlock(&xtime_lock);
-
-#ifndef CONFIG_SMP
-        update_process_times(user_mode(get_irq_regs()));
-#endif
-}
-
-#ifdef CONFIG_PM
-int timer_suspend(struct sys_device *dev, pm_message_t state)
-{
-        struct sys_timer *sys_timer = container_of(dev, struct sys_timer, dev);
-
-        sys_timer->ops->stop();
-
-        return 0;
-}
-
-int timer_resume(struct sys_device *dev)
-{
-        struct sys_timer *sys_timer = container_of(dev, struct sys_timer, dev);
-
-        sys_timer->ops->start();
-
-        return 0;
-}
-#else
-#define timer_suspend NULL
-#define timer_resume NULL
-#endif
-
-static struct sysdev_class timer_sysclass = {
-        .name    = "timer",
-        .suspend = timer_suspend,
-        .resume  = timer_resume,
-};
-
-static int __init timer_init_sysfs(void)
-{
-        int ret;
-
-        if (!sys_timer)
-                return 0;
-
-        ret = sysdev_class_register(&timer_sysclass);
-        if (ret != 0)
-                return ret;
-
-        sys_timer->dev.cls = &timer_sysclass;
-        return sysdev_register(&sys_timer->dev);
-}
-device_initcall(timer_init_sysfs);
-
-void (*board_time_init)(void);
-
-struct clocksource clocksource_sh = {
-        .name           = "SuperH",
-};
-
-#ifdef CONFIG_GENERIC_TIME
-unsigned long long sched_clock(void)
-{
-        unsigned long long cycles;
-
-        /* jiffies based sched_clock if no clocksource is installed */
-        if (!clocksource_sh.rating)
-                return (unsigned long long)jiffies * (NSEC_PER_SEC / HZ);
-
-        cycles = clocksource_sh.read(&clocksource_sh);
-        return cyc2ns(&clocksource_sh, cycles);
-}
-#endif
-
-void __init time_init(void)
-{
-        if (board_time_init)
-                board_time_init();
-
-        clk_init();
-
-        rtc_sh_get_time(&xtime);
-        set_normalized_timespec(&wall_to_monotonic,
-                                -xtime.tv_sec, -xtime.tv_nsec);
-
-#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
-        local_timer_setup(smp_processor_id());
-#endif
-
-        /*
-         * Find the timer to use as the system timer, it will be
-         * initialized for us.
-         */
-        sys_timer = get_sys_timer();
-        if (unlikely(!sys_timer))
-                panic("System timer missing.\n");
-
-        printk(KERN_INFO "Using %s for system timer\n", sys_timer->name);
-}
diff --git a/arch/sh/kernel/time_64.c b/arch/sh/kernel/time_64.c
deleted file mode 100644
index 988c77c37231..000000000000
--- a/arch/sh/kernel/time_64.c
+++ /dev/null
@@ -1,363 +0,0 @@
-/*
- * arch/sh/kernel/time_64.c
- *
- * Copyright (C) 2000, 2001  Paolo Alberelli
- * Copyright (C) 2003 - 2007  Paul Mundt
- * Copyright (C) 2003  Richard Curnow
- *
- *    Original TMU/RTC code taken from sh version.
- *    Copyright (C) 1999  Tetsuya Okada & Niibe Yutaka
- *      Some code taken from i386 version.
- *      Copyright (C) 1991, 1992, 1995  Linus Torvalds
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/errno.h>
-#include <linux/rwsem.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/param.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/interrupt.h>
-#include <linux/time.h>
-#include <linux/delay.h>
-#include <linux/init.h>
-#include <linux/profile.h>
-#include <linux/smp.h>
-#include <linux/module.h>
-#include <linux/bcd.h>
-#include <linux/timex.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-#include <linux/platform_device.h>
-#include <cpu/registers.h>       /* required by inline __asm__ stmt. */
-#include <cpu/irq.h>
-#include <asm/addrspace.h>
-#include <asm/processor.h>
-#include <asm/uaccess.h>
-#include <asm/delay.h>
-#include <asm/clock.h>
-
-#define TMU_TOCR_INIT   0x00
-#define TMU0_TCR_INIT   0x0020
-#define TMU_TSTR_INIT   1
-#define TMU_TSTR_OFF    0
-
-/* Real Time Clock */
-#define RTC_BLOCK_OFF   0x01040000
-#define RTC_BASE        PHYS_PERIPHERAL_BLOCK + RTC_BLOCK_OFF
-#define RTC_RCR1_CIE    0x10    /* Carry Interrupt Enable */
-#define RTC_RCR1        (rtc_base + 0x38)
-
-/* Time Management Unit */
-#define TMU_BLOCK_OFF   0x01020000
-#define TMU_BASE        PHYS_PERIPHERAL_BLOCK + TMU_BLOCK_OFF
-#define TMU0_BASE       tmu_base + 0x8 + (0xc * 0x0)
-#define TMU1_BASE       tmu_base + 0x8 + (0xc * 0x1)
-#define TMU2_BASE       tmu_base + 0x8 + (0xc * 0x2)
-
-#define TMU_TOCR        tmu_base+0x0    /* Byte access */
-#define TMU_TSTR        tmu_base+0x4    /* Byte access */
-
-#define TMU0_TCOR       TMU0_BASE+0x0   /* Long access */
-#define TMU0_TCNT       TMU0_BASE+0x4   /* Long access */
-#define TMU0_TCR        TMU0_BASE+0x8   /* Word access */
-
-#define TICK_SIZE (tick_nsec / 1000)
-
-static unsigned long tmu_base, rtc_base;
-unsigned long cprc_base;
-
-/* Variables to allow interpolation of time of day to resolution better than a
- * jiffy. */
-
-/* This is effectively protected by xtime_lock */
-static unsigned long ctc_last_interrupt;
-static unsigned long long usecs_per_jiffy = 1000000/HZ; /* Approximation */
-
-#define CTC_JIFFY_SCALE_SHIFT 40
-
-/* 2**CTC_JIFFY_SCALE_SHIFT / ctc_ticks_per_jiffy */
-static unsigned long long scaled_recip_ctc_ticks_per_jiffy;
-
-/* Estimate number of microseconds that have elapsed since the last timer tick,
-   by scaling the delta that has occurred in the CTC register.
-
-   WARNING WARNING WARNING : This algorithm relies on the CTC decrementing at
-   the CPU clock rate.  If the CPU sleeps, the CTC stops counting.  Bear this
-   in mind if enabling SLEEP_WORKS in process.c.  In that case, this algorithm
-   probably needs to use TMU.TCNT0 instead.  This will work even if the CPU is
-   sleeping, though will be coarser.
-
-   FIXME : What if usecs_per_tick is moving around too much, e.g. if an adjtime
-   is running or if the freq or tick arguments of adjtimex are modified after
-   we have calibrated the scaling factor?  This will result in either a jump at
-   the end of a tick period, or a wrap backwards at the start of the next one,
-   if the application is reading the time of day often enough.  I think we
-   ought to do better than this.  For this reason, usecs_per_jiffy is left
-   separated out in the calculation below.  This allows some future hook into
-   the adjtime-related stuff in kernel/timer.c to remove this hazard.
-
-*/
-
-static unsigned long usecs_since_tick(void)
-{
-        unsigned long long current_ctc;
-        long ctc_ticks_since_interrupt;
-        unsigned long long ull_ctc_ticks_since_interrupt;
-        unsigned long result;
-
-        unsigned long long mul1_out;
-        unsigned long long mul1_out_high;
-        unsigned long long mul2_out_low, mul2_out_high;
-
-        /* Read CTC register */
-        asm ("getcon cr62, %0" : "=r" (current_ctc));
-        /* Note, the CTC counts down on each CPU clock, not up.
-           Note(2), use long type to get correct wraparound arithmetic when
-           the counter crosses zero. */
-        ctc_ticks_since_interrupt = (long) ctc_last_interrupt - (long) current_ctc;
-        ull_ctc_ticks_since_interrupt = (unsigned long long) ctc_ticks_since_interrupt;
-
-        /* Inline assembly to do 32x32x32->64 multiplier */
-        asm volatile ("mulu.l %1, %2, %0" :
-             "=r" (mul1_out) :
-             "r" (ull_ctc_ticks_since_interrupt), "r" (usecs_per_jiffy));
-
-        mul1_out_high = mul1_out >> 32;
-
-        asm volatile ("mulu.l %1, %2, %0" :
-             "=r" (mul2_out_low) :
-             "r" (mul1_out), "r" (scaled_recip_ctc_ticks_per_jiffy));
-
-#if 1
-        asm volatile ("mulu.l %1, %2, %0" :
-             "=r" (mul2_out_high) :
-             "r" (mul1_out_high), "r" (scaled_recip_ctc_ticks_per_jiffy));
-#endif
-
-        result = (unsigned long) (((mul2_out_high << 32) + mul2_out_low) >> CTC_JIFFY_SCALE_SHIFT);
-
-        return result;
-}
-
-void do_gettimeofday(struct timeval *tv)
-{
-        unsigned long flags;
-        unsigned long seq;
-        unsigned long usec, sec;
-
-        do {
-                seq = read_seqbegin_irqsave(&xtime_lock, flags);
-                usec = usecs_since_tick();
-                sec = xtime.tv_sec;
-                usec += xtime.tv_nsec / 1000;
-        } while (read_seqretry_irqrestore(&xtime_lock, seq, flags));
-
-        while (usec >= 1000000) {
-                usec -= 1000000;
-                sec++;
-        }
-
-        tv->tv_sec = sec;
-        tv->tv_usec = usec;
-}
-EXPORT_SYMBOL(do_gettimeofday);
-
-int do_settimeofday(struct timespec *tv)
-{
-        time_t wtm_sec, sec = tv->tv_sec;
-        long wtm_nsec, nsec = tv->tv_nsec;
-
-        if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
-                return -EINVAL;
-
-        write_seqlock_irq(&xtime_lock);
-        /*
-         * This is revolting. We need to set "xtime" correctly. However, the
-         * value in this location is the value at the most recent update of
-         * wall time.  Discover what correction gettimeofday() would have
-         * made, and then undo it!
-         */
-        nsec -= 1000 * usecs_since_tick();
-
-        wtm_sec  = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
-        wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
-
-        set_normalized_timespec(&xtime, sec, nsec);
-        set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
-
-        ntp_clear();
-        write_sequnlock_irq(&xtime_lock);
-        clock_was_set();
-
-        return 0;
-}
-EXPORT_SYMBOL(do_settimeofday);
-
-/* Dummy RTC ops */
-static void null_rtc_get_time(struct timespec *tv)
-{
-        tv->tv_sec = mktime(2000, 1, 1, 0, 0, 0);
-        tv->tv_nsec = 0;
-}
-
-static int null_rtc_set_time(const time_t secs)
-{
-        return 0;
-}
-
-void (*rtc_sh_get_time)(struct timespec *) = null_rtc_get_time;
-int (*rtc_sh_set_time)(const time_t) = null_rtc_set_time;
-
-/* last time the RTC clock got updated */
-static long last_rtc_update;
-
-/*
- * timer_interrupt() needs to keep up the real-time clock,
- * as well as call the "do_timer()" routine every clocktick
- */
-static inline void do_timer_interrupt(void)
-{
-        unsigned long long current_ctc;
-
-        if (current->pid)
-                profile_tick(CPU_PROFILING);
-
-        /*
-         * Here we are in the timer irq handler. We just have irqs locally
-         * disabled but we don't know if the timer_bh is running on the other
-         * CPU. We need to avoid to SMP race with it. NOTE: we don' t need
-         * the irq version of write_lock because as just said we have irq
-         * locally disabled. -arca
-         */
-        write_seqlock(&xtime_lock);
-        asm ("getcon cr62, %0" : "=r" (current_ctc));
-        ctc_last_interrupt = (unsigned long) current_ctc;
-
-        do_timer(1);
-
-        /*
-         * If we have an externally synchronized Linux clock, then update
-         * RTC clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
-         * called as close as possible to 500 ms before the new second starts.
-         */
-        if (ntp_synced() &&
-            xtime.tv_sec > last_rtc_update + 660 &&
-            (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
-            (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
-                if (rtc_sh_set_time(xtime.tv_sec) == 0)
-                        last_rtc_update = xtime.tv_sec;
-                else
-                        /* do it again in 60 s */
-                        last_rtc_update = xtime.tv_sec - 600;
-        }
-        write_sequnlock(&xtime_lock);
-
-#ifndef CONFIG_SMP
-        update_process_times(user_mode(get_irq_regs()));
-#endif
-}
-
-/*
- * This is the same as the above, except we _also_ save the current
- * Time Stamp Counter value at the time of the timer interrupt, so that
- * we later on can estimate the time of day more exactly.
- */
-static irqreturn_t timer_interrupt(int irq, void *dev_id)
-{
-        unsigned long timer_status;
-
-        /* Clear UNF bit */
-        timer_status = ctrl_inw(TMU0_TCR);
-        timer_status &= ~0x100;
-        ctrl_outw(timer_status, TMU0_TCR);
-
-        do_timer_interrupt();
-
-        return IRQ_HANDLED;
-}
-
-static struct irqaction irq0  = {
-        .handler = timer_interrupt,
-        .flags = IRQF_DISABLED,
-        .name = "timer",
-};
-
-void __init time_init(void)
-{
-        unsigned long interval;
-        struct clk *clk;
-
-        tmu_base = onchip_remap(TMU_BASE, 1024, "TMU");
-        if (!tmu_base) {
-                panic("Unable to remap TMU\n");
-        }
-
-        rtc_base = onchip_remap(RTC_BASE, 1024, "RTC");
-        if (!rtc_base) {
-                panic("Unable to remap RTC\n");
-        }
-
-        clk = clk_get(NULL, "cpu_clk");
-        scaled_recip_ctc_ticks_per_jiffy = ((1ULL << CTC_JIFFY_SCALE_SHIFT) /
-                        (unsigned long long)(clk_get_rate(clk) / HZ));
-
-        rtc_sh_get_time(&xtime);
-
-        setup_irq(TIMER_IRQ, &irq0);
-
-        clk = clk_get(NULL, "module_clk");
-        interval = (clk_get_rate(clk)/(HZ*4));
-
-        printk("Interval = %ld\n", interval);
-
-        /* Start TMU0 */
-        ctrl_outb(TMU_TSTR_OFF, TMU_TSTR);
-        ctrl_outb(TMU_TOCR_INIT, TMU_TOCR);
-        ctrl_outw(TMU0_TCR_INIT, TMU0_TCR);
-        ctrl_outl(interval, TMU0_TCOR);
-        ctrl_outl(interval, TMU0_TCNT);
-        ctrl_outb(TMU_TSTR_INIT, TMU_TSTR);
-}
-
-static struct resource rtc_resources[] = {
-        [0] = {
-                /* RTC base, filled in by rtc_init */
-                .flags  = IORESOURCE_IO,
-        },
-        [1] = {
-                /* Period IRQ */
-                .start  = IRQ_PRI,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [2] = {
-                /* Carry IRQ */
-                .start  = IRQ_CUI,
-                .flags  = IORESOURCE_IRQ,
-        },
-        [3] = {
-                /* Alarm IRQ */
-                .start  = IRQ_ATI,
-                .flags  = IORESOURCE_IRQ,
-        },
-};
-
-static struct platform_device rtc_device = {
-        .name           = "sh-rtc",
-        .id             = -1,
-        .num_resources  = ARRAY_SIZE(rtc_resources),
-        .resource       = rtc_resources,
-};
-
-static int __init rtc_init(void)
-{
-        rtc_resources[0].start  = rtc_base;
-        rtc_resources[0].end    = rtc_resources[0].start + 0x58 - 1;
-
-        return platform_device_register(&rtc_device);
-}
-device_initcall(rtc_init);
diff --git a/arch/sh/kernel/timers/Makefile b/arch/sh/kernel/timers/Makefile
deleted file mode 100644
index 0b7f8577193f..000000000000
--- a/arch/sh/kernel/timers/Makefile
+++ /dev/null
@@ -1,11 +0,0 @@
-#
-# Makefile for the various Linux/SuperH timers
-#
-
-obj-y   := timer.o
-
-obj-$(CONFIG_SH_TMU)            += timer-tmu.o
-obj-$(CONFIG_SH_MTU2)           += timer-mtu2.o
-obj-$(CONFIG_SH_CMT)            += timer-cmt.o
-
-obj-$(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST)     += timer-broadcast.o
diff --git a/arch/sh/kernel/timers/timer-cmt.c b/arch/sh/kernel/timers/timer-cmt.c
deleted file mode 100644
index 9aa348658ae3..000000000000
--- a/arch/sh/kernel/timers/timer-cmt.c
+++ /dev/null
@@ -1,188 +0,0 @@
-/*
- * arch/sh/kernel/timers/timer-cmt.c - CMT Timer Support
- *
- *  Copyright (C) 2005  Yoshinori Sato
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/seqlock.h>
-#include <asm/timer.h>
-#include <asm/rtc.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/clock.h>
-
-#if defined(CONFIG_CPU_SUBTYPE_SH7619)
-#define CMT_CMSTR       0xf84a0070
-#define CMT_CMCSR_0     0xf84a0072
-#define CMT_CMCNT_0     0xf84a0074
-#define CMT_CMCOR_0     0xf84a0076
-#define CMT_CMCSR_1     0xf84a0078
-#define CMT_CMCNT_1     0xf84a007a
-#define CMT_CMCOR_1     0xf84a007c
-
-#define STBCR3          0xf80a0000
-#define cmt_clock_enable() do { ctrl_outb(ctrl_inb(STBCR3) & ~0x10, STBCR3); } while(0)
-#define CMT_CMCSR_INIT  0x0040
-#define CMT_CMCSR_CALIB 0x0000
-#elif defined(CONFIG_CPU_SUBTYPE_SH7203) || \
-      defined(CONFIG_CPU_SUBTYPE_SH7206) || \
-      defined(CONFIG_CPU_SUBTYPE_SH7263)
-#define CMT_CMSTR       0xfffec000
-#define CMT_CMCSR_0     0xfffec002
-#define CMT_CMCNT_0     0xfffec004
-#define CMT_CMCOR_0     0xfffec006
-
-#define STBCR4          0xfffe040c
-#define cmt_clock_enable() do { ctrl_outb(ctrl_inb(STBCR4) & ~0x04, STBCR4); } while(0)
-#define CMT_CMCSR_INIT  0x0040
-#define CMT_CMCSR_CALIB 0x0000
-#else
-#error "Unknown CPU SUBTYPE"
-#endif
-
-static unsigned long cmt_timer_get_offset(void)
-{
-        int count;
-        static unsigned short count_p = 0xffff;    /* for the first call after boot */
-        static unsigned long jiffies_p = 0;
-
-        /*
-         * cache volatile jiffies temporarily; we have IRQs turned off.
-         */
-        unsigned long jiffies_t;
-
-        /* timer count may underflow right here */
-        count =  ctrl_inw(CMT_CMCOR_0);
-        count -= ctrl_inw(CMT_CMCNT_0);
-
-        jiffies_t = jiffies;
-
-        /*
-         * avoiding timer inconsistencies (they are rare, but they happen)...
-         * there is one kind of problem that must be avoided here:
-         *  1. the timer counter underflows
-         */
-
-        if (jiffies_t == jiffies_p) {
-                if (count > count_p) {
-                        /* the nutcase */
-                        if (ctrl_inw(CMT_CMCSR_0) & 0x80) { /* Check CMF bit */
-                                count -= LATCH;
-                        } else {
-                                printk("%s (): hardware timer problem?\n",
-                                       __func__);
-                        }
-                }
-        } else
-                jiffies_p = jiffies_t;
-
-        count_p = count;
-
-        count = ((LATCH-1) - count) * TICK_SIZE;
-        count = (count + LATCH/2) / LATCH;
-
-        return count;
-}
-
-static irqreturn_t cmt_timer_interrupt(int irq, void *dev_id)
-{
-        unsigned long timer_status;
-
-        /* Clear CMF bit */
-        timer_status = ctrl_inw(CMT_CMCSR_0);
-        timer_status &= ~0x80;
-        ctrl_outw(timer_status, CMT_CMCSR_0);
-
-        handle_timer_tick();
-
-        return IRQ_HANDLED;
-}
-
-static struct irqaction cmt_irq = {
-        .name           = "timer",
-        .handler        = cmt_timer_interrupt,
-        .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
-};
-
-static void cmt_clk_init(struct clk *clk)
-{
-        u8 divisor = CMT_CMCSR_INIT & 0x3;
-        ctrl_inw(CMT_CMCSR_0);
-        ctrl_outw(CMT_CMCSR_INIT, CMT_CMCSR_0);
-        clk->parent = clk_get(NULL, "module_clk");
-        clk->rate = clk->parent->rate / (8 << (divisor << 1));
-}
-
-static void cmt_clk_recalc(struct clk *clk)
-{
-        u8 divisor = ctrl_inw(CMT_CMCSR_0) & 0x3;
-        clk->rate = clk->parent->rate / (8 << (divisor << 1));
-}
-
-static struct clk_ops cmt_clk_ops = {
-        .init           = cmt_clk_init,
-        .recalc         = cmt_clk_recalc,
-};
-
-static struct clk cmt0_clk = {
-        .name           = "cmt0_clk",
-        .ops            = &cmt_clk_ops,
-};
-
-static int cmt_timer_start(void)
-{
-        ctrl_outw(ctrl_inw(CMT_CMSTR) | 0x01, CMT_CMSTR);
-        return 0;
-}
-
-static int cmt_timer_stop(void)
-{
-        ctrl_outw(ctrl_inw(CMT_CMSTR) & ~0x01, CMT_CMSTR);
-        return 0;
-}
-
-static int cmt_timer_init(void)
-{
-        unsigned long interval;
-
-        cmt_clock_enable();
-
-        setup_irq(CONFIG_SH_TIMER_IRQ, &cmt_irq);
-
-        cmt0_clk.parent = clk_get(NULL, "module_clk");
-
-        cmt_timer_stop();
-
-        interval = cmt0_clk.parent->rate / 8 / HZ;
-        printk(KERN_INFO "Interval = %ld\n", interval);
-
-        ctrl_outw(interval, CMT_CMCOR_0);
-
-        clk_register(&cmt0_clk);
-        clk_enable(&cmt0_clk);
-
-        cmt_timer_start();
-
-        return 0;
-}
-
-static struct sys_timer_ops cmt_timer_ops = {
-        .init           = cmt_timer_init,
-        .start          = cmt_timer_start,
-        .stop           = cmt_timer_stop,
-#ifndef CONFIG_GENERIC_TIME
-        .get_offset     = cmt_timer_get_offset,
-#endif
-};
-
-struct sys_timer cmt_timer = {
-        .name   = "cmt",
-        .ops    = &cmt_timer_ops,
-};
diff --git a/arch/sh/kernel/timers/timer-mtu2.c b/arch/sh/kernel/timers/timer-mtu2.c
deleted file mode 100644
index 9b0ef0126479..000000000000
--- a/arch/sh/kernel/timers/timer-mtu2.c
+++ /dev/null
@@ -1,202 +0,0 @@
-/*
- * arch/sh/kernel/timers/timer-mtu2.c - MTU2 Timer Support
- *
- *  Copyright (C) 2005  Paul Mundt
- *
- * Based off of arch/sh/kernel/timers/timer-tmu.c
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/seqlock.h>
-#include <asm/timer.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/clock.h>
-
-/*
- * We use channel 1 for our lowly system timer. Channel 2 would be the other
- * likely candidate, but we leave it alone as it has higher divisors that
- * would be of more use to other more interesting applications.
- *
- * TODO: Presently we only implement a 16-bit single-channel system timer.
- * However, we can implement channel cascade if we go the overflow route and
- * get away with using 2 MTU2 channels as a 32-bit timer.
- */
-#define MTU2_TSTR       0xfffe4280
-#define MTU2_TCR_1      0xfffe4380
-#define MTU2_TMDR_1     0xfffe4381
-#define MTU2_TIOR_1     0xfffe4382
-#define MTU2_TIER_1     0xfffe4384
-#define MTU2_TSR_1      0xfffe4385
-#define MTU2_TCNT_1     0xfffe4386      /* 16-bit counter */
-
-#if defined(CONFIG_CPU_SUBTYPE_SH7201) || \
-    defined(CONFIG_CPU_SUBTYPE_SH7203)
-#define MTU2_TGRA_1     0xfffe4388
-#else
-#define MTU2_TGRA_1     0xfffe438a
-#endif
-
-#define STBCR3          0xfffe0408
-
-#define MTU2_TSTR_CST1  (1 << 1)        /* Counter Start 1 */
-
-#define MTU2_TSR_TGFA   (1 << 0)        /* GRA compare match */
-
-#define MTU2_TIER_TGIEA (1 << 0)        /* GRA compare match  interrupt enable */
-
-#define MTU2_TCR_INIT   0x22
-
-#define MTU2_TCR_CALIB  0x00
-
-static unsigned long mtu2_timer_get_offset(void)
-{
-        int count;
-        static int count_p = 0x7fff;    /* for the first call after boot */
-        static unsigned long jiffies_p = 0;
-
-        /*
-         * cache volatile jiffies temporarily; we have IRQs turned off.
-         */
-        unsigned long jiffies_t;
-
-        /* timer count may underflow right here */
-        count = ctrl_inw(MTU2_TCNT_1);  /* read the latched count */
-
-        jiffies_t = jiffies;
-
-        /*
-         * avoiding timer inconsistencies (they are rare, but they happen)...
-         * there is one kind of problem that must be avoided here:
-         *  1. the timer counter underflows
-         */
-
-        if (jiffies_t == jiffies_p) {
-                if (count > count_p) {
-                        if (ctrl_inb(MTU2_TSR_1) & MTU2_TSR_TGFA) {
-                                count -= LATCH;
-                        } else {
-                                printk("%s (): hardware timer problem?\n",
-                                       __func__);
-                        }
-                }
-        } else
-                jiffies_p = jiffies_t;
-
-        count_p = count;
-
-        count = ((LATCH-1) - count) * TICK_SIZE;
-        count = (count + LATCH/2) / LATCH;
-
-        return count;
-}
-
-static irqreturn_t mtu2_timer_interrupt(int irq, void *dev_id)
-{
-        unsigned long timer_status;
-
-        /* Clear TGFA bit */
-        timer_status = ctrl_inb(MTU2_TSR_1);
-        timer_status &= ~MTU2_TSR_TGFA;
-        ctrl_outb(timer_status, MTU2_TSR_1);
-
-        /* Do timer tick */
-        handle_timer_tick();
-
-        return IRQ_HANDLED;
-}
-
-static struct irqaction mtu2_irq = {
-        .name           = "timer",
-        .handler        = mtu2_timer_interrupt,
-        .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
-};
-
-static unsigned int divisors[] = { 1, 4, 16, 64, 1, 1, 256 };
-
-static void mtu2_clk_init(struct clk *clk)
-{
-        u8 idx = MTU2_TCR_INIT & 0x7;
-
-        clk->rate = clk->parent->rate / divisors[idx];
-        /* Start TCNT counting */
-        ctrl_outb(ctrl_inb(MTU2_TSTR) | MTU2_TSTR_CST1, MTU2_TSTR);
-
-}
-
-static void mtu2_clk_recalc(struct clk *clk)
-{
-        u8 idx = ctrl_inb(MTU2_TCR_1) & 0x7;
-        clk->rate = clk->parent->rate / divisors[idx];
-}
-
-static struct clk_ops mtu2_clk_ops = {
-        .init           = mtu2_clk_init,
-        .recalc         = mtu2_clk_recalc,
-};
-
-static struct clk mtu2_clk1 = {
-        .name           = "mtu2_clk1",
-        .ops            = &mtu2_clk_ops,
-};
-
-static int mtu2_timer_start(void)
-{
-        ctrl_outb(ctrl_inb(MTU2_TSTR) | MTU2_TSTR_CST1, MTU2_TSTR);
-        return 0;
-}
-
-static int mtu2_timer_stop(void)
-{
-        ctrl_outb(ctrl_inb(MTU2_TSTR) & ~MTU2_TSTR_CST1, MTU2_TSTR);
-        return 0;
-}
-
-static int mtu2_timer_init(void)
-{
-        unsigned long interval;
-
-        setup_irq(CONFIG_SH_TIMER_IRQ, &mtu2_irq);
-
-        mtu2_clk1.parent = clk_get(NULL, "module_clk");
-
-        ctrl_outb(ctrl_inb(STBCR3) & (~0x20), STBCR3);
-
-        /* Normal operation */
-        ctrl_outb(0, MTU2_TMDR_1);
-        ctrl_outb(MTU2_TCR_INIT, MTU2_TCR_1);
-        ctrl_outb(0x01, MTU2_TIOR_1);
-
-        /* Enable underflow interrupt */
-        ctrl_outb(ctrl_inb(MTU2_TIER_1) | MTU2_TIER_TGIEA, MTU2_TIER_1);
-
-        interval = CONFIG_SH_PCLK_FREQ / 16 / HZ;
-        printk(KERN_INFO "Interval = %ld\n", interval);
-
-        ctrl_outw(interval, MTU2_TGRA_1);
-        ctrl_outw(0, MTU2_TCNT_1);
-
-        clk_register(&mtu2_clk1);
-        clk_enable(&mtu2_clk1);
-
-        return 0;
-}
-
-struct sys_timer_ops mtu2_timer_ops = {
-        .init           = mtu2_timer_init,
-        .start          = mtu2_timer_start,
-        .stop           = mtu2_timer_stop,
-#ifndef CONFIG_GENERIC_TIME
-        .get_offset     = mtu2_timer_get_offset,
-#endif
-};
-
-struct sys_timer mtu2_timer = {
-        .name   = "mtu2",
-        .ops    = &mtu2_timer_ops,
-};
diff --git a/arch/sh/kernel/timers/timer-tmu.c b/arch/sh/kernel/timers/timer-tmu.c
deleted file mode 100644
index fe8d8930ccb6..000000000000
--- a/arch/sh/kernel/timers/timer-tmu.c
+++ /dev/null
@@ -1,297 +0,0 @@
-/*
- * arch/sh/kernel/timers/timer-tmu.c - TMU Timer Support
- *
- *  Copyright (C) 2005 - 2007  Paul Mundt
- *
- * TMU handling code hacked out of arch/sh/kernel/time.c
- *
- *  Copyright (C) 1999  Tetsuya Okada & Niibe Yutaka
- *  Copyright (C) 2000  Philipp Rumpf <prumpf@tux.org>
- *  Copyright (C) 2002, 2003, 2004  Paul Mundt
- *  Copyright (C) 2002  M. R. Brown  <mrbrown@linux-sh.org>
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/seqlock.h>
-#include <linux/clockchips.h>
-#include <asm/timer.h>
-#include <asm/rtc.h>
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/clock.h>
-
-#define TMU_TOCR_INIT   0x00
-#define TMU_TCR_INIT    0x0020
-
-#define TMU0            (0)
-#define TMU1            (1)
-
-static inline void _tmu_start(int tmu_num)
-{
-        ctrl_outb(ctrl_inb(TMU_012_TSTR) | (0x1<<tmu_num), TMU_012_TSTR);
-}
-
-static inline void _tmu_set_irq(int tmu_num, int enabled)
-{
-        register unsigned long tmu_tcr = TMU0_TCR + (0xc*tmu_num);
-        ctrl_outw( (enabled ? ctrl_inw(tmu_tcr) | (1<<5) : ctrl_inw(tmu_tcr) & ~(1<<5)), tmu_tcr);
-}
-
-static inline void _tmu_stop(int tmu_num)
-{
-        ctrl_outb(ctrl_inb(TMU_012_TSTR) & ~(0x1<<tmu_num), TMU_012_TSTR);
-}
-
-static inline void _tmu_clear_status(int tmu_num)
-{
-        register unsigned long tmu_tcr = TMU0_TCR + (0xc*tmu_num);
-        /* Clear UNF bit */
-        ctrl_outw(ctrl_inw(tmu_tcr) & ~0x100, tmu_tcr);
-}
-
-static inline unsigned long _tmu_read(int tmu_num)
-{
-        return ctrl_inl(TMU0_TCNT+0xC*tmu_num);
-}
-
-static int tmu_timer_start(void)
-{
-        _tmu_start(TMU0);
-        _tmu_start(TMU1);
-        _tmu_set_irq(TMU0,1);
-        return 0;
-}
-
-static int tmu_timer_stop(void)
-{
-        _tmu_stop(TMU0);
-        _tmu_stop(TMU1);
-        _tmu_clear_status(TMU0);
-        return 0;
-}
-
-/*
- * also when the module_clk is scaled the TMU1
- * will show the same frequency
- */
-static int tmus_are_scaled;
-
-static cycle_t tmu_timer_read(struct clocksource *cs)
-{
-        return ((cycle_t)(~_tmu_read(TMU1)))<<tmus_are_scaled;
-}
-
-
-static unsigned long tmu_latest_interval[3];
-static void tmu_timer_set_interval(int tmu_num, unsigned long interval, unsigned int reload)
-{
-        unsigned long tmu_tcnt = TMU0_TCNT + tmu_num*0xC;
-        unsigned long tmu_tcor = TMU0_TCOR + tmu_num*0xC;
-
-        _tmu_stop(tmu_num);
-
-        ctrl_outl(interval, tmu_tcnt);
-        tmu_latest_interval[tmu_num] = interval;
-
-        /*
-         * TCNT reloads from TCOR on underflow, clear it if we don't
-         * intend to auto-reload
-         */
-        ctrl_outl( reload ? interval : 0 , tmu_tcor);
-
-        _tmu_start(tmu_num);
-}
-
-static int tmu_set_next_event(unsigned long cycles,
-                              struct clock_event_device *evt)
-{
-        tmu_timer_set_interval(TMU0,cycles, evt->mode == CLOCK_EVT_MODE_PERIODIC);
-        _tmu_set_irq(TMU0,1);
-        return 0;
-}
-
-static void tmu_set_mode(enum clock_event_mode mode,
-                         struct clock_event_device *evt)
-{
-        switch (mode) {
-        case CLOCK_EVT_MODE_PERIODIC:
-                ctrl_outl(tmu_latest_interval[TMU0], TMU0_TCOR);
-                break;
-        case CLOCK_EVT_MODE_ONESHOT:
-                ctrl_outl(0, TMU0_TCOR);
-                break;
-        case CLOCK_EVT_MODE_UNUSED:
-        case CLOCK_EVT_MODE_SHUTDOWN:
-        case CLOCK_EVT_MODE_RESUME:
-                break;
-        }
-}
-
-static struct clock_event_device tmu0_clockevent = {
-        .name           = "tmu0",
-        .shift          = 32,
-        .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
-        .set_mode       = tmu_set_mode,
-        .set_next_event = tmu_set_next_event,
-};
-
-static irqreturn_t tmu_timer_interrupt(int irq, void *dummy)
-{
-        struct clock_event_device *evt = &tmu0_clockevent;
-        _tmu_clear_status(TMU0);
-        _tmu_set_irq(TMU0,tmu0_clockevent.mode != CLOCK_EVT_MODE_ONESHOT);
-
-        switch (tmu0_clockevent.mode) {
-        case CLOCK_EVT_MODE_ONESHOT:
-        case CLOCK_EVT_MODE_PERIODIC:
-                evt->event_handler(evt);
-                break;
-        default:
-                break;
-        }
-
-        return IRQ_HANDLED;
-}
-
-static struct irqaction tmu0_irq = {
-        .name           = "periodic/oneshot timer",
-        .handler        = tmu_timer_interrupt,
-        .flags          = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
-};
-
-static void __init tmu_clk_init(struct clk *clk)
-{
-        u8 divisor  = TMU_TCR_INIT & 0x7;
-        int tmu_num = clk->name[3]-'0';
-        ctrl_outw(TMU_TCR_INIT, TMU0_TCR+(tmu_num*0xC));
-        clk->rate = clk_get_rate(clk->parent) / (4 << (divisor << 1));
-}
-
-static void tmu_clk_recalc(struct clk *clk)
-{
-        int tmu_num = clk->name[3]-'0';
-        unsigned long prev_rate = clk_get_rate(clk);
-        unsigned long flags;
-        u8 divisor = ctrl_inw(TMU0_TCR+tmu_num*0xC) & 0x7;
-        clk->rate  = clk_get_rate(clk->parent) / (4 << (divisor << 1));
-
-        if(prev_rate==clk_get_rate(clk))
-                return;
-
-        if(tmu_num)
-                return; /* No more work on TMU1 */
-
-        local_irq_save(flags);
-        tmus_are_scaled = (prev_rate > clk->rate);
-
-        _tmu_stop(TMU0);
-
-        tmu0_clockevent.mult = div_sc(clk->rate, NSEC_PER_SEC,
-                                tmu0_clockevent.shift);
-        tmu0_clockevent.max_delta_ns =
-                        clockevent_delta2ns(-1, &tmu0_clockevent);
-        tmu0_clockevent.min_delta_ns =
-                        clockevent_delta2ns(1, &tmu0_clockevent);
-
-        if (tmus_are_scaled)
-                tmu_latest_interval[TMU0] >>= 1;
-        else
-                tmu_latest_interval[TMU0] <<= 1;
-
-        tmu_timer_set_interval(TMU0,
-                tmu_latest_interval[TMU0],
-                tmu0_clockevent.mode == CLOCK_EVT_MODE_PERIODIC);
-
-        _tmu_start(TMU0);
-
-        local_irq_restore(flags);
-}
-
-static struct clk_ops tmu_clk_ops = {
-        .init           = tmu_clk_init,
-        .recalc         = tmu_clk_recalc,
-};
-
-static struct clk tmu0_clk = {
-        .name           = "tmu0_clk",
-        .ops            = &tmu_clk_ops,
-};
-
-static struct clk tmu1_clk = {
-        .name           = "tmu1_clk",
-        .ops            = &tmu_clk_ops,
-};
-
-static int tmu_timer_init(void)
-{
-        unsigned long interval;
-        unsigned long frequency;
-
-        setup_irq(CONFIG_SH_TIMER_IRQ, &tmu0_irq);
-
-        tmu0_clk.parent = clk_get(NULL, "module_clk");
-        tmu1_clk.parent = clk_get(NULL, "module_clk");
-
-        tmu_timer_stop();
-
-#if !defined(CONFIG_CPU_SUBTYPE_SH7720) && \
-    !defined(CONFIG_CPU_SUBTYPE_SH7721) && \
-    !defined(CONFIG_CPU_SUBTYPE_SH7760) && \
-    !defined(CONFIG_CPU_SUBTYPE_SH7785) && \
-    !defined(CONFIG_CPU_SUBTYPE_SH7786) && \
-    !defined(CONFIG_CPU_SUBTYPE_SHX3)
-        ctrl_outb(TMU_TOCR_INIT, TMU_TOCR);
-#endif
-
-        clk_register(&tmu0_clk);
-        clk_register(&tmu1_clk);
-        clk_enable(&tmu0_clk);
-        clk_enable(&tmu1_clk);
-
-        frequency = clk_get_rate(&tmu0_clk);
-        interval = (frequency + HZ / 2) / HZ;
-
-        tmu_timer_set_interval(TMU0,interval, 1);
-        tmu_timer_set_interval(TMU1,~0,1);
-
-        _tmu_start(TMU1);
-
-        clocksource_sh.rating = 200;
-        clocksource_sh.mask = CLOCKSOURCE_MASK(32);
-        clocksource_sh.read = tmu_timer_read;
-        clocksource_sh.shift = 10;
-        clocksource_sh.mult = clocksource_hz2mult(clk_get_rate(&tmu1_clk),
-                                                  clocksource_sh.shift);
-        clocksource_sh.flags = CLOCK_SOURCE_IS_CONTINUOUS;
-        clocksource_register(&clocksource_sh);
-
-        tmu0_clockevent.mult = div_sc(frequency, NSEC_PER_SEC,
-                                      tmu0_clockevent.shift);
-        tmu0_clockevent.max_delta_ns =
-                        clockevent_delta2ns(-1, &tmu0_clockevent);
-        tmu0_clockevent.min_delta_ns =
-                        clockevent_delta2ns(1, &tmu0_clockevent);
-
-        tmu0_clockevent.cpumask = cpumask_of(0);
-        tmu0_clockevent.rating = 100;
-
-        clockevents_register_device(&tmu0_clockevent);
-
-        return 0;
-}
-
-static struct sys_timer_ops tmu_timer_ops = {
-        .init           = tmu_timer_init,
-        .start          = tmu_timer_start,
-        .stop           = tmu_timer_stop,
-};
-
-struct sys_timer tmu_timer = {
-        .name   = "tmu",
-        .ops    = &tmu_timer_ops,
-};
diff --git a/arch/sh/kernel/timers/timer.c b/arch/sh/kernel/timers/timer.c
deleted file mode 100644
index 4e7e747d1b69..000000000000
--- a/arch/sh/kernel/timers/timer.c
+++ /dev/null
@@ -1,55 +0,0 @@
-/*
- * arch/sh/kernel/timers/timer.c - Common timer code
- *
- *  Copyright (C) 2005  Paul Mundt
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/timer.h>
-#include <linux/string.h>
-#include <asm/timer.h>
-
-static struct sys_timer *sys_timers[] = {
-#ifdef CONFIG_SH_TMU
-        &tmu_timer,
-#endif
-#ifdef CONFIG_SH_MTU2
-        &mtu2_timer,
-#endif
-#ifdef CONFIG_SH_CMT
-        &cmt_timer,
-#endif
-        NULL,
-};
-
-static char timer_override[10];
-static int __init timer_setup(char *str)
-{
-        if (str)
-                strlcpy(timer_override, str, sizeof(timer_override));
-        return 1;
-}
-__setup("timer=", timer_setup);
-
-struct sys_timer *get_sys_timer(void)
-{
-        int i;
-
-        for (i = 0; i < ARRAY_SIZE(sys_timers); i++) {
-                struct sys_timer *t = sys_timers[i];
-
-                if (unlikely(!t))
-                        break;
-                if (unlikely(timer_override[0]))
-                        if ((strcmp(timer_override, t->name) != 0))
-                                continue;
-                if (likely(t->ops->init() == 0))
-                        return t;
-        }
-
-        return NULL;
-}
diff --git a/arch/sh/kernel/traps.c b/arch/sh/kernel/traps.c
index 438f1ebcc453..46348ed07cc3 100644
--- a/arch/sh/kernel/traps.c
+++ b/arch/sh/kernel/traps.c
@@ -22,11 +22,11 @@ static void handle_BUG(struct pt_regs *regs)
 
 int is_valid_bugaddr(unsigned long addr)
 {
-        unsigned short opcode;
+        insn_size_t opcode;
 
         if (addr < PAGE_OFFSET)
                 return 0;
-        if (probe_kernel_address((u16 *)addr, opcode))
+        if (probe_kernel_address((insn_size_t *)addr, opcode))
                 return 0;
 
         return opcode == TRAPA_BUG_OPCODE;
@@ -66,7 +66,7 @@ BUILD_TRAP_HANDLER(bug)
 
 #ifdef CONFIG_BUG
         if (__kernel_text_address(instruction_pointer(regs))) {
-                opcode_t insn = *(opcode_t *)instruction_pointer(regs);
+                insn_size_t insn = *(insn_size_t *)instruction_pointer(regs);
                 if (insn == TRAPA_BUG_OPCODE)
                         handle_BUG(regs);
         }
diff --git a/arch/sh/kernel/traps_32.c b/arch/sh/kernel/traps_32.c
index 30ca9c51e52d..2b772776fcda 100644
--- a/arch/sh/kernel/traps_32.c
+++ b/arch/sh/kernel/traps_32.c
@@ -34,6 +34,7 @@
 # define TRAP_ILLEGAL_SLOT_INST 6
 # define TRAP_ADDRESS_ERROR     9
 # ifdef CONFIG_CPU_SH2A
+#  define TRAP_UBC              12
 #  define TRAP_FPU_ERROR        13
 #  define TRAP_DIVZERO_ERROR    17
 #  define TRAP_DIVOVF_ERROR     18
@@ -176,7 +177,7 @@ static struct mem_access user_mem_access = {
  *   (if that instruction is in a branch delay slot)
  * - return 0 if emulation okay, -EFAULT on existential error
  */
-static int handle_unaligned_ins(opcode_t instruction, struct pt_regs *regs,
+static int handle_unaligned_ins(insn_size_t instruction, struct pt_regs *regs,
                                 struct mem_access *ma)
 {
         int ret, index, count;
@@ -321,10 +322,10 @@ static int handle_unaligned_ins(opcode_t instruction, struct pt_regs *regs,
  * - fetches the instruction from PC+2
  */
 static inline int handle_delayslot(struct pt_regs *regs,
-                                   opcode_t old_instruction,
+                                   insn_size_t old_instruction,
                                    struct mem_access *ma)
 {
-        opcode_t instruction;
+        insn_size_t instruction;
         void __user *addr = (void __user *)(regs->pc +
                 instruction_size(old_instruction));
 
@@ -364,7 +365,7 @@ static inline int handle_delayslot(struct pt_regs *regs,
 
 static int handle_unaligned_notify_count = 10;
 
-int handle_unaligned_access(opcode_t instruction, struct pt_regs *regs,
+int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs,
                             struct mem_access *ma)
 {
         u_int rm;
@@ -522,7 +523,7 @@ asmlinkage void do_address_error(struct pt_regs *regs,
         unsigned long error_code = 0;
         mm_segment_t oldfs;
         siginfo_t info;
-        opcode_t instruction;
+        insn_size_t instruction;
         int tmp;
 
         /* Intentional ifdef */
@@ -849,6 +850,10 @@ void __init trap_init(void)
 #endif
 #endif
 
+#ifdef TRAP_UBC
+        set_exception_table_vec(TRAP_UBC, break_point_trap);
+#endif
+
         /* Setup VBR for boot cpu */
         per_cpu_trap_init();
 }
diff --git a/arch/sh/kernel/traps_64.c b/arch/sh/kernel/traps_64.c
index a85831cbf18b..267e5ebbb475 100644
--- a/arch/sh/kernel/traps_64.c
+++ b/arch/sh/kernel/traps_64.c
@@ -370,7 +370,6 @@ static int generate_and_check_address(struct pt_regs *regs,
                 return -1;
         }
 
-#if defined(CONFIG_SH64_USER_MISALIGNED_FIXUP)
         /* Check accessible.  For misaligned access in the kernel, assume the
            address is always accessible (and if not, just fault when the
            load/store gets done.) */
@@ -380,18 +379,13 @@ static int generate_and_check_address(struct pt_regs *regs,
                 }
                 /* Do access_ok check later - it depends on whether it's a load or a store. */
         }
-#endif
 
         *address = addr;
         return 0;
 }
 
-/* Default value as for sh */
-#if defined(CONFIG_SH64_USER_MISALIGNED_FIXUP)
 static int user_mode_unaligned_fixup_count = 10;
 static int user_mode_unaligned_fixup_enable = 1;
-#endif
-
 static int kernel_mode_unaligned_fixup_count = 32;
 
 static void misaligned_kernel_word_load(__u64 address, int do_sign_extend, __u64 *result)
@@ -440,7 +434,6 @@ static int misaligned_load(struct pt_regs *regs,
         }
 
         destreg = (opcode >> 4) & 0x3f;
-#if defined(CONFIG_SH64_USER_MISALIGNED_FIXUP)
         if (user_mode(regs)) {
                 __u64 buffer;
 
@@ -470,9 +463,7 @@ static int misaligned_load(struct pt_regs *regs,
                                 width_shift, (unsigned long) regs->pc);
                         break;
                 }
-        } else
-#endif
-        {
+        } else {
                 /* kernel mode - we can take short cuts since if we fault, it's a genuine bug */
                 __u64 lo, hi;
 
@@ -519,7 +510,6 @@ static int misaligned_store(struct pt_regs *regs,
         }
 
         srcreg = (opcode >> 4) & 0x3f;
-#if defined(CONFIG_SH64_USER_MISALIGNED_FIXUP)
         if (user_mode(regs)) {
                 __u64 buffer;
 
@@ -546,9 +536,7 @@ static int misaligned_store(struct pt_regs *regs,
                 if (__copy_user((void *)(int)address, &buffer, (1 << width_shift)) > 0) {
                         return -1; /* fault */
                 }
-        } else
-#endif
-        {
+        } else {
                 /* kernel mode - we can take short cuts since if we fault, it's a genuine bug */
                 __u64 val = regs->regs[srcreg];
 
@@ -576,7 +564,6 @@ static int misaligned_store(struct pt_regs *regs,
 
 }
 
-#if defined(CONFIG_SH64_USER_MISALIGNED_FIXUP)
 /* Never need to fix up misaligned FPU accesses within the kernel since that's a real
    error. */
 static int misaligned_fpu_load(struct pt_regs *regs,
@@ -727,7 +714,6 @@ static int misaligned_fpu_store(struct pt_regs *regs,
                 return -1;
         }
 }
-#endif
 
 static int misaligned_fixup(struct pt_regs *regs)
 {
@@ -735,12 +721,8 @@ static int misaligned_fixup(struct pt_regs *regs)
         int error;
         int major, minor;
 
-#if !defined(CONFIG_SH64_USER_MISALIGNED_FIXUP)
-        /* Never fixup user mode misaligned accesses without this option enabled. */
-        return -1;
-#else
-        if (!user_mode_unaligned_fixup_enable) return -1;
-#endif
+        if (!user_mode_unaligned_fixup_enable)
+                return -1;
 
         error = read_opcode(regs->pc, &opcode, user_mode(regs));
         if (error < 0) {
@@ -749,15 +731,12 @@ static int misaligned_fixup(struct pt_regs *regs)
         major = (opcode >> 26) & 0x3f;
         minor = (opcode >> 16) & 0xf;
 
-#if defined(CONFIG_SH64_USER_MISALIGNED_FIXUP)
         if (user_mode(regs) && (user_mode_unaligned_fixup_count > 0)) {
                 --user_mode_unaligned_fixup_count;
                 /* Only do 'count' worth of these reports, to remove a potential DoS against syslog */
                 printk("Fixing up unaligned userspace access in \"%s\" pid=%d pc=0x%08x ins=0x%08lx\n",
                        current->comm, task_pid_nr(current), (__u32)regs->pc, opcode);
-        } else
-#endif
-        if (!user_mode(regs) && (kernel_mode_unaligned_fixup_count > 0)) {
+        } else if (!user_mode(regs) && (kernel_mode_unaligned_fixup_count > 0)) {
                 --kernel_mode_unaligned_fixup_count;
                 if (in_interrupt()) {
                         printk("Fixing up unaligned kernelspace access in interrupt pc=0x%08x ins=0x%08lx\n",
@@ -830,7 +809,6 @@ static int misaligned_fixup(struct pt_regs *regs)
                         }
                         break;
 
-#if defined(CONFIG_SH64_USER_MISALIGNED_FIXUP)
                 case (0x94>>2): /* FLD.S */
                         error = misaligned_fpu_load(regs, opcode, 1, 2, 0);
                         break;
@@ -881,7 +859,6 @@ static int misaligned_fixup(struct pt_regs *regs)
                                 break;
                         }
                         break;
-#endif
 
                 default:
                         /* Fault */
@@ -907,7 +884,6 @@ static ctl_table unaligned_table[] = {
                 .mode           = 0644,
                 .proc_handler   = &proc_dointvec
         },
-#if defined(CONFIG_SH64_USER_MISALIGNED_FIXUP)
         {
                 .ctl_name       = CTL_UNNUMBERED,
                 .procname       = "user_reports",
@@ -923,7 +899,6 @@ static ctl_table unaligned_table[] = {
                 .maxlen         = sizeof(int),
                 .mode           = 0644,
                 .proc_handler   = &proc_dointvec},
-#endif
         {}
 };
 
diff --git a/arch/sh/kernel/vmlinux.lds.S b/arch/sh/kernel/vmlinux.lds.S
index d7d4991f32af..f53c76acaede 100644
--- a/arch/sh/kernel/vmlinux.lds.S
+++ b/arch/sh/kernel/vmlinux.lds.S
@@ -1,5 +1,178 @@
-#ifdef CONFIG_SUPERH32
-# include "vmlinux_32.lds.S"
+/*
+ * ld script to make SuperH Linux kernel
+ * Written by Niibe Yutaka and Paul Mundt
+ */
+#ifdef CONFIG_SUPERH64
+#define LOAD_OFFSET     CONFIG_PAGE_OFFSET
+OUTPUT_ARCH(sh:sh5)
 #else
-# include "vmlinux_64.lds.S"
+#define LOAD_OFFSET     0
+OUTPUT_ARCH(sh)
 #endif
+
+#include <asm/thread_info.h>
+#include <asm/cache.h>
+#include <asm-generic/vmlinux.lds.h>
+
+ENTRY(_start)
+SECTIONS
+{
+#ifdef CONFIG_PMB_FIXED
+        . = CONFIG_PAGE_OFFSET + (CONFIG_MEMORY_START & 0x1fffffff) +
+            CONFIG_ZERO_PAGE_OFFSET;
+#elif defined(CONFIG_32BIT)
+        . = CONFIG_PAGE_OFFSET + CONFIG_ZERO_PAGE_OFFSET;
+#else
+        . = CONFIG_PAGE_OFFSET + CONFIG_MEMORY_START + CONFIG_ZERO_PAGE_OFFSET;
+#endif
+
+        _text = .;              /* Text and read-only data */
+
+        .empty_zero_page : AT(ADDR(.empty_zero_page) - LOAD_OFFSET) {
+                *(.empty_zero_page)
+        } = 0
+
+        .text : AT(ADDR(.text) - LOAD_OFFSET) {
+                HEAD_TEXT
+                TEXT_TEXT
+
+#ifdef CONFIG_SUPERH64
+                *(.text64)
+                *(.text..SHmedia32)
+#endif
+
+                SCHED_TEXT
+                LOCK_TEXT
+                KPROBES_TEXT
+                IRQENTRY_TEXT
+                *(.fixup)
+                *(.gnu.warning)
+                _etext = .;             /* End of text section */
+        } = 0x0009
+
+        . = ALIGN(16);          /* Exception table */
+        __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
+                __start___ex_table = .;
+                *(__ex_table)
+                __stop___ex_table = .;
+        }
+
+        NOTES
+        RO_DATA(PAGE_SIZE)
+
+        /*
+         * Code which must be executed uncached and the associated data
+         */
+        . = ALIGN(PAGE_SIZE);
+        .uncached : AT(ADDR(.uncached) - LOAD_OFFSET) {
+                __uncached_start = .;
+                *(.uncached.text)
+                *(.uncached.data)
+                __uncached_end = .;
+        }
+
+        . = ALIGN(THREAD_SIZE);
+        .data : AT(ADDR(.data) - LOAD_OFFSET) {         /* Data */
+                *(.data.init_task)
+
+                . = ALIGN(L1_CACHE_BYTES);
+                *(.data.cacheline_aligned)
+
+                . = ALIGN(L1_CACHE_BYTES);
+                *(.data.read_mostly)
+
+                . = ALIGN(PAGE_SIZE);
+                *(.data.page_aligned)
+
+                __nosave_begin = .;
+                *(.data.nosave)
+                . = ALIGN(PAGE_SIZE);
+                __nosave_end = .;
+
+                DATA_DATA
+                CONSTRUCTORS
+        }
+
+        _edata = .;                     /* End of data section */
+
+        . = ALIGN(PAGE_SIZE);           /* Init code and data */
+        .init.text : AT(ADDR(.init.text) - LOAD_OFFSET) {
+                __init_begin = .;
+                _sinittext = .;
+                INIT_TEXT
+                _einittext = .;
+        }
+
+        .init.data : AT(ADDR(.init.data) - LOAD_OFFSET) { INIT_DATA }
+
+        . = ALIGN(16);
+        .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET) {
+                __setup_start = .;
+                *(.init.setup)
+                __setup_end = .;
+        }
+
+        .initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET) {
+                __initcall_start = .;
+                INITCALLS
+                __initcall_end = .;
+        }
+
+        .con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET) {
+                __con_initcall_start = .;
+                *(.con_initcall.init)
+                __con_initcall_end = .;
+        }
+
+        SECURITY_INIT
+
+#ifdef CONFIG_BLK_DEV_INITRD
+        . = ALIGN(PAGE_SIZE);
+        .init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET) {
+                __initramfs_start = .;
+                *(.init.ramfs)
+                __initramfs_end = .;
+        }
+#endif
+
+        . = ALIGN(4);
+        .machvec.init : AT(ADDR(.machvec.init) - LOAD_OFFSET) {
+                __machvec_start = .;
+                *(.machvec.init)
+                __machvec_end = .;
+        }
+
+        PERCPU(PAGE_SIZE)
+
+        /*
+         * .exit.text is discarded at runtime, not link time, to deal with
+         * references from __bug_table
+         */
+        .exit.text : AT(ADDR(.exit.text) - LOAD_OFFSET) { EXIT_TEXT }
+        .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) { EXIT_DATA }
+
+        . = ALIGN(PAGE_SIZE);
+        .bss : AT(ADDR(.bss) - LOAD_OFFSET) {
+                __init_end = .;
+                __bss_start = .;                /* BSS */
+                *(.bss.page_aligned)
+                *(.bss)
+                *(COMMON)
+                . = ALIGN(4);
+                _ebss = .;                      /* uClinux MTD sucks */
+                _end = . ;
+        }
+
+        /*
+         * When something in the kernel is NOT compiled as a module, the
+         * module cleanup code and data are put into these segments. Both
+         * can then be thrown away, as cleanup code is never called unless
+         * it's a module.
+         */
+        /DISCARD/ : {
+                *(.exitcall.exit)
+        }
+
+        STABS_DEBUG
+        DWARF_DEBUG
+}
diff --git a/arch/sh/kernel/vmlinux_32.lds.S b/arch/sh/kernel/vmlinux_32.lds.S
deleted file mode 100644
index dd9b2ee1312d..000000000000
--- a/arch/sh/kernel/vmlinux_32.lds.S
+++ /dev/null
@@ -1,154 +0,0 @@
-/*
- * ld script to make SuperH Linux kernel
- * Written by Niibe Yutaka
- */
-#include <asm/thread_info.h>
-#include <asm/cache.h>
-#include <asm-generic/vmlinux.lds.h>
-
-#ifdef CONFIG_CPU_LITTLE_ENDIAN
-OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux")
-#else
-OUTPUT_FORMAT("elf32-shbig-linux", "elf32-shbig-linux", "elf32-shbig-linux")
-#endif
-OUTPUT_ARCH(sh)
-ENTRY(_start)
-SECTIONS
-{
-#ifdef CONFIG_PMB_FIXED
-        . = CONFIG_PAGE_OFFSET + (CONFIG_MEMORY_START & 0x1fffffff) +
-            CONFIG_ZERO_PAGE_OFFSET;
-#elif defined(CONFIG_32BIT)
-        . = CONFIG_PAGE_OFFSET + CONFIG_ZERO_PAGE_OFFSET;
-#else
-        . = CONFIG_PAGE_OFFSET + CONFIG_MEMORY_START + CONFIG_ZERO_PAGE_OFFSET;
-#endif
-
-        _text = .;                      /* Text and read-only data */
-
-        .empty_zero_page : {
-                *(.empty_zero_page)
-        } = 0
-
-        .text : {
-                HEAD_TEXT
-                TEXT_TEXT
-                SCHED_TEXT
-                LOCK_TEXT
-                KPROBES_TEXT
-                *(.fixup)
-                *(.gnu.warning)
-        } = 0x0009
-
-        . = ALIGN(16);          /* Exception table */
-        __start___ex_table = .;
-        __ex_table : { *(__ex_table) }
-        __stop___ex_table = .;
-
-        _etext = .;                     /* End of text section */
-
-        NOTES
-        RO_DATA(PAGE_SIZE)
-
-        /*
-         * Code which must be executed uncached and the associated data
-         */
-        . = ALIGN(PAGE_SIZE);
-        __uncached_start = .;
-        .uncached.text : { *(.uncached.text) }
-        .uncached.data : { *(.uncached.data) }
-        __uncached_end = .;
-
-        . = ALIGN(THREAD_SIZE);
-        .data : {                       /* Data */
-                *(.data.init_task)
-
-                . = ALIGN(L1_CACHE_BYTES);
-                *(.data.cacheline_aligned)
-
-                . = ALIGN(L1_CACHE_BYTES);
-                *(.data.read_mostly)
-
-                . = ALIGN(PAGE_SIZE);
-                *(.data.page_aligned)
-
-                __nosave_begin = .;
-                *(.data.nosave)
-                . = ALIGN(PAGE_SIZE);
-                __nosave_end = .;
-
-                DATA_DATA
-                CONSTRUCTORS
-        }
-
-        _edata = .;                     /* End of data section */
-
-        . = ALIGN(PAGE_SIZE);           /* Init code and data */
-        __init_begin = .;
-        _sinittext = .;
-        .init.text : { INIT_TEXT }
-        _einittext = .;
-        .init.data : { INIT_DATA }
-
-        . = ALIGN(16);
-        __setup_start = .;
-        .init.setup : { *(.init.setup) }
-        __setup_end = .;
-
-        __initcall_start = .;
-        .initcall.init : {
-                INITCALLS
-        }
-        __initcall_end = .;
-        __con_initcall_start = .;
-        .con_initcall.init : { *(.con_initcall.init) }
-        __con_initcall_end = .;
-
-        SECURITY_INIT
-
-#ifdef CONFIG_BLK_DEV_INITRD
-        . = ALIGN(PAGE_SIZE);
-        __initramfs_start = .;
-        .init.ramfs : { *(.init.ramfs) }
-        __initramfs_end = .;
-#endif
-
-        . = ALIGN(4);
-        __machvec_start = .;
-        .machvec.init : { *(.machvec.init) }
-        __machvec_end = .;
-
-        PERCPU(PAGE_SIZE)
-
-        /*
-         * .exit.text is discarded at runtime, not link time, to deal with
-         * references from __bug_table
-         */
-        .exit.text : { EXIT_TEXT }
-        .exit.data : { EXIT_DATA }
-
-        . = ALIGN(PAGE_SIZE);
-        .bss : {
-                __init_end = .;
-                __bss_start = .;                /* BSS */
-                *(.bss.page_aligned)
-                *(.bss)
-                *(COMMON)
-                . = ALIGN(4);
-                _ebss = .;                      /* uClinux MTD sucks */
-                _end = . ;
-        }
-
-        /*
-         * When something in the kernel is NOT compiled as a module, the
-         * module cleanup code and data are put into these segments. Both
-         * can then be thrown away, as cleanup code is never called unless
-         * it's a module.
-         */
-        /DISCARD/ : {
-                *(.exitcall.exit)
-        }
-
-        STABS_DEBUG
-        DWARF_DEBUG
-}
diff --git a/arch/sh/kernel/vmlinux_64.lds.S b/arch/sh/kernel/vmlinux_64.lds.S
deleted file mode 100644
index 69664460c688..000000000000
--- a/arch/sh/kernel/vmlinux_64.lds.S
+++ /dev/null
@@ -1,163 +0,0 @@
-/*
- * ld script to make SH64 Linux kernel
- *
- * Copyright (C) 2000, 2001  Paolo Alberelli
- *
- * benedict.gaster@superh.com:   2nd May 2002
- *    Add definition of empty_zero_page to be the first page of kernel image.
- *
- * benedict.gaster@superh.com:   3rd May 2002
- *    Added support for ramdisk, removing statically linked romfs at the
- *    same time.
- *
- * lethal@linux-sh.org:          9th May 2003
- *    Kill off GLOBAL_NAME() usage and other CDC-isms.
- *
- * lethal@linux-sh.org:         19th May 2003
- *    Remove support for ancient toolchains.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <asm/page.h>
-#include <asm/cache.h>
-#include <asm/thread_info.h>
-
-#define LOAD_OFFSET     CONFIG_PAGE_OFFSET
-#include <asm-generic/vmlinux.lds.h>
-
-OUTPUT_ARCH(sh:sh5)
-
-#define C_PHYS(x) AT (ADDR(x) - LOAD_OFFSET)
-
-ENTRY(__start)
-SECTIONS
-{
-        . = CONFIG_PAGE_OFFSET + CONFIG_MEMORY_START + PAGE_SIZE;
-        _text = .;                      /* Text and read-only data */
-
-        .empty_zero_page : C_PHYS(.empty_zero_page) {
-                *(.empty_zero_page)
-        } = 0
-
-        .text : C_PHYS(.text) {
-                HEAD_TEXT
-                TEXT_TEXT
-                *(.text64)
-                *(.text..SHmedia32)
-                SCHED_TEXT
-                LOCK_TEXT
-                KPROBES_TEXT
-                *(.fixup)
-                *(.gnu.warning)
-#ifdef CONFIG_CPU_LITTLE_ENDIAN
-        } = 0x6ff0fff0
-#else
-        } = 0xf0fff06f
-#endif
-
-        /* We likely want __ex_table to be Cache Line aligned */
-        . = ALIGN(L1_CACHE_BYTES);              /* Exception table */
-        __start___ex_table = .;
-        __ex_table : C_PHYS(__ex_table) { *(__ex_table) }
-        __stop___ex_table = .;
-
-        _etext = .;                     /* End of text section */
-
-        NOTES 
-        RO_DATA(PAGE_SIZE)
-
-        . = ALIGN(THREAD_SIZE);
-        .data : C_PHYS(.data) {                 /* Data */
-                *(.data.init_task)
-
-                . = ALIGN(L1_CACHE_BYTES);
-                *(.data.cacheline_aligned)
-
-                . = ALIGN(L1_CACHE_BYTES);
-                *(.data.read_mostly)
-
-                . = ALIGN(PAGE_SIZE);
-                *(.data.page_aligned)
-
-                __nosave_begin = .;
-                *(.data.nosave)
-                . = ALIGN(PAGE_SIZE);
-                __nosave_end = .;
-
-                DATA_DATA
-                CONSTRUCTORS
-        }
-
-        _edata = .;                     /* End of data section */
-
-        . = ALIGN(PAGE_SIZE);           /* Init code and data */
-        __init_begin = .;
-        _sinittext = .;
-        .init.text : C_PHYS(.init.text) { INIT_TEXT }
-        _einittext = .;
-        .init.data : C_PHYS(.init.data) { INIT_DATA }
-        . = ALIGN(L1_CACHE_BYTES);      /* Better if Cache Line aligned */
-        __setup_start = .;
-        .init.setup : C_PHYS(.init.setup) { *(.init.setup) }
-        __setup_end = .;
-        __initcall_start = .;
-        .initcall.init : C_PHYS(.initcall.init) {
-                INITCALLS
-        }
-        __initcall_end = .;
-        __con_initcall_start = .;
-        .con_initcall.init : C_PHYS(.con_initcall.init) {
-                *(.con_initcall.init)
-        }
-        __con_initcall_end = .;
-
-        SECURITY_INIT
-
-#ifdef CONFIG_BLK_DEV_INITRD
-        . = ALIGN(PAGE_SIZE);
-        __initramfs_start = .;
-        .init.ramfs : C_PHYS(.init.ramfs) { *(.init.ramfs) }
-        __initramfs_end = .;
-#endif
-
-        . = ALIGN(8);
-        __machvec_start = .;
-        .machvec.init : C_PHYS(.machvec.init) { *(.machvec.init) }
-        __machvec_end = .;
-
-        PERCPU(PAGE_SIZE)
-
-        /*
-         * .exit.text is discarded at runtime, not link time, to deal with
-         * references from __bug_table
-         */
-        .exit.text : C_PHYS(.exit.text) { EXIT_TEXT }
-        .exit.data : C_PHYS(.exit.data) { EXIT_DATA }
-
-        . = ALIGN(PAGE_SIZE);
-        .bss : C_PHYS(.bss) {
-                __init_end = .;
-                __bss_start = .;                /* BSS */
-                *(.bss.page_aligned)
-                *(.bss)
-                *(COMMON)
-                . = ALIGN(4);
-                _ebss = .;                      /* uClinux MTD sucks */
-                _end = . ;
-        }
-
-        /*
-         * When something in the kernel is NOT compiled as a module, the
-         * module cleanup code and data are put into these segments. Both
-         * can then be thrown away, as cleanup code is never called unless
-         * it's a module.
-         */
-        /DISCARD/ : {
-                *(.exitcall.exit)
-        }
-
-        STABS_DEBUG
-        DWARF_DEBUG
-}
diff --git a/arch/sh/lib64/.gitignore b/arch/sh/lib64/.gitignore
deleted file mode 100644
index 3508c2cb23c4..000000000000
--- a/arch/sh/lib64/.gitignore
+++ /dev/null
@@ -1 +0,0 @@
-syscalltab.h
diff --git a/arch/sh/lib64/dbg.c b/arch/sh/lib64/dbg.c
index 2fb8eaf6de60..6152a6a6d9c6 100644
--- a/arch/sh/lib64/dbg.c
+++ b/arch/sh/lib64/dbg.c
@@ -135,140 +135,6 @@ void print_itlb(void)
             (" =============================================================\n");
 }
 
-/* ======================================================================= */
-
-#ifdef CONFIG_POOR_MANS_STRACE
-
-#include "syscalltab.h"
-
-struct ring_node {
-        int evt;
-        int ret_addr;
-        int event;
-        int tra;
-        int pid;
-        unsigned long sp;
-        unsigned long pc;
-};
-
-static struct ring_node event_ring[16];
-static int event_ptr = 0;
-
-struct stored_syscall_data {
-        int pid;
-        int syscall_number;
-};
-
-#define N_STORED_SYSCALLS 16
-
-static struct stored_syscall_data stored_syscalls[N_STORED_SYSCALLS];
-static int syscall_next=0;
-static int syscall_next_print=0;
-
-void evt_debug(int evt, int ret_addr, int event, int tra, struct pt_regs *regs)
-{
-        int syscallno = tra & 0xff;
-        unsigned long sp;
-        unsigned long stack_bottom;
-        int pid;
-        struct ring_node *rr;
-
-        pid = current->pid;
-        stack_bottom = (unsigned long) task_stack_page(current);
-        asm volatile("ori r15, 0, %0" : "=r" (sp));
-        rr = event_ring + event_ptr;
-        rr->evt = evt;
-        rr->ret_addr = ret_addr;
-        rr->event = event;
-        rr->tra = tra;
-        rr->pid = pid;
-        rr->sp = sp;
-        rr->pc = regs->pc;
-
-        if (sp < stack_bottom + 3092) {
-                int i, j;
-                printk("evt_debug : stack underflow report\n");
-                for (j=0, i = event_ptr; j<16; j++) {
-                        rr = event_ring + i;
-                        printk("evt=%08x event=%08x tra=%08x pid=%5d sp=%08lx pc=%08lx\n",
-                                rr->evt, rr->event, rr->tra, rr->pid, rr->sp, rr->pc);
-                        i--;
-                        i &= 15;
-                }
-                panic("STACK UNDERFLOW\n");
-        }
-
-        event_ptr = (event_ptr + 1) & 15;
-
-        if ((event == 2) && (evt == 0x160)) {
-                if (syscallno < NUM_SYSCALL_INFO_ENTRIES) {
-                        /* Store the syscall information to print later.  We
-                         * can't print this now - currently we're running with
-                         * SR.BL=1, so we can't take a tlbmiss (which could occur
-                         * in the console drivers under printk).
-                         *
-                         * Just overwrite old entries on ring overflow - this
-                         * is only for last-hope debugging. */
-                        stored_syscalls[syscall_next].pid = current->pid;
-                        stored_syscalls[syscall_next].syscall_number = syscallno;
-                        syscall_next++;
-                        syscall_next &= (N_STORED_SYSCALLS - 1);
-                }
-        }
-}
-
-static void drain_syscalls(void) {
-        while (syscall_next_print != syscall_next) {
-                printk("Task %d: %s()\n",
-                        stored_syscalls[syscall_next_print].pid,
-                        syscall_info_table[stored_syscalls[syscall_next_print].syscall_number].name);
-                        syscall_next_print++;
-                        syscall_next_print &= (N_STORED_SYSCALLS - 1);
-        }
-}
-
-void evt_debug2(unsigned int ret)
-{
-        drain_syscalls();
-        printk("Task %d: syscall returns %08x\n", current->pid, ret);
-}
-
-void evt_debug_ret_from_irq(struct pt_regs *regs)
-{
-        int pid;
-        struct ring_node *rr;
-
-        pid = current->pid;
-        rr = event_ring + event_ptr;
-        rr->evt = 0xffff;
-        rr->ret_addr = 0;
-        rr->event = 0;
-        rr->tra = 0;
-        rr->pid = pid;
-        rr->pc = regs->pc;
-        event_ptr = (event_ptr + 1) & 15;
-}
-
-void evt_debug_ret_from_exc(struct pt_regs *regs)
-{
-        int pid;
-        struct ring_node *rr;
-
-        pid = current->pid;
-        rr = event_ring + event_ptr;
-        rr->evt = 0xfffe;
-        rr->ret_addr = 0;
-        rr->event = 0;
-        rr->tra = 0;
-        rr->pid = pid;
-        rr->pc = regs->pc;
-        event_ptr = (event_ptr + 1) & 15;
-}
-
-#endif /* CONFIG_POOR_MANS_STRACE */
-
-/* ======================================================================= */
-
 void show_excp_regs(char *from, int trapnr, int signr, struct pt_regs *regs)
 {
 
@@ -380,51 +246,3 @@ void show_excp_regs(char *from, int trapnr, int signr, struct pt_regs *regs)
         print_dtlb();
         print_itlb();
 }
-
-/* ======================================================================= */
-
-/*
-** Depending on <base> scan the MMU, Data or Instruction side
-** looking for a valid mapping matching Eaddr & asid.
-** Return -1 if not found or the TLB id entry otherwise.
-** Note: it works only for 4k pages!
-*/
-static unsigned long
-lookup_mmu_side(unsigned long base, unsigned long Eaddr, unsigned long asid)
-{
-        regType_t pteH;
-        unsigned long epn;
-        int count;
-
-        epn = Eaddr & 0xfffff000;
-
-        for (count = 0; count < MAX_TLBs; count++, base += TLB_STEP) {
-                pteH = getConfigReg(base);
-                if (GET_VALID(pteH))
-                        if ((unsigned long) GET_EPN(pteH) == epn)
-                                if ((unsigned long) GET_ASID(pteH) == asid)
-                                        break;
-        }
-        return ((unsigned long) ((count < MAX_TLBs) ? base : -1));
-}
-
-unsigned long lookup_dtlb(unsigned long Eaddr)
-{
-        unsigned long asid = get_asid();
-        return (lookup_mmu_side((u64) DTLB_BASE, Eaddr, asid));
-}
-
-unsigned long lookup_itlb(unsigned long Eaddr)
-{
-        unsigned long asid = get_asid();
-        return (lookup_mmu_side((u64) ITLB_BASE, Eaddr, asid));
-}
-
-void print_page(struct page *page)
-{
-        printk("  page[%p] -> index 0x%lx,  count 0x%x,  flags 0x%lx\n",
-               page, page->index, page_count(page), page->flags);
-        printk("       address_space = %p, pages =%ld\n", page->mapping,
-               page->mapping->nrpages);
-
-}
diff --git a/arch/sh/lib64/panic.c b/arch/sh/lib64/panic.c
index da32ba7b5fcc..38c954e04f6a 100644
--- a/arch/sh/lib64/panic.c
+++ b/arch/sh/lib64/panic.c
@@ -6,53 +6,10 @@
  * for more details.
  */
 
-#include <linux/kernel.h>
-#include <asm/io.h>
-#include <cpu/registers.h>
-
-/* THIS IS A PHYSICAL ADDRESS */
-#define HDSP2534_ADDR (0x04002100)
-
-#ifdef CONFIG_SH_CAYMAN
-
-static void poor_mans_delay(void)
-{
-        int i;
-        for (i = 0; i < 2500000; i++) {
-        }               /* poor man's delay */
-}
-
-static void show_value(unsigned long x)
-{
-        int i;
-        unsigned nibble;
-        for (i = 0; i < 8; i++) {
-                nibble = ((x >> (i * 4)) & 0xf);
-
-                ctrl_outb(nibble + ((nibble > 9) ? 55 : 48),
-                          HDSP2534_ADDR + 0xe0 + ((7 - i) << 2));
-        }
-}
-
-#endif
-
 void
 panic_handler(unsigned long panicPC, unsigned long panicSSR,
               unsigned long panicEXPEVT)
 {
-#ifdef CONFIG_SH_CAYMAN
-        while (1) {
-                /* This piece of code displays the PC on the LED display */
-                show_value(panicPC);
-                poor_mans_delay();
-                show_value(panicSSR);
-                poor_mans_delay();
-                show_value(panicEXPEVT);
-                poor_mans_delay();
-        }
-#endif
-
         /* Never return from the panic handler */
         for (;;) ;
-
 }
diff --git a/arch/sh/lib64/sdivsi3.S b/arch/sh/lib64/sdivsi3.S
index 6a800c6a4904..1963bbd42288 100644
--- a/arch/sh/lib64/sdivsi3.S
+++ b/arch/sh/lib64/sdivsi3.S
@@ -1,4 +1,6 @@
         .global __sdivsi3
+        .global __sdivsi3_1
+        .global __sdivsi3_2
         .section        .text..SHmedia32,"ax"
         .align  2
 
@@ -6,13 +8,15 @@
         /* clobbered: r1,r18,r19,r20,r21,r25,tr0 */
         /* result in r0 */
 __sdivsi3:
+__sdivsi3_1:
         ptb __div_table,tr0
+        gettr tr0,r20
 
+__sdivsi3_2:
         nsb r5, r1
         shlld r5, r1, r25    /* normalize; [-2 ..1, 1..2) in s2.62 */
         shari r25, 58, r21   /* extract 5(6) bit index (s2.4 with hole -1..1) */
         /* bubble */
-        gettr tr0,r20
         ldx.ub r20, r21, r19 /* u0.8 */
         shari r25, 32, r25   /* normalize to s2.30 */
         shlli r21, 1, r21
diff --git a/arch/sh/lib64/udelay.c b/arch/sh/lib64/udelay.c
index d76bd801194f..f215b063da70 100644
--- a/arch/sh/lib64/udelay.c
+++ b/arch/sh/lib64/udelay.c
@@ -33,7 +33,7 @@ void __delay(unsigned long loops)
                              :"0"(loops));
 }
 
-inline void __const_udelay(unsigned long xloops)
+void __const_udelay(unsigned long xloops)
 {
         __delay(xloops * (HZ * cpu_data[raw_smp_processor_id()].loops_per_jiffy));
 }
diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig
index d4079cab2d58..2795618e4f07 100644
--- a/arch/sh/mm/Kconfig
+++ b/arch/sh/mm/Kconfig
@@ -21,6 +21,29 @@ config PAGE_OFFSET
         default "0x20000000" if MMU && SUPERH64
         default "0x00000000"
 
+config FORCE_MAX_ZONEORDER
+        int "Maximum zone order"
+        range 9 64 if PAGE_SIZE_16KB
+        default "9" if PAGE_SIZE_16KB
+        range 7 64 if PAGE_SIZE_64KB
+        default "7" if PAGE_SIZE_64KB
+        range 11 64
+        default "14" if !MMU
+        default "11"
+        help
+          The kernel memory allocator divides physically contiguous memory
+          blocks into "zones", where each zone is a power of two number of
+          pages.  This option selects the largest power of two that the kernel
+          keeps in the memory allocator.  If you need to allocate very large
+          blocks of physically contiguous memory, then you may need to
+          increase this value.
+
+          This config option is actually maximum order plus one. For example,
+          a value of 11 means that the largest free memory block is 2^10 pages.
+
+          The page size is not necessarily 4KB. Keep this in mind when
+          choosing a value for this option.
+
 config MEMORY_START
         hex "Physical memory start address"
         default "0x08000000"
@@ -201,14 +224,6 @@ config PAGE_SIZE_64KB
 
 endchoice
 
-config ENTRY_OFFSET
-        hex
-        default "0x00001000" if PAGE_SIZE_4KB
-        default "0x00002000" if PAGE_SIZE_8KB
-        default "0x00004000" if PAGE_SIZE_16KB
-        default "0x00010000" if PAGE_SIZE_64KB
-        default "0x00000000"
-
 choice
         prompt "HugeTLB page size"
         depends on HUGETLB_PAGE && (CPU_SH4 || CPU_SH5) && MMU
diff --git a/arch/sh/mm/cache-sh5.c b/arch/sh/mm/cache-sh5.c
index 9e277ec7d536..86762092508c 100644
--- a/arch/sh/mm/cache-sh5.c
+++ b/arch/sh/mm/cache-sh5.c
@@ -60,7 +60,7 @@ static inline void sh64_teardown_dtlb_cache_slot(void)
 static inline void sh64_icache_inv_all(void)
 {
         unsigned long long addr, flag, data;
-        unsigned int flags;
+        unsigned long flags;
 
         addr = ICCR0;
         flag = ICCR0_ICI;
@@ -172,7 +172,7 @@ static void sh64_icache_inv_user_page_range(struct mm_struct *mm,
                 unsigned long eaddr;
                 unsigned long after_last_page_start;
                 unsigned long mm_asid, current_asid;
-                unsigned long long flags = 0ULL;
+                unsigned long flags = 0;
 
                 mm_asid = cpu_asid(smp_processor_id(), mm);
                 current_asid = get_asid();
@@ -236,7 +236,7 @@ static void sh64_icache_inv_user_small_range(struct mm_struct *mm,
         unsigned long long eaddr = start;
         unsigned long long eaddr_end = start + len;
         unsigned long current_asid, mm_asid;
-        unsigned long long flags;
+        unsigned long flags;
         unsigned long long epage_start;
 
         /*
@@ -342,7 +342,7 @@ static void inline sh64_dcache_purge_sets(int sets_to_purge_base, int n_sets)
                          * alloco is a NOP if the cache is write-through.
                          */
                         if (test_bit(SH_CACHE_MODE_WT, &(cpu_data->dcache.flags)))
-                                ctrl_inb(eaddr);
+                                __raw_readb((unsigned long)eaddr);
                 }
         }
 
diff --git a/arch/sh/mm/init.c b/arch/sh/mm/init.c
index 3edf297c829b..ee8e6bbe882c 100644
--- a/arch/sh/mm/init.c
+++ b/arch/sh/mm/init.c
@@ -184,7 +184,6 @@ void __init paging_init(void)
 }
 
 static struct kcore_list kcore_mem, kcore_vmalloc;
-int after_bootmem = 0;
 
 void __init mem_init(void)
 {
@@ -217,8 +216,6 @@ void __init mem_init(void)
         memset(empty_zero_page, 0, PAGE_SIZE);
         __flush_wback_region(empty_zero_page, PAGE_SIZE);
 
-        after_bootmem = 1;
-
         codesize =  (unsigned long) &_etext - (unsigned long) &_text;
         datasize =  (unsigned long) &_edata - (unsigned long) &_etext;
         initsize =  (unsigned long) &__init_end - (unsigned long) &__init_begin;
diff --git a/arch/sh/mm/ioremap_32.c b/arch/sh/mm/ioremap_32.c
index 60cc486d2c2c..da2f4186f2cd 100644
--- a/arch/sh/mm/ioremap_32.c
+++ b/arch/sh/mm/ioremap_32.c
@@ -46,17 +46,15 @@ void __iomem *__ioremap(unsigned long phys_addr, unsigned long size,
                 return NULL;
 
         /*
-         * If we're on an SH7751 or SH7780 PCI controller, PCI memory is
-         * mapped at the end of the address space (typically 0xfd000000)
-         * in a non-translatable area, so mapping through page tables for
-         * this area is not only pointless, but also fundamentally
-         * broken. Just return the physical address instead.
+         * If we're in the fixed PCI memory range, mapping through page
+         * tables is not only pointless, but also fundamentally broken.
+         * Just return the physical address instead.
          *
          * For boards that map a small PCI memory aperture somewhere in
          * P1/P2 space, ioremap() will already do the right thing,
          * and we'll never get this far.
          */
-        if (is_pci_memaddr(phys_addr) && is_pci_memaddr(last_addr))
+        if (is_pci_memory_fixed_range(phys_addr, size))
                 return (void __iomem *)phys_addr;
 
 #if !defined(CONFIG_PMB_FIXED)
@@ -121,7 +119,9 @@ void __iounmap(void __iomem *addr)
         unsigned long seg = PXSEG(vaddr);
         struct vm_struct *p;
 
-        if (seg < P3SEG || vaddr >= P3_ADDR_MAX || is_pci_memaddr(vaddr))
+        if (seg < P3SEG || vaddr >= P3_ADDR_MAX)
+                return;
+        if (is_pci_memory_fixed_range(vaddr, 0))
                 return;
 
 #ifdef CONFIG_PMB
diff --git a/arch/sh/mm/ioremap_64.c b/arch/sh/mm/ioremap_64.c
index 31e1bb5effbe..828c8597219d 100644
--- a/arch/sh/mm/ioremap_64.c
+++ b/arch/sh/mm/ioremap_64.c
@@ -20,6 +20,7 @@
 #include <linux/io.h>
 #include <linux/bootmem.h>
 #include <linux/proc_fs.h>
+#include <linux/slab.h>
 #include <asm/page.h>
 #include <asm/pgalloc.h>
 #include <asm/addrspace.h>
@@ -27,88 +28,17 @@
 #include <asm/tlbflush.h>
 #include <asm/mmu.h>
 
-static void shmedia_mapioaddr(unsigned long, unsigned long);
-static unsigned long shmedia_ioremap(struct resource *, u32, int);
-
-/*
- * Generic mapping function (not visible outside):
- */
-
-/*
- * Remap an arbitrary physical address space into the kernel virtual
- * address space. Needed when the kernel wants to access high addresses
- * directly.
- *
- * NOTE! We need to allow non-page-aligned mappings too: we will obviously
- * have to convert them into an offset in a page-aligned mapping, but the
- * caller shouldn't need to know that small detail.
- */
-void *__ioremap(unsigned long phys_addr, unsigned long size,
-                unsigned long flags)
-{
-        void * addr;
-        struct vm_struct * area;
-        unsigned long offset, last_addr;
-        pgprot_t pgprot;
-
-        /* Don't allow wraparound or zero size */
-        last_addr = phys_addr + size - 1;
-        if (!size || last_addr < phys_addr)
-                return NULL;
-
-        pgprot = __pgprot(_PAGE_PRESENT  | _PAGE_READ   |
-                          _PAGE_WRITE    | _PAGE_DIRTY  |
-                          _PAGE_ACCESSED | _PAGE_SHARED | flags);
-
-        /*
-         * Mappings have to be page-aligned
-         */
-        offset = phys_addr & ~PAGE_MASK;
-        phys_addr &= PAGE_MASK;
-        size = PAGE_ALIGN(last_addr + 1) - phys_addr;
-
-        /*
-         * Ok, go for it..
-         */
-        area = get_vm_area(size, VM_IOREMAP);
-        if (!area)
-                return NULL;
-        pr_debug("Get vm_area returns %p addr %p\n", area, area->addr);
-        area->phys_addr = phys_addr;
-        addr = area->addr;
-        if (ioremap_page_range((unsigned long)addr, (unsigned long)addr + size,
-                               phys_addr, pgprot)) {
-                vunmap(addr);
-                return NULL;
-        }
-        return (void *) (offset + (char *)addr);
-}
-EXPORT_SYMBOL(__ioremap);
-
-void __iounmap(void *addr)
-{
-        struct vm_struct *area;
-
-        vfree((void *) (PAGE_MASK & (unsigned long) addr));
-        area = remove_vm_area((void *) (PAGE_MASK & (unsigned long) addr));
-        if (!area) {
-                printk(KERN_ERR "iounmap: bad address %p\n", addr);
-                return;
-        }
-
-        kfree(area);
-}
-EXPORT_SYMBOL(__iounmap);
-
 static struct resource shmedia_iomap = {
         .name   = "shmedia_iomap",
         .start  = IOBASE_VADDR + PAGE_SIZE,
         .end    = IOBASE_END - 1,
 };
 
-static void shmedia_mapioaddr(unsigned long pa, unsigned long va);
+static void shmedia_mapioaddr(unsigned long pa, unsigned long va,
+                              unsigned long flags);
 static void shmedia_unmapioaddr(unsigned long vaddr);
-static unsigned long shmedia_ioremap(struct resource *res, u32 pa, int sz);
+static void __iomem *shmedia_ioremap(struct resource *res, u32 pa,
+                                     int sz, unsigned long flags);
 
 /*
  * We have the same problem as the SPARC, so lets have the same comment:
@@ -130,18 +60,18 @@ static struct xresource xresv[XNRES];
 
 static struct xresource *xres_alloc(void)
 {
-        struct xresource *xrp;
-        int n;
-
-        xrp = xresv;
-        for (n = 0; n < XNRES; n++) {
-                if (xrp->xflag == 0) {
-                        xrp->xflag = 1;
-                        return xrp;
-                }
-                xrp++;
-        }
-        return NULL;
+        struct xresource *xrp;
+        int n;
+
+        xrp = xresv;
+        for (n = 0; n < XNRES; n++) {
+                if (xrp->xflag == 0) {
+                        xrp->xflag = 1;
+                        return xrp;
+                }
+                xrp++;
+        }
+        return NULL;
 }
 
 static void xres_free(struct xresource *xrp)
@@ -161,76 +91,71 @@ static struct resource *shmedia_find_resource(struct resource *root,
         return NULL;
 }
 
-static unsigned long shmedia_alloc_io(unsigned long phys, unsigned long size,
-                                      const char *name)
+static void __iomem *shmedia_alloc_io(unsigned long phys, unsigned long size,
+                                      const char *name, unsigned long flags)
 {
-        static int printed_full = 0;
-        struct xresource *xres;
-        struct resource *res;
-        char *tack;
-        int tlen;
-
-        if (name == NULL) name = "???";
-
-        if ((xres = xres_alloc()) != 0) {
-                tack = xres->xname;
-                res = &xres->xres;
-        } else {
-                if (!printed_full) {
-                        printk("%s: done with statics, switching to kmalloc\n",
-                               __func__);
-                        printed_full = 1;
-                }
-                tlen = strlen(name);
-                tack = kmalloc(sizeof (struct resource) + tlen + 1, GFP_KERNEL);
-                if (!tack)
-                        return -ENOMEM;
-                memset(tack, 0, sizeof(struct resource));
-                res = (struct resource *) tack;
-                tack += sizeof (struct resource);
-        }
-
-        strncpy(tack, name, XNMLN);
-        tack[XNMLN] = 0;
-        res->name = tack;
-
-        return shmedia_ioremap(res, phys, size);
+        static int printed_full;
+        struct xresource *xres;
+        struct resource *res;
+        char *tack;
+        int tlen;
+
+        if (name == NULL)
+                name = "???";
+
+        xres = xres_alloc();
+        if (xres != 0) {
+                tack = xres->xname;
+                res = &xres->xres;
+        } else {
+                if (!printed_full) {
+                        printk(KERN_NOTICE "%s: done with statics, "
+                               "switching to kmalloc\n", __func__);
+                        printed_full = 1;
+                }
+                tlen = strlen(name);
+                tack = kmalloc(sizeof(struct resource) + tlen + 1, GFP_KERNEL);
+                if (!tack)
+                        return NULL;
+                memset(tack, 0, sizeof(struct resource));
+                res = (struct resource *) tack;
+                tack += sizeof(struct resource);
+        }
+
+        strncpy(tack, name, XNMLN);
+        tack[XNMLN] = 0;
+        res->name = tack;
+
+        return shmedia_ioremap(res, phys, size, flags);
 }
 
-static unsigned long shmedia_ioremap(struct resource *res, u32 pa, int sz)
+static void __iomem *shmedia_ioremap(struct resource *res, u32 pa, int sz,
+                                     unsigned long flags)
 {
-        unsigned long offset = ((unsigned long) pa) & (~PAGE_MASK);
+        unsigned long offset = ((unsigned long) pa) & (~PAGE_MASK);
         unsigned long round_sz = (offset + sz + PAGE_SIZE-1) & PAGE_MASK;
-        unsigned long va;
-        unsigned int psz;
+        unsigned long va;
+        unsigned int psz;
 
-        if (allocate_resource(&shmedia_iomap, res, round_sz,
+        if (allocate_resource(&shmedia_iomap, res, round_sz,
                               shmedia_iomap.start, shmedia_iomap.end,
                               PAGE_SIZE, NULL, NULL) != 0) {
-                panic("alloc_io_res(%s): cannot occupy\n",
-                    (res->name != NULL)? res->name: "???");
-        }
+                panic("alloc_io_res(%s): cannot occupy\n",
+                      (res->name != NULL) ? res->name : "???");
+        }
 
-        va = res->start;
-        pa &= PAGE_MASK;
+        va = res->start;
+        pa &= PAGE_MASK;
 
         psz = (res->end - res->start + (PAGE_SIZE - 1)) / PAGE_SIZE;
 
-        /* log at boot time ... */
-        printk("mapioaddr: %6s  [%2d page%s]  va 0x%08lx   pa 0x%08x\n",
-               ((res->name != NULL) ? res->name : "???"),
-               psz, psz == 1 ? " " : "s", va, pa);
-
-        for (psz = res->end - res->start + 1; psz != 0; psz -= PAGE_SIZE) {
-                shmedia_mapioaddr(pa, va);
-                va += PAGE_SIZE;
-                pa += PAGE_SIZE;
-        }
-
-        res->start += offset;
-        res->end = res->start + sz - 1;         /* not strictly necessary.. */
+        for (psz = res->end - res->start + 1; psz != 0; psz -= PAGE_SIZE) {
+                shmedia_mapioaddr(pa, va, flags);
+                va += PAGE_SIZE;
+                pa += PAGE_SIZE;
+        }
 
-        return res->start;
+        return (void __iomem *)(unsigned long)(res->start + offset);
 }
 
 static void shmedia_free_io(struct resource *res)
@@ -249,14 +174,12 @@ static void shmedia_free_io(struct resource *res)
 
 static __init_refok void *sh64_get_page(void)
 {
-        extern int after_bootmem;
         void *page;
 
-        if (after_bootmem) {
-                page = (void *)get_zeroed_page(GFP_ATOMIC);
-        } else {
+        if (slab_is_available())
+                page = (void *)get_zeroed_page(GFP_KERNEL);
+        else
                 page = alloc_bootmem_pages(PAGE_SIZE);
-        }
 
         if (!page || ((unsigned long)page & ~PAGE_MASK))
                 panic("sh64_get_page: Out of memory already?\n");
@@ -264,17 +187,20 @@ static __init_refok void *sh64_get_page(void)
         return page;
 }
 
-static void shmedia_mapioaddr(unsigned long pa, unsigned long va)
+static void shmedia_mapioaddr(unsigned long pa, unsigned long va,
+                              unsigned long flags)
 {
         pgd_t *pgdp;
         pud_t *pudp;
         pmd_t *pmdp;
         pte_t *ptep, pte;
         pgprot_t prot;
-        unsigned long flags = 1; /* 1 = CB0-1 device */
 
         pr_debug("shmedia_mapiopage pa %08lx va %08lx\n",  pa, va);
 
+        if (!flags)
+                flags = 1; /* 1 = CB0-1 device */
+
         pgdp = pgd_offset_k(va);
         if (pgd_none(*pgdp) || !pgd_present(*pgdp)) {
                 pudp = (pud_t *)sh64_get_page();
@@ -288,7 +214,7 @@ static void shmedia_mapioaddr(unsigned long pa, unsigned long va)
         }
 
         pmdp = pmd_offset(pudp, va);
-        if (pmd_none(*pmdp) || !pmd_present(*pmdp) ) {
+        if (pmd_none(*pmdp) || !pmd_present(*pmdp)) {
                 ptep = (pte_t *)sh64_get_page();
                 set_pmd(pmdp, __pmd((unsigned long)ptep + _PAGE_TABLE));
         }
@@ -336,17 +262,19 @@ static void shmedia_unmapioaddr(unsigned long vaddr)
         pte_clear(&init_mm, vaddr, ptep);
 }
 
-unsigned long onchip_remap(unsigned long phys, unsigned long size, const char *name)
+void __iomem *__ioremap(unsigned long offset, unsigned long size,
+                        unsigned long flags)
 {
-        if (size < PAGE_SIZE)
-                size = PAGE_SIZE;
+        char name[14];
 
-        return shmedia_alloc_io(phys, size, name);
+        sprintf(name, "phys_%08x", (u32)offset);
+        return shmedia_alloc_io(offset, size, name, flags);
 }
-EXPORT_SYMBOL(onchip_remap);
+EXPORT_SYMBOL(__ioremap);
 
-void onchip_unmap(unsigned long vaddr)
+void __iounmap(void __iomem *virtual)
 {
+        unsigned long vaddr = (unsigned long)virtual & PAGE_MASK;
         struct resource *res;
         unsigned int psz;
 
@@ -357,10 +285,7 @@ void onchip_unmap(unsigned long vaddr)
                 return;
         }
 
-        psz = (res->end - res->start + (PAGE_SIZE - 1)) / PAGE_SIZE;
-
-        printk(KERN_DEBUG "unmapioaddr: %6s  [%2d page%s] freed\n",
-               res->name, psz, psz == 1 ? " " : "s");
+        psz = (res->end - res->start + (PAGE_SIZE - 1)) / PAGE_SIZE;
 
         shmedia_free_io(res);
 
@@ -371,9 +296,8 @@ void onchip_unmap(unsigned long vaddr)
                 kfree(res);
         }
 }
-EXPORT_SYMBOL(onchip_unmap);
+EXPORT_SYMBOL(__iounmap);
 
-#ifdef CONFIG_PROC_FS
 static int
 ioremap_proc_info(char *buf, char **start, off_t fpos, int length, int *eof,
                   void *data)
@@ -385,7 +309,10 @@ ioremap_proc_info(char *buf, char **start, off_t fpos, int length, int *eof,
         for (r = ((struct resource *)data)->child; r != NULL; r = r->sibling) {
                 if (p + 32 >= e)        /* Better than nothing */
                         break;
-                if ((nm = r->name) == 0) nm = "???";
+                nm = r->name;
+                if (nm == NULL)
+                        nm = "???";
+
                 p += sprintf(p, "%08lx-%08lx: %s\n",
                              (unsigned long)r->start,
                              (unsigned long)r->end, nm);
@@ -393,14 +320,11 @@ ioremap_proc_info(char *buf, char **start, off_t fpos, int length, int *eof,
 
         return p-buf;
 }
-#endif /* CONFIG_PROC_FS */
 
 static int __init register_proc_onchip(void)
 {
-#ifdef CONFIG_PROC_FS
-        create_proc_read_entry("io_map",0,0, ioremap_proc_info, &shmedia_iomap);
-#endif
+        create_proc_read_entry("io_map", 0, 0, ioremap_proc_info,
+                               &shmedia_iomap);
         return 0;
 }
-
-__initcall(register_proc_onchip);
+late_initcall(register_proc_onchip);
diff --git a/arch/sh/mm/mmap.c b/arch/sh/mm/mmap.c
index 931f4d003fa0..1b5fdfb4e0c2 100644
--- a/arch/sh/mm/mmap.c
+++ b/arch/sh/mm/mmap.c
@@ -1,7 +1,7 @@
 /*
  * arch/sh/mm/mmap.c
  *
- * Copyright (C) 2008  Paul Mundt
+ * Copyright (C) 2008 - 2009  Paul Mundt
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
@@ -21,9 +21,26 @@ EXPORT_SYMBOL(shm_align_mask);
 /*
  * To avoid cache aliases, we map the shared page with same color.
  */
-#define COLOUR_ALIGN(addr, pgoff)                               \
-        ((((addr) + shm_align_mask) & ~shm_align_mask) +        \
-         (((pgoff) << PAGE_SHIFT) & shm_align_mask))
+static inline unsigned long COLOUR_ALIGN(unsigned long addr,
+                                         unsigned long pgoff)
+{
+        unsigned long base = (addr + shm_align_mask) & ~shm_align_mask;
+        unsigned long off = (pgoff << PAGE_SHIFT) & shm_align_mask;
+
+        return base + off;
+}
+
+static inline unsigned long COLOUR_ALIGN_DOWN(unsigned long addr,
+                                              unsigned long pgoff)
+{
+        unsigned long base = addr & ~shm_align_mask;
+        unsigned long off = (pgoff << PAGE_SHIFT) & shm_align_mask;
+
+        if (base + off <= addr)
+                return base + off;
+
+        return base - off;
+}
 
 unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
         unsigned long len, unsigned long pgoff, unsigned long flags)
@@ -103,6 +120,117 @@ full_search:
                         addr = COLOUR_ALIGN(addr, pgoff);
         }
 }
+
+unsigned long
+arch_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0,
+                          const unsigned long len, const unsigned long pgoff,
+                          const unsigned long flags)
+{
+        struct vm_area_struct *vma;
+        struct mm_struct *mm = current->mm;
+        unsigned long addr = addr0;
+        int do_colour_align;
+
+        if (flags & MAP_FIXED) {
+                /* We do not accept a shared mapping if it would violate
+                 * cache aliasing constraints.
+                 */
+                if ((flags & MAP_SHARED) &&
+                    ((addr - (pgoff << PAGE_SHIFT)) & shm_align_mask))
+                        return -EINVAL;
+                return addr;
+        }
+
+        if (unlikely(len > TASK_SIZE))
+                return -ENOMEM;
+
+        do_colour_align = 0;
+        if (filp || (flags & MAP_SHARED))
+                do_colour_align = 1;
+
+        /* requesting a specific address */
+        if (addr) {
+                if (do_colour_align)
+                        addr = COLOUR_ALIGN(addr, pgoff);
+                else
+                        addr = PAGE_ALIGN(addr);
+
+                vma = find_vma(mm, addr);
+                if (TASK_SIZE - len >= addr &&
+                    (!vma || addr + len <= vma->vm_start))
+                        return addr;
+        }
+
+        /* check if free_area_cache is useful for us */
+        if (len <= mm->cached_hole_size) {
+                mm->cached_hole_size = 0;
+                mm->free_area_cache = mm->mmap_base;
+        }
+
+        /* either no address requested or can't fit in requested address hole */
+        addr = mm->free_area_cache;
+        if (do_colour_align) {
+                unsigned long base = COLOUR_ALIGN_DOWN(addr-len, pgoff);
+
+                addr = base + len;
+        }
+
+        /* make sure it can fit in the remaining address space */
+        if (likely(addr > len)) {
+                vma = find_vma(mm, addr-len);
+                if (!vma || addr <= vma->vm_start) {
+                        /* remember the address as a hint for next time */
+                        return (mm->free_area_cache = addr-len);
+                }
+        }
+
+        if (unlikely(mm->mmap_base < len))
+                goto bottomup;
+
+        addr = mm->mmap_base-len;
+        if (do_colour_align)
+                addr = COLOUR_ALIGN_DOWN(addr, pgoff);
+
+        do {
+                /*
+                 * Lookup failure means no vma is above this address,
+                 * else if new region fits below vma->vm_start,
+                 * return with success:
+                 */
+                vma = find_vma(mm, addr);
+                if (likely(!vma || addr+len <= vma->vm_start)) {
+                        /* remember the address as a hint for next time */
+                        return (mm->free_area_cache = addr);
+                }
+
+                /* remember the largest hole we saw so far */
+                if (addr + mm->cached_hole_size < vma->vm_start)
+                        mm->cached_hole_size = vma->vm_start - addr;
+
+                /* try just below the current vma->vm_start */
+                addr = vma->vm_start-len;
+                if (do_colour_align)
+                        addr = COLOUR_ALIGN_DOWN(addr, pgoff);
+        } while (likely(len < vma->vm_start));
+
+bottomup:
+        /*
+         * A failed mmap() very likely causes application failure,
+         * so fall back to the bottom-up function here. This scenario
+         * can happen with large stack limits and large mmap()
+         * allocations.
+         */
+        mm->cached_hole_size = ~0UL;
+        mm->free_area_cache = TASK_UNMAPPED_BASE;
+        addr = arch_get_unmapped_area(filp, addr0, len, pgoff, flags);
+        /*
+         * Restore the topdown base:
+         */
+        mm->free_area_cache = mm->mmap_base;
+        mm->cached_hole_size = ~0UL;
+
+        return addr;
+}
 #endif /* CONFIG_MMU */
 
 /*
diff --git a/arch/sh/oprofile/common.c b/arch/sh/oprofile/common.c
index 1b9d4304b3bf..44f4e31c6d63 100644
--- a/arch/sh/oprofile/common.c
+++ b/arch/sh/oprofile/common.c
@@ -109,6 +109,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
         case CPU_SH7785:
         case CPU_SH7786:
         case CPU_SH7723:
+        case CPU_SH7724:
         case CPU_SHX3:
                 lmodel = &op_model_sh4a_ops;
                 break;
diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types
index 8477b5d884fd..fec3a53b8650 100644
--- a/arch/sh/tools/mach-types
+++ b/arch/sh/tools/mach-types
@@ -23,6 +23,7 @@ HD64461			HD64461
 7619SE                  SH_7619_SOLUTION_ENGINE
 7721SE                  SH_7721_SOLUTION_ENGINE
 7722SE                  SH_7722_SOLUTION_ENGINE
+7724SE                  SH_7724_SOLUTION_ENGINE
 7751SE                  SH_7751_SOLUTION_ENGINE
 7780SE                  SH_7780_SOLUTION_ENGINE
 7751SYSTEMH             SH_7751_SYSTEMH
diff --git a/arch/sparc/include/asm/thread_info_64.h b/arch/sparc/include/asm/thread_info_64.h
index 639ac805448a..65865726b283 100644
--- a/arch/sparc/include/asm/thread_info_64.h
+++ b/arch/sparc/include/asm/thread_info_64.h
@@ -102,8 +102,8 @@ struct thread_info {
 #define TI_KERN_CNTD1   0x00000488
 #define TI_PCR          0x00000490
 #define TI_RESTART_BLOCK 0x00000498
-#define TI_KUNA_REGS    0x000004c0
-#define TI_KUNA_INSN    0x000004c8
+#define TI_KUNA_REGS    0x000004c8
+#define TI_KUNA_INSN    0x000004d0
 #define TI_FPREGS       0x00000500
 
 /* We embed this in the uppermost byte of thread_info->flags */
diff --git a/arch/um/drivers/ubd_kern.c b/arch/um/drivers/ubd_kern.c
index f934225fd8ef..aa9e926e13d7 100644
--- a/arch/um/drivers/ubd_kern.c
+++ b/arch/um/drivers/ubd_kern.c
@@ -451,23 +451,6 @@ static void do_ubd_request(struct request_queue * q);
 
 /* Only changed by ubd_init, which is an initcall. */
 static int thread_fd = -1;
-
-static void ubd_end_request(struct request *req, int bytes, int error)
-{
-        blk_end_request(req, error, bytes);
-}
-
-/* Callable only from interrupt context - otherwise you need to do
- * spin_lock_irq()/spin_lock_irqsave() */
-static inline void ubd_finish(struct request *req, int bytes)
-{
-        if(bytes < 0){
-                ubd_end_request(req, 0, -EIO);
-                return;
-        }
-        ubd_end_request(req, bytes, 0);
-}
-
 static LIST_HEAD(restart);
 
 /* XXX - move this inside ubd_intr. */
@@ -475,7 +458,6 @@ static LIST_HEAD(restart);
 static void ubd_handler(void)
 {
         struct io_thread_req *req;
-        struct request *rq;
         struct ubd *ubd;
         struct list_head *list, *next_ele;
         unsigned long flags;
@@ -492,10 +474,7 @@ static void ubd_handler(void)
                         return;
                 }
 
-                rq = req->req;
-                rq->nr_sectors -= req->length >> 9;
-                if(rq->nr_sectors == 0)
-                        ubd_finish(rq, rq->hard_nr_sectors << 9);
+                blk_end_request(req->req, 0, req->length);
                 kfree(req);
         }
         reactivate_fd(thread_fd, UBD_IRQ);
@@ -1243,27 +1222,26 @@ static void do_ubd_request(struct request_queue *q)
 {
         struct io_thread_req *io_req;
         struct request *req;
-        int n, last_sectors;
+        sector_t sector;
+        int n;
 
         while(1){
                 struct ubd *dev = q->queuedata;
                 if(dev->end_sg == 0){
-                        struct request *req = elv_next_request(q);
+                        struct request *req = blk_fetch_request(q);
                         if(req == NULL)
                                 return;
 
                         dev->request = req;
-                        blkdev_dequeue_request(req);
                         dev->start_sg = 0;
                         dev->end_sg = blk_rq_map_sg(q, req, dev->sg);
                 }
 
                 req = dev->request;
-                last_sectors = 0;
+                sector = blk_rq_pos(req);
                 while(dev->start_sg < dev->end_sg){
                         struct scatterlist *sg = &dev->sg[dev->start_sg];
 
-                        req->sector += last_sectors;
                         io_req = kmalloc(sizeof(struct io_thread_req),
                                          GFP_ATOMIC);
                         if(io_req == NULL){
@@ -1272,10 +1250,10 @@ static void do_ubd_request(struct request_queue *q)
                                 return;
                         }
                         prepare_request(req, io_req,
-                                        (unsigned long long) req->sector << 9,
+                                        (unsigned long long)sector << 9,
                                         sg->offset, sg->length, sg_page(sg));
 
-                        last_sectors = sg->length >> 9;
+                        sector += sg->length >> 9;
                         n = os_write_file(thread_fd, &io_req,
                                           sizeof(struct io_thread_req *));
                         if(n != sizeof(struct io_thread_req *)){
diff --git a/arch/x86/Kbuild b/arch/x86/Kbuild
new file mode 100644
index 000000000000..ad8ec356fb36
--- /dev/null
+++ b/arch/x86/Kbuild
@@ -0,0 +1,16 @@
+
+obj-$(CONFIG_KVM) += kvm/
+
+# Xen paravirtualization support
+obj-$(CONFIG_XEN) += xen/
+
+# lguest paravirtualization support
+obj-$(CONFIG_LGUEST_GUEST) += lguest/
+
+obj-y += kernel/
+obj-y += mm/
+
+obj-y += crypto/
+obj-y += vdso/
+obj-$(CONFIG_IA32_EMULATION) += ia32/
+
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index afd1168eeefb..356d2ec8e2fb 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -47,6 +47,11 @@ config X86
         select HAVE_KERNEL_BZIP2
         select HAVE_KERNEL_LZMA
 
+config OUTPUT_FORMAT
+        string
+        default "elf32-i386" if X86_32
+        default "elf64-x86-64" if X86_64
+
 config ARCH_DEFCONFIG
         string
         default "arch/x86/configs/i386_defconfig" if X86_32
@@ -734,6 +739,7 @@ config X86_UP_IOAPIC
 config X86_LOCAL_APIC
         def_bool y
         depends on X86_64 || SMP || X86_32_NON_STANDARD || X86_UP_APIC
+        select HAVE_PERF_COUNTERS if (!M386 && !M486)
 
 config X86_IO_APIC
         def_bool y
@@ -1497,9 +1503,7 @@ config KEXEC_JUMP
 
 config PHYSICAL_START
         hex "Physical address where the kernel is loaded" if (EMBEDDED || CRASH_DUMP)
-        default "0x1000000" if X86_NUMAQ
-        default "0x200000" if X86_64
-        default "0x100000"
+        default "0x1000000"
         ---help---
           This gives the physical address where the kernel is loaded.
 
@@ -1518,15 +1522,15 @@ config PHYSICAL_START
           to be specifically compiled to run from a specific memory area
           (normally a reserved region) and this option comes handy.
 
-          So if you are using bzImage for capturing the crash dump, leave
-          the value here unchanged to 0x100000 and set CONFIG_RELOCATABLE=y.
-          Otherwise if you plan to use vmlinux for capturing the crash dump
-          change this value to start of the reserved region (Typically 16MB
-          0x1000000). In other words, it can be set based on the "X" value as
-          specified in the "crashkernel=YM@XM" command line boot parameter
-          passed to the panic-ed kernel. Typically this parameter is set as
-          crashkernel=64M@16M. Please take a look at
-          Documentation/kdump/kdump.txt for more details about crash dumps.
+          So if you are using bzImage for capturing the crash dump,
+          leave the value here unchanged to 0x1000000 and set
+          CONFIG_RELOCATABLE=y.  Otherwise if you plan to use vmlinux
+          for capturing the crash dump change this value to start of
+          the reserved region.  In other words, it can be set based on
+          the "X" value as specified in the "crashkernel=YM@XM"
+          command line boot parameter passed to the panic-ed
+          kernel. Please take a look at Documentation/kdump/kdump.txt
+          for more details about crash dumps.
 
           Usage of bzImage for capturing the crash dump is recommended as
           one does not have to build two kernels. Same kernel can be used
@@ -1539,8 +1543,8 @@ config PHYSICAL_START
           Don't change this unless you know what you are doing.
 
 config RELOCATABLE
-        bool "Build a relocatable kernel (EXPERIMENTAL)"
-        depends on EXPERIMENTAL
+        bool "Build a relocatable kernel"
+        default y
         ---help---
           This builds a kernel image that retains relocation information
           so it can be loaded someplace besides the default 1MB.
@@ -1555,12 +1559,16 @@ config RELOCATABLE
           it has been loaded at and the compile time physical address
           (CONFIG_PHYSICAL_START) is ignored.
 
+# Relocation on x86-32 needs some additional build support
+config X86_NEED_RELOCS
+        def_bool y
+        depends on X86_32 && RELOCATABLE
+
 config PHYSICAL_ALIGN
         hex
         prompt "Alignment value to which kernel should be aligned" if X86_32
-        default "0x100000" if X86_32
-        default "0x200000" if X86_64
-        range 0x2000 0x400000
+        default "0x1000000"
+        range 0x2000 0x1000000
         ---help---
           This value puts the alignment restrictions on physical address
           where kernel is loaded and run from. Kernel is compiled for an
diff --git a/arch/x86/Kconfig.debug b/arch/x86/Kconfig.debug
index d8359e73317f..d105f29bb6bb 100644
--- a/arch/x86/Kconfig.debug
+++ b/arch/x86/Kconfig.debug
@@ -159,14 +159,30 @@ config IOMMU_DEBUG
           options. See Documentation/x86_64/boot-options.txt for more
           details.
 
+config IOMMU_STRESS
+        bool "Enable IOMMU stress-test mode"
+        ---help---
+          This option disables various optimizations in IOMMU related
+          code to do real stress testing of the IOMMU code. This option
+          will cause a performance drop and should only be enabled for
+          testing.
+
 config IOMMU_LEAK
         bool "IOMMU leak tracing"
-        depends on DEBUG_KERNEL
-        depends on IOMMU_DEBUG
+        depends on IOMMU_DEBUG && DMA_API_DEBUG
         ---help---
           Add a simple leak tracer to the IOMMU code. This is useful when you
           are debugging a buggy device driver that leaks IOMMU mappings.
 
+config X86_DS_SELFTEST
+    bool "DS selftest"
+    default y
+    depends on DEBUG_KERNEL
+    depends on X86_DS
+        ---help---
+          Perform Debug Store selftests at boot time.
+          If in doubt, say "N".
+
 config HAVE_MMIOTRACE_SUPPORT
         def_bool y
 
diff --git a/arch/x86/Makefile b/arch/x86/Makefile
index 8c86b72afdc2..edbd0ca62067 100644
--- a/arch/x86/Makefile
+++ b/arch/x86/Makefile
@@ -7,8 +7,6 @@ else
         KBUILD_DEFCONFIG := $(ARCH)_defconfig
 endif
 
-core-$(CONFIG_KVM) += arch/x86/kvm/
-
 # BITS is used as extension for files which are available in a 32 bit
 # and a 64 bit version to simplify shared Makefiles.
 # e.g.: obj-y += foo_$(BITS).o
@@ -118,21 +116,8 @@ head-y += arch/x86/kernel/init_task.o
 
 libs-y  += arch/x86/lib/
 
-# Sub architecture files that needs linking first
-core-y += $(fcore-y)
-
-# Xen paravirtualization support
-core-$(CONFIG_XEN) += arch/x86/xen/
-
-# lguest paravirtualization support
-core-$(CONFIG_LGUEST_GUEST) += arch/x86/lguest/
-
-core-y += arch/x86/kernel/
-core-y += arch/x86/mm/
-
-core-y += arch/x86/crypto/
-core-y += arch/x86/vdso/
-core-$(CONFIG_IA32_EMULATION) += arch/x86/ia32/
+# See arch/x86/Kbuild for content of core part of the kernel
+core-y += arch/x86/
 
 # drivers-y are linked after core-y
 drivers-$(CONFIG_MATH_EMULATION) += arch/x86/math-emu/
diff --git a/arch/x86/boot/.gitignore b/arch/x86/boot/.gitignore
index 172cf8a98bdd..851fe936d242 100644
--- a/arch/x86/boot/.gitignore
+++ b/arch/x86/boot/.gitignore
@@ -3,6 +3,8 @@ bzImage
 cpustr.h
 mkcpustr
 offsets.h
+voffset.h
+zoffset.h
 setup
 setup.bin
 setup.elf
diff --git a/arch/x86/boot/Makefile b/arch/x86/boot/Makefile
index 6633b6e7505a..8d16ada25048 100644
--- a/arch/x86/boot/Makefile
+++ b/arch/x86/boot/Makefile
@@ -26,9 +26,10 @@ targets		:= vmlinux.bin setup.bin setup.elf bzImage
 targets         += fdimage fdimage144 fdimage288 image.iso mtools.conf
 subdir-         := compressed
 
-setup-y         += a20.o cmdline.o copy.o cpu.o cpucheck.o edd.o
+setup-y         += a20.o bioscall.o cmdline.o copy.o cpu.o cpucheck.o edd.o
 setup-y         += header.o main.o mca.o memory.o pm.o pmjump.o
-setup-y         += printf.o string.o tty.o video.o video-mode.o version.o
+setup-y         += printf.o regs.o string.o tty.o video.o video-mode.o
+setup-y         += version.o
 setup-$(CONFIG_X86_APM_BOOT) += apm.o
 
 # The link order of the video-*.o modules can matter.  In particular,
@@ -86,19 +87,27 @@ $(obj)/vmlinux.bin: $(obj)/compressed/vmlinux FORCE
 
 SETUP_OBJS = $(addprefix $(obj)/,$(setup-y))
 
-sed-offsets := -e 's/^00*/0/' \
-        -e 's/^\([0-9a-fA-F]*\) . \(input_data\|input_data_end\)$$/\#define \2 0x\1/p'
+sed-voffset := -e 's/^\([0-9a-fA-F]*\) . \(_text\|_end\)$$/\#define VO_\2 0x\1/p'
 
-quiet_cmd_offsets = OFFSETS $@
-      cmd_offsets = $(NM) $< | sed -n $(sed-offsets) > $@
+quiet_cmd_voffset = VOFFSET $@
+      cmd_voffset = $(NM) $< | sed -n $(sed-voffset) > $@
 
-$(obj)/offsets.h: $(obj)/compressed/vmlinux FORCE
-        $(call if_changed,offsets)
+targets += voffset.h
+$(obj)/voffset.h: vmlinux FORCE
+        $(call if_changed,voffset)
+
+sed-zoffset := -e 's/^\([0-9a-fA-F]*\) . \(startup_32\|input_data\|_end\|z_.*\)$$/\#define ZO_\2 0x\1/p'
+
+quiet_cmd_zoffset = ZOFFSET $@
+      cmd_zoffset = $(NM) $< | sed -n $(sed-zoffset) > $@
+
+targets += zoffset.h
+$(obj)/zoffset.h: $(obj)/compressed/vmlinux FORCE
+        $(call if_changed,zoffset)
 
-targets += offsets.h
 
 AFLAGS_header.o += -I$(obj)
-$(obj)/header.o: $(obj)/offsets.h
+$(obj)/header.o: $(obj)/voffset.h $(obj)/zoffset.h
 
 LDFLAGS_setup.elf       := -T
 $(obj)/setup.elf: $(src)/setup.ld $(SETUP_OBJS) FORCE
diff --git a/arch/x86/boot/a20.c b/arch/x86/boot/a20.c
index 7c19ce8c2442..64a31a6d751a 100644
--- a/arch/x86/boot/a20.c
+++ b/arch/x86/boot/a20.c
@@ -2,7 +2,7 @@
  *
  *   Copyright (C) 1991, 1992 Linus Torvalds
  *   Copyright 2007-2008 rPath, Inc. - All Rights Reserved
- *   Copyright 2009 Intel Corporation
+ *   Copyright 2009 Intel Corporation; author H. Peter Anvin
  *
  *   This file is part of the Linux kernel, and is made available under
  *   the terms of the GNU General Public License version 2.
@@ -90,8 +90,11 @@ static int a20_test_long(void)
 
 static void enable_a20_bios(void)
 {
-        asm volatile("pushfl; int $0x15; popfl"
-                     : : "a" ((u16)0x2401));
+        struct biosregs ireg;
+
+        initregs(&ireg);
+        ireg.ax = 0x2401;
+        intcall(0x15, &ireg, NULL);
 }
 
 static void enable_a20_kbc(void)
diff --git a/arch/x86/boot/apm.c b/arch/x86/boot/apm.c
index 7aa6033001f9..ee274834ea8b 100644
--- a/arch/x86/boot/apm.c
+++ b/arch/x86/boot/apm.c
@@ -2,6 +2,7 @@
  *
  *   Copyright (C) 1991, 1992 Linus Torvalds
  *   Copyright 2007 rPath, Inc. - All Rights Reserved
+ *   Copyright 2009 Intel Corporation; author H. Peter Anvin
  *
  *   Original APM BIOS checking by Stephen Rothwell, May 1994
  *   (sfr@canb.auug.org.au)
@@ -19,75 +20,56 @@
 
 int query_apm_bios(void)
 {
-        u16 ax, bx, cx, dx, di;
-        u32 ebx, esi;
-        u8 err;
+        struct biosregs ireg, oreg;
 
         /* APM BIOS installation check */
-        ax = 0x5300;
-        bx = cx = 0;
-        asm volatile("pushl %%ebp ; int $0x15 ; popl %%ebp ; setc %0"
-                     : "=d" (err), "+a" (ax), "+b" (bx), "+c" (cx)
-                     : : "esi", "edi");
+        initregs(&ireg);
+        ireg.ah = 0x53;
+        intcall(0x15, &ireg, &oreg);
 
-        if (err)
+        if (oreg.flags & X86_EFLAGS_CF)
                 return -1;              /* No APM BIOS */
 
-        if (bx != 0x504d)       /* "PM" signature */
+        if (oreg.bx != 0x504d)          /* "PM" signature */
                 return -1;
 
-        if (!(cx & 0x02))               /* 32 bits supported? */
+        if (!(oreg.cx & 0x02))          /* 32 bits supported? */
                 return -1;
 
         /* Disconnect first, just in case */
-        ax = 0x5304;
-        bx = 0;
-        asm volatile("pushl %%ebp ; int $0x15 ; popl %%ebp"
-                     : "+a" (ax), "+b" (bx)
-                     : : "ecx", "edx", "esi", "edi");
-
-        /* Paranoia */
-        ebx = esi = 0;
-        cx = dx = di = 0;
+        ireg.al = 0x04;
+        intcall(0x15, &ireg, NULL);
 
         /* 32-bit connect */
-        asm volatile("pushl %%ebp ; int $0x15 ; popl %%ebp ; setc %6"
-                     : "=a" (ax), "+b" (ebx), "+c" (cx), "+d" (dx),
-                       "+S" (esi), "+D" (di), "=m" (err)
-                     : "a" (0x5303));
-
-        boot_params.apm_bios_info.cseg = ax;
-        boot_params.apm_bios_info.offset = ebx;
-        boot_params.apm_bios_info.cseg_16 = cx;
-        boot_params.apm_bios_info.dseg = dx;
-        boot_params.apm_bios_info.cseg_len = (u16)esi;
-        boot_params.apm_bios_info.cseg_16_len = esi >> 16;
-        boot_params.apm_bios_info.dseg_len = di;
-
-        if (err)
+        ireg.al = 0x03;
+        intcall(0x15, &ireg, &oreg);
+
+        boot_params.apm_bios_info.cseg        = oreg.ax;
+        boot_params.apm_bios_info.offset      = oreg.ebx;
+        boot_params.apm_bios_info.cseg_16     = oreg.cx;
+        boot_params.apm_bios_info.dseg        = oreg.dx;
+        boot_params.apm_bios_info.cseg_len    = oreg.si;
+        boot_params.apm_bios_info.cseg_16_len = oreg.hsi;
+        boot_params.apm_bios_info.dseg_len    = oreg.di;
+
+        if (oreg.flags & X86_EFLAGS_CF)
                 return -1;
 
         /* Redo the installation check as the 32-bit connect;
            some BIOSes return different flags this way... */
 
-        ax = 0x5300;
-        bx = cx = 0;
-        asm volatile("pushl %%ebp ; int $0x15 ; popl %%ebp ; setc %0"
-                     : "=d" (err), "+a" (ax), "+b" (bx), "+c" (cx)
-                     : : "esi", "edi");
+        ireg.al = 0x00;
+        intcall(0x15, &ireg, &oreg);
 
-        if (err || bx != 0x504d) {
+        if ((oreg.eflags & X86_EFLAGS_CF) || oreg.bx != 0x504d) {
                 /* Failure with 32-bit connect, try to disconect and ignore */
-                ax = 0x5304;
-                bx = 0;
-                asm volatile("pushl %%ebp ; int $0x15 ; popl %%ebp"
-                             : "+a" (ax), "+b" (bx)
-                             : : "ecx", "edx", "esi", "edi");
+                ireg.al = 0x04;
+                intcall(0x15, &ireg, NULL);
                 return -1;
         }
 
-        boot_params.apm_bios_info.version = ax;
-        boot_params.apm_bios_info.flags = cx;
+        boot_params.apm_bios_info.version = oreg.ax;
+        boot_params.apm_bios_info.flags   = oreg.cx;
         return 0;
 }
 
diff --git a/arch/x86/boot/bioscall.S b/arch/x86/boot/bioscall.S
new file mode 100644
index 000000000000..507793739ea5
--- /dev/null
+++ b/arch/x86/boot/bioscall.S
@@ -0,0 +1,82 @@
+/* -----------------------------------------------------------------------
+ *
+ *   Copyright 2009 Intel Corporation; author H. Peter Anvin
+ *
+ *   This file is part of the Linux kernel, and is made available under
+ *   the terms of the GNU General Public License version 2 or (at your
+ *   option) any later version; incorporated herein by reference.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * "Glove box" for BIOS calls.  Avoids the constant problems with BIOSes
+ * touching registers they shouldn't be.
+ */
+
+        .code16
+        .text
+        .globl  intcall
+        .type   intcall, @function
+intcall:
+        /* Self-modify the INT instruction.  Ugly, but works. */
+        cmpb    %al, 3f
+        je      1f
+        movb    %al, 3f
+        jmp     1f              /* Synchronize pipeline */
+1:
+        /* Save state */
+        pushfl
+        pushw   %fs
+        pushw   %gs
+        pushal
+
+        /* Copy input state to stack frame */
+        subw    $44, %sp
+        movw    %dx, %si
+        movw    %sp, %di
+        movw    $11, %cx
+        rep; movsd
+
+        /* Pop full state from the stack */
+        popal
+        popw    %gs
+        popw    %fs
+        popw    %es
+        popw    %ds
+        popfl
+
+        /* Actual INT */
+        .byte   0xcd            /* INT opcode */
+3:      .byte   0
+
+        /* Push full state to the stack */
+        pushfl
+        pushw   %ds
+        pushw   %es
+        pushw   %fs
+        pushw   %gs
+        pushal
+
+        /* Re-establish C environment invariants */
+        cld
+        movzwl  %sp, %esp
+        movw    %cs, %ax
+        movw    %ax, %ds
+        movw    %ax, %es
+
+        /* Copy output state from stack frame */
+        movw    68(%esp), %di   /* Original %cx == 3rd argument */
+        andw    %di, %di
+        jz      4f
+        movw    %sp, %si
+        movw    $11, %cx
+        rep; movsd
+4:      addw    $44, %sp
+
+        /* Restore state and return */
+        popal
+        popw    %gs
+        popw    %fs
+        popfl
+        retl
+        .size   intcall, .-intcall
diff --git a/arch/x86/boot/boot.h b/arch/x86/boot/boot.h
index 7b2692e897e5..98239d2658f2 100644
--- a/arch/x86/boot/boot.h
+++ b/arch/x86/boot/boot.h
@@ -2,6 +2,7 @@
  *
  *   Copyright (C) 1991, 1992 Linus Torvalds
  *   Copyright 2007 rPath, Inc. - All Rights Reserved
+ *   Copyright 2009 Intel Corporation; author H. Peter Anvin
  *
  *   This file is part of the Linux kernel, and is made available under
  *   the terms of the GNU General Public License version 2.
@@ -26,6 +27,7 @@
 #include <asm/setup.h>
 #include "bitops.h"
 #include <asm/cpufeature.h>
+#include <asm/processor-flags.h>
 
 /* Useful macros */
 #define BUILD_BUG_ON(condition) ((void)sizeof(char[1 - 2*!!(condition)]))
@@ -241,6 +243,49 @@ int enable_a20(void);
 /* apm.c */
 int query_apm_bios(void);
 
+/* bioscall.c */
+struct biosregs {
+        union {
+                struct {
+                        u32 edi;
+                        u32 esi;
+                        u32 ebp;
+                        u32 _esp;
+                        u32 ebx;
+                        u32 edx;
+                        u32 ecx;
+                        u32 eax;
+                        u32 _fsgs;
+                        u32 _dses;
+                        u32 eflags;
+                };
+                struct {
+                        u16 di, hdi;
+                        u16 si, hsi;
+                        u16 bp, hbp;
+                        u16 _sp, _hsp;
+                        u16 bx, hbx;
+                        u16 dx, hdx;
+                        u16 cx, hcx;
+                        u16 ax, hax;
+                        u16 gs, fs;
+                        u16 es, ds;
+                        u16 flags, hflags;
+                };
+                struct {
+                        u8 dil, dih, edi2, edi3;
+                        u8 sil, sih, esi2, esi3;
+                        u8 bpl, bph, ebp2, ebp3;
+                        u8 _spl, _sph, _esp2, _esp3;
+                        u8 bl, bh, ebx2, ebx3;
+                        u8 dl, dh, edx2, edx3;
+                        u8 cl, ch, ecx2, ecx3;
+                        u8 al, ah, eax2, eax3;
+                };
+        };
+};
+void intcall(u8 int_no, const struct biosregs *ireg, struct biosregs *oreg);
+
 /* cmdline.c */
 int cmdline_find_option(const char *option, char *buffer, int bufsize);
 int cmdline_find_option_bool(const char *option);
@@ -279,6 +324,9 @@ int sprintf(char *buf, const char *fmt, ...);
 int vsprintf(char *buf, const char *fmt, va_list args);
 int printf(const char *fmt, ...);
 
+/* regs.c */
+void initregs(struct biosregs *regs);
+
 /* string.c */
 int strcmp(const char *str1, const char *str2);
 size_t strnlen(const char *s, size_t maxlen);
diff --git a/arch/x86/boot/compressed/.gitignore b/arch/x86/boot/compressed/.gitignore
index 63eff3b04d01..4a46fab7162e 100644
--- a/arch/x86/boot/compressed/.gitignore
+++ b/arch/x86/boot/compressed/.gitignore
@@ -1,3 +1,6 @@
 relocs
 vmlinux.bin.all
 vmlinux.relocs
+vmlinux.lds
+mkpiggy
+piggy.S
diff --git a/arch/x86/boot/compressed/Makefile b/arch/x86/boot/compressed/Makefile
index 65551c9f8571..49c8a4c37d7c 100644
--- a/arch/x86/boot/compressed/Makefile
+++ b/arch/x86/boot/compressed/Makefile
@@ -19,7 +19,9 @@ KBUILD_AFLAGS  := $(KBUILD_CFLAGS) -D__ASSEMBLY__
 LDFLAGS := -m elf_$(UTS_MACHINE)
 LDFLAGS_vmlinux := -T
 
-$(obj)/vmlinux: $(src)/vmlinux_$(BITS).lds $(obj)/head_$(BITS).o $(obj)/misc.o $(obj)/piggy.o FORCE
+hostprogs-y     := mkpiggy
+
+$(obj)/vmlinux: $(obj)/vmlinux.lds $(obj)/head_$(BITS).o $(obj)/misc.o $(obj)/piggy.o FORCE
         $(call if_changed,ld)
         @:
 
@@ -29,7 +31,7 @@ $(obj)/vmlinux.bin: vmlinux FORCE
 
 
 targets += vmlinux.bin.all vmlinux.relocs relocs
-hostprogs-$(CONFIG_X86_32) += relocs
+hostprogs-$(CONFIG_X86_NEED_RELOCS) += relocs
 
 quiet_cmd_relocs = RELOCS  $@
       cmd_relocs = $(obj)/relocs $< > $@;$(obj)/relocs --abs-relocs $<
@@ -37,46 +39,22 @@ $(obj)/vmlinux.relocs: vmlinux $(obj)/relocs FORCE
         $(call if_changed,relocs)
 
 vmlinux.bin.all-y := $(obj)/vmlinux.bin
-vmlinux.bin.all-$(CONFIG_RELOCATABLE) += $(obj)/vmlinux.relocs
-quiet_cmd_relocbin = BUILD   $@
-      cmd_relocbin = cat $(filter-out FORCE,$^) > $@
-$(obj)/vmlinux.bin.all: $(vmlinux.bin.all-y) FORCE
-        $(call if_changed,relocbin)
-
-ifeq ($(CONFIG_X86_32),y)
+vmlinux.bin.all-$(CONFIG_X86_NEED_RELOCS) += $(obj)/vmlinux.relocs
 
-ifdef CONFIG_RELOCATABLE
-$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin.all FORCE
-        $(call if_changed,gzip)
-$(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin.all FORCE
-        $(call if_changed,bzip2)
-$(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin.all FORCE
-        $(call if_changed,lzma)
-else
-$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
+$(obj)/vmlinux.bin.gz: $(vmlinux.bin.all-y) FORCE
         $(call if_changed,gzip)
-$(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin FORCE
+$(obj)/vmlinux.bin.bz2: $(vmlinux.bin.all-y) FORCE
         $(call if_changed,bzip2)
-$(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE
+$(obj)/vmlinux.bin.lzma: $(vmlinux.bin.all-y) FORCE
         $(call if_changed,lzma)
-endif
-LDFLAGS_piggy.o := -r --format binary --oformat elf32-i386 -T
 
-else
+suffix-$(CONFIG_KERNEL_GZIP)    := gz
+suffix-$(CONFIG_KERNEL_BZIP2)   := bz2
+suffix-$(CONFIG_KERNEL_LZMA)    := lzma
 
-$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
-        $(call if_changed,gzip)
-$(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin FORCE
-        $(call if_changed,bzip2)
-$(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE
-        $(call if_changed,lzma)
-
-LDFLAGS_piggy.o := -r --format binary --oformat elf64-x86-64 -T
-endif
+quiet_cmd_mkpiggy = MKPIGGY $@
+      cmd_mkpiggy = $(obj)/mkpiggy $< > $@ || ( rm -f $@ ; false )
 
-suffix_$(CONFIG_KERNEL_GZIP)  = gz
-suffix_$(CONFIG_KERNEL_BZIP2) = bz2
-suffix_$(CONFIG_KERNEL_LZMA)  = lzma
-
-$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.$(suffix_y) FORCE
-        $(call if_changed,ld)
+targets += piggy.S
+$(obj)/piggy.S: $(obj)/vmlinux.bin.$(suffix-y) $(obj)/mkpiggy FORCE
+        $(call if_changed,mkpiggy)
diff --git a/arch/x86/boot/compressed/head_32.S b/arch/x86/boot/compressed/head_32.S
index 3a8a866fb2e2..75e4f001e706 100644
--- a/arch/x86/boot/compressed/head_32.S
+++ b/arch/x86/boot/compressed/head_32.S
@@ -12,16 +12,16 @@
  * the page directory. [According to comments etc elsewhere on a compressed
  * kernel it will end up at 0x1000 + 1Mb I hope so as I assume this. - AC]
  *
- * Page 0 is deliberately kept safe, since System Management Mode code in 
+ * Page 0 is deliberately kept safe, since System Management Mode code in
  * laptops may need to access the BIOS data stored there.  This is also
- * useful for future device drivers that either access the BIOS via VM86 
+ * useful for future device drivers that either access the BIOS via VM86
  * mode.
  */
 
 /*
  * High loaded stuff by Hans Lermen & Werner Almesberger, Feb. 1996
  */
-.text
+        .text
 
 #include <linux/linkage.h>
 #include <asm/segment.h>
@@ -29,161 +29,151 @@
 #include <asm/boot.h>
 #include <asm/asm-offsets.h>
 
-.section ".text.head","ax",@progbits
+        .section ".text.head","ax",@progbits
 ENTRY(startup_32)
         cld
-        /* test KEEP_SEGMENTS flag to see if the bootloader is asking
-         * us to not reload segments */
-        testb $(1<<6), BP_loadflags(%esi)
-        jnz 1f
+        /*
+         * Test KEEP_SEGMENTS flag to see if the bootloader is asking
+         * us to not reload segments
+         */
+        testb   $(1<<6), BP_loadflags(%esi)
+        jnz     1f
 
         cli
-        movl $(__BOOT_DS),%eax
-        movl %eax,%ds
-        movl %eax,%es
-        movl %eax,%fs
-        movl %eax,%gs
-        movl %eax,%ss
+        movl    $__BOOT_DS, %eax
+        movl    %eax, %ds
+        movl    %eax, %es
+        movl    %eax, %fs
+        movl    %eax, %gs
+        movl    %eax, %ss
 1:
 
-/* Calculate the delta between where we were compiled to run
+/*
+ * Calculate the delta between where we were compiled to run
  * at and where we were actually loaded at.  This can only be done
  * with a short local call on x86.  Nothing  else will tell us what
  * address we are running at.  The reserved chunk of the real-mode
  * data at 0x1e4 (defined as a scratch field) are used as the stack
  * for this calculation. Only 4 bytes are needed.
  */
-        leal (0x1e4+4)(%esi), %esp
-        call 1f
-1:      popl %ebp
-        subl $1b, %ebp
+        leal    (BP_scratch+4)(%esi), %esp
+        call    1f
+1:      popl    %ebp
+        subl    $1b, %ebp
 
-/* %ebp contains the address we are loaded at by the boot loader and %ebx
+/*
+ * %ebp contains the address we are loaded at by the boot loader and %ebx
  * contains the address where we should move the kernel image temporarily
  * for safe in-place decompression.
  */
 
 #ifdef CONFIG_RELOCATABLE
-        movl    %ebp, %ebx
-        addl    $(CONFIG_PHYSICAL_ALIGN - 1), %ebx
-        andl    $(~(CONFIG_PHYSICAL_ALIGN - 1)), %ebx
+        movl    %ebp, %ebx
+        movl    BP_kernel_alignment(%esi), %eax
+        decl    %eax
+        addl    %eax, %ebx
+        notl    %eax
+        andl    %eax, %ebx
 #else
-        movl $LOAD_PHYSICAL_ADDR, %ebx
+        movl    $LOAD_PHYSICAL_ADDR, %ebx
 #endif
 
-        /* Replace the compressed data size with the uncompressed size */
-        subl input_len(%ebp), %ebx
-        movl output_len(%ebp), %eax
-        addl %eax, %ebx
-        /* Add 8 bytes for every 32K input block */
-        shrl $12, %eax
-        addl %eax, %ebx
-        /* Add 32K + 18 bytes of extra slack */
-        addl $(32768 + 18), %ebx
-        /* Align on a 4K boundary */
-        addl $4095, %ebx
-        andl $~4095, %ebx
-
-/* Copy the compressed kernel to the end of our buffer
+        /* Target address to relocate to for decompression */
+        addl    $z_extract_offset, %ebx
+
+        /* Set up the stack */
+        leal    boot_stack_end(%ebx), %esp
+
+        /* Zero EFLAGS */
+        pushl   $0
+        popfl
+
+/*
+ * Copy the compressed kernel to the end of our buffer
  * where decompression in place becomes safe.
  */
-        pushl %esi
-        leal _end(%ebp), %esi
-        leal _end(%ebx), %edi
-        movl $(_end - startup_32), %ecx
+        pushl   %esi
+        leal    (_bss-4)(%ebp), %esi
+        leal    (_bss-4)(%ebx), %edi
+        movl    $(_bss - startup_32), %ecx
+        shrl    $2, %ecx
         std
-        rep
-        movsb
+        rep     movsl
         cld
-        popl %esi
-
-/* Compute the kernel start address.
- */
-#ifdef CONFIG_RELOCATABLE
-        addl    $(CONFIG_PHYSICAL_ALIGN - 1), %ebp
-        andl    $(~(CONFIG_PHYSICAL_ALIGN - 1)), %ebp
-#else
-        movl    $LOAD_PHYSICAL_ADDR, %ebp
-#endif
+        popl    %esi
 
 /*
  * Jump to the relocated address.
  */
-        leal relocated(%ebx), %eax
-        jmp *%eax
+        leal    relocated(%ebx), %eax
+        jmp     *%eax
 ENDPROC(startup_32)
 
-.section ".text"
+        .text
 relocated:
 
 /*
- * Clear BSS
- */
-        xorl %eax,%eax
-        leal _edata(%ebx),%edi
-        leal _end(%ebx), %ecx
-        subl %edi,%ecx
-        cld
-        rep
-        stosb
-
-/*
- * Setup the stack for the decompressor
+ * Clear BSS (stack is currently empty)
  */
-        leal boot_stack_end(%ebx), %esp
+        xorl    %eax, %eax
+        leal    _bss(%ebx), %edi
+        leal    _ebss(%ebx), %ecx
+        subl    %edi, %ecx
+        shrl    $2, %ecx
+        rep     stosl
 
 /*
  * Do the decompression, and jump to the new kernel..
  */
-        movl output_len(%ebx), %eax
-        pushl %eax
-                        # push arguments for decompress_kernel:
-        pushl %ebp      # output address
-        movl input_len(%ebx), %eax
-        pushl %eax      # input_len
-        leal input_data(%ebx), %eax
-        pushl %eax      # input_data
-        leal boot_heap(%ebx), %eax
-        pushl %eax      # heap area
-        pushl %esi      # real mode pointer
-        call decompress_kernel
-        addl $20, %esp
-        popl %ecx
+        leal    z_extract_offset_negative(%ebx), %ebp
+                                /* push arguments for decompress_kernel: */
+        pushl   %ebp            /* output address */
+        pushl   $z_input_len    /* input_len */
+        leal    input_data(%ebx), %eax
+        pushl   %eax            /* input_data */
+        leal    boot_heap(%ebx), %eax
+        pushl   %eax            /* heap area */
+        pushl   %esi            /* real mode pointer */
+        call    decompress_kernel
+        addl    $20, %esp
 
 #if CONFIG_RELOCATABLE
-/* Find the address of the relocations.
+/*
+ * Find the address of the relocations.
  */
-        movl %ebp, %edi
-        addl %ecx, %edi
+        leal    z_output_len(%ebp), %edi
 
-/* Calculate the delta between where vmlinux was compiled to run
+/*
+ * Calculate the delta between where vmlinux was compiled to run
  * and where it was actually loaded.
  */
-        movl %ebp, %ebx
-        subl $LOAD_PHYSICAL_ADDR, %ebx
-        jz   2f         /* Nothing to be done if loaded at compiled addr. */
+        movl    %ebp, %ebx
+        subl    $LOAD_PHYSICAL_ADDR, %ebx
+        jz      2f      /* Nothing to be done if loaded at compiled addr. */
 /*
  * Process relocations.
  */
 
-1:      subl $4, %edi
-        movl 0(%edi), %ecx
-        testl %ecx, %ecx
-        jz 2f
-        addl %ebx, -__PAGE_OFFSET(%ebx, %ecx)
-        jmp 1b
+1:      subl    $4, %edi
+        movl    (%edi), %ecx
+        testl   %ecx, %ecx
+        jz      2f
+        addl    %ebx, -__PAGE_OFFSET(%ebx, %ecx)
+        jmp     1b
 2:
 #endif
 
 /*
  * Jump to the decompressed kernel.
  */
-        xorl %ebx,%ebx
-        jmp *%ebp
+        xorl    %ebx, %ebx
+        jmp     *%ebp
 
-.bss
-/* Stack and heap for uncompression */
-.balign 4
+/*
+ * Stack and heap for uncompression
+ */
+        .bss
+        .balign 4
 boot_heap:
         .fill BOOT_HEAP_SIZE, 1, 0
 boot_stack:
diff --git a/arch/x86/boot/compressed/head_64.S b/arch/x86/boot/compressed/head_64.S
index ed4a82948002..f62c284db9eb 100644
--- a/arch/x86/boot/compressed/head_64.S
+++ b/arch/x86/boot/compressed/head_64.S
@@ -21,8 +21,8 @@
 /*
  * High loaded stuff by Hans Lermen & Werner Almesberger, Feb. 1996
  */
-.code32
-.text
+        .code32
+        .text
 
 #include <linux/linkage.h>
 #include <asm/segment.h>
@@ -33,12 +33,14 @@
 #include <asm/processor-flags.h>
 #include <asm/asm-offsets.h>
 
-.section ".text.head"
+        .section ".text.head"
         .code32
 ENTRY(startup_32)
         cld
-        /* test KEEP_SEGMENTS flag to see if the bootloader is asking
-         * us to not reload segments */
+        /*
+         * Test KEEP_SEGMENTS flag to see if the bootloader is asking
+         * us to not reload segments
+         */
         testb $(1<<6), BP_loadflags(%esi)
         jnz 1f
 
@@ -49,14 +51,15 @@ ENTRY(startup_32)
         movl    %eax, %ss
 1:
 
-/* Calculate the delta between where we were compiled to run
+/*
+ * Calculate the delta between where we were compiled to run
  * at and where we were actually loaded at.  This can only be done
  * with a short local call on x86.  Nothing  else will tell us what
  * address we are running at.  The reserved chunk of the real-mode
  * data at 0x1e4 (defined as a scratch field) are used as the stack
  * for this calculation. Only 4 bytes are needed.
  */
-        leal    (0x1e4+4)(%esi), %esp
+        leal    (BP_scratch+4)(%esi), %esp
         call    1f
 1:      popl    %ebp
         subl    $1b, %ebp
@@ -70,32 +73,28 @@ ENTRY(startup_32)
         testl   %eax, %eax
         jnz     no_longmode
 
-/* Compute the delta between where we were compiled to run at
+/*
+ * Compute the delta between where we were compiled to run at
  * and where the code will actually run at.
- */
-/* %ebp contains the address we are loaded at by the boot loader and %ebx
+ *
+ * %ebp contains the address we are loaded at by the boot loader and %ebx
  * contains the address where we should move the kernel image temporarily
  * for safe in-place decompression.
  */
 
 #ifdef CONFIG_RELOCATABLE
         movl    %ebp, %ebx
-        addl    $(PMD_PAGE_SIZE -1), %ebx
-        andl    $PMD_PAGE_MASK, %ebx
+        movl    BP_kernel_alignment(%esi), %eax
+        decl    %eax
+        addl    %eax, %ebx
+        notl    %eax
+        andl    %eax, %ebx
 #else
-        movl    $CONFIG_PHYSICAL_START, %ebx
+        movl    $LOAD_PHYSICAL_ADDR, %ebx
 #endif
 
-        /* Replace the compressed data size with the uncompressed size */
-        subl    input_len(%ebp), %ebx
-        movl    output_len(%ebp), %eax
-        addl    %eax, %ebx
-        /* Add 8 bytes for every 32K input block */
-        shrl    $12, %eax
-        addl    %eax, %ebx
-        /* Add 32K + 18 bytes of extra slack and align on a 4K boundary */
-        addl    $(32768 + 18 + 4095), %ebx
-        andl    $~4095, %ebx
+        /* Target address to relocate to for decompression */
+        addl    $z_extract_offset, %ebx
 
 /*
  * Prepare for entering 64 bit mode
@@ -114,7 +113,7 @@ ENTRY(startup_32)
  /*
   * Build early 4G boot pagetable
   */
-        /* Initialize Page tables to 0*/
+        /* Initialize Page tables to 0 */
         leal    pgtable(%ebx), %edi
         xorl    %eax, %eax
         movl    $((4096*6)/4), %ecx
@@ -155,7 +154,8 @@ ENTRY(startup_32)
         btsl    $_EFER_LME, %eax
         wrmsr
 
-        /* Setup for the jump to 64bit mode
+        /*
+         * Setup for the jump to 64bit mode
          *
          * When the jump is performend we will be in long mode but
          * in 32bit compatibility mode with EFER.LME = 1, CS.L = 0, CS.D = 1
@@ -184,7 +184,8 @@ no_longmode:
 
 #include "../../kernel/verify_cpu_64.S"
 
-        /* Be careful here startup_64 needs to be at a predictable
+        /*
+         * Be careful here startup_64 needs to be at a predictable
          * address so I can export it in an ELF header.  Bootloaders
          * should look at the ELF header to find this address, as
          * it may change in the future.
@@ -192,7 +193,8 @@ no_longmode:
         .code64
         .org 0x200
 ENTRY(startup_64)
-        /* We come here either from startup_32 or directly from a
+        /*
+         * We come here either from startup_32 or directly from a
          * 64bit bootloader.  If we come here from a bootloader we depend on
          * an identity mapped page table being provied that maps our
          * entire text+data+bss and hopefully all of memory.
@@ -209,50 +211,54 @@ ENTRY(startup_64)
         movl    $0x20, %eax
         ltr     %ax
 
-        /* Compute the decompressed kernel start address.  It is where
+        /*
+         * Compute the decompressed kernel start address.  It is where
          * we were loaded at aligned to a 2M boundary. %rbp contains the
          * decompressed kernel start address.
          *
          * If it is a relocatable kernel then decompress and run the kernel
          * from load address aligned to 2MB addr, otherwise decompress and
-         * run the kernel from CONFIG_PHYSICAL_START
+         * run the kernel from LOAD_PHYSICAL_ADDR
+         *
+         * We cannot rely on the calculation done in 32-bit mode, since we
+         * may have been invoked via the 64-bit entry point.
          */
 
         /* Start with the delta to where the kernel will run at. */
 #ifdef CONFIG_RELOCATABLE
         leaq    startup_32(%rip) /* - $startup_32 */, %rbp
-        addq    $(PMD_PAGE_SIZE - 1), %rbp
-        andq    $PMD_PAGE_MASK, %rbp
-        movq    %rbp, %rbx
+        movl    BP_kernel_alignment(%rsi), %eax
+        decl    %eax
+        addq    %rax, %rbp
+        notq    %rax
+        andq    %rax, %rbp
 #else
-        movq    $CONFIG_PHYSICAL_START, %rbp
-        movq    %rbp, %rbx
+        movq    $LOAD_PHYSICAL_ADDR, %rbp
 #endif
 
-        /* Replace the compressed data size with the uncompressed size */
-        movl    input_len(%rip), %eax
-        subq    %rax, %rbx
-        movl    output_len(%rip), %eax
-        addq    %rax, %rbx
-        /* Add 8 bytes for every 32K input block */
-        shrq    $12, %rax
-        addq    %rax, %rbx
-        /* Add 32K + 18 bytes of extra slack and align on a 4K boundary */
-        addq    $(32768 + 18 + 4095), %rbx
-        andq    $~4095, %rbx
-
-/* Copy the compressed kernel to the end of our buffer
+        /* Target address to relocate to for decompression */
+        leaq    z_extract_offset(%rbp), %rbx
+
+        /* Set up the stack */
+        leaq    boot_stack_end(%rbx), %rsp
+
+        /* Zero EFLAGS */
+        pushq   $0
+        popfq
+
+/*
+ * Copy the compressed kernel to the end of our buffer
  * where decompression in place becomes safe.
  */
-        leaq    _end_before_pgt(%rip), %r8
-        leaq    _end_before_pgt(%rbx), %r9
-        movq    $_end_before_pgt /* - $startup_32 */, %rcx
-1:      subq    $8, %r8
-        subq    $8, %r9
-        movq    0(%r8), %rax
-        movq    %rax, 0(%r9)
-        subq    $8, %rcx
-        jnz     1b
+        pushq   %rsi
+        leaq    (_bss-8)(%rip), %rsi
+        leaq    (_bss-8)(%rbx), %rdi
+        movq    $_bss /* - $startup_32 */, %rcx
+        shrq    $3, %rcx
+        std
+        rep     movsq
+        cld
+        popq    %rsi
 
 /*
  * Jump to the relocated address.
@@ -260,37 +266,28 @@ ENTRY(startup_64)
         leaq    relocated(%rbx), %rax
         jmp     *%rax
 
-.section ".text"
+        .text
 relocated:
 
 /*
- * Clear BSS
+ * Clear BSS (stack is currently empty)
  */
-        xorq    %rax, %rax
-        leaq    _edata(%rbx), %rdi
-        leaq    _end_before_pgt(%rbx), %rcx
+        xorl    %eax, %eax
+        leaq    _bss(%rip), %rdi
+        leaq    _ebss(%rip), %rcx
         subq    %rdi, %rcx
-        cld
-        rep
-        stosb
-
-        /* Setup the stack */
-        leaq    boot_stack_end(%rip), %rsp
-
-        /* zero EFLAGS after setting rsp */
-        pushq   $0
-        popfq
+        shrq    $3, %rcx
+        rep     stosq
 
 /*
  * Do the decompression, and jump to the new kernel..
  */
-        pushq   %rsi                    # Save the real mode argument
-        movq    %rsi, %rdi              # real mode address
-        leaq    boot_heap(%rip), %rsi   # malloc area for uncompression
-        leaq    input_data(%rip), %rdx  # input_data
-        movl    input_len(%rip), %eax
-        movq    %rax, %rcx              # input_len
-        movq    %rbp, %r8               # output
+        pushq   %rsi                    /* Save the real mode argument */
+        movq    %rsi, %rdi              /* real mode address */
+        leaq    boot_heap(%rip), %rsi   /* malloc area for uncompression */
+        leaq    input_data(%rip), %rdx  /* input_data */
+        movl    $z_input_len, %ecx      /* input_len */
+        movq    %rbp, %r8               /* output target address */
         call    decompress_kernel
         popq    %rsi
 
@@ -311,11 +308,21 @@ gdt:
         .quad   0x0000000000000000      /* TS continued */
 gdt_end:
 
-.bss
-/* Stack and heap for uncompression */
-.balign 4
+/*
+ * Stack and heap for uncompression
+ */
+        .bss
+        .balign 4
 boot_heap:
         .fill BOOT_HEAP_SIZE, 1, 0
 boot_stack:
         .fill BOOT_STACK_SIZE, 1, 0
 boot_stack_end:
+
+/*
+ * Space for page tables (not in .bss so not zeroed)
+ */
+        .section ".pgtable","a",@nobits
+        .balign 4096
+pgtable:
+        .fill 6*4096, 1, 0
diff --git a/arch/x86/boot/compressed/misc.c b/arch/x86/boot/compressed/misc.c
index e45be73684ff..842b2a36174a 100644
--- a/arch/x86/boot/compressed/misc.c
+++ b/arch/x86/boot/compressed/misc.c
@@ -325,21 +325,19 @@ asmlinkage void decompress_kernel(void *rmode, memptr heap,
         free_mem_ptr     = heap;        /* Heap */
         free_mem_end_ptr = heap + BOOT_HEAP_SIZE;
 
+        if ((unsigned long)output & (MIN_KERNEL_ALIGN - 1))
+                error("Destination address inappropriately aligned");
 #ifdef CONFIG_X86_64
-        if ((unsigned long)output & (__KERNEL_ALIGN - 1))
-                error("Destination address not 2M aligned");
-        if ((unsigned long)output >= 0xffffffffffUL)
+        if (heap > 0x3fffffffffffUL)
                 error("Destination address too large");
 #else
-        if ((u32)output & (CONFIG_PHYSICAL_ALIGN - 1))
-                error("Destination address not CONFIG_PHYSICAL_ALIGN aligned");
         if (heap > ((-__PAGE_OFFSET-(512<<20)-1) & 0x7fffffff))
                 error("Destination address too large");
+#endif
 #ifndef CONFIG_RELOCATABLE
-        if ((u32)output != LOAD_PHYSICAL_ADDR)
+        if ((unsigned long)output != LOAD_PHYSICAL_ADDR)
                 error("Wrong destination address");
 #endif
-#endif
 
         if (!quiet)
                 putstr("\nDecompressing Linux... ");
diff --git a/arch/x86/boot/compressed/mkpiggy.c b/arch/x86/boot/compressed/mkpiggy.c
new file mode 100644
index 000000000000..bcbd36c41432
--- /dev/null
+++ b/arch/x86/boot/compressed/mkpiggy.c
@@ -0,0 +1,97 @@
+/* ----------------------------------------------------------------------- *
+ *
+ *  Copyright (C) 2009 Intel Corporation. All rights reserved.
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License version
+ *  2 as published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ *  02110-1301, USA.
+ *
+ *  H. Peter Anvin <hpa@linux.intel.com>
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * Compute the desired load offset from a compressed program; outputs
+ * a small assembly wrapper with the appropriate symbols defined.
+ */
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <inttypes.h>
+
+static uint32_t getle32(const void *p)
+{
+        const uint8_t *cp = p;
+
+        return (uint32_t)cp[0] + ((uint32_t)cp[1] << 8) +
+                ((uint32_t)cp[2] << 16) + ((uint32_t)cp[3] << 24);
+}
+
+int main(int argc, char *argv[])
+{
+        uint32_t olen;
+        long ilen;
+        unsigned long offs;
+        FILE *f;
+
+        if (argc < 2) {
+                fprintf(stderr, "Usage: %s compressed_file\n", argv[0]);
+                return 1;
+        }
+
+        /* Get the information for the compressed kernel image first */
+
+        f = fopen(argv[1], "r");
+        if (!f) {
+                perror(argv[1]);
+                return 1;
+        }
+
+
+        if (fseek(f, -4L, SEEK_END)) {
+                perror(argv[1]);
+        }
+        fread(&olen, sizeof olen, 1, f);
+        ilen = ftell(f);
+        olen = getle32(&olen);
+        fclose(f);
+
+        /*
+         * Now we have the input (compressed) and output (uncompressed)
+         * sizes, compute the necessary decompression offset...
+         */
+
+        offs = (olen > ilen) ? olen - ilen : 0;
+        offs += olen >> 12;     /* Add 8 bytes for each 32K block */
+        offs += 32*1024 + 18;   /* Add 32K + 18 bytes slack */
+        offs = (offs+4095) & ~4095; /* Round to a 4K boundary */
+
+        printf(".section \".rodata.compressed\",\"a\",@progbits\n");
+        printf(".globl z_input_len\n");
+        printf("z_input_len = %lu\n", ilen);
+        printf(".globl z_output_len\n");
+        printf("z_output_len = %lu\n", (unsigned long)olen);
+        printf(".globl z_extract_offset\n");
+        printf("z_extract_offset = 0x%lx\n", offs);
+        /* z_extract_offset_negative allows simplification of head_32.S */
+        printf(".globl z_extract_offset_negative\n");
+        printf("z_extract_offset_negative = -0x%lx\n", offs);
+
+        printf(".globl input_data, input_data_end\n");
+        printf("input_data:\n");
+        printf(".incbin \"%s\"\n", argv[1]);
+        printf("input_data_end:\n");
+
+        return 0;
+}
diff --git a/arch/x86/boot/compressed/vmlinux_64.lds b/arch/x86/boot/compressed/vmlinux.lds.S
index bef1ac891bce..cc353e1b3ffd 100644
--- a/arch/x86/boot/compressed/vmlinux_64.lds
+++ b/arch/x86/boot/compressed/vmlinux.lds.S
@@ -1,6 +1,17 @@
-OUTPUT_FORMAT("elf64-x86-64", "elf64-x86-64", "elf64-x86-64")
+OUTPUT_FORMAT(CONFIG_OUTPUT_FORMAT, CONFIG_OUTPUT_FORMAT, CONFIG_OUTPUT_FORMAT)
+
+#undef i386
+
+#include <asm/page_types.h>
+
+#ifdef CONFIG_X86_64
 OUTPUT_ARCH(i386:x86-64)
 ENTRY(startup_64)
+#else
+OUTPUT_ARCH(i386)
+ENTRY(startup_32)
+#endif
+
 SECTIONS
 {
         /* Be careful parts of head_64.S assume startup_32 is at
@@ -33,16 +44,22 @@ SECTIONS
                 *(.data.*)
                 _edata = . ;
         }
+        . = ALIGN(CONFIG_X86_L1_CACHE_BYTES);
         .bss : {
                 _bss = . ;
                 *(.bss)
                 *(.bss.*)
                 *(COMMON)
-                . = ALIGN(8);
-                _end_before_pgt = . ;
-                . = ALIGN(4096);
-                pgtable = . ;
-                . = . + 4096 * 6;
+                . = ALIGN(8);   /* For convenience during zeroing */
                 _ebss = .;
         }
+#ifdef CONFIG_X86_64
+       . = ALIGN(PAGE_SIZE);
+       .pgtable : {
+                _pgtable = . ;
+                *(.pgtable)
+                _epgtable = . ;
+        }
+#endif
+        _end = .;
 }
diff --git a/arch/x86/boot/compressed/vmlinux.scr b/arch/x86/boot/compressed/vmlinux.scr
deleted file mode 100644
index f02382ae5c48..000000000000
--- a/arch/x86/boot/compressed/vmlinux.scr
+++ /dev/null
@@ -1,10 +0,0 @@
-SECTIONS
-{
-  .rodata.compressed : {
-        input_len = .;
-        LONG(input_data_end - input_data) input_data = .;
-        *(.data)
-        output_len = . - 4;
-        input_data_end = .;
-        }
-}
diff --git a/arch/x86/boot/compressed/vmlinux_32.lds b/arch/x86/boot/compressed/vmlinux_32.lds
deleted file mode 100644
index bb3c48379c40..000000000000
--- a/arch/x86/boot/compressed/vmlinux_32.lds
+++ /dev/null
@@ -1,43 +0,0 @@
-OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
-OUTPUT_ARCH(i386)
-ENTRY(startup_32)
-SECTIONS
-{
-        /* Be careful parts of head_32.S assume startup_32 is at
-         * address 0.
-         */
-        . = 0;
-        .text.head : {
-                _head = . ;
-                *(.text.head)
-                _ehead = . ;
-        }
-        .rodata.compressed : {
-                *(.rodata.compressed)
-        }
-        .text : {
-                _text = .;      /* Text */
-                *(.text)
-                *(.text.*)
-                _etext = . ;
-        }
-        .rodata : {
-                _rodata = . ;
-                *(.rodata)       /* read-only data */
-                *(.rodata.*)
-                _erodata = . ;
-        }
-        .data : {
-                _data = . ;
-                *(.data)
-                *(.data.*)
-                _edata = . ;
-        }
-        .bss : {
-                _bss = . ;
-                *(.bss)
-                *(.bss.*)
-                *(COMMON)
-                _end = . ;
-        }
-}
diff --git a/arch/x86/boot/edd.c b/arch/x86/boot/edd.c
index 1aae8f3e5ca1..c501a5b466f8 100644
--- a/arch/x86/boot/edd.c
+++ b/arch/x86/boot/edd.c
@@ -2,6 +2,7 @@
  *
  *   Copyright (C) 1991, 1992 Linus Torvalds
  *   Copyright 2007 rPath, Inc. - All Rights Reserved
+ *   Copyright 2009 Intel Corporation; author H. Peter Anvin
  *
  *   This file is part of the Linux kernel, and is made available under
  *   the terms of the GNU General Public License version 2.
@@ -22,17 +23,17 @@
  */
 static int read_mbr(u8 devno, void *buf)
 {
-        u16 ax, bx, cx, dx;
+        struct biosregs ireg, oreg;
 
-        ax = 0x0201;            /* Legacy Read, one sector */
-        cx = 0x0001;            /* Sector 0-0-1 */
-        dx = devno;
-        bx = (size_t)buf;
-        asm volatile("pushfl; stc; int $0x13; setc %%al; popfl"
-                     : "+a" (ax), "+c" (cx), "+d" (dx), "+b" (bx)
-                     : : "esi", "edi", "memory");
+        initregs(&ireg);
+        ireg.ax = 0x0201;               /* Legacy Read, one sector */
+        ireg.cx = 0x0001;               /* Sector 0-0-1 */
+        ireg.dl = devno;
+        ireg.bx = (size_t)buf;
 
-        return -(u8)ax;         /* 0 or -1 */
+        intcall(0x13, &ireg, &oreg);
+
+        return -(oreg.eflags & X86_EFLAGS_CF); /* 0 or -1 */
 }
 
 static u32 read_mbr_sig(u8 devno, struct edd_info *ei, u32 *mbrsig)
@@ -72,56 +73,46 @@ static u32 read_mbr_sig(u8 devno, struct edd_info *ei, u32 *mbrsig)
 
 static int get_edd_info(u8 devno, struct edd_info *ei)
 {
-        u16 ax, bx, cx, dx, di;
+        struct biosregs ireg, oreg;
 
         memset(ei, 0, sizeof *ei);
 
         /* Check Extensions Present */
 
-        ax = 0x4100;
-        bx = EDDMAGIC1;
-        dx = devno;
-        asm("pushfl; stc; int $0x13; setc %%al; popfl"
-            : "+a" (ax), "+b" (bx), "=c" (cx), "+d" (dx)
-            : : "esi", "edi");
+        initregs(&ireg);
+        ireg.ah = 0x41;
+        ireg.bx = EDDMAGIC1;
+        ireg.dl = devno;
+        intcall(0x13, &ireg, &oreg);
 
-        if ((u8)ax)
+        if (oreg.eflags & X86_EFLAGS_CF)
                 return -1;      /* No extended information */
 
-        if (bx != EDDMAGIC2)
+        if (oreg.bx != EDDMAGIC2)
                 return -1;
 
         ei->device  = devno;
-        ei->version = ax >> 8;  /* EDD version number */
-        ei->interface_support = cx; /* EDD functionality subsets */
+        ei->version = oreg.ah;           /* EDD version number */
+        ei->interface_support = oreg.cx; /* EDD functionality subsets */
 
         /* Extended Get Device Parameters */
 
         ei->params.length = sizeof(ei->params);
-        ax = 0x4800;
-        dx = devno;
-        asm("pushfl; int $0x13; popfl"
-            : "+a" (ax), "+d" (dx), "=m" (ei->params)
-            : "S" (&ei->params)
-            : "ebx", "ecx", "edi");
+        ireg.ah = 0x48;
+        ireg.si = (size_t)&ei->params;
+        intcall(0x13, &ireg, &oreg);
 
         /* Get legacy CHS parameters */
 
         /* Ralf Brown recommends setting ES:DI to 0:0 */
-        ax = 0x0800;
-        dx = devno;
-        di = 0;
-        asm("pushw %%es; "
-            "movw %%di,%%es; "
-            "pushfl; stc; int $0x13; setc %%al; popfl; "
-            "popw %%es"
-            : "+a" (ax), "=b" (bx), "=c" (cx), "+d" (dx), "+D" (di)
-            : : "esi");
-
-        if ((u8)ax == 0) {
-                ei->legacy_max_cylinder = (cx >> 8) + ((cx & 0xc0) << 2);
-                ei->legacy_max_head = dx >> 8;
-                ei->legacy_sectors_per_track = cx & 0x3f;
+        ireg.ah = 0x08;
+        ireg.es = 0;
+        intcall(0x13, &ireg, &oreg);
+
+        if (!(oreg.eflags & X86_EFLAGS_CF)) {
+                ei->legacy_max_cylinder = oreg.ch + ((oreg.cl & 0xc0) << 2);
+                ei->legacy_max_head = oreg.dh;
+                ei->legacy_sectors_per_track = oreg.cl & 0x3f;
         }
 
         return 0;
diff --git a/arch/x86/boot/header.S b/arch/x86/boot/header.S
index 5d84d1c74e4c..b31cc54b4641 100644
--- a/arch/x86/boot/header.S
+++ b/arch/x86/boot/header.S
@@ -22,7 +22,8 @@
 #include <asm/page_types.h>
 #include <asm/setup.h>
 #include "boot.h"
-#include "offsets.h"
+#include "voffset.h"
+#include "zoffset.h"
 
 BOOTSEG         = 0x07C0                /* original address of boot-sector */
 SYSSEG          = 0x1000                /* historical load address >> 4 */
@@ -115,7 +116,7 @@ _start:
         # Part 2 of the header, from the old setup.S
 
                 .ascii  "HdrS"          # header signature
-                .word   0x0209          # header version number (>= 0x0105)
+                .word   0x020a          # header version number (>= 0x0105)
                                         # or else old loadlin-1.5 will fail)
                 .globl realmode_swtch
 realmode_swtch: .word   0, 0            # default_switch, SETUPSEG
@@ -168,7 +169,11 @@ heap_end_ptr:	.word	_end+STACK_SIZE-512
                                         # end of setup code can be used by setup
                                         # for local heap purposes.
 
-pad1:           .word   0
+ext_loader_ver:
+                .byte   0               # Extended boot loader version
+ext_loader_type:
+                .byte   0               # Extended boot loader type
+
 cmd_line_ptr:   .long   0               # (Header version 0x0202 or later)
                                         # If nonzero, a 32-bit pointer
                                         # to the kernel command line.
@@ -200,7 +205,7 @@ relocatable_kernel:    .byte 1
 #else
 relocatable_kernel:    .byte 0
 #endif
-pad2:                   .byte 0
+min_alignment:          .byte MIN_KERNEL_ALIGN_LG2      # minimum alignment
 pad3:                   .word 0
 
 cmdline_size:   .long   COMMAND_LINE_SIZE-1     #length of the command line,
@@ -212,16 +217,27 @@ hardware_subarch:	.long 0			# subarchitecture, added with 2.07
 
 hardware_subarch_data:  .quad 0
 
-payload_offset:         .long input_data
-payload_length:         .long input_data_end-input_data
+payload_offset:         .long ZO_input_data
+payload_length:         .long ZO_z_input_len
 
 setup_data:             .quad 0                 # 64-bit physical pointer to
                                                 # single linked list of
                                                 # struct setup_data
 
+pref_address:           .quad LOAD_PHYSICAL_ADDR        # preferred load addr
+
+#define ZO_INIT_SIZE    (ZO__end - ZO_startup_32 + ZO_z_extract_offset)
+#define VO_INIT_SIZE    (VO__end - VO__text)
+#if ZO_INIT_SIZE > VO_INIT_SIZE
+#define INIT_SIZE ZO_INIT_SIZE
+#else
+#define INIT_SIZE VO_INIT_SIZE
+#endif
+init_size:              .long INIT_SIZE         # kernel initialization size
+
 # End of setup header #####################################################
 
-        .section ".inittext", "ax"
+        .section ".entrytext", "ax"
 start_of_setup:
 #ifdef SAFE_RESET_DISK_CONTROLLER
 # Reset the disk controller.
diff --git a/arch/x86/boot/main.c b/arch/x86/boot/main.c
index 58f0415d3ae0..140172b895bd 100644
--- a/arch/x86/boot/main.c
+++ b/arch/x86/boot/main.c
@@ -2,6 +2,7 @@
  *
  *   Copyright (C) 1991, 1992 Linus Torvalds
  *   Copyright 2007 rPath, Inc. - All Rights Reserved
+ *   Copyright 2009 Intel Corporation; author H. Peter Anvin
  *
  *   This file is part of the Linux kernel, and is made available under
  *   the terms of the GNU General Public License version 2.
@@ -61,11 +62,10 @@ static void copy_boot_params(void)
  */
 static void keyboard_set_repeat(void)
 {
-        u16 ax = 0x0305;
-        u16 bx = 0;
-        asm volatile("int $0x16"
-                     : "+a" (ax), "+b" (bx)
-                     : : "ecx", "edx", "esi", "edi");
+        struct biosregs ireg;
+        initregs(&ireg);
+        ireg.ax = 0x0305;
+        intcall(0x16, &ireg, NULL);
 }
 
 /*
@@ -73,18 +73,22 @@ static void keyboard_set_repeat(void)
  */
 static void query_ist(void)
 {
+        struct biosregs ireg, oreg;
+
         /* Some older BIOSes apparently crash on this call, so filter
            it from machines too old to have SpeedStep at all. */
         if (cpu.level < 6)
                 return;
 
-        asm("int $0x15"
-            : "=a" (boot_params.ist_info.signature),
-              "=b" (boot_params.ist_info.command),
-              "=c" (boot_params.ist_info.event),
-              "=d" (boot_params.ist_info.perf_level)
-            : "a" (0x0000e980),  /* IST Support */
-              "d" (0x47534943)); /* Request value */
+        initregs(&ireg);
+        ireg.ax  = 0xe980;       /* IST Support */
+        ireg.edx = 0x47534943;   /* Request value */
+        intcall(0x15, &ireg, &oreg);
+
+        boot_params.ist_info.signature  = oreg.eax;
+        boot_params.ist_info.command    = oreg.ebx;
+        boot_params.ist_info.event      = oreg.ecx;
+        boot_params.ist_info.perf_level = oreg.edx;
 }
 
 /*
@@ -93,13 +97,12 @@ static void query_ist(void)
 static void set_bios_mode(void)
 {
 #ifdef CONFIG_X86_64
-        u32 eax, ebx;
+        struct biosregs ireg;
 
-        eax = 0xec00;
-        ebx = 2;
-        asm volatile("int $0x15"
-                     : "+a" (eax), "+b" (ebx)
-                     : : "ecx", "edx", "esi", "edi");
+        initregs(&ireg);
+        ireg.ax = 0xec00;
+        ireg.bx = 2;
+        intcall(0x15, &ireg, NULL);
 #endif
 }
 
diff --git a/arch/x86/boot/mca.c b/arch/x86/boot/mca.c
index 911eaae5d696..a95a531148ef 100644
--- a/arch/x86/boot/mca.c
+++ b/arch/x86/boot/mca.c
@@ -2,6 +2,7 @@
  *
  *   Copyright (C) 1991, 1992 Linus Torvalds
  *   Copyright 2007 rPath, Inc. - All Rights Reserved
+ *   Copyright 2009 Intel Corporation; author H. Peter Anvin
  *
  *   This file is part of the Linux kernel, and is made available under
  *   the terms of the GNU General Public License version 2.
@@ -16,26 +17,22 @@
 
 int query_mca(void)
 {
-        u8 err;
-        u16 es, bx, len;
-
-        asm("pushw %%es ; "
-            "int $0x15 ; "
-            "setc %0 ; "
-            "movw %%es, %1 ; "
-            "popw %%es"
-            : "=acd" (err), "=acdSD" (es), "=b" (bx)
-            : "a" (0xc000));
-
-        if (err)
+        struct biosregs ireg, oreg;
+        u16 len;
+
+        initregs(&ireg);
+        ireg.ah = 0xc0;
+        intcall(0x15, &ireg, &oreg);
+
+        if (oreg.eflags & X86_EFLAGS_CF)
                 return -1;      /* No MCA present */
 
-        set_fs(es);
-        len = rdfs16(bx);
+        set_fs(oreg.es);
+        len = rdfs16(oreg.bx);
 
         if (len > sizeof(boot_params.sys_desc_table))
                 len = sizeof(boot_params.sys_desc_table);
 
-        copy_from_fs(&boot_params.sys_desc_table, bx, len);
+        copy_from_fs(&boot_params.sys_desc_table, oreg.bx, len);
         return 0;
 }
diff --git a/arch/x86/boot/memory.c b/arch/x86/boot/memory.c
index 74b3d2ba84e9..cae3feb1035e 100644
--- a/arch/x86/boot/memory.c
+++ b/arch/x86/boot/memory.c
@@ -20,12 +20,16 @@
 static int detect_memory_e820(void)
 {
         int count = 0;
-        u32 next = 0;
-        u32 size, id, edi;
-        u8 err;
+        struct biosregs ireg, oreg;
         struct e820entry *desc = boot_params.e820_map;
         static struct e820entry buf; /* static so it is zeroed */
 
+        initregs(&ireg);
+        ireg.ax  = 0xe820;
+        ireg.cx  = sizeof buf;
+        ireg.edx = SMAP;
+        ireg.di  = (size_t)&buf;
+
         /*
          * Note: at least one BIOS is known which assumes that the
          * buffer pointed to by one e820 call is the same one as
@@ -41,22 +45,13 @@ static int detect_memory_e820(void)
          */
 
         do {
-                size = sizeof buf;
-
-                /* Important: %edx and %esi are clobbered by some BIOSes,
-                   so they must be either used for the error output
-                   or explicitly marked clobbered.  Given that, assume there
-                   is something out there clobbering %ebp and %edi, too. */
-                asm("pushl %%ebp; int $0x15; popl %%ebp; setc %0"
-                    : "=d" (err), "+b" (next), "=a" (id), "+c" (size),
-                      "=D" (edi), "+m" (buf)
-                    : "D" (&buf), "d" (SMAP), "a" (0xe820)
-                    : "esi");
+                intcall(0x15, &ireg, &oreg);
+                ireg.ebx = oreg.ebx; /* for next iteration... */
 
                 /* BIOSes which terminate the chain with CF = 1 as opposed
                    to %ebx = 0 don't always report the SMAP signature on
                    the final, failing, probe. */
-                if (err)
+                if (oreg.eflags & X86_EFLAGS_CF)
                         break;
 
                 /* Some BIOSes stop returning SMAP in the middle of
@@ -64,60 +59,64 @@ static int detect_memory_e820(void)
                    screwed up the map at that point, we might have a
                    partial map, the full map, or complete garbage, so
                    just return failure. */
-                if (id != SMAP) {
+                if (oreg.eax != SMAP) {
                         count = 0;
                         break;
                 }
 
                 *desc++ = buf;
                 count++;
-        } while (next && count < ARRAY_SIZE(boot_params.e820_map));
+        } while (ireg.ebx && count < ARRAY_SIZE(boot_params.e820_map));
 
         return boot_params.e820_entries = count;
 }
 
 static int detect_memory_e801(void)
 {
-        u16 ax, bx, cx, dx;
-        u8 err;
+        struct biosregs ireg, oreg;
 
-        bx = cx = dx = 0;
-        ax = 0xe801;
-        asm("stc; int $0x15; setc %0"
-            : "=m" (err), "+a" (ax), "+b" (bx), "+c" (cx), "+d" (dx));
+        initregs(&ireg);
+        ireg.ax = 0xe801;
+        intcall(0x15, &ireg, &oreg);
 
-        if (err)
+        if (oreg.eflags & X86_EFLAGS_CF)
                 return -1;
 
         /* Do we really need to do this? */
-        if (cx || dx) {
-                ax = cx;
-                bx = dx;
+        if (oreg.cx || oreg.dx) {
+                oreg.ax = oreg.cx;
+                oreg.bx = oreg.dx;
         }
 
-        if (ax > 15*1024)
+        if (oreg.ax > 15*1024) {
                 return -1;      /* Bogus! */
-
-        /* This ignores memory above 16MB if we have a memory hole
-           there.  If someone actually finds a machine with a memory
-           hole at 16MB and no support for 0E820h they should probably
-           generate a fake e820 map. */
-        boot_params.alt_mem_k = (ax == 15*1024) ? (dx << 6)+ax : ax;
+        } else if (oreg.ax == 15*1024) {
+                boot_params.alt_mem_k = (oreg.dx << 6) + oreg.ax;
+        } else {
+                /*
+                 * This ignores memory above 16MB if we have a memory
+                 * hole there.  If someone actually finds a machine
+                 * with a memory hole at 16MB and no support for
+                 * 0E820h they should probably generate a fake e820
+                 * map.
+                 */
+                boot_params.alt_mem_k = oreg.ax;
+        }
 
         return 0;
 }
 
 static int detect_memory_88(void)
 {
-        u16 ax;
-        u8 err;
+        struct biosregs ireg, oreg;
 
-        ax = 0x8800;
-        asm("stc; int $0x15; setc %0" : "=bcdm" (err), "+a" (ax));
+        initregs(&ireg);
+        ireg.ah = 0x88;
+        intcall(0x15, &ireg, &oreg);
 
-        boot_params.screen_info.ext_mem_k = ax;
+        boot_params.screen_info.ext_mem_k = oreg.ax;
 
-        return -err;
+        return -(oreg.eflags & X86_EFLAGS_CF); /* 0 or -1 */
 }
 
 int detect_memory(void)
diff --git a/arch/x86/boot/regs.c b/arch/x86/boot/regs.c
new file mode 100644
index 000000000000..958019b1cfa5
--- /dev/null
+++ b/arch/x86/boot/regs.c
@@ -0,0 +1,29 @@
+/* -----------------------------------------------------------------------
+ *
+ *   Copyright 2009 Intel Corporation; author H. Peter Anvin
+ *
+ *   This file is part of the Linux kernel, and is made available under
+ *   the terms of the GNU General Public License version 2 or (at your
+ *   option) any later version; incorporated herein by reference.
+ *
+ * ----------------------------------------------------------------------- */
+
+/*
+ * Simple helper function for initializing a register set.
+ *
+ * Note that this sets EFLAGS_CF in the input register set; this
+ * makes it easier to catch functions which do nothing but don't
+ * explicitly set CF.
+ */
+
+#include "boot.h"
+
+void initregs(struct biosregs *reg)
+{
+        memset(reg, 0, sizeof *reg);
+        reg->eflags |= X86_EFLAGS_CF;
+        reg->ds = ds();
+        reg->es = ds();
+        reg->fs = fs();
+        reg->gs = gs();
+}
diff --git a/arch/x86/boot/setup.ld b/arch/x86/boot/setup.ld
index bb8dc2de7969..0f6ec455a2b1 100644
--- a/arch/x86/boot/setup.ld
+++ b/arch/x86/boot/setup.ld
@@ -15,8 +15,11 @@ SECTIONS
 
         . = 497;
         .header         : { *(.header) }
+        .entrytext      : { *(.entrytext) }
         .inittext       : { *(.inittext) }
         .initdata       : { *(.initdata) }
+        __end_init = .;
+
         .text           : { *(.text) }
         .text32         : { *(.text32) }
 
@@ -52,4 +55,7 @@ SECTIONS
 
         . = ASSERT(_end <= 0x8000, "Setup too big!");
         . = ASSERT(hdr == 0x1f1, "The setup header has the wrong offset!");
+        /* Necessary for the very-old-loader check to work... */
+        . = ASSERT(__end_init <= 5*512, "init sections too big!");
+
 }
diff --git a/arch/x86/boot/tty.c b/arch/x86/boot/tty.c
index 7e8e8b25f5f6..01ec69c901c7 100644
--- a/arch/x86/boot/tty.c
+++ b/arch/x86/boot/tty.c
@@ -2,6 +2,7 @@
  *
  *   Copyright (C) 1991, 1992 Linus Torvalds
  *   Copyright 2007 rPath, Inc. - All Rights Reserved
+ *   Copyright 2009 Intel Corporation; author H. Peter Anvin
  *
  *   This file is part of the Linux kernel, and is made available under
  *   the terms of the GNU General Public License version 2.
@@ -22,24 +23,23 @@
 
 void __attribute__((section(".inittext"))) putchar(int ch)
 {
-        unsigned char c = ch;
+        struct biosregs ireg;
 
-        if (c == '\n')
+        if (ch == '\n')
                 putchar('\r');  /* \n -> \r\n */
 
-        /* int $0x10 is known to have bugs involving touching registers
-           it shouldn't.  Be extra conservative... */
-        asm volatile("pushal; pushw %%ds; int $0x10; popw %%ds; popal"
-                     : : "b" (0x0007), "c" (0x0001), "a" (0x0e00|ch));
+        initregs(&ireg);
+        ireg.bx = 0x0007;
+        ireg.cx = 0x0001;
+        ireg.ah = 0x0e;
+        ireg.al = ch;
+        intcall(0x10, &ireg, NULL);
 }
 
 void __attribute__((section(".inittext"))) puts(const char *str)
 {
-        int n = 0;
-        while (*str) {
+        while (*str)
                 putchar(*str++);
-                n++;
-        }
 }
 
 /*
@@ -49,14 +49,13 @@ void __attribute__((section(".inittext"))) puts(const char *str)
 
 static u8 gettime(void)
 {
-        u16 ax = 0x0200;
-        u16 cx, dx;
+        struct biosregs ireg, oreg;
 
-        asm volatile("int $0x1a"
-                     : "+a" (ax), "=c" (cx), "=d" (dx)
-                     : : "ebx", "esi", "edi");
+        initregs(&ireg);
+        ireg.ah = 0x02;
+        intcall(0x1a, &ireg, &oreg);
 
-        return dx >> 8;
+        return oreg.dh;
 }
 
 /*
@@ -64,19 +63,24 @@ static u8 gettime(void)
  */
 int getchar(void)
 {
-        u16 ax = 0;
-        asm volatile("int $0x16" : "+a" (ax));
+        struct biosregs ireg, oreg;
+
+        initregs(&ireg);
+        /* ireg.ah = 0x00; */
+        intcall(0x16, &ireg, &oreg);
 
-        return ax & 0xff;
+        return oreg.al;
 }
 
 static int kbd_pending(void)
 {
-        u8 pending;
-        asm volatile("int $0x16; setnz %0"
-                     : "=qm" (pending)
-                     : "a" (0x0100));
-        return pending;
+        struct biosregs ireg, oreg;
+
+        initregs(&ireg);
+        ireg.ah = 0x01;
+        intcall(0x16, &ireg, &oreg);
+
+        return !(oreg.eflags & X86_EFLAGS_ZF);
 }
 
 void kbd_flush(void)
diff --git a/arch/x86/boot/video-bios.c b/arch/x86/boot/video-bios.c
index 3fa979c9c363..d660be492363 100644
--- a/arch/x86/boot/video-bios.c
+++ b/arch/x86/boot/video-bios.c
@@ -2,6 +2,7 @@
  *
  *   Copyright (C) 1991, 1992 Linus Torvalds
  *   Copyright 2007 rPath, Inc. - All Rights Reserved
+ *   Copyright 2009 Intel Corporation; author H. Peter Anvin
  *
  *   This file is part of the Linux kernel, and is made available under
  *   the terms of the GNU General Public License version 2.
@@ -29,21 +30,21 @@ static int bios_set_mode(struct mode_info *mi)
 
 static int set_bios_mode(u8 mode)
 {
-        u16 ax;
+        struct biosregs ireg, oreg;
         u8 new_mode;
 
-        ax = mode;              /* AH=0x00 Set Video Mode */
-        asm volatile(INT10
-                     : "+a" (ax)
-                     : : "ebx", "ecx", "edx", "esi", "edi");
+        initregs(&ireg);
+        ireg.al = mode;         /* AH=0x00 Set Video Mode */
+        intcall(0x10, &ireg, NULL);
 
-        ax = 0x0f00;            /* Get Current Video Mode */
-        asm volatile(INT10
-                     : "+a" (ax)
-                     : : "ebx", "ecx", "edx", "esi", "edi");
+
+        ireg.ah = 0x0f;         /* Get Current Video Mode */
+        intcall(0x10, &ireg, &oreg);
 
         do_restore = 1;         /* Assume video contents were lost */
-        new_mode = ax & 0x7f;   /* Not all BIOSes are clean with the top bit */
+
+        /* Not all BIOSes are clean with the top bit */
+        new_mode = ireg.al & 0x7f;
 
         if (new_mode == mode)
                 return 0;       /* Mode change OK */
@@ -53,10 +54,8 @@ static int set_bios_mode(u8 mode)
                 /* Mode setting failed, but we didn't end up where we
                    started.  That's bad.  Try to revert to the original
                    video mode. */
-                ax = boot_params.screen_info.orig_video_mode;
-                asm volatile(INT10
-                             : "+a" (ax)
-                             : : "ebx", "ecx", "edx", "esi", "edi");
+                ireg.ax = boot_params.screen_info.orig_video_mode;
+                intcall(0x10, &ireg, NULL);
         }
 #endif
         return -1;
diff --git a/arch/x86/boot/video-vesa.c b/arch/x86/boot/video-vesa.c
index 4a58c8ce3f69..c700147d6ffb 100644
--- a/arch/x86/boot/video-vesa.c
+++ b/arch/x86/boot/video-vesa.c
@@ -2,6 +2,7 @@
  *
  *   Copyright (C) 1991, 1992 Linus Torvalds
  *   Copyright 2007 rPath, Inc. - All Rights Reserved
+ *   Copyright 2009 Intel Corporation; author H. Peter Anvin
  *
  *   This file is part of the Linux kernel, and is made available under
  *   the terms of the GNU General Public License version 2.
@@ -31,7 +32,7 @@ static inline void vesa_store_mode_params_graphics(void) {}
 static int vesa_probe(void)
 {
 #if defined(CONFIG_VIDEO_VESA) || defined(CONFIG_FIRMWARE_EDID)
-        u16 ax, cx, di;
+        struct biosregs ireg, oreg;
         u16 mode;
         addr_t mode_ptr;
         struct mode_info *mi;
@@ -39,13 +40,12 @@ static int vesa_probe(void)
 
         video_vesa.modes = GET_HEAP(struct mode_info, 0);
 
-        ax = 0x4f00;
-        di = (size_t)&vginfo;
-        asm(INT10
-            : "+a" (ax), "+D" (di), "=m" (vginfo)
-            : : "ebx", "ecx", "edx", "esi");
+        initregs(&ireg);
+        ireg.ax = 0x4f00;
+        ireg.di = (size_t)&vginfo;
+        intcall(0x10, &ireg, &oreg);
 
-        if (ax != 0x004f ||
+        if (ireg.ax != 0x004f ||
             vginfo.signature != VESA_MAGIC ||
             vginfo.version < 0x0102)
                 return 0;       /* Not present */
@@ -65,14 +65,12 @@ static int vesa_probe(void)
 
                 memset(&vminfo, 0, sizeof vminfo); /* Just in case... */
 
-                ax = 0x4f01;
-                cx = mode;
-                di = (size_t)&vminfo;
-                asm(INT10
-                    : "+a" (ax), "+c" (cx), "+D" (di), "=m" (vminfo)
-                    : : "ebx", "edx", "esi");
+                ireg.ax = 0x4f01;
+                ireg.cx = mode;
+                ireg.di = (size_t)&vminfo;
+                intcall(0x10, &ireg, &oreg);
 
-                if (ax != 0x004f)
+                if (ireg.ax != 0x004f)
                         continue;
 
                 if ((vminfo.mode_attr & 0x15) == 0x05) {
@@ -111,20 +109,19 @@ static int vesa_probe(void)
 
 static int vesa_set_mode(struct mode_info *mode)
 {
-        u16 ax, bx, cx, di;
+        struct biosregs ireg, oreg;
         int is_graphic;
         u16 vesa_mode = mode->mode - VIDEO_FIRST_VESA;
 
         memset(&vminfo, 0, sizeof vminfo); /* Just in case... */
 
-        ax = 0x4f01;
-        cx = vesa_mode;
-        di = (size_t)&vminfo;
-        asm(INT10
-            : "+a" (ax), "+c" (cx), "+D" (di), "=m" (vminfo)
-            : : "ebx", "edx", "esi");
+        initregs(&ireg);
+        ireg.ax = 0x4f01;
+        ireg.cx = vesa_mode;
+        ireg.di = (size_t)&vminfo;
+        intcall(0x10, &ireg, &oreg);
 
-        if (ax != 0x004f)
+        if (oreg.ax != 0x004f)
                 return -1;
 
         if ((vminfo.mode_attr & 0x15) == 0x05) {
@@ -141,14 +138,12 @@ static int vesa_set_mode(struct mode_info *mode)
         }
 
 
-        ax = 0x4f02;
-        bx = vesa_mode;
-        di = 0;
-        asm volatile(INT10
-                     : "+a" (ax), "+b" (bx), "+D" (di)
-                     : : "ecx", "edx", "esi");
+        initregs(&ireg);
+        ireg.ax = 0x4f02;
+        ireg.bx = vesa_mode;
+        intcall(0x10, &ireg, &oreg);
 
-        if (ax != 0x004f)
+        if (oreg.ax != 0x004f)
                 return -1;
 
         graphic_mode = is_graphic;
@@ -171,50 +166,45 @@ static int vesa_set_mode(struct mode_info *mode)
 /* Switch DAC to 8-bit mode */
 static void vesa_dac_set_8bits(void)
 {
+        struct biosregs ireg, oreg;
         u8 dac_size = 6;
 
         /* If possible, switch the DAC to 8-bit mode */
         if (vginfo.capabilities & 1) {
-                u16 ax, bx;
-
-                ax = 0x4f08;
-                bx = 0x0800;
-                asm volatile(INT10
-                             : "+a" (ax), "+b" (bx)
-                             : : "ecx", "edx", "esi", "edi");
-
-                if (ax == 0x004f)
-                        dac_size = bx >> 8;
+                initregs(&ireg);
+                ireg.ax = 0x4f08;
+                ireg.bh = 0x08;
+                intcall(0x10, &ireg, &oreg);
+                if (oreg.ax == 0x004f)
+                        dac_size = oreg.bh;
         }
 
         /* Set the color sizes to the DAC size, and offsets to 0 */
-        boot_params.screen_info.red_size = dac_size;
+        boot_params.screen_info.red_size   = dac_size;
         boot_params.screen_info.green_size = dac_size;
-        boot_params.screen_info.blue_size = dac_size;
-        boot_params.screen_info.rsvd_size = dac_size;
+        boot_params.screen_info.blue_size  = dac_size;
+        boot_params.screen_info.rsvd_size  = dac_size;
 
-        boot_params.screen_info.red_pos = 0;
-        boot_params.screen_info.green_pos = 0;
-        boot_params.screen_info.blue_pos = 0;
-        boot_params.screen_info.rsvd_pos = 0;
+        boot_params.screen_info.red_pos    = 0;
+        boot_params.screen_info.green_pos  = 0;
+        boot_params.screen_info.blue_pos   = 0;
+        boot_params.screen_info.rsvd_pos   = 0;
 }
 
 /* Save the VESA protected mode info */
 static void vesa_store_pm_info(void)
 {
-        u16 ax, bx, di, es;
+        struct biosregs ireg, oreg;
 
-        ax = 0x4f0a;
-        bx = di = 0;
-        asm("pushw %%es; "INT10"; movw %%es,%0; popw %%es"
-            : "=d" (es), "+a" (ax), "+b" (bx), "+D" (di)
-            : : "ecx", "esi");
+        initregs(&ireg);
+        ireg.ax = 0x4f0a;
+        intcall(0x10, &ireg, &oreg);
 
-        if (ax != 0x004f)
+        if (oreg.ax != 0x004f)
                 return;
 
-        boot_params.screen_info.vesapm_seg = es;
-        boot_params.screen_info.vesapm_off = di;
+        boot_params.screen_info.vesapm_seg = oreg.es;
+        boot_params.screen_info.vesapm_off = oreg.di;
 }
 
 /*
@@ -252,7 +242,7 @@ static void vesa_store_mode_params_graphics(void)
 void vesa_store_edid(void)
 {
 #ifdef CONFIG_FIRMWARE_EDID
-        u16 ax, bx, cx, dx, di;
+        struct biosregs ireg, oreg;
 
         /* Apparently used as a nonsense token... */
         memset(&boot_params.edid_info, 0x13, sizeof boot_params.edid_info);
@@ -260,33 +250,26 @@ void vesa_store_edid(void)
         if (vginfo.version < 0x0200)
                 return;         /* EDID requires VBE 2.0+ */
 
-        ax = 0x4f15;            /* VBE DDC */
-        bx = 0x0000;            /* Report DDC capabilities */
-        cx = 0;                 /* Controller 0 */
-        di = 0;                 /* ES:DI must be 0 by spec */
-
-        /* Note: The VBE DDC spec is different from the main VESA spec;
-           we genuinely have to assume all registers are destroyed here. */
-
-        asm("pushw %%es; movw %2,%%es; "INT10"; popw %%es"
-            : "+a" (ax), "+b" (bx), "+c" (cx), "+D" (di)
-            : : "esi", "edx");
+        initregs(&ireg);
+        ireg.ax = 0x4f15;               /* VBE DDC */
+        /* ireg.bx = 0x0000; */         /* Report DDC capabilities */
+        /* ireg.cx = 0; */              /* Controller 0 */
+        ireg.es = 0;                    /* ES:DI must be 0 by spec */
+        intcall(0x10, &ireg, &oreg);
 
-        if (ax != 0x004f)
+        if (oreg.ax != 0x004f)
                 return;         /* No EDID */
 
         /* BH = time in seconds to transfer EDD information */
         /* BL = DDC level supported */
 
-        ax = 0x4f15;            /* VBE DDC */
-        bx = 0x0001;            /* Read EDID */
-        cx = 0;                 /* Controller 0 */
-        dx = 0;                 /* EDID block number */
-        di =(size_t) &boot_params.edid_info; /* (ES:)Pointer to block */
-        asm(INT10
-            : "+a" (ax), "+b" (bx), "+d" (dx), "=m" (boot_params.edid_info),
-              "+c" (cx), "+D" (di)
-            : : "esi");
+        ireg.ax = 0x4f15;               /* VBE DDC */
+        ireg.bx = 0x0001;               /* Read EDID */
+        /* ireg.cx = 0; */              /* Controller 0 */
+        /* ireg.dx = 0; */              /* EDID block number */
+        ireg.es = ds();
+        ireg.di =(size_t)&boot_params.edid_info; /* (ES:)Pointer to block */
+        intcall(0x10, &ireg, &oreg);
 #endif /* CONFIG_FIRMWARE_EDID */
 }
 
diff --git a/arch/x86/boot/video-vga.c b/arch/x86/boot/video-vga.c
index 9e0587a37768..8f8d827e254d 100644
--- a/arch/x86/boot/video-vga.c
+++ b/arch/x86/boot/video-vga.c
@@ -2,6 +2,7 @@
  *
  *   Copyright (C) 1991, 1992 Linus Torvalds
  *   Copyright 2007 rPath, Inc. - All Rights Reserved
+ *   Copyright 2009 Intel Corporation; author H. Peter Anvin
  *
  *   This file is part of the Linux kernel, and is made available under
  *   the terms of the GNU General Public License version 2.
@@ -39,30 +40,30 @@ static __videocard video_vga;
 /* Set basic 80x25 mode */
 static u8 vga_set_basic_mode(void)
 {
+        struct biosregs ireg, oreg;
         u16 ax;
         u8 rows;
         u8 mode;
 
+        initregs(&ireg);
+
 #ifdef CONFIG_VIDEO_400_HACK
         if (adapter >= ADAPTER_VGA) {
-                asm volatile(INT10
-                             : : "a" (0x1202), "b" (0x0030)
-                             : "ecx", "edx", "esi", "edi");
+                ireg.ax = 0x1202;
+                ireg.bx = 0x0030;
+                intcall(0x10, &ireg, NULL);
         }
 #endif
 
         ax = 0x0f00;
-        asm volatile(INT10
-                     : "+a" (ax)
-                     : : "ebx", "ecx", "edx", "esi", "edi");
-
-        mode = (u8)ax;
+        intcall(0x10, &ireg, &oreg);
+        mode = oreg.al;
 
         set_fs(0);
         rows = rdfs8(0x484);    /* rows minus one */
 
 #ifndef CONFIG_VIDEO_400_HACK
-        if ((ax == 0x5003 || ax == 0x5007) &&
+        if ((oreg.ax == 0x5003 || oreg.ax == 0x5007) &&
             (rows == 0 || rows == 24))
                 return mode;
 #endif
@@ -71,10 +72,8 @@ static u8 vga_set_basic_mode(void)
                 mode = 3;
 
         /* Set the mode */
-        ax = mode;
-        asm volatile(INT10
-                     : "+a" (ax)
-                     : : "ebx", "ecx", "edx", "esi", "edi");
+        ireg.ax = mode;         /* AH=0: set mode */
+        intcall(0x10, &ireg, NULL);
         do_restore = 1;
         return mode;
 }
@@ -82,43 +81,69 @@ static u8 vga_set_basic_mode(void)
 static void vga_set_8font(void)
 {
         /* Set 8x8 font - 80x43 on EGA, 80x50 on VGA */
+        struct biosregs ireg;
+
+        initregs(&ireg);
 
         /* Set 8x8 font */
-        asm volatile(INT10 : : "a" (0x1112), "b" (0));
+        ireg.ax = 0x1112;
+        /* ireg.bl = 0; */
+        intcall(0x10, &ireg, NULL);
 
         /* Use alternate print screen */
-        asm volatile(INT10 : : "a" (0x1200), "b" (0x20));
+        ireg.ax = 0x1200;
+        ireg.bl = 0x20;
+        intcall(0x10, &ireg, NULL);
 
         /* Turn off cursor emulation */
-        asm volatile(INT10 : : "a" (0x1201), "b" (0x34));
+        ireg.ax = 0x1201;
+        ireg.bl = 0x34;
+        intcall(0x10, &ireg, NULL);
 
         /* Cursor is scan lines 6-7 */
-        asm volatile(INT10 : : "a" (0x0100), "c" (0x0607));
+        ireg.ax = 0x0100;
+        ireg.cx = 0x0607;
+        intcall(0x10, &ireg, NULL);
 }
 
 static void vga_set_14font(void)
 {
         /* Set 9x14 font - 80x28 on VGA */
+        struct biosregs ireg;
+
+        initregs(&ireg);
 
         /* Set 9x14 font */
-        asm volatile(INT10 : : "a" (0x1111), "b" (0));
+        ireg.ax = 0x1111;
+        /* ireg.bl = 0; */
+        intcall(0x10, &ireg, NULL);
 
         /* Turn off cursor emulation */
-        asm volatile(INT10 : : "a" (0x1201), "b" (0x34));
+        ireg.ax = 0x1201;
+        ireg.bl = 0x34;
+        intcall(0x10, &ireg, NULL);
 
         /* Cursor is scan lines 11-12 */
-        asm volatile(INT10 : : "a" (0x0100), "c" (0x0b0c));
+        ireg.ax = 0x0100;
+        ireg.cx = 0x0b0c;
+        intcall(0x10, &ireg, NULL);
 }
 
 static void vga_set_80x43(void)
 {
         /* Set 80x43 mode on VGA (not EGA) */
+        struct biosregs ireg;
+
+        initregs(&ireg);
 
         /* Set 350 scans */
-        asm volatile(INT10 : : "a" (0x1201), "b" (0x30));
+        ireg.ax = 0x1201;
+        ireg.bl = 0x30;
+        intcall(0x10, &ireg, NULL);
 
         /* Reset video mode */
-        asm volatile(INT10 : : "a" (0x0003));
+        ireg.ax = 0x0003;
+        intcall(0x10, &ireg, NULL);
 
         vga_set_8font();
 }
@@ -225,8 +250,6 @@ static int vga_set_mode(struct mode_info *mode)
  */
 static int vga_probe(void)
 {
-        u16 ega_bx;
-
         static const char *card_name[] = {
                 "CGA/MDA/HGC", "EGA", "VGA"
         };
@@ -240,26 +263,26 @@ static int vga_probe(void)
                 sizeof(ega_modes)/sizeof(struct mode_info),
                 sizeof(vga_modes)/sizeof(struct mode_info),
         };
-        u8 vga_flag;
 
-        asm(INT10
-            : "=b" (ega_bx)
-            : "a" (0x1200), "b" (0x10) /* Check EGA/VGA */
-            : "ecx", "edx", "esi", "edi");
+        struct biosregs ireg, oreg;
+
+        initregs(&ireg);
+
+        ireg.ax = 0x1200;
+        ireg.bl = 0x10;         /* Check EGA/VGA */
+        intcall(0x10, &ireg, &oreg);
 
 #ifndef _WAKEUP
-        boot_params.screen_info.orig_video_ega_bx = ega_bx;
+        boot_params.screen_info.orig_video_ega_bx = oreg.bx;
 #endif
 
         /* If we have MDA/CGA/HGC then BL will be unchanged at 0x10 */
-        if ((u8)ega_bx != 0x10) {
+        if (oreg.bl != 0x10) {
                 /* EGA/VGA */
-                asm(INT10
-                    : "=a" (vga_flag)
-                    : "a" (0x1a00)
-                    : "ebx", "ecx", "edx", "esi", "edi");
+                ireg.ax = 0x1a00;
+                intcall(0x10, &ireg, &oreg);
 
-                if (vga_flag == 0x1a) {
+                if (oreg.al == 0x1a) {
                         adapter = ADAPTER_VGA;
 #ifndef _WAKEUP
                         boot_params.screen_info.orig_video_isVGA = 1;
diff --git a/arch/x86/boot/video.c b/arch/x86/boot/video.c
index 3bef2c1febe9..bad728b76fc2 100644
--- a/arch/x86/boot/video.c
+++ b/arch/x86/boot/video.c
@@ -2,6 +2,7 @@
  *
  *   Copyright (C) 1991, 1992 Linus Torvalds
  *   Copyright 2007 rPath, Inc. - All Rights Reserved
+ *   Copyright 2009 Intel Corporation; author H. Peter Anvin
  *
  *   This file is part of the Linux kernel, and is made available under
  *   the terms of the GNU General Public License version 2.
@@ -18,33 +19,29 @@
 
 static void store_cursor_position(void)
 {
-        u16 curpos;
-        u16 ax, bx;
+        struct biosregs ireg, oreg;
 
-        ax = 0x0300;
-        bx = 0;
-        asm(INT10
-            : "=d" (curpos), "+a" (ax), "+b" (bx)
-            : : "ecx", "esi", "edi");
+        initregs(&ireg);
+        ireg.ah = 0x03;
+        intcall(0x10, &ireg, &oreg);
 
-        boot_params.screen_info.orig_x = curpos;
-        boot_params.screen_info.orig_y = curpos >> 8;
+        boot_params.screen_info.orig_x = oreg.dl;
+        boot_params.screen_info.orig_y = oreg.dh;
 }
 
 static void store_video_mode(void)
 {
-        u16 ax, page;
+        struct biosregs ireg, oreg;
 
         /* N.B.: the saving of the video page here is a bit silly,
            since we pretty much assume page 0 everywhere. */
-        ax = 0x0f00;
-        asm(INT10
-            : "+a" (ax), "=b" (page)
-            : : "ecx", "edx", "esi", "edi");
+        initregs(&ireg);
+        ireg.ah = 0x0f;
+        intcall(0x10, &ireg, &oreg);
 
         /* Not all BIOSes are clean with respect to the top bit */
-        boot_params.screen_info.orig_video_mode = ax & 0x7f;
-        boot_params.screen_info.orig_video_page = page >> 8;
+        boot_params.screen_info.orig_video_mode = oreg.al & 0x7f;
+        boot_params.screen_info.orig_video_page = oreg.bh;
 }
 
 /*
@@ -257,7 +254,7 @@ static void restore_screen(void)
         int y;
         addr_t dst = 0;
         u16 *src = saved.data;
-        u16 ax, bx, dx;
+        struct biosregs ireg;
 
         if (graphic_mode)
                 return;         /* Can't restore onto a graphic mode */
@@ -296,12 +293,11 @@ static void restore_screen(void)
         }
 
         /* Restore cursor position */
-        ax = 0x0200;            /* Set cursor position */
-        bx = 0;                 /* Page number (<< 8) */
-        dx = (saved.cury << 8)+saved.curx;
-        asm volatile(INT10
-                     : "+a" (ax), "+b" (bx), "+d" (dx)
-                     : : "ecx", "esi", "edi");
+        initregs(&ireg);
+        ireg.ah = 0x02;         /* Set cursor position */
+        ireg.dh = saved.cury;
+        ireg.dl = saved.curx;
+        intcall(0x10, &ireg, NULL);
 }
 #else
 #define save_screen()           ((void)0)
diff --git a/arch/x86/boot/video.h b/arch/x86/boot/video.h
index ee63f5d14461..5bb174a997fc 100644
--- a/arch/x86/boot/video.h
+++ b/arch/x86/boot/video.h
@@ -112,20 +112,6 @@ extern int force_x, force_y;	/* Don't query the BIOS for cols/rows */
 extern int do_restore;          /* Restore screen contents */
 extern int graphic_mode;        /* Graphics mode with linear frame buffer */
 
-/*
- * int $0x10 is notorious for touching registers it shouldn't.
- * gcc doesn't like %ebp being clobbered, so define it as a push/pop
- * sequence here.
- *
- * A number of systems, including the original PC can clobber %bp in
- * certain circumstances, like when scrolling.  There exists at least
- * one Trident video card which could clobber DS under a set of
- * circumstances that we are unlikely to encounter (scrolling when
- * using an extended graphics mode of more than 800x600 pixels), but
- * it's cheap insurance to deal with that here.
- */
-#define INT10 "pushl %%ebp; pushw %%ds; int $0x10; popw %%ds; popl %%ebp"
-
 /* Accessing VGA indexed registers */
 static inline u8 in_idx(u16 port, u8 index)
 {
diff --git a/arch/x86/configs/i386_defconfig b/arch/x86/configs/i386_defconfig
index 235b81d0f6f2..edb992ebef92 100644
--- a/arch/x86/configs/i386_defconfig
+++ b/arch/x86/configs/i386_defconfig
@@ -1,12 +1,13 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29-rc4
-# Tue Feb 24 15:50:58 2009
+# Linux kernel version: 2.6.30-rc2
+# Mon May 11 16:21:55 2009
 #
 # CONFIG_64BIT is not set
 CONFIG_X86_32=y
 # CONFIG_X86_64 is not set
 CONFIG_X86=y
+CONFIG_OUTPUT_FORMAT="elf32-i386"
 CONFIG_ARCH_DEFCONFIG="arch/x86/configs/i386_defconfig"
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CMOS_UPDATE=y
@@ -33,6 +34,7 @@ CONFIG_ARCH_HAS_CPU_RELAX=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
 CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
 CONFIG_HAVE_SETUP_PER_CPU_AREA=y
+CONFIG_HAVE_DYNAMIC_PER_CPU_AREA=y
 # CONFIG_HAVE_CPUMASK_OF_CPU_MAP is not set
 CONFIG_ARCH_HIBERNATION_POSSIBLE=y
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
@@ -40,15 +42,16 @@ CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_ARCH_POPULATES_NODE_MAP=y
 # CONFIG_AUDIT_ARCH is not set
 CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y
+CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
 CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
 CONFIG_GENERIC_PENDING_IRQ=y
-CONFIG_X86_SMP=y
 CONFIG_USE_GENERIC_SMP_HELPERS=y
 CONFIG_X86_32_SMP=y
 CONFIG_X86_HT=y
-CONFIG_X86_BIOS_REBOOT=y
 CONFIG_X86_TRAMPOLINE=y
+CONFIG_X86_32_LAZY_GS=y
 CONFIG_KTIME_SCALAR=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
 
@@ -60,10 +63,17 @@ CONFIG_LOCK_KERNEL=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 # CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
 CONFIG_BSD_PROCESS_ACCT=y
 # CONFIG_BSD_PROCESS_ACCT_V3 is not set
 CONFIG_TASKSTATS=y
@@ -113,23 +123,26 @@ CONFIG_PID_NS=y
 CONFIG_NET_NS=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
 # CONFIG_EMBEDDED is not set
 CONFIG_UID16=y
 CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 CONFIG_ELF_CORE=y
 CONFIG_PCSPKR_PLATFORM=y
-# CONFIG_COMPAT_BRK is not set
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
-CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
@@ -139,6 +152,7 @@ CONFIG_AIO=y
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_PCI_QUIRKS=y
 CONFIG_SLUB_DEBUG=y
+# CONFIG_COMPAT_BRK is not set
 # CONFIG_SLAB is not set
 CONFIG_SLUB=y
 # CONFIG_SLOB is not set
@@ -154,6 +168,8 @@ CONFIG_HAVE_IOREMAP_PROT=y
 CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -167,7 +183,6 @@ CONFIG_MODULE_FORCE_UNLOAD=y
 CONFIG_STOP_MACHINE=y
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-CONFIG_BLK_DEV_IO_TRACE=y
 CONFIG_BLK_DEV_BSG=y
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -194,12 +209,12 @@ CONFIG_HIGH_RES_TIMERS=y
 CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
 CONFIG_SMP=y
 CONFIG_SPARSE_IRQ=y
-CONFIG_X86_FIND_SMP_CONFIG=y
 CONFIG_X86_MPPARSE=y
+# CONFIG_X86_BIGSMP is not set
+CONFIG_X86_EXTENDED_PLATFORM=y
 # CONFIG_X86_ELAN is not set
-# CONFIG_X86_GENERICARCH is not set
-# CONFIG_X86_VSMP is not set
 # CONFIG_X86_RDC321X is not set
+# CONFIG_X86_32_NON_STANDARD is not set
 CONFIG_SCHED_OMIT_FRAME_POINTER=y
 # CONFIG_PARAVIRT_GUEST is not set
 # CONFIG_MEMTEST is not set
@@ -230,8 +245,10 @@ CONFIG_M686=y
 # CONFIG_GENERIC_CPU is not set
 CONFIG_X86_GENERIC=y
 CONFIG_X86_CPU=y
+CONFIG_X86_L1_CACHE_BYTES=64
+CONFIG_X86_INTERNODE_CACHE_BYTES=64
 CONFIG_X86_CMPXCHG=y
-CONFIG_X86_L1_CACHE_SHIFT=7
+CONFIG_X86_L1_CACHE_SHIFT=5
 CONFIG_X86_XADD=y
 # CONFIG_X86_PPRO_FENCE is not set
 CONFIG_X86_WP_WORKS_OK=y
@@ -247,7 +264,7 @@ CONFIG_X86_DEBUGCTLMSR=y
 CONFIG_CPU_SUP_INTEL=y
 CONFIG_CPU_SUP_CYRIX_32=y
 CONFIG_CPU_SUP_AMD=y
-CONFIG_CPU_SUP_CENTAUR_32=y
+CONFIG_CPU_SUP_CENTAUR=y
 CONFIG_CPU_SUP_TRANSMETA_32=y
 CONFIG_CPU_SUP_UMC_32=y
 CONFIG_X86_DS=y
@@ -279,6 +296,7 @@ CONFIG_MICROCODE_AMD=y
 CONFIG_MICROCODE_OLD_INTERFACE=y
 CONFIG_X86_MSR=y
 CONFIG_X86_CPUID=y
+# CONFIG_X86_CPU_DEBUG is not set
 # CONFIG_NOHIGHMEM is not set
 CONFIG_HIGHMEM4G=y
 # CONFIG_HIGHMEM64G is not set
@@ -302,6 +320,8 @@ CONFIG_ZONE_DMA_FLAG=1
 CONFIG_BOUNCE=y
 CONFIG_VIRT_TO_BUS=y
 CONFIG_UNEVICTABLE_LRU=y
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_MLOCKED_PAGE_BIT=y
 CONFIG_HIGHPTE=y
 CONFIG_X86_CHECK_BIOS_CORRUPTION=y
 CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK=y
@@ -312,6 +332,7 @@ CONFIG_MTRR=y
 CONFIG_X86_PAT=y
 CONFIG_EFI=y
 CONFIG_SECCOMP=y
+# CONFIG_CC_STACKPROTECTOR is not set
 # CONFIG_HZ_100 is not set
 # CONFIG_HZ_250 is not set
 # CONFIG_HZ_300 is not set
@@ -322,8 +343,9 @@ CONFIG_KEXEC=y
 CONFIG_CRASH_DUMP=y
 # CONFIG_KEXEC_JUMP is not set
 CONFIG_PHYSICAL_START=0x1000000
-# CONFIG_RELOCATABLE is not set
-CONFIG_PHYSICAL_ALIGN=0x200000
+CONFIG_RELOCATABLE=y
+CONFIG_X86_NEED_RELOCS=y
+CONFIG_PHYSICAL_ALIGN=0x1000000
 CONFIG_HOTPLUG_CPU=y
 # CONFIG_COMPAT_VDSO is not set
 # CONFIG_CMDLINE_BOOL is not set
@@ -363,7 +385,6 @@ CONFIG_ACPI_THERMAL=y
 CONFIG_ACPI_BLACKLIST_YEAR=0
 # CONFIG_ACPI_DEBUG is not set
 # CONFIG_ACPI_PCI_SLOT is not set
-CONFIG_ACPI_SYSTEM=y
 CONFIG_X86_PM_TIMER=y
 CONFIG_ACPI_CONTAINER=y
 # CONFIG_ACPI_SBS is not set
@@ -425,6 +446,7 @@ CONFIG_PCI_BIOS=y
 CONFIG_PCI_DIRECT=y
 CONFIG_PCI_MMCONFIG=y
 CONFIG_PCI_DOMAINS=y
+# CONFIG_DMAR is not set
 CONFIG_PCIEPORTBUS=y
 # CONFIG_HOTPLUG_PCI_PCIE is not set
 CONFIG_PCIEAER=y
@@ -435,6 +457,7 @@ CONFIG_PCI_MSI=y
 # CONFIG_PCI_DEBUG is not set
 # CONFIG_PCI_STUB is not set
 CONFIG_HT_IRQ=y
+# CONFIG_PCI_IOV is not set
 CONFIG_ISA_DMA_API=y
 # CONFIG_ISA is not set
 # CONFIG_MCA is not set
@@ -481,7 +504,6 @@ CONFIG_NET=y
 #
 # Networking options
 #
-CONFIG_COMPAT_NET_DEV_OPS=y
 CONFIG_PACKET=y
 CONFIG_PACKET_MMAP=y
 CONFIG_UNIX=y
@@ -639,6 +661,7 @@ CONFIG_LLC=y
 # CONFIG_LAPB is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
 CONFIG_NET_SCHED=y
 
 #
@@ -696,6 +719,7 @@ CONFIG_NET_SCH_FIFO=y
 #
 # CONFIG_NET_PKTGEN is not set
 # CONFIG_NET_TCPPROBE is not set
+# CONFIG_NET_DROP_MONITOR is not set
 CONFIG_HAMRADIO=y
 
 #
@@ -706,12 +730,10 @@ CONFIG_HAMRADIO=y
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
-# CONFIG_PHONET is not set
 CONFIG_FIB_RULES=y
 CONFIG_WIRELESS=y
 CONFIG_CFG80211=y
 # CONFIG_CFG80211_REG_DEBUG is not set
-CONFIG_NL80211=y
 CONFIG_WIRELESS_OLD_REGULATORY=y
 CONFIG_WIRELESS_EXT=y
 CONFIG_WIRELESS_EXT_SYSFS=y
@@ -789,6 +811,7 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_ICS932S401 is not set
 # CONFIG_ENCLOSURE_SERVICES is not set
 # CONFIG_HP_ILO is not set
+# CONFIG_ISL29003 is not set
 # CONFIG_C2PORT is not set
 
 #
@@ -842,6 +865,7 @@ CONFIG_SCSI_SPI_ATTRS=y
 # CONFIG_SCSI_LOWLEVEL is not set
 # CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
 # CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
 CONFIG_ATA=y
 # CONFIG_ATA_NONSTANDARD is not set
 CONFIG_ATA_ACPI=y
@@ -940,6 +964,7 @@ CONFIG_DM_ZERO=y
 CONFIG_MACINTOSH_DRIVERS=y
 CONFIG_MAC_EMUMOUSEBTN=y
 CONFIG_NETDEVICES=y
+CONFIG_COMPAT_NET_DEV_OPS=y
 # CONFIG_IFB is not set
 # CONFIG_DUMMY is not set
 # CONFIG_BONDING is not set
@@ -977,6 +1002,8 @@ CONFIG_MII=y
 CONFIG_NET_VENDOR_3COM=y
 # CONFIG_VORTEX is not set
 # CONFIG_TYPHOON is not set
+# CONFIG_ETHOC is not set
+# CONFIG_DNET is not set
 CONFIG_NET_TULIP=y
 # CONFIG_DE2104X is not set
 # CONFIG_TULIP is not set
@@ -1026,6 +1053,7 @@ CONFIG_E1000=y
 CONFIG_E1000E=y
 # CONFIG_IP1000 is not set
 # CONFIG_IGB is not set
+# CONFIG_IGBVF is not set
 # CONFIG_NS83820 is not set
 # CONFIG_HAMACHI is not set
 # CONFIG_YELLOWFIN is not set
@@ -1040,6 +1068,7 @@ CONFIG_BNX2=y
 # CONFIG_QLA3XXX is not set
 # CONFIG_ATL1 is not set
 # CONFIG_ATL1E is not set
+# CONFIG_ATL1C is not set
 # CONFIG_JME is not set
 CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
@@ -1049,6 +1078,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
 # CONFIG_S2IO is not set
+# CONFIG_VXGE is not set
 # CONFIG_MYRI10GE is not set
 # CONFIG_NETXEN_NIC is not set
 # CONFIG_NIU is not set
@@ -1058,6 +1088,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_BNX2X is not set
 # CONFIG_QLGE is not set
 # CONFIG_SFC is not set
+# CONFIG_BE2NET is not set
 CONFIG_TR=y
 # CONFIG_IBMOL is not set
 # CONFIG_IBMLS is not set
@@ -1073,8 +1104,8 @@ CONFIG_WLAN_80211=y
 # CONFIG_LIBERTAS is not set
 # CONFIG_LIBERTAS_THINFIRM is not set
 # CONFIG_AIRO is not set
-# CONFIG_HERMES is not set
 # CONFIG_ATMEL is not set
+# CONFIG_AT76C50X_USB is not set
 # CONFIG_AIRO_CS is not set
 # CONFIG_PCMCIA_WL3501 is not set
 # CONFIG_PRISM54 is not set
@@ -1084,21 +1115,21 @@ CONFIG_WLAN_80211=y
 # CONFIG_RTL8187 is not set
 # CONFIG_ADM8211 is not set
 # CONFIG_MAC80211_HWSIM is not set
+# CONFIG_MWL8K is not set
 # CONFIG_P54_COMMON is not set
 CONFIG_ATH5K=y
 # CONFIG_ATH5K_DEBUG is not set
 # CONFIG_ATH9K is not set
+# CONFIG_AR9170_USB is not set
 # CONFIG_IPW2100 is not set
 # CONFIG_IPW2200 is not set
-# CONFIG_IWLCORE is not set
-# CONFIG_IWLWIFI_LEDS is not set
-# CONFIG_IWLAGN is not set
-# CONFIG_IWL3945 is not set
+# CONFIG_IWLWIFI is not set
 # CONFIG_HOSTAP is not set
 # CONFIG_B43 is not set
 # CONFIG_B43LEGACY is not set
 # CONFIG_ZD1211RW is not set
 # CONFIG_RT2X00 is not set
+# CONFIG_HERMES is not set
 
 #
 # Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -1209,6 +1240,8 @@ CONFIG_INPUT_TABLET=y
 # CONFIG_TABLET_USB_KBTAB is not set
 # CONFIG_TABLET_USB_WACOM is not set
 CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
+# CONFIG_TOUCHSCREEN_AD7879 is not set
 # CONFIG_TOUCHSCREEN_FUJITSU is not set
 # CONFIG_TOUCHSCREEN_GUNZE is not set
 # CONFIG_TOUCHSCREEN_ELO is not set
@@ -1303,6 +1336,7 @@ CONFIG_UNIX98_PTYS=y
 # CONFIG_LEGACY_PTYS is not set
 # CONFIG_IPMI_HANDLER is not set
 CONFIG_HW_RANDOM=y
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
 CONFIG_HW_RANDOM_INTEL=y
 CONFIG_HW_RANDOM_AMD=y
 CONFIG_HW_RANDOM_GEODE=y
@@ -1390,7 +1424,6 @@ CONFIG_I2C_I801=y
 # CONFIG_SENSORS_PCF8574 is not set
 # CONFIG_PCF8575 is not set
 # CONFIG_SENSORS_PCA9539 is not set
-# CONFIG_SENSORS_PCF8591 is not set
 # CONFIG_SENSORS_MAX6875 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
@@ -1424,6 +1457,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_ADT7475 is not set
 # CONFIG_SENSORS_K8TEMP is not set
 # CONFIG_SENSORS_ASB100 is not set
+# CONFIG_SENSORS_ATK0110 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_I5K_AMB is not set
@@ -1433,6 +1467,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_FSCHER is not set
 # CONFIG_SENSORS_FSCPOS is not set
 # CONFIG_SENSORS_FSCHMD is not set
+# CONFIG_SENSORS_G760A is not set
 # CONFIG_SENSORS_GL518SM is not set
 # CONFIG_SENSORS_GL520SM is not set
 # CONFIG_SENSORS_CORETEMP is not set
@@ -1448,11 +1483,14 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_LM90 is not set
 # CONFIG_SENSORS_LM92 is not set
 # CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_LTC4215 is not set
 # CONFIG_SENSORS_LTC4245 is not set
+# CONFIG_SENSORS_LM95241 is not set
 # CONFIG_SENSORS_MAX1619 is not set
 # CONFIG_SENSORS_MAX6650 is not set
 # CONFIG_SENSORS_PC87360 is not set
 # CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_PCF8591 is not set
 # CONFIG_SENSORS_SIS5595 is not set
 # CONFIG_SENSORS_DME1737 is not set
 # CONFIG_SENSORS_SMSC47M1 is not set
@@ -1643,7 +1681,6 @@ CONFIG_FB_EFI=y
 # CONFIG_FB_3DFX is not set
 # CONFIG_FB_VOODOO1 is not set
 # CONFIG_FB_VT8623 is not set
-# CONFIG_FB_CYBLA is not set
 # CONFIG_FB_TRIDENT is not set
 # CONFIG_FB_ARK is not set
 # CONFIG_FB_PM3 is not set
@@ -1652,6 +1689,7 @@ CONFIG_FB_EFI=y
 # CONFIG_FB_VIRTUAL is not set
 # CONFIG_FB_METRONOME is not set
 # CONFIG_FB_MB862XX is not set
+# CONFIG_FB_BROADSHEET is not set
 CONFIG_BACKLIGHT_LCD_SUPPORT=y
 # CONFIG_LCD_CLASS_DEVICE is not set
 CONFIG_BACKLIGHT_CLASS_DEVICE=y
@@ -1738,6 +1776,8 @@ CONFIG_SND_PCI=y
 # CONFIG_SND_INDIGO is not set
 # CONFIG_SND_INDIGOIO is not set
 # CONFIG_SND_INDIGODJ is not set
+# CONFIG_SND_INDIGOIOX is not set
+# CONFIG_SND_INDIGODJX is not set
 # CONFIG_SND_EMU10K1 is not set
 # CONFIG_SND_EMU10K1X is not set
 # CONFIG_SND_ENS1370 is not set
@@ -1811,15 +1851,17 @@ CONFIG_USB_HIDDEV=y
 #
 # Special HID drivers
 #
-CONFIG_HID_COMPAT=y
 CONFIG_HID_A4TECH=y
 CONFIG_HID_APPLE=y
 CONFIG_HID_BELKIN=y
 CONFIG_HID_CHERRY=y
 CONFIG_HID_CHICONY=y
 CONFIG_HID_CYPRESS=y
+# CONFIG_DRAGONRISE_FF is not set
 CONFIG_HID_EZKEY=y
+CONFIG_HID_KYE=y
 CONFIG_HID_GYRATION=y
+CONFIG_HID_KENSINGTON=y
 CONFIG_HID_LOGITECH=y
 CONFIG_LOGITECH_FF=y
 # CONFIG_LOGIRUMBLEPAD2_FF is not set
@@ -1885,11 +1927,11 @@ CONFIG_USB_PRINTER=y
 # CONFIG_USB_TMC is not set
 
 #
-# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
 #
 
 #
-# see USB_STORAGE Help for more information
+# also be needed; see USB_STORAGE Help for more info
 #
 CONFIG_USB_STORAGE=y
 # CONFIG_USB_STORAGE_DEBUG is not set
@@ -1931,7 +1973,6 @@ CONFIG_USB_LIBUSUAL=y
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
-# CONFIG_USB_PHIDGET is not set
 # CONFIG_USB_IDMOUSE is not set
 # CONFIG_USB_FTDI_ELAN is not set
 # CONFIG_USB_APPLEDISPLAY is not set
@@ -1947,6 +1988,7 @@ CONFIG_USB_LIBUSUAL=y
 #
 # OTG and related infrastructure
 #
+# CONFIG_NOP_USB_XCEIV is not set
 # CONFIG_UWB is not set
 # CONFIG_MMC is not set
 # CONFIG_MEMSTICK is not set
@@ -1958,8 +2000,10 @@ CONFIG_LEDS_CLASS=y
 #
 # CONFIG_LEDS_ALIX2 is not set
 # CONFIG_LEDS_PCA9532 is not set
+# CONFIG_LEDS_LP5521 is not set
 # CONFIG_LEDS_CLEVO_MAIL is not set
 # CONFIG_LEDS_PCA955X is not set
+# CONFIG_LEDS_BD2802 is not set
 
 #
 # LED Triggers
@@ -1969,6 +2013,10 @@ CONFIG_LEDS_TRIGGERS=y
 # CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
 # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
 # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
+
+#
+# iptables trigger is under Netfilter config (LED target)
+#
 # CONFIG_ACCESSIBILITY is not set
 # CONFIG_INFINIBAND is not set
 CONFIG_EDAC=y
@@ -2037,6 +2085,7 @@ CONFIG_DMADEVICES=y
 # DMA Devices
 #
 # CONFIG_INTEL_IOATDMA is not set
+# CONFIG_AUXDISPLAY is not set
 # CONFIG_UIO is not set
 # CONFIG_STAGING is not set
 CONFIG_X86_PLATFORM_DEVICES=y
@@ -2071,6 +2120,7 @@ CONFIG_DMIID=y
 #
 # CONFIG_EXT2_FS is not set
 CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 CONFIG_EXT3_FS_XATTR=y
 CONFIG_EXT3_FS_POSIX_ACL=y
 CONFIG_EXT3_FS_SECURITY=y
@@ -2101,6 +2151,11 @@ CONFIG_AUTOFS4_FS=y
 CONFIG_GENERIC_ACL=y
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 CONFIG_ISO9660_FS=y
@@ -2151,6 +2206,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
@@ -2164,7 +2220,6 @@ CONFIG_NFS_ACL_SUPPORT=y
 CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=y
 CONFIG_SUNRPC_GSS=y
-# CONFIG_SUNRPC_REGISTER_V4 is not set
 CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
@@ -2251,6 +2306,7 @@ CONFIG_DEBUG_FS=y
 CONFIG_DEBUG_KERNEL=y
 # CONFIG_DEBUG_SHIRQ is not set
 # CONFIG_DETECT_SOFTLOCKUP is not set
+# CONFIG_DETECT_HUNG_TASK is not set
 # CONFIG_SCHED_DEBUG is not set
 CONFIG_SCHEDSTATS=y
 CONFIG_TIMER_STATS=y
@@ -2266,6 +2322,7 @@ CONFIG_TIMER_STATS=y
 # CONFIG_LOCK_STAT is not set
 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+CONFIG_STACKTRACE=y
 # CONFIG_DEBUG_KOBJECT is not set
 # CONFIG_DEBUG_HIGHMEM is not set
 CONFIG_DEBUG_BUGVERBOSE=y
@@ -2289,13 +2346,19 @@ CONFIG_FRAME_POINTER=y
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
+# CONFIG_DEBUG_PAGEALLOC is not set
 CONFIG_USER_STACKTRACE_SUPPORT=y
+CONFIG_NOP_TRACER=y
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
 CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
 CONFIG_HAVE_HW_BRANCH_TRACER=y
+CONFIG_HAVE_FTRACE_SYSCALLS=y
+CONFIG_RING_BUFFER=y
+CONFIG_TRACING=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
@@ -2305,13 +2368,21 @@ CONFIG_HAVE_HW_BRANCH_TRACER=y
 # CONFIG_SYSPROF_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_FTRACE_SYSCALLS is not set
 # CONFIG_BOOT_TRACER is not set
 # CONFIG_TRACE_BRANCH_PROFILING is not set
 # CONFIG_POWER_TRACER is not set
 # CONFIG_STACK_TRACER is not set
 # CONFIG_HW_BRANCH_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+CONFIG_BLK_DEV_IO_TRACE=y
+# CONFIG_FTRACE_STARTUP_TEST is not set
+# CONFIG_MMIOTRACE is not set
 CONFIG_PROVIDE_OHCI1394_DMA_INIT=y
-# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
@@ -2321,7 +2392,6 @@ CONFIG_EARLY_PRINTK=y
 CONFIG_EARLY_PRINTK_DBGP=y
 CONFIG_DEBUG_STACKOVERFLOW=y
 CONFIG_DEBUG_STACK_USAGE=y
-# CONFIG_DEBUG_PAGEALLOC is not set
 # CONFIG_DEBUG_PER_CPU_MAPS is not set
 # CONFIG_X86_PTDUMP is not set
 CONFIG_DEBUG_RODATA=y
@@ -2329,7 +2399,7 @@ CONFIG_DEBUG_RODATA=y
 CONFIG_DEBUG_NX_TEST=m
 # CONFIG_4KSTACKS is not set
 CONFIG_DOUBLEFAULT=y
-# CONFIG_MMIOTRACE is not set
+CONFIG_HAVE_MMIOTRACE_SUPPORT=y
 CONFIG_IO_DELAY_TYPE_0X80=0
 CONFIG_IO_DELAY_TYPE_0XED=1
 CONFIG_IO_DELAY_TYPE_UDELAY=2
@@ -2365,6 +2435,8 @@ CONFIG_SECURITY_SELINUX_AVC_STATS=y
 CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1
 # CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set
 # CONFIG_SECURITY_SMACK is not set
+# CONFIG_SECURITY_TOMOYO is not set
+# CONFIG_IMA is not set
 CONFIG_CRYPTO=y
 
 #
@@ -2380,10 +2452,12 @@ CONFIG_CRYPTO_BLKCIPHER2=y
 CONFIG_CRYPTO_HASH=y
 CONFIG_CRYPTO_HASH2=y
 CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
 CONFIG_CRYPTO_MANAGER=y
 CONFIG_CRYPTO_MANAGER2=y
 # CONFIG_CRYPTO_GF128MUL is not set
 # CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_WORKQUEUE=y
 # CONFIG_CRYPTO_CRYPTD is not set
 CONFIG_CRYPTO_AUTHENC=y
 # CONFIG_CRYPTO_TEST is not set
@@ -2456,6 +2530,7 @@ CONFIG_CRYPTO_DES=y
 # Compression
 #
 # CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
 # CONFIG_CRYPTO_LZO is not set
 
 #
@@ -2467,11 +2542,13 @@ CONFIG_CRYPTO_HW=y
 # CONFIG_CRYPTO_DEV_GEODE is not set
 # CONFIG_CRYPTO_DEV_HIFN_795X is not set
 CONFIG_HAVE_KVM=y
+CONFIG_HAVE_KVM_IRQCHIP=y
 CONFIG_VIRTUALIZATION=y
 # CONFIG_KVM is not set
 # CONFIG_LGUEST is not set
 # CONFIG_VIRTIO_PCI is not set
 # CONFIG_VIRTIO_BALLOON is not set
+CONFIG_BINARY_PRINTF=y
 
 #
 # Library routines
@@ -2489,7 +2566,10 @@ CONFIG_CRC32=y
 # CONFIG_LIBCRC32C is not set
 CONFIG_AUDIT_GENERIC=y
 CONFIG_ZLIB_INFLATE=y
-CONFIG_PLIST=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_LZMA=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/x86/configs/x86_64_defconfig b/arch/x86/configs/x86_64_defconfig
index 27b8ce0f5908..cee1dd2e69b2 100644
--- a/arch/x86/configs/x86_64_defconfig
+++ b/arch/x86/configs/x86_64_defconfig
@@ -1,12 +1,13 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29-rc4
-# Tue Feb 24 15:44:16 2009
+# Linux kernel version: 2.6.30-rc2
+# Mon May 11 16:22:00 2009
 #
 CONFIG_64BIT=y
 # CONFIG_X86_32 is not set
 CONFIG_X86_64=y
 CONFIG_X86=y
+CONFIG_OUTPUT_FORMAT="elf64-x86-64"
 CONFIG_ARCH_DEFCONFIG="arch/x86/configs/x86_64_defconfig"
 CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_CMOS_UPDATE=y
@@ -34,6 +35,7 @@ CONFIG_ARCH_HAS_CPU_RELAX=y
 CONFIG_ARCH_HAS_DEFAULT_IDLE=y
 CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
 CONFIG_HAVE_SETUP_PER_CPU_AREA=y
+CONFIG_HAVE_DYNAMIC_PER_CPU_AREA=y
 CONFIG_HAVE_CPUMASK_OF_CPU_MAP=y
 CONFIG_ARCH_HIBERNATION_POSSIBLE=y
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
@@ -41,14 +43,14 @@ CONFIG_ZONE_DMA32=y
 CONFIG_ARCH_POPULATES_NODE_MAP=y
 CONFIG_AUDIT_ARCH=y
 CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y
+CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
 CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_GENERIC_IRQ_PROBE=y
 CONFIG_GENERIC_PENDING_IRQ=y
-CONFIG_X86_SMP=y
 CONFIG_USE_GENERIC_SMP_HELPERS=y
 CONFIG_X86_64_SMP=y
 CONFIG_X86_HT=y
-CONFIG_X86_BIOS_REBOOT=y
 CONFIG_X86_TRAMPOLINE=y
 # CONFIG_KTIME_SCALAR is not set
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
@@ -61,10 +63,17 @@ CONFIG_LOCK_KERNEL=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 # CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_BZIP2=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
 CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
 CONFIG_BSD_PROCESS_ACCT=y
 # CONFIG_BSD_PROCESS_ACCT_V3 is not set
 CONFIG_TASKSTATS=y
@@ -114,23 +123,26 @@ CONFIG_PID_NS=y
 CONFIG_NET_NS=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
 # CONFIG_EMBEDDED is not set
 CONFIG_UID16=y
 CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 CONFIG_ELF_CORE=y
 CONFIG_PCSPKR_PLATFORM=y
-# CONFIG_COMPAT_BRK is not set
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
-CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
@@ -140,6 +152,7 @@ CONFIG_AIO=y
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_PCI_QUIRKS=y
 CONFIG_SLUB_DEBUG=y
+# CONFIG_COMPAT_BRK is not set
 # CONFIG_SLAB is not set
 CONFIG_SLUB=y
 # CONFIG_SLOB is not set
@@ -155,6 +168,8 @@ CONFIG_HAVE_IOREMAP_PROT=y
 CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+# CONFIG_SLOW_WORK is not set
 # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
@@ -167,7 +182,6 @@ CONFIG_MODULE_FORCE_UNLOAD=y
 # CONFIG_MODULE_SRCVERSION_ALL is not set
 CONFIG_STOP_MACHINE=y
 CONFIG_BLOCK=y
-CONFIG_BLK_DEV_IO_TRACE=y
 CONFIG_BLK_DEV_BSG=y
 # CONFIG_BLK_DEV_INTEGRITY is not set
 CONFIG_BLOCK_COMPAT=y
@@ -195,11 +209,10 @@ CONFIG_HIGH_RES_TIMERS=y
 CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
 CONFIG_SMP=y
 CONFIG_SPARSE_IRQ=y
-CONFIG_X86_FIND_SMP_CONFIG=y
 CONFIG_X86_MPPARSE=y
-# CONFIG_X86_ELAN is not set
-# CONFIG_X86_GENERICARCH is not set
+CONFIG_X86_EXTENDED_PLATFORM=y
 # CONFIG_X86_VSMP is not set
+# CONFIG_X86_UV is not set
 CONFIG_SCHED_OMIT_FRAME_POINTER=y
 # CONFIG_PARAVIRT_GUEST is not set
 # CONFIG_MEMTEST is not set
@@ -229,10 +242,10 @@ CONFIG_SCHED_OMIT_FRAME_POINTER=y
 # CONFIG_MCORE2 is not set
 CONFIG_GENERIC_CPU=y
 CONFIG_X86_CPU=y
-CONFIG_X86_L1_CACHE_BYTES=128
-CONFIG_X86_INTERNODE_CACHE_BYTES=128
+CONFIG_X86_L1_CACHE_BYTES=64
+CONFIG_X86_INTERNODE_CACHE_BYTES=64
 CONFIG_X86_CMPXCHG=y
-CONFIG_X86_L1_CACHE_SHIFT=7
+CONFIG_X86_L1_CACHE_SHIFT=6
 CONFIG_X86_WP_WORKS_OK=y
 CONFIG_X86_TSC=y
 CONFIG_X86_CMPXCHG64=y
@@ -241,7 +254,7 @@ CONFIG_X86_MINIMUM_CPU_FAMILY=64
 CONFIG_X86_DEBUGCTLMSR=y
 CONFIG_CPU_SUP_INTEL=y
 CONFIG_CPU_SUP_AMD=y
-CONFIG_CPU_SUP_CENTAUR_64=y
+CONFIG_CPU_SUP_CENTAUR=y
 CONFIG_X86_DS=y
 CONFIG_X86_PTRACE_BTS=y
 CONFIG_HPET_TIMER=y
@@ -268,6 +281,7 @@ CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS=y
 CONFIG_X86_MCE=y
 CONFIG_X86_MCE_INTEL=y
 CONFIG_X86_MCE_AMD=y
+CONFIG_X86_MCE_THRESHOLD=y
 # CONFIG_I8K is not set
 CONFIG_MICROCODE=y
 CONFIG_MICROCODE_INTEL=y
@@ -275,6 +289,7 @@ CONFIG_MICROCODE_AMD=y
 CONFIG_MICROCODE_OLD_INTERFACE=y
 CONFIG_X86_MSR=y
 CONFIG_X86_CPUID=y
+# CONFIG_X86_CPU_DEBUG is not set
 CONFIG_ARCH_PHYS_ADDR_T_64BIT=y
 CONFIG_DIRECT_GBPAGES=y
 CONFIG_NUMA=y
@@ -308,6 +323,8 @@ CONFIG_ZONE_DMA_FLAG=1
 CONFIG_BOUNCE=y
 CONFIG_VIRT_TO_BUS=y
 CONFIG_UNEVICTABLE_LRU=y
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_MLOCKED_PAGE_BIT=y
 CONFIG_X86_CHECK_BIOS_CORRUPTION=y
 CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK=y
 CONFIG_X86_RESERVE_LOW_64K=y
@@ -316,6 +333,7 @@ CONFIG_MTRR=y
 CONFIG_X86_PAT=y
 CONFIG_EFI=y
 CONFIG_SECCOMP=y
+# CONFIG_CC_STACKPROTECTOR is not set
 # CONFIG_HZ_100 is not set
 # CONFIG_HZ_250 is not set
 # CONFIG_HZ_300 is not set
@@ -324,9 +342,10 @@ CONFIG_HZ=1000
 CONFIG_SCHED_HRTICK=y
 CONFIG_KEXEC=y
 CONFIG_CRASH_DUMP=y
+# CONFIG_KEXEC_JUMP is not set
 CONFIG_PHYSICAL_START=0x1000000
-# CONFIG_RELOCATABLE is not set
-CONFIG_PHYSICAL_ALIGN=0x200000
+CONFIG_RELOCATABLE=y
+CONFIG_PHYSICAL_ALIGN=0x1000000
 CONFIG_HOTPLUG_CPU=y
 # CONFIG_COMPAT_VDSO is not set
 # CONFIG_CMDLINE_BOOL is not set
@@ -369,7 +388,6 @@ CONFIG_ACPI_NUMA=y
 CONFIG_ACPI_BLACKLIST_YEAR=0
 # CONFIG_ACPI_DEBUG is not set
 # CONFIG_ACPI_PCI_SLOT is not set
-CONFIG_ACPI_SYSTEM=y
 CONFIG_X86_PM_TIMER=y
 CONFIG_ACPI_CONTAINER=y
 # CONFIG_ACPI_SBS is not set
@@ -435,6 +453,7 @@ CONFIG_PCI_MSI=y
 # CONFIG_PCI_DEBUG is not set
 # CONFIG_PCI_STUB is not set
 CONFIG_HT_IRQ=y
+# CONFIG_PCI_IOV is not set
 CONFIG_ISA_DMA_API=y
 CONFIG_K8_NB=y
 CONFIG_PCCARD=y
@@ -480,7 +499,6 @@ CONFIG_NET=y
 #
 # Networking options
 #
-CONFIG_COMPAT_NET_DEV_OPS=y
 CONFIG_PACKET=y
 CONFIG_PACKET_MMAP=y
 CONFIG_UNIX=y
@@ -638,6 +656,7 @@ CONFIG_LLC=y
 # CONFIG_LAPB is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
 CONFIG_NET_SCHED=y
 
 #
@@ -695,6 +714,7 @@ CONFIG_NET_SCH_FIFO=y
 #
 # CONFIG_NET_PKTGEN is not set
 # CONFIG_NET_TCPPROBE is not set
+# CONFIG_NET_DROP_MONITOR is not set
 CONFIG_HAMRADIO=y
 
 #
@@ -705,12 +725,10 @@ CONFIG_HAMRADIO=y
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
-# CONFIG_PHONET is not set
 CONFIG_FIB_RULES=y
 CONFIG_WIRELESS=y
 CONFIG_CFG80211=y
 # CONFIG_CFG80211_REG_DEBUG is not set
-CONFIG_NL80211=y
 CONFIG_WIRELESS_OLD_REGULATORY=y
 CONFIG_WIRELESS_EXT=y
 CONFIG_WIRELESS_EXT_SYSFS=y
@@ -787,9 +805,8 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_TIFM_CORE is not set
 # CONFIG_ICS932S401 is not set
 # CONFIG_ENCLOSURE_SERVICES is not set
-# CONFIG_SGI_XP is not set
 # CONFIG_HP_ILO is not set
-# CONFIG_SGI_GRU is not set
+# CONFIG_ISL29003 is not set
 # CONFIG_C2PORT is not set
 
 #
@@ -843,6 +860,7 @@ CONFIG_SCSI_SPI_ATTRS=y
 # CONFIG_SCSI_LOWLEVEL is not set
 # CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
 # CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
 CONFIG_ATA=y
 # CONFIG_ATA_NONSTANDARD is not set
 CONFIG_ATA_ACPI=y
@@ -939,6 +957,7 @@ CONFIG_DM_ZERO=y
 CONFIG_MACINTOSH_DRIVERS=y
 CONFIG_MAC_EMUMOUSEBTN=y
 CONFIG_NETDEVICES=y
+CONFIG_COMPAT_NET_DEV_OPS=y
 # CONFIG_IFB is not set
 # CONFIG_DUMMY is not set
 # CONFIG_BONDING is not set
@@ -976,6 +995,8 @@ CONFIG_MII=y
 CONFIG_NET_VENDOR_3COM=y
 # CONFIG_VORTEX is not set
 # CONFIG_TYPHOON is not set
+# CONFIG_ETHOC is not set
+# CONFIG_DNET is not set
 CONFIG_NET_TULIP=y
 # CONFIG_DE2104X is not set
 # CONFIG_TULIP is not set
@@ -1025,6 +1046,7 @@ CONFIG_E1000=y
 # CONFIG_E1000E is not set
 # CONFIG_IP1000 is not set
 # CONFIG_IGB is not set
+# CONFIG_IGBVF is not set
 # CONFIG_NS83820 is not set
 # CONFIG_HAMACHI is not set
 # CONFIG_YELLOWFIN is not set
@@ -1039,6 +1061,7 @@ CONFIG_TIGON3=y
 # CONFIG_QLA3XXX is not set
 # CONFIG_ATL1 is not set
 # CONFIG_ATL1E is not set
+# CONFIG_ATL1C is not set
 # CONFIG_JME is not set
 CONFIG_NETDEV_10000=y
 # CONFIG_CHELSIO_T1 is not set
@@ -1048,6 +1071,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_IXGBE is not set
 # CONFIG_IXGB is not set
 # CONFIG_S2IO is not set
+# CONFIG_VXGE is not set
 # CONFIG_MYRI10GE is not set
 # CONFIG_NETXEN_NIC is not set
 # CONFIG_NIU is not set
@@ -1057,6 +1081,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y
 # CONFIG_BNX2X is not set
 # CONFIG_QLGE is not set
 # CONFIG_SFC is not set
+# CONFIG_BE2NET is not set
 CONFIG_TR=y
 # CONFIG_IBMOL is not set
 # CONFIG_3C359 is not set
@@ -1071,8 +1096,8 @@ CONFIG_WLAN_80211=y
 # CONFIG_LIBERTAS is not set
 # CONFIG_LIBERTAS_THINFIRM is not set
 # CONFIG_AIRO is not set
-# CONFIG_HERMES is not set
 # CONFIG_ATMEL is not set
+# CONFIG_AT76C50X_USB is not set
 # CONFIG_AIRO_CS is not set
 # CONFIG_PCMCIA_WL3501 is not set
 # CONFIG_PRISM54 is not set
@@ -1082,21 +1107,21 @@ CONFIG_WLAN_80211=y
 # CONFIG_RTL8187 is not set
 # CONFIG_ADM8211 is not set
 # CONFIG_MAC80211_HWSIM is not set
+# CONFIG_MWL8K is not set
 # CONFIG_P54_COMMON is not set
 CONFIG_ATH5K=y
 # CONFIG_ATH5K_DEBUG is not set
 # CONFIG_ATH9K is not set
+# CONFIG_AR9170_USB is not set
 # CONFIG_IPW2100 is not set
 # CONFIG_IPW2200 is not set
-# CONFIG_IWLCORE is not set
-# CONFIG_IWLWIFI_LEDS is not set
-# CONFIG_IWLAGN is not set
-# CONFIG_IWL3945 is not set
+# CONFIG_IWLWIFI is not set
 # CONFIG_HOSTAP is not set
 # CONFIG_B43 is not set
 # CONFIG_B43LEGACY is not set
 # CONFIG_ZD1211RW is not set
 # CONFIG_RT2X00 is not set
+# CONFIG_HERMES is not set
 
 #
 # Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -1207,6 +1232,8 @@ CONFIG_INPUT_TABLET=y
 # CONFIG_TABLET_USB_KBTAB is not set
 # CONFIG_TABLET_USB_WACOM is not set
 CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
+# CONFIG_TOUCHSCREEN_AD7879 is not set
 # CONFIG_TOUCHSCREEN_FUJITSU is not set
 # CONFIG_TOUCHSCREEN_GUNZE is not set
 # CONFIG_TOUCHSCREEN_ELO is not set
@@ -1300,6 +1327,7 @@ CONFIG_UNIX98_PTYS=y
 # CONFIG_LEGACY_PTYS is not set
 # CONFIG_IPMI_HANDLER is not set
 CONFIG_HW_RANDOM=y
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
 # CONFIG_HW_RANDOM_INTEL is not set
 # CONFIG_HW_RANDOM_AMD is not set
 CONFIG_NVRAM=y
@@ -1381,7 +1409,6 @@ CONFIG_I2C_I801=y
 # CONFIG_SENSORS_PCF8574 is not set
 # CONFIG_PCF8575 is not set
 # CONFIG_SENSORS_PCA9539 is not set
-# CONFIG_SENSORS_PCF8591 is not set
 # CONFIG_SENSORS_MAX6875 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
@@ -1415,6 +1442,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_ADT7475 is not set
 # CONFIG_SENSORS_K8TEMP is not set
 # CONFIG_SENSORS_ASB100 is not set
+# CONFIG_SENSORS_ATK0110 is not set
 # CONFIG_SENSORS_ATXP1 is not set
 # CONFIG_SENSORS_DS1621 is not set
 # CONFIG_SENSORS_I5K_AMB is not set
@@ -1424,6 +1452,7 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_FSCHER is not set
 # CONFIG_SENSORS_FSCPOS is not set
 # CONFIG_SENSORS_FSCHMD is not set
+# CONFIG_SENSORS_G760A is not set
 # CONFIG_SENSORS_GL518SM is not set
 # CONFIG_SENSORS_GL520SM is not set
 # CONFIG_SENSORS_CORETEMP is not set
@@ -1439,11 +1468,14 @@ CONFIG_HWMON=y
 # CONFIG_SENSORS_LM90 is not set
 # CONFIG_SENSORS_LM92 is not set
 # CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_LTC4215 is not set
 # CONFIG_SENSORS_LTC4245 is not set
+# CONFIG_SENSORS_LM95241 is not set
 # CONFIG_SENSORS_MAX1619 is not set
 # CONFIG_SENSORS_MAX6650 is not set
 # CONFIG_SENSORS_PC87360 is not set
 # CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_PCF8591 is not set
 # CONFIG_SENSORS_SIS5595 is not set
 # CONFIG_SENSORS_DME1737 is not set
 # CONFIG_SENSORS_SMSC47M1 is not set
@@ -1634,6 +1666,7 @@ CONFIG_FB_EFI=y
 # CONFIG_FB_VIRTUAL is not set
 # CONFIG_FB_METRONOME is not set
 # CONFIG_FB_MB862XX is not set
+# CONFIG_FB_BROADSHEET is not set
 CONFIG_BACKLIGHT_LCD_SUPPORT=y
 # CONFIG_LCD_CLASS_DEVICE is not set
 CONFIG_BACKLIGHT_CLASS_DEVICE=y
@@ -1719,6 +1752,8 @@ CONFIG_SND_PCI=y
 # CONFIG_SND_INDIGO is not set
 # CONFIG_SND_INDIGOIO is not set
 # CONFIG_SND_INDIGODJ is not set
+# CONFIG_SND_INDIGOIOX is not set
+# CONFIG_SND_INDIGODJX is not set
 # CONFIG_SND_EMU10K1 is not set
 # CONFIG_SND_EMU10K1X is not set
 # CONFIG_SND_ENS1370 is not set
@@ -1791,15 +1826,17 @@ CONFIG_USB_HIDDEV=y
 #
 # Special HID drivers
 #
-CONFIG_HID_COMPAT=y
 CONFIG_HID_A4TECH=y
 CONFIG_HID_APPLE=y
 CONFIG_HID_BELKIN=y
 CONFIG_HID_CHERRY=y
 CONFIG_HID_CHICONY=y
 CONFIG_HID_CYPRESS=y
+# CONFIG_DRAGONRISE_FF is not set
 CONFIG_HID_EZKEY=y
+CONFIG_HID_KYE=y
 CONFIG_HID_GYRATION=y
+CONFIG_HID_KENSINGTON=y
 CONFIG_HID_LOGITECH=y
 CONFIG_LOGITECH_FF=y
 # CONFIG_LOGIRUMBLEPAD2_FF is not set
@@ -1865,11 +1902,11 @@ CONFIG_USB_PRINTER=y
 # CONFIG_USB_TMC is not set
 
 #
-# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
 #
 
 #
-# see USB_STORAGE Help for more information
+# also be needed; see USB_STORAGE Help for more info
 #
 CONFIG_USB_STORAGE=y
 # CONFIG_USB_STORAGE_DEBUG is not set
@@ -1911,7 +1948,6 @@ CONFIG_USB_LIBUSUAL=y
 # CONFIG_USB_LED is not set
 # CONFIG_USB_CYPRESS_CY7C63 is not set
 # CONFIG_USB_CYTHERM is not set
-# CONFIG_USB_PHIDGET is not set
 # CONFIG_USB_IDMOUSE is not set
 # CONFIG_USB_FTDI_ELAN is not set
 # CONFIG_USB_APPLEDISPLAY is not set
@@ -1927,6 +1963,7 @@ CONFIG_USB_LIBUSUAL=y
 #
 # OTG and related infrastructure
 #
+# CONFIG_NOP_USB_XCEIV is not set
 # CONFIG_UWB is not set
 # CONFIG_MMC is not set
 # CONFIG_MEMSTICK is not set
@@ -1938,8 +1975,10 @@ CONFIG_LEDS_CLASS=y
 #
 # CONFIG_LEDS_ALIX2 is not set
 # CONFIG_LEDS_PCA9532 is not set
+# CONFIG_LEDS_LP5521 is not set
 # CONFIG_LEDS_CLEVO_MAIL is not set
 # CONFIG_LEDS_PCA955X is not set
+# CONFIG_LEDS_BD2802 is not set
 
 #
 # LED Triggers
@@ -1949,6 +1988,10 @@ CONFIG_LEDS_TRIGGERS=y
 # CONFIG_LEDS_TRIGGER_HEARTBEAT is not set
 # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
 # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
+
+#
+# iptables trigger is under Netfilter config (LED target)
+#
 # CONFIG_ACCESSIBILITY is not set
 # CONFIG_INFINIBAND is not set
 CONFIG_EDAC=y
@@ -2017,6 +2060,7 @@ CONFIG_DMADEVICES=y
 # DMA Devices
 #
 # CONFIG_INTEL_IOATDMA is not set
+# CONFIG_AUXDISPLAY is not set
 # CONFIG_UIO is not set
 # CONFIG_STAGING is not set
 CONFIG_X86_PLATFORM_DEVICES=y
@@ -2050,6 +2094,7 @@ CONFIG_DMIID=y
 #
 # CONFIG_EXT2_FS is not set
 CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 CONFIG_EXT3_FS_XATTR=y
 CONFIG_EXT3_FS_POSIX_ACL=y
 CONFIG_EXT3_FS_SECURITY=y
@@ -2081,6 +2126,11 @@ CONFIG_AUTOFS4_FS=y
 CONFIG_GENERIC_ACL=y
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 CONFIG_ISO9660_FS=y
@@ -2131,6 +2181,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
@@ -2144,7 +2195,6 @@ CONFIG_NFS_ACL_SUPPORT=y
 CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=y
 CONFIG_SUNRPC_GSS=y
-# CONFIG_SUNRPC_REGISTER_V4 is not set
 CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
@@ -2231,6 +2281,7 @@ CONFIG_DEBUG_FS=y
 CONFIG_DEBUG_KERNEL=y
 # CONFIG_DEBUG_SHIRQ is not set
 # CONFIG_DETECT_SOFTLOCKUP is not set
+# CONFIG_DETECT_HUNG_TASK is not set
 # CONFIG_SCHED_DEBUG is not set
 CONFIG_SCHEDSTATS=y
 CONFIG_TIMER_STATS=y
@@ -2246,6 +2297,7 @@ CONFIG_TIMER_STATS=y
 # CONFIG_LOCK_STAT is not set
 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set
 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+CONFIG_STACKTRACE=y
 # CONFIG_DEBUG_KOBJECT is not set
 CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_DEBUG_INFO is not set
@@ -2268,13 +2320,19 @@ CONFIG_FRAME_POINTER=y
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
+# CONFIG_DEBUG_PAGEALLOC is not set
 CONFIG_USER_STACKTRACE_SUPPORT=y
+CONFIG_NOP_TRACER=y
 CONFIG_HAVE_FUNCTION_TRACER=y
 CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
 CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
 CONFIG_HAVE_DYNAMIC_FTRACE=y
 CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
 CONFIG_HAVE_HW_BRANCH_TRACER=y
+CONFIG_HAVE_FTRACE_SYSCALLS=y
+CONFIG_RING_BUFFER=y
+CONFIG_TRACING=y
+CONFIG_TRACING_SUPPORT=y
 
 #
 # Tracers
@@ -2284,13 +2342,21 @@ CONFIG_HAVE_HW_BRANCH_TRACER=y
 # CONFIG_SYSPROF_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_FTRACE_SYSCALLS is not set
 # CONFIG_BOOT_TRACER is not set
 # CONFIG_TRACE_BRANCH_PROFILING is not set
 # CONFIG_POWER_TRACER is not set
 # CONFIG_STACK_TRACER is not set
 # CONFIG_HW_BRANCH_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+CONFIG_BLK_DEV_IO_TRACE=y
+# CONFIG_FTRACE_STARTUP_TEST is not set
+# CONFIG_MMIOTRACE is not set
 CONFIG_PROVIDE_OHCI1394_DMA_INIT=y
-# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_DMA_API_DEBUG is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
@@ -2300,14 +2366,13 @@ CONFIG_EARLY_PRINTK=y
 CONFIG_EARLY_PRINTK_DBGP=y
 CONFIG_DEBUG_STACKOVERFLOW=y
 CONFIG_DEBUG_STACK_USAGE=y
-# CONFIG_DEBUG_PAGEALLOC is not set
 # CONFIG_DEBUG_PER_CPU_MAPS is not set
 # CONFIG_X86_PTDUMP is not set
 CONFIG_DEBUG_RODATA=y
 # CONFIG_DEBUG_RODATA_TEST is not set
 CONFIG_DEBUG_NX_TEST=m
 # CONFIG_IOMMU_DEBUG is not set
-# CONFIG_MMIOTRACE is not set
+CONFIG_HAVE_MMIOTRACE_SUPPORT=y
 CONFIG_IO_DELAY_TYPE_0X80=0
 CONFIG_IO_DELAY_TYPE_0XED=1
 CONFIG_IO_DELAY_TYPE_UDELAY=2
@@ -2343,6 +2408,8 @@ CONFIG_SECURITY_SELINUX_AVC_STATS=y
 CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1
 # CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set
 # CONFIG_SECURITY_SMACK is not set
+# CONFIG_SECURITY_TOMOYO is not set
+# CONFIG_IMA is not set
 CONFIG_CRYPTO=y
 
 #
@@ -2358,10 +2425,12 @@ CONFIG_CRYPTO_BLKCIPHER2=y
 CONFIG_CRYPTO_HASH=y
 CONFIG_CRYPTO_HASH2=y
 CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
 CONFIG_CRYPTO_MANAGER=y
 CONFIG_CRYPTO_MANAGER2=y
 # CONFIG_CRYPTO_GF128MUL is not set
 # CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_WORKQUEUE=y
 # CONFIG_CRYPTO_CRYPTD is not set
 CONFIG_CRYPTO_AUTHENC=y
 # CONFIG_CRYPTO_TEST is not set
@@ -2413,6 +2482,7 @@ CONFIG_CRYPTO_SHA1=y
 #
 CONFIG_CRYPTO_AES=y
 # CONFIG_CRYPTO_AES_X86_64 is not set
+# CONFIG_CRYPTO_AES_NI_INTEL is not set
 # CONFIG_CRYPTO_ANUBIS is not set
 CONFIG_CRYPTO_ARC4=y
 # CONFIG_CRYPTO_BLOWFISH is not set
@@ -2434,6 +2504,7 @@ CONFIG_CRYPTO_DES=y
 # Compression
 #
 # CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
 # CONFIG_CRYPTO_LZO is not set
 
 #
@@ -2443,10 +2514,12 @@ CONFIG_CRYPTO_DES=y
 CONFIG_CRYPTO_HW=y
 # CONFIG_CRYPTO_DEV_HIFN_795X is not set
 CONFIG_HAVE_KVM=y
+CONFIG_HAVE_KVM_IRQCHIP=y
 CONFIG_VIRTUALIZATION=y
 # CONFIG_KVM is not set
 # CONFIG_VIRTIO_PCI is not set
 # CONFIG_VIRTIO_BALLOON is not set
+CONFIG_BINARY_PRINTF=y
 
 #
 # Library routines
@@ -2463,7 +2536,10 @@ CONFIG_CRC32=y
 # CONFIG_CRC7 is not set
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
-CONFIG_PLIST=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_LZMA=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/x86/ia32/ia32entry.S b/arch/x86/ia32/ia32entry.S
index a505202086e8..e590261ba059 100644
--- a/arch/x86/ia32/ia32entry.S
+++ b/arch/x86/ia32/ia32entry.S
@@ -825,9 +825,11 @@ ia32_sys_call_table:
         .quad compat_sys_signalfd4
         .quad sys_eventfd2
         .quad sys_epoll_create1
-        .quad sys_dup3                  /* 330 */
+        .quad sys_dup3                          /* 330 */
         .quad sys_pipe2
         .quad sys_inotify_init1
         .quad compat_sys_preadv
         .quad compat_sys_pwritev
+        .quad compat_sys_rt_tgsigqueueinfo      /* 335 */
+        .quad sys_perf_counter_open
 ia32_syscall_end:
diff --git a/arch/x86/include/asm/alternative.h b/arch/x86/include/asm/alternative.h
index f6aa18eadf71..1a37bcdc8606 100644
--- a/arch/x86/include/asm/alternative.h
+++ b/arch/x86/include/asm/alternative.h
@@ -3,6 +3,7 @@
 
 #include <linux/types.h>
 #include <linux/stddef.h>
+#include <linux/stringify.h>
 #include <asm/asm.h>
 
 /*
@@ -74,6 +75,22 @@ static inline void alternatives_smp_switch(int smp) {}
 
 const unsigned char *const *find_nop_table(void);
 
+/* alternative assembly primitive: */
+#define ALTERNATIVE(oldinstr, newinstr, feature)                        \
+                                                                        \
+      "661:\n\t" oldinstr "\n662:\n"                                    \
+      ".section .altinstructions,\"a\"\n"                               \
+      _ASM_ALIGN "\n"                                                   \
+      _ASM_PTR "661b\n"                         /* label           */   \
+      _ASM_PTR "663f\n"                         /* new instruction */   \
+      "  .byte " __stringify(feature) "\n"      /* feature bit     */   \
+      "  .byte 662b-661b\n"                     /* sourcelen       */   \
+      "  .byte 664f-663f\n"                     /* replacementlen  */   \
+      ".previous\n"                                                     \
+      ".section .altinstr_replacement, \"ax\"\n"                        \
+      "663:\n\t" newinstr "\n664:\n"            /* replacement     */   \
+      ".previous"
+
 /*
  * Alternative instructions for different CPU types or capabilities.
  *
@@ -87,18 +104,7 @@ const unsigned char *const *find_nop_table(void);
  * without volatile and memory clobber.
  */
 #define alternative(oldinstr, newinstr, feature)                        \
-        asm volatile ("661:\n\t" oldinstr "\n662:\n"                    \
-                      ".section .altinstructions,\"a\"\n"               \
-                      _ASM_ALIGN "\n"                                   \
-                      _ASM_PTR "661b\n"         /* label */             \
-                      _ASM_PTR "663f\n"         /* new instruction */   \
-                      "  .byte %c0\n"           /* feature bit */       \
-                      "  .byte 662b-661b\n"     /* sourcelen */         \
-                      "  .byte 664f-663f\n"     /* replacementlen */    \
-                      ".previous\n"                                     \
-                      ".section .altinstr_replacement,\"ax\"\n"         \
-                      "663:\n\t" newinstr "\n664:\n"  /* replacement */ \
-                      ".previous" :: "i" (feature) : "memory")
+        asm volatile (ALTERNATIVE(oldinstr, newinstr, feature) : : : "memory")
 
 /*
  * Alternative inline assembly with input.
@@ -109,35 +115,16 @@ const unsigned char *const *find_nop_table(void);
  * Best is to use constraints that are fixed size (like (%1) ... "r")
  * If you use variable sized constraints like "m" or "g" in the
  * replacement make sure to pad to the worst case length.
+ * Leaving an unused argument 0 to keep API compatibility.
  */
 #define alternative_input(oldinstr, newinstr, feature, input...)        \
-        asm volatile ("661:\n\t" oldinstr "\n662:\n"                    \
-                      ".section .altinstructions,\"a\"\n"               \
-                      _ASM_ALIGN "\n"                                   \
-                      _ASM_PTR "661b\n"         /* label */             \
-                      _ASM_PTR "663f\n"         /* new instruction */   \
-                      "  .byte %c0\n"           /* feature bit */       \
-                      "  .byte 662b-661b\n"     /* sourcelen */         \
-                      "  .byte 664f-663f\n"     /* replacementlen */    \
-                      ".previous\n"                                     \
-                      ".section .altinstr_replacement,\"ax\"\n"         \
-                      "663:\n\t" newinstr "\n664:\n"  /* replacement */ \
-                      ".previous" :: "i" (feature), ##input)
+        asm volatile (ALTERNATIVE(oldinstr, newinstr, feature)          \
+                : : "i" (0), ## input)
 
 /* Like alternative_input, but with a single output argument */
 #define alternative_io(oldinstr, newinstr, feature, output, input...)   \
-        asm volatile ("661:\n\t" oldinstr "\n662:\n"                    \
-                      ".section .altinstructions,\"a\"\n"               \
-                      _ASM_ALIGN "\n"                                   \
-                      _ASM_PTR "661b\n"         /* label */             \
-                      _ASM_PTR "663f\n"         /* new instruction */   \
-                      "  .byte %c[feat]\n"      /* feature bit */       \
-                      "  .byte 662b-661b\n"     /* sourcelen */         \
-                      "  .byte 664f-663f\n"     /* replacementlen */    \
-                      ".previous\n"                                     \
-                      ".section .altinstr_replacement,\"ax\"\n"         \
-                      "663:\n\t" newinstr "\n664:\n"  /* replacement */ \
-                      ".previous" : output : [feat] "i" (feature), ##input)
+        asm volatile (ALTERNATIVE(oldinstr, newinstr, feature)          \
+                : output : "i" (0), ## input)
 
 /*
  * use this macro(s) if you need more than one output parameter
diff --git a/arch/x86/include/asm/amd_iommu.h b/arch/x86/include/asm/amd_iommu.h
index f712344329bc..262e02820049 100644
--- a/arch/x86/include/asm/amd_iommu.h
+++ b/arch/x86/include/asm/amd_iommu.h
@@ -27,6 +27,8 @@ extern int amd_iommu_init(void);
 extern int amd_iommu_init_dma_ops(void);
 extern void amd_iommu_detect(void);
 extern irqreturn_t amd_iommu_int_handler(int irq, void *data);
+extern void amd_iommu_flush_all_domains(void);
+extern void amd_iommu_flush_all_devices(void);
 #else
 static inline int amd_iommu_init(void) { return -ENODEV; }
 static inline void amd_iommu_detect(void) { }
diff --git a/arch/x86/include/asm/amd_iommu_types.h b/arch/x86/include/asm/amd_iommu_types.h
index 95c8cd9d22b5..0c878caaa0a2 100644
--- a/arch/x86/include/asm/amd_iommu_types.h
+++ b/arch/x86/include/asm/amd_iommu_types.h
@@ -194,6 +194,27 @@
 #define PD_DMA_OPS_MASK         (1UL << 0) /* domain used for dma_ops */
 #define PD_DEFAULT_MASK         (1UL << 1) /* domain is a default dma_ops
                                               domain for an IOMMU */
+extern bool amd_iommu_dump;
+#define DUMP_printk(format, arg...)                                     \
+        do {                                                            \
+                if (amd_iommu_dump)                                             \
+                        printk(KERN_INFO "AMD IOMMU: " format, ## arg); \
+        } while(0);
+
+/*
+ * Make iterating over all IOMMUs easier
+ */
+#define for_each_iommu(iommu) \
+        list_for_each_entry((iommu), &amd_iommu_list, list)
+#define for_each_iommu_safe(iommu, next) \
+        list_for_each_entry_safe((iommu), (next), &amd_iommu_list, list)
+
+#define APERTURE_RANGE_SHIFT    27      /* 128 MB */
+#define APERTURE_RANGE_SIZE     (1ULL << APERTURE_RANGE_SHIFT)
+#define APERTURE_RANGE_PAGES    (APERTURE_RANGE_SIZE >> PAGE_SHIFT)
+#define APERTURE_MAX_RANGES     32      /* allows 4GB of DMA address space */
+#define APERTURE_RANGE_INDEX(a) ((a) >> APERTURE_RANGE_SHIFT)
+#define APERTURE_PAGE_INDEX(a)  (((a) >> 21) & 0x3fULL)
 
 /*
  * This structure contains generic data for  IOMMU protection domains
@@ -210,6 +231,26 @@ struct protection_domain {
 };
 
 /*
+ * For dynamic growth the aperture size is split into ranges of 128MB of
+ * DMA address space each. This struct represents one such range.
+ */
+struct aperture_range {
+
+        /* address allocation bitmap */
+        unsigned long *bitmap;
+
+        /*
+         * Array of PTE pages for the aperture. In this array we save all the
+         * leaf pages of the domain page table used for the aperture. This way
+         * we don't need to walk the page table to find a specific PTE. We can
+         * just calculate its address in constant time.
+         */
+        u64 *pte_pages[64];
+
+        unsigned long offset;
+};
+
+/*
  * Data container for a dma_ops specific protection domain
  */
 struct dma_ops_domain {
@@ -222,18 +263,10 @@ struct dma_ops_domain {
         unsigned long aperture_size;
 
         /* address we start to search for free addresses */
-        unsigned long next_bit;
-
-        /* address allocation bitmap */
-        unsigned long *bitmap;
+        unsigned long next_address;
 
-        /*
-         * Array of PTE pages for the aperture. In this array we save all the
-         * leaf pages of the domain page table used for the aperture. This way
-         * we don't need to walk the page table to find a specific PTE. We can
-         * just calculate its address in constant time.
-         */
-        u64 **pte_pages;
+        /* address space relevant data */
+        struct aperture_range *aperture[APERTURE_MAX_RANGES];
 
         /* This will be set to true when TLB needs to be flushed */
         bool need_flush;
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index 3738438a91f5..bb7d47925847 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -402,7 +402,7 @@ static inline unsigned default_get_apic_id(unsigned long x)
 {
         unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR));
 
-        if (APIC_XAPIC(ver))
+        if (APIC_XAPIC(ver) || boot_cpu_has(X86_FEATURE_EXTD_APICID))
                 return (x >> 24) & 0xFF;
         else
                 return (x >> 24) & 0x0F;
@@ -470,6 +470,9 @@ static inline unsigned int read_apic_id(void)
 extern void default_setup_apic_routing(void);
 
 #ifdef CONFIG_X86_32
+
+extern struct apic apic_default;
+
 /*
  * Set up the logical destination ID.
  *
diff --git a/arch/x86/include/asm/atomic_32.h b/arch/x86/include/asm/atomic_32.h
index 85b46fba4229..aff9f1fcdcd7 100644
--- a/arch/x86/include/asm/atomic_32.h
+++ b/arch/x86/include/asm/atomic_32.h
@@ -247,5 +247,241 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u)
 #define smp_mb__before_atomic_inc()     barrier()
 #define smp_mb__after_atomic_inc()      barrier()
 
+/* An 64bit atomic type */
+
+typedef struct {
+        unsigned long long counter;
+} atomic64_t;
+
+#define ATOMIC64_INIT(val)      { (val) }
+
+/**
+ * atomic64_read - read atomic64 variable
+ * @v: pointer of type atomic64_t
+ *
+ * Atomically reads the value of @v.
+ * Doesn't imply a read memory barrier.
+ */
+#define __atomic64_read(ptr)            ((ptr)->counter)
+
+static inline unsigned long long
+cmpxchg8b(unsigned long long *ptr, unsigned long long old, unsigned long long new)
+{
+        asm volatile(
+
+                LOCK_PREFIX "cmpxchg8b (%[ptr])\n"
+
+                     :          "=A" (old)
+
+                     : [ptr]    "D" (ptr),
+                                "A" (old),
+                                "b" (ll_low(new)),
+                                "c" (ll_high(new))
+
+                     : "memory");
+
+        return old;
+}
+
+static inline unsigned long long
+atomic64_cmpxchg(atomic64_t *ptr, unsigned long long old_val,
+                 unsigned long long new_val)
+{
+        return cmpxchg8b(&ptr->counter, old_val, new_val);
+}
+
+/**
+ * atomic64_xchg - xchg atomic64 variable
+ * @ptr:      pointer to type atomic64_t
+ * @new_val:  value to assign
+ * @old_val:  old value that was there
+ *
+ * Atomically xchgs the value of @ptr to @new_val and returns
+ * the old value.
+ */
+
+static inline unsigned long long
+atomic64_xchg(atomic64_t *ptr, unsigned long long new_val)
+{
+        unsigned long long old_val;
+
+        do {
+                old_val = atomic_read(ptr);
+        } while (atomic64_cmpxchg(ptr, old_val, new_val) != old_val);
+
+        return old_val;
+}
+
+/**
+ * atomic64_set - set atomic64 variable
+ * @ptr:      pointer to type atomic64_t
+ * @new_val:  value to assign
+ *
+ * Atomically sets the value of @ptr to @new_val.
+ */
+static inline void atomic64_set(atomic64_t *ptr, unsigned long long new_val)
+{
+        atomic64_xchg(ptr, new_val);
+}
+
+/**
+ * atomic64_read - read atomic64 variable
+ * @ptr:      pointer to type atomic64_t
+ *
+ * Atomically reads the value of @ptr and returns it.
+ */
+static inline unsigned long long atomic64_read(atomic64_t *ptr)
+{
+        unsigned long long curr_val;
+
+        do {
+                curr_val = __atomic64_read(ptr);
+        } while (atomic64_cmpxchg(ptr, curr_val, curr_val) != curr_val);
+
+        return curr_val;
+}
+
+/**
+ * atomic64_add_return - add and return
+ * @delta: integer value to add
+ * @ptr:   pointer to type atomic64_t
+ *
+ * Atomically adds @delta to @ptr and returns @delta + *@ptr
+ */
+static inline unsigned long long
+atomic64_add_return(unsigned long long delta, atomic64_t *ptr)
+{
+        unsigned long long old_val, new_val;
+
+        do {
+                old_val = atomic_read(ptr);
+                new_val = old_val + delta;
+
+        } while (atomic64_cmpxchg(ptr, old_val, new_val) != old_val);
+
+        return new_val;
+}
+
+static inline long atomic64_sub_return(unsigned long long delta, atomic64_t *ptr)
+{
+        return atomic64_add_return(-delta, ptr);
+}
+
+static inline long atomic64_inc_return(atomic64_t *ptr)
+{
+        return atomic64_add_return(1, ptr);
+}
+
+static inline long atomic64_dec_return(atomic64_t *ptr)
+{
+        return atomic64_sub_return(1, ptr);
+}
+
+/**
+ * atomic64_add - add integer to atomic64 variable
+ * @delta: integer value to add
+ * @ptr:   pointer to type atomic64_t
+ *
+ * Atomically adds @delta to @ptr.
+ */
+static inline void atomic64_add(unsigned long long delta, atomic64_t *ptr)
+{
+        atomic64_add_return(delta, ptr);
+}
+
+/**
+ * atomic64_sub - subtract the atomic64 variable
+ * @delta: integer value to subtract
+ * @ptr:   pointer to type atomic64_t
+ *
+ * Atomically subtracts @delta from @ptr.
+ */
+static inline void atomic64_sub(unsigned long long delta, atomic64_t *ptr)
+{
+        atomic64_add(-delta, ptr);
+}
+
+/**
+ * atomic64_sub_and_test - subtract value from variable and test result
+ * @delta: integer value to subtract
+ * @ptr:   pointer to type atomic64_t
+ *
+ * Atomically subtracts @delta from @ptr and returns
+ * true if the result is zero, or false for all
+ * other cases.
+ */
+static inline int
+atomic64_sub_and_test(unsigned long long delta, atomic64_t *ptr)
+{
+        unsigned long long old_val = atomic64_sub_return(delta, ptr);
+
+        return old_val == 0;
+}
+
+/**
+ * atomic64_inc - increment atomic64 variable
+ * @ptr: pointer to type atomic64_t
+ *
+ * Atomically increments @ptr by 1.
+ */
+static inline void atomic64_inc(atomic64_t *ptr)
+{
+        atomic64_add(1, ptr);
+}
+
+/**
+ * atomic64_dec - decrement atomic64 variable
+ * @ptr: pointer to type atomic64_t
+ *
+ * Atomically decrements @ptr by 1.
+ */
+static inline void atomic64_dec(atomic64_t *ptr)
+{
+        atomic64_sub(1, ptr);
+}
+
+/**
+ * atomic64_dec_and_test - decrement and test
+ * @ptr: pointer to type atomic64_t
+ *
+ * Atomically decrements @ptr by 1 and
+ * returns true if the result is 0, or false for all other
+ * cases.
+ */
+static inline int atomic64_dec_and_test(atomic64_t *ptr)
+{
+        return atomic64_sub_and_test(1, ptr);
+}
+
+/**
+ * atomic64_inc_and_test - increment and test
+ * @ptr: pointer to type atomic64_t
+ *
+ * Atomically increments @ptr by 1
+ * and returns true if the result is zero, or false for all
+ * other cases.
+ */
+static inline int atomic64_inc_and_test(atomic64_t *ptr)
+{
+        return atomic64_sub_and_test(-1, ptr);
+}
+
+/**
+ * atomic64_add_negative - add and test if negative
+ * @delta: integer value to add
+ * @ptr:   pointer to type atomic64_t
+ *
+ * Atomically adds @delta to @ptr and returns true
+ * if the result is negative, or false when
+ * result is greater than or equal to zero.
+ */
+static inline int
+atomic64_add_negative(unsigned long long delta, atomic64_t *ptr)
+{
+        long long old_val = atomic64_add_return(delta, ptr);
+
+        return old_val < 0;
+}
+
 #include <asm-generic/atomic.h>
 #endif /* _ASM_X86_ATOMIC_32_H */
diff --git a/arch/x86/include/asm/boot.h b/arch/x86/include/asm/boot.h
index 6ba23dd9fc92..418e632d4a80 100644
--- a/arch/x86/include/asm/boot.h
+++ b/arch/x86/include/asm/boot.h
@@ -8,11 +8,26 @@
 
 #ifdef __KERNEL__
 
+#include <asm/page_types.h>
+
 /* Physical address where kernel should be loaded. */
 #define LOAD_PHYSICAL_ADDR ((CONFIG_PHYSICAL_START \
                                 + (CONFIG_PHYSICAL_ALIGN - 1)) \
                                 & ~(CONFIG_PHYSICAL_ALIGN - 1))
 
+/* Minimum kernel alignment, as a power of two */
+#ifdef CONFIG_x86_64
+#define MIN_KERNEL_ALIGN_LG2    PMD_SHIFT
+#else
+#define MIN_KERNEL_ALIGN_LG2    (PAGE_SHIFT+1)
+#endif
+#define MIN_KERNEL_ALIGN        (_AC(1, UL) << MIN_KERNEL_ALIGN_LG2)
+
+#if (CONFIG_PHYSICAL_ALIGN & (CONFIG_PHYSICAL_ALIGN-1)) || \
+        (CONFIG_PHYSICAL_ALIGN < (_AC(1, UL) << MIN_KERNEL_ALIGN_LG2))
+#error "Invalid value for CONFIG_PHYSICAL_ALIGN"
+#endif
+
 #ifdef CONFIG_KERNEL_BZIP2
 #define BOOT_HEAP_SIZE             0x400000
 #else /* !CONFIG_KERNEL_BZIP2 */
diff --git a/arch/x86/include/asm/bootparam.h b/arch/x86/include/asm/bootparam.h
index 433adaebf9b6..1724e8de317c 100644
--- a/arch/x86/include/asm/bootparam.h
+++ b/arch/x86/include/asm/bootparam.h
@@ -50,7 +50,8 @@ struct setup_header {
         __u32   ramdisk_size;
         __u32   bootsect_kludge;
         __u16   heap_end_ptr;
-        __u16   _pad1;
+        __u8    ext_loader_ver;
+        __u8    ext_loader_type;
         __u32   cmd_line_ptr;
         __u32   initrd_addr_max;
         __u32   kernel_alignment;
diff --git a/arch/x86/include/asm/cpu_debug.h b/arch/x86/include/asm/cpu_debug.h
index 222802029fa6..d96c1ee3a95c 100644
--- a/arch/x86/include/asm/cpu_debug.h
+++ b/arch/x86/include/asm/cpu_debug.h
@@ -86,105 +86,7 @@ enum cpu_file_bit {
         CPU_VALUE_BIT,                          /* value                */
 };
 
-#define CPU_FILE_VALUE                  (1 << CPU_VALUE_BIT)
-
-/*
- * DisplayFamily_DisplayModel   Processor Families/Processor Number Series
- * --------------------------   ------------------------------------------
- * 05_01, 05_02, 05_04          Pentium, Pentium with MMX
- *
- * 06_01                        Pentium Pro
- * 06_03, 06_05                 Pentium II Xeon, Pentium II
- * 06_07, 06_08, 06_0A, 06_0B   Pentium III Xeon, Pentum III
- *
- * 06_09, 060D                  Pentium M
- *
- * 06_0E                        Core Duo, Core Solo
- *
- * 06_0F                        Xeon 3000, 3200, 5100, 5300, 7300 series,
- *                              Core 2 Quad, Core 2 Extreme, Core 2 Duo,
- *                              Pentium dual-core
- * 06_17                        Xeon 5200, 5400 series, Core 2 Quad Q9650
- *
- * 06_1C                        Atom
- *
- * 0F_00, 0F_01, 0F_02          Xeon, Xeon MP, Pentium 4
- * 0F_03, 0F_04                 Xeon, Xeon MP, Pentium 4, Pentium D
- *
- * 0F_06                        Xeon 7100, 5000 Series, Xeon MP,
- *                              Pentium 4, Pentium D
- */
-
-/* Register processors bits */
-enum cpu_processor_bit {
-        CPU_NONE,
-/* Intel */
-        CPU_INTEL_PENTIUM_BIT,
-        CPU_INTEL_P6_BIT,
-        CPU_INTEL_PENTIUM_M_BIT,
-        CPU_INTEL_CORE_BIT,
-        CPU_INTEL_CORE2_BIT,
-        CPU_INTEL_ATOM_BIT,
-        CPU_INTEL_XEON_P4_BIT,
-        CPU_INTEL_XEON_MP_BIT,
-/* AMD */
-        CPU_AMD_K6_BIT,
-        CPU_AMD_K7_BIT,
-        CPU_AMD_K8_BIT,
-        CPU_AMD_0F_BIT,
-        CPU_AMD_10_BIT,
-        CPU_AMD_11_BIT,
-};
-
-#define CPU_INTEL_PENTIUM       (1 << CPU_INTEL_PENTIUM_BIT)
-#define CPU_INTEL_P6            (1 << CPU_INTEL_P6_BIT)
-#define CPU_INTEL_PENTIUM_M     (1 << CPU_INTEL_PENTIUM_M_BIT)
-#define CPU_INTEL_CORE          (1 << CPU_INTEL_CORE_BIT)
-#define CPU_INTEL_CORE2         (1 << CPU_INTEL_CORE2_BIT)
-#define CPU_INTEL_ATOM          (1 << CPU_INTEL_ATOM_BIT)
-#define CPU_INTEL_XEON_P4       (1 << CPU_INTEL_XEON_P4_BIT)
-#define CPU_INTEL_XEON_MP       (1 << CPU_INTEL_XEON_MP_BIT)
-
-#define CPU_INTEL_PX            (CPU_INTEL_P6 | CPU_INTEL_PENTIUM_M)
-#define CPU_INTEL_COREX         (CPU_INTEL_CORE | CPU_INTEL_CORE2)
-#define CPU_INTEL_XEON          (CPU_INTEL_XEON_P4 | CPU_INTEL_XEON_MP)
-#define CPU_CO_AT               (CPU_INTEL_CORE | CPU_INTEL_ATOM)
-#define CPU_C2_AT               (CPU_INTEL_CORE2 | CPU_INTEL_ATOM)
-#define CPU_CX_AT               (CPU_INTEL_COREX | CPU_INTEL_ATOM)
-#define CPU_CX_XE               (CPU_INTEL_COREX | CPU_INTEL_XEON)
-#define CPU_P6_XE               (CPU_INTEL_P6 | CPU_INTEL_XEON)
-#define CPU_PM_CO_AT            (CPU_INTEL_PENTIUM_M | CPU_CO_AT)
-#define CPU_C2_AT_XE            (CPU_C2_AT | CPU_INTEL_XEON)
-#define CPU_CX_AT_XE            (CPU_CX_AT | CPU_INTEL_XEON)
-#define CPU_P6_CX_AT            (CPU_INTEL_P6 | CPU_CX_AT)
-#define CPU_P6_CX_XE            (CPU_P6_XE | CPU_INTEL_COREX)
-#define CPU_P6_CX_AT_XE         (CPU_INTEL_P6 | CPU_CX_AT_XE)
-#define CPU_PM_CX_AT_XE         (CPU_INTEL_PENTIUM_M | CPU_CX_AT_XE)
-#define CPU_PM_CX_AT            (CPU_INTEL_PENTIUM_M | CPU_CX_AT)
-#define CPU_PM_CX_XE            (CPU_INTEL_PENTIUM_M | CPU_CX_XE)
-#define CPU_PX_CX_AT            (CPU_INTEL_PX | CPU_CX_AT)
-#define CPU_PX_CX_AT_XE         (CPU_INTEL_PX | CPU_CX_AT_XE)
-
-/* Select all supported Intel CPUs */
-#define CPU_INTEL_ALL           (CPU_INTEL_PENTIUM | CPU_PX_CX_AT_XE)
-
-#define CPU_AMD_K6              (1 << CPU_AMD_K6_BIT)
-#define CPU_AMD_K7              (1 << CPU_AMD_K7_BIT)
-#define CPU_AMD_K8              (1 << CPU_AMD_K8_BIT)
-#define CPU_AMD_0F              (1 << CPU_AMD_0F_BIT)
-#define CPU_AMD_10              (1 << CPU_AMD_10_BIT)
-#define CPU_AMD_11              (1 << CPU_AMD_11_BIT)
-
-#define CPU_K10_PLUS            (CPU_AMD_10 | CPU_AMD_11)
-#define CPU_K0F_PLUS            (CPU_AMD_0F | CPU_K10_PLUS)
-#define CPU_K8_PLUS             (CPU_AMD_K8 | CPU_K0F_PLUS)
-#define CPU_K7_PLUS             (CPU_AMD_K7 | CPU_K8_PLUS)
-
-/* Select all supported AMD CPUs */
-#define CPU_AMD_ALL             (CPU_AMD_K6 | CPU_K7_PLUS)
-
-/* Select all supported CPUs */
-#define CPU_ALL                 (CPU_INTEL_ALL | CPU_AMD_ALL)
+#define CPU_FILE_VALUE          (1 << CPU_VALUE_BIT)
 
 #define MAX_CPU_FILES           512
 
@@ -220,7 +122,6 @@ struct cpu_debug_range {
         unsigned                min;            /* Register range min   */
         unsigned                max;            /* Register range max   */
         unsigned                flag;           /* Supported flags      */
-        unsigned                model;          /* Supported models     */
 };
 
 #endif /* _ASM_X86_CPU_DEBUG_H */
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 13cc6a503a02..4a28d22d4793 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -94,6 +94,7 @@
 #define X86_FEATURE_TSC_RELIABLE (3*32+23) /* TSC is known to be reliable */
 #define X86_FEATURE_NONSTOP_TSC (3*32+24) /* TSC does not stop in C states */
 #define X86_FEATURE_CLFLUSH_MONITOR (3*32+25) /* "" clflush reqd with monitor */
+#define X86_FEATURE_EXTD_APICID (3*32+26) /* has extended APICID (8 bits) */
 
 /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
 #define X86_FEATURE_XMM3        (4*32+ 0) /* "pni" SSE-3 */
@@ -115,6 +116,8 @@
 #define X86_FEATURE_XMM4_1      (4*32+19) /* "sse4_1" SSE-4.1 */
 #define X86_FEATURE_XMM4_2      (4*32+20) /* "sse4_2" SSE-4.2 */
 #define X86_FEATURE_X2APIC      (4*32+21) /* x2APIC */
+#define X86_FEATURE_MOVBE       (4*32+22) /* MOVBE instruction */
+#define X86_FEATURE_POPCNT      (4*32+23) /* POPCNT instruction */
 #define X86_FEATURE_AES         (4*32+25) /* AES instructions */
 #define X86_FEATURE_XSAVE       (4*32+26) /* XSAVE/XRSTOR/XSETBV/XGETBV */
 #define X86_FEATURE_OSXSAVE     (4*32+27) /* "" XSAVE enabled in the OS */
diff --git a/arch/x86/include/asm/ds.h b/arch/x86/include/asm/ds.h
index a8f672ba100c..70dac199b093 100644
--- a/arch/x86/include/asm/ds.h
+++ b/arch/x86/include/asm/ds.h
@@ -15,8 +15,8 @@
  * - buffer allocation (memory accounting)
  *
  *
- * Copyright (C) 2007-2008 Intel Corporation.
- * Markus Metzger <markus.t.metzger@intel.com>, 2007-2008
+ * Copyright (C) 2007-2009 Intel Corporation.
+ * Markus Metzger <markus.t.metzger@intel.com>, 2007-2009
  */
 
 #ifndef _ASM_X86_DS_H
@@ -83,8 +83,10 @@ enum ds_feature {
  * The interrupt threshold is independent from the overflow callback
  * to allow users to use their own overflow interrupt handling mechanism.
  *
- * task: the task to request recording for;
- *       NULL for per-cpu recording on the current cpu
+ * The function might sleep.
+ *
+ * task: the task to request recording for
+ * cpu:  the cpu to request recording for
  * base: the base pointer for the (non-pageable) buffer;
  * size: the size of the provided buffer in bytes
  * ovfl: pointer to a function to be called on buffer overflow;
@@ -93,19 +95,28 @@ enum ds_feature {
  *     -1 if no interrupt threshold is requested.
  * flags: a bit-mask of the above flags
  */
-extern struct bts_tracer *ds_request_bts(struct task_struct *task,
-                                         void *base, size_t size,
-                                         bts_ovfl_callback_t ovfl,
-                                         size_t th, unsigned int flags);
-extern struct pebs_tracer *ds_request_pebs(struct task_struct *task,
-                                           void *base, size_t size,
-                                           pebs_ovfl_callback_t ovfl,
-                                           size_t th, unsigned int flags);
+extern struct bts_tracer *ds_request_bts_task(struct task_struct *task,
+                                              void *base, size_t size,
+                                              bts_ovfl_callback_t ovfl,
+                                              size_t th, unsigned int flags);
+extern struct bts_tracer *ds_request_bts_cpu(int cpu, void *base, size_t size,
+                                             bts_ovfl_callback_t ovfl,
+                                             size_t th, unsigned int flags);
+extern struct pebs_tracer *ds_request_pebs_task(struct task_struct *task,
+                                                void *base, size_t size,
+                                                pebs_ovfl_callback_t ovfl,
+                                                size_t th, unsigned int flags);
+extern struct pebs_tracer *ds_request_pebs_cpu(int cpu,
+                                               void *base, size_t size,
+                                               pebs_ovfl_callback_t ovfl,
+                                               size_t th, unsigned int flags);
 
 /*
  * Release BTS or PEBS resources
  * Suspend and resume BTS or PEBS tracing
  *
+ * Must be called with irq's enabled.
+ *
  * tracer: the tracer handle returned from ds_request_~()
  */
 extern void ds_release_bts(struct bts_tracer *tracer);
@@ -115,6 +126,28 @@ extern void ds_release_pebs(struct pebs_tracer *tracer);
 extern void ds_suspend_pebs(struct pebs_tracer *tracer);
 extern void ds_resume_pebs(struct pebs_tracer *tracer);
 
+/*
+ * Release BTS or PEBS resources
+ * Suspend and resume BTS or PEBS tracing
+ *
+ * Cpu tracers must call this on the traced cpu.
+ * Task tracers must call ds_release_~_noirq() for themselves.
+ *
+ * May be called with irq's disabled.
+ *
+ * Returns 0 if successful;
+ * -EPERM if the cpu tracer does not trace the current cpu.
+ * -EPERM if the task tracer does not trace itself.
+ *
+ * tracer: the tracer handle returned from ds_request_~()
+ */
+extern int ds_release_bts_noirq(struct bts_tracer *tracer);
+extern int ds_suspend_bts_noirq(struct bts_tracer *tracer);
+extern int ds_resume_bts_noirq(struct bts_tracer *tracer);
+extern int ds_release_pebs_noirq(struct pebs_tracer *tracer);
+extern int ds_suspend_pebs_noirq(struct pebs_tracer *tracer);
+extern int ds_resume_pebs_noirq(struct pebs_tracer *tracer);
+
 
 /*
  * The raw DS buffer state as it is used for BTS and PEBS recording.
@@ -170,9 +203,9 @@ struct bts_struct {
                 } lbr;
                 /* BTS_TASK_ARRIVES or BTS_TASK_DEPARTS */
                 struct {
-                        __u64 jiffies;
+                        __u64 clock;
                         pid_t pid;
-                } timestamp;
+                } event;
         } variant;
 };
 
@@ -201,8 +234,12 @@ struct bts_trace {
 struct pebs_trace {
         struct ds_trace ds;
 
-        /* the PEBS reset value */
-        unsigned long long reset_value;
+        /* the number of valid counters in the below array */
+        unsigned int counters;
+
+#define MAX_PEBS_COUNTERS 4
+        /* the counter reset value */
+        unsigned long long counter_reset[MAX_PEBS_COUNTERS];
 };
 
 
@@ -237,9 +274,11 @@ extern int ds_reset_pebs(struct pebs_tracer *tracer);
  * Returns 0 on success; -Eerrno on error
  *
  * tracer: the tracer handle returned from ds_request_pebs()
+ * counter: the index of the counter
  * value: the new counter reset value
  */
-extern int ds_set_pebs_reset(struct pebs_tracer *tracer, u64 value);
+extern int ds_set_pebs_reset(struct pebs_tracer *tracer,
+                             unsigned int counter, u64 value);
 
 /*
  * Initialization
@@ -252,21 +291,12 @@ extern void __cpuinit ds_init_intel(struct cpuinfo_x86 *);
  */
 extern void ds_switch_to(struct task_struct *prev, struct task_struct *next);
 
-/*
- * Task clone/init and cleanup work
- */
-extern void ds_copy_thread(struct task_struct *tsk, struct task_struct *father);
-extern void ds_exit_thread(struct task_struct *tsk);
-
 #else /* CONFIG_X86_DS */
 
 struct cpuinfo_x86;
 static inline void __cpuinit ds_init_intel(struct cpuinfo_x86 *ignored) {}
 static inline void ds_switch_to(struct task_struct *prev,
                                 struct task_struct *next) {}
-static inline void ds_copy_thread(struct task_struct *tsk,
-                                  struct task_struct *father) {}
-static inline void ds_exit_thread(struct task_struct *tsk) {}
 
 #endif /* CONFIG_X86_DS */
 #endif /* _ASM_X86_DS_H */
diff --git a/arch/x86/include/asm/entry_arch.h b/arch/x86/include/asm/entry_arch.h
index 69f886805ecb..ff8cbfa07851 100644
--- a/arch/x86/include/asm/entry_arch.h
+++ b/arch/x86/include/asm/entry_arch.h
@@ -50,7 +50,7 @@ BUILD_INTERRUPT(error_interrupt,ERROR_APIC_VECTOR)
 BUILD_INTERRUPT(spurious_interrupt,SPURIOUS_APIC_VECTOR)
 
 #ifdef CONFIG_PERF_COUNTERS
-BUILD_INTERRUPT(perf_counter_interrupt, LOCAL_PERF_VECTOR)
+BUILD_INTERRUPT(perf_pending_interrupt, LOCAL_PENDING_VECTOR)
 #endif
 
 #ifdef CONFIG_X86_THERMAL_VECTOR
diff --git a/arch/x86/include/asm/hardirq.h b/arch/x86/include/asm/hardirq.h
index 922ee7c29693..82e3e8f01043 100644
--- a/arch/x86/include/asm/hardirq.h
+++ b/arch/x86/include/asm/hardirq.h
@@ -13,6 +13,8 @@ typedef struct {
         unsigned int irq_spurious_count;
 #endif
         unsigned int generic_irqs;      /* arch dependent */
+        unsigned int apic_perf_irqs;
+        unsigned int apic_pending_irqs;
 #ifdef CONFIG_SMP
         unsigned int irq_resched_count;
         unsigned int irq_call_count;
diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h
index 1c8f28a63058..ba180d93b08c 100644
--- a/arch/x86/include/asm/hw_irq.h
+++ b/arch/x86/include/asm/hw_irq.h
@@ -29,6 +29,8 @@
 extern void apic_timer_interrupt(void);
 extern void generic_interrupt(void);
 extern void error_interrupt(void);
+extern void perf_pending_interrupt(void);
+
 extern void spurious_interrupt(void);
 extern void thermal_interrupt(void);
 extern void reschedule_interrupt(void);
@@ -99,7 +101,11 @@ extern void eisa_set_level_irq(unsigned int irq);
 /* SMP */
 extern void smp_apic_timer_interrupt(struct pt_regs *);
 extern void smp_spurious_interrupt(struct pt_regs *);
+extern void smp_generic_interrupt(struct pt_regs *);
 extern void smp_error_interrupt(struct pt_regs *);
+#ifdef CONFIG_X86_IO_APIC
+extern asmlinkage void smp_irq_move_cleanup_interrupt(void);
+#endif
 #ifdef CONFIG_SMP
 extern void smp_reschedule_interrupt(struct pt_regs *);
 extern void smp_call_function_interrupt(struct pt_regs *);
diff --git a/arch/x86/include/asm/i387.h b/arch/x86/include/asm/i387.h
index 71c9e5183982..175adf58dd4f 100644
--- a/arch/x86/include/asm/i387.h
+++ b/arch/x86/include/asm/i387.h
@@ -67,7 +67,7 @@ static inline int fxrstor_checking(struct i387_fxsave_struct *fx)
                      ".previous\n"
                      _ASM_EXTABLE(1b, 3b)
                      : [err] "=r" (err)
-#if 0 /* See comment in __save_init_fpu() below. */
+#if 0 /* See comment in fxsave() below. */
                      : [fx] "r" (fx), "m" (*fx), "0" (0));
 #else
                      : [fx] "cdaSDb" (fx), "m" (*fx), "0" (0));
@@ -75,14 +75,6 @@ static inline int fxrstor_checking(struct i387_fxsave_struct *fx)
         return err;
 }
 
-static inline int restore_fpu_checking(struct task_struct *tsk)
-{
-        if (task_thread_info(tsk)->status & TS_XSAVE)
-                return xrstor_checking(&tsk->thread.xstate->xsave);
-        else
-                return fxrstor_checking(&tsk->thread.xstate->fxsave);
-}
-
 /* AMD CPUs don't save/restore FDP/FIP/FOP unless an exception
    is pending. Clear the x87 state here by setting it to fixed
    values. The kernel data segment can be sometimes 0 and sometimes
@@ -120,7 +112,7 @@ static inline int fxsave_user(struct i387_fxsave_struct __user *fx)
                      ".previous\n"
                      _ASM_EXTABLE(1b, 3b)
                      : [err] "=r" (err), "=m" (*fx)
-#if 0 /* See comment in __fxsave_clear() below. */
+#if 0 /* See comment in fxsave() below. */
                      : [fx] "r" (fx), "0" (0));
 #else
                      : [fx] "cdaSDb" (fx), "0" (0));
@@ -185,12 +177,9 @@ static inline void tolerant_fwait(void)
         asm volatile("fnclex ; fwait");
 }
 
-static inline void restore_fpu(struct task_struct *tsk)
+/* perform fxrstor iff the processor has extended states, otherwise frstor */
+static inline int fxrstor_checking(struct i387_fxsave_struct *fx)
 {
-        if (task_thread_info(tsk)->status & TS_XSAVE) {
-                xrstor_checking(&tsk->thread.xstate->xsave);
-                return;
-        }
         /*
          * The "nop" is needed to make the instructions the same
          * length.
@@ -199,7 +188,9 @@ static inline void restore_fpu(struct task_struct *tsk)
                 "nop ; frstor %1",
                 "fxrstor %1",
                 X86_FEATURE_FXSR,
-                "m" (tsk->thread.xstate->fxsave));
+                "m" (*fx));
+
+        return 0;
 }
 
 /* We need a safe address that is cheap to find and that is already
@@ -262,6 +253,14 @@ end:
 
 #endif  /* CONFIG_X86_64 */
 
+static inline int restore_fpu_checking(struct task_struct *tsk)
+{
+        if (task_thread_info(tsk)->status & TS_XSAVE)
+                return xrstor_checking(&tsk->thread.xstate->xsave);
+        else
+                return fxrstor_checking(&tsk->thread.xstate->fxsave);
+}
+
 /*
  * Signal frame handlers...
  */
@@ -305,18 +304,18 @@ static inline void kernel_fpu_end(void)
 /*
  * Some instructions like VIA's padlock instructions generate a spurious
  * DNA fault but don't modify SSE registers. And these instructions
- * get used from interrupt context aswell. To prevent these kernel instructions
- * in interrupt context interact wrongly with other user/kernel fpu usage, we
+ * get used from interrupt context as well. To prevent these kernel instructions
+ * in interrupt context interacting wrongly with other user/kernel fpu usage, we
  * should use them only in the context of irq_ts_save/restore()
  */
 static inline int irq_ts_save(void)
 {
         /*
-         * If we are in process context, we are ok to take a spurious DNA fault.
-         * Otherwise, doing clts() in process context require pre-emption to
-         * be disabled or some heavy lifting like kernel_fpu_begin()
+         * If in process context and not atomic, we can take a spurious DNA fault.
+         * Otherwise, doing clts() in process context requires disabling preemption
+         * or some heavy lifting like kernel_fpu_begin()
          */
-        if (!in_interrupt())
+        if (!in_atomic())
                 return 0;
 
         if (read_cr0() & X86_CR0_TS) {
diff --git a/arch/x86/include/asm/intel_arch_perfmon.h b/arch/x86/include/asm/intel_arch_perfmon.h
deleted file mode 100644
index fa0fd068bc2e..000000000000
--- a/arch/x86/include/asm/intel_arch_perfmon.h
+++ /dev/null
@@ -1,31 +0,0 @@
-#ifndef _ASM_X86_INTEL_ARCH_PERFMON_H
-#define _ASM_X86_INTEL_ARCH_PERFMON_H
-
-#define MSR_ARCH_PERFMON_PERFCTR0               0xc1
-#define MSR_ARCH_PERFMON_PERFCTR1               0xc2
-
-#define MSR_ARCH_PERFMON_EVENTSEL0              0x186
-#define MSR_ARCH_PERFMON_EVENTSEL1              0x187
-
-#define ARCH_PERFMON_EVENTSEL0_ENABLE   (1 << 22)
-#define ARCH_PERFMON_EVENTSEL_INT       (1 << 20)
-#define ARCH_PERFMON_EVENTSEL_OS        (1 << 17)
-#define ARCH_PERFMON_EVENTSEL_USR       (1 << 16)
-
-#define ARCH_PERFMON_UNHALTED_CORE_CYCLES_SEL   (0x3c)
-#define ARCH_PERFMON_UNHALTED_CORE_CYCLES_UMASK (0x00 << 8)
-#define ARCH_PERFMON_UNHALTED_CORE_CYCLES_INDEX (0)
-#define ARCH_PERFMON_UNHALTED_CORE_CYCLES_PRESENT \
-        (1 << (ARCH_PERFMON_UNHALTED_CORE_CYCLES_INDEX))
-
-union cpuid10_eax {
-        struct {
-                unsigned int version_id:8;
-                unsigned int num_counters:8;
-                unsigned int bit_width:8;
-                unsigned int mask_length:8;
-        } split;
-        unsigned int full;
-};
-
-#endif /* _ASM_X86_INTEL_ARCH_PERFMON_H */
diff --git a/arch/x86/include/asm/iomap.h b/arch/x86/include/asm/iomap.h
index 86af26091d6c..0e9fe1d9d971 100644
--- a/arch/x86/include/asm/iomap.h
+++ b/arch/x86/include/asm/iomap.h
@@ -1,3 +1,6 @@
+#ifndef _ASM_X86_IOMAP_H
+#define _ASM_X86_IOMAP_H
+
 /*
  * Copyright © 2008 Ingo Molnar
  *
@@ -31,3 +34,5 @@ iomap_atomic_prot_pfn(unsigned long pfn, enum km_type type, pgprot_t prot);
 
 void
 iounmap_atomic(void *kvaddr, enum km_type type);
+
+#endif /* _ASM_X86_IOMAP_H */
diff --git a/arch/x86/include/asm/irq_vectors.h b/arch/x86/include/asm/irq_vectors.h
index 1b35c4357ea8..5b21f0ec3df2 100644
--- a/arch/x86/include/asm/irq_vectors.h
+++ b/arch/x86/include/asm/irq_vectors.h
@@ -104,14 +104,14 @@
 #define LOCAL_TIMER_VECTOR              0xef
 
 /*
- * Performance monitoring interrupt vector:
+ * Generic system vector for platform specific use
  */
-#define LOCAL_PERF_VECTOR               0xee
+#define GENERIC_INTERRUPT_VECTOR        0xed
 
 /*
- * Generic system vector for platform specific use
+ * Performance monitoring pending work vector:
  */
-#define GENERIC_INTERRUPT_VECTOR        0xed
+#define LOCAL_PENDING_VECTOR            0xec
 
 #define UV_BAU_MESSAGE                  0xec
 
diff --git a/arch/x86/include/asm/k8.h b/arch/x86/include/asm/k8.h
index 54c8cc53b24d..c2d1f3b58e5f 100644
--- a/arch/x86/include/asm/k8.h
+++ b/arch/x86/include/asm/k8.h
@@ -12,4 +12,17 @@ extern int cache_k8_northbridges(void);
 extern void k8_flush_garts(void);
 extern int k8_scan_nodes(unsigned long start, unsigned long end);
 
+#ifdef CONFIG_K8_NB
+static inline struct pci_dev *node_to_k8_nb_misc(int node)
+{
+        return (node < num_k8_northbridges) ? k8_northbridges[node] : NULL;
+}
+#else
+static inline struct pci_dev *node_to_k8_nb_misc(int node)
+{
+        return NULL;
+}
+#endif
+
+
 #endif /* _ASM_X86_K8_H */
diff --git a/arch/x86/include/asm/kvm.h b/arch/x86/include/asm/kvm.h
index dc3f6cf11704..125be8b19568 100644
--- a/arch/x86/include/asm/kvm.h
+++ b/arch/x86/include/asm/kvm.h
@@ -16,6 +16,7 @@
 #define __KVM_HAVE_MSI
 #define __KVM_HAVE_USER_NMI
 #define __KVM_HAVE_GUEST_DEBUG
+#define __KVM_HAVE_MSIX
 
 /* Architectural interrupt line count. */
 #define KVM_NR_INTERRUPTS 256
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index f0faf58044ff..eabdc1cfab5c 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -185,6 +185,7 @@ union kvm_mmu_page_role {
                 unsigned access:3;
                 unsigned invalid:1;
                 unsigned cr4_pge:1;
+                unsigned nxe:1;
         };
 };
 
@@ -212,7 +213,6 @@ struct kvm_mmu_page {
         int multimapped;         /* More than one parent_pte? */
         int root_count;          /* Currently serving as active root */
         bool unsync;
-        bool global;
         unsigned int unsync_children;
         union {
                 u64 *parent_pte;               /* !multimapped */
@@ -261,13 +261,11 @@ struct kvm_mmu {
         union kvm_mmu_page_role base_role;
 
         u64 *pae_root;
+        u64 rsvd_bits_mask[2][4];
 };
 
 struct kvm_vcpu_arch {
         u64 host_tsc;
-        int interrupt_window_open;
-        unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */
-        DECLARE_BITMAP(irq_pending, KVM_NR_INTERRUPTS);
         /*
          * rip and regs accesses must go through
          * kvm_{register,rip}_{read,write} functions.
@@ -286,6 +284,7 @@ struct kvm_vcpu_arch {
         u64 shadow_efer;
         u64 apic_base;
         struct kvm_lapic *apic;    /* kernel irqchip context */
+        int32_t apic_arb_prio;
         int mp_state;
         int sipi_vector;
         u64 ia32_misc_enable_msr;
@@ -320,6 +319,8 @@ struct kvm_vcpu_arch {
         struct kvm_pio_request pio;
         void *pio_data;
 
+        u8 event_exit_inst_len;
+
         struct kvm_queued_exception {
                 bool pending;
                 bool has_error_code;
@@ -329,11 +330,12 @@ struct kvm_vcpu_arch {
 
         struct kvm_queued_interrupt {
                 bool pending;
+                bool soft;
                 u8 nr;
         } interrupt;
 
         struct {
-                int active;
+                int vm86_active;
                 u8 save_iopl;
                 struct kvm_save_segment {
                         u16 selector;
@@ -356,9 +358,9 @@ struct kvm_vcpu_arch {
         unsigned int time_offset;
         struct page *time_page;
 
+        bool singlestep; /* guest is single stepped by KVM */
         bool nmi_pending;
         bool nmi_injected;
-        bool nmi_window_open;
 
         struct mtrr_state_type mtrr_state;
         u32 pat;
@@ -392,15 +394,14 @@ struct kvm_arch{
          */
         struct list_head active_mmu_pages;
         struct list_head assigned_dev_head;
-        struct list_head oos_global_pages;
         struct iommu_domain *iommu_domain;
+        int iommu_flags;
         struct kvm_pic *vpic;
         struct kvm_ioapic *vioapic;
         struct kvm_pit *vpit;
         struct hlist_head irq_ack_notifier_list;
         int vapics_in_nmi_mode;
 
-        int round_robin_prev_vcpu;
         unsigned int tss_addr;
         struct page *apic_access_page;
 
@@ -423,7 +424,6 @@ struct kvm_vm_stat {
         u32 mmu_recycled;
         u32 mmu_cache_miss;
         u32 mmu_unsync;
-        u32 mmu_unsync_global;
         u32 remote_tlb_flush;
         u32 lpages;
 };
@@ -443,7 +443,6 @@ struct kvm_vcpu_stat {
         u32 halt_exits;
         u32 halt_wakeup;
         u32 request_irq_exits;
-        u32 request_nmi_exits;
         u32 irq_exits;
         u32 host_state_reload;
         u32 efer_reload;
@@ -511,20 +510,22 @@ struct kvm_x86_ops {
         void (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run);
         int (*handle_exit)(struct kvm_run *run, struct kvm_vcpu *vcpu);
         void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
+        void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
+        u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
         void (*patch_hypercall)(struct kvm_vcpu *vcpu,
                                 unsigned char *hypercall_addr);
-        int (*get_irq)(struct kvm_vcpu *vcpu);
-        void (*set_irq)(struct kvm_vcpu *vcpu, int vec);
+        void (*set_irq)(struct kvm_vcpu *vcpu);
+        void (*set_nmi)(struct kvm_vcpu *vcpu);
         void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
                                 bool has_error_code, u32 error_code);
-        bool (*exception_injected)(struct kvm_vcpu *vcpu);
-        void (*inject_pending_irq)(struct kvm_vcpu *vcpu);
-        void (*inject_pending_vectors)(struct kvm_vcpu *vcpu,
-                                       struct kvm_run *run);
-
+        int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
+        int (*nmi_allowed)(struct kvm_vcpu *vcpu);
+        void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
+        void (*enable_irq_window)(struct kvm_vcpu *vcpu);
+        void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
         int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
         int (*get_tdp_level)(void);
-        int (*get_mt_mask_shift)(void);
+        u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
 };
 
 extern struct kvm_x86_ops *kvm_x86_ops;
@@ -538,7 +539,7 @@ int kvm_mmu_setup(struct kvm_vcpu *vcpu);
 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte);
 void kvm_mmu_set_base_ptes(u64 base_pte);
 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
-                u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 mt_mask);
+                u64 dirty_mask, u64 nx_mask, u64 x_mask);
 
 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
@@ -552,6 +553,7 @@ int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
                           const void *val, int bytes);
 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
                   gpa_t addr, unsigned long *ret);
+u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn);
 
 extern bool tdp_enabled;
 
@@ -563,6 +565,7 @@ enum emulation_result {
 
 #define EMULTYPE_NO_DECODE          (1 << 0)
 #define EMULTYPE_TRAP_UD            (1 << 1)
+#define EMULTYPE_SKIP               (1 << 2)
 int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run,
                         unsigned long cr2, u16 error_code, int emulation_type);
 void kvm_report_emulation_failure(struct kvm_vcpu *cvpu, const char *context);
@@ -638,7 +641,6 @@ void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
 int kvm_mmu_load(struct kvm_vcpu *vcpu);
 void kvm_mmu_unload(struct kvm_vcpu *vcpu);
 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
-void kvm_mmu_sync_global(struct kvm_vcpu *vcpu);
 
 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
 
@@ -769,6 +771,8 @@ enum {
 #define HF_GIF_MASK             (1 << 0)
 #define HF_HIF_MASK             (1 << 1)
 #define HF_VINTR_MASK           (1 << 2)
+#define HF_NMI_MASK             (1 << 3)
+#define HF_IRET_MASK            (1 << 4)
 
 /*
  * Hardware virtualization extension instructions may fault if a
@@ -791,5 +795,6 @@ asmlinkage void kvm_handle_fault_on_reboot(void);
 #define KVM_ARCH_WANT_MMU_NOTIFIER
 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
 int kvm_age_hva(struct kvm *kvm, unsigned long hva);
+int cpuid_maxphyaddr(struct kvm_vcpu *vcpu);
 
 #endif /* _ASM_X86_KVM_HOST_H */
diff --git a/arch/x86/include/asm/kvm_x86_emulate.h b/arch/x86/include/asm/kvm_x86_emulate.h
index 6a159732881a..b7ed2c423116 100644
--- a/arch/x86/include/asm/kvm_x86_emulate.h
+++ b/arch/x86/include/asm/kvm_x86_emulate.h
@@ -143,6 +143,9 @@ struct decode_cache {
         struct fetch_cache fetch;
 };
 
+#define X86_SHADOW_INT_MOV_SS  1
+#define X86_SHADOW_INT_STI     2
+
 struct x86_emulate_ctxt {
         /* Register state before/after emulation. */
         struct kvm_vcpu *vcpu;
@@ -152,6 +155,9 @@ struct x86_emulate_ctxt {
         int mode;
         u32 cs_base;
 
+        /* interruptibility state, as a result of execution of STI or MOV SS */
+        int interruptibility;
+
         /* decode cache */
         struct decode_cache decode;
 };
diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h
index c882664716c1..ef51b501e22a 100644
--- a/arch/x86/include/asm/microcode.h
+++ b/arch/x86/include/asm/microcode.h
@@ -9,20 +9,31 @@ struct cpu_signature {
 
 struct device;
 
+enum ucode_state { UCODE_ERROR, UCODE_OK, UCODE_NFOUND };
+
 struct microcode_ops {
-        int  (*request_microcode_user) (int cpu, const void __user *buf, size_t size);
-        int  (*request_microcode_fw) (int cpu, struct device *device);
+        enum ucode_state (*request_microcode_user) (int cpu,
+                                const void __user *buf, size_t size);
 
-        void (*apply_microcode) (int cpu);
+        enum ucode_state (*request_microcode_fw) (int cpu,
+                                struct device *device);
 
-        int  (*collect_cpu_info) (int cpu, struct cpu_signature *csig);
         void (*microcode_fini_cpu) (int cpu);
+
+        /*
+         * The generic 'microcode_core' part guarantees that
+         * the callbacks below run on a target cpu when they
+         * are being called.
+         * See also the "Synchronization" section in microcode_core.c.
+         */
+        int (*apply_microcode) (int cpu);
+        int (*collect_cpu_info) (int cpu, struct cpu_signature *csig);
 };
 
 struct ucode_cpu_info {
-        struct cpu_signature cpu_sig;
-        int valid;
-        void *mc;
+        struct cpu_signature    cpu_sig;
+        int                     valid;
+        void                    *mc;
 };
 extern struct ucode_cpu_info ucode_cpu_info[];
 
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index c86404695083..1692fb5050e3 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -121,7 +121,6 @@
 #define MSR_K8_TOP_MEM1                 0xc001001a
 #define MSR_K8_TOP_MEM2                 0xc001001d
 #define MSR_K8_SYSCFG                   0xc0010010
-#define MSR_K8_HWCR                     0xc0010015
 #define MSR_K8_INT_PENDING_MSG          0xc0010055
 /* C1E active bits in int pending message */
 #define K8_INTP_C1E_ACTIVE_MASK         0x18000000
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 638bf6241807..22603764e7db 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -12,6 +12,17 @@
 
 #include <asm/asm.h>
 #include <asm/errno.h>
+#include <asm/cpumask.h>
+
+struct msr {
+        union {
+                struct {
+                        u32 l;
+                        u32 h;
+                };
+                u64 q;
+        };
+};
 
 static inline unsigned long long native_read_tscp(unsigned int *aux)
 {
@@ -216,6 +227,8 @@ do {                                                            \
 #ifdef CONFIG_SMP
 int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
 int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
+void rdmsr_on_cpus(const cpumask_t *mask, u32 msr_no, struct msr *msrs);
+void wrmsr_on_cpus(const cpumask_t *mask, u32 msr_no, struct msr *msrs);
 int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
 int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
 #else  /*  CONFIG_SMP  */
@@ -229,6 +242,16 @@ static inline int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
         wrmsr(msr_no, l, h);
         return 0;
 }
+static inline void rdmsr_on_cpus(const cpumask_t *m, u32 msr_no,
+                                struct msr *msrs)
+{
+       rdmsr_on_cpu(0, msr_no, &(msrs[0].l), &(msrs[0].h));
+}
+static inline void wrmsr_on_cpus(const cpumask_t *m, u32 msr_no,
+                                struct msr *msrs)
+{
+       wrmsr_on_cpu(0, msr_no, msrs[0].l, msrs[0].h);
+}
 static inline int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no,
                                     u32 *l, u32 *h)
 {
diff --git a/arch/x86/include/asm/nmi.h b/arch/x86/include/asm/nmi.h
index c45a0a568dff..c97264409934 100644
--- a/arch/x86/include/asm/nmi.h
+++ b/arch/x86/include/asm/nmi.h
@@ -64,7 +64,7 @@ static inline int nmi_watchdog_active(void)
          * but since they are power of two we could use a
          * cheaper way --cvg
          */
-        return nmi_watchdog & 0x3;
+        return nmi_watchdog & (NMI_LOCAL_APIC | NMI_IO_APIC);
 }
 #endif
 
diff --git a/arch/x86/include/asm/numa_64.h b/arch/x86/include/asm/numa_64.h
index 064ed6df4cbe..c4ae822e415f 100644
--- a/arch/x86/include/asm/numa_64.h
+++ b/arch/x86/include/asm/numa_64.h
@@ -17,9 +17,6 @@ extern int compute_hash_shift(struct bootnode *nodes, int numblks,
 extern void numa_init_array(void);
 extern int numa_off;
 
-extern void srat_reserve_add_area(int nodeid);
-extern int hotadd_percent;
-
 extern s16 apicid_to_node[MAX_LOCAL_APIC];
 
 extern unsigned long numa_free_all_bootmem(void);
@@ -27,6 +24,13 @@ extern void setup_node_bootmem(int nodeid, unsigned long start,
                                unsigned long end);
 
 #ifdef CONFIG_NUMA
+/*
+ * Too small node sizes may confuse the VM badly. Usually they
+ * result from BIOS bugs. So dont recognize nodes as standalone
+ * NUMA entities that have less than this amount of RAM listed:
+ */
+#define NODE_MIN_SIZE (4*1024*1024)
+
 extern void __init init_cpu_to_node(void);
 extern void __cpuinit numa_set_node(int cpu, int node);
 extern void __cpuinit numa_clear_node(int cpu);
diff --git a/arch/x86/include/asm/page_32_types.h b/arch/x86/include/asm/page_32_types.h
index 0f915ae649a7..6f1b7331313f 100644
--- a/arch/x86/include/asm/page_32_types.h
+++ b/arch/x86/include/asm/page_32_types.h
@@ -54,10 +54,6 @@ extern unsigned int __VMALLOC_RESERVE;
 extern int sysctl_legacy_va_layout;
 
 extern void find_low_pfn_range(void);
-extern unsigned long init_memory_mapping(unsigned long start,
-                                         unsigned long end);
-extern void initmem_init(unsigned long, unsigned long);
-extern void free_initmem(void);
 extern void setup_bootmem_allocator(void);
 
 #endif  /* !__ASSEMBLY__ */
diff --git a/arch/x86/include/asm/page_64_types.h b/arch/x86/include/asm/page_64_types.h
index d38c91b70248..8d382d3abf38 100644
--- a/arch/x86/include/asm/page_64_types.h
+++ b/arch/x86/include/asm/page_64_types.h
@@ -32,22 +32,14 @@
  */
 #define __PAGE_OFFSET           _AC(0xffff880000000000, UL)
 
-#define __PHYSICAL_START        CONFIG_PHYSICAL_START
-#define __KERNEL_ALIGN          0x200000
-
-/*
- * Make sure kernel is aligned to 2MB address. Catching it at compile
- * time is better. Change your config file and compile the kernel
- * for a 2MB aligned address (CONFIG_PHYSICAL_START)
- */
-#if (CONFIG_PHYSICAL_START % __KERNEL_ALIGN) != 0
-#error "CONFIG_PHYSICAL_START must be a multiple of 2MB"
-#endif
+#define __PHYSICAL_START        ((CONFIG_PHYSICAL_START +               \
+                                  (CONFIG_PHYSICAL_ALIGN - 1)) &        \
+                                 ~(CONFIG_PHYSICAL_ALIGN - 1))
 
 #define __START_KERNEL          (__START_KERNEL_map + __PHYSICAL_START)
 #define __START_KERNEL_map      _AC(0xffffffff80000000, UL)
 
-/* See Documentation/x86_64/mm.txt for a description of the memory map. */
+/* See Documentation/x86/x86_64/mm.txt for a description of the memory map. */
 #define __PHYSICAL_MASK_SHIFT   46
 #define __VIRTUAL_MASK_SHIFT    48
 
@@ -71,12 +63,6 @@ extern unsigned long __phys_addr(unsigned long);
 
 #define vmemmap ((struct page *)VMEMMAP_START)
 
-extern unsigned long init_memory_mapping(unsigned long start,
-                                         unsigned long end);
-
-extern void initmem_init(unsigned long start_pfn, unsigned long end_pfn);
-extern void free_initmem(void);
-
 extern void init_extra_mapping_uc(unsigned long phys, unsigned long size);
 extern void init_extra_mapping_wb(unsigned long phys, unsigned long size);
 
diff --git a/arch/x86/include/asm/page_types.h b/arch/x86/include/asm/page_types.h
index 826ad37006ab..6473f5ccff85 100644
--- a/arch/x86/include/asm/page_types.h
+++ b/arch/x86/include/asm/page_types.h
@@ -46,6 +46,12 @@ extern int devmem_is_allowed(unsigned long pagenr);
 extern unsigned long max_low_pfn_mapped;
 extern unsigned long max_pfn_mapped;
 
+extern unsigned long init_memory_mapping(unsigned long start,
+                                         unsigned long end);
+
+extern void initmem_init(unsigned long start_pfn, unsigned long end_pfn);
+extern void free_initmem(void);
+
 #endif  /* !__ASSEMBLY__ */
 
 #endif  /* _ASM_X86_PAGE_DEFS_H */
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index a53da004e08e..4fb37c8a0832 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -56,6 +56,7 @@ struct desc_ptr;
 struct tss_struct;
 struct mm_struct;
 struct desc_struct;
+struct task_struct;
 
 /*
  * Wrapper type for pointers to code which uses the non-standard
@@ -203,7 +204,8 @@ struct pv_cpu_ops {
 
         void (*swapgs)(void);
 
-        struct pv_lazy_ops lazy_mode;
+        void (*start_context_switch)(struct task_struct *prev);
+        void (*end_context_switch)(struct task_struct *next);
 };
 
 struct pv_irq_ops {
@@ -1399,25 +1401,23 @@ enum paravirt_lazy_mode {
 };
 
 enum paravirt_lazy_mode paravirt_get_lazy_mode(void);
-void paravirt_enter_lazy_cpu(void);
-void paravirt_leave_lazy_cpu(void);
+void paravirt_start_context_switch(struct task_struct *prev);
+void paravirt_end_context_switch(struct task_struct *next);
+
 void paravirt_enter_lazy_mmu(void);
 void paravirt_leave_lazy_mmu(void);
-void paravirt_leave_lazy(enum paravirt_lazy_mode mode);
 
-#define  __HAVE_ARCH_ENTER_LAZY_CPU_MODE
-static inline void arch_enter_lazy_cpu_mode(void)
+#define  __HAVE_ARCH_START_CONTEXT_SWITCH
+static inline void arch_start_context_switch(struct task_struct *prev)
 {
-        PVOP_VCALL0(pv_cpu_ops.lazy_mode.enter);
+        PVOP_VCALL1(pv_cpu_ops.start_context_switch, prev);
 }
 
-static inline void arch_leave_lazy_cpu_mode(void)
+static inline void arch_end_context_switch(struct task_struct *next)
 {
-        PVOP_VCALL0(pv_cpu_ops.lazy_mode.leave);
+        PVOP_VCALL1(pv_cpu_ops.end_context_switch, next);
 }
 
-void arch_flush_lazy_cpu_mode(void);
-
 #define  __HAVE_ARCH_ENTER_LAZY_MMU_MODE
 static inline void arch_enter_lazy_mmu_mode(void)
 {
diff --git a/arch/x86/include/asm/perf_counter.h b/arch/x86/include/asm/perf_counter.h
new file mode 100644
index 000000000000..876ed97147b3
--- /dev/null
+++ b/arch/x86/include/asm/perf_counter.h
@@ -0,0 +1,100 @@
+#ifndef _ASM_X86_PERF_COUNTER_H
+#define _ASM_X86_PERF_COUNTER_H
+
+/*
+ * Performance counter hw details:
+ */
+
+#define X86_PMC_MAX_GENERIC                                     8
+#define X86_PMC_MAX_FIXED                                       3
+
+#define X86_PMC_IDX_GENERIC                                     0
+#define X86_PMC_IDX_FIXED                                      32
+#define X86_PMC_IDX_MAX                                        64
+
+#define MSR_ARCH_PERFMON_PERFCTR0                             0xc1
+#define MSR_ARCH_PERFMON_PERFCTR1                             0xc2
+
+#define MSR_ARCH_PERFMON_EVENTSEL0                           0x186
+#define MSR_ARCH_PERFMON_EVENTSEL1                           0x187
+
+#define ARCH_PERFMON_EVENTSEL0_ENABLE                     (1 << 22)
+#define ARCH_PERFMON_EVENTSEL_INT                         (1 << 20)
+#define ARCH_PERFMON_EVENTSEL_OS                          (1 << 17)
+#define ARCH_PERFMON_EVENTSEL_USR                         (1 << 16)
+
+/*
+ * Includes eventsel and unit mask as well:
+ */
+#define ARCH_PERFMON_EVENT_MASK                             0xffff
+
+#define ARCH_PERFMON_UNHALTED_CORE_CYCLES_SEL                 0x3c
+#define ARCH_PERFMON_UNHALTED_CORE_CYCLES_UMASK         (0x00 << 8)
+#define ARCH_PERFMON_UNHALTED_CORE_CYCLES_INDEX                  0
+#define ARCH_PERFMON_UNHALTED_CORE_CYCLES_PRESENT \
+                (1 << (ARCH_PERFMON_UNHALTED_CORE_CYCLES_INDEX))
+
+#define ARCH_PERFMON_BRANCH_MISSES_RETIRED                       6
+
+/*
+ * Intel "Architectural Performance Monitoring" CPUID
+ * detection/enumeration details:
+ */
+union cpuid10_eax {
+        struct {
+                unsigned int version_id:8;
+                unsigned int num_counters:8;
+                unsigned int bit_width:8;
+                unsigned int mask_length:8;
+        } split;
+        unsigned int full;
+};
+
+union cpuid10_edx {
+        struct {
+                unsigned int num_counters_fixed:4;
+                unsigned int reserved:28;
+        } split;
+        unsigned int full;
+};
+
+
+/*
+ * Fixed-purpose performance counters:
+ */
+
+/*
+ * All 3 fixed-mode PMCs are configured via this single MSR:
+ */
+#define MSR_ARCH_PERFMON_FIXED_CTR_CTRL                 0x38d
+
+/*
+ * The counts are available in three separate MSRs:
+ */
+
+/* Instr_Retired.Any: */
+#define MSR_ARCH_PERFMON_FIXED_CTR0                     0x309
+#define X86_PMC_IDX_FIXED_INSTRUCTIONS                  (X86_PMC_IDX_FIXED + 0)
+
+/* CPU_CLK_Unhalted.Core: */
+#define MSR_ARCH_PERFMON_FIXED_CTR1                     0x30a
+#define X86_PMC_IDX_FIXED_CPU_CYCLES                    (X86_PMC_IDX_FIXED + 1)
+
+/* CPU_CLK_Unhalted.Ref: */
+#define MSR_ARCH_PERFMON_FIXED_CTR2                     0x30b
+#define X86_PMC_IDX_FIXED_BUS_CYCLES                    (X86_PMC_IDX_FIXED + 2)
+
+extern void set_perf_counter_pending(void);
+
+#define clear_perf_counter_pending()    do { } while (0)
+#define test_perf_counter_pending()     (0)
+
+#ifdef CONFIG_PERF_COUNTERS
+extern void init_hw_perf_counters(void);
+extern void perf_counters_lapic_init(void);
+#else
+static inline void init_hw_perf_counters(void)          { }
+static inline void perf_counters_lapic_init(void)       { }
+#endif
+
+#endif /* _ASM_X86_PERF_COUNTER_H */
diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
index 29d96d168bc0..18ef7ebf2631 100644
--- a/arch/x86/include/asm/pgtable.h
+++ b/arch/x86/include/asm/pgtable.h
@@ -81,6 +81,8 @@ static inline void __init paravirt_pagetable_setup_done(pgd_t *base)
 #define pte_val(x)      native_pte_val(x)
 #define __pte(x)        native_make_pte(x)
 
+#define arch_end_context_switch(prev)   do {} while(0)
+
 #endif  /* CONFIG_PARAVIRT */
 
 /*
@@ -503,6 +505,8 @@ static inline int pgd_none(pgd_t pgd)
 
 #ifndef __ASSEMBLY__
 
+extern int direct_gbpages;
+
 /* local pte updates need not use xchg for locking */
 static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
 {
diff --git a/arch/x86/include/asm/pgtable_64.h b/arch/x86/include/asm/pgtable_64.h
index 6b87bc6d5018..abde308fdb0f 100644
--- a/arch/x86/include/asm/pgtable_64.h
+++ b/arch/x86/include/asm/pgtable_64.h
@@ -25,10 +25,6 @@ extern pgd_t init_level4_pgt[];
 
 extern void paging_init(void);
 
-#endif /* !__ASSEMBLY__ */
-
-#ifndef __ASSEMBLY__
-
 #define pte_ERROR(e)                                    \
         printk("%s:%d: bad pte %p(%016lx).\n",          \
                __FILE__, __LINE__, &(e), pte_val(e))
@@ -135,8 +131,6 @@ static inline int pgd_large(pgd_t pgd) { return 0; }
 
 #define update_mmu_cache(vma, address, pte) do { } while (0)
 
-extern int direct_gbpages;
-
 /* Encode and de-code a swap entry */
 #if _PAGE_BIT_FILE < _PAGE_BIT_PROTNONE
 #define SWP_TYPE_BITS (_PAGE_BIT_FILE - _PAGE_BIT_PRESENT - 1)
diff --git a/arch/x86/include/asm/pgtable_64_types.h b/arch/x86/include/asm/pgtable_64_types.h
index fbf42b8e0383..766ea16fbbbd 100644
--- a/arch/x86/include/asm/pgtable_64_types.h
+++ b/arch/x86/include/asm/pgtable_64_types.h
@@ -51,11 +51,11 @@ typedef struct { pteval_t pte; } pte_t;
 #define PGDIR_SIZE      (_AC(1, UL) << PGDIR_SHIFT)
 #define PGDIR_MASK      (~(PGDIR_SIZE - 1))
 
-
+/* See Documentation/x86/x86_64/mm.txt for a description of the memory map. */
 #define MAXMEM           _AC(__AC(1, UL) << MAX_PHYSMEM_BITS, UL)
-#define VMALLOC_START    _AC(0xffffc20000000000, UL)
-#define VMALLOC_END      _AC(0xffffe1ffffffffff, UL)
-#define VMEMMAP_START    _AC(0xffffe20000000000, UL)
+#define VMALLOC_START    _AC(0xffffc90000000000, UL)
+#define VMALLOC_END      _AC(0xffffe8ffffffffff, UL)
+#define VMEMMAP_START    _AC(0xffffea0000000000, UL)
 #define MODULES_VADDR    _AC(0xffffffffa0000000, UL)
 #define MODULES_END      _AC(0xffffffffff000000, UL)
 #define MODULES_LEN   (MODULES_END - MODULES_VADDR)
diff --git a/arch/x86/include/asm/pgtable_types.h b/arch/x86/include/asm/pgtable_types.h
index b8238dc8786d..4d258ad76a0f 100644
--- a/arch/x86/include/asm/pgtable_types.h
+++ b/arch/x86/include/asm/pgtable_types.h
@@ -273,7 +273,6 @@ typedef struct page *pgtable_t;
 
 extern pteval_t __supported_pte_mask;
 extern int nx_enabled;
-extern void set_nx(void);
 
 #define pgprot_writecombine     pgprot_writecombine
 extern pgprot_t pgprot_writecombine(pgprot_t prot);
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
index fed93fec9764..c7768269b1cf 100644
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -410,9 +410,6 @@ DECLARE_PER_CPU(unsigned long, stack_canary);
 extern unsigned int xstate_size;
 extern void free_thread_xstate(struct task_struct *);
 extern struct kmem_cache *task_xstate_cachep;
-extern void init_scattered_cpuid_features(struct cpuinfo_x86 *c);
-extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c);
-extern unsigned short num_cache_leaves;
 
 struct thread_struct {
         /* Cached TLS descriptors: */
@@ -428,8 +425,12 @@ struct thread_struct {
         unsigned short          fsindex;
         unsigned short          gsindex;
 #endif
+#ifdef CONFIG_X86_32
         unsigned long           ip;
+#endif
+#ifdef CONFIG_X86_64
         unsigned long           fs;
+#endif
         unsigned long           gs;
         /* Hardware debugging registers: */
         unsigned long           debugreg0;
@@ -461,14 +462,8 @@ struct thread_struct {
         unsigned                io_bitmap_max;
 /* MSR_IA32_DEBUGCTLMSR value to switch in if TIF_DEBUGCTLMSR is set.  */
         unsigned long   debugctlmsr;
-#ifdef CONFIG_X86_DS
-/* Debug Store context; see include/asm-x86/ds.h; goes into MSR_IA32_DS_AREA */
+        /* Debug Store context; see asm/ds.h */
         struct ds_context       *ds_ctx;
-#endif /* CONFIG_X86_DS */
-#ifdef CONFIG_X86_PTRACE_BTS
-/* the signal to send on a bts buffer overflow */
-        unsigned int    bts_ovfl_signal;
-#endif /* CONFIG_X86_PTRACE_BTS */
 };
 
 static inline unsigned long native_get_debugreg(int regno)
@@ -796,6 +791,21 @@ static inline unsigned long get_debugctlmsr(void)
     return debugctlmsr;
 }
 
+static inline unsigned long get_debugctlmsr_on_cpu(int cpu)
+{
+        u64 debugctlmsr = 0;
+        u32 val1, val2;
+
+#ifndef CONFIG_X86_DEBUGCTLMSR
+        if (boot_cpu_data.x86 < 6)
+                return 0;
+#endif
+        rdmsr_on_cpu(cpu, MSR_IA32_DEBUGCTLMSR, &val1, &val2);
+        debugctlmsr = val1 | ((u64)val2 << 32);
+
+        return debugctlmsr;
+}
+
 static inline void update_debugctlmsr(unsigned long debugctlmsr)
 {
 #ifndef CONFIG_X86_DEBUGCTLMSR
@@ -805,6 +815,18 @@ static inline void update_debugctlmsr(unsigned long debugctlmsr)
         wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctlmsr);
 }
 
+static inline void update_debugctlmsr_on_cpu(int cpu,
+                                             unsigned long debugctlmsr)
+{
+#ifndef CONFIG_X86_DEBUGCTLMSR
+        if (boot_cpu_data.x86 < 6)
+                return;
+#endif
+        wrmsr_on_cpu(cpu, MSR_IA32_DEBUGCTLMSR,
+                     (u32)((u64)debugctlmsr),
+                     (u32)((u64)debugctlmsr >> 32));
+}
+
 /*
  * from system description table in BIOS. Mostly for MCA use, but
  * others may find it useful:
@@ -815,6 +837,7 @@ extern unsigned int		BIOS_revision;
 
 /* Boot loader type from the setup header: */
 extern int                      bootloader_type;
+extern int                      bootloader_version;
 
 extern char                     ignore_fpu_irq;
 
@@ -875,7 +898,6 @@ static inline void spin_lock_prefetch(const void *x)
         .vm86_info              = NULL,                                   \
         .sysenter_cs            = __KERNEL_CS,                            \
         .io_bitmap_ptr          = NULL,                                   \
-        .fs                     = __KERNEL_PERCPU,                        \
 }
 
 /*
diff --git a/arch/x86/include/asm/ptrace.h b/arch/x86/include/asm/ptrace.h
index 624f133943ed..0f0d908349aa 100644
--- a/arch/x86/include/asm/ptrace.h
+++ b/arch/x86/include/asm/ptrace.h
@@ -236,12 +236,11 @@ extern int do_get_thread_area(struct task_struct *p, int idx,
 extern int do_set_thread_area(struct task_struct *p, int idx,
                               struct user_desc __user *info, int can_allocate);
 
-extern void x86_ptrace_untrace(struct task_struct *);
-extern void x86_ptrace_fork(struct task_struct *child,
-                            unsigned long clone_flags);
+#ifdef CONFIG_X86_PTRACE_BTS
+extern void ptrace_bts_untrace(struct task_struct *tsk);
 
-#define arch_ptrace_untrace(tsk) x86_ptrace_untrace(tsk)
-#define arch_ptrace_fork(child, flags) x86_ptrace_fork(child, flags)
+#define arch_ptrace_untrace(tsk)        ptrace_bts_untrace(tsk)
+#endif /* CONFIG_X86_PTRACE_BTS */
 
 #endif /* __KERNEL__ */
 
diff --git a/arch/x86/include/asm/required-features.h b/arch/x86/include/asm/required-features.h
index a4737dddfd58..64cf2d24fad1 100644
--- a/arch/x86/include/asm/required-features.h
+++ b/arch/x86/include/asm/required-features.h
@@ -48,9 +48,15 @@
 #endif
 
 #ifdef CONFIG_X86_64
+#ifdef CONFIG_PARAVIRT
+/* Paravirtualized systems may not have PSE or PGE available */
 #define NEED_PSE        0
-#define NEED_MSR        (1<<(X86_FEATURE_MSR & 31))
 #define NEED_PGE        0
+#else
+#define NEED_PSE        (1<<(X86_FEATURE_PSE) & 31)
+#define NEED_PGE        (1<<(X86_FEATURE_PGE) & 31)
+#endif
+#define NEED_MSR        (1<<(X86_FEATURE_MSR & 31))
 #define NEED_FXSR       (1<<(X86_FEATURE_FXSR & 31))
 #define NEED_XMM        (1<<(X86_FEATURE_XMM & 31))
 #define NEED_XMM2       (1<<(X86_FEATURE_XMM2 & 31))
diff --git a/arch/x86/include/asm/sparsemem.h b/arch/x86/include/asm/sparsemem.h
index e3cc3c063ec5..4517d6b93188 100644
--- a/arch/x86/include/asm/sparsemem.h
+++ b/arch/x86/include/asm/sparsemem.h
@@ -27,7 +27,7 @@
 #else /* CONFIG_X86_32 */
 # define SECTION_SIZE_BITS      27 /* matt - 128 is convenient right now */
 # define MAX_PHYSADDR_BITS      44
-# define MAX_PHYSMEM_BITS       44 /* Can be max 45 bits */
+# define MAX_PHYSMEM_BITS       46
 #endif
 
 #endif /* CONFIG_SPARSEMEM */
diff --git a/arch/x86/include/asm/svm.h b/arch/x86/include/asm/svm.h
index 82ada75f3ebf..85574b7c1bc1 100644
--- a/arch/x86/include/asm/svm.h
+++ b/arch/x86/include/asm/svm.h
@@ -225,6 +225,7 @@ struct __attribute__ ((__packed__)) vmcb {
 #define SVM_EVTINJ_VALID_ERR (1 << 11)
 
 #define SVM_EXITINTINFO_VEC_MASK SVM_EVTINJ_VEC_MASK
+#define SVM_EXITINTINFO_TYPE_MASK SVM_EVTINJ_TYPE_MASK
 
 #define SVM_EXITINTINFO_TYPE_INTR SVM_EVTINJ_TYPE_INTR
 #define SVM_EXITINTINFO_TYPE_NMI SVM_EVTINJ_TYPE_NMI
diff --git a/arch/x86/include/asm/syscalls.h b/arch/x86/include/asm/syscalls.h
index 7043408f6904..372b76edd63f 100644
--- a/arch/x86/include/asm/syscalls.h
+++ b/arch/x86/include/asm/syscalls.h
@@ -1,7 +1,7 @@
 /*
  * syscalls.h - Linux syscall interfaces (arch-specific)
  *
- * Copyright (c) 2008 Jaswinder Singh
+ * Copyright (c) 2008 Jaswinder Singh Rajput
  *
  * This file is released under the GPLv2.
  * See the file COPYING for more details.
@@ -12,50 +12,55 @@
 
 #include <linux/compiler.h>
 #include <linux/linkage.h>
-#include <linux/types.h>
 #include <linux/signal.h>
+#include <linux/types.h>
 
 /* Common in X86_32 and X86_64 */
 /* kernel/ioport.c */
 asmlinkage long sys_ioperm(unsigned long, unsigned long, int);
 
+/* kernel/process.c */
+int sys_fork(struct pt_regs *);
+int sys_vfork(struct pt_regs *);
+
 /* kernel/ldt.c */
 asmlinkage int sys_modify_ldt(int, void __user *, unsigned long);
 
+/* kernel/signal.c */
+long sys_rt_sigreturn(struct pt_regs *);
+
 /* kernel/tls.c */
 asmlinkage int sys_set_thread_area(struct user_desc __user *);
 asmlinkage int sys_get_thread_area(struct user_desc __user *);
 
 /* X86_32 only */
 #ifdef CONFIG_X86_32
+/* kernel/ioport.c */
+long sys_iopl(struct pt_regs *);
+
 /* kernel/process_32.c */
-int sys_fork(struct pt_regs *);
 int sys_clone(struct pt_regs *);
-int sys_vfork(struct pt_regs *);
 int sys_execve(struct pt_regs *);
 
-/* kernel/signal_32.c */
+/* kernel/signal.c */
 asmlinkage int sys_sigsuspend(int, int, old_sigset_t);
 asmlinkage int sys_sigaction(int, const struct old_sigaction __user *,
                              struct old_sigaction __user *);
 int sys_sigaltstack(struct pt_regs *);
 unsigned long sys_sigreturn(struct pt_regs *);
-long sys_rt_sigreturn(struct pt_regs *);
-
-/* kernel/ioport.c */
-long sys_iopl(struct pt_regs *);
 
 /* kernel/sys_i386_32.c */
+struct mmap_arg_struct;
+struct sel_arg_struct;
+struct oldold_utsname;
+struct old_utsname;
+
 asmlinkage long sys_mmap2(unsigned long, unsigned long, unsigned long,
                           unsigned long, unsigned long, unsigned long);
-struct mmap_arg_struct;
 asmlinkage int old_mmap(struct mmap_arg_struct __user *);
-struct sel_arg_struct;
 asmlinkage int old_select(struct sel_arg_struct __user *);
 asmlinkage int sys_ipc(uint, int, int, int, void __user *, long);
-struct old_utsname;
 asmlinkage int sys_uname(struct old_utsname __user *);
-struct oldold_utsname;
 asmlinkage int sys_olduname(struct oldold_utsname __user *);
 
 /* kernel/vm86_32.c */
@@ -65,29 +70,27 @@ int sys_vm86(struct pt_regs *);
 #else /* CONFIG_X86_32 */
 
 /* X86_64 only */
+/* kernel/ioport.c */
+asmlinkage long sys_iopl(unsigned int, struct pt_regs *);
+
 /* kernel/process_64.c */
-asmlinkage long sys_fork(struct pt_regs *);
 asmlinkage long sys_clone(unsigned long, unsigned long,
                           void __user *, void __user *,
                           struct pt_regs *);
-asmlinkage long sys_vfork(struct pt_regs *);
 asmlinkage long sys_execve(char __user *, char __user * __user *,
                            char __user * __user *,
                            struct pt_regs *);
 long sys_arch_prctl(int, unsigned long);
 
-/* kernel/ioport.c */
-asmlinkage long sys_iopl(unsigned int, struct pt_regs *);
-
-/* kernel/signal_64.c */
+/* kernel/signal.c */
 asmlinkage long sys_sigaltstack(const stack_t __user *, stack_t __user *,
                                 struct pt_regs *);
-long sys_rt_sigreturn(struct pt_regs *);
 
 /* kernel/sys_x86_64.c */
+struct new_utsname;
+
 asmlinkage long sys_mmap(unsigned long, unsigned long, unsigned long,
                          unsigned long, unsigned long, unsigned long);
-struct new_utsname;
 asmlinkage long sys_uname(struct new_utsname __user *);
 
 #endif /* CONFIG_X86_32 */
diff --git a/arch/x86/include/asm/termios.h b/arch/x86/include/asm/termios.h
index f72956331c49..c4ee8056baca 100644
--- a/arch/x86/include/asm/termios.h
+++ b/arch/x86/include/asm/termios.h
@@ -67,6 +67,7 @@ static inline int user_termio_to_kernel_termios(struct ktermios *termios,
         SET_LOW_TERMIOS_BITS(termios, termio, c_oflag);
         SET_LOW_TERMIOS_BITS(termios, termio, c_cflag);
         SET_LOW_TERMIOS_BITS(termios, termio, c_lflag);
+        get_user(termios->c_line, &termio->c_line);
         return copy_from_user(termios->c_cc, termio->c_cc, NCC);
 }
 
diff --git a/arch/x86/include/asm/thread_info.h b/arch/x86/include/asm/thread_info.h
index 8820a73ae090..602c769fc98c 100644
--- a/arch/x86/include/asm/thread_info.h
+++ b/arch/x86/include/asm/thread_info.h
@@ -94,7 +94,8 @@ struct thread_info {
 #define TIF_FORCED_TF           24      /* true if TF in eflags artificially */
 #define TIF_DEBUGCTLMSR         25      /* uses thread_struct.debugctlmsr */
 #define TIF_DS_AREA_MSR         26      /* uses thread_struct.ds_area_msr */
-#define TIF_SYSCALL_FTRACE      27      /* for ftrace syscall instrumentation */
+#define TIF_LAZY_MMU_UPDATES    27      /* task is updating the mmu lazily */
+#define TIF_SYSCALL_FTRACE      28      /* for ftrace syscall instrumentation */
 
 #define _TIF_SYSCALL_TRACE      (1 << TIF_SYSCALL_TRACE)
 #define _TIF_NOTIFY_RESUME      (1 << TIF_NOTIFY_RESUME)
@@ -116,6 +117,7 @@ struct thread_info {
 #define _TIF_FORCED_TF          (1 << TIF_FORCED_TF)
 #define _TIF_DEBUGCTLMSR        (1 << TIF_DEBUGCTLMSR)
 #define _TIF_DS_AREA_MSR        (1 << TIF_DS_AREA_MSR)
+#define _TIF_LAZY_MMU_UPDATES   (1 << TIF_LAZY_MMU_UPDATES)
 #define _TIF_SYSCALL_FTRACE     (1 << TIF_SYSCALL_FTRACE)
 
 /* work to do in syscall_trace_enter() */
diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
index 16a5c84b0329..a5ecc9c33e92 100644
--- a/arch/x86/include/asm/tlbflush.h
+++ b/arch/x86/include/asm/tlbflush.h
@@ -17,7 +17,7 @@
 
 static inline void __native_flush_tlb(void)
 {
-        write_cr3(read_cr3());
+        native_write_cr3(native_read_cr3());
 }
 
 static inline void __native_flush_tlb_global(void)
@@ -32,11 +32,11 @@ static inline void __native_flush_tlb_global(void)
          */
         raw_local_irq_save(flags);
 
-        cr4 = read_cr4();
+        cr4 = native_read_cr4();
         /* clear PGE */
-        write_cr4(cr4 & ~X86_CR4_PGE);
+        native_write_cr4(cr4 & ~X86_CR4_PGE);
         /* write old PGE again and flush TLBs */
-        write_cr4(cr4);
+        native_write_cr4(cr4);
 
         raw_local_irq_restore(flags);
 }
diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h
index f44b49abca49..066ef590d7e0 100644
--- a/arch/x86/include/asm/topology.h
+++ b/arch/x86/include/asm/topology.h
@@ -203,7 +203,8 @@ struct pci_bus;
 void x86_pci_root_bus_res_quirks(struct pci_bus *b);
 
 #ifdef CONFIG_SMP
-#define mc_capable()    (cpumask_weight(cpu_core_mask(0)) != nr_cpu_ids)
+#define mc_capable()    ((boot_cpu_data.x86_max_cores > 1) && \
+                        (cpumask_weight(cpu_core_mask(0)) != nr_cpu_ids))
 #define smt_capable()                   (smp_num_siblings > 1)
 #endif
 
diff --git a/arch/x86/include/asm/traps.h b/arch/x86/include/asm/traps.h
index 0d5342515b86..bfd74c032fca 100644
--- a/arch/x86/include/asm/traps.h
+++ b/arch/x86/include/asm/traps.h
@@ -2,6 +2,7 @@
 #define _ASM_X86_TRAPS_H
 
 #include <asm/debugreg.h>
+#include <asm/siginfo.h>                        /* TRAP_TRACE, ... */
 
 #ifdef CONFIG_X86_32
 #define dotraplinkage
@@ -13,6 +14,9 @@ asmlinkage void divide_error(void);
 asmlinkage void debug(void);
 asmlinkage void nmi(void);
 asmlinkage void int3(void);
+asmlinkage void xen_debug(void);
+asmlinkage void xen_int3(void);
+asmlinkage void xen_stack_segment(void);
 asmlinkage void overflow(void);
 asmlinkage void bounds(void);
 asmlinkage void invalid_op(void);
@@ -74,7 +78,6 @@ static inline int get_si_code(unsigned long condition)
 }
 
 extern int panic_on_unrecovered_nmi;
-extern int kstack_depth_to_print;
 
 void math_error(void __user *);
 void math_emulate(struct math_emu_info *);
diff --git a/arch/x86/include/asm/unistd_32.h b/arch/x86/include/asm/unistd_32.h
index 6e72d74cf8dc..732a30706153 100644
--- a/arch/x86/include/asm/unistd_32.h
+++ b/arch/x86/include/asm/unistd_32.h
@@ -340,6 +340,8 @@
 #define __NR_inotify_init1      332
 #define __NR_preadv             333
 #define __NR_pwritev            334
+#define __NR_rt_tgsigqueueinfo  335
+#define __NR_perf_counter_open  336
 
 #ifdef __KERNEL__
 
diff --git a/arch/x86/include/asm/unistd_64.h b/arch/x86/include/asm/unistd_64.h
index f81829462325..900e1617e672 100644
--- a/arch/x86/include/asm/unistd_64.h
+++ b/arch/x86/include/asm/unistd_64.h
@@ -657,7 +657,10 @@ __SYSCALL(__NR_inotify_init1, sys_inotify_init1)
 __SYSCALL(__NR_preadv, sys_preadv)
 #define __NR_pwritev                            296
 __SYSCALL(__NR_pwritev, sys_pwritev)
-
+#define __NR_rt_tgsigqueueinfo                  297
+__SYSCALL(__NR_rt_tgsigqueueinfo, sys_rt_tgsigqueueinfo)
+#define __NR_perf_counter_open                  298
+__SYSCALL(__NR_perf_counter_open, sys_perf_counter_open)
 
 #ifndef __NO_STUBS
 #define __ARCH_WANT_OLD_READDIR
diff --git a/arch/x86/include/asm/uv/uv_bau.h b/arch/x86/include/asm/uv/uv_bau.h
index 9b0e61bf7a88..bddd44f2f0ab 100644
--- a/arch/x86/include/asm/uv/uv_bau.h
+++ b/arch/x86/include/asm/uv/uv_bau.h
@@ -37,7 +37,7 @@
 #define UV_CPUS_PER_ACT_STATUS          32
 #define UV_ACT_STATUS_MASK              0x3
 #define UV_ACT_STATUS_SIZE              2
-#define UV_ACTIVATION_DESCRIPTOR_SIZE   32
+#define UV_ADP_SIZE                     32
 #define UV_DISTRIBUTION_SIZE            256
 #define UV_SW_ACK_NPENDING              8
 #define UV_NET_ENDPOINT_INTD            0x38
diff --git a/arch/x86/include/asm/uv/uv_hub.h b/arch/x86/include/asm/uv/uv_hub.h
index d3a98ea1062e..341070f7ad5c 100644
--- a/arch/x86/include/asm/uv/uv_hub.h
+++ b/arch/x86/include/asm/uv/uv_hub.h
@@ -133,6 +133,7 @@ struct uv_scir_s {
 struct uv_hub_info_s {
         unsigned long           global_mmr_base;
         unsigned long           gpa_mask;
+        unsigned int            gnode_extra;
         unsigned long           gnode_upper;
         unsigned long           lowmem_remap_top;
         unsigned long           lowmem_remap_base;
@@ -159,7 +160,8 @@ DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info);
  *              p -  PNODE (local part of nsids, right shifted 1)
  */
 #define UV_NASID_TO_PNODE(n)            (((n) >> 1) & uv_hub_info->pnode_mask)
-#define UV_PNODE_TO_NASID(p)            (((p) << 1) | uv_hub_info->gnode_upper)
+#define UV_PNODE_TO_GNODE(p)            ((p) |uv_hub_info->gnode_extra)
+#define UV_PNODE_TO_NASID(p)            (UV_PNODE_TO_GNODE(p) << 1)
 
 #define UV_LOCAL_MMR_BASE               0xf4000000UL
 #define UV_GLOBAL_MMR32_BASE            0xf8000000UL
@@ -173,7 +175,7 @@ DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info);
 #define UV_GLOBAL_MMR32_PNODE_BITS(p)   ((p) << (UV_GLOBAL_MMR32_PNODE_SHIFT))
 
 #define UV_GLOBAL_MMR64_PNODE_BITS(p)                                   \
-        ((unsigned long)(p) << UV_GLOBAL_MMR64_PNODE_SHIFT)
+        ((unsigned long)(UV_PNODE_TO_GNODE(p)) << UV_GLOBAL_MMR64_PNODE_SHIFT)
 
 #define UV_APIC_PNODE_SHIFT     6
 
diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h
index 498f944010b9..11be5ad2e0e9 100644
--- a/arch/x86/include/asm/vmx.h
+++ b/arch/x86/include/asm/vmx.h
@@ -247,6 +247,7 @@ enum vmcs_field {
 #define EXIT_REASON_MSR_READ            31
 #define EXIT_REASON_MSR_WRITE           32
 #define EXIT_REASON_MWAIT_INSTRUCTION   36
+#define EXIT_REASON_MCE_DURING_VMENTRY   41
 #define EXIT_REASON_TPR_BELOW_THRESHOLD 43
 #define EXIT_REASON_APIC_ACCESS         44
 #define EXIT_REASON_EPT_VIOLATION       48
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index 235f5927bb97..4f78bd682125 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -44,6 +44,7 @@ obj-y				+= process.o
 obj-y                           += i387.o xsave.o
 obj-y                           += ptrace.o
 obj-$(CONFIG_X86_DS)            += ds.o
+obj-$(CONFIG_X86_DS_SELFTEST)           += ds_selftest.o
 obj-$(CONFIG_X86_32)            += tls.o
 obj-$(CONFIG_IA32_EMULATION)    += tls.o
 obj-y                           += step.o
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index 844e5e25213b..631086159c53 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -985,11 +985,8 @@ void __init mp_register_ioapic(int id, u32 address, u32 gsi_base)
 
         set_fixmap_nocache(FIX_IO_APIC_BASE_0 + idx, address);
         mp_ioapics[idx].apicid = uniq_ioapic_id(id);
-#ifdef CONFIG_X86_32
         mp_ioapics[idx].apicver = io_apic_get_version(idx);
-#else
-        mp_ioapics[idx].apicver = 0;
-#endif
+
         /*
          * Build basic GSI lookup table to facilitate gsi->io_apic lookups
          * and to prevent reprogramming of IOAPIC pins (PCI GSIs).
diff --git a/arch/x86/kernel/acpi/realmode/Makefile b/arch/x86/kernel/acpi/realmode/Makefile
index 1c31cc0e9def..167bc16ce0e5 100644
--- a/arch/x86/kernel/acpi/realmode/Makefile
+++ b/arch/x86/kernel/acpi/realmode/Makefile
@@ -9,7 +9,7 @@
 always          := wakeup.bin
 targets         := wakeup.elf wakeup.lds
 
-wakeup-y        += wakeup.o wakemain.o video-mode.o copy.o
+wakeup-y        += wakeup.o wakemain.o video-mode.o copy.o bioscall.o regs.o
 
 # The link order of the video-*.o modules can matter.  In particular,
 # video-vga.o *must* be listed first, followed by video-vesa.o.
diff --git a/arch/x86/kernel/acpi/realmode/bioscall.S b/arch/x86/kernel/acpi/realmode/bioscall.S
new file mode 100644
index 000000000000..f51eb0bb56ce
--- /dev/null
+++ b/arch/x86/kernel/acpi/realmode/bioscall.S
@@ -0,0 +1 @@
+#include "../../../boot/bioscall.S"
diff --git a/arch/x86/kernel/acpi/realmode/regs.c b/arch/x86/kernel/acpi/realmode/regs.c
new file mode 100644
index 000000000000..6206033ba202
--- /dev/null
+++ b/arch/x86/kernel/acpi/realmode/regs.c
@@ -0,0 +1 @@
+#include "../../../boot/regs.c"
diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c
index a97db99dad52..1c60554537c3 100644
--- a/arch/x86/kernel/amd_iommu.c
+++ b/arch/x86/kernel/amd_iommu.c
@@ -55,7 +55,16 @@ struct iommu_cmd {
 static int dma_ops_unity_map(struct dma_ops_domain *dma_dom,
                              struct unity_map_entry *e);
 static struct dma_ops_domain *find_protection_domain(u16 devid);
+static u64* alloc_pte(struct protection_domain *dom,
+                      unsigned long address, u64
+                      **pte_page, gfp_t gfp);
+static void dma_ops_reserve_addresses(struct dma_ops_domain *dom,
+                                      unsigned long start_page,
+                                      unsigned int pages);
 
+#ifndef BUS_NOTIFY_UNBOUND_DRIVER
+#define BUS_NOTIFY_UNBOUND_DRIVER 0x0005
+#endif
 
 #ifdef CONFIG_AMD_IOMMU_STATS
 
@@ -213,7 +222,7 @@ irqreturn_t amd_iommu_int_handler(int irq, void *data)
 {
         struct amd_iommu *iommu;
 
-        list_for_each_entry(iommu, &amd_iommu_list, list)
+        for_each_iommu(iommu)
                 iommu_poll_events(iommu);
 
         return IRQ_HANDLED;
@@ -440,7 +449,7 @@ static void iommu_flush_domain(u16 domid)
         __iommu_build_inv_iommu_pages(&cmd, CMD_INV_IOMMU_ALL_PAGES_ADDRESS,
                                       domid, 1, 1);
 
-        list_for_each_entry(iommu, &amd_iommu_list, list) {
+        for_each_iommu(iommu) {
                 spin_lock_irqsave(&iommu->lock, flags);
                 __iommu_queue_command(iommu, &cmd);
                 __iommu_completion_wait(iommu);
@@ -449,6 +458,35 @@ static void iommu_flush_domain(u16 domid)
         }
 }
 
+void amd_iommu_flush_all_domains(void)
+{
+        int i;
+
+        for (i = 1; i < MAX_DOMAIN_ID; ++i) {
+                if (!test_bit(i, amd_iommu_pd_alloc_bitmap))
+                        continue;
+                iommu_flush_domain(i);
+        }
+}
+
+void amd_iommu_flush_all_devices(void)
+{
+        struct amd_iommu *iommu;
+        int i;
+
+        for (i = 0; i <= amd_iommu_last_bdf; ++i) {
+                if (amd_iommu_pd_table[i] == NULL)
+                        continue;
+
+                iommu = amd_iommu_rlookup_table[i];
+                if (!iommu)
+                        continue;
+
+                iommu_queue_inv_dev_entry(iommu, i);
+                iommu_completion_wait(iommu);
+        }
+}
+
 /****************************************************************************
  *
  * The functions below are used the create the page table mappings for
@@ -468,7 +506,7 @@ static int iommu_map_page(struct protection_domain *dom,
                           unsigned long phys_addr,
                           int prot)
 {
-        u64 __pte, *pte, *page;
+        u64 __pte, *pte;
 
         bus_addr  = PAGE_ALIGN(bus_addr);
         phys_addr = PAGE_ALIGN(phys_addr);
@@ -477,27 +515,7 @@ static int iommu_map_page(struct protection_domain *dom,
         if (bus_addr > IOMMU_MAP_SIZE_L3 || !(prot & IOMMU_PROT_MASK))
                 return -EINVAL;
 
-        pte = &dom->pt_root[IOMMU_PTE_L2_INDEX(bus_addr)];
-
-        if (!IOMMU_PTE_PRESENT(*pte)) {
-                page = (u64 *)get_zeroed_page(GFP_KERNEL);
-                if (!page)
-                        return -ENOMEM;
-                *pte = IOMMU_L2_PDE(virt_to_phys(page));
-        }
-
-        pte = IOMMU_PTE_PAGE(*pte);
-        pte = &pte[IOMMU_PTE_L1_INDEX(bus_addr)];
-
-        if (!IOMMU_PTE_PRESENT(*pte)) {
-                page = (u64 *)get_zeroed_page(GFP_KERNEL);
-                if (!page)
-                        return -ENOMEM;
-                *pte = IOMMU_L1_PDE(virt_to_phys(page));
-        }
-
-        pte = IOMMU_PTE_PAGE(*pte);
-        pte = &pte[IOMMU_PTE_L0_INDEX(bus_addr)];
+        pte = alloc_pte(dom, bus_addr, NULL, GFP_KERNEL);
 
         if (IOMMU_PTE_PRESENT(*pte))
                 return -EBUSY;
@@ -595,7 +613,8 @@ static int dma_ops_unity_map(struct dma_ops_domain *dma_dom,
                  * as allocated in the aperture
                  */
                 if (addr < dma_dom->aperture_size)
-                        __set_bit(addr >> PAGE_SHIFT, dma_dom->bitmap);
+                        __set_bit(addr >> PAGE_SHIFT,
+                                  dma_dom->aperture[0]->bitmap);
         }
 
         return 0;
@@ -632,42 +651,191 @@ static int init_unity_mappings_for_device(struct dma_ops_domain *dma_dom,
  ****************************************************************************/
 
 /*
- * The address allocator core function.
+ * The address allocator core functions.
  *
  * called with domain->lock held
  */
+
+/*
+ * This function checks if there is a PTE for a given dma address. If
+ * there is one, it returns the pointer to it.
+ */
+static u64* fetch_pte(struct protection_domain *domain,
+                      unsigned long address)
+{
+        u64 *pte;
+
+        pte = &domain->pt_root[IOMMU_PTE_L2_INDEX(address)];
+
+        if (!IOMMU_PTE_PRESENT(*pte))
+                return NULL;
+
+        pte = IOMMU_PTE_PAGE(*pte);
+        pte = &pte[IOMMU_PTE_L1_INDEX(address)];
+
+        if (!IOMMU_PTE_PRESENT(*pte))
+                return NULL;
+
+        pte = IOMMU_PTE_PAGE(*pte);
+        pte = &pte[IOMMU_PTE_L0_INDEX(address)];
+
+        return pte;
+}
+
+/*
+ * This function is used to add a new aperture range to an existing
+ * aperture in case of dma_ops domain allocation or address allocation
+ * failure.
+ */
+static int alloc_new_range(struct amd_iommu *iommu,
+                           struct dma_ops_domain *dma_dom,
+                           bool populate, gfp_t gfp)
+{
+        int index = dma_dom->aperture_size >> APERTURE_RANGE_SHIFT;
+        int i;
+
+#ifdef CONFIG_IOMMU_STRESS
+        populate = false;
+#endif
+
+        if (index >= APERTURE_MAX_RANGES)
+                return -ENOMEM;
+
+        dma_dom->aperture[index] = kzalloc(sizeof(struct aperture_range), gfp);
+        if (!dma_dom->aperture[index])
+                return -ENOMEM;
+
+        dma_dom->aperture[index]->bitmap = (void *)get_zeroed_page(gfp);
+        if (!dma_dom->aperture[index]->bitmap)
+                goto out_free;
+
+        dma_dom->aperture[index]->offset = dma_dom->aperture_size;
+
+        if (populate) {
+                unsigned long address = dma_dom->aperture_size;
+                int i, num_ptes = APERTURE_RANGE_PAGES / 512;
+                u64 *pte, *pte_page;
+
+                for (i = 0; i < num_ptes; ++i) {
+                        pte = alloc_pte(&dma_dom->domain, address,
+                                        &pte_page, gfp);
+                        if (!pte)
+                                goto out_free;
+
+                        dma_dom->aperture[index]->pte_pages[i] = pte_page;
+
+                        address += APERTURE_RANGE_SIZE / 64;
+                }
+        }
+
+        dma_dom->aperture_size += APERTURE_RANGE_SIZE;
+
+        /* Intialize the exclusion range if necessary */
+        if (iommu->exclusion_start &&
+            iommu->exclusion_start >= dma_dom->aperture[index]->offset &&
+            iommu->exclusion_start < dma_dom->aperture_size) {
+                unsigned long startpage = iommu->exclusion_start >> PAGE_SHIFT;
+                int pages = iommu_num_pages(iommu->exclusion_start,
+                                            iommu->exclusion_length,
+                                            PAGE_SIZE);
+                dma_ops_reserve_addresses(dma_dom, startpage, pages);
+        }
+
+        /*
+         * Check for areas already mapped as present in the new aperture
+         * range and mark those pages as reserved in the allocator. Such
+         * mappings may already exist as a result of requested unity
+         * mappings for devices.
+         */
+        for (i = dma_dom->aperture[index]->offset;
+             i < dma_dom->aperture_size;
+             i += PAGE_SIZE) {
+                u64 *pte = fetch_pte(&dma_dom->domain, i);
+                if (!pte || !IOMMU_PTE_PRESENT(*pte))
+                        continue;
+
+                dma_ops_reserve_addresses(dma_dom, i << PAGE_SHIFT, 1);
+        }
+
+        return 0;
+
+out_free:
+        free_page((unsigned long)dma_dom->aperture[index]->bitmap);
+
+        kfree(dma_dom->aperture[index]);
+        dma_dom->aperture[index] = NULL;
+
+        return -ENOMEM;
+}
+
+static unsigned long dma_ops_area_alloc(struct device *dev,
+                                        struct dma_ops_domain *dom,
+                                        unsigned int pages,
+                                        unsigned long align_mask,
+                                        u64 dma_mask,
+                                        unsigned long start)
+{
+        unsigned long next_bit = dom->next_address % APERTURE_RANGE_SIZE;
+        int max_index = dom->aperture_size >> APERTURE_RANGE_SHIFT;
+        int i = start >> APERTURE_RANGE_SHIFT;
+        unsigned long boundary_size;
+        unsigned long address = -1;
+        unsigned long limit;
+
+        next_bit >>= PAGE_SHIFT;
+
+        boundary_size = ALIGN(dma_get_seg_boundary(dev) + 1,
+                        PAGE_SIZE) >> PAGE_SHIFT;
+
+        for (;i < max_index; ++i) {
+                unsigned long offset = dom->aperture[i]->offset >> PAGE_SHIFT;
+
+                if (dom->aperture[i]->offset >= dma_mask)
+                        break;
+
+                limit = iommu_device_max_index(APERTURE_RANGE_PAGES, offset,
+                                               dma_mask >> PAGE_SHIFT);
+
+                address = iommu_area_alloc(dom->aperture[i]->bitmap,
+                                           limit, next_bit, pages, 0,
+                                            boundary_size, align_mask);
+                if (address != -1) {
+                        address = dom->aperture[i]->offset +
+                                  (address << PAGE_SHIFT);
+                        dom->next_address = address + (pages << PAGE_SHIFT);
+                        break;
+                }
+
+                next_bit = 0;
+        }
+
+        return address;
+}
+
 static unsigned long dma_ops_alloc_addresses(struct device *dev,
                                              struct dma_ops_domain *dom,
                                              unsigned int pages,
                                              unsigned long align_mask,
                                              u64 dma_mask)
 {
-        unsigned long limit;
         unsigned long address;
-        unsigned long boundary_size;
 
-        boundary_size = ALIGN(dma_get_seg_boundary(dev) + 1,
-                        PAGE_SIZE) >> PAGE_SHIFT;
-        limit = iommu_device_max_index(dom->aperture_size >> PAGE_SHIFT, 0,
-                                       dma_mask >> PAGE_SHIFT);
+#ifdef CONFIG_IOMMU_STRESS
+        dom->next_address = 0;
+        dom->need_flush = true;
+#endif
 
-        if (dom->next_bit >= limit) {
-                dom->next_bit = 0;
-                dom->need_flush = true;
-        }
+        address = dma_ops_area_alloc(dev, dom, pages, align_mask,
+                                     dma_mask, dom->next_address);
 
-        address = iommu_area_alloc(dom->bitmap, limit, dom->next_bit, pages,
-                                   0 , boundary_size, align_mask);
         if (address == -1) {
-                address = iommu_area_alloc(dom->bitmap, limit, 0, pages,
-                                0, boundary_size, align_mask);
+                dom->next_address = 0;
+                address = dma_ops_area_alloc(dev, dom, pages, align_mask,
+                                             dma_mask, 0);
                 dom->need_flush = true;
         }
 
-        if (likely(address != -1)) {
-                dom->next_bit = address + pages;
-                address <<= PAGE_SHIFT;
-        } else
+        if (unlikely(address == -1))
                 address = bad_dma_address;
 
         WARN_ON((address + (PAGE_SIZE*pages)) > dom->aperture_size);
@@ -684,11 +852,23 @@ static void dma_ops_free_addresses(struct dma_ops_domain *dom,
                                    unsigned long address,
                                    unsigned int pages)
 {
-        address >>= PAGE_SHIFT;
-        iommu_area_free(dom->bitmap, address, pages);
+        unsigned i = address >> APERTURE_RANGE_SHIFT;
+        struct aperture_range *range = dom->aperture[i];
 
-        if (address >= dom->next_bit)
+        BUG_ON(i >= APERTURE_MAX_RANGES || range == NULL);
+
+#ifdef CONFIG_IOMMU_STRESS
+        if (i < 4)
+                return;
+#endif
+
+        if (address >= dom->next_address)
                 dom->need_flush = true;
+
+        address = (address % APERTURE_RANGE_SIZE) >> PAGE_SHIFT;
+
+        iommu_area_free(range->bitmap, address, pages);
+
 }
 
 /****************************************************************************
@@ -736,12 +916,16 @@ static void dma_ops_reserve_addresses(struct dma_ops_domain *dom,
                                       unsigned long start_page,
                                       unsigned int pages)
 {
-        unsigned int last_page = dom->aperture_size >> PAGE_SHIFT;
+        unsigned int i, last_page = dom->aperture_size >> PAGE_SHIFT;
 
         if (start_page + pages > last_page)
                 pages = last_page - start_page;
 
-        iommu_area_reserve(dom->bitmap, start_page, pages);
+        for (i = start_page; i < start_page + pages; ++i) {
+                int index = i / APERTURE_RANGE_PAGES;
+                int page  = i % APERTURE_RANGE_PAGES;
+                __set_bit(page, dom->aperture[index]->bitmap);
+        }
 }
 
 static void free_pagetable(struct protection_domain *domain)
@@ -780,14 +964,19 @@ static void free_pagetable(struct protection_domain *domain)
  */
 static void dma_ops_domain_free(struct dma_ops_domain *dom)
 {
+        int i;
+
         if (!dom)
                 return;
 
         free_pagetable(&dom->domain);
 
-        kfree(dom->pte_pages);
-
-        kfree(dom->bitmap);
+        for (i = 0; i < APERTURE_MAX_RANGES; ++i) {
+                if (!dom->aperture[i])
+                        continue;
+                free_page((unsigned long)dom->aperture[i]->bitmap);
+                kfree(dom->aperture[i]);
+        }
 
         kfree(dom);
 }
@@ -797,19 +986,9 @@ static void dma_ops_domain_free(struct dma_ops_domain *dom)
  * It also intializes the page table and the address allocator data
  * structures required for the dma_ops interface
  */
-static struct dma_ops_domain *dma_ops_domain_alloc(struct amd_iommu *iommu,
-                                                   unsigned order)
+static struct dma_ops_domain *dma_ops_domain_alloc(struct amd_iommu *iommu)
 {
         struct dma_ops_domain *dma_dom;
-        unsigned i, num_pte_pages;
-        u64 *l2_pde;
-        u64 address;
-
-        /*
-         * Currently the DMA aperture must be between 32 MB and 1GB in size
-         */
-        if ((order < 25) || (order > 30))
-                return NULL;
 
         dma_dom = kzalloc(sizeof(struct dma_ops_domain), GFP_KERNEL);
         if (!dma_dom)
@@ -826,55 +1005,20 @@ static struct dma_ops_domain *dma_ops_domain_alloc(struct amd_iommu *iommu,
         dma_dom->domain.priv = dma_dom;
         if (!dma_dom->domain.pt_root)
                 goto free_dma_dom;
-        dma_dom->aperture_size = (1ULL << order);
-        dma_dom->bitmap = kzalloc(dma_dom->aperture_size / (PAGE_SIZE * 8),
-                                  GFP_KERNEL);
-        if (!dma_dom->bitmap)
-                goto free_dma_dom;
-        /*
-         * mark the first page as allocated so we never return 0 as
-         * a valid dma-address. So we can use 0 as error value
-         */
-        dma_dom->bitmap[0] = 1;
-        dma_dom->next_bit = 0;
 
         dma_dom->need_flush = false;
         dma_dom->target_dev = 0xffff;
 
-        /* Intialize the exclusion range if necessary */
-        if (iommu->exclusion_start &&
-            iommu->exclusion_start < dma_dom->aperture_size) {
-                unsigned long startpage = iommu->exclusion_start >> PAGE_SHIFT;
-                int pages = iommu_num_pages(iommu->exclusion_start,
-                                            iommu->exclusion_length,
-                                            PAGE_SIZE);
-                dma_ops_reserve_addresses(dma_dom, startpage, pages);
-        }
+        if (alloc_new_range(iommu, dma_dom, true, GFP_KERNEL))
+                goto free_dma_dom;
 
         /*
-         * At the last step, build the page tables so we don't need to
-         * allocate page table pages in the dma_ops mapping/unmapping
-         * path.
+         * mark the first page as allocated so we never return 0 as
+         * a valid dma-address. So we can use 0 as error value
          */
-        num_pte_pages = dma_dom->aperture_size / (PAGE_SIZE * 512);
-        dma_dom->pte_pages = kzalloc(num_pte_pages * sizeof(void *),
-                        GFP_KERNEL);
-        if (!dma_dom->pte_pages)
-                goto free_dma_dom;
-
-        l2_pde = (u64 *)get_zeroed_page(GFP_KERNEL);
-        if (l2_pde == NULL)
-                goto free_dma_dom;
+        dma_dom->aperture[0]->bitmap[0] = 1;
+        dma_dom->next_address = 0;
 
-        dma_dom->domain.pt_root[0] = IOMMU_L2_PDE(virt_to_phys(l2_pde));
-
-        for (i = 0; i < num_pte_pages; ++i) {
-                dma_dom->pte_pages[i] = (u64 *)get_zeroed_page(GFP_KERNEL);
-                if (!dma_dom->pte_pages[i])
-                        goto free_dma_dom;
-                address = virt_to_phys(dma_dom->pte_pages[i]);
-                l2_pde[i] = IOMMU_L1_PDE(address);
-        }
 
         return dma_dom;
 
@@ -983,7 +1127,6 @@ static int device_change_notifier(struct notifier_block *nb,
         struct protection_domain *domain;
         struct dma_ops_domain *dma_domain;
         struct amd_iommu *iommu;
-        int order = amd_iommu_aperture_order;
         unsigned long flags;
 
         if (devid > amd_iommu_last_bdf)
@@ -1002,17 +1145,7 @@ static int device_change_notifier(struct notifier_block *nb,
                           "to a non-dma-ops domain\n", dev_name(dev));
 
         switch (action) {
-        case BUS_NOTIFY_BOUND_DRIVER:
-                if (domain)
-                        goto out;
-                dma_domain = find_protection_domain(devid);
-                if (!dma_domain)
-                        dma_domain = iommu->default_dom;
-                attach_device(iommu, &dma_domain->domain, devid);
-                printk(KERN_INFO "AMD IOMMU: Using protection domain %d for "
-                       "device %s\n", dma_domain->domain.id, dev_name(dev));
-                break;
-        case BUS_NOTIFY_UNBIND_DRIVER:
+        case BUS_NOTIFY_UNBOUND_DRIVER:
                 if (!domain)
                         goto out;
                 detach_device(domain, devid);
@@ -1022,7 +1155,7 @@ static int device_change_notifier(struct notifier_block *nb,
                 dma_domain = find_protection_domain(devid);
                 if (dma_domain)
                         goto out;
-                dma_domain = dma_ops_domain_alloc(iommu, order);
+                dma_domain = dma_ops_domain_alloc(iommu);
                 if (!dma_domain)
                         goto out;
                 dma_domain->target_dev = devid;
@@ -1133,8 +1266,8 @@ static int get_device_resources(struct device *dev,
                         dma_dom = (*iommu)->default_dom;
                 *domain = &dma_dom->domain;
                 attach_device(*iommu, *domain, *bdf);
-                printk(KERN_INFO "AMD IOMMU: Using protection domain %d for "
-                                "device %s\n", (*domain)->id, dev_name(dev));
+                DUMP_printk("Using protection domain %d for device %s\n",
+                            (*domain)->id, dev_name(dev));
         }
 
         if (domain_for_device(_bdf) == NULL)
@@ -1144,6 +1277,66 @@ static int get_device_resources(struct device *dev,
 }
 
 /*
+ * If the pte_page is not yet allocated this function is called
+ */
+static u64* alloc_pte(struct protection_domain *dom,
+                      unsigned long address, u64 **pte_page, gfp_t gfp)
+{
+        u64 *pte, *page;
+
+        pte = &dom->pt_root[IOMMU_PTE_L2_INDEX(address)];
+
+        if (!IOMMU_PTE_PRESENT(*pte)) {
+                page = (u64 *)get_zeroed_page(gfp);
+                if (!page)
+                        return NULL;
+                *pte = IOMMU_L2_PDE(virt_to_phys(page));
+        }
+
+        pte = IOMMU_PTE_PAGE(*pte);
+        pte = &pte[IOMMU_PTE_L1_INDEX(address)];
+
+        if (!IOMMU_PTE_PRESENT(*pte)) {
+                page = (u64 *)get_zeroed_page(gfp);
+                if (!page)
+                        return NULL;
+                *pte = IOMMU_L1_PDE(virt_to_phys(page));
+        }
+
+        pte = IOMMU_PTE_PAGE(*pte);
+
+        if (pte_page)
+                *pte_page = pte;
+
+        pte = &pte[IOMMU_PTE_L0_INDEX(address)];
+
+        return pte;
+}
+
+/*
+ * This function fetches the PTE for a given address in the aperture
+ */
+static u64* dma_ops_get_pte(struct dma_ops_domain *dom,
+                            unsigned long address)
+{
+        struct aperture_range *aperture;
+        u64 *pte, *pte_page;
+
+        aperture = dom->aperture[APERTURE_RANGE_INDEX(address)];
+        if (!aperture)
+                return NULL;
+
+        pte = aperture->pte_pages[APERTURE_PAGE_INDEX(address)];
+        if (!pte) {
+                pte = alloc_pte(&dom->domain, address, &pte_page, GFP_ATOMIC);
+                aperture->pte_pages[APERTURE_PAGE_INDEX(address)] = pte_page;
+        } else
+                pte += IOMMU_PTE_L0_INDEX(address);
+
+        return pte;
+}
+
+/*
  * This is the generic map function. It maps one 4kb page at paddr to
  * the given address in the DMA address space for the domain.
  */
@@ -1159,8 +1352,9 @@ static dma_addr_t dma_ops_domain_map(struct amd_iommu *iommu,
 
         paddr &= PAGE_MASK;
 
-        pte  = dom->pte_pages[IOMMU_PTE_L1_INDEX(address)];
-        pte += IOMMU_PTE_L0_INDEX(address);
+        pte  = dma_ops_get_pte(dom, address);
+        if (!pte)
+                return bad_dma_address;
 
         __pte = paddr | IOMMU_PTE_P | IOMMU_PTE_FC;
 
@@ -1185,14 +1379,20 @@ static void dma_ops_domain_unmap(struct amd_iommu *iommu,
                                  struct dma_ops_domain *dom,
                                  unsigned long address)
 {
+        struct aperture_range *aperture;
         u64 *pte;
 
         if (address >= dom->aperture_size)
                 return;
 
-        WARN_ON(address & ~PAGE_MASK || address >= dom->aperture_size);
+        aperture = dom->aperture[APERTURE_RANGE_INDEX(address)];
+        if (!aperture)
+                return;
+
+        pte  = aperture->pte_pages[APERTURE_PAGE_INDEX(address)];
+        if (!pte)
+                return;
 
-        pte  = dom->pte_pages[IOMMU_PTE_L1_INDEX(address)];
         pte += IOMMU_PTE_L0_INDEX(address);
 
         WARN_ON(!*pte);
@@ -1216,7 +1416,7 @@ static dma_addr_t __map_single(struct device *dev,
                                u64 dma_mask)
 {
         dma_addr_t offset = paddr & ~PAGE_MASK;
-        dma_addr_t address, start;
+        dma_addr_t address, start, ret;
         unsigned int pages;
         unsigned long align_mask = 0;
         int i;
@@ -1232,14 +1432,33 @@ static dma_addr_t __map_single(struct device *dev,
         if (align)
                 align_mask = (1UL << get_order(size)) - 1;
 
+retry:
         address = dma_ops_alloc_addresses(dev, dma_dom, pages, align_mask,
                                           dma_mask);
-        if (unlikely(address == bad_dma_address))
-                goto out;
+        if (unlikely(address == bad_dma_address)) {
+                /*
+                 * setting next_address here will let the address
+                 * allocator only scan the new allocated range in the
+                 * first run. This is a small optimization.
+                 */
+                dma_dom->next_address = dma_dom->aperture_size;
+
+                if (alloc_new_range(iommu, dma_dom, false, GFP_ATOMIC))
+                        goto out;
+
+                /*
+                 * aperture was sucessfully enlarged by 128 MB, try
+                 * allocation again
+                 */
+                goto retry;
+        }
 
         start = address;
         for (i = 0; i < pages; ++i) {
-                dma_ops_domain_map(iommu, dma_dom, start, paddr, dir);
+                ret = dma_ops_domain_map(iommu, dma_dom, start, paddr, dir);
+                if (ret == bad_dma_address)
+                        goto out_unmap;
+
                 paddr += PAGE_SIZE;
                 start += PAGE_SIZE;
         }
@@ -1255,6 +1474,17 @@ static dma_addr_t __map_single(struct device *dev,
 
 out:
         return address;
+
+out_unmap:
+
+        for (--i; i >= 0; --i) {
+                start -= PAGE_SIZE;
+                dma_ops_domain_unmap(iommu, dma_dom, start);
+        }
+
+        dma_ops_free_addresses(dma_dom, address, pages);
+
+        return bad_dma_address;
 }
 
 /*
@@ -1537,8 +1767,10 @@ static void *alloc_coherent(struct device *dev, size_t size,
         *dma_addr = __map_single(dev, iommu, domain->priv, paddr,
                                  size, DMA_BIDIRECTIONAL, true, dma_mask);
 
-        if (*dma_addr == bad_dma_address)
+        if (*dma_addr == bad_dma_address) {
+                spin_unlock_irqrestore(&domain->lock, flags);
                 goto out_free;
+        }
 
         iommu_completion_wait(iommu);
 
@@ -1625,7 +1857,6 @@ static void prealloc_protection_domains(void)
         struct pci_dev *dev = NULL;
         struct dma_ops_domain *dma_dom;
         struct amd_iommu *iommu;
-        int order = amd_iommu_aperture_order;
         u16 devid;
 
         while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
@@ -1638,7 +1869,7 @@ static void prealloc_protection_domains(void)
                 iommu = amd_iommu_rlookup_table[devid];
                 if (!iommu)
                         continue;
-                dma_dom = dma_ops_domain_alloc(iommu, order);
+                dma_dom = dma_ops_domain_alloc(iommu);
                 if (!dma_dom)
                         continue;
                 init_unity_mappings_for_device(dma_dom, devid);
@@ -1664,7 +1895,6 @@ static struct dma_map_ops amd_iommu_dma_ops = {
 int __init amd_iommu_init_dma_ops(void)
 {
         struct amd_iommu *iommu;
-        int order = amd_iommu_aperture_order;
         int ret;
 
         /*
@@ -1672,8 +1902,8 @@ int __init amd_iommu_init_dma_ops(void)
          * found in the system. Devices not assigned to any other
          * protection domain will be assigned to the default one.
          */
-        list_for_each_entry(iommu, &amd_iommu_list, list) {
-                iommu->default_dom = dma_ops_domain_alloc(iommu, order);
+        for_each_iommu(iommu) {
+                iommu->default_dom = dma_ops_domain_alloc(iommu);
                 if (iommu->default_dom == NULL)
                         return -ENOMEM;
                 iommu->default_dom->domain.flags |= PD_DEFAULT_MASK;
@@ -1710,7 +1940,7 @@ int __init amd_iommu_init_dma_ops(void)
 
 free_domains:
 
-        list_for_each_entry(iommu, &amd_iommu_list, list) {
+        for_each_iommu(iommu) {
                 if (iommu->default_dom)
                         dma_ops_domain_free(iommu->default_dom);
         }
@@ -1842,7 +2072,7 @@ static int amd_iommu_attach_device(struct iommu_domain *dom,
 
         old_domain = domain_for_device(devid);
         if (old_domain)
-                return -EBUSY;
+                detach_device(old_domain, devid);
 
         attach_device(iommu, domain, devid);
 
diff --git a/arch/x86/kernel/amd_iommu_init.c b/arch/x86/kernel/amd_iommu_init.c
index 8c0be0902dac..238989ec077d 100644
--- a/arch/x86/kernel/amd_iommu_init.c
+++ b/arch/x86/kernel/amd_iommu_init.c
@@ -115,15 +115,21 @@ struct ivmd_header {
         u64 range_length;
 } __attribute__((packed));
 
+bool amd_iommu_dump;
+
 static int __initdata amd_iommu_detected;
 
 u16 amd_iommu_last_bdf;                 /* largest PCI device id we have
                                            to handle */
 LIST_HEAD(amd_iommu_unity_map);         /* a list of required unity mappings
                                            we find in ACPI */
-unsigned amd_iommu_aperture_order = 26; /* size of aperture in power of 2 */
+#ifdef CONFIG_IOMMU_STRESS
+bool amd_iommu_isolate = false;
+#else
 bool amd_iommu_isolate = true;          /* if true, device isolation is
                                            enabled */
+#endif
+
 bool amd_iommu_unmap_flush;             /* if true, flush on every unmap */
 
 LIST_HEAD(amd_iommu_list);              /* list of all AMD IOMMUs in the
@@ -175,7 +181,7 @@ static inline void update_last_devid(u16 devid)
 static inline unsigned long tbl_size(int entry_size)
 {
         unsigned shift = PAGE_SHIFT +
-                         get_order(amd_iommu_last_bdf * entry_size);
+                         get_order(((int)amd_iommu_last_bdf + 1) * entry_size);
 
         return 1UL << shift;
 }
@@ -193,7 +199,7 @@ static inline unsigned long tbl_size(int entry_size)
  * This function set the exclusion range in the IOMMU. DMA accesses to the
  * exclusion range are passed through untranslated
  */
-static void __init iommu_set_exclusion_range(struct amd_iommu *iommu)
+static void iommu_set_exclusion_range(struct amd_iommu *iommu)
 {
         u64 start = iommu->exclusion_start & PAGE_MASK;
         u64 limit = (start + iommu->exclusion_length) & PAGE_MASK;
@@ -225,7 +231,7 @@ static void __init iommu_set_device_table(struct amd_iommu *iommu)
 }
 
 /* Generic functions to enable/disable certain features of the IOMMU. */
-static void __init iommu_feature_enable(struct amd_iommu *iommu, u8 bit)
+static void iommu_feature_enable(struct amd_iommu *iommu, u8 bit)
 {
         u32 ctrl;
 
@@ -244,7 +250,7 @@ static void __init iommu_feature_disable(struct amd_iommu *iommu, u8 bit)
 }
 
 /* Function to enable the hardware */
-static void __init iommu_enable(struct amd_iommu *iommu)
+static void iommu_enable(struct amd_iommu *iommu)
 {
         printk(KERN_INFO "AMD IOMMU: Enabling IOMMU at %s cap 0x%hx\n",
                dev_name(&iommu->dev->dev), iommu->cap_ptr);
@@ -252,11 +258,9 @@ static void __init iommu_enable(struct amd_iommu *iommu)
         iommu_feature_enable(iommu, CONTROL_IOMMU_EN);
 }
 
-/* Function to enable IOMMU event logging and event interrupts */
-static void __init iommu_enable_event_logging(struct amd_iommu *iommu)
+static void iommu_disable(struct amd_iommu *iommu)
 {
-        iommu_feature_enable(iommu, CONTROL_EVT_LOG_EN);
-        iommu_feature_enable(iommu, CONTROL_EVT_INT_EN);
+        iommu_feature_disable(iommu, CONTROL_IOMMU_EN);
 }
 
 /*
@@ -413,25 +417,36 @@ static u8 * __init alloc_command_buffer(struct amd_iommu *iommu)
 {
         u8 *cmd_buf = (u8 *)__get_free_pages(GFP_KERNEL | __GFP_ZERO,
                         get_order(CMD_BUFFER_SIZE));
-        u64 entry;
 
         if (cmd_buf == NULL)
                 return NULL;
 
         iommu->cmd_buf_size = CMD_BUFFER_SIZE;
 
-        entry = (u64)virt_to_phys(cmd_buf);
+        return cmd_buf;
+}
+
+/*
+ * This function writes the command buffer address to the hardware and
+ * enables it.
+ */
+static void iommu_enable_command_buffer(struct amd_iommu *iommu)
+{
+        u64 entry;
+
+        BUG_ON(iommu->cmd_buf == NULL);
+
+        entry = (u64)virt_to_phys(iommu->cmd_buf);
         entry |= MMIO_CMD_SIZE_512;
+
         memcpy_toio(iommu->mmio_base + MMIO_CMD_BUF_OFFSET,
-                        &entry, sizeof(entry));
+                    &entry, sizeof(entry));
 
         /* set head and tail to zero manually */
         writel(0x00, iommu->mmio_base + MMIO_CMD_HEAD_OFFSET);
         writel(0x00, iommu->mmio_base + MMIO_CMD_TAIL_OFFSET);
 
         iommu_feature_enable(iommu, CONTROL_CMDBUF_EN);
-
-        return cmd_buf;
 }
 
 static void __init free_command_buffer(struct amd_iommu *iommu)
@@ -443,20 +458,27 @@ static void __init free_command_buffer(struct amd_iommu *iommu)
 /* allocates the memory where the IOMMU will log its events to */
 static u8 * __init alloc_event_buffer(struct amd_iommu *iommu)
 {
-        u64 entry;
         iommu->evt_buf = (u8 *)__get_free_pages(GFP_KERNEL | __GFP_ZERO,
                                                 get_order(EVT_BUFFER_SIZE));
 
         if (iommu->evt_buf == NULL)
                 return NULL;
 
+        return iommu->evt_buf;
+}
+
+static void iommu_enable_event_buffer(struct amd_iommu *iommu)
+{
+        u64 entry;
+
+        BUG_ON(iommu->evt_buf == NULL);
+
         entry = (u64)virt_to_phys(iommu->evt_buf) | EVT_LEN_MASK;
+
         memcpy_toio(iommu->mmio_base + MMIO_EVT_BUF_OFFSET,
                     &entry, sizeof(entry));
 
-        iommu->evt_buf_size = EVT_BUFFER_SIZE;
-
-        return iommu->evt_buf;
+        iommu_feature_enable(iommu, CONTROL_EVT_LOG_EN);
 }
 
 static void __init free_event_buffer(struct amd_iommu *iommu)
@@ -596,32 +618,83 @@ static void __init init_iommu_from_acpi(struct amd_iommu *iommu,
         p += sizeof(struct ivhd_header);
         end += h->length;
 
+
         while (p < end) {
                 e = (struct ivhd_entry *)p;
                 switch (e->type) {
                 case IVHD_DEV_ALL:
+
+                        DUMP_printk("  DEV_ALL\t\t\t first devid: %02x:%02x.%x"
+                                    " last device %02x:%02x.%x flags: %02x\n",
+                                    PCI_BUS(iommu->first_device),
+                                    PCI_SLOT(iommu->first_device),
+                                    PCI_FUNC(iommu->first_device),
+                                    PCI_BUS(iommu->last_device),
+                                    PCI_SLOT(iommu->last_device),
+                                    PCI_FUNC(iommu->last_device),
+                                    e->flags);
+
                         for (dev_i = iommu->first_device;
                                         dev_i <= iommu->last_device; ++dev_i)
                                 set_dev_entry_from_acpi(iommu, dev_i,
                                                         e->flags, 0);
                         break;
                 case IVHD_DEV_SELECT:
+
+                        DUMP_printk("  DEV_SELECT\t\t\t devid: %02x:%02x.%x "
+                                    "flags: %02x\n",
+                                    PCI_BUS(e->devid),
+                                    PCI_SLOT(e->devid),
+                                    PCI_FUNC(e->devid),
+                                    e->flags);
+
                         devid = e->devid;
                         set_dev_entry_from_acpi(iommu, devid, e->flags, 0);
                         break;
                 case IVHD_DEV_SELECT_RANGE_START:
+
+                        DUMP_printk("  DEV_SELECT_RANGE_START\t "
+                                    "devid: %02x:%02x.%x flags: %02x\n",
+                                    PCI_BUS(e->devid),
+                                    PCI_SLOT(e->devid),
+                                    PCI_FUNC(e->devid),
+                                    e->flags);
+
                         devid_start = e->devid;
                         flags = e->flags;
                         ext_flags = 0;
                         alias = false;
                         break;
                 case IVHD_DEV_ALIAS:
+
+                        DUMP_printk("  DEV_ALIAS\t\t\t devid: %02x:%02x.%x "
+                                    "flags: %02x devid_to: %02x:%02x.%x\n",
+                                    PCI_BUS(e->devid),
+                                    PCI_SLOT(e->devid),
+                                    PCI_FUNC(e->devid),
+                                    e->flags,
+                                    PCI_BUS(e->ext >> 8),
+                                    PCI_SLOT(e->ext >> 8),
+                                    PCI_FUNC(e->ext >> 8));
+
                         devid = e->devid;
                         devid_to = e->ext >> 8;
-                        set_dev_entry_from_acpi(iommu, devid, e->flags, 0);
+                        set_dev_entry_from_acpi(iommu, devid_to, e->flags, 0);
                         amd_iommu_alias_table[devid] = devid_to;
                         break;
                 case IVHD_DEV_ALIAS_RANGE:
+
+                        DUMP_printk("  DEV_ALIAS_RANGE\t\t "
+                                    "devid: %02x:%02x.%x flags: %02x "
+                                    "devid_to: %02x:%02x.%x\n",
+                                    PCI_BUS(e->devid),
+                                    PCI_SLOT(e->devid),
+                                    PCI_FUNC(e->devid),
+                                    e->flags,
+                                    PCI_BUS(e->ext >> 8),
+                                    PCI_SLOT(e->ext >> 8),
+                                    PCI_FUNC(e->ext >> 8));
+
                         devid_start = e->devid;
                         flags = e->flags;
                         devid_to = e->ext >> 8;
@@ -629,17 +702,39 @@ static void __init init_iommu_from_acpi(struct amd_iommu *iommu,
                         alias = true;
                         break;
                 case IVHD_DEV_EXT_SELECT:
+
+                        DUMP_printk("  DEV_EXT_SELECT\t\t devid: %02x:%02x.%x "
+                                    "flags: %02x ext: %08x\n",
+                                    PCI_BUS(e->devid),
+                                    PCI_SLOT(e->devid),
+                                    PCI_FUNC(e->devid),
+                                    e->flags, e->ext);
+
                         devid = e->devid;
                         set_dev_entry_from_acpi(iommu, devid, e->flags,
                                                 e->ext);
                         break;
                 case IVHD_DEV_EXT_SELECT_RANGE:
+
+                        DUMP_printk("  DEV_EXT_SELECT_RANGE\t devid: "
+                                    "%02x:%02x.%x flags: %02x ext: %08x\n",
+                                    PCI_BUS(e->devid),
+                                    PCI_SLOT(e->devid),
+                                    PCI_FUNC(e->devid),
+                                    e->flags, e->ext);
+
                         devid_start = e->devid;
                         flags = e->flags;
                         ext_flags = e->ext;
                         alias = false;
                         break;
                 case IVHD_DEV_RANGE_END:
+
+                        DUMP_printk("  DEV_RANGE_END\t\t devid: %02x:%02x.%x\n",
+                                    PCI_BUS(e->devid),
+                                    PCI_SLOT(e->devid),
+                                    PCI_FUNC(e->devid));
+
                         devid = e->devid;
                         for (dev_i = devid_start; dev_i <= devid; ++dev_i) {
                                 if (alias)
@@ -679,7 +774,7 @@ static void __init free_iommu_all(void)
 {
         struct amd_iommu *iommu, *next;
 
-        list_for_each_entry_safe(iommu, next, &amd_iommu_list, list) {
+        for_each_iommu_safe(iommu, next) {
                 list_del(&iommu->list);
                 free_iommu_one(iommu);
                 kfree(iommu);
@@ -710,7 +805,6 @@ static int __init init_iommu_one(struct amd_iommu *iommu, struct ivhd_header *h)
         if (!iommu->mmio_base)
                 return -ENOMEM;
 
-        iommu_set_device_table(iommu);
         iommu->cmd_buf = alloc_command_buffer(iommu);
         if (!iommu->cmd_buf)
                 return -ENOMEM;
@@ -746,6 +840,15 @@ static int __init init_iommu_all(struct acpi_table_header *table)
                 h = (struct ivhd_header *)p;
                 switch (*p) {
                 case ACPI_IVHD_TYPE:
+
+                        DUMP_printk("IOMMU: device: %02x:%02x.%01x cap: %04x "
+                                    "seg: %d flags: %01x info %04x\n",
+                                    PCI_BUS(h->devid), PCI_SLOT(h->devid),
+                                    PCI_FUNC(h->devid), h->cap_ptr,
+                                    h->pci_seg, h->flags, h->info);
+                        DUMP_printk("       mmio-addr: %016llx\n",
+                                    h->mmio_phys);
+
                         iommu = kzalloc(sizeof(struct amd_iommu), GFP_KERNEL);
                         if (iommu == NULL)
                                 return -ENOMEM;
@@ -773,56 +876,9 @@ static int __init init_iommu_all(struct acpi_table_header *table)
  *
  ****************************************************************************/
 
-static int __init iommu_setup_msix(struct amd_iommu *iommu)
-{
-        struct amd_iommu *curr;
-        struct msix_entry entries[32]; /* only 32 supported by AMD IOMMU */
-        int nvec = 0, i;
-
-        list_for_each_entry(curr, &amd_iommu_list, list) {
-                if (curr->dev == iommu->dev) {
-                        entries[nvec].entry = curr->evt_msi_num;
-                        entries[nvec].vector = 0;
-                        curr->int_enabled = true;
-                        nvec++;
-                }
-        }
-
-        if (pci_enable_msix(iommu->dev, entries, nvec)) {
-                pci_disable_msix(iommu->dev);
-                return 1;
-        }
-
-        for (i = 0; i < nvec; ++i) {
-                int r = request_irq(entries->vector, amd_iommu_int_handler,
-                                    IRQF_SAMPLE_RANDOM,
-                                    "AMD IOMMU",
-                                    NULL);
-                if (r)
-                        goto out_free;
-        }
-
-        return 0;
-
-out_free:
-        for (i -= 1; i >= 0; --i)
-                free_irq(entries->vector, NULL);
-
-        pci_disable_msix(iommu->dev);
-
-        return 1;
-}
-
 static int __init iommu_setup_msi(struct amd_iommu *iommu)
 {
         int r;
-        struct amd_iommu *curr;
-
-        list_for_each_entry(curr, &amd_iommu_list, list) {
-                if (curr->dev == iommu->dev)
-                        curr->int_enabled = true;
-        }
-
 
         if (pci_enable_msi(iommu->dev))
                 return 1;
@@ -837,17 +893,18 @@ static int __init iommu_setup_msi(struct amd_iommu *iommu)
                 return 1;
         }
 
+        iommu->int_enabled = true;
+        iommu_feature_enable(iommu, CONTROL_EVT_INT_EN);
+
         return 0;
 }
 
-static int __init iommu_init_msi(struct amd_iommu *iommu)
+static int iommu_init_msi(struct amd_iommu *iommu)
 {
         if (iommu->int_enabled)
                 return 0;
 
-        if (pci_find_capability(iommu->dev, PCI_CAP_ID_MSIX))
-                return iommu_setup_msix(iommu);
-        else if (pci_find_capability(iommu->dev, PCI_CAP_ID_MSI))
+        if (pci_find_capability(iommu->dev, PCI_CAP_ID_MSI))
                 return iommu_setup_msi(iommu);
 
         return 1;
@@ -899,6 +956,7 @@ static int __init init_exclusion_range(struct ivmd_header *m)
 static int __init init_unity_map_range(struct ivmd_header *m)
 {
         struct unity_map_entry *e = 0;
+        char *s;
 
         e = kzalloc(sizeof(*e), GFP_KERNEL);
         if (e == NULL)
@@ -906,14 +964,19 @@ static int __init init_unity_map_range(struct ivmd_header *m)
 
         switch (m->type) {
         default:
+                kfree(e);
+                return 0;
         case ACPI_IVMD_TYPE:
+                s = "IVMD_TYPEi\t\t\t";
                 e->devid_start = e->devid_end = m->devid;
                 break;
         case ACPI_IVMD_TYPE_ALL:
+                s = "IVMD_TYPE_ALL\t\t";
                 e->devid_start = 0;
                 e->devid_end = amd_iommu_last_bdf;
                 break;
         case ACPI_IVMD_TYPE_RANGE:
+                s = "IVMD_TYPE_RANGE\t\t";
                 e->devid_start = m->devid;
                 e->devid_end = m->aux;
                 break;
@@ -922,6 +985,13 @@ static int __init init_unity_map_range(struct ivmd_header *m)
         e->address_end = e->address_start + PAGE_ALIGN(m->range_length);
         e->prot = m->flags >> 1;
 
+        DUMP_printk("%s devid_start: %02x:%02x.%x devid_end: %02x:%02x.%x"
+                    " range_start: %016llx range_end: %016llx flags: %x\n", s,
+                    PCI_BUS(e->devid_start), PCI_SLOT(e->devid_start),
+                    PCI_FUNC(e->devid_start), PCI_BUS(e->devid_end),
+                    PCI_SLOT(e->devid_end), PCI_FUNC(e->devid_end),
+                    e->address_start, e->address_end, m->flags);
+
         list_add_tail(&e->list, &amd_iommu_unity_map);
 
         return 0;
@@ -967,18 +1037,28 @@ static void init_device_table(void)
  * This function finally enables all IOMMUs found in the system after
  * they have been initialized
  */
-static void __init enable_iommus(void)
+static void enable_iommus(void)
 {
         struct amd_iommu *iommu;
 
-        list_for_each_entry(iommu, &amd_iommu_list, list) {
+        for_each_iommu(iommu) {
+                iommu_set_device_table(iommu);
+                iommu_enable_command_buffer(iommu);
+                iommu_enable_event_buffer(iommu);
                 iommu_set_exclusion_range(iommu);
                 iommu_init_msi(iommu);
-                iommu_enable_event_logging(iommu);
                 iommu_enable(iommu);
         }
 }
 
+static void disable_iommus(void)
+{
+        struct amd_iommu *iommu;
+
+        for_each_iommu(iommu)
+                iommu_disable(iommu);
+}
+
 /*
  * Suspend/Resume support
  * disable suspend until real resume implemented
@@ -986,12 +1066,31 @@ static void __init enable_iommus(void)
 
 static int amd_iommu_resume(struct sys_device *dev)
 {
+        /*
+         * Disable IOMMUs before reprogramming the hardware registers.
+         * IOMMU is still enabled from the resume kernel.
+         */
+        disable_iommus();
+
+        /* re-load the hardware */
+        enable_iommus();
+
+        /*
+         * we have to flush after the IOMMUs are enabled because a
+         * disabled IOMMU will never execute the commands we send
+         */
+        amd_iommu_flush_all_domains();
+        amd_iommu_flush_all_devices();
+
         return 0;
 }
 
 static int amd_iommu_suspend(struct sys_device *dev, pm_message_t state)
 {
-        return -EINVAL;
+        /* disable IOMMUs to go out of the way for BIOS */
+        disable_iommus();
+
+        return 0;
 }
 
 static struct sysdev_class amd_iommu_sysdev_class = {
@@ -1137,9 +1236,6 @@ int __init amd_iommu_init(void)
 
         enable_iommus();
 
-        printk(KERN_INFO "AMD IOMMU: aperture size is %d MB\n",
-                        (1 << (amd_iommu_aperture_order-20)));
-
         printk(KERN_INFO "AMD IOMMU: device isolation ");
         if (amd_iommu_isolate)
                 printk("enabled\n");
@@ -1211,6 +1307,13 @@ void __init amd_iommu_detect(void)
  *
  ****************************************************************************/
 
+static int __init parse_amd_iommu_dump(char *str)
+{
+        amd_iommu_dump = true;
+
+        return 1;
+}
+
 static int __init parse_amd_iommu_options(char *str)
 {
         for (; *str; ++str) {
@@ -1225,15 +1328,5 @@ static int __init parse_amd_iommu_options(char *str)
         return 1;
 }
 
-static int __init parse_amd_iommu_size_options(char *str)
-{
-        unsigned order = PAGE_SHIFT + get_order(memparse(str, &str));
-
-        if ((order > 24) && (order < 31))
-                amd_iommu_aperture_order = order;
-
-        return 1;
-}
-
+__setup("amd_iommu_dump", parse_amd_iommu_dump);
 __setup("amd_iommu=", parse_amd_iommu_options);
-__setup("amd_iommu_size=", parse_amd_iommu_size_options);
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index ee75d2a9b9cd..8c7c042ecad1 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -14,6 +14,7 @@
  *      Mikael Pettersson       :       PM converted to driver model.
  */
 
+#include <linux/perf_counter.h>
 #include <linux/kernel_stat.h>
 #include <linux/mc146818rtc.h>
 #include <linux/acpi_pmtmr.h>
@@ -34,6 +35,7 @@
 #include <linux/smp.h>
 #include <linux/mm.h>
 
+#include <asm/perf_counter.h>
 #include <asm/pgalloc.h>
 #include <asm/atomic.h>
 #include <asm/mpspec.h>
@@ -249,7 +251,7 @@ static void native_apic_write_dummy(u32 reg, u32 v)
 
 static u32 native_apic_read_dummy(u32 reg)
 {
-        WARN_ON_ONCE((cpu_has_apic || !disable_apic));
+        WARN_ON_ONCE((cpu_has_apic && !disable_apic));
         return 0;
 }
 
@@ -1187,6 +1189,7 @@ void __cpuinit setup_local_APIC(void)
                 apic_write(APIC_ESR, 0);
         }
 #endif
+        perf_counters_lapic_init();
 
         preempt_disable();
 
@@ -1609,6 +1612,13 @@ void __init init_apic_mappings(void)
         new_apicid = read_apic_id();
         if (boot_cpu_physical_apicid != new_apicid) {
                 boot_cpu_physical_apicid = new_apicid;
+                /*
+                 * yeah -- we lie about apic_version
+                 * in case if apic was disabled via boot option
+                 * but it's not a problem for SMP compiled kernel
+                 * since smp_sanity_check is prepared for such a case
+                 * and disable smp mode
+                 */
                 apic_version[new_apicid] =
                          GET_APIC_VERSION(apic_read(APIC_LVR));
         }
@@ -2027,7 +2037,7 @@ static int lapic_resume(struct sys_device *dev)
         unsigned int l, h;
         unsigned long flags;
         int maxlvt;
-        int ret;
+        int ret = 0;
         struct IO_APIC_route_entry **ioapic_entries = NULL;
 
         if (!apic_pm_state.active)
@@ -2038,14 +2048,15 @@ static int lapic_resume(struct sys_device *dev)
                 ioapic_entries = alloc_ioapic_entries();
                 if (!ioapic_entries) {
                         WARN(1, "Alloc ioapic_entries in lapic resume failed.");
-                        return -ENOMEM;
+                        ret = -ENOMEM;
+                        goto restore;
                 }
 
                 ret = save_IO_APIC_setup(ioapic_entries);
                 if (ret) {
                         WARN(1, "Saving IO-APIC state failed: %d\n", ret);
                         free_ioapic_entries(ioapic_entries);
-                        return ret;
+                        goto restore;
                 }
 
                 mask_IO_APIC_setup(ioapic_entries);
@@ -2097,10 +2108,10 @@ static int lapic_resume(struct sys_device *dev)
                 restore_IO_APIC_setup(ioapic_entries);
                 free_ioapic_entries(ioapic_entries);
         }
-
+restore:
         local_irq_restore(flags);
 
-        return 0;
+        return ret;
 }
 
 /*
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index ac7f3b6ad583..94605e7f6a54 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -59,6 +59,7 @@
 #include <asm/setup.h>
 #include <asm/irq_remapping.h>
 #include <asm/hpet.h>
+#include <asm/hw_irq.h>
 #include <asm/uv/uv_hub.h>
 #include <asm/uv/uv_irq.h>
 
@@ -176,16 +177,18 @@ int __init arch_early_irq_init(void)
         struct irq_cfg *cfg;
         struct irq_desc *desc;
         int count;
+        int node;
         int i;
 
         cfg = irq_cfgx;
         count = ARRAY_SIZE(irq_cfgx);
+        node= cpu_to_node(boot_cpu_id);
 
         for (i = 0; i < count; i++) {
                 desc = irq_to_desc(i);
                 desc->chip_data = &cfg[i];
-                alloc_bootmem_cpumask_var(&cfg[i].domain);
-                alloc_bootmem_cpumask_var(&cfg[i].old_domain);
+                alloc_cpumask_var_node(&cfg[i].domain, GFP_NOWAIT, node);
+                alloc_cpumask_var_node(&cfg[i].old_domain, GFP_NOWAIT, node);
                 if (i < NR_IRQS_LEGACY)
                         cpumask_setall(cfg[i].domain);
         }
@@ -4012,6 +4015,7 @@ int __init io_apic_get_unique_id(int ioapic, int apic_id)
 
         return apic_id;
 }
+#endif
 
 int __init io_apic_get_version(int ioapic)
 {
@@ -4024,7 +4028,6 @@ int __init io_apic_get_version(int ioapic)
 
         return reg_01.bits.version;
 }
-#endif
 
 int acpi_get_override_irq(int bus_irq, int *trigger, int *polarity)
 {
diff --git a/arch/x86/kernel/apic/nmi.c b/arch/x86/kernel/apic/nmi.c
index c4762276c17e..b3025b43b63a 100644
--- a/arch/x86/kernel/apic/nmi.c
+++ b/arch/x86/kernel/apic/nmi.c
@@ -104,7 +104,7 @@ static __init void nmi_cpu_busy(void *data)
 }
 #endif
 
-static void report_broken_nmi(int cpu, int *prev_nmi_count)
+static void report_broken_nmi(int cpu, unsigned int *prev_nmi_count)
 {
         printk(KERN_CONT "\n");
 
diff --git a/arch/x86/kernel/apic/probe_32.c b/arch/x86/kernel/apic/probe_32.c
index 01eda2ac65e4..440a8bccd91a 100644
--- a/arch/x86/kernel/apic/probe_32.c
+++ b/arch/x86/kernel/apic/probe_32.c
@@ -160,7 +160,6 @@ extern struct apic apic_summit;
 extern struct apic apic_bigsmp;
 extern struct apic apic_es7000;
 extern struct apic apic_es7000_cluster;
-extern struct apic apic_default;
 
 struct apic *apic = &apic_default;
 EXPORT_SYMBOL_GPL(apic);
diff --git a/arch/x86/kernel/apic/x2apic_cluster.c b/arch/x86/kernel/apic/x2apic_cluster.c
index 4a903e2f0d17..8e4cbb255c38 100644
--- a/arch/x86/kernel/apic/x2apic_cluster.c
+++ b/arch/x86/kernel/apic/x2apic_cluster.c
@@ -10,7 +10,7 @@
 #include <asm/apic.h>
 #include <asm/ipi.h>
 
-DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid);
+static DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid);
 
 static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
 {
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
index 780a733a5e7a..ef0ae207a7c8 100644
--- a/arch/x86/kernel/apic/x2apic_uv_x.c
+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
@@ -562,7 +562,7 @@ void __init uv_system_init(void)
         union uvh_node_id_u node_id;
         unsigned long gnode_upper, lowmem_redir_base, lowmem_redir_size;
         int bytes, nid, cpu, lcpu, pnode, blade, i, j, m_val, n_val;
-        int max_pnode = 0;
+        int gnode_extra, max_pnode = 0;
         unsigned long mmr_base, present, paddr;
         unsigned short pnode_mask;
 
@@ -574,6 +574,13 @@ void __init uv_system_init(void)
         mmr_base =
             uv_read_local_mmr(UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR) &
             ~UV_MMR_ENABLE;
+        pnode_mask = (1 << n_val) - 1;
+        node_id.v = uv_read_local_mmr(UVH_NODE_ID);
+        gnode_extra = (node_id.s.node_id & ~((1 << n_val) - 1)) >> 1;
+        gnode_upper = ((unsigned long)gnode_extra  << m_val);
+        printk(KERN_DEBUG "UV: N %d, M %d, gnode_upper 0x%lx, gnode_extra 0x%x\n",
+                        n_val, m_val, gnode_upper, gnode_extra);
+
         printk(KERN_DEBUG "UV: global MMR base 0x%lx\n", mmr_base);
 
         for(i = 0; i < UVH_NODE_PRESENT_TABLE_DEPTH; i++)
@@ -610,11 +617,6 @@ void __init uv_system_init(void)
                 }
         }
 
-        pnode_mask = (1 << n_val) - 1;
-        node_id.v = uv_read_local_mmr(UVH_NODE_ID);
-        gnode_upper = (((unsigned long)node_id.s.node_id) &
-                       ~((1 << n_val) - 1)) << m_val;
-
         uv_bios_init();
         uv_bios_get_sn_info(0, &uv_type, &sn_partition_id,
                             &sn_coherency_id, &sn_region_size);
@@ -637,6 +639,7 @@ void __init uv_system_init(void)
                 uv_cpu_hub_info(cpu)->pnode_mask = pnode_mask;
                 uv_cpu_hub_info(cpu)->gpa_mask = (1 << (m_val + n_val)) - 1;
                 uv_cpu_hub_info(cpu)->gnode_upper = gnode_upper;
+                uv_cpu_hub_info(cpu)->gnode_extra = gnode_extra;
                 uv_cpu_hub_info(cpu)->global_mmr_base = mmr_base;
                 uv_cpu_hub_info(cpu)->coherency_domain_number = sn_coherency_id;
                 uv_cpu_hub_info(cpu)->scir.offset = SCIR_LOCAL_MMR_BASE + lcpu;
diff --git a/arch/x86/kernel/asm-offsets_32.c b/arch/x86/kernel/asm-offsets_32.c
index 5a6aa1c1162f..1a830cbd7015 100644
--- a/arch/x86/kernel/asm-offsets_32.c
+++ b/arch/x86/kernel/asm-offsets_32.c
@@ -146,4 +146,5 @@ void foo(void)
         OFFSET(BP_loadflags, boot_params, hdr.loadflags);
         OFFSET(BP_hardware_subarch, boot_params, hdr.hardware_subarch);
         OFFSET(BP_version, boot_params, hdr.version);
+        OFFSET(BP_kernel_alignment, boot_params, hdr.kernel_alignment);
 }
diff --git a/arch/x86/kernel/asm-offsets_64.c b/arch/x86/kernel/asm-offsets_64.c
index e72f062fb4b5..898ecc47e129 100644
--- a/arch/x86/kernel/asm-offsets_64.c
+++ b/arch/x86/kernel/asm-offsets_64.c
@@ -125,6 +125,7 @@ int main(void)
         OFFSET(BP_loadflags, boot_params, hdr.loadflags);
         OFFSET(BP_hardware_subarch, boot_params, hdr.hardware_subarch);
         OFFSET(BP_version, boot_params, hdr.version);
+        OFFSET(BP_kernel_alignment, boot_params, hdr.kernel_alignment);
 
         BLANK();
         DEFINE(PAGE_SIZE_asm, PAGE_SIZE);
diff --git a/arch/x86/kernel/cpu/Makefile b/arch/x86/kernel/cpu/Makefile
index 4e242f9a06e4..3efcb2b96a15 100644
--- a/arch/x86/kernel/cpu/Makefile
+++ b/arch/x86/kernel/cpu/Makefile
@@ -1,5 +1,5 @@
 #
-# Makefile for x86-compatible CPU details and quirks
+# Makefile for x86-compatible CPU details, features and quirks
 #
 
 # Don't trace early stages of a secondary CPU boot
@@ -23,11 +23,13 @@ obj-$(CONFIG_CPU_SUP_CENTAUR)		+= centaur.o
 obj-$(CONFIG_CPU_SUP_TRANSMETA_32)      += transmeta.o
 obj-$(CONFIG_CPU_SUP_UMC_32)            += umc.o
 
-obj-$(CONFIG_X86_MCE)   += mcheck/
-obj-$(CONFIG_MTRR)      += mtrr/
-obj-$(CONFIG_CPU_FREQ)  += cpufreq/
+obj-$(CONFIG_PERF_COUNTERS)             += perf_counter.o
 
-obj-$(CONFIG_X86_LOCAL_APIC) += perfctr-watchdog.o
+obj-$(CONFIG_X86_MCE)                   += mcheck/
+obj-$(CONFIG_MTRR)                      += mtrr/
+obj-$(CONFIG_CPU_FREQ)                  += cpufreq/
+
+obj-$(CONFIG_X86_LOCAL_APIC)            += perfctr-watchdog.o
 
 quiet_cmd_mkcapflags = MKCAP   $@
       cmd_mkcapflags = $(PERL) $(srctree)/$(src)/mkcapflags.pl $< $@
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 728b3750a3e8..e5b27d8f1b47 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -6,6 +6,7 @@
 #include <asm/processor.h>
 #include <asm/apic.h>
 #include <asm/cpu.h>
+#include <asm/pci-direct.h>
 
 #ifdef CONFIG_X86_64
 # include <asm/numa_64.h>
@@ -351,6 +352,15 @@ static void __cpuinit early_init_amd(struct cpuinfo_x86 *c)
                     (c->x86_model == 8 && c->x86_mask >= 8))
                         set_cpu_cap(c, X86_FEATURE_K6_MTRR);
 #endif
+#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_PCI)
+        /* check CPU config space for extended APIC ID */
+        if (c->x86 >= 0xf) {
+                unsigned int val;
+                val = read_pci_config(0, 24, 0, 0x68);
+                if ((val & ((1 << 17) | (1 << 18))) == ((1 << 17) | (1 << 18)))
+                        set_cpu_cap(c, X86_FEATURE_EXTD_APICID);
+        }
+#endif
 }
 
 static void __cpuinit init_amd(struct cpuinfo_x86 *c)
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index b0517aa2bd3b..3ffdcfa9abdf 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -13,6 +13,7 @@
 #include <linux/io.h>
 
 #include <asm/stackprotector.h>
+#include <asm/perf_counter.h>
 #include <asm/mmu_context.h>
 #include <asm/hypervisor.h>
 #include <asm/processor.h>
@@ -874,6 +875,7 @@ void __init identify_boot_cpu(void)
 #else
         vgetcpu_set_mode();
 #endif
+        init_hw_perf_counters();
 }
 
 void __cpuinit identify_secondary_cpu(struct cpuinfo_x86 *c)
diff --git a/arch/x86/kernel/cpu/cpu_debug.c b/arch/x86/kernel/cpu/cpu_debug.c
index 2fc4f6bb9ca5..6b2a52dd0403 100644
--- a/arch/x86/kernel/cpu/cpu_debug.c
+++ b/arch/x86/kernel/cpu/cpu_debug.c
@@ -32,9 +32,7 @@
 
 static DEFINE_PER_CPU(struct cpu_cpuX_base, cpu_arr[CPU_REG_ALL_BIT]);
 static DEFINE_PER_CPU(struct cpu_private *, priv_arr[MAX_CPU_FILES]);
-static DEFINE_PER_CPU(unsigned, cpu_modelflag);
 static DEFINE_PER_CPU(int, cpu_priv_count);
-static DEFINE_PER_CPU(unsigned, cpu_model);
 
 static DEFINE_MUTEX(cpu_debug_lock);
 
@@ -80,302 +78,102 @@ static struct cpu_file_base cpu_file[] = {
         { "value",      CPU_REG_ALL,    1       },
 };
 
-/* Intel Registers Range */
-static struct cpu_debug_range cpu_intel_range[] = {
-        { 0x00000000, 0x00000001, CPU_MC,       CPU_INTEL_ALL           },
-        { 0x00000006, 0x00000007, CPU_MONITOR,  CPU_CX_AT_XE            },
-        { 0x00000010, 0x00000010, CPU_TIME,     CPU_INTEL_ALL           },
-        { 0x00000011, 0x00000013, CPU_PMC,      CPU_INTEL_PENTIUM       },
-        { 0x00000017, 0x00000017, CPU_PLATFORM, CPU_PX_CX_AT_XE         },
-        { 0x0000001B, 0x0000001B, CPU_APIC,     CPU_P6_CX_AT_XE         },
-
-        { 0x0000002A, 0x0000002A, CPU_POWERON,  CPU_PX_CX_AT_XE         },
-        { 0x0000002B, 0x0000002B, CPU_POWERON,  CPU_INTEL_XEON          },
-        { 0x0000002C, 0x0000002C, CPU_FREQ,     CPU_INTEL_XEON          },
-        { 0x0000003A, 0x0000003A, CPU_CONTROL,  CPU_CX_AT_XE            },
-
-        { 0x00000040, 0x00000043, CPU_LBRANCH,  CPU_PM_CX_AT_XE         },
-        { 0x00000044, 0x00000047, CPU_LBRANCH,  CPU_PM_CO_AT            },
-        { 0x00000060, 0x00000063, CPU_LBRANCH,  CPU_C2_AT               },
-        { 0x00000064, 0x00000067, CPU_LBRANCH,  CPU_INTEL_ATOM          },
-
-        { 0x00000079, 0x00000079, CPU_BIOS,     CPU_P6_CX_AT_XE         },
-        { 0x00000088, 0x0000008A, CPU_CACHE,    CPU_INTEL_P6            },
-        { 0x0000008B, 0x0000008B, CPU_BIOS,     CPU_P6_CX_AT_XE         },
-        { 0x0000009B, 0x0000009B, CPU_MONITOR,  CPU_INTEL_XEON          },
-
-        { 0x000000C1, 0x000000C2, CPU_PMC,      CPU_P6_CX_AT            },
-        { 0x000000CD, 0x000000CD, CPU_FREQ,     CPU_CX_AT               },
-        { 0x000000E7, 0x000000E8, CPU_PERF,     CPU_CX_AT               },
-        { 0x000000FE, 0x000000FE, CPU_MTRR,     CPU_P6_CX_XE            },
-
-        { 0x00000116, 0x00000116, CPU_CACHE,    CPU_INTEL_P6            },
-        { 0x00000118, 0x00000118, CPU_CACHE,    CPU_INTEL_P6            },
-        { 0x00000119, 0x00000119, CPU_CACHE,    CPU_INTEL_PX            },
-        { 0x0000011A, 0x0000011B, CPU_CACHE,    CPU_INTEL_P6            },
-        { 0x0000011E, 0x0000011E, CPU_CACHE,    CPU_PX_CX_AT            },
-
-        { 0x00000174, 0x00000176, CPU_SYSENTER, CPU_P6_CX_AT_XE         },
-        { 0x00000179, 0x0000017A, CPU_MC,       CPU_PX_CX_AT_XE         },
-        { 0x0000017B, 0x0000017B, CPU_MC,       CPU_P6_XE               },
-        { 0x00000186, 0x00000187, CPU_PMC,      CPU_P6_CX_AT            },
-        { 0x00000198, 0x00000199, CPU_PERF,     CPU_PM_CX_AT_XE         },
-        { 0x0000019A, 0x0000019A, CPU_TIME,     CPU_PM_CX_AT_XE         },
-        { 0x0000019B, 0x0000019D, CPU_THERM,    CPU_PM_CX_AT_XE         },
-        { 0x000001A0, 0x000001A0, CPU_MISC,     CPU_PM_CX_AT_XE         },
-
-        { 0x000001C9, 0x000001C9, CPU_LBRANCH,  CPU_PM_CX_AT            },
-        { 0x000001D7, 0x000001D8, CPU_LBRANCH,  CPU_INTEL_XEON          },
-        { 0x000001D9, 0x000001D9, CPU_DEBUG,    CPU_CX_AT_XE            },
-        { 0x000001DA, 0x000001DA, CPU_LBRANCH,  CPU_INTEL_XEON          },
-        { 0x000001DB, 0x000001DB, CPU_LBRANCH,  CPU_P6_XE               },
-        { 0x000001DC, 0x000001DC, CPU_LBRANCH,  CPU_INTEL_P6            },
-        { 0x000001DD, 0x000001DE, CPU_LBRANCH,  CPU_PX_CX_AT_XE         },
-        { 0x000001E0, 0x000001E0, CPU_LBRANCH,  CPU_INTEL_P6            },
-
-        { 0x00000200, 0x0000020F, CPU_MTRR,     CPU_P6_CX_XE            },
-        { 0x00000250, 0x00000250, CPU_MTRR,     CPU_P6_CX_XE            },
-        { 0x00000258, 0x00000259, CPU_MTRR,     CPU_P6_CX_XE            },
-        { 0x00000268, 0x0000026F, CPU_MTRR,     CPU_P6_CX_XE            },
-        { 0x00000277, 0x00000277, CPU_PAT,      CPU_C2_AT_XE            },
-        { 0x000002FF, 0x000002FF, CPU_MTRR,     CPU_P6_CX_XE            },
-
-        { 0x00000300, 0x00000308, CPU_PMC,      CPU_INTEL_XEON          },
-        { 0x00000309, 0x0000030B, CPU_PMC,      CPU_C2_AT_XE            },
-        { 0x0000030C, 0x00000311, CPU_PMC,      CPU_INTEL_XEON          },
-        { 0x00000345, 0x00000345, CPU_PMC,      CPU_C2_AT               },
-        { 0x00000360, 0x00000371, CPU_PMC,      CPU_INTEL_XEON          },
-        { 0x0000038D, 0x00000390, CPU_PMC,      CPU_C2_AT               },
-        { 0x000003A0, 0x000003BE, CPU_PMC,      CPU_INTEL_XEON          },
-        { 0x000003C0, 0x000003CD, CPU_PMC,      CPU_INTEL_XEON          },
-        { 0x000003E0, 0x000003E1, CPU_PMC,      CPU_INTEL_XEON          },
-        { 0x000003F0, 0x000003F0, CPU_PMC,      CPU_INTEL_XEON          },
-        { 0x000003F1, 0x000003F1, CPU_PMC,      CPU_C2_AT_XE            },
-        { 0x000003F2, 0x000003F2, CPU_PMC,      CPU_INTEL_XEON          },
-
-        { 0x00000400, 0x00000402, CPU_MC,       CPU_PM_CX_AT_XE         },
-        { 0x00000403, 0x00000403, CPU_MC,       CPU_INTEL_XEON          },
-        { 0x00000404, 0x00000406, CPU_MC,       CPU_PM_CX_AT_XE         },
-        { 0x00000407, 0x00000407, CPU_MC,       CPU_INTEL_XEON          },
-        { 0x00000408, 0x0000040A, CPU_MC,       CPU_PM_CX_AT_XE         },
-        { 0x0000040B, 0x0000040B, CPU_MC,       CPU_INTEL_XEON          },
-        { 0x0000040C, 0x0000040E, CPU_MC,       CPU_PM_CX_XE            },
-        { 0x0000040F, 0x0000040F, CPU_MC,       CPU_INTEL_XEON          },
-        { 0x00000410, 0x00000412, CPU_MC,       CPU_PM_CX_AT_XE         },
-        { 0x00000413, 0x00000417, CPU_MC,       CPU_CX_AT_XE            },
-        { 0x00000480, 0x0000048B, CPU_VMX,      CPU_CX_AT_XE            },
-
-        { 0x00000600, 0x00000600, CPU_DEBUG,    CPU_PM_CX_AT_XE         },
-        { 0x00000680, 0x0000068F, CPU_LBRANCH,  CPU_INTEL_XEON          },
-        { 0x000006C0, 0x000006CF, CPU_LBRANCH,  CPU_INTEL_XEON          },
-
-        { 0x000107CC, 0x000107D3, CPU_PMC,      CPU_INTEL_XEON_MP       },
-
-        { 0xC0000080, 0xC0000080, CPU_FEATURES, CPU_INTEL_XEON          },
-        { 0xC0000081, 0xC0000082, CPU_CALL,     CPU_INTEL_XEON          },
-        { 0xC0000084, 0xC0000084, CPU_CALL,     CPU_INTEL_XEON          },
-        { 0xC0000100, 0xC0000102, CPU_BASE,     CPU_INTEL_XEON          },
+/* CPU Registers Range */
+static struct cpu_debug_range cpu_reg_range[] = {
+        { 0x00000000, 0x00000001, CPU_MC,       },
+        { 0x00000006, 0x00000007, CPU_MONITOR,  },
+        { 0x00000010, 0x00000010, CPU_TIME,     },
+        { 0x00000011, 0x00000013, CPU_PMC,      },
+        { 0x00000017, 0x00000017, CPU_PLATFORM, },
+        { 0x0000001B, 0x0000001B, CPU_APIC,     },
+        { 0x0000002A, 0x0000002B, CPU_POWERON,  },
+        { 0x0000002C, 0x0000002C, CPU_FREQ,     },
+        { 0x0000003A, 0x0000003A, CPU_CONTROL,  },
+        { 0x00000040, 0x00000047, CPU_LBRANCH,  },
+        { 0x00000060, 0x00000067, CPU_LBRANCH,  },
+        { 0x00000079, 0x00000079, CPU_BIOS,     },
+        { 0x00000088, 0x0000008A, CPU_CACHE,    },
+        { 0x0000008B, 0x0000008B, CPU_BIOS,     },
+        { 0x0000009B, 0x0000009B, CPU_MONITOR,  },
+        { 0x000000C1, 0x000000C4, CPU_PMC,      },
+        { 0x000000CD, 0x000000CD, CPU_FREQ,     },
+        { 0x000000E7, 0x000000E8, CPU_PERF,     },
+        { 0x000000FE, 0x000000FE, CPU_MTRR,     },
+
+        { 0x00000116, 0x0000011E, CPU_CACHE,    },
+        { 0x00000174, 0x00000176, CPU_SYSENTER, },
+        { 0x00000179, 0x0000017B, CPU_MC,       },
+        { 0x00000186, 0x00000189, CPU_PMC,      },
+        { 0x00000198, 0x00000199, CPU_PERF,     },
+        { 0x0000019A, 0x0000019A, CPU_TIME,     },
+        { 0x0000019B, 0x0000019D, CPU_THERM,    },
+        { 0x000001A0, 0x000001A0, CPU_MISC,     },
+        { 0x000001C9, 0x000001C9, CPU_LBRANCH,  },
+        { 0x000001D7, 0x000001D8, CPU_LBRANCH,  },
+        { 0x000001D9, 0x000001D9, CPU_DEBUG,    },
+        { 0x000001DA, 0x000001E0, CPU_LBRANCH,  },
+
+        { 0x00000200, 0x0000020F, CPU_MTRR,     },
+        { 0x00000250, 0x00000250, CPU_MTRR,     },
+        { 0x00000258, 0x00000259, CPU_MTRR,     },
+        { 0x00000268, 0x0000026F, CPU_MTRR,     },
+        { 0x00000277, 0x00000277, CPU_PAT,      },
+        { 0x000002FF, 0x000002FF, CPU_MTRR,     },
+
+        { 0x00000300, 0x00000311, CPU_PMC,      },
+        { 0x00000345, 0x00000345, CPU_PMC,      },
+        { 0x00000360, 0x00000371, CPU_PMC,      },
+        { 0x0000038D, 0x00000390, CPU_PMC,      },
+        { 0x000003A0, 0x000003BE, CPU_PMC,      },
+        { 0x000003C0, 0x000003CD, CPU_PMC,      },
+        { 0x000003E0, 0x000003E1, CPU_PMC,      },
+        { 0x000003F0, 0x000003F2, CPU_PMC,      },
+
+        { 0x00000400, 0x00000417, CPU_MC,       },
+        { 0x00000480, 0x0000048B, CPU_VMX,      },
+
+        { 0x00000600, 0x00000600, CPU_DEBUG,    },
+        { 0x00000680, 0x0000068F, CPU_LBRANCH,  },
+        { 0x000006C0, 0x000006CF, CPU_LBRANCH,  },
+
+        { 0x000107CC, 0x000107D3, CPU_PMC,      },
+
+        { 0xC0000080, 0xC0000080, CPU_FEATURES, },
+        { 0xC0000081, 0xC0000084, CPU_CALL,     },
+        { 0xC0000100, 0xC0000102, CPU_BASE,     },
+        { 0xC0000103, 0xC0000103, CPU_TIME,     },
+
+        { 0xC0010000, 0xC0010007, CPU_PMC,      },
+        { 0xC0010010, 0xC0010010, CPU_CONF,     },
+        { 0xC0010015, 0xC0010015, CPU_CONF,     },
+        { 0xC0010016, 0xC001001A, CPU_MTRR,     },
+        { 0xC001001D, 0xC001001D, CPU_MTRR,     },
+        { 0xC001001F, 0xC001001F, CPU_CONF,     },
+        { 0xC0010030, 0xC0010035, CPU_BIOS,     },
+        { 0xC0010044, 0xC0010048, CPU_MC,       },
+        { 0xC0010050, 0xC0010056, CPU_SMM,      },
+        { 0xC0010058, 0xC0010058, CPU_CONF,     },
+        { 0xC0010060, 0xC0010060, CPU_CACHE,    },
+        { 0xC0010061, 0xC0010068, CPU_SMM,      },
+        { 0xC0010069, 0xC001006B, CPU_SMM,      },
+        { 0xC0010070, 0xC0010071, CPU_SMM,      },
+        { 0xC0010111, 0xC0010113, CPU_SMM,      },
+        { 0xC0010114, 0xC0010118, CPU_SVM,      },
+        { 0xC0010140, 0xC0010141, CPU_OSVM,     },
+        { 0xC0011022, 0xC0011023, CPU_CONF,     },
 };
 
-/* AMD Registers Range */
-static struct cpu_debug_range cpu_amd_range[] = {
-        { 0x00000000, 0x00000001, CPU_MC,       CPU_K10_PLUS,           },
-        { 0x00000010, 0x00000010, CPU_TIME,     CPU_K8_PLUS,            },
-        { 0x0000001B, 0x0000001B, CPU_APIC,     CPU_K8_PLUS,            },
-        { 0x0000002A, 0x0000002A, CPU_POWERON,  CPU_K7_PLUS             },
-        { 0x0000008B, 0x0000008B, CPU_VER,      CPU_K8_PLUS             },
-        { 0x000000FE, 0x000000FE, CPU_MTRR,     CPU_K8_PLUS,            },
-
-        { 0x00000174, 0x00000176, CPU_SYSENTER, CPU_K8_PLUS,            },
-        { 0x00000179, 0x0000017B, CPU_MC,       CPU_K8_PLUS,            },
-        { 0x000001D9, 0x000001D9, CPU_DEBUG,    CPU_K8_PLUS,            },
-        { 0x000001DB, 0x000001DE, CPU_LBRANCH,  CPU_K8_PLUS,            },
-
-        { 0x00000200, 0x0000020F, CPU_MTRR,     CPU_K8_PLUS,            },
-        { 0x00000250, 0x00000250, CPU_MTRR,     CPU_K8_PLUS,            },
-        { 0x00000258, 0x00000259, CPU_MTRR,     CPU_K8_PLUS,            },
-        { 0x00000268, 0x0000026F, CPU_MTRR,     CPU_K8_PLUS,            },
-        { 0x00000277, 0x00000277, CPU_PAT,      CPU_K8_PLUS,            },
-        { 0x000002FF, 0x000002FF, CPU_MTRR,     CPU_K8_PLUS,            },
-
-        { 0x00000400, 0x00000413, CPU_MC,       CPU_K8_PLUS,            },
-
-        { 0xC0000080, 0xC0000080, CPU_FEATURES, CPU_AMD_ALL,            },
-        { 0xC0000081, 0xC0000084, CPU_CALL,     CPU_K8_PLUS,            },
-        { 0xC0000100, 0xC0000102, CPU_BASE,     CPU_K8_PLUS,            },
-        { 0xC0000103, 0xC0000103, CPU_TIME,     CPU_K10_PLUS,           },
-
-        { 0xC0010000, 0xC0010007, CPU_PMC,      CPU_K8_PLUS,            },
-        { 0xC0010010, 0xC0010010, CPU_CONF,     CPU_K7_PLUS,            },
-        { 0xC0010015, 0xC0010015, CPU_CONF,     CPU_K7_PLUS,            },
-        { 0xC0010016, 0xC001001A, CPU_MTRR,     CPU_K8_PLUS,            },
-        { 0xC001001D, 0xC001001D, CPU_MTRR,     CPU_K8_PLUS,            },
-        { 0xC001001F, 0xC001001F, CPU_CONF,     CPU_K8_PLUS,            },
-        { 0xC0010030, 0xC0010035, CPU_BIOS,     CPU_K8_PLUS,            },
-        { 0xC0010044, 0xC0010048, CPU_MC,       CPU_K8_PLUS,            },
-        { 0xC0010050, 0xC0010056, CPU_SMM,      CPU_K0F_PLUS,           },
-        { 0xC0010058, 0xC0010058, CPU_CONF,     CPU_K10_PLUS,           },
-        { 0xC0010060, 0xC0010060, CPU_CACHE,    CPU_AMD_11,             },
-        { 0xC0010061, 0xC0010068, CPU_SMM,      CPU_K10_PLUS,           },
-        { 0xC0010069, 0xC001006B, CPU_SMM,      CPU_AMD_11,             },
-        { 0xC0010070, 0xC0010071, CPU_SMM,      CPU_K10_PLUS,           },
-        { 0xC0010111, 0xC0010113, CPU_SMM,      CPU_K8_PLUS,            },
-        { 0xC0010114, 0xC0010118, CPU_SVM,      CPU_K10_PLUS,           },
-        { 0xC0010140, 0xC0010141, CPU_OSVM,     CPU_K10_PLUS,           },
-        { 0xC0011022, 0xC0011023, CPU_CONF,     CPU_K10_PLUS,           },
-};
-
-
-/* Intel */
-static int get_intel_modelflag(unsigned model)
-{
-        int flag;
-
-        switch (model) {
-        case 0x0501:
-        case 0x0502:
-        case 0x0504:
-                flag = CPU_INTEL_PENTIUM;
-                break;
-        case 0x0601:
-        case 0x0603:
-        case 0x0605:
-        case 0x0607:
-        case 0x0608:
-        case 0x060A:
-        case 0x060B:
-                flag = CPU_INTEL_P6;
-                break;
-        case 0x0609:
-        case 0x060D:
-                flag = CPU_INTEL_PENTIUM_M;
-                break;
-        case 0x060E:
-                flag = CPU_INTEL_CORE;
-                break;
-        case 0x060F:
-        case 0x0617:
-                flag = CPU_INTEL_CORE2;
-                break;
-        case 0x061C:
-                flag = CPU_INTEL_ATOM;
-                break;
-        case 0x0F00:
-        case 0x0F01:
-        case 0x0F02:
-        case 0x0F03:
-        case 0x0F04:
-                flag = CPU_INTEL_XEON_P4;
-                break;
-        case 0x0F06:
-                flag = CPU_INTEL_XEON_MP;
-                break;
-        default:
-                flag = CPU_NONE;
-                break;
-        }
-
-        return flag;
-}
-
-/* AMD */
-static int get_amd_modelflag(unsigned model)
-{
-        int flag;
-
-        switch (model >> 8) {
-        case 0x6:
-                flag = CPU_AMD_K6;
-                break;
-        case 0x7:
-                flag = CPU_AMD_K7;
-                break;
-        case 0x8:
-                flag = CPU_AMD_K8;
-                break;
-        case 0xf:
-                flag = CPU_AMD_0F;
-                break;
-        case 0x10:
-                flag = CPU_AMD_10;
-                break;
-        case 0x11:
-                flag = CPU_AMD_11;
-                break;
-        default:
-                flag = CPU_NONE;
-                break;
-        }
-
-        return flag;
-}
-
-static int get_cpu_modelflag(unsigned cpu)
-{
-        int flag;
-
-        flag = per_cpu(cpu_model, cpu);
-
-        switch (flag >> 16) {
-        case X86_VENDOR_INTEL:
-                flag = get_intel_modelflag(flag);
-                break;
-        case X86_VENDOR_AMD:
-                flag = get_amd_modelflag(flag & 0xffff);
-                break;
-        default:
-                flag = CPU_NONE;
-                break;
-        }
-
-        return flag;
-}
-
-static int get_cpu_range_count(unsigned cpu)
-{
-        int index;
-
-        switch (per_cpu(cpu_model, cpu) >> 16) {
-        case X86_VENDOR_INTEL:
-                index = ARRAY_SIZE(cpu_intel_range);
-                break;
-        case X86_VENDOR_AMD:
-                index = ARRAY_SIZE(cpu_amd_range);
-                break;
-        default:
-                index = 0;
-                break;
-        }
-
-        return index;
-}
-
 static int is_typeflag_valid(unsigned cpu, unsigned flag)
 {
-        unsigned vendor, modelflag;
-        int i, index;
+        int i;
 
         /* Standard Registers should be always valid */
         if (flag >= CPU_TSS)
                 return 1;
 
-        modelflag = per_cpu(cpu_modelflag, cpu);
-        vendor = per_cpu(cpu_model, cpu) >> 16;
-        index = get_cpu_range_count(cpu);
-
-        for (i = 0; i < index; i++) {
-                switch (vendor) {
-                case X86_VENDOR_INTEL:
-                        if ((cpu_intel_range[i].model & modelflag) &&
-                            (cpu_intel_range[i].flag & flag))
-                                return 1;
-                        break;
-                case X86_VENDOR_AMD:
-                        if ((cpu_amd_range[i].model & modelflag) &&
-                            (cpu_amd_range[i].flag & flag))
-                                return 1;
-                        break;
-                }
+        for (i = 0; i < ARRAY_SIZE(cpu_reg_range); i++) {
+                if (cpu_reg_range[i].flag == flag)
+                        return 1;
         }
 
         /* Invalid */
@@ -385,26 +183,11 @@ static int is_typeflag_valid(unsigned cpu, unsigned flag)
 static unsigned get_cpu_range(unsigned cpu, unsigned *min, unsigned *max,
                               int index, unsigned flag)
 {
-        unsigned modelflag;
-
-        modelflag = per_cpu(cpu_modelflag, cpu);
-        *max = 0;
-        switch (per_cpu(cpu_model, cpu) >> 16) {
-        case X86_VENDOR_INTEL:
-                if ((cpu_intel_range[index].model & modelflag) &&
-                    (cpu_intel_range[index].flag & flag)) {
-                        *min = cpu_intel_range[index].min;
-                        *max = cpu_intel_range[index].max;
-                }
-                break;
-        case X86_VENDOR_AMD:
-                if ((cpu_amd_range[index].model & modelflag) &&
-                    (cpu_amd_range[index].flag & flag)) {
-                        *min = cpu_amd_range[index].min;
-                        *max = cpu_amd_range[index].max;
-                }
-                break;
-        }
+        if (cpu_reg_range[index].flag == flag) {
+                *min = cpu_reg_range[index].min;
+                *max = cpu_reg_range[index].max;
+        } else
+                *max = 0;
 
         return *max;
 }
@@ -434,7 +217,7 @@ static void print_msr(struct seq_file *seq, unsigned cpu, unsigned flag)
         unsigned msr, msr_min, msr_max;
         struct cpu_private *priv;
         u32 low, high;
-        int i, range;
+        int i;
 
         if (seq) {
                 priv = seq->private;
@@ -446,9 +229,7 @@ static void print_msr(struct seq_file *seq, unsigned cpu, unsigned flag)
                 }
         }
 
-        range = get_cpu_range_count(cpu);
-
-        for (i = 0; i < range; i++) {
+        for (i = 0; i < ARRAY_SIZE(cpu_reg_range); i++) {
                 if (!get_cpu_range(cpu, &msr_min, &msr_max, i, flag))
                         continue;
 
@@ -800,13 +581,11 @@ static int cpu_init_msr(unsigned cpu, unsigned type, struct dentry *dentry)
 {
         struct dentry *cpu_dentry = NULL;
         unsigned reg, reg_min, reg_max;
-        int i, range, err = 0;
+        int i, err = 0;
         char reg_dir[12];
         u32 low, high;
 
-        range = get_cpu_range_count(cpu);
-
-        for (i = 0; i < range; i++) {
+        for (i = 0; i < ARRAY_SIZE(cpu_reg_range); i++) {
                 if (!get_cpu_range(cpu, &reg_min, &reg_max, i,
                                    cpu_base[type].flag))
                         continue;
@@ -862,10 +641,6 @@ static int cpu_init_cpu(void)
                 cpui = &cpu_data(cpu);
                 if (!cpu_has(cpui, X86_FEATURE_MSR))
                         continue;
-                per_cpu(cpu_model, cpu) = ((cpui->x86_vendor << 16) |
-                                           (cpui->x86 << 8) |
-                                           (cpui->x86_model));
-                per_cpu(cpu_modelflag, cpu) = get_cpu_modelflag(cpu);
 
                 sprintf(cpu_dir, "cpu%d", cpu);
                 cpu_dentry = debugfs_create_dir(cpu_dir, cpu_debugfs_dir);
diff --git a/arch/x86/kernel/cpu/cpufreq/Kconfig b/arch/x86/kernel/cpu/cpufreq/Kconfig
index 52c839875478..f138c6c389b9 100644
--- a/arch/x86/kernel/cpu/cpufreq/Kconfig
+++ b/arch/x86/kernel/cpu/cpufreq/Kconfig
@@ -220,11 +220,14 @@ config X86_LONGHAUL
           If in doubt, say N.
 
 config X86_E_POWERSAVER
-        tristate "VIA C7 Enhanced PowerSaver"
+        tristate "VIA C7 Enhanced PowerSaver (DANGEROUS)"
         select CPU_FREQ_TABLE
-        depends on X86_32
+        depends on X86_32 && EXPERIMENTAL
         help
-          This adds the CPUFreq driver for VIA C7 processors.
+          This adds the CPUFreq driver for VIA C7 processors.  However, this driver
+          does not have any safeguards to prevent operating the CPU out of spec
+          and is thus considered dangerous.  Please use the regular ACPI cpufreq
+          driver, enabled by CONFIG_X86_ACPI_CPUFREQ.
 
           If in doubt, say N.
 
diff --git a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
index 54b6de2cd947..ae9b503220ca 100644
--- a/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
+++ b/arch/x86/kernel/cpu/cpufreq/acpi-cpufreq.c
@@ -90,11 +90,7 @@ static int check_est_cpu(unsigned int cpuid)
 {
         struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
 
-        if (cpu->x86_vendor != X86_VENDOR_INTEL ||
-            !cpu_has(cpu, X86_FEATURE_EST))
-                return 0;
-
-        return 1;
+        return cpu_has(cpu, X86_FEATURE_EST);
 }
 
 static unsigned extract_io(u32 value, struct acpi_cpufreq_data *data)
@@ -550,7 +546,7 @@ static int __init acpi_cpufreq_early_init(void)
                 return -ENOMEM;
         }
         for_each_possible_cpu(i) {
-                if (!alloc_cpumask_var_node(
+                if (!zalloc_cpumask_var_node(
                         &per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map,
                         GFP_KERNEL, cpu_to_node(i))) {
 
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k7.c b/arch/x86/kernel/cpu/cpufreq/powernow-k7.c
index a8363e5be4ef..d47c775eb0ab 100644
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k7.c
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k7.c
@@ -322,7 +322,7 @@ static int powernow_acpi_init(void)
                 goto err0;
         }
 
-        if (!alloc_cpumask_var(&acpi_processor_perf->shared_cpu_map,
+        if (!zalloc_cpumask_var(&acpi_processor_perf->shared_cpu_map,
                                                                 GFP_KERNEL)) {
                 retval = -ENOMEM;
                 goto err05;
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
index f6b32d112357..cf52215d9eb1 100644
--- a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
+++ b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
@@ -835,7 +835,7 @@ static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
 {
         struct cpufreq_frequency_table *powernow_table;
         int ret_val = -ENODEV;
-        acpi_integer space_id;
+        acpi_integer control, status;
 
         if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) {
                 dprintk("register performance failed: bad ACPI data\n");
@@ -848,12 +848,13 @@ static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
                 goto err_out;
         }
 
-        space_id = data->acpi_data.control_register.space_id;
-        if ((space_id != ACPI_ADR_SPACE_FIXED_HARDWARE) ||
-                (space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) {
+        control = data->acpi_data.control_register.space_id;
+        status = data->acpi_data.status_register.space_id;
+
+        if ((control != ACPI_ADR_SPACE_FIXED_HARDWARE) ||
+            (status != ACPI_ADR_SPACE_FIXED_HARDWARE)) {
                 dprintk("Invalid control/status registers (%x - %x)\n",
-                        data->acpi_data.control_register.space_id,
-                        space_id);
+                        control, status);
                 goto err_out;
         }
 
@@ -886,7 +887,7 @@ static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
         /* notify BIOS that we exist */
         acpi_processor_notify_smm(THIS_MODULE);
 
-        if (!alloc_cpumask_var(&data->acpi_data.shared_cpu_map, GFP_KERNEL)) {
+        if (!zalloc_cpumask_var(&data->acpi_data.shared_cpu_map, GFP_KERNEL)) {
                 printk(KERN_ERR PFX
                                 "unable to alloc powernow_k8_data cpumask\n");
                 ret_val = -ENOMEM;
diff --git a/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c b/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c
index c9f1fdc02830..55c831ed71ce 100644
--- a/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c
+++ b/arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c
@@ -471,7 +471,7 @@ static int centrino_target (struct cpufreq_policy *policy,
 
         if (unlikely(!alloc_cpumask_var(&saved_mask, GFP_KERNEL)))
                 return -ENOMEM;
-        if (unlikely(!alloc_cpumask_var(&covered_cpus, GFP_KERNEL))) {
+        if (unlikely(!zalloc_cpumask_var(&covered_cpus, GFP_KERNEL))) {
                 free_cpumask_var(saved_mask);
                 return -ENOMEM;
         }
diff --git a/arch/x86/kernel/cpu/intel_cacheinfo.c b/arch/x86/kernel/cpu/intel_cacheinfo.c
index 483eda96e102..789efe217e1a 100644
--- a/arch/x86/kernel/cpu/intel_cacheinfo.c
+++ b/arch/x86/kernel/cpu/intel_cacheinfo.c
@@ -17,6 +17,7 @@
 
 #include <asm/processor.h>
 #include <asm/smp.h>
+#include <asm/k8.h>
 
 #define LVL_1_INST      1
 #define LVL_1_DATA      2
@@ -159,14 +160,6 @@ struct _cpuid4_info_regs {
         unsigned long can_disable;
 };
 
-#if defined(CONFIG_PCI) && defined(CONFIG_SYSFS)
-static struct pci_device_id k8_nb_id[] = {
-        { PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x1103) },
-        { PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x1203) },
-        {}
-};
-#endif
-
 unsigned short                  num_cache_leaves;
 
 /* AMD doesn't have CPUID4. Emulate it here to report the same
@@ -207,10 +200,17 @@ union l3_cache {
 };
 
 static const unsigned short __cpuinitconst assocs[] = {
-        [1] = 1, [2] = 2, [4] = 4, [6] = 8,
-        [8] = 16, [0xa] = 32, [0xb] = 48,
+        [1] = 1,
+        [2] = 2,
+        [4] = 4,
+        [6] = 8,
+        [8] = 16,
+        [0xa] = 32,
+        [0xb] = 48,
         [0xc] = 64,
-        [0xf] = 0xffff // ??
+        [0xd] = 96,
+        [0xe] = 128,
+        [0xf] = 0xffff /* fully associative - no way to show this currently */
 };
 
 static const unsigned char __cpuinitconst levels[] = { 1, 1, 2, 3 };
@@ -271,7 +271,8 @@ amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax,
         eax->split.type = types[leaf];
         eax->split.level = levels[leaf];
         if (leaf == 3)
-                eax->split.num_threads_sharing = current_cpu_data.x86_max_cores - 1;
+                eax->split.num_threads_sharing =
+                        current_cpu_data.x86_max_cores - 1;
         else
                 eax->split.num_threads_sharing = 0;
         eax->split.num_cores_on_die = current_cpu_data.x86_max_cores - 1;
@@ -291,6 +292,14 @@ amd_check_l3_disable(int index, struct _cpuid4_info_regs *this_leaf)
 {
         if (index < 3)
                 return;
+
+        if (boot_cpu_data.x86 == 0x11)
+                return;
+
+        /* see erratum #382 */
+        if ((boot_cpu_data.x86 == 0x10) && (boot_cpu_data.x86_model < 0x8))
+                return;
+
         this_leaf->can_disable = 1;
 }
 
@@ -696,97 +705,75 @@ static ssize_t show_type(struct _cpuid4_info *this_leaf, char *buf)
 #define to_object(k)    container_of(k, struct _index_kobject, kobj)
 #define to_attr(a)      container_of(a, struct _cache_attr, attr)
 
-#ifdef CONFIG_PCI
-static struct pci_dev *get_k8_northbridge(int node)
-{
-        struct pci_dev *dev = NULL;
-        int i;
-
-        for (i = 0; i <= node; i++) {
-                do {
-                        dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
-                        if (!dev)
-                                break;
-                } while (!pci_match_id(&k8_nb_id[0], dev));
-                if (!dev)
-                        break;
-        }
-        return dev;
-}
-#else
-static struct pci_dev *get_k8_northbridge(int node)
-{
-        return NULL;
-}
-#endif
-
-static ssize_t show_cache_disable(struct _cpuid4_info *this_leaf, char *buf)
+static ssize_t show_cache_disable(struct _cpuid4_info *this_leaf, char *buf,
+                                  unsigned int index)
 {
-        const struct cpumask *mask = to_cpumask(this_leaf->shared_cpu_map);
-        int node = cpu_to_node(cpumask_first(mask));
-        struct pci_dev *dev = NULL;
-        ssize_t ret = 0;
-        int i;
+        int cpu = cpumask_first(to_cpumask(this_leaf->shared_cpu_map));
+        int node = cpu_to_node(cpu);
+        struct pci_dev *dev = node_to_k8_nb_misc(node);
+        unsigned int reg = 0;
 
         if (!this_leaf->can_disable)
-                return sprintf(buf, "Feature not enabled\n");
-
-        dev = get_k8_northbridge(node);
-        if (!dev) {
-                printk(KERN_ERR "Attempting AMD northbridge operation on a system with no northbridge\n");
                 return -EINVAL;
-        }
 
-        for (i = 0; i < 2; i++) {
-                unsigned int reg;
+        if (!dev)
+                return -EINVAL;
 
-                pci_read_config_dword(dev, 0x1BC + i * 4, &reg);
+        pci_read_config_dword(dev, 0x1BC + index * 4, &reg);
+        return sprintf(buf, "%x\n", reg);
+}
 
-                ret += sprintf(buf, "%sEntry: %d\n", buf, i);
-                ret += sprintf(buf, "%sReads:  %s\tNew Entries: %s\n",  
-                        buf,
-                        reg & 0x80000000 ? "Disabled" : "Allowed",
-                        reg & 0x40000000 ? "Disabled" : "Allowed");
-                ret += sprintf(buf, "%sSubCache: %x\tIndex: %x\n",
-                        buf, (reg & 0x30000) >> 16, reg & 0xfff);
-        }
-        return ret;
+#define SHOW_CACHE_DISABLE(index)                                       \
+static ssize_t                                                          \
+show_cache_disable_##index(struct _cpuid4_info *this_leaf, char *buf)   \
+{                                                                       \
+        return show_cache_disable(this_leaf, buf, index);               \
 }
+SHOW_CACHE_DISABLE(0)
+SHOW_CACHE_DISABLE(1)
 
-static ssize_t
-store_cache_disable(struct _cpuid4_info *this_leaf, const char *buf,
-                    size_t count)
+static ssize_t store_cache_disable(struct _cpuid4_info *this_leaf,
+        const char *buf, size_t count, unsigned int index)
 {
-        const struct cpumask *mask = to_cpumask(this_leaf->shared_cpu_map);
-        int node = cpu_to_node(cpumask_first(mask));
-        struct pci_dev *dev = NULL;
-        unsigned int ret, index, val;
+        int cpu = cpumask_first(to_cpumask(this_leaf->shared_cpu_map));
+        int node = cpu_to_node(cpu);
+        struct pci_dev *dev = node_to_k8_nb_misc(node);
+        unsigned long val = 0;
+        unsigned int scrubber = 0;
 
         if (!this_leaf->can_disable)
-                return 0;
-
-        if (strlen(buf) > 15)
                 return -EINVAL;
 
-        ret = sscanf(buf, "%x %x", &index, &val);
-        if (ret != 2)
+        if (!capable(CAP_SYS_ADMIN))
+                return -EPERM;
+
+        if (!dev)
                 return -EINVAL;
-        if (index > 1)
+
+        if (strict_strtoul(buf, 10, &val) < 0)
                 return -EINVAL;
 
         val |= 0xc0000000;
-        dev = get_k8_northbridge(node);
-        if (!dev) {
-                printk(KERN_ERR "Attempting AMD northbridge operation on a system with no northbridge\n");
-                return -EINVAL;
-        }
+
+        pci_read_config_dword(dev, 0x58, &scrubber);
+        scrubber &= ~0x1f000000;
+        pci_write_config_dword(dev, 0x58, scrubber);
 
         pci_write_config_dword(dev, 0x1BC + index * 4, val & ~0x40000000);
         wbinvd();
         pci_write_config_dword(dev, 0x1BC + index * 4, val);
+        return count;
+}
 
-        return 1;
+#define STORE_CACHE_DISABLE(index)                                      \
+static ssize_t                                                          \
+store_cache_disable_##index(struct _cpuid4_info *this_leaf,             \
+                            const char *buf, size_t count)              \
+{                                                                       \
+        return store_cache_disable(this_leaf, buf, count, index);       \
 }
+STORE_CACHE_DISABLE(0)
+STORE_CACHE_DISABLE(1)
 
 struct _cache_attr {
         struct attribute attr;
@@ -808,7 +795,10 @@ define_one_ro(size);
 define_one_ro(shared_cpu_map);
 define_one_ro(shared_cpu_list);
 
-static struct _cache_attr cache_disable = __ATTR(cache_disable, 0644, show_cache_disable, store_cache_disable);
+static struct _cache_attr cache_disable_0 = __ATTR(cache_disable_0, 0644,
+                show_cache_disable_0, store_cache_disable_0);
+static struct _cache_attr cache_disable_1 = __ATTR(cache_disable_1, 0644,
+                show_cache_disable_1, store_cache_disable_1);
 
 static struct attribute * default_attrs[] = {
         &type.attr,
@@ -820,7 +810,8 @@ static struct attribute * default_attrs[] = {
         &size.attr,
         &shared_cpu_map.attr,
         &shared_cpu_list.attr,
-        &cache_disable.attr,
+        &cache_disable_0.attr,
+        &cache_disable_1.attr,
         NULL
 };
 
diff --git a/arch/x86/kernel/cpu/mcheck/mce_intel_64.c b/arch/x86/kernel/cpu/mcheck/mce_intel_64.c
index 046087e9808f..f2ef6952c400 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_intel_64.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_intel_64.c
@@ -15,7 +15,6 @@
 #include <asm/hw_irq.h>
 #include <asm/idle.h>
 #include <asm/therm_throt.h>
-#include <asm/apic.h>
 
 #include "mce.h"
 
diff --git a/arch/x86/kernel/cpu/mtrr/cleanup.c b/arch/x86/kernel/cpu/mtrr/cleanup.c
index ce0fe4b5c04f..1d584a18a50d 100644
--- a/arch/x86/kernel/cpu/mtrr/cleanup.c
+++ b/arch/x86/kernel/cpu/mtrr/cleanup.c
@@ -808,7 +808,7 @@ int __init mtrr_cleanup(unsigned address_bits)
 
         if (!is_cpu(INTEL) || enable_mtrr_cleanup < 1)
                 return 0;
-        rdmsr(MTRRdefType_MSR, def, dummy);
+        rdmsr(MSR_MTRRdefType, def, dummy);
         def &= 0xff;
         if (def != MTRR_TYPE_UNCACHABLE)
                 return 0;
@@ -1003,7 +1003,7 @@ int __init mtrr_trim_uncached_memory(unsigned long end_pfn)
          */
         if (!is_cpu(INTEL) || disable_mtrr_trim)
                 return 0;
-        rdmsr(MTRRdefType_MSR, def, dummy);
+        rdmsr(MSR_MTRRdefType, def, dummy);
         def &= 0xff;
         if (def != MTRR_TYPE_UNCACHABLE)
                 return 0;
diff --git a/arch/x86/kernel/cpu/mtrr/generic.c b/arch/x86/kernel/cpu/mtrr/generic.c
index d21d4fb161f7..0543f69f0b27 100644
--- a/arch/x86/kernel/cpu/mtrr/generic.c
+++ b/arch/x86/kernel/cpu/mtrr/generic.c
@@ -20,9 +20,9 @@ struct fixed_range_block {
 };
 
 static struct fixed_range_block fixed_range_blocks[] = {
-        { MTRRfix64K_00000_MSR, 1 }, /* one  64k MTRR  */
-        { MTRRfix16K_80000_MSR, 2 }, /* two  16k MTRRs */
-        { MTRRfix4K_C0000_MSR,  8 }, /* eight 4k MTRRs */
+        { MSR_MTRRfix64K_00000, 1 }, /* one  64k MTRR  */
+        { MSR_MTRRfix16K_80000, 2 }, /* two  16k MTRRs */
+        { MSR_MTRRfix4K_C0000,  8 }, /* eight 4k MTRRs */
         {}
 };
 
@@ -194,12 +194,12 @@ get_fixed_ranges(mtrr_type * frs)
 
         k8_check_syscfg_dram_mod_en();
 
-        rdmsr(MTRRfix64K_00000_MSR, p[0], p[1]);
+        rdmsr(MSR_MTRRfix64K_00000, p[0], p[1]);
 
         for (i = 0; i < 2; i++)
-                rdmsr(MTRRfix16K_80000_MSR + i, p[2 + i * 2], p[3 + i * 2]);
+                rdmsr(MSR_MTRRfix16K_80000 + i, p[2 + i * 2], p[3 + i * 2]);
         for (i = 0; i < 8; i++)
-                rdmsr(MTRRfix4K_C0000_MSR + i, p[6 + i * 2], p[7 + i * 2]);
+                rdmsr(MSR_MTRRfix4K_C0000 + i, p[6 + i * 2], p[7 + i * 2]);
 }
 
 void mtrr_save_fixed_ranges(void *info)
@@ -310,7 +310,7 @@ void __init get_mtrr_state(void)
 
         vrs = mtrr_state.var_ranges;
 
-        rdmsr(MTRRcap_MSR, lo, dummy);
+        rdmsr(MSR_MTRRcap, lo, dummy);
         mtrr_state.have_fixed = (lo >> 8) & 1;
 
         for (i = 0; i < num_var_ranges; i++)
@@ -318,7 +318,7 @@ void __init get_mtrr_state(void)
         if (mtrr_state.have_fixed)
                 get_fixed_ranges(mtrr_state.fixed_ranges);
 
-        rdmsr(MTRRdefType_MSR, lo, dummy);
+        rdmsr(MSR_MTRRdefType, lo, dummy);
         mtrr_state.def_type = (lo & 0xff);
         mtrr_state.enabled = (lo & 0xc00) >> 10;
 
@@ -583,10 +583,10 @@ static void prepare_set(void) __acquires(set_atomicity_lock)
         __flush_tlb();
 
         /*  Save MTRR state */
-        rdmsr(MTRRdefType_MSR, deftype_lo, deftype_hi);
+        rdmsr(MSR_MTRRdefType, deftype_lo, deftype_hi);
 
         /*  Disable MTRRs, and set the default type to uncached  */
-        mtrr_wrmsr(MTRRdefType_MSR, deftype_lo & ~0xcff, deftype_hi);
+        mtrr_wrmsr(MSR_MTRRdefType, deftype_lo & ~0xcff, deftype_hi);
 }
 
 static void post_set(void) __releases(set_atomicity_lock)
@@ -595,7 +595,7 @@ static void post_set(void) __releases(set_atomicity_lock)
         __flush_tlb();
 
         /* Intel (P6) standard MTRRs */
-        mtrr_wrmsr(MTRRdefType_MSR, deftype_lo, deftype_hi);
+        mtrr_wrmsr(MSR_MTRRdefType, deftype_lo, deftype_hi);
                 
         /*  Enable caches  */
         write_cr0(read_cr0() & 0xbfffffff);
@@ -707,7 +707,7 @@ int generic_validate_add_page(unsigned long base, unsigned long size, unsigned i
 static int generic_have_wrcomb(void)
 {
         unsigned long config, dummy;
-        rdmsr(MTRRcap_MSR, config, dummy);
+        rdmsr(MSR_MTRRcap, config, dummy);
         return (config & (1 << 10));
 }
 
diff --git a/arch/x86/kernel/cpu/mtrr/main.c b/arch/x86/kernel/cpu/mtrr/main.c
index 03cda01f57c7..8fc248b5aeaf 100644
--- a/arch/x86/kernel/cpu/mtrr/main.c
+++ b/arch/x86/kernel/cpu/mtrr/main.c
@@ -104,7 +104,7 @@ static void __init set_num_var_ranges(void)
         unsigned long config = 0, dummy;
 
         if (use_intel()) {
-                rdmsr(MTRRcap_MSR, config, dummy);
+                rdmsr(MSR_MTRRcap, config, dummy);
         } else if (is_cpu(AMD))
                 config = 2;
         else if (is_cpu(CYRIX) || is_cpu(CENTAUR))
diff --git a/arch/x86/kernel/cpu/mtrr/mtrr.h b/arch/x86/kernel/cpu/mtrr/mtrr.h
index 77f67f7b347a..7538b767f206 100644
--- a/arch/x86/kernel/cpu/mtrr/mtrr.h
+++ b/arch/x86/kernel/cpu/mtrr/mtrr.h
@@ -5,21 +5,6 @@
 #include <linux/types.h>
 #include <linux/stddef.h>
 
-#define MTRRcap_MSR     0x0fe
-#define MTRRdefType_MSR 0x2ff
-
-#define MTRRfix64K_00000_MSR 0x250
-#define MTRRfix16K_80000_MSR 0x258
-#define MTRRfix16K_A0000_MSR 0x259
-#define MTRRfix4K_C0000_MSR 0x268
-#define MTRRfix4K_C8000_MSR 0x269
-#define MTRRfix4K_D0000_MSR 0x26a
-#define MTRRfix4K_D8000_MSR 0x26b
-#define MTRRfix4K_E0000_MSR 0x26c
-#define MTRRfix4K_E8000_MSR 0x26d
-#define MTRRfix4K_F0000_MSR 0x26e
-#define MTRRfix4K_F8000_MSR 0x26f
-
 #define MTRR_CHANGE_MASK_FIXED     0x01
 #define MTRR_CHANGE_MASK_VARIABLE  0x02
 #define MTRR_CHANGE_MASK_DEFTYPE   0x04
diff --git a/arch/x86/kernel/cpu/mtrr/state.c b/arch/x86/kernel/cpu/mtrr/state.c
index 7f7e2753685b..1f5fb1588d1f 100644
--- a/arch/x86/kernel/cpu/mtrr/state.c
+++ b/arch/x86/kernel/cpu/mtrr/state.c
@@ -35,7 +35,7 @@ void set_mtrr_prepare_save(struct set_mtrr_context *ctxt)
 
                 if (use_intel())
                         /*  Save MTRR state */
-                        rdmsr(MTRRdefType_MSR, ctxt->deftype_lo, ctxt->deftype_hi);
+                        rdmsr(MSR_MTRRdefType, ctxt->deftype_lo, ctxt->deftype_hi);
                 else
                         /* Cyrix ARRs - everything else were excluded at the top */
                         ctxt->ccr3 = getCx86(CX86_CCR3);
@@ -46,7 +46,7 @@ void set_mtrr_cache_disable(struct set_mtrr_context *ctxt)
 {
         if (use_intel())
                 /*  Disable MTRRs, and set the default type to uncached  */
-                mtrr_wrmsr(MTRRdefType_MSR, ctxt->deftype_lo & 0xf300UL,
+                mtrr_wrmsr(MSR_MTRRdefType, ctxt->deftype_lo & 0xf300UL,
                       ctxt->deftype_hi);
         else if (is_cpu(CYRIX))
                 /* Cyrix ARRs - everything else were excluded at the top */
@@ -64,7 +64,7 @@ void set_mtrr_done(struct set_mtrr_context *ctxt)
                 /*  Restore MTRRdefType  */
                 if (use_intel())
                         /* Intel (P6) standard MTRRs */
-                        mtrr_wrmsr(MTRRdefType_MSR, ctxt->deftype_lo, ctxt->deftype_hi);
+                        mtrr_wrmsr(MSR_MTRRdefType, ctxt->deftype_lo, ctxt->deftype_hi);
                 else
                         /* Cyrix ARRs - everything else was excluded at the top */
                         setCx86(CX86_CCR3, ctxt->ccr3);
diff --git a/arch/x86/kernel/cpu/perf_counter.c b/arch/x86/kernel/cpu/perf_counter.c
new file mode 100644
index 000000000000..895c82e78455
--- /dev/null
+++ b/arch/x86/kernel/cpu/perf_counter.c
@@ -0,0 +1,1704 @@
+/*
+ * Performance counter x86 architecture code
+ *
+ *  Copyright (C) 2008 Thomas Gleixner <tglx@linutronix.de>
+ *  Copyright (C) 2008-2009 Red Hat, Inc., Ingo Molnar
+ *  Copyright (C) 2009 Jaswinder Singh Rajput
+ *  Copyright (C) 2009 Advanced Micro Devices, Inc., Robert Richter
+ *  Copyright (C) 2008-2009 Red Hat, Inc., Peter Zijlstra <pzijlstr@redhat.com>
+ *
+ *  For licencing details see kernel-base/COPYING
+ */
+
+#include <linux/perf_counter.h>
+#include <linux/capability.h>
+#include <linux/notifier.h>
+#include <linux/hardirq.h>
+#include <linux/kprobes.h>
+#include <linux/module.h>
+#include <linux/kdebug.h>
+#include <linux/sched.h>
+#include <linux/uaccess.h>
+
+#include <asm/apic.h>
+#include <asm/stacktrace.h>
+#include <asm/nmi.h>
+
+static u64 perf_counter_mask __read_mostly;
+
+struct cpu_hw_counters {
+        struct perf_counter     *counters[X86_PMC_IDX_MAX];
+        unsigned long           used_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];
+        unsigned long           active_mask[BITS_TO_LONGS(X86_PMC_IDX_MAX)];
+        unsigned long           interrupts;
+        int                     enabled;
+};
+
+/*
+ * struct x86_pmu - generic x86 pmu
+ */
+struct x86_pmu {
+        const char      *name;
+        int             version;
+        int             (*handle_irq)(struct pt_regs *);
+        void            (*disable_all)(void);
+        void            (*enable_all)(void);
+        void            (*enable)(struct hw_perf_counter *, int);
+        void            (*disable)(struct hw_perf_counter *, int);
+        unsigned        eventsel;
+        unsigned        perfctr;
+        u64             (*event_map)(int);
+        u64             (*raw_event)(u64);
+        int             max_events;
+        int             num_counters;
+        int             num_counters_fixed;
+        int             counter_bits;
+        u64             counter_mask;
+        u64             max_period;
+        u64             intel_ctrl;
+};
+
+static struct x86_pmu x86_pmu __read_mostly;
+
+static DEFINE_PER_CPU(struct cpu_hw_counters, cpu_hw_counters) = {
+        .enabled = 1,
+};
+
+/*
+ * Intel PerfMon v3. Used on Core2 and later.
+ */
+static const u64 intel_perfmon_event_map[] =
+{
+  [PERF_COUNT_HW_CPU_CYCLES]            = 0x003c,
+  [PERF_COUNT_HW_INSTRUCTIONS]          = 0x00c0,
+  [PERF_COUNT_HW_CACHE_REFERENCES]      = 0x4f2e,
+  [PERF_COUNT_HW_CACHE_MISSES]          = 0x412e,
+  [PERF_COUNT_HW_BRANCH_INSTRUCTIONS]   = 0x00c4,
+  [PERF_COUNT_HW_BRANCH_MISSES]         = 0x00c5,
+  [PERF_COUNT_HW_BUS_CYCLES]            = 0x013c,
+};
+
+static u64 intel_pmu_event_map(int event)
+{
+        return intel_perfmon_event_map[event];
+}
+
+/*
+ * Generalized hw caching related event table, filled
+ * in on a per model basis. A value of 0 means
+ * 'not supported', -1 means 'event makes no sense on
+ * this CPU', any other value means the raw event
+ * ID.
+ */
+
+#define C(x) PERF_COUNT_HW_CACHE_##x
+
+static u64 __read_mostly hw_cache_event_ids
+                                [PERF_COUNT_HW_CACHE_MAX]
+                                [PERF_COUNT_HW_CACHE_OP_MAX]
+                                [PERF_COUNT_HW_CACHE_RESULT_MAX];
+
+static const u64 nehalem_hw_cache_event_ids
+                                [PERF_COUNT_HW_CACHE_MAX]
+                                [PERF_COUNT_HW_CACHE_OP_MAX]
+                                [PERF_COUNT_HW_CACHE_RESULT_MAX] =
+{
+ [ C(L1D) ] = {
+        [ C(OP_READ) ] = {
+                [ C(RESULT_ACCESS) ] = 0x0f40, /* L1D_CACHE_LD.MESI            */
+                [ C(RESULT_MISS)   ] = 0x0140, /* L1D_CACHE_LD.I_STATE         */
+        },
+        [ C(OP_WRITE) ] = {
+                [ C(RESULT_ACCESS) ] = 0x0f41, /* L1D_CACHE_ST.MESI            */
+                [ C(RESULT_MISS)   ] = 0x0141, /* L1D_CACHE_ST.I_STATE         */
+        },
+        [ C(OP_PREFETCH) ] = {
+                [ C(RESULT_ACCESS) ] = 0x014e, /* L1D_PREFETCH.REQUESTS        */
+                [ C(RESULT_MISS)   ] = 0x024e, /* L1D_PREFETCH.MISS            */
+        },
+ },
+ [ C(L1I ) ] = {
+        [ C(OP_READ) ] = {
+                [ C(RESULT_ACCESS) ] = 0x0380, /* L1I.READS                    */
+                [ C(RESULT_MISS)   ] = 0x0280, /* L1I.MISSES                   */
+        },
+        [ C(OP_WRITE) ] = {
+                [ C(RESULT_ACCESS) ] = -1,
+                [ C(RESULT_MISS)   ] = -1,
+        },
+        [ C(OP_PREFETCH) ] = {
+                [ C(RESULT_ACCESS) ] = 0x0,
+                [ C(RESULT_MISS)   ] = 0x0,
+        },
+ },
+ [ C(LL  ) ] = {
+        [ C(OP_READ) ] = {
+                [ C(RESULT_ACCESS) ] = 0x0324, /* L2_RQSTS.LOADS               */
+                [ C(RESULT_MISS)   ] = 0x0224, /* L2_RQSTS.LD_MISS             */
+        },
+        [ C(OP_WRITE) ] = {
+                [ C(RESULT_ACCESS) ] = 0x0c24, /* L2_RQSTS.RFOS                */
+                [ C(RESULT_MISS)   ] = 0x0824, /* L2_RQSTS.RFO_MISS            */
+        },
+        [ C(OP_PREFETCH) ] = {
+                [ C(RESULT_ACCESS) ] = 0x4f2e, /* LLC Reference                */
+                [ C(RESULT_MISS)   ] = 0x412e, /* LLC Misses                   */
+        },
+ },
+ [ C(DTLB) ] = {
+        [ C(OP_READ) ] = {
+                [ C(RESULT_ACCESS) ] = 0x0f40, /* L1D_CACHE_LD.MESI   (alias)  */
+                [ C(RESULT_MISS)   ] = 0x0108, /* DTLB_LOAD_MISSES.ANY         */
+        },
+        [ C(OP_WRITE) ] = {
+                [ C(RESULT_ACCESS) ] = 0x0f41, /* L1D_CACHE_ST.MESI   (alias)  */
+                [ C(RESULT_MISS)   ] = 0x010c, /* MEM_STORE_RETIRED.DTLB_MISS  */
+        },
+        [ C(OP_PREFETCH) ] = {
+                [ C(RESULT_ACCESS) ] = 0x0,
+                [ C(RESULT_MISS)   ] = 0x0,
+        },
+ },
+ [ C(ITLB) ] = {
+        [ C(OP_READ) ] = {
+                [ C(RESULT_ACCESS) ] = 0x01c0, /* INST_RETIRED.ANY_P           */
+                [ C(RESULT_MISS)   ] = 0x20c8, /* ITLB_MISS_RETIRED            */
+        },
+        [ C(OP_WRITE) ] = {
+                [ C(RESULT_ACCESS) ] = -1,
+                [ C(RESULT_MISS)   ] = -1,
+        },
+        [ C(OP_PREFETCH) ] = {
+                [ C(RESULT_ACCESS) ] = -1,
+                [ C(RESULT_MISS)   ] = -1,
+        },
+ },
+ [ C(BPU ) ] = {
+        [ C(OP_READ) ] = {
+                [ C(RESULT_ACCESS) ] = 0x00c4, /* BR_INST_RETIRED.ALL_BRANCHES */
+                [ C(RESULT_MISS)   ] = 0x03e8, /* BPU_CLEARS.ANY               */
+        },
+        [ C(OP_WRITE) ] = {
+                [ C(RESULT_ACCESS) ] = -1,
+                [ C(RESULT_MISS)   ] = -1,
+        },
+        [ C(OP_PREFETCH) ] = {
+                [ C(RESULT_ACCESS) ] = -1,
+                [ C(RESULT_MISS)   ] = -1,
+        },
+ },
+};
+
+static const u64 core2_hw_cache_event_ids
+                                [PERF_COUNT_HW_CACHE_MAX]
+                                [PERF_COUNT_HW_CACHE_OP_MAX]
+                                [PERF_COUNT_HW_CACHE_RESULT_MAX] =
+{
+ [ C(L1D) ] = {
+        [ C(OP_READ) ] = {
+                [ C(RESULT_ACCESS) ] = 0x0f40, /* L1D_CACHE_LD.MESI          */
+                [ C(RESULT_MISS)   ] = 0x0140, /* L1D_CACHE_LD.I_STATE       */
+        },
+        [ C(OP_WRITE) ] = {
+                [ C(RESULT_ACCESS) ] = 0x0f41, /* L1D_CACHE_ST.MESI          */
+                [ C(RESULT_MISS)   ] = 0x0141, /* L1D_CACHE_ST.I_STATE       */
+        },
+        [ C(OP_PREFETCH) ] = {
+                [ C(RESULT_ACCESS) ] = 0x104e, /* L1D_PREFETCH.REQUESTS      */
+                [ C(RESULT_MISS)   ] = 0,
+        },
+ },
+ [ C(L1I ) ] = {
+        [ C(OP_READ) ] = {
+                [ C(RESULT_ACCESS) ] = 0x0080, /* L1I.READS                  */
+                [ C(RESULT_MISS)   ] = 0x0081, /* L1I.MISSES                 */
+        },
+        [ C(OP_WRITE) ] = {
+                [ C(RESULT_ACCESS) ] = -1,
+                [ C(RESULT_MISS)   ] = -1,
+        },
+        [ C(OP_PREFETCH) ] = {
+                [ C(RESULT_ACCESS) ] = 0,
+                [ C(RESULT_MISS)   ] = 0,
+        },
+ },
+ [ C(LL  ) ] = {
+        [ C(OP_READ) ] = {
+                [ C(RESULT_ACCESS) ] = 0x4f29, /* L2_LD.MESI                 */
+                [ C(RESULT_MISS)   ] = 0x4129, /* L2_LD.ISTATE               */
+        },
+        [ C(OP_WRITE) ] = {
+                [ C(RESULT_ACCESS) ] = 0x4f2A, /* L2_ST.MESI                 */
+                [ C(RESULT_MISS)   ] = 0x412A, /* L2_ST.ISTATE               */
+        },
+        [ C(OP_PREFETCH) ] = {
+                [ C(RESULT_ACCESS) ] = 0,
+                [ C(RESULT_MISS)   ] = 0,
+        },
+ },
+ [ C(DTLB) ] = {
+        [ C(OP_READ) ] = {
+                [ C(RESULT_ACCESS) ] = 0x0f40, /* L1D_CACHE_LD.MESI  (alias) */
+                [ C(RESULT_MISS)   ] = 0x0208, /* DTLB_MISSES.MISS_LD        */
+        },
+        [ C(OP_WRITE) ] = {
+                [ C(RESULT_ACCESS) ] = 0x0f41, /* L1D_CACHE_ST.MESI  (alias) */
+                [ C(RESULT_MISS)   ] = 0x0808, /* DTLB_MISSES.MISS_ST        */
+        },
+        [ C(OP_PREFETCH) ] = {
+                [ C(RESULT_ACCESS) ] = 0,
+                [ C(RESULT_MISS)   ] = 0,
+        },
+ },
+ [ C(ITLB) ] = {
+        [ C(OP_READ) ] = {
+                [ C(RESULT_ACCESS) ] = 0x00c0, /* INST_RETIRED.ANY_P         */
+                [ C(RESULT_MISS)   ] = 0x1282, /* ITLBMISSES                 */
+        },
+        [ C(OP_WRITE) ] = {
+                [ C(RESULT_ACCESS) ] = -1,
+                [ C(RESULT_MISS)   ] = -1,
+        },
+        [ C(OP_PREFETCH) ] = {
+                [ C(RESULT_ACCESS) ] = -1,
+                [ C(RESULT_MISS)   ] = -1,
+        },
+ },
+ [ C(BPU ) ] = {
+        [ C(OP_READ) ] = {
+                [ C(RESULT_ACCESS) ] = 0x00c4, /* BR_INST_RETIRED.ANY        */
+                [ C(RESULT_MISS)   ] = 0x00c5, /* BP_INST_RETIRED.MISPRED    */
+        },
+        [ C(OP_WRITE) ] = {
+                [ C(RESULT_ACCESS) ] = -1,
+                [ C(RESULT_MISS)   ] = -1,
+        },
+        [ C(OP_PREFETCH) ] = {
+                [ C(RESULT_ACCESS) ] = -1,
+                [ C(RESULT_MISS)   ] = -1,
+        },
+ },
+};
+
+static const u64 atom_hw_cache_event_ids
+                                [PERF_COUNT_HW_CACHE_MAX]
+                                [PERF_COUNT_HW_CACHE_OP_MAX]
+                                [PERF_COUNT_HW_CACHE_RESULT_MAX] =
+{
+ [ C(L1D) ] = {
+        [ C(OP_READ) ] = {
+                [ C(RESULT_ACCESS) ] = 0x2140, /* L1D_CACHE.LD               */
+                [ C(RESULT_MISS)   ] = 0,
+        },
+        [ C(OP_WRITE) ] = {
+                [ C(RESULT_ACCESS) ] = 0x2240, /* L1D_CACHE.ST               */
+                [ C(RESULT_MISS)   ] = 0,
+        },
+        [ C(OP_PREFETCH) ] = {
+                [ C(RESULT_ACCESS) ] = 0x0,
+                [ C(RESULT_MISS)   ] = 0,
+        },
+ },
+ [ C(L1I ) ] = {
+        [ C(OP_READ) ] = {
+                [ C(RESULT_ACCESS) ] = 0x0380, /* L1I.READS                  */
+                [ C(RESULT_MISS)   ] = 0x0280, /* L1I.MISSES                 */
+        },
+        [ C(OP_WRITE) ] = {
+                [ C(RESULT_ACCESS) ] = -1,
+                [ C(RESULT_MISS)   ] = -1,
+        },
+        [ C(OP_PREFETCH) ] = {
+                [ C(RESULT_ACCESS) ] = 0,
+                [ C(RESULT_MISS)   ] = 0,
+        },
+ },
+ [ C(LL  ) ] = {
+        [ C(OP_READ) ] = {
+                [ C(RESULT_ACCESS) ] = 0x4f29, /* L2_LD.MESI                 */
+                [ C(RESULT_MISS)   ] = 0x4129, /* L2_LD.ISTATE               */
+        },
+        [ C(OP_WRITE) ] = {
+                [ C(RESULT_ACCESS) ] = 0x4f2A, /* L2_ST.MESI                 */
+                [ C(RESULT_MISS)   ] = 0x412A, /* L2_ST.ISTATE               */
+        },
+        [ C(OP_PREFETCH) ] = {
+                [ C(RESULT_ACCESS) ] = 0,
+                [ C(RESULT_MISS)   ] = 0,
+        },
+ },
+ [ C(DTLB) ] = {
+        [ C(OP_READ) ] = {
+                [ C(RESULT_ACCESS) ] = 0x2140, /* L1D_CACHE_LD.MESI  (alias) */
+                [ C(RESULT_MISS)   ] = 0x0508, /* DTLB_MISSES.MISS_LD        */
+        },
+        [ C(OP_WRITE) ] = {
+                [ C(RESULT_ACCESS) ] = 0x2240, /* L1D_CACHE_ST.MESI  (alias) */
+                [ C(RESULT_MISS)   ] = 0x0608, /* DTLB_MISSES.MISS_ST        */
+        },
+        [ C(OP_PREFETCH) ] = {
+                [ C(RESULT_ACCESS) ] = 0,
+                [ C(RESULT_MISS)   ] = 0,
+        },
+ },
+ [ C(ITLB) ] = {
+        [ C(OP_READ) ] = {
+                [ C(RESULT_ACCESS) ] = 0x00c0, /* INST_RETIRED.ANY_P         */
+                [ C(RESULT_MISS)   ] = 0x0282, /* ITLB.MISSES                */
+        },
+        [ C(OP_WRITE) ] = {
+                [ C(RESULT_ACCESS) ] = -1,
+                [ C(RESULT_MISS)   ] = -1,
+        },
+        [ C(OP_PREFETCH) ] = {
+                [ C(RESULT_ACCESS) ] = -1,
+                [ C(RESULT_MISS)   ] = -1,
+        },
+ },
+ [ C(BPU ) ] = {
+        [ C(OP_READ) ] = {
+                [ C(RESULT_ACCESS) ] = 0x00c4, /* BR_INST_RETIRED.ANY        */
+                [ C(RESULT_MISS)   ] = 0x00c5, /* BP_INST_RETIRED.MISPRED    */
+        },
+        [ C(OP_WRITE) ] = {
+                [ C(RESULT_ACCESS) ] = -1,
+                [ C(RESULT_MISS)   ] = -1,
+        },
+        [ C(OP_PREFETCH) ] = {
+                [ C(RESULT_ACCESS) ] = -1,
+                [ C(RESULT_MISS)   ] = -1,
+        },
+ },
+};
+
+static u64 intel_pmu_raw_event(u64 event)
+{
+#define CORE_EVNTSEL_EVENT_MASK         0x000000FFULL
+#define CORE_EVNTSEL_UNIT_MASK          0x0000FF00ULL
+#define CORE_EVNTSEL_EDGE_MASK          0x00040000ULL
+#define CORE_EVNTSEL_INV_MASK           0x00800000ULL
+#define CORE_EVNTSEL_COUNTER_MASK       0xFF000000ULL
+
+#define CORE_EVNTSEL_MASK               \
+        (CORE_EVNTSEL_EVENT_MASK |      \
+         CORE_EVNTSEL_UNIT_MASK  |      \
+         CORE_EVNTSEL_EDGE_MASK  |      \
+         CORE_EVNTSEL_INV_MASK  |       \
+         CORE_EVNTSEL_COUNTER_MASK)
+
+        return event & CORE_EVNTSEL_MASK;
+}
+
+static const u64 amd_0f_hw_cache_event_ids
+                                [PERF_COUNT_HW_CACHE_MAX]
+                                [PERF_COUNT_HW_CACHE_OP_MAX]
+                                [PERF_COUNT_HW_CACHE_RESULT_MAX] =
+{
+ [ C(L1D) ] = {
+        [ C(OP_READ) ] = {
+                [ C(RESULT_ACCESS) ] = 0,
+                [ C(RESULT_MISS)   ] = 0,
+        },
+        [ C(OP_WRITE) ] = {
+                [ C(RESULT_ACCESS) ] = 0,
+                [ C(RESULT_MISS)   ] = 0,
+        },
+        [ C(OP_PREFETCH) ] = {
+                [ C(RESULT_ACCESS) ] = 0,
+                [ C(RESULT_MISS)   ] = 0,
+        },
+ },
+ [ C(L1I ) ] = {
+        [ C(OP_READ) ] = {
+                [ C(RESULT_ACCESS) ] = 0x0080, /* Instruction cache fetches  */
+                [ C(RESULT_MISS)   ] = 0x0081, /* Instruction cache misses   */
+        },
+        [ C(OP_WRITE) ] = {
+                [ C(RESULT_ACCESS) ] = -1,
+                [ C(RESULT_MISS)   ] = -1,
+        },
+        [ C(OP_PREFETCH) ] = {
+                [ C(RESULT_ACCESS) ] = 0,
+                [ C(RESULT_MISS)   ] = 0,
+        },
+ },
+ [ C(LL  ) ] = {
+        [ C(OP_READ) ] = {
+                [ C(RESULT_ACCESS) ] = 0,
+                [ C(RESULT_MISS)   ] = 0,
+        },
+        [ C(OP_WRITE) ] = {
+                [ C(RESULT_ACCESS) ] = 0,
+                [ C(RESULT_MISS)   ] = 0,
+        },
+        [ C(OP_PREFETCH) ] = {
+                [ C(RESULT_ACCESS) ] = 0,
+                [ C(RESULT_MISS)   ] = 0,
+        },
+ },
+ [ C(DTLB) ] = {
+        [ C(OP_READ) ] = {
+                [ C(RESULT_ACCESS) ] = 0,
+                [ C(RESULT_MISS)   ] = 0,
+        },
+        [ C(OP_WRITE) ] = {
+                [ C(RESULT_ACCESS) ] = 0,
+                [ C(RESULT_MISS)   ] = 0,
+        },
+        [ C(OP_PREFETCH) ] = {
+                [ C(RESULT_ACCESS) ] = 0,
+                [ C(RESULT_MISS)   ] = 0,
+        },
+ },
+ [ C(ITLB) ] = {
+        [ C(OP_READ) ] = {
+                [ C(RESULT_ACCESS) ] = 0x0080, /* Instruction fecthes        */
+                [ C(RESULT_MISS)   ] = 0x0085, /* Instr. fetch ITLB misses   */
+        },
+        [ C(OP_WRITE) ] = {
+                [ C(RESULT_ACCESS) ] = -1,
+                [ C(RESULT_MISS)   ] = -1,
+        },
+        [ C(OP_PREFETCH) ] = {
+                [ C(RESULT_ACCESS) ] = -1,
+                [ C(RESULT_MISS)   ] = -1,
+        },
+ },
+ [ C(BPU ) ] = {
+        [ C(OP_READ) ] = {
+                [ C(RESULT_ACCESS) ] = 0x00c2, /* Retired Branch Instr.      */
+                [ C(RESULT_MISS)   ] = 0x00c3, /* Retired Mispredicted BI    */
+        },
+        [ C(OP_WRITE) ] = {
+                [ C(RESULT_ACCESS) ] = -1,
+                [ C(RESULT_MISS)   ] = -1,
+        },
+        [ C(OP_PREFETCH) ] = {
+                [ C(RESULT_ACCESS) ] = -1,
+                [ C(RESULT_MISS)   ] = -1,
+        },
+ },
+};
+
+/*
+ * AMD Performance Monitor K7 and later.
+ */
+static const u64 amd_perfmon_event_map[] =
+{
+  [PERF_COUNT_HW_CPU_CYCLES]            = 0x0076,
+  [PERF_COUNT_HW_INSTRUCTIONS]          = 0x00c0,
+  [PERF_COUNT_HW_CACHE_REFERENCES]      = 0x0080,
+  [PERF_COUNT_HW_CACHE_MISSES]          = 0x0081,
+  [PERF_COUNT_HW_BRANCH_INSTRUCTIONS]   = 0x00c4,
+  [PERF_COUNT_HW_BRANCH_MISSES]         = 0x00c5,
+};
+
+static u64 amd_pmu_event_map(int event)
+{
+        return amd_perfmon_event_map[event];
+}
+
+static u64 amd_pmu_raw_event(u64 event)
+{
+#define K7_EVNTSEL_EVENT_MASK   0x7000000FFULL
+#define K7_EVNTSEL_UNIT_MASK    0x00000FF00ULL
+#define K7_EVNTSEL_EDGE_MASK    0x000040000ULL
+#define K7_EVNTSEL_INV_MASK     0x000800000ULL
+#define K7_EVNTSEL_COUNTER_MASK 0x0FF000000ULL
+
+#define K7_EVNTSEL_MASK                 \
+        (K7_EVNTSEL_EVENT_MASK |        \
+         K7_EVNTSEL_UNIT_MASK  |        \
+         K7_EVNTSEL_EDGE_MASK  |        \
+         K7_EVNTSEL_INV_MASK   |        \
+         K7_EVNTSEL_COUNTER_MASK)
+
+        return event & K7_EVNTSEL_MASK;
+}
+
+/*
+ * Propagate counter elapsed time into the generic counter.
+ * Can only be executed on the CPU where the counter is active.
+ * Returns the delta events processed.
+ */
+static u64
+x86_perf_counter_update(struct perf_counter *counter,
+                        struct hw_perf_counter *hwc, int idx)
+{
+        int shift = 64 - x86_pmu.counter_bits;
+        u64 prev_raw_count, new_raw_count;
+        s64 delta;
+
+        /*
+         * Careful: an NMI might modify the previous counter value.
+         *
+         * Our tactic to handle this is to first atomically read and
+         * exchange a new raw count - then add that new-prev delta
+         * count to the generic counter atomically:
+         */
+again:
+        prev_raw_count = atomic64_read(&hwc->prev_count);
+        rdmsrl(hwc->counter_base + idx, new_raw_count);
+
+        if (atomic64_cmpxchg(&hwc->prev_count, prev_raw_count,
+                                        new_raw_count) != prev_raw_count)
+                goto again;
+
+        /*
+         * Now we have the new raw value and have updated the prev
+         * timestamp already. We can now calculate the elapsed delta
+         * (counter-)time and add that to the generic counter.
+         *
+         * Careful, not all hw sign-extends above the physical width
+         * of the count.
+         */
+        delta = (new_raw_count << shift) - (prev_raw_count << shift);
+        delta >>= shift;
+
+        atomic64_add(delta, &counter->count);
+        atomic64_sub(delta, &hwc->period_left);
+
+        return new_raw_count;
+}
+
+static atomic_t active_counters;
+static DEFINE_MUTEX(pmc_reserve_mutex);
+
+static bool reserve_pmc_hardware(void)
+{
+        int i;
+
+        if (nmi_watchdog == NMI_LOCAL_APIC)
+                disable_lapic_nmi_watchdog();
+
+        for (i = 0; i < x86_pmu.num_counters; i++) {
+                if (!reserve_perfctr_nmi(x86_pmu.perfctr + i))
+                        goto perfctr_fail;
+        }
+
+        for (i = 0; i < x86_pmu.num_counters; i++) {
+                if (!reserve_evntsel_nmi(x86_pmu.eventsel + i))
+                        goto eventsel_fail;
+        }
+
+        return true;
+
+eventsel_fail:
+        for (i--; i >= 0; i--)
+                release_evntsel_nmi(x86_pmu.eventsel + i);
+
+        i = x86_pmu.num_counters;
+
+perfctr_fail:
+        for (i--; i >= 0; i--)
+                release_perfctr_nmi(x86_pmu.perfctr + i);
+
+        if (nmi_watchdog == NMI_LOCAL_APIC)
+                enable_lapic_nmi_watchdog();
+
+        return false;
+}
+
+static void release_pmc_hardware(void)
+{
+        int i;
+
+        for (i = 0; i < x86_pmu.num_counters; i++) {
+                release_perfctr_nmi(x86_pmu.perfctr + i);
+                release_evntsel_nmi(x86_pmu.eventsel + i);
+        }
+
+        if (nmi_watchdog == NMI_LOCAL_APIC)
+                enable_lapic_nmi_watchdog();
+}
+
+static void hw_perf_counter_destroy(struct perf_counter *counter)
+{
+        if (atomic_dec_and_mutex_lock(&active_counters, &pmc_reserve_mutex)) {
+                release_pmc_hardware();
+                mutex_unlock(&pmc_reserve_mutex);
+        }
+}
+
+static inline int x86_pmu_initialized(void)
+{
+        return x86_pmu.handle_irq != NULL;
+}
+
+static inline int
+set_ext_hw_attr(struct hw_perf_counter *hwc, struct perf_counter_attr *attr)
+{
+        unsigned int cache_type, cache_op, cache_result;
+        u64 config, val;
+
+        config = attr->config;
+
+        cache_type = (config >>  0) & 0xff;
+        if (cache_type >= PERF_COUNT_HW_CACHE_MAX)
+                return -EINVAL;
+
+        cache_op = (config >>  8) & 0xff;
+        if (cache_op >= PERF_COUNT_HW_CACHE_OP_MAX)
+                return -EINVAL;
+
+        cache_result = (config >> 16) & 0xff;
+        if (cache_result >= PERF_COUNT_HW_CACHE_RESULT_MAX)
+                return -EINVAL;
+
+        val = hw_cache_event_ids[cache_type][cache_op][cache_result];
+
+        if (val == 0)
+                return -ENOENT;
+
+        if (val == -1)
+                return -EINVAL;
+
+        hwc->config |= val;
+
+        return 0;
+}
+
+/*
+ * Setup the hardware configuration for a given attr_type
+ */
+static int __hw_perf_counter_init(struct perf_counter *counter)
+{
+        struct perf_counter_attr *attr = &counter->attr;
+        struct hw_perf_counter *hwc = &counter->hw;
+        int err;
+
+        if (!x86_pmu_initialized())
+                return -ENODEV;
+
+        err = 0;
+        if (!atomic_inc_not_zero(&active_counters)) {
+                mutex_lock(&pmc_reserve_mutex);
+                if (atomic_read(&active_counters) == 0 && !reserve_pmc_hardware())
+                        err = -EBUSY;
+                else
+                        atomic_inc(&active_counters);
+                mutex_unlock(&pmc_reserve_mutex);
+        }
+        if (err)
+                return err;
+
+        /*
+         * Generate PMC IRQs:
+         * (keep 'enabled' bit clear for now)
+         */
+        hwc->config = ARCH_PERFMON_EVENTSEL_INT;
+
+        /*
+         * Count user and OS events unless requested not to.
+         */
+        if (!attr->exclude_user)
+                hwc->config |= ARCH_PERFMON_EVENTSEL_USR;
+        if (!attr->exclude_kernel)
+                hwc->config |= ARCH_PERFMON_EVENTSEL_OS;
+
+        if (!hwc->sample_period) {
+                hwc->sample_period = x86_pmu.max_period;
+                hwc->last_period = hwc->sample_period;
+                atomic64_set(&hwc->period_left, hwc->sample_period);
+        }
+
+        counter->destroy = hw_perf_counter_destroy;
+
+        /*
+         * Raw event type provide the config in the event structure
+         */
+        if (attr->type == PERF_TYPE_RAW) {
+                hwc->config |= x86_pmu.raw_event(attr->config);
+                return 0;
+        }
+
+        if (attr->type == PERF_TYPE_HW_CACHE)
+                return set_ext_hw_attr(hwc, attr);
+
+        if (attr->config >= x86_pmu.max_events)
+                return -EINVAL;
+        /*
+         * The generic map:
+         */
+        hwc->config |= x86_pmu.event_map(attr->config);
+
+        return 0;
+}
+
+static void intel_pmu_disable_all(void)
+{
+        wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, 0);
+}
+
+static void amd_pmu_disable_all(void)
+{
+        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
+        int idx;
+
+        if (!cpuc->enabled)
+                return;
+
+        cpuc->enabled = 0;
+        /*
+         * ensure we write the disable before we start disabling the
+         * counters proper, so that amd_pmu_enable_counter() does the
+         * right thing.
+         */
+        barrier();
+
+        for (idx = 0; idx < x86_pmu.num_counters; idx++) {
+                u64 val;
+
+                if (!test_bit(idx, cpuc->active_mask))
+                        continue;
+                rdmsrl(MSR_K7_EVNTSEL0 + idx, val);
+                if (!(val & ARCH_PERFMON_EVENTSEL0_ENABLE))
+                        continue;
+                val &= ~ARCH_PERFMON_EVENTSEL0_ENABLE;
+                wrmsrl(MSR_K7_EVNTSEL0 + idx, val);
+        }
+}
+
+void hw_perf_disable(void)
+{
+        if (!x86_pmu_initialized())
+                return;
+        return x86_pmu.disable_all();
+}
+
+static void intel_pmu_enable_all(void)
+{
+        wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, x86_pmu.intel_ctrl);
+}
+
+static void amd_pmu_enable_all(void)
+{
+        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
+        int idx;
+
+        if (cpuc->enabled)
+                return;
+
+        cpuc->enabled = 1;
+        barrier();
+
+        for (idx = 0; idx < x86_pmu.num_counters; idx++) {
+                u64 val;
+
+                if (!test_bit(idx, cpuc->active_mask))
+                        continue;
+                rdmsrl(MSR_K7_EVNTSEL0 + idx, val);
+                if (val & ARCH_PERFMON_EVENTSEL0_ENABLE)
+                        continue;
+                val |= ARCH_PERFMON_EVENTSEL0_ENABLE;
+                wrmsrl(MSR_K7_EVNTSEL0 + idx, val);
+        }
+}
+
+void hw_perf_enable(void)
+{
+        if (!x86_pmu_initialized())
+                return;
+        x86_pmu.enable_all();
+}
+
+static inline u64 intel_pmu_get_status(void)
+{
+        u64 status;
+
+        rdmsrl(MSR_CORE_PERF_GLOBAL_STATUS, status);
+
+        return status;
+}
+
+static inline void intel_pmu_ack_status(u64 ack)
+{
+        wrmsrl(MSR_CORE_PERF_GLOBAL_OVF_CTRL, ack);
+}
+
+static inline void x86_pmu_enable_counter(struct hw_perf_counter *hwc, int idx)
+{
+        int err;
+        err = checking_wrmsrl(hwc->config_base + idx,
+                              hwc->config | ARCH_PERFMON_EVENTSEL0_ENABLE);
+}
+
+static inline void x86_pmu_disable_counter(struct hw_perf_counter *hwc, int idx)
+{
+        int err;
+        err = checking_wrmsrl(hwc->config_base + idx,
+                              hwc->config);
+}
+
+static inline void
+intel_pmu_disable_fixed(struct hw_perf_counter *hwc, int __idx)
+{
+        int idx = __idx - X86_PMC_IDX_FIXED;
+        u64 ctrl_val, mask;
+        int err;
+
+        mask = 0xfULL << (idx * 4);
+
+        rdmsrl(hwc->config_base, ctrl_val);
+        ctrl_val &= ~mask;
+        err = checking_wrmsrl(hwc->config_base, ctrl_val);
+}
+
+static inline void
+intel_pmu_disable_counter(struct hw_perf_counter *hwc, int idx)
+{
+        if (unlikely(hwc->config_base == MSR_ARCH_PERFMON_FIXED_CTR_CTRL)) {
+                intel_pmu_disable_fixed(hwc, idx);
+                return;
+        }
+
+        x86_pmu_disable_counter(hwc, idx);
+}
+
+static inline void
+amd_pmu_disable_counter(struct hw_perf_counter *hwc, int idx)
+{
+        x86_pmu_disable_counter(hwc, idx);
+}
+
+static DEFINE_PER_CPU(u64, prev_left[X86_PMC_IDX_MAX]);
+
+/*
+ * Set the next IRQ period, based on the hwc->period_left value.
+ * To be called with the counter disabled in hw:
+ */
+static int
+x86_perf_counter_set_period(struct perf_counter *counter,
+                             struct hw_perf_counter *hwc, int idx)
+{
+        s64 left = atomic64_read(&hwc->period_left);
+        s64 period = hwc->sample_period;
+        int err, ret = 0;
+
+        /*
+         * If we are way outside a reasoable range then just skip forward:
+         */
+        if (unlikely(left <= -period)) {
+                left = period;
+                atomic64_set(&hwc->period_left, left);
+                hwc->last_period = period;
+                ret = 1;
+        }
+
+        if (unlikely(left <= 0)) {
+                left += period;
+                atomic64_set(&hwc->period_left, left);
+                hwc->last_period = period;
+                ret = 1;
+        }
+        /*
+         * Quirk: certain CPUs dont like it if just 1 event is left:
+         */
+        if (unlikely(left < 2))
+                left = 2;
+
+        if (left > x86_pmu.max_period)
+                left = x86_pmu.max_period;
+
+        per_cpu(prev_left[idx], smp_processor_id()) = left;
+
+        /*
+         * The hw counter starts counting from this counter offset,
+         * mark it to be able to extra future deltas:
+         */
+        atomic64_set(&hwc->prev_count, (u64)-left);
+
+        err = checking_wrmsrl(hwc->counter_base + idx,
+                             (u64)(-left) & x86_pmu.counter_mask);
+
+        return ret;
+}
+
+static inline void
+intel_pmu_enable_fixed(struct hw_perf_counter *hwc, int __idx)
+{
+        int idx = __idx - X86_PMC_IDX_FIXED;
+        u64 ctrl_val, bits, mask;
+        int err;
+
+        /*
+         * Enable IRQ generation (0x8),
+         * and enable ring-3 counting (0x2) and ring-0 counting (0x1)
+         * if requested:
+         */
+        bits = 0x8ULL;
+        if (hwc->config & ARCH_PERFMON_EVENTSEL_USR)
+                bits |= 0x2;
+        if (hwc->config & ARCH_PERFMON_EVENTSEL_OS)
+                bits |= 0x1;
+        bits <<= (idx * 4);
+        mask = 0xfULL << (idx * 4);
+
+        rdmsrl(hwc->config_base, ctrl_val);
+        ctrl_val &= ~mask;
+        ctrl_val |= bits;
+        err = checking_wrmsrl(hwc->config_base, ctrl_val);
+}
+
+static void intel_pmu_enable_counter(struct hw_perf_counter *hwc, int idx)
+{
+        if (unlikely(hwc->config_base == MSR_ARCH_PERFMON_FIXED_CTR_CTRL)) {
+                intel_pmu_enable_fixed(hwc, idx);
+                return;
+        }
+
+        x86_pmu_enable_counter(hwc, idx);
+}
+
+static void amd_pmu_enable_counter(struct hw_perf_counter *hwc, int idx)
+{
+        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
+
+        if (cpuc->enabled)
+                x86_pmu_enable_counter(hwc, idx);
+        else
+                x86_pmu_disable_counter(hwc, idx);
+}
+
+static int
+fixed_mode_idx(struct perf_counter *counter, struct hw_perf_counter *hwc)
+{
+        unsigned int event;
+
+        if (!x86_pmu.num_counters_fixed)
+                return -1;
+
+        event = hwc->config & ARCH_PERFMON_EVENT_MASK;
+
+        if (unlikely(event == x86_pmu.event_map(PERF_COUNT_HW_INSTRUCTIONS)))
+                return X86_PMC_IDX_FIXED_INSTRUCTIONS;
+        if (unlikely(event == x86_pmu.event_map(PERF_COUNT_HW_CPU_CYCLES)))
+                return X86_PMC_IDX_FIXED_CPU_CYCLES;
+        if (unlikely(event == x86_pmu.event_map(PERF_COUNT_HW_BUS_CYCLES)))
+                return X86_PMC_IDX_FIXED_BUS_CYCLES;
+
+        return -1;
+}
+
+/*
+ * Find a PMC slot for the freshly enabled / scheduled in counter:
+ */
+static int x86_pmu_enable(struct perf_counter *counter)
+{
+        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
+        struct hw_perf_counter *hwc = &counter->hw;
+        int idx;
+
+        idx = fixed_mode_idx(counter, hwc);
+        if (idx >= 0) {
+                /*
+                 * Try to get the fixed counter, if that is already taken
+                 * then try to get a generic counter:
+                 */
+                if (test_and_set_bit(idx, cpuc->used_mask))
+                        goto try_generic;
+
+                hwc->config_base = MSR_ARCH_PERFMON_FIXED_CTR_CTRL;
+                /*
+                 * We set it so that counter_base + idx in wrmsr/rdmsr maps to
+                 * MSR_ARCH_PERFMON_FIXED_CTR0 ... CTR2:
+                 */
+                hwc->counter_base =
+                        MSR_ARCH_PERFMON_FIXED_CTR0 - X86_PMC_IDX_FIXED;
+                hwc->idx = idx;
+        } else {
+                idx = hwc->idx;
+                /* Try to get the previous generic counter again */
+                if (test_and_set_bit(idx, cpuc->used_mask)) {
+try_generic:
+                        idx = find_first_zero_bit(cpuc->used_mask,
+                                                  x86_pmu.num_counters);
+                        if (idx == x86_pmu.num_counters)
+                                return -EAGAIN;
+
+                        set_bit(idx, cpuc->used_mask);
+                        hwc->idx = idx;
+                }
+                hwc->config_base  = x86_pmu.eventsel;
+                hwc->counter_base = x86_pmu.perfctr;
+        }
+
+        perf_counters_lapic_init();
+
+        x86_pmu.disable(hwc, idx);
+
+        cpuc->counters[idx] = counter;
+        set_bit(idx, cpuc->active_mask);
+
+        x86_perf_counter_set_period(counter, hwc, idx);
+        x86_pmu.enable(hwc, idx);
+
+        return 0;
+}
+
+static void x86_pmu_unthrottle(struct perf_counter *counter)
+{
+        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
+        struct hw_perf_counter *hwc = &counter->hw;
+
+        if (WARN_ON_ONCE(hwc->idx >= X86_PMC_IDX_MAX ||
+                                cpuc->counters[hwc->idx] != counter))
+                return;
+
+        x86_pmu.enable(hwc, hwc->idx);
+}
+
+void perf_counter_print_debug(void)
+{
+        u64 ctrl, status, overflow, pmc_ctrl, pmc_count, prev_left, fixed;
+        struct cpu_hw_counters *cpuc;
+        unsigned long flags;
+        int cpu, idx;
+
+        if (!x86_pmu.num_counters)
+                return;
+
+        local_irq_save(flags);
+
+        cpu = smp_processor_id();
+        cpuc = &per_cpu(cpu_hw_counters, cpu);
+
+        if (x86_pmu.version >= 2) {
+                rdmsrl(MSR_CORE_PERF_GLOBAL_CTRL, ctrl);
+                rdmsrl(MSR_CORE_PERF_GLOBAL_STATUS, status);
+                rdmsrl(MSR_CORE_PERF_GLOBAL_OVF_CTRL, overflow);
+                rdmsrl(MSR_ARCH_PERFMON_FIXED_CTR_CTRL, fixed);
+
+                pr_info("\n");
+                pr_info("CPU#%d: ctrl:       %016llx\n", cpu, ctrl);
+                pr_info("CPU#%d: status:     %016llx\n", cpu, status);
+                pr_info("CPU#%d: overflow:   %016llx\n", cpu, overflow);
+                pr_info("CPU#%d: fixed:      %016llx\n", cpu, fixed);
+        }
+        pr_info("CPU#%d: used:       %016llx\n", cpu, *(u64 *)cpuc->used_mask);
+
+        for (idx = 0; idx < x86_pmu.num_counters; idx++) {
+                rdmsrl(x86_pmu.eventsel + idx, pmc_ctrl);
+                rdmsrl(x86_pmu.perfctr  + idx, pmc_count);
+
+                prev_left = per_cpu(prev_left[idx], cpu);
+
+                pr_info("CPU#%d:   gen-PMC%d ctrl:  %016llx\n",
+                        cpu, idx, pmc_ctrl);
+                pr_info("CPU#%d:   gen-PMC%d count: %016llx\n",
+                        cpu, idx, pmc_count);
+                pr_info("CPU#%d:   gen-PMC%d left:  %016llx\n",
+                        cpu, idx, prev_left);
+        }
+        for (idx = 0; idx < x86_pmu.num_counters_fixed; idx++) {
+                rdmsrl(MSR_ARCH_PERFMON_FIXED_CTR0 + idx, pmc_count);
+
+                pr_info("CPU#%d: fixed-PMC%d count: %016llx\n",
+                        cpu, idx, pmc_count);
+        }
+        local_irq_restore(flags);
+}
+
+static void x86_pmu_disable(struct perf_counter *counter)
+{
+        struct cpu_hw_counters *cpuc = &__get_cpu_var(cpu_hw_counters);
+        struct hw_perf_counter *hwc = &counter->hw;
+        int idx = hwc->idx;
+
+        /*
+         * Must be done before we disable, otherwise the nmi handler
+         * could reenable again:
+         */
+        clear_bit(idx, cpuc->active_mask);
+        x86_pmu.disable(hwc, idx);
+
+        /*
+         * Make sure the cleared pointer becomes visible before we
+         * (potentially) free the counter:
+         */
+        barrier();
+
+        /*
+         * Drain the remaining delta count out of a counter
+         * that we are disabling:
+         */
+        x86_perf_counter_update(counter, hwc, idx);
+        cpuc->counters[idx] = NULL;
+        clear_bit(idx, cpuc->used_mask);
+}
+
+/*
+ * Save and restart an expired counter. Called by NMI contexts,
+ * so it has to be careful about preempting normal counter ops:
+ */
+static int intel_pmu_save_and_restart(struct perf_counter *counter)
+{
+        struct hw_perf_counter *hwc = &counter->hw;
+        int idx = hwc->idx;
+        int ret;
+
+        x86_perf_counter_update(counter, hwc, idx);
+        ret = x86_perf_counter_set_period(counter, hwc, idx);
+
+        if (counter->state == PERF_COUNTER_STATE_ACTIVE)
+                intel_pmu_enable_counter(hwc, idx);
+
+        return ret;
+}
+
+static void intel_pmu_reset(void)
+{
+        unsigned long flags;
+        int idx;
+
+        if (!x86_pmu.num_counters)
+                return;
+
+        local_irq_save(flags);
+
+        printk("clearing PMU state on CPU#%d\n", smp_processor_id());
+
+        for (idx = 0; idx < x86_pmu.num_counters; idx++) {
+                checking_wrmsrl(x86_pmu.eventsel + idx, 0ull);
+                checking_wrmsrl(x86_pmu.perfctr  + idx, 0ull);
+        }
+        for (idx = 0; idx < x86_pmu.num_counters_fixed; idx++) {
+                checking_wrmsrl(MSR_ARCH_PERFMON_FIXED_CTR0 + idx, 0ull);
+        }
+
+        local_irq_restore(flags);
+}
+
+
+/*
+ * This handler is triggered by the local APIC, so the APIC IRQ handling
+ * rules apply:
+ */
+static int intel_pmu_handle_irq(struct pt_regs *regs)
+{
+        struct perf_sample_data data;
+        struct cpu_hw_counters *cpuc;
+        int bit, cpu, loops;
+        u64 ack, status;
+
+        data.regs = regs;
+        data.addr = 0;
+
+        cpu = smp_processor_id();
+        cpuc = &per_cpu(cpu_hw_counters, cpu);
+
+        perf_disable();
+        status = intel_pmu_get_status();
+        if (!status) {
+                perf_enable();
+                return 0;
+        }
+
+        loops = 0;
+again:
+        if (++loops > 100) {
+                WARN_ONCE(1, "perfcounters: irq loop stuck!\n");
+                perf_counter_print_debug();
+                intel_pmu_reset();
+                perf_enable();
+                return 1;
+        }
+
+        inc_irq_stat(apic_perf_irqs);
+        ack = status;
+        for_each_bit(bit, (unsigned long *)&status, X86_PMC_IDX_MAX) {
+                struct perf_counter *counter = cpuc->counters[bit];
+
+                clear_bit(bit, (unsigned long *) &status);
+                if (!test_bit(bit, cpuc->active_mask))
+                        continue;
+
+                if (!intel_pmu_save_and_restart(counter))
+                        continue;
+
+                if (perf_counter_overflow(counter, 1, &data))
+                        intel_pmu_disable_counter(&counter->hw, bit);
+        }
+
+        intel_pmu_ack_status(ack);
+
+        /*
+         * Repeat if there is more work to be done:
+         */
+        status = intel_pmu_get_status();
+        if (status)
+                goto again;
+
+        perf_enable();
+
+        return 1;
+}
+
+static int amd_pmu_handle_irq(struct pt_regs *regs)
+{
+        struct perf_sample_data data;
+        struct cpu_hw_counters *cpuc;
+        struct perf_counter *counter;
+        struct hw_perf_counter *hwc;
+        int cpu, idx, handled = 0;
+        u64 val;
+
+        data.regs = regs;
+        data.addr = 0;
+
+        cpu = smp_processor_id();
+        cpuc = &per_cpu(cpu_hw_counters, cpu);
+
+        for (idx = 0; idx < x86_pmu.num_counters; idx++) {
+                if (!test_bit(idx, cpuc->active_mask))
+                        continue;
+
+                counter = cpuc->counters[idx];
+                hwc = &counter->hw;
+
+                val = x86_perf_counter_update(counter, hwc, idx);
+                if (val & (1ULL << (x86_pmu.counter_bits - 1)))
+                        continue;
+
+                /*
+                 * counter overflow
+                 */
+                handled         = 1;
+                data.period     = counter->hw.last_period;
+
+                if (!x86_perf_counter_set_period(counter, hwc, idx))
+                        continue;
+
+                if (perf_counter_overflow(counter, 1, &data))
+                        amd_pmu_disable_counter(hwc, idx);
+        }
+
+        if (handled)
+                inc_irq_stat(apic_perf_irqs);
+
+        return handled;
+}
+
+void smp_perf_pending_interrupt(struct pt_regs *regs)
+{
+        irq_enter();
+        ack_APIC_irq();
+        inc_irq_stat(apic_pending_irqs);
+        perf_counter_do_pending();
+        irq_exit();
+}
+
+void set_perf_counter_pending(void)
+{
+        apic->send_IPI_self(LOCAL_PENDING_VECTOR);
+}
+
+void perf_counters_lapic_init(void)
+{
+        if (!x86_pmu_initialized())
+                return;
+
+        /*
+         * Always use NMI for PMU
+         */
+        apic_write(APIC_LVTPC, APIC_DM_NMI);
+}
+
+static int __kprobes
+perf_counter_nmi_handler(struct notifier_block *self,
+                         unsigned long cmd, void *__args)
+{
+        struct die_args *args = __args;
+        struct pt_regs *regs;
+
+        if (!atomic_read(&active_counters))
+                return NOTIFY_DONE;
+
+        switch (cmd) {
+        case DIE_NMI:
+        case DIE_NMI_IPI:
+                break;
+
+        default:
+                return NOTIFY_DONE;
+        }
+
+        regs = args->regs;
+
+        apic_write(APIC_LVTPC, APIC_DM_NMI);
+        /*
+         * Can't rely on the handled return value to say it was our NMI, two
+         * counters could trigger 'simultaneously' raising two back-to-back NMIs.
+         *
+         * If the first NMI handles both, the latter will be empty and daze
+         * the CPU.
+         */
+        x86_pmu.handle_irq(regs);
+
+        return NOTIFY_STOP;
+}
+
+static __read_mostly struct notifier_block perf_counter_nmi_notifier = {
+        .notifier_call          = perf_counter_nmi_handler,
+        .next                   = NULL,
+        .priority               = 1
+};
+
+static struct x86_pmu intel_pmu = {
+        .name                   = "Intel",
+        .handle_irq             = intel_pmu_handle_irq,
+        .disable_all            = intel_pmu_disable_all,
+        .enable_all             = intel_pmu_enable_all,
+        .enable                 = intel_pmu_enable_counter,
+        .disable                = intel_pmu_disable_counter,
+        .eventsel               = MSR_ARCH_PERFMON_EVENTSEL0,
+        .perfctr                = MSR_ARCH_PERFMON_PERFCTR0,
+        .event_map              = intel_pmu_event_map,
+        .raw_event              = intel_pmu_raw_event,
+        .max_events             = ARRAY_SIZE(intel_perfmon_event_map),
+        /*
+         * Intel PMCs cannot be accessed sanely above 32 bit width,
+         * so we install an artificial 1<<31 period regardless of
+         * the generic counter period:
+         */
+        .max_period             = (1ULL << 31) - 1,
+};
+
+static struct x86_pmu amd_pmu = {
+        .name                   = "AMD",
+        .handle_irq             = amd_pmu_handle_irq,
+        .disable_all            = amd_pmu_disable_all,
+        .enable_all             = amd_pmu_enable_all,
+        .enable                 = amd_pmu_enable_counter,
+        .disable                = amd_pmu_disable_counter,
+        .eventsel               = MSR_K7_EVNTSEL0,
+        .perfctr                = MSR_K7_PERFCTR0,
+        .event_map              = amd_pmu_event_map,
+        .raw_event              = amd_pmu_raw_event,
+        .max_events             = ARRAY_SIZE(amd_perfmon_event_map),
+        .num_counters           = 4,
+        .counter_bits           = 48,
+        .counter_mask           = (1ULL << 48) - 1,
+        /* use highest bit to detect overflow */
+        .max_period             = (1ULL << 47) - 1,
+};
+
+static int intel_pmu_init(void)
+{
+        union cpuid10_edx edx;
+        union cpuid10_eax eax;
+        unsigned int unused;
+        unsigned int ebx;
+        int version;
+
+        if (!cpu_has(&boot_cpu_data, X86_FEATURE_ARCH_PERFMON))
+                return -ENODEV;
+
+        /*
+         * Check whether the Architectural PerfMon supports
+         * Branch Misses Retired Event or not.
+         */
+        cpuid(10, &eax.full, &ebx, &unused, &edx.full);
+        if (eax.split.mask_length <= ARCH_PERFMON_BRANCH_MISSES_RETIRED)
+                return -ENODEV;
+
+        version = eax.split.version_id;
+        if (version < 2)
+                return -ENODEV;
+
+        x86_pmu                         = intel_pmu;
+        x86_pmu.version                 = version;
+        x86_pmu.num_counters            = eax.split.num_counters;
+        x86_pmu.counter_bits            = eax.split.bit_width;
+        x86_pmu.counter_mask            = (1ULL << eax.split.bit_width) - 1;
+
+        /*
+         * Quirk: v2 perfmon does not report fixed-purpose counters, so
+         * assume at least 3 counters:
+         */
+        x86_pmu.num_counters_fixed      = max((int)edx.split.num_counters_fixed, 3);
+
+        rdmsrl(MSR_CORE_PERF_GLOBAL_CTRL, x86_pmu.intel_ctrl);
+
+        /*
+         * Install the hw-cache-events table:
+         */
+        switch (boot_cpu_data.x86_model) {
+        case 15: /* original 65 nm celeron/pentium/core2/xeon, "Merom"/"Conroe" */
+        case 22: /* single-core 65 nm celeron/core2solo "Merom-L"/"Conroe-L" */
+        case 23: /* current 45 nm celeron/core2/xeon "Penryn"/"Wolfdale" */
+        case 29: /* six-core 45 nm xeon "Dunnington" */
+                memcpy(hw_cache_event_ids, core2_hw_cache_event_ids,
+                       sizeof(hw_cache_event_ids));
+
+                pr_cont("Core2 events, ");
+                break;
+        default:
+        case 26:
+                memcpy(hw_cache_event_ids, nehalem_hw_cache_event_ids,
+                       sizeof(hw_cache_event_ids));
+
+                pr_cont("Nehalem/Corei7 events, ");
+                break;
+        case 28:
+                memcpy(hw_cache_event_ids, atom_hw_cache_event_ids,
+                       sizeof(hw_cache_event_ids));
+
+                pr_cont("Atom events, ");
+                break;
+        }
+        return 0;
+}
+
+static int amd_pmu_init(void)
+{
+        x86_pmu = amd_pmu;
+
+        switch (boot_cpu_data.x86) {
+        case 0x0f:
+        case 0x10:
+        case 0x11:
+                memcpy(hw_cache_event_ids, amd_0f_hw_cache_event_ids,
+                       sizeof(hw_cache_event_ids));
+
+                pr_cont("AMD Family 0f/10/11 events, ");
+                break;
+        }
+        return 0;
+}
+
+void __init init_hw_perf_counters(void)
+{
+        int err;
+
+        pr_info("Performance Counters: ");
+
+        switch (boot_cpu_data.x86_vendor) {
+        case X86_VENDOR_INTEL:
+                err = intel_pmu_init();
+                break;
+        case X86_VENDOR_AMD:
+                err = amd_pmu_init();
+                break;
+        default:
+                return;
+        }
+        if (err != 0) {
+                pr_cont("no PMU driver, software counters only.\n");
+                return;
+        }
+
+        pr_cont("%s PMU driver.\n", x86_pmu.name);
+
+        if (x86_pmu.num_counters > X86_PMC_MAX_GENERIC) {
+                x86_pmu.num_counters = X86_PMC_MAX_GENERIC;
+                WARN(1, KERN_ERR "hw perf counters %d > max(%d), clipping!",
+                     x86_pmu.num_counters, X86_PMC_MAX_GENERIC);
+        }
+        perf_counter_mask = (1 << x86_pmu.num_counters) - 1;
+        perf_max_counters = x86_pmu.num_counters;
+
+        if (x86_pmu.num_counters_fixed > X86_PMC_MAX_FIXED) {
+                x86_pmu.num_counters_fixed = X86_PMC_MAX_FIXED;
+                WARN(1, KERN_ERR "hw perf counters fixed %d > max(%d), clipping!",
+                     x86_pmu.num_counters_fixed, X86_PMC_MAX_FIXED);
+        }
+
+        perf_counter_mask |=
+                ((1LL << x86_pmu.num_counters_fixed)-1) << X86_PMC_IDX_FIXED;
+
+        perf_counters_lapic_init();
+        register_die_notifier(&perf_counter_nmi_notifier);
+
+        pr_info("... version:                 %d\n",     x86_pmu.version);
+        pr_info("... bit width:               %d\n",     x86_pmu.counter_bits);
+        pr_info("... generic counters:        %d\n",     x86_pmu.num_counters);
+        pr_info("... value mask:              %016Lx\n", x86_pmu.counter_mask);
+        pr_info("... max period:              %016Lx\n", x86_pmu.max_period);
+        pr_info("... fixed-purpose counters:  %d\n",     x86_pmu.num_counters_fixed);
+        pr_info("... counter mask:            %016Lx\n", perf_counter_mask);
+}
+
+static inline void x86_pmu_read(struct perf_counter *counter)
+{
+        x86_perf_counter_update(counter, &counter->hw, counter->hw.idx);
+}
+
+static const struct pmu pmu = {
+        .enable         = x86_pmu_enable,
+        .disable        = x86_pmu_disable,
+        .read           = x86_pmu_read,
+        .unthrottle     = x86_pmu_unthrottle,
+};
+
+const struct pmu *hw_perf_counter_init(struct perf_counter *counter)
+{
+        int err;
+
+        err = __hw_perf_counter_init(counter);
+        if (err)
+                return ERR_PTR(err);
+
+        return &pmu;
+}
+
+/*
+ * callchain support
+ */
+
+static inline
+void callchain_store(struct perf_callchain_entry *entry, unsigned long ip)
+{
+        if (entry->nr < MAX_STACK_DEPTH)
+                entry->ip[entry->nr++] = ip;
+}
+
+static DEFINE_PER_CPU(struct perf_callchain_entry, irq_entry);
+static DEFINE_PER_CPU(struct perf_callchain_entry, nmi_entry);
+
+
+static void
+backtrace_warning_symbol(void *data, char *msg, unsigned long symbol)
+{
+        /* Ignore warnings */
+}
+
+static void backtrace_warning(void *data, char *msg)
+{
+        /* Ignore warnings */
+}
+
+static int backtrace_stack(void *data, char *name)
+{
+        /* Don't bother with IRQ stacks for now */
+        return -1;
+}
+
+static void backtrace_address(void *data, unsigned long addr, int reliable)
+{
+        struct perf_callchain_entry *entry = data;
+
+        if (reliable)
+                callchain_store(entry, addr);
+}
+
+static const struct stacktrace_ops backtrace_ops = {
+        .warning                = backtrace_warning,
+        .warning_symbol         = backtrace_warning_symbol,
+        .stack                  = backtrace_stack,
+        .address                = backtrace_address,
+};
+
+static void
+perf_callchain_kernel(struct pt_regs *regs, struct perf_callchain_entry *entry)
+{
+        unsigned long bp;
+        char *stack;
+        int nr = entry->nr;
+
+        callchain_store(entry, instruction_pointer(regs));
+
+        stack = ((char *)regs + sizeof(struct pt_regs));
+#ifdef CONFIG_FRAME_POINTER
+        bp = frame_pointer(regs);
+#else
+        bp = 0;
+#endif
+
+        dump_trace(NULL, regs, (void *)stack, bp, &backtrace_ops, entry);
+
+        entry->kernel = entry->nr - nr;
+}
+
+
+struct stack_frame {
+        const void __user       *next_fp;
+        unsigned long           return_address;
+};
+
+static int copy_stack_frame(const void __user *fp, struct stack_frame *frame)
+{
+        int ret;
+
+        if (!access_ok(VERIFY_READ, fp, sizeof(*frame)))
+                return 0;
+
+        ret = 1;
+        pagefault_disable();
+        if (__copy_from_user_inatomic(frame, fp, sizeof(*frame)))
+                ret = 0;
+        pagefault_enable();
+
+        return ret;
+}
+
+static void
+perf_callchain_user(struct pt_regs *regs, struct perf_callchain_entry *entry)
+{
+        struct stack_frame frame;
+        const void __user *fp;
+        int nr = entry->nr;
+
+        regs = (struct pt_regs *)current->thread.sp0 - 1;
+        fp   = (void __user *)regs->bp;
+
+        callchain_store(entry, regs->ip);
+
+        while (entry->nr < MAX_STACK_DEPTH) {
+                frame.next_fp        = NULL;
+                frame.return_address = 0;
+
+                if (!copy_stack_frame(fp, &frame))
+                        break;
+
+                if ((unsigned long)fp < user_stack_pointer(regs))
+                        break;
+
+                callchain_store(entry, frame.return_address);
+                fp = frame.next_fp;
+        }
+
+        entry->user = entry->nr - nr;
+}
+
+static void
+perf_do_callchain(struct pt_regs *regs, struct perf_callchain_entry *entry)
+{
+        int is_user;
+
+        if (!regs)
+                return;
+
+        is_user = user_mode(regs);
+
+        if (!current || current->pid == 0)
+                return;
+
+        if (is_user && current->state != TASK_RUNNING)
+                return;
+
+        if (!is_user)
+                perf_callchain_kernel(regs, entry);
+
+        if (current->mm)
+                perf_callchain_user(regs, entry);
+}
+
+struct perf_callchain_entry *perf_callchain(struct pt_regs *regs)
+{
+        struct perf_callchain_entry *entry;
+
+        if (in_nmi())
+                entry = &__get_cpu_var(nmi_entry);
+        else
+                entry = &__get_cpu_var(irq_entry);
+
+        entry->nr = 0;
+        entry->hv = 0;
+        entry->kernel = 0;
+        entry->user = 0;
+
+        perf_do_callchain(regs, entry);
+
+        return entry;
+}
diff --git a/arch/x86/kernel/cpu/perfctr-watchdog.c b/arch/x86/kernel/cpu/perfctr-watchdog.c
index f6c70a164e32..d6f5b9fbde32 100644
--- a/arch/x86/kernel/cpu/perfctr-watchdog.c
+++ b/arch/x86/kernel/cpu/perfctr-watchdog.c
@@ -19,8 +19,8 @@
 #include <linux/nmi.h>
 #include <linux/kprobes.h>
 
-#include <asm/genapic.h>
-#include <asm/intel_arch_perfmon.h>
+#include <asm/apic.h>
+#include <asm/perf_counter.h>
 
 struct nmi_watchdog_ctlblk {
         unsigned int cccr_msr;
diff --git a/arch/x86/kernel/ds.c b/arch/x86/kernel/ds.c
index 87b67e3a765a..48bfe1386038 100644
--- a/arch/x86/kernel/ds.c
+++ b/arch/x86/kernel/ds.c
@@ -19,45 +19,61 @@
  * Markus Metzger <markus.t.metzger@intel.com>, 2007-2009
  */
 
-
-#include <asm/ds.h>
-
-#include <linux/errno.h>
+#include <linux/kernel.h>
 #include <linux/string.h>
-#include <linux/slab.h>
+#include <linux/errno.h>
 #include <linux/sched.h>
+#include <linux/slab.h>
 #include <linux/mm.h>
-#include <linux/kernel.h>
+#include <linux/trace_clock.h>
+
+#include <asm/ds.h>
 
+#include "ds_selftest.h"
 
 /*
- * The configuration for a particular DS hardware implementation.
+ * The configuration for a particular DS hardware implementation:
  */
 struct ds_configuration {
-        /* the name of the configuration */
-        const char *name;
-        /* the size of one pointer-typed field in the DS structure and
-           in the BTS and PEBS buffers in bytes;
-           this covers the first 8 DS fields related to buffer management. */
-        unsigned char  sizeof_field;
-        /* the size of a BTS/PEBS record in bytes */
-        unsigned char  sizeof_rec[2];
-        /* a series of bit-masks to control various features indexed
-         * by enum ds_feature */
-        unsigned long ctl[dsf_ctl_max];
+        /* The name of the configuration: */
+        const char              *name;
+
+        /* The size of pointer-typed fields in DS, BTS, and PEBS: */
+        unsigned char           sizeof_ptr_field;
+
+        /* The size of a BTS/PEBS record in bytes: */
+        unsigned char           sizeof_rec[2];
+
+        /* The number of pebs counter reset values in the DS structure. */
+        unsigned char           nr_counter_reset;
+
+        /* Control bit-masks indexed by enum ds_feature: */
+        unsigned long           ctl[dsf_ctl_max];
 };
-static DEFINE_PER_CPU(struct ds_configuration, ds_cfg_array);
+static struct ds_configuration ds_cfg __read_mostly;
+
+
+/* Maximal size of a DS configuration: */
+#define MAX_SIZEOF_DS           0x80
 
-#define ds_cfg per_cpu(ds_cfg_array, smp_processor_id())
+/* Maximal size of a BTS record: */
+#define MAX_SIZEOF_BTS          (3 * 8)
 
-#define MAX_SIZEOF_DS (12 * 8)  /* maximal size of a DS configuration */
-#define MAX_SIZEOF_BTS (3 * 8)  /* maximal size of a BTS record */
-#define DS_ALIGNMENT (1 << 3)   /* BTS and PEBS buffer alignment */
+/* BTS and PEBS buffer alignment: */
+#define DS_ALIGNMENT            (1 << 3)
 
-#define BTS_CONTROL \
- (ds_cfg.ctl[dsf_bts] | ds_cfg.ctl[dsf_bts_kernel] | ds_cfg.ctl[dsf_bts_user] |\
-  ds_cfg.ctl[dsf_bts_overflow])
+/* Number of buffer pointers in DS: */
+#define NUM_DS_PTR_FIELDS       8
 
+/* Size of a pebs reset value in DS: */
+#define PEBS_RESET_FIELD_SIZE   8
+
+/* Mask of control bits in the DS MSR register: */
+#define BTS_CONTROL                               \
+        ( ds_cfg.ctl[dsf_bts]                   | \
+          ds_cfg.ctl[dsf_bts_kernel]            | \
+          ds_cfg.ctl[dsf_bts_user]              | \
+          ds_cfg.ctl[dsf_bts_overflow] )
 
 /*
  * A BTS or PEBS tracer.
@@ -66,29 +82,36 @@ static DEFINE_PER_CPU(struct ds_configuration, ds_cfg_array);
  * to identify tracers.
  */
 struct ds_tracer {
-        /* the DS context (partially) owned by this tracer */
-        struct ds_context *context;
-        /* the buffer provided on ds_request() and its size in bytes */
-        void *buffer;
-        size_t size;
+        /* The DS context (partially) owned by this tracer. */
+        struct ds_context       *context;
+        /* The buffer provided on ds_request() and its size in bytes. */
+        void                    *buffer;
+        size_t                  size;
 };
 
 struct bts_tracer {
-        /* the common DS part */
-        struct ds_tracer ds;
-        /* the trace including the DS configuration */
-        struct bts_trace trace;
-        /* buffer overflow notification function */
-        bts_ovfl_callback_t ovfl;
+        /* The common DS part: */
+        struct ds_tracer        ds;
+
+        /* The trace including the DS configuration: */
+        struct bts_trace        trace;
+
+        /* Buffer overflow notification function: */
+        bts_ovfl_callback_t     ovfl;
+
+        /* Active flags affecting trace collection. */
+        unsigned int            flags;
 };
 
 struct pebs_tracer {
-        /* the common DS part */
-        struct ds_tracer ds;
-        /* the trace including the DS configuration */
-        struct pebs_trace trace;
-        /* buffer overflow notification function */
-        pebs_ovfl_callback_t ovfl;
+        /* The common DS part: */
+        struct ds_tracer        ds;
+
+        /* The trace including the DS configuration: */
+        struct pebs_trace       trace;
+
+        /* Buffer overflow notification function: */
+        pebs_ovfl_callback_t    ovfl;
 };
 
 /*
@@ -97,6 +120,7 @@ struct pebs_tracer {
  *
  * The DS configuration consists of the following fields; different
  * architetures vary in the size of those fields.
+ *
  * - double-word aligned base linear address of the BTS buffer
  * - write pointer into the BTS buffer
  * - end linear address of the BTS buffer (one byte beyond the end of
@@ -135,21 +159,22 @@ enum ds_field {
 };
 
 enum ds_qualifier {
-        ds_bts  = 0,
+        ds_bts = 0,
         ds_pebs
 };
 
-static inline unsigned long ds_get(const unsigned char *base,
-                                   enum ds_qualifier qual, enum ds_field field)
+static inline unsigned long
+ds_get(const unsigned char *base, enum ds_qualifier qual, enum ds_field field)
 {
-        base += (ds_cfg.sizeof_field * (field + (4 * qual)));
+        base += (ds_cfg.sizeof_ptr_field * (field + (4 * qual)));
         return *(unsigned long *)base;
 }
 
-static inline void ds_set(unsigned char *base, enum ds_qualifier qual,
-                          enum ds_field field, unsigned long value)
+static inline void
+ds_set(unsigned char *base, enum ds_qualifier qual, enum ds_field field,
+       unsigned long value)
 {
-        base += (ds_cfg.sizeof_field * (field + (4 * qual)));
+        base += (ds_cfg.sizeof_ptr_field * (field + (4 * qual)));
         (*(unsigned long *)base) = value;
 }
 
@@ -159,7 +184,6 @@ static inline void ds_set(unsigned char *base, enum ds_qualifier qual,
  */
 static DEFINE_SPINLOCK(ds_lock);
 
-
 /*
  * We either support (system-wide) per-cpu or per-thread allocation.
  * We distinguish the two based on the task_struct pointer, where a
@@ -178,12 +202,28 @@ static DEFINE_SPINLOCK(ds_lock);
  */
 static atomic_t tracers = ATOMIC_INIT(0);
 
-static inline void get_tracer(struct task_struct *task)
+static inline int get_tracer(struct task_struct *task)
 {
-        if (task)
+        int error;
+
+        spin_lock_irq(&ds_lock);
+
+        if (task) {
+                error = -EPERM;
+                if (atomic_read(&tracers) < 0)
+                        goto out;
                 atomic_inc(&tracers);
-        else
+        } else {
+                error = -EPERM;
+                if (atomic_read(&tracers) > 0)
+                        goto out;
                 atomic_dec(&tracers);
+        }
+
+        error = 0;
+out:
+        spin_unlock_irq(&ds_lock);
+        return error;
 }
 
 static inline void put_tracer(struct task_struct *task)
@@ -194,14 +234,6 @@ static inline void put_tracer(struct task_struct *task)
                 atomic_inc(&tracers);
 }
 
-static inline int check_tracer(struct task_struct *task)
-{
-        return task ?
-                (atomic_read(&tracers) >= 0) :
-                (atomic_read(&tracers) <= 0);
-}
-
-
 /*
  * The DS context is either attached to a thread or to a cpu:
  * - in the former case, the thread_struct contains a pointer to the
@@ -213,61 +245,58 @@ static inline int check_tracer(struct task_struct *task)
  * deallocated when the last user puts the context.
  */
 struct ds_context {
-        /* pointer to the DS configuration; goes into MSR_IA32_DS_AREA */
-        unsigned char ds[MAX_SIZEOF_DS];
-        /* the owner of the BTS and PEBS configuration, respectively */
-        struct bts_tracer *bts_master;
-        struct pebs_tracer *pebs_master;
-        /* use count */
-        unsigned long count;
-        /* a pointer to the context location inside the thread_struct
-         * or the per_cpu context array */
-        struct ds_context **this;
-        /* a pointer to the task owning this context, or NULL, if the
-         * context is owned by a cpu */
-        struct task_struct *task;
-};
+        /* The DS configuration; goes into MSR_IA32_DS_AREA: */
+        unsigned char           ds[MAX_SIZEOF_DS];
+
+        /* The owner of the BTS and PEBS configuration, respectively: */
+        struct bts_tracer       *bts_master;
+        struct pebs_tracer      *pebs_master;
 
-static DEFINE_PER_CPU(struct ds_context *, system_context_array);
+        /* Use count: */
+        unsigned long           count;
 
-#define system_context per_cpu(system_context_array, smp_processor_id())
+        /* Pointer to the context pointer field: */
+        struct ds_context       **this;
+
+        /* The traced task; NULL for cpu tracing: */
+        struct task_struct      *task;
+
+        /* The traced cpu; only valid if task is NULL: */
+        int                     cpu;
+};
 
+static DEFINE_PER_CPU(struct ds_context *, cpu_context);
 
-static inline struct ds_context *ds_get_context(struct task_struct *task)
+
+static struct ds_context *ds_get_context(struct task_struct *task, int cpu)
 {
         struct ds_context **p_context =
-                (task ? &task->thread.ds_ctx : &system_context);
+                (task ? &task->thread.ds_ctx : &per_cpu(cpu_context, cpu));
         struct ds_context *context = NULL;
         struct ds_context *new_context = NULL;
-        unsigned long irq;
 
         /* Chances are small that we already have a context. */
         new_context = kzalloc(sizeof(*new_context), GFP_KERNEL);
         if (!new_context)
                 return NULL;
 
-        spin_lock_irqsave(&ds_lock, irq);
+        spin_lock_irq(&ds_lock);
 
         context = *p_context;
-        if (!context) {
+        if (likely(!context)) {
                 context = new_context;
 
                 context->this = p_context;
                 context->task = task;
+                context->cpu = cpu;
                 context->count = 0;
 
-                if (task)
-                        set_tsk_thread_flag(task, TIF_DS_AREA_MSR);
-
-                if (!task || (task == current))
-                        wrmsrl(MSR_IA32_DS_AREA, (unsigned long)context->ds);
-
                 *p_context = context;
         }
 
         context->count++;
 
-        spin_unlock_irqrestore(&ds_lock, irq);
+        spin_unlock_irq(&ds_lock);
 
         if (context != new_context)
                 kfree(new_context);
@@ -275,8 +304,9 @@ static inline struct ds_context *ds_get_context(struct task_struct *task)
         return context;
 }
 
-static inline void ds_put_context(struct ds_context *context)
+static void ds_put_context(struct ds_context *context)
 {
+        struct task_struct *task;
         unsigned long irq;
 
         if (!context)
@@ -291,17 +321,55 @@ static inline void ds_put_context(struct ds_context *context)
 
         *(context->this) = NULL;
 
-        if (context->task)
-                clear_tsk_thread_flag(context->task, TIF_DS_AREA_MSR);
+        task = context->task;
+
+        if (task)
+                clear_tsk_thread_flag(task, TIF_DS_AREA_MSR);
 
-        if (!context->task || (context->task == current))
-                wrmsrl(MSR_IA32_DS_AREA, 0);
+        /*
+         * We leave the (now dangling) pointer to the DS configuration in
+         * the DS_AREA msr. This is as good or as bad as replacing it with
+         * NULL - the hardware would crash if we enabled tracing.
+         *
+         * This saves us some problems with having to write an msr on a
+         * different cpu while preventing others from doing the same for the
+         * next context for that same cpu.
+         */
 
         spin_unlock_irqrestore(&ds_lock, irq);
 
+        /* The context might still be in use for context switching. */
+        if (task && (task != current))
+                wait_task_context_switch(task);
+
         kfree(context);
 }
 
+static void ds_install_ds_area(struct ds_context *context)
+{
+        unsigned long ds;
+
+        ds = (unsigned long)context->ds;
+
+        /*
+         * There is a race between the bts master and the pebs master.
+         *
+         * The thread/cpu access is synchronized via get/put_cpu() for
+         * task tracing and via wrmsr_on_cpu for cpu tracing.
+         *
+         * If bts and pebs are collected for the same task or same cpu,
+         * the same confiuration is written twice.
+         */
+        if (context->task) {
+                get_cpu();
+                if (context->task == current)
+                        wrmsrl(MSR_IA32_DS_AREA, ds);
+                set_tsk_thread_flag(context->task, TIF_DS_AREA_MSR);
+                put_cpu();
+        } else
+                wrmsr_on_cpu(context->cpu, MSR_IA32_DS_AREA,
+                             (u32)((u64)ds), (u32)((u64)ds >> 32));
+}
 
 /*
  * Call the tracer's callback on a buffer overflow.
@@ -332,9 +400,9 @@ static void ds_overflow(struct ds_context *context, enum ds_qualifier qual)
  * The remainder of any partially written record is zeroed out.
  *
  * context: the DS context
- * qual: the buffer type
- * record: the data to write
- * size: the size of the data
+ * qual:    the buffer type
+ * record:  the data to write
+ * size:    the size of the data
  */
 static int ds_write(struct ds_context *context, enum ds_qualifier qual,
                     const void *record, size_t size)
@@ -349,14 +417,14 @@ static int ds_write(struct ds_context *context, enum ds_qualifier qual,
                 unsigned long write_size, adj_write_size;
 
                 /*
-                 * write as much as possible without producing an
+                 * Write as much as possible without producing an
                  * overflow interrupt.
                  *
-                 * interrupt_threshold must either be
+                 * Interrupt_threshold must either be
                  * - bigger than absolute_maximum or
                  * - point to a record between buffer_base and absolute_maximum
                  *
-                 * index points to a valid record.
+                 * Index points to a valid record.
                  */
                 base   = ds_get(context->ds, qual, ds_buffer_base);
                 index  = ds_get(context->ds, qual, ds_index);
@@ -365,8 +433,10 @@ static int ds_write(struct ds_context *context, enum ds_qualifier qual,
 
                 write_end = min(end, int_th);
 
-                /* if we are already beyond the interrupt threshold,
-                 * we fill the entire buffer */
+                /*
+                 * If we are already beyond the interrupt threshold,
+                 * we fill the entire buffer.
+                 */
                 if (write_end <= index)
                         write_end = end;
 
@@ -383,7 +453,7 @@ static int ds_write(struct ds_context *context, enum ds_qualifier qual,
                 adj_write_size = write_size / ds_cfg.sizeof_rec[qual];
                 adj_write_size *= ds_cfg.sizeof_rec[qual];
 
-                /* zero out trailing bytes */
+                /* Zero out trailing bytes. */
                 memset((char *)index + write_size, 0,
                        adj_write_size - write_size);
                 index += adj_write_size;
@@ -410,7 +480,7 @@ static int ds_write(struct ds_context *context, enum ds_qualifier qual,
  * Later architectures use 64bit pointers throughout, whereas earlier
  * architectures use 32bit pointers in 32bit mode.
  *
- * We compute the base address for the first 8 fields based on:
+ * We compute the base address for the fields based on:
  * - the field size stored in the DS configuration
  * - the relative field position
  *
@@ -431,23 +501,23 @@ enum bts_field {
         bts_to,
         bts_flags,
 
-        bts_qual = bts_from,
-        bts_jiffies = bts_to,
-        bts_pid = bts_flags,
+        bts_qual                = bts_from,
+        bts_clock               = bts_to,
+        bts_pid                 = bts_flags,
 
-        bts_qual_mask = (bts_qual_max - 1),
-        bts_escape = ((unsigned long)-1 & ~bts_qual_mask)
+        bts_qual_mask           = (bts_qual_max - 1),
+        bts_escape              = ((unsigned long)-1 & ~bts_qual_mask)
 };
 
 static inline unsigned long bts_get(const char *base, enum bts_field field)
 {
-        base += (ds_cfg.sizeof_field * field);
+        base += (ds_cfg.sizeof_ptr_field * field);
         return *(unsigned long *)base;
 }
 
 static inline void bts_set(char *base, enum bts_field field, unsigned long val)
 {
-        base += (ds_cfg.sizeof_field * field);;
+        base += (ds_cfg.sizeof_ptr_field * field);;
         (*(unsigned long *)base) = val;
 }
 
@@ -463,8 +533,8 @@ static inline void bts_set(char *base, enum bts_field field, unsigned long val)
  *
  * return: bytes read/written on success; -Eerrno, otherwise
  */
-static int bts_read(struct bts_tracer *tracer, const void *at,
-                    struct bts_struct *out)
+static int
+bts_read(struct bts_tracer *tracer, const void *at, struct bts_struct *out)
 {
         if (!tracer)
                 return -EINVAL;
@@ -478,8 +548,8 @@ static int bts_read(struct bts_tracer *tracer, const void *at,
         memset(out, 0, sizeof(*out));
         if ((bts_get(at, bts_qual) & ~bts_qual_mask) == bts_escape) {
                 out->qualifier = (bts_get(at, bts_qual) & bts_qual_mask);
-                out->variant.timestamp.jiffies = bts_get(at, bts_jiffies);
-                out->variant.timestamp.pid = bts_get(at, bts_pid);
+                out->variant.event.clock = bts_get(at, bts_clock);
+                out->variant.event.pid = bts_get(at, bts_pid);
         } else {
                 out->qualifier = bts_branch;
                 out->variant.lbr.from = bts_get(at, bts_from);
@@ -516,8 +586,8 @@ static int bts_write(struct bts_tracer *tracer, const struct bts_struct *in)
         case bts_task_arrives:
         case bts_task_departs:
                 bts_set(raw, bts_qual, (bts_escape | in->qualifier));
-                bts_set(raw, bts_jiffies, in->variant.timestamp.jiffies);
-                bts_set(raw, bts_pid, in->variant.timestamp.pid);
+                bts_set(raw, bts_clock, in->variant.event.clock);
+                bts_set(raw, bts_pid, in->variant.event.pid);
                 break;
         default:
                 return -EINVAL;
@@ -555,7 +625,8 @@ static void ds_init_ds_trace(struct ds_trace *trace, enum ds_qualifier qual,
                              unsigned int flags) {
         unsigned long buffer, adj;
 
-        /* adjust the buffer address and size to meet alignment
+        /*
+         * Adjust the buffer address and size to meet alignment
          * constraints:
          * - buffer is double-word aligned
          * - size is multiple of record size
@@ -577,9 +648,11 @@ static void ds_init_ds_trace(struct ds_trace *trace, enum ds_qualifier qual,
         trace->begin = (void *)buffer;
         trace->top = trace->begin;
         trace->end = (void *)(buffer + size);
-        /* The value for 'no threshold' is -1, which will set the
+        /*
+         * The value for 'no threshold' is -1, which will set the
          * threshold outside of the buffer, just like we want it.
          */
+        ith *= ds_cfg.sizeof_rec[qual];
         trace->ith = (void *)(buffer + size - ith);
 
         trace->flags = flags;
@@ -588,18 +661,27 @@ static void ds_init_ds_trace(struct ds_trace *trace, enum ds_qualifier qual,
 
 static int ds_request(struct ds_tracer *tracer, struct ds_trace *trace,
                       enum ds_qualifier qual, struct task_struct *task,
-                      void *base, size_t size, size_t th, unsigned int flags)
+                      int cpu, void *base, size_t size, size_t th)
 {
         struct ds_context *context;
         int error;
+        size_t req_size;
+
+        error = -EOPNOTSUPP;
+        if (!ds_cfg.sizeof_rec[qual])
+                goto out;
 
         error = -EINVAL;
         if (!base)
                 goto out;
 
-        /* we require some space to do alignment adjustments below */
+        req_size = ds_cfg.sizeof_rec[qual];
+        /* We might need space for alignment adjustments. */
+        if (!IS_ALIGNED((unsigned long)base, DS_ALIGNMENT))
+                req_size += DS_ALIGNMENT;
+
         error = -EINVAL;
-        if (size < (DS_ALIGNMENT + ds_cfg.sizeof_rec[qual]))
+        if (size < req_size)
                 goto out;
 
         if (th != (size_t)-1) {
@@ -614,182 +696,318 @@ static int ds_request(struct ds_tracer *tracer, struct ds_trace *trace,
         tracer->size = size;
 
         error = -ENOMEM;
-        context = ds_get_context(task);
+        context = ds_get_context(task, cpu);
         if (!context)
                 goto out;
         tracer->context = context;
 
-        ds_init_ds_trace(trace, qual, base, size, th, flags);
+        /*
+         * Defer any tracer-specific initialization work for the context until
+         * context ownership has been clarified.
+         */
 
         error = 0;
  out:
         return error;
 }
 
-struct bts_tracer *ds_request_bts(struct task_struct *task,
-                                  void *base, size_t size,
-                                  bts_ovfl_callback_t ovfl, size_t th,
-                                  unsigned int flags)
+static struct bts_tracer *ds_request_bts(struct task_struct *task, int cpu,
+                                         void *base, size_t size,
+                                         bts_ovfl_callback_t ovfl, size_t th,
+                                         unsigned int flags)
 {
         struct bts_tracer *tracer;
-        unsigned long irq;
         int error;
 
+        /* Buffer overflow notification is not yet implemented. */
         error = -EOPNOTSUPP;
-        if (!ds_cfg.ctl[dsf_bts])
+        if (ovfl)
                 goto out;
 
-        /* buffer overflow notification is not yet implemented */
-        error = -EOPNOTSUPP;
-        if (ovfl)
+        error = get_tracer(task);
+        if (error < 0)
                 goto out;
 
         error = -ENOMEM;
         tracer = kzalloc(sizeof(*tracer), GFP_KERNEL);
         if (!tracer)
-                goto out;
+                goto out_put_tracer;
         tracer->ovfl = ovfl;
 
+        /* Do some more error checking and acquire a tracing context. */
         error = ds_request(&tracer->ds, &tracer->trace.ds,
-                           ds_bts, task, base, size, th, flags);
+                           ds_bts, task, cpu, base, size, th);
         if (error < 0)
                 goto out_tracer;
 
-
-        spin_lock_irqsave(&ds_lock, irq);
-
-        error = -EPERM;
-        if (!check_tracer(task))
-                goto out_unlock;
-        get_tracer(task);
+        /* Claim the bts part of the tracing context we acquired above. */
+        spin_lock_irq(&ds_lock);
 
         error = -EPERM;
         if (tracer->ds.context->bts_master)
-                goto out_put_tracer;
+                goto out_unlock;
         tracer->ds.context->bts_master = tracer;
 
-        spin_unlock_irqrestore(&ds_lock, irq);
+        spin_unlock_irq(&ds_lock);
 
+        /*
+         * Now that we own the bts part of the context, let's complete the
+         * initialization for that part.
+         */
+        ds_init_ds_trace(&tracer->trace.ds, ds_bts, base, size, th, flags);
+        ds_write_config(tracer->ds.context, &tracer->trace.ds, ds_bts);
+        ds_install_ds_area(tracer->ds.context);
 
         tracer->trace.read  = bts_read;
         tracer->trace.write = bts_write;
 
-        ds_write_config(tracer->ds.context, &tracer->trace.ds, ds_bts);
+        /* Start tracing. */
         ds_resume_bts(tracer);
 
         return tracer;
 
- out_put_tracer:
-        put_tracer(task);
  out_unlock:
-        spin_unlock_irqrestore(&ds_lock, irq);
+        spin_unlock_irq(&ds_lock);
         ds_put_context(tracer->ds.context);
  out_tracer:
         kfree(tracer);
+ out_put_tracer:
+        put_tracer(task);
  out:
         return ERR_PTR(error);
 }
 
-struct pebs_tracer *ds_request_pebs(struct task_struct *task,
-                                    void *base, size_t size,
-                                    pebs_ovfl_callback_t ovfl, size_t th,
-                                    unsigned int flags)
+struct bts_tracer *ds_request_bts_task(struct task_struct *task,
+                                       void *base, size_t size,
+                                       bts_ovfl_callback_t ovfl,
+                                       size_t th, unsigned int flags)
+{
+        return ds_request_bts(task, 0, base, size, ovfl, th, flags);
+}
+
+struct bts_tracer *ds_request_bts_cpu(int cpu, void *base, size_t size,
+                                      bts_ovfl_callback_t ovfl,
+                                      size_t th, unsigned int flags)
+{
+        return ds_request_bts(NULL, cpu, base, size, ovfl, th, flags);
+}
+
+static struct pebs_tracer *ds_request_pebs(struct task_struct *task, int cpu,
+                                           void *base, size_t size,
+                                           pebs_ovfl_callback_t ovfl, size_t th,
+                                           unsigned int flags)
 {
         struct pebs_tracer *tracer;
-        unsigned long irq;
         int error;
 
-        /* buffer overflow notification is not yet implemented */
+        /* Buffer overflow notification is not yet implemented. */
         error = -EOPNOTSUPP;
         if (ovfl)
                 goto out;
 
+        error = get_tracer(task);
+        if (error < 0)
+                goto out;
+
         error = -ENOMEM;
         tracer = kzalloc(sizeof(*tracer), GFP_KERNEL);
         if (!tracer)
-                goto out;
+                goto out_put_tracer;
         tracer->ovfl = ovfl;
 
+        /* Do some more error checking and acquire a tracing context. */
         error = ds_request(&tracer->ds, &tracer->trace.ds,
-                           ds_pebs, task, base, size, th, flags);
+                           ds_pebs, task, cpu, base, size, th);
         if (error < 0)
                 goto out_tracer;
 
-        spin_lock_irqsave(&ds_lock, irq);
-
-        error = -EPERM;
-        if (!check_tracer(task))
-                goto out_unlock;
-        get_tracer(task);
+        /* Claim the pebs part of the tracing context we acquired above. */
+        spin_lock_irq(&ds_lock);
 
         error = -EPERM;
         if (tracer->ds.context->pebs_master)
-                goto out_put_tracer;
+                goto out_unlock;
         tracer->ds.context->pebs_master = tracer;
 
-        spin_unlock_irqrestore(&ds_lock, irq);
+        spin_unlock_irq(&ds_lock);
 
+        /*
+         * Now that we own the pebs part of the context, let's complete the
+         * initialization for that part.
+         */
+        ds_init_ds_trace(&tracer->trace.ds, ds_pebs, base, size, th, flags);
         ds_write_config(tracer->ds.context, &tracer->trace.ds, ds_pebs);
+        ds_install_ds_area(tracer->ds.context);
+
+        /* Start tracing. */
         ds_resume_pebs(tracer);
 
         return tracer;
 
- out_put_tracer:
-        put_tracer(task);
  out_unlock:
-        spin_unlock_irqrestore(&ds_lock, irq);
+        spin_unlock_irq(&ds_lock);
         ds_put_context(tracer->ds.context);
  out_tracer:
         kfree(tracer);
+ out_put_tracer:
+        put_tracer(task);
  out:
         return ERR_PTR(error);
 }
 
-void ds_release_bts(struct bts_tracer *tracer)
+struct pebs_tracer *ds_request_pebs_task(struct task_struct *task,
+                                         void *base, size_t size,
+                                         pebs_ovfl_callback_t ovfl,
+                                         size_t th, unsigned int flags)
 {
-        if (!tracer)
-                return;
+        return ds_request_pebs(task, 0, base, size, ovfl, th, flags);
+}
 
-        ds_suspend_bts(tracer);
+struct pebs_tracer *ds_request_pebs_cpu(int cpu, void *base, size_t size,
+                                        pebs_ovfl_callback_t ovfl,
+                                        size_t th, unsigned int flags)
+{
+        return ds_request_pebs(NULL, cpu, base, size, ovfl, th, flags);
+}
+
+static void ds_free_bts(struct bts_tracer *tracer)
+{
+        struct task_struct *task;
+
+        task = tracer->ds.context->task;
 
         WARN_ON_ONCE(tracer->ds.context->bts_master != tracer);
         tracer->ds.context->bts_master = NULL;
 
-        put_tracer(tracer->ds.context->task);
+        /* Make sure tracing stopped and the tracer is not in use. */
+        if (task && (task != current))
+                wait_task_context_switch(task);
+
         ds_put_context(tracer->ds.context);
+        put_tracer(task);
 
         kfree(tracer);
 }
 
+void ds_release_bts(struct bts_tracer *tracer)
+{
+        might_sleep();
+
+        if (!tracer)
+                return;
+
+        ds_suspend_bts(tracer);
+        ds_free_bts(tracer);
+}
+
+int ds_release_bts_noirq(struct bts_tracer *tracer)
+{
+        struct task_struct *task;
+        unsigned long irq;
+        int error;
+
+        if (!tracer)
+                return 0;
+
+        task = tracer->ds.context->task;
+
+        local_irq_save(irq);
+
+        error = -EPERM;
+        if (!task &&
+            (tracer->ds.context->cpu != smp_processor_id()))
+                goto out;
+
+        error = -EPERM;
+        if (task && (task != current))
+                goto out;
+
+        ds_suspend_bts_noirq(tracer);
+        ds_free_bts(tracer);
+
+        error = 0;
+ out:
+        local_irq_restore(irq);
+        return error;
+}
+
+static void update_task_debugctlmsr(struct task_struct *task,
+                                    unsigned long debugctlmsr)
+{
+        task->thread.debugctlmsr = debugctlmsr;
+
+        get_cpu();
+        if (task == current)
+                update_debugctlmsr(debugctlmsr);
+        put_cpu();
+}
+
 void ds_suspend_bts(struct bts_tracer *tracer)
 {
         struct task_struct *task;
+        unsigned long debugctlmsr;
+        int cpu;
 
         if (!tracer)
                 return;
 
+        tracer->flags = 0;
+
         task = tracer->ds.context->task;
+        cpu  = tracer->ds.context->cpu;
 
-        if (!task || (task == current))
-                update_debugctlmsr(get_debugctlmsr() & ~BTS_CONTROL);
+        WARN_ON(!task && irqs_disabled());
 
-        if (task) {
-                task->thread.debugctlmsr &= ~BTS_CONTROL;
+        debugctlmsr = (task ?
+                       task->thread.debugctlmsr :
+                       get_debugctlmsr_on_cpu(cpu));
+        debugctlmsr &= ~BTS_CONTROL;
 
-                if (!task->thread.debugctlmsr)
-                        clear_tsk_thread_flag(task, TIF_DEBUGCTLMSR);
-        }
+        if (task)
+                update_task_debugctlmsr(task, debugctlmsr);
+        else
+                update_debugctlmsr_on_cpu(cpu, debugctlmsr);
 }
 
-void ds_resume_bts(struct bts_tracer *tracer)
+int ds_suspend_bts_noirq(struct bts_tracer *tracer)
 {
         struct task_struct *task;
-        unsigned long control;
+        unsigned long debugctlmsr, irq;
+        int cpu, error = 0;
 
         if (!tracer)
-                return;
+                return 0;
+
+        tracer->flags = 0;
 
         task = tracer->ds.context->task;
+        cpu  = tracer->ds.context->cpu;
+
+        local_irq_save(irq);
+
+        error = -EPERM;
+        if (!task && (cpu != smp_processor_id()))
+                goto out;
+
+        debugctlmsr = (task ?
+                       task->thread.debugctlmsr :
+                       get_debugctlmsr());
+        debugctlmsr &= ~BTS_CONTROL;
+
+        if (task)
+                update_task_debugctlmsr(task, debugctlmsr);
+        else
+                update_debugctlmsr(debugctlmsr);
+
+        error = 0;
+ out:
+        local_irq_restore(irq);
+        return error;
+}
+
+static unsigned long ds_bts_control(struct bts_tracer *tracer)
+{
+        unsigned long control;
 
         control = ds_cfg.ctl[dsf_bts];
         if (!(tracer->trace.ds.flags & BTS_KERNEL))
@@ -797,41 +1015,149 @@ void ds_resume_bts(struct bts_tracer *tracer)
         if (!(tracer->trace.ds.flags & BTS_USER))
                 control |= ds_cfg.ctl[dsf_bts_user];
 
-        if (task) {
-                task->thread.debugctlmsr |= control;
-                set_tsk_thread_flag(task, TIF_DEBUGCTLMSR);
-        }
-
-        if (!task || (task == current))
-                update_debugctlmsr(get_debugctlmsr() | control);
+        return control;
 }
 
-void ds_release_pebs(struct pebs_tracer *tracer)
+void ds_resume_bts(struct bts_tracer *tracer)
 {
+        struct task_struct *task;
+        unsigned long debugctlmsr;
+        int cpu;
+
         if (!tracer)
                 return;
 
-        ds_suspend_pebs(tracer);
+        tracer->flags = tracer->trace.ds.flags;
+
+        task = tracer->ds.context->task;
+        cpu  = tracer->ds.context->cpu;
+
+        WARN_ON(!task && irqs_disabled());
+
+        debugctlmsr = (task ?
+                       task->thread.debugctlmsr :
+                       get_debugctlmsr_on_cpu(cpu));
+        debugctlmsr |= ds_bts_control(tracer);
+
+        if (task)
+                update_task_debugctlmsr(task, debugctlmsr);
+        else
+                update_debugctlmsr_on_cpu(cpu, debugctlmsr);
+}
+
+int ds_resume_bts_noirq(struct bts_tracer *tracer)
+{
+        struct task_struct *task;
+        unsigned long debugctlmsr, irq;
+        int cpu, error = 0;
+
+        if (!tracer)
+                return 0;
+
+        tracer->flags = tracer->trace.ds.flags;
+
+        task = tracer->ds.context->task;
+        cpu  = tracer->ds.context->cpu;
+
+        local_irq_save(irq);
+
+        error = -EPERM;
+        if (!task && (cpu != smp_processor_id()))
+                goto out;
+
+        debugctlmsr = (task ?
+                       task->thread.debugctlmsr :
+                       get_debugctlmsr());
+        debugctlmsr |= ds_bts_control(tracer);
+
+        if (task)
+                update_task_debugctlmsr(task, debugctlmsr);
+        else
+                update_debugctlmsr(debugctlmsr);
+
+        error = 0;
+ out:
+        local_irq_restore(irq);
+        return error;
+}
+
+static void ds_free_pebs(struct pebs_tracer *tracer)
+{
+        struct task_struct *task;
+
+        task = tracer->ds.context->task;
 
         WARN_ON_ONCE(tracer->ds.context->pebs_master != tracer);
         tracer->ds.context->pebs_master = NULL;
 
-        put_tracer(tracer->ds.context->task);
         ds_put_context(tracer->ds.context);
+        put_tracer(task);
 
         kfree(tracer);
 }
 
+void ds_release_pebs(struct pebs_tracer *tracer)
+{
+        might_sleep();
+
+        if (!tracer)
+                return;
+
+        ds_suspend_pebs(tracer);
+        ds_free_pebs(tracer);
+}
+
+int ds_release_pebs_noirq(struct pebs_tracer *tracer)
+{
+        struct task_struct *task;
+        unsigned long irq;
+        int error;
+
+        if (!tracer)
+                return 0;
+
+        task = tracer->ds.context->task;
+
+        local_irq_save(irq);
+
+        error = -EPERM;
+        if (!task &&
+            (tracer->ds.context->cpu != smp_processor_id()))
+                goto out;
+
+        error = -EPERM;
+        if (task && (task != current))
+                goto out;
+
+        ds_suspend_pebs_noirq(tracer);
+        ds_free_pebs(tracer);
+
+        error = 0;
+ out:
+        local_irq_restore(irq);
+        return error;
+}
+
 void ds_suspend_pebs(struct pebs_tracer *tracer)
 {
 
 }
 
+int ds_suspend_pebs_noirq(struct pebs_tracer *tracer)
+{
+        return 0;
+}
+
 void ds_resume_pebs(struct pebs_tracer *tracer)
 {
 
 }
 
+int ds_resume_pebs_noirq(struct pebs_tracer *tracer)
+{
+        return 0;
+}
+
 const struct bts_trace *ds_read_bts(struct bts_tracer *tracer)
 {
         if (!tracer)
@@ -847,8 +1173,12 @@ const struct pebs_trace *ds_read_pebs(struct pebs_tracer *tracer)
                 return NULL;
 
         ds_read_config(tracer->ds.context, &tracer->trace.ds, ds_pebs);
-        tracer->trace.reset_value =
-                *(u64 *)(tracer->ds.context->ds + (ds_cfg.sizeof_field * 8));
+
+        tracer->trace.counters = ds_cfg.nr_counter_reset;
+        memcpy(tracer->trace.counter_reset,
+               tracer->ds.context->ds +
+               (NUM_DS_PTR_FIELDS * ds_cfg.sizeof_ptr_field),
+               ds_cfg.nr_counter_reset * PEBS_RESET_FIELD_SIZE);
 
         return &tracer->trace;
 }
@@ -873,18 +1203,24 @@ int ds_reset_pebs(struct pebs_tracer *tracer)
 
         tracer->trace.ds.top = tracer->trace.ds.begin;
 
-        ds_set(tracer->ds.context->ds, ds_bts, ds_index,
+        ds_set(tracer->ds.context->ds, ds_pebs, ds_index,
                (unsigned long)tracer->trace.ds.top);
 
         return 0;
 }
 
-int ds_set_pebs_reset(struct pebs_tracer *tracer, u64 value)
+int ds_set_pebs_reset(struct pebs_tracer *tracer,
+                      unsigned int counter, u64 value)
 {
         if (!tracer)
                 return -EINVAL;
 
-        *(u64 *)(tracer->ds.context->ds + (ds_cfg.sizeof_field * 8)) = value;
+        if (ds_cfg.nr_counter_reset < counter)
+                return -EINVAL;
+
+        *(u64 *)(tracer->ds.context->ds +
+                 (NUM_DS_PTR_FIELDS * ds_cfg.sizeof_ptr_field) +
+                 (counter * PEBS_RESET_FIELD_SIZE)) = value;
 
         return 0;
 }
@@ -894,73 +1230,117 @@ static const struct ds_configuration ds_cfg_netburst = {
         .ctl[dsf_bts]           = (1 << 2) | (1 << 3),
         .ctl[dsf_bts_kernel]    = (1 << 5),
         .ctl[dsf_bts_user]      = (1 << 6),
-
-        .sizeof_field           = sizeof(long),
-        .sizeof_rec[ds_bts]     = sizeof(long) * 3,
-#ifdef __i386__
-        .sizeof_rec[ds_pebs]    = sizeof(long) * 10,
-#else
-        .sizeof_rec[ds_pebs]    = sizeof(long) * 18,
-#endif
+        .nr_counter_reset       = 1,
 };
 static const struct ds_configuration ds_cfg_pentium_m = {
         .name = "Pentium M",
         .ctl[dsf_bts]           = (1 << 6) | (1 << 7),
-
-        .sizeof_field           = sizeof(long),
-        .sizeof_rec[ds_bts]     = sizeof(long) * 3,
-#ifdef __i386__
-        .sizeof_rec[ds_pebs]    = sizeof(long) * 10,
-#else
-        .sizeof_rec[ds_pebs]    = sizeof(long) * 18,
-#endif
+        .nr_counter_reset       = 1,
 };
 static const struct ds_configuration ds_cfg_core2_atom = {
         .name = "Core 2/Atom",
         .ctl[dsf_bts]           = (1 << 6) | (1 << 7),
         .ctl[dsf_bts_kernel]    = (1 << 9),
         .ctl[dsf_bts_user]      = (1 << 10),
-
-        .sizeof_field           = 8,
-        .sizeof_rec[ds_bts]     = 8 * 3,
-        .sizeof_rec[ds_pebs]    = 8 * 18,
+        .nr_counter_reset       = 1,
+};
+static const struct ds_configuration ds_cfg_core_i7 = {
+        .name = "Core i7",
+        .ctl[dsf_bts]           = (1 << 6) | (1 << 7),
+        .ctl[dsf_bts_kernel]    = (1 << 9),
+        .ctl[dsf_bts_user]      = (1 << 10),
+        .nr_counter_reset       = 4,
 };
 
 static void
-ds_configure(const struct ds_configuration *cfg)
+ds_configure(const struct ds_configuration *cfg,
+             struct cpuinfo_x86 *cpu)
 {
+        unsigned long nr_pebs_fields = 0;
+
+        printk(KERN_INFO "[ds] using %s configuration\n", cfg->name);
+
+#ifdef __i386__
+        nr_pebs_fields = 10;
+#else
+        nr_pebs_fields = 18;
+#endif
+
+        /*
+         * Starting with version 2, architectural performance
+         * monitoring supports a format specifier.
+         */
+        if ((cpuid_eax(0xa) & 0xff) > 1) {
+                unsigned long perf_capabilities, format;
+
+                rdmsrl(MSR_IA32_PERF_CAPABILITIES, perf_capabilities);
+
+                format = (perf_capabilities >> 8) & 0xf;
+
+                switch (format) {
+                case 0:
+                        nr_pebs_fields = 18;
+                        break;
+                case 1:
+                        nr_pebs_fields = 22;
+                        break;
+                default:
+                        printk(KERN_INFO
+                               "[ds] unknown PEBS format: %lu\n", format);
+                        nr_pebs_fields = 0;
+                        break;
+                }
+        }
+
         memset(&ds_cfg, 0, sizeof(ds_cfg));
         ds_cfg = *cfg;
 
-        printk(KERN_INFO "[ds] using %s configuration\n", ds_cfg.name);
+        ds_cfg.sizeof_ptr_field =
+                (cpu_has(cpu, X86_FEATURE_DTES64) ? 8 : 4);
+
+        ds_cfg.sizeof_rec[ds_bts]  = ds_cfg.sizeof_ptr_field * 3;
+        ds_cfg.sizeof_rec[ds_pebs] = ds_cfg.sizeof_ptr_field * nr_pebs_fields;
 
-        if (!cpu_has_bts) {
-                ds_cfg.ctl[dsf_bts] = 0;
+        if (!cpu_has(cpu, X86_FEATURE_BTS)) {
+                ds_cfg.sizeof_rec[ds_bts] = 0;
                 printk(KERN_INFO "[ds] bts not available\n");
         }
-        if (!cpu_has_pebs)
+        if (!cpu_has(cpu, X86_FEATURE_PEBS)) {
+                ds_cfg.sizeof_rec[ds_pebs] = 0;
                 printk(KERN_INFO "[ds] pebs not available\n");
+        }
+
+        printk(KERN_INFO "[ds] sizes: address: %u bit, ",
+               8 * ds_cfg.sizeof_ptr_field);
+        printk("bts/pebs record: %u/%u bytes\n",
+               ds_cfg.sizeof_rec[ds_bts], ds_cfg.sizeof_rec[ds_pebs]);
 
-        WARN_ON_ONCE(MAX_SIZEOF_DS < (12 * ds_cfg.sizeof_field));
+        WARN_ON_ONCE(MAX_PEBS_COUNTERS < ds_cfg.nr_counter_reset);
 }
 
 void __cpuinit ds_init_intel(struct cpuinfo_x86 *c)
 {
+        /* Only configure the first cpu. Others are identical. */
+        if (ds_cfg.name)
+                return;
+
         switch (c->x86) {
         case 0x6:
                 switch (c->x86_model) {
                 case 0x9:
                 case 0xd: /* Pentium M */
-                        ds_configure(&ds_cfg_pentium_m);
+                        ds_configure(&ds_cfg_pentium_m, c);
                         break;
                 case 0xf:
                 case 0x17: /* Core2 */
                 case 0x1c: /* Atom */
-                        ds_configure(&ds_cfg_core2_atom);
+                        ds_configure(&ds_cfg_core2_atom, c);
+                        break;
+                case 0x1a: /* Core i7 */
+                        ds_configure(&ds_cfg_core_i7, c);
                         break;
-                case 0x1a: /* i7 */
                 default:
-                        /* sorry, don't know about them */
+                        /* Sorry, don't know about them. */
                         break;
                 }
                 break;
@@ -969,64 +1349,89 @@ void __cpuinit ds_init_intel(struct cpuinfo_x86 *c)
                 case 0x0:
                 case 0x1:
                 case 0x2: /* Netburst */
-                        ds_configure(&ds_cfg_netburst);
+                        ds_configure(&ds_cfg_netburst, c);
                         break;
                 default:
-                        /* sorry, don't know about them */
+                        /* Sorry, don't know about them. */
                         break;
                 }
                 break;
         default:
-                /* sorry, don't know about them */
+                /* Sorry, don't know about them. */
                 break;
         }
 }
 
+static inline void ds_take_timestamp(struct ds_context *context,
+                                     enum bts_qualifier qualifier,
+                                     struct task_struct *task)
+{
+        struct bts_tracer *tracer = context->bts_master;
+        struct bts_struct ts;
+
+        /* Prevent compilers from reading the tracer pointer twice. */
+        barrier();
+
+        if (!tracer || !(tracer->flags & BTS_TIMESTAMPS))
+                return;
+
+        memset(&ts, 0, sizeof(ts));
+        ts.qualifier            = qualifier;
+        ts.variant.event.clock  = trace_clock_global();
+        ts.variant.event.pid    = task->pid;
+
+        bts_write(tracer, &ts);
+}
+
 /*
  * Change the DS configuration from tracing prev to tracing next.
  */
 void ds_switch_to(struct task_struct *prev, struct task_struct *next)
 {
-        struct ds_context *prev_ctx = prev->thread.ds_ctx;
-        struct ds_context *next_ctx = next->thread.ds_ctx;
+        struct ds_context *prev_ctx     = prev->thread.ds_ctx;
+        struct ds_context *next_ctx     = next->thread.ds_ctx;
+        unsigned long debugctlmsr       = next->thread.debugctlmsr;
+
+        /* Make sure all data is read before we start. */
+        barrier();
 
         if (prev_ctx) {
                 update_debugctlmsr(0);
 
-                if (prev_ctx->bts_master &&
-                    (prev_ctx->bts_master->trace.ds.flags & BTS_TIMESTAMPS)) {
-                        struct bts_struct ts = {
-                                .qualifier = bts_task_departs,
-                                .variant.timestamp.jiffies = jiffies_64,
-                                .variant.timestamp.pid = prev->pid
-                        };
-                        bts_write(prev_ctx->bts_master, &ts);
-                }
+                ds_take_timestamp(prev_ctx, bts_task_departs, prev);
         }
 
         if (next_ctx) {
-                if (next_ctx->bts_master &&
-                    (next_ctx->bts_master->trace.ds.flags & BTS_TIMESTAMPS)) {
-                        struct bts_struct ts = {
-                                .qualifier = bts_task_arrives,
-                                .variant.timestamp.jiffies = jiffies_64,
-                                .variant.timestamp.pid = next->pid
-                        };
-                        bts_write(next_ctx->bts_master, &ts);
-                }
+                ds_take_timestamp(next_ctx, bts_task_arrives, next);
 
                 wrmsrl(MSR_IA32_DS_AREA, (unsigned long)next_ctx->ds);
         }
 
-        update_debugctlmsr(next->thread.debugctlmsr);
+        update_debugctlmsr(debugctlmsr);
 }
 
-void ds_copy_thread(struct task_struct *tsk, struct task_struct *father)
+static __init int ds_selftest(void)
 {
-        clear_tsk_thread_flag(tsk, TIF_DS_AREA_MSR);
-        tsk->thread.ds_ctx = NULL;
-}
+        if (ds_cfg.sizeof_rec[ds_bts]) {
+                int error;
 
-void ds_exit_thread(struct task_struct *tsk)
-{
+                error = ds_selftest_bts();
+                if (error) {
+                        WARN(1, "[ds] selftest failed. disabling bts.\n");
+                        ds_cfg.sizeof_rec[ds_bts] = 0;
+                }
+        }
+
+        if (ds_cfg.sizeof_rec[ds_pebs]) {
+                int error;
+
+                error = ds_selftest_pebs();
+                if (error) {
+                        WARN(1, "[ds] selftest failed. disabling pebs.\n");
+                        ds_cfg.sizeof_rec[ds_pebs] = 0;
+                }
+        }
+
+        return 0;
 }
+device_initcall(ds_selftest);
diff --git a/arch/x86/kernel/ds_selftest.c b/arch/x86/kernel/ds_selftest.c
new file mode 100644
index 000000000000..6bc7c199ab99
--- /dev/null
+++ b/arch/x86/kernel/ds_selftest.c
@@ -0,0 +1,408 @@
+/*
+ * Debug Store support - selftest
+ *
+ *
+ * Copyright (C) 2009 Intel Corporation.
+ * Markus Metzger <markus.t.metzger@intel.com>, 2009
+ */
+
+#include "ds_selftest.h"
+
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/smp.h>
+#include <linux/cpu.h>
+
+#include <asm/ds.h>
+
+
+#define BUFFER_SIZE             521     /* Intentionally chose an odd size. */
+#define SMALL_BUFFER_SIZE       24      /* A single bts entry. */
+
+struct ds_selftest_bts_conf {
+        struct bts_tracer *tracer;
+        int error;
+        int (*suspend)(struct bts_tracer *);
+        int (*resume)(struct bts_tracer *);
+};
+
+static int ds_selftest_bts_consistency(const struct bts_trace *trace)
+{
+        int error = 0;
+
+        if (!trace) {
+                printk(KERN_CONT "failed to access trace...");
+                /* Bail out. Other tests are pointless. */
+                return -1;
+        }
+
+        if (!trace->read) {
+                printk(KERN_CONT "bts read not available...");
+                error = -1;
+        }
+
+        /* Do some sanity checks on the trace configuration. */
+        if (!trace->ds.n) {
+                printk(KERN_CONT "empty bts buffer...");
+                error = -1;
+        }
+        if (!trace->ds.size) {
+                printk(KERN_CONT "bad bts trace setup...");
+                error = -1;
+        }
+        if (trace->ds.end !=
+            (char *)trace->ds.begin + (trace->ds.n * trace->ds.size)) {
+                printk(KERN_CONT "bad bts buffer setup...");
+                error = -1;
+        }
+        /*
+         * We allow top in [begin; end], since its not clear when the
+         * overflow adjustment happens: after the increment or before the
+         * write.
+         */
+        if ((trace->ds.top < trace->ds.begin) ||
+            (trace->ds.end < trace->ds.top)) {
+                printk(KERN_CONT "bts top out of bounds...");
+                error = -1;
+        }
+
+        return error;
+}
+
+static int ds_selftest_bts_read(struct bts_tracer *tracer,
+                                const struct bts_trace *trace,
+                                const void *from, const void *to)
+{
+        const unsigned char *at;
+
+        /*
+         * Check a few things which do not belong to this test.
+         * They should be covered by other tests.
+         */
+        if (!trace)
+                return -1;
+
+        if (!trace->read)
+                return -1;
+
+        if (to < from)
+                return -1;
+
+        if (from < trace->ds.begin)
+                return -1;
+
+        if (trace->ds.end < to)
+                return -1;
+
+        if (!trace->ds.size)
+                return -1;
+
+        /* Now to the test itself. */
+        for (at = from; (void *)at < to; at += trace->ds.size) {
+                struct bts_struct bts;
+                unsigned long index;
+                int error;
+
+                if (((void *)at - trace->ds.begin) % trace->ds.size) {
+                        printk(KERN_CONT
+                               "read from non-integer index...");
+                        return -1;
+                }
+                index = ((void *)at - trace->ds.begin) / trace->ds.size;
+
+                memset(&bts, 0, sizeof(bts));
+                error = trace->read(tracer, at, &bts);
+                if (error < 0) {
+                        printk(KERN_CONT
+                               "error reading bts trace at [%lu] (0x%p)...",
+                               index, at);
+                        return error;
+                }
+
+                switch (bts.qualifier) {
+                case BTS_BRANCH:
+                        break;
+                default:
+                        printk(KERN_CONT
+                               "unexpected bts entry %llu at [%lu] (0x%p)...",
+                               bts.qualifier, index, at);
+                        return -1;
+                }
+        }
+
+        return 0;
+}
+
+static void ds_selftest_bts_cpu(void *arg)
+{
+        struct ds_selftest_bts_conf *conf = arg;
+        const struct bts_trace *trace;
+        void *top;
+
+        if (IS_ERR(conf->tracer)) {
+                conf->error = PTR_ERR(conf->tracer);
+                conf->tracer = NULL;
+
+                printk(KERN_CONT
+                       "initialization failed (err: %d)...", conf->error);
+                return;
+        }
+
+        /* We should meanwhile have enough trace. */
+        conf->error = conf->suspend(conf->tracer);
+        if (conf->error < 0)
+                return;
+
+        /* Let's see if we can access the trace. */
+        trace = ds_read_bts(conf->tracer);
+
+        conf->error = ds_selftest_bts_consistency(trace);
+        if (conf->error < 0)
+                return;
+
+        /* If everything went well, we should have a few trace entries. */
+        if (trace->ds.top == trace->ds.begin) {
+                /*
+                 * It is possible but highly unlikely that we got a
+                 * buffer overflow and end up at exactly the same
+                 * position we started from.
+                 * Let's issue a warning, but continue.
+                 */
+                printk(KERN_CONT "no trace/overflow...");
+        }
+
+        /* Let's try to read the trace we collected. */
+        conf->error =
+                ds_selftest_bts_read(conf->tracer, trace,
+                                     trace->ds.begin, trace->ds.top);
+        if (conf->error < 0)
+                return;
+
+        /*
+         * Let's read the trace again.
+         * Since we suspended tracing, we should get the same result.
+         */
+        top = trace->ds.top;
+
+        trace = ds_read_bts(conf->tracer);
+        conf->error = ds_selftest_bts_consistency(trace);
+        if (conf->error < 0)
+                return;
+
+        if (top != trace->ds.top) {
+                printk(KERN_CONT "suspend not working...");
+                conf->error = -1;
+                return;
+        }
+
+        /* Let's collect some more trace - see if resume is working. */
+        conf->error = conf->resume(conf->tracer);
+        if (conf->error < 0)
+                return;
+
+        conf->error = conf->suspend(conf->tracer);
+        if (conf->error < 0)
+                return;
+
+        trace = ds_read_bts(conf->tracer);
+
+        conf->error = ds_selftest_bts_consistency(trace);
+        if (conf->error < 0)
+                return;
+
+        if (trace->ds.top == top) {
+                /*
+                 * It is possible but highly unlikely that we got a
+                 * buffer overflow and end up at exactly the same
+                 * position we started from.
+                 * Let's issue a warning and check the full trace.
+                 */
+                printk(KERN_CONT
+                       "no resume progress/overflow...");
+
+                conf->error =
+                        ds_selftest_bts_read(conf->tracer, trace,
+                                             trace->ds.begin, trace->ds.end);
+        } else if (trace->ds.top < top) {
+                /*
+                 * We had a buffer overflow - the entire buffer should
+                 * contain trace records.
+                 */
+                conf->error =
+                        ds_selftest_bts_read(conf->tracer, trace,
+                                             trace->ds.begin, trace->ds.end);
+        } else {
+                /*
+                 * It is quite likely that the buffer did not overflow.
+                 * Let's just check the delta trace.
+                 */
+                conf->error =
+                        ds_selftest_bts_read(conf->tracer, trace, top,
+                                             trace->ds.top);
+        }
+        if (conf->error < 0)
+                return;
+
+        conf->error = 0;
+}
+
+static int ds_suspend_bts_wrap(struct bts_tracer *tracer)
+{
+        ds_suspend_bts(tracer);
+        return 0;
+}
+
+static int ds_resume_bts_wrap(struct bts_tracer *tracer)
+{
+        ds_resume_bts(tracer);
+        return 0;
+}
+
+static void ds_release_bts_noirq_wrap(void *tracer)
+{
+        (void)ds_release_bts_noirq(tracer);
+}
+
+static int ds_selftest_bts_bad_release_noirq(int cpu,
+                                             struct bts_tracer *tracer)
+{
+        int error = -EPERM;
+
+        /* Try to release the tracer on the wrong cpu. */
+        get_cpu();
+        if (cpu != smp_processor_id()) {
+                error = ds_release_bts_noirq(tracer);
+                if (error != -EPERM)
+                        printk(KERN_CONT "release on wrong cpu...");
+        }
+        put_cpu();
+
+        return error ? 0 : -1;
+}
+
+static int ds_selftest_bts_bad_request_cpu(int cpu, void *buffer)
+{
+        struct bts_tracer *tracer;
+        int error;
+
+        /* Try to request cpu tracing while task tracing is active. */
+        tracer = ds_request_bts_cpu(cpu, buffer, BUFFER_SIZE, NULL,
+                                    (size_t)-1, BTS_KERNEL);
+        error = PTR_ERR(tracer);
+        if (!IS_ERR(tracer)) {
+                ds_release_bts(tracer);
+                error = 0;
+        }
+
+        if (error != -EPERM)
+                printk(KERN_CONT "cpu/task tracing overlap...");
+
+        return error ? 0 : -1;
+}
+
+static int ds_selftest_bts_bad_request_task(void *buffer)
+{
+        struct bts_tracer *tracer;
+        int error;
+
+        /* Try to request cpu tracing while task tracing is active. */
+        tracer = ds_request_bts_task(current, buffer, BUFFER_SIZE, NULL,
+                                    (size_t)-1, BTS_KERNEL);
+        error = PTR_ERR(tracer);
+        if (!IS_ERR(tracer)) {
+                error = 0;
+                ds_release_bts(tracer);
+        }
+
+        if (error != -EPERM)
+                printk(KERN_CONT "task/cpu tracing overlap...");
+
+        return error ? 0 : -1;
+}
+
+int ds_selftest_bts(void)
+{
+        struct ds_selftest_bts_conf conf;
+        unsigned char buffer[BUFFER_SIZE], *small_buffer;
+        unsigned long irq;
+        int cpu;
+
+        printk(KERN_INFO "[ds] bts selftest...");
+        conf.error = 0;
+
+        small_buffer = (unsigned char *)ALIGN((unsigned long)buffer, 8) + 8;
+
+        get_online_cpus();
+        for_each_online_cpu(cpu) {
+                conf.suspend = ds_suspend_bts_wrap;
+                conf.resume = ds_resume_bts_wrap;
+                conf.tracer =
+                        ds_request_bts_cpu(cpu, buffer, BUFFER_SIZE,
+                                           NULL, (size_t)-1, BTS_KERNEL);
+                ds_selftest_bts_cpu(&conf);
+                if (conf.error >= 0)
+                        conf.error = ds_selftest_bts_bad_request_task(buffer);
+                ds_release_bts(conf.tracer);
+                if (conf.error < 0)
+                        goto out;
+
+                conf.suspend = ds_suspend_bts_noirq;
+                conf.resume = ds_resume_bts_noirq;
+                conf.tracer =
+                        ds_request_bts_cpu(cpu, buffer, BUFFER_SIZE,
+                                           NULL, (size_t)-1, BTS_KERNEL);
+                smp_call_function_single(cpu, ds_selftest_bts_cpu, &conf, 1);
+                if (conf.error >= 0) {
+                        conf.error =
+                                ds_selftest_bts_bad_release_noirq(cpu,
+                                                                  conf.tracer);
+                        /* We must not release the tracer twice. */
+                        if (conf.error < 0)
+                                conf.tracer = NULL;
+                }
+                if (conf.error >= 0)
+                        conf.error = ds_selftest_bts_bad_request_task(buffer);
+                smp_call_function_single(cpu, ds_release_bts_noirq_wrap,
+                                         conf.tracer, 1);
+                if (conf.error < 0)
+                        goto out;
+        }
+
+        conf.suspend = ds_suspend_bts_wrap;
+        conf.resume = ds_resume_bts_wrap;
+        conf.tracer =
+                ds_request_bts_task(current, buffer, BUFFER_SIZE,
+                                    NULL, (size_t)-1, BTS_KERNEL);
+        ds_selftest_bts_cpu(&conf);
+        if (conf.error >= 0)
+                conf.error = ds_selftest_bts_bad_request_cpu(0, buffer);
+        ds_release_bts(conf.tracer);
+        if (conf.error < 0)
+                goto out;
+
+        conf.suspend = ds_suspend_bts_noirq;
+        conf.resume = ds_resume_bts_noirq;
+        conf.tracer =
+                ds_request_bts_task(current, small_buffer, SMALL_BUFFER_SIZE,
+                                   NULL, (size_t)-1, BTS_KERNEL);
+        local_irq_save(irq);
+        ds_selftest_bts_cpu(&conf);
+        if (conf.error >= 0)
+                conf.error = ds_selftest_bts_bad_request_cpu(0, buffer);
+        ds_release_bts_noirq(conf.tracer);
+        local_irq_restore(irq);
+        if (conf.error < 0)
+                goto out;
+
+        conf.error = 0;
+ out:
+        put_online_cpus();
+        printk(KERN_CONT "%s.\n", (conf.error ? "failed" : "passed"));
+
+        return conf.error;
+}
+
+int ds_selftest_pebs(void)
+{
+        return 0;
+}
diff --git a/arch/x86/kernel/ds_selftest.h b/arch/x86/kernel/ds_selftest.h
new file mode 100644
index 000000000000..2ba8745c6663
--- /dev/null
+++ b/arch/x86/kernel/ds_selftest.h
@@ -0,0 +1,15 @@
+/*
+ * Debug Store support - selftest
+ *
+ *
+ * Copyright (C) 2009 Intel Corporation.
+ * Markus Metzger <markus.t.metzger@intel.com>, 2009
+ */
+
+#ifdef CONFIG_X86_DS_SELFTEST
+extern int ds_selftest_bts(void);
+extern int ds_selftest_pebs(void);
+#else
+static inline int ds_selftest_bts(void) { return 0; }
+static inline int ds_selftest_pebs(void) { return 0; }
+#endif
diff --git a/arch/x86/kernel/dumpstack.h b/arch/x86/kernel/dumpstack.h
index da87590b8698..81086c227ab7 100644
--- a/arch/x86/kernel/dumpstack.h
+++ b/arch/x86/kernel/dumpstack.h
@@ -29,7 +29,6 @@ show_stack_log_lvl(struct task_struct *task, struct pt_regs *regs,
                 unsigned long *sp, unsigned long bp, char *log_lvl);
 
 extern unsigned int code_bytes;
-extern int kstack_depth_to_print;
 
 /* The form of the top of the frame on the stack */
 struct stack_frame {
diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c
index 006281302925..7271fa33d791 100644
--- a/arch/x86/kernel/e820.c
+++ b/arch/x86/kernel/e820.c
@@ -617,7 +617,7 @@ __init int e820_search_gap(unsigned long *gapstart, unsigned long *gapsize,
  */
 __init void e820_setup_gap(void)
 {
-        unsigned long gapstart, gapsize, round;
+        unsigned long gapstart, gapsize;
         int found;
 
         gapstart = 0x10000000;
@@ -635,14 +635,9 @@ __init void e820_setup_gap(void)
 #endif
 
         /*
-         * See how much we want to round up: start off with
-         * rounding to the next 1MB area.
+         * e820_reserve_resources_late protect stolen RAM already
          */
-        round = 0x100000;
-        while ((gapsize >> 4) > round)
-                round += round;
-        /* Fun with two's complement */
-        pci_mem_start = (gapstart + round) & -round;
+        pci_mem_start = gapstart;
 
         printk(KERN_INFO
                "Allocating PCI resources starting at %lx (gap: %lx:%lx)\n",
@@ -1371,6 +1366,23 @@ void __init e820_reserve_resources(void)
         }
 }
 
+/* How much should we pad RAM ending depending on where it is? */
+static unsigned long ram_alignment(resource_size_t pos)
+{
+        unsigned long mb = pos >> 20;
+
+        /* To 64kB in the first megabyte */
+        if (!mb)
+                return 64*1024;
+
+        /* To 1MB in the first 16MB */
+        if (mb < 16)
+                return 1024*1024;
+
+        /* To 32MB for anything above that */
+        return 32*1024*1024;
+}
+
 void __init e820_reserve_resources_late(void)
 {
         int i;
@@ -1382,6 +1394,24 @@ void __init e820_reserve_resources_late(void)
                         insert_resource_expand_to_fit(&iomem_resource, res);
                 res++;
         }
+
+        /*
+         * Try to bump up RAM regions to reasonable boundaries to
+         * avoid stolen RAM:
+         */
+        for (i = 0; i < e820.nr_map; i++) {
+                struct e820entry *entry = &e820_saved.map[i];
+                resource_size_t start, end;
+
+                if (entry->type != E820_RAM)
+                        continue;
+                start = entry->addr + entry->size;
+                end = round_up(start, ram_alignment(start));
+                if (start == end)
+                        continue;
+                reserve_region_with_split(&iomem_resource, start,
+                                                  end - 1, "RAM buffer");
+        }
 }
 
 char *__init default_machine_specific_memory_setup(void)
diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
index 76b8cd953dee..ebdb85cf2686 100644
--- a/arch/x86/kernel/early-quirks.c
+++ b/arch/x86/kernel/early-quirks.c
@@ -97,6 +97,7 @@ static void __init nvidia_bugs(int num, int slot, int func)
 }
 
 #if defined(CONFIG_ACPI) && defined(CONFIG_X86_IO_APIC)
+#if defined(CONFIG_ACPI) && defined(CONFIG_X86_IO_APIC)
 static u32 __init ati_ixp4x0_rev(int num, int slot, int func)
 {
         u32 d;
@@ -114,6 +115,7 @@ static u32 __init ati_ixp4x0_rev(int num, int slot, int func)
         d &= 0xff;
         return d;
 }
+#endif
 
 static void __init ati_bugs(int num, int slot, int func)
 {
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S
index 4234b1235652..de74f0a3e0ed 100644
--- a/arch/x86/kernel/entry_64.S
+++ b/arch/x86/kernel/entry_64.S
@@ -147,27 +147,14 @@ END(ftrace_graph_caller)
 GLOBAL(return_to_handler)
         subq  $80, %rsp
 
+        /* Save the return values */
         movq %rax, (%rsp)
-        movq %rcx, 8(%rsp)
-        movq %rdx, 16(%rsp)
-        movq %rsi, 24(%rsp)
-        movq %rdi, 32(%rsp)
-        movq %r8, 40(%rsp)
-        movq %r9, 48(%rsp)
-        movq %r10, 56(%rsp)
-        movq %r11, 64(%rsp)
+        movq %rdx, 8(%rsp)
 
         call ftrace_return_to_handler
 
         movq %rax, 72(%rsp)
-        movq 64(%rsp), %r11
-        movq 56(%rsp), %r10
-        movq 48(%rsp), %r9
-        movq 40(%rsp), %r8
-        movq 32(%rsp), %rdi
-        movq 24(%rsp), %rsi
-        movq 16(%rsp), %rdx
-        movq 8(%rsp), %rcx
+        movq 8(%rsp), %rdx
         movq (%rsp), %rax
         addq $72, %rsp
         retq
@@ -1032,6 +1019,11 @@ apicinterrupt ERROR_APIC_VECTOR \
 apicinterrupt SPURIOUS_APIC_VECTOR \
         spurious_interrupt smp_spurious_interrupt
 
+#ifdef CONFIG_PERF_COUNTERS
+apicinterrupt LOCAL_PENDING_VECTOR \
+        perf_pending_interrupt smp_perf_pending_interrupt
+#endif
+
 /*
  * Exception entry points.
  */
@@ -1386,6 +1378,11 @@ END(xen_failsafe_callback)
 paranoidzeroentry_ist debug do_debug DEBUG_STACK
 paranoidzeroentry_ist int3 do_int3 DEBUG_STACK
 paranoiderrorentry stack_segment do_stack_segment
+#ifdef CONFIG_XEN
+zeroentry xen_debug do_debug
+zeroentry xen_int3 do_int3
+errorentry xen_stack_segment do_stack_segment
+#endif
 errorentry general_protection do_general_protection
 errorentry page_fault do_page_fault
 #ifdef CONFIG_X86_MCE
diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
index 30683883e0cd..dc5ed4bdd88d 100644
--- a/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@ -608,13 +608,6 @@ ignore_int:
 ENTRY(initial_code)
         .long i386_start_kernel
 
-.section .text
-/*
- * Real beginning of normal "text" segment
- */
-ENTRY(stext)
-ENTRY(_stext)
-
 /*
  * BSS section
  */
diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c
index 9773395aa758..b0cdde6932f5 100644
--- a/arch/x86/kernel/irq.c
+++ b/arch/x86/kernel/irq.c
@@ -13,6 +13,7 @@
 #include <asm/irq.h>
 #include <asm/idle.h>
 #include <asm/mce.h>
+#include <asm/hw_irq.h>
 
 atomic_t irq_err_count;
 
@@ -62,6 +63,14 @@ static int show_other_interrupts(struct seq_file *p, int prec)
         for_each_online_cpu(j)
                 seq_printf(p, "%10u ", irq_stats(j)->irq_spurious_count);
         seq_printf(p, "  Spurious interrupts\n");
+        seq_printf(p, "%*s: ", prec, "CNT");
+        for_each_online_cpu(j)
+                seq_printf(p, "%10u ", irq_stats(j)->apic_perf_irqs);
+        seq_printf(p, "  Performance counter interrupts\n");
+        seq_printf(p, "%*s: ", prec, "PND");
+        for_each_online_cpu(j)
+                seq_printf(p, "%10u ", irq_stats(j)->apic_pending_irqs);
+        seq_printf(p, "  Performance pending work\n");
 #endif
         if (generic_interrupt_extension) {
                 seq_printf(p, "%*s: ", prec, "PLT");
@@ -175,6 +184,8 @@ u64 arch_irq_stat_cpu(unsigned int cpu)
 #ifdef CONFIG_X86_LOCAL_APIC
         sum += irq_stats(cpu)->apic_timer_irqs;
         sum += irq_stats(cpu)->irq_spurious_count;
+        sum += irq_stats(cpu)->apic_perf_irqs;
+        sum += irq_stats(cpu)->apic_pending_irqs;
 #endif
         if (generic_interrupt_extension)
                 sum += irq_stats(cpu)->generic_irqs;
diff --git a/arch/x86/kernel/irqinit.c b/arch/x86/kernel/irqinit.c
index 4a69ec55be3d..696f0e475c2d 100644
--- a/arch/x86/kernel/irqinit.c
+++ b/arch/x86/kernel/irqinit.c
@@ -207,7 +207,6 @@ static void __init apic_intr_init(void)
 
         /* Performance monitoring interrupts: */
 # ifdef CONFIG_PERF_COUNTERS
-        alloc_intr_gate(LOCAL_PERF_VECTOR, perf_counter_interrupt);
         alloc_intr_gate(LOCAL_PENDING_VECTOR, perf_pending_interrupt);
 # endif
 
diff --git a/arch/x86/kernel/kgdb.c b/arch/x86/kernel/kgdb.c
index b1f4dffb919e..8d82a77a3f3b 100644
--- a/arch/x86/kernel/kgdb.c
+++ b/arch/x86/kernel/kgdb.c
@@ -142,7 +142,7 @@ void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p)
         gdb_regs32[GDB_PS]      = *(unsigned long *)(p->thread.sp + 8);
         gdb_regs32[GDB_CS]      = __KERNEL_CS;
         gdb_regs32[GDB_SS]      = __KERNEL_DS;
-        gdb_regs[GDB_PC]        = p->thread.ip;
+        gdb_regs[GDB_PC]        = 0;
         gdb_regs[GDB_R8]        = 0;
         gdb_regs[GDB_R9]        = 0;
         gdb_regs[GDB_R10]       = 0;
diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c
index 33019ddb56b4..a78ecad0c900 100644
--- a/arch/x86/kernel/kvm.c
+++ b/arch/x86/kernel/kvm.c
@@ -27,6 +27,7 @@
 #include <linux/mm.h>
 #include <linux/highmem.h>
 #include <linux/hardirq.h>
+#include <asm/timer.h>
 
 #define MMU_QUEUE_SIZE 1024
 
@@ -195,7 +196,7 @@ static void kvm_leave_lazy_mmu(void)
         struct kvm_para_state *state = kvm_para_state();
 
         mmu_queue_flush(state);
-        paravirt_leave_lazy(paravirt_get_lazy_mode());
+        paravirt_leave_lazy_mmu();
         state->mode = paravirt_get_lazy_mode();
 }
 
@@ -230,6 +231,9 @@ static void paravirt_ops_setup(void)
                 pv_mmu_ops.lazy_mode.enter = kvm_enter_lazy_mmu;
                 pv_mmu_ops.lazy_mode.leave = kvm_leave_lazy_mmu;
         }
+#ifdef CONFIG_X86_IO_APIC
+        no_timer_check = 1;
+#endif
 }
 
 void __init kvm_guest_init(void)
diff --git a/arch/x86/kernel/microcode_amd.c b/arch/x86/kernel/microcode_amd.c
index 453b5795a5c6..366baa179913 100644
--- a/arch/x86/kernel/microcode_amd.c
+++ b/arch/x86/kernel/microcode_amd.c
@@ -13,25 +13,13 @@
  *  Licensed under the terms of the GNU General Public
  *  License version 2. See file COPYING for details.
  */
-#include <linux/platform_device.h>
-#include <linux/capability.h>
-#include <linux/miscdevice.h>
 #include <linux/firmware.h>
-#include <linux/spinlock.h>
-#include <linux/cpumask.h>
 #include <linux/pci_ids.h>
 #include <linux/uaccess.h>
 #include <linux/vmalloc.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
-#include <linux/mutex.h>
-#include <linux/sched.h>
-#include <linux/init.h>
-#include <linux/slab.h>
-#include <linux/cpu.h>
 #include <linux/pci.h>
-#include <linux/fs.h>
-#include <linux/mm.h>
 
 #include <asm/microcode.h>
 #include <asm/processor.h>
@@ -79,9 +67,6 @@ struct microcode_amd {
 #define UCODE_CONTAINER_SECTION_HDR     8
 #define UCODE_CONTAINER_HEADER_SIZE     12
 
-/* serialize access to the physical write */
-static DEFINE_SPINLOCK(microcode_update_lock);
-
 static struct equiv_cpu_entry *equiv_cpu_table;
 
 static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
@@ -144,9 +129,8 @@ static int get_matching_microcode(int cpu, void *mc, int rev)
         return 1;
 }
 
-static void apply_microcode_amd(int cpu)
+static int apply_microcode_amd(int cpu)
 {
-        unsigned long flags;
         u32 rev, dummy;
         int cpu_num = raw_smp_processor_id();
         struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
@@ -156,25 +140,25 @@ static void apply_microcode_amd(int cpu)
         BUG_ON(cpu_num != cpu);
 
         if (mc_amd == NULL)
-                return;
+                return 0;
 
-        spin_lock_irqsave(&microcode_update_lock, flags);
         wrmsrl(MSR_AMD64_PATCH_LOADER, (u64)(long)&mc_amd->hdr.data_code);
         /* get patch id after patching */
         rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
-        spin_unlock_irqrestore(&microcode_update_lock, flags);
 
         /* check current patch id and patch's id for match */
         if (rev != mc_amd->hdr.patch_id) {
                 printk(KERN_ERR "microcode: CPU%d: update failed "
                        "(for patch_level=0x%x)\n", cpu, mc_amd->hdr.patch_id);
-                return;
+                return -1;
         }
 
         printk(KERN_INFO "microcode: CPU%d: updated (new patch_level=0x%x)\n",
                cpu, rev);
 
         uci->cpu_sig.rev = rev;
+
+        return 0;
 }
 
 static int get_ucode_data(void *to, const u8 *from, size_t n)
@@ -257,13 +241,12 @@ static int install_equiv_cpu_table(const u8 *buf)
 
 static void free_equiv_cpu_table(void)
 {
-        if (equiv_cpu_table) {
-                vfree(equiv_cpu_table);
-                equiv_cpu_table = NULL;
-        }
+        vfree(equiv_cpu_table);
+        equiv_cpu_table = NULL;
 }
 
-static int generic_load_microcode(int cpu, const u8 *data, size_t size)
+static enum ucode_state
+generic_load_microcode(int cpu, const u8 *data, size_t size)
 {
         struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
         const u8 *ucode_ptr = data;
@@ -272,12 +255,13 @@ static int generic_load_microcode(int cpu, const u8 *data, size_t size)
         int new_rev = uci->cpu_sig.rev;
         unsigned int leftover;
         unsigned long offset;
+        enum ucode_state state = UCODE_OK;
 
         offset = install_equiv_cpu_table(ucode_ptr);
         if (!offset) {
                 printk(KERN_ERR "microcode: failed to create "
                        "equivalent cpu table\n");
-                return -EINVAL;
+                return UCODE_ERROR;
         }
 
         ucode_ptr += offset;
@@ -293,8 +277,7 @@ static int generic_load_microcode(int cpu, const u8 *data, size_t size)
 
                 mc_header = (struct microcode_header_amd *)mc;
                 if (get_matching_microcode(cpu, mc, new_rev)) {
-                        if (new_mc)
-                                vfree(new_mc);
+                        vfree(new_mc);
                         new_rev = mc_header->patch_id;
                         new_mc  = mc;
                 } else
@@ -306,34 +289,32 @@ static int generic_load_microcode(int cpu, const u8 *data, size_t size)
 
         if (new_mc) {
                 if (!leftover) {
-                        if (uci->mc)
-                                vfree(uci->mc);
+                        vfree(uci->mc);
                         uci->mc = new_mc;
                         pr_debug("microcode: CPU%d found a matching microcode "
                                  "update with version 0x%x (current=0x%x)\n",
                                  cpu, new_rev, uci->cpu_sig.rev);
-                } else
+                } else {
                         vfree(new_mc);
-        }
+                        state = UCODE_ERROR;
+                }
+        } else
+                state = UCODE_NFOUND;
 
         free_equiv_cpu_table();
 
-        return (int)leftover;
+        return state;
 }
 
-static int request_microcode_fw(int cpu, struct device *device)
+static enum ucode_state request_microcode_fw(int cpu, struct device *device)
 {
         const char *fw_name = "amd-ucode/microcode_amd.bin";
         const struct firmware *firmware;
-        int ret;
-
-        /* We should bind the task to the CPU */
-        BUG_ON(cpu != raw_smp_processor_id());
+        enum ucode_state ret;
 
-        ret = request_firmware(&firmware, fw_name, device);
-        if (ret) {
+        if (request_firmware(&firmware, fw_name, device)) {
                 printk(KERN_ERR "microcode: failed to load file %s\n", fw_name);
-                return ret;
+                return UCODE_NFOUND;
         }
 
         ret = generic_load_microcode(cpu, firmware->data, firmware->size);
@@ -343,11 +324,12 @@ static int request_microcode_fw(int cpu, struct device *device)
         return ret;
 }
 
-static int request_microcode_user(int cpu, const void __user *buf, size_t size)
+static enum ucode_state
+request_microcode_user(int cpu, const void __user *buf, size_t size)
 {
         printk(KERN_INFO "microcode: AMD microcode update via "
                "/dev/cpu/microcode not supported\n");
-        return -1;
+        return UCODE_ERROR;
 }
 
 static void microcode_fini_cpu_amd(int cpu)
diff --git a/arch/x86/kernel/microcode_core.c b/arch/x86/kernel/microcode_core.c
index 98c470c069d1..9c4461501fcb 100644
--- a/arch/x86/kernel/microcode_core.c
+++ b/arch/x86/kernel/microcode_core.c
@@ -71,27 +71,18 @@
  *              Thanks to Stuart Swales for pointing out this bug.
  */
 #include <linux/platform_device.h>
-#include <linux/capability.h>
 #include <linux/miscdevice.h>
-#include <linux/firmware.h>
+#include <linux/capability.h>
 #include <linux/smp_lock.h>
-#include <linux/spinlock.h>
-#include <linux/cpumask.h>
-#include <linux/uaccess.h>
-#include <linux/vmalloc.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/mutex.h>
-#include <linux/sched.h>
-#include <linux/init.h>
-#include <linux/slab.h>
 #include <linux/cpu.h>
 #include <linux/fs.h>
 #include <linux/mm.h>
 
 #include <asm/microcode.h>
 #include <asm/processor.h>
-#include <asm/msr.h>
 
 MODULE_DESCRIPTION("Microcode Update Driver");
 MODULE_AUTHOR("Tigran Aivazian <tigran@aivazian.fsnet.co.uk>");
@@ -101,36 +92,110 @@ MODULE_LICENSE("GPL");
 
 static struct microcode_ops     *microcode_ops;
 
-/* no concurrent ->write()s are allowed on /dev/cpu/microcode */
+/*
+ * Synchronization.
+ *
+ * All non cpu-hotplug-callback call sites use:
+ *
+ * - microcode_mutex to synchronize with each other;
+ * - get/put_online_cpus() to synchronize with
+ *   the cpu-hotplug-callback call sites.
+ *
+ * We guarantee that only a single cpu is being
+ * updated at any particular moment of time.
+ */
 static DEFINE_MUTEX(microcode_mutex);
 
 struct ucode_cpu_info           ucode_cpu_info[NR_CPUS];
 EXPORT_SYMBOL_GPL(ucode_cpu_info);
 
+/*
+ * Operations that are run on a target cpu:
+ */
+
+struct cpu_info_ctx {
+        struct cpu_signature    *cpu_sig;
+        int                     err;
+};
+
+static void collect_cpu_info_local(void *arg)
+{
+        struct cpu_info_ctx *ctx = arg;
+
+        ctx->err = microcode_ops->collect_cpu_info(smp_processor_id(),
+                                                   ctx->cpu_sig);
+}
+
+static int collect_cpu_info_on_target(int cpu, struct cpu_signature *cpu_sig)
+{
+        struct cpu_info_ctx ctx = { .cpu_sig = cpu_sig, .err = 0 };
+        int ret;
+
+        ret = smp_call_function_single(cpu, collect_cpu_info_local, &ctx, 1);
+        if (!ret)
+                ret = ctx.err;
+
+        return ret;
+}
+
+static int collect_cpu_info(int cpu)
+{
+        struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
+        int ret;
+
+        memset(uci, 0, sizeof(*uci));
+
+        ret = collect_cpu_info_on_target(cpu, &uci->cpu_sig);
+        if (!ret)
+                uci->valid = 1;
+
+        return ret;
+}
+
+struct apply_microcode_ctx {
+        int err;
+};
+
+static void apply_microcode_local(void *arg)
+{
+        struct apply_microcode_ctx *ctx = arg;
+
+        ctx->err = microcode_ops->apply_microcode(smp_processor_id());
+}
+
+static int apply_microcode_on_target(int cpu)
+{
+        struct apply_microcode_ctx ctx = { .err = 0 };
+        int ret;
+
+        ret = smp_call_function_single(cpu, apply_microcode_local, &ctx, 1);
+        if (!ret)
+                ret = ctx.err;
+
+        return ret;
+}
+
 #ifdef CONFIG_MICROCODE_OLD_INTERFACE
 static int do_microcode_update(const void __user *buf, size_t size)
 {
-        cpumask_t old;
         int error = 0;
         int cpu;
 
-        old = current->cpus_allowed;
-
         for_each_online_cpu(cpu) {
                 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
+                enum ucode_state ustate;
 
                 if (!uci->valid)
                         continue;
 
-                set_cpus_allowed_ptr(current, &cpumask_of_cpu(cpu));
-                error = microcode_ops->request_microcode_user(cpu, buf, size);
-                if (error < 0)
-                        goto out;
-                if (!error)
-                        microcode_ops->apply_microcode(cpu);
+                ustate = microcode_ops->request_microcode_user(cpu, buf, size);
+                if (ustate == UCODE_ERROR) {
+                        error = -1;
+                        break;
+                } else if (ustate == UCODE_OK)
+                        apply_microcode_on_target(cpu);
         }
-out:
-        set_cpus_allowed_ptr(current, &old);
+
         return error;
 }
 
@@ -143,19 +208,17 @@ static int microcode_open(struct inode *unused1, struct file *unused2)
 static ssize_t microcode_write(struct file *file, const char __user *buf,
                                size_t len, loff_t *ppos)
 {
-        ssize_t ret;
+        ssize_t ret = -EINVAL;
 
         if ((len >> PAGE_SHIFT) > num_physpages) {
-                printk(KERN_ERR "microcode: too much data (max %ld pages)\n",
-                       num_physpages);
-                return -EINVAL;
+                pr_err("microcode: too much data (max %ld pages)\n", num_physpages);
+                return ret;
         }
 
         get_online_cpus();
         mutex_lock(&microcode_mutex);
 
-        ret = do_microcode_update(buf, len);
-        if (!ret)
+        if (do_microcode_update(buf, len) == 0)
                 ret = (ssize_t)len;
 
         mutex_unlock(&microcode_mutex);
@@ -165,15 +228,15 @@ static ssize_t microcode_write(struct file *file, const char __user *buf,
 }
 
 static const struct file_operations microcode_fops = {
-        .owner          = THIS_MODULE,
-        .write          = microcode_write,
-        .open           = microcode_open,
+        .owner                  = THIS_MODULE,
+        .write                  = microcode_write,
+        .open                   = microcode_open,
 };
 
 static struct miscdevice microcode_dev = {
-        .minor          = MICROCODE_MINOR,
-        .name           = "microcode",
-        .fops           = &microcode_fops,
+        .minor                  = MICROCODE_MINOR,
+        .name                   = "microcode",
+        .fops                   = &microcode_fops,
 };
 
 static int __init microcode_dev_init(void)
@@ -182,9 +245,7 @@ static int __init microcode_dev_init(void)
 
         error = misc_register(&microcode_dev);
         if (error) {
-                printk(KERN_ERR
-                        "microcode: can't misc_register on minor=%d\n",
-                        MICROCODE_MINOR);
+                pr_err("microcode: can't misc_register on minor=%d\n", MICROCODE_MINOR);
                 return error;
         }
 
@@ -205,42 +266,51 @@ MODULE_ALIAS_MISCDEV(MICROCODE_MINOR);
 /* fake device for request_firmware */
 static struct platform_device   *microcode_pdev;
 
-static long reload_for_cpu(void *unused)
+static int reload_for_cpu(int cpu)
 {
-        struct ucode_cpu_info *uci = ucode_cpu_info + smp_processor_id();
+        struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
         int err = 0;
 
         mutex_lock(&microcode_mutex);
         if (uci->valid) {
-                err = microcode_ops->request_microcode_fw(smp_processor_id(),
-                                                          &microcode_pdev->dev);
-                if (!err)
-                        microcode_ops->apply_microcode(smp_processor_id());
+                enum ucode_state ustate;
+
+                ustate = microcode_ops->request_microcode_fw(cpu, &microcode_pdev->dev);
+                if (ustate == UCODE_OK)
+                        apply_microcode_on_target(cpu);
+                else
+                        if (ustate == UCODE_ERROR)
+                                err = -EINVAL;
         }
         mutex_unlock(&microcode_mutex);
+
         return err;
 }
 
 static ssize_t reload_store(struct sys_device *dev,
                             struct sysdev_attribute *attr,
-                            const char *buf, size_t sz)
+                            const char *buf, size_t size)
 {
-        char *end;
-        unsigned long val = simple_strtoul(buf, &end, 0);
-        int err = 0;
+        unsigned long val;
         int cpu = dev->id;
+        int ret = 0;
+        char *end;
 
+        val = simple_strtoul(buf, &end, 0);
         if (end == buf)
                 return -EINVAL;
+
         if (val == 1) {
                 get_online_cpus();
                 if (cpu_online(cpu))
-                        err = work_on_cpu(cpu, reload_for_cpu, NULL);
+                        ret = reload_for_cpu(cpu);
                 put_online_cpus();
         }
-        if (err)
-                return err;
-        return sz;
+
+        if (!ret)
+                ret = size;
+
+        return ret;
 }
 
 static ssize_t version_show(struct sys_device *dev,
@@ -271,11 +341,11 @@ static struct attribute *mc_default_attrs[] = {
 };
 
 static struct attribute_group mc_attr_group = {
-        .attrs          = mc_default_attrs,
-        .name           = "microcode",
+        .attrs                  = mc_default_attrs,
+        .name                   = "microcode",
 };
 
-static void __microcode_fini_cpu(int cpu)
+static void microcode_fini_cpu(int cpu)
 {
         struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
 
@@ -283,103 +353,68 @@ static void __microcode_fini_cpu(int cpu)
         uci->valid = 0;
 }
 
-static void microcode_fini_cpu(int cpu)
-{
-        mutex_lock(&microcode_mutex);
-        __microcode_fini_cpu(cpu);
-        mutex_unlock(&microcode_mutex);
-}
-
-static void collect_cpu_info(int cpu)
+static enum ucode_state microcode_resume_cpu(int cpu)
 {
         struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
 
-        memset(uci, 0, sizeof(*uci));
-        if (!microcode_ops->collect_cpu_info(cpu, &uci->cpu_sig))
-                uci->valid = 1;
+        if (!uci->mc)
+                return UCODE_NFOUND;
+
+        pr_debug("microcode: CPU%d updated upon resume\n", cpu);
+        apply_microcode_on_target(cpu);
+
+        return UCODE_OK;
 }
 
-static int microcode_resume_cpu(int cpu)
+static enum ucode_state microcode_init_cpu(int cpu)
 {
-        struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
-        struct cpu_signature nsig;
+        enum ucode_state ustate;
 
-        pr_debug("microcode: CPU%d resumed\n", cpu);
+        if (collect_cpu_info(cpu))
+                return UCODE_ERROR;
 
-        if (!uci->mc)
-                return 1;
+        /* --dimm. Trigger a delayed update? */
+        if (system_state != SYSTEM_RUNNING)
+                return UCODE_NFOUND;
 
-        /*
-         * Let's verify that the 'cached' ucode does belong
-         * to this cpu (a bit of paranoia):
-         */
-        if (microcode_ops->collect_cpu_info(cpu, &nsig)) {
-                __microcode_fini_cpu(cpu);
-                printk(KERN_ERR "failed to collect_cpu_info for resuming cpu #%d\n",
-                                cpu);
-                return -1;
-        }
+        ustate = microcode_ops->request_microcode_fw(cpu, &microcode_pdev->dev);
 
-        if ((nsig.sig != uci->cpu_sig.sig) || (nsig.pf != uci->cpu_sig.pf)) {
-                __microcode_fini_cpu(cpu);
-                printk(KERN_ERR "cached ucode doesn't match the resuming cpu #%d\n",
-                                cpu);
-                /* Should we look for a new ucode here? */
-                return 1;
+        if (ustate == UCODE_OK) {
+                pr_debug("microcode: CPU%d updated upon init\n", cpu);
+                apply_microcode_on_target(cpu);
         }
 
-        return 0;
+        return ustate;
 }
 
-static long microcode_update_cpu(void *unused)
+static enum ucode_state microcode_update_cpu(int cpu)
 {
-        struct ucode_cpu_info *uci = ucode_cpu_info + smp_processor_id();
-        int err = 0;
+        struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
+        enum ucode_state ustate;
 
-        /*
-         * Check if the system resume is in progress (uci->valid != NULL),
-         * otherwise just request a firmware:
-         */
-        if (uci->valid) {
-                err = microcode_resume_cpu(smp_processor_id());
-        } else {
-                collect_cpu_info(smp_processor_id());
-                if (uci->valid && system_state == SYSTEM_RUNNING)
-                        err = microcode_ops->request_microcode_fw(
-                                        smp_processor_id(),
-                                        &microcode_pdev->dev);
-        }
-        if (!err)
-                microcode_ops->apply_microcode(smp_processor_id());
-        return err;
-}
+        if (uci->valid)
+                ustate = microcode_resume_cpu(cpu);
+        else
+                ustate = microcode_init_cpu(cpu);
 
-static int microcode_init_cpu(int cpu)
-{
-        int err;
-        mutex_lock(&microcode_mutex);
-        err = work_on_cpu(cpu, microcode_update_cpu, NULL);
-        mutex_unlock(&microcode_mutex);
-
-        return err;
+        return ustate;
 }
 
 static int mc_sysdev_add(struct sys_device *sys_dev)
 {
         int err, cpu = sys_dev->id;
-        struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
 
         if (!cpu_online(cpu))
                 return 0;
 
         pr_debug("microcode: CPU%d added\n", cpu);
-        memset(uci, 0, sizeof(*uci));
 
         err = sysfs_create_group(&sys_dev->kobj, &mc_attr_group);
         if (err)
                 return err;
 
-        err = microcode_init_cpu(cpu);
+        if (microcode_init_cpu(cpu) == UCODE_ERROR)
+                err = -EINVAL;
 
         return err;
 }
@@ -400,19 +435,30 @@ static int mc_sysdev_remove(struct sys_device *sys_dev)
 static int mc_sysdev_resume(struct sys_device *dev)
 {
         int cpu = dev->id;
+        struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
 
         if (!cpu_online(cpu))
                 return 0;
 
-        /* only CPU 0 will apply ucode here */
-        microcode_update_cpu(NULL);
+        /*
+         * All non-bootup cpus are still disabled,
+         * so only CPU 0 will apply ucode here.
+         *
+         * Moreover, there can be no concurrent
+         * updates from any other places at this point.
+         */
+        WARN_ON(cpu != 0);
+
+        if (uci->valid && uci->mc)
+                microcode_ops->apply_microcode(cpu);
+
         return 0;
 }
 
 static struct sysdev_driver mc_sysdev_driver = {
-        .add            = mc_sysdev_add,
-        .remove         = mc_sysdev_remove,
-        .resume         = mc_sysdev_resume,
+        .add                    = mc_sysdev_add,
+        .remove                 = mc_sysdev_remove,
+        .resume                 = mc_sysdev_resume,
 };
 
 static __cpuinit int
@@ -425,15 +471,12 @@ mc_cpu_callback(struct notifier_block *nb, unsigned long action, void *hcpu)
         switch (action) {
         case CPU_ONLINE:
         case CPU_ONLINE_FROZEN:
-                if (microcode_init_cpu(cpu))
-                        printk(KERN_ERR "microcode: failed to init CPU%d\n",
-                               cpu);
+                microcode_update_cpu(cpu);
         case CPU_DOWN_FAILED:
         case CPU_DOWN_FAILED_FROZEN:
                 pr_debug("microcode: CPU%d added\n", cpu);
                 if (sysfs_create_group(&sys_dev->kobj, &mc_attr_group))
-                        printk(KERN_ERR "microcode: Failed to create the sysfs "
-                                "group for CPU%d\n", cpu);
+                        pr_err("microcode: Failed to create group for CPU%d\n", cpu);
                 break;
         case CPU_DOWN_PREPARE:
         case CPU_DOWN_PREPARE_FROZEN:
@@ -465,13 +508,10 @@ static int __init microcode_init(void)
                 microcode_ops = init_amd_microcode();
 
         if (!microcode_ops) {
-                printk(KERN_ERR "microcode: no support for this CPU vendor\n");
+                pr_err("microcode: no support for this CPU vendor\n");
                 return -ENODEV;
         }
 
-        error = microcode_dev_init();
-        if (error)
-                return error;
         microcode_pdev = platform_device_register_simple("microcode", -1,
                                                          NULL, 0);
         if (IS_ERR(microcode_pdev)) {
@@ -480,23 +520,31 @@ static int __init microcode_init(void)
         }
 
         get_online_cpus();
+        mutex_lock(&microcode_mutex);
+
         error = sysdev_driver_register(&cpu_sysdev_class, &mc_sysdev_driver);
+
+        mutex_unlock(&microcode_mutex);
         put_online_cpus();
+
         if (error) {
-                microcode_dev_exit();
                 platform_device_unregister(microcode_pdev);
                 return error;
         }
 
+        error = microcode_dev_init();
+        if (error)
+                return error;
+
         register_hotcpu_notifier(&mc_cpu_notifier);
 
-        printk(KERN_INFO
-               "Microcode Update Driver: v" MICROCODE_VERSION
+        pr_info("Microcode Update Driver: v" MICROCODE_VERSION
                " <tigran@aivazian.fsnet.co.uk>,"
                " Peter Oruba\n");
 
         return 0;
 }
+module_init(microcode_init);
 
 static void __exit microcode_exit(void)
 {
@@ -505,16 +553,17 @@ static void __exit microcode_exit(void)
         unregister_hotcpu_notifier(&mc_cpu_notifier);
 
         get_online_cpus();
+        mutex_lock(&microcode_mutex);
+
         sysdev_driver_unregister(&cpu_sysdev_class, &mc_sysdev_driver);
+
+        mutex_unlock(&microcode_mutex);
         put_online_cpus();
 
         platform_device_unregister(microcode_pdev);
 
         microcode_ops = NULL;
 
-        printk(KERN_INFO
-               "Microcode Update Driver: v" MICROCODE_VERSION " removed.\n");
+        pr_info("Microcode Update Driver: v" MICROCODE_VERSION " removed.\n");
 }
-
-module_init(microcode_init);
 module_exit(microcode_exit);
diff --git a/arch/x86/kernel/microcode_intel.c b/arch/x86/kernel/microcode_intel.c
index 149b9ec7c1ab..0d334ddd0a96 100644
--- a/arch/x86/kernel/microcode_intel.c
+++ b/arch/x86/kernel/microcode_intel.c
@@ -70,24 +70,11 @@
  *              Fix sigmatch() macro to handle old CPUs with pf == 0.
  *              Thanks to Stuart Swales for pointing out this bug.
  */
-#include <linux/platform_device.h>
-#include <linux/capability.h>
-#include <linux/miscdevice.h>
 #include <linux/firmware.h>
-#include <linux/smp_lock.h>
-#include <linux/spinlock.h>
-#include <linux/cpumask.h>
 #include <linux/uaccess.h>
-#include <linux/vmalloc.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
-#include <linux/mutex.h>
-#include <linux/sched.h>
-#include <linux/init.h>
-#include <linux/slab.h>
-#include <linux/cpu.h>
-#include <linux/fs.h>
-#include <linux/mm.h>
+#include <linux/vmalloc.h>
 
 #include <asm/microcode.h>
 #include <asm/processor.h>
@@ -150,13 +137,9 @@ struct extended_sigtable {
 
 #define exttable_size(et) ((et)->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE)
 
-/* serialize access to the physical write to MSR 0x79 */
-static DEFINE_SPINLOCK(microcode_update_lock);
-
 static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
 {
         struct cpuinfo_x86 *c = &cpu_data(cpu_num);
-        unsigned long flags;
         unsigned int val[2];
 
         memset(csig, 0, sizeof(*csig));
@@ -176,18 +159,14 @@ static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
                 csig->pf = 1 << ((val[1] >> 18) & 7);
         }
 
-        /* serialize access to the physical write to MSR 0x79 */
-        spin_lock_irqsave(&microcode_update_lock, flags);
-
         wrmsr(MSR_IA32_UCODE_REV, 0, 0);
         /* see notes above for revision 1.07.  Apparent chip bug */
         sync_core();
         /* get the current revision from MSR 0x8B */
         rdmsr(MSR_IA32_UCODE_REV, val[0], csig->rev);
-        spin_unlock_irqrestore(&microcode_update_lock, flags);
 
-        pr_debug("microcode: collect_cpu_info : sig=0x%x, pf=0x%x, rev=0x%x\n",
-                        csig->sig, csig->pf, csig->rev);
+        printk(KERN_INFO "microcode: CPU%d sig=0x%x, pf=0x%x, revision=0x%x\n",
+                        cpu_num, csig->sig, csig->pf, csig->rev);
 
         return 0;
 }
@@ -318,11 +297,10 @@ get_matching_microcode(struct cpu_signature *cpu_sig, void *mc, int rev)
         return 0;
 }
 
-static void apply_microcode(int cpu)
+static int apply_microcode(int cpu)
 {
         struct microcode_intel *mc_intel;
         struct ucode_cpu_info *uci;
-        unsigned long flags;
         unsigned int val[2];
         int cpu_num;
 
@@ -334,10 +312,7 @@ static void apply_microcode(int cpu)
         BUG_ON(cpu_num != cpu);
 
         if (mc_intel == NULL)
-                return;
-
-        /* serialize access to the physical write to MSR 0x79 */
-        spin_lock_irqsave(&microcode_update_lock, flags);
+                return 0;
 
         /* write microcode via MSR 0x79 */
         wrmsr(MSR_IA32_UCODE_WRITE,
@@ -351,30 +326,32 @@ static void apply_microcode(int cpu)
         /* get the current revision from MSR 0x8B */
         rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
 
-        spin_unlock_irqrestore(&microcode_update_lock, flags);
         if (val[1] != mc_intel->hdr.rev) {
-                printk(KERN_ERR "microcode: CPU%d update from revision "
-                                "0x%x to 0x%x failed\n",
-                        cpu_num, uci->cpu_sig.rev, val[1]);
-                return;
+                printk(KERN_ERR "microcode: CPU%d update "
+                                "to revision 0x%x failed\n",
+                        cpu_num, mc_intel->hdr.rev);
+                return -1;
         }
-        printk(KERN_INFO "microcode: CPU%d updated from revision "
-                         "0x%x to 0x%x, date = %04x-%02x-%02x \n",
-                cpu_num, uci->cpu_sig.rev, val[1],
+        printk(KERN_INFO "microcode: CPU%d updated to revision "
+                         "0x%x, date = %04x-%02x-%02x \n",
+                cpu_num, val[1],
                 mc_intel->hdr.date & 0xffff,
                 mc_intel->hdr.date >> 24,
                 (mc_intel->hdr.date >> 16) & 0xff);
 
         uci->cpu_sig.rev = val[1];
+
+        return 0;
 }
 
-static int generic_load_microcode(int cpu, void *data, size_t size,
-                int (*get_ucode_data)(void *, const void *, size_t))
+static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,
+                                int (*get_ucode_data)(void *, const void *, size_t))
 {
         struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
         u8 *ucode_ptr = data, *new_mc = NULL, *mc;
         int new_rev = uci->cpu_sig.rev;
         unsigned int leftover = size;
+        enum ucode_state state = UCODE_OK;
 
         while (leftover) {
                 struct microcode_header_intel mc_header;
@@ -412,11 +389,15 @@ static int generic_load_microcode(int cpu, void *data, size_t size,
                 leftover  -= mc_size;
         }
 
-        if (!new_mc)
+        if (leftover) {
+                if (new_mc)
+                        vfree(new_mc);
+                state = UCODE_ERROR;
                 goto out;
+        }
 
-        if (leftover) {
-                vfree(new_mc);
+        if (!new_mc) {
+                state = UCODE_NFOUND;
                 goto out;
         }
 
@@ -427,9 +408,8 @@ static int generic_load_microcode(int cpu, void *data, size_t size,
         pr_debug("microcode: CPU%d found a matching microcode update with"
                  " version 0x%x (current=0x%x)\n",
                         cpu, new_rev, uci->cpu_sig.rev);
-
- out:
-        return (int)leftover;
+out:
+        return state;
 }
 
 static int get_ucode_fw(void *to, const void *from, size_t n)
@@ -438,21 +418,19 @@ static int get_ucode_fw(void *to, const void *from, size_t n)
         return 0;
 }
 
-static int request_microcode_fw(int cpu, struct device *device)
+static enum ucode_state request_microcode_fw(int cpu, struct device *device)
 {
         char name[30];
         struct cpuinfo_x86 *c = &cpu_data(cpu);
         const struct firmware *firmware;
-        int ret;
+        enum ucode_state ret;
 
-        /* We should bind the task to the CPU */
-        BUG_ON(cpu != raw_smp_processor_id());
         sprintf(name, "intel-ucode/%02x-%02x-%02x",
                 c->x86, c->x86_model, c->x86_mask);
-        ret = request_firmware(&firmware, name, device);
-        if (ret) {
+
+        if (request_firmware(&firmware, name, device)) {
                 pr_debug("microcode: data file %s load failed\n", name);
-                return ret;
+                return UCODE_NFOUND;
         }
 
         ret = generic_load_microcode(cpu, (void *)firmware->data,
@@ -468,11 +446,9 @@ static int get_ucode_user(void *to, const void *from, size_t n)
         return copy_from_user(to, from, n);
 }
 
-static int request_microcode_user(int cpu, const void __user *buf, size_t size)
+static enum ucode_state
+request_microcode_user(int cpu, const void __user *buf, size_t size)
 {
-        /* We should bind the task to the CPU */
-        BUG_ON(cpu != raw_smp_processor_id());
-
         return generic_load_microcode(cpu, (void *)buf, size, &get_ucode_user);
 }
 
diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c
index 9faf43bea336..70ec9b951d76 100644
--- a/arch/x86/kernel/paravirt.c
+++ b/arch/x86/kernel/paravirt.c
@@ -248,18 +248,16 @@ static DEFINE_PER_CPU(enum paravirt_lazy_mode, paravirt_lazy_mode) = PARAVIRT_LA
 
 static inline void enter_lazy(enum paravirt_lazy_mode mode)
 {
-        BUG_ON(__get_cpu_var(paravirt_lazy_mode) != PARAVIRT_LAZY_NONE);
-        BUG_ON(preemptible());
+        BUG_ON(percpu_read(paravirt_lazy_mode) != PARAVIRT_LAZY_NONE);
 
-        __get_cpu_var(paravirt_lazy_mode) = mode;
+        percpu_write(paravirt_lazy_mode, mode);
 }
 
-void paravirt_leave_lazy(enum paravirt_lazy_mode mode)
+static void leave_lazy(enum paravirt_lazy_mode mode)
 {
-        BUG_ON(__get_cpu_var(paravirt_lazy_mode) != mode);
-        BUG_ON(preemptible());
+        BUG_ON(percpu_read(paravirt_lazy_mode) != mode);
 
-        __get_cpu_var(paravirt_lazy_mode) = PARAVIRT_LAZY_NONE;
+        percpu_write(paravirt_lazy_mode, PARAVIRT_LAZY_NONE);
 }
 
 void paravirt_enter_lazy_mmu(void)
@@ -269,22 +267,36 @@ void paravirt_enter_lazy_mmu(void)
 
 void paravirt_leave_lazy_mmu(void)
 {
-        paravirt_leave_lazy(PARAVIRT_LAZY_MMU);
+        leave_lazy(PARAVIRT_LAZY_MMU);
 }
 
-void paravirt_enter_lazy_cpu(void)
+void paravirt_start_context_switch(struct task_struct *prev)
 {
+        BUG_ON(preemptible());
+
+        if (percpu_read(paravirt_lazy_mode) == PARAVIRT_LAZY_MMU) {
+                arch_leave_lazy_mmu_mode();
+                set_ti_thread_flag(task_thread_info(prev), TIF_LAZY_MMU_UPDATES);
+        }
         enter_lazy(PARAVIRT_LAZY_CPU);
 }
 
-void paravirt_leave_lazy_cpu(void)
+void paravirt_end_context_switch(struct task_struct *next)
 {
-        paravirt_leave_lazy(PARAVIRT_LAZY_CPU);
+        BUG_ON(preemptible());
+
+        leave_lazy(PARAVIRT_LAZY_CPU);
+
+        if (test_and_clear_ti_thread_flag(task_thread_info(next), TIF_LAZY_MMU_UPDATES))
+                arch_enter_lazy_mmu_mode();
 }
 
 enum paravirt_lazy_mode paravirt_get_lazy_mode(void)
 {
-        return __get_cpu_var(paravirt_lazy_mode);
+        if (in_interrupt())
+                return PARAVIRT_LAZY_NONE;
+
+        return percpu_read(paravirt_lazy_mode);
 }
 
 void arch_flush_lazy_mmu_mode(void)
@@ -292,7 +304,6 @@ void arch_flush_lazy_mmu_mode(void)
         preempt_disable();
 
         if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) {
-                WARN_ON(preempt_count() == 1);
                 arch_leave_lazy_mmu_mode();
                 arch_enter_lazy_mmu_mode();
         }
@@ -300,19 +311,6 @@ void arch_flush_lazy_mmu_mode(void)
         preempt_enable();
 }
 
-void arch_flush_lazy_cpu_mode(void)
-{
-        preempt_disable();
-
-        if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) {
-                WARN_ON(preempt_count() == 1);
-                arch_leave_lazy_cpu_mode();
-                arch_enter_lazy_cpu_mode();
-        }
-
-        preempt_enable();
-}
-
 struct pv_info pv_info = {
         .name = "bare hardware",
         .paravirt_enabled = 0,
@@ -404,10 +402,8 @@ struct pv_cpu_ops pv_cpu_ops = {
         .set_iopl_mask = native_set_iopl_mask,
         .io_delay = native_io_delay,
 
-        .lazy_mode = {
-                .enter = paravirt_nop,
-                .leave = paravirt_nop,
-        },
+        .start_context_switch = paravirt_nop,
+        .end_context_switch = paravirt_nop,
 };
 
 struct pv_apic_ops pv_apic_ops = {
diff --git a/arch/x86/kernel/pci-calgary_64.c b/arch/x86/kernel/pci-calgary_64.c
index 755c21e906f3..971a3bec47a8 100644
--- a/arch/x86/kernel/pci-calgary_64.c
+++ b/arch/x86/kernel/pci-calgary_64.c
@@ -186,37 +186,6 @@ static struct cal_chipset_ops calioc2_chip_ops = {
 
 static struct calgary_bus_info bus_info[MAX_PHB_BUS_NUM] = { { NULL, 0, 0 }, };
 
-/* enable this to stress test the chip's TCE cache */
-#ifdef CONFIG_IOMMU_DEBUG
-static int debugging = 1;
-
-static inline unsigned long verify_bit_range(unsigned long* bitmap,
-        int expected, unsigned long start, unsigned long end)
-{
-        unsigned long idx = start;
-
-        BUG_ON(start >= end);
-
-        while (idx < end) {
-                if (!!test_bit(idx, bitmap) != expected)
-                        return idx;
-                ++idx;
-        }
-
-        /* all bits have the expected value */
-        return ~0UL;
-}
-#else /* debugging is disabled */
-static int debugging;
-
-static inline unsigned long verify_bit_range(unsigned long* bitmap,
-        int expected, unsigned long start, unsigned long end)
-{
-        return ~0UL;
-}
-
-#endif /* CONFIG_IOMMU_DEBUG */
-
 static inline int translation_enabled(struct iommu_table *tbl)
 {
         /* only PHBs with translation enabled have an IOMMU table */
@@ -228,7 +197,6 @@ static void iommu_range_reserve(struct iommu_table *tbl,
 {
         unsigned long index;
         unsigned long end;
-        unsigned long badbit;
         unsigned long flags;
 
         index = start_addr >> PAGE_SHIFT;
@@ -243,14 +211,6 @@ static void iommu_range_reserve(struct iommu_table *tbl,
 
         spin_lock_irqsave(&tbl->it_lock, flags);
 
-        badbit = verify_bit_range(tbl->it_map, 0, index, end);
-        if (badbit != ~0UL) {
-                if (printk_ratelimit())
-                        printk(KERN_ERR "Calgary: entry already allocated at "
-                               "0x%lx tbl %p dma 0x%lx npages %u\n",
-                               badbit, tbl, start_addr, npages);
-        }
-
         iommu_area_reserve(tbl->it_map, index, npages);
 
         spin_unlock_irqrestore(&tbl->it_lock, flags);
@@ -326,7 +286,6 @@ static void iommu_free(struct iommu_table *tbl, dma_addr_t dma_addr,
         unsigned int npages)
 {
         unsigned long entry;
-        unsigned long badbit;
         unsigned long badend;
         unsigned long flags;
 
@@ -346,14 +305,6 @@ static void iommu_free(struct iommu_table *tbl, dma_addr_t dma_addr,
 
         spin_lock_irqsave(&tbl->it_lock, flags);
 
-        badbit = verify_bit_range(tbl->it_map, 1, entry, entry + npages);
-        if (badbit != ~0UL) {
-                if (printk_ratelimit())
-                        printk(KERN_ERR "Calgary: bit is off at 0x%lx "
-                               "tbl %p dma 0x%Lx entry 0x%lx npages %u\n",
-                               badbit, tbl, dma_addr, entry, npages);
-        }
-
         iommu_area_free(tbl->it_map, entry, npages);
 
         spin_unlock_irqrestore(&tbl->it_lock, flags);
@@ -1488,9 +1439,8 @@ void __init detect_calgary(void)
                 iommu_detected = 1;
                 calgary_detected = 1;
                 printk(KERN_INFO "PCI-DMA: Calgary IOMMU detected.\n");
-                printk(KERN_INFO "PCI-DMA: Calgary TCE table spec is %d, "
-                       "CONFIG_IOMMU_DEBUG is %s.\n", specified_table_size,
-                       debugging ? "enabled" : "disabled");
+                printk(KERN_INFO "PCI-DMA: Calgary TCE table spec is %d\n",
+                       specified_table_size);
 
                 /* swiotlb for devices that aren't behind the Calgary. */
                 if (max_pfn > MAX_DMA32_PFN)
diff --git a/arch/x86/kernel/pci-gart_64.c b/arch/x86/kernel/pci-gart_64.c
index b284b58c035c..cfd9f9063896 100644
--- a/arch/x86/kernel/pci-gart_64.c
+++ b/arch/x86/kernel/pci-gart_64.c
@@ -144,48 +144,21 @@ static void flush_gart(void)
 }
 
 #ifdef CONFIG_IOMMU_LEAK
-
-#define SET_LEAK(x)                                                     \
-        do {                                                            \
-                if (iommu_leak_tab)                                     \
-                        iommu_leak_tab[x] = __builtin_return_address(0);\
-        } while (0)
-
-#define CLEAR_LEAK(x)                                                   \
-        do {                                                            \
-                if (iommu_leak_tab)                                     \
-                        iommu_leak_tab[x] = NULL;                       \
-        } while (0)
-
 /* Debugging aid for drivers that don't free their IOMMU tables */
-static void **iommu_leak_tab;
 static int leak_trace;
 static int iommu_leak_pages = 20;
 
 static void dump_leak(void)
 {
-        int i;
         static int dump;
 
-        if (dump || !iommu_leak_tab)
+        if (dump)
                 return;
         dump = 1;
-        show_stack(NULL, NULL);
 
-        /* Very crude. dump some from the end of the table too */
-        printk(KERN_DEBUG "Dumping %d pages from end of IOMMU:\n",
-               iommu_leak_pages);
-        for (i = 0; i < iommu_leak_pages; i += 2) {
-                printk(KERN_DEBUG "%lu: ", iommu_pages-i);
-                printk_address((unsigned long) iommu_leak_tab[iommu_pages-i],
-                                0);
-                printk(KERN_CONT "%c", (i+1)%2 == 0 ? '\n' : ' ');
-        }
-        printk(KERN_DEBUG "\n");
+        show_stack(NULL, NULL);
+        debug_dma_dump_mappings(NULL);
 }
-#else
-# define SET_LEAK(x)
-# define CLEAR_LEAK(x)
 #endif
 
 static void iommu_full(struct device *dev, size_t size, int dir)
@@ -248,7 +221,6 @@ static dma_addr_t dma_map_area(struct device *dev, dma_addr_t phys_mem,
 
         for (i = 0; i < npages; i++) {
                 iommu_gatt_base[iommu_page + i] = GPTE_ENCODE(phys_mem);
-                SET_LEAK(iommu_page + i);
                 phys_mem += PAGE_SIZE;
         }
         return iommu_bus_base + iommu_page*PAGE_SIZE + (phys_mem & ~PAGE_MASK);
@@ -294,7 +266,6 @@ static void gart_unmap_page(struct device *dev, dma_addr_t dma_addr,
         npages = iommu_num_pages(dma_addr, size, PAGE_SIZE);
         for (i = 0; i < npages; i++) {
                 iommu_gatt_base[iommu_page + i] = gart_unmapped_entry;
-                CLEAR_LEAK(iommu_page + i);
         }
         free_iommu(iommu_page, npages);
 }
@@ -377,7 +348,6 @@ static int __dma_map_cont(struct device *dev, struct scatterlist *start,
                 pages = iommu_num_pages(s->offset, s->length, PAGE_SIZE);
                 while (pages--) {
                         iommu_gatt_base[iommu_page] = GPTE_ENCODE(addr);
-                        SET_LEAK(iommu_page);
                         addr += PAGE_SIZE;
                         iommu_page++;
                 }
@@ -688,8 +658,6 @@ static __init int init_k8_gatt(struct agp_kern_info *info)
 
         agp_gatt_table = gatt;
 
-        enable_gart_translations();
-
         error = sysdev_class_register(&gart_sysdev_class);
         if (!error)
                 error = sysdev_register(&device_gart);
@@ -801,11 +769,12 @@ void __init gart_iommu_init(void)
 
 #ifdef CONFIG_IOMMU_LEAK
         if (leak_trace) {
-                iommu_leak_tab = (void *)__get_free_pages(GFP_KERNEL|__GFP_ZERO,
-                                  get_order(iommu_pages*sizeof(void *)));
-                if (!iommu_leak_tab)
+                int ret;
+
+                ret = dma_debug_resize_entries(iommu_pages);
+                if (ret)
                         printk(KERN_DEBUG
-                               "PCI-DMA: Cannot allocate leak trace area\n");
+                               "PCI-DMA: Cannot trace all the entries\n");
         }
 #endif
 
@@ -845,6 +814,14 @@ void __init gart_iommu_init(void)
          * the pages as Not-Present:
          */
         wbinvd();
+        
+        /*
+         * Now all caches are flushed and we can safely enable
+         * GART hardware.  Doing it early leaves the possibility
+         * of stale cache entries that can lead to GART PTE
+         * errors.
+         */
+        enable_gart_translations();
 
         /*
          * Try to workaround a bug (thanks to BenH):
diff --git a/arch/x86/kernel/pci-swiotlb.c b/arch/x86/kernel/pci-swiotlb.c
index 221a3853e268..a1712f2b50f1 100644
--- a/arch/x86/kernel/pci-swiotlb.c
+++ b/arch/x86/kernel/pci-swiotlb.c
@@ -28,7 +28,7 @@ dma_addr_t swiotlb_phys_to_bus(struct device *hwdev, phys_addr_t paddr)
         return paddr;
 }
 
-phys_addr_t swiotlb_bus_to_phys(dma_addr_t baddr)
+phys_addr_t swiotlb_bus_to_phys(struct device *hwdev, dma_addr_t baddr)
 {
         return baddr;
 }
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index ca989158e847..3bb2be1649bd 100644
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -8,12 +8,15 @@
 #include <linux/module.h>
 #include <linux/pm.h>
 #include <linux/clockchips.h>
+#include <linux/random.h>
 #include <trace/power.h>
 #include <asm/system.h>
 #include <asm/apic.h>
+#include <asm/syscalls.h>
 #include <asm/idle.h>
 #include <asm/uaccess.h>
 #include <asm/i387.h>
+#include <asm/ds.h>
 
 unsigned long idle_halt;
 EXPORT_SYMBOL(idle_halt);
@@ -45,6 +48,8 @@ void free_thread_xstate(struct task_struct *tsk)
                 kmem_cache_free(task_xstate_cachep, tsk->thread.xstate);
                 tsk->thread.xstate = NULL;
         }
+
+        WARN(tsk->thread.ds_ctx, "leaking DS context\n");
 }
 
 void free_thread_info(struct thread_info *ti)
@@ -83,8 +88,6 @@ void exit_thread(void)
                 put_cpu();
                 kfree(bp);
         }
-
-        ds_exit_thread(current);
 }
 
 void flush_thread(void)
@@ -613,3 +616,16 @@ static int __init idle_setup(char *str)
 }
 early_param("idle", idle_setup);
 
+unsigned long arch_align_stack(unsigned long sp)
+{
+        if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
+                sp -= get_random_int() % 8192;
+        return sp & ~0xf;
+}
+
+unsigned long arch_randomize_brk(struct mm_struct *mm)
+{
+        unsigned long range_end = mm->brk + 0x02000000;
+        return randomize_range(mm->brk, range_end, 0) ? : mm->brk;
+}
+
diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c
index 76f8f84043a2..59f4524984af 100644
--- a/arch/x86/kernel/process_32.c
+++ b/arch/x86/kernel/process_32.c
@@ -9,8 +9,6 @@
  * This file handles the architecture-dependent parts of process handling..
  */
 
-#include <stdarg.h>
-
 #include <linux/stackprotector.h>
 #include <linux/cpu.h>
 #include <linux/errno.h>
@@ -33,7 +31,6 @@
 #include <linux/module.h>
 #include <linux/kallsyms.h>
 #include <linux/ptrace.h>
-#include <linux/random.h>
 #include <linux/personality.h>
 #include <linux/tick.h>
 #include <linux/percpu.h>
@@ -290,7 +287,8 @@ int copy_thread(unsigned long clone_flags, unsigned long sp,
                 p->thread.io_bitmap_max = 0;
         }
 
-        ds_copy_thread(p, current);
+        clear_tsk_thread_flag(p, TIF_DS_AREA_MSR);
+        p->thread.ds_ctx = NULL;
 
         clear_tsk_thread_flag(p, TIF_DEBUGCTLMSR);
         p->thread.debugctlmsr = 0;
@@ -407,7 +405,7 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
          * done before math_state_restore, so the TS bit is up
          * to date.
          */
-        arch_leave_lazy_cpu_mode();
+        arch_end_context_switch(next_p);
 
         /* If the task has used fpu the last 5 timeslices, just do a full
          * restore of the math state immediately to avoid the trap; the
@@ -497,15 +495,3 @@ unsigned long get_wchan(struct task_struct *p)
         return 0;
 }
 
-unsigned long arch_align_stack(unsigned long sp)
-{
-        if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
-                sp -= get_random_int() % 8192;
-        return sp & ~0xf;
-}
-
-unsigned long arch_randomize_brk(struct mm_struct *mm)
-{
-        unsigned long range_end = mm->brk + 0x02000000;
-        return randomize_range(mm->brk, range_end, 0) ? : mm->brk;
-}
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index b751a41392b1..ebefb5407b9d 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -14,8 +14,6 @@
  * This file handles the architecture-dependent parts of process handling..
  */
 
-#include <stdarg.h>
-
 #include <linux/stackprotector.h>
 #include <linux/cpu.h>
 #include <linux/errno.h>
@@ -32,7 +30,6 @@
 #include <linux/delay.h>
 #include <linux/module.h>
 #include <linux/ptrace.h>
-#include <linux/random.h>
 #include <linux/notifier.h>
 #include <linux/kprobes.h>
 #include <linux/kdebug.h>
@@ -335,7 +332,8 @@ int copy_thread(unsigned long clone_flags, unsigned long sp,
                         goto out;
         }
 
-        ds_copy_thread(p, me);
+        clear_tsk_thread_flag(p, TIF_DS_AREA_MSR);
+        p->thread.ds_ctx = NULL;
 
         clear_tsk_thread_flag(p, TIF_DEBUGCTLMSR);
         p->thread.debugctlmsr = 0;
@@ -428,7 +426,7 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
          * done before math_state_restore, so the TS bit is up
          * to date.
          */
-        arch_leave_lazy_cpu_mode();
+        arch_end_context_switch(next_p);
 
         /*
          * Switch FS and GS.
@@ -660,15 +658,3 @@ long sys_arch_prctl(int code, unsigned long addr)
         return do_arch_prctl(current, code, addr);
 }
 
-unsigned long arch_align_stack(unsigned long sp)
-{
-        if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
-                sp -= get_random_int() % 8192;
-        return sp & ~0xf;
-}
-
-unsigned long arch_randomize_brk(struct mm_struct *mm)
-{
-        unsigned long range_end = mm->brk + 0x02000000;
-        return randomize_range(mm->brk, range_end, 0) ? : mm->brk;
-}
diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c
index 23b7c8f017e2..09ecbde91c13 100644
--- a/arch/x86/kernel/ptrace.c
+++ b/arch/x86/kernel/ptrace.c
@@ -21,6 +21,7 @@
 #include <linux/audit.h>
 #include <linux/seccomp.h>
 #include <linux/signal.h>
+#include <linux/workqueue.h>
 
 #include <asm/uaccess.h>
 #include <asm/pgtable.h>
@@ -578,17 +579,130 @@ static int ioperm_get(struct task_struct *target,
 }
 
 #ifdef CONFIG_X86_PTRACE_BTS
+/*
+ * A branch trace store context.
+ *
+ * Contexts may only be installed by ptrace_bts_config() and only for
+ * ptraced tasks.
+ *
+ * Contexts are destroyed when the tracee is detached from the tracer.
+ * The actual destruction work requires interrupts enabled, so the
+ * work is deferred and will be scheduled during __ptrace_unlink().
+ *
+ * Contexts hold an additional task_struct reference on the traced
+ * task, as well as a reference on the tracer's mm.
+ *
+ * Ptrace already holds a task_struct for the duration of ptrace operations,
+ * but since destruction is deferred, it may be executed after both
+ * tracer and tracee exited.
+ */
+struct bts_context {
+        /* The branch trace handle. */
+        struct bts_tracer       *tracer;
+
+        /* The buffer used to store the branch trace and its size. */
+        void                    *buffer;
+        unsigned int            size;
+
+        /* The mm that paid for the above buffer. */
+        struct mm_struct        *mm;
+
+        /* The task this context belongs to. */
+        struct task_struct      *task;
+
+        /* The signal to send on a bts buffer overflow. */
+        unsigned int            bts_ovfl_signal;
+
+        /* The work struct to destroy a context. */
+        struct work_struct      work;
+};
+
+static int alloc_bts_buffer(struct bts_context *context, unsigned int size)
+{
+        void *buffer = NULL;
+        int err = -ENOMEM;
+
+        err = account_locked_memory(current->mm, current->signal->rlim, size);
+        if (err < 0)
+                return err;
+
+        buffer = kzalloc(size, GFP_KERNEL);
+        if (!buffer)
+                goto out_refund;
+
+        context->buffer = buffer;
+        context->size = size;
+        context->mm = get_task_mm(current);
+
+        return 0;
+
+ out_refund:
+        refund_locked_memory(current->mm, size);
+        return err;
+}
+
+static inline void free_bts_buffer(struct bts_context *context)
+{
+        if (!context->buffer)
+                return;
+
+        kfree(context->buffer);
+        context->buffer = NULL;
+
+        refund_locked_memory(context->mm, context->size);
+        context->size = 0;
+
+        mmput(context->mm);
+        context->mm = NULL;
+}
+
+static void free_bts_context_work(struct work_struct *w)
+{
+        struct bts_context *context;
+
+        context = container_of(w, struct bts_context, work);
+
+        ds_release_bts(context->tracer);
+        put_task_struct(context->task);
+        free_bts_buffer(context);
+        kfree(context);
+}
+
+static inline void free_bts_context(struct bts_context *context)
+{
+        INIT_WORK(&context->work, free_bts_context_work);
+        schedule_work(&context->work);
+}
+
+static inline struct bts_context *alloc_bts_context(struct task_struct *task)
+{
+        struct bts_context *context = kzalloc(sizeof(*context), GFP_KERNEL);
+        if (context) {
+                context->task = task;
+                task->bts = context;
+
+                get_task_struct(task);
+        }
+
+        return context;
+}
+
 static int ptrace_bts_read_record(struct task_struct *child, size_t index,
                                   struct bts_struct __user *out)
 {
+        struct bts_context *context;
         const struct bts_trace *trace;
         struct bts_struct bts;
         const unsigned char *at;
         int error;
 
-        trace = ds_read_bts(child->bts);
+        context = child->bts;
+        if (!context)
+                return -ESRCH;
+
+        trace = ds_read_bts(context->tracer);
         if (!trace)
-                return -EPERM;
+                return -ESRCH;
 
         at = trace->ds.top - ((index + 1) * trace->ds.size);
         if ((void *)at < trace->ds.begin)
@@ -597,7 +711,7 @@ static int ptrace_bts_read_record(struct task_struct *child, size_t index,
         if (!trace->read)
                 return -EOPNOTSUPP;
 
-        error = trace->read(child->bts, at, &bts);
+        error = trace->read(context->tracer, at, &bts);
         if (error < 0)
                 return error;
 
@@ -611,13 +725,18 @@ static int ptrace_bts_drain(struct task_struct *child,
                             long size,
                             struct bts_struct __user *out)
 {
+        struct bts_context *context;
         const struct bts_trace *trace;
         const unsigned char *at;
         int error, drained = 0;
 
-        trace = ds_read_bts(child->bts);
+        context = child->bts;
+        if (!context)
+                return -ESRCH;
+
+        trace = ds_read_bts(context->tracer);
         if (!trace)
-                return -EPERM;
+                return -ESRCH;
 
         if (!trace->read)
                 return -EOPNOTSUPP;
@@ -628,9 +747,8 @@ static int ptrace_bts_drain(struct task_struct *child,
         for (at = trace->ds.begin; (void *)at < trace->ds.top;
              out++, drained++, at += trace->ds.size) {
                 struct bts_struct bts;
-                int error;
 
-                error = trace->read(child->bts, at, &bts);
+                error = trace->read(context->tracer, at, &bts);
                 if (error < 0)
                         return error;
 
@@ -640,35 +758,18 @@ static int ptrace_bts_drain(struct task_struct *child,
 
         memset(trace->ds.begin, 0, trace->ds.n * trace->ds.size);
 
-        error = ds_reset_bts(child->bts);
+        error = ds_reset_bts(context->tracer);
         if (error < 0)
                 return error;
 
         return drained;
 }
 
-static int ptrace_bts_allocate_buffer(struct task_struct *child, size_t size)
-{
-        child->bts_buffer = alloc_locked_buffer(size);
-        if (!child->bts_buffer)
-                return -ENOMEM;
-
-        child->bts_size = size;
-
-        return 0;
-}
-
-static void ptrace_bts_free_buffer(struct task_struct *child)
-{
-        free_locked_buffer(child->bts_buffer, child->bts_size);
-        child->bts_buffer = NULL;
-        child->bts_size = 0;
-}
-
 static int ptrace_bts_config(struct task_struct *child,
                              long cfg_size,
                              const struct ptrace_bts_config __user *ucfg)
 {
+        struct bts_context *context;
         struct ptrace_bts_config cfg;
         unsigned int flags = 0;
 
@@ -678,28 +779,33 @@ static int ptrace_bts_config(struct task_struct *child,
         if (copy_from_user(&cfg, ucfg, sizeof(cfg)))
                 return -EFAULT;
 
-        if (child->bts) {
-                ds_release_bts(child->bts);
-                child->bts = NULL;
-        }
+        context = child->bts;
+        if (!context)
+                context = alloc_bts_context(child);
+        if (!context)
+                return -ENOMEM;
 
         if (cfg.flags & PTRACE_BTS_O_SIGNAL) {
                 if (!cfg.signal)
                         return -EINVAL;
 
-                child->thread.bts_ovfl_signal = cfg.signal;
                 return -EOPNOTSUPP;
+                context->bts_ovfl_signal = cfg.signal;
         }
 
-        if ((cfg.flags & PTRACE_BTS_O_ALLOC) &&
-            (cfg.size != child->bts_size)) {
-                int error;
+        ds_release_bts(context->tracer);
+        context->tracer = NULL;
 
-                ptrace_bts_free_buffer(child);
+        if ((cfg.flags & PTRACE_BTS_O_ALLOC) && (cfg.size != context->size)) {
+                int err;
 
-                error = ptrace_bts_allocate_buffer(child, cfg.size);
-                if (error < 0)
-                        return error;
+                free_bts_buffer(context);
+                if (!cfg.size)
+                        return 0;
+
+                err = alloc_bts_buffer(context, cfg.size);
+                if (err < 0)
+                        return err;
         }
 
         if (cfg.flags & PTRACE_BTS_O_TRACE)
@@ -708,15 +814,14 @@ static int ptrace_bts_config(struct task_struct *child,
         if (cfg.flags & PTRACE_BTS_O_SCHED)
                 flags |= BTS_TIMESTAMPS;
 
-        child->bts = ds_request_bts(child, child->bts_buffer, child->bts_size,
-                                    /* ovfl = */ NULL, /* th = */ (size_t)-1,
-                                    flags);
-        if (IS_ERR(child->bts)) {
-                int error = PTR_ERR(child->bts);
-
-                ptrace_bts_free_buffer(child);
-                child->bts = NULL;
+        context->tracer =
+                ds_request_bts_task(child, context->buffer, context->size,
+                                    NULL, (size_t)-1, flags);
+        if (unlikely(IS_ERR(context->tracer))) {
+                int error = PTR_ERR(context->tracer);
 
+                free_bts_buffer(context);
+                context->tracer = NULL;
                 return error;
         }
 
@@ -727,20 +832,25 @@ static int ptrace_bts_status(struct task_struct *child,
                              long cfg_size,
                              struct ptrace_bts_config __user *ucfg)
 {
+        struct bts_context *context;
         const struct bts_trace *trace;
         struct ptrace_bts_config cfg;
 
+        context = child->bts;
+        if (!context)
+                return -ESRCH;
+
         if (cfg_size < sizeof(cfg))
                 return -EIO;
 
-        trace = ds_read_bts(child->bts);
+        trace = ds_read_bts(context->tracer);
         if (!trace)
-                return -EPERM;
+                return -ESRCH;
 
         memset(&cfg, 0, sizeof(cfg));
-        cfg.size = trace->ds.end - trace->ds.begin;
-        cfg.signal = child->thread.bts_ovfl_signal;
-        cfg.bts_size = sizeof(struct bts_struct);
+        cfg.size        = trace->ds.end - trace->ds.begin;
+        cfg.signal      = context->bts_ovfl_signal;
+        cfg.bts_size    = sizeof(struct bts_struct);
 
         if (cfg.signal)
                 cfg.flags |= PTRACE_BTS_O_SIGNAL;
@@ -759,80 +869,51 @@ static int ptrace_bts_status(struct task_struct *child,
 
 static int ptrace_bts_clear(struct task_struct *child)
 {
+        struct bts_context *context;
         const struct bts_trace *trace;
 
-        trace = ds_read_bts(child->bts);
+        context = child->bts;
+        if (!context)
+                return -ESRCH;
+
+        trace = ds_read_bts(context->tracer);
         if (!trace)
-                return -EPERM;
+                return -ESRCH;
 
         memset(trace->ds.begin, 0, trace->ds.n * trace->ds.size);
 
-        return ds_reset_bts(child->bts);
+        return ds_reset_bts(context->tracer);
 }
 
 static int ptrace_bts_size(struct task_struct *child)
 {
+        struct bts_context *context;
         const struct bts_trace *trace;
 
-        trace = ds_read_bts(child->bts);
+        context = child->bts;
+        if (!context)
+                return -ESRCH;
+
+        trace = ds_read_bts(context->tracer);
         if (!trace)
-                return -EPERM;
+                return -ESRCH;
 
         return (trace->ds.top - trace->ds.begin) / trace->ds.size;
 }
 
-static void ptrace_bts_fork(struct task_struct *tsk)
-{
-        tsk->bts = NULL;
-        tsk->bts_buffer = NULL;
-        tsk->bts_size = 0;
-        tsk->thread.bts_ovfl_signal = 0;
-}
-
-static void ptrace_bts_untrace(struct task_struct *child)
+/*
+ * Called from __ptrace_unlink() after the child has been moved back
+ * to its original parent.
+ */
+void ptrace_bts_untrace(struct task_struct *child)
 {
         if (unlikely(child->bts)) {
-                ds_release_bts(child->bts);
+                free_bts_context(child->bts);
                 child->bts = NULL;
-
-                /* We cannot update total_vm and locked_vm since
-                   child's mm is already gone. But we can reclaim the
-                   memory. */
-                kfree(child->bts_buffer);
-                child->bts_buffer = NULL;
-                child->bts_size = 0;
         }
 }
-
-static void ptrace_bts_detach(struct task_struct *child)
-{
-        /*
-         * Ptrace_detach() races with ptrace_untrace() in case
-         * the child dies and is reaped by another thread.
-         *
-         * We only do the memory accounting at this point and
-         * leave the buffer deallocation and the bts tracer
-         * release to ptrace_bts_untrace() which will be called
-         * later on with tasklist_lock held.
-         */
-        release_locked_buffer(child->bts_buffer, child->bts_size);
-}
-#else
-static inline void ptrace_bts_fork(struct task_struct *tsk) {}
-static inline void ptrace_bts_detach(struct task_struct *child) {}
-static inline void ptrace_bts_untrace(struct task_struct *child) {}
 #endif /* CONFIG_X86_PTRACE_BTS */
 
-void x86_ptrace_fork(struct task_struct *child, unsigned long clone_flags)
-{
-        ptrace_bts_fork(child);
-}
-
-void x86_ptrace_untrace(struct task_struct *child)
-{
-        ptrace_bts_untrace(child);
-}
-
 /*
  * Called by kernel/ptrace.c when detaching..
  *
@@ -844,7 +925,6 @@ void ptrace_disable(struct task_struct *child)
 #ifdef TIF_SYSCALL_EMU
         clear_tsk_thread_flag(child, TIF_SYSCALL_EMU);
 #endif
-        ptrace_bts_detach(child);
 }
 
 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
diff --git a/arch/x86/kernel/quirks.c b/arch/x86/kernel/quirks.c
index 7563b31b4f03..af71d06624bf 100644
--- a/arch/x86/kernel/quirks.c
+++ b/arch/x86/kernel/quirks.c
@@ -491,5 +491,42 @@ void force_hpet_resume(void)
                 break;
         }
 }
+#endif
+
+#if defined(CONFIG_PCI) && defined(CONFIG_NUMA)
+/* Set correct numa_node information for AMD NB functions */
+static void __init quirk_amd_nb_node(struct pci_dev *dev)
+{
+        struct pci_dev *nb_ht;
+        unsigned int devfn;
+        u32 val;
+
+        devfn = PCI_DEVFN(PCI_SLOT(dev->devfn), 0);
+        nb_ht = pci_get_slot(dev->bus, devfn);
+        if (!nb_ht)
+                return;
+
+        pci_read_config_dword(nb_ht, 0x60, &val);
+        set_dev_node(&dev->dev, val & 7);
+        pci_dev_put(dev);
+}
 
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB,
+                        quirk_amd_nb_node);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_ADDRMAP,
+                        quirk_amd_nb_node);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_MEMCTL,
+                        quirk_amd_nb_node);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_MISC,
+                        quirk_amd_nb_node);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_HT,
+                        quirk_amd_nb_node);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_MAP,
+                        quirk_amd_nb_node);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_DRAM,
+                        quirk_amd_nb_node);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC,
+                        quirk_amd_nb_node);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_LINK,
+                        quirk_amd_nb_node);
 #endif
diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c
index 667188e0b5a0..d2d1ce8170f0 100644
--- a/arch/x86/kernel/reboot.c
+++ b/arch/x86/kernel/reboot.c
@@ -192,6 +192,15 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = {
                         DMI_MATCH(DMI_BOARD_NAME, "0KP561"),
                 },
         },
+        {   /* Handle problems with rebooting on Dell Optiplex 360 with 0T656F */
+                .callback = set_bios_reboot,
+                .ident = "Dell OptiPlex 360",
+                .matches = {
+                        DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
+                        DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 360"),
+                        DMI_MATCH(DMI_BOARD_NAME, "0T656F"),
+                },
+        },
         {       /* Handle problems with rebooting on Dell 2400's */
                 .callback = set_bios_reboot,
                 .ident = "Dell PowerEdge 2400",
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index 523bb697120d..d1c636bf31a7 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -112,6 +112,14 @@
 #define ARCH_SETUP
 #endif
 
+/*
+ * end_pfn only includes RAM, while max_pfn_mapped includes all e820 entries.
+ * The direct mapping extends to max_pfn_mapped, so that we can directly access
+ * apertures, ACPI and other tables without having to play with fixmaps.
+ */
+unsigned long max_low_pfn_mapped;
+unsigned long max_pfn_mapped;
+
 RESERVE_BRK(dmi_alloc, 65536);
 
 unsigned int boot_cpu_id __read_mostly;
@@ -214,8 +222,8 @@ unsigned long mmu_cr4_features;
 unsigned long mmu_cr4_features = X86_CR4_PAE;
 #endif
 
-/* Boot loader ID as an integer, for the benefit of proc_dointvec */
-int bootloader_type;
+/* Boot loader ID and version as integers, for the benefit of proc_dointvec */
+int bootloader_type, bootloader_version;
 
 /*
  * Setup options
@@ -706,6 +714,12 @@ void __init setup_arch(char **cmdline_p)
 #endif
         saved_video_mode = boot_params.hdr.vid_mode;
         bootloader_type = boot_params.hdr.type_of_loader;
+        if ((bootloader_type >> 4) == 0xe) {
+                bootloader_type &= 0xf;
+                bootloader_type |= (boot_params.hdr.ext_loader_type+0x10) << 4;
+        }
+        bootloader_version  = bootloader_type & 0xf;
+        bootloader_version |= boot_params.hdr.ext_loader_ver << 4;
 
 #ifdef CONFIG_BLK_DEV_RAM
         rd_image_start = boot_params.hdr.ram_size & RAMDISK_IMAGE_START_MASK;
@@ -854,12 +868,16 @@ void __init setup_arch(char **cmdline_p)
                 max_low_pfn = max_pfn;
 
         high_memory = (void *)__va(max_pfn * PAGE_SIZE - 1) + 1;
+        max_pfn_mapped = KERNEL_IMAGE_SIZE >> PAGE_SHIFT;
 #endif
 
 #ifdef CONFIG_X86_CHECK_BIOS_CORRUPTION
         setup_bios_corruption_check();
 #endif
 
+        printk(KERN_DEBUG "initial memory mapped : 0 - %08lx\n",
+                        max_pfn_mapped<<PAGE_SHIFT);
+
         reserve_brk();
 
         /* max_pfn_mapped is updated here */
diff --git a/arch/x86/kernel/setup_percpu.c b/arch/x86/kernel/setup_percpu.c
index 8f0e13be36b3..9c3f0823e6aa 100644
--- a/arch/x86/kernel/setup_percpu.c
+++ b/arch/x86/kernel/setup_percpu.c
@@ -425,6 +425,14 @@ void __init setup_per_cpu_areas(void)
         early_per_cpu_ptr(x86_cpu_to_node_map) = NULL;
 #endif
 
+#if defined(CONFIG_X86_64) && defined(CONFIG_NUMA)
+        /*
+         * make sure boot cpu node_number is right, when boot cpu is on the
+         * node that doesn't have mem installed
+         */
+        per_cpu(node_number, boot_cpu_id) = cpu_to_node(boot_cpu_id);
+#endif
+
         /* Setup node to cpumask map */
         setup_node_to_cpumask_map();
 
diff --git a/arch/x86/kernel/signal.c b/arch/x86/kernel/signal.c
index 4976888094f0..4c578751e94e 100644
--- a/arch/x86/kernel/signal.c
+++ b/arch/x86/kernel/signal.c
@@ -6,7 +6,6 @@
  *  2000-06-20  Pentium III FXSR, SSE support by Gareth Hughes
  *  2000-2002   x86-64 support by Andi Kleen
  */
-
 #include <linux/sched.h>
 #include <linux/mm.h>
 #include <linux/smp.h>
diff --git a/arch/x86/kernel/smp.c b/arch/x86/kernel/smp.c
index bf1831aa14fa..ec1de97600e7 100644
--- a/arch/x86/kernel/smp.c
+++ b/arch/x86/kernel/smp.c
@@ -198,6 +198,9 @@ void smp_reschedule_interrupt(struct pt_regs *regs)
 {
         ack_APIC_irq();
         inc_irq_stat(irq_resched_count);
+        /*
+         * KVM uses this interrupt to force a cpu out of guest mode
+         */
 }
 
 void smp_call_function_interrupt(struct pt_regs *regs)
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index d2e8de958156..7c80007ea5f7 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -992,10 +992,12 @@ static int __init smp_sanity_check(unsigned max_cpus)
          */
         if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid]) &&
             !cpu_has_apic) {
-                printk(KERN_ERR "BIOS bug, local APIC #%d not detected!...\n",
-                        boot_cpu_physical_apicid);
-                printk(KERN_ERR "... forcing use of dummy APIC emulation."
+                if (!disable_apic) {
+                        pr_err("BIOS bug, local APIC #%d not detected!...\n",
+                                boot_cpu_physical_apicid);
+                        pr_err("... forcing use of dummy APIC emulation."
                                 "(tell your hw vendor)\n");
+                }
                 smpboot_clear_io_apic();
                 arch_disable_smp_support();
                 return -1;
diff --git a/arch/x86/kernel/stacktrace.c b/arch/x86/kernel/stacktrace.c
index f7bddc2e37d1..4aaf7e48394f 100644
--- a/arch/x86/kernel/stacktrace.c
+++ b/arch/x86/kernel/stacktrace.c
@@ -20,7 +20,7 @@ save_stack_warning_symbol(void *data, char *msg, unsigned long symbol)
 
 static int save_stack_stack(void *data, char *name)
 {
-        return -1;
+        return 0;
 }
 
 static void save_stack_address(void *data, unsigned long addr, int reliable)
diff --git a/arch/x86/kernel/syscall_table_32.S b/arch/x86/kernel/syscall_table_32.S
index ff5c8736b491..d51321ddafda 100644
--- a/arch/x86/kernel/syscall_table_32.S
+++ b/arch/x86/kernel/syscall_table_32.S
@@ -334,3 +334,5 @@ ENTRY(sys_call_table)
         .long sys_inotify_init1
         .long sys_preadv
         .long sys_pwritev
+        .long sys_rt_tgsigqueueinfo     /* 335 */
+        .long sys_perf_counter_open
diff --git a/arch/x86/kernel/tlb_uv.c b/arch/x86/kernel/tlb_uv.c
index ed0c33761e6d..124d40c575df 100644
--- a/arch/x86/kernel/tlb_uv.c
+++ b/arch/x86/kernel/tlb_uv.c
@@ -715,7 +715,12 @@ uv_activation_descriptor_init(int node, int pnode)
         struct bau_desc *adp;
         struct bau_desc *ad2;
 
-        adp = (struct bau_desc *)kmalloc_node(16384, GFP_KERNEL, node);
+        /*
+         * each bau_desc is 64 bytes; there are 8 (UV_ITEMS_PER_DESCRIPTOR)
+         * per cpu; and up to 32 (UV_ADP_SIZE) cpu's per blade
+         */
+        adp = (struct bau_desc *)kmalloc_node(sizeof(struct bau_desc)*
+                UV_ADP_SIZE*UV_ITEMS_PER_DESCRIPTOR, GFP_KERNEL, node);
         BUG_ON(!adp);
 
         pa = uv_gpa(adp); /* need the real nasid*/
@@ -729,7 +734,13 @@ uv_activation_descriptor_init(int node, int pnode)
                                       (n << UV_DESC_BASE_PNODE_SHIFT | m));
         }
 
-        for (i = 0, ad2 = adp; i < UV_ACTIVATION_DESCRIPTOR_SIZE; i++, ad2++) {
+        /*
+         * initializing all 8 (UV_ITEMS_PER_DESCRIPTOR) descriptors for each
+         * cpu even though we only use the first one; one descriptor can
+         * describe a broadcast to 256 nodes.
+         */
+        for (i = 0, ad2 = adp; i < (UV_ADP_SIZE*UV_ITEMS_PER_DESCRIPTOR);
+                i++, ad2++) {
                 memset(ad2, 0, sizeof(struct bau_desc));
                 ad2->header.sw_ack_flag = 1;
                 /*
@@ -832,7 +843,7 @@ static int __init uv_bau_init(void)
                 return 0;
 
         for_each_possible_cpu(cur_cpu)
-                alloc_cpumask_var_node(&per_cpu(uv_flush_tlb_mask, cur_cpu),
+                zalloc_cpumask_var_node(&per_cpu(uv_flush_tlb_mask, cur_cpu),
                                        GFP_KERNEL, cpu_to_node(cur_cpu));
 
         uv_bau_retry_limit = 1;
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index f4d683b630ba..1e1e27b7d438 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -839,9 +839,6 @@ asmlinkage void math_state_restore(void)
         }
 
         clts();                         /* Allow maths ops (or we recurse) */
-#ifdef CONFIG_X86_32
-        restore_fpu(tsk);
-#else
         /*
          * Paranoid restore. send a SIGSEGV if we fail to restore the state.
          */
@@ -850,7 +847,7 @@ asmlinkage void math_state_restore(void)
                 force_sig(SIGSEGV, tsk);
                 return;
         }
-#endif
+
         thread->status |= TS_USEDFPU;   /* So we fnsave on switch_to() */
         tsk->fpu_counter++;
 }
@@ -945,8 +942,13 @@ void __init trap_init(void)
 #endif
         set_intr_gate(19, &simd_coprocessor_error);
 
+        /* Reserve all the builtin and the syscall vector: */
+        for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++)
+                set_bit(i, used_vectors);
+
 #ifdef CONFIG_IA32_EMULATION
         set_system_intr_gate(IA32_SYSCALL_VECTOR, ia32_syscall);
+        set_bit(IA32_SYSCALL_VECTOR, used_vectors);
 #endif
 
 #ifdef CONFIG_X86_32
@@ -963,14 +965,9 @@ void __init trap_init(void)
         }
 
         set_system_trap_gate(SYSCALL_VECTOR, &system_call);
+        set_bit(SYSCALL_VECTOR, used_vectors);
 #endif
 
-        /* Reserve all the builtin and the syscall vector: */
-        for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++)
-                set_bit(i, used_vectors);
-
-        set_bit(IA32_SYSCALL_VECTOR, used_vectors);
-
         /*
          * Should be a barrier for any external CPU state:
          */
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index d57de05dc430..3e1c057e98fe 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -384,13 +384,13 @@ unsigned long native_calibrate_tsc(void)
 {
         u64 tsc1, tsc2, delta, ref1, ref2;
         unsigned long tsc_pit_min = ULONG_MAX, tsc_ref_min = ULONG_MAX;
-        unsigned long flags, latch, ms, fast_calibrate, tsc_khz;
+        unsigned long flags, latch, ms, fast_calibrate, hv_tsc_khz;
         int hpet = is_hpet_enabled(), i, loopmin;
 
-        tsc_khz = get_hypervisor_tsc_freq();
-        if (tsc_khz) {
+        hv_tsc_khz = get_hypervisor_tsc_freq();
+        if (hv_tsc_khz) {
                 printk(KERN_INFO "TSC: Frequency read from the hypervisor\n");
-                return tsc_khz;
+                return hv_tsc_khz;
         }
 
         local_irq_save(flags);
@@ -710,7 +710,16 @@ static cycle_t read_tsc(struct clocksource *cs)
 #ifdef CONFIG_X86_64
 static cycle_t __vsyscall_fn vread_tsc(void)
 {
-        cycle_t ret = (cycle_t)vget_cycles();
+        cycle_t ret;
+
+        /*
+         * Surround the RDTSC by barriers, to make sure it's not
+         * speculated to outside the seqlock critical section and
+         * does not cause time warps:
+         */
+        rdtsc_barrier();
+        ret = (cycle_t)vget_cycles();
+        rdtsc_barrier();
 
         return ret >= __vsyscall_gtod_data.clock.cycle_last ?
                 ret : __vsyscall_gtod_data.clock.cycle_last;
diff --git a/arch/x86/kernel/tsc_sync.c b/arch/x86/kernel/tsc_sync.c
index bf36328f6ef9..027b5b498993 100644
--- a/arch/x86/kernel/tsc_sync.c
+++ b/arch/x86/kernel/tsc_sync.c
@@ -34,6 +34,7 @@ static __cpuinitdata atomic_t stop_count;
  * of a critical section, to be able to prove TSC time-warps:
  */
 static __cpuinitdata raw_spinlock_t sync_lock = __RAW_SPIN_LOCK_UNLOCKED;
+
 static __cpuinitdata cycles_t last_tsc;
 static __cpuinitdata cycles_t max_warp;
 static __cpuinitdata int nr_warps;
@@ -113,13 +114,12 @@ void __cpuinit check_tsc_sync_source(int cpu)
                 return;
 
         if (boot_cpu_has(X86_FEATURE_TSC_RELIABLE)) {
-                printk(KERN_INFO
-                       "Skipping synchronization checks as TSC is reliable.\n");
+                pr_info("Skipping synchronization checks as TSC is reliable.\n");
                 return;
         }
 
-        printk(KERN_INFO "checking TSC synchronization [CPU#%d -> CPU#%d]:",
-                          smp_processor_id(), cpu);
+        pr_info("checking TSC synchronization [CPU#%d -> CPU#%d]:",
+                smp_processor_id(), cpu);
 
         /*
          * Reset it - in case this is a second bootup:
@@ -143,8 +143,8 @@ void __cpuinit check_tsc_sync_source(int cpu)
 
         if (nr_warps) {
                 printk("\n");
-                printk(KERN_WARNING "Measured %Ld cycles TSC warp between CPUs,"
-                                    " turning off TSC clock.\n", max_warp);
+                pr_warning("Measured %Ld cycles TSC warp between CPUs, "
+                           "turning off TSC clock.\n", max_warp);
                 mark_tsc_unstable("check_tsc_sync_source failed");
         } else {
                 printk(" passed.\n");
@@ -195,5 +195,3 @@ void __cpuinit check_tsc_sync_target(void)
         while (atomic_read(&stop_count) != cpus)
                 cpu_relax();
 }
-#undef NR_LOOPS
-
diff --git a/arch/x86/kernel/vm86_32.c b/arch/x86/kernel/vm86_32.c
index d7ac84e7fc1c..9c4e62539058 100644
--- a/arch/x86/kernel/vm86_32.c
+++ b/arch/x86/kernel/vm86_32.c
@@ -287,10 +287,9 @@ static void do_sys_vm86(struct kernel_vm86_struct *info, struct task_struct *tsk
         info->regs.pt.ds = 0;
         info->regs.pt.es = 0;
         info->regs.pt.fs = 0;
-
-/* we are clearing gs later just before "jmp resume_userspace",
- * because it is not saved/restored.
- */
+#ifndef CONFIG_X86_32_LAZY_GS
+        info->regs.pt.gs = 0;
+#endif
 
 /*
  * The flags register is also special: we cannot trust that the user
@@ -318,9 +317,9 @@ static void do_sys_vm86(struct kernel_vm86_struct *info, struct task_struct *tsk
         }
 
 /*
- * Save old state, set default return value (%ax) to 0
+ * Save old state, set default return value (%ax) to 0 (VM86_SIGNAL)
  */
-        info->regs32->ax = 0;
+        info->regs32->ax = VM86_SIGNAL;
         tsk->thread.saved_sp0 = tsk->thread.sp0;
         tsk->thread.saved_fs = info->regs32->fs;
         tsk->thread.saved_gs = get_user_gs(info->regs32);
@@ -343,7 +342,9 @@ static void do_sys_vm86(struct kernel_vm86_struct *info, struct task_struct *tsk
         __asm__ __volatile__(
                 "movl %0,%%esp\n\t"
                 "movl %1,%%ebp\n\t"
+#ifdef CONFIG_X86_32_LAZY_GS
                 "mov  %2, %%gs\n\t"
+#endif
                 "jmp resume_userspace"
                 : /* no outputs */
                 :"r" (&info->regs), "r" (task_thread_info(tsk)), "r" (0));
diff --git a/arch/x86/kernel/vmi_32.c b/arch/x86/kernel/vmi_32.c
index 95deb9f2211e..b263423fbe2a 100644
--- a/arch/x86/kernel/vmi_32.c
+++ b/arch/x86/kernel/vmi_32.c
@@ -462,22 +462,28 @@ vmi_startup_ipi_hook(int phys_apicid, unsigned long start_eip,
 }
 #endif
 
-static void vmi_enter_lazy_cpu(void)
+static void vmi_start_context_switch(struct task_struct *prev)
 {
-        paravirt_enter_lazy_cpu();
+        paravirt_start_context_switch(prev);
         vmi_ops.set_lazy_mode(2);
 }
 
+static void vmi_end_context_switch(struct task_struct *next)
+{
+        vmi_ops.set_lazy_mode(0);
+        paravirt_end_context_switch(next);
+}
+
 static void vmi_enter_lazy_mmu(void)
 {
         paravirt_enter_lazy_mmu();
         vmi_ops.set_lazy_mode(1);
 }
 
-static void vmi_leave_lazy(void)
+static void vmi_leave_lazy_mmu(void)
 {
-        paravirt_leave_lazy(paravirt_get_lazy_mode());
         vmi_ops.set_lazy_mode(0);
+        paravirt_leave_lazy_mmu();
 }
 
 static inline int __init check_vmi_rom(struct vrom_header *rom)
@@ -711,14 +717,14 @@ static inline int __init activate_vmi(void)
         para_fill(pv_cpu_ops.set_iopl_mask, SetIOPLMask);
         para_fill(pv_cpu_ops.io_delay, IODelay);
 
-        para_wrap(pv_cpu_ops.lazy_mode.enter, vmi_enter_lazy_cpu,
+        para_wrap(pv_cpu_ops.start_context_switch, vmi_start_context_switch,
                   set_lazy_mode, SetLazyMode);
-        para_wrap(pv_cpu_ops.lazy_mode.leave, vmi_leave_lazy,
+        para_wrap(pv_cpu_ops.end_context_switch, vmi_end_context_switch,
                   set_lazy_mode, SetLazyMode);
 
         para_wrap(pv_mmu_ops.lazy_mode.enter, vmi_enter_lazy_mmu,
                   set_lazy_mode, SetLazyMode);
-        para_wrap(pv_mmu_ops.lazy_mode.leave, vmi_leave_lazy,
+        para_wrap(pv_mmu_ops.lazy_mode.leave, vmi_leave_lazy_mmu,
                   set_lazy_mode, SetLazyMode);
 
         /* user and kernel flush are just handled with different flags to FlushTLB */
diff --git a/arch/x86/kernel/vmlinux.lds.S b/arch/x86/kernel/vmlinux.lds.S
index 849ee611f013..4c85b2e2bb65 100644
--- a/arch/x86/kernel/vmlinux.lds.S
+++ b/arch/x86/kernel/vmlinux.lds.S
@@ -1,5 +1,431 @@
+/*
+ * ld script for the x86 kernel
+ *
+ * Historic 32-bit version written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>
+ *
+ * Modernisation, unification and other changes and fixes:
+ *   Copyright (C) 2007-2009  Sam Ravnborg <sam@ravnborg.org>
+ *
+ *
+ * Don't define absolute symbols until and unless you know that symbol
+ * value is should remain constant even if kernel image is relocated
+ * at run time. Absolute symbols are not relocated. If symbol value should
+ * change if kernel is relocated, make the symbol section relative and
+ * put it inside the section definition.
+ */
+
 #ifdef CONFIG_X86_32
-# include "vmlinux_32.lds.S"
+#define LOAD_OFFSET __PAGE_OFFSET
 #else
-# include "vmlinux_64.lds.S"
+#define LOAD_OFFSET __START_KERNEL_map
 #endif
+
+#include <asm-generic/vmlinux.lds.h>
+#include <asm/asm-offsets.h>
+#include <asm/thread_info.h>
+#include <asm/page_types.h>
+#include <asm/cache.h>
+#include <asm/boot.h>
+
+#undef i386     /* in case the preprocessor is a 32bit one */
+
+OUTPUT_FORMAT(CONFIG_OUTPUT_FORMAT, CONFIG_OUTPUT_FORMAT, CONFIG_OUTPUT_FORMAT)
+
+#ifdef CONFIG_X86_32
+OUTPUT_ARCH(i386)
+ENTRY(phys_startup_32)
+jiffies = jiffies_64;
+#else
+OUTPUT_ARCH(i386:x86-64)
+ENTRY(phys_startup_64)
+jiffies_64 = jiffies;
+#endif
+
+PHDRS {
+        text PT_LOAD FLAGS(5);          /* R_E */
+        data PT_LOAD FLAGS(7);          /* RWE */
+#ifdef CONFIG_X86_64
+        user PT_LOAD FLAGS(7);          /* RWE */
+        data.init PT_LOAD FLAGS(7);     /* RWE */
+#ifdef CONFIG_SMP
+        percpu PT_LOAD FLAGS(7);        /* RWE */
+#endif
+        data.init2 PT_LOAD FLAGS(7);    /* RWE */
+#endif
+        note PT_NOTE FLAGS(0);          /* ___ */
+}
+
+SECTIONS
+{
+#ifdef CONFIG_X86_32
+        . = LOAD_OFFSET + LOAD_PHYSICAL_ADDR;
+        phys_startup_32 = startup_32 - LOAD_OFFSET;
+#else
+        . = __START_KERNEL;
+        phys_startup_64 = startup_64 - LOAD_OFFSET;
+#endif
+
+        /* Text and read-only data */
+
+        /* bootstrapping code */
+        .text.head : AT(ADDR(.text.head) - LOAD_OFFSET) {
+                _text = .;
+                *(.text.head)
+        } :text = 0x9090
+
+        /* The rest of the text */
+        .text :  AT(ADDR(.text) - LOAD_OFFSET) {
+#ifdef CONFIG_X86_32
+                /* not really needed, already page aligned */
+                . = ALIGN(PAGE_SIZE);
+                *(.text.page_aligned)
+#endif
+                . = ALIGN(8);
+                _stext = .;
+                TEXT_TEXT
+                SCHED_TEXT
+                LOCK_TEXT
+                KPROBES_TEXT
+                IRQENTRY_TEXT
+                *(.fixup)
+                *(.gnu.warning)
+                /* End of text section */
+                _etext = .;
+        } :text = 0x9090
+
+        NOTES :text :note
+
+        /* Exception table */
+        . = ALIGN(16);
+        __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
+                __start___ex_table = .;
+                *(__ex_table)
+                __stop___ex_table = .;
+        } :text = 0x9090
+
+        RODATA
+
+        /* Data */
+        . = ALIGN(PAGE_SIZE);
+        .data : AT(ADDR(.data) - LOAD_OFFSET) {
+                DATA_DATA
+                CONSTRUCTORS
+
+#ifdef CONFIG_X86_64
+                /* End of data section */
+                _edata = .;
+#endif
+        } :data
+
+#ifdef CONFIG_X86_32
+        /* 32 bit has nosave before _edata */
+        . = ALIGN(PAGE_SIZE);
+        .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) {
+                __nosave_begin = .;
+                *(.data.nosave)
+                . = ALIGN(PAGE_SIZE);
+                __nosave_end = .;
+        }
+#endif
+
+        . = ALIGN(PAGE_SIZE);
+        .data.page_aligned : AT(ADDR(.data.page_aligned) - LOAD_OFFSET) {
+                *(.data.page_aligned)
+                *(.data.idt)
+        }
+
+#ifdef CONFIG_X86_32
+        . = ALIGN(32);
+#else
+        . = ALIGN(PAGE_SIZE);
+        . = ALIGN(CONFIG_X86_L1_CACHE_BYTES);
+#endif
+        .data.cacheline_aligned :
+                AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET) {
+                *(.data.cacheline_aligned)
+        }
+
+        /* rarely changed data like cpu maps */
+#ifdef CONFIG_X86_32
+        . = ALIGN(32);
+#else
+        . = ALIGN(CONFIG_X86_INTERNODE_CACHE_BYTES);
+#endif
+        .data.read_mostly : AT(ADDR(.data.read_mostly) - LOAD_OFFSET) {
+                *(.data.read_mostly)
+
+#ifdef CONFIG_X86_32
+                /* End of data section */
+                _edata = .;
+#endif
+        }
+
+#ifdef CONFIG_X86_64
+
+#define VSYSCALL_ADDR (-10*1024*1024)
+#define VSYSCALL_PHYS_ADDR ((LOADADDR(.data.read_mostly) + \
+                            SIZEOF(.data.read_mostly) + 4095) & ~(4095))
+#define VSYSCALL_VIRT_ADDR ((ADDR(.data.read_mostly) + \
+                            SIZEOF(.data.read_mostly) + 4095) & ~(4095))
+
+#define VLOAD_OFFSET (VSYSCALL_ADDR - VSYSCALL_PHYS_ADDR)
+#define VLOAD(x) (ADDR(x) - VLOAD_OFFSET)
+
+#define VVIRT_OFFSET (VSYSCALL_ADDR - VSYSCALL_VIRT_ADDR)
+#define VVIRT(x) (ADDR(x) - VVIRT_OFFSET)
+
+        . = VSYSCALL_ADDR;
+        .vsyscall_0 : AT(VSYSCALL_PHYS_ADDR) {
+                *(.vsyscall_0)
+        } :user
+
+        __vsyscall_0 = VSYSCALL_VIRT_ADDR;
+
+        . = ALIGN(CONFIG_X86_L1_CACHE_BYTES);
+        .vsyscall_fn : AT(VLOAD(.vsyscall_fn)) {
+                *(.vsyscall_fn)
+        }
+
+        . = ALIGN(CONFIG_X86_L1_CACHE_BYTES);
+        .vsyscall_gtod_data : AT(VLOAD(.vsyscall_gtod_data)) {
+                *(.vsyscall_gtod_data)
+        }
+
+        vsyscall_gtod_data = VVIRT(.vsyscall_gtod_data);
+        .vsyscall_clock : AT(VLOAD(.vsyscall_clock)) {
+                *(.vsyscall_clock)
+        }
+        vsyscall_clock = VVIRT(.vsyscall_clock);
+
+
+        .vsyscall_1 ADDR(.vsyscall_0) + 1024: AT(VLOAD(.vsyscall_1)) {
+                *(.vsyscall_1)
+        }
+        .vsyscall_2 ADDR(.vsyscall_0) + 2048: AT(VLOAD(.vsyscall_2)) {
+                *(.vsyscall_2)
+        }
+
+        .vgetcpu_mode : AT(VLOAD(.vgetcpu_mode)) {
+                *(.vgetcpu_mode)
+        }
+        vgetcpu_mode = VVIRT(.vgetcpu_mode);
+
+        . = ALIGN(CONFIG_X86_L1_CACHE_BYTES);
+        .jiffies : AT(VLOAD(.jiffies)) {
+                *(.jiffies)
+        }
+        jiffies = VVIRT(.jiffies);
+
+        .vsyscall_3 ADDR(.vsyscall_0) + 3072: AT(VLOAD(.vsyscall_3)) {
+                *(.vsyscall_3)
+        }
+
+        . = VSYSCALL_VIRT_ADDR + PAGE_SIZE;
+
+#undef VSYSCALL_ADDR
+#undef VSYSCALL_PHYS_ADDR
+#undef VSYSCALL_VIRT_ADDR
+#undef VLOAD_OFFSET
+#undef VLOAD
+#undef VVIRT_OFFSET
+#undef VVIRT
+
+#endif /* CONFIG_X86_64 */
+
+        /* init_task */
+        . = ALIGN(THREAD_SIZE);
+        .data.init_task : AT(ADDR(.data.init_task) - LOAD_OFFSET) {
+                *(.data.init_task)
+        }
+#ifdef CONFIG_X86_64
+         :data.init
+#endif
+
+        /*
+         * smp_locks might be freed after init
+         * start/end must be page aligned
+         */
+        . = ALIGN(PAGE_SIZE);
+        .smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) {
+                __smp_locks = .;
+                *(.smp_locks)
+                __smp_locks_end = .;
+                . = ALIGN(PAGE_SIZE);
+        }
+
+        /* Init code and data - will be freed after init */
+        . = ALIGN(PAGE_SIZE);
+        .init.text : AT(ADDR(.init.text) - LOAD_OFFSET) {
+                __init_begin = .; /* paired with __init_end */
+                _sinittext = .;
+                INIT_TEXT
+                _einittext = .;
+        }
+
+        .init.data : AT(ADDR(.init.data) - LOAD_OFFSET) {
+                INIT_DATA
+        }
+
+        . = ALIGN(16);
+        .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET) {
+                __setup_start = .;
+                *(.init.setup)
+                __setup_end = .;
+        }
+        .initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET) {
+                __initcall_start = .;
+                INITCALLS
+                __initcall_end = .;
+        }
+
+        .con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET) {
+                __con_initcall_start = .;
+                *(.con_initcall.init)
+                __con_initcall_end = .;
+        }
+
+        .x86_cpu_dev.init : AT(ADDR(.x86_cpu_dev.init) - LOAD_OFFSET) {
+                __x86_cpu_dev_start = .;
+                *(.x86_cpu_dev.init)
+                __x86_cpu_dev_end = .;
+        }
+
+        SECURITY_INIT
+
+        . = ALIGN(8);
+        .parainstructions : AT(ADDR(.parainstructions) - LOAD_OFFSET) {
+                __parainstructions = .;
+                *(.parainstructions)
+                __parainstructions_end = .;
+        }
+
+        . = ALIGN(8);
+        .altinstructions : AT(ADDR(.altinstructions) - LOAD_OFFSET) {
+                __alt_instructions = .;
+                *(.altinstructions)
+                __alt_instructions_end = .;
+        }
+
+        .altinstr_replacement : AT(ADDR(.altinstr_replacement) - LOAD_OFFSET) {
+                *(.altinstr_replacement)
+        }
+
+        /*
+         * .exit.text is discard at runtime, not link time, to deal with
+         *  references from .altinstructions and .eh_frame
+         */
+        .exit.text : AT(ADDR(.exit.text) - LOAD_OFFSET) {
+                EXIT_TEXT
+        }
+
+        .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) {
+                EXIT_DATA
+        }
+
+#ifdef CONFIG_BLK_DEV_INITRD
+        . = ALIGN(PAGE_SIZE);
+        .init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET) {
+                __initramfs_start = .;
+                *(.init.ramfs)
+                __initramfs_end = .;
+        }
+#endif
+
+#if defined(CONFIG_X86_64) && defined(CONFIG_SMP)
+        /*
+         * percpu offsets are zero-based on SMP.  PERCPU_VADDR() changes the
+         * output PHDR, so the next output section - __data_nosave - should
+         * start another section data.init2.  Also, pda should be at the head of
+         * percpu area.  Preallocate it and define the percpu offset symbol
+         * so that it can be accessed as a percpu variable.
+         */
+        . = ALIGN(PAGE_SIZE);
+        PERCPU_VADDR(0, :percpu)
+#else
+        PERCPU(PAGE_SIZE)
+#endif
+
+        . = ALIGN(PAGE_SIZE);
+
+        /* freed after init ends here */
+        .init.end : AT(ADDR(.init.end) - LOAD_OFFSET) {
+                __init_end = .;
+        }
+
+#ifdef CONFIG_X86_64
+        .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) {
+                . = ALIGN(PAGE_SIZE);
+                __nosave_begin = .;
+                *(.data.nosave)
+                . = ALIGN(PAGE_SIZE);
+                __nosave_end = .;
+        } :data.init2
+        /* use another section data.init2, see PERCPU_VADDR() above */
+#endif
+
+        /* BSS */
+        . = ALIGN(PAGE_SIZE);
+        .bss : AT(ADDR(.bss) - LOAD_OFFSET) {
+                __bss_start = .;
+                *(.bss.page_aligned)
+                *(.bss)
+                . = ALIGN(4);
+                __bss_stop = .;
+        }
+
+        . = ALIGN(PAGE_SIZE);
+        .brk : AT(ADDR(.brk) - LOAD_OFFSET) {
+                __brk_base = .;
+                . += 64 * 1024;         /* 64k alignment slop space */
+                *(.brk_reservation)     /* areas brk users have reserved */
+                __brk_limit = .;
+        }
+
+        .end : AT(ADDR(.end) - LOAD_OFFSET) {
+                _end = .;
+        }
+
+        /* Sections to be discarded */
+        /DISCARD/ : {
+                *(.exitcall.exit)
+                *(.eh_frame)
+                *(.discard)
+        }
+
+        STABS_DEBUG
+        DWARF_DEBUG
+}
+
+
+#ifdef CONFIG_X86_32
+ASSERT((_end - LOAD_OFFSET <= KERNEL_IMAGE_SIZE),
+        "kernel image bigger than KERNEL_IMAGE_SIZE")
+#else
+/*
+ * Per-cpu symbols which need to be offset from __per_cpu_load
+ * for the boot processor.
+ */
+#define INIT_PER_CPU(x) init_per_cpu__##x = per_cpu__##x + __per_cpu_load
+INIT_PER_CPU(gdt_page);
+INIT_PER_CPU(irq_stack_union);
+
+/*
+ * Build-time check on the image size:
+ */
+ASSERT((_end - _text <= KERNEL_IMAGE_SIZE),
+        "kernel image bigger than KERNEL_IMAGE_SIZE")
+
+#ifdef CONFIG_SMP
+ASSERT((per_cpu__irq_stack_union == 0),
+        "irq_stack_union is not at start of per-cpu area");
+#endif
+
+#endif /* CONFIG_X86_32 */
+
+#ifdef CONFIG_KEXEC
+#include <asm/kexec.h>
+
+ASSERT(kexec_control_code_size <= KEXEC_CONTROL_CODE_MAX_SIZE,
+       "kexec control code size is too big")
+#endif
+
diff --git a/arch/x86/kernel/vmlinux_32.lds.S b/arch/x86/kernel/vmlinux_32.lds.S
deleted file mode 100644
index 62ad500d55f3..000000000000
--- a/arch/x86/kernel/vmlinux_32.lds.S
+++ /dev/null
@@ -1,229 +0,0 @@
-/* ld script to make i386 Linux kernel
- * Written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>;
- *
- * Don't define absolute symbols until and unless you know that symbol
- * value is should remain constant even if kernel image is relocated
- * at run time. Absolute symbols are not relocated. If symbol value should
- * change if kernel is relocated, make the symbol section relative and
- * put it inside the section definition.
- */
-
-#define LOAD_OFFSET __PAGE_OFFSET
-
-#include <asm-generic/vmlinux.lds.h>
-#include <asm/thread_info.h>
-#include <asm/page_types.h>
-#include <asm/cache.h>
-#include <asm/boot.h>
-
-OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
-OUTPUT_ARCH(i386)
-ENTRY(phys_startup_32)
-jiffies = jiffies_64;
-
-PHDRS {
-        text PT_LOAD FLAGS(5);  /* R_E */
-        data PT_LOAD FLAGS(7);  /* RWE */
-        note PT_NOTE FLAGS(0);  /* ___ */
-}
-SECTIONS
-{
-  . = LOAD_OFFSET + LOAD_PHYSICAL_ADDR;
-  phys_startup_32 = startup_32 - LOAD_OFFSET;
-
-  .text.head : AT(ADDR(.text.head) - LOAD_OFFSET) {
-        _text = .;                      /* Text and read-only data */
-        *(.text.head)
-  } :text = 0x9090
-
-  /* read-only */
-  .text : AT(ADDR(.text) - LOAD_OFFSET) {
-        . = ALIGN(PAGE_SIZE); /* not really needed, already page aligned */
-        *(.text.page_aligned)
-        TEXT_TEXT
-        SCHED_TEXT
-        LOCK_TEXT
-        KPROBES_TEXT
-        IRQENTRY_TEXT
-        *(.fixup)
-        *(.gnu.warning)
-        _etext = .;                     /* End of text section */
-  } :text = 0x9090
-
-  NOTES :text :note
-
-  . = ALIGN(16);                /* Exception table */
-  __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
-        __start___ex_table = .;
-         *(__ex_table)
-        __stop___ex_table = .;
-  } :text = 0x9090
-
-  RODATA
-
-  /* writeable */
-  . = ALIGN(PAGE_SIZE);
-  .data : AT(ADDR(.data) - LOAD_OFFSET) {       /* Data */
-        DATA_DATA
-        CONSTRUCTORS
-        } :data
-
-  . = ALIGN(PAGE_SIZE);
-  .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) {
-        __nosave_begin = .;
-        *(.data.nosave)
-        . = ALIGN(PAGE_SIZE);
-        __nosave_end = .;
-  }
-
-  . = ALIGN(PAGE_SIZE);
-  .data.page_aligned : AT(ADDR(.data.page_aligned) - LOAD_OFFSET) {
-        *(.data.page_aligned)
-        *(.data.idt)
-  }
-
-  . = ALIGN(32);
-  .data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET) {
-        *(.data.cacheline_aligned)
-  }
-
-  /* rarely changed data like cpu maps */
-  . = ALIGN(32);
-  .data.read_mostly : AT(ADDR(.data.read_mostly) - LOAD_OFFSET) {
-        *(.data.read_mostly)
-        _edata = .;             /* End of data section */
-  }
-
-  . = ALIGN(THREAD_SIZE);       /* init_task */
-  .data.init_task : AT(ADDR(.data.init_task) - LOAD_OFFSET) {
-        *(.data.init_task)
-  }
-
-  /* might get freed after init */
-  . = ALIGN(PAGE_SIZE);
-  .smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) {
-        __smp_locks = .;
-        *(.smp_locks)
-        __smp_locks_end = .;
-  }
-  /* will be freed after init
-   * Following ALIGN() is required to make sure no other data falls on the
-   * same page where __smp_alt_end is pointing as that page might be freed
-   * after boot. Always make sure that ALIGN() directive is present after
-   * the section which contains __smp_alt_end.
-   */
-  . = ALIGN(PAGE_SIZE);
-
-  /* will be freed after init */
-  . = ALIGN(PAGE_SIZE);         /* Init code and data */
-  .init.text : AT(ADDR(.init.text) - LOAD_OFFSET) {
-        __init_begin = .;
-        _sinittext = .;
-        INIT_TEXT
-        _einittext = .;
-  }
-  .init.data : AT(ADDR(.init.data) - LOAD_OFFSET) {
-        INIT_DATA
-  }
-  . = ALIGN(16);
-  .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET) {
-        __setup_start = .;
-        *(.init.setup)
-        __setup_end = .;
-   }
-  .initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET) {
-        __initcall_start = .;
-        INITCALLS
-        __initcall_end = .;
-  }
-  .con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET) {
-        __con_initcall_start = .;
-        *(.con_initcall.init)
-        __con_initcall_end = .;
-  }
-  .x86_cpu_dev.init : AT(ADDR(.x86_cpu_dev.init) - LOAD_OFFSET) {
-        __x86_cpu_dev_start = .;
-        *(.x86_cpu_dev.init)
-        __x86_cpu_dev_end = .;
-  }
-  SECURITY_INIT
-  . = ALIGN(4);
-  .altinstructions : AT(ADDR(.altinstructions) - LOAD_OFFSET) {
-        __alt_instructions = .;
-        *(.altinstructions)
-        __alt_instructions_end = .;
-  }
-  .altinstr_replacement : AT(ADDR(.altinstr_replacement) - LOAD_OFFSET) {
-        *(.altinstr_replacement)
-  }
-  . = ALIGN(4);
-  .parainstructions : AT(ADDR(.parainstructions) - LOAD_OFFSET) {
-        __parainstructions = .;
-        *(.parainstructions)
-        __parainstructions_end = .;
-  }
-  /* .exit.text is discard at runtime, not link time, to deal with references
-     from .altinstructions and .eh_frame */
-  .exit.text : AT(ADDR(.exit.text) - LOAD_OFFSET) {
-        EXIT_TEXT
-  }
-  .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) {
-        EXIT_DATA
-  }
-#if defined(CONFIG_BLK_DEV_INITRD)
-  . = ALIGN(PAGE_SIZE);
-  .init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET) {
-        __initramfs_start = .;
-        *(.init.ramfs)
-        __initramfs_end = .;
-  }
-#endif
-  PERCPU(PAGE_SIZE)
-  . = ALIGN(PAGE_SIZE);
-  /* freed after init ends here */
-
-  .bss : AT(ADDR(.bss) - LOAD_OFFSET) {
-        __init_end = .;
-        __bss_start = .;                /* BSS */
-        *(.bss.page_aligned)
-        *(.bss)
-        . = ALIGN(4);
-        __bss_stop = .;
-  }
-
-  .brk : AT(ADDR(.brk) - LOAD_OFFSET) {
-        . = ALIGN(PAGE_SIZE);
-        __brk_base = . ;
-        . += 64 * 1024 ;        /* 64k alignment slop space */
-        *(.brk_reservation)     /* areas brk users have reserved */
-        __brk_limit = . ;
-  }
-
-  .end : AT(ADDR(.end) - LOAD_OFFSET) {
-        _end = . ;
-  }
-
-  /* Sections to be discarded */
-  /DISCARD/ : {
-        *(.exitcall.exit)
-        *(.discard)
-        }
-
-  STABS_DEBUG
-
-  DWARF_DEBUG
-}
-
-/*
- * Build-time check on the image size:
- */
-ASSERT((_end - LOAD_OFFSET <= KERNEL_IMAGE_SIZE),
-        "kernel image bigger than KERNEL_IMAGE_SIZE")
-
-#ifdef CONFIG_KEXEC
-/* Link time checks */
-#include <asm/kexec.h>
-
-ASSERT(kexec_control_code_size <= KEXEC_CONTROL_CODE_MAX_SIZE,
-       "kexec control code size is too big")
-#endif
diff --git a/arch/x86/kernel/vmlinux_64.lds.S b/arch/x86/kernel/vmlinux_64.lds.S
deleted file mode 100644
index c8742507b030..000000000000
--- a/arch/x86/kernel/vmlinux_64.lds.S
+++ /dev/null
@@ -1,298 +0,0 @@
-/* ld script to make x86-64 Linux kernel
- * Written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>;
- */
-
-#define LOAD_OFFSET __START_KERNEL_map
-
-#include <asm-generic/vmlinux.lds.h>
-#include <asm/asm-offsets.h>
-#include <asm/page_types.h>
-
-#undef i386     /* in case the preprocessor is a 32bit one */
-
-OUTPUT_FORMAT("elf64-x86-64", "elf64-x86-64", "elf64-x86-64")
-OUTPUT_ARCH(i386:x86-64)
-ENTRY(phys_startup_64)
-jiffies_64 = jiffies;
-PHDRS {
-        text PT_LOAD FLAGS(5);  /* R_E */
-        data PT_LOAD FLAGS(7);  /* RWE */
-        user PT_LOAD FLAGS(7);  /* RWE */
-        data.init PT_LOAD FLAGS(7);     /* RWE */
-#ifdef CONFIG_SMP
-        percpu PT_LOAD FLAGS(7);        /* RWE */
-#endif
-        data.init2 PT_LOAD FLAGS(7);    /* RWE */
-        note PT_NOTE FLAGS(0);  /* ___ */
-}
-SECTIONS
-{
-  . = __START_KERNEL;
-  phys_startup_64 = startup_64 - LOAD_OFFSET;
-  .text :  AT(ADDR(.text) - LOAD_OFFSET) {
-        _text = .;                      /* Text and read-only data */
-        /* First the code that has to be first for bootstrapping */
-        *(.text.head)
-        _stext = .;
-        /* Then the rest */
-        TEXT_TEXT
-        SCHED_TEXT
-        LOCK_TEXT
-        KPROBES_TEXT
-        IRQENTRY_TEXT
-        *(.fixup)
-        *(.gnu.warning)
-        _etext = .;             /* End of text section */
-  } :text = 0x9090
-
-  NOTES :text :note
-
-  . = ALIGN(16);                /* Exception table */
-  __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
-        __start___ex_table = .;
-         *(__ex_table)
-        __stop___ex_table = .;
-  } :text = 0x9090
-
-  RODATA
-
-  . = ALIGN(PAGE_SIZE);         /* Align data segment to page size boundary */
-                                /* Data */
-  .data : AT(ADDR(.data) - LOAD_OFFSET) {
-        DATA_DATA
-        CONSTRUCTORS
-        _edata = .;                     /* End of data section */
-        } :data
-
-
-  .data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET) {
-        . = ALIGN(PAGE_SIZE);
-        . = ALIGN(CONFIG_X86_L1_CACHE_BYTES);
-        *(.data.cacheline_aligned)
-  }
-  . = ALIGN(CONFIG_X86_INTERNODE_CACHE_BYTES);
-  .data.read_mostly : AT(ADDR(.data.read_mostly) - LOAD_OFFSET) {
-        *(.data.read_mostly)
-  }
-
-#define VSYSCALL_ADDR (-10*1024*1024)
-#define VSYSCALL_PHYS_ADDR ((LOADADDR(.data.read_mostly) + SIZEOF(.data.read_mostly) + 4095) & ~(4095))
-#define VSYSCALL_VIRT_ADDR ((ADDR(.data.read_mostly) + SIZEOF(.data.read_mostly) + 4095) & ~(4095))
-
-#define VLOAD_OFFSET (VSYSCALL_ADDR - VSYSCALL_PHYS_ADDR)
-#define VLOAD(x) (ADDR(x) - VLOAD_OFFSET)
-
-#define VVIRT_OFFSET (VSYSCALL_ADDR - VSYSCALL_VIRT_ADDR)
-#define VVIRT(x) (ADDR(x) - VVIRT_OFFSET)
-
-  . = VSYSCALL_ADDR;
-  .vsyscall_0 :  AT(VSYSCALL_PHYS_ADDR) { *(.vsyscall_0) } :user
-  __vsyscall_0 = VSYSCALL_VIRT_ADDR;
-
-  . = ALIGN(CONFIG_X86_L1_CACHE_BYTES);
-  .vsyscall_fn : AT(VLOAD(.vsyscall_fn)) { *(.vsyscall_fn) }
-  . = ALIGN(CONFIG_X86_L1_CACHE_BYTES);
-  .vsyscall_gtod_data : AT(VLOAD(.vsyscall_gtod_data))
-                { *(.vsyscall_gtod_data) }
-  vsyscall_gtod_data = VVIRT(.vsyscall_gtod_data);
-  .vsyscall_clock : AT(VLOAD(.vsyscall_clock))
-                { *(.vsyscall_clock) }
-  vsyscall_clock = VVIRT(.vsyscall_clock);
-
-
-  .vsyscall_1 ADDR(.vsyscall_0) + 1024: AT(VLOAD(.vsyscall_1))
-                { *(.vsyscall_1) }
-  .vsyscall_2 ADDR(.vsyscall_0) + 2048: AT(VLOAD(.vsyscall_2))
-                { *(.vsyscall_2) }
-
-  .vgetcpu_mode : AT(VLOAD(.vgetcpu_mode)) { *(.vgetcpu_mode) }
-  vgetcpu_mode = VVIRT(.vgetcpu_mode);
-
-  . = ALIGN(CONFIG_X86_L1_CACHE_BYTES);
-  .jiffies : AT(VLOAD(.jiffies)) { *(.jiffies) }
-  jiffies = VVIRT(.jiffies);
-
-  .vsyscall_3 ADDR(.vsyscall_0) + 3072: AT(VLOAD(.vsyscall_3))
-                { *(.vsyscall_3) }
-
-  . = VSYSCALL_VIRT_ADDR + PAGE_SIZE;
-
-#undef VSYSCALL_ADDR
-#undef VSYSCALL_PHYS_ADDR
-#undef VSYSCALL_VIRT_ADDR
-#undef VLOAD_OFFSET
-#undef VLOAD
-#undef VVIRT_OFFSET
-#undef VVIRT
-
-  .data.init_task : AT(ADDR(.data.init_task) - LOAD_OFFSET) {
-        . = ALIGN(THREAD_SIZE); /* init_task */
-        *(.data.init_task)
-  }:data.init
-
-  .data.page_aligned : AT(ADDR(.data.page_aligned) - LOAD_OFFSET) {
-        . = ALIGN(PAGE_SIZE);
-        *(.data.page_aligned)
-  }
-
-  .smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) {
-        /* might get freed after init */
-        . = ALIGN(PAGE_SIZE);
-        __smp_alt_begin = .;
-        __smp_locks = .;
-        *(.smp_locks)
-        __smp_locks_end = .;
-        . = ALIGN(PAGE_SIZE);
-        __smp_alt_end = .;
-  }
-
-  . = ALIGN(PAGE_SIZE);         /* Init code and data */
-  __init_begin = .;     /* paired with __init_end */
-  .init.text : AT(ADDR(.init.text) - LOAD_OFFSET) {
-        _sinittext = .;
-        INIT_TEXT
-        _einittext = .;
-  }
-  .init.data : AT(ADDR(.init.data) - LOAD_OFFSET) {
-        __initdata_begin = .;
-        INIT_DATA
-        __initdata_end = .;
-   }
-
-  .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET) {
-        . = ALIGN(16);
-        __setup_start = .;
-        *(.init.setup)
-        __setup_end = .;
-  }
-  .initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET) {
-        __initcall_start = .;
-        INITCALLS
-        __initcall_end = .;
-  }
-  .con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET) {
-        __con_initcall_start = .;
-        *(.con_initcall.init)
-        __con_initcall_end = .;
-  }
-  .x86_cpu_dev.init : AT(ADDR(.x86_cpu_dev.init) - LOAD_OFFSET) {
-        __x86_cpu_dev_start = .;
-        *(.x86_cpu_dev.init)
-        __x86_cpu_dev_end = .;
-  }
-  SECURITY_INIT
-
-  . = ALIGN(8);
-  .parainstructions : AT(ADDR(.parainstructions) - LOAD_OFFSET) {
-        __parainstructions = .;
-       *(.parainstructions)
-        __parainstructions_end = .;
-  }
-
-  .altinstructions : AT(ADDR(.altinstructions) - LOAD_OFFSET) {
-        . = ALIGN(8);
-        __alt_instructions = .;
-        *(.altinstructions)
-        __alt_instructions_end = .;
-  }
-  .altinstr_replacement : AT(ADDR(.altinstr_replacement) - LOAD_OFFSET) {
-        *(.altinstr_replacement)
-  }
-  /* .exit.text is discard at runtime, not link time, to deal with references
-     from .altinstructions and .eh_frame */
-  .exit.text : AT(ADDR(.exit.text) - LOAD_OFFSET) {
-        EXIT_TEXT
-  }
-  .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) {
-        EXIT_DATA
-  }
-
-#ifdef CONFIG_BLK_DEV_INITRD
-  . = ALIGN(PAGE_SIZE);
-  .init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET) {
-        __initramfs_start = .;
-        *(.init.ramfs)
-        __initramfs_end = .;
-  }
-#endif
-
-#ifdef CONFIG_SMP
-  /*
-   * percpu offsets are zero-based on SMP.  PERCPU_VADDR() changes the
-   * output PHDR, so the next output section - __data_nosave - should
-   * start another section data.init2.  Also, pda should be at the head of
-   * percpu area.  Preallocate it and define the percpu offset symbol
-   * so that it can be accessed as a percpu variable.
-   */
-  . = ALIGN(PAGE_SIZE);
-  PERCPU_VADDR(0, :percpu)
-#else
-  PERCPU(PAGE_SIZE)
-#endif
-
-  . = ALIGN(PAGE_SIZE);
-  __init_end = .;
-
-  .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) {
-        . = ALIGN(PAGE_SIZE);
-        __nosave_begin = .;
-        *(.data.nosave)
-        . = ALIGN(PAGE_SIZE);
-        __nosave_end = .;
-  } :data.init2 /* use another section data.init2, see PERCPU_VADDR() above */
-
-  .bss : AT(ADDR(.bss) - LOAD_OFFSET) {
-        . = ALIGN(PAGE_SIZE);
-        __bss_start = .;                /* BSS */
-        *(.bss.page_aligned)
-        *(.bss)
-        __bss_stop = .;
-  }
-
-  .brk : AT(ADDR(.brk) - LOAD_OFFSET) {
-        . = ALIGN(PAGE_SIZE);
-        __brk_base = . ;
-        . += 64 * 1024 ;        /* 64k alignment slop space */
-        *(.brk_reservation)     /* areas brk users have reserved */
-        __brk_limit = . ;
-  }
-
-  _end = . ;
-
-  /* Sections to be discarded */
-  /DISCARD/ : {
-        *(.exitcall.exit)
-        *(.eh_frame)
-        *(.discard)
-        }
-
-  STABS_DEBUG
-
-  DWARF_DEBUG
-}
-
- /*
-  * Per-cpu symbols which need to be offset from __per_cpu_load
-  * for the boot processor.
-  */
-#define INIT_PER_CPU(x) init_per_cpu__##x = per_cpu__##x + __per_cpu_load
-INIT_PER_CPU(gdt_page);
-INIT_PER_CPU(irq_stack_union);
-
-/*
- * Build-time check on the image size:
- */
-ASSERT((_end - _text <= KERNEL_IMAGE_SIZE),
-        "kernel image bigger than KERNEL_IMAGE_SIZE")
-
-#ifdef CONFIG_SMP
-ASSERT((per_cpu__irq_stack_union == 0),
-        "irq_stack_union is not at start of per-cpu area");
-#endif
-
-#ifdef CONFIG_KEXEC
-#include <asm/kexec.h>
-
-ASSERT(kexec_control_code_size <= KEXEC_CONTROL_CODE_MAX_SIZE,
-       "kexec control code size is too big")
-#endif
diff --git a/arch/x86/kernel/vsyscall_64.c b/arch/x86/kernel/vsyscall_64.c
index 44153afc9067..25ee06a80aad 100644
--- a/arch/x86/kernel/vsyscall_64.c
+++ b/arch/x86/kernel/vsyscall_64.c
@@ -132,15 +132,7 @@ static __always_inline void do_vgettimeofday(struct timeval * tv)
                         return;
                 }
 
-                /*
-                 * Surround the RDTSC by barriers, to make sure it's not
-                 * speculated to outside the seqlock critical section and
-                 * does not cause time warps:
-                 */
-                rdtsc_barrier();
                 now = vread();
-                rdtsc_barrier();
-
                 base = __vsyscall_gtod_data.clock.cycle_last;
                 mask = __vsyscall_gtod_data.clock.mask;
                 mult = __vsyscall_gtod_data.clock.mult;
diff --git a/arch/x86/kvm/Kconfig b/arch/x86/kvm/Kconfig
index a58504ea78cc..8600a09e0c6c 100644
--- a/arch/x86/kvm/Kconfig
+++ b/arch/x86/kvm/Kconfig
@@ -50,6 +50,9 @@ config KVM_INTEL
           Provides support for KVM on Intel processors equipped with the VT
           extensions.
 
+          To compile this as a module, choose M here: the module
+          will be called kvm-intel.
+
 config KVM_AMD
         tristate "KVM for AMD processors support"
         depends on KVM
@@ -57,6 +60,9 @@ config KVM_AMD
           Provides support for KVM on AMD processors equipped with the AMD-V
           (SVM) extensions.
 
+          To compile this as a module, choose M here: the module
+          will be called kvm-amd.
+
 config KVM_TRACE
         bool "KVM trace support"
         depends on KVM && SYSFS
diff --git a/arch/x86/kvm/Makefile b/arch/x86/kvm/Makefile
index d3ec292f00f2..b43c4efafe80 100644
--- a/arch/x86/kvm/Makefile
+++ b/arch/x86/kvm/Makefile
@@ -14,7 +14,7 @@ endif
 EXTRA_CFLAGS += -Ivirt/kvm -Iarch/x86/kvm
 
 kvm-objs := $(common-objs) x86.o mmu.o x86_emulate.o i8259.o irq.o lapic.o \
-        i8254.o
+        i8254.o timer.o
 obj-$(CONFIG_KVM) += kvm.o
 kvm-intel-objs = vmx.o
 obj-$(CONFIG_KVM_INTEL) += kvm-intel.o
diff --git a/arch/x86/kvm/i8254.c b/arch/x86/kvm/i8254.c
index c13bb92d3157..4d6f0d293ee2 100644
--- a/arch/x86/kvm/i8254.c
+++ b/arch/x86/kvm/i8254.c
@@ -98,6 +98,37 @@ static int pit_get_gate(struct kvm *kvm, int channel)
         return kvm->arch.vpit->pit_state.channels[channel].gate;
 }
 
+static s64 __kpit_elapsed(struct kvm *kvm)
+{
+        s64 elapsed;
+        ktime_t remaining;
+        struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state;
+
+        /*
+         * The Counter does not stop when it reaches zero. In
+         * Modes 0, 1, 4, and 5 the Counter ``wraps around'' to
+         * the highest count, either FFFF hex for binary counting
+         * or 9999 for BCD counting, and continues counting.
+         * Modes 2 and 3 are periodic; the Counter reloads
+         * itself with the initial count and continues counting
+         * from there.
+         */
+        remaining = hrtimer_expires_remaining(&ps->pit_timer.timer);
+        elapsed = ps->pit_timer.period - ktime_to_ns(remaining);
+        elapsed = mod_64(elapsed, ps->pit_timer.period);
+
+        return elapsed;
+}
+
+static s64 kpit_elapsed(struct kvm *kvm, struct kvm_kpit_channel_state *c,
+                        int channel)
+{
+        if (channel == 0)
+                return __kpit_elapsed(kvm);
+
+        return ktime_to_ns(ktime_sub(ktime_get(), c->count_load_time));
+}
+
 static int pit_get_count(struct kvm *kvm, int channel)
 {
         struct kvm_kpit_channel_state *c =
@@ -107,7 +138,7 @@ static int pit_get_count(struct kvm *kvm, int channel)
 
         WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
 
-        t = ktime_to_ns(ktime_sub(ktime_get(), c->count_load_time));
+        t = kpit_elapsed(kvm, c, channel);
         d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC);
 
         switch (c->mode) {
@@ -137,7 +168,7 @@ static int pit_get_out(struct kvm *kvm, int channel)
 
         WARN_ON(!mutex_is_locked(&kvm->arch.vpit->pit_state.lock));
 
-        t = ktime_to_ns(ktime_sub(ktime_get(), c->count_load_time));
+        t = kpit_elapsed(kvm, c, channel);
         d = muldiv64(t, KVM_PIT_FREQ, NSEC_PER_SEC);
 
         switch (c->mode) {
@@ -193,28 +224,6 @@ static void pit_latch_status(struct kvm *kvm, int channel)
         }
 }
 
-static int __pit_timer_fn(struct kvm_kpit_state *ps)
-{
-        struct kvm_vcpu *vcpu0 = ps->pit->kvm->vcpus[0];
-        struct kvm_kpit_timer *pt = &ps->pit_timer;
-
-        if (!atomic_inc_and_test(&pt->pending))
-                set_bit(KVM_REQ_PENDING_TIMER, &vcpu0->requests);
-
-        if (!pt->reinject)
-                atomic_set(&pt->pending, 1);
-
-        if (vcpu0 && waitqueue_active(&vcpu0->wq))
-                wake_up_interruptible(&vcpu0->wq);
-
-        hrtimer_add_expires_ns(&pt->timer, pt->period);
-        pt->scheduled = hrtimer_get_expires_ns(&pt->timer);
-        if (pt->period)
-                ps->channels[0].count_load_time = ktime_get();
-
-        return (pt->period == 0 ? 0 : 1);
-}
-
 int pit_has_pending_timer(struct kvm_vcpu *vcpu)
 {
         struct kvm_pit *pit = vcpu->kvm->arch.vpit;
@@ -235,21 +244,6 @@ static void kvm_pit_ack_irq(struct kvm_irq_ack_notifier *kian)
         spin_unlock(&ps->inject_lock);
 }
 
-static enum hrtimer_restart pit_timer_fn(struct hrtimer *data)
-{
-        struct kvm_kpit_state *ps;
-        int restart_timer = 0;
-
-        ps = container_of(data, struct kvm_kpit_state, pit_timer.timer);
-
-        restart_timer = __pit_timer_fn(ps);
-
-        if (restart_timer)
-                return HRTIMER_RESTART;
-        else
-                return HRTIMER_NORESTART;
-}
-
 void __kvm_migrate_pit_timer(struct kvm_vcpu *vcpu)
 {
         struct kvm_pit *pit = vcpu->kvm->arch.vpit;
@@ -263,15 +257,26 @@ void __kvm_migrate_pit_timer(struct kvm_vcpu *vcpu)
                 hrtimer_start_expires(timer, HRTIMER_MODE_ABS);
 }
 
-static void destroy_pit_timer(struct kvm_kpit_timer *pt)
+static void destroy_pit_timer(struct kvm_timer *pt)
 {
         pr_debug("pit: execute del timer!\n");
         hrtimer_cancel(&pt->timer);
 }
 
+static bool kpit_is_periodic(struct kvm_timer *ktimer)
+{
+        struct kvm_kpit_state *ps = container_of(ktimer, struct kvm_kpit_state,
+                                                 pit_timer);
+        return ps->is_periodic;
+}
+
+static struct kvm_timer_ops kpit_ops = {
+        .is_periodic = kpit_is_periodic,
+};
+
 static void create_pit_timer(struct kvm_kpit_state *ps, u32 val, int is_period)
 {
-        struct kvm_kpit_timer *pt = &ps->pit_timer;
+        struct kvm_timer *pt = &ps->pit_timer;
         s64 interval;
 
         interval = muldiv64(val, NSEC_PER_SEC, KVM_PIT_FREQ);
@@ -280,8 +285,14 @@ static void create_pit_timer(struct kvm_kpit_state *ps, u32 val, int is_period)
 
         /* TODO The new value only affected after the retriggered */
         hrtimer_cancel(&pt->timer);
-        pt->period = (is_period == 0) ? 0 : interval;
-        pt->timer.function = pit_timer_fn;
+        pt->period = interval;
+        ps->is_periodic = is_period;
+
+        pt->timer.function = kvm_timer_fn;
+        pt->t_ops = &kpit_ops;
+        pt->kvm = ps->pit->kvm;
+        pt->vcpu_id = 0;
+
         atomic_set(&pt->pending, 0);
         ps->irq_ack = 1;
 
@@ -298,23 +309,23 @@ static void pit_load_count(struct kvm *kvm, int channel, u32 val)
         pr_debug("pit: load_count val is %d, channel is %d\n", val, channel);
 
         /*
-         * Though spec said the state of 8254 is undefined after power-up,
-         * seems some tricky OS like Windows XP depends on IRQ0 interrupt
-         * when booting up.
-         * So here setting initialize rate for it, and not a specific number
+         * The largest possible initial count is 0; this is equivalent
+         * to 216 for binary counting and 104 for BCD counting.
          */
         if (val == 0)
                 val = 0x10000;
 
-        ps->channels[channel].count_load_time = ktime_get();
         ps->channels[channel].count = val;
 
-        if (channel != 0)
+        if (channel != 0) {
+                ps->channels[channel].count_load_time = ktime_get();
                 return;
+        }
 
         /* Two types of timer
          * mode 1 is one shot, mode 2 is period, otherwise del timer */
         switch (ps->channels[0].mode) {
+        case 0:
         case 1:
         /* FIXME: enhance mode 4 precision */
         case 4:
diff --git a/arch/x86/kvm/i8254.h b/arch/x86/kvm/i8254.h
index 6acbe4b505d5..bbd863ff60b7 100644
--- a/arch/x86/kvm/i8254.h
+++ b/arch/x86/kvm/i8254.h
@@ -3,15 +3,6 @@
 
 #include "iodev.h"
 
-struct kvm_kpit_timer {
-        struct hrtimer timer;
-        int irq;
-        s64 period; /* unit: ns */
-        s64 scheduled;
-        atomic_t pending;
-        bool reinject;
-};
-
 struct kvm_kpit_channel_state {
         u32 count; /* can be 65536 */
         u16 latched_count;
@@ -30,7 +21,8 @@ struct kvm_kpit_channel_state {
 
 struct kvm_kpit_state {
         struct kvm_kpit_channel_state channels[3];
-        struct kvm_kpit_timer pit_timer;
+        struct kvm_timer pit_timer;
+        bool is_periodic;
         u32    speaker_data_on;
         struct mutex lock;
         struct kvm_pit *pit;
diff --git a/arch/x86/kvm/irq.c b/arch/x86/kvm/irq.c
index cf17ed52f6fb..96dfbb6ad2a9 100644
--- a/arch/x86/kvm/irq.c
+++ b/arch/x86/kvm/irq.c
@@ -24,6 +24,7 @@
 
 #include "irq.h"
 #include "i8254.h"
+#include "x86.h"
 
 /*
  * check if there are pending timer events
@@ -48,6 +49,9 @@ int kvm_cpu_has_interrupt(struct kvm_vcpu *v)
 {
         struct kvm_pic *s;
 
+        if (!irqchip_in_kernel(v->kvm))
+                return v->arch.interrupt.pending;
+
         if (kvm_apic_has_interrupt(v) == -1) {  /* LAPIC */
                 if (kvm_apic_accept_pic_intr(v)) {
                         s = pic_irqchip(v->kvm);        /* PIC */
@@ -67,6 +71,9 @@ int kvm_cpu_get_interrupt(struct kvm_vcpu *v)
         struct kvm_pic *s;
         int vector;
 
+        if (!irqchip_in_kernel(v->kvm))
+                return v->arch.interrupt.nr;
+
         vector = kvm_get_apic_interrupt(v);     /* APIC */
         if (vector == -1) {
                 if (kvm_apic_accept_pic_intr(v)) {
diff --git a/arch/x86/kvm/kvm_timer.h b/arch/x86/kvm/kvm_timer.h
new file mode 100644
index 000000000000..26bd6ba74e1c
--- /dev/null
+++ b/arch/x86/kvm/kvm_timer.h
@@ -0,0 +1,18 @@
+
+struct kvm_timer {
+        struct hrtimer timer;
+        s64 period;                             /* unit: ns */
+        atomic_t pending;                       /* accumulated triggered timers */
+        bool reinject;
+        struct kvm_timer_ops *t_ops;
+        struct kvm *kvm;
+        int vcpu_id;
+};
+
+struct kvm_timer_ops {
+        bool (*is_periodic)(struct kvm_timer *);
+};
+
+
+enum hrtimer_restart kvm_timer_fn(struct hrtimer *data);
+
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index f0b67f2cdd69..ae99d83f81a3 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -196,20 +196,15 @@ int kvm_lapic_find_highest_irr(struct kvm_vcpu *vcpu)
 }
 EXPORT_SYMBOL_GPL(kvm_lapic_find_highest_irr);
 
-int kvm_apic_set_irq(struct kvm_vcpu *vcpu, u8 vec, u8 trig)
+static int __apic_accept_irq(struct kvm_lapic *apic, int delivery_mode,
+                             int vector, int level, int trig_mode);
+
+int kvm_apic_set_irq(struct kvm_vcpu *vcpu, struct kvm_lapic_irq *irq)
 {
         struct kvm_lapic *apic = vcpu->arch.apic;
 
-        if (!apic_test_and_set_irr(vec, apic)) {
-                /* a new pending irq is set in IRR */
-                if (trig)
-                        apic_set_vector(vec, apic->regs + APIC_TMR);
-                else
-                        apic_clear_vector(vec, apic->regs + APIC_TMR);
-                kvm_vcpu_kick(apic->vcpu);
-                return 1;
-        }
-        return 0;
+        return __apic_accept_irq(apic, irq->delivery_mode, irq->vector,
+                        irq->level, irq->trig_mode);
 }
 
 static inline int apic_find_highest_isr(struct kvm_lapic *apic)
@@ -250,7 +245,7 @@ static void apic_set_tpr(struct kvm_lapic *apic, u32 tpr)
 
 int kvm_apic_match_physical_addr(struct kvm_lapic *apic, u16 dest)
 {
-        return kvm_apic_id(apic) == dest;
+        return dest == 0xff || kvm_apic_id(apic) == dest;
 }
 
 int kvm_apic_match_logical_addr(struct kvm_lapic *apic, u8 mda)
@@ -279,37 +274,34 @@ int kvm_apic_match_logical_addr(struct kvm_lapic *apic, u8 mda)
         return result;
 }
 
-static int apic_match_dest(struct kvm_vcpu *vcpu, struct kvm_lapic *source,
+int kvm_apic_match_dest(struct kvm_vcpu *vcpu, struct kvm_lapic *source,
                            int short_hand, int dest, int dest_mode)
 {
         int result = 0;
         struct kvm_lapic *target = vcpu->arch.apic;
 
         apic_debug("target %p, source %p, dest 0x%x, "
-                   "dest_mode 0x%x, short_hand 0x%x",
+                   "dest_mode 0x%x, short_hand 0x%x\n",
                    target, source, dest, dest_mode, short_hand);
 
         ASSERT(!target);
         switch (short_hand) {
         case APIC_DEST_NOSHORT:
-                if (dest_mode == 0) {
+                if (dest_mode == 0)
                         /* Physical mode. */
-                        if ((dest == 0xFF) || (dest == kvm_apic_id(target)))
-                                result = 1;
-                } else
+                        result = kvm_apic_match_physical_addr(target, dest);
+                else
                         /* Logical mode. */
                         result = kvm_apic_match_logical_addr(target, dest);
                 break;
         case APIC_DEST_SELF:
-                if (target == source)
-                        result = 1;
+                result = (target == source);
                 break;
         case APIC_DEST_ALLINC:
                 result = 1;
                 break;
         case APIC_DEST_ALLBUT:
-                if (target != source)
-                        result = 1;
+                result = (target != source);
                 break;
         default:
                 printk(KERN_WARNING "Bad dest shorthand value %x\n",
@@ -327,20 +319,22 @@ static int apic_match_dest(struct kvm_vcpu *vcpu, struct kvm_lapic *source,
 static int __apic_accept_irq(struct kvm_lapic *apic, int delivery_mode,
                              int vector, int level, int trig_mode)
 {
-        int orig_irr, result = 0;
+        int result = 0;
         struct kvm_vcpu *vcpu = apic->vcpu;
 
         switch (delivery_mode) {
-        case APIC_DM_FIXED:
         case APIC_DM_LOWEST:
+                vcpu->arch.apic_arb_prio++;
+        case APIC_DM_FIXED:
                 /* FIXME add logic for vcpu on reset */
                 if (unlikely(!apic_enabled(apic)))
                         break;
 
-                orig_irr = apic_test_and_set_irr(vector, apic);
-                if (orig_irr && trig_mode) {
-                        apic_debug("level trig mode repeatedly for vector %d",
-                                   vector);
+                result = !apic_test_and_set_irr(vector, apic);
+                if (!result) {
+                        if (trig_mode)
+                                apic_debug("level trig mode repeatedly for "
+                                                "vector %d", vector);
                         break;
                 }
 
@@ -349,10 +343,7 @@ static int __apic_accept_irq(struct kvm_lapic *apic, int delivery_mode,
                         apic_set_vector(vector, apic->regs + APIC_TMR);
                 } else
                         apic_clear_vector(vector, apic->regs + APIC_TMR);
-
                 kvm_vcpu_kick(vcpu);
-
-                result = (orig_irr == 0);
                 break;
 
         case APIC_DM_REMRD:
@@ -364,12 +355,14 @@ static int __apic_accept_irq(struct kvm_lapic *apic, int delivery_mode,
                 break;
 
         case APIC_DM_NMI:
+                result = 1;
                 kvm_inject_nmi(vcpu);
                 kvm_vcpu_kick(vcpu);
                 break;
 
         case APIC_DM_INIT:
                 if (level) {
+                        result = 1;
                         if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
                                 printk(KERN_DEBUG
                                        "INIT on a runnable vcpu %d\n",
@@ -386,6 +379,7 @@ static int __apic_accept_irq(struct kvm_lapic *apic, int delivery_mode,
                 apic_debug("SIPI to vcpu %d vector 0x%02x\n",
                            vcpu->vcpu_id, vector);
                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
+                        result = 1;
                         vcpu->arch.sipi_vector = vector;
                         vcpu->arch.mp_state = KVM_MP_STATE_SIPI_RECEIVED;
                         kvm_vcpu_kick(vcpu);
@@ -408,43 +402,9 @@ static int __apic_accept_irq(struct kvm_lapic *apic, int delivery_mode,
         return result;
 }
 
-static struct kvm_lapic *kvm_apic_round_robin(struct kvm *kvm, u8 vector,
-                                       unsigned long bitmap)
-{
-        int last;
-        int next;
-        struct kvm_lapic *apic = NULL;
-
-        last = kvm->arch.round_robin_prev_vcpu;
-        next = last;
-
-        do {
-                if (++next == KVM_MAX_VCPUS)
-                        next = 0;
-                if (kvm->vcpus[next] == NULL || !test_bit(next, &bitmap))
-                        continue;
-                apic = kvm->vcpus[next]->arch.apic;
-                if (apic && apic_enabled(apic))
-                        break;
-                apic = NULL;
-        } while (next != last);
-        kvm->arch.round_robin_prev_vcpu = next;
-
-        if (!apic)
-                printk(KERN_DEBUG "vcpu not ready for apic_round_robin\n");
-
-        return apic;
-}
-
-struct kvm_vcpu *kvm_get_lowest_prio_vcpu(struct kvm *kvm, u8 vector,
-                unsigned long bitmap)
+int kvm_apic_compare_prio(struct kvm_vcpu *vcpu1, struct kvm_vcpu *vcpu2)
 {
-        struct kvm_lapic *apic;
-
-        apic = kvm_apic_round_robin(kvm, vector, bitmap);
-        if (apic)
-                return apic->vcpu;
-        return NULL;
+        return vcpu1->arch.apic_arb_prio - vcpu2->arch.apic_arb_prio;
 }
 
 static void apic_set_eoi(struct kvm_lapic *apic)
@@ -472,47 +432,24 @@ static void apic_send_ipi(struct kvm_lapic *apic)
 {
         u32 icr_low = apic_get_reg(apic, APIC_ICR);
         u32 icr_high = apic_get_reg(apic, APIC_ICR2);
+        struct kvm_lapic_irq irq;
 
-        unsigned int dest = GET_APIC_DEST_FIELD(icr_high);
-        unsigned int short_hand = icr_low & APIC_SHORT_MASK;
-        unsigned int trig_mode = icr_low & APIC_INT_LEVELTRIG;
-        unsigned int level = icr_low & APIC_INT_ASSERT;
-        unsigned int dest_mode = icr_low & APIC_DEST_MASK;
-        unsigned int delivery_mode = icr_low & APIC_MODE_MASK;
-        unsigned int vector = icr_low & APIC_VECTOR_MASK;
-
-        struct kvm_vcpu *target;
-        struct kvm_vcpu *vcpu;
-        unsigned long lpr_map = 0;
-        int i;
+        irq.vector = icr_low & APIC_VECTOR_MASK;
+        irq.delivery_mode = icr_low & APIC_MODE_MASK;
+        irq.dest_mode = icr_low & APIC_DEST_MASK;
+        irq.level = icr_low & APIC_INT_ASSERT;
+        irq.trig_mode = icr_low & APIC_INT_LEVELTRIG;
+        irq.shorthand = icr_low & APIC_SHORT_MASK;
+        irq.dest_id = GET_APIC_DEST_FIELD(icr_high);
 
         apic_debug("icr_high 0x%x, icr_low 0x%x, "
                    "short_hand 0x%x, dest 0x%x, trig_mode 0x%x, level 0x%x, "
                    "dest_mode 0x%x, delivery_mode 0x%x, vector 0x%x\n",
-                   icr_high, icr_low, short_hand, dest,
-                   trig_mode, level, dest_mode, delivery_mode, vector);
-
-        for (i = 0; i < KVM_MAX_VCPUS; i++) {
-                vcpu = apic->vcpu->kvm->vcpus[i];
-                if (!vcpu)
-                        continue;
-
-                if (vcpu->arch.apic &&
-                    apic_match_dest(vcpu, apic, short_hand, dest, dest_mode)) {
-                        if (delivery_mode == APIC_DM_LOWEST)
-                                set_bit(vcpu->vcpu_id, &lpr_map);
-                        else
-                                __apic_accept_irq(vcpu->arch.apic, delivery_mode,
-                                                  vector, level, trig_mode);
-                }
-        }
+                   icr_high, icr_low, irq.shorthand, irq.dest_id,
+                   irq.trig_mode, irq.level, irq.dest_mode, irq.delivery_mode,
+                   irq.vector);
 
-        if (delivery_mode == APIC_DM_LOWEST) {
-                target = kvm_get_lowest_prio_vcpu(vcpu->kvm, vector, lpr_map);
-                if (target != NULL)
-                        __apic_accept_irq(target->arch.apic, delivery_mode,
-                                          vector, level, trig_mode);
-        }
+        kvm_irq_delivery_to_apic(apic->vcpu->kvm, apic, &irq);
 }
 
 static u32 apic_get_tmcct(struct kvm_lapic *apic)
@@ -527,12 +464,13 @@ static u32 apic_get_tmcct(struct kvm_lapic *apic)
         if (apic_get_reg(apic, APIC_TMICT) == 0)
                 return 0;
 
-        remaining = hrtimer_expires_remaining(&apic->timer.dev);
+        remaining = hrtimer_expires_remaining(&apic->lapic_timer.timer);
         if (ktime_to_ns(remaining) < 0)
                 remaining = ktime_set(0, 0);
 
-        ns = mod_64(ktime_to_ns(remaining), apic->timer.period);
-        tmcct = div64_u64(ns, (APIC_BUS_CYCLE_NS * apic->timer.divide_count));
+        ns = mod_64(ktime_to_ns(remaining), apic->lapic_timer.period);
+        tmcct = div64_u64(ns,
+                         (APIC_BUS_CYCLE_NS * apic->divide_count));
 
         return tmcct;
 }
@@ -619,25 +557,25 @@ static void update_divide_count(struct kvm_lapic *apic)
         tdcr = apic_get_reg(apic, APIC_TDCR);
         tmp1 = tdcr & 0xf;
         tmp2 = ((tmp1 & 0x3) | ((tmp1 & 0x8) >> 1)) + 1;
-        apic->timer.divide_count = 0x1 << (tmp2 & 0x7);
+        apic->divide_count = 0x1 << (tmp2 & 0x7);
 
         apic_debug("timer divide count is 0x%x\n",
-                                   apic->timer.divide_count);
+                                   apic->divide_count);
 }
 
 static void start_apic_timer(struct kvm_lapic *apic)
 {
-        ktime_t now = apic->timer.dev.base->get_time();
+        ktime_t now = apic->lapic_timer.timer.base->get_time();
 
-        apic->timer.period = apic_get_reg(apic, APIC_TMICT) *
-                    APIC_BUS_CYCLE_NS * apic->timer.divide_count;
-        atomic_set(&apic->timer.pending, 0);
+        apic->lapic_timer.period = apic_get_reg(apic, APIC_TMICT) *
+                    APIC_BUS_CYCLE_NS * apic->divide_count;
+        atomic_set(&apic->lapic_timer.pending, 0);
 
-        if (!apic->timer.period)
+        if (!apic->lapic_timer.period)
                 return;
 
-        hrtimer_start(&apic->timer.dev,
-                      ktime_add_ns(now, apic->timer.period),
+        hrtimer_start(&apic->lapic_timer.timer,
+                      ktime_add_ns(now, apic->lapic_timer.period),
                       HRTIMER_MODE_ABS);
 
         apic_debug("%s: bus cycle is %" PRId64 "ns, now 0x%016"
@@ -646,9 +584,9 @@ static void start_apic_timer(struct kvm_lapic *apic)
                            "expire @ 0x%016" PRIx64 ".\n", __func__,
                            APIC_BUS_CYCLE_NS, ktime_to_ns(now),
                            apic_get_reg(apic, APIC_TMICT),
-                           apic->timer.period,
+                           apic->lapic_timer.period,
                            ktime_to_ns(ktime_add_ns(now,
-                                        apic->timer.period)));
+                                        apic->lapic_timer.period)));
 }
 
 static void apic_manage_nmi_watchdog(struct kvm_lapic *apic, u32 lvt0_val)
@@ -730,7 +668,7 @@ static void apic_mmio_write(struct kvm_io_device *this,
                                 apic_set_reg(apic, APIC_LVTT + 0x10 * i,
                                              lvt_val | APIC_LVT_MASKED);
                         }
-                        atomic_set(&apic->timer.pending, 0);
+                        atomic_set(&apic->lapic_timer.pending, 0);
 
                 }
                 break;
@@ -762,7 +700,7 @@ static void apic_mmio_write(struct kvm_io_device *this,
                 break;
 
         case APIC_TMICT:
-                hrtimer_cancel(&apic->timer.dev);
+                hrtimer_cancel(&apic->lapic_timer.timer);
                 apic_set_reg(apic, APIC_TMICT, val);
                 start_apic_timer(apic);
                 return;
@@ -802,7 +740,7 @@ void kvm_free_lapic(struct kvm_vcpu *vcpu)
         if (!vcpu->arch.apic)
                 return;
 
-        hrtimer_cancel(&vcpu->arch.apic->timer.dev);
+        hrtimer_cancel(&vcpu->arch.apic->lapic_timer.timer);
 
         if (vcpu->arch.apic->regs_page)
                 __free_page(vcpu->arch.apic->regs_page);
@@ -880,7 +818,7 @@ void kvm_lapic_reset(struct kvm_vcpu *vcpu)
         ASSERT(apic != NULL);
 
         /* Stop the timer in case it's a reset to an active apic */
-        hrtimer_cancel(&apic->timer.dev);
+        hrtimer_cancel(&apic->lapic_timer.timer);
 
         apic_set_reg(apic, APIC_ID, vcpu->vcpu_id << 24);
         apic_set_reg(apic, APIC_LVR, APIC_VERSION);
@@ -905,11 +843,13 @@ void kvm_lapic_reset(struct kvm_vcpu *vcpu)
                 apic_set_reg(apic, APIC_TMR + 0x10 * i, 0);
         }
         update_divide_count(apic);
-        atomic_set(&apic->timer.pending, 0);
+        atomic_set(&apic->lapic_timer.pending, 0);
         if (vcpu->vcpu_id == 0)
                 vcpu->arch.apic_base |= MSR_IA32_APICBASE_BSP;
         apic_update_ppr(apic);
 
+        vcpu->arch.apic_arb_prio = 0;
+
         apic_debug(KERN_INFO "%s: vcpu=%p, id=%d, base_msr="
                    "0x%016" PRIx64 ", base_address=0x%0lx.\n", __func__,
                    vcpu, kvm_apic_id(apic),
@@ -917,16 +857,14 @@ void kvm_lapic_reset(struct kvm_vcpu *vcpu)
 }
 EXPORT_SYMBOL_GPL(kvm_lapic_reset);
 
-int kvm_lapic_enabled(struct kvm_vcpu *vcpu)
+bool kvm_apic_present(struct kvm_vcpu *vcpu)
 {
-        struct kvm_lapic *apic = vcpu->arch.apic;
-        int ret = 0;
-
-        if (!apic)
-                return 0;
-        ret = apic_enabled(apic);
+        return vcpu->arch.apic && apic_hw_enabled(vcpu->arch.apic);
+}
 
-        return ret;
+int kvm_lapic_enabled(struct kvm_vcpu *vcpu)
+{
+        return kvm_apic_present(vcpu) && apic_sw_enabled(vcpu->arch.apic);
 }
 EXPORT_SYMBOL_GPL(kvm_lapic_enabled);
 
@@ -936,22 +874,11 @@ EXPORT_SYMBOL_GPL(kvm_lapic_enabled);
  *----------------------------------------------------------------------
  */
 
-/* TODO: make sure __apic_timer_fn runs in current pCPU */
-static int __apic_timer_fn(struct kvm_lapic *apic)
+static bool lapic_is_periodic(struct kvm_timer *ktimer)
 {
-        int result = 0;
-        wait_queue_head_t *q = &apic->vcpu->wq;
-
-        if(!atomic_inc_and_test(&apic->timer.pending))
-                set_bit(KVM_REQ_PENDING_TIMER, &apic->vcpu->requests);
-        if (waitqueue_active(q))
-                wake_up_interruptible(q);
-
-        if (apic_lvtt_period(apic)) {
-                result = 1;
-                hrtimer_add_expires_ns(&apic->timer.dev, apic->timer.period);
-        }
-        return result;
+        struct kvm_lapic *apic = container_of(ktimer, struct kvm_lapic,
+                                              lapic_timer);
+        return apic_lvtt_period(apic);
 }
 
 int apic_has_pending_timer(struct kvm_vcpu *vcpu)
@@ -959,7 +886,7 @@ int apic_has_pending_timer(struct kvm_vcpu *vcpu)
         struct kvm_lapic *lapic = vcpu->arch.apic;
 
         if (lapic && apic_enabled(lapic) && apic_lvt_enabled(lapic, APIC_LVTT))
-                return atomic_read(&lapic->timer.pending);
+                return atomic_read(&lapic->lapic_timer.pending);
 
         return 0;
 }
@@ -986,20 +913,9 @@ void kvm_apic_nmi_wd_deliver(struct kvm_vcpu *vcpu)
                 kvm_apic_local_deliver(apic, APIC_LVT0);
 }
 
-static enum hrtimer_restart apic_timer_fn(struct hrtimer *data)
-{
-        struct kvm_lapic *apic;
-        int restart_timer = 0;
-
-        apic = container_of(data, struct kvm_lapic, timer.dev);
-
-        restart_timer = __apic_timer_fn(apic);
-
-        if (restart_timer)
-                return HRTIMER_RESTART;
-        else
-                return HRTIMER_NORESTART;
-}
+static struct kvm_timer_ops lapic_timer_ops = {
+        .is_periodic = lapic_is_periodic,
+};
 
 int kvm_create_lapic(struct kvm_vcpu *vcpu)
 {
@@ -1024,8 +940,13 @@ int kvm_create_lapic(struct kvm_vcpu *vcpu)
         memset(apic->regs, 0, PAGE_SIZE);
         apic->vcpu = vcpu;
 
-        hrtimer_init(&apic->timer.dev, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
-        apic->timer.dev.function = apic_timer_fn;
+        hrtimer_init(&apic->lapic_timer.timer, CLOCK_MONOTONIC,
+                     HRTIMER_MODE_ABS);
+        apic->lapic_timer.timer.function = kvm_timer_fn;
+        apic->lapic_timer.t_ops = &lapic_timer_ops;
+        apic->lapic_timer.kvm = vcpu->kvm;
+        apic->lapic_timer.vcpu_id = vcpu->vcpu_id;
+
         apic->base_address = APIC_DEFAULT_PHYS_BASE;
         vcpu->arch.apic_base = APIC_DEFAULT_PHYS_BASE;
 
@@ -1078,9 +999,9 @@ void kvm_inject_apic_timer_irqs(struct kvm_vcpu *vcpu)
 {
         struct kvm_lapic *apic = vcpu->arch.apic;
 
-        if (apic && atomic_read(&apic->timer.pending) > 0) {
+        if (apic && atomic_read(&apic->lapic_timer.pending) > 0) {
                 if (kvm_apic_local_deliver(apic, APIC_LVTT))
-                        atomic_dec(&apic->timer.pending);
+                        atomic_dec(&apic->lapic_timer.pending);
         }
 }
 
@@ -1106,7 +1027,7 @@ void kvm_apic_post_state_restore(struct kvm_vcpu *vcpu)
                              MSR_IA32_APICBASE_BASE;
         apic_set_reg(apic, APIC_LVR, APIC_VERSION);
         apic_update_ppr(apic);
-        hrtimer_cancel(&apic->timer.dev);
+        hrtimer_cancel(&apic->lapic_timer.timer);
         update_divide_count(apic);
         start_apic_timer(apic);
 }
@@ -1119,7 +1040,7 @@ void __kvm_migrate_apic_timer(struct kvm_vcpu *vcpu)
         if (!apic)
                 return;
 
-        timer = &apic->timer.dev;
+        timer = &apic->lapic_timer.timer;
         if (hrtimer_cancel(timer))
                 hrtimer_start_expires(timer, HRTIMER_MODE_ABS);
 }
diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h
index 45ab6ee71209..a587f8349c46 100644
--- a/arch/x86/kvm/lapic.h
+++ b/arch/x86/kvm/lapic.h
@@ -2,18 +2,15 @@
 #define __KVM_X86_LAPIC_H
 
 #include "iodev.h"
+#include "kvm_timer.h"
 
 #include <linux/kvm_host.h>
 
 struct kvm_lapic {
         unsigned long base_address;
         struct kvm_io_device dev;
-        struct {
-                atomic_t pending;
-                s64 period;     /* unit: ns */
-                u32 divide_count;
-                struct hrtimer dev;
-        } timer;
+        struct kvm_timer lapic_timer;
+        u32 divide_count;
         struct kvm_vcpu *vcpu;
         struct page *regs_page;
         void *regs;
@@ -34,12 +31,13 @@ u64 kvm_lapic_get_base(struct kvm_vcpu *vcpu);
 
 int kvm_apic_match_physical_addr(struct kvm_lapic *apic, u16 dest);
 int kvm_apic_match_logical_addr(struct kvm_lapic *apic, u8 mda);
-int kvm_apic_set_irq(struct kvm_vcpu *vcpu, u8 vec, u8 trig);
+int kvm_apic_set_irq(struct kvm_vcpu *vcpu, struct kvm_lapic_irq *irq);
 
 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu);
 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data);
 void kvm_apic_post_state_restore(struct kvm_vcpu *vcpu);
 int kvm_lapic_enabled(struct kvm_vcpu *vcpu);
+bool kvm_apic_present(struct kvm_vcpu *vcpu);
 int kvm_lapic_find_highest_irr(struct kvm_vcpu *vcpu);
 
 void kvm_lapic_set_vapic_addr(struct kvm_vcpu *vcpu, gpa_t vapic_addr);
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
index 32cf11e5728a..5c3d6e81a7dc 100644
--- a/arch/x86/kvm/mmu.c
+++ b/arch/x86/kvm/mmu.c
@@ -126,6 +126,7 @@ module_param(oos_shadow, bool, 0644);
 #define PFERR_PRESENT_MASK (1U << 0)
 #define PFERR_WRITE_MASK (1U << 1)
 #define PFERR_USER_MASK (1U << 2)
+#define PFERR_RSVD_MASK (1U << 3)
 #define PFERR_FETCH_MASK (1U << 4)
 
 #define PT_DIRECTORY_LEVEL 2
@@ -177,7 +178,11 @@ static u64 __read_mostly shadow_x_mask;	/* mutual exclusive with nx_mask */
 static u64 __read_mostly shadow_user_mask;
 static u64 __read_mostly shadow_accessed_mask;
 static u64 __read_mostly shadow_dirty_mask;
-static u64 __read_mostly shadow_mt_mask;
+
+static inline u64 rsvd_bits(int s, int e)
+{
+        return ((1ULL << (e - s + 1)) - 1) << s;
+}
 
 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
 {
@@ -193,14 +198,13 @@ void kvm_mmu_set_base_ptes(u64 base_pte)
 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
 
 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
-                u64 dirty_mask, u64 nx_mask, u64 x_mask, u64 mt_mask)
+                u64 dirty_mask, u64 nx_mask, u64 x_mask)
 {
         shadow_user_mask = user_mask;
         shadow_accessed_mask = accessed_mask;
         shadow_dirty_mask = dirty_mask;
         shadow_nx_mask = nx_mask;
         shadow_x_mask = x_mask;
-        shadow_mt_mask = mt_mask;
 }
 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
 
@@ -219,11 +223,6 @@ static int is_nx(struct kvm_vcpu *vcpu)
         return vcpu->arch.shadow_efer & EFER_NX;
 }
 
-static int is_present_pte(unsigned long pte)
-{
-        return pte & PT_PRESENT_MASK;
-}
-
 static int is_shadow_present_pte(u64 pte)
 {
         return pte != shadow_trap_nonpresent_pte
@@ -1074,18 +1073,10 @@ static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
         return NULL;
 }
 
-static void kvm_unlink_unsync_global(struct kvm *kvm, struct kvm_mmu_page *sp)
-{
-        list_del(&sp->oos_link);
-        --kvm->stat.mmu_unsync_global;
-}
-
 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
 {
         WARN_ON(!sp->unsync);
         sp->unsync = 0;
-        if (sp->global)
-                kvm_unlink_unsync_global(kvm, sp);
         --kvm->stat.mmu_unsync;
 }
 
@@ -1248,7 +1239,6 @@ static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
         pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
         sp->gfn = gfn;
         sp->role = role;
-        sp->global = 0;
         hlist_add_head(&sp->hash_link, bucket);
         if (!direct) {
                 if (rmap_write_protect(vcpu->kvm, gfn))
@@ -1616,7 +1606,7 @@ static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
         return mtrr_state->def_type;
 }
 
-static u8 get_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
+u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
 {
         u8 mtrr;
 
@@ -1626,6 +1616,7 @@ static u8 get_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
                 mtrr = MTRR_TYPE_WRBACK;
         return mtrr;
 }
+EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
 
 static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
 {
@@ -1646,11 +1637,7 @@ static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
         ++vcpu->kvm->stat.mmu_unsync;
         sp->unsync = 1;
 
-        if (sp->global) {
-                list_add(&sp->oos_link, &vcpu->kvm->arch.oos_global_pages);
-                ++vcpu->kvm->stat.mmu_unsync_global;
-        } else
-                kvm_mmu_mark_parents_unsync(vcpu, sp);
+        kvm_mmu_mark_parents_unsync(vcpu, sp);
 
         mmu_convert_notrap(sp);
         return 0;
@@ -1677,21 +1664,11 @@ static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
 static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
                     unsigned pte_access, int user_fault,
                     int write_fault, int dirty, int largepage,
-                    int global, gfn_t gfn, pfn_t pfn, bool speculative,
+                    gfn_t gfn, pfn_t pfn, bool speculative,
                     bool can_unsync)
 {
         u64 spte;
         int ret = 0;
-        u64 mt_mask = shadow_mt_mask;
-        struct kvm_mmu_page *sp = page_header(__pa(shadow_pte));
-
-        if (!global && sp->global) {
-                sp->global = 0;
-                if (sp->unsync) {
-                        kvm_unlink_unsync_global(vcpu->kvm, sp);
-                        kvm_mmu_mark_parents_unsync(vcpu, sp);
-                }
-        }
 
         /*
          * We don't set the accessed bit, since we sometimes want to see
@@ -1711,16 +1688,9 @@ static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
                 spte |= shadow_user_mask;
         if (largepage)
                 spte |= PT_PAGE_SIZE_MASK;
-        if (mt_mask) {
-                if (!kvm_is_mmio_pfn(pfn)) {
-                        mt_mask = get_memory_type(vcpu, gfn) <<
-                                kvm_x86_ops->get_mt_mask_shift();
-                        mt_mask |= VMX_EPT_IGMT_BIT;
-                } else
-                        mt_mask = MTRR_TYPE_UNCACHABLE <<
-                                kvm_x86_ops->get_mt_mask_shift();
-                spte |= mt_mask;
-        }
+        if (tdp_enabled)
+                spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
+                        kvm_is_mmio_pfn(pfn));
 
         spte |= (u64)pfn << PAGE_SHIFT;
 
@@ -1765,8 +1735,8 @@ set_pte:
 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
                          unsigned pt_access, unsigned pte_access,
                          int user_fault, int write_fault, int dirty,
-                         int *ptwrite, int largepage, int global,
-                         gfn_t gfn, pfn_t pfn, bool speculative)
+                         int *ptwrite, int largepage, gfn_t gfn,
+                         pfn_t pfn, bool speculative)
 {
         int was_rmapped = 0;
         int was_writeble = is_writeble_pte(*shadow_pte);
@@ -1795,7 +1765,7 @@ static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
                         was_rmapped = 1;
         }
         if (set_spte(vcpu, shadow_pte, pte_access, user_fault, write_fault,
-                      dirty, largepage, global, gfn, pfn, speculative, true)) {
+                      dirty, largepage, gfn, pfn, speculative, true)) {
                 if (write_fault)
                         *ptwrite = 1;
                 kvm_x86_ops->tlb_flush(vcpu);
@@ -1843,7 +1813,7 @@ static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
                     || (largepage && iterator.level == PT_DIRECTORY_LEVEL)) {
                         mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
                                      0, write, 1, &pt_write,
-                                     largepage, 0, gfn, pfn, false);
+                                     largepage, gfn, pfn, false);
                         ++vcpu->stat.pf_fixed;
                         break;
                 }
@@ -1942,7 +1912,19 @@ static void mmu_free_roots(struct kvm_vcpu *vcpu)
         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
 }
 
-static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
+static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
+{
+        int ret = 0;
+
+        if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
+                set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
+                ret = 1;
+        }
+
+        return ret;
+}
+
+static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
 {
         int i;
         gfn_t root_gfn;
@@ -1957,13 +1939,15 @@ static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
                 ASSERT(!VALID_PAGE(root));
                 if (tdp_enabled)
                         direct = 1;
+                if (mmu_check_root(vcpu, root_gfn))
+                        return 1;
                 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
                                       PT64_ROOT_LEVEL, direct,
                                       ACC_ALL, NULL);
                 root = __pa(sp->spt);
                 ++sp->root_count;
                 vcpu->arch.mmu.root_hpa = root;
-                return;
+                return 0;
         }
         direct = !is_paging(vcpu);
         if (tdp_enabled)
@@ -1980,6 +1964,8 @@ static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
                         root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
                 } else if (vcpu->arch.mmu.root_level == 0)
                         root_gfn = 0;
+                if (mmu_check_root(vcpu, root_gfn))
+                        return 1;
                 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
                                       PT32_ROOT_LEVEL, direct,
                                       ACC_ALL, NULL);
@@ -1988,6 +1974,7 @@ static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
                 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
         }
         vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
+        return 0;
 }
 
 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
@@ -2006,7 +1993,7 @@ static void mmu_sync_roots(struct kvm_vcpu *vcpu)
         for (i = 0; i < 4; ++i) {
                 hpa_t root = vcpu->arch.mmu.pae_root[i];
 
-                if (root) {
+                if (root && VALID_PAGE(root)) {
                         root &= PT64_BASE_ADDR_MASK;
                         sp = page_header(root);
                         mmu_sync_children(vcpu, sp);
@@ -2014,15 +2001,6 @@ static void mmu_sync_roots(struct kvm_vcpu *vcpu)
         }
 }
 
-static void mmu_sync_global(struct kvm_vcpu *vcpu)
-{
-        struct kvm *kvm = vcpu->kvm;
-        struct kvm_mmu_page *sp, *n;
-
-        list_for_each_entry_safe(sp, n, &kvm->arch.oos_global_pages, oos_link)
-                kvm_sync_page(vcpu, sp);
-}
-
 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
 {
         spin_lock(&vcpu->kvm->mmu_lock);
@@ -2030,13 +2008,6 @@ void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
         spin_unlock(&vcpu->kvm->mmu_lock);
 }
 
-void kvm_mmu_sync_global(struct kvm_vcpu *vcpu)
-{
-        spin_lock(&vcpu->kvm->mmu_lock);
-        mmu_sync_global(vcpu);
-        spin_unlock(&vcpu->kvm->mmu_lock);
-}
-
 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
 {
         return vaddr;
@@ -2151,6 +2122,14 @@ static void paging_free(struct kvm_vcpu *vcpu)
         nonpaging_free(vcpu);
 }
 
+static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
+{
+        int bit7;
+
+        bit7 = (gpte >> 7) & 1;
+        return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
+}
+
 #define PTTYPE 64
 #include "paging_tmpl.h"
 #undef PTTYPE
@@ -2159,6 +2138,59 @@ static void paging_free(struct kvm_vcpu *vcpu)
 #include "paging_tmpl.h"
 #undef PTTYPE
 
+static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
+{
+        struct kvm_mmu *context = &vcpu->arch.mmu;
+        int maxphyaddr = cpuid_maxphyaddr(vcpu);
+        u64 exb_bit_rsvd = 0;
+
+        if (!is_nx(vcpu))
+                exb_bit_rsvd = rsvd_bits(63, 63);
+        switch (level) {
+        case PT32_ROOT_LEVEL:
+                /* no rsvd bits for 2 level 4K page table entries */
+                context->rsvd_bits_mask[0][1] = 0;
+                context->rsvd_bits_mask[0][0] = 0;
+                if (is_cpuid_PSE36())
+                        /* 36bits PSE 4MB page */
+                        context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
+                else
+                        /* 32 bits PSE 4MB page */
+                        context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
+                context->rsvd_bits_mask[1][0] = ~0ull;
+                break;
+        case PT32E_ROOT_LEVEL:
+                context->rsvd_bits_mask[0][2] =
+                        rsvd_bits(maxphyaddr, 63) |
+                        rsvd_bits(7, 8) | rsvd_bits(1, 2);      /* PDPTE */
+                context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
+                        rsvd_bits(maxphyaddr, 62);      /* PDE */
+                context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
+                        rsvd_bits(maxphyaddr, 62);      /* PTE */
+                context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
+                        rsvd_bits(maxphyaddr, 62) |
+                        rsvd_bits(13, 20);              /* large page */
+                context->rsvd_bits_mask[1][0] = ~0ull;
+                break;
+        case PT64_ROOT_LEVEL:
+                context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
+                        rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
+                context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
+                        rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
+                context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
+                        rsvd_bits(maxphyaddr, 51);
+                context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
+                        rsvd_bits(maxphyaddr, 51);
+                context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
+                context->rsvd_bits_mask[1][2] = context->rsvd_bits_mask[0][2];
+                context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
+                        rsvd_bits(maxphyaddr, 51) |
+                        rsvd_bits(13, 20);              /* large page */
+                context->rsvd_bits_mask[1][0] = ~0ull;
+                break;
+        }
+}
+
 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
 {
         struct kvm_mmu *context = &vcpu->arch.mmu;
@@ -2179,6 +2211,7 @@ static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
 
 static int paging64_init_context(struct kvm_vcpu *vcpu)
 {
+        reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
         return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
 }
 
@@ -2186,6 +2219,7 @@ static int paging32_init_context(struct kvm_vcpu *vcpu)
 {
         struct kvm_mmu *context = &vcpu->arch.mmu;
 
+        reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
         context->new_cr3 = paging_new_cr3;
         context->page_fault = paging32_page_fault;
         context->gva_to_gpa = paging32_gva_to_gpa;
@@ -2201,6 +2235,7 @@ static int paging32_init_context(struct kvm_vcpu *vcpu)
 
 static int paging32E_init_context(struct kvm_vcpu *vcpu)
 {
+        reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
         return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
 }
 
@@ -2221,12 +2256,15 @@ static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
                 context->gva_to_gpa = nonpaging_gva_to_gpa;
                 context->root_level = 0;
         } else if (is_long_mode(vcpu)) {
+                reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
                 context->gva_to_gpa = paging64_gva_to_gpa;
                 context->root_level = PT64_ROOT_LEVEL;
         } else if (is_pae(vcpu)) {
+                reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
                 context->gva_to_gpa = paging64_gva_to_gpa;
                 context->root_level = PT32E_ROOT_LEVEL;
         } else {
+                reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
                 context->gva_to_gpa = paging32_gva_to_gpa;
                 context->root_level = PT32_ROOT_LEVEL;
         }
@@ -2290,9 +2328,11 @@ int kvm_mmu_load(struct kvm_vcpu *vcpu)
                 goto out;
         spin_lock(&vcpu->kvm->mmu_lock);
         kvm_mmu_free_some_pages(vcpu);
-        mmu_alloc_roots(vcpu);
+        r = mmu_alloc_roots(vcpu);
         mmu_sync_roots(vcpu);
         spin_unlock(&vcpu->kvm->mmu_lock);
+        if (r)
+                goto out;
         kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
         kvm_mmu_flush_tlb(vcpu);
 out:
@@ -2638,14 +2678,6 @@ EXPORT_SYMBOL_GPL(kvm_disable_tdp);
 
 static void free_mmu_pages(struct kvm_vcpu *vcpu)
 {
-        struct kvm_mmu_page *sp;
-
-        while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
-                sp = container_of(vcpu->kvm->arch.active_mmu_pages.next,
-                                  struct kvm_mmu_page, link);
-                kvm_mmu_zap_page(vcpu->kvm, sp);
-                cond_resched();
-        }
         free_page((unsigned long)vcpu->arch.mmu.pae_root);
 }
 
@@ -2710,7 +2742,6 @@ void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
 {
         struct kvm_mmu_page *sp;
 
-        spin_lock(&kvm->mmu_lock);
         list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
                 int i;
                 u64 *pt;
@@ -2725,7 +2756,6 @@ void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
                                 pt[i] &= ~PT_WRITABLE_MASK;
         }
         kvm_flush_remote_tlbs(kvm);
-        spin_unlock(&kvm->mmu_lock);
 }
 
 void kvm_mmu_zap_all(struct kvm *kvm)
@@ -3007,11 +3037,13 @@ static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
                                        " in nonleaf level: levels %d gva %lx"
                                        " level %d pte %llx\n", audit_msg,
                                        vcpu->arch.mmu.root_level, va, level, ent);
-
-                        audit_mappings_page(vcpu, ent, va, level - 1);
+                        else
+                                audit_mappings_page(vcpu, ent, va, level - 1);
                 } else {
                         gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
-                        hpa_t hpa = (hpa_t)gpa_to_pfn(vcpu, gpa) << PAGE_SHIFT;
+                        gfn_t gfn = gpa >> PAGE_SHIFT;
+                        pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
+                        hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
 
                         if (is_shadow_present_pte(ent)
                             && (ent & PT64_BASE_ADDR_MASK) != hpa)
diff --git a/arch/x86/kvm/mmu.h b/arch/x86/kvm/mmu.h
index eaab2145f62b..3494a2fb136e 100644
--- a/arch/x86/kvm/mmu.h
+++ b/arch/x86/kvm/mmu.h
@@ -75,4 +75,9 @@ static inline int is_paging(struct kvm_vcpu *vcpu)
         return vcpu->arch.cr0 & X86_CR0_PG;
 }
 
+static inline int is_present_pte(unsigned long pte)
+{
+        return pte & PT_PRESENT_MASK;
+}
+
 #endif
diff --git a/arch/x86/kvm/paging_tmpl.h b/arch/x86/kvm/paging_tmpl.h
index 6bd70206c561..258e4591e1ca 100644
--- a/arch/x86/kvm/paging_tmpl.h
+++ b/arch/x86/kvm/paging_tmpl.h
@@ -123,6 +123,7 @@ static int FNAME(walk_addr)(struct guest_walker *walker,
         gfn_t table_gfn;
         unsigned index, pt_access, pte_access;
         gpa_t pte_gpa;
+        int rsvd_fault = 0;
 
         pgprintk("%s: addr %lx\n", __func__, addr);
 walk:
@@ -157,6 +158,10 @@ walk:
                 if (!is_present_pte(pte))
                         goto not_present;
 
+                rsvd_fault = is_rsvd_bits_set(vcpu, pte, walker->level);
+                if (rsvd_fault)
+                        goto access_error;
+
                 if (write_fault && !is_writeble_pte(pte))
                         if (user_fault || is_write_protection(vcpu))
                                 goto access_error;
@@ -209,7 +214,6 @@ walk:
                 if (ret)
                         goto walk;
                 pte |= PT_DIRTY_MASK;
-                kvm_mmu_pte_write(vcpu, pte_gpa, (u8 *)&pte, sizeof(pte), 0);
                 walker->ptes[walker->level - 1] = pte;
         }
 
@@ -233,6 +237,8 @@ err:
                 walker->error_code |= PFERR_USER_MASK;
         if (fetch_fault)
                 walker->error_code |= PFERR_FETCH_MASK;
+        if (rsvd_fault)
+                walker->error_code |= PFERR_RSVD_MASK;
         return 0;
 }
 
@@ -262,8 +268,7 @@ static void FNAME(update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *page,
         kvm_get_pfn(pfn);
         mmu_set_spte(vcpu, spte, page->role.access, pte_access, 0, 0,
                      gpte & PT_DIRTY_MASK, NULL, largepage,
-                     gpte & PT_GLOBAL_MASK, gpte_to_gfn(gpte),
-                     pfn, true);
+                     gpte_to_gfn(gpte), pfn, true);
 }
 
 /*
@@ -297,7 +302,6 @@ static u64 *FNAME(fetch)(struct kvm_vcpu *vcpu, gva_t addr,
                                      user_fault, write_fault,
                                      gw->ptes[gw->level-1] & PT_DIRTY_MASK,
                                      ptwrite, largepage,
-                                     gw->ptes[gw->level-1] & PT_GLOBAL_MASK,
                                      gw->gfn, pfn, false);
                         break;
                 }
@@ -380,7 +384,7 @@ static int FNAME(page_fault)(struct kvm_vcpu *vcpu, gva_t addr,
                 return r;
 
         /*
-         * Look up the shadow pte for the faulting address.
+         * Look up the guest pte for the faulting address.
          */
         r = FNAME(walk_addr)(&walker, vcpu, addr, write_fault, user_fault,
                              fetch_fault);
@@ -586,7 +590,7 @@ static int FNAME(sync_page)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
                 nr_present++;
                 pte_access = sp->role.access & FNAME(gpte_access)(vcpu, gpte);
                 set_spte(vcpu, &sp->spt[i], pte_access, 0, 0,
-                         is_dirty_pte(gpte), 0, gpte & PT_GLOBAL_MASK, gfn,
+                         is_dirty_pte(gpte), 0, gfn,
                          spte_to_pfn(sp->spt[i]), true, false);
         }
 
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 1f8510c51d6e..71510e07e69e 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -19,6 +19,7 @@
 #include "irq.h"
 #include "mmu.h"
 #include "kvm_cache_regs.h"
+#include "x86.h"
 
 #include <linux/module.h>
 #include <linux/kernel.h>
@@ -69,7 +70,6 @@ module_param(npt, int, S_IRUGO);
 static int nested = 0;
 module_param(nested, int, S_IRUGO);
 
-static void kvm_reput_irq(struct vcpu_svm *svm);
 static void svm_flush_tlb(struct kvm_vcpu *vcpu);
 
 static int nested_svm_exit_handled(struct vcpu_svm *svm, bool kvm_override);
@@ -132,24 +132,6 @@ static inline u32 svm_has(u32 feat)
         return svm_features & feat;
 }
 
-static inline u8 pop_irq(struct kvm_vcpu *vcpu)
-{
-        int word_index = __ffs(vcpu->arch.irq_summary);
-        int bit_index = __ffs(vcpu->arch.irq_pending[word_index]);
-        int irq = word_index * BITS_PER_LONG + bit_index;
-
-        clear_bit(bit_index, &vcpu->arch.irq_pending[word_index]);
-        if (!vcpu->arch.irq_pending[word_index])
-                clear_bit(word_index, &vcpu->arch.irq_summary);
-        return irq;
-}
-
-static inline void push_irq(struct kvm_vcpu *vcpu, u8 irq)
-{
-        set_bit(irq, vcpu->arch.irq_pending);
-        set_bit(irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
-}
-
 static inline void clgi(void)
 {
         asm volatile (__ex(SVM_CLGI));
@@ -214,17 +196,31 @@ static void svm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr,
         svm->vmcb->control.event_inj_err = error_code;
 }
 
-static bool svm_exception_injected(struct kvm_vcpu *vcpu)
+static int is_external_interrupt(u32 info)
+{
+        info &= SVM_EVTINJ_TYPE_MASK | SVM_EVTINJ_VALID;
+        return info == (SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_INTR);
+}
+
+static u32 svm_get_interrupt_shadow(struct kvm_vcpu *vcpu, int mask)
 {
         struct vcpu_svm *svm = to_svm(vcpu);
+        u32 ret = 0;
 
-        return !(svm->vmcb->control.exit_int_info & SVM_EXITINTINFO_VALID);
+        if (svm->vmcb->control.int_state & SVM_INTERRUPT_SHADOW_MASK)
+                ret |= X86_SHADOW_INT_STI | X86_SHADOW_INT_MOV_SS;
+        return ret & mask;
 }
 
-static int is_external_interrupt(u32 info)
+static void svm_set_interrupt_shadow(struct kvm_vcpu *vcpu, int mask)
 {
-        info &= SVM_EVTINJ_TYPE_MASK | SVM_EVTINJ_VALID;
-        return info == (SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_INTR);
+        struct vcpu_svm *svm = to_svm(vcpu);
+
+        if (mask == 0)
+                svm->vmcb->control.int_state &= ~SVM_INTERRUPT_SHADOW_MASK;
+        else
+                svm->vmcb->control.int_state |= SVM_INTERRUPT_SHADOW_MASK;
+
 }
 
 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
@@ -232,7 +228,9 @@ static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
         struct vcpu_svm *svm = to_svm(vcpu);
 
         if (!svm->next_rip) {
-                printk(KERN_DEBUG "%s: NOP\n", __func__);
+                if (emulate_instruction(vcpu, vcpu->run, 0, 0, EMULTYPE_SKIP) !=
+                                EMULATE_DONE)
+                        printk(KERN_DEBUG "%s: NOP\n", __func__);
                 return;
         }
         if (svm->next_rip - kvm_rip_read(vcpu) > MAX_INST_SIZE)
@@ -240,9 +238,7 @@ static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
                        __func__, kvm_rip_read(vcpu), svm->next_rip);
 
         kvm_rip_write(vcpu, svm->next_rip);
-        svm->vmcb->control.int_state &= ~SVM_INTERRUPT_SHADOW_MASK;
-
-        vcpu->arch.interrupt_window_open = (svm->vcpu.arch.hflags & HF_GIF_MASK);
+        svm_set_interrupt_shadow(vcpu, 0);
 }
 
 static int has_svm(void)
@@ -830,6 +826,15 @@ static void svm_get_segment(struct kvm_vcpu *vcpu,
                 if (!var->unusable)
                         var->type |= 0x1;
                 break;
+        case VCPU_SREG_SS:
+                /* On AMD CPUs sometimes the DB bit in the segment
+                 * descriptor is left as 1, although the whole segment has
+                 * been made unusable. Clear it here to pass an Intel VMX
+                 * entry check when cross vendor migrating.
+                 */
+                if (var->unusable)
+                        var->db = 0;
+                break;
         }
 }
 
@@ -960,15 +965,16 @@ static void svm_set_segment(struct kvm_vcpu *vcpu,
 
 }
 
-static int svm_guest_debug(struct kvm_vcpu *vcpu, struct kvm_guest_debug *dbg)
+static void update_db_intercept(struct kvm_vcpu *vcpu)
 {
-        int old_debug = vcpu->guest_debug;
         struct vcpu_svm *svm = to_svm(vcpu);
 
-        vcpu->guest_debug = dbg->control;
-
         svm->vmcb->control.intercept_exceptions &=
                 ~((1 << DB_VECTOR) | (1 << BP_VECTOR));
+
+        if (vcpu->arch.singlestep)
+                svm->vmcb->control.intercept_exceptions |= (1 << DB_VECTOR);
+
         if (vcpu->guest_debug & KVM_GUESTDBG_ENABLE) {
                 if (vcpu->guest_debug &
                     (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP))
@@ -979,6 +985,16 @@ static int svm_guest_debug(struct kvm_vcpu *vcpu, struct kvm_guest_debug *dbg)
                                 1 << BP_VECTOR;
         } else
                 vcpu->guest_debug = 0;
+}
+
+static int svm_guest_debug(struct kvm_vcpu *vcpu, struct kvm_guest_debug *dbg)
+{
+        int old_debug = vcpu->guest_debug;
+        struct vcpu_svm *svm = to_svm(vcpu);
+
+        vcpu->guest_debug = dbg->control;
+
+        update_db_intercept(vcpu);
 
         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
                 svm->vmcb->save.dr7 = dbg->arch.debugreg[7];
@@ -993,16 +1009,6 @@ static int svm_guest_debug(struct kvm_vcpu *vcpu, struct kvm_guest_debug *dbg)
         return 0;
 }
 
-static int svm_get_irq(struct kvm_vcpu *vcpu)
-{
-        struct vcpu_svm *svm = to_svm(vcpu);
-        u32 exit_int_info = svm->vmcb->control.exit_int_info;
-
-        if (is_external_interrupt(exit_int_info))
-                return exit_int_info & SVM_EVTINJ_VEC_MASK;
-        return -1;
-}
-
 static void load_host_msrs(struct kvm_vcpu *vcpu)
 {
 #ifdef CONFIG_X86_64
@@ -1107,17 +1113,8 @@ static void svm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long value,
 
 static int pf_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
 {
-        u32 exit_int_info = svm->vmcb->control.exit_int_info;
-        struct kvm *kvm = svm->vcpu.kvm;
         u64 fault_address;
         u32 error_code;
-        bool event_injection = false;
-
-        if (!irqchip_in_kernel(kvm) &&
-            is_external_interrupt(exit_int_info)) {
-                event_injection = true;
-                push_irq(&svm->vcpu, exit_int_info & SVM_EVTINJ_VEC_MASK);
-        }
 
         fault_address  = svm->vmcb->control.exit_info_2;
         error_code = svm->vmcb->control.exit_info_1;
@@ -1137,23 +1134,40 @@ static int pf_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
          */
         if (npt_enabled)
                 svm_flush_tlb(&svm->vcpu);
-
-        if (!npt_enabled && event_injection)
-                kvm_mmu_unprotect_page_virt(&svm->vcpu, fault_address);
+        else {
+                if (kvm_event_needs_reinjection(&svm->vcpu))
+                        kvm_mmu_unprotect_page_virt(&svm->vcpu, fault_address);
+        }
         return kvm_mmu_page_fault(&svm->vcpu, fault_address, error_code);
 }
 
 static int db_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
 {
         if (!(svm->vcpu.guest_debug &
-              (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP))) {
+              (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP)) &&
+                !svm->vcpu.arch.singlestep) {
                 kvm_queue_exception(&svm->vcpu, DB_VECTOR);
                 return 1;
         }
-        kvm_run->exit_reason = KVM_EXIT_DEBUG;
-        kvm_run->debug.arch.pc = svm->vmcb->save.cs.base + svm->vmcb->save.rip;
-        kvm_run->debug.arch.exception = DB_VECTOR;
-        return 0;
+
+        if (svm->vcpu.arch.singlestep) {
+                svm->vcpu.arch.singlestep = false;
+                if (!(svm->vcpu.guest_debug & KVM_GUESTDBG_SINGLESTEP))
+                        svm->vmcb->save.rflags &=
+                                ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
+                update_db_intercept(&svm->vcpu);
+        }
+
+        if (svm->vcpu.guest_debug &
+            (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP)){
+                kvm_run->exit_reason = KVM_EXIT_DEBUG;
+                kvm_run->debug.arch.pc =
+                        svm->vmcb->save.cs.base + svm->vmcb->save.rip;
+                kvm_run->debug.arch.exception = DB_VECTOR;
+                return 0;
+        }
+
+        return 1;
 }
 
 static int bp_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
@@ -1842,17 +1856,51 @@ static int task_switch_interception(struct vcpu_svm *svm,
                                     struct kvm_run *kvm_run)
 {
         u16 tss_selector;
+        int reason;
+        int int_type = svm->vmcb->control.exit_int_info &
+                SVM_EXITINTINFO_TYPE_MASK;
+        int int_vec = svm->vmcb->control.exit_int_info & SVM_EVTINJ_VEC_MASK;
+        uint32_t type =
+                svm->vmcb->control.exit_int_info & SVM_EXITINTINFO_TYPE_MASK;
+        uint32_t idt_v =
+                svm->vmcb->control.exit_int_info & SVM_EXITINTINFO_VALID;
 
         tss_selector = (u16)svm->vmcb->control.exit_info_1;
+
         if (svm->vmcb->control.exit_info_2 &
             (1ULL << SVM_EXITINFOSHIFT_TS_REASON_IRET))
-                return kvm_task_switch(&svm->vcpu, tss_selector,
-                                       TASK_SWITCH_IRET);
-        if (svm->vmcb->control.exit_info_2 &
-            (1ULL << SVM_EXITINFOSHIFT_TS_REASON_JMP))
-                return kvm_task_switch(&svm->vcpu, tss_selector,
-                                       TASK_SWITCH_JMP);
-        return kvm_task_switch(&svm->vcpu, tss_selector, TASK_SWITCH_CALL);
+                reason = TASK_SWITCH_IRET;
+        else if (svm->vmcb->control.exit_info_2 &
+                 (1ULL << SVM_EXITINFOSHIFT_TS_REASON_JMP))
+                reason = TASK_SWITCH_JMP;
+        else if (idt_v)
+                reason = TASK_SWITCH_GATE;
+        else
+                reason = TASK_SWITCH_CALL;
+
+        if (reason == TASK_SWITCH_GATE) {
+                switch (type) {
+                case SVM_EXITINTINFO_TYPE_NMI:
+                        svm->vcpu.arch.nmi_injected = false;
+                        break;
+                case SVM_EXITINTINFO_TYPE_EXEPT:
+                        kvm_clear_exception_queue(&svm->vcpu);
+                        break;
+                case SVM_EXITINTINFO_TYPE_INTR:
+                        kvm_clear_interrupt_queue(&svm->vcpu);
+                        break;
+                default:
+                        break;
+                }
+        }
+
+        if (reason != TASK_SWITCH_GATE ||
+            int_type == SVM_EXITINTINFO_TYPE_SOFT ||
+            (int_type == SVM_EXITINTINFO_TYPE_EXEPT &&
+             (int_vec == OF_VECTOR || int_vec == BP_VECTOR)))
+                skip_emulated_instruction(&svm->vcpu);
+
+        return kvm_task_switch(&svm->vcpu, tss_selector, reason);
 }
 
 static int cpuid_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
@@ -1862,6 +1910,14 @@ static int cpuid_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
         return 1;
 }
 
+static int iret_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
+{
+        ++svm->vcpu.stat.nmi_window_exits;
+        svm->vmcb->control.intercept &= ~(1UL << INTERCEPT_IRET);
+        svm->vcpu.arch.hflags |= HF_IRET_MASK;
+        return 1;
+}
+
 static int invlpg_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
 {
         if (emulate_instruction(&svm->vcpu, kvm_run, 0, 0, 0) != EMULATE_DONE)
@@ -1879,8 +1935,14 @@ static int emulate_on_interception(struct vcpu_svm *svm,
 
 static int cr8_write_interception(struct vcpu_svm *svm, struct kvm_run *kvm_run)
 {
+        u8 cr8_prev = kvm_get_cr8(&svm->vcpu);
+        /* instruction emulation calls kvm_set_cr8() */
         emulate_instruction(&svm->vcpu, NULL, 0, 0, 0);
-        if (irqchip_in_kernel(svm->vcpu.kvm))
+        if (irqchip_in_kernel(svm->vcpu.kvm)) {
+                svm->vmcb->control.intercept_cr_write &= ~INTERCEPT_CR8_MASK;
+                return 1;
+        }
+        if (cr8_prev <= kvm_get_cr8(&svm->vcpu))
                 return 1;
         kvm_run->exit_reason = KVM_EXIT_SET_TPR;
         return 0;
@@ -2090,8 +2152,9 @@ static int interrupt_window_interception(struct vcpu_svm *svm,
          * If the user space waits to inject interrupts, exit as soon as
          * possible
          */
-        if (kvm_run->request_interrupt_window &&
-            !svm->vcpu.arch.irq_summary) {
+        if (!irqchip_in_kernel(svm->vcpu.kvm) &&
+            kvm_run->request_interrupt_window &&
+            !kvm_cpu_has_interrupt(&svm->vcpu)) {
                 ++svm->vcpu.stat.irq_window_exits;
                 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
                 return 0;
@@ -2134,6 +2197,7 @@ static int (*svm_exit_handlers[])(struct vcpu_svm *svm,
         [SVM_EXIT_VINTR]                        = interrupt_window_interception,
         /* [SVM_EXIT_CR0_SEL_WRITE]             = emulate_on_interception, */
         [SVM_EXIT_CPUID]                        = cpuid_interception,
+        [SVM_EXIT_IRET]                         = iret_interception,
         [SVM_EXIT_INVD]                         = emulate_on_interception,
         [SVM_EXIT_HLT]                          = halt_interception,
         [SVM_EXIT_INVLPG]                       = invlpg_interception,
@@ -2194,7 +2258,6 @@ static int handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
                 }
         }
 
-        kvm_reput_irq(svm);
 
         if (svm->vmcb->control.exit_code == SVM_EXIT_ERR) {
                 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
@@ -2205,7 +2268,7 @@ static int handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
 
         if (is_external_interrupt(svm->vmcb->control.exit_int_info) &&
             exit_code != SVM_EXIT_EXCP_BASE + PF_VECTOR &&
-            exit_code != SVM_EXIT_NPF)
+            exit_code != SVM_EXIT_NPF && exit_code != SVM_EXIT_TASK_SWITCH)
                 printk(KERN_ERR "%s: unexpected exit_ini_info 0x%x "
                        "exit_code 0x%x\n",
                        __func__, svm->vmcb->control.exit_int_info,
@@ -2242,6 +2305,15 @@ static void pre_svm_run(struct vcpu_svm *svm)
                 new_asid(svm, svm_data);
 }
 
+static void svm_inject_nmi(struct kvm_vcpu *vcpu)
+{
+        struct vcpu_svm *svm = to_svm(vcpu);
+
+        svm->vmcb->control.event_inj = SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_NMI;
+        vcpu->arch.hflags |= HF_NMI_MASK;
+        svm->vmcb->control.intercept |= (1UL << INTERCEPT_IRET);
+        ++vcpu->stat.nmi_injections;
+}
 
 static inline void svm_inject_irq(struct vcpu_svm *svm, int irq)
 {
@@ -2257,134 +2329,71 @@ static inline void svm_inject_irq(struct vcpu_svm *svm, int irq)
                 ((/*control->int_vector >> 4*/ 0xf) << V_INTR_PRIO_SHIFT);
 }
 
-static void svm_set_irq(struct kvm_vcpu *vcpu, int irq)
+static void svm_queue_irq(struct kvm_vcpu *vcpu, unsigned nr)
 {
         struct vcpu_svm *svm = to_svm(vcpu);
 
-        nested_svm_intr(svm);
-
-        svm_inject_irq(svm, irq);
+        svm->vmcb->control.event_inj = nr |
+                SVM_EVTINJ_VALID | SVM_EVTINJ_TYPE_INTR;
 }
 
-static void update_cr8_intercept(struct kvm_vcpu *vcpu)
+static void svm_set_irq(struct kvm_vcpu *vcpu)
 {
         struct vcpu_svm *svm = to_svm(vcpu);
-        struct vmcb *vmcb = svm->vmcb;
-        int max_irr, tpr;
 
-        if (!irqchip_in_kernel(vcpu->kvm) || vcpu->arch.apic->vapic_addr)
-                return;
+        nested_svm_intr(svm);
 
-        vmcb->control.intercept_cr_write &= ~INTERCEPT_CR8_MASK;
+        svm_queue_irq(vcpu, vcpu->arch.interrupt.nr);
+}
 
-        max_irr = kvm_lapic_find_highest_irr(vcpu);
-        if (max_irr == -1)
-                return;
+static void update_cr8_intercept(struct kvm_vcpu *vcpu, int tpr, int irr)
+{
+        struct vcpu_svm *svm = to_svm(vcpu);
 
-        tpr = kvm_lapic_get_cr8(vcpu) << 4;
+        if (irr == -1)
+                return;
 
-        if (tpr >= (max_irr & 0xf0))
-                vmcb->control.intercept_cr_write |= INTERCEPT_CR8_MASK;
+        if (tpr >= irr)
+                svm->vmcb->control.intercept_cr_write |= INTERCEPT_CR8_MASK;
 }
 
-static void svm_intr_assist(struct kvm_vcpu *vcpu)
+static int svm_nmi_allowed(struct kvm_vcpu *vcpu)
 {
         struct vcpu_svm *svm = to_svm(vcpu);
         struct vmcb *vmcb = svm->vmcb;
-        int intr_vector = -1;
-
-        if ((vmcb->control.exit_int_info & SVM_EVTINJ_VALID) &&
-            ((vmcb->control.exit_int_info & SVM_EVTINJ_TYPE_MASK) == 0)) {
-                intr_vector = vmcb->control.exit_int_info &
-                              SVM_EVTINJ_VEC_MASK;
-                vmcb->control.exit_int_info = 0;
-                svm_inject_irq(svm, intr_vector);
-                goto out;
-        }
-
-        if (vmcb->control.int_ctl & V_IRQ_MASK)
-                goto out;
-
-        if (!kvm_cpu_has_interrupt(vcpu))
-                goto out;
-
-        if (nested_svm_intr(svm))
-                goto out;
-
-        if (!(svm->vcpu.arch.hflags & HF_GIF_MASK))
-                goto out;
-
-        if (!(vmcb->save.rflags & X86_EFLAGS_IF) ||
-            (vmcb->control.int_state & SVM_INTERRUPT_SHADOW_MASK) ||
-            (vmcb->control.event_inj & SVM_EVTINJ_VALID)) {
-                /* unable to deliver irq, set pending irq */
-                svm_set_vintr(svm);
-                svm_inject_irq(svm, 0x0);
-                goto out;
-        }
-        /* Okay, we can deliver the interrupt: grab it and update PIC state. */
-        intr_vector = kvm_cpu_get_interrupt(vcpu);
-        svm_inject_irq(svm, intr_vector);
-out:
-        update_cr8_intercept(vcpu);
+        return !(vmcb->control.int_state & SVM_INTERRUPT_SHADOW_MASK) &&
+                !(svm->vcpu.arch.hflags & HF_NMI_MASK);
 }
 
-static void kvm_reput_irq(struct vcpu_svm *svm)
+static int svm_interrupt_allowed(struct kvm_vcpu *vcpu)
 {
-        struct vmcb_control_area *control = &svm->vmcb->control;
-
-        if ((control->int_ctl & V_IRQ_MASK)
-            && !irqchip_in_kernel(svm->vcpu.kvm)) {
-                control->int_ctl &= ~V_IRQ_MASK;
-                push_irq(&svm->vcpu, control->int_vector);
-        }
-
-        svm->vcpu.arch.interrupt_window_open =
-                !(control->int_state & SVM_INTERRUPT_SHADOW_MASK) &&
-                 (svm->vcpu.arch.hflags & HF_GIF_MASK);
+        struct vcpu_svm *svm = to_svm(vcpu);
+        struct vmcb *vmcb = svm->vmcb;
+        return (vmcb->save.rflags & X86_EFLAGS_IF) &&
+                !(vmcb->control.int_state & SVM_INTERRUPT_SHADOW_MASK) &&
+                (svm->vcpu.arch.hflags & HF_GIF_MASK);
 }
 
-static void svm_do_inject_vector(struct vcpu_svm *svm)
+static void enable_irq_window(struct kvm_vcpu *vcpu)
 {
-        struct kvm_vcpu *vcpu = &svm->vcpu;
-        int word_index = __ffs(vcpu->arch.irq_summary);
-        int bit_index = __ffs(vcpu->arch.irq_pending[word_index]);
-        int irq = word_index * BITS_PER_LONG + bit_index;
-
-        clear_bit(bit_index, &vcpu->arch.irq_pending[word_index]);
-        if (!vcpu->arch.irq_pending[word_index])
-                clear_bit(word_index, &vcpu->arch.irq_summary);
-        svm_inject_irq(svm, irq);
+        svm_set_vintr(to_svm(vcpu));
+        svm_inject_irq(to_svm(vcpu), 0x0);
 }
 
-static void do_interrupt_requests(struct kvm_vcpu *vcpu,
-                                       struct kvm_run *kvm_run)
+static void enable_nmi_window(struct kvm_vcpu *vcpu)
 {
         struct vcpu_svm *svm = to_svm(vcpu);
-        struct vmcb_control_area *control = &svm->vmcb->control;
-
-        if (nested_svm_intr(svm))
-                return;
 
-        svm->vcpu.arch.interrupt_window_open =
-                (!(control->int_state & SVM_INTERRUPT_SHADOW_MASK) &&
-                 (svm->vmcb->save.rflags & X86_EFLAGS_IF) &&
-                 (svm->vcpu.arch.hflags & HF_GIF_MASK));
+        if ((svm->vcpu.arch.hflags & (HF_NMI_MASK | HF_IRET_MASK))
+            == HF_NMI_MASK)
+                return; /* IRET will cause a vm exit */
 
-        if (svm->vcpu.arch.interrupt_window_open && svm->vcpu.arch.irq_summary)
-                /*
-                 * If interrupts enabled, and not blocked by sti or mov ss. Good.
-                 */
-                svm_do_inject_vector(svm);
-
-        /*
-         * Interrupts blocked.  Wait for unblock.
-         */
-        if (!svm->vcpu.arch.interrupt_window_open &&
-            (svm->vcpu.arch.irq_summary || kvm_run->request_interrupt_window))
-                svm_set_vintr(svm);
-        else
-                svm_clear_vintr(svm);
+        /* Something prevents NMI from been injected. Single step over
+           possible problem (IRET or exception injection or interrupt
+           shadow) */
+        vcpu->arch.singlestep = true;
+        svm->vmcb->save.rflags |= (X86_EFLAGS_TF | X86_EFLAGS_RF);
+        update_db_intercept(vcpu);
 }
 
 static int svm_set_tss_addr(struct kvm *kvm, unsigned int addr)
@@ -2407,7 +2416,7 @@ static inline void sync_cr8_to_lapic(struct kvm_vcpu *vcpu)
 
         if (!(svm->vmcb->control.intercept_cr_write & INTERCEPT_CR8_MASK)) {
                 int cr8 = svm->vmcb->control.int_ctl & V_TPR_MASK;
-                kvm_lapic_set_tpr(vcpu, cr8);
+                kvm_set_cr8(vcpu, cr8);
         }
 }
 
@@ -2416,14 +2425,54 @@ static inline void sync_lapic_to_cr8(struct kvm_vcpu *vcpu)
         struct vcpu_svm *svm = to_svm(vcpu);
         u64 cr8;
 
-        if (!irqchip_in_kernel(vcpu->kvm))
-                return;
-
         cr8 = kvm_get_cr8(vcpu);
         svm->vmcb->control.int_ctl &= ~V_TPR_MASK;
         svm->vmcb->control.int_ctl |= cr8 & V_TPR_MASK;
 }
 
+static void svm_complete_interrupts(struct vcpu_svm *svm)
+{
+        u8 vector;
+        int type;
+        u32 exitintinfo = svm->vmcb->control.exit_int_info;
+
+        if (svm->vcpu.arch.hflags & HF_IRET_MASK)
+                svm->vcpu.arch.hflags &= ~(HF_NMI_MASK | HF_IRET_MASK);
+
+        svm->vcpu.arch.nmi_injected = false;
+        kvm_clear_exception_queue(&svm->vcpu);
+        kvm_clear_interrupt_queue(&svm->vcpu);
+
+        if (!(exitintinfo & SVM_EXITINTINFO_VALID))
+                return;
+
+        vector = exitintinfo & SVM_EXITINTINFO_VEC_MASK;
+        type = exitintinfo & SVM_EXITINTINFO_TYPE_MASK;
+
+        switch (type) {
+        case SVM_EXITINTINFO_TYPE_NMI:
+                svm->vcpu.arch.nmi_injected = true;
+                break;
+        case SVM_EXITINTINFO_TYPE_EXEPT:
+                /* In case of software exception do not reinject an exception
+                   vector, but re-execute and instruction instead */
+                if (kvm_exception_is_soft(vector))
+                        break;
+                if (exitintinfo & SVM_EXITINTINFO_VALID_ERR) {
+                        u32 err = svm->vmcb->control.exit_int_info_err;
+                        kvm_queue_exception_e(&svm->vcpu, vector, err);
+
+                } else
+                        kvm_queue_exception(&svm->vcpu, vector);
+                break;
+        case SVM_EXITINTINFO_TYPE_INTR:
+                kvm_queue_interrupt(&svm->vcpu, vector, false);
+                break;
+        default:
+                break;
+        }
+}
+
 #ifdef CONFIG_X86_64
 #define R "r"
 #else
@@ -2552,6 +2601,8 @@ static void svm_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
         sync_cr8_to_lapic(vcpu);
 
         svm->next_rip = 0;
+
+        svm_complete_interrupts(svm);
 }
 
 #undef R
@@ -2617,7 +2668,7 @@ static int get_npt_level(void)
 #endif
 }
 
-static int svm_get_mt_mask_shift(void)
+static u64 svm_get_mt_mask(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio)
 {
         return 0;
 }
@@ -2667,17 +2718,21 @@ static struct kvm_x86_ops svm_x86_ops = {
         .run = svm_vcpu_run,
         .handle_exit = handle_exit,
         .skip_emulated_instruction = skip_emulated_instruction,
+        .set_interrupt_shadow = svm_set_interrupt_shadow,
+        .get_interrupt_shadow = svm_get_interrupt_shadow,
         .patch_hypercall = svm_patch_hypercall,
-        .get_irq = svm_get_irq,
         .set_irq = svm_set_irq,
+        .set_nmi = svm_inject_nmi,
         .queue_exception = svm_queue_exception,
-        .exception_injected = svm_exception_injected,
-        .inject_pending_irq = svm_intr_assist,
-        .inject_pending_vectors = do_interrupt_requests,
+        .interrupt_allowed = svm_interrupt_allowed,
+        .nmi_allowed = svm_nmi_allowed,
+        .enable_nmi_window = enable_nmi_window,
+        .enable_irq_window = enable_irq_window,
+        .update_cr8_intercept = update_cr8_intercept,
 
         .set_tss_addr = svm_set_tss_addr,
         .get_tdp_level = get_npt_level,
-        .get_mt_mask_shift = svm_get_mt_mask_shift,
+        .get_mt_mask = svm_get_mt_mask,
 };
 
 static int __init svm_init(void)
diff --git a/arch/x86/kvm/timer.c b/arch/x86/kvm/timer.c
new file mode 100644
index 000000000000..86dbac072d0c
--- /dev/null
+++ b/arch/x86/kvm/timer.c
@@ -0,0 +1,46 @@
+#include <linux/kvm_host.h>
+#include <linux/kvm.h>
+#include <linux/hrtimer.h>
+#include <asm/atomic.h>
+#include "kvm_timer.h"
+
+static int __kvm_timer_fn(struct kvm_vcpu *vcpu, struct kvm_timer *ktimer)
+{
+        int restart_timer = 0;
+        wait_queue_head_t *q = &vcpu->wq;
+
+        /* FIXME: this code should not know anything about vcpus */
+        if (!atomic_inc_and_test(&ktimer->pending))
+                set_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
+
+        if (!ktimer->reinject)
+                atomic_set(&ktimer->pending, 1);
+
+        if (waitqueue_active(q))
+                wake_up_interruptible(q);
+
+        if (ktimer->t_ops->is_periodic(ktimer)) {
+                hrtimer_add_expires_ns(&ktimer->timer, ktimer->period);
+                restart_timer = 1;
+        }
+
+        return restart_timer;
+}
+
+enum hrtimer_restart kvm_timer_fn(struct hrtimer *data)
+{
+        int restart_timer;
+        struct kvm_vcpu *vcpu;
+        struct kvm_timer *ktimer = container_of(data, struct kvm_timer, timer);
+
+        vcpu = ktimer->kvm->vcpus[ktimer->vcpu_id];
+        if (!vcpu)
+                return HRTIMER_NORESTART;
+
+        restart_timer = __kvm_timer_fn(vcpu, ktimer);
+        if (restart_timer)
+                return HRTIMER_RESTART;
+        else
+                return HRTIMER_NORESTART;
+}
+
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index bb481330716f..32d6ae8fb60e 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -32,26 +32,27 @@
 #include <asm/desc.h>
 #include <asm/vmx.h>
 #include <asm/virtext.h>
+#include <asm/mce.h>
 
 #define __ex(x) __kvm_handle_fault_on_reboot(x)
 
 MODULE_AUTHOR("Qumranet");
 MODULE_LICENSE("GPL");
 
-static int bypass_guest_pf = 1;
-module_param(bypass_guest_pf, bool, 0);
+static int __read_mostly bypass_guest_pf = 1;
+module_param(bypass_guest_pf, bool, S_IRUGO);
 
-static int enable_vpid = 1;
-module_param(enable_vpid, bool, 0);
+static int __read_mostly enable_vpid = 1;
+module_param_named(vpid, enable_vpid, bool, 0444);
 
-static int flexpriority_enabled = 1;
-module_param(flexpriority_enabled, bool, 0);
+static int __read_mostly flexpriority_enabled = 1;
+module_param_named(flexpriority, flexpriority_enabled, bool, S_IRUGO);
 
-static int enable_ept = 1;
-module_param(enable_ept, bool, 0);
+static int __read_mostly enable_ept = 1;
+module_param_named(ept, enable_ept, bool, S_IRUGO);
 
-static int emulate_invalid_guest_state = 0;
-module_param(emulate_invalid_guest_state, bool, 0);
+static int __read_mostly emulate_invalid_guest_state = 0;
+module_param(emulate_invalid_guest_state, bool, S_IRUGO);
 
 struct vmcs {
         u32 revision_id;
@@ -97,6 +98,7 @@ struct vcpu_vmx {
         int soft_vnmi_blocked;
         ktime_t entry_time;
         s64 vnmi_blocked_time;
+        u32 exit_reason;
 };
 
 static inline struct vcpu_vmx *to_vmx(struct kvm_vcpu *vcpu)
@@ -111,9 +113,10 @@ static DEFINE_PER_CPU(struct vmcs *, vmxarea);
 static DEFINE_PER_CPU(struct vmcs *, current_vmcs);
 static DEFINE_PER_CPU(struct list_head, vcpus_on_cpu);
 
-static struct page *vmx_io_bitmap_a;
-static struct page *vmx_io_bitmap_b;
-static struct page *vmx_msr_bitmap;
+static unsigned long *vmx_io_bitmap_a;
+static unsigned long *vmx_io_bitmap_b;
+static unsigned long *vmx_msr_bitmap_legacy;
+static unsigned long *vmx_msr_bitmap_longmode;
 
 static DECLARE_BITMAP(vmx_vpid_bitmap, VMX_NR_VPIDS);
 static DEFINE_SPINLOCK(vmx_vpid_lock);
@@ -213,70 +216,78 @@ static inline int is_external_interrupt(u32 intr_info)
                 == (INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
 }
 
+static inline int is_machine_check(u32 intr_info)
+{
+        return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
+                             INTR_INFO_VALID_MASK)) ==
+                (INTR_TYPE_HARD_EXCEPTION | MC_VECTOR | INTR_INFO_VALID_MASK);
+}
+
 static inline int cpu_has_vmx_msr_bitmap(void)
 {
-        return (vmcs_config.cpu_based_exec_ctrl & CPU_BASED_USE_MSR_BITMAPS);
+        return vmcs_config.cpu_based_exec_ctrl & CPU_BASED_USE_MSR_BITMAPS;
 }
 
 static inline int cpu_has_vmx_tpr_shadow(void)
 {
-        return (vmcs_config.cpu_based_exec_ctrl & CPU_BASED_TPR_SHADOW);
+        return vmcs_config.cpu_based_exec_ctrl & CPU_BASED_TPR_SHADOW;
 }
 
 static inline int vm_need_tpr_shadow(struct kvm *kvm)
 {
-        return ((cpu_has_vmx_tpr_shadow()) && (irqchip_in_kernel(kvm)));
+        return (cpu_has_vmx_tpr_shadow()) && (irqchip_in_kernel(kvm));
 }
 
 static inline int cpu_has_secondary_exec_ctrls(void)
 {
-        return (vmcs_config.cpu_based_exec_ctrl &
-                CPU_BASED_ACTIVATE_SECONDARY_CONTROLS);
+        return vmcs_config.cpu_based_exec_ctrl &
+                CPU_BASED_ACTIVATE_SECONDARY_CONTROLS;
 }
 
 static inline bool cpu_has_vmx_virtualize_apic_accesses(void)
 {
-        return flexpriority_enabled
-                && (vmcs_config.cpu_based_2nd_exec_ctrl &
-                    SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES);
+        return vmcs_config.cpu_based_2nd_exec_ctrl &
+                SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
+}
+
+static inline bool cpu_has_vmx_flexpriority(void)
+{
+        return cpu_has_vmx_tpr_shadow() &&
+                cpu_has_vmx_virtualize_apic_accesses();
 }
 
 static inline int cpu_has_vmx_invept_individual_addr(void)
 {
-        return (!!(vmx_capability.ept & VMX_EPT_EXTENT_INDIVIDUAL_BIT));
+        return !!(vmx_capability.ept & VMX_EPT_EXTENT_INDIVIDUAL_BIT);
 }
 
 static inline int cpu_has_vmx_invept_context(void)
 {
-        return (!!(vmx_capability.ept & VMX_EPT_EXTENT_CONTEXT_BIT));
+        return !!(vmx_capability.ept & VMX_EPT_EXTENT_CONTEXT_BIT);
 }
 
 static inline int cpu_has_vmx_invept_global(void)
 {
-        return (!!(vmx_capability.ept & VMX_EPT_EXTENT_GLOBAL_BIT));
+        return !!(vmx_capability.ept & VMX_EPT_EXTENT_GLOBAL_BIT);
 }
 
 static inline int cpu_has_vmx_ept(void)
 {
-        return (vmcs_config.cpu_based_2nd_exec_ctrl &
-                SECONDARY_EXEC_ENABLE_EPT);
-}
-
-static inline int vm_need_ept(void)
-{
-        return (cpu_has_vmx_ept() && enable_ept);
+        return vmcs_config.cpu_based_2nd_exec_ctrl &
+                SECONDARY_EXEC_ENABLE_EPT;
 }
 
 static inline int vm_need_virtualize_apic_accesses(struct kvm *kvm)
 {
-        return ((cpu_has_vmx_virtualize_apic_accesses()) &&
-                (irqchip_in_kernel(kvm)));
+        return flexpriority_enabled &&
+                (cpu_has_vmx_virtualize_apic_accesses()) &&
+                (irqchip_in_kernel(kvm));
 }
 
 static inline int cpu_has_vmx_vpid(void)
 {
-        return (vmcs_config.cpu_based_2nd_exec_ctrl &
-                SECONDARY_EXEC_ENABLE_VPID);
+        return vmcs_config.cpu_based_2nd_exec_ctrl &
+                SECONDARY_EXEC_ENABLE_VPID;
 }
 
 static inline int cpu_has_virtual_nmis(void)
@@ -284,6 +295,11 @@ static inline int cpu_has_virtual_nmis(void)
         return vmcs_config.pin_based_exec_ctrl & PIN_BASED_VIRTUAL_NMIS;
 }
 
+static inline bool report_flexpriority(void)
+{
+        return flexpriority_enabled;
+}
+
 static int __find_msr_index(struct vcpu_vmx *vmx, u32 msr)
 {
         int i;
@@ -381,7 +397,7 @@ static inline void ept_sync_global(void)
 
 static inline void ept_sync_context(u64 eptp)
 {
-        if (vm_need_ept()) {
+        if (enable_ept) {
                 if (cpu_has_vmx_invept_context())
                         __invept(VMX_EPT_EXTENT_CONTEXT, eptp, 0);
                 else
@@ -391,7 +407,7 @@ static inline void ept_sync_context(u64 eptp)
 
 static inline void ept_sync_individual_addr(u64 eptp, gpa_t gpa)
 {
-        if (vm_need_ept()) {
+        if (enable_ept) {
                 if (cpu_has_vmx_invept_individual_addr())
                         __invept(VMX_EPT_EXTENT_INDIVIDUAL_ADDR,
                                         eptp, gpa);
@@ -478,7 +494,7 @@ static void update_exception_bitmap(struct kvm_vcpu *vcpu)
 {
         u32 eb;
 
-        eb = (1u << PF_VECTOR) | (1u << UD_VECTOR);
+        eb = (1u << PF_VECTOR) | (1u << UD_VECTOR) | (1u << MC_VECTOR);
         if (!vcpu->fpu_active)
                 eb |= 1u << NM_VECTOR;
         if (vcpu->guest_debug & KVM_GUESTDBG_ENABLE) {
@@ -488,9 +504,9 @@ static void update_exception_bitmap(struct kvm_vcpu *vcpu)
                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP)
                         eb |= 1u << BP_VECTOR;
         }
-        if (vcpu->arch.rmode.active)
+        if (vcpu->arch.rmode.vm86_active)
                 eb = ~0;
-        if (vm_need_ept())
+        if (enable_ept)
                 eb &= ~(1u << PF_VECTOR); /* bypass_guest_pf = 0 */
         vmcs_write32(EXCEPTION_BITMAP, eb);
 }
@@ -724,29 +740,50 @@ static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu)
 
 static void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
 {
-        if (vcpu->arch.rmode.active)
+        if (vcpu->arch.rmode.vm86_active)
                 rflags |= X86_EFLAGS_IOPL | X86_EFLAGS_VM;
         vmcs_writel(GUEST_RFLAGS, rflags);
 }
 
+static u32 vmx_get_interrupt_shadow(struct kvm_vcpu *vcpu, int mask)
+{
+        u32 interruptibility = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
+        int ret = 0;
+
+        if (interruptibility & GUEST_INTR_STATE_STI)
+                ret |= X86_SHADOW_INT_STI;
+        if (interruptibility & GUEST_INTR_STATE_MOV_SS)
+                ret |= X86_SHADOW_INT_MOV_SS;
+
+        return ret & mask;
+}
+
+static void vmx_set_interrupt_shadow(struct kvm_vcpu *vcpu, int mask)
+{
+        u32 interruptibility_old = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
+        u32 interruptibility = interruptibility_old;
+
+        interruptibility &= ~(GUEST_INTR_STATE_STI | GUEST_INTR_STATE_MOV_SS);
+
+        if (mask & X86_SHADOW_INT_MOV_SS)
+                interruptibility |= GUEST_INTR_STATE_MOV_SS;
+        if (mask & X86_SHADOW_INT_STI)
+                interruptibility |= GUEST_INTR_STATE_STI;
+
+        if ((interruptibility != interruptibility_old))
+                vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, interruptibility);
+}
+
 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
 {
         unsigned long rip;
-        u32 interruptibility;
 
         rip = kvm_rip_read(vcpu);
         rip += vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
         kvm_rip_write(vcpu, rip);
 
-        /*
-         * We emulated an instruction, so temporary interrupt blocking
-         * should be removed, if set.
-         */
-        interruptibility = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
-        if (interruptibility & 3)
-                vmcs_write32(GUEST_INTERRUPTIBILITY_INFO,
-                             interruptibility & ~3);
-        vcpu->arch.interrupt_window_open = 1;
+        /* skipping an emulated instruction also counts */
+        vmx_set_interrupt_shadow(vcpu, 0);
 }
 
 static void vmx_queue_exception(struct kvm_vcpu *vcpu, unsigned nr,
@@ -760,7 +797,7 @@ static void vmx_queue_exception(struct kvm_vcpu *vcpu, unsigned nr,
                 intr_info |= INTR_INFO_DELIVER_CODE_MASK;
         }
 
-        if (vcpu->arch.rmode.active) {
+        if (vcpu->arch.rmode.vm86_active) {
                 vmx->rmode.irq.pending = true;
                 vmx->rmode.irq.vector = nr;
                 vmx->rmode.irq.rip = kvm_rip_read(vcpu);
@@ -773,8 +810,9 @@ static void vmx_queue_exception(struct kvm_vcpu *vcpu, unsigned nr,
                 return;
         }
 
-        if (nr == BP_VECTOR || nr == OF_VECTOR) {
-                vmcs_write32(VM_ENTRY_INSTRUCTION_LEN, 1);
+        if (kvm_exception_is_soft(nr)) {
+                vmcs_write32(VM_ENTRY_INSTRUCTION_LEN,
+                             vmx->vcpu.arch.event_exit_inst_len);
                 intr_info |= INTR_TYPE_SOFT_EXCEPTION;
         } else
                 intr_info |= INTR_TYPE_HARD_EXCEPTION;
@@ -782,11 +820,6 @@ static void vmx_queue_exception(struct kvm_vcpu *vcpu, unsigned nr,
         vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, intr_info);
 }
 
-static bool vmx_exception_injected(struct kvm_vcpu *vcpu)
-{
-        return false;
-}
-
 /*
  * Swap MSR entry in host/guest MSR entry array.
  */
@@ -812,6 +845,7 @@ static void move_msr_up(struct vcpu_vmx *vmx, int from, int to)
 static void setup_msrs(struct vcpu_vmx *vmx)
 {
         int save_nmsrs;
+        unsigned long *msr_bitmap;
 
         vmx_load_host_state(vmx);
         save_nmsrs = 0;
@@ -847,6 +881,15 @@ static void setup_msrs(struct vcpu_vmx *vmx)
                 __find_msr_index(vmx, MSR_KERNEL_GS_BASE);
 #endif
         vmx->msr_offset_efer = __find_msr_index(vmx, MSR_EFER);
+
+        if (cpu_has_vmx_msr_bitmap()) {
+                if (is_long_mode(&vmx->vcpu))
+                        msr_bitmap = vmx_msr_bitmap_longmode;
+                else
+                        msr_bitmap = vmx_msr_bitmap_legacy;
+
+                vmcs_write64(MSR_BITMAP, __pa(msr_bitmap));
+        }
 }
 
 /*
@@ -1034,13 +1077,6 @@ static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_guest_debug *dbg)
         return 0;
 }
 
-static int vmx_get_irq(struct kvm_vcpu *vcpu)
-{
-        if (!vcpu->arch.interrupt.pending)
-                return -1;
-        return vcpu->arch.interrupt.nr;
-}
-
 static __init int cpu_has_kvm_support(void)
 {
         return cpu_has_vmx();
@@ -1294,6 +1330,18 @@ static __init int hardware_setup(void)
         if (boot_cpu_has(X86_FEATURE_NX))
                 kvm_enable_efer_bits(EFER_NX);
 
+        if (!cpu_has_vmx_vpid())
+                enable_vpid = 0;
+
+        if (!cpu_has_vmx_ept())
+                enable_ept = 0;
+
+        if (!cpu_has_vmx_flexpriority())
+                flexpriority_enabled = 0;
+
+        if (!cpu_has_vmx_tpr_shadow())
+                kvm_x86_ops->update_cr8_intercept = NULL;
+
         return alloc_kvm_area();
 }
 
@@ -1324,7 +1372,7 @@ static void enter_pmode(struct kvm_vcpu *vcpu)
         struct vcpu_vmx *vmx = to_vmx(vcpu);
 
         vmx->emulation_required = 1;
-        vcpu->arch.rmode.active = 0;
+        vcpu->arch.rmode.vm86_active = 0;
 
         vmcs_writel(GUEST_TR_BASE, vcpu->arch.rmode.tr.base);
         vmcs_write32(GUEST_TR_LIMIT, vcpu->arch.rmode.tr.limit);
@@ -1386,7 +1434,7 @@ static void enter_rmode(struct kvm_vcpu *vcpu)
         struct vcpu_vmx *vmx = to_vmx(vcpu);
 
         vmx->emulation_required = 1;
-        vcpu->arch.rmode.active = 1;
+        vcpu->arch.rmode.vm86_active = 1;
 
         vcpu->arch.rmode.tr.base = vmcs_readl(GUEST_TR_BASE);
         vmcs_writel(GUEST_TR_BASE, rmode_tss_base(vcpu->kvm));
@@ -1485,7 +1533,7 @@ static void exit_lmode(struct kvm_vcpu *vcpu)
 static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
 {
         vpid_sync_vcpu_all(to_vmx(vcpu));
-        if (vm_need_ept())
+        if (enable_ept)
                 ept_sync_context(construct_eptp(vcpu->arch.mmu.root_hpa));
 }
 
@@ -1555,10 +1603,10 @@ static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 
         vmx_fpu_deactivate(vcpu);
 
-        if (vcpu->arch.rmode.active && (cr0 & X86_CR0_PE))
+        if (vcpu->arch.rmode.vm86_active && (cr0 & X86_CR0_PE))
                 enter_pmode(vcpu);
 
-        if (!vcpu->arch.rmode.active && !(cr0 & X86_CR0_PE))
+        if (!vcpu->arch.rmode.vm86_active && !(cr0 & X86_CR0_PE))
                 enter_rmode(vcpu);
 
 #ifdef CONFIG_X86_64
@@ -1570,7 +1618,7 @@ static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
         }
 #endif
 
-        if (vm_need_ept())
+        if (enable_ept)
                 ept_update_paging_mode_cr0(&hw_cr0, cr0, vcpu);
 
         vmcs_writel(CR0_READ_SHADOW, cr0);
@@ -1599,7 +1647,7 @@ static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
         u64 eptp;
 
         guest_cr3 = cr3;
-        if (vm_need_ept()) {
+        if (enable_ept) {
                 eptp = construct_eptp(cr3);
                 vmcs_write64(EPT_POINTER, eptp);
                 ept_sync_context(eptp);
@@ -1616,11 +1664,11 @@ static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 
 static void vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 {
-        unsigned long hw_cr4 = cr4 | (vcpu->arch.rmode.active ?
+        unsigned long hw_cr4 = cr4 | (vcpu->arch.rmode.vm86_active ?
                     KVM_RMODE_VM_CR4_ALWAYS_ON : KVM_PMODE_VM_CR4_ALWAYS_ON);
 
         vcpu->arch.cr4 = cr4;
-        if (vm_need_ept())
+        if (enable_ept)
                 ept_update_paging_mode_cr4(&hw_cr4, vcpu);
 
         vmcs_writel(CR4_READ_SHADOW, cr4);
@@ -1699,7 +1747,7 @@ static void vmx_set_segment(struct kvm_vcpu *vcpu,
         struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
         u32 ar;
 
-        if (vcpu->arch.rmode.active && seg == VCPU_SREG_TR) {
+        if (vcpu->arch.rmode.vm86_active && seg == VCPU_SREG_TR) {
                 vcpu->arch.rmode.tr.selector = var->selector;
                 vcpu->arch.rmode.tr.base = var->base;
                 vcpu->arch.rmode.tr.limit = var->limit;
@@ -1709,7 +1757,7 @@ static void vmx_set_segment(struct kvm_vcpu *vcpu,
         vmcs_writel(sf->base, var->base);
         vmcs_write32(sf->limit, var->limit);
         vmcs_write16(sf->selector, var->selector);
-        if (vcpu->arch.rmode.active && var->s) {
+        if (vcpu->arch.rmode.vm86_active && var->s) {
                 /*
                  * Hack real-mode segments into vm86 compatibility.
                  */
@@ -1982,7 +2030,7 @@ static int init_rmode_identity_map(struct kvm *kvm)
         pfn_t identity_map_pfn;
         u32 tmp;
 
-        if (!vm_need_ept())
+        if (!enable_ept)
                 return 1;
         if (unlikely(!kvm->arch.ept_identity_pagetable)) {
                 printk(KERN_ERR "EPT: identity-mapping pagetable "
@@ -2071,7 +2119,7 @@ static void allocate_vpid(struct vcpu_vmx *vmx)
         int vpid;
 
         vmx->vpid = 0;
-        if (!enable_vpid || !cpu_has_vmx_vpid())
+        if (!enable_vpid)
                 return;
         spin_lock(&vmx_vpid_lock);
         vpid = find_first_zero_bit(vmx_vpid_bitmap, VMX_NR_VPIDS);
@@ -2082,9 +2130,9 @@ static void allocate_vpid(struct vcpu_vmx *vmx)
         spin_unlock(&vmx_vpid_lock);
 }
 
-static void vmx_disable_intercept_for_msr(struct page *msr_bitmap, u32 msr)
+static void __vmx_disable_intercept_for_msr(unsigned long *msr_bitmap, u32 msr)
 {
-        void *va;
+        int f = sizeof(unsigned long);
 
         if (!cpu_has_vmx_msr_bitmap())
                 return;
@@ -2094,16 +2142,21 @@ static void vmx_disable_intercept_for_msr(struct page *msr_bitmap, u32 msr)
          * have the write-low and read-high bitmap offsets the wrong way round.
          * We can control MSRs 0x00000000-0x00001fff and 0xc0000000-0xc0001fff.
          */
-        va = kmap(msr_bitmap);
         if (msr <= 0x1fff) {
-                __clear_bit(msr, va + 0x000); /* read-low */
-                __clear_bit(msr, va + 0x800); /* write-low */
+                __clear_bit(msr, msr_bitmap + 0x000 / f); /* read-low */
+                __clear_bit(msr, msr_bitmap + 0x800 / f); /* write-low */
         } else if ((msr >= 0xc0000000) && (msr <= 0xc0001fff)) {
                 msr &= 0x1fff;
-                __clear_bit(msr, va + 0x400); /* read-high */
-                __clear_bit(msr, va + 0xc00); /* write-high */
+                __clear_bit(msr, msr_bitmap + 0x400 / f); /* read-high */
+                __clear_bit(msr, msr_bitmap + 0xc00 / f); /* write-high */
         }
-        kunmap(msr_bitmap);
+}
+
+static void vmx_disable_intercept_for_msr(u32 msr, bool longmode_only)
+{
+        if (!longmode_only)
+                __vmx_disable_intercept_for_msr(vmx_msr_bitmap_legacy, msr);
+        __vmx_disable_intercept_for_msr(vmx_msr_bitmap_longmode, msr);
 }
 
 /*
@@ -2121,11 +2174,11 @@ static int vmx_vcpu_setup(struct vcpu_vmx *vmx)
         u32 exec_control;
 
         /* I/O */
-        vmcs_write64(IO_BITMAP_A, page_to_phys(vmx_io_bitmap_a));
-        vmcs_write64(IO_BITMAP_B, page_to_phys(vmx_io_bitmap_b));
+        vmcs_write64(IO_BITMAP_A, __pa(vmx_io_bitmap_a));
+        vmcs_write64(IO_BITMAP_B, __pa(vmx_io_bitmap_b));
 
         if (cpu_has_vmx_msr_bitmap())
-                vmcs_write64(MSR_BITMAP, page_to_phys(vmx_msr_bitmap));
+                vmcs_write64(MSR_BITMAP, __pa(vmx_msr_bitmap_legacy));
 
         vmcs_write64(VMCS_LINK_POINTER, -1ull); /* 22.3.1.5 */
 
@@ -2141,7 +2194,7 @@ static int vmx_vcpu_setup(struct vcpu_vmx *vmx)
                                 CPU_BASED_CR8_LOAD_EXITING;
 #endif
         }
-        if (!vm_need_ept())
+        if (!enable_ept)
                 exec_control |= CPU_BASED_CR3_STORE_EXITING |
                                 CPU_BASED_CR3_LOAD_EXITING  |
                                 CPU_BASED_INVLPG_EXITING;
@@ -2154,7 +2207,7 @@ static int vmx_vcpu_setup(struct vcpu_vmx *vmx)
                                 ~SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES;
                 if (vmx->vpid == 0)
                         exec_control &= ~SECONDARY_EXEC_ENABLE_VPID;
-                if (!vm_need_ept())
+                if (!enable_ept)
                         exec_control &= ~SECONDARY_EXEC_ENABLE_EPT;
                 vmcs_write32(SECONDARY_VM_EXEC_CONTROL, exec_control);
         }
@@ -2273,7 +2326,7 @@ static int vmx_vcpu_reset(struct kvm_vcpu *vcpu)
                 goto out;
         }
 
-        vmx->vcpu.arch.rmode.active = 0;
+        vmx->vcpu.arch.rmode.vm86_active = 0;
 
         vmx->soft_vnmi_blocked = 0;
 
@@ -2402,14 +2455,16 @@ static void enable_nmi_window(struct kvm_vcpu *vcpu)
         vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
 }
 
-static void vmx_inject_irq(struct kvm_vcpu *vcpu, int irq)
+static void vmx_inject_irq(struct kvm_vcpu *vcpu)
 {
         struct vcpu_vmx *vmx = to_vmx(vcpu);
+        uint32_t intr;
+        int irq = vcpu->arch.interrupt.nr;
 
         KVMTRACE_1D(INJ_VIRQ, vcpu, (u32)irq, handler);
 
         ++vcpu->stat.irq_injections;
-        if (vcpu->arch.rmode.active) {
+        if (vcpu->arch.rmode.vm86_active) {
                 vmx->rmode.irq.pending = true;
                 vmx->rmode.irq.vector = irq;
                 vmx->rmode.irq.rip = kvm_rip_read(vcpu);
@@ -2419,8 +2474,14 @@ static void vmx_inject_irq(struct kvm_vcpu *vcpu, int irq)
                 kvm_rip_write(vcpu, vmx->rmode.irq.rip - 1);
                 return;
         }
-        vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
-                        irq | INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
+        intr = irq | INTR_INFO_VALID_MASK;
+        if (vcpu->arch.interrupt.soft) {
+                intr |= INTR_TYPE_SOFT_INTR;
+                vmcs_write32(VM_ENTRY_INSTRUCTION_LEN,
+                             vmx->vcpu.arch.event_exit_inst_len);
+        } else
+                intr |= INTR_TYPE_EXT_INTR;
+        vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, intr);
 }
 
 static void vmx_inject_nmi(struct kvm_vcpu *vcpu)
@@ -2441,7 +2502,7 @@ static void vmx_inject_nmi(struct kvm_vcpu *vcpu)
         }
 
         ++vcpu->stat.nmi_injections;
-        if (vcpu->arch.rmode.active) {
+        if (vcpu->arch.rmode.vm86_active) {
                 vmx->rmode.irq.pending = true;
                 vmx->rmode.irq.vector = NMI_VECTOR;
                 vmx->rmode.irq.rip = kvm_rip_read(vcpu);
@@ -2456,76 +2517,21 @@ static void vmx_inject_nmi(struct kvm_vcpu *vcpu)
                         INTR_TYPE_NMI_INTR | INTR_INFO_VALID_MASK | NMI_VECTOR);
 }
 
-static void vmx_update_window_states(struct kvm_vcpu *vcpu)
+static int vmx_nmi_allowed(struct kvm_vcpu *vcpu)
 {
-        u32 guest_intr = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
-
-        vcpu->arch.nmi_window_open =
-                !(guest_intr & (GUEST_INTR_STATE_STI |
-                                GUEST_INTR_STATE_MOV_SS |
-                                GUEST_INTR_STATE_NMI));
         if (!cpu_has_virtual_nmis() && to_vmx(vcpu)->soft_vnmi_blocked)
-                vcpu->arch.nmi_window_open = 0;
-
-        vcpu->arch.interrupt_window_open =
-                ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
-                 !(guest_intr & (GUEST_INTR_STATE_STI |
-                                 GUEST_INTR_STATE_MOV_SS)));
-}
-
-static void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
-{
-        int word_index = __ffs(vcpu->arch.irq_summary);
-        int bit_index = __ffs(vcpu->arch.irq_pending[word_index]);
-        int irq = word_index * BITS_PER_LONG + bit_index;
+                return 0;
 
-        clear_bit(bit_index, &vcpu->arch.irq_pending[word_index]);
-        if (!vcpu->arch.irq_pending[word_index])
-                clear_bit(word_index, &vcpu->arch.irq_summary);
-        kvm_queue_interrupt(vcpu, irq);
+        return  !(vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) &
+                        (GUEST_INTR_STATE_STI | GUEST_INTR_STATE_MOV_SS |
+                                GUEST_INTR_STATE_NMI));
 }
 
-static void do_interrupt_requests(struct kvm_vcpu *vcpu,
-                                       struct kvm_run *kvm_run)
+static int vmx_interrupt_allowed(struct kvm_vcpu *vcpu)
 {
-        vmx_update_window_states(vcpu);
-
-        if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
-                vmcs_clear_bits(GUEST_INTERRUPTIBILITY_INFO,
-                                GUEST_INTR_STATE_STI |
-                                GUEST_INTR_STATE_MOV_SS);
-
-        if (vcpu->arch.nmi_pending && !vcpu->arch.nmi_injected) {
-                if (vcpu->arch.interrupt.pending) {
-                        enable_nmi_window(vcpu);
-                } else if (vcpu->arch.nmi_window_open) {
-                        vcpu->arch.nmi_pending = false;
-                        vcpu->arch.nmi_injected = true;
-                } else {
-                        enable_nmi_window(vcpu);
-                        return;
-                }
-        }
-        if (vcpu->arch.nmi_injected) {
-                vmx_inject_nmi(vcpu);
-                if (vcpu->arch.nmi_pending)
-                        enable_nmi_window(vcpu);
-                else if (vcpu->arch.irq_summary
-                         || kvm_run->request_interrupt_window)
-                        enable_irq_window(vcpu);
-                return;
-        }
-
-        if (vcpu->arch.interrupt_window_open) {
-                if (vcpu->arch.irq_summary && !vcpu->arch.interrupt.pending)
-                        kvm_do_inject_irq(vcpu);
-
-                if (vcpu->arch.interrupt.pending)
-                        vmx_inject_irq(vcpu, vcpu->arch.interrupt.nr);
-        }
-        if (!vcpu->arch.interrupt_window_open &&
-            (vcpu->arch.irq_summary || kvm_run->request_interrupt_window))
-                enable_irq_window(vcpu);
+        return (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
+                !(vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) &
+                        (GUEST_INTR_STATE_STI | GUEST_INTR_STATE_MOV_SS));
 }
 
 static int vmx_set_tss_addr(struct kvm *kvm, unsigned int addr)
@@ -2585,6 +2591,31 @@ static int handle_rmode_exception(struct kvm_vcpu *vcpu,
         return 0;
 }
 
+/*
+ * Trigger machine check on the host. We assume all the MSRs are already set up
+ * by the CPU and that we still run on the same CPU as the MCE occurred on.
+ * We pass a fake environment to the machine check handler because we want
+ * the guest to be always treated like user space, no matter what context
+ * it used internally.
+ */
+static void kvm_machine_check(void)
+{
+#if defined(CONFIG_X86_MCE) && defined(CONFIG_X86_64)
+        struct pt_regs regs = {
+                .cs = 3, /* Fake ring 3 no matter what the guest ran on */
+                .flags = X86_EFLAGS_IF,
+        };
+
+        do_machine_check(&regs, 0);
+#endif
+}
+
+static int handle_machine_check(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
+{
+        /* already handled by vcpu_run */
+        return 1;
+}
+
 static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 {
         struct vcpu_vmx *vmx = to_vmx(vcpu);
@@ -2596,17 +2627,14 @@ static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
         vect_info = vmx->idt_vectoring_info;
         intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
 
+        if (is_machine_check(intr_info))
+                return handle_machine_check(vcpu, kvm_run);
+
         if ((vect_info & VECTORING_INFO_VALID_MASK) &&
                                                 !is_page_fault(intr_info))
                 printk(KERN_ERR "%s: unexpected, vectoring info 0x%x "
                        "intr info 0x%x\n", __func__, vect_info, intr_info);
 
-        if (!irqchip_in_kernel(vcpu->kvm) && is_external_interrupt(vect_info)) {
-                int irq = vect_info & VECTORING_INFO_VECTOR_MASK;
-                set_bit(irq, vcpu->arch.irq_pending);
-                set_bit(irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
-        }
-
         if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == INTR_TYPE_NMI_INTR)
                 return 1;  /* already handled by vmx_vcpu_run() */
 
@@ -2628,17 +2656,17 @@ static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
                 error_code = vmcs_read32(VM_EXIT_INTR_ERROR_CODE);
         if (is_page_fault(intr_info)) {
                 /* EPT won't cause page fault directly */
-                if (vm_need_ept())
+                if (enable_ept)
                         BUG();
                 cr2 = vmcs_readl(EXIT_QUALIFICATION);
                 KVMTRACE_3D(PAGE_FAULT, vcpu, error_code, (u32)cr2,
                             (u32)((u64)cr2 >> 32), handler);
-                if (vcpu->arch.interrupt.pending || vcpu->arch.exception.pending)
+                if (kvm_event_needs_reinjection(vcpu))
                         kvm_mmu_unprotect_page_virt(vcpu, cr2);
                 return kvm_mmu_page_fault(vcpu, cr2, error_code);
         }
 
-        if (vcpu->arch.rmode.active &&
+        if (vcpu->arch.rmode.vm86_active &&
             handle_rmode_exception(vcpu, intr_info & INTR_INFO_VECTOR_MASK,
                                                                 error_code)) {
                 if (vcpu->arch.halt_request) {
@@ -2753,13 +2781,18 @@ static int handle_cr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
                         kvm_set_cr4(vcpu, kvm_register_read(vcpu, reg));
                         skip_emulated_instruction(vcpu);
                         return 1;
-                case 8:
-                        kvm_set_cr8(vcpu, kvm_register_read(vcpu, reg));
-                        skip_emulated_instruction(vcpu);
-                        if (irqchip_in_kernel(vcpu->kvm))
-                                return 1;
-                        kvm_run->exit_reason = KVM_EXIT_SET_TPR;
-                        return 0;
+                case 8: {
+                                u8 cr8_prev = kvm_get_cr8(vcpu);
+                                u8 cr8 = kvm_register_read(vcpu, reg);
+                                kvm_set_cr8(vcpu, cr8);
+                                skip_emulated_instruction(vcpu);
+                                if (irqchip_in_kernel(vcpu->kvm))
+                                        return 1;
+                                if (cr8_prev <= cr8)
+                                        return 1;
+                                kvm_run->exit_reason = KVM_EXIT_SET_TPR;
+                                return 0;
+                        }
                 };
                 break;
         case 2: /* clts */
@@ -2957,8 +2990,9 @@ static int handle_interrupt_window(struct kvm_vcpu *vcpu,
          * If the user space waits to inject interrupts, exit as soon as
          * possible
          */
-        if (kvm_run->request_interrupt_window &&
-            !vcpu->arch.irq_summary) {
+        if (!irqchip_in_kernel(vcpu->kvm) &&
+            kvm_run->request_interrupt_window &&
+            !kvm_cpu_has_interrupt(vcpu)) {
                 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
                 return 0;
         }
@@ -2980,7 +3014,7 @@ static int handle_vmcall(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 
 static int handle_invlpg(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 {
-        u64 exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
+        unsigned long exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
 
         kvm_mmu_invlpg(vcpu, exit_qualification);
         skip_emulated_instruction(vcpu);
@@ -2996,11 +3030,11 @@ static int handle_wbinvd(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 
 static int handle_apic_access(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 {
-        u64 exit_qualification;
+        unsigned long exit_qualification;
         enum emulation_result er;
         unsigned long offset;
 
-        exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
+        exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
         offset = exit_qualification & 0xffful;
 
         er = emulate_instruction(vcpu, kvm_run, 0, 0, 0);
@@ -3019,22 +3053,41 @@ static int handle_task_switch(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
         struct vcpu_vmx *vmx = to_vmx(vcpu);
         unsigned long exit_qualification;
         u16 tss_selector;
-        int reason;
+        int reason, type, idt_v;
+
+        idt_v = (vmx->idt_vectoring_info & VECTORING_INFO_VALID_MASK);
+        type = (vmx->idt_vectoring_info & VECTORING_INFO_TYPE_MASK);
 
         exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
 
         reason = (u32)exit_qualification >> 30;
-        if (reason == TASK_SWITCH_GATE && vmx->vcpu.arch.nmi_injected &&
-            (vmx->idt_vectoring_info & VECTORING_INFO_VALID_MASK) &&
-            (vmx->idt_vectoring_info & VECTORING_INFO_TYPE_MASK)
-            == INTR_TYPE_NMI_INTR) {
-                vcpu->arch.nmi_injected = false;
-                if (cpu_has_virtual_nmis())
-                        vmcs_set_bits(GUEST_INTERRUPTIBILITY_INFO,
-                                      GUEST_INTR_STATE_NMI);
+        if (reason == TASK_SWITCH_GATE && idt_v) {
+                switch (type) {
+                case INTR_TYPE_NMI_INTR:
+                        vcpu->arch.nmi_injected = false;
+                        if (cpu_has_virtual_nmis())
+                                vmcs_set_bits(GUEST_INTERRUPTIBILITY_INFO,
+                                              GUEST_INTR_STATE_NMI);
+                        break;
+                case INTR_TYPE_EXT_INTR:
+                case INTR_TYPE_SOFT_INTR:
+                        kvm_clear_interrupt_queue(vcpu);
+                        break;
+                case INTR_TYPE_HARD_EXCEPTION:
+                case INTR_TYPE_SOFT_EXCEPTION:
+                        kvm_clear_exception_queue(vcpu);
+                        break;
+                default:
+                        break;
+                }
         }
         tss_selector = exit_qualification;
 
+        if (!idt_v || (type != INTR_TYPE_HARD_EXCEPTION &&
+                       type != INTR_TYPE_EXT_INTR &&
+                       type != INTR_TYPE_NMI_INTR))
+                skip_emulated_instruction(vcpu);
+
         if (!kvm_task_switch(vcpu, tss_selector, reason))
                 return 0;
 
@@ -3051,11 +3104,11 @@ static int handle_task_switch(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 
 static int handle_ept_violation(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 {
-        u64 exit_qualification;
+        unsigned long exit_qualification;
         gpa_t gpa;
         int gla_validity;
 
-        exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
+        exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
 
         if (exit_qualification & (1 << 6)) {
                 printk(KERN_ERR "EPT: GPA exceeds GAW!\n");
@@ -3067,7 +3120,7 @@ static int handle_ept_violation(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
                 printk(KERN_ERR "EPT: Handling EPT violation failed!\n");
                 printk(KERN_ERR "EPT: GPA: 0x%lx, GVA: 0x%lx\n",
                         (long unsigned int)vmcs_read64(GUEST_PHYSICAL_ADDRESS),
-                        (long unsigned int)vmcs_read64(GUEST_LINEAR_ADDRESS));
+                        vmcs_readl(GUEST_LINEAR_ADDRESS));
                 printk(KERN_ERR "EPT: Exit qualification is 0x%lx\n",
                         (long unsigned int)exit_qualification);
                 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
@@ -3150,6 +3203,7 @@ static int (*kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu,
         [EXIT_REASON_WBINVD]                  = handle_wbinvd,
         [EXIT_REASON_TASK_SWITCH]             = handle_task_switch,
         [EXIT_REASON_EPT_VIOLATION]           = handle_ept_violation,
+        [EXIT_REASON_MCE_DURING_VMENTRY]      = handle_machine_check,
 };
 
 static const int kvm_vmx_max_exit_handlers =
@@ -3159,10 +3213,10 @@ static const int kvm_vmx_max_exit_handlers =
  * The guest has exited.  See if we can fix it or if we need userspace
  * assistance.
  */
-static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
+static int vmx_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
 {
-        u32 exit_reason = vmcs_read32(VM_EXIT_REASON);
         struct vcpu_vmx *vmx = to_vmx(vcpu);
+        u32 exit_reason = vmx->exit_reason;
         u32 vectoring_info = vmx->idt_vectoring_info;
 
         KVMTRACE_3D(VMEXIT, vcpu, exit_reason, (u32)kvm_rip_read(vcpu),
@@ -3178,7 +3232,7 @@ static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
 
         /* Access CR3 don't cause VMExit in paging mode, so we need
          * to sync with guest real CR3. */
-        if (vm_need_ept() && is_paging(vcpu)) {
+        if (enable_ept && is_paging(vcpu)) {
                 vcpu->arch.cr3 = vmcs_readl(GUEST_CR3);
                 ept_load_pdptrs(vcpu);
         }
@@ -3199,9 +3253,8 @@ static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
                        __func__, vectoring_info, exit_reason);
 
         if (unlikely(!cpu_has_virtual_nmis() && vmx->soft_vnmi_blocked)) {
-                if (vcpu->arch.interrupt_window_open) {
+                if (vmx_interrupt_allowed(vcpu)) {
                         vmx->soft_vnmi_blocked = 0;
-                        vcpu->arch.nmi_window_open = 1;
                 } else if (vmx->vnmi_blocked_time > 1000000000LL &&
                            vcpu->arch.nmi_pending) {
                         /*
@@ -3214,7 +3267,6 @@ static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
                                "state on VCPU %d after 1 s timeout\n",
                                __func__, vcpu->vcpu_id);
                         vmx->soft_vnmi_blocked = 0;
-                        vmx->vcpu.arch.nmi_window_open = 1;
                 }
         }
 
@@ -3228,122 +3280,107 @@ static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
         return 0;
 }
 
-static void update_tpr_threshold(struct kvm_vcpu *vcpu)
+static void update_cr8_intercept(struct kvm_vcpu *vcpu, int tpr, int irr)
 {
-        int max_irr, tpr;
-
-        if (!vm_need_tpr_shadow(vcpu->kvm))
-                return;
-
-        if (!kvm_lapic_enabled(vcpu) ||
-            ((max_irr = kvm_lapic_find_highest_irr(vcpu)) == -1)) {
+        if (irr == -1 || tpr < irr) {
                 vmcs_write32(TPR_THRESHOLD, 0);
                 return;
         }
 
-        tpr = (kvm_lapic_get_cr8(vcpu) & 0x0f) << 4;
-        vmcs_write32(TPR_THRESHOLD, (max_irr > tpr) ? tpr >> 4 : max_irr >> 4);
+        vmcs_write32(TPR_THRESHOLD, irr);
 }
 
 static void vmx_complete_interrupts(struct vcpu_vmx *vmx)
 {
         u32 exit_intr_info;
-        u32 idt_vectoring_info;
+        u32 idt_vectoring_info = vmx->idt_vectoring_info;
         bool unblock_nmi;
         u8 vector;
         int type;
         bool idtv_info_valid;
-        u32 error;
 
         exit_intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
+
+        vmx->exit_reason = vmcs_read32(VM_EXIT_REASON);
+
+        /* Handle machine checks before interrupts are enabled */
+        if ((vmx->exit_reason == EXIT_REASON_MCE_DURING_VMENTRY)
+            || (vmx->exit_reason == EXIT_REASON_EXCEPTION_NMI
+                && is_machine_check(exit_intr_info)))
+                kvm_machine_check();
+
+        /* We need to handle NMIs before interrupts are enabled */
+        if ((exit_intr_info & INTR_INFO_INTR_TYPE_MASK) == INTR_TYPE_NMI_INTR &&
+            (exit_intr_info & INTR_INFO_VALID_MASK)) {
+                KVMTRACE_0D(NMI, &vmx->vcpu, handler);
+                asm("int $2");
+        }
+
+        idtv_info_valid = idt_vectoring_info & VECTORING_INFO_VALID_MASK;
+
         if (cpu_has_virtual_nmis()) {
                 unblock_nmi = (exit_intr_info & INTR_INFO_UNBLOCK_NMI) != 0;
                 vector = exit_intr_info & INTR_INFO_VECTOR_MASK;
                 /*
-                 * SDM 3: 25.7.1.2
+                 * SDM 3: 27.7.1.2 (September 2008)
                  * Re-set bit "block by NMI" before VM entry if vmexit caused by
                  * a guest IRET fault.
+                 * SDM 3: 23.2.2 (September 2008)
+                 * Bit 12 is undefined in any of the following cases:
+                 *  If the VM exit sets the valid bit in the IDT-vectoring
+                 *   information field.
+                 *  If the VM exit is due to a double fault.
                  */
-                if (unblock_nmi && vector != DF_VECTOR)
+                if ((exit_intr_info & INTR_INFO_VALID_MASK) && unblock_nmi &&
+                    vector != DF_VECTOR && !idtv_info_valid)
                         vmcs_set_bits(GUEST_INTERRUPTIBILITY_INFO,
                                       GUEST_INTR_STATE_NMI);
         } else if (unlikely(vmx->soft_vnmi_blocked))
                 vmx->vnmi_blocked_time +=
                         ktime_to_ns(ktime_sub(ktime_get(), vmx->entry_time));
 
-        idt_vectoring_info = vmx->idt_vectoring_info;
-        idtv_info_valid = idt_vectoring_info & VECTORING_INFO_VALID_MASK;
+        vmx->vcpu.arch.nmi_injected = false;
+        kvm_clear_exception_queue(&vmx->vcpu);
+        kvm_clear_interrupt_queue(&vmx->vcpu);
+
+        if (!idtv_info_valid)
+                return;
+
         vector = idt_vectoring_info & VECTORING_INFO_VECTOR_MASK;
         type = idt_vectoring_info & VECTORING_INFO_TYPE_MASK;
-        if (vmx->vcpu.arch.nmi_injected) {
+
+        switch (type) {
+        case INTR_TYPE_NMI_INTR:
+                vmx->vcpu.arch.nmi_injected = true;
                 /*
-                 * SDM 3: 25.7.1.2
-                 * Clear bit "block by NMI" before VM entry if a NMI delivery
-                 * faulted.
+                 * SDM 3: 27.7.1.2 (September 2008)
+                 * Clear bit "block by NMI" before VM entry if a NMI
+                 * delivery faulted.
                  */
-                if (idtv_info_valid && type == INTR_TYPE_NMI_INTR)
-                        vmcs_clear_bits(GUEST_INTERRUPTIBILITY_INFO,
-                                        GUEST_INTR_STATE_NMI);
-                else
-                        vmx->vcpu.arch.nmi_injected = false;
-        }
-        kvm_clear_exception_queue(&vmx->vcpu);
-        if (idtv_info_valid && (type == INTR_TYPE_HARD_EXCEPTION ||
-                                type == INTR_TYPE_SOFT_EXCEPTION)) {
+                vmcs_clear_bits(GUEST_INTERRUPTIBILITY_INFO,
+                                GUEST_INTR_STATE_NMI);
+                break;
+        case INTR_TYPE_SOFT_EXCEPTION:
+                vmx->vcpu.arch.event_exit_inst_len =
+                        vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
+                /* fall through */
+        case INTR_TYPE_HARD_EXCEPTION:
                 if (idt_vectoring_info & VECTORING_INFO_DELIVER_CODE_MASK) {
-                        error = vmcs_read32(IDT_VECTORING_ERROR_CODE);
-                        kvm_queue_exception_e(&vmx->vcpu, vector, error);
+                        u32 err = vmcs_read32(IDT_VECTORING_ERROR_CODE);
+                        kvm_queue_exception_e(&vmx->vcpu, vector, err);
                 } else
                         kvm_queue_exception(&vmx->vcpu, vector);
-                vmx->idt_vectoring_info = 0;
-        }
-        kvm_clear_interrupt_queue(&vmx->vcpu);
-        if (idtv_info_valid && type == INTR_TYPE_EXT_INTR) {
-                kvm_queue_interrupt(&vmx->vcpu, vector);
-                vmx->idt_vectoring_info = 0;
-        }
-}
-
-static void vmx_intr_assist(struct kvm_vcpu *vcpu)
-{
-        update_tpr_threshold(vcpu);
-
-        vmx_update_window_states(vcpu);
-
-        if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
-                vmcs_clear_bits(GUEST_INTERRUPTIBILITY_INFO,
-                                GUEST_INTR_STATE_STI |
-                                GUEST_INTR_STATE_MOV_SS);
-
-        if (vcpu->arch.nmi_pending && !vcpu->arch.nmi_injected) {
-                if (vcpu->arch.interrupt.pending) {
-                        enable_nmi_window(vcpu);
-                } else if (vcpu->arch.nmi_window_open) {
-                        vcpu->arch.nmi_pending = false;
-                        vcpu->arch.nmi_injected = true;
-                } else {
-                        enable_nmi_window(vcpu);
-                        return;
-                }
-        }
-        if (vcpu->arch.nmi_injected) {
-                vmx_inject_nmi(vcpu);
-                if (vcpu->arch.nmi_pending)
-                        enable_nmi_window(vcpu);
-                else if (kvm_cpu_has_interrupt(vcpu))
-                        enable_irq_window(vcpu);
-                return;
-        }
-        if (!vcpu->arch.interrupt.pending && kvm_cpu_has_interrupt(vcpu)) {
-                if (vcpu->arch.interrupt_window_open)
-                        kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu));
-                else
-                        enable_irq_window(vcpu);
-        }
-        if (vcpu->arch.interrupt.pending) {
-                vmx_inject_irq(vcpu, vcpu->arch.interrupt.nr);
-                if (kvm_cpu_has_interrupt(vcpu))
-                        enable_irq_window(vcpu);
+                break;
+        case INTR_TYPE_SOFT_INTR:
+                vmx->vcpu.arch.event_exit_inst_len =
+                        vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
+                /* fall through */
+        case INTR_TYPE_EXT_INTR:
+                kvm_queue_interrupt(&vmx->vcpu, vector,
+                        type == INTR_TYPE_SOFT_INTR);
+                break;
+        default:
+                break;
         }
 }
 
@@ -3381,7 +3418,6 @@ static void fixup_rmode_irq(struct vcpu_vmx *vmx)
 static void vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 {
         struct vcpu_vmx *vmx = to_vmx(vcpu);
-        u32 intr_info;
 
         /* Record the guest's net vcpu time for enforced NMI injections. */
         if (unlikely(!cpu_has_virtual_nmis() && vmx->soft_vnmi_blocked))
@@ -3505,20 +3541,9 @@ static void vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
         if (vmx->rmode.irq.pending)
                 fixup_rmode_irq(vmx);
 
-        vmx_update_window_states(vcpu);
-
         asm("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS));
         vmx->launched = 1;
 
-        intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
-
-        /* We need to handle NMIs before interrupts are enabled */
-        if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == INTR_TYPE_NMI_INTR &&
-            (intr_info & INTR_INFO_VALID_MASK)) {
-                KVMTRACE_0D(NMI, vcpu, handler);
-                asm("int $2");
-        }
-
         vmx_complete_interrupts(vmx);
 }
 
@@ -3593,7 +3618,7 @@ static struct kvm_vcpu *vmx_create_vcpu(struct kvm *kvm, unsigned int id)
                 if (alloc_apic_access_page(kvm) != 0)
                         goto free_vmcs;
 
-        if (vm_need_ept())
+        if (enable_ept)
                 if (alloc_identity_pagetable(kvm) != 0)
                         goto free_vmcs;
 
@@ -3631,9 +3656,32 @@ static int get_ept_level(void)
         return VMX_EPT_DEFAULT_GAW + 1;
 }
 
-static int vmx_get_mt_mask_shift(void)
+static u64 vmx_get_mt_mask(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio)
 {
-        return VMX_EPT_MT_EPTE_SHIFT;
+        u64 ret;
+
+        /* For VT-d and EPT combination
+         * 1. MMIO: always map as UC
+         * 2. EPT with VT-d:
+         *   a. VT-d without snooping control feature: can't guarantee the
+         *      result, try to trust guest.
+         *   b. VT-d with snooping control feature: snooping control feature of
+         *      VT-d engine can guarantee the cache correctness. Just set it
+         *      to WB to keep consistent with host. So the same as item 3.
+         * 3. EPT without VT-d: always map as WB and set IGMT=1 to keep
+         *    consistent with host MTRR
+         */
+        if (is_mmio)
+                ret = MTRR_TYPE_UNCACHABLE << VMX_EPT_MT_EPTE_SHIFT;
+        else if (vcpu->kvm->arch.iommu_domain &&
+                !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY))
+                ret = kvm_get_guest_memory_type(vcpu, gfn) <<
+                      VMX_EPT_MT_EPTE_SHIFT;
+        else
+                ret = (MTRR_TYPE_WRBACK << VMX_EPT_MT_EPTE_SHIFT)
+                        | VMX_EPT_IGMT_BIT;
+
+        return ret;
 }
 
 static struct kvm_x86_ops vmx_x86_ops = {
@@ -3644,7 +3692,7 @@ static struct kvm_x86_ops vmx_x86_ops = {
         .check_processor_compatibility = vmx_check_processor_compat,
         .hardware_enable = hardware_enable,
         .hardware_disable = hardware_disable,
-        .cpu_has_accelerated_tpr = cpu_has_vmx_virtualize_apic_accesses,
+        .cpu_has_accelerated_tpr = report_flexpriority,
 
         .vcpu_create = vmx_create_vcpu,
         .vcpu_free = vmx_free_vcpu,
@@ -3678,78 +3726,82 @@ static struct kvm_x86_ops vmx_x86_ops = {
         .tlb_flush = vmx_flush_tlb,
 
         .run = vmx_vcpu_run,
-        .handle_exit = kvm_handle_exit,
+        .handle_exit = vmx_handle_exit,
         .skip_emulated_instruction = skip_emulated_instruction,
+        .set_interrupt_shadow = vmx_set_interrupt_shadow,
+        .get_interrupt_shadow = vmx_get_interrupt_shadow,
         .patch_hypercall = vmx_patch_hypercall,
-        .get_irq = vmx_get_irq,
         .set_irq = vmx_inject_irq,
+        .set_nmi = vmx_inject_nmi,
         .queue_exception = vmx_queue_exception,
-        .exception_injected = vmx_exception_injected,
-        .inject_pending_irq = vmx_intr_assist,
-        .inject_pending_vectors = do_interrupt_requests,
+        .interrupt_allowed = vmx_interrupt_allowed,
+        .nmi_allowed = vmx_nmi_allowed,
+        .enable_nmi_window = enable_nmi_window,
+        .enable_irq_window = enable_irq_window,
+        .update_cr8_intercept = update_cr8_intercept,
 
         .set_tss_addr = vmx_set_tss_addr,
         .get_tdp_level = get_ept_level,
-        .get_mt_mask_shift = vmx_get_mt_mask_shift,
+        .get_mt_mask = vmx_get_mt_mask,
 };
 
 static int __init vmx_init(void)
 {
-        void *va;
         int r;
 
-        vmx_io_bitmap_a = alloc_page(GFP_KERNEL | __GFP_HIGHMEM);
+        vmx_io_bitmap_a = (unsigned long *)__get_free_page(GFP_KERNEL);
         if (!vmx_io_bitmap_a)
                 return -ENOMEM;
 
-        vmx_io_bitmap_b = alloc_page(GFP_KERNEL | __GFP_HIGHMEM);
+        vmx_io_bitmap_b = (unsigned long *)__get_free_page(GFP_KERNEL);
         if (!vmx_io_bitmap_b) {
                 r = -ENOMEM;
                 goto out;
         }
 
-        vmx_msr_bitmap = alloc_page(GFP_KERNEL | __GFP_HIGHMEM);
-        if (!vmx_msr_bitmap) {
+        vmx_msr_bitmap_legacy = (unsigned long *)__get_free_page(GFP_KERNEL);
+        if (!vmx_msr_bitmap_legacy) {
                 r = -ENOMEM;
                 goto out1;
         }
 
+        vmx_msr_bitmap_longmode = (unsigned long *)__get_free_page(GFP_KERNEL);
+        if (!vmx_msr_bitmap_longmode) {
+                r = -ENOMEM;
+                goto out2;
+        }
+
         /*
          * Allow direct access to the PC debug port (it is often used for I/O
          * delays, but the vmexits simply slow things down).
          */
-        va = kmap(vmx_io_bitmap_a);
-        memset(va, 0xff, PAGE_SIZE);
-        clear_bit(0x80, va);
-        kunmap(vmx_io_bitmap_a);
+        memset(vmx_io_bitmap_a, 0xff, PAGE_SIZE);
+        clear_bit(0x80, vmx_io_bitmap_a);
 
-        va = kmap(vmx_io_bitmap_b);
-        memset(va, 0xff, PAGE_SIZE);
-        kunmap(vmx_io_bitmap_b);
+        memset(vmx_io_bitmap_b, 0xff, PAGE_SIZE);
 
-        va = kmap(vmx_msr_bitmap);
-        memset(va, 0xff, PAGE_SIZE);
-        kunmap(vmx_msr_bitmap);
+        memset(vmx_msr_bitmap_legacy, 0xff, PAGE_SIZE);
+        memset(vmx_msr_bitmap_longmode, 0xff, PAGE_SIZE);
 
         set_bit(0, vmx_vpid_bitmap); /* 0 is reserved for host */
 
         r = kvm_init(&vmx_x86_ops, sizeof(struct vcpu_vmx), THIS_MODULE);
         if (r)
-                goto out2;
+                goto out3;
 
-        vmx_disable_intercept_for_msr(vmx_msr_bitmap, MSR_FS_BASE);
-        vmx_disable_intercept_for_msr(vmx_msr_bitmap, MSR_GS_BASE);
-        vmx_disable_intercept_for_msr(vmx_msr_bitmap, MSR_IA32_SYSENTER_CS);
-        vmx_disable_intercept_for_msr(vmx_msr_bitmap, MSR_IA32_SYSENTER_ESP);
-        vmx_disable_intercept_for_msr(vmx_msr_bitmap, MSR_IA32_SYSENTER_EIP);
+        vmx_disable_intercept_for_msr(MSR_FS_BASE, false);
+        vmx_disable_intercept_for_msr(MSR_GS_BASE, false);
+        vmx_disable_intercept_for_msr(MSR_KERNEL_GS_BASE, true);
+        vmx_disable_intercept_for_msr(MSR_IA32_SYSENTER_CS, false);
+        vmx_disable_intercept_for_msr(MSR_IA32_SYSENTER_ESP, false);
+        vmx_disable_intercept_for_msr(MSR_IA32_SYSENTER_EIP, false);
 
-        if (vm_need_ept()) {
+        if (enable_ept) {
                 bypass_guest_pf = 0;
                 kvm_mmu_set_base_ptes(VMX_EPT_READABLE_MASK |
                         VMX_EPT_WRITABLE_MASK);
                 kvm_mmu_set_mask_ptes(0ull, 0ull, 0ull, 0ull,
-                                VMX_EPT_EXECUTABLE_MASK,
-                                VMX_EPT_DEFAULT_MT << VMX_EPT_MT_EPTE_SHIFT);
+                                VMX_EPT_EXECUTABLE_MASK);
                 kvm_enable_tdp();
         } else
                 kvm_disable_tdp();
@@ -3761,20 +3813,23 @@ static int __init vmx_init(void)
 
         return 0;
 
+out3:
+        free_page((unsigned long)vmx_msr_bitmap_longmode);
 out2:
-        __free_page(vmx_msr_bitmap);
+        free_page((unsigned long)vmx_msr_bitmap_legacy);
 out1:
-        __free_page(vmx_io_bitmap_b);
+        free_page((unsigned long)vmx_io_bitmap_b);
 out:
-        __free_page(vmx_io_bitmap_a);
+        free_page((unsigned long)vmx_io_bitmap_a);
         return r;
 }
 
 static void __exit vmx_exit(void)
 {
-        __free_page(vmx_msr_bitmap);
-        __free_page(vmx_io_bitmap_b);
-        __free_page(vmx_io_bitmap_a);
+        free_page((unsigned long)vmx_msr_bitmap_legacy);
+        free_page((unsigned long)vmx_msr_bitmap_longmode);
+        free_page((unsigned long)vmx_io_bitmap_b);
+        free_page((unsigned long)vmx_io_bitmap_a);
 
         kvm_exit();
 }
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 3944e917e794..249540f98513 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -91,7 +91,6 @@ struct kvm_stats_debugfs_item debugfs_entries[] = {
         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
         { "hypercalls", VCPU_STAT(hypercalls) },
         { "request_irq", VCPU_STAT(request_irq_exits) },
-        { "request_nmi", VCPU_STAT(request_nmi_exits) },
         { "irq_exits", VCPU_STAT(irq_exits) },
         { "host_state_reload", VCPU_STAT(host_state_reload) },
         { "efer_reload", VCPU_STAT(efer_reload) },
@@ -108,7 +107,6 @@ struct kvm_stats_debugfs_item debugfs_entries[] = {
         { "mmu_recycled", VM_STAT(mmu_recycled) },
         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
         { "mmu_unsync", VM_STAT(mmu_unsync) },
-        { "mmu_unsync_global", VM_STAT(mmu_unsync_global) },
         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
         { "largepages", VM_STAT(lpages) },
         { NULL }
@@ -234,7 +232,8 @@ int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
                 goto out;
         }
         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
-                if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
+                if (is_present_pte(pdpte[i]) &&
+                    (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
                         ret = 0;
                         goto out;
                 }
@@ -321,7 +320,6 @@ void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
         kvm_x86_ops->set_cr0(vcpu, cr0);
         vcpu->arch.cr0 = cr0;
 
-        kvm_mmu_sync_global(vcpu);
         kvm_mmu_reset_context(vcpu);
         return;
 }
@@ -370,7 +368,6 @@ void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
         kvm_x86_ops->set_cr4(vcpu, cr4);
         vcpu->arch.cr4 = cr4;
         vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
-        kvm_mmu_sync_global(vcpu);
         kvm_mmu_reset_context(vcpu);
 }
 EXPORT_SYMBOL_GPL(kvm_set_cr4);
@@ -523,6 +520,9 @@ static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
         efer |= vcpu->arch.shadow_efer & EFER_LMA;
 
         vcpu->arch.shadow_efer = efer;
+
+        vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
+        kvm_mmu_reset_context(vcpu);
 }
 
 void kvm_enable_efer_bits(u64 mask)
@@ -630,14 +630,17 @@ static void kvm_write_guest_time(struct kvm_vcpu *v)
         unsigned long flags;
         struct kvm_vcpu_arch *vcpu = &v->arch;
         void *shared_kaddr;
+        unsigned long this_tsc_khz;
 
         if ((!vcpu->time_page))
                 return;
 
-        if (unlikely(vcpu->hv_clock_tsc_khz != __get_cpu_var(cpu_tsc_khz))) {
-                kvm_set_time_scale(__get_cpu_var(cpu_tsc_khz), &vcpu->hv_clock);
-                vcpu->hv_clock_tsc_khz = __get_cpu_var(cpu_tsc_khz);
+        this_tsc_khz = get_cpu_var(cpu_tsc_khz);
+        if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
+                kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
+                vcpu->hv_clock_tsc_khz = this_tsc_khz;
         }
+        put_cpu_var(cpu_tsc_khz);
 
         /* Keep irq disabled to prevent changes to the clock */
         local_irq_save(flags);
@@ -893,6 +896,8 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
         case MSR_IA32_LASTINTFROMIP:
         case MSR_IA32_LASTINTTOIP:
         case MSR_VM_HSAVE_PA:
+        case MSR_P6_EVNTSEL0:
+        case MSR_P6_EVNTSEL1:
                 data = 0;
                 break;
         case MSR_MTRRcap:
@@ -1024,6 +1029,7 @@ int kvm_dev_ioctl_check_extension(long ext)
         case KVM_CAP_SYNC_MMU:
         case KVM_CAP_REINJECT_CONTROL:
         case KVM_CAP_IRQ_INJECT_STATUS:
+        case KVM_CAP_ASSIGN_DEV_IRQ:
                 r = 1;
                 break;
         case KVM_CAP_COALESCED_MMIO:
@@ -1241,41 +1247,53 @@ static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
         entry->flags = 0;
 }
 
+#define F(x) bit(X86_FEATURE_##x)
+
 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
                          u32 index, int *nent, int maxnent)
 {
-        const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
-                bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
-                bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
-                bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
-                bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
-                bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) |
-                bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
-                bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
-                bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
-                bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
-        const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
-                bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
-                bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
-                bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
-                bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
-                bit(X86_FEATURE_PGE) |
-                bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
-                bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
-                bit(X86_FEATURE_SYSCALL) |
-                (is_efer_nx() ? bit(X86_FEATURE_NX) : 0) |
+        unsigned f_nx = is_efer_nx() ? F(NX) : 0;
 #ifdef CONFIG_X86_64
-                bit(X86_FEATURE_LM) |
+        unsigned f_lm = F(LM);
+#else
+        unsigned f_lm = 0;
 #endif
-                bit(X86_FEATURE_FXSR_OPT) |
-                bit(X86_FEATURE_MMXEXT) |
-                bit(X86_FEATURE_3DNOWEXT) |
-                bit(X86_FEATURE_3DNOW);
-        const u32 kvm_supported_word3_x86_features =
-                bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
+
+        /* cpuid 1.edx */
+        const u32 kvm_supported_word0_x86_features =
+                F(FPU) | F(VME) | F(DE) | F(PSE) |
+                F(TSC) | F(MSR) | F(PAE) | F(MCE) |
+                F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
+                F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
+                F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
+                0 /* Reserved, DS, ACPI */ | F(MMX) |
+                F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
+                0 /* HTT, TM, Reserved, PBE */;
+        /* cpuid 0x80000001.edx */
+        const u32 kvm_supported_word1_x86_features =
+                F(FPU) | F(VME) | F(DE) | F(PSE) |
+                F(TSC) | F(MSR) | F(PAE) | F(MCE) |
+                F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
+                F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
+                F(PAT) | F(PSE36) | 0 /* Reserved */ |
+                f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
+                F(FXSR) | F(FXSR_OPT) | 0 /* GBPAGES */ | 0 /* RDTSCP */ |
+                0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
+        /* cpuid 1.ecx */
+        const u32 kvm_supported_word4_x86_features =
+                F(XMM3) | 0 /* Reserved, DTES64, MONITOR */ |
+                0 /* DS-CPL, VMX, SMX, EST */ |
+                0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
+                0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
+                0 /* Reserved, DCA */ | F(XMM4_1) |
+                F(XMM4_2) | 0 /* x2APIC */ | F(MOVBE) | F(POPCNT) |
+                0 /* Reserved, XSAVE, OSXSAVE */;
+        /* cpuid 0x80000001.ecx */
         const u32 kvm_supported_word6_x86_features =
-                bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY) |
-                bit(X86_FEATURE_SVM);
+                F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
+                F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
+                F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
+                0 /* SKINIT */ | 0 /* WDT */;
 
         /* all calls to cpuid_count() should be made on the same cpu */
         get_cpu();
@@ -1288,7 +1306,7 @@ static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
                 break;
         case 1:
                 entry->edx &= kvm_supported_word0_x86_features;
-                entry->ecx &= kvm_supported_word3_x86_features;
+                entry->ecx &= kvm_supported_word4_x86_features;
                 break;
         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
          * may return different values. This forces us to get_cpu() before
@@ -1350,6 +1368,8 @@ static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
         put_cpu();
 }
 
+#undef F
+
 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
                                      struct kvm_cpuid_entry2 __user *entries)
 {
@@ -1421,8 +1441,7 @@ static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
                 return -ENXIO;
         vcpu_load(vcpu);
 
-        set_bit(irq->irq, vcpu->arch.irq_pending);
-        set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
+        kvm_queue_interrupt(vcpu, irq->irq, false);
 
         vcpu_put(vcpu);
 
@@ -1584,8 +1603,7 @@ long kvm_arch_vcpu_ioctl(struct file *filp,
                 r = -EINVAL;
         }
 out:
-        if (lapic)
-                kfree(lapic);
+        kfree(lapic);
         return r;
 }
 
@@ -1606,10 +1624,12 @@ static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
                 return -EINVAL;
 
         down_write(&kvm->slots_lock);
+        spin_lock(&kvm->mmu_lock);
 
         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
 
+        spin_unlock(&kvm->mmu_lock);
         up_write(&kvm->slots_lock);
         return 0;
 }
@@ -1785,7 +1805,9 @@ int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
 
         /* If nothing is dirty, don't bother messing with page tables. */
         if (is_dirty) {
+                spin_lock(&kvm->mmu_lock);
                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
+                spin_unlock(&kvm->mmu_lock);
                 kvm_flush_remote_tlbs(kvm);
                 memslot = &kvm->memslots[log->slot];
                 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
@@ -2360,7 +2382,7 @@ int emulate_instruction(struct kvm_vcpu *vcpu,
                         u16 error_code,
                         int emulation_type)
 {
-        int r;
+        int r, shadow_mask;
         struct decode_cache *c;
 
         kvm_clear_exception_queue(vcpu);
@@ -2408,7 +2430,16 @@ int emulate_instruction(struct kvm_vcpu *vcpu,
                 }
         }
 
+        if (emulation_type & EMULTYPE_SKIP) {
+                kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
+                return EMULATE_DONE;
+        }
+
         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
+        shadow_mask = vcpu->arch.emulate_ctxt.interruptibility;
+
+        if (r == 0)
+                kvm_x86_ops->set_interrupt_shadow(vcpu, shadow_mask);
 
         if (vcpu->arch.pio.string)
                 return EMULATE_DO_MMIO;
@@ -2761,7 +2792,7 @@ int kvm_arch_init(void *opaque)
         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
         kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
-                        PT_DIRTY_MASK, PT64_NX_MASK, 0, 0);
+                        PT_DIRTY_MASK, PT64_NX_MASK, 0);
 
         for_each_possible_cpu(cpu)
                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
@@ -3012,6 +3043,16 @@ struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
         return best;
 }
 
+int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
+{
+        struct kvm_cpuid_entry2 *best;
+
+        best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
+        if (best)
+                return best->eax & 0xff;
+        return 36;
+}
+
 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
 {
         u32 function, index;
@@ -3048,10 +3089,9 @@ EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
                                           struct kvm_run *kvm_run)
 {
-        return (!vcpu->arch.irq_summary &&
+        return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
                 kvm_run->request_interrupt_window &&
-                vcpu->arch.interrupt_window_open &&
-                (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
+                kvm_arch_interrupt_allowed(vcpu));
 }
 
 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
@@ -3064,8 +3104,9 @@ static void post_kvm_run_save(struct kvm_vcpu *vcpu,
                 kvm_run->ready_for_interrupt_injection = 1;
         else
                 kvm_run->ready_for_interrupt_injection =
-                                        (vcpu->arch.interrupt_window_open &&
-                                         vcpu->arch.irq_summary == 0);
+                        kvm_arch_interrupt_allowed(vcpu) &&
+                        !kvm_cpu_has_interrupt(vcpu) &&
+                        !kvm_event_needs_reinjection(vcpu);
 }
 
 static void vapic_enter(struct kvm_vcpu *vcpu)
@@ -3094,9 +3135,63 @@ static void vapic_exit(struct kvm_vcpu *vcpu)
         up_read(&vcpu->kvm->slots_lock);
 }
 
+static void update_cr8_intercept(struct kvm_vcpu *vcpu)
+{
+        int max_irr, tpr;
+
+        if (!kvm_x86_ops->update_cr8_intercept)
+                return;
+
+        if (!vcpu->arch.apic->vapic_addr)
+                max_irr = kvm_lapic_find_highest_irr(vcpu);
+        else
+                max_irr = -1;
+
+        if (max_irr != -1)
+                max_irr >>= 4;
+
+        tpr = kvm_lapic_get_cr8(vcpu);
+
+        kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
+}
+
+static void inject_pending_irq(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
+{
+        if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
+                kvm_x86_ops->set_interrupt_shadow(vcpu, 0);
+
+        /* try to reinject previous events if any */
+        if (vcpu->arch.nmi_injected) {
+                kvm_x86_ops->set_nmi(vcpu);
+                return;
+        }
+
+        if (vcpu->arch.interrupt.pending) {
+                kvm_x86_ops->set_irq(vcpu);
+                return;
+        }
+
+        /* try to inject new event if pending */
+        if (vcpu->arch.nmi_pending) {
+                if (kvm_x86_ops->nmi_allowed(vcpu)) {
+                        vcpu->arch.nmi_pending = false;
+                        vcpu->arch.nmi_injected = true;
+                        kvm_x86_ops->set_nmi(vcpu);
+                }
+        } else if (kvm_cpu_has_interrupt(vcpu)) {
+                if (kvm_x86_ops->interrupt_allowed(vcpu)) {
+                        kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
+                                            false);
+                        kvm_x86_ops->set_irq(vcpu);
+                }
+        }
+}
+
 static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 {
         int r;
+        bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
+                kvm_run->request_interrupt_window;
 
         if (vcpu->requests)
                 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
@@ -3128,9 +3223,6 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
                 }
         }
 
-        clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
-        kvm_inject_pending_timer_irqs(vcpu);
-
         preempt_disable();
 
         kvm_x86_ops->prepare_guest_switch(vcpu);
@@ -3138,6 +3230,9 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 
         local_irq_disable();
 
+        clear_bit(KVM_REQ_KICK, &vcpu->requests);
+        smp_mb__after_clear_bit();
+
         if (vcpu->requests || need_resched() || signal_pending(current)) {
                 local_irq_enable();
                 preempt_enable();
@@ -3145,21 +3240,21 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
                 goto out;
         }
 
-        vcpu->guest_mode = 1;
-        /*
-         * Make sure that guest_mode assignment won't happen after
-         * testing the pending IRQ vector bitmap.
-         */
-        smp_wmb();
-
         if (vcpu->arch.exception.pending)
                 __queue_exception(vcpu);
-        else if (irqchip_in_kernel(vcpu->kvm))
-                kvm_x86_ops->inject_pending_irq(vcpu);
         else
-                kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
+                inject_pending_irq(vcpu, kvm_run);
 
-        kvm_lapic_sync_to_vapic(vcpu);
+        /* enable NMI/IRQ window open exits if needed */
+        if (vcpu->arch.nmi_pending)
+                kvm_x86_ops->enable_nmi_window(vcpu);
+        else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
+                kvm_x86_ops->enable_irq_window(vcpu);
+
+        if (kvm_lapic_enabled(vcpu)) {
+                update_cr8_intercept(vcpu);
+                kvm_lapic_sync_to_vapic(vcpu);
+        }
 
         up_read(&vcpu->kvm->slots_lock);
 
@@ -3193,7 +3288,7 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
         set_debugreg(vcpu->arch.host_dr6, 6);
         set_debugreg(vcpu->arch.host_dr7, 7);
 
-        vcpu->guest_mode = 0;
+        set_bit(KVM_REQ_KICK, &vcpu->requests);
         local_irq_enable();
 
         ++vcpu->stat.exits;
@@ -3220,8 +3315,6 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
                 profile_hit(KVM_PROFILING, (void *)rip);
         }
 
-        if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
-                vcpu->arch.exception.pending = false;
 
         kvm_lapic_sync_from_vapic(vcpu);
 
@@ -3230,6 +3323,7 @@ out:
         return r;
 }
 
+
 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
 {
         int r;
@@ -3256,29 +3350,42 @@ static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
                         kvm_vcpu_block(vcpu);
                         down_read(&vcpu->kvm->slots_lock);
                         if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
-                                if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED)
+                        {
+                                switch(vcpu->arch.mp_state) {
+                                case KVM_MP_STATE_HALTED:
                                         vcpu->arch.mp_state =
-                                                        KVM_MP_STATE_RUNNABLE;
-                        if (vcpu->arch.mp_state != KVM_MP_STATE_RUNNABLE)
-                                r = -EINTR;
+                                                KVM_MP_STATE_RUNNABLE;
+                                case KVM_MP_STATE_RUNNABLE:
+                                        break;
+                                case KVM_MP_STATE_SIPI_RECEIVED:
+                                default:
+                                        r = -EINTR;
+                                        break;
+                                }
+                        }
                 }
 
-                if (r > 0) {
-                        if (dm_request_for_irq_injection(vcpu, kvm_run)) {
-                                r = -EINTR;
-                                kvm_run->exit_reason = KVM_EXIT_INTR;
-                                ++vcpu->stat.request_irq_exits;
-                        }
-                        if (signal_pending(current)) {
-                                r = -EINTR;
-                                kvm_run->exit_reason = KVM_EXIT_INTR;
-                                ++vcpu->stat.signal_exits;
-                        }
-                        if (need_resched()) {
-                                up_read(&vcpu->kvm->slots_lock);
-                                kvm_resched(vcpu);
-                                down_read(&vcpu->kvm->slots_lock);
-                        }
+                if (r <= 0)
+                        break;
+
+                clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
+                if (kvm_cpu_has_pending_timer(vcpu))
+                        kvm_inject_pending_timer_irqs(vcpu);
+
+                if (dm_request_for_irq_injection(vcpu, kvm_run)) {
+                        r = -EINTR;
+                        kvm_run->exit_reason = KVM_EXIT_INTR;
+                        ++vcpu->stat.request_irq_exits;
+                }
+                if (signal_pending(current)) {
+                        r = -EINTR;
+                        kvm_run->exit_reason = KVM_EXIT_INTR;
+                        ++vcpu->stat.signal_exits;
+                }
+                if (need_resched()) {
+                        up_read(&vcpu->kvm->slots_lock);
+                        kvm_resched(vcpu);
+                        down_read(&vcpu->kvm->slots_lock);
                 }
         }
 
@@ -3442,7 +3549,6 @@ int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
                                   struct kvm_sregs *sregs)
 {
         struct descriptor_table dt;
-        int pending_vec;
 
         vcpu_load(vcpu);
 
@@ -3472,16 +3578,11 @@ int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
         sregs->efer = vcpu->arch.shadow_efer;
         sregs->apic_base = kvm_get_apic_base(vcpu);
 
-        if (irqchip_in_kernel(vcpu->kvm)) {
-                memset(sregs->interrupt_bitmap, 0,
-                       sizeof sregs->interrupt_bitmap);
-                pending_vec = kvm_x86_ops->get_irq(vcpu);
-                if (pending_vec >= 0)
-                        set_bit(pending_vec,
-                                (unsigned long *)sregs->interrupt_bitmap);
-        } else
-                memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
-                       sizeof sregs->interrupt_bitmap);
+        memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
+
+        if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
+                set_bit(vcpu->arch.interrupt.nr,
+                        (unsigned long *)sregs->interrupt_bitmap);
 
         vcpu_put(vcpu);
 
@@ -3688,7 +3789,6 @@ static void save_state_to_tss32(struct kvm_vcpu *vcpu,
         tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
         tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
         tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
-        tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
 }
 
 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
@@ -3785,8 +3885,8 @@ static int load_state_from_tss16(struct kvm_vcpu *vcpu,
 }
 
 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
-                       u32 old_tss_base,
-                       struct desc_struct *nseg_desc)
+                              u16 old_tss_sel, u32 old_tss_base,
+                              struct desc_struct *nseg_desc)
 {
         struct tss_segment_16 tss_segment_16;
         int ret = 0;
@@ -3805,6 +3905,16 @@ static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
                            &tss_segment_16, sizeof tss_segment_16))
                 goto out;
 
+        if (old_tss_sel != 0xffff) {
+                tss_segment_16.prev_task_link = old_tss_sel;
+
+                if (kvm_write_guest(vcpu->kvm,
+                                    get_tss_base_addr(vcpu, nseg_desc),
+                                    &tss_segment_16.prev_task_link,
+                                    sizeof tss_segment_16.prev_task_link))
+                        goto out;
+        }
+
         if (load_state_from_tss16(vcpu, &tss_segment_16))
                 goto out;
 
@@ -3814,7 +3924,7 @@ out:
 }
 
 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
-                       u32 old_tss_base,
+                       u16 old_tss_sel, u32 old_tss_base,
                        struct desc_struct *nseg_desc)
 {
         struct tss_segment_32 tss_segment_32;
@@ -3834,6 +3944,16 @@ static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
                            &tss_segment_32, sizeof tss_segment_32))
                 goto out;
 
+        if (old_tss_sel != 0xffff) {
+                tss_segment_32.prev_task_link = old_tss_sel;
+
+                if (kvm_write_guest(vcpu->kvm,
+                                    get_tss_base_addr(vcpu, nseg_desc),
+                                    &tss_segment_32.prev_task_link,
+                                    sizeof tss_segment_32.prev_task_link))
+                        goto out;
+        }
+
         if (load_state_from_tss32(vcpu, &tss_segment_32))
                 goto out;
 
@@ -3887,14 +4007,22 @@ int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
                 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
         }
 
-        kvm_x86_ops->skip_emulated_instruction(vcpu);
+        /* set back link to prev task only if NT bit is set in eflags
+           note that old_tss_sel is not used afetr this point */
+        if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
+                old_tss_sel = 0xffff;
+
+        /* set back link to prev task only if NT bit is set in eflags
+           note that old_tss_sel is not used afetr this point */
+        if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
+                old_tss_sel = 0xffff;
 
         if (nseg_desc.type & 8)
-                ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_base,
-                                         &nseg_desc);
+                ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_sel,
+                                         old_tss_base, &nseg_desc);
         else
-                ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_base,
-                                         &nseg_desc);
+                ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_sel,
+                                         old_tss_base, &nseg_desc);
 
         if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
                 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
@@ -3920,7 +4048,7 @@ int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
                                   struct kvm_sregs *sregs)
 {
         int mmu_reset_needed = 0;
-        int i, pending_vec, max_bits;
+        int pending_vec, max_bits;
         struct descriptor_table dt;
 
         vcpu_load(vcpu);
@@ -3934,7 +4062,13 @@ int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
 
         vcpu->arch.cr2 = sregs->cr2;
         mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
-        vcpu->arch.cr3 = sregs->cr3;
+
+        down_read(&vcpu->kvm->slots_lock);
+        if (gfn_to_memslot(vcpu->kvm, sregs->cr3 >> PAGE_SHIFT))
+                vcpu->arch.cr3 = sregs->cr3;
+        else
+                set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
+        up_read(&vcpu->kvm->slots_lock);
 
         kvm_set_cr8(vcpu, sregs->cr8);
 
@@ -3956,25 +4090,14 @@ int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
         if (mmu_reset_needed)
                 kvm_mmu_reset_context(vcpu);
 
-        if (!irqchip_in_kernel(vcpu->kvm)) {
-                memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
-                       sizeof vcpu->arch.irq_pending);
-                vcpu->arch.irq_summary = 0;
-                for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
-                        if (vcpu->arch.irq_pending[i])
-                                __set_bit(i, &vcpu->arch.irq_summary);
-        } else {
-                max_bits = (sizeof sregs->interrupt_bitmap) << 3;
-                pending_vec = find_first_bit(
-                        (const unsigned long *)sregs->interrupt_bitmap,
-                        max_bits);
-                /* Only pending external irq is handled here */
-                if (pending_vec < max_bits) {
-                        kvm_x86_ops->set_irq(vcpu, pending_vec);
-                        pr_debug("Set back pending irq %d\n",
-                                 pending_vec);
-                }
-                kvm_pic_clear_isr_ack(vcpu->kvm);
+        max_bits = (sizeof sregs->interrupt_bitmap) << 3;
+        pending_vec = find_first_bit(
+                (const unsigned long *)sregs->interrupt_bitmap, max_bits);
+        if (pending_vec < max_bits) {
+                kvm_queue_interrupt(vcpu, pending_vec, false);
+                pr_debug("Set back pending irq %d\n", pending_vec);
+                if (irqchip_in_kernel(vcpu->kvm))
+                        kvm_pic_clear_isr_ack(vcpu->kvm);
         }
 
         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
@@ -4308,7 +4431,6 @@ struct  kvm *kvm_arch_create_vm(void)
                 return ERR_PTR(-ENOMEM);
 
         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
-        INIT_LIST_HEAD(&kvm->arch.oos_global_pages);
         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
 
         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
@@ -4411,12 +4533,14 @@ int kvm_arch_set_memory_region(struct kvm *kvm,
                 }
         }
 
+        spin_lock(&kvm->mmu_lock);
         if (!kvm->arch.n_requested_mmu_pages) {
                 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
         }
 
         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
+        spin_unlock(&kvm->mmu_lock);
         kvm_flush_remote_tlbs(kvm);
 
         return 0;
@@ -4425,6 +4549,7 @@ int kvm_arch_set_memory_region(struct kvm *kvm,
 void kvm_arch_flush_shadow(struct kvm *kvm)
 {
         kvm_mmu_zap_all(kvm);
+        kvm_reload_remote_mmus(kvm);
 }
 
 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
@@ -4434,28 +4559,24 @@ int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
                || vcpu->arch.nmi_pending;
 }
 
-static void vcpu_kick_intr(void *info)
-{
-#ifdef DEBUG
-        struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
-        printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
-#endif
-}
-
 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
 {
-        int ipi_pcpu = vcpu->cpu;
-        int cpu = get_cpu();
+        int me;
+        int cpu = vcpu->cpu;
 
         if (waitqueue_active(&vcpu->wq)) {
                 wake_up_interruptible(&vcpu->wq);
                 ++vcpu->stat.halt_wakeup;
         }
-        /*
-         * We may be called synchronously with irqs disabled in guest mode,
-         * So need not to call smp_call_function_single() in that case.
-         */
-        if (vcpu->guest_mode && vcpu->cpu != cpu)
-                smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0);
+
+        me = get_cpu();
+        if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
+                if (!test_and_set_bit(KVM_REQ_KICK, &vcpu->requests))
+                        smp_send_reschedule(cpu);
         put_cpu();
 }
+
+int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
+{
+        return kvm_x86_ops->interrupt_allowed(vcpu);
+}
diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h
index 6a4be78a7384..4c8e10af78e8 100644
--- a/arch/x86/kvm/x86.h
+++ b/arch/x86/kvm/x86.h
@@ -8,9 +8,11 @@ static inline void kvm_clear_exception_queue(struct kvm_vcpu *vcpu)
         vcpu->arch.exception.pending = false;
 }
 
-static inline void kvm_queue_interrupt(struct kvm_vcpu *vcpu, u8 vector)
+static inline void kvm_queue_interrupt(struct kvm_vcpu *vcpu, u8 vector,
+        bool soft)
 {
         vcpu->arch.interrupt.pending = true;
+        vcpu->arch.interrupt.soft = soft;
         vcpu->arch.interrupt.nr = vector;
 }
 
@@ -19,4 +21,14 @@ static inline void kvm_clear_interrupt_queue(struct kvm_vcpu *vcpu)
         vcpu->arch.interrupt.pending = false;
 }
 
+static inline bool kvm_event_needs_reinjection(struct kvm_vcpu *vcpu)
+{
+        return vcpu->arch.exception.pending || vcpu->arch.interrupt.pending ||
+                vcpu->arch.nmi_injected;
+}
+
+static inline bool kvm_exception_is_soft(unsigned int nr)
+{
+        return (nr == BP_VECTOR) || (nr == OF_VECTOR);
+}
 #endif
diff --git a/arch/x86/kvm/x86_emulate.c b/arch/x86/kvm/x86_emulate.c
index ca91749d2083..c1b6c232e02b 100644
--- a/arch/x86/kvm/x86_emulate.c
+++ b/arch/x86/kvm/x86_emulate.c
@@ -59,13 +59,14 @@
 #define SrcImm      (5<<4)      /* Immediate operand. */
 #define SrcImmByte  (6<<4)      /* 8-bit sign-extended immediate operand. */
 #define SrcOne      (7<<4)      /* Implied '1' */
-#define SrcMask     (7<<4)
+#define SrcImmUByte (8<<4)      /* 8-bit unsigned immediate operand. */
+#define SrcMask     (0xf<<4)
 /* Generic ModRM decode. */
-#define ModRM       (1<<7)
+#define ModRM       (1<<8)
 /* Destination is only written; never read. */
-#define Mov         (1<<8)
-#define BitOp       (1<<9)
-#define MemAbs      (1<<10)      /* Memory operand is absolute displacement */
+#define Mov         (1<<9)
+#define BitOp       (1<<10)
+#define MemAbs      (1<<11)      /* Memory operand is absolute displacement */
 #define String      (1<<12)     /* String instruction (rep capable) */
 #define Stack       (1<<13)     /* Stack instruction (push/pop) */
 #define Group       (1<<14)     /* Bits 3:5 of modrm byte extend opcode */
@@ -76,6 +77,7 @@
 #define Src2CL      (1<<29)
 #define Src2ImmByte (2<<29)
 #define Src2One     (3<<29)
+#define Src2Imm16   (4<<29)
 #define Src2Mask    (7<<29)
 
 enum {
@@ -135,11 +137,11 @@ static u32 opcode_table[256] = {
         SrcNone  | ByteOp  | ImplicitOps, SrcNone  | ImplicitOps, /* insb, insw/insd */
         SrcNone  | ByteOp  | ImplicitOps, SrcNone  | ImplicitOps, /* outsb, outsw/outsd */
         /* 0x70 - 0x77 */
-        ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
-        ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
+        SrcImmByte, SrcImmByte, SrcImmByte, SrcImmByte,
+        SrcImmByte, SrcImmByte, SrcImmByte, SrcImmByte,
         /* 0x78 - 0x7F */
-        ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
-        ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
+        SrcImmByte, SrcImmByte, SrcImmByte, SrcImmByte,
+        SrcImmByte, SrcImmByte, SrcImmByte, SrcImmByte,
         /* 0x80 - 0x87 */
         Group | Group1_80, Group | Group1_81,
         Group | Group1_82, Group | Group1_83,
@@ -153,7 +155,8 @@ static u32 opcode_table[256] = {
         /* 0x90 - 0x97 */
         DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, DstReg, DstReg,
         /* 0x98 - 0x9F */
-        0, 0, 0, 0, ImplicitOps | Stack, ImplicitOps | Stack, 0, 0,
+        0, 0, SrcImm | Src2Imm16, 0,
+        ImplicitOps | Stack, ImplicitOps | Stack, 0, 0,
         /* 0xA0 - 0xA7 */
         ByteOp | DstReg | SrcMem | Mov | MemAbs, DstReg | SrcMem | Mov | MemAbs,
         ByteOp | DstMem | SrcReg | Mov | MemAbs, DstMem | SrcReg | Mov | MemAbs,
@@ -178,7 +181,8 @@ static u32 opcode_table[256] = {
         0, ImplicitOps | Stack, 0, 0,
         ByteOp | DstMem | SrcImm | ModRM | Mov, DstMem | SrcImm | ModRM | Mov,
         /* 0xC8 - 0xCF */
-        0, 0, 0, ImplicitOps | Stack, 0, 0, 0, 0,
+        0, 0, 0, ImplicitOps | Stack,
+        ImplicitOps, SrcImmByte, ImplicitOps, ImplicitOps,
         /* 0xD0 - 0xD7 */
         ByteOp | DstMem | SrcImplicit | ModRM, DstMem | SrcImplicit | ModRM,
         ByteOp | DstMem | SrcImplicit | ModRM, DstMem | SrcImplicit | ModRM,
@@ -187,11 +191,11 @@ static u32 opcode_table[256] = {
         0, 0, 0, 0, 0, 0, 0, 0,
         /* 0xE0 - 0xE7 */
         0, 0, 0, 0,
-        SrcNone | ByteOp | ImplicitOps, SrcNone | ImplicitOps,
-        SrcNone | ByteOp | ImplicitOps, SrcNone | ImplicitOps,
+        ByteOp | SrcImmUByte, SrcImmUByte,
+        ByteOp | SrcImmUByte, SrcImmUByte,
         /* 0xE8 - 0xEF */
-        ImplicitOps | Stack, SrcImm | ImplicitOps,
-        ImplicitOps, SrcImmByte | ImplicitOps,
+        SrcImm | Stack, SrcImm | ImplicitOps,
+        SrcImm | Src2Imm16, SrcImmByte | ImplicitOps,
         SrcNone | ByteOp | ImplicitOps, SrcNone | ImplicitOps,
         SrcNone | ByteOp | ImplicitOps, SrcNone | ImplicitOps,
         /* 0xF0 - 0xF7 */
@@ -230,10 +234,8 @@ static u32 twobyte_table[256] = {
         /* 0x70 - 0x7F */
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         /* 0x80 - 0x8F */
-        ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
-        ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
-        ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
-        ImplicitOps, ImplicitOps, ImplicitOps, ImplicitOps,
+        SrcImm, SrcImm, SrcImm, SrcImm, SrcImm, SrcImm, SrcImm, SrcImm,
+        SrcImm, SrcImm, SrcImm, SrcImm, SrcImm, SrcImm, SrcImm, SrcImm,
         /* 0x90 - 0x9F */
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         /* 0xA0 - 0xA7 */
@@ -1044,10 +1046,14 @@ done_prefixes:
                 }
                 break;
         case SrcImmByte:
+        case SrcImmUByte:
                 c->src.type = OP_IMM;
                 c->src.ptr = (unsigned long *)c->eip;
                 c->src.bytes = 1;
-                c->src.val = insn_fetch(s8, 1, c->eip);
+                if ((c->d & SrcMask) == SrcImmByte)
+                        c->src.val = insn_fetch(s8, 1, c->eip);
+                else
+                        c->src.val = insn_fetch(u8, 1, c->eip);
                 break;
         case SrcOne:
                 c->src.bytes = 1;
@@ -1072,6 +1078,12 @@ done_prefixes:
                 c->src2.bytes = 1;
                 c->src2.val = insn_fetch(u8, 1, c->eip);
                 break;
+        case Src2Imm16:
+                c->src2.type = OP_IMM;
+                c->src2.ptr = (unsigned long *)c->eip;
+                c->src2.bytes = 2;
+                c->src2.val = insn_fetch(u16, 2, c->eip);
+                break;
         case Src2One:
                 c->src2.bytes = 1;
                 c->src2.val = 1;
@@ -1349,6 +1361,20 @@ static inline int writeback(struct x86_emulate_ctxt *ctxt,
         return 0;
 }
 
+void toggle_interruptibility(struct x86_emulate_ctxt *ctxt, u32 mask)
+{
+        u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(ctxt->vcpu, mask);
+        /*
+         * an sti; sti; sequence only disable interrupts for the first
+         * instruction. So, if the last instruction, be it emulated or
+         * not, left the system with the INT_STI flag enabled, it
+         * means that the last instruction is an sti. We should not
+         * leave the flag on in this case. The same goes for mov ss
+         */
+        if (!(int_shadow & mask))
+                ctxt->interruptibility = mask;
+}
+
 int
 x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
 {
@@ -1360,6 +1386,8 @@ x86_emulate_insn(struct x86_emulate_ctxt *ctxt, struct x86_emulate_ops *ops)
         int io_dir_in;
         int rc = 0;
 
+        ctxt->interruptibility = 0;
+
         /* Shadow copy of register state. Committed on successful emulation.
          * NOTE: we can copy them from vcpu as x86_decode_insn() doesn't
          * modify them.
@@ -1531,13 +1559,10 @@ special_insn:
                         return -1;
                 }
                 return 0;
-        case 0x70 ... 0x7f: /* jcc (short) */ {
-                int rel = insn_fetch(s8, 1, c->eip);
-
+        case 0x70 ... 0x7f: /* jcc (short) */
                 if (test_cc(c->b, ctxt->eflags))
-                        jmp_rel(c, rel);
+                        jmp_rel(c, c->src.val);
                 break;
-        }
         case 0x80 ... 0x83:     /* Grp1 */
                 switch (c->modrm_reg) {
                 case 0:
@@ -1609,6 +1634,9 @@ special_insn:
                 int err;
 
                 sel = c->src.val;
+                if (c->modrm_reg == VCPU_SREG_SS)
+                        toggle_interruptibility(ctxt, X86_SHADOW_INT_MOV_SS);
+
                 if (c->modrm_reg <= 5) {
                         type_bits = (c->modrm_reg == 1) ? 9 : 1;
                         err = kvm_load_segment_descriptor(ctxt->vcpu, sel,
@@ -1769,59 +1797,32 @@ special_insn:
                 break;
         case 0xe4:      /* inb */
         case 0xe5:      /* in */
-                port = insn_fetch(u8, 1, c->eip);
+                port = c->src.val;
                 io_dir_in = 1;
                 goto do_io;
         case 0xe6: /* outb */
         case 0xe7: /* out */
-                port = insn_fetch(u8, 1, c->eip);
+                port = c->src.val;
                 io_dir_in = 0;
                 goto do_io;
         case 0xe8: /* call (near) */ {
-                long int rel;
-                switch (c->op_bytes) {
-                case 2:
-                        rel = insn_fetch(s16, 2, c->eip);
-                        break;
-                case 4:
-                        rel = insn_fetch(s32, 4, c->eip);
-                        break;
-                default:
-                        DPRINTF("Call: Invalid op_bytes\n");
-                        goto cannot_emulate;
-                }
+                long int rel = c->src.val;
                 c->src.val = (unsigned long) c->eip;
                 jmp_rel(c, rel);
-                c->op_bytes = c->ad_bytes;
                 emulate_push(ctxt);
                 break;
         }
         case 0xe9: /* jmp rel */
                 goto jmp;
-        case 0xea: /* jmp far */ {
-                uint32_t eip;
-                uint16_t sel;
-
-                switch (c->op_bytes) {
-                case 2:
-                        eip = insn_fetch(u16, 2, c->eip);
-                        break;
-                case 4:
-                        eip = insn_fetch(u32, 4, c->eip);
-                        break;
-                default:
-                        DPRINTF("jmp far: Invalid op_bytes\n");
-                        goto cannot_emulate;
-                }
-                sel = insn_fetch(u16, 2, c->eip);
-                if (kvm_load_segment_descriptor(ctxt->vcpu, sel, 9, VCPU_SREG_CS) < 0) {
+        case 0xea: /* jmp far */
+                if (kvm_load_segment_descriptor(ctxt->vcpu, c->src2.val, 9,
+                                        VCPU_SREG_CS) < 0) {
                         DPRINTF("jmp far: Failed to load CS descriptor\n");
                         goto cannot_emulate;
                 }
 
-                c->eip = eip;
+                c->eip = c->src.val;
                 break;
-        }
         case 0xeb:
               jmp:              /* jmp rel short */
                 jmp_rel(c, c->src.val);
@@ -1865,6 +1866,7 @@ special_insn:
                 c->dst.type = OP_NONE;  /* Disable writeback. */
                 break;
         case 0xfb: /* sti */
+                toggle_interruptibility(ctxt, X86_SHADOW_INT_STI);
                 ctxt->eflags |= X86_EFLAGS_IF;
                 c->dst.type = OP_NONE;  /* Disable writeback. */
                 break;
@@ -2039,28 +2041,11 @@ twobyte_insn:
                 if (!test_cc(c->b, ctxt->eflags))
                         c->dst.type = OP_NONE; /* no writeback */
                 break;
-        case 0x80 ... 0x8f: /* jnz rel, etc*/ {
-                long int rel;
-
-                switch (c->op_bytes) {
-                case 2:
-                        rel = insn_fetch(s16, 2, c->eip);
-                        break;
-                case 4:
-                        rel = insn_fetch(s32, 4, c->eip);
-                        break;
-                case 8:
-                        rel = insn_fetch(s64, 8, c->eip);
-                        break;
-                default:
-                        DPRINTF("jnz: Invalid op_bytes\n");
-                        goto cannot_emulate;
-                }
+        case 0x80 ... 0x8f: /* jnz rel, etc*/
                 if (test_cc(c->b, ctxt->eflags))
-                        jmp_rel(c, rel);
+                        jmp_rel(c, c->src.val);
                 c->dst.type = OP_NONE;
                 break;
-        }
         case 0xa3:
               bt:               /* bt */
                 c->dst.type = OP_NONE;
diff --git a/arch/x86/lguest/Makefile b/arch/x86/lguest/Makefile
index 27f0c9ed7f60..94e0e54056a9 100644
--- a/arch/x86/lguest/Makefile
+++ b/arch/x86/lguest/Makefile
@@ -1 +1,2 @@
 obj-y           := i386_head.o boot.o
+CFLAGS_boot.o   := $(call cc-option, -fno-stack-protector)
diff --git a/arch/x86/lguest/boot.c b/arch/x86/lguest/boot.c
index 45acbcf25683..4e0c26559395 100644
--- a/arch/x86/lguest/boot.c
+++ b/arch/x86/lguest/boot.c
@@ -67,6 +67,7 @@
 #include <asm/mce.h>
 #include <asm/io.h>
 #include <asm/i387.h>
+#include <asm/stackprotector.h>
 #include <asm/reboot.h>         /* for struct machine_ops */
 
 /*G:010 Welcome to the Guest!
@@ -166,10 +167,16 @@ static void lazy_hcall3(unsigned long call,
 
 /* When lazy mode is turned off reset the per-cpu lazy mode variable and then
  * issue the do-nothing hypercall to flush any stored calls. */
-static void lguest_leave_lazy_mode(void)
+static void lguest_leave_lazy_mmu_mode(void)
 {
-        paravirt_leave_lazy(paravirt_get_lazy_mode());
         kvm_hypercall0(LHCALL_FLUSH_ASYNC);
+        paravirt_leave_lazy_mmu();
+}
+
+static void lguest_end_context_switch(struct task_struct *next)
+{
+        kvm_hypercall0(LHCALL_FLUSH_ASYNC);
+        paravirt_end_context_switch(next);
 }
 
 /*G:033
@@ -1053,8 +1060,8 @@ __init void lguest_init(void)
         pv_cpu_ops.write_gdt_entry = lguest_write_gdt_entry;
         pv_cpu_ops.write_idt_entry = lguest_write_idt_entry;
         pv_cpu_ops.wbinvd = lguest_wbinvd;
-        pv_cpu_ops.lazy_mode.enter = paravirt_enter_lazy_cpu;
-        pv_cpu_ops.lazy_mode.leave = lguest_leave_lazy_mode;
+        pv_cpu_ops.start_context_switch = paravirt_start_context_switch;
+        pv_cpu_ops.end_context_switch = lguest_end_context_switch;
 
         /* pagetable management */
         pv_mmu_ops.write_cr3 = lguest_write_cr3;
@@ -1067,7 +1074,7 @@ __init void lguest_init(void)
         pv_mmu_ops.read_cr2 = lguest_read_cr2;
         pv_mmu_ops.read_cr3 = lguest_read_cr3;
         pv_mmu_ops.lazy_mode.enter = paravirt_enter_lazy_mmu;
-        pv_mmu_ops.lazy_mode.leave = lguest_leave_lazy_mode;
+        pv_mmu_ops.lazy_mode.leave = lguest_leave_lazy_mmu_mode;
         pv_mmu_ops.pte_update = lguest_pte_update;
         pv_mmu_ops.pte_update_defer = lguest_pte_update;
 
@@ -1088,13 +1095,21 @@ __init void lguest_init(void)
          * lguest_init() where the rest of the fairly chaotic boot setup
          * occurs. */
 
+        /* The stack protector is a weird thing where gcc places a canary
+         * value on the stack and then checks it on return.  This file is
+         * compiled with -fno-stack-protector it, so we got this far without
+         * problems.  The value of the canary is kept at offset 20 from the
+         * %gs register, so we need to set that up before calling C functions
+         * in other files. */
+        setup_stack_canary_segment(0);
+        /* We could just call load_stack_canary_segment(), but we might as
+         * call switch_to_new_gdt() which loads the whole table and sets up
+         * the per-cpu segment descriptor register %fs as well. */
+        switch_to_new_gdt(0);
+
         /* As described in head_32.S, we map the first 128M of memory. */
         max_pfn_mapped = (128*1024*1024) >> PAGE_SHIFT;
 
-        /* Load the %fs segment register (the per-cpu segment register) with
-         * the normal data segment to get through booting. */
-        asm volatile ("mov %0, %%fs" : : "r" (__KERNEL_DS) : "memory");
-
         /* The Host<->Guest Switcher lives at the top of our address space, and
          * the Host told us how big it is when we made LGUEST_INIT hypercall:
          * it put the answer in lguest_data.reserve_mem  */
diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile
index 55e11aa6d66c..f9d35632666b 100644
--- a/arch/x86/lib/Makefile
+++ b/arch/x86/lib/Makefile
@@ -2,7 +2,7 @@
 # Makefile for x86 specific library files.
 #
 
-obj-$(CONFIG_SMP) := msr-on-cpu.o
+obj-$(CONFIG_SMP) := msr.o
 
 lib-y := delay.o
 lib-y += thunk_$(BITS).o
diff --git a/arch/x86/lib/msr-on-cpu.c b/arch/x86/lib/msr-on-cpu.c
deleted file mode 100644
index 321cf720dbb6..000000000000
--- a/arch/x86/lib/msr-on-cpu.c
+++ /dev/null
@@ -1,97 +0,0 @@
-#include <linux/module.h>
-#include <linux/preempt.h>
-#include <linux/smp.h>
-#include <asm/msr.h>
-
-struct msr_info {
-        u32 msr_no;
-        u32 l, h;
-        int err;
-};
-
-static void __rdmsr_on_cpu(void *info)
-{
-        struct msr_info *rv = info;
-
-        rdmsr(rv->msr_no, rv->l, rv->h);
-}
-
-static void __wrmsr_on_cpu(void *info)
-{
-        struct msr_info *rv = info;
-
-        wrmsr(rv->msr_no, rv->l, rv->h);
-}
-
-int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
-{
-        int err;
-        struct msr_info rv;
-
-        rv.msr_no = msr_no;
-        err = smp_call_function_single(cpu, __rdmsr_on_cpu, &rv, 1);
-        *l = rv.l;
-        *h = rv.h;
-
-        return err;
-}
-
-int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
-{
-        int err;
-        struct msr_info rv;
-
-        rv.msr_no = msr_no;
-        rv.l = l;
-        rv.h = h;
-        err = smp_call_function_single(cpu, __wrmsr_on_cpu, &rv, 1);
-
-        return err;
-}
-
-/* These "safe" variants are slower and should be used when the target MSR
-   may not actually exist. */
-static void __rdmsr_safe_on_cpu(void *info)
-{
-        struct msr_info *rv = info;
-
-        rv->err = rdmsr_safe(rv->msr_no, &rv->l, &rv->h);
-}
-
-static void __wrmsr_safe_on_cpu(void *info)
-{
-        struct msr_info *rv = info;
-
-        rv->err = wrmsr_safe(rv->msr_no, rv->l, rv->h);
-}
-
-int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
-{
-        int err;
-        struct msr_info rv;
-
-        rv.msr_no = msr_no;
-        err = smp_call_function_single(cpu, __rdmsr_safe_on_cpu, &rv, 1);
-        *l = rv.l;
-        *h = rv.h;
-
-        return err ? err : rv.err;
-}
-
-int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
-{
-        int err;
-        struct msr_info rv;
-
-        rv.msr_no = msr_no;
-        rv.l = l;
-        rv.h = h;
-        err = smp_call_function_single(cpu, __wrmsr_safe_on_cpu, &rv, 1);
-
-        return err ? err : rv.err;
-}
-
-EXPORT_SYMBOL(rdmsr_on_cpu);
-EXPORT_SYMBOL(wrmsr_on_cpu);
-EXPORT_SYMBOL(rdmsr_safe_on_cpu);
-EXPORT_SYMBOL(wrmsr_safe_on_cpu);
diff --git a/arch/x86/lib/msr.c b/arch/x86/lib/msr.c
new file mode 100644
index 000000000000..1440b9c0547e
--- /dev/null
+++ b/arch/x86/lib/msr.c
@@ -0,0 +1,183 @@
+#include <linux/module.h>
+#include <linux/preempt.h>
+#include <linux/smp.h>
+#include <asm/msr.h>
+
+struct msr_info {
+        u32 msr_no;
+        struct msr reg;
+        struct msr *msrs;
+        int off;
+        int err;
+};
+
+static void __rdmsr_on_cpu(void *info)
+{
+        struct msr_info *rv = info;
+        struct msr *reg;
+        int this_cpu = raw_smp_processor_id();
+
+        if (rv->msrs)
+                reg = &rv->msrs[this_cpu - rv->off];
+        else
+                reg = &rv->reg;
+
+        rdmsr(rv->msr_no, reg->l, reg->h);
+}
+
+static void __wrmsr_on_cpu(void *info)
+{
+        struct msr_info *rv = info;
+        struct msr *reg;
+        int this_cpu = raw_smp_processor_id();
+
+        if (rv->msrs)
+                reg = &rv->msrs[this_cpu - rv->off];
+        else
+                reg = &rv->reg;
+
+        wrmsr(rv->msr_no, reg->l, reg->h);
+}
+
+int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
+{
+        int err;
+        struct msr_info rv;
+
+        memset(&rv, 0, sizeof(rv));
+
+        rv.msr_no = msr_no;
+        err = smp_call_function_single(cpu, __rdmsr_on_cpu, &rv, 1);
+        *l = rv.reg.l;
+        *h = rv.reg.h;
+
+        return err;
+}
+EXPORT_SYMBOL(rdmsr_on_cpu);
+
+int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
+{
+        int err;
+        struct msr_info rv;
+
+        memset(&rv, 0, sizeof(rv));
+
+        rv.msr_no = msr_no;
+        rv.reg.l = l;
+        rv.reg.h = h;
+        err = smp_call_function_single(cpu, __wrmsr_on_cpu, &rv, 1);
+
+        return err;
+}
+EXPORT_SYMBOL(wrmsr_on_cpu);
+
+/* rdmsr on a bunch of CPUs
+ *
+ * @mask:       which CPUs
+ * @msr_no:     which MSR
+ * @msrs:       array of MSR values
+ *
+ */
+void rdmsr_on_cpus(const cpumask_t *mask, u32 msr_no, struct msr *msrs)
+{
+        struct msr_info rv;
+        int this_cpu;
+
+        memset(&rv, 0, sizeof(rv));
+
+        rv.off    = cpumask_first(mask);
+        rv.msrs   = msrs;
+        rv.msr_no = msr_no;
+
+        preempt_disable();
+        /*
+         * FIXME: handle the CPU we're executing on separately for now until
+         * smp_call_function_many has been fixed to not skip it.
+         */
+        this_cpu = raw_smp_processor_id();
+        smp_call_function_single(this_cpu, __rdmsr_on_cpu, &rv, 1);
+
+        smp_call_function_many(mask, __rdmsr_on_cpu, &rv, 1);
+        preempt_enable();
+}
+EXPORT_SYMBOL(rdmsr_on_cpus);
+
+/*
+ * wrmsr on a bunch of CPUs
+ *
+ * @mask:       which CPUs
+ * @msr_no:     which MSR
+ * @msrs:       array of MSR values
+ *
+ */
+void wrmsr_on_cpus(const cpumask_t *mask, u32 msr_no, struct msr *msrs)
+{
+        struct msr_info rv;
+        int this_cpu;
+
+        memset(&rv, 0, sizeof(rv));
+
+        rv.off    = cpumask_first(mask);
+        rv.msrs   = msrs;
+        rv.msr_no = msr_no;
+
+        preempt_disable();
+        /*
+         * FIXME: handle the CPU we're executing on separately for now until
+         * smp_call_function_many has been fixed to not skip it.
+         */
+        this_cpu = raw_smp_processor_id();
+        smp_call_function_single(this_cpu, __wrmsr_on_cpu, &rv, 1);
+
+        smp_call_function_many(mask, __wrmsr_on_cpu, &rv, 1);
+        preempt_enable();
+}
+EXPORT_SYMBOL(wrmsr_on_cpus);
+
+/* These "safe" variants are slower and should be used when the target MSR
+   may not actually exist. */
+static void __rdmsr_safe_on_cpu(void *info)
+{
+        struct msr_info *rv = info;
+
+        rv->err = rdmsr_safe(rv->msr_no, &rv->reg.l, &rv->reg.h);
+}
+
+static void __wrmsr_safe_on_cpu(void *info)
+{
+        struct msr_info *rv = info;
+
+        rv->err = wrmsr_safe(rv->msr_no, rv->reg.l, rv->reg.h);
+}
+
+int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
+{
+        int err;
+        struct msr_info rv;
+
+        memset(&rv, 0, sizeof(rv));
+
+        rv.msr_no = msr_no;
+        err = smp_call_function_single(cpu, __rdmsr_safe_on_cpu, &rv, 1);
+        *l = rv.reg.l;
+        *h = rv.reg.h;
+
+        return err ? err : rv.err;
+}
+EXPORT_SYMBOL(rdmsr_safe_on_cpu);
+
+int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
+{
+        int err;
+        struct msr_info rv;
+
+        memset(&rv, 0, sizeof(rv));
+
+        rv.msr_no = msr_no;
+        rv.reg.l = l;
+        rv.reg.h = h;
+        err = smp_call_function_single(cpu, __wrmsr_safe_on_cpu, &rv, 1);
+
+        return err ? err : rv.err;
+}
+EXPORT_SYMBOL(wrmsr_safe_on_cpu);
diff --git a/arch/x86/mm/dump_pagetables.c b/arch/x86/mm/dump_pagetables.c
index e7277cbcfb40..a725b7f760ae 100644
--- a/arch/x86/mm/dump_pagetables.c
+++ b/arch/x86/mm/dump_pagetables.c
@@ -161,13 +161,14 @@ static void note_page(struct seq_file *m, struct pg_state *st,
                    st->current_address >= st->marker[1].start_address) {
                 const char *unit = units;
                 unsigned long delta;
+                int width = sizeof(unsigned long) * 2;
 
                 /*
                  * Now print the actual finished series
                  */
-                seq_printf(m, "0x%p-0x%p   ",
-                           (void *)st->start_address,
-                           (void *)st->current_address);
+                seq_printf(m, "0x%0*lx-0x%0*lx   ",
+                           width, st->start_address,
+                           width, st->current_address);
 
                 delta = (st->current_address - st->start_address) >> 10;
                 while (!(delta & 1023) && unit[1]) {
diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c
index a03b7279efa0..c6acc6326374 100644
--- a/arch/x86/mm/fault.c
+++ b/arch/x86/mm/fault.c
@@ -3,40 +3,17 @@
  *  Copyright (C) 2001, 2002 Andi Kleen, SuSE Labs.
  *  Copyright (C) 2008-2009, Red Hat Inc., Ingo Molnar
  */
-#include <linux/interrupt.h>
-#include <linux/mmiotrace.h>
-#include <linux/bootmem.h>
-#include <linux/compiler.h>
-#include <linux/highmem.h>
-#include <linux/kprobes.h>
-#include <linux/uaccess.h>
-#include <linux/vmalloc.h>
-#include <linux/vt_kern.h>
-#include <linux/signal.h>
-#include <linux/kernel.h>
-#include <linux/ptrace.h>
-#include <linux/string.h>
-#include <linux/module.h>
-#include <linux/kdebug.h>
-#include <linux/errno.h>
-#include <linux/magic.h>
-#include <linux/sched.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/mman.h>
-#include <linux/tty.h>
-#include <linux/smp.h>
-#include <linux/mm.h>
-
-#include <asm-generic/sections.h>
-
-#include <asm/tlbflush.h>
-#include <asm/pgalloc.h>
-#include <asm/segment.h>
-#include <asm/system.h>
-#include <asm/proto.h>
-#include <asm/traps.h>
-#include <asm/desc.h>
+#include <linux/magic.h>                /* STACK_END_MAGIC              */
+#include <linux/sched.h>                /* test_thread_flag(), ...      */
+#include <linux/kdebug.h>               /* oops_begin/end, ...          */
+#include <linux/module.h>               /* search_exception_table       */
+#include <linux/bootmem.h>              /* max_low_pfn                  */
+#include <linux/kprobes.h>              /* __kprobes, ...               */
+#include <linux/mmiotrace.h>            /* kmmio_handler, ...           */
+#include <linux/perf_counter.h>         /* perf_swcounter_event         */
+
+#include <asm/traps.h>                  /* dotraplinkage, ...           */
+#include <asm/pgalloc.h>                /* pgd_*(), ...                 */
 
 /*
  * Page fault error code bits:
@@ -225,12 +202,10 @@ static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address)
         if (!pmd_present(*pmd_k))
                 return NULL;
 
-        if (!pmd_present(*pmd)) {
+        if (!pmd_present(*pmd))
                 set_pmd(pmd, *pmd_k);
-                arch_flush_lazy_mmu_mode();
-        } else {
+        else
                 BUG_ON(pmd_page(*pmd) != pmd_page(*pmd_k));
-        }
 
         return pmd_k;
 }
@@ -538,8 +513,6 @@ bad:
 static int is_errata93(struct pt_regs *regs, unsigned long address)
 {
 #ifdef CONFIG_X86_64
-        static int once;
-
         if (address != regs->ip)
                 return 0;
 
@@ -549,10 +522,7 @@ static int is_errata93(struct pt_regs *regs, unsigned long address)
         address |= 0xffffffffUL << 32;
         if ((address >= (u64)_stext && address <= (u64)_etext) ||
             (address >= MODULES_VADDR && address <= MODULES_END)) {
-                if (!once) {
-                        printk(errata93_warning);
-                        once = 1;
-                }
+                printk_once(errata93_warning);
                 regs->ip = address;
                 return 1;
         }
@@ -1044,6 +1014,8 @@ do_page_fault(struct pt_regs *regs, unsigned long error_code)
         if (unlikely(error_code & PF_RSVD))
                 pgtable_bad(regs, error_code, address);
 
+        perf_swcounter_event(PERF_COUNT_SW_PAGE_FAULTS, 1, 0, regs, address);
+
         /*
          * If we're in an interrupt, have no user context or are running
          * in an atomic region then we must not take the fault:
@@ -1137,10 +1109,15 @@ good_area:
                 return;
         }
 
-        if (fault & VM_FAULT_MAJOR)
+        if (fault & VM_FAULT_MAJOR) {
                 tsk->maj_flt++;
-        else
+                perf_swcounter_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, 0,
+                                     regs, address);
+        } else {
                 tsk->min_flt++;
+                perf_swcounter_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, 0,
+                                     regs, address);
+        }
 
         check_v8086_mode(regs, address, tsk);
 
diff --git a/arch/x86/mm/highmem_32.c b/arch/x86/mm/highmem_32.c
index 8126e8d1a2a4..58f621e81919 100644
--- a/arch/x86/mm/highmem_32.c
+++ b/arch/x86/mm/highmem_32.c
@@ -44,7 +44,6 @@ void *kmap_atomic_prot(struct page *page, enum km_type type, pgprot_t prot)
         vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
         BUG_ON(!pte_none(*(kmap_pte-idx)));
         set_pte(kmap_pte-idx, mk_pte(page, prot));
-        arch_flush_lazy_mmu_mode();
 
         return (void *)vaddr;
 }
@@ -74,7 +73,6 @@ void kunmap_atomic(void *kvaddr, enum km_type type)
 #endif
         }
 
-        arch_flush_lazy_mmu_mode();
         pagefault_enable();
 }
 
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index ae4f7b5d7104..34c1bfb64f1c 100644
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -1,3 +1,4 @@
+#include <linux/initrd.h>
 #include <linux/ioport.h>
 #include <linux/swap.h>
 
@@ -10,6 +11,9 @@
 #include <asm/setup.h>
 #include <asm/system.h>
 #include <asm/tlbflush.h>
+#include <asm/tlb.h>
+
+DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
 
 unsigned long __initdata e820_table_start;
 unsigned long __meminitdata e820_table_end;
@@ -23,6 +27,69 @@ int direct_gbpages
 #endif
 ;
 
+int nx_enabled;
+
+#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
+static int disable_nx __cpuinitdata;
+
+/*
+ * noexec = on|off
+ *
+ * Control non-executable mappings for processes.
+ *
+ * on      Enable
+ * off     Disable
+ */
+static int __init noexec_setup(char *str)
+{
+        if (!str)
+                return -EINVAL;
+        if (!strncmp(str, "on", 2)) {
+                __supported_pte_mask |= _PAGE_NX;
+                disable_nx = 0;
+        } else if (!strncmp(str, "off", 3)) {
+                disable_nx = 1;
+                __supported_pte_mask &= ~_PAGE_NX;
+        }
+        return 0;
+}
+early_param("noexec", noexec_setup);
+#endif
+
+#ifdef CONFIG_X86_PAE
+static void __init set_nx(void)
+{
+        unsigned int v[4], l, h;
+
+        if (cpu_has_pae && (cpuid_eax(0x80000000) > 0x80000001)) {
+                cpuid(0x80000001, &v[0], &v[1], &v[2], &v[3]);
+
+                if ((v[3] & (1 << 20)) && !disable_nx) {
+                        rdmsr(MSR_EFER, l, h);
+                        l |= EFER_NX;
+                        wrmsr(MSR_EFER, l, h);
+                        nx_enabled = 1;
+                        __supported_pte_mask |= _PAGE_NX;
+                }
+        }
+}
+#else
+static inline void set_nx(void)
+{
+}
+#endif
+
+#ifdef CONFIG_X86_64
+void __cpuinit check_efer(void)
+{
+        unsigned long efer;
+
+        rdmsrl(MSR_EFER, efer);
+        if (!(efer & EFER_NX) || disable_nx)
+                __supported_pte_mask &= ~_PAGE_NX;
+}
+#endif
+
 static void __init find_early_table_space(unsigned long end, int use_pse,
                                           int use_gbpages)
 {
@@ -66,12 +133,11 @@ static void __init find_early_table_space(unsigned long end, int use_pse,
          */
 #ifdef CONFIG_X86_32
         start = 0x7000;
-        e820_table_start = find_e820_area(start, max_pfn_mapped<<PAGE_SHIFT,
-                                        tables, PAGE_SIZE);
-#else /* CONFIG_X86_64 */
+#else
         start = 0x8000;
-        e820_table_start = find_e820_area(start, end, tables, PAGE_SIZE);
 #endif
+        e820_table_start = find_e820_area(start, max_pfn_mapped<<PAGE_SHIFT,
+                                        tables, PAGE_SIZE);
         if (e820_table_start == -1UL)
                 panic("Cannot find space for the kernel page tables");
 
@@ -159,12 +225,9 @@ unsigned long __init_refok init_memory_mapping(unsigned long start,
         use_gbpages = direct_gbpages;
 #endif
 
-#ifdef CONFIG_X86_32
-#ifdef CONFIG_X86_PAE
         set_nx();
         if (nx_enabled)
                 printk(KERN_INFO "NX (Execute Disable) protection: active\n");
-#endif
 
         /* Enable PSE if available */
         if (cpu_has_pse)
@@ -175,7 +238,6 @@ unsigned long __init_refok init_memory_mapping(unsigned long start,
                 set_in_cr4(X86_CR4_PGE);
                 __supported_pte_mask |= _PAGE_GLOBAL;
         }
-#endif
 
         if (use_gbpages)
                 page_size_mask |= 1 << PG_LEVEL_1G;
diff --git a/arch/x86/mm/init_32.c b/arch/x86/mm/init_32.c
index 749559ed80f5..949708d7a481 100644
--- a/arch/x86/mm/init_32.c
+++ b/arch/x86/mm/init_32.c
@@ -49,12 +49,9 @@
 #include <asm/paravirt.h>
 #include <asm/setup.h>
 #include <asm/cacheflush.h>
+#include <asm/page_types.h>
 #include <asm/init.h>
 
-unsigned long max_low_pfn_mapped;
-unsigned long max_pfn_mapped;
-
-DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
 unsigned long highstart_pfn, highend_pfn;
 
 static noinline int do_test_wp_bit(void);
@@ -587,61 +584,9 @@ void zap_low_mappings(void)
         flush_tlb_all();
 }
 
-int nx_enabled;
-
 pteval_t __supported_pte_mask __read_mostly = ~(_PAGE_NX | _PAGE_GLOBAL | _PAGE_IOMAP);
 EXPORT_SYMBOL_GPL(__supported_pte_mask);
 
-#ifdef CONFIG_X86_PAE
-
-static int disable_nx __initdata;
-
-/*
- * noexec = on|off
- *
- * Control non executable mappings.
- *
- * on      Enable
- * off     Disable
- */
-static int __init noexec_setup(char *str)
-{
-        if (!str || !strcmp(str, "on")) {
-                if (cpu_has_nx) {
-                        __supported_pte_mask |= _PAGE_NX;
-                        disable_nx = 0;
-                }
-        } else {
-                if (!strcmp(str, "off")) {
-                        disable_nx = 1;
-                        __supported_pte_mask &= ~_PAGE_NX;
-                } else {
-                        return -EINVAL;
-                }
-        }
-
-        return 0;
-}
-early_param("noexec", noexec_setup);
-
-void __init set_nx(void)
-{
-        unsigned int v[4], l, h;
-
-        if (cpu_has_pae && (cpuid_eax(0x80000000) > 0x80000001)) {
-                cpuid(0x80000001, &v[0], &v[1], &v[2], &v[3]);
-
-                if ((v[3] & (1 << 20)) && !disable_nx) {
-                        rdmsr(MSR_EFER, l, h);
-                        l |= EFER_NX;
-                        wrmsr(MSR_EFER, l, h);
-                        nx_enabled = 1;
-                        __supported_pte_mask |= _PAGE_NX;
-                }
-        }
-}
-#endif
-
 /* user-defined highmem size */
 static unsigned int highmem_pages = -1;
 
@@ -761,15 +706,15 @@ void __init initmem_init(unsigned long start_pfn,
         highstart_pfn = highend_pfn = max_pfn;
         if (max_pfn > max_low_pfn)
                 highstart_pfn = max_low_pfn;
-        memory_present(0, 0, highend_pfn);
         e820_register_active_regions(0, 0, highend_pfn);
+        sparse_memory_present_with_active_regions(0);
         printk(KERN_NOTICE "%ldMB HIGHMEM available.\n",
                 pages_to_mb(highend_pfn - highstart_pfn));
         num_physpages = highend_pfn;
         high_memory = (void *) __va(highstart_pfn * PAGE_SIZE - 1) + 1;
 #else
-        memory_present(0, 0, max_low_pfn);
         e820_register_active_regions(0, 0, max_low_pfn);
+        sparse_memory_present_with_active_regions(0);
         num_physpages = max_low_pfn;
         high_memory = (void *) __va(max_low_pfn * PAGE_SIZE - 1) + 1;
 #endif
diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c
index 1753e8020df6..52bb9519bb86 100644
--- a/arch/x86/mm/init_64.c
+++ b/arch/x86/mm/init_64.c
@@ -50,18 +50,8 @@
 #include <asm/cacheflush.h>
 #include <asm/init.h>
 
-/*
- * end_pfn only includes RAM, while max_pfn_mapped includes all e820 entries.
- * The direct mapping extends to max_pfn_mapped, so that we can directly access
- * apertures, ACPI and other tables without having to play with fixmaps.
- */
-unsigned long max_low_pfn_mapped;
-unsigned long max_pfn_mapped;
-
 static unsigned long dma_reserve __initdata;
 
-DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
-
 static int __init parse_direct_gbpages_off(char *arg)
 {
         direct_gbpages = 0;
@@ -85,39 +75,6 @@ early_param("gbpages", parse_direct_gbpages_on);
 pteval_t __supported_pte_mask __read_mostly = ~_PAGE_IOMAP;
 EXPORT_SYMBOL_GPL(__supported_pte_mask);
 
-static int disable_nx __cpuinitdata;
-
-/*
- * noexec=on|off
- * Control non-executable mappings for 64-bit processes.
- *
- * on   Enable (default)
- * off  Disable
- */
-static int __init nonx_setup(char *str)
-{
-        if (!str)
-                return -EINVAL;
-        if (!strncmp(str, "on", 2)) {
-                __supported_pte_mask |= _PAGE_NX;
-                disable_nx = 0;
-        } else if (!strncmp(str, "off", 3)) {
-                disable_nx = 1;
-                __supported_pte_mask &= ~_PAGE_NX;
-        }
-        return 0;
-}
-early_param("noexec", nonx_setup);
-
-void __cpuinit check_efer(void)
-{
-        unsigned long efer;
-
-        rdmsrl(MSR_EFER, efer);
-        if (!(efer & EFER_NX) || disable_nx)
-                __supported_pte_mask &= ~_PAGE_NX;
-}
-
 int force_personality32;
 
 /*
@@ -628,6 +585,7 @@ void __init initmem_init(unsigned long start_pfn, unsigned long end_pfn)
         early_res_to_bootmem(0, end_pfn<<PAGE_SHIFT);
         reserve_bootmem(bootmap, bootmap_size, BOOTMEM_DEFAULT);
 }
+#endif
 
 void __init paging_init(void)
 {
@@ -638,11 +596,10 @@ void __init paging_init(void)
         max_zone_pfns[ZONE_DMA32] = MAX_DMA32_PFN;
         max_zone_pfns[ZONE_NORMAL] = max_pfn;
 
-        memory_present(0, 0, max_pfn);
+        sparse_memory_present_with_active_regions(MAX_NUMNODES);
         sparse_init();
         free_area_init_nodes(max_zone_pfns);
 }
-#endif
 
 /*
  * Memory hotplug specific functions
diff --git a/arch/x86/mm/iomap_32.c b/arch/x86/mm/iomap_32.c
index 8056545e2d39..fe6f84ca121e 100644
--- a/arch/x86/mm/iomap_32.c
+++ b/arch/x86/mm/iomap_32.c
@@ -82,7 +82,6 @@ iounmap_atomic(void *kvaddr, enum km_type type)
         if (vaddr == __fix_to_virt(FIX_KMAP_BEGIN+idx))
                 kpte_clear_flush(kmap_pte-idx, vaddr);
 
-        arch_flush_lazy_mmu_mode();
         pagefault_enable();
 }
 EXPORT_SYMBOL_GPL(iounmap_atomic);
diff --git a/arch/x86/mm/kmmio.c b/arch/x86/mm/kmmio.c
index 50dc802a1c46..16ccbd77917f 100644
--- a/arch/x86/mm/kmmio.c
+++ b/arch/x86/mm/kmmio.c
@@ -32,7 +32,7 @@ struct kmmio_fault_page {
         struct list_head list;
         struct kmmio_fault_page *release_next;
         unsigned long page; /* location of the fault page */
-        bool old_presence; /* page presence prior to arming */
+        pteval_t old_presence; /* page presence prior to arming */
         bool armed;
 
         /*
@@ -97,60 +97,62 @@ static struct kmmio_probe *get_kmmio_probe(unsigned long addr)
 static struct kmmio_fault_page *get_kmmio_fault_page(unsigned long page)
 {
         struct list_head *head;
-        struct kmmio_fault_page *p;
+        struct kmmio_fault_page *f;
 
         page &= PAGE_MASK;
         head = kmmio_page_list(page);
-        list_for_each_entry_rcu(p, head, list) {
-                if (p->page == page)
-                        return p;
+        list_for_each_entry_rcu(f, head, list) {
+                if (f->page == page)
+                        return f;
         }
         return NULL;
 }
 
-static void set_pmd_presence(pmd_t *pmd, bool present, bool *old)
+static void clear_pmd_presence(pmd_t *pmd, bool clear, pmdval_t *old)
 {
         pmdval_t v = pmd_val(*pmd);
-        *old = !!(v & _PAGE_PRESENT);
-        v &= ~_PAGE_PRESENT;
-        if (present)
-                v |= _PAGE_PRESENT;
+        if (clear) {
+                *old = v & _PAGE_PRESENT;
+                v &= ~_PAGE_PRESENT;
+        } else  /* presume this has been called with clear==true previously */
+                v |= *old;
         set_pmd(pmd, __pmd(v));
 }
 
-static void set_pte_presence(pte_t *pte, bool present, bool *old)
+static void clear_pte_presence(pte_t *pte, bool clear, pteval_t *old)
 {
         pteval_t v = pte_val(*pte);
-        *old = !!(v & _PAGE_PRESENT);
-        v &= ~_PAGE_PRESENT;
-        if (present)
-                v |= _PAGE_PRESENT;
+        if (clear) {
+                *old = v & _PAGE_PRESENT;
+                v &= ~_PAGE_PRESENT;
+        } else  /* presume this has been called with clear==true previously */
+                v |= *old;
         set_pte_atomic(pte, __pte(v));
 }
 
-static int set_page_presence(unsigned long addr, bool present, bool *old)
+static int clear_page_presence(struct kmmio_fault_page *f, bool clear)
 {
         unsigned int level;
-        pte_t *pte = lookup_address(addr, &level);
+        pte_t *pte = lookup_address(f->page, &level);
 
         if (!pte) {
-                pr_err("kmmio: no pte for page 0x%08lx\n", addr);
+                pr_err("kmmio: no pte for page 0x%08lx\n", f->page);
                 return -1;
         }
 
         switch (level) {
         case PG_LEVEL_2M:
-                set_pmd_presence((pmd_t *)pte, present, old);
+                clear_pmd_presence((pmd_t *)pte, clear, &f->old_presence);
                 break;
         case PG_LEVEL_4K:
-                set_pte_presence(pte, present, old);
+                clear_pte_presence(pte, clear, &f->old_presence);
                 break;
         default:
                 pr_err("kmmio: unexpected page level 0x%x.\n", level);
                 return -1;
         }
 
-        __flush_tlb_one(addr);
+        __flush_tlb_one(f->page);
         return 0;
 }
 
@@ -171,9 +173,9 @@ static int arm_kmmio_fault_page(struct kmmio_fault_page *f)
         WARN_ONCE(f->armed, KERN_ERR "kmmio page already armed.\n");
         if (f->armed) {
                 pr_warning("kmmio double-arm: page 0x%08lx, ref %d, old %d\n",
-                                        f->page, f->count, f->old_presence);
+                                        f->page, f->count, !!f->old_presence);
         }
-        ret = set_page_presence(f->page, false, &f->old_presence);
+        ret = clear_page_presence(f, true);
         WARN_ONCE(ret < 0, KERN_ERR "kmmio arming 0x%08lx failed.\n", f->page);
         f->armed = true;
         return ret;
@@ -182,8 +184,7 @@ static int arm_kmmio_fault_page(struct kmmio_fault_page *f)
 /** Restore the given page to saved presence state. */
 static void disarm_kmmio_fault_page(struct kmmio_fault_page *f)
 {
-        bool tmp;
-        int ret = set_page_presence(f->page, f->old_presence, &tmp);
+        int ret = clear_page_presence(f, false);
         WARN_ONCE(ret < 0,
                         KERN_ERR "kmmio disarming 0x%08lx failed.\n", f->page);
         f->armed = false;
@@ -310,7 +311,12 @@ static int post_kmmio_handler(unsigned long condition, struct pt_regs *regs)
         struct kmmio_context *ctx = &get_cpu_var(kmmio_ctx);
 
         if (!ctx->active) {
-                pr_debug("kmmio: spurious debug trap on CPU %d.\n",
+                /*
+                 * debug traps without an active context are due to either
+                 * something external causing them (f.e. using a debugger while
+                 * mmio tracing enabled), or erroneous behaviour
+                 */
+                pr_warning("kmmio: unexpected debug trap on CPU %d.\n",
                                                         smp_processor_id());
                 goto out;
         }
@@ -439,12 +445,12 @@ static void rcu_free_kmmio_fault_pages(struct rcu_head *head)
                                                 head,
                                                 struct kmmio_delayed_release,
                                                 rcu);
-        struct kmmio_fault_page *p = dr->release_list;
-        while (p) {
-                struct kmmio_fault_page *next = p->release_next;
-                BUG_ON(p->count);
-                kfree(p);
-                p = next;
+        struct kmmio_fault_page *f = dr->release_list;
+        while (f) {
+                struct kmmio_fault_page *next = f->release_next;
+                BUG_ON(f->count);
+                kfree(f);
+                f = next;
         }
         kfree(dr);
 }
@@ -453,19 +459,19 @@ static void remove_kmmio_fault_pages(struct rcu_head *head)
 {
         struct kmmio_delayed_release *dr =
                 container_of(head, struct kmmio_delayed_release, rcu);
-        struct kmmio_fault_page *p = dr->release_list;
+        struct kmmio_fault_page *f = dr->release_list;
         struct kmmio_fault_page **prevp = &dr->release_list;
         unsigned long flags;
 
         spin_lock_irqsave(&kmmio_lock, flags);
-        while (p) {
-                if (!p->count) {
-                        list_del_rcu(&p->list);
-                        prevp = &p->release_next;
+        while (f) {
+                if (!f->count) {
+                        list_del_rcu(&f->list);
+                        prevp = &f->release_next;
                 } else {
-                        *prevp = p->release_next;
+                        *prevp = f->release_next;
                 }
-                p = p->release_next;
+                f = f->release_next;
         }
         spin_unlock_irqrestore(&kmmio_lock, flags);
 
@@ -528,8 +534,8 @@ void unregister_kmmio_probe(struct kmmio_probe *p)
 }
 EXPORT_SYMBOL(unregister_kmmio_probe);
 
-static int kmmio_die_notifier(struct notifier_block *nb, unsigned long val,
-                                                                void *args)
+static int
+kmmio_die_notifier(struct notifier_block *nb, unsigned long val, void *args)
 {
         struct die_args *arg = args;
 
@@ -544,11 +550,23 @@ static struct notifier_block nb_die = {
         .notifier_call = kmmio_die_notifier
 };
 
-static int __init init_kmmio(void)
+int kmmio_init(void)
 {
         int i;
+
         for (i = 0; i < KMMIO_PAGE_TABLE_SIZE; i++)
                 INIT_LIST_HEAD(&kmmio_page_table[i]);
+
         return register_die_notifier(&nb_die);
 }
-fs_initcall(init_kmmio); /* should be before device_initcall() */
+
+void kmmio_cleanup(void)
+{
+        int i;
+
+        unregister_die_notifier(&nb_die);
+        for (i = 0; i < KMMIO_PAGE_TABLE_SIZE; i++) {
+                WARN_ONCE(!list_empty(&kmmio_page_table[i]),
+                        KERN_ERR "kmmio_page_table not empty at cleanup, any further tracing will leak memory.\n");
+        }
+}
diff --git a/arch/x86/mm/memtest.c b/arch/x86/mm/memtest.c
index 605c8be06217..18d244f70205 100644
--- a/arch/x86/mm/memtest.c
+++ b/arch/x86/mm/memtest.c
@@ -40,23 +40,22 @@ static void __init reserve_bad_mem(u64 pattern, u64 start_bad, u64 end_bad)
 
 static void __init memtest(u64 pattern, u64 start_phys, u64 size)
 {
-        u64 i, count;
-        u64 *start;
+        u64 *p, *start, *end;
         u64 start_bad, last_bad;
         u64 start_phys_aligned;
-        size_t incr;
+        const size_t incr = sizeof(pattern);
 
-        incr = sizeof(pattern);
         start_phys_aligned = ALIGN(start_phys, incr);
-        count = (size - (start_phys_aligned - start_phys))/incr;
         start = __va(start_phys_aligned);
+        end = start + (size - (start_phys_aligned - start_phys)) / incr;
         start_bad = 0;
         last_bad = 0;
 
-        for (i = 0; i < count; i++)
-                start[i] = pattern;
-        for (i = 0; i < count; i++, start++, start_phys_aligned += incr) {
-                if (*start == pattern)
+        for (p = start; p < end; p++)
+                *p = pattern;
+
+        for (p = start; p < end; p++, start_phys_aligned += incr) {
+                if (*p == pattern)
                         continue;
                 if (start_phys_aligned == last_bad + incr) {
                         last_bad += incr;
diff --git a/arch/x86/mm/mmio-mod.c b/arch/x86/mm/mmio-mod.c
index c9342ed8b402..132772a8ec57 100644
--- a/arch/x86/mm/mmio-mod.c
+++ b/arch/x86/mm/mmio-mod.c
@@ -451,6 +451,7 @@ void enable_mmiotrace(void)
 
         if (nommiotrace)
                 pr_info(NAME "MMIO tracing disabled.\n");
+        kmmio_init();
         enter_uniprocessor();
         spin_lock_irq(&trace_lock);
         atomic_inc(&mmiotrace_enabled);
@@ -473,6 +474,7 @@ void disable_mmiotrace(void)
 
         clear_trace_list(); /* guarantees: no more kmmio callbacks */
         leave_uniprocessor();
+        kmmio_cleanup();
         pr_info(NAME "disabled.\n");
 out:
         mutex_unlock(&mmiotrace_mutex);
diff --git a/arch/x86/mm/numa_64.c b/arch/x86/mm/numa_64.c
index 2d05a12029dc..459913beac71 100644
--- a/arch/x86/mm/numa_64.c
+++ b/arch/x86/mm/numa_64.c
@@ -179,18 +179,25 @@ static void * __init early_node_mem(int nodeid, unsigned long start,
 }
 
 /* Initialize bootmem allocator for a node */
-void __init setup_node_bootmem(int nodeid, unsigned long start,
-                               unsigned long end)
+void __init
+setup_node_bootmem(int nodeid, unsigned long start, unsigned long end)
 {
         unsigned long start_pfn, last_pfn, bootmap_pages, bootmap_size;
+        const int pgdat_size = roundup(sizeof(pg_data_t), PAGE_SIZE);
         unsigned long bootmap_start, nodedata_phys;
         void *bootmap;
-        const int pgdat_size = roundup(sizeof(pg_data_t), PAGE_SIZE);
         int nid;
 
         if (!end)
                 return;
 
+        /*
+         * Don't confuse VM with a node that doesn't have the
+         * minimum amount of memory:
+         */
+        if (end && (end - start) < NODE_MIN_SIZE)
+                return;
+
         start = roundup(start, ZONE_ALIGN);
 
         printk(KERN_INFO "Bootmem setup node %d %016lx-%016lx\n", nodeid,
@@ -272,9 +279,6 @@ void __init setup_node_bootmem(int nodeid, unsigned long start,
                 reserve_bootmem_node(NODE_DATA(nodeid), bootmap_start,
                                  bootmap_pages<<PAGE_SHIFT, BOOTMEM_DEFAULT);
 
-#ifdef CONFIG_ACPI_NUMA
-        srat_reserve_add_area(nodeid);
-#endif
         node_set_online(nodeid);
 }
 
@@ -578,21 +582,6 @@ unsigned long __init numa_free_all_bootmem(void)
         return pages;
 }
 
-void __init paging_init(void)
-{
-        unsigned long max_zone_pfns[MAX_NR_ZONES];
-
-        memset(max_zone_pfns, 0, sizeof(max_zone_pfns));
-        max_zone_pfns[ZONE_DMA] = MAX_DMA_PFN;
-        max_zone_pfns[ZONE_DMA32] = MAX_DMA32_PFN;
-        max_zone_pfns[ZONE_NORMAL] = max_pfn;
-
-        sparse_memory_present_with_active_regions(MAX_NUMNODES);
-        sparse_init();
-
-        free_area_init_nodes(max_zone_pfns);
-}
-
 static __init int numa_setup(char *opt)
 {
         if (!opt)
@@ -606,8 +595,6 @@ static __init int numa_setup(char *opt)
 #ifdef CONFIG_ACPI_NUMA
         if (!strncmp(opt, "noacpi", 6))
                 acpi_numa = -1;
-        if (!strncmp(opt, "hotadd=", 7))
-                hotadd_percent = simple_strtoul(opt+7, NULL, 10);
 #endif
         return 0;
 }
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index e17efed088c5..6ce9518fe2ac 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -839,13 +839,6 @@ static int change_page_attr_set_clr(unsigned long *addr, int numpages,
 
         vm_unmap_aliases();
 
-        /*
-         * If we're called with lazy mmu updates enabled, the
-         * in-memory pte state may be stale.  Flush pending updates to
-         * bring them up to date.
-         */
-        arch_flush_lazy_mmu_mode();
-
         cpa.vaddr = addr;
         cpa.pages = pages;
         cpa.numpages = numpages;
@@ -890,13 +883,6 @@ static int change_page_attr_set_clr(unsigned long *addr, int numpages,
         } else
                 cpa_flush_all(cache);
 
-        /*
-         * If we've been called with lazy mmu updates enabled, then
-         * make sure that everything gets flushed out before we
-         * return.
-         */
-        arch_flush_lazy_mmu_mode();
-
 out:
         return ret;
 }
diff --git a/arch/x86/mm/srat_64.c b/arch/x86/mm/srat_64.c
index 01765955baaf..2dfcbf9df2ae 100644
--- a/arch/x86/mm/srat_64.c
+++ b/arch/x86/mm/srat_64.c
@@ -31,17 +31,11 @@ static nodemask_t nodes_parsed __initdata;
 static nodemask_t cpu_nodes_parsed __initdata;
 static struct bootnode nodes[MAX_NUMNODES] __initdata;
 static struct bootnode nodes_add[MAX_NUMNODES];
-static int found_add_area __initdata;
-int hotadd_percent __initdata = 0;
 
 static int num_node_memblks __initdata;
 static struct bootnode node_memblk_range[NR_NODE_MEMBLKS] __initdata;
 static int memblk_nodeid[NR_NODE_MEMBLKS] __initdata;
 
-/* Too small nodes confuse the VM badly. Usually they result
-   from BIOS bugs. */
-#define NODE_MIN_SIZE (4*1024*1024)
-
 static __init int setup_node(int pxm)
 {
         return acpi_map_pxm_to_node(pxm);
@@ -66,9 +60,6 @@ static __init void cutoff_node(int i, unsigned long start, unsigned long end)
 {
         struct bootnode *nd = &nodes[i];
 
-        if (found_add_area)
-                return;
-
         if (nd->start < start) {
                 nd->start = start;
                 if (nd->end < nd->start)
@@ -86,7 +77,6 @@ static __init void bad_srat(void)
         int i;
         printk(KERN_ERR "SRAT: SRAT not used.\n");
         acpi_numa = -1;
-        found_add_area = 0;
         for (i = 0; i < MAX_LOCAL_APIC; i++)
                 apicid_to_node[i] = NUMA_NO_NODE;
         for (i = 0; i < MAX_NUMNODES; i++)
@@ -182,24 +172,21 @@ acpi_numa_processor_affinity_init(struct acpi_srat_cpu_affinity *pa)
                pxm, apic_id, node);
 }
 
-static int update_end_of_memory(unsigned long end) {return -1;}
-static int hotadd_enough_memory(struct bootnode *nd) {return 1;}
 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
 static inline int save_add_info(void) {return 1;}
 #else
 static inline int save_add_info(void) {return 0;}
 #endif
 /*
- * Update nodes_add and decide if to include add are in the zone.
- * Both SPARSE and RESERVE need nodes_add information.
- * This code supports one contiguous hot add area per node.
+ * Update nodes_add[]
+ * This code supports one contiguous hot add area per node
  */
-static int __init
-reserve_hotadd(int node, unsigned long start, unsigned long end)
+static void __init
+update_nodes_add(int node, unsigned long start, unsigned long end)
 {
         unsigned long s_pfn = start >> PAGE_SHIFT;
         unsigned long e_pfn = end >> PAGE_SHIFT;
-        int ret = 0, changed = 0;
+        int changed = 0;
         struct bootnode *nd = &nodes_add[node];
 
         /* I had some trouble with strange memory hotadd regions breaking
@@ -210,7 +197,7 @@ reserve_hotadd(int node, unsigned long start, unsigned long end)
            mistakes */
         if ((signed long)(end - start) < NODE_MIN_SIZE) {
                 printk(KERN_ERR "SRAT: Hotplug area too small\n");
-                return -1;
+                return;
         }
 
         /* This check might be a bit too strict, but I'm keeping it for now. */
@@ -218,12 +205,7 @@ reserve_hotadd(int node, unsigned long start, unsigned long end)
                 printk(KERN_ERR
                         "SRAT: Hotplug area %lu -> %lu has existing memory\n",
                         s_pfn, e_pfn);
-                return -1;
-        }
-
-        if (!hotadd_enough_memory(&nodes_add[node]))  {
-                printk(KERN_ERR "SRAT: Hotplug area too large\n");
-                return -1;
+                return;
         }
 
         /* Looks good */
@@ -245,11 +227,9 @@ reserve_hotadd(int node, unsigned long start, unsigned long end)
                         printk(KERN_ERR "SRAT: Hotplug zone not continuous. Partly ignored\n");
         }
 
-        ret = update_end_of_memory(nd->end);
-
         if (changed)
-                printk(KERN_INFO "SRAT: hot plug zone found %Lx - %Lx\n", nd->start, nd->end);
-        return ret;
+                printk(KERN_INFO "SRAT: hot plug zone found %Lx - %Lx\n",
+                                 nd->start, nd->end);
 }
 
 /* Callback for parsing of the Proximity Domain <-> Memory Area mappings */
@@ -310,13 +290,10 @@ acpi_numa_memory_affinity_init(struct acpi_srat_mem_affinity *ma)
                start, end);
         e820_register_active_regions(node, start >> PAGE_SHIFT,
                                      end >> PAGE_SHIFT);
-        push_node_boundaries(node, nd->start >> PAGE_SHIFT,
-                                                nd->end >> PAGE_SHIFT);
 
-        if ((ma->flags & ACPI_SRAT_MEM_HOT_PLUGGABLE) &&
-            (reserve_hotadd(node, start, end) < 0)) {
-                /* Ignore hotadd region. Undo damage */
-                printk(KERN_NOTICE "SRAT: Hotplug region ignored\n");
+        if (ma->flags & ACPI_SRAT_MEM_HOT_PLUGGABLE) {
+                update_nodes_add(node, start, end);
+                /* restore nodes[node] */
                 *nd = oldnode;
                 if ((nd->start | nd->end) == 0)
                         node_clear(node, nodes_parsed);
@@ -345,9 +322,9 @@ static int __init nodes_cover_memory(const struct bootnode *nodes)
                         pxmram = 0;
         }
 
-        e820ram = max_pfn - absent_pages_in_range(0, max_pfn);
-        /* We seem to lose 3 pages somewhere. Allow a bit of slack. */
-        if ((long)(e820ram - pxmram) >= 1*1024*1024) {
+        e820ram = max_pfn - (e820_hole_size(0, max_pfn<<PAGE_SHIFT)>>PAGE_SHIFT);
+        /* We seem to lose 3 pages somewhere. Allow 1M of slack. */
+        if ((long)(e820ram - pxmram) >= (1<<(20 - PAGE_SHIFT))) {
                 printk(KERN_ERR
         "SRAT: PXMs only cover %luMB of your %luMB e820 RAM. Not used.\n",
                         (pxmram << PAGE_SHIFT) >> 20,
@@ -357,17 +334,6 @@ static int __init nodes_cover_memory(const struct bootnode *nodes)
         return 1;
 }
 
-static void __init unparse_node(int node)
-{
-        int i;
-        node_clear(node, nodes_parsed);
-        node_clear(node, cpu_nodes_parsed);
-        for (i = 0; i < MAX_LOCAL_APIC; i++) {
-                if (apicid_to_node[i] == node)
-                        apicid_to_node[i] = NUMA_NO_NODE;
-        }
-}
-
 void __init acpi_numa_arch_fixup(void) {}
 
 /* Use the information discovered above to actually set up the nodes. */
@@ -379,18 +345,8 @@ int __init acpi_scan_nodes(unsigned long start, unsigned long end)
                 return -1;
 
         /* First clean up the node list */
-        for (i = 0; i < MAX_NUMNODES; i++) {
+        for (i = 0; i < MAX_NUMNODES; i++)
                 cutoff_node(i, start, end);
-                /*
-                 * don't confuse VM with a node that doesn't have the
-                 * minimum memory.
-                 */
-                if (nodes[i].end &&
-                        (nodes[i].end - nodes[i].start) < NODE_MIN_SIZE) {
-                        unparse_node(i);
-                        node_set_offline(i);
-                }
-        }
 
         if (!nodes_cover_memory(nodes)) {
                 bad_srat();
@@ -423,7 +379,7 @@ int __init acpi_scan_nodes(unsigned long start, unsigned long end)
 
                 if (node == NUMA_NO_NODE)
                         continue;
-                if (!node_isset(node, node_possible_map))
+                if (!node_online(node))
                         numa_clear_node(i);
         }
         numa_init_array();
@@ -510,26 +466,6 @@ static int null_slit_node_compare(int a, int b)
 }
 #endif /* CONFIG_NUMA_EMU */
 
-void __init srat_reserve_add_area(int nodeid)
-{
-        if (found_add_area && nodes_add[nodeid].end) {
-                u64 total_mb;
-
-                printk(KERN_INFO "SRAT: Reserving hot-add memory space "
-                                "for node %d at %Lx-%Lx\n",
-                        nodeid, nodes_add[nodeid].start, nodes_add[nodeid].end);
-                total_mb = (nodes_add[nodeid].end - nodes_add[nodeid].start)
-                                        >> PAGE_SHIFT;
-                total_mb *= sizeof(struct page);
-                total_mb >>= 20;
-                printk(KERN_INFO "SRAT: This will cost you %Lu MB of "
-                                "pre-allocated memory.\n", (unsigned long long)total_mb);
-                reserve_bootmem_node(NODE_DATA(nodeid), nodes_add[nodeid].start,
-                               nodes_add[nodeid].end - nodes_add[nodeid].start,
-                               BOOTMEM_DEFAULT);
-        }
-}
-
 int __node_distance(int a, int b)
 {
         int index;
diff --git a/arch/x86/oprofile/nmi_int.c b/arch/x86/oprofile/nmi_int.c
index 202864ad49a7..b07dd8d0b321 100644
--- a/arch/x86/oprofile/nmi_int.c
+++ b/arch/x86/oprofile/nmi_int.c
@@ -40,8 +40,9 @@ static int profile_exceptions_notify(struct notifier_block *self,
 
         switch (val) {
         case DIE_NMI:
-                if (model->check_ctrs(args->regs, &per_cpu(cpu_msrs, cpu)))
-                        ret = NOTIFY_STOP;
+        case DIE_NMI_IPI:
+                model->check_ctrs(args->regs, &per_cpu(cpu_msrs, cpu));
+                ret = NOTIFY_STOP;
                 break;
         default:
                 break;
@@ -134,7 +135,7 @@ static void nmi_cpu_setup(void *dummy)
 static struct notifier_block profile_exceptions_nb = {
         .notifier_call = profile_exceptions_notify,
         .next = NULL,
-        .priority = 0
+        .priority = 2
 };
 
 static int nmi_setup(void)
@@ -356,14 +357,11 @@ static void exit_sysfs(void)
 #define exit_sysfs() do { } while (0)
 #endif /* CONFIG_PM */
 
-static int p4force;
-module_param(p4force, int, 0);
-
 static int __init p4_init(char **cpu_type)
 {
         __u8 cpu_model = boot_cpu_data.x86_model;
 
-        if (!p4force && (cpu_model > 6 || cpu_model == 5))
+        if (cpu_model > 6 || cpu_model == 5)
                 return 0;
 
 #ifndef CONFIG_SMP
@@ -389,10 +387,25 @@ static int __init p4_init(char **cpu_type)
         return 0;
 }
 
+static int force_arch_perfmon;
+static int force_cpu_type(const char *str, struct kernel_param *kp)
+{
+        if (!strcmp(str, "archperfmon")) {
+                force_arch_perfmon = 1;
+                printk(KERN_INFO "oprofile: forcing architectural perfmon\n");
+        }
+
+        return 0;
+}
+module_param_call(cpu_type, force_cpu_type, NULL, NULL, 0);
+
 static int __init ppro_init(char **cpu_type)
 {
         __u8 cpu_model = boot_cpu_data.x86_model;
 
+        if (force_arch_perfmon && cpu_has_arch_perfmon)
+                return 0;
+
         switch (cpu_model) {
         case 0 ... 2:
                 *cpu_type = "i386/ppro";
@@ -414,6 +427,13 @@ static int __init ppro_init(char **cpu_type)
         case 15: case 23:
                 *cpu_type = "i386/core_2";
                 break;
+        case 26:
+                arch_perfmon_setup_counters();
+                *cpu_type = "i386/core_i7";
+                break;
+        case 28:
+                *cpu_type = "i386/atom";
+                break;
         default:
                 /* Unknown */
                 return 0;
diff --git a/arch/x86/oprofile/op_model_ppro.c b/arch/x86/oprofile/op_model_ppro.c
index 10131fbdaada..4da7230b3d17 100644
--- a/arch/x86/oprofile/op_model_ppro.c
+++ b/arch/x86/oprofile/op_model_ppro.c
@@ -18,7 +18,7 @@
 #include <asm/msr.h>
 #include <asm/apic.h>
 #include <asm/nmi.h>
-#include <asm/intel_arch_perfmon.h>
+#include <asm/perf_counter.h>
 
 #include "op_x86_model.h"
 #include "op_counter.h"
@@ -136,6 +136,13 @@ static int ppro_check_ctrs(struct pt_regs * const regs,
         u64 val;
         int i;
 
+        /*
+         * This can happen if perf counters are in use when
+         * we steal the die notifier NMI.
+         */
+        if (unlikely(!reset_value))
+                goto out;
+
         for (i = 0 ; i < num_counters; ++i) {
                 if (!reset_value[i])
                         continue;
@@ -146,6 +153,7 @@ static int ppro_check_ctrs(struct pt_regs * const regs,
                 }
         }
 
+out:
         /* Only P6 based Pentium M need to re-unmask the apic vector but it
          * doesn't hurt other P6 variant */
         apic_write(APIC_LVTPC, apic_read(APIC_LVTPC) & ~APIC_LVT_MASKED);
diff --git a/arch/x86/pci/mmconfig-shared.c b/arch/x86/pci/mmconfig-shared.c
index 5fa10bb9604f..8766b0e216c5 100644
--- a/arch/x86/pci/mmconfig-shared.c
+++ b/arch/x86/pci/mmconfig-shared.c
@@ -375,7 +375,7 @@ static acpi_status __init check_mcfg_resource(struct acpi_resource *res,
                 if (!fixmem32)
                         return AE_OK;
                 if ((mcfg_res->start >= fixmem32->address) &&
-                    (mcfg_res->end <= (fixmem32->address +
+                    (mcfg_res->end < (fixmem32->address +
                                       fixmem32->address_length))) {
                         mcfg_res->flags = 1;
                         return AE_CTRL_TERMINATE;
@@ -392,7 +392,7 @@ static acpi_status __init check_mcfg_resource(struct acpi_resource *res,
                 return AE_OK;
 
         if ((mcfg_res->start >= address.minimum) &&
-            (mcfg_res->end <= (address.minimum + address.address_length))) {
+            (mcfg_res->end < (address.minimum + address.address_length))) {
                 mcfg_res->flags = 1;
                 return AE_CTRL_TERMINATE;
         }
@@ -418,7 +418,7 @@ static int __init is_acpi_reserved(u64 start, u64 end, unsigned not_used)
         struct resource mcfg_res;
 
         mcfg_res.start = start;
-        mcfg_res.end = end;
+        mcfg_res.end = end - 1;
         mcfg_res.flags = 0;
 
         acpi_get_devices("PNP0C01", find_mboard_resource, &mcfg_res, NULL);
diff --git a/arch/x86/vdso/vdso32-setup.c b/arch/x86/vdso/vdso32-setup.c
index 1241f118ab56..58bc00f68b12 100644
--- a/arch/x86/vdso/vdso32-setup.c
+++ b/arch/x86/vdso/vdso32-setup.c
@@ -338,6 +338,8 @@ int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
                 }
         }
 
+        current->mm->context.vdso = (void *)addr;
+
         if (compat_uses_vma || !compat) {
                 /*
                  * MAYWRITE to allow gdb to COW and set breakpoints
@@ -358,11 +360,13 @@ int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
                         goto up_fail;
         }
 
-        current->mm->context.vdso = (void *)addr;
         current_thread_info()->sysenter_return =
                 VDSO32_SYMBOL(addr, SYSENTER_RETURN);
 
   up_fail:
+        if (ret)
+                current->mm->context.vdso = NULL;
+
         up_write(&mm->mmap_sem);
 
         return ret;
diff --git a/arch/x86/vdso/vma.c b/arch/x86/vdso/vma.c
index 7133cdf9098b..21e1aeb9f3ea 100644
--- a/arch/x86/vdso/vma.c
+++ b/arch/x86/vdso/vma.c
@@ -8,6 +8,7 @@
 #include <linux/sched.h>
 #include <linux/init.h>
 #include <linux/random.h>
+#include <linux/elf.h>
 #include <asm/vsyscall.h>
 #include <asm/vgtod.h>
 #include <asm/proto.h>
@@ -115,15 +116,18 @@ int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
                 goto up_fail;
         }
 
+        current->mm->context.vdso = (void *)addr;
+
         ret = install_special_mapping(mm, addr, vdso_size,
                                       VM_READ|VM_EXEC|
                                       VM_MAYREAD|VM_MAYWRITE|VM_MAYEXEC|
                                       VM_ALWAYSDUMP,
                                       vdso_pages);
-        if (ret)
+        if (ret) {
+                current->mm->context.vdso = NULL;
                 goto up_fail;
+        }
 
-        current->mm->context.vdso = (void *)addr;
 up_fail:
         up_write(&mm->mmap_sem);
         return ret;
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index f09e8c36ee80..0a1700a2be9c 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -20,6 +20,7 @@
 #include <linux/delay.h>
 #include <linux/start_kernel.h>
 #include <linux/sched.h>
+#include <linux/kprobes.h>
 #include <linux/bootmem.h>
 #include <linux/module.h>
 #include <linux/mm.h>
@@ -44,6 +45,7 @@
 #include <asm/processor.h>
 #include <asm/proto.h>
 #include <asm/msr-index.h>
+#include <asm/traps.h>
 #include <asm/setup.h>
 #include <asm/desc.h>
 #include <asm/pgtable.h>
@@ -240,10 +242,10 @@ static unsigned long xen_get_debugreg(int reg)
         return HYPERVISOR_get_debugreg(reg);
 }
 
-void xen_leave_lazy(void)
+static void xen_end_context_switch(struct task_struct *next)
 {
-        paravirt_leave_lazy(paravirt_get_lazy_mode());
         xen_mc_flush();
+        paravirt_end_context_switch(next);
 }
 
 static unsigned long xen_store_tr(void)
@@ -428,11 +430,44 @@ static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum,
 static int cvt_gate_to_trap(int vector, const gate_desc *val,
                             struct trap_info *info)
 {
+        unsigned long addr;
+
         if (val->type != GATE_TRAP && val->type != GATE_INTERRUPT)
                 return 0;
 
         info->vector = vector;
-        info->address = gate_offset(*val);
+
+        addr = gate_offset(*val);
+#ifdef CONFIG_X86_64
+        /*
+         * Look for known traps using IST, and substitute them
+         * appropriately.  The debugger ones are the only ones we care
+         * about.  Xen will handle faults like double_fault and
+         * machine_check, so we should never see them.  Warn if
+         * there's an unexpected IST-using fault handler.
+         */
+        if (addr == (unsigned long)debug)
+                addr = (unsigned long)xen_debug;
+        else if (addr == (unsigned long)int3)
+                addr = (unsigned long)xen_int3;
+        else if (addr == (unsigned long)stack_segment)
+                addr = (unsigned long)xen_stack_segment;
+        else if (addr == (unsigned long)double_fault ||
+                 addr == (unsigned long)nmi) {
+                /* Don't need to handle these */
+                return 0;
+#ifdef CONFIG_X86_MCE
+        } else if (addr == (unsigned long)machine_check) {
+                return 0;
+#endif
+        } else {
+                /* Some other trap using IST? */
+                if (WARN_ON(val->ist != 0))
+                        return 0;
+        }
+#endif  /* CONFIG_X86_64 */
+        info->address = addr;
+
         info->cs = gate_segment(*val);
         info->flags = val->dpl;
         /* interrupt gates clear IF */
@@ -623,10 +658,26 @@ static void xen_clts(void)
         xen_mc_issue(PARAVIRT_LAZY_CPU);
 }
 
+static DEFINE_PER_CPU(unsigned long, xen_cr0_value);
+
+static unsigned long xen_read_cr0(void)
+{
+        unsigned long cr0 = percpu_read(xen_cr0_value);
+
+        if (unlikely(cr0 == 0)) {
+                cr0 = native_read_cr0();
+                percpu_write(xen_cr0_value, cr0);
+        }
+
+        return cr0;
+}
+
 static void xen_write_cr0(unsigned long cr0)
 {
         struct multicall_space mcs;
 
+        percpu_write(xen_cr0_value, cr0);
+
         /* Only pay attention to cr0.TS; everything else is
            ignored. */
         mcs = xen_mc_entry(0);
@@ -812,7 +863,7 @@ static const struct pv_cpu_ops xen_cpu_ops __initdata = {
 
         .clts = xen_clts,
 
-        .read_cr0 = native_read_cr0,
+        .read_cr0 = xen_read_cr0,
         .write_cr0 = xen_write_cr0,
 
         .read_cr4 = native_read_cr4,
@@ -860,10 +911,8 @@ static const struct pv_cpu_ops xen_cpu_ops __initdata = {
         /* Xen takes care of %gs when switching to usermode for us */
         .swapgs = paravirt_nop,
 
-        .lazy_mode = {
-                .enter = paravirt_enter_lazy_cpu,
-                .leave = xen_leave_lazy,
-        },
+        .start_context_switch = paravirt_start_context_switch,
+        .end_context_switch = xen_end_context_switch,
 };
 
 static const struct pv_apic_ops xen_apic_ops __initdata = {
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
index fba55b1a4021..4ceb28581652 100644
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -452,10 +452,6 @@ void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
 void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
                     pte_t *ptep, pte_t pteval)
 {
-        /* updates to init_mm may be done without lock */
-        if (mm == &init_mm)
-                preempt_disable();
-
         ADD_STATS(set_pte_at, 1);
 //      ADD_STATS(set_pte_at_pinned, xen_page_pinned(ptep));
         ADD_STATS(set_pte_at_current, mm == current->mm);
@@ -476,9 +472,7 @@ void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
         }
         xen_set_pte(ptep, pteval);
 
-out:
-        if (mm == &init_mm)
-                preempt_enable();
+out:    return;
 }
 
 pte_t xen_ptep_modify_prot_start(struct mm_struct *mm,
@@ -1152,10 +1146,8 @@ static void drop_other_mm_ref(void *info)
 
         /* If this cpu still has a stale cr3 reference, then make sure
            it has been flushed. */
-        if (percpu_read(xen_current_cr3) == __pa(mm->pgd)) {
+        if (percpu_read(xen_current_cr3) == __pa(mm->pgd))
                 load_cr3(swapper_pg_dir);
-                arch_flush_lazy_cpu_mode();
-        }
 }
 
 static void xen_drop_mm_ref(struct mm_struct *mm)
@@ -1168,7 +1160,6 @@ static void xen_drop_mm_ref(struct mm_struct *mm)
                         load_cr3(swapper_pg_dir);
                 else
                         leave_mm(smp_processor_id());
-                arch_flush_lazy_cpu_mode();
         }
 
         /* Get the "official" set of cpus referring to our pagetable. */
@@ -1876,6 +1867,14 @@ __init void xen_post_allocator_init(void)
         xen_mark_init_mm_pinned();
 }
 
+static void xen_leave_lazy_mmu(void)
+{
+        preempt_disable();
+        xen_mc_flush();
+        paravirt_leave_lazy_mmu();
+        preempt_enable();
+}
+
 const struct pv_mmu_ops xen_mmu_ops __initdata = {
         .pagetable_setup_start = xen_pagetable_setup_start,
         .pagetable_setup_done = xen_pagetable_setup_done,
@@ -1949,7 +1948,7 @@ const struct pv_mmu_ops xen_mmu_ops __initdata = {
 
         .lazy_mode = {
                 .enter = paravirt_enter_lazy_mmu,
-                .leave = xen_leave_lazy,
+                .leave = xen_leave_lazy_mmu,
         },
 
         .set_fixmap = xen_set_fixmap,
diff --git a/arch/x86/xen/setup.c b/arch/x86/xen/setup.c
index 15c6c68db6a2..ad0047f47cd4 100644
--- a/arch/x86/xen/setup.c
+++ b/arch/x86/xen/setup.c
@@ -61,9 +61,9 @@ char * __init xen_memory_setup(void)
          *  - xen_start_info
          * See comment above "struct start_info" in <xen/interface/xen.h>
          */
-        e820_add_region(__pa(xen_start_info->mfn_list),
-                        xen_start_info->pt_base - xen_start_info->mfn_list,
-                        E820_RESERVED);
+        reserve_early(__pa(xen_start_info->mfn_list),
+                      __pa(xen_start_info->pt_base),
+                        "XEN START INFO");
 
         sanitize_e820_map(e820.map, ARRAY_SIZE(e820.map), &e820.nr_map);
 
diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h
index ca6596b05d53..22494fd4c9b5 100644
--- a/arch/x86/xen/xen-ops.h
+++ b/arch/x86/xen/xen-ops.h
@@ -30,7 +30,6 @@ pgd_t *xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn);
 void xen_ident_map_ISA(void);
 void xen_reserve_top(void);
 
-void xen_leave_lazy(void);
 void xen_post_allocator_init(void);
 
 char * __init xen_memory_setup(void);