powerpc/86xx: Add new LAW & MCM device tree nodes for all 86xx systems

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

7 files changed, 91 insertions, 0 deletions

diff --git a/arch/powerpc/boot/dts/gef_ppc9a.dts b/arch/powerpc/boot/dts/gef_ppc9a.dts
index 53a7a6255909..38dd0052f6c9 100644
--- a/arch/powerpc/boot/dts/gef_ppc9a.dts
+++ b/arch/powerpc/boot/dts/gef_ppc9a.dts
@@ -167,6 +167,19 @@
                 reg = <0xfef00000 0x100000>;    // CCSRBAR 1M
                 bus-frequency = <33333333>;
 
+                mcm-law@0 {
+                        compatible = "fsl,mcm-law";
+                        reg = <0x0 0x1000>;
+                        fsl,num-laws = <10>;
+                };
+
+                mcm@1000 {
+                        compatible = "fsl,mpc8641-mcm", "fsl,mcm";
+                        reg = <0x1000 0x1000>;
+                        interrupts = <17 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
                 i2c1: i2c@3000 {
                         #address-cells = <1>;
                         #size-cells = <0>;
diff --git a/arch/powerpc/boot/dts/gef_sbc310.dts b/arch/powerpc/boot/dts/gef_sbc310.dts
index 1569117e5ddc..155776ceac25 100644
--- a/arch/powerpc/boot/dts/gef_sbc310.dts
+++ b/arch/powerpc/boot/dts/gef_sbc310.dts
@@ -166,6 +166,19 @@
                 reg = <0xfef00000 0x100000>;    // CCSRBAR 1M
                 bus-frequency = <33333333>;
 
+                mcm-law@0 {
+                        compatible = "fsl,mcm-law";
+                        reg = <0x0 0x1000>;
+                        fsl,num-laws = <10>;
+                };
+
+                mcm@1000 {
+                        compatible = "fsl,mpc8641-mcm", "fsl,mcm";
+                        reg = <0x1000 0x1000>;
+                        interrupts = <17 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
                 i2c1: i2c@3000 {
                         #address-cells = <1>;
                         #size-cells = <0>;
diff --git a/arch/powerpc/boot/dts/gef_sbc610.dts b/arch/powerpc/boot/dts/gef_sbc610.dts
index 6582dbd36da7..6898d7e87fba 100644
--- a/arch/powerpc/boot/dts/gef_sbc610.dts
+++ b/arch/powerpc/boot/dts/gef_sbc610.dts
@@ -131,6 +131,19 @@
                 reg = <0xfef00000 0x100000>;    // CCSRBAR 1M
                 bus-frequency = <33333333>;
 
+                mcm-law@0 {
+                        compatible = "fsl,mcm-law";
+                        reg = <0x0 0x1000>;
+                        fsl,num-laws = <10>;
+                };
+
+                mcm@1000 {
+                        compatible = "fsl,mpc8641-mcm", "fsl,mcm";
+                        reg = <0x1000 0x1000>;
+                        interrupts = <17 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
                 i2c1: i2c@3000 {
                         #address-cells = <1>;
                         #size-cells = <0>;
diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
index 4f081bb17320..252db6e4e031 100644
--- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts
+++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
@@ -115,6 +115,19 @@
                 reg = <0xe0000000 0x1000>;
                 bus-frequency = <0>;
 
+                mcm-law@0 {
+                        compatible = "fsl,mcm-law";
+                        reg = <0x0 0x1000>;
+                        fsl,num-laws = <10>;
+                };
+
+                mcm@1000 {
+                        compatible = "fsl,mpc8610-mcm", "fsl,mcm";
+                        reg = <0x1000 0x1000>;
+                        interrupts = <17 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
                 i2c@3000 {
                         #address-cells = <1>;
                         #size-cells = <0>;
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
index 51852e6e842a..8bcccd7b5d70 100644
--- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
@@ -117,6 +117,19 @@
                 reg = <0xffe00000 0x00001000>;  // CCSRBAR
                 bus-frequency = <0>;
 
+                mcm-law@0 {
+                        compatible = "fsl,mcm-law";
+                        reg = <0x0 0x1000>;
+                        fsl,num-laws = <10>;
+                };
+
+                mcm@1000 {
+                        compatible = "fsl,mpc8641-mcm", "fsl,mcm";
+                        reg = <0x1000 0x1000>;
+                        interrupts = <17 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
                 i2c@3000 {
                         #address-cells = <1>;
                         #size-cells = <0>;
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn_36b.dts b/arch/powerpc/boot/dts/mpc8641_hpcn_36b.dts
index b5dc94204d03..d4c909d1c00c 100644
--- a/arch/powerpc/boot/dts/mpc8641_hpcn_36b.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn_36b.dts
@@ -110,6 +110,19 @@
                 reg = <0x0f 0xffe00000 0x0 0x00001000>; // CCSRBAR
                 bus-frequency = <0>;
 
+                mcm-law@0 {
+                        compatible = "fsl,mcm-law";
+                        reg = <0x0 0x1000>;
+                        fsl,num-laws = <10>;
+                };
+
+                mcm@1000 {
+                        compatible = "fsl,mpc8641-mcm", "fsl,mcm";
+                        reg = <0x1000 0x1000>;
+                        interrupts = <17 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
                 i2c@3000 {
                         #address-cells = <1>;
                         #size-cells = <0>;
diff --git a/arch/powerpc/boot/dts/sbc8641d.dts b/arch/powerpc/boot/dts/sbc8641d.dts
index cfd5782226b3..aa8f931a0e9b 100644
--- a/arch/powerpc/boot/dts/sbc8641d.dts
+++ b/arch/powerpc/boot/dts/sbc8641d.dts
@@ -129,6 +129,19 @@
                 reg = <0xf8000000 0x00001000>;  // CCSRBAR
                 bus-frequency = <0>;
 
+                mcm-law@0 {
+                        compatible = "fsl,mcm-law";
+                        reg = <0x0 0x1000>;
+                        fsl,num-laws = <10>;
+                };
+
+                mcm@1000 {
+                        compatible = "fsl,mpc8641-mcm", "fsl,mcm";
+                        reg = <0x1000 0x1000>;
+                        interrupts = <17 2>;
+                        interrupt-parent = <&mpic>;
+                };
+
                 i2c@3000 {
                         #address-cells = <1>;
                         #size-cells = <0>;