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authorKumar Gala <galak@kernel.crashing.org>2008-07-31 09:41:10 -0400
committerKumar Gala <galak@kernel.crashing.org>2008-09-24 17:29:42 -0400
commit9a62c05180ff55fdaa517370c6f077402820406c (patch)
treeaa9f04bb2b681f639768ba9f1e61bba5c1493c69 /arch
parent9bf2b5cdc5fe5e3136ceeecc85141765023ded6e (diff)
powerpc/mm: Implement _PAGE_SPECIAL & pte_special() for 32-bit
Implement _PAGE_SPECIAL and pte_special() for 32-bit powerpc. This bit will be used by the fast get_user_pages() to differenciate PTEs that correspond to a valid struct page from special mappings that don't such as IO mappings obtained via io_remap_pfn_ranges(). We currently only implement this on sub-arch that support SMP or will so in the future (6xx, 44x, FSL-BookE) and not (8xx, 40x). Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/include/asm/pgtable-ppc32.h15
1 files changed, 13 insertions, 2 deletions
diff --git a/arch/powerpc/include/asm/pgtable-ppc32.h b/arch/powerpc/include/asm/pgtable-ppc32.h
index 1b1195555473..c2e58b41bc78 100644
--- a/arch/powerpc/include/asm/pgtable-ppc32.h
+++ b/arch/powerpc/include/asm/pgtable-ppc32.h
@@ -261,6 +261,7 @@ extern int icache_44x_need_flush;
261#define _PAGE_HWEXEC 0x00000004 /* H: Execute permission */ 261#define _PAGE_HWEXEC 0x00000004 /* H: Execute permission */
262#define _PAGE_ACCESSED 0x00000008 /* S: Page referenced */ 262#define _PAGE_ACCESSED 0x00000008 /* S: Page referenced */
263#define _PAGE_DIRTY 0x00000010 /* S: Page dirty */ 263#define _PAGE_DIRTY 0x00000010 /* S: Page dirty */
264#define _PAGE_SPECIAL 0x00000020 /* S: Special page */
264#define _PAGE_USER 0x00000040 /* S: User page */ 265#define _PAGE_USER 0x00000040 /* S: User page */
265#define _PAGE_ENDIAN 0x00000080 /* H: E bit */ 266#define _PAGE_ENDIAN 0x00000080 /* H: E bit */
266#define _PAGE_GUARDED 0x00000100 /* H: G bit */ 267#define _PAGE_GUARDED 0x00000100 /* H: G bit */
@@ -276,6 +277,7 @@ extern int icache_44x_need_flush;
276/* ERPN in a PTE never gets cleared, ignore it */ 277/* ERPN in a PTE never gets cleared, ignore it */
277#define _PTE_NONE_MASK 0xffffffff00000000ULL 278#define _PTE_NONE_MASK 0xffffffff00000000ULL
278 279
280#define __HAVE_ARCH_PTE_SPECIAL
279 281
280#elif defined(CONFIG_FSL_BOOKE) 282#elif defined(CONFIG_FSL_BOOKE)
281/* 283/*
@@ -305,6 +307,7 @@ extern int icache_44x_need_flush;
305#define _PAGE_COHERENT 0x00100 /* H: M bit */ 307#define _PAGE_COHERENT 0x00100 /* H: M bit */
306#define _PAGE_NO_CACHE 0x00200 /* H: I bit */ 308#define _PAGE_NO_CACHE 0x00200 /* H: I bit */
307#define _PAGE_WRITETHRU 0x00400 /* H: W bit */ 309#define _PAGE_WRITETHRU 0x00400 /* H: W bit */
310#define _PAGE_SPECIAL 0x00800 /* S: Special page */
308 311
309#ifdef CONFIG_PTE_64BIT 312#ifdef CONFIG_PTE_64BIT
310/* ERPN in a PTE never gets cleared, ignore it */ 313/* ERPN in a PTE never gets cleared, ignore it */
@@ -315,6 +318,8 @@ extern int icache_44x_need_flush;
315#define _PMD_PRESENT_MASK (PAGE_MASK) 318#define _PMD_PRESENT_MASK (PAGE_MASK)
316#define _PMD_BAD (~PAGE_MASK) 319#define _PMD_BAD (~PAGE_MASK)
317 320
321#define __HAVE_ARCH_PTE_SPECIAL
322
318#elif defined(CONFIG_8xx) 323#elif defined(CONFIG_8xx)
319/* Definitions for 8xx embedded chips. */ 324/* Definitions for 8xx embedded chips. */
320#define _PAGE_PRESENT 0x0001 /* Page is valid */ 325#define _PAGE_PRESENT 0x0001 /* Page is valid */
@@ -362,6 +367,7 @@ extern int icache_44x_need_flush;
362#define _PAGE_ACCESSED 0x100 /* R: page referenced */ 367#define _PAGE_ACCESSED 0x100 /* R: page referenced */
363#define _PAGE_EXEC 0x200 /* software: i-cache coherency required */ 368#define _PAGE_EXEC 0x200 /* software: i-cache coherency required */
364#define _PAGE_RW 0x400 /* software: user write access allowed */ 369#define _PAGE_RW 0x400 /* software: user write access allowed */
370#define _PAGE_SPECIAL 0x800 /* software: Special page */
365 371
366#define _PTE_NONE_MASK _PAGE_HASHPTE 372#define _PTE_NONE_MASK _PAGE_HASHPTE
367 373
@@ -372,6 +378,8 @@ extern int icache_44x_need_flush;
372/* Hash table based platforms need atomic updates of the linux PTE */ 378/* Hash table based platforms need atomic updates of the linux PTE */
373#define PTE_ATOMIC_UPDATES 1 379#define PTE_ATOMIC_UPDATES 1
374 380
381#define __HAVE_ARCH_PTE_SPECIAL
382
375#endif 383#endif
376 384
377/* 385/*
@@ -404,6 +412,9 @@ extern int icache_44x_need_flush;
404#ifndef _PAGE_WRITETHRU 412#ifndef _PAGE_WRITETHRU
405#define _PAGE_WRITETHRU 0 413#define _PAGE_WRITETHRU 0
406#endif 414#endif
415#ifndef _PAGE_SPECIAL
416#define _PAGE_SPECIAL 0
417#endif
407#ifndef _PMD_PRESENT_MASK 418#ifndef _PMD_PRESENT_MASK
408#define _PMD_PRESENT_MASK _PMD_PRESENT 419#define _PMD_PRESENT_MASK _PMD_PRESENT
409#endif 420#endif
@@ -534,7 +545,7 @@ static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW; }
534static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; } 545static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
535static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; } 546static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
536static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; } 547static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
537static inline int pte_special(pte_t pte) { return 0; } 548static inline int pte_special(pte_t pte) { return pte_val(pte) & _PAGE_SPECIAL; }
538 549
539static inline void pte_uncache(pte_t pte) { pte_val(pte) |= _PAGE_NO_CACHE; } 550static inline void pte_uncache(pte_t pte) { pte_val(pte) |= _PAGE_NO_CACHE; }
540static inline void pte_cache(pte_t pte) { pte_val(pte) &= ~_PAGE_NO_CACHE; } 551static inline void pte_cache(pte_t pte) { pte_val(pte) &= ~_PAGE_NO_CACHE; }
@@ -553,7 +564,7 @@ static inline pte_t pte_mkdirty(pte_t pte) {
553static inline pte_t pte_mkyoung(pte_t pte) { 564static inline pte_t pte_mkyoung(pte_t pte) {
554 pte_val(pte) |= _PAGE_ACCESSED; return pte; } 565 pte_val(pte) |= _PAGE_ACCESSED; return pte; }
555static inline pte_t pte_mkspecial(pte_t pte) { 566static inline pte_t pte_mkspecial(pte_t pte) {
556 return pte; } 567 pte_val(pte) |= _PAGE_SPECIAL; return pte; }
557static inline unsigned long pte_pgprot(pte_t pte) 568static inline unsigned long pte_pgprot(pte_t pte)
558{ 569{
559 return __pgprot(pte_val(pte)) & PAGE_PROT_BITS; 570 return __pgprot(pte_val(pte)) & PAGE_PROT_BITS;