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authorYoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>2006-10-02 10:19:00 -0400
committerRalf Baechle <ralf@linux-mips.org>2006-10-03 12:59:17 -0400
commitaf8b128719f5248e542036ea994610a29d0642a6 (patch)
tree1330f156553cba8bccc9132c6a64bf766ed9ca8e /arch
parent08dfcee84c5c747ca1cecbd04c3a7e65cc9ce26b (diff)
[MIPS] Remove IT8172-based platforms, ITE 8172G and Globespan IVR support.
As per feature-removal-schedule.txt. Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Acked-by: Alan Cox <alan@redhat.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/Kconfig47
-rw-r--r--arch/mips/Makefile13
-rw-r--r--arch/mips/configs/it8172_defconfig964
-rw-r--r--arch/mips/configs/ivr_defconfig920
-rw-r--r--arch/mips/ite-boards/Kconfig8
-rw-r--r--arch/mips/ite-boards/generic/Makefile15
-rw-r--r--arch/mips/ite-boards/generic/dbg_io.c124
-rw-r--r--arch/mips/ite-boards/generic/irq.c308
-rw-r--r--arch/mips/ite-boards/generic/it8172_cir.c170
-rw-r--r--arch/mips/ite-boards/generic/it8172_setup.c352
-rw-r--r--arch/mips/ite-boards/generic/lpc.c144
-rw-r--r--arch/mips/ite-boards/generic/pmon_prom.c135
-rw-r--r--arch/mips/ite-boards/generic/puts.c139
-rw-r--r--arch/mips/ite-boards/generic/reset.c60
-rw-r--r--arch/mips/ite-boards/generic/time.c249
-rw-r--r--arch/mips/ite-boards/ivr/Makefile10
-rw-r--r--arch/mips/ite-boards/ivr/README3
-rw-r--r--arch/mips/ite-boards/ivr/init.c81
-rw-r--r--arch/mips/ite-boards/qed-4n-s01b/Makefile10
-rw-r--r--arch/mips/ite-boards/qed-4n-s01b/README2
-rw-r--r--arch/mips/ite-boards/qed-4n-s01b/init.c82
-rw-r--r--arch/mips/pci/Makefile3
-rw-r--r--arch/mips/pci/fixup-ite8172g.c80
-rw-r--r--arch/mips/pci/fixup-ivr.c75
-rw-r--r--arch/mips/pci/ops-it8172.c213
25 files changed, 0 insertions, 4207 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 87cee341eb54..9fe90507e6c7 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -203,39 +203,6 @@ config MIPS_EV64120
203 <http://www.marvell.com/>. Say Y here if you wish to build a 203 <http://www.marvell.com/>. Say Y here if you wish to build a
204 kernel for this platform. 204 kernel for this platform.
205 205
206config MIPS_IVR
207 bool "Globespan IVR board"
208 select DMA_NONCOHERENT
209 select HW_HAS_PCI
210 select ITE_BOARD_GEN
211 select SYS_HAS_CPU_NEVADA
212 select SYS_SUPPORTS_32BIT_KERNEL
213 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
214 select SYS_SUPPORTS_LITTLE_ENDIAN
215 help
216 This is an evaluation board built by Globespan to showcase thir
217 iVR (Internet Video Recorder) design. It utilizes a QED RM5231
218 R5000 MIPS core. More information can be found out their website
219 located at <http://www.globespan.net/>. Say Y here if you wish to
220 build a kernel for this platform.
221
222config MIPS_ITE8172
223 bool "ITE 8172G board"
224 select DMA_NONCOHERENT
225 select HW_HAS_PCI
226 select ITE_BOARD_GEN
227 select SYS_HAS_CPU_R5432
228 select SYS_HAS_CPU_NEVADA
229 select SYS_SUPPORTS_32BIT_KERNEL
230 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
231 select SYS_SUPPORTS_LITTLE_ENDIAN
232 help
233 Ths is an evaluation board made by ITE <http://www.ite.com.tw/>
234 with ATX form factor that utilizes a MIPS R5000 to work with its
235 ITE8172G companion internet appliance chip. The MIPS core can be
236 either a NEC Vr5432 or QED RM5231. Say Y here if you wish to build
237 a kernel for this platform.
238
239config MACH_JAZZ 206config MACH_JAZZ
240 bool "Jazz family of machines" 207 bool "Jazz family of machines"
241 select ARC 208 select ARC
@@ -804,7 +771,6 @@ endchoice
804source "arch/mips/ddb5xxx/Kconfig" 771source "arch/mips/ddb5xxx/Kconfig"
805source "arch/mips/gt64120/ev64120/Kconfig" 772source "arch/mips/gt64120/ev64120/Kconfig"
806source "arch/mips/jazz/Kconfig" 773source "arch/mips/jazz/Kconfig"
807source "arch/mips/ite-boards/Kconfig"
808source "arch/mips/lasat/Kconfig" 774source "arch/mips/lasat/Kconfig"
809source "arch/mips/momentum/Kconfig" 775source "arch/mips/momentum/Kconfig"
810source "arch/mips/pmc-sierra/Kconfig" 776source "arch/mips/pmc-sierra/Kconfig"
@@ -964,9 +930,6 @@ config MIPS_RM9122
964config PCI_MARVELL 930config PCI_MARVELL
965 bool 931 bool
966 932
967config ITE_BOARD_GEN
968 bool
969
970config SOC_AU1000 933config SOC_AU1000
971 bool 934 bool
972 select SOC_AU1X00 935 select SOC_AU1X00
@@ -1050,16 +1013,6 @@ config AU1X00_USB_DEVICE
1050 depends on MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000 1013 depends on MIPS_PB1500 || MIPS_PB1100 || MIPS_PB1000
1051 default n 1014 default n
1052 1015
1053config IT8172_CIR
1054 bool
1055 depends on MIPS_ITE8172 || MIPS_IVR
1056 default y
1057
1058config IT8712
1059 bool
1060 depends on MIPS_ITE8172
1061 default y
1062
1063config BOOT_ELF32 1016config BOOT_ELF32
1064 bool 1017 bool
1065 1018
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index e521826b4234..2124350ab94d 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -287,19 +287,6 @@ cflags-$(CONFIG_WR_PPMC) += -Iinclude/asm-mips/mach-wrppmc
287load-$(CONFIG_WR_PPMC) += 0xffffffff80100000 287load-$(CONFIG_WR_PPMC) += 0xffffffff80100000
288 288
289# 289#
290# Globespan IVR eval board with QED 5231 CPU
291#
292core-$(CONFIG_ITE_BOARD_GEN) += arch/mips/ite-boards/generic/
293core-$(CONFIG_MIPS_IVR) += arch/mips/ite-boards/ivr/
294load-$(CONFIG_MIPS_IVR) += 0xffffffff80100000
295
296#
297# ITE 8172 eval board with QED 5231 CPU
298#
299core-$(CONFIG_MIPS_ITE8172) += arch/mips/ite-boards/qed-4n-s01b/
300load-$(CONFIG_MIPS_ITE8172) += 0xffffffff80100000
301
302#
303# For all MIPS, Inc. eval boards 290# For all MIPS, Inc. eval boards
304# 291#
305core-$(CONFIG_MIPS_BOARDS_GEN) += arch/mips/mips-boards/generic/ 292core-$(CONFIG_MIPS_BOARDS_GEN) += arch/mips/mips-boards/generic/
diff --git a/arch/mips/configs/it8172_defconfig b/arch/mips/configs/it8172_defconfig
deleted file mode 100644
index 18d20fb7d5f0..000000000000
--- a/arch/mips/configs/it8172_defconfig
+++ /dev/null
@@ -1,964 +0,0 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.18-rc1
4# Thu Jul 6 10:04:11 2006
5#
6CONFIG_MIPS=y
7
8#
9# Machine selection
10#
11# CONFIG_MIPS_MTX1 is not set
12# CONFIG_MIPS_BOSPORUS is not set
13# CONFIG_MIPS_PB1000 is not set
14# CONFIG_MIPS_PB1100 is not set
15# CONFIG_MIPS_PB1500 is not set
16# CONFIG_MIPS_PB1550 is not set
17# CONFIG_MIPS_PB1200 is not set
18# CONFIG_MIPS_DB1000 is not set
19# CONFIG_MIPS_DB1100 is not set
20# CONFIG_MIPS_DB1500 is not set
21# CONFIG_MIPS_DB1550 is not set
22# CONFIG_MIPS_DB1200 is not set
23# CONFIG_MIPS_MIRAGE is not set
24# CONFIG_BASLER_EXCITE is not set
25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set
28# CONFIG_MIPS_IVR is not set
29CONFIG_MIPS_ITE8172=y
30# CONFIG_MACH_JAZZ is not set
31# CONFIG_LASAT is not set
32# CONFIG_MIPS_ATLAS is not set
33# CONFIG_MIPS_MALTA is not set
34# CONFIG_MIPS_SEAD is not set
35# CONFIG_WR_PPMC is not set
36# CONFIG_MIPS_SIM is not set
37# CONFIG_MOMENCO_JAGUAR_ATX is not set
38# CONFIG_MOMENCO_OCELOT is not set
39# CONFIG_MOMENCO_OCELOT_3 is not set
40# CONFIG_MOMENCO_OCELOT_C is not set
41# CONFIG_MOMENCO_OCELOT_G is not set
42# CONFIG_MIPS_XXS1500 is not set
43# CONFIG_PNX8550_V2PCI is not set
44# CONFIG_PNX8550_JBS is not set
45# CONFIG_DDB5477 is not set
46# CONFIG_MACH_VR41XX is not set
47# CONFIG_PMC_YOSEMITE is not set
48# CONFIG_QEMU is not set
49# CONFIG_MARKEINS is not set
50# CONFIG_SGI_IP22 is not set
51# CONFIG_SGI_IP27 is not set
52# CONFIG_SGI_IP32 is not set
53# CONFIG_SIBYTE_BIGSUR is not set
54# CONFIG_SIBYTE_SWARM is not set
55# CONFIG_SIBYTE_SENTOSA is not set
56# CONFIG_SIBYTE_RHONE is not set
57# CONFIG_SIBYTE_CARMEL is not set
58# CONFIG_SIBYTE_PTSWARM is not set
59# CONFIG_SIBYTE_LITTLESUR is not set
60# CONFIG_SIBYTE_CRHINE is not set
61# CONFIG_SIBYTE_CRHONE is not set
62# CONFIG_SNI_RM200_PCI is not set
63# CONFIG_TOSHIBA_JMR3927 is not set
64# CONFIG_TOSHIBA_RBTX4927 is not set
65# CONFIG_TOSHIBA_RBTX4938 is not set
66# CONFIG_IT8172_REVC is not set
67CONFIG_RWSEM_GENERIC_SPINLOCK=y
68CONFIG_GENERIC_FIND_NEXT_BIT=y
69CONFIG_GENERIC_HWEIGHT=y
70CONFIG_GENERIC_CALIBRATE_DELAY=y
71CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
72CONFIG_DMA_NONCOHERENT=y
73CONFIG_DMA_NEED_PCI_MAP_STATE=y
74# CONFIG_CPU_BIG_ENDIAN is not set
75CONFIG_CPU_LITTLE_ENDIAN=y
76CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
77CONFIG_ITE_BOARD_GEN=y
78CONFIG_IT8172_CIR=y
79CONFIG_IT8712=y
80CONFIG_MIPS_L1_CACHE_SHIFT=5
81
82#
83# CPU selection
84#
85# CONFIG_CPU_MIPS32_R1 is not set
86# CONFIG_CPU_MIPS32_R2 is not set
87# CONFIG_CPU_MIPS64_R1 is not set
88# CONFIG_CPU_MIPS64_R2 is not set
89# CONFIG_CPU_R3000 is not set
90# CONFIG_CPU_TX39XX is not set
91# CONFIG_CPU_VR41XX is not set
92# CONFIG_CPU_R4300 is not set
93# CONFIG_CPU_R4X00 is not set
94# CONFIG_CPU_TX49XX is not set
95# CONFIG_CPU_R5000 is not set
96# CONFIG_CPU_R5432 is not set
97# CONFIG_CPU_R6000 is not set
98CONFIG_CPU_NEVADA=y
99# CONFIG_CPU_R8000 is not set
100# CONFIG_CPU_R10000 is not set
101# CONFIG_CPU_RM7000 is not set
102# CONFIG_CPU_RM9000 is not set
103# CONFIG_CPU_SB1 is not set
104CONFIG_SYS_HAS_CPU_R5432=y
105CONFIG_SYS_HAS_CPU_NEVADA=y
106CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
107CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
108CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
109CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
110
111#
112# Kernel type
113#
114CONFIG_32BIT=y
115# CONFIG_64BIT is not set
116CONFIG_PAGE_SIZE_4KB=y
117# CONFIG_PAGE_SIZE_8KB is not set
118# CONFIG_PAGE_SIZE_16KB is not set
119# CONFIG_PAGE_SIZE_64KB is not set
120CONFIG_MIPS_MT_DISABLED=y
121# CONFIG_MIPS_MT_SMTC is not set
122# CONFIG_MIPS_MT_SMP is not set
123# CONFIG_MIPS_VPE_LOADER is not set
124CONFIG_CPU_HAS_LLSC=y
125CONFIG_CPU_HAS_SYNC=y
126CONFIG_GENERIC_HARDIRQS=y
127CONFIG_GENERIC_IRQ_PROBE=y
128CONFIG_ARCH_FLATMEM_ENABLE=y
129CONFIG_SELECT_MEMORY_MODEL=y
130CONFIG_FLATMEM_MANUAL=y
131# CONFIG_DISCONTIGMEM_MANUAL is not set
132# CONFIG_SPARSEMEM_MANUAL is not set
133CONFIG_FLATMEM=y
134CONFIG_FLAT_NODE_MEM_MAP=y
135# CONFIG_SPARSEMEM_STATIC is not set
136CONFIG_SPLIT_PTLOCK_CPUS=4
137# CONFIG_RESOURCES_64BIT is not set
138# CONFIG_HZ_48 is not set
139# CONFIG_HZ_100 is not set
140# CONFIG_HZ_128 is not set
141# CONFIG_HZ_250 is not set
142# CONFIG_HZ_256 is not set
143CONFIG_HZ_1000=y
144# CONFIG_HZ_1024 is not set
145CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
146CONFIG_HZ=1000
147CONFIG_PREEMPT_NONE=y
148# CONFIG_PREEMPT_VOLUNTARY is not set
149# CONFIG_PREEMPT is not set
150CONFIG_LOCKDEP_SUPPORT=y
151CONFIG_STACKTRACE_SUPPORT=y
152CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
153
154#
155# Code maturity level options
156#
157CONFIG_EXPERIMENTAL=y
158CONFIG_BROKEN_ON_SMP=y
159CONFIG_INIT_ENV_ARG_LIMIT=32
160
161#
162# General setup
163#
164CONFIG_LOCALVERSION=""
165CONFIG_LOCALVERSION_AUTO=y
166CONFIG_SWAP=y
167CONFIG_SYSVIPC=y
168# CONFIG_POSIX_MQUEUE is not set
169CONFIG_BSD_PROCESS_ACCT=y
170# CONFIG_BSD_PROCESS_ACCT_V3 is not set
171CONFIG_SYSCTL=y
172# CONFIG_AUDIT is not set
173# CONFIG_IKCONFIG is not set
174CONFIG_RELAY=y
175CONFIG_INITRAMFS_SOURCE=""
176# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
177CONFIG_EMBEDDED=y
178CONFIG_KALLSYMS=y
179# CONFIG_KALLSYMS_EXTRA_PASS is not set
180# CONFIG_HOTPLUG is not set
181CONFIG_PRINTK=y
182CONFIG_BUG=y
183CONFIG_ELF_CORE=y
184CONFIG_BASE_FULL=y
185CONFIG_RT_MUTEXES=y
186CONFIG_FUTEX=y
187CONFIG_EPOLL=y
188CONFIG_SHMEM=y
189CONFIG_SLAB=y
190CONFIG_VM_EVENT_COUNTERS=y
191# CONFIG_TINY_SHMEM is not set
192CONFIG_BASE_SMALL=0
193# CONFIG_SLOB is not set
194
195#
196# Loadable module support
197#
198CONFIG_MODULES=y
199CONFIG_MODULE_UNLOAD=y
200# CONFIG_MODULE_FORCE_UNLOAD is not set
201CONFIG_MODVERSIONS=y
202CONFIG_MODULE_SRCVERSION_ALL=y
203CONFIG_KMOD=y
204
205#
206# Block layer
207#
208# CONFIG_LBD is not set
209# CONFIG_BLK_DEV_IO_TRACE is not set
210# CONFIG_LSF is not set
211
212#
213# IO Schedulers
214#
215CONFIG_IOSCHED_NOOP=y
216CONFIG_IOSCHED_AS=y
217CONFIG_IOSCHED_DEADLINE=y
218CONFIG_IOSCHED_CFQ=y
219CONFIG_DEFAULT_AS=y
220# CONFIG_DEFAULT_DEADLINE is not set
221# CONFIG_DEFAULT_CFQ is not set
222# CONFIG_DEFAULT_NOOP is not set
223CONFIG_DEFAULT_IOSCHED="anticipatory"
224
225#
226# Bus options (PCI, PCMCIA, EISA, ISA, TC)
227#
228CONFIG_HW_HAS_PCI=y
229# CONFIG_PCI is not set
230CONFIG_MMU=y
231
232#
233# PCCARD (PCMCIA/CardBus) support
234#
235# CONFIG_PCCARD is not set
236
237#
238# PCI Hotplug Support
239#
240
241#
242# Executable file formats
243#
244CONFIG_BINFMT_ELF=y
245# CONFIG_BINFMT_MISC is not set
246CONFIG_TRAD_SIGNALS=y
247
248#
249# Networking
250#
251CONFIG_NET=y
252
253#
254# Networking options
255#
256# CONFIG_NETDEBUG is not set
257CONFIG_PACKET=y
258CONFIG_PACKET_MMAP=y
259CONFIG_UNIX=y
260CONFIG_XFRM=y
261CONFIG_XFRM_USER=m
262CONFIG_NET_KEY=y
263CONFIG_INET=y
264# CONFIG_IP_MULTICAST is not set
265# CONFIG_IP_ADVANCED_ROUTER is not set
266CONFIG_IP_FIB_HASH=y
267CONFIG_IP_PNP=y
268# CONFIG_IP_PNP_DHCP is not set
269CONFIG_IP_PNP_BOOTP=y
270# CONFIG_IP_PNP_RARP is not set
271# CONFIG_NET_IPIP is not set
272# CONFIG_NET_IPGRE is not set
273# CONFIG_ARPD is not set
274# CONFIG_SYN_COOKIES is not set
275# CONFIG_INET_AH is not set
276# CONFIG_INET_ESP is not set
277# CONFIG_INET_IPCOMP is not set
278# CONFIG_INET_XFRM_TUNNEL is not set
279# CONFIG_INET_TUNNEL is not set
280CONFIG_INET_XFRM_MODE_TRANSPORT=m
281CONFIG_INET_XFRM_MODE_TUNNEL=m
282CONFIG_INET_DIAG=y
283CONFIG_INET_TCP_DIAG=y
284# CONFIG_TCP_CONG_ADVANCED is not set
285CONFIG_TCP_CONG_BIC=y
286# CONFIG_IPV6 is not set
287# CONFIG_INET6_XFRM_TUNNEL is not set
288# CONFIG_INET6_TUNNEL is not set
289CONFIG_NETWORK_SECMARK=y
290# CONFIG_NETFILTER is not set
291
292#
293# DCCP Configuration (EXPERIMENTAL)
294#
295# CONFIG_IP_DCCP is not set
296
297#
298# SCTP Configuration (EXPERIMENTAL)
299#
300# CONFIG_IP_SCTP is not set
301
302#
303# TIPC Configuration (EXPERIMENTAL)
304#
305# CONFIG_TIPC is not set
306# CONFIG_ATM is not set
307# CONFIG_BRIDGE is not set
308# CONFIG_VLAN_8021Q is not set
309# CONFIG_DECNET is not set
310# CONFIG_LLC2 is not set
311# CONFIG_IPX is not set
312# CONFIG_ATALK is not set
313# CONFIG_X25 is not set
314# CONFIG_LAPB is not set
315# CONFIG_NET_DIVERT is not set
316# CONFIG_ECONET is not set
317# CONFIG_WAN_ROUTER is not set
318
319#
320# QoS and/or fair queueing
321#
322# CONFIG_NET_SCHED is not set
323
324#
325# Network testing
326#
327# CONFIG_NET_PKTGEN is not set
328# CONFIG_HAMRADIO is not set
329# CONFIG_IRDA is not set
330# CONFIG_BT is not set
331CONFIG_IEEE80211=m
332# CONFIG_IEEE80211_DEBUG is not set
333CONFIG_IEEE80211_CRYPT_WEP=m
334CONFIG_IEEE80211_CRYPT_CCMP=m
335CONFIG_IEEE80211_SOFTMAC=m
336# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set
337CONFIG_WIRELESS_EXT=y
338
339#
340# Device Drivers
341#
342
343#
344# Generic Driver Options
345#
346CONFIG_STANDALONE=y
347CONFIG_PREVENT_FIRMWARE_BUILD=y
348# CONFIG_FW_LOADER is not set
349# CONFIG_SYS_HYPERVISOR is not set
350
351#
352# Connector - unified userspace <-> kernelspace linker
353#
354CONFIG_CONNECTOR=m
355
356#
357# Memory Technology Devices (MTD)
358#
359CONFIG_MTD=y
360# CONFIG_MTD_DEBUG is not set
361# CONFIG_MTD_CONCAT is not set
362# CONFIG_MTD_PARTITIONS is not set
363
364#
365# User Modules And Translation Layers
366#
367CONFIG_MTD_CHAR=y
368# CONFIG_MTD_BLOCK is not set
369# CONFIG_MTD_BLOCK_RO is not set
370# CONFIG_FTL is not set
371# CONFIG_NFTL is not set
372# CONFIG_INFTL is not set
373# CONFIG_RFD_FTL is not set
374
375#
376# RAM/ROM/Flash chip drivers
377#
378CONFIG_MTD_CFI=y
379# CONFIG_MTD_JEDECPROBE is not set
380CONFIG_MTD_GEN_PROBE=y
381# CONFIG_MTD_CFI_ADV_OPTIONS is not set
382CONFIG_MTD_MAP_BANK_WIDTH_1=y
383CONFIG_MTD_MAP_BANK_WIDTH_2=y
384CONFIG_MTD_MAP_BANK_WIDTH_4=y
385# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
386# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
387# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
388CONFIG_MTD_CFI_I1=y
389CONFIG_MTD_CFI_I2=y
390# CONFIG_MTD_CFI_I4 is not set
391# CONFIG_MTD_CFI_I8 is not set
392CONFIG_MTD_CFI_INTELEXT=y
393# CONFIG_MTD_CFI_AMDSTD is not set
394# CONFIG_MTD_CFI_STAA is not set
395CONFIG_MTD_CFI_UTIL=y
396# CONFIG_MTD_RAM is not set
397# CONFIG_MTD_ROM is not set
398# CONFIG_MTD_ABSENT is not set
399# CONFIG_MTD_OBSOLETE_CHIPS is not set
400
401#
402# Mapping drivers for chip access
403#
404# CONFIG_MTD_COMPLEX_MAPPINGS is not set
405CONFIG_MTD_PHYSMAP=y
406CONFIG_MTD_PHYSMAP_START=0x8000000
407CONFIG_MTD_PHYSMAP_LEN=0x2000000
408CONFIG_MTD_PHYSMAP_BANKWIDTH=2
409# CONFIG_MTD_PLATRAM is not set
410
411#
412# Self-contained MTD device drivers
413#
414# CONFIG_MTD_SLRAM is not set
415# CONFIG_MTD_PHRAM is not set
416# CONFIG_MTD_MTDRAM is not set
417# CONFIG_MTD_BLOCK2MTD is not set
418
419#
420# Disk-On-Chip Device Drivers
421#
422# CONFIG_MTD_DOC2000 is not set
423# CONFIG_MTD_DOC2001 is not set
424# CONFIG_MTD_DOC2001PLUS is not set
425
426#
427# NAND Flash Device Drivers
428#
429# CONFIG_MTD_NAND is not set
430
431#
432# OneNAND Flash Device Drivers
433#
434# CONFIG_MTD_ONENAND is not set
435
436#
437# Parallel port support
438#
439# CONFIG_PARPORT is not set
440
441#
442# Plug and Play support
443#
444
445#
446# Block devices
447#
448# CONFIG_BLK_DEV_COW_COMMON is not set
449CONFIG_BLK_DEV_LOOP=y
450# CONFIG_BLK_DEV_CRYPTOLOOP is not set
451# CONFIG_BLK_DEV_NBD is not set
452# CONFIG_BLK_DEV_RAM is not set
453# CONFIG_BLK_DEV_INITRD is not set
454CONFIG_CDROM_PKTCDVD=m
455CONFIG_CDROM_PKTCDVD_BUFFERS=8
456# CONFIG_CDROM_PKTCDVD_WCACHE is not set
457CONFIG_ATA_OVER_ETH=m
458
459#
460# ATA/ATAPI/MFM/RLL support
461#
462CONFIG_IDE=y
463CONFIG_BLK_DEV_IDE=y
464
465#
466# Please see Documentation/ide.txt for help/info on IDE drives
467#
468# CONFIG_BLK_DEV_IDE_SATA is not set
469CONFIG_BLK_DEV_IDEDISK=y
470# CONFIG_IDEDISK_MULTI_MODE is not set
471# CONFIG_BLK_DEV_IDECD is not set
472# CONFIG_BLK_DEV_IDETAPE is not set
473# CONFIG_BLK_DEV_IDEFLOPPY is not set
474# CONFIG_IDE_TASK_IOCTL is not set
475
476#
477# IDE chipset support/bugfixes
478#
479CONFIG_IDE_GENERIC=y
480# CONFIG_IDE_ARM is not set
481# CONFIG_BLK_DEV_IDEDMA is not set
482# CONFIG_IDEDMA_AUTO is not set
483# CONFIG_BLK_DEV_HD is not set
484
485#
486# SCSI device support
487#
488CONFIG_RAID_ATTRS=m
489# CONFIG_SCSI is not set
490
491#
492# Multi-device support (RAID and LVM)
493#
494# CONFIG_MD is not set
495
496#
497# Fusion MPT device support
498#
499# CONFIG_FUSION is not set
500
501#
502# IEEE 1394 (FireWire) support
503#
504
505#
506# I2O device support
507#
508
509#
510# Network device support
511#
512CONFIG_NETDEVICES=y
513# CONFIG_DUMMY is not set
514# CONFIG_BONDING is not set
515# CONFIG_EQUALIZER is not set
516# CONFIG_TUN is not set
517
518#
519# PHY device support
520#
521CONFIG_PHYLIB=m
522
523#
524# MII PHY device drivers
525#
526CONFIG_MARVELL_PHY=m
527CONFIG_DAVICOM_PHY=m
528CONFIG_QSEMI_PHY=m
529CONFIG_LXT_PHY=m
530CONFIG_CICADA_PHY=m
531CONFIG_VITESSE_PHY=m
532CONFIG_SMSC_PHY=m
533
534#
535# Ethernet (10 or 100Mbit)
536#
537CONFIG_NET_ETHERNET=y
538# CONFIG_MII is not set
539# CONFIG_DM9000 is not set
540
541#
542# Ethernet (1000 Mbit)
543#
544
545#
546# Ethernet (10000 Mbit)
547#
548
549#
550# Token Ring devices
551#
552
553#
554# Wireless LAN (non-hamradio)
555#
556# CONFIG_NET_RADIO is not set
557
558#
559# Wan interfaces
560#
561# CONFIG_WAN is not set
562# CONFIG_PPP is not set
563# CONFIG_SLIP is not set
564# CONFIG_SHAPER is not set
565# CONFIG_NETCONSOLE is not set
566# CONFIG_NETPOLL is not set
567# CONFIG_NET_POLL_CONTROLLER is not set
568
569#
570# ISDN subsystem
571#
572# CONFIG_ISDN is not set
573
574#
575# Telephony Support
576#
577# CONFIG_PHONE is not set
578
579#
580# Input device support
581#
582CONFIG_INPUT=y
583
584#
585# Userland interfaces
586#
587CONFIG_INPUT_MOUSEDEV=y
588CONFIG_INPUT_MOUSEDEV_PSAUX=y
589CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
590CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
591# CONFIG_INPUT_JOYDEV is not set
592# CONFIG_INPUT_TSDEV is not set
593# CONFIG_INPUT_EVDEV is not set
594# CONFIG_INPUT_EVBUG is not set
595
596#
597# Input Device Drivers
598#
599# CONFIG_INPUT_KEYBOARD is not set
600# CONFIG_INPUT_MOUSE is not set
601# CONFIG_INPUT_JOYSTICK is not set
602# CONFIG_INPUT_TOUCHSCREEN is not set
603# CONFIG_INPUT_MISC is not set
604
605#
606# Hardware I/O ports
607#
608CONFIG_SERIO=y
609# CONFIG_SERIO_I8042 is not set
610CONFIG_SERIO_SERPORT=y
611# CONFIG_SERIO_LIBPS2 is not set
612CONFIG_SERIO_RAW=m
613# CONFIG_GAMEPORT is not set
614
615#
616# Character devices
617#
618CONFIG_VT=y
619CONFIG_VT_CONSOLE=y
620CONFIG_HW_CONSOLE=y
621CONFIG_VT_HW_CONSOLE_BINDING=y
622# CONFIG_SERIAL_NONSTANDARD is not set
623# CONFIG_QTRONIX_KEYBOARD is not set
624# CONFIG_IT8172_SCR0 is not set
625# CONFIG_IT8172_SCR1 is not set
626# CONFIG_ITE_GPIO is not set
627
628#
629# Serial drivers
630#
631CONFIG_SERIAL_8250=y
632CONFIG_SERIAL_8250_CONSOLE=y
633CONFIG_SERIAL_8250_NR_UARTS=4
634CONFIG_SERIAL_8250_RUNTIME_UARTS=4
635# CONFIG_SERIAL_8250_EXTENDED is not set
636
637#
638# Non-8250 serial port support
639#
640CONFIG_SERIAL_CORE=y
641CONFIG_SERIAL_CORE_CONSOLE=y
642CONFIG_UNIX98_PTYS=y
643CONFIG_LEGACY_PTYS=y
644CONFIG_LEGACY_PTY_COUNT=256
645
646#
647# IPMI
648#
649# CONFIG_IPMI_HANDLER is not set
650
651#
652# Watchdog Cards
653#
654# CONFIG_WATCHDOG is not set
655# CONFIG_HW_RANDOM is not set
656# CONFIG_RTC is not set
657# CONFIG_GEN_RTC is not set
658# CONFIG_DTLK is not set
659# CONFIG_R3964 is not set
660
661#
662# Ftape, the floppy tape device driver
663#
664# CONFIG_RAW_DRIVER is not set
665
666#
667# TPM devices
668#
669# CONFIG_TCG_TPM is not set
670# CONFIG_TELCLOCK is not set
671
672#
673# I2C support
674#
675# CONFIG_I2C is not set
676
677#
678# SPI support
679#
680# CONFIG_SPI is not set
681# CONFIG_SPI_MASTER is not set
682
683#
684# Dallas's 1-wire bus
685#
686# CONFIG_W1 is not set
687
688#
689# Hardware Monitoring support
690#
691# CONFIG_HWMON is not set
692# CONFIG_HWMON_VID is not set
693
694#
695# Misc devices
696#
697
698#
699# Multimedia devices
700#
701# CONFIG_VIDEO_DEV is not set
702CONFIG_VIDEO_V4L2=y
703
704#
705# Digital Video Broadcasting Devices
706#
707# CONFIG_DVB is not set
708
709#
710# Graphics support
711#
712# CONFIG_FIRMWARE_EDID is not set
713# CONFIG_FB is not set
714
715#
716# Console display driver support
717#
718# CONFIG_VGA_CONSOLE is not set
719CONFIG_DUMMY_CONSOLE=y
720
721#
722# Sound
723#
724CONFIG_SOUND=y
725
726#
727# Advanced Linux Sound Architecture
728#
729# CONFIG_SND is not set
730
731#
732# Open Sound System
733#
734CONFIG_SOUND_PRIME=y
735CONFIG_SOUND_IT8172=y
736# CONFIG_SOUND_MSNDCLAS is not set
737# CONFIG_SOUND_MSNDPIN is not set
738
739#
740# USB support
741#
742# CONFIG_USB_ARCH_HAS_HCD is not set
743# CONFIG_USB_ARCH_HAS_OHCI is not set
744# CONFIG_USB_ARCH_HAS_EHCI is not set
745
746#
747# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
748#
749
750#
751# USB Gadget Support
752#
753# CONFIG_USB_GADGET is not set
754
755#
756# MMC/SD Card support
757#
758# CONFIG_MMC is not set
759
760#
761# LED devices
762#
763# CONFIG_NEW_LEDS is not set
764
765#
766# LED drivers
767#
768
769#
770# LED Triggers
771#
772
773#
774# InfiniBand support
775#
776
777#
778# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
779#
780
781#
782# Real Time Clock
783#
784# CONFIG_RTC_CLASS is not set
785
786#
787# DMA Engine support
788#
789# CONFIG_DMA_ENGINE is not set
790
791#
792# DMA Clients
793#
794
795#
796# DMA Devices
797#
798
799#
800# File systems
801#
802CONFIG_EXT2_FS=y
803# CONFIG_EXT2_FS_XATTR is not set
804# CONFIG_EXT2_FS_XIP is not set
805# CONFIG_EXT3_FS is not set
806# CONFIG_REISERFS_FS is not set
807# CONFIG_JFS_FS is not set
808# CONFIG_FS_POSIX_ACL is not set
809# CONFIG_XFS_FS is not set
810# CONFIG_OCFS2_FS is not set
811# CONFIG_MINIX_FS is not set
812# CONFIG_ROMFS_FS is not set
813CONFIG_INOTIFY=y
814CONFIG_INOTIFY_USER=y
815# CONFIG_QUOTA is not set
816CONFIG_DNOTIFY=y
817# CONFIG_AUTOFS_FS is not set
818# CONFIG_AUTOFS4_FS is not set
819CONFIG_FUSE_FS=m
820
821#
822# CD-ROM/DVD Filesystems
823#
824# CONFIG_ISO9660_FS is not set
825# CONFIG_UDF_FS is not set
826
827#
828# DOS/FAT/NT Filesystems
829#
830# CONFIG_MSDOS_FS is not set
831# CONFIG_VFAT_FS is not set
832# CONFIG_NTFS_FS is not set
833
834#
835# Pseudo filesystems
836#
837CONFIG_PROC_FS=y
838CONFIG_PROC_KCORE=y
839CONFIG_SYSFS=y
840# CONFIG_TMPFS is not set
841# CONFIG_HUGETLB_PAGE is not set
842CONFIG_RAMFS=y
843# CONFIG_CONFIGFS_FS is not set
844
845#
846# Miscellaneous filesystems
847#
848# CONFIG_ADFS_FS is not set
849# CONFIG_AFFS_FS is not set
850# CONFIG_HFS_FS is not set
851# CONFIG_HFSPLUS_FS is not set
852# CONFIG_BEFS_FS is not set
853# CONFIG_BFS_FS is not set
854# CONFIG_EFS_FS is not set
855# CONFIG_JFFS_FS is not set
856# CONFIG_JFFS2_FS is not set
857# CONFIG_CRAMFS is not set
858# CONFIG_VXFS_FS is not set
859# CONFIG_HPFS_FS is not set
860# CONFIG_QNX4FS_FS is not set
861# CONFIG_SYSV_FS is not set
862# CONFIG_UFS_FS is not set
863
864#
865# Network File Systems
866#
867CONFIG_NFS_FS=y
868# CONFIG_NFS_V3 is not set
869# CONFIG_NFS_V4 is not set
870# CONFIG_NFS_DIRECTIO is not set
871# CONFIG_NFSD is not set
872CONFIG_ROOT_NFS=y
873CONFIG_LOCKD=y
874CONFIG_NFS_COMMON=y
875CONFIG_SUNRPC=y
876# CONFIG_RPCSEC_GSS_KRB5 is not set
877# CONFIG_RPCSEC_GSS_SPKM3 is not set
878# CONFIG_SMB_FS is not set
879# CONFIG_CIFS is not set
880# CONFIG_CIFS_DEBUG2 is not set
881# CONFIG_NCP_FS is not set
882# CONFIG_CODA_FS is not set
883# CONFIG_AFS_FS is not set
884# CONFIG_9P_FS is not set
885
886#
887# Partition Types
888#
889# CONFIG_PARTITION_ADVANCED is not set
890CONFIG_MSDOS_PARTITION=y
891
892#
893# Native Language Support
894#
895# CONFIG_NLS is not set
896
897#
898# Profiling support
899#
900# CONFIG_PROFILING is not set
901
902#
903# Kernel hacking
904#
905CONFIG_TRACE_IRQFLAGS_SUPPORT=y
906# CONFIG_PRINTK_TIME is not set
907# CONFIG_MAGIC_SYSRQ is not set
908# CONFIG_UNUSED_SYMBOLS is not set
909# CONFIG_DEBUG_KERNEL is not set
910CONFIG_LOG_BUF_SHIFT=14
911# CONFIG_DEBUG_FS is not set
912CONFIG_CROSSCOMPILE=y
913CONFIG_CMDLINE=""
914
915#
916# Security options
917#
918CONFIG_KEYS=y
919CONFIG_KEYS_DEBUG_PROC_KEYS=y
920# CONFIG_SECURITY is not set
921
922#
923# Cryptographic options
924#
925CONFIG_CRYPTO=y
926CONFIG_CRYPTO_HMAC=y
927CONFIG_CRYPTO_NULL=m
928CONFIG_CRYPTO_MD4=m
929CONFIG_CRYPTO_MD5=m
930CONFIG_CRYPTO_SHA1=m
931CONFIG_CRYPTO_SHA256=m
932CONFIG_CRYPTO_SHA512=m
933CONFIG_CRYPTO_WP512=m
934CONFIG_CRYPTO_TGR192=m
935CONFIG_CRYPTO_DES=m
936CONFIG_CRYPTO_BLOWFISH=m
937CONFIG_CRYPTO_TWOFISH=m
938CONFIG_CRYPTO_SERPENT=m
939CONFIG_CRYPTO_AES=m
940CONFIG_CRYPTO_CAST5=m
941CONFIG_CRYPTO_CAST6=m
942CONFIG_CRYPTO_TEA=m
943CONFIG_CRYPTO_ARC4=m
944CONFIG_CRYPTO_KHAZAD=m
945CONFIG_CRYPTO_ANUBIS=m
946CONFIG_CRYPTO_DEFLATE=m
947CONFIG_CRYPTO_MICHAEL_MIC=m
948CONFIG_CRYPTO_CRC32C=m
949# CONFIG_CRYPTO_TEST is not set
950
951#
952# Hardware crypto devices
953#
954
955#
956# Library routines
957#
958# CONFIG_CRC_CCITT is not set
959CONFIG_CRC16=m
960CONFIG_CRC32=m
961CONFIG_LIBCRC32C=m
962CONFIG_ZLIB_INFLATE=m
963CONFIG_ZLIB_DEFLATE=m
964CONFIG_PLIST=y
diff --git a/arch/mips/configs/ivr_defconfig b/arch/mips/configs/ivr_defconfig
deleted file mode 100644
index 99831d0bf76b..000000000000
--- a/arch/mips/configs/ivr_defconfig
+++ /dev/null
@@ -1,920 +0,0 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.18-rc1
4# Thu Jul 6 10:04:12 2006
5#
6CONFIG_MIPS=y
7
8#
9# Machine selection
10#
11# CONFIG_MIPS_MTX1 is not set
12# CONFIG_MIPS_BOSPORUS is not set
13# CONFIG_MIPS_PB1000 is not set
14# CONFIG_MIPS_PB1100 is not set
15# CONFIG_MIPS_PB1500 is not set
16# CONFIG_MIPS_PB1550 is not set
17# CONFIG_MIPS_PB1200 is not set
18# CONFIG_MIPS_DB1000 is not set
19# CONFIG_MIPS_DB1100 is not set
20# CONFIG_MIPS_DB1500 is not set
21# CONFIG_MIPS_DB1550 is not set
22# CONFIG_MIPS_DB1200 is not set
23# CONFIG_MIPS_MIRAGE is not set
24# CONFIG_BASLER_EXCITE is not set
25# CONFIG_MIPS_COBALT is not set
26# CONFIG_MACH_DECSTATION is not set
27# CONFIG_MIPS_EV64120 is not set
28CONFIG_MIPS_IVR=y
29# CONFIG_MIPS_ITE8172 is not set
30# CONFIG_MACH_JAZZ is not set
31# CONFIG_LASAT is not set
32# CONFIG_MIPS_ATLAS is not set
33# CONFIG_MIPS_MALTA is not set
34# CONFIG_MIPS_SEAD is not set
35# CONFIG_WR_PPMC is not set
36# CONFIG_MIPS_SIM is not set
37# CONFIG_MOMENCO_JAGUAR_ATX is not set
38# CONFIG_MOMENCO_OCELOT is not set
39# CONFIG_MOMENCO_OCELOT_3 is not set
40# CONFIG_MOMENCO_OCELOT_C is not set
41# CONFIG_MOMENCO_OCELOT_G is not set
42# CONFIG_MIPS_XXS1500 is not set
43# CONFIG_PNX8550_V2PCI is not set
44# CONFIG_PNX8550_JBS is not set
45# CONFIG_DDB5477 is not set
46# CONFIG_MACH_VR41XX is not set
47# CONFIG_PMC_YOSEMITE is not set
48# CONFIG_QEMU is not set
49# CONFIG_MARKEINS is not set
50# CONFIG_SGI_IP22 is not set
51# CONFIG_SGI_IP27 is not set
52# CONFIG_SGI_IP32 is not set
53# CONFIG_SIBYTE_BIGSUR is not set
54# CONFIG_SIBYTE_SWARM is not set
55# CONFIG_SIBYTE_SENTOSA is not set
56# CONFIG_SIBYTE_RHONE is not set
57# CONFIG_SIBYTE_CARMEL is not set
58# CONFIG_SIBYTE_PTSWARM is not set
59# CONFIG_SIBYTE_LITTLESUR is not set
60# CONFIG_SIBYTE_CRHINE is not set
61# CONFIG_SIBYTE_CRHONE is not set
62# CONFIG_SNI_RM200_PCI is not set
63# CONFIG_TOSHIBA_JMR3927 is not set
64# CONFIG_TOSHIBA_RBTX4927 is not set
65# CONFIG_TOSHIBA_RBTX4938 is not set
66CONFIG_RWSEM_GENERIC_SPINLOCK=y
67CONFIG_GENERIC_FIND_NEXT_BIT=y
68CONFIG_GENERIC_HWEIGHT=y
69CONFIG_GENERIC_CALIBRATE_DELAY=y
70CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
71CONFIG_DMA_NONCOHERENT=y
72CONFIG_DMA_NEED_PCI_MAP_STATE=y
73# CONFIG_CPU_BIG_ENDIAN is not set
74CONFIG_CPU_LITTLE_ENDIAN=y
75CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
76CONFIG_ITE_BOARD_GEN=y
77CONFIG_IT8172_CIR=y
78CONFIG_MIPS_L1_CACHE_SHIFT=5
79
80#
81# CPU selection
82#
83# CONFIG_CPU_MIPS32_R1 is not set
84# CONFIG_CPU_MIPS32_R2 is not set
85# CONFIG_CPU_MIPS64_R1 is not set
86# CONFIG_CPU_MIPS64_R2 is not set
87# CONFIG_CPU_R3000 is not set
88# CONFIG_CPU_TX39XX is not set
89# CONFIG_CPU_VR41XX is not set
90# CONFIG_CPU_R4300 is not set
91# CONFIG_CPU_R4X00 is not set
92# CONFIG_CPU_TX49XX is not set
93# CONFIG_CPU_R5000 is not set
94# CONFIG_CPU_R5432 is not set
95# CONFIG_CPU_R6000 is not set
96CONFIG_CPU_NEVADA=y
97# CONFIG_CPU_R8000 is not set
98# CONFIG_CPU_R10000 is not set
99# CONFIG_CPU_RM7000 is not set
100# CONFIG_CPU_RM9000 is not set
101# CONFIG_CPU_SB1 is not set
102CONFIG_SYS_HAS_CPU_NEVADA=y
103CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
104CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
105CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
106CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
107
108#
109# Kernel type
110#
111CONFIG_32BIT=y
112# CONFIG_64BIT is not set
113CONFIG_PAGE_SIZE_4KB=y
114# CONFIG_PAGE_SIZE_8KB is not set
115# CONFIG_PAGE_SIZE_16KB is not set
116# CONFIG_PAGE_SIZE_64KB is not set
117CONFIG_MIPS_MT_DISABLED=y
118# CONFIG_MIPS_MT_SMTC is not set
119# CONFIG_MIPS_MT_SMP is not set
120# CONFIG_MIPS_VPE_LOADER is not set
121CONFIG_CPU_HAS_LLSC=y
122CONFIG_CPU_HAS_SYNC=y
123CONFIG_GENERIC_HARDIRQS=y
124CONFIG_GENERIC_IRQ_PROBE=y
125CONFIG_ARCH_FLATMEM_ENABLE=y
126CONFIG_SELECT_MEMORY_MODEL=y
127CONFIG_FLATMEM_MANUAL=y
128# CONFIG_DISCONTIGMEM_MANUAL is not set
129# CONFIG_SPARSEMEM_MANUAL is not set
130CONFIG_FLATMEM=y
131CONFIG_FLAT_NODE_MEM_MAP=y
132# CONFIG_SPARSEMEM_STATIC is not set
133CONFIG_SPLIT_PTLOCK_CPUS=4
134# CONFIG_RESOURCES_64BIT is not set
135# CONFIG_HZ_48 is not set
136# CONFIG_HZ_100 is not set
137# CONFIG_HZ_128 is not set
138# CONFIG_HZ_250 is not set
139# CONFIG_HZ_256 is not set
140CONFIG_HZ_1000=y
141# CONFIG_HZ_1024 is not set
142CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
143CONFIG_HZ=1000
144CONFIG_PREEMPT_NONE=y
145# CONFIG_PREEMPT_VOLUNTARY is not set
146# CONFIG_PREEMPT is not set
147CONFIG_LOCKDEP_SUPPORT=y
148CONFIG_STACKTRACE_SUPPORT=y
149CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
150
151#
152# Code maturity level options
153#
154CONFIG_EXPERIMENTAL=y
155CONFIG_BROKEN_ON_SMP=y
156CONFIG_INIT_ENV_ARG_LIMIT=32
157
158#
159# General setup
160#
161CONFIG_LOCALVERSION=""
162CONFIG_LOCALVERSION_AUTO=y
163CONFIG_SWAP=y
164CONFIG_SYSVIPC=y
165# CONFIG_POSIX_MQUEUE is not set
166CONFIG_BSD_PROCESS_ACCT=y
167# CONFIG_BSD_PROCESS_ACCT_V3 is not set
168CONFIG_SYSCTL=y
169# CONFIG_AUDIT is not set
170# CONFIG_IKCONFIG is not set
171CONFIG_RELAY=y
172CONFIG_INITRAMFS_SOURCE=""
173# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
174CONFIG_EMBEDDED=y
175CONFIG_KALLSYMS=y
176# CONFIG_KALLSYMS_EXTRA_PASS is not set
177CONFIG_HOTPLUG=y
178CONFIG_PRINTK=y
179CONFIG_BUG=y
180CONFIG_ELF_CORE=y
181CONFIG_BASE_FULL=y
182CONFIG_RT_MUTEXES=y
183CONFIG_FUTEX=y
184CONFIG_EPOLL=y
185CONFIG_SHMEM=y
186CONFIG_SLAB=y
187CONFIG_VM_EVENT_COUNTERS=y
188# CONFIG_TINY_SHMEM is not set
189CONFIG_BASE_SMALL=0
190# CONFIG_SLOB is not set
191
192#
193# Loadable module support
194#
195CONFIG_MODULES=y
196CONFIG_MODULE_UNLOAD=y
197# CONFIG_MODULE_FORCE_UNLOAD is not set
198CONFIG_MODVERSIONS=y
199CONFIG_MODULE_SRCVERSION_ALL=y
200CONFIG_KMOD=y
201
202#
203# Block layer
204#
205# CONFIG_LBD is not set
206# CONFIG_BLK_DEV_IO_TRACE is not set
207# CONFIG_LSF is not set
208
209#
210# IO Schedulers
211#
212CONFIG_IOSCHED_NOOP=y
213CONFIG_IOSCHED_AS=y
214CONFIG_IOSCHED_DEADLINE=y
215CONFIG_IOSCHED_CFQ=y
216CONFIG_DEFAULT_AS=y
217# CONFIG_DEFAULT_DEADLINE is not set
218# CONFIG_DEFAULT_CFQ is not set
219# CONFIG_DEFAULT_NOOP is not set
220CONFIG_DEFAULT_IOSCHED="anticipatory"
221
222#
223# Bus options (PCI, PCMCIA, EISA, ISA, TC)
224#
225CONFIG_HW_HAS_PCI=y
226CONFIG_PCI=y
227CONFIG_MMU=y
228
229#
230# PCCARD (PCMCIA/CardBus) support
231#
232# CONFIG_PCCARD is not set
233
234#
235# PCI Hotplug Support
236#
237# CONFIG_HOTPLUG_PCI is not set
238
239#
240# Executable file formats
241#
242CONFIG_BINFMT_ELF=y
243# CONFIG_BINFMT_MISC is not set
244CONFIG_TRAD_SIGNALS=y
245
246#
247# Networking
248#
249CONFIG_NET=y
250
251#
252# Networking options
253#
254# CONFIG_NETDEBUG is not set
255CONFIG_PACKET=y
256CONFIG_PACKET_MMAP=y
257CONFIG_UNIX=y
258CONFIG_XFRM=y
259CONFIG_XFRM_USER=m
260CONFIG_NET_KEY=y
261CONFIG_INET=y
262# CONFIG_IP_MULTICAST is not set
263# CONFIG_IP_ADVANCED_ROUTER is not set
264CONFIG_IP_FIB_HASH=y
265CONFIG_IP_PNP=y
266# CONFIG_IP_PNP_DHCP is not set
267CONFIG_IP_PNP_BOOTP=y
268# CONFIG_IP_PNP_RARP is not set
269# CONFIG_NET_IPIP is not set
270# CONFIG_NET_IPGRE is not set
271# CONFIG_ARPD is not set
272# CONFIG_SYN_COOKIES is not set
273# CONFIG_INET_AH is not set
274# CONFIG_INET_ESP is not set
275# CONFIG_INET_IPCOMP is not set
276# CONFIG_INET_XFRM_TUNNEL is not set
277# CONFIG_INET_TUNNEL is not set
278CONFIG_INET_XFRM_MODE_TRANSPORT=m
279CONFIG_INET_XFRM_MODE_TUNNEL=m
280CONFIG_INET_DIAG=y
281CONFIG_INET_TCP_DIAG=y
282# CONFIG_TCP_CONG_ADVANCED is not set
283CONFIG_TCP_CONG_BIC=y
284# CONFIG_IPV6 is not set
285# CONFIG_INET6_XFRM_TUNNEL is not set
286# CONFIG_INET6_TUNNEL is not set
287CONFIG_NETWORK_SECMARK=y
288# CONFIG_NETFILTER is not set
289
290#
291# DCCP Configuration (EXPERIMENTAL)
292#
293# CONFIG_IP_DCCP is not set
294
295#
296# SCTP Configuration (EXPERIMENTAL)
297#
298# CONFIG_IP_SCTP is not set
299
300#
301# TIPC Configuration (EXPERIMENTAL)
302#
303# CONFIG_TIPC is not set
304# CONFIG_ATM is not set
305# CONFIG_BRIDGE is not set
306# CONFIG_VLAN_8021Q is not set
307# CONFIG_DECNET is not set
308# CONFIG_LLC2 is not set
309# CONFIG_IPX is not set
310# CONFIG_ATALK is not set
311# CONFIG_X25 is not set
312# CONFIG_LAPB is not set
313# CONFIG_NET_DIVERT is not set
314# CONFIG_ECONET is not set
315# CONFIG_WAN_ROUTER is not set
316
317#
318# QoS and/or fair queueing
319#
320# CONFIG_NET_SCHED is not set
321
322#
323# Network testing
324#
325# CONFIG_NET_PKTGEN is not set
326# CONFIG_HAMRADIO is not set
327# CONFIG_IRDA is not set
328# CONFIG_BT is not set
329CONFIG_IEEE80211=m
330# CONFIG_IEEE80211_DEBUG is not set
331CONFIG_IEEE80211_CRYPT_WEP=m
332CONFIG_IEEE80211_CRYPT_CCMP=m
333CONFIG_IEEE80211_SOFTMAC=m
334# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set
335CONFIG_WIRELESS_EXT=y
336
337#
338# Device Drivers
339#
340
341#
342# Generic Driver Options
343#
344CONFIG_STANDALONE=y
345CONFIG_PREVENT_FIRMWARE_BUILD=y
346CONFIG_FW_LOADER=m
347# CONFIG_SYS_HYPERVISOR is not set
348
349#
350# Connector - unified userspace <-> kernelspace linker
351#
352CONFIG_CONNECTOR=m
353
354#
355# Memory Technology Devices (MTD)
356#
357# CONFIG_MTD is not set
358
359#
360# Parallel port support
361#
362# CONFIG_PARPORT is not set
363
364#
365# Plug and Play support
366#
367
368#
369# Block devices
370#
371# CONFIG_BLK_CPQ_DA is not set
372# CONFIG_BLK_CPQ_CISS_DA is not set
373# CONFIG_BLK_DEV_DAC960 is not set
374# CONFIG_BLK_DEV_UMEM is not set
375# CONFIG_BLK_DEV_COW_COMMON is not set
376# CONFIG_BLK_DEV_LOOP is not set
377# CONFIG_BLK_DEV_NBD is not set
378# CONFIG_BLK_DEV_SX8 is not set
379# CONFIG_BLK_DEV_RAM is not set
380# CONFIG_BLK_DEV_INITRD is not set
381CONFIG_CDROM_PKTCDVD=m
382CONFIG_CDROM_PKTCDVD_BUFFERS=8
383# CONFIG_CDROM_PKTCDVD_WCACHE is not set
384CONFIG_ATA_OVER_ETH=m
385
386#
387# ATA/ATAPI/MFM/RLL support
388#
389CONFIG_IDE=y
390CONFIG_BLK_DEV_IDE=y
391
392#
393# Please see Documentation/ide.txt for help/info on IDE drives
394#
395# CONFIG_BLK_DEV_IDE_SATA is not set
396CONFIG_BLK_DEV_IDEDISK=y
397# CONFIG_IDEDISK_MULTI_MODE is not set
398# CONFIG_BLK_DEV_IDECD is not set
399# CONFIG_BLK_DEV_IDETAPE is not set
400# CONFIG_BLK_DEV_IDEFLOPPY is not set
401# CONFIG_IDE_TASK_IOCTL is not set
402
403#
404# IDE chipset support/bugfixes
405#
406CONFIG_IDE_GENERIC=y
407# CONFIG_BLK_DEV_IDEPCI is not set
408# CONFIG_IDE_ARM is not set
409# CONFIG_BLK_DEV_IDEDMA is not set
410# CONFIG_IDEDMA_AUTO is not set
411# CONFIG_BLK_DEV_HD is not set
412
413#
414# SCSI device support
415#
416CONFIG_RAID_ATTRS=m
417# CONFIG_SCSI is not set
418
419#
420# Multi-device support (RAID and LVM)
421#
422# CONFIG_MD is not set
423
424#
425# Fusion MPT device support
426#
427# CONFIG_FUSION is not set
428
429#
430# IEEE 1394 (FireWire) support
431#
432# CONFIG_IEEE1394 is not set
433
434#
435# I2O device support
436#
437# CONFIG_I2O is not set
438
439#
440# Network device support
441#
442CONFIG_NETDEVICES=y
443# CONFIG_DUMMY is not set
444# CONFIG_BONDING is not set
445# CONFIG_EQUALIZER is not set
446# CONFIG_TUN is not set
447
448#
449# ARCnet devices
450#
451# CONFIG_ARCNET is not set
452
453#
454# PHY device support
455#
456CONFIG_PHYLIB=m
457
458#
459# MII PHY device drivers
460#
461CONFIG_MARVELL_PHY=m
462CONFIG_DAVICOM_PHY=m
463CONFIG_QSEMI_PHY=m
464CONFIG_LXT_PHY=m
465CONFIG_CICADA_PHY=m
466CONFIG_VITESSE_PHY=m
467CONFIG_SMSC_PHY=m
468
469#
470# Ethernet (10 or 100Mbit)
471#
472CONFIG_NET_ETHERNET=y
473# CONFIG_MII is not set
474# CONFIG_HAPPYMEAL is not set
475# CONFIG_SUNGEM is not set
476# CONFIG_CASSINI is not set
477# CONFIG_NET_VENDOR_3COM is not set
478# CONFIG_DM9000 is not set
479
480#
481# Tulip family network device support
482#
483# CONFIG_NET_TULIP is not set
484# CONFIG_HP100 is not set
485# CONFIG_NET_PCI is not set
486
487#
488# Ethernet (1000 Mbit)
489#
490# CONFIG_ACENIC is not set
491# CONFIG_DL2K is not set
492# CONFIG_E1000 is not set
493# CONFIG_NS83820 is not set
494# CONFIG_HAMACHI is not set
495# CONFIG_YELLOWFIN is not set
496# CONFIG_R8169 is not set
497# CONFIG_SIS190 is not set
498# CONFIG_SKGE is not set
499# CONFIG_SKY2 is not set
500# CONFIG_SK98LIN is not set
501# CONFIG_TIGON3 is not set
502# CONFIG_BNX2 is not set
503
504#
505# Ethernet (10000 Mbit)
506#
507# CONFIG_CHELSIO_T1 is not set
508# CONFIG_IXGB is not set
509# CONFIG_S2IO is not set
510# CONFIG_MYRI10GE is not set
511
512#
513# Token Ring devices
514#
515# CONFIG_TR is not set
516
517#
518# Wireless LAN (non-hamradio)
519#
520# CONFIG_NET_RADIO is not set
521
522#
523# Wan interfaces
524#
525# CONFIG_WAN is not set
526# CONFIG_FDDI is not set
527# CONFIG_HIPPI is not set
528# CONFIG_PPP is not set
529# CONFIG_SLIP is not set
530# CONFIG_SHAPER is not set
531# CONFIG_NETCONSOLE is not set
532# CONFIG_NETPOLL is not set
533# CONFIG_NET_POLL_CONTROLLER is not set
534
535#
536# ISDN subsystem
537#
538# CONFIG_ISDN is not set
539
540#
541# Telephony Support
542#
543# CONFIG_PHONE is not set
544
545#
546# Input device support
547#
548CONFIG_INPUT=y
549
550#
551# Userland interfaces
552#
553CONFIG_INPUT_MOUSEDEV=y
554CONFIG_INPUT_MOUSEDEV_PSAUX=y
555CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
556CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
557# CONFIG_INPUT_JOYDEV is not set
558# CONFIG_INPUT_TSDEV is not set
559# CONFIG_INPUT_EVDEV is not set
560# CONFIG_INPUT_EVBUG is not set
561
562#
563# Input Device Drivers
564#
565# CONFIG_INPUT_KEYBOARD is not set
566# CONFIG_INPUT_MOUSE is not set
567# CONFIG_INPUT_JOYSTICK is not set
568# CONFIG_INPUT_TOUCHSCREEN is not set
569# CONFIG_INPUT_MISC is not set
570
571#
572# Hardware I/O ports
573#
574CONFIG_SERIO=y
575# CONFIG_SERIO_I8042 is not set
576CONFIG_SERIO_SERPORT=y
577# CONFIG_SERIO_PCIPS2 is not set
578# CONFIG_SERIO_LIBPS2 is not set
579CONFIG_SERIO_RAW=m
580# CONFIG_GAMEPORT is not set
581
582#
583# Character devices
584#
585CONFIG_VT=y
586CONFIG_VT_CONSOLE=y
587CONFIG_HW_CONSOLE=y
588CONFIG_VT_HW_CONSOLE_BINDING=y
589# CONFIG_SERIAL_NONSTANDARD is not set
590CONFIG_QTRONIX_KEYBOARD=y
591CONFIG_IT8172_SCR0=y
592CONFIG_IT8172_SCR1=y
593
594#
595# Serial drivers
596#
597CONFIG_SERIAL_8250=y
598CONFIG_SERIAL_8250_CONSOLE=y
599CONFIG_SERIAL_8250_PCI=y
600CONFIG_SERIAL_8250_NR_UARTS=4
601CONFIG_SERIAL_8250_RUNTIME_UARTS=4
602# CONFIG_SERIAL_8250_EXTENDED is not set
603
604#
605# Non-8250 serial port support
606#
607CONFIG_SERIAL_CORE=y
608CONFIG_SERIAL_CORE_CONSOLE=y
609# CONFIG_SERIAL_JSM is not set
610CONFIG_UNIX98_PTYS=y
611CONFIG_LEGACY_PTYS=y
612CONFIG_LEGACY_PTY_COUNT=256
613
614#
615# IPMI
616#
617# CONFIG_IPMI_HANDLER is not set
618
619#
620# Watchdog Cards
621#
622# CONFIG_WATCHDOG is not set
623# CONFIG_HW_RANDOM is not set
624CONFIG_RTC=y
625# CONFIG_DTLK is not set
626# CONFIG_R3964 is not set
627# CONFIG_APPLICOM is not set
628
629#
630# Ftape, the floppy tape device driver
631#
632# CONFIG_DRM is not set
633# CONFIG_RAW_DRIVER is not set
634
635#
636# TPM devices
637#
638# CONFIG_TCG_TPM is not set
639# CONFIG_TELCLOCK is not set
640
641#
642# I2C support
643#
644# CONFIG_I2C is not set
645
646#
647# SPI support
648#
649# CONFIG_SPI is not set
650# CONFIG_SPI_MASTER is not set
651
652#
653# Dallas's 1-wire bus
654#
655# CONFIG_W1 is not set
656
657#
658# Hardware Monitoring support
659#
660# CONFIG_HWMON is not set
661# CONFIG_HWMON_VID is not set
662
663#
664# Misc devices
665#
666
667#
668# Multimedia devices
669#
670# CONFIG_VIDEO_DEV is not set
671CONFIG_VIDEO_V4L2=y
672
673#
674# Digital Video Broadcasting Devices
675#
676# CONFIG_DVB is not set
677
678#
679# Graphics support
680#
681# CONFIG_FIRMWARE_EDID is not set
682# CONFIG_FB is not set
683
684#
685# Console display driver support
686#
687# CONFIG_VGA_CONSOLE is not set
688CONFIG_DUMMY_CONSOLE=y
689
690#
691# Sound
692#
693# CONFIG_SOUND is not set
694
695#
696# USB support
697#
698CONFIG_USB_ARCH_HAS_HCD=y
699CONFIG_USB_ARCH_HAS_OHCI=y
700CONFIG_USB_ARCH_HAS_EHCI=y
701# CONFIG_USB is not set
702
703#
704# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
705#
706
707#
708# USB Gadget Support
709#
710# CONFIG_USB_GADGET is not set
711
712#
713# MMC/SD Card support
714#
715# CONFIG_MMC is not set
716
717#
718# LED devices
719#
720# CONFIG_NEW_LEDS is not set
721
722#
723# LED drivers
724#
725
726#
727# LED Triggers
728#
729
730#
731# InfiniBand support
732#
733# CONFIG_INFINIBAND is not set
734
735#
736# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
737#
738
739#
740# Real Time Clock
741#
742# CONFIG_RTC_CLASS is not set
743
744#
745# DMA Engine support
746#
747# CONFIG_DMA_ENGINE is not set
748
749#
750# DMA Clients
751#
752
753#
754# DMA Devices
755#
756
757#
758# File systems
759#
760CONFIG_EXT2_FS=y
761# CONFIG_EXT2_FS_XATTR is not set
762# CONFIG_EXT2_FS_XIP is not set
763# CONFIG_EXT3_FS is not set
764# CONFIG_REISERFS_FS is not set
765# CONFIG_JFS_FS is not set
766# CONFIG_FS_POSIX_ACL is not set
767# CONFIG_XFS_FS is not set
768# CONFIG_OCFS2_FS is not set
769# CONFIG_MINIX_FS is not set
770# CONFIG_ROMFS_FS is not set
771CONFIG_INOTIFY=y
772CONFIG_INOTIFY_USER=y
773# CONFIG_QUOTA is not set
774CONFIG_DNOTIFY=y
775# CONFIG_AUTOFS_FS is not set
776# CONFIG_AUTOFS4_FS is not set
777CONFIG_FUSE_FS=m
778
779#
780# CD-ROM/DVD Filesystems
781#
782# CONFIG_ISO9660_FS is not set
783# CONFIG_UDF_FS is not set
784
785#
786# DOS/FAT/NT Filesystems
787#
788# CONFIG_MSDOS_FS is not set
789# CONFIG_VFAT_FS is not set
790# CONFIG_NTFS_FS is not set
791
792#
793# Pseudo filesystems
794#
795CONFIG_PROC_FS=y
796CONFIG_PROC_KCORE=y
797CONFIG_SYSFS=y
798# CONFIG_TMPFS is not set
799# CONFIG_HUGETLB_PAGE is not set
800CONFIG_RAMFS=y
801# CONFIG_CONFIGFS_FS is not set
802
803#
804# Miscellaneous filesystems
805#
806# CONFIG_ADFS_FS is not set
807# CONFIG_AFFS_FS is not set
808# CONFIG_HFS_FS is not set
809# CONFIG_HFSPLUS_FS is not set
810# CONFIG_BEFS_FS is not set
811# CONFIG_BFS_FS is not set
812# CONFIG_EFS_FS is not set
813# CONFIG_CRAMFS is not set
814# CONFIG_VXFS_FS is not set
815# CONFIG_HPFS_FS is not set
816# CONFIG_QNX4FS_FS is not set
817# CONFIG_SYSV_FS is not set
818# CONFIG_UFS_FS is not set
819
820#
821# Network File Systems
822#
823CONFIG_NFS_FS=y
824# CONFIG_NFS_V3 is not set
825# CONFIG_NFS_V4 is not set
826# CONFIG_NFS_DIRECTIO is not set
827# CONFIG_NFSD is not set
828CONFIG_ROOT_NFS=y
829CONFIG_LOCKD=y
830CONFIG_NFS_COMMON=y
831CONFIG_SUNRPC=y
832# CONFIG_RPCSEC_GSS_KRB5 is not set
833# CONFIG_RPCSEC_GSS_SPKM3 is not set
834# CONFIG_SMB_FS is not set
835# CONFIG_CIFS is not set
836# CONFIG_CIFS_DEBUG2 is not set
837# CONFIG_NCP_FS is not set
838# CONFIG_CODA_FS is not set
839# CONFIG_AFS_FS is not set
840# CONFIG_9P_FS is not set
841
842#
843# Partition Types
844#
845# CONFIG_PARTITION_ADVANCED is not set
846CONFIG_MSDOS_PARTITION=y
847
848#
849# Native Language Support
850#
851# CONFIG_NLS is not set
852
853#
854# Profiling support
855#
856# CONFIG_PROFILING is not set
857
858#
859# Kernel hacking
860#
861CONFIG_TRACE_IRQFLAGS_SUPPORT=y
862# CONFIG_PRINTK_TIME is not set
863# CONFIG_MAGIC_SYSRQ is not set
864# CONFIG_UNUSED_SYMBOLS is not set
865# CONFIG_DEBUG_KERNEL is not set
866CONFIG_LOG_BUF_SHIFT=14
867# CONFIG_DEBUG_FS is not set
868CONFIG_CROSSCOMPILE=y
869CONFIG_CMDLINE=""
870
871#
872# Security options
873#
874CONFIG_KEYS=y
875CONFIG_KEYS_DEBUG_PROC_KEYS=y
876# CONFIG_SECURITY is not set
877
878#
879# Cryptographic options
880#
881CONFIG_CRYPTO=y
882CONFIG_CRYPTO_HMAC=y
883CONFIG_CRYPTO_NULL=m
884CONFIG_CRYPTO_MD4=m
885CONFIG_CRYPTO_MD5=m
886CONFIG_CRYPTO_SHA1=m
887CONFIG_CRYPTO_SHA256=m
888CONFIG_CRYPTO_SHA512=m
889CONFIG_CRYPTO_WP512=m
890CONFIG_CRYPTO_TGR192=m
891CONFIG_CRYPTO_DES=m
892CONFIG_CRYPTO_BLOWFISH=m
893CONFIG_CRYPTO_TWOFISH=m
894CONFIG_CRYPTO_SERPENT=m
895CONFIG_CRYPTO_AES=m
896CONFIG_CRYPTO_CAST5=m
897CONFIG_CRYPTO_CAST6=m
898CONFIG_CRYPTO_TEA=m
899CONFIG_CRYPTO_ARC4=m
900CONFIG_CRYPTO_KHAZAD=m
901CONFIG_CRYPTO_ANUBIS=m
902CONFIG_CRYPTO_DEFLATE=m
903CONFIG_CRYPTO_MICHAEL_MIC=m
904CONFIG_CRYPTO_CRC32C=m
905# CONFIG_CRYPTO_TEST is not set
906
907#
908# Hardware crypto devices
909#
910
911#
912# Library routines
913#
914# CONFIG_CRC_CCITT is not set
915CONFIG_CRC16=m
916CONFIG_CRC32=m
917CONFIG_LIBCRC32C=m
918CONFIG_ZLIB_INFLATE=m
919CONFIG_ZLIB_DEFLATE=m
920CONFIG_PLIST=y
diff --git a/arch/mips/ite-boards/Kconfig b/arch/mips/ite-boards/Kconfig
deleted file mode 100644
index a6d59ad8f846..000000000000
--- a/arch/mips/ite-boards/Kconfig
+++ /dev/null
@@ -1,8 +0,0 @@
1config IT8172_REVC
2 bool "Support for older IT8172 (Rev C)"
3 depends on MIPS_ITE8172
4 help
5 Say Y here to support the older, Revision C version of the Integrated
6 Technology Express, Inc. ITE8172 SBC. Vendor page at
7 <http://www.ite.com.tw/ia/brief_it8172bsp.htm>; picture of the
8 board at <http://www.mvista.com/partners/semiconductor/ite.html>.
diff --git a/arch/mips/ite-boards/generic/Makefile b/arch/mips/ite-boards/generic/Makefile
deleted file mode 100644
index 63431538d0ec..000000000000
--- a/arch/mips/ite-boards/generic/Makefile
+++ /dev/null
@@ -1,15 +0,0 @@
1#
2# Copyright 2000 MontaVista Software Inc.
3# Author: MontaVista Software, Inc.
4# ppopov@mvista.com or source@mvista.com
5#
6# Makefile for the ITE 8172 (qed-4n-s01b) board, generic files.
7#
8
9obj-y += it8172_setup.o irq.o pmon_prom.o \
10 time.o lpc.o puts.o reset.o
11
12obj-$(CONFIG_IT8172_CIR)+= it8172_cir.o
13obj-$(CONFIG_KGDB) += dbg_io.o
14
15EXTRA_AFLAGS := $(CFLAGS)
diff --git a/arch/mips/ite-boards/generic/dbg_io.c b/arch/mips/ite-boards/generic/dbg_io.c
deleted file mode 100644
index 8e9cd8a9670a..000000000000
--- a/arch/mips/ite-boards/generic/dbg_io.c
+++ /dev/null
@@ -1,124 +0,0 @@
1
2
3#ifdef CONFIG_KGDB
4
5/* --- CONFIG --- */
6
7/* we need uint32 uint8 */
8/* #include "types.h" */
9typedef unsigned char uint8;
10typedef unsigned int uint32;
11
12/* --- END OF CONFIG --- */
13
14#define UART16550_BAUD_2400 2400
15#define UART16550_BAUD_4800 4800
16#define UART16550_BAUD_9600 9600
17#define UART16550_BAUD_19200 19200
18#define UART16550_BAUD_38400 38400
19#define UART16550_BAUD_57600 57600
20#define UART16550_BAUD_115200 115200
21
22#define UART16550_PARITY_NONE 0
23#define UART16550_PARITY_ODD 0x08
24#define UART16550_PARITY_EVEN 0x18
25#define UART16550_PARITY_MARK 0x28
26#define UART16550_PARITY_SPACE 0x38
27
28#define UART16550_DATA_5BIT 0x0
29#define UART16550_DATA_6BIT 0x1
30#define UART16550_DATA_7BIT 0x2
31#define UART16550_DATA_8BIT 0x3
32
33#define UART16550_STOP_1BIT 0x0
34#define UART16550_STOP_2BIT 0x4
35
36/* ----------------------------------------------------- */
37
38/* === CONFIG === */
39
40/* [stevel] we use the IT8712 serial port for kgdb */
41#define DEBUG_BASE 0xB40003F8 /* 8712 serial port 1 base address */
42#define MAX_BAUD 115200
43
44/* === END OF CONFIG === */
45
46/* register offset */
47#define OFS_RCV_BUFFER 0
48#define OFS_TRANS_HOLD 0
49#define OFS_SEND_BUFFER 0
50#define OFS_INTR_ENABLE 1
51#define OFS_INTR_ID 2
52#define OFS_DATA_FORMAT 3
53#define OFS_LINE_CONTROL 3
54#define OFS_MODEM_CONTROL 4
55#define OFS_RS232_OUTPUT 4
56#define OFS_LINE_STATUS 5
57#define OFS_MODEM_STATUS 6
58#define OFS_RS232_INPUT 6
59#define OFS_SCRATCH_PAD 7
60
61#define OFS_DIVISOR_LSB 0
62#define OFS_DIVISOR_MSB 1
63
64
65/* memory-mapped read/write of the port */
66#define UART16550_READ(y) (*((volatile uint8*)(DEBUG_BASE + y)))
67#define UART16550_WRITE(y,z) ((*((volatile uint8*)(DEBUG_BASE + y))) = z)
68
69void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop)
70{
71 /* disable interrupts */
72 UART16550_WRITE(OFS_INTR_ENABLE, 0);
73
74 /* set up baud rate */
75 {
76 uint32 divisor;
77
78 /* set DIAB bit */
79 UART16550_WRITE(OFS_LINE_CONTROL, 0x80);
80
81 /* set divisor */
82 divisor = MAX_BAUD / baud;
83 UART16550_WRITE(OFS_DIVISOR_LSB, divisor & 0xff);
84 UART16550_WRITE(OFS_DIVISOR_MSB, (divisor & 0xff00) >> 8);
85
86 /* clear DIAB bit */
87 UART16550_WRITE(OFS_LINE_CONTROL, 0x0);
88 }
89
90 /* set data format */
91 UART16550_WRITE(OFS_DATA_FORMAT, data | parity | stop);
92}
93
94static int remoteDebugInitialized = 0;
95
96uint8 getDebugChar(void)
97{
98 if (!remoteDebugInitialized) {
99 remoteDebugInitialized = 1;
100 debugInit(UART16550_BAUD_115200,
101 UART16550_DATA_8BIT,
102 UART16550_PARITY_NONE, UART16550_STOP_1BIT);
103 }
104
105 while ((UART16550_READ(OFS_LINE_STATUS) & 0x1) == 0);
106 return UART16550_READ(OFS_RCV_BUFFER);
107}
108
109
110int putDebugChar(uint8 byte)
111{
112 if (!remoteDebugInitialized) {
113 remoteDebugInitialized = 1;
114 debugInit(UART16550_BAUD_115200,
115 UART16550_DATA_8BIT,
116 UART16550_PARITY_NONE, UART16550_STOP_1BIT);
117 }
118
119 while ((UART16550_READ(OFS_LINE_STATUS) & 0x20) == 0);
120 UART16550_WRITE(OFS_SEND_BUFFER, byte);
121 return 1;
122}
123
124#endif
diff --git a/arch/mips/ite-boards/generic/irq.c b/arch/mips/ite-boards/generic/irq.c
deleted file mode 100644
index cb59ca4f76f0..000000000000
--- a/arch/mips/ite-boards/generic/irq.c
+++ /dev/null
@@ -1,308 +0,0 @@
1/*
2 * BRIEF MODULE DESCRIPTION
3 * ITE 8172G interrupt/setup routines.
4 *
5 * Copyright 2000,2001 MontaVista Software Inc.
6 * Author: MontaVista Software, Inc.
7 * ppopov@mvista.com or source@mvista.com
8 *
9 * Part of this file was derived from Carsten Langgaard's
10 * arch/mips/mips-boards/atlas/atlas_int.c.
11 *
12 * Carsten Langgaard, carstenl@mips.com
13 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
14 *
15 * This program is free software; you can redistribute it and/or modify it
16 * under the terms of the GNU General Public License as published by the
17 * Free Software Foundation; either version 2 of the License, or (at your
18 * option) any later version.
19 *
20 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
21 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
23 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
26 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
27 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 *
31 * You should have received a copy of the GNU General Public License along
32 * with this program; if not, write to the Free Software Foundation, Inc.,
33 * 675 Mass Ave, Cambridge, MA 02139, USA.
34 */
35#include <linux/errno.h>
36#include <linux/init.h>
37#include <linux/irq.h>
38#include <linux/kernel_stat.h>
39#include <linux/module.h>
40#include <linux/signal.h>
41#include <linux/sched.h>
42#include <linux/types.h>
43#include <linux/interrupt.h>
44#include <linux/ioport.h>
45#include <linux/timex.h>
46#include <linux/slab.h>
47#include <linux/random.h>
48#include <linux/serial_reg.h>
49#include <linux/bitops.h>
50
51#include <asm/bootinfo.h>
52#include <asm/io.h>
53#include <asm/mipsregs.h>
54#include <asm/system.h>
55#include <asm/it8172/it8172.h>
56#include <asm/it8172/it8172_int.h>
57#include <asm/it8172/it8172_dbg.h>
58
59/* revisit */
60#define EXT_IRQ0_TO_IP 2 /* IP 2 */
61#define EXT_IRQ5_TO_IP 7 /* IP 7 */
62
63#define ALLINTS_NOTIMER (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4)
64
65extern void set_debug_traps(void);
66extern void mips_timer_interrupt(int irq, struct pt_regs *regs);
67
68struct it8172_intc_regs volatile *it8172_hw0_icregs =
69 (struct it8172_intc_regs volatile *)(KSEG1ADDR(IT8172_PCI_IO_BASE + IT_INTC_BASE));
70
71static void disable_it8172_irq(unsigned int irq_nr)
72{
73 if ( (irq_nr >= IT8172_LPC_IRQ_BASE) && (irq_nr <= IT8172_SERIRQ_15)) {
74 /* LPC interrupt */
75 it8172_hw0_icregs->lpc_mask |=
76 (1 << (irq_nr - IT8172_LPC_IRQ_BASE));
77 } else if ( (irq_nr >= IT8172_LB_IRQ_BASE) && (irq_nr <= IT8172_IOCHK_IRQ)) {
78 /* Local Bus interrupt */
79 it8172_hw0_icregs->lb_mask |=
80 (1 << (irq_nr - IT8172_LB_IRQ_BASE));
81 } else if ( (irq_nr >= IT8172_PCI_DEV_IRQ_BASE) && (irq_nr <= IT8172_DMA_IRQ)) {
82 /* PCI and other interrupts */
83 it8172_hw0_icregs->pci_mask |=
84 (1 << (irq_nr - IT8172_PCI_DEV_IRQ_BASE));
85 } else if ( (irq_nr >= IT8172_NMI_IRQ_BASE) && (irq_nr <= IT8172_POWER_NMI_IRQ)) {
86 /* NMI interrupts */
87 it8172_hw0_icregs->nmi_mask |=
88 (1 << (irq_nr - IT8172_NMI_IRQ_BASE));
89 } else {
90 panic("disable_it8172_irq: bad irq %d", irq_nr);
91 }
92}
93
94static void enable_it8172_irq(unsigned int irq_nr)
95{
96 if ( (irq_nr >= IT8172_LPC_IRQ_BASE) && (irq_nr <= IT8172_SERIRQ_15)) {
97 /* LPC interrupt */
98 it8172_hw0_icregs->lpc_mask &=
99 ~(1 << (irq_nr - IT8172_LPC_IRQ_BASE));
100 }
101 else if ( (irq_nr >= IT8172_LB_IRQ_BASE) && (irq_nr <= IT8172_IOCHK_IRQ)) {
102 /* Local Bus interrupt */
103 it8172_hw0_icregs->lb_mask &=
104 ~(1 << (irq_nr - IT8172_LB_IRQ_BASE));
105 }
106 else if ( (irq_nr >= IT8172_PCI_DEV_IRQ_BASE) && (irq_nr <= IT8172_DMA_IRQ)) {
107 /* PCI and other interrupts */
108 it8172_hw0_icregs->pci_mask &=
109 ~(1 << (irq_nr - IT8172_PCI_DEV_IRQ_BASE));
110 }
111 else if ( (irq_nr >= IT8172_NMI_IRQ_BASE) && (irq_nr <= IT8172_POWER_NMI_IRQ)) {
112 /* NMI interrupts */
113 it8172_hw0_icregs->nmi_mask &=
114 ~(1 << (irq_nr - IT8172_NMI_IRQ_BASE));
115 }
116 else {
117 panic("enable_it8172_irq: bad irq %d", irq_nr);
118 }
119}
120
121static unsigned int startup_ite_irq(unsigned int irq)
122{
123 enable_it8172_irq(irq);
124 return 0;
125}
126
127#define shutdown_ite_irq disable_it8172_irq
128#define mask_and_ack_ite_irq disable_it8172_irq
129
130static void end_ite_irq(unsigned int irq)
131{
132 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
133 enable_it8172_irq(irq);
134}
135
136static struct irq_chip it8172_irq_type = {
137 .typename = "ITE8172",
138 .startup = startup_ite_irq,
139 .shutdown = shutdown_ite_irq,
140 .enable = enable_it8172_irq,
141 .disable = disable_it8172_irq,
142 .ack = mask_and_ack_ite_irq,
143 .end = end_ite_irq,
144};
145
146
147static void enable_none(unsigned int irq) { }
148static unsigned int startup_none(unsigned int irq) { return 0; }
149static void disable_none(unsigned int irq) { }
150static void ack_none(unsigned int irq) { }
151
152/* startup is the same as "enable", shutdown is same as "disable" */
153#define shutdown_none disable_none
154#define end_none enable_none
155
156static struct irq_chip cp0_irq_type = {
157 .typename = "CP0 Count",
158 .startup = startup_none,
159 .shutdown = shutdown_none,
160 .enable = enable_none,
161 .disable = disable_none,
162 .ack = ack_none,
163 .end = end_none
164};
165
166void enable_cpu_timer(void)
167{
168 unsigned long flags;
169
170 local_irq_save(flags);
171 set_c0_status(0x100 << EXT_IRQ5_TO_IP);
172 local_irq_restore(flags);
173}
174
175void __init arch_init_irq(void)
176{
177 int i;
178 unsigned long flags;
179
180 /* mask all interrupts */
181 it8172_hw0_icregs->lb_mask = 0xffff;
182 it8172_hw0_icregs->lpc_mask = 0xffff;
183 it8172_hw0_icregs->pci_mask = 0xffff;
184 it8172_hw0_icregs->nmi_mask = 0xffff;
185
186 /* make all interrupts level triggered */
187 it8172_hw0_icregs->lb_trigger = 0;
188 it8172_hw0_icregs->lpc_trigger = 0;
189 it8172_hw0_icregs->pci_trigger = 0;
190 it8172_hw0_icregs->nmi_trigger = 0;
191
192 /* active level setting */
193 /* uart, keyboard, and mouse are active high */
194 it8172_hw0_icregs->lpc_level = (0x10 | 0x2 | 0x1000);
195 it8172_hw0_icregs->lb_level |= 0x20;
196
197 /* keyboard and mouse are edge triggered */
198 it8172_hw0_icregs->lpc_trigger |= (0x2 | 0x1000);
199
200
201#if 0
202 // Enable this piece of code to make internal USB interrupt
203 // edge triggered.
204 it8172_hw0_icregs->pci_trigger |=
205 (1 << (IT8172_USB_IRQ - IT8172_PCI_DEV_IRQ_BASE));
206 it8172_hw0_icregs->pci_level &=
207 ~(1 << (IT8172_USB_IRQ - IT8172_PCI_DEV_IRQ_BASE));
208#endif
209
210 for (i = 0; i <= IT8172_LAST_IRQ; i++) {
211 irq_desc[i].chip = &it8172_irq_type;
212 spin_lock_init(&irq_desc[i].lock);
213 }
214 irq_desc[MIPS_CPU_TIMER_IRQ].chip = &cp0_irq_type;
215 set_c0_status(ALLINTS_NOTIMER);
216}
217
218void mips_spurious_interrupt(struct pt_regs *regs)
219{
220#if 1
221 return;
222#else
223 unsigned long status, cause;
224
225 printk("got spurious interrupt\n");
226 status = read_c0_status();
227 cause = read_c0_cause();
228 printk("status %x cause %x\n", status, cause);
229 printk("epc %x badvaddr %x \n", regs->cp0_epc, regs->cp0_badvaddr);
230#endif
231}
232
233void it8172_hw0_irqdispatch(struct pt_regs *regs)
234{
235 int irq;
236 unsigned short intstatus = 0, status = 0;
237
238 intstatus = it8172_hw0_icregs->intstatus;
239 if (intstatus & 0x8) {
240 panic("Got NMI interrupt");
241 } else if (intstatus & 0x4) {
242 /* PCI interrupt */
243 irq = 0;
244 status |= it8172_hw0_icregs->pci_req;
245 while (!(status & 0x1)) {
246 irq++;
247 status >>= 1;
248 }
249 irq += IT8172_PCI_DEV_IRQ_BASE;
250 } else if (intstatus & 0x1) {
251 /* Local Bus interrupt */
252 irq = 0;
253 status |= it8172_hw0_icregs->lb_req;
254 while (!(status & 0x1)) {
255 irq++;
256 status >>= 1;
257 }
258 irq += IT8172_LB_IRQ_BASE;
259 } else if (intstatus & 0x2) {
260 /* LPC interrupt */
261 /* Since some lpc interrupts are edge triggered,
262 * we could lose an interrupt this way because
263 * we acknowledge all ints at onces. Revisit.
264 */
265 status |= it8172_hw0_icregs->lpc_req;
266 it8172_hw0_icregs->lpc_req = 0; /* acknowledge ints */
267 irq = 0;
268 while (!(status & 0x1)) {
269 irq++;
270 status >>= 1;
271 }
272 irq += IT8172_LPC_IRQ_BASE;
273 } else
274 return;
275
276 do_IRQ(irq, regs);
277}
278
279asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
280{
281 unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
282
283 if (!pending)
284 mips_spurious_interrupt(regs);
285 else if (pending & CAUSEF_IP7)
286 ll_timer_interrupt(127, regs);
287 else if (pending & CAUSEF_IP2)
288 it8172_hw0_irqdispatch(regs);
289}
290
291void show_pending_irqs(void)
292{
293 fputs("intstatus: ");
294 put32(it8172_hw0_icregs->intstatus);
295 puts("");
296
297 fputs("pci_req: ");
298 put32(it8172_hw0_icregs->pci_req);
299 puts("");
300
301 fputs("lb_req: ");
302 put32(it8172_hw0_icregs->lb_req);
303 puts("");
304
305 fputs("lpc_req: ");
306 put32(it8172_hw0_icregs->lpc_req);
307 puts("");
308}
diff --git a/arch/mips/ite-boards/generic/it8172_cir.c b/arch/mips/ite-boards/generic/it8172_cir.c
deleted file mode 100644
index bfc25adcfec6..000000000000
--- a/arch/mips/ite-boards/generic/it8172_cir.c
+++ /dev/null
@@ -1,170 +0,0 @@
1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * IT8172 Consumer IR port generic routines.
5 *
6 * Copyright 2001 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc.
8 * ppopov@mvista.com or source@mvista.com
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 *
15 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
16 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
18 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
21 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
22 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * You should have received a copy of the GNU General Public License along
27 * with this program; if not, write to the Free Software Foundation, Inc.,
28 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 */
30
31
32#ifdef CONFIG_IT8172_CIR
33
34#include <linux/types.h>
35#include <linux/pci.h>
36#include <linux/kernel.h>
37#include <linux/init.h>
38
39#include <asm/it8172/it8172.h>
40#include <asm/it8172/it8172_cir.h>
41
42
43volatile struct it8172_cir_regs *cir_regs[NUM_CIR_PORTS] = {
44 (volatile struct it8172_cir_regs *)(KSEG1ADDR(IT8172_PCI_IO_BASE + IT_CIR0_BASE)),
45 (volatile struct it8172_cir_regs *)(KSEG1ADDR(IT8172_PCI_IO_BASE + IT_CIR1_BASE))};
46
47
48/*
49 * Initialize Consumer IR Port.
50 */
51int cir_port_init(struct cir_port *cir)
52{
53 int port = cir->port;
54 unsigned char data;
55
56 /* set baud rate */
57 cir_regs[port]->bdlr = cir->baud_rate & 0xff;
58 cir_regs[port]->bdhr = (cir->baud_rate >> 8) & 0xff;
59
60 /* set receiver control register */
61 cir_regs[port]->rcr = (CIR_SET_RDWOS(cir->rdwos) | CIR_SET_RXDCR(cir->rxdcr));
62
63 /* set carrier frequency register */
64 cir_regs[port]->cfr = (CIR_SET_CF(cir->cfq) | CIR_SET_HS(cir->hcfs));
65
66 /* set fifo threshold */
67 data = cir_regs[port]->mstcr & 0xf3;
68 data |= CIR_SET_FIFO_TL(cir->fifo_tl);
69 cir_regs[port]->mstcr = data;
70
71 clear_fifo(cir);
72 enable_receiver(cir);
73 disable_rx_demodulation(cir);
74
75 set_rx_active(cir);
76 int_enable(cir);
77 rx_int_enable(cir);
78
79 return 0;
80}
81
82
83void clear_fifo(struct cir_port *cir)
84{
85 cir_regs[cir->port]->mstcr |= CIR_FIFO_CLEAR;
86}
87
88void enable_receiver(struct cir_port *cir)
89{
90 cir_regs[cir->port]->rcr |= CIR_RXEN;
91}
92
93void disable_receiver(struct cir_port *cir)
94{
95 cir_regs[cir->port]->rcr &= ~CIR_RXEN;
96}
97
98void enable_rx_demodulation(struct cir_port *cir)
99{
100 cir_regs[cir->port]->rcr |= CIR_RXEND;
101}
102
103void disable_rx_demodulation(struct cir_port *cir)
104{
105 cir_regs[cir->port]->rcr &= ~CIR_RXEND;
106}
107
108void set_rx_active(struct cir_port *cir)
109{
110 cir_regs[cir->port]->rcr |= CIR_RXACT;
111}
112
113void int_enable(struct cir_port *cir)
114{
115 cir_regs[cir->port]->ier |= CIR_IEC;
116}
117
118void rx_int_enable(struct cir_port *cir)
119{
120 cir_regs[cir->port]->ier |= CIR_RDAIE;
121}
122
123void dump_regs(struct cir_port *cir)
124{
125 printk("mstcr %x ier %x iir %x cfr %x rcr %x tcr %x tfsr %x rfsr %x\n",
126 cir_regs[cir->port]->mstcr,
127 cir_regs[cir->port]->ier,
128 cir_regs[cir->port]->iir,
129 cir_regs[cir->port]->cfr,
130 cir_regs[cir->port]->rcr,
131 cir_regs[cir->port]->tcr,
132 cir_regs[cir->port]->tfsr,
133 cir_regs[cir->port]->rfsr);
134
135 while (cir_regs[cir->port]->iir & CIR_RDAI) {
136 printk("data %x\n", cir_regs[cir->port]->dr);
137 }
138}
139
140void dump_reg_addr(struct cir_port *cir)
141{
142 printk("dr %x mstcr %x ier %x iir %x cfr %x rcr %x tcr %x bdlr %x bdhr %x tfsr %x rfsr %x\n",
143 (unsigned)&cir_regs[cir->port]->dr,
144 (unsigned)&cir_regs[cir->port]->mstcr,
145 (unsigned)&cir_regs[cir->port]->ier,
146 (unsigned)&cir_regs[cir->port]->iir,
147 (unsigned)&cir_regs[cir->port]->cfr,
148 (unsigned)&cir_regs[cir->port]->rcr,
149 (unsigned)&cir_regs[cir->port]->tcr,
150 (unsigned)&cir_regs[cir->port]->bdlr,
151 (unsigned)&cir_regs[cir->port]->bdhr,
152 (unsigned)&cir_regs[cir->port]->tfsr,
153 (unsigned)&cir_regs[cir->port]->rfsr);
154}
155
156int cir_get_rx_count(struct cir_port *cir)
157{
158 return cir_regs[cir->port]->rfsr & CIR_RXFBC_MASK;
159}
160
161char cir_read_data(struct cir_port *cir)
162{
163 return cir_regs[cir->port]->dr;
164}
165
166char get_int_status(struct cir_port *cir)
167{
168 return cir_regs[cir->port]->iir;
169}
170#endif
diff --git a/arch/mips/ite-boards/generic/it8172_setup.c b/arch/mips/ite-boards/generic/it8172_setup.c
deleted file mode 100644
index 07faf3cacff2..000000000000
--- a/arch/mips/ite-boards/generic/it8172_setup.c
+++ /dev/null
@@ -1,352 +0,0 @@
1/*
2 * BRIEF MODULE DESCRIPTION
3 * IT8172/QED5231 board setup.
4 *
5 * Copyright 2000 MontaVista Software Inc.
6 * Author: MontaVista Software, Inc.
7 * ppopov@mvista.com or source@mvista.com
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
15 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
20 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
21 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 *
25 * You should have received a copy of the GNU General Public License along
26 * with this program; if not, write to the Free Software Foundation, Inc.,
27 * 675 Mass Ave, Cambridge, MA 02139, USA.
28 */
29#include <linux/init.h>
30#include <linux/sched.h>
31#include <linux/ioport.h>
32#include <linux/irq.h>
33#include <linux/serial_reg.h>
34#include <linux/major.h>
35#include <linux/kdev_t.h>
36#include <linux/root_dev.h>
37#include <linux/pm.h>
38
39#include <asm/cpu.h>
40#include <asm/time.h>
41#include <asm/io.h>
42#include <asm/bootinfo.h>
43#include <asm/irq.h>
44#include <asm/mipsregs.h>
45#include <asm/reboot.h>
46#include <asm/traps.h>
47#include <asm/it8172/it8172.h>
48#include <asm/it8712.h>
49
50extern struct resource ioport_resource;
51#ifdef CONFIG_SERIO_I8042
52int init_8712_keyboard(void);
53#endif
54
55extern int SearchIT8712(void);
56extern void InitLPCInterface(void);
57extern char * __init prom_getcmdline(void);
58extern void it8172_restart(char *command);
59extern void it8172_halt(void);
60extern void it8172_power_off(void);
61
62extern void it8172_time_init(void);
63
64#ifdef CONFIG_IT8172_REVC
65struct {
66 struct resource ram;
67 struct resource pci_mem;
68 struct resource pci_io;
69 struct resource flash;
70 struct resource boot;
71} it8172_resources = {
72 {
73 .start = 0, /* to be initted */
74 .end = 0,
75 .name = "RAM",
76 .flags = IORESOURCE_MEM
77 }, {
78 .start = 0x10000000,
79 .end = 0x13FFFFFF,
80 .name = "PCI Mem",
81 .flags = IORESOURCE_MEM
82 }, {
83 .start = 0x14000000,
84 .end = 0x17FFFFFF
85 .name = "PCI I/O",
86 }, {
87 .start = 0x08000000,
88 .end = 0x0CFFFFFF
89 .name = "Flash",
90 }, {
91 .start = 0x1FC00000,
92 .end = 0x1FFFFFFF
93 .name = "Boot ROM",
94 }
95};
96#else
97struct {
98 struct resource ram;
99 struct resource pci_mem0;
100 struct resource pci_mem1;
101 struct resource pci_io;
102 struct resource pci_mem2;
103 struct resource pci_mem3;
104 struct resource flash;
105 struct resource boot;
106} it8172_resources = {
107 {
108 .start = 0, /* to be initted */
109 .end = 0,
110 .name = "RAM",
111 .flags = IORESOURCE_MEM
112 }, {
113 .start = 0x0C000000,
114 .end = 0x0FFFFFFF,
115 .name = "PCI Mem0",
116 .flags = IORESOURCE_MEM
117 }, {
118 .start = 0x10000000,
119 .end = 0x13FFFFFF,
120 .name = "PCI Mem1",
121 .flags = IORESOURCE_MEM
122 }, {
123 .start = 0x14000000,
124 .end = 0x17FFFFFF
125 .name = "PCI I/O",
126 }, {
127 .start = 0x1A000000,
128 .end = 0x1BFFFFFF,
129 .name = "PCI Mem2",
130 .flags = IORESOURCE_MEM
131 }, {
132 .start = 0x1C000000,
133 .end = 0x1FBFFFFF,
134 .name = "PCI Mem3",
135 .flags = IORESOURCE_MEM
136 }, {
137 .start = 0x08000000,
138 .end = 0x0CFFFFFF
139 .name = "Flash",
140 }, {
141 .start = 0x1FC00000,
142 .end = 0x1FFFFFFF
143 .name = "Boot ROM",
144 }
145};
146#endif
147
148
149void __init it8172_init_ram_resource(unsigned long memsize)
150{
151 it8172_resources.ram.end = memsize;
152}
153
154void __init plat_mem_setup(void)
155{
156 unsigned short dsr;
157 char *argptr;
158
159 argptr = prom_getcmdline();
160#ifdef CONFIG_SERIAL_CONSOLE
161 if ((argptr = strstr(argptr, "console=")) == NULL) {
162 argptr = prom_getcmdline();
163 strcat(argptr, " console=ttyS0,115200");
164 }
165#endif
166
167 clear_c0_status(ST0_FR);
168
169 board_time_init = it8172_time_init;
170
171 _machine_restart = it8172_restart;
172 _machine_halt = it8172_halt;
173 pm_power_off = it8172_power_off;
174
175 /*
176 * IO/MEM resources.
177 *
178 * revisit this area.
179 */
180 set_io_port_base(KSEG1);
181 ioport_resource.start = it8172_resources.pci_io.start;
182 ioport_resource.end = it8172_resources.pci_io.end;
183#ifdef CONFIG_IT8172_REVC
184 iomem_resource.start = it8172_resources.pci_mem.start;
185 iomem_resource.end = it8172_resources.pci_mem.end;
186#else
187 iomem_resource.start = it8172_resources.pci_mem0.start;
188 iomem_resource.end = it8172_resources.pci_mem3.end;
189#endif
190
191#ifdef CONFIG_BLK_DEV_INITRD
192 ROOT_DEV = Root_RAM0;
193#endif
194
195 /*
196 * Pull enabled devices out of standby
197 */
198 IT_IO_READ16(IT_PM_DSR, dsr);
199
200 /*
201 * Fixme: This breaks when these drivers are modules!!!
202 */
203#ifdef CONFIG_SOUND_IT8172
204 dsr &= ~IT_PM_DSR_ACSB;
205#else
206 dsr |= IT_PM_DSR_ACSB;
207#endif
208#ifdef CONFIG_BLK_DEV_IT8172
209 dsr &= ~IT_PM_DSR_IDESB;
210#else
211 dsr |= IT_PM_DSR_IDESB;
212#endif
213 IT_IO_WRITE16(IT_PM_DSR, dsr);
214
215 InitLPCInterface();
216
217#ifdef CONFIG_MIPS_ITE8172
218 if (SearchIT8712()) {
219 printk("Found IT8712 Super IO\n");
220 /* enable IT8712 serial port */
221 LPCSetConfig(LDN_SERIAL1, 0x30, 0x01); /* enable */
222 LPCSetConfig(LDN_SERIAL1, 0x23, 0x01); /* clock selection */
223#ifdef CONFIG_SERIO_I8042
224 if (init_8712_keyboard()) {
225 printk("Unable to initialize keyboard\n");
226 LPCSetConfig(LDN_KEYBOARD, 0x30, 0x0); /* disable keyboard */
227 } else {
228 LPCSetConfig(LDN_KEYBOARD, 0x30, 0x1); /* enable keyboard */
229 LPCSetConfig(LDN_KEYBOARD, 0xf0, 0x2);
230 LPCSetConfig(LDN_KEYBOARD, 0x71, 0x3);
231
232 LPCSetConfig(LDN_MOUSE, 0x30, 0x1); /* enable mouse */
233
234 LPCSetConfig(0x4, 0x30, 0x1);
235 LPCSetConfig(0x4, 0xf4, LPCGetConfig(0x4, 0xf4) | 0x80);
236
237 if ((LPCGetConfig(LDN_KEYBOARD, 0x30) == 0) ||
238 (LPCGetConfig(LDN_MOUSE, 0x30) == 0))
239 printk("Error: keyboard or mouse not enabled\n");
240
241 }
242#endif
243 }
244 else {
245 printk("IT8712 Super IO not found\n");
246 }
247#endif
248
249#ifdef CONFIG_IT8172_CIR
250 {
251 unsigned long data;
252 //printk("Enabling CIR0\n");
253 IT_IO_READ16(IT_PM_DSR, data);
254 data &= ~IT_PM_DSR_CIR0SB;
255 IT_IO_WRITE16(IT_PM_DSR, data);
256 //printk("DSR register: %x\n", (unsigned)IT_IO_READ16(IT_PM_DSR, data));
257 }
258#endif
259#ifdef CONFIG_IT8172_SCR0
260 {
261 unsigned i;
262 /* Enable Smart Card Reader 0 */
263 /* First power it up */
264 IT_IO_READ16(IT_PM_DSR, i);
265 i &= ~IT_PM_DSR_SCR0SB;
266 IT_IO_WRITE16(IT_PM_DSR, i);
267 /* Then initialize its registers */
268 outb(( IT_SCR_SFR_GATE_UART_OFF << IT_SCR_SFR_GATE_UART_BIT
269 |IT_SCR_SFR_FET_CHARGE_213_US << IT_SCR_SFR_FET_CHARGE_BIT
270 |IT_SCR_SFR_CARD_FREQ_3_5_MHZ << IT_SCR_SFR_CARD_FREQ_BIT
271 |IT_SCR_SFR_FET_ACTIVE_INVERT << IT_SCR_SFR_FET_ACTIVE_BIT
272 |IT_SCR_SFR_ENABLE_ON << IT_SCR_SFR_ENABLE_BIT),
273 IT8172_PCI_IO_BASE + IT_SCR0_BASE + IT_SCR_SFR);
274 outb(IT_SCR_SCDR_RESET_MODE_ASYNC << IT_SCR_SCDR_RESET_MODE_BIT,
275 IT8172_PCI_IO_BASE + IT_SCR0_BASE + IT_SCR_SCDR);
276 }
277#endif /* CONFIG_IT8172_SCR0 */
278#ifdef CONFIG_IT8172_SCR1
279 {
280 unsigned i;
281 /* Enable Smart Card Reader 1 */
282 /* First power it up */
283 IT_IO_READ16(IT_PM_DSR, i);
284 i &= ~IT_PM_DSR_SCR1SB;
285 IT_IO_WRITE16(IT_PM_DSR, i);
286 /* Then initialize its registers */
287 outb(( IT_SCR_SFR_GATE_UART_OFF << IT_SCR_SFR_GATE_UART_BIT
288 |IT_SCR_SFR_FET_CHARGE_213_US << IT_SCR_SFR_FET_CHARGE_BIT
289 |IT_SCR_SFR_CARD_FREQ_3_5_MHZ << IT_SCR_SFR_CARD_FREQ_BIT
290 |IT_SCR_SFR_FET_ACTIVE_INVERT << IT_SCR_SFR_FET_ACTIVE_BIT
291 |IT_SCR_SFR_ENABLE_ON << IT_SCR_SFR_ENABLE_BIT),
292 IT8172_PCI_IO_BASE + IT_SCR1_BASE + IT_SCR_SFR);
293 outb(IT_SCR_SCDR_RESET_MODE_ASYNC << IT_SCR_SCDR_RESET_MODE_BIT,
294 IT8172_PCI_IO_BASE + IT_SCR1_BASE + IT_SCR_SCDR);
295 }
296#endif /* CONFIG_IT8172_SCR1 */
297}
298
299#ifdef CONFIG_SERIO_I8042
300/*
301 * According to the ITE Special BIOS Note for waking up the
302 * keyboard controller...
303 */
304static int init_8712_keyboard(void)
305{
306 unsigned int cmd_port = 0x14000064;
307 unsigned int data_port = 0x14000060;
308 ^^^^^^^^^^^
309 Somebody here doesn't grok the concept of io ports.
310
311 unsigned char data;
312 int i;
313
314 outb(0xaa, cmd_port); /* send self-test cmd */
315 i = 0;
316 while (!(inb(cmd_port) & 0x1)) { /* wait output buffer full */
317 i++;
318 if (i > 0xffffff)
319 return 1;
320 }
321
322 data = inb(data_port);
323 outb(0xcb, cmd_port); /* set ps2 mode */
324 while (inb(cmd_port) & 0x2) { /* wait while input buffer full */
325 i++;
326 if (i > 0xffffff)
327 return 1;
328 }
329 outb(0x01, data_port);
330 while (inb(cmd_port) & 0x2) { /* wait while input buffer full */
331 i++;
332 if (i > 0xffffff)
333 return 1;
334 }
335
336 outb(0x60, cmd_port); /* write 8042 command byte */
337 while (inb(cmd_port) & 0x2) { /* wait while input buffer full */
338 i++;
339 if (i > 0xffffff)
340 return 1;
341 }
342 outb(0x45, data_port); /* at interface, keyboard enabled, system flag */
343 while (inb(cmd_port) & 0x2) { /* wait while input buffer full */
344 i++;
345 if (i > 0xffffff)
346 return 1;
347 }
348
349 outb(0xae, cmd_port); /* enable interface */
350 return 0;
351}
352#endif
diff --git a/arch/mips/ite-boards/generic/lpc.c b/arch/mips/ite-boards/generic/lpc.c
deleted file mode 100644
index cc7584fbef8a..000000000000
--- a/arch/mips/ite-boards/generic/lpc.c
+++ /dev/null
@@ -1,144 +0,0 @@
1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * ITE Semi IT8712 Super I/O functions.
5 *
6 * Copyright 2001 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc.
8 * ppopov@mvista.com or source@mvista.com
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 *
15 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
16 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
18 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
21 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
22 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * You should have received a copy of the GNU General Public License along
27 * with this program; if not, write to the Free Software Foundation, Inc.,
28 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 */
30
31#include <asm/io.h>
32#include <asm/types.h>
33#include <asm/it8712.h>
34#include <asm/it8172/it8172.h>
35
36#ifndef TRUE
37#define TRUE 1
38#endif
39
40#ifndef FALSE
41#define FALSE 0
42#endif
43
44void LPCEnterMBPnP(void)
45{
46 int i;
47 unsigned char key[4] = {0x87, 0x01, 0x55, 0x55};
48
49 for (i = 0; i<4; i++)
50 outb(key[i], LPC_KEY_ADDR);
51
52}
53
54void LPCExitMBPnP(void)
55{
56 outb(0x02, LPC_KEY_ADDR);
57 outb(0x02, LPC_DATA_ADDR);
58}
59
60void LPCSetConfig(char LdnNumber, char Index, char data)
61{
62 LPCEnterMBPnP(); // Enter IT8712 MB PnP mode
63 outb(0x07, LPC_KEY_ADDR);
64 outb(LdnNumber, LPC_DATA_ADDR);
65 outb(Index, LPC_KEY_ADDR);
66 outb(data, LPC_DATA_ADDR);
67 LPCExitMBPnP();
68}
69
70char LPCGetConfig(char LdnNumber, char Index)
71{
72 char rtn;
73
74 LPCEnterMBPnP(); // Enter IT8712 MB PnP mode
75 outb(0x07, LPC_KEY_ADDR);
76 outb(LdnNumber, LPC_DATA_ADDR);
77 outb(Index, LPC_KEY_ADDR);
78 rtn = inb(LPC_DATA_ADDR);
79 LPCExitMBPnP();
80 return rtn;
81}
82
83int SearchIT8712(void)
84{
85 unsigned char Id1, Id2;
86 unsigned short Id;
87
88 LPCEnterMBPnP();
89 outb(0x20, LPC_KEY_ADDR); /* chip id byte 1 */
90 Id1 = inb(LPC_DATA_ADDR);
91 outb(0x21, LPC_KEY_ADDR); /* chip id byte 2 */
92 Id2 = inb(LPC_DATA_ADDR);
93 Id = (Id1 << 8) | Id2;
94 LPCExitMBPnP();
95 if (Id == 0x8712)
96 return TRUE;
97 else
98 return FALSE;
99}
100
101void InitLPCInterface(void)
102{
103 unsigned char bus, dev_fn;
104 unsigned long data;
105
106 bus = 0;
107 dev_fn = 1<<3 | 4;
108
109
110 /* pci cmd, SERR# Enable */
111 IT_WRITE(IT_CONFADDR,
112 (bus << IT_BUSNUM_SHF) |
113 (dev_fn << IT_FUNCNUM_SHF) |
114 ((0x4 / 4) << IT_REGNUM_SHF));
115 IT_READ(IT_CONFDATA, data);
116 data |= 0x0100;
117 IT_WRITE(IT_CONFADDR,
118 (bus << IT_BUSNUM_SHF) |
119 (dev_fn << IT_FUNCNUM_SHF) |
120 ((0x4 / 4) << IT_REGNUM_SHF));
121 IT_WRITE(IT_CONFDATA, data);
122
123 /* setup serial irq control register */
124 IT_WRITE(IT_CONFADDR,
125 (bus << IT_BUSNUM_SHF) |
126 (dev_fn << IT_FUNCNUM_SHF) |
127 ((0x48 / 4) << IT_REGNUM_SHF));
128 IT_READ(IT_CONFDATA, data);
129 data = (data & 0xffff00ff) | 0xc400;
130 IT_WRITE(IT_CONFADDR,
131 (bus << IT_BUSNUM_SHF) |
132 (dev_fn << IT_FUNCNUM_SHF) |
133 ((0x48 / 4) << IT_REGNUM_SHF));
134 IT_WRITE(IT_CONFDATA, data);
135
136
137 /* Enable I/O Space Subtractive Decode */
138 /* default 0x4C is 0x3f220000 */
139 IT_WRITE(IT_CONFADDR,
140 (bus << IT_BUSNUM_SHF) |
141 (dev_fn << IT_FUNCNUM_SHF) |
142 ((0x4C / 4) << IT_REGNUM_SHF));
143 IT_WRITE(IT_CONFDATA, 0x3f2200f3);
144}
diff --git a/arch/mips/ite-boards/generic/pmon_prom.c b/arch/mips/ite-boards/generic/pmon_prom.c
deleted file mode 100644
index 7d0a79be34d8..000000000000
--- a/arch/mips/ite-boards/generic/pmon_prom.c
+++ /dev/null
@@ -1,135 +0,0 @@
1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * PROM library initialisation code, assuming a version of
5 * pmon is the boot code.
6 *
7 * Copyright 2000 MontaVista Software Inc.
8 * Author: MontaVista Software, Inc.
9 * ppopov@mvista.com or source@mvista.com
10 *
11 * This file was derived from Carsten Langgaard's
12 * arch/mips/mips-boards/xx files.
13 *
14 * Carsten Langgaard, carstenl@mips.com
15 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
16 *
17 * This program is free software; you can redistribute it and/or modify it
18 * under the terms of the GNU General Public License as published by the
19 * Free Software Foundation; either version 2 of the License, or (at your
20 * option) any later version.
21 *
22 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
23 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
24 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
25 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
29 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 * You should have received a copy of the GNU General Public License along
34 * with this program; if not, write to the Free Software Foundation, Inc.,
35 * 675 Mass Ave, Cambridge, MA 02139, USA.
36 */
37
38#include <linux/kernel.h>
39#include <linux/init.h>
40#include <linux/string.h>
41
42#include <asm/bootinfo.h>
43
44extern int prom_argc;
45extern char **prom_argv, **prom_envp;
46
47typedef struct
48{
49 char *name;
50/* char *val; */
51}t_env_var;
52
53
54char * __init prom_getcmdline(void)
55{
56 return &(arcs_cmdline[0]);
57}
58
59void __init prom_init_cmdline(void)
60{
61 char *cp;
62 int actr;
63
64 actr = 1; /* Always ignore argv[0] */
65
66 cp = &(arcs_cmdline[0]);
67 while(actr < prom_argc) {
68 strcpy(cp, prom_argv[actr]);
69 cp += strlen(prom_argv[actr]);
70 *cp++ = ' ';
71 actr++;
72 }
73 if (cp != &(arcs_cmdline[0])) /* get rid of trailing space */
74 --cp;
75 *cp = '\0';
76
77}
78
79
80char *prom_getenv(char *envname)
81{
82 /*
83 * Return a pointer to the given environment variable.
84 * Environment variables are stored in the form of "memsize=64".
85 */
86
87 t_env_var *env = (t_env_var *)prom_envp;
88 int i;
89
90 i = strlen(envname);
91
92 while(env->name) {
93 if(strncmp(envname, env->name, i) == 0) {
94 return(env->name + strlen(envname) + 1);
95 }
96 env++;
97 }
98 return(NULL);
99}
100
101static inline unsigned char str2hexnum(unsigned char c)
102{
103 if(c >= '0' && c <= '9')
104 return c - '0';
105 if(c >= 'a' && c <= 'f')
106 return c - 'a' + 10;
107 return 0; /* foo */
108}
109
110unsigned long __init prom_free_prom_memory(void)
111{
112 return 0;
113}
114
115unsigned long __init prom_get_memsize(void)
116{
117 char *memsize_str;
118 unsigned int memsize;
119
120 memsize_str = prom_getenv("memsize");
121 if (!memsize_str) {
122#ifdef CONFIG_MIPS_ITE8172
123 memsize = 32;
124#elif defined(CONFIG_MIPS_IVR)
125 memsize = 64;
126#else
127 memsize = 8;
128#endif
129 printk("memsize unknown: setting to %dMB\n", memsize);
130 } else {
131 printk("memsize: %s\n", memsize_str);
132 memsize = simple_strtol(memsize_str, NULL, 0);
133 }
134 return memsize;
135}
diff --git a/arch/mips/ite-boards/generic/puts.c b/arch/mips/ite-boards/generic/puts.c
deleted file mode 100644
index 20b02df6b414..000000000000
--- a/arch/mips/ite-boards/generic/puts.c
+++ /dev/null
@@ -1,139 +0,0 @@
1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * Low level uart routines to directly access a 16550 uart.
5 *
6 * Copyright 2000,2001 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc.
8 * ppopov@mvista.com or source@mvista.com
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 *
15 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
16 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
18 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
21 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
22 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * You should have received a copy of the GNU General Public License along
27 * with this program; if not, write to the Free Software Foundation, Inc.,
28 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 */
30
31#include <linux/types.h>
32
33#define SERIAL_BASE 0xB4011800 /* it8172 */
34#define SER_CMD 5
35#define SER_DATA 0x00
36#define TX_BUSY 0x20
37
38#define TIMEOUT 0xffff
39#undef SLOW_DOWN
40
41static const char digits[16] = "0123456789abcdef";
42static volatile unsigned char *const com1 = (unsigned char *) SERIAL_BASE;
43
44
45#ifdef SLOW_DOWN
46static inline void slow_down()
47{
48 int k;
49 for (k = 0; k < 10000; k++);
50}
51#else
52#define slow_down()
53#endif
54
55void putch(const unsigned char c)
56{
57 unsigned char ch;
58 int i = 0;
59
60 do {
61 ch = com1[SER_CMD];
62 slow_down();
63 i++;
64 if (i > TIMEOUT) {
65 break;
66 }
67 } while (0 == (ch & TX_BUSY));
68 com1[SER_DATA] = c;
69}
70
71void puts(unsigned char *cp)
72{
73 unsigned char ch;
74 int i = 0;
75
76 while (*cp) {
77 do {
78 ch = com1[SER_CMD];
79 slow_down();
80 i++;
81 if (i > TIMEOUT) {
82 break;
83 }
84 } while (0 == (ch & TX_BUSY));
85 com1[SER_DATA] = *cp++;
86 }
87 putch('\r');
88 putch('\n');
89}
90
91void fputs(unsigned char *cp)
92{
93 unsigned char ch;
94 int i = 0;
95
96 while (*cp) {
97
98 do {
99 ch = com1[SER_CMD];
100 slow_down();
101 i++;
102 if (i > TIMEOUT) {
103 break;
104 }
105 } while (0 == (ch & TX_BUSY));
106 com1[SER_DATA] = *cp++;
107 }
108}
109
110
111void put64(uint64_t ul)
112{
113 int cnt;
114 unsigned ch;
115
116 cnt = 16; /* 16 nibbles in a 64 bit long */
117 putch('0');
118 putch('x');
119 do {
120 cnt--;
121 ch = (unsigned char) (ul >> cnt * 4) & 0x0F;
122 putch(digits[ch]);
123 } while (cnt > 0);
124}
125
126void put32(unsigned u)
127{
128 int cnt;
129 unsigned ch;
130
131 cnt = 8; /* 8 nibbles in a 32 bit long */
132 putch('0');
133 putch('x');
134 do {
135 cnt--;
136 ch = (unsigned char) (u >> cnt * 4) & 0x0F;
137 putch(digits[ch]);
138 } while (cnt > 0);
139}
diff --git a/arch/mips/ite-boards/generic/reset.c b/arch/mips/ite-boards/generic/reset.c
deleted file mode 100644
index 03bd5ba8c913..000000000000
--- a/arch/mips/ite-boards/generic/reset.c
+++ /dev/null
@@ -1,60 +0,0 @@
1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * ITE 8172 reset routines.
5 *
6 * Copyright 2001 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc.
8 * ppopov@mvista.com or source@mvista.com
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 *
15 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
16 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
18 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
21 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
22 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * You should have received a copy of the GNU General Public License along
27 * with this program; if not, write to the Free Software Foundation, Inc.,
28 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 */
30
31#include <linux/sched.h>
32#include <linux/mm.h>
33#include <asm/cacheflush.h>
34#include <asm/io.h>
35#include <asm/processor.h>
36#include <asm/reboot.h>
37#include <asm/system.h>
38
39void it8172_restart()
40{
41 set_c0_status(ST0_BEV | ST0_ERL);
42 change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
43 flush_cache_all();
44 write_c0_wired(0);
45 __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
46}
47
48void it8172_halt(void)
49{
50 printk(KERN_NOTICE "\n** You can safely turn off the power\n");
51 while (1)
52 __asm__(".set\tmips3\n\t"
53 "wait\n\t"
54 ".set\tmips0");
55}
56
57void it8172_power_off(void)
58{
59 it8172_halt();
60}
diff --git a/arch/mips/ite-boards/generic/time.c b/arch/mips/ite-boards/generic/time.c
deleted file mode 100644
index 3dc55569ff7f..000000000000
--- a/arch/mips/ite-boards/generic/time.c
+++ /dev/null
@@ -1,249 +0,0 @@
1/*
2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
4 *
5 * Copyright (C) 2003 MontaVista Software Inc.
6 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
7 *
8 * ########################################################################
9 *
10 * This program is free software; you can distribute it and/or modify it
11 * under the terms of the GNU General Public License (Version 2) as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 * for more details.
18 *
19 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
22 *
23 * ########################################################################
24 *
25 * Setting up the clock on the MIPS boards.
26 */
27#include <linux/init.h>
28#include <linux/kernel_stat.h>
29#include <linux/sched.h>
30#include <linux/time.h>
31#include <linux/spinlock.h>
32#include <linux/mc146818rtc.h>
33
34#include <asm/time.h>
35#include <asm/mipsregs.h>
36#include <asm/ptrace.h>
37#include <asm/it8172/it8172.h>
38#include <asm/it8172/it8172_int.h>
39#include <asm/debug.h>
40
41#define IT8172_RTC_ADR_REG (IT8172_PCI_IO_BASE + IT_RTC_BASE)
42#define IT8172_RTC_DAT_REG (IT8172_RTC_ADR_REG + 1)
43#define IT8172_RTC_CENTURY_REG (IT8172_PCI_IO_BASE + IT_RTC_CENTURY)
44
45static volatile char *rtc_adr_reg = (char*)KSEG1ADDR(IT8172_RTC_ADR_REG);
46static volatile char *rtc_dat_reg = (char*)KSEG1ADDR(IT8172_RTC_DAT_REG);
47static volatile char *rtc_century_reg = (char*)KSEG1ADDR(IT8172_RTC_CENTURY_REG);
48
49unsigned char it8172_rtc_read_data(unsigned long addr)
50{
51 unsigned char retval;
52
53 *rtc_adr_reg = addr;
54 retval = *rtc_dat_reg;
55 return retval;
56}
57
58void it8172_rtc_write_data(unsigned char data, unsigned long addr)
59{
60 *rtc_adr_reg = addr;
61 *rtc_dat_reg = data;
62}
63
64#undef CMOS_READ
65#undef CMOS_WRITE
66#define CMOS_READ(addr) it8172_rtc_read_data(addr)
67#define CMOS_WRITE(data, addr) it8172_rtc_write_data(data, addr)
68
69static unsigned char saved_control; /* remember rtc control reg */
70static inline int rtc_24h(void) { return saved_control & RTC_24H; }
71static inline int rtc_dm_binary(void) { return saved_control & RTC_DM_BINARY; }
72
73static inline unsigned char
74bin_to_hw(unsigned char c)
75{
76 if (rtc_dm_binary())
77 return c;
78 else
79 return ((c/10) << 4) + (c%10);
80}
81
82static inline unsigned char
83hw_to_bin(unsigned char c)
84{
85 if (rtc_dm_binary())
86 return c;
87 else
88 return (c>>4)*10 + (c &0xf);
89}
90
91/* 0x80 bit indicates pm in 12-hour format */
92static inline unsigned char
93hour_bin_to_hw(unsigned char c)
94{
95 if (rtc_24h())
96 return bin_to_hw(c);
97 if (c >= 12)
98 return 0x80 | bin_to_hw((c==12)?12:c-12); /* 12 is 12pm */
99 else
100 return bin_to_hw((c==0)?12:c); /* 0 is 12 AM, not 0 am */
101}
102
103static inline unsigned char
104hour_hw_to_bin(unsigned char c)
105{
106 unsigned char tmp = hw_to_bin(c&0x3f);
107 if (rtc_24h())
108 return tmp;
109 if (c & 0x80)
110 return (tmp==12)?12:tmp+12; /* 12pm is 12, not 24 */
111 else
112 return (tmp==12)?0:tmp; /* 12am is 0 */
113}
114
115static unsigned long r4k_offset; /* Amount to increment compare reg each time */
116static unsigned long r4k_cur; /* What counter should be at next timer irq */
117extern unsigned int mips_hpt_frequency;
118
119/*
120 * Figure out the r4k offset, the amount to increment the compare
121 * register for each time tick.
122 * Use the RTC to calculate offset.
123 */
124static unsigned long __init cal_r4koff(void)
125{
126 unsigned int flags;
127
128 local_irq_save(flags);
129
130 /* Start counter exactly on falling edge of update flag */
131 while (CMOS_READ(RTC_REG_A) & RTC_UIP);
132 while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
133
134 /* Start r4k counter. */
135 write_c0_count(0);
136
137 /* Read counter exactly on falling edge of update flag */
138 while (CMOS_READ(RTC_REG_A) & RTC_UIP);
139 while (!(CMOS_READ(RTC_REG_A) & RTC_UIP));
140
141 mips_hpt_frequency = read_c0_count();
142
143 /* restore interrupts */
144 local_irq_restore(flags);
145
146 return (mips_hpt_frequency / HZ);
147}
148
149static unsigned long
150it8172_rtc_get_time(void)
151{
152 unsigned int year, mon, day, hour, min, sec;
153 unsigned int flags;
154
155 /* avoid update-in-progress. */
156 for (;;) {
157 local_irq_save(flags);
158 if (! (CMOS_READ(RTC_REG_A) & RTC_UIP))
159 break;
160 /* don't hold intr closed all the time */
161 local_irq_restore(flags);
162 }
163
164 /* Read regs. */
165 sec = hw_to_bin(CMOS_READ(RTC_SECONDS));
166 min = hw_to_bin(CMOS_READ(RTC_MINUTES));
167 hour = hour_hw_to_bin(CMOS_READ(RTC_HOURS));
168 day = hw_to_bin(CMOS_READ(RTC_DAY_OF_MONTH));
169 mon = hw_to_bin(CMOS_READ(RTC_MONTH));
170 year = hw_to_bin(CMOS_READ(RTC_YEAR)) +
171 hw_to_bin(*rtc_century_reg) * 100;
172
173 /* restore interrupts */
174 local_irq_restore(flags);
175
176 return mktime(year, mon, day, hour, min, sec);
177}
178
179static int
180it8172_rtc_set_time(unsigned long t)
181{
182 struct rtc_time tm;
183 unsigned int flags;
184
185 /* convert */
186 to_tm(t, &tm);
187
188 /* avoid update-in-progress. */
189 for (;;) {
190 local_irq_save(flags);
191 if (! (CMOS_READ(RTC_REG_A) & RTC_UIP))
192 break;
193 /* don't hold intr closed all the time */
194 local_irq_restore(flags);
195 }
196
197 *rtc_century_reg = bin_to_hw(tm.tm_year/100);
198 CMOS_WRITE(bin_to_hw(tm.tm_sec), RTC_SECONDS);
199 CMOS_WRITE(bin_to_hw(tm.tm_min), RTC_MINUTES);
200 CMOS_WRITE(hour_bin_to_hw(tm.tm_hour), RTC_HOURS);
201 CMOS_WRITE(bin_to_hw(tm.tm_mday), RTC_DAY_OF_MONTH);
202 CMOS_WRITE(bin_to_hw(tm.tm_mon+1), RTC_MONTH); /* tm_mon starts from 0 */
203 CMOS_WRITE(bin_to_hw(tm.tm_year%100), RTC_YEAR);
204
205 /* restore interrupts */
206 local_irq_restore(flags);
207
208 return 0;
209}
210
211void __init it8172_time_init(void)
212{
213 unsigned int est_freq, flags;
214
215 local_irq_save(flags);
216
217 saved_control = CMOS_READ(RTC_CONTROL);
218
219 printk("calculating r4koff... ");
220 r4k_offset = cal_r4koff();
221 printk("%08lx(%d)\n", r4k_offset, (int) r4k_offset);
222
223 est_freq = 2*r4k_offset*HZ;
224 est_freq += 5000; /* round */
225 est_freq -= est_freq%10000;
226 printk("CPU frequency %d.%02d MHz\n", est_freq/1000000,
227 (est_freq%1000000)*100/1000000);
228
229 local_irq_restore(flags);
230
231 rtc_mips_get_time = it8172_rtc_get_time;
232 rtc_mips_set_time = it8172_rtc_set_time;
233}
234
235#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
236
237void __init plat_timer_setup(struct irqaction *irq)
238{
239 puts("timer_setup\n");
240 put32(NR_IRQS);
241 puts("");
242 /* we are using the cpu counter for timer interrupts */
243 setup_irq(MIPS_CPU_TIMER_IRQ, irq);
244
245 /* to generate the first timer interrupt */
246 r4k_cur = (read_c0_count() + r4k_offset);
247 write_c0_compare(r4k_cur);
248 set_c0_status(ALLINTS);
249}
diff --git a/arch/mips/ite-boards/ivr/Makefile b/arch/mips/ite-boards/ivr/Makefile
deleted file mode 100644
index e4fa6042b472..000000000000
--- a/arch/mips/ite-boards/ivr/Makefile
+++ /dev/null
@@ -1,10 +0,0 @@
1#
2# Copyright 2000 MontaVista Software Inc.
3# Author: MontaVista Software, Inc.
4# ppopov@mvista.com or source@mvista.com
5#
6# Makefile for the Globespan IVR board,
7# board-specific files.
8#
9
10obj-y += init.o
diff --git a/arch/mips/ite-boards/ivr/README b/arch/mips/ite-boards/ivr/README
deleted file mode 100644
index aa7d8db855bb..000000000000
--- a/arch/mips/ite-boards/ivr/README
+++ /dev/null
@@ -1,3 +0,0 @@
1This is not really a board made by ITE Semi, but it's very
2similar to the ITE QED-4N-S01B board. The IVR board is made
3by Globespan and it's a reference board for the PVR chip.
diff --git a/arch/mips/ite-boards/ivr/init.c b/arch/mips/ite-boards/ivr/init.c
deleted file mode 100644
index 05cf9218c432..000000000000
--- a/arch/mips/ite-boards/ivr/init.c
+++ /dev/null
@@ -1,81 +0,0 @@
1/*
2 * BRIEF MODULE DESCRIPTION
3 * IVR board setup.
4 *
5 * Copyright 2000 MontaVista Software Inc.
6 * Author: MontaVista Software, Inc.
7 * ppopov@mvista.com or source@mvista.com
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
15 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
20 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
21 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 *
25 * You should have received a copy of the GNU General Public License along
26 * with this program; if not, write to the Free Software Foundation, Inc.,
27 * 675 Mass Ave, Cambridge, MA 02139, USA.
28 */
29#include <linux/init.h>
30#include <linux/mm.h>
31#include <linux/sched.h>
32#include <linux/bootmem.h>
33#include <asm/addrspace.h>
34#include <asm/bootinfo.h>
35#include <linux/string.h>
36#include <linux/kernel.h>
37#include <asm/sections.h>
38#include <asm/it8172/it8172.h>
39#include <asm/it8172/it8172_dbg.h>
40
41int prom_argc;
42char **prom_argv, **prom_envp;
43
44extern void __init prom_init_cmdline(void);
45extern unsigned long __init prom_get_memsize(void);
46extern void __init it8172_init_ram_resource(unsigned long memsize);
47
48const char *get_system_type(void)
49{
50 return "Globespan IVR";
51}
52
53void __init prom_init(void)
54{
55 unsigned long mem_size;
56 unsigned long pcicr;
57
58 prom_argc = fw_arg0;
59 prom_argv = (char **) fw_arg1;
60 prom_envp = (int *) fw_arg3;
61
62 mips_machgroup = MACH_GROUP_GLOBESPAN;
63 mips_machtype = MACH_IVR; /* Globespan's iTVC15 reference board */
64
65 prom_init_cmdline();
66
67 /* pmon does not set memsize */
68 mem_size = prom_get_memsize();
69 mem_size = mem_size << 20;
70
71 /*
72 * make the entire physical memory visible to pci bus masters
73 */
74 IT_READ(IT_MC_PCICR, pcicr);
75 pcicr &= ~0x1f;
76 pcicr |= (mem_size - 1) >> 22;
77 IT_WRITE(IT_MC_PCICR, pcicr);
78
79 it8172_init_ram_resource(mem_size);
80 add_memory_region(0, mem_size, BOOT_MEM_RAM);
81}
diff --git a/arch/mips/ite-boards/qed-4n-s01b/Makefile b/arch/mips/ite-boards/qed-4n-s01b/Makefile
deleted file mode 100644
index bb9972ad9c45..000000000000
--- a/arch/mips/ite-boards/qed-4n-s01b/Makefile
+++ /dev/null
@@ -1,10 +0,0 @@
1#
2# Copyright 2000 MontaVista Software Inc.
3# Author: MontaVista Software, Inc.
4# ppopov@mvista.com or source@mvista.com
5#
6# Makefile for the ITE 8172 (qed-4n-s01b) board, board
7# specific files.
8#
9
10obj-y := init.o
diff --git a/arch/mips/ite-boards/qed-4n-s01b/README b/arch/mips/ite-boards/qed-4n-s01b/README
deleted file mode 100644
index fb4b5197e800..000000000000
--- a/arch/mips/ite-boards/qed-4n-s01b/README
+++ /dev/null
@@ -1,2 +0,0 @@
1This is an ITE (www.iteusa.com) eval board for the ITE 8172G
2system controller, with a QED 5231 CPU.
diff --git a/arch/mips/ite-boards/qed-4n-s01b/init.c b/arch/mips/ite-boards/qed-4n-s01b/init.c
deleted file mode 100644
index ea2a754cafe5..000000000000
--- a/arch/mips/ite-boards/qed-4n-s01b/init.c
+++ /dev/null
@@ -1,82 +0,0 @@
1/*
2 * BRIEF MODULE DESCRIPTION
3 * IT8172/QED5231 board setup.
4 *
5 * Copyright 2000 MontaVista Software Inc.
6 * Author: MontaVista Software, Inc.
7 * ppopov@mvista.com or source@mvista.com
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
15 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
20 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
21 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 *
25 * You should have received a copy of the GNU General Public License along
26 * with this program; if not, write to the Free Software Foundation, Inc.,
27 * 675 Mass Ave, Cambridge, MA 02139, USA.
28 */
29#include <linux/init.h>
30#include <linux/mm.h>
31#include <linux/sched.h>
32#include <linux/bootmem.h>
33#include <asm/addrspace.h>
34#include <asm/bootinfo.h>
35#include <linux/string.h>
36#include <linux/kernel.h>
37#include <asm/sections.h>
38#include <asm/it8172/it8172.h>
39#include <asm/it8172/it8172_dbg.h>
40
41int prom_argc;
42char **prom_argv, **prom_envp;
43
44extern void __init prom_init_cmdline(void);
45extern unsigned long __init prom_get_memsize(void);
46extern void __init it8172_init_ram_resource(unsigned long memsize);
47
48const char *get_system_type(void)
49{
50 return "ITE QED-4N-S01B";
51}
52
53void __init prom_init(void)
54{
55 unsigned long mem_size;
56 unsigned long pcicr;
57
58 prom_argc = fw_arg0;
59 prom_argv = (char **) fw_arg1;
60 prom_envp = (int *) fw_arg3;
61
62 mips_machgroup = MACH_GROUP_ITE;
63 mips_machtype = MACH_QED_4N_S01B; /* ITE board name/number */
64
65 prom_init_cmdline();
66 mem_size = prom_get_memsize();
67
68 printk("Memory size: %dMB\n", (unsigned)mem_size);
69
70 mem_size <<= 20; /* MB */
71
72 /*
73 * make the entire physical memory visible to pci bus masters
74 */
75 IT_READ(IT_MC_PCICR, pcicr);
76 pcicr &= ~0x1f;
77 pcicr |= (mem_size - 1) >> 22;
78 IT_WRITE(IT_MC_PCICR, pcicr);
79
80 it8172_init_ram_resource(mem_size);
81 add_memory_region(0, mem_size, BOOT_MEM_RAM);
82}
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index edefa97b2330..3cf0dd4ba548 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -7,7 +7,6 @@ obj-y += pci.o
7# 7#
8# PCI bus host bridge specific code 8# PCI bus host bridge specific code
9# 9#
10obj-$(CONFIG_ITE_BOARD_GEN) += ops-it8172.o
11obj-$(CONFIG_MIPS_BONITO64) += ops-bonito64.o 10obj-$(CONFIG_MIPS_BONITO64) += ops-bonito64.o
12obj-$(CONFIG_MIPS_GT64111) += ops-gt64111.o 11obj-$(CONFIG_MIPS_GT64111) += ops-gt64111.o
13obj-$(CONFIG_MIPS_GT64120) += ops-gt64120.o 12obj-$(CONFIG_MIPS_GT64120) += ops-gt64120.o
@@ -28,8 +27,6 @@ obj-$(CONFIG_LASAT) += pci-lasat.o
28obj-$(CONFIG_MIPS_ATLAS) += fixup-atlas.o 27obj-$(CONFIG_MIPS_ATLAS) += fixup-atlas.o
29obj-$(CONFIG_MIPS_COBALT) += fixup-cobalt.o 28obj-$(CONFIG_MIPS_COBALT) += fixup-cobalt.o
30obj-$(CONFIG_MIPS_EV64120) += fixup-ev64120.o 29obj-$(CONFIG_MIPS_EV64120) += fixup-ev64120.o
31obj-$(CONFIG_MIPS_ITE8172) += fixup-ite8172g.o
32obj-$(CONFIG_MIPS_IVR) += fixup-ivr.o
33obj-$(CONFIG_SOC_AU1500) += fixup-au1000.o ops-au1000.o 30obj-$(CONFIG_SOC_AU1500) += fixup-au1000.o ops-au1000.o
34obj-$(CONFIG_SOC_AU1550) += fixup-au1000.o ops-au1000.o 31obj-$(CONFIG_SOC_AU1550) += fixup-au1000.o ops-au1000.o
35obj-$(CONFIG_SOC_PNX8550) += fixup-pnx8550.o ops-pnx8550.o 32obj-$(CONFIG_SOC_PNX8550) += fixup-pnx8550.o ops-pnx8550.o
diff --git a/arch/mips/pci/fixup-ite8172g.c b/arch/mips/pci/fixup-ite8172g.c
deleted file mode 100644
index 2290ea4228dd..000000000000
--- a/arch/mips/pci/fixup-ite8172g.c
+++ /dev/null
@@ -1,80 +0,0 @@
1/*
2 * BRIEF MODULE DESCRIPTION
3 * Board specific pci fixups.
4 *
5 * Copyright 2000 MontaVista Software Inc.
6 * Author: MontaVista Software, Inc.
7 * ppopov@mvista.com or source@mvista.com
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
15 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
20 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
21 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 *
25 * You should have received a copy of the GNU General Public License along
26 * with this program; if not, write to the Free Software Foundation, Inc.,
27 * 675 Mass Ave, Cambridge, MA 02139, USA.
28 */
29#include <linux/types.h>
30#include <linux/pci.h>
31#include <linux/kernel.h>
32#include <linux/init.h>
33
34#include <asm/it8172/it8172.h>
35#include <asm/it8172/it8172_pci.h>
36#include <asm/it8172/it8172_int.h>
37
38/*
39 * Shortcuts
40 */
41#define INTA IT8172_PCI_INTA_IRQ
42#define INTB IT8172_PCI_INTB_IRQ
43#define INTC IT8172_PCI_INTC_IRQ
44#define INTD IT8172_PCI_INTD_IRQ
45
46static const int internal_func_irqs[7] __initdata = {
47 IT8172_AC97_IRQ,
48 IT8172_DMA_IRQ,
49 IT8172_CDMA_IRQ,
50 IT8172_USB_IRQ,
51 IT8172_BRIDGE_MASTER_IRQ,
52 IT8172_IDE_IRQ,
53 IT8172_MC68K_IRQ
54};
55
56static char irq_tab_ite8172g[][5] __initdata = {
57 [0x10] = { 0, INTA, INTB, INTC, INTD },
58 [0x11] = { 0, INTA, INTB, INTC, INTD },
59 [0x12] = { 0, INTB, INTC, INTD, INTA },
60 [0x13] = { 0, INTC, INTD, INTA, INTB },
61 [0x14] = { 0, INTD, INTA, INTB, INTC },
62};
63
64int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
65{
66 /*
67 * Internal device 1 is actually 7 different internal devices on the
68 * IT8172G (a multifunction device).
69 */
70 if (slot == 1)
71 return internal_func_irqs[PCI_FUNC(dev->devfn)];
72
73 return irq_tab_ite8172g[slot][pin];
74}
75
76/* Do platform specific device initialization at pci_enable_device() time */
77int pcibios_plat_dev_init(struct pci_dev *dev)
78{
79 return 0;
80}
diff --git a/arch/mips/pci/fixup-ivr.c b/arch/mips/pci/fixup-ivr.c
deleted file mode 100644
index 0c7c16464c11..000000000000
--- a/arch/mips/pci/fixup-ivr.c
+++ /dev/null
@@ -1,75 +0,0 @@
1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * Globespan IVR board-specific pci fixups.
5 *
6 * Copyright 2000 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc.
8 * ppopov@mvista.com or source@mvista.com
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 *
15 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
16 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
18 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
21 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
22 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * You should have received a copy of the GNU General Public License along
27 * with this program; if not, write to the Free Software Foundation, Inc.,
28 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 */
30#include <linux/types.h>
31#include <linux/pci.h>
32#include <linux/kernel.h>
33#include <linux/init.h>
34
35#include <asm/it8172/it8172.h>
36#include <asm/it8172/it8172_pci.h>
37#include <asm/it8172/it8172_int.h>
38
39/*
40 * Shortcuts
41 */
42#define INTA IT8172_PCI_INTA_IRQ
43#define INTB IT8172_PCI_INTB_IRQ
44#define INTC IT8172_PCI_INTC_IRQ
45#define INTD IT8172_PCI_INTD_IRQ
46
47static const int internal_func_irqs[7] __initdata = {
48 IT8172_AC97_IRQ,
49 IT8172_DMA_IRQ,
50 IT8172_CDMA_IRQ,
51 IT8172_USB_IRQ,
52 IT8172_BRIDGE_MASTER_IRQ,
53 IT8172_IDE_IRQ,
54 IT8172_MC68K_IRQ
55};
56
57static char irq_tab_ivr[][5] __initdata = {
58 [0x11] = { INTC, INTC, INTD, INTA, INTB }, /* Realtek RTL-8139 */
59 [0x12] = { INTB, INTB, INTB, INTC, INTC }, /* IVR slot */
60 [0x13] = { INTA, INTA, INTB, INTC, INTD } /* Expansion slot */
61};
62
63int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
64{
65 if (slot == 1)
66 return internal_func_irqs[PCI_FUNC(dev->devfn)];
67
68 return irq_tab_ivr[slot][pin];
69}
70
71/* Do platform specific device initialization at pci_enable_device() time */
72int pcibios_plat_dev_init(struct pci_dev *dev)
73{
74 return 0;
75}
diff --git a/arch/mips/pci/ops-it8172.c b/arch/mips/pci/ops-it8172.c
deleted file mode 100644
index ba8328505a0a..000000000000
--- a/arch/mips/pci/ops-it8172.c
+++ /dev/null
@@ -1,213 +0,0 @@
1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * IT8172 system controller specific pci support.
5 *
6 * Copyright 2000 MontaVista Software Inc.
7 * Author: MontaVista Software, Inc.
8 * ppopov@mvista.com or source@mvista.com
9 *
10 * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
16 *
17 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
20 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
23 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
24 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * You should have received a copy of the GNU General Public License along
29 * with this program; if not, write to the Free Software Foundation, Inc.,
30 * 675 Mass Ave, Cambridge, MA 02139, USA.
31 */
32#include <linux/types.h>
33#include <linux/pci.h>
34#include <linux/kernel.h>
35#include <linux/init.h>
36
37#include <asm/it8172/it8172.h>
38#include <asm/it8172/it8172_pci.h>
39
40#define PCI_ACCESS_READ 0
41#define PCI_ACCESS_WRITE 1
42
43#undef DEBUG
44#ifdef DEBUG
45#define DBG(x...) printk(x)
46#else
47#define DBG(x...)
48#endif
49
50static struct resource pci_mem_resource_1;
51
52static struct resource pci_io_resource = {
53 .start = 0x14018000,
54 .end = 0x17FFFFFF,
55 .name = "io pci IO space",
56 .flags = IORESOURCE_IO
57};
58
59static struct resource pci_mem_resource_0 = {
60 .start = 0x10101000,
61 .end = 0x13FFFFFF,
62 .name = "ext pci memory space 0/1",
63 .flags = IORESOURCE_MEM,
64 .parent = &pci_mem_resource_0,
65 .sibling = NULL,
66 .child = &pci_mem_resource_1
67};
68
69static struct resource pci_mem_resource_1 = {
70 .start = 0x1A000000,
71 .end = 0x1FBFFFFF,
72 .name = "ext pci memory space 2/3",
73 .flags = IORESOURCE_MEM,
74 .parent = &pci_mem_resource_0
75};
76
77extern struct pci_ops it8172_pci_ops;
78
79struct pci_controller it8172_controller = {
80 .pci_ops = &it8172_pci_ops,
81 .io_resource = &pci_io_resource,
82 .mem_resource = &pci_mem_resource_0,
83};
84
85static int it8172_pcibios_config_access(unsigned char access_type,
86 struct pci_bus *bus,
87 unsigned int devfn, int where,
88 u32 * data)
89{
90 /*
91 * config cycles are on 4 byte boundary only
92 */
93
94 /* Setup address */
95 IT_WRITE(IT_CONFADDR, (bus->number << IT_BUSNUM_SHF) |
96 (devfn << IT_FUNCNUM_SHF) | (where & ~0x3));
97
98 if (access_type == PCI_ACCESS_WRITE) {
99 IT_WRITE(IT_CONFDATA, *data);
100 } else {
101 IT_READ(IT_CONFDATA, *data);
102 }
103
104 /*
105 * Revisit: check for master or target abort.
106 */
107 return 0;
108}
109
110
111/*
112 * We can't address 8 and 16 bit words directly. Instead we have to
113 * read/write a 32bit word and mask/modify the data we actually want.
114 */
115static write_config(struct pci_bus *bus, unsigned int devfn, int where,
116 int size, u32 val)
117{
118 u32 data = 0;
119
120 switch (size) {
121 case 1:
122 if (it8172_pcibios_config_access
123 (PCI_ACCESS_READ, dev, where, &data))
124 return -1;
125
126 *val = (data >> ((where & 3) << 3)) & 0xff;
127
128 return PCIBIOS_SUCCESSFUL;
129
130 case 2:
131
132 if (where & 1)
133 return PCIBIOS_BAD_REGISTER_NUMBER;
134
135 if (it8172_pcibios_config_access
136 (PCI_ACCESS_READ, dev, where, &data))
137 return -1;
138
139 *val = (data >> ((where & 3) << 3)) & 0xffff;
140 DBG("cfg read word: bus %d dev_fn %x where %x: val %x\n",
141 dev->bus->number, dev->devfn, where, *val);
142
143 return PCIBIOS_SUCCESSFUL;
144
145 case 4:
146
147 if (where & 3)
148 return PCIBIOS_BAD_REGISTER_NUMBER;
149
150 if (it8172_pcibios_config_access
151 (PCI_ACCESS_READ, dev, where, &data))
152 return -1;
153
154 *val = data;
155
156 return PCIBIOS_SUCCESSFUL;
157 }
158}
159
160
161static write_config(struct pci_bus *bus, unsigned int devfn, int where,
162 int size, u32 val)
163{
164 u32 data = 0;
165
166 switch (size) {
167 case 1:
168 if (it8172_pcibios_config_access
169 (PCI_ACCESS_READ, dev, where, &data))
170 return -1;
171
172 data = (data & ~(0xff << ((where & 3) << 3))) |
173 (val << ((where & 3) << 3));
174
175 if (it8172_pcibios_config_access
176 (PCI_ACCESS_WRITE, dev, where, &data))
177 return -1;
178
179 return PCIBIOS_SUCCESSFUL;
180
181 case 2:
182 if (where & 1)
183 return PCIBIOS_BAD_REGISTER_NUMBER;
184
185 if (it8172_pcibios_config_access
186 (PCI_ACCESS_READ, dev, where, &data))
187 eturn - 1;
188
189 data = (data & ~(0xffff << ((where & 3) << 3))) |
190 (val << ((where & 3) << 3));
191
192 if (it8172_pcibios_config_access
193 (PCI_ACCESS_WRITE, dev, where, &data))
194 return -1;
195
196 return PCIBIOS_SUCCESSFUL;
197
198 case 4:
199 if (where & 3)
200 return PCIBIOS_BAD_REGISTER_NUMBER;
201
202 if (it8172_pcibios_config_access
203 (PCI_ACCESS_WRITE, dev, where, &val))
204 return -1;
205
206 return PCIBIOS_SUCCESSFUL;
207 }
208}
209
210struct pci_ops it8172_pci_ops = {
211 .read = read_config,
212 .write = write_config,
213};
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