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authorRobin Getz <robin.getz@analog.com>2010-03-29 00:30:40 -0400
committerMike Frysinger <vapier@gentoo.org>2010-05-22 14:19:06 -0400
commita6d9dbf5e4daaf21b33917a809a5ac1e7bce9e05 (patch)
tree2ab2008bb02ebaf13564a94828e91579e02e006b /arch
parent5a132f7aeba772e1e1f9ccbad14a6779cd40cdfb (diff)
Blackfin: show the whole accumulator in the pseudo DBG insn
Rather than print just part of the accumulator register, show the whole 40 bits. This matches the simulator behavior better. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/blackfin/kernel/pseudodbg.c25
1 files changed, 19 insertions, 6 deletions
diff --git a/arch/blackfin/kernel/pseudodbg.c b/arch/blackfin/kernel/pseudodbg.c
index e57ce2f64bfe..db85bc94334e 100644
--- a/arch/blackfin/kernel/pseudodbg.c
+++ b/arch/blackfin/kernel/pseudodbg.c
@@ -158,7 +158,7 @@ bool execute_pseudodbg_assert(struct pt_regs *fp, unsigned int opcode)
158bool execute_pseudodbg(struct pt_regs *fp, unsigned int opcode) 158bool execute_pseudodbg(struct pt_regs *fp, unsigned int opcode)
159{ 159{
160 int grp, fn, reg; 160 int grp, fn, reg;
161 long value; 161 long value, value1;
162 162
163 if ((opcode & 0xFF000000) != PseudoDbg_opcode) 163 if ((opcode & 0xFF000000) != PseudoDbg_opcode)
164 return false; 164 return false;
@@ -168,11 +168,24 @@ bool execute_pseudodbg(struct pt_regs *fp, unsigned int opcode)
168 fn = ((opcode >> PseudoDbg_fn_bits) & PseudoDbg_fn_mask); 168 fn = ((opcode >> PseudoDbg_fn_bits) & PseudoDbg_fn_mask);
169 reg = ((opcode >> PseudoDbg_reg_bits) & PseudoDbg_reg_mask); 169 reg = ((opcode >> PseudoDbg_reg_bits) & PseudoDbg_reg_mask);
170 170
171 if (!fix_up_reg(fp, &value, grp, reg)) 171 if (fn == 3 && (reg == 0 || reg == 1)) {
172 return false; 172 if (!fix_up_reg(fp, &value, 4, 2 * reg))
173 return false;
174 if (!fix_up_reg(fp, &value1, 4, 2 * reg + 1))
175 return false;
173 176
174 pr_notice("DBG %s = %08lx\n", get_allreg_name(grp, reg), value); 177 pr_notice("DBG A%i = %02lx%08lx\n", reg, value & 0xFF, value1);
178 fp->pc += 2;
179 return true;
175 180
176 fp->pc += 2; 181 } else if (fn == 0) {
177 return true; 182 if (!fix_up_reg(fp, &value, grp, reg))
183 return false;
184
185 pr_notice("DBG %s = %08lx\n", get_allreg_name(grp, reg), value);
186 fp->pc += 2;
187 return true;
188 }
189
190 return false;
178} 191}