diff options
author | Segher Boessenkool <segher@kernel.crashing.org> | 2006-02-17 05:25:42 -0500 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2006-02-23 19:36:37 -0500 |
commit | 72b138198cd6307c679b35d677ed64105b94ab48 (patch) | |
tree | c48af4520274df67846647097eafaf45631d8bc5 /arch | |
parent | 7c375b9aba4cabaeb1ca8f82807d40fd0a37103a (diff) |
[PATCH] powerpc: Fix some MPIC + HT APIC buglets
Do disable, not enable, the HT APIC IRQ in the function that is
supposed to.
Enable the MPIC IRQ before enabling the downstream APIC IRQ, avoids
potentially losing an interrupt.
Signed-off-by: Segher Boessenkool <segher@kernel.crashing.org>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/powerpc/sysdev/mpic.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c index 4f26304d0263..7dcdfcb3c984 100644 --- a/arch/powerpc/sysdev/mpic.c +++ b/arch/powerpc/sysdev/mpic.c | |||
@@ -234,7 +234,7 @@ static void mpic_shutdown_ht_interrupt(struct mpic *mpic, unsigned int source, | |||
234 | spin_lock_irqsave(&mpic->fixup_lock, flags); | 234 | spin_lock_irqsave(&mpic->fixup_lock, flags); |
235 | writeb(0x10 + 2 * fixup->index, fixup->base + 2); | 235 | writeb(0x10 + 2 * fixup->index, fixup->base + 2); |
236 | tmp = readl(fixup->base + 4); | 236 | tmp = readl(fixup->base + 4); |
237 | tmp &= ~1U; | 237 | tmp |= 1; |
238 | writel(tmp, fixup->base + 4); | 238 | writel(tmp, fixup->base + 4); |
239 | spin_unlock_irqrestore(&mpic->fixup_lock, flags); | 239 | spin_unlock_irqrestore(&mpic->fixup_lock, flags); |
240 | } | 240 | } |
@@ -446,14 +446,15 @@ static unsigned int mpic_startup_irq(unsigned int irq) | |||
446 | #ifdef CONFIG_MPIC_BROKEN_U3 | 446 | #ifdef CONFIG_MPIC_BROKEN_U3 |
447 | struct mpic *mpic = mpic_from_irq(irq); | 447 | struct mpic *mpic = mpic_from_irq(irq); |
448 | unsigned int src = irq - mpic->irq_offset; | 448 | unsigned int src = irq - mpic->irq_offset; |
449 | #endif /* CONFIG_MPIC_BROKEN_U3 */ | ||
450 | |||
451 | mpic_enable_irq(irq); | ||
449 | 452 | ||
453 | #ifdef CONFIG_MPIC_BROKEN_U3 | ||
450 | if (mpic_is_ht_interrupt(mpic, src)) | 454 | if (mpic_is_ht_interrupt(mpic, src)) |
451 | mpic_startup_ht_interrupt(mpic, src, irq_desc[irq].status); | 455 | mpic_startup_ht_interrupt(mpic, src, irq_desc[irq].status); |
452 | |||
453 | #endif /* CONFIG_MPIC_BROKEN_U3 */ | 456 | #endif /* CONFIG_MPIC_BROKEN_U3 */ |
454 | 457 | ||
455 | mpic_enable_irq(irq); | ||
456 | |||
457 | return 0; | 458 | return 0; |
458 | } | 459 | } |
459 | 460 | ||