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authorLinus Torvalds <torvalds@evo.osdl.org>2005-09-06 08:16:24 -0400
committerLinus Torvalds <torvalds@evo.osdl.org>2005-09-06 08:16:24 -0400
commit4706df3d3c42af802597d82c8b1542c3d52eab23 (patch)
tree4c11ca2a72158cacce93ef6d2976af3a11ed314f /arch
parent5bcaa155797ab62ed363932ec0f02fbcb5db1ef1 (diff)
parentcebb2b156319990fc2fba615bbfeac81be62a86a (diff)
Merge master.kernel.org:/pub/scm/linux/kernel/git/paulus/ppc64-2.6
Diffstat (limited to 'arch')
-rw-r--r--arch/ppc64/kernel/Makefile8
-rw-r--r--arch/ppc64/kernel/btext.c1
-rw-r--r--arch/ppc64/kernel/cputable.c90
-rw-r--r--arch/ppc64/kernel/entry.S11
-rw-r--r--arch/ppc64/kernel/head.S9
-rw-r--r--arch/ppc64/kernel/lparcfg.c2
-rw-r--r--arch/ppc64/kernel/maple_setup.c3
-rw-r--r--arch/ppc64/kernel/pSeries_lpar.c18
-rw-r--r--arch/ppc64/kernel/pSeries_setup.c7
-rw-r--r--arch/ppc64/kernel/pmac_setup.c19
-rw-r--r--arch/ppc64/kernel/prom.c1
-rw-r--r--arch/ppc64/kernel/prom_init.c1
-rw-r--r--arch/ppc64/kernel/setup.c44
-rw-r--r--arch/ppc64/kernel/sysfs.c48
-rw-r--r--arch/ppc64/kernel/time.c1
-rw-r--r--arch/ppc64/kernel/udbg.c300
-rw-r--r--arch/ppc64/kernel/udbg_16550.c123
-rw-r--r--arch/ppc64/kernel/udbg_scc.c136
-rw-r--r--arch/ppc64/mm/hugetlbpage.c6
-rw-r--r--arch/ppc64/mm/init.c1
-rw-r--r--arch/ppc64/mm/slb.c4
-rw-r--r--arch/ppc64/oprofile/common.c58
-rw-r--r--arch/ppc64/oprofile/op_impl.h108
-rw-r--r--arch/ppc64/oprofile/op_model_power4.c12
-rw-r--r--arch/ppc64/oprofile/op_model_rs64.c3
-rw-r--r--arch/ppc64/xmon/start.c4
26 files changed, 480 insertions, 538 deletions
diff --git a/arch/ppc64/kernel/Makefile b/arch/ppc64/kernel/Makefile
index f4b3bfcc109d..ae60eb1193c6 100644
--- a/arch/ppc64/kernel/Makefile
+++ b/arch/ppc64/kernel/Makefile
@@ -31,7 +31,7 @@ obj-$(CONFIG_PPC_MULTIPLATFORM) += nvram.o i8259.o prom_init.o prom.o
31 31
32obj-$(CONFIG_PPC_PSERIES) += pSeries_pci.o pSeries_lpar.o pSeries_hvCall.o \ 32obj-$(CONFIG_PPC_PSERIES) += pSeries_pci.o pSeries_lpar.o pSeries_hvCall.o \
33 pSeries_nvram.o rtasd.o ras.o pSeries_reconfig.o \ 33 pSeries_nvram.o rtasd.o ras.o pSeries_reconfig.o \
34 pSeries_setup.o pSeries_iommu.o 34 pSeries_setup.o pSeries_iommu.o udbg_16550.o
35 35
36obj-$(CONFIG_PPC_BPA) += bpa_setup.o bpa_iommu.o bpa_nvram.o \ 36obj-$(CONFIG_PPC_BPA) += bpa_setup.o bpa_iommu.o bpa_nvram.o \
37 bpa_iic.o spider-pic.o 37 bpa_iic.o spider-pic.o
@@ -58,9 +58,11 @@ obj-$(CONFIG_XICS) += xics.o
58obj-$(CONFIG_MPIC) += mpic.o 58obj-$(CONFIG_MPIC) += mpic.o
59 59
60obj-$(CONFIG_PPC_PMAC) += pmac_setup.o pmac_feature.o pmac_pci.o \ 60obj-$(CONFIG_PPC_PMAC) += pmac_setup.o pmac_feature.o pmac_pci.o \
61 pmac_time.o pmac_nvram.o pmac_low_i2c.o 61 pmac_time.o pmac_nvram.o pmac_low_i2c.o \
62 udbg_scc.o
62 63
63obj-$(CONFIG_PPC_MAPLE) += maple_setup.o maple_pci.o maple_time.o 64obj-$(CONFIG_PPC_MAPLE) += maple_setup.o maple_pci.o maple_time.o \
65 udbg_16550.o
64 66
65obj-$(CONFIG_U3_DART) += u3_iommu.o 67obj-$(CONFIG_U3_DART) += u3_iommu.o
66 68
diff --git a/arch/ppc64/kernel/btext.c b/arch/ppc64/kernel/btext.c
index c53f079e9b77..b6fbfbe9032d 100644
--- a/arch/ppc64/kernel/btext.c
+++ b/arch/ppc64/kernel/btext.c
@@ -7,7 +7,6 @@
7#include <linux/kernel.h> 7#include <linux/kernel.h>
8#include <linux/string.h> 8#include <linux/string.h>
9#include <linux/init.h> 9#include <linux/init.h>
10#include <linux/version.h>
11 10
12#include <asm/sections.h> 11#include <asm/sections.h>
13#include <asm/prom.h> 12#include <asm/prom.h>
diff --git a/arch/ppc64/kernel/cputable.c b/arch/ppc64/kernel/cputable.c
index 4847f2ac8c9f..8831a28c3c4e 100644
--- a/arch/ppc64/kernel/cputable.c
+++ b/arch/ppc64/kernel/cputable.c
@@ -19,6 +19,7 @@
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/module.h> 20#include <linux/module.h>
21 21
22#include <asm/oprofile_impl.h>
22#include <asm/cputable.h> 23#include <asm/cputable.h>
23 24
24struct cpu_spec* cur_cpu_spec = NULL; 25struct cpu_spec* cur_cpu_spec = NULL;
@@ -54,24 +55,32 @@ struct cpu_spec cpu_specs[] = {
54 .pvr_value = 0x00400000, 55 .pvr_value = 0x00400000,
55 .cpu_name = "POWER3 (630)", 56 .cpu_name = "POWER3 (630)",
56 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 57 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
57 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR | 58 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR,
58 CPU_FTR_PMC8,
59 .cpu_user_features = COMMON_USER_PPC64, 59 .cpu_user_features = COMMON_USER_PPC64,
60 .icache_bsize = 128, 60 .icache_bsize = 128,
61 .dcache_bsize = 128, 61 .dcache_bsize = 128,
62 .num_pmcs = 8,
62 .cpu_setup = __setup_cpu_power3, 63 .cpu_setup = __setup_cpu_power3,
64#ifdef CONFIG_OPROFILE
65 .oprofile_cpu_type = "ppc64/power3",
66 .oprofile_model = &op_model_rs64,
67#endif
63 }, 68 },
64 { /* Power3+ */ 69 { /* Power3+ */
65 .pvr_mask = 0xffff0000, 70 .pvr_mask = 0xffff0000,
66 .pvr_value = 0x00410000, 71 .pvr_value = 0x00410000,
67 .cpu_name = "POWER3 (630+)", 72 .cpu_name = "POWER3 (630+)",
68 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 73 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
69 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR | 74 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR,
70 CPU_FTR_PMC8,
71 .cpu_user_features = COMMON_USER_PPC64, 75 .cpu_user_features = COMMON_USER_PPC64,
72 .icache_bsize = 128, 76 .icache_bsize = 128,
73 .dcache_bsize = 128, 77 .dcache_bsize = 128,
78 .num_pmcs = 8,
74 .cpu_setup = __setup_cpu_power3, 79 .cpu_setup = __setup_cpu_power3,
80#ifdef CONFIG_OPROFILE
81 .oprofile_cpu_type = "ppc64/power3",
82 .oprofile_model = &op_model_rs64,
83#endif
75 }, 84 },
76 { /* Northstar */ 85 { /* Northstar */
77 .pvr_mask = 0xffff0000, 86 .pvr_mask = 0xffff0000,
@@ -79,11 +88,16 @@ struct cpu_spec cpu_specs[] = {
79 .cpu_name = "RS64-II (northstar)", 88 .cpu_name = "RS64-II (northstar)",
80 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 89 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
81 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR | 90 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR |
82 CPU_FTR_PMC8 | CPU_FTR_MMCRA | CPU_FTR_CTRL, 91 CPU_FTR_MMCRA | CPU_FTR_CTRL,
83 .cpu_user_features = COMMON_USER_PPC64, 92 .cpu_user_features = COMMON_USER_PPC64,
84 .icache_bsize = 128, 93 .icache_bsize = 128,
85 .dcache_bsize = 128, 94 .dcache_bsize = 128,
95 .num_pmcs = 8,
86 .cpu_setup = __setup_cpu_power3, 96 .cpu_setup = __setup_cpu_power3,
97#ifdef CONFIG_OPROFILE
98 .oprofile_cpu_type = "ppc64/rs64",
99 .oprofile_model = &op_model_rs64,
100#endif
87 }, 101 },
88 { /* Pulsar */ 102 { /* Pulsar */
89 .pvr_mask = 0xffff0000, 103 .pvr_mask = 0xffff0000,
@@ -91,11 +105,16 @@ struct cpu_spec cpu_specs[] = {
91 .cpu_name = "RS64-III (pulsar)", 105 .cpu_name = "RS64-III (pulsar)",
92 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 106 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
93 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR | 107 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR |
94 CPU_FTR_PMC8 | CPU_FTR_MMCRA | CPU_FTR_CTRL, 108 CPU_FTR_MMCRA | CPU_FTR_CTRL,
95 .cpu_user_features = COMMON_USER_PPC64, 109 .cpu_user_features = COMMON_USER_PPC64,
96 .icache_bsize = 128, 110 .icache_bsize = 128,
97 .dcache_bsize = 128, 111 .dcache_bsize = 128,
112 .num_pmcs = 8,
98 .cpu_setup = __setup_cpu_power3, 113 .cpu_setup = __setup_cpu_power3,
114#ifdef CONFIG_OPROFILE
115 .oprofile_cpu_type = "ppc64/rs64",
116 .oprofile_model = &op_model_rs64,
117#endif
99 }, 118 },
100 { /* I-star */ 119 { /* I-star */
101 .pvr_mask = 0xffff0000, 120 .pvr_mask = 0xffff0000,
@@ -103,11 +122,16 @@ struct cpu_spec cpu_specs[] = {
103 .cpu_name = "RS64-III (icestar)", 122 .cpu_name = "RS64-III (icestar)",
104 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 123 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
105 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR | 124 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR |
106 CPU_FTR_PMC8 | CPU_FTR_MMCRA | CPU_FTR_CTRL, 125 CPU_FTR_MMCRA | CPU_FTR_CTRL,
107 .cpu_user_features = COMMON_USER_PPC64, 126 .cpu_user_features = COMMON_USER_PPC64,
108 .icache_bsize = 128, 127 .icache_bsize = 128,
109 .dcache_bsize = 128, 128 .dcache_bsize = 128,
129 .num_pmcs = 8,
110 .cpu_setup = __setup_cpu_power3, 130 .cpu_setup = __setup_cpu_power3,
131#ifdef CONFIG_OPROFILE
132 .oprofile_cpu_type = "ppc64/rs64",
133 .oprofile_model = &op_model_rs64,
134#endif
111 }, 135 },
112 { /* S-star */ 136 { /* S-star */
113 .pvr_mask = 0xffff0000, 137 .pvr_mask = 0xffff0000,
@@ -115,11 +139,16 @@ struct cpu_spec cpu_specs[] = {
115 .cpu_name = "RS64-IV (sstar)", 139 .cpu_name = "RS64-IV (sstar)",
116 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 140 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
117 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR | 141 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR |
118 CPU_FTR_PMC8 | CPU_FTR_MMCRA | CPU_FTR_CTRL, 142 CPU_FTR_MMCRA | CPU_FTR_CTRL,
119 .cpu_user_features = COMMON_USER_PPC64, 143 .cpu_user_features = COMMON_USER_PPC64,
120 .icache_bsize = 128, 144 .icache_bsize = 128,
121 .dcache_bsize = 128, 145 .dcache_bsize = 128,
146 .num_pmcs = 8,
122 .cpu_setup = __setup_cpu_power3, 147 .cpu_setup = __setup_cpu_power3,
148#ifdef CONFIG_OPROFILE
149 .oprofile_cpu_type = "ppc64/rs64",
150 .oprofile_model = &op_model_rs64,
151#endif
123 }, 152 },
124 { /* Power4 */ 153 { /* Power4 */
125 .pvr_mask = 0xffff0000, 154 .pvr_mask = 0xffff0000,
@@ -127,11 +156,16 @@ struct cpu_spec cpu_specs[] = {
127 .cpu_name = "POWER4 (gp)", 156 .cpu_name = "POWER4 (gp)",
128 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 157 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
129 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | 158 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
130 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_PMC8 | CPU_FTR_MMCRA, 159 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_MMCRA,
131 .cpu_user_features = COMMON_USER_PPC64, 160 .cpu_user_features = COMMON_USER_PPC64,
132 .icache_bsize = 128, 161 .icache_bsize = 128,
133 .dcache_bsize = 128, 162 .dcache_bsize = 128,
163 .num_pmcs = 8,
134 .cpu_setup = __setup_cpu_power4, 164 .cpu_setup = __setup_cpu_power4,
165#ifdef CONFIG_OPROFILE
166 .oprofile_cpu_type = "ppc64/power4",
167 .oprofile_model = &op_model_rs64,
168#endif
135 }, 169 },
136 { /* Power4+ */ 170 { /* Power4+ */
137 .pvr_mask = 0xffff0000, 171 .pvr_mask = 0xffff0000,
@@ -139,11 +173,16 @@ struct cpu_spec cpu_specs[] = {
139 .cpu_name = "POWER4+ (gq)", 173 .cpu_name = "POWER4+ (gq)",
140 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 174 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
141 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | 175 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
142 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_PMC8 | CPU_FTR_MMCRA, 176 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_MMCRA,
143 .cpu_user_features = COMMON_USER_PPC64, 177 .cpu_user_features = COMMON_USER_PPC64,
144 .icache_bsize = 128, 178 .icache_bsize = 128,
145 .dcache_bsize = 128, 179 .dcache_bsize = 128,
180 .num_pmcs = 8,
146 .cpu_setup = __setup_cpu_power4, 181 .cpu_setup = __setup_cpu_power4,
182#ifdef CONFIG_OPROFILE
183 .oprofile_cpu_type = "ppc64/power4",
184 .oprofile_model = &op_model_power4,
185#endif
147 }, 186 },
148 { /* PPC970 */ 187 { /* PPC970 */
149 .pvr_mask = 0xffff0000, 188 .pvr_mask = 0xffff0000,
@@ -152,12 +191,17 @@ struct cpu_spec cpu_specs[] = {
152 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 191 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
153 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | 192 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
154 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_ALTIVEC_COMP | 193 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_ALTIVEC_COMP |
155 CPU_FTR_CAN_NAP | CPU_FTR_PMC8 | CPU_FTR_MMCRA, 194 CPU_FTR_CAN_NAP | CPU_FTR_MMCRA,
156 .cpu_user_features = COMMON_USER_PPC64 | 195 .cpu_user_features = COMMON_USER_PPC64 |
157 PPC_FEATURE_HAS_ALTIVEC_COMP, 196 PPC_FEATURE_HAS_ALTIVEC_COMP,
158 .icache_bsize = 128, 197 .icache_bsize = 128,
159 .dcache_bsize = 128, 198 .dcache_bsize = 128,
199 .num_pmcs = 8,
160 .cpu_setup = __setup_cpu_ppc970, 200 .cpu_setup = __setup_cpu_ppc970,
201#ifdef CONFIG_OPROFILE
202 .oprofile_cpu_type = "ppc64/970",
203 .oprofile_model = &op_model_power4,
204#endif
161 }, 205 },
162 { /* PPC970FX */ 206 { /* PPC970FX */
163 .pvr_mask = 0xffff0000, 207 .pvr_mask = 0xffff0000,
@@ -166,12 +210,17 @@ struct cpu_spec cpu_specs[] = {
166 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 210 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
167 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | 211 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
168 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_ALTIVEC_COMP | 212 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_ALTIVEC_COMP |
169 CPU_FTR_CAN_NAP | CPU_FTR_PMC8 | CPU_FTR_MMCRA, 213 CPU_FTR_CAN_NAP | CPU_FTR_MMCRA,
170 .cpu_user_features = COMMON_USER_PPC64 | 214 .cpu_user_features = COMMON_USER_PPC64 |
171 PPC_FEATURE_HAS_ALTIVEC_COMP, 215 PPC_FEATURE_HAS_ALTIVEC_COMP,
172 .icache_bsize = 128, 216 .icache_bsize = 128,
173 .dcache_bsize = 128, 217 .dcache_bsize = 128,
218 .num_pmcs = 8,
174 .cpu_setup = __setup_cpu_ppc970, 219 .cpu_setup = __setup_cpu_ppc970,
220#ifdef CONFIG_OPROFILE
221 .oprofile_cpu_type = "ppc64/970",
222 .oprofile_model = &op_model_power4,
223#endif
175 }, 224 },
176 { /* PPC970MP */ 225 { /* PPC970MP */
177 .pvr_mask = 0xffff0000, 226 .pvr_mask = 0xffff0000,
@@ -180,12 +229,16 @@ struct cpu_spec cpu_specs[] = {
180 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 229 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
181 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | 230 CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
182 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_ALTIVEC_COMP | 231 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_ALTIVEC_COMP |
183 CPU_FTR_CAN_NAP | CPU_FTR_PMC8 | CPU_FTR_MMCRA, 232 CPU_FTR_CAN_NAP | CPU_FTR_MMCRA,
184 .cpu_user_features = COMMON_USER_PPC64 | 233 .cpu_user_features = COMMON_USER_PPC64 |
185 PPC_FEATURE_HAS_ALTIVEC_COMP, 234 PPC_FEATURE_HAS_ALTIVEC_COMP,
186 .icache_bsize = 128, 235 .icache_bsize = 128,
187 .dcache_bsize = 128, 236 .dcache_bsize = 128,
188 .cpu_setup = __setup_cpu_ppc970, 237 .cpu_setup = __setup_cpu_ppc970,
238#ifdef CONFIG_OPROFILE
239 .oprofile_cpu_type = "ppc64/970",
240 .oprofile_model = &op_model_power4,
241#endif
189 }, 242 },
190 { /* Power5 */ 243 { /* Power5 */
191 .pvr_mask = 0xffff0000, 244 .pvr_mask = 0xffff0000,
@@ -199,7 +252,12 @@ struct cpu_spec cpu_specs[] = {
199 .cpu_user_features = COMMON_USER_PPC64, 252 .cpu_user_features = COMMON_USER_PPC64,
200 .icache_bsize = 128, 253 .icache_bsize = 128,
201 .dcache_bsize = 128, 254 .dcache_bsize = 128,
255 .num_pmcs = 6,
202 .cpu_setup = __setup_cpu_power4, 256 .cpu_setup = __setup_cpu_power4,
257#ifdef CONFIG_OPROFILE
258 .oprofile_cpu_type = "ppc64/power5",
259 .oprofile_model = &op_model_power4,
260#endif
203 }, 261 },
204 { /* Power5 */ 262 { /* Power5 */
205 .pvr_mask = 0xffff0000, 263 .pvr_mask = 0xffff0000,
@@ -213,7 +271,12 @@ struct cpu_spec cpu_specs[] = {
213 .cpu_user_features = COMMON_USER_PPC64, 271 .cpu_user_features = COMMON_USER_PPC64,
214 .icache_bsize = 128, 272 .icache_bsize = 128,
215 .dcache_bsize = 128, 273 .dcache_bsize = 128,
274 .num_pmcs = 6,
216 .cpu_setup = __setup_cpu_power4, 275 .cpu_setup = __setup_cpu_power4,
276#ifdef CONFIG_OPROFILE
277 .oprofile_cpu_type = "ppc64/power5",
278 .oprofile_model = &op_model_power4,
279#endif
217 }, 280 },
218 { /* BE DD1.x */ 281 { /* BE DD1.x */
219 .pvr_mask = 0xffff0000, 282 .pvr_mask = 0xffff0000,
@@ -239,6 +302,7 @@ struct cpu_spec cpu_specs[] = {
239 .cpu_user_features = COMMON_USER_PPC64, 302 .cpu_user_features = COMMON_USER_PPC64,
240 .icache_bsize = 128, 303 .icache_bsize = 128,
241 .dcache_bsize = 128, 304 .dcache_bsize = 128,
305 .num_pmcs = 6,
242 .cpu_setup = __setup_cpu_power4, 306 .cpu_setup = __setup_cpu_power4,
243 } 307 }
244}; 308};
diff --git a/arch/ppc64/kernel/entry.S b/arch/ppc64/kernel/entry.S
index b61572eb2a71..bf99b4a92f20 100644
--- a/arch/ppc64/kernel/entry.S
+++ b/arch/ppc64/kernel/entry.S
@@ -400,15 +400,14 @@ BEGIN_FTR_SECTION
400 cmpd cr1,r6,r9 /* or is new ESID the same as current ESID? */ 400 cmpd cr1,r6,r9 /* or is new ESID the same as current ESID? */
401 cror eq,4*cr1+eq,eq 401 cror eq,4*cr1+eq,eq
402 beq 2f /* if yes, don't slbie it */ 402 beq 2f /* if yes, don't slbie it */
403 oris r0,r6,0x0800 /* set C (class) bit */
404 403
405 /* Bolt in the new stack SLB entry */ 404 /* Bolt in the new stack SLB entry */
406 ld r7,KSP_VSID(r4) /* Get new stack's VSID */ 405 ld r7,KSP_VSID(r4) /* Get new stack's VSID */
407 oris r6,r6,(SLB_ESID_V)@h 406 oris r0,r6,(SLB_ESID_V)@h
408 ori r6,r6,(SLB_NUM_BOLTED-1)@l 407 ori r0,r0,(SLB_NUM_BOLTED-1)@l
409 slbie r0 408 slbie r6
410 slbie r0 /* Workaround POWER5 < DD2.1 issue */ 409 slbie r6 /* Workaround POWER5 < DD2.1 issue */
411 slbmte r7,r6 410 slbmte r7,r0
412 isync 411 isync
413 412
4142: 4132:
diff --git a/arch/ppc64/kernel/head.S b/arch/ppc64/kernel/head.S
index 036959775623..b436206e317d 100644
--- a/arch/ppc64/kernel/head.S
+++ b/arch/ppc64/kernel/head.S
@@ -1646,8 +1646,9 @@ _GLOBAL(__secondary_start)
1646#else 1646#else
1647 /* set the ASR */ 1647 /* set the ASR */
1648 ld r3,systemcfg@got(r2) /* r3 = ptr to systemcfg */ 1648 ld r3,systemcfg@got(r2) /* r3 = ptr to systemcfg */
1649 ld r3,0(r3)
1649 lwz r3,PLATFORM(r3) /* r3 = platform flags */ 1650 lwz r3,PLATFORM(r3) /* r3 = platform flags */
1650 cmpldi r3,PLATFORM_PSERIES_LPAR 1651 andi. r3,r3,PLATFORM_LPAR /* Test if bit 0 is set (LPAR bit) */
1651 bne 98f 1652 bne 98f
1652 mfspr r3,PVR 1653 mfspr r3,PVR
1653 srwi r3,r3,16 1654 srwi r3,r3,16
@@ -1809,8 +1810,9 @@ _STATIC(start_here_multiplatform)
1809 ld r3,PACASTABREAL(r13) 1810 ld r3,PACASTABREAL(r13)
1810 ori r4,r3,1 /* turn on valid bit */ 1811 ori r4,r3,1 /* turn on valid bit */
1811 ld r3,systemcfg@got(r2) /* r3 = ptr to systemcfg */ 1812 ld r3,systemcfg@got(r2) /* r3 = ptr to systemcfg */
1813 ld r3,0(r3)
1812 lwz r3,PLATFORM(r3) /* r3 = platform flags */ 1814 lwz r3,PLATFORM(r3) /* r3 = platform flags */
1813 cmpldi r3,PLATFORM_PSERIES_LPAR 1815 andi. r3,r3,PLATFORM_LPAR /* Test if bit 0 is set (LPAR bit) */
1814 bne 98f 1816 bne 98f
1815 mfspr r3,PVR 1817 mfspr r3,PVR
1816 srwi r3,r3,16 1818 srwi r3,r3,16
@@ -1828,9 +1830,10 @@ _STATIC(start_here_multiplatform)
182899: 183099:
1829 /* Set SDR1 (hash table pointer) */ 1831 /* Set SDR1 (hash table pointer) */
1830 ld r3,systemcfg@got(r2) /* r3 = ptr to systemcfg */ 1832 ld r3,systemcfg@got(r2) /* r3 = ptr to systemcfg */
1833 ld r3,0(r3)
1831 lwz r3,PLATFORM(r3) /* r3 = platform flags */ 1834 lwz r3,PLATFORM(r3) /* r3 = platform flags */
1832 /* Test if bit 0 is set (LPAR bit) */ 1835 /* Test if bit 0 is set (LPAR bit) */
1833 andi. r3,r3,0x1 1836 andi. r3,r3,PLATFORM_LPAR
1834 bne 98f 1837 bne 98f
1835 LOADADDR(r6,_SDR1) /* Only if NOT LPAR */ 1838 LOADADDR(r6,_SDR1) /* Only if NOT LPAR */
1836 sub r6,r6,r26 1839 sub r6,r6,r26
diff --git a/arch/ppc64/kernel/lparcfg.c b/arch/ppc64/kernel/lparcfg.c
index edad361a8db0..cae19bbd5acd 100644
--- a/arch/ppc64/kernel/lparcfg.c
+++ b/arch/ppc64/kernel/lparcfg.c
@@ -569,7 +569,7 @@ struct file_operations lparcfg_fops = {
569int __init lparcfg_init(void) 569int __init lparcfg_init(void)
570{ 570{
571 struct proc_dir_entry *ent; 571 struct proc_dir_entry *ent;
572 mode_t mode = S_IRUSR; 572 mode_t mode = S_IRUSR | S_IRGRP | S_IROTH;
573 573
574 /* Allow writing if we have FW_FEATURE_SPLPAR */ 574 /* Allow writing if we have FW_FEATURE_SPLPAR */
575 if (firmware_has_feature(FW_FEATURE_SPLPAR)) { 575 if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
diff --git a/arch/ppc64/kernel/maple_setup.c b/arch/ppc64/kernel/maple_setup.c
index bb55b5a56910..fc0567498a3a 100644
--- a/arch/ppc64/kernel/maple_setup.c
+++ b/arch/ppc64/kernel/maple_setup.c
@@ -207,9 +207,6 @@ static void __init maple_init_early(void)
207 comport = (void *)ioremap(physport, 16); 207 comport = (void *)ioremap(physport, 16);
208 udbg_init_uart(comport, default_speed); 208 udbg_init_uart(comport, default_speed);
209 209
210 ppc_md.udbg_putc = udbg_putc;
211 ppc_md.udbg_getc = udbg_getc;
212 ppc_md.udbg_getc_poll = udbg_getc_poll;
213 DBG("Hello World !\n"); 210 DBG("Hello World !\n");
214 } 211 }
215 212
diff --git a/arch/ppc64/kernel/pSeries_lpar.c b/arch/ppc64/kernel/pSeries_lpar.c
index a1d5fdfea4a8..a6de83f2078f 100644
--- a/arch/ppc64/kernel/pSeries_lpar.c
+++ b/arch/ppc64/kernel/pSeries_lpar.c
@@ -192,9 +192,9 @@ static unsigned char udbg_getcLP(void)
192void udbg_init_debug_lpar(void) 192void udbg_init_debug_lpar(void)
193{ 193{
194 vtermno = 0; 194 vtermno = 0;
195 ppc_md.udbg_putc = udbg_putcLP; 195 udbg_putc = udbg_putcLP;
196 ppc_md.udbg_getc = udbg_getcLP; 196 udbg_getc = udbg_getcLP;
197 ppc_md.udbg_getc_poll = udbg_getc_pollLP; 197 udbg_getc_poll = udbg_getc_pollLP;
198} 198}
199 199
200/* returns 0 if couldn't find or use /chosen/stdout as console */ 200/* returns 0 if couldn't find or use /chosen/stdout as console */
@@ -227,18 +227,18 @@ int find_udbg_vterm(void)
227 termno = (u32 *)get_property(stdout_node, "reg", NULL); 227 termno = (u32 *)get_property(stdout_node, "reg", NULL);
228 if (termno) { 228 if (termno) {
229 vtermno = termno[0]; 229 vtermno = termno[0];
230 ppc_md.udbg_putc = udbg_putcLP; 230 udbg_putc = udbg_putcLP;
231 ppc_md.udbg_getc = udbg_getcLP; 231 udbg_getc = udbg_getcLP;
232 ppc_md.udbg_getc_poll = udbg_getc_pollLP; 232 udbg_getc_poll = udbg_getc_pollLP;
233 found = 1; 233 found = 1;
234 } 234 }
235 } else if (device_is_compatible(stdout_node, "hvterm-protocol")) { 235 } else if (device_is_compatible(stdout_node, "hvterm-protocol")) {
236 termno = (u32 *)get_property(stdout_node, "reg", NULL); 236 termno = (u32 *)get_property(stdout_node, "reg", NULL);
237 if (termno) { 237 if (termno) {
238 vtermno = termno[0]; 238 vtermno = termno[0];
239 ppc_md.udbg_putc = udbg_hvsi_putc; 239 udbg_putc = udbg_hvsi_putc;
240 ppc_md.udbg_getc = udbg_hvsi_getc; 240 udbg_getc = udbg_hvsi_getc;
241 ppc_md.udbg_getc_poll = udbg_hvsi_getc_poll; 241 udbg_getc_poll = udbg_hvsi_getc_poll;
242 found = 1; 242 found = 1;
243 } 243 }
244 } 244 }
diff --git a/arch/ppc64/kernel/pSeries_setup.c b/arch/ppc64/kernel/pSeries_setup.c
index f0f0630cf07c..9490b6c5b173 100644
--- a/arch/ppc64/kernel/pSeries_setup.c
+++ b/arch/ppc64/kernel/pSeries_setup.c
@@ -37,7 +37,7 @@
37#include <linux/ioport.h> 37#include <linux/ioport.h>
38#include <linux/console.h> 38#include <linux/console.h>
39#include <linux/pci.h> 39#include <linux/pci.h>
40#include <linux/version.h> 40#include <linux/utsname.h>
41#include <linux/adb.h> 41#include <linux/adb.h>
42#include <linux/module.h> 42#include <linux/module.h>
43#include <linux/delay.h> 43#include <linux/delay.h>
@@ -272,7 +272,7 @@ static int __init pSeries_init_panel(void)
272{ 272{
273 /* Manually leave the kernel version on the panel. */ 273 /* Manually leave the kernel version on the panel. */
274 ppc_md.progress("Linux ppc64\n", 0); 274 ppc_md.progress("Linux ppc64\n", 0);
275 ppc_md.progress(UTS_RELEASE, 0); 275 ppc_md.progress(system_utsname.version, 0);
276 276
277 return 0; 277 return 0;
278} 278}
@@ -397,9 +397,6 @@ static void __init pSeries_init_early(void)
397 comport = (void *)ioremap(physport, 16); 397 comport = (void *)ioremap(physport, 16);
398 udbg_init_uart(comport, default_speed); 398 udbg_init_uart(comport, default_speed);
399 399
400 ppc_md.udbg_putc = udbg_putc;
401 ppc_md.udbg_getc = udbg_getc;
402 ppc_md.udbg_getc_poll = udbg_getc_poll;
403 DBG("Hello World !\n"); 400 DBG("Hello World !\n");
404 } 401 }
405 402
diff --git a/arch/ppc64/kernel/pmac_setup.c b/arch/ppc64/kernel/pmac_setup.c
index 8ff86a766cdf..e7f695dcd8c8 100644
--- a/arch/ppc64/kernel/pmac_setup.c
+++ b/arch/ppc64/kernel/pmac_setup.c
@@ -274,16 +274,6 @@ static void __pmac pmac_halt(void)
274} 274}
275 275
276#ifdef CONFIG_BOOTX_TEXT 276#ifdef CONFIG_BOOTX_TEXT
277static int dummy_getc_poll(void)
278{
279 return -1;
280}
281
282static unsigned char dummy_getc(void)
283{
284 return 0;
285}
286
287static void btext_putc(unsigned char c) 277static void btext_putc(unsigned char c)
288{ 278{
289 btext_drawchar(c); 279 btext_drawchar(c);
@@ -342,16 +332,13 @@ static void __init pmac_init_early(void)
342 sccdbg = 1; 332 sccdbg = 1;
343 udbg_init_scc(NULL); 333 udbg_init_scc(NULL);
344 } 334 }
345
346 else {
347#ifdef CONFIG_BOOTX_TEXT 335#ifdef CONFIG_BOOTX_TEXT
336 else {
348 init_boot_display(); 337 init_boot_display();
349 338
350 ppc_md.udbg_putc = btext_putc; 339 udbg_putc = btext_putc;
351 ppc_md.udbg_getc = dummy_getc;
352 ppc_md.udbg_getc_poll = dummy_getc_poll;
353#endif /* CONFIG_BOOTX_TEXT */
354 } 340 }
341#endif /* CONFIG_BOOTX_TEXT */
355 342
356 /* Setup interrupt mapping options */ 343 /* Setup interrupt mapping options */
357 ppc64_interrupt_controller = IC_OPEN_PIC; 344 ppc64_interrupt_controller = IC_OPEN_PIC;
diff --git a/arch/ppc64/kernel/prom.c b/arch/ppc64/kernel/prom.c
index b21848826791..6ad5a8467f87 100644
--- a/arch/ppc64/kernel/prom.c
+++ b/arch/ppc64/kernel/prom.c
@@ -22,7 +22,6 @@
22#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/string.h> 23#include <linux/string.h>
24#include <linux/init.h> 24#include <linux/init.h>
25#include <linux/version.h>
26#include <linux/threads.h> 25#include <linux/threads.h>
27#include <linux/spinlock.h> 26#include <linux/spinlock.h>
28#include <linux/types.h> 27#include <linux/types.h>
diff --git a/arch/ppc64/kernel/prom_init.c b/arch/ppc64/kernel/prom_init.c
index 122283a1d39a..9979919cdf92 100644
--- a/arch/ppc64/kernel/prom_init.c
+++ b/arch/ppc64/kernel/prom_init.c
@@ -22,7 +22,6 @@
22#include <linux/kernel.h> 22#include <linux/kernel.h>
23#include <linux/string.h> 23#include <linux/string.h>
24#include <linux/init.h> 24#include <linux/init.h>
25#include <linux/version.h>
26#include <linux/threads.h> 25#include <linux/threads.h>
27#include <linux/spinlock.h> 26#include <linux/spinlock.h>
28#include <linux/types.h> 27#include <linux/types.h>
diff --git a/arch/ppc64/kernel/setup.c b/arch/ppc64/kernel/setup.c
index ee3b20de2e7a..d0bb68af0ea4 100644
--- a/arch/ppc64/kernel/setup.c
+++ b/arch/ppc64/kernel/setup.c
@@ -25,7 +25,7 @@
25#include <linux/seq_file.h> 25#include <linux/seq_file.h>
26#include <linux/ioport.h> 26#include <linux/ioport.h>
27#include <linux/console.h> 27#include <linux/console.h>
28#include <linux/version.h> 28#include <linux/utsname.h>
29#include <linux/tty.h> 29#include <linux/tty.h>
30#include <linux/root_dev.h> 30#include <linux/root_dev.h>
31#include <linux/notifier.h> 31#include <linux/notifier.h>
@@ -89,7 +89,7 @@ extern void udbg_init_maple_realmode(void);
89#define EARLY_DEBUG_INIT() udbg_init_maple_realmode() 89#define EARLY_DEBUG_INIT() udbg_init_maple_realmode()
90#define EARLY_DEBUG_INIT() udbg_init_pmac_realmode() 90#define EARLY_DEBUG_INIT() udbg_init_pmac_realmode()
91#define EARLY_DEBUG_INIT() \ 91#define EARLY_DEBUG_INIT() \
92 do { ppc_md.udbg_putc = call_rtas_display_status_delay; } while(0) 92 do { udbg_putc = call_rtas_display_status_delay; } while(0)
93#endif 93#endif
94 94
95/* extern void *stab; */ 95/* extern void *stab; */
@@ -108,7 +108,6 @@ int boot_cpuid = 0;
108int boot_cpuid_phys = 0; 108int boot_cpuid_phys = 0;
109dev_t boot_dev; 109dev_t boot_dev;
110u64 ppc64_pft_size; 110u64 ppc64_pft_size;
111u64 ppc64_debug_switch;
112 111
113struct ppc64_caches ppc64_caches; 112struct ppc64_caches ppc64_caches;
114EXPORT_SYMBOL_GPL(ppc64_caches); 113EXPORT_SYMBOL_GPL(ppc64_caches);
@@ -154,34 +153,6 @@ struct screen_info screen_info = {
154 .orig_video_points = 16 153 .orig_video_points = 16
155}; 154};
156 155
157/*
158 * Initialize the PPCDBG state. Called before relocation has been enabled.
159 */
160void __init ppcdbg_initialize(void)
161{
162 ppc64_debug_switch = PPC_DEBUG_DEFAULT; /* | PPCDBG_BUSWALK | */
163 /* PPCDBG_PHBINIT | PPCDBG_MM | PPCDBG_MMINIT | PPCDBG_TCEINIT | PPCDBG_TCE */;
164}
165
166/*
167 * Early boot console based on udbg
168 */
169static struct console udbg_console = {
170 .name = "udbg",
171 .write = udbg_console_write,
172 .flags = CON_PRINTBUFFER,
173 .index = -1,
174};
175static int early_console_initialized;
176
177void __init disable_early_printk(void)
178{
179 if (!early_console_initialized)
180 return;
181 unregister_console(&udbg_console);
182 early_console_initialized = 0;
183}
184
185#if defined(CONFIG_PPC_MULTIPLATFORM) && defined(CONFIG_SMP) 156#if defined(CONFIG_PPC_MULTIPLATFORM) && defined(CONFIG_SMP)
186 157
187static int smt_enabled_cmdline; 158static int smt_enabled_cmdline;
@@ -425,12 +396,6 @@ void __init early_setup(unsigned long dt_ptr)
425 } 396 }
426 ppc_md = **mach; 397 ppc_md = **mach;
427 398
428 /* our udbg callbacks got overriden by the above, let's put them
429 * back in. Ultimately, I want those things to be split from the
430 * main ppc_md
431 */
432 EARLY_DEBUG_INIT();
433
434 DBG("Found, Initializing memory management...\n"); 399 DBG("Found, Initializing memory management...\n");
435 400
436 /* 401 /*
@@ -636,8 +601,7 @@ void __init setup_system(void)
636 /* 601 /*
637 * Register early console 602 * Register early console
638 */ 603 */
639 early_console_initialized = 1; 604 register_early_udbg_console();
640 register_console(&udbg_console);
641 605
642 /* Save unparsed command line copy for /proc/cmdline */ 606 /* Save unparsed command line copy for /proc/cmdline */
643 strlcpy(saved_command_line, cmd_line, COMMAND_LINE_SIZE); 607 strlcpy(saved_command_line, cmd_line, COMMAND_LINE_SIZE);
@@ -657,7 +621,7 @@ void __init setup_system(void)
657 smp_release_cpus(); 621 smp_release_cpus();
658#endif /* defined(CONFIG_SMP) && !defined(CONFIG_PPC_ISERIES) */ 622#endif /* defined(CONFIG_SMP) && !defined(CONFIG_PPC_ISERIES) */
659 623
660 printk("Starting Linux PPC64 %s\n", UTS_RELEASE); 624 printk("Starting Linux PPC64 %s\n", system_utsname.version);
661 625
662 printk("-----------------------------------------------------\n"); 626 printk("-----------------------------------------------------\n");
663 printk("ppc64_pft_size = 0x%lx\n", ppc64_pft_size); 627 printk("ppc64_pft_size = 0x%lx\n", ppc64_pft_size);
diff --git a/arch/ppc64/kernel/sysfs.c b/arch/ppc64/kernel/sysfs.c
index f311ee7c0070..6654b350979c 100644
--- a/arch/ppc64/kernel/sysfs.c
+++ b/arch/ppc64/kernel/sysfs.c
@@ -215,18 +215,23 @@ static void register_cpu_online(unsigned int cpu)
215 if (cpu_has_feature(CPU_FTR_MMCRA)) 215 if (cpu_has_feature(CPU_FTR_MMCRA))
216 sysdev_create_file(s, &attr_mmcra); 216 sysdev_create_file(s, &attr_mmcra);
217 217
218 sysdev_create_file(s, &attr_pmc1); 218 if (cur_cpu_spec->num_pmcs >= 1)
219 sysdev_create_file(s, &attr_pmc2); 219 sysdev_create_file(s, &attr_pmc1);
220 sysdev_create_file(s, &attr_pmc3); 220 if (cur_cpu_spec->num_pmcs >= 2)
221 sysdev_create_file(s, &attr_pmc4); 221 sysdev_create_file(s, &attr_pmc2);
222 sysdev_create_file(s, &attr_pmc5); 222 if (cur_cpu_spec->num_pmcs >= 3)
223 sysdev_create_file(s, &attr_pmc6); 223 sysdev_create_file(s, &attr_pmc3);
224 224 if (cur_cpu_spec->num_pmcs >= 4)
225 if (cpu_has_feature(CPU_FTR_PMC8)) { 225 sysdev_create_file(s, &attr_pmc4);
226 if (cur_cpu_spec->num_pmcs >= 5)
227 sysdev_create_file(s, &attr_pmc5);
228 if (cur_cpu_spec->num_pmcs >= 6)
229 sysdev_create_file(s, &attr_pmc6);
230 if (cur_cpu_spec->num_pmcs >= 7)
226 sysdev_create_file(s, &attr_pmc7); 231 sysdev_create_file(s, &attr_pmc7);
232 if (cur_cpu_spec->num_pmcs >= 8)
227 sysdev_create_file(s, &attr_pmc8); 233 sysdev_create_file(s, &attr_pmc8);
228 } 234
229
230 if (cpu_has_feature(CPU_FTR_SMT)) 235 if (cpu_has_feature(CPU_FTR_SMT))
231 sysdev_create_file(s, &attr_purr); 236 sysdev_create_file(s, &attr_purr);
232} 237}
@@ -252,17 +257,22 @@ static void unregister_cpu_online(unsigned int cpu)
252 if (cpu_has_feature(CPU_FTR_MMCRA)) 257 if (cpu_has_feature(CPU_FTR_MMCRA))
253 sysdev_remove_file(s, &attr_mmcra); 258 sysdev_remove_file(s, &attr_mmcra);
254 259
255 sysdev_remove_file(s, &attr_pmc1); 260 if (cur_cpu_spec->num_pmcs >= 1)
256 sysdev_remove_file(s, &attr_pmc2); 261 sysdev_remove_file(s, &attr_pmc1);
257 sysdev_remove_file(s, &attr_pmc3); 262 if (cur_cpu_spec->num_pmcs >= 2)
258 sysdev_remove_file(s, &attr_pmc4); 263 sysdev_remove_file(s, &attr_pmc2);
259 sysdev_remove_file(s, &attr_pmc5); 264 if (cur_cpu_spec->num_pmcs >= 3)
260 sysdev_remove_file(s, &attr_pmc6); 265 sysdev_remove_file(s, &attr_pmc3);
261 266 if (cur_cpu_spec->num_pmcs >= 4)
262 if (cpu_has_feature(CPU_FTR_PMC8)) { 267 sysdev_remove_file(s, &attr_pmc4);
268 if (cur_cpu_spec->num_pmcs >= 5)
269 sysdev_remove_file(s, &attr_pmc5);
270 if (cur_cpu_spec->num_pmcs >= 6)
271 sysdev_remove_file(s, &attr_pmc6);
272 if (cur_cpu_spec->num_pmcs >= 7)
263 sysdev_remove_file(s, &attr_pmc7); 273 sysdev_remove_file(s, &attr_pmc7);
274 if (cur_cpu_spec->num_pmcs >= 8)
264 sysdev_remove_file(s, &attr_pmc8); 275 sysdev_remove_file(s, &attr_pmc8);
265 }
266 276
267 if (cpu_has_feature(CPU_FTR_SMT)) 277 if (cpu_has_feature(CPU_FTR_SMT))
268 sysdev_remove_file(s, &attr_purr); 278 sysdev_remove_file(s, &attr_purr);
diff --git a/arch/ppc64/kernel/time.c b/arch/ppc64/kernel/time.c
index 1696e1b05bb9..91ef95ccda4f 100644
--- a/arch/ppc64/kernel/time.c
+++ b/arch/ppc64/kernel/time.c
@@ -51,7 +51,6 @@
51#include <linux/cpu.h> 51#include <linux/cpu.h>
52#include <linux/security.h> 52#include <linux/security.h>
53 53
54#include <asm/segment.h>
55#include <asm/io.h> 54#include <asm/io.h>
56#include <asm/processor.h> 55#include <asm/processor.h>
57#include <asm/nvram.h> 56#include <asm/nvram.h>
diff --git a/arch/ppc64/kernel/udbg.c b/arch/ppc64/kernel/udbg.c
index c0da45540f0f..ed6766e21f5a 100644
--- a/arch/ppc64/kernel/udbg.c
+++ b/arch/ppc64/kernel/udbg.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * NS16550 Serial Port (uart) debugging stuff. 2 * polling mode stateless debugging stuff, originally for NS16550 Serial Ports
3 * 3 *
4 * c 2001 PPC 64 Team, IBM Corp 4 * c 2001 PPC 64 Team, IBM Corp
5 * 5 *
@@ -13,249 +13,24 @@
13#define WANT_PPCDBG_TAB /* Only defined here */ 13#define WANT_PPCDBG_TAB /* Only defined here */
14#include <linux/config.h> 14#include <linux/config.h>
15#include <linux/types.h> 15#include <linux/types.h>
16#include <linux/sched.h>
17#include <linux/console.h>
16#include <asm/ppcdebug.h> 18#include <asm/ppcdebug.h>
17#include <asm/processor.h> 19#include <asm/processor.h>
18#include <asm/uaccess.h>
19#include <asm/machdep.h>
20#include <asm/io.h>
21#include <asm/prom.h>
22#include <asm/pmac_feature.h>
23 20
24extern u8 real_readb(volatile u8 __iomem *addr); 21void (*udbg_putc)(unsigned char c);
25extern void real_writeb(u8 data, volatile u8 __iomem *addr); 22unsigned char (*udbg_getc)(void);
26 23int (*udbg_getc_poll)(void);
27struct NS16550 {
28 /* this struct must be packed */
29 unsigned char rbr; /* 0 */
30 unsigned char ier; /* 1 */
31 unsigned char fcr; /* 2 */
32 unsigned char lcr; /* 3 */
33 unsigned char mcr; /* 4 */
34 unsigned char lsr; /* 5 */
35 unsigned char msr; /* 6 */
36 unsigned char scr; /* 7 */
37};
38
39#define thr rbr
40#define iir fcr
41#define dll rbr
42#define dlm ier
43#define dlab lcr
44
45#define LSR_DR 0x01 /* Data ready */
46#define LSR_OE 0x02 /* Overrun */
47#define LSR_PE 0x04 /* Parity error */
48#define LSR_FE 0x08 /* Framing error */
49#define LSR_BI 0x10 /* Break */
50#define LSR_THRE 0x20 /* Xmit holding register empty */
51#define LSR_TEMT 0x40 /* Xmitter empty */
52#define LSR_ERR 0x80 /* Error */
53
54static volatile struct NS16550 __iomem *udbg_comport;
55
56void udbg_init_uart(void __iomem *comport, unsigned int speed)
57{
58 u16 dll = speed ? (115200 / speed) : 12;
59
60 if (comport) {
61 udbg_comport = (struct NS16550 __iomem *)comport;
62 out_8(&udbg_comport->lcr, 0x00);
63 out_8(&udbg_comport->ier, 0xff);
64 out_8(&udbg_comport->ier, 0x00);
65 out_8(&udbg_comport->lcr, 0x80); /* Access baud rate */
66 out_8(&udbg_comport->dll, dll & 0xff); /* 1 = 115200, 2 = 57600,
67 3 = 38400, 12 = 9600 baud */
68 out_8(&udbg_comport->dlm, dll >> 8); /* dll >> 8 which should be zero
69 for fast rates; */
70 out_8(&udbg_comport->lcr, 0x03); /* 8 data, 1 stop, no parity */
71 out_8(&udbg_comport->mcr, 0x03); /* RTS/DTR */
72 out_8(&udbg_comport->fcr ,0x07); /* Clear & enable FIFOs */
73 }
74}
75
76#ifdef CONFIG_PPC_PMAC
77
78#define SCC_TXRDY 4
79#define SCC_RXRDY 1
80
81static volatile u8 __iomem *sccc;
82static volatile u8 __iomem *sccd;
83
84static unsigned char scc_inittab[] = {
85 13, 0, /* set baud rate divisor */
86 12, 0,
87 14, 1, /* baud rate gen enable, src=rtxc */
88 11, 0x50, /* clocks = br gen */
89 5, 0xea, /* tx 8 bits, assert DTR & RTS */
90 4, 0x46, /* x16 clock, 1 stop */
91 3, 0xc1, /* rx enable, 8 bits */
92};
93
94void udbg_init_scc(struct device_node *np)
95{
96 u32 *reg;
97 unsigned long addr;
98 int i, x;
99
100 if (np == NULL)
101 np = of_find_node_by_name(NULL, "escc");
102 if (np == NULL || np->parent == NULL)
103 return;
104
105 udbg_printf("found SCC...\n");
106 /* Get address within mac-io ASIC */
107 reg = (u32 *)get_property(np, "reg", NULL);
108 if (reg == NULL)
109 return;
110 addr = reg[0];
111 udbg_printf("local addr: %lx\n", addr);
112 /* Get address of mac-io PCI itself */
113 reg = (u32 *)get_property(np->parent, "assigned-addresses", NULL);
114 if (reg == NULL)
115 return;
116 addr += reg[2];
117 udbg_printf("final addr: %lx\n", addr);
118
119 /* Setup for 57600 8N1 */
120 addr += 0x20;
121 sccc = (volatile u8 * __iomem) ioremap(addr & PAGE_MASK, PAGE_SIZE) ;
122 sccc += addr & ~PAGE_MASK;
123 sccd = sccc + 0x10;
124
125 udbg_printf("ioremap result sccc: %p\n", sccc);
126 mb();
127
128 for (i = 20000; i != 0; --i)
129 x = in_8(sccc);
130 out_8(sccc, 0x09); /* reset A or B side */
131 out_8(sccc, 0xc0);
132 for (i = 0; i < sizeof(scc_inittab); ++i)
133 out_8(sccc, scc_inittab[i]);
134
135 ppc_md.udbg_putc = udbg_putc;
136 ppc_md.udbg_getc = udbg_getc;
137 ppc_md.udbg_getc_poll = udbg_getc_poll;
138
139 udbg_puts("Hello World !\n");
140}
141
142#endif /* CONFIG_PPC_PMAC */
143
144#ifdef CONFIG_PPC_PMAC
145static void udbg_real_putc(unsigned char c)
146{
147 while ((real_readb(sccc) & SCC_TXRDY) == 0)
148 ;
149 real_writeb(c, sccd);
150 if (c == '\n')
151 udbg_real_putc('\r');
152}
153
154void udbg_init_pmac_realmode(void)
155{
156 sccc = (volatile u8 __iomem *)0x80013020ul;
157 sccd = (volatile u8 __iomem *)0x80013030ul;
158
159 ppc_md.udbg_putc = udbg_real_putc;
160 ppc_md.udbg_getc = NULL;
161 ppc_md.udbg_getc_poll = NULL;
162}
163#endif /* CONFIG_PPC_PMAC */
164
165#ifdef CONFIG_PPC_MAPLE
166void udbg_maple_real_putc(unsigned char c)
167{
168 if (udbg_comport) {
169 while ((real_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
170 /* wait for idle */;
171 real_writeb(c, &udbg_comport->thr); eieio();
172 if (c == '\n') {
173 /* Also put a CR. This is for convenience. */
174 while ((real_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
175 /* wait for idle */;
176 real_writeb('\r', &udbg_comport->thr); eieio();
177 }
178 }
179}
180
181void udbg_init_maple_realmode(void)
182{
183 udbg_comport = (volatile struct NS16550 __iomem *)0xf40003f8;
184
185 ppc_md.udbg_putc = udbg_maple_real_putc;
186 ppc_md.udbg_getc = NULL;
187 ppc_md.udbg_getc_poll = NULL;
188}
189#endif /* CONFIG_PPC_MAPLE */
190
191void udbg_putc(unsigned char c)
192{
193 if (udbg_comport) {
194 while ((in_8(&udbg_comport->lsr) & LSR_THRE) == 0)
195 /* wait for idle */;
196 out_8(&udbg_comport->thr, c);
197 if (c == '\n') {
198 /* Also put a CR. This is for convenience. */
199 while ((in_8(&udbg_comport->lsr) & LSR_THRE) == 0)
200 /* wait for idle */;
201 out_8(&udbg_comport->thr, '\r');
202 }
203 }
204#ifdef CONFIG_PPC_PMAC
205 else if (sccc) {
206 while ((in_8(sccc) & SCC_TXRDY) == 0)
207 ;
208 out_8(sccd, c);
209 if (c == '\n')
210 udbg_putc('\r');
211 }
212#endif /* CONFIG_PPC_PMAC */
213}
214
215int udbg_getc_poll(void)
216{
217 if (udbg_comport) {
218 if ((in_8(&udbg_comport->lsr) & LSR_DR) != 0)
219 return in_8(&udbg_comport->rbr);
220 else
221 return -1;
222 }
223#ifdef CONFIG_PPC_PMAC
224 else if (sccc) {
225 if ((in_8(sccc) & SCC_RXRDY) != 0)
226 return in_8(sccd);
227 else
228 return -1;
229 }
230#endif /* CONFIG_PPC_PMAC */
231 return -1;
232}
233
234unsigned char udbg_getc(void)
235{
236 if (udbg_comport) {
237 while ((in_8(&udbg_comport->lsr) & LSR_DR) == 0)
238 /* wait for char */;
239 return in_8(&udbg_comport->rbr);
240 }
241#ifdef CONFIG_PPC_PMAC
242 else if (sccc) {
243 while ((in_8(sccc) & SCC_RXRDY) == 0)
244 ;
245 return in_8(sccd);
246 }
247#endif /* CONFIG_PPC_PMAC */
248 return 0;
249}
250 24
25/* udbg library, used by xmon et al */
251void udbg_puts(const char *s) 26void udbg_puts(const char *s)
252{ 27{
253 if (ppc_md.udbg_putc) { 28 if (udbg_putc) {
254 char c; 29 char c;
255 30
256 if (s && *s != '\0') { 31 if (s && *s != '\0') {
257 while ((c = *s++) != '\0') 32 while ((c = *s++) != '\0')
258 ppc_md.udbg_putc(c); 33 udbg_putc(c);
259 } 34 }
260 } 35 }
261#if 0 36#if 0
@@ -270,12 +45,12 @@ int udbg_write(const char *s, int n)
270 int remain = n; 45 int remain = n;
271 char c; 46 char c;
272 47
273 if (!ppc_md.udbg_putc) 48 if (!udbg_putc)
274 return 0; 49 return 0;
275 50
276 if (s && *s != '\0') { 51 if (s && *s != '\0') {
277 while (((c = *s++) != '\0') && (remain-- > 0)) { 52 while (((c = *s++) != '\0') && (remain-- > 0)) {
278 ppc_md.udbg_putc(c); 53 udbg_putc(c);
279 } 54 }
280 } 55 }
281 56
@@ -287,12 +62,12 @@ int udbg_read(char *buf, int buflen)
287 char c, *p = buf; 62 char c, *p = buf;
288 int i; 63 int i;
289 64
290 if (!ppc_md.udbg_getc) 65 if (!udbg_getc)
291 return 0; 66 return 0;
292 67
293 for (i = 0; i < buflen; ++i) { 68 for (i = 0; i < buflen; ++i) {
294 do { 69 do {
295 c = ppc_md.udbg_getc(); 70 c = udbg_getc();
296 } while (c == 0x11 || c == 0x13); 71 } while (c == 0x11 || c == 0x13);
297 if (c == 0) 72 if (c == 0)
298 break; 73 break;
@@ -302,11 +77,6 @@ int udbg_read(char *buf, int buflen)
302 return i; 77 return i;
303} 78}
304 79
305void udbg_console_write(struct console *con, const char *s, unsigned int n)
306{
307 udbg_write(s, n);
308}
309
310#define UDBG_BUFSIZE 256 80#define UDBG_BUFSIZE 256
311void udbg_printf(const char *fmt, ...) 81void udbg_printf(const char *fmt, ...)
312{ 82{
@@ -319,6 +89,10 @@ void udbg_printf(const char *fmt, ...)
319 va_end(args); 89 va_end(args);
320} 90}
321 91
92/* PPCDBG stuff */
93
94u64 ppc64_debug_switch;
95
322/* Special print used by PPCDBG() macro */ 96/* Special print used by PPCDBG() macro */
323void udbg_ppcdbg(unsigned long debug_flags, const char *fmt, ...) 97void udbg_ppcdbg(unsigned long debug_flags, const char *fmt, ...)
324{ 98{
@@ -358,3 +132,43 @@ unsigned long udbg_ifdebug(unsigned long flags)
358{ 132{
359 return (flags & ppc64_debug_switch); 133 return (flags & ppc64_debug_switch);
360} 134}
135
136/*
137 * Initialize the PPCDBG state. Called before relocation has been enabled.
138 */
139void __init ppcdbg_initialize(void)
140{
141 ppc64_debug_switch = PPC_DEBUG_DEFAULT; /* | PPCDBG_BUSWALK | */
142 /* PPCDBG_PHBINIT | PPCDBG_MM | PPCDBG_MMINIT | PPCDBG_TCEINIT | PPCDBG_TCE */;
143}
144
145/*
146 * Early boot console based on udbg
147 */
148static void udbg_console_write(struct console *con, const char *s,
149 unsigned int n)
150{
151 udbg_write(s, n);
152}
153
154static struct console udbg_console = {
155 .name = "udbg",
156 .write = udbg_console_write,
157 .flags = CON_PRINTBUFFER,
158 .index = -1,
159};
160
161void __init disable_early_printk(void)
162{
163 unregister_console(&udbg_console);
164}
165
166/* called by setup_system */
167void register_early_udbg_console(void)
168{
169 register_console(&udbg_console);
170}
171
172#if 0 /* if you want to use this as a regular output console */
173console_initcall(register_udbg_console);
174#endif
diff --git a/arch/ppc64/kernel/udbg_16550.c b/arch/ppc64/kernel/udbg_16550.c
new file mode 100644
index 000000000000..9313574ab935
--- /dev/null
+++ b/arch/ppc64/kernel/udbg_16550.c
@@ -0,0 +1,123 @@
1/*
2 * udbg for for NS16550 compatable serial ports
3 *
4 * Copyright (C) 2001-2005 PPC 64 Team, IBM Corp
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11#include <linux/config.h>
12#include <linux/types.h>
13#include <asm/udbg.h>
14#include <asm/io.h>
15
16extern u8 real_readb(volatile u8 __iomem *addr);
17extern void real_writeb(u8 data, volatile u8 __iomem *addr);
18
19struct NS16550 {
20 /* this struct must be packed */
21 unsigned char rbr; /* 0 */
22 unsigned char ier; /* 1 */
23 unsigned char fcr; /* 2 */
24 unsigned char lcr; /* 3 */
25 unsigned char mcr; /* 4 */
26 unsigned char lsr; /* 5 */
27 unsigned char msr; /* 6 */
28 unsigned char scr; /* 7 */
29};
30
31#define thr rbr
32#define iir fcr
33#define dll rbr
34#define dlm ier
35#define dlab lcr
36
37#define LSR_DR 0x01 /* Data ready */
38#define LSR_OE 0x02 /* Overrun */
39#define LSR_PE 0x04 /* Parity error */
40#define LSR_FE 0x08 /* Framing error */
41#define LSR_BI 0x10 /* Break */
42#define LSR_THRE 0x20 /* Xmit holding register empty */
43#define LSR_TEMT 0x40 /* Xmitter empty */
44#define LSR_ERR 0x80 /* Error */
45
46static volatile struct NS16550 __iomem *udbg_comport;
47
48static void udbg_550_putc(unsigned char c)
49{
50 if (udbg_comport) {
51 while ((in_8(&udbg_comport->lsr) & LSR_THRE) == 0)
52 /* wait for idle */;
53 out_8(&udbg_comport->thr, c);
54 if (c == '\n')
55 udbg_550_putc('\r');
56 }
57}
58
59static int udbg_550_getc_poll(void)
60{
61 if (udbg_comport) {
62 if ((in_8(&udbg_comport->lsr) & LSR_DR) != 0)
63 return in_8(&udbg_comport->rbr);
64 else
65 return -1;
66 }
67 return -1;
68}
69
70static unsigned char udbg_550_getc(void)
71{
72 if (udbg_comport) {
73 while ((in_8(&udbg_comport->lsr) & LSR_DR) == 0)
74 /* wait for char */;
75 return in_8(&udbg_comport->rbr);
76 }
77 return 0;
78}
79
80void udbg_init_uart(void __iomem *comport, unsigned int speed)
81{
82 u16 dll = speed ? (115200 / speed) : 12;
83
84 if (comport) {
85 udbg_comport = (struct NS16550 __iomem *)comport;
86 out_8(&udbg_comport->lcr, 0x00);
87 out_8(&udbg_comport->ier, 0xff);
88 out_8(&udbg_comport->ier, 0x00);
89 out_8(&udbg_comport->lcr, 0x80); /* Access baud rate */
90 out_8(&udbg_comport->dll, dll & 0xff); /* 1 = 115200, 2 = 57600,
91 3 = 38400, 12 = 9600 baud */
92 out_8(&udbg_comport->dlm, dll >> 8); /* dll >> 8 which should be zero
93 for fast rates; */
94 out_8(&udbg_comport->lcr, 0x03); /* 8 data, 1 stop, no parity */
95 out_8(&udbg_comport->mcr, 0x03); /* RTS/DTR */
96 out_8(&udbg_comport->fcr ,0x07); /* Clear & enable FIFOs */
97 udbg_putc = udbg_550_putc;
98 udbg_getc = udbg_550_getc;
99 udbg_getc_poll = udbg_550_getc_poll;
100 }
101}
102
103#ifdef CONFIG_PPC_MAPLE
104void udbg_maple_real_putc(unsigned char c)
105{
106 if (udbg_comport) {
107 while ((real_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
108 /* wait for idle */;
109 real_writeb(c, &udbg_comport->thr); eieio();
110 if (c == '\n')
111 udbg_maple_real_putc('\r');
112 }
113}
114
115void udbg_init_maple_realmode(void)
116{
117 udbg_comport = (volatile struct NS16550 __iomem *)0xf40003f8;
118
119 udbg_putc = udbg_maple_real_putc;
120 udbg_getc = NULL;
121 udbg_getc_poll = NULL;
122}
123#endif /* CONFIG_PPC_MAPLE */
diff --git a/arch/ppc64/kernel/udbg_scc.c b/arch/ppc64/kernel/udbg_scc.c
new file mode 100644
index 000000000000..c47fd6c63531
--- /dev/null
+++ b/arch/ppc64/kernel/udbg_scc.c
@@ -0,0 +1,136 @@
1/*
2 * udbg for for zilog scc ports as found on Apple PowerMacs
3 *
4 * Copyright (C) 2001-2005 PPC 64 Team, IBM Corp
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11#include <linux/config.h>
12#include <linux/types.h>
13#include <asm/udbg.h>
14#include <asm/processor.h>
15#include <asm/naca.h>
16#include <asm/io.h>
17#include <asm/prom.h>
18#include <asm/pmac_feature.h>
19
20extern u8 real_readb(volatile u8 __iomem *addr);
21extern void real_writeb(u8 data, volatile u8 __iomem *addr);
22
23#define SCC_TXRDY 4
24#define SCC_RXRDY 1
25
26static volatile u8 __iomem *sccc;
27static volatile u8 __iomem *sccd;
28
29static void udbg_scc_putc(unsigned char c)
30{
31 if (sccc) {
32 while ((in_8(sccc) & SCC_TXRDY) == 0)
33 ;
34 out_8(sccd, c);
35 if (c == '\n')
36 udbg_scc_putc('\r');
37 }
38}
39
40static int udbg_scc_getc_poll(void)
41{
42 if (sccc) {
43 if ((in_8(sccc) & SCC_RXRDY) != 0)
44 return in_8(sccd);
45 else
46 return -1;
47 }
48 return -1;
49}
50
51static unsigned char udbg_scc_getc(void)
52{
53 if (sccc) {
54 while ((in_8(sccc) & SCC_RXRDY) == 0)
55 ;
56 return in_8(sccd);
57 }
58 return 0;
59}
60
61static unsigned char scc_inittab[] = {
62 13, 0, /* set baud rate divisor */
63 12, 0,
64 14, 1, /* baud rate gen enable, src=rtxc */
65 11, 0x50, /* clocks = br gen */
66 5, 0xea, /* tx 8 bits, assert DTR & RTS */
67 4, 0x46, /* x16 clock, 1 stop */
68 3, 0xc1, /* rx enable, 8 bits */
69};
70
71void udbg_init_scc(struct device_node *np)
72{
73 u32 *reg;
74 unsigned long addr;
75 int i, x;
76
77 if (np == NULL)
78 np = of_find_node_by_name(NULL, "escc");
79 if (np == NULL || np->parent == NULL)
80 return;
81
82 udbg_printf("found SCC...\n");
83 /* Get address within mac-io ASIC */
84 reg = (u32 *)get_property(np, "reg", NULL);
85 if (reg == NULL)
86 return;
87 addr = reg[0];
88 udbg_printf("local addr: %lx\n", addr);
89 /* Get address of mac-io PCI itself */
90 reg = (u32 *)get_property(np->parent, "assigned-addresses", NULL);
91 if (reg == NULL)
92 return;
93 addr += reg[2];
94 udbg_printf("final addr: %lx\n", addr);
95
96 /* Setup for 57600 8N1 */
97 addr += 0x20;
98 sccc = (volatile u8 * __iomem) ioremap(addr & PAGE_MASK, PAGE_SIZE) ;
99 sccc += addr & ~PAGE_MASK;
100 sccd = sccc + 0x10;
101
102 udbg_printf("ioremap result sccc: %p\n", sccc);
103 mb();
104
105 for (i = 20000; i != 0; --i)
106 x = in_8(sccc);
107 out_8(sccc, 0x09); /* reset A or B side */
108 out_8(sccc, 0xc0);
109 for (i = 0; i < sizeof(scc_inittab); ++i)
110 out_8(sccc, scc_inittab[i]);
111
112 udbg_putc = udbg_scc_putc;
113 udbg_getc = udbg_scc_getc;
114 udbg_getc_poll = udbg_scc_getc_poll;
115
116 udbg_puts("Hello World !\n");
117}
118
119static void udbg_real_scc_putc(unsigned char c)
120{
121 while ((real_readb(sccc) & SCC_TXRDY) == 0)
122 ;
123 real_writeb(c, sccd);
124 if (c == '\n')
125 udbg_real_scc_putc('\r');
126}
127
128void udbg_init_pmac_realmode(void)
129{
130 sccc = (volatile u8 __iomem *)0x80013020ul;
131 sccd = (volatile u8 __iomem *)0x80013030ul;
132
133 udbg_putc = udbg_real_scc_putc;
134 udbg_getc = NULL;
135 udbg_getc_poll = NULL;
136}
diff --git a/arch/ppc64/mm/hugetlbpage.c b/arch/ppc64/mm/hugetlbpage.c
index e7833c80eb68..338771ec70d7 100644
--- a/arch/ppc64/mm/hugetlbpage.c
+++ b/arch/ppc64/mm/hugetlbpage.c
@@ -144,7 +144,8 @@ static void flush_low_segments(void *parm)
144 for (i = 0; i < NUM_LOW_AREAS; i++) { 144 for (i = 0; i < NUM_LOW_AREAS; i++) {
145 if (! (areas & (1U << i))) 145 if (! (areas & (1U << i)))
146 continue; 146 continue;
147 asm volatile("slbie %0" : : "r" (i << SID_SHIFT)); 147 asm volatile("slbie %0"
148 : : "r" ((i << SID_SHIFT) | SLBIE_C));
148 } 149 }
149 150
150 asm volatile("isync" : : : "memory"); 151 asm volatile("isync" : : : "memory");
@@ -164,7 +165,8 @@ static void flush_high_segments(void *parm)
164 continue; 165 continue;
165 for (j = 0; j < (1UL << (HTLB_AREA_SHIFT-SID_SHIFT)); j++) 166 for (j = 0; j < (1UL << (HTLB_AREA_SHIFT-SID_SHIFT)); j++)
166 asm volatile("slbie %0" 167 asm volatile("slbie %0"
167 :: "r" ((i << HTLB_AREA_SHIFT) + (j << SID_SHIFT))); 168 :: "r" (((i << HTLB_AREA_SHIFT)
169 + (j << SID_SHIFT)) | SLBIE_C));
168 } 170 }
169 171
170 asm volatile("isync" : : : "memory"); 172 asm volatile("isync" : : : "memory");
diff --git a/arch/ppc64/mm/init.c b/arch/ppc64/mm/init.c
index b3b1e9c1770a..a14ab87df491 100644
--- a/arch/ppc64/mm/init.c
+++ b/arch/ppc64/mm/init.c
@@ -392,6 +392,7 @@ void free_initmem(void)
392 392
393 addr = (unsigned long)__init_begin; 393 addr = (unsigned long)__init_begin;
394 for (; addr < (unsigned long)__init_end; addr += PAGE_SIZE) { 394 for (; addr < (unsigned long)__init_end; addr += PAGE_SIZE) {
395 memset((void *)addr, 0xcc, PAGE_SIZE);
395 ClearPageReserved(virt_to_page(addr)); 396 ClearPageReserved(virt_to_page(addr));
396 set_page_count(virt_to_page(addr), 1); 397 set_page_count(virt_to_page(addr), 1);
397 free_page(addr); 398 free_page(addr);
diff --git a/arch/ppc64/mm/slb.c b/arch/ppc64/mm/slb.c
index 244150a0bc18..0473953f6a37 100644
--- a/arch/ppc64/mm/slb.c
+++ b/arch/ppc64/mm/slb.c
@@ -87,8 +87,8 @@ void switch_slb(struct task_struct *tsk, struct mm_struct *mm)
87 int i; 87 int i;
88 asm volatile("isync" : : : "memory"); 88 asm volatile("isync" : : : "memory");
89 for (i = 0; i < offset; i++) { 89 for (i = 0; i < offset; i++) {
90 esid_data = (unsigned long)get_paca()->slb_cache[i] 90 esid_data = ((unsigned long)get_paca()->slb_cache[i]
91 << SID_SHIFT; 91 << SID_SHIFT) | SLBIE_C;
92 asm volatile("slbie %0" : : "r" (esid_data)); 92 asm volatile("slbie %0" : : "r" (esid_data));
93 } 93 }
94 asm volatile("isync" : : : "memory"); 94 asm volatile("isync" : : : "memory");
diff --git a/arch/ppc64/oprofile/common.c b/arch/ppc64/oprofile/common.c
index 4acd1a424933..e5f572710aa0 100644
--- a/arch/ppc64/oprofile/common.c
+++ b/arch/ppc64/oprofile/common.c
@@ -16,11 +16,9 @@
16#include <asm/ptrace.h> 16#include <asm/ptrace.h>
17#include <asm/system.h> 17#include <asm/system.h>
18#include <asm/pmc.h> 18#include <asm/pmc.h>
19#include <asm/cputable.h>
20#include <asm/oprofile_impl.h>
19 21
20#include "op_impl.h"
21
22extern struct op_ppc64_model op_model_rs64;
23extern struct op_ppc64_model op_model_power4;
24static struct op_ppc64_model *model; 22static struct op_ppc64_model *model;
25 23
26static struct op_counter_config ctr[OP_MAX_COUNTER]; 24static struct op_counter_config ctr[OP_MAX_COUNTER];
@@ -123,53 +121,13 @@ static int op_ppc64_create_files(struct super_block *sb, struct dentry *root)
123 121
124int __init oprofile_arch_init(struct oprofile_operations *ops) 122int __init oprofile_arch_init(struct oprofile_operations *ops)
125{ 123{
126 unsigned int pvr; 124 if (!cur_cpu_spec->oprofile_model || !cur_cpu_spec->oprofile_cpu_type)
127 125 return -ENODEV;
128 pvr = mfspr(SPRN_PVR); 126
129 127 model = cur_cpu_spec->oprofile_model;
130 switch (PVR_VER(pvr)) { 128 model->num_counters = cur_cpu_spec->num_pmcs;
131 case PV_630:
132 case PV_630p:
133 model = &op_model_rs64;
134 model->num_counters = 8;
135 ops->cpu_type = "ppc64/power3";
136 break;
137
138 case PV_NORTHSTAR:
139 case PV_PULSAR:
140 case PV_ICESTAR:
141 case PV_SSTAR:
142 model = &op_model_rs64;
143 model->num_counters = 8;
144 ops->cpu_type = "ppc64/rs64";
145 break;
146
147 case PV_POWER4:
148 case PV_POWER4p:
149 model = &op_model_power4;
150 model->num_counters = 8;
151 ops->cpu_type = "ppc64/power4";
152 break;
153
154 case PV_970:
155 case PV_970FX:
156 case PV_970MP:
157 model = &op_model_power4;
158 model->num_counters = 8;
159 ops->cpu_type = "ppc64/970";
160 break;
161
162 case PV_POWER5:
163 case PV_POWER5p:
164 model = &op_model_power4;
165 model->num_counters = 6;
166 ops->cpu_type = "ppc64/power5";
167 break;
168
169 default:
170 return -ENODEV;
171 }
172 129
130 ops->cpu_type = cur_cpu_spec->oprofile_cpu_type;
173 ops->create_files = op_ppc64_create_files; 131 ops->create_files = op_ppc64_create_files;
174 ops->setup = op_ppc64_setup; 132 ops->setup = op_ppc64_setup;
175 ops->shutdown = op_ppc64_shutdown; 133 ops->shutdown = op_ppc64_shutdown;
diff --git a/arch/ppc64/oprofile/op_impl.h b/arch/ppc64/oprofile/op_impl.h
deleted file mode 100644
index 7fa7eaabc035..000000000000
--- a/arch/ppc64/oprofile/op_impl.h
+++ /dev/null
@@ -1,108 +0,0 @@
1/*
2 * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
3 *
4 * Based on alpha version.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef OP_IMPL_H
13#define OP_IMPL_H 1
14
15#define OP_MAX_COUNTER 8
16
17/* Per-counter configuration as set via oprofilefs. */
18struct op_counter_config {
19 unsigned long valid;
20 unsigned long enabled;
21 unsigned long event;
22 unsigned long count;
23 unsigned long kernel;
24 /* We dont support per counter user/kernel selection */
25 unsigned long user;
26 unsigned long unit_mask;
27};
28
29/* System-wide configuration as set via oprofilefs. */
30struct op_system_config {
31 unsigned long mmcr0;
32 unsigned long mmcr1;
33 unsigned long mmcra;
34 unsigned long enable_kernel;
35 unsigned long enable_user;
36 unsigned long backtrace_spinlocks;
37};
38
39/* Per-arch configuration */
40struct op_ppc64_model {
41 void (*reg_setup) (struct op_counter_config *,
42 struct op_system_config *,
43 int num_counters);
44 void (*cpu_setup) (void *);
45 void (*start) (struct op_counter_config *);
46 void (*stop) (void);
47 void (*handle_interrupt) (struct pt_regs *,
48 struct op_counter_config *);
49 int num_counters;
50};
51
52static inline unsigned int ctr_read(unsigned int i)
53{
54 switch(i) {
55 case 0:
56 return mfspr(SPRN_PMC1);
57 case 1:
58 return mfspr(SPRN_PMC2);
59 case 2:
60 return mfspr(SPRN_PMC3);
61 case 3:
62 return mfspr(SPRN_PMC4);
63 case 4:
64 return mfspr(SPRN_PMC5);
65 case 5:
66 return mfspr(SPRN_PMC6);
67 case 6:
68 return mfspr(SPRN_PMC7);
69 case 7:
70 return mfspr(SPRN_PMC8);
71 default:
72 return 0;
73 }
74}
75
76static inline void ctr_write(unsigned int i, unsigned int val)
77{
78 switch(i) {
79 case 0:
80 mtspr(SPRN_PMC1, val);
81 break;
82 case 1:
83 mtspr(SPRN_PMC2, val);
84 break;
85 case 2:
86 mtspr(SPRN_PMC3, val);
87 break;
88 case 3:
89 mtspr(SPRN_PMC4, val);
90 break;
91 case 4:
92 mtspr(SPRN_PMC5, val);
93 break;
94 case 5:
95 mtspr(SPRN_PMC6, val);
96 break;
97 case 6:
98 mtspr(SPRN_PMC7, val);
99 break;
100 case 7:
101 mtspr(SPRN_PMC8, val);
102 break;
103 default:
104 break;
105 }
106}
107
108#endif
diff --git a/arch/ppc64/oprofile/op_model_power4.c b/arch/ppc64/oprofile/op_model_power4.c
index 3d103d66870d..32b2bb5625fe 100644
--- a/arch/ppc64/oprofile/op_model_power4.c
+++ b/arch/ppc64/oprofile/op_model_power4.c
@@ -16,14 +16,12 @@
16#include <asm/cputable.h> 16#include <asm/cputable.h>
17#include <asm/systemcfg.h> 17#include <asm/systemcfg.h>
18#include <asm/rtas.h> 18#include <asm/rtas.h>
19#include <asm/oprofile_impl.h>
19 20
20#define dbg(args...) 21#define dbg(args...)
21 22
22#include "op_impl.h"
23
24static unsigned long reset_value[OP_MAX_COUNTER]; 23static unsigned long reset_value[OP_MAX_COUNTER];
25 24
26static int num_counters;
27static int oprofile_running; 25static int oprofile_running;
28static int mmcra_has_sihv; 26static int mmcra_has_sihv;
29 27
@@ -45,8 +43,6 @@ static void power4_reg_setup(struct op_counter_config *ctr,
45{ 43{
46 int i; 44 int i;
47 45
48 num_counters = num_ctrs;
49
50 /* 46 /*
51 * SIHV / SIPR bits are only implemented on POWER4+ (GQ) and above. 47 * SIHV / SIPR bits are only implemented on POWER4+ (GQ) and above.
52 * However we disable it on all POWER4 until we verify it works 48 * However we disable it on all POWER4 until we verify it works
@@ -68,7 +64,7 @@ static void power4_reg_setup(struct op_counter_config *ctr,
68 64
69 backtrace_spinlocks = sys->backtrace_spinlocks; 65 backtrace_spinlocks = sys->backtrace_spinlocks;
70 66
71 for (i = 0; i < num_counters; ++i) 67 for (i = 0; i < cur_cpu_spec->num_pmcs; ++i)
72 reset_value[i] = 0x80000000UL - ctr[i].count; 68 reset_value[i] = 0x80000000UL - ctr[i].count;
73 69
74 /* setup user and kernel profiling */ 70 /* setup user and kernel profiling */
@@ -121,7 +117,7 @@ static void power4_start(struct op_counter_config *ctr)
121 /* set the PMM bit (see comment below) */ 117 /* set the PMM bit (see comment below) */
122 mtmsrd(mfmsr() | MSR_PMM); 118 mtmsrd(mfmsr() | MSR_PMM);
123 119
124 for (i = 0; i < num_counters; ++i) { 120 for (i = 0; i < cur_cpu_spec->num_pmcs; ++i) {
125 if (ctr[i].enabled) { 121 if (ctr[i].enabled) {
126 ctr_write(i, reset_value[i]); 122 ctr_write(i, reset_value[i]);
127 } else { 123 } else {
@@ -272,7 +268,7 @@ static void power4_handle_interrupt(struct pt_regs *regs,
272 /* set the PMM bit (see comment below) */ 268 /* set the PMM bit (see comment below) */
273 mtmsrd(mfmsr() | MSR_PMM); 269 mtmsrd(mfmsr() | MSR_PMM);
274 270
275 for (i = 0; i < num_counters; ++i) { 271 for (i = 0; i < cur_cpu_spec->num_pmcs; ++i) {
276 val = ctr_read(i); 272 val = ctr_read(i);
277 if (val < 0) { 273 if (val < 0) {
278 if (oprofile_running && ctr[i].enabled) { 274 if (oprofile_running && ctr[i].enabled) {
diff --git a/arch/ppc64/oprofile/op_model_rs64.c b/arch/ppc64/oprofile/op_model_rs64.c
index bcec506c266a..08c5b333f5c4 100644
--- a/arch/ppc64/oprofile/op_model_rs64.c
+++ b/arch/ppc64/oprofile/op_model_rs64.c
@@ -14,11 +14,10 @@
14#include <asm/system.h> 14#include <asm/system.h>
15#include <asm/processor.h> 15#include <asm/processor.h>
16#include <asm/cputable.h> 16#include <asm/cputable.h>
17#include <asm/oprofile_impl.h>
17 18
18#define dbg(args...) 19#define dbg(args...)
19 20
20#include "op_impl.h"
21
22static void ctrl_write(unsigned int i, unsigned int val) 21static void ctrl_write(unsigned int i, unsigned int val)
23{ 22{
24 unsigned int tmp = 0; 23 unsigned int tmp = 0;
diff --git a/arch/ppc64/xmon/start.c b/arch/ppc64/xmon/start.c
index f86b584acd76..e50c158191e1 100644
--- a/arch/ppc64/xmon/start.c
+++ b/arch/ppc64/xmon/start.c
@@ -61,7 +61,9 @@ xmon_read(void *handle, void *ptr, int nb)
61int 61int
62xmon_read_poll(void) 62xmon_read_poll(void)
63{ 63{
64 return udbg_getc_poll(); 64 if (udbg_getc_poll)
65 return udbg_getc_poll();
66 return -1;
65} 67}
66 68
67FILE *xmon_stdin; 69FILE *xmon_stdin;