diff options
author | Kukjin Kim <kgene.kim@samsung.com> | 2010-01-13 22:50:23 -0500 |
---|---|---|
committer | Ben Dooks <ben-linux@fluff.org> | 2010-01-15 03:10:12 -0500 |
commit | ed276849bc6a8ad5bb0f9fa94fe8305ee67bb6c6 (patch) | |
tree | 03ddcf6c93fb2f226eb7ab77c3328764f365a777 /arch | |
parent | 14235696d401e62f8f5740ca2fb917ab42b9fd18 (diff) |
ARM: SAMSUNG: Make clk_default_setrate and clk_ops_def_setrate visible
This patch makes clk_default_setrate and clk_ops_def_setrate available
to code outside plat-samsung clock code.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/plat-s5pc1xx/clock.c | 14 | ||||
-rw-r--r-- | arch/arm/plat-samsung/clock.c | 4 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/clock.h | 3 |
3 files changed, 7 insertions, 14 deletions
diff --git a/arch/arm/plat-s5pc1xx/clock.c b/arch/arm/plat-s5pc1xx/clock.c index 0aff16d1cc2c..aec0305174aa 100644 --- a/arch/arm/plat-s5pc1xx/clock.c +++ b/arch/arm/plat-s5pc1xx/clock.c | |||
@@ -64,16 +64,6 @@ struct clk clk_54m = { | |||
64 | .rate = 54000000, | 64 | .rate = 54000000, |
65 | }; | 65 | }; |
66 | 66 | ||
67 | static int clk_default_setrate(struct clk *clk, unsigned long rate) | ||
68 | { | ||
69 | clk->rate = rate; | ||
70 | return 0; | ||
71 | } | ||
72 | |||
73 | static struct clk_ops clk_ops_default_setrate = { | ||
74 | .set_rate = clk_default_setrate, | ||
75 | }; | ||
76 | |||
77 | static int clk_dummy_enable(struct clk *clk, int enable) | 67 | static int clk_dummy_enable(struct clk *clk, int enable) |
78 | { | 68 | { |
79 | return 0; | 69 | return 0; |
@@ -86,7 +76,7 @@ struct clk clk_hd0 = { | |||
86 | .parent = NULL, | 76 | .parent = NULL, |
87 | .ctrlbit = 0, | 77 | .ctrlbit = 0, |
88 | .enable = clk_dummy_enable, | 78 | .enable = clk_dummy_enable, |
89 | .ops = &clk_ops_default_setrate, | 79 | .ops = &clk_ops_def_setrate, |
90 | }; | 80 | }; |
91 | 81 | ||
92 | struct clk clk_pd0 = { | 82 | struct clk clk_pd0 = { |
@@ -95,7 +85,7 @@ struct clk clk_pd0 = { | |||
95 | .rate = 0, | 85 | .rate = 0, |
96 | .parent = NULL, | 86 | .parent = NULL, |
97 | .ctrlbit = 0, | 87 | .ctrlbit = 0, |
98 | .ops = &clk_ops_default_setrate, | 88 | .ops = &clk_ops_def_setrate, |
99 | .enable = clk_dummy_enable, | 89 | .enable = clk_dummy_enable, |
100 | }; | 90 | }; |
101 | 91 | ||
diff --git a/arch/arm/plat-samsung/clock.c b/arch/arm/plat-samsung/clock.c index 9194af91e4b7..0c746ae7b2a6 100644 --- a/arch/arm/plat-samsung/clock.c +++ b/arch/arm/plat-samsung/clock.c | |||
@@ -225,13 +225,13 @@ EXPORT_SYMBOL(clk_set_parent); | |||
225 | 225 | ||
226 | /* base clocks */ | 226 | /* base clocks */ |
227 | 227 | ||
228 | static int clk_default_setrate(struct clk *clk, unsigned long rate) | 228 | int clk_default_setrate(struct clk *clk, unsigned long rate) |
229 | { | 229 | { |
230 | clk->rate = rate; | 230 | clk->rate = rate; |
231 | return 0; | 231 | return 0; |
232 | } | 232 | } |
233 | 233 | ||
234 | static struct clk_ops clk_ops_def_setrate = { | 234 | struct clk_ops clk_ops_def_setrate = { |
235 | .set_rate = clk_default_setrate, | 235 | .set_rate = clk_default_setrate, |
236 | }; | 236 | }; |
237 | 237 | ||
diff --git a/arch/arm/plat-samsung/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h index bd41f828d15d..22e011497502 100644 --- a/arch/arm/plat-samsung/include/plat/clock.h +++ b/arch/arm/plat-samsung/include/plat/clock.h | |||
@@ -75,6 +75,9 @@ extern struct clk clk_h2; | |||
75 | extern struct clk clk_27m; | 75 | extern struct clk clk_27m; |
76 | extern struct clk clk_48m; | 76 | extern struct clk clk_48m; |
77 | 77 | ||
78 | extern int clk_default_setrate(struct clk *clk, unsigned long rate); | ||
79 | extern struct clk_ops clk_ops_def_setrate; | ||
80 | |||
78 | /* exports for arch/arm/mach-s3c2410 | 81 | /* exports for arch/arm/mach-s3c2410 |
79 | * | 82 | * |
80 | * Please DO NOT use these outside of arch/arm/mach-s3c2410 | 83 | * Please DO NOT use these outside of arch/arm/mach-s3c2410 |