diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2009-05-23 15:57:31 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-05-23 15:57:31 -0400 |
commit | a2ab67fae1ab9226679495a8d260f4e6555efc5f (patch) | |
tree | f7de683c9c8ff0869a7e11f1d40802145d05f5b4 /arch | |
parent | 6d0485a99366d4e0e7e725f14995c74cb7ca4499 (diff) | |
parent | 135cad366b4e7d6a79f6369f6cb5b721985aa62f (diff) |
Merge branch 'for-rmk-devel' of git://git.pengutronix.de/git/imx/linux-2.6 into devel
Conflicts:
arch/arm/Kconfig
arch/arm/Makefile
Diffstat (limited to 'arch')
285 files changed, 10523 insertions, 16836 deletions
diff --git a/arch/alpha/include/asm/barrier.h b/arch/alpha/include/asm/barrier.h index ac78eba909bc..ce8860a0b32d 100644 --- a/arch/alpha/include/asm/barrier.h +++ b/arch/alpha/include/asm/barrier.h | |||
@@ -16,11 +16,13 @@ __asm__ __volatile__("wmb": : :"memory") | |||
16 | __asm__ __volatile__("mb": : :"memory") | 16 | __asm__ __volatile__("mb": : :"memory") |
17 | 17 | ||
18 | #ifdef CONFIG_SMP | 18 | #ifdef CONFIG_SMP |
19 | #define __ASM_SMP_MB "\tmb\n" | ||
19 | #define smp_mb() mb() | 20 | #define smp_mb() mb() |
20 | #define smp_rmb() rmb() | 21 | #define smp_rmb() rmb() |
21 | #define smp_wmb() wmb() | 22 | #define smp_wmb() wmb() |
22 | #define smp_read_barrier_depends() read_barrier_depends() | 23 | #define smp_read_barrier_depends() read_barrier_depends() |
23 | #else | 24 | #else |
25 | #define __ASM_SMP_MB | ||
24 | #define smp_mb() barrier() | 26 | #define smp_mb() barrier() |
25 | #define smp_rmb() barrier() | 27 | #define smp_rmb() barrier() |
26 | #define smp_wmb() barrier() | 28 | #define smp_wmb() barrier() |
diff --git a/arch/alpha/include/asm/futex.h b/arch/alpha/include/asm/futex.h index 6a332a9f099c..945de222ab91 100644 --- a/arch/alpha/include/asm/futex.h +++ b/arch/alpha/include/asm/futex.h | |||
@@ -1,6 +1,116 @@ | |||
1 | #ifndef _ASM_FUTEX_H | 1 | #ifndef _ASM_ALPHA_FUTEX_H |
2 | #define _ASM_FUTEX_H | 2 | #define _ASM_ALPHA_FUTEX_H |
3 | 3 | ||
4 | #include <asm-generic/futex.h> | 4 | #ifdef __KERNEL__ |
5 | 5 | ||
6 | #endif | 6 | #include <linux/futex.h> |
7 | #include <linux/uaccess.h> | ||
8 | #include <asm/errno.h> | ||
9 | #include <asm/barrier.h> | ||
10 | |||
11 | #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \ | ||
12 | __asm__ __volatile__( \ | ||
13 | __ASM_SMP_MB \ | ||
14 | "1: ldl_l %0,0(%2)\n" \ | ||
15 | insn \ | ||
16 | "2: stl_c %1,0(%2)\n" \ | ||
17 | " beq %1,4f\n" \ | ||
18 | " mov $31,%1\n" \ | ||
19 | "3: .subsection 2\n" \ | ||
20 | "4: br 1b\n" \ | ||
21 | " .previous\n" \ | ||
22 | " .section __ex_table,\"a\"\n" \ | ||
23 | " .long 1b-.\n" \ | ||
24 | " lda $31,3b-1b(%1)\n" \ | ||
25 | " .long 2b-.\n" \ | ||
26 | " lda $31,3b-2b(%1)\n" \ | ||
27 | " .previous\n" \ | ||
28 | : "=&r" (oldval), "=&r"(ret) \ | ||
29 | : "r" (uaddr), "r"(oparg) \ | ||
30 | : "memory") | ||
31 | |||
32 | static inline int futex_atomic_op_inuser (int encoded_op, int __user *uaddr) | ||
33 | { | ||
34 | int op = (encoded_op >> 28) & 7; | ||
35 | int cmp = (encoded_op >> 24) & 15; | ||
36 | int oparg = (encoded_op << 8) >> 20; | ||
37 | int cmparg = (encoded_op << 20) >> 20; | ||
38 | int oldval = 0, ret; | ||
39 | if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28)) | ||
40 | oparg = 1 << oparg; | ||
41 | |||
42 | if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int))) | ||
43 | return -EFAULT; | ||
44 | |||
45 | pagefault_disable(); | ||
46 | |||
47 | switch (op) { | ||
48 | case FUTEX_OP_SET: | ||
49 | __futex_atomic_op("mov %3,%1\n", ret, oldval, uaddr, oparg); | ||
50 | break; | ||
51 | case FUTEX_OP_ADD: | ||
52 | __futex_atomic_op("addl %0,%3,%1\n", ret, oldval, uaddr, oparg); | ||
53 | break; | ||
54 | case FUTEX_OP_OR: | ||
55 | __futex_atomic_op("or %0,%3,%1\n", ret, oldval, uaddr, oparg); | ||
56 | break; | ||
57 | case FUTEX_OP_ANDN: | ||
58 | __futex_atomic_op("andnot %0,%3,%1\n", ret, oldval, uaddr, oparg); | ||
59 | break; | ||
60 | case FUTEX_OP_XOR: | ||
61 | __futex_atomic_op("xor %0,%3,%1\n", ret, oldval, uaddr, oparg); | ||
62 | break; | ||
63 | default: | ||
64 | ret = -ENOSYS; | ||
65 | } | ||
66 | |||
67 | pagefault_enable(); | ||
68 | |||
69 | if (!ret) { | ||
70 | switch (cmp) { | ||
71 | case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break; | ||
72 | case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break; | ||
73 | case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break; | ||
74 | case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break; | ||
75 | case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break; | ||
76 | case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break; | ||
77 | default: ret = -ENOSYS; | ||
78 | } | ||
79 | } | ||
80 | return ret; | ||
81 | } | ||
82 | |||
83 | static inline int | ||
84 | futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval) | ||
85 | { | ||
86 | int prev, cmp; | ||
87 | |||
88 | if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int))) | ||
89 | return -EFAULT; | ||
90 | |||
91 | __asm__ __volatile__ ( | ||
92 | __ASM_SMP_MB | ||
93 | "1: ldl_l %0,0(%2)\n" | ||
94 | " cmpeq %0,%3,%1\n" | ||
95 | " beq %1,3f\n" | ||
96 | " mov %4,%1\n" | ||
97 | "2: stl_c %1,0(%2)\n" | ||
98 | " beq %1,4f\n" | ||
99 | "3: .subsection 2\n" | ||
100 | "4: br 1b\n" | ||
101 | " .previous\n" | ||
102 | " .section __ex_table,\"a\"\n" | ||
103 | " .long 1b-.\n" | ||
104 | " lda $31,3b-1b(%0)\n" | ||
105 | " .long 2b-.\n" | ||
106 | " lda $31,3b-2b(%0)\n" | ||
107 | " .previous\n" | ||
108 | : "=&r"(prev), "=&r"(cmp) | ||
109 | : "r"(uaddr), "r"((long)oldval), "r"(newval) | ||
110 | : "memory"); | ||
111 | |||
112 | return prev; | ||
113 | } | ||
114 | |||
115 | #endif /* __KERNEL__ */ | ||
116 | #endif /* _ASM_ALPHA_FUTEX_H */ | ||
diff --git a/arch/alpha/include/asm/uaccess.h b/arch/alpha/include/asm/uaccess.h index 163f3053001c..b49ec2f8d6e3 100644 --- a/arch/alpha/include/asm/uaccess.h +++ b/arch/alpha/include/asm/uaccess.h | |||
@@ -507,5 +507,7 @@ struct exception_table_entry | |||
507 | (pc) + (_fixup)->fixup.bits.nextinsn; \ | 507 | (pc) + (_fixup)->fixup.bits.nextinsn; \ |
508 | }) | 508 | }) |
509 | 509 | ||
510 | #define ARCH_HAS_SORT_EXTABLE | ||
511 | #define ARCH_HAS_SEARCH_EXTABLE | ||
510 | 512 | ||
511 | #endif /* __ALPHA_UACCESS_H */ | 513 | #endif /* __ALPHA_UACCESS_H */ |
diff --git a/arch/alpha/kernel/Makefile b/arch/alpha/kernel/Makefile index a427538252f8..7739a62440a7 100644 --- a/arch/alpha/kernel/Makefile +++ b/arch/alpha/kernel/Makefile | |||
@@ -8,7 +8,7 @@ EXTRA_CFLAGS := -Werror -Wno-sign-compare | |||
8 | 8 | ||
9 | obj-y := entry.o traps.o process.o init_task.o osf_sys.o irq.o \ | 9 | obj-y := entry.o traps.o process.o init_task.o osf_sys.o irq.o \ |
10 | irq_alpha.o signal.o setup.o ptrace.o time.o \ | 10 | irq_alpha.o signal.o setup.o ptrace.o time.o \ |
11 | alpha_ksyms.o systbls.o err_common.o io.o binfmt_loader.o | 11 | alpha_ksyms.o systbls.o err_common.o io.o |
12 | 12 | ||
13 | obj-$(CONFIG_VGA_HOSE) += console.o | 13 | obj-$(CONFIG_VGA_HOSE) += console.o |
14 | obj-$(CONFIG_SMP) += smp.o | 14 | obj-$(CONFIG_SMP) += smp.o |
@@ -43,6 +43,10 @@ else | |||
43 | # Misc support | 43 | # Misc support |
44 | obj-$(CONFIG_ALPHA_SRM) += srmcons.o | 44 | obj-$(CONFIG_ALPHA_SRM) += srmcons.o |
45 | 45 | ||
46 | ifdef CONFIG_BINFMT_AOUT | ||
47 | obj-y += binfmt_loader.o | ||
48 | endif | ||
49 | |||
46 | # Core logic support | 50 | # Core logic support |
47 | obj-$(CONFIG_ALPHA_APECS) += core_apecs.o | 51 | obj-$(CONFIG_ALPHA_APECS) += core_apecs.o |
48 | obj-$(CONFIG_ALPHA_CIA) += core_cia.o | 52 | obj-$(CONFIG_ALPHA_CIA) += core_cia.o |
diff --git a/arch/alpha/kernel/binfmt_loader.c b/arch/alpha/kernel/binfmt_loader.c index 4a0af906b00a..3fcfad410130 100644 --- a/arch/alpha/kernel/binfmt_loader.c +++ b/arch/alpha/kernel/binfmt_loader.c | |||
@@ -46,6 +46,6 @@ static struct linux_binfmt loader_format = { | |||
46 | 46 | ||
47 | static int __init init_loader_binfmt(void) | 47 | static int __init init_loader_binfmt(void) |
48 | { | 48 | { |
49 | return register_binfmt(&loader_format); | 49 | return insert_binfmt(&loader_format); |
50 | } | 50 | } |
51 | arch_initcall(init_loader_binfmt); | 51 | arch_initcall(init_loader_binfmt); |
diff --git a/arch/alpha/kernel/err_ev6.c b/arch/alpha/kernel/err_ev6.c index 985e5c1681ac..8ca6345bf131 100644 --- a/arch/alpha/kernel/err_ev6.c +++ b/arch/alpha/kernel/err_ev6.c | |||
@@ -229,7 +229,7 @@ ev6_process_logout_frame(struct el_common *mchk_header, int print) | |||
229 | } | 229 | } |
230 | 230 | ||
231 | void | 231 | void |
232 | ev6_machine_check(u64 vector, u64 la_ptr) | 232 | ev6_machine_check(unsigned long vector, unsigned long la_ptr) |
233 | { | 233 | { |
234 | struct el_common *mchk_header = (struct el_common *)la_ptr; | 234 | struct el_common *mchk_header = (struct el_common *)la_ptr; |
235 | 235 | ||
diff --git a/arch/alpha/kernel/err_ev7.c b/arch/alpha/kernel/err_ev7.c index 73770c6ca013..d738a67112d4 100644 --- a/arch/alpha/kernel/err_ev7.c +++ b/arch/alpha/kernel/err_ev7.c | |||
@@ -117,7 +117,7 @@ ev7_collect_logout_frame_subpackets(struct el_subpacket *el_ptr, | |||
117 | } | 117 | } |
118 | 118 | ||
119 | void | 119 | void |
120 | ev7_machine_check(u64 vector, u64 la_ptr) | 120 | ev7_machine_check(unsigned long vector, unsigned long la_ptr) |
121 | { | 121 | { |
122 | struct el_subpacket *el_ptr = (struct el_subpacket *)la_ptr; | 122 | struct el_subpacket *el_ptr = (struct el_subpacket *)la_ptr; |
123 | char *saved_err_prefix = err_print_prefix; | 123 | char *saved_err_prefix = err_print_prefix; |
@@ -246,7 +246,7 @@ ev7_process_pal_subpacket(struct el_subpacket *header) | |||
246 | 246 | ||
247 | switch(header->type) { | 247 | switch(header->type) { |
248 | case EL_TYPE__PAL__LOGOUT_FRAME: | 248 | case EL_TYPE__PAL__LOGOUT_FRAME: |
249 | printk("%s*** MCHK occurred on LPID %ld (RBOX %llx)\n", | 249 | printk("%s*** MCHK occurred on LPID %lld (RBOX %llx)\n", |
250 | err_print_prefix, | 250 | err_print_prefix, |
251 | packet->by_type.logout.whami, | 251 | packet->by_type.logout.whami, |
252 | packet->by_type.logout.rbox_whami); | 252 | packet->by_type.logout.rbox_whami); |
diff --git a/arch/alpha/kernel/err_impl.h b/arch/alpha/kernel/err_impl.h index 3c12258158e6..0c010ca4611e 100644 --- a/arch/alpha/kernel/err_impl.h +++ b/arch/alpha/kernel/err_impl.h | |||
@@ -60,26 +60,26 @@ extern struct ev7_lf_subpackets * | |||
60 | ev7_collect_logout_frame_subpackets(struct el_subpacket *, | 60 | ev7_collect_logout_frame_subpackets(struct el_subpacket *, |
61 | struct ev7_lf_subpackets *); | 61 | struct ev7_lf_subpackets *); |
62 | extern void ev7_register_error_handlers(void); | 62 | extern void ev7_register_error_handlers(void); |
63 | extern void ev7_machine_check(u64, u64); | 63 | extern void ev7_machine_check(unsigned long, unsigned long); |
64 | 64 | ||
65 | /* | 65 | /* |
66 | * err_ev6.c | 66 | * err_ev6.c |
67 | */ | 67 | */ |
68 | extern void ev6_register_error_handlers(void); | 68 | extern void ev6_register_error_handlers(void); |
69 | extern int ev6_process_logout_frame(struct el_common *, int); | 69 | extern int ev6_process_logout_frame(struct el_common *, int); |
70 | extern void ev6_machine_check(u64, u64); | 70 | extern void ev6_machine_check(unsigned long, unsigned long); |
71 | 71 | ||
72 | /* | 72 | /* |
73 | * err_marvel.c | 73 | * err_marvel.c |
74 | */ | 74 | */ |
75 | extern void marvel_machine_check(u64, u64); | 75 | extern void marvel_machine_check(unsigned long, unsigned long); |
76 | extern void marvel_register_error_handlers(void); | 76 | extern void marvel_register_error_handlers(void); |
77 | 77 | ||
78 | /* | 78 | /* |
79 | * err_titan.c | 79 | * err_titan.c |
80 | */ | 80 | */ |
81 | extern int titan_process_logout_frame(struct el_common *, int); | 81 | extern int titan_process_logout_frame(struct el_common *, int); |
82 | extern void titan_machine_check(u64, u64); | 82 | extern void titan_machine_check(unsigned long, unsigned long); |
83 | extern void titan_register_error_handlers(void); | 83 | extern void titan_register_error_handlers(void); |
84 | extern int privateer_process_logout_frame(struct el_common *, int); | 84 | extern int privateer_process_logout_frame(struct el_common *, int); |
85 | extern void privateer_machine_check(u64, u64); | 85 | extern void privateer_machine_check(unsigned long, unsigned long); |
diff --git a/arch/alpha/kernel/err_marvel.c b/arch/alpha/kernel/err_marvel.c index 6bfd243efba3..52a79dfc13c6 100644 --- a/arch/alpha/kernel/err_marvel.c +++ b/arch/alpha/kernel/err_marvel.c | |||
@@ -1042,7 +1042,7 @@ marvel_process_logout_frame(struct ev7_lf_subpackets *lf_subpackets, int print) | |||
1042 | } | 1042 | } |
1043 | 1043 | ||
1044 | void | 1044 | void |
1045 | marvel_machine_check(u64 vector, u64 la_ptr) | 1045 | marvel_machine_check(unsigned long vector, unsigned long la_ptr) |
1046 | { | 1046 | { |
1047 | struct el_subpacket *el_ptr = (struct el_subpacket *)la_ptr; | 1047 | struct el_subpacket *el_ptr = (struct el_subpacket *)la_ptr; |
1048 | int (*process_frame)(struct ev7_lf_subpackets *, int) = NULL; | 1048 | int (*process_frame)(struct ev7_lf_subpackets *, int) = NULL; |
diff --git a/arch/alpha/kernel/err_titan.c b/arch/alpha/kernel/err_titan.c index c7e28a88d6e3..f7ed97ce0dfd 100644 --- a/arch/alpha/kernel/err_titan.c +++ b/arch/alpha/kernel/err_titan.c | |||
@@ -380,7 +380,7 @@ titan_process_logout_frame(struct el_common *mchk_header, int print) | |||
380 | } | 380 | } |
381 | 381 | ||
382 | void | 382 | void |
383 | titan_machine_check(u64 vector, u64 la_ptr) | 383 | titan_machine_check(unsigned long vector, unsigned long la_ptr) |
384 | { | 384 | { |
385 | struct el_common *mchk_header = (struct el_common *)la_ptr; | 385 | struct el_common *mchk_header = (struct el_common *)la_ptr; |
386 | struct el_TITAN_sysdata_mcheck *tmchk = | 386 | struct el_TITAN_sysdata_mcheck *tmchk = |
@@ -702,7 +702,7 @@ privateer_process_logout_frame(struct el_common *mchk_header, int print) | |||
702 | } | 702 | } |
703 | 703 | ||
704 | void | 704 | void |
705 | privateer_machine_check(u64 vector, u64 la_ptr) | 705 | privateer_machine_check(unsigned long vector, unsigned long la_ptr) |
706 | { | 706 | { |
707 | struct el_common *mchk_header = (struct el_common *)la_ptr; | 707 | struct el_common *mchk_header = (struct el_common *)la_ptr; |
708 | struct el_TITAN_sysdata_mcheck *tmchk = | 708 | struct el_TITAN_sysdata_mcheck *tmchk = |
diff --git a/arch/alpha/kernel/head.S b/arch/alpha/kernel/head.S index 7ac1f1372c36..4bdd1d2ff353 100644 --- a/arch/alpha/kernel/head.S +++ b/arch/alpha/kernel/head.S | |||
@@ -7,10 +7,11 @@ | |||
7 | * the kernel global pointer and jump to the kernel entry-point. | 7 | * the kernel global pointer and jump to the kernel entry-point. |
8 | */ | 8 | */ |
9 | 9 | ||
10 | #include <linux/init.h> | ||
10 | #include <asm/system.h> | 11 | #include <asm/system.h> |
11 | #include <asm/asm-offsets.h> | 12 | #include <asm/asm-offsets.h> |
12 | 13 | ||
13 | .section .text.head, "ax" | 14 | __HEAD |
14 | .globl swapper_pg_dir | 15 | .globl swapper_pg_dir |
15 | .globl _stext | 16 | .globl _stext |
16 | swapper_pg_dir=SWAPPER_PGD | 17 | swapper_pg_dir=SWAPPER_PGD |
diff --git a/arch/alpha/kernel/proto.h b/arch/alpha/kernel/proto.h index 567f2598d090..3d2627ec9860 100644 --- a/arch/alpha/kernel/proto.h +++ b/arch/alpha/kernel/proto.h | |||
@@ -36,7 +36,6 @@ extern void cia_pci_tbi(struct pci_controller *, dma_addr_t, dma_addr_t); | |||
36 | extern struct pci_ops irongate_pci_ops; | 36 | extern struct pci_ops irongate_pci_ops; |
37 | extern int irongate_pci_clr_err(void); | 37 | extern int irongate_pci_clr_err(void); |
38 | extern void irongate_init_arch(void); | 38 | extern void irongate_init_arch(void); |
39 | extern void irongate_machine_check(u64, u64); | ||
40 | #define irongate_pci_tbi ((void *)0) | 39 | #define irongate_pci_tbi ((void *)0) |
41 | 40 | ||
42 | /* core_lca.c */ | 41 | /* core_lca.c */ |
@@ -49,7 +48,7 @@ extern void lca_pci_tbi(struct pci_controller *, dma_addr_t, dma_addr_t); | |||
49 | extern struct pci_ops marvel_pci_ops; | 48 | extern struct pci_ops marvel_pci_ops; |
50 | extern void marvel_init_arch(void); | 49 | extern void marvel_init_arch(void); |
51 | extern void marvel_kill_arch(int); | 50 | extern void marvel_kill_arch(int); |
52 | extern void marvel_machine_check(u64, u64); | 51 | extern void marvel_machine_check(unsigned long, unsigned long); |
53 | extern void marvel_pci_tbi(struct pci_controller *, dma_addr_t, dma_addr_t); | 52 | extern void marvel_pci_tbi(struct pci_controller *, dma_addr_t, dma_addr_t); |
54 | extern int marvel_pa_to_nid(unsigned long); | 53 | extern int marvel_pa_to_nid(unsigned long); |
55 | extern int marvel_cpuid_to_nid(int); | 54 | extern int marvel_cpuid_to_nid(int); |
@@ -86,7 +85,7 @@ extern void t2_pci_tbi(struct pci_controller *, dma_addr_t, dma_addr_t); | |||
86 | extern struct pci_ops titan_pci_ops; | 85 | extern struct pci_ops titan_pci_ops; |
87 | extern void titan_init_arch(void); | 86 | extern void titan_init_arch(void); |
88 | extern void titan_kill_arch(int); | 87 | extern void titan_kill_arch(int); |
89 | extern void titan_machine_check(u64, u64); | 88 | extern void titan_machine_check(unsigned long, unsigned long); |
90 | extern void titan_pci_tbi(struct pci_controller *, dma_addr_t, dma_addr_t); | 89 | extern void titan_pci_tbi(struct pci_controller *, dma_addr_t, dma_addr_t); |
91 | extern struct _alpha_agp_info *titan_agp_info(void); | 90 | extern struct _alpha_agp_info *titan_agp_info(void); |
92 | 91 | ||
diff --git a/arch/alpha/kernel/vmlinux.lds.S b/arch/alpha/kernel/vmlinux.lds.S index ef37fc1acaea..b9d6568e5f7f 100644 --- a/arch/alpha/kernel/vmlinux.lds.S +++ b/arch/alpha/kernel/vmlinux.lds.S | |||
@@ -16,7 +16,7 @@ SECTIONS | |||
16 | 16 | ||
17 | _text = .; /* Text and read-only data */ | 17 | _text = .; /* Text and read-only data */ |
18 | .text : { | 18 | .text : { |
19 | *(.text.head) | 19 | HEAD_TEXT |
20 | TEXT_TEXT | 20 | TEXT_TEXT |
21 | SCHED_TEXT | 21 | SCHED_TEXT |
22 | LOCK_TEXT | 22 | LOCK_TEXT |
diff --git a/arch/alpha/mm/extable.c b/arch/alpha/mm/extable.c index dc7aeda15773..62dc379d301a 100644 --- a/arch/alpha/mm/extable.c +++ b/arch/alpha/mm/extable.c | |||
@@ -3,11 +3,49 @@ | |||
3 | */ | 3 | */ |
4 | 4 | ||
5 | #include <linux/module.h> | 5 | #include <linux/module.h> |
6 | #include <linux/sort.h> | ||
6 | #include <asm/uaccess.h> | 7 | #include <asm/uaccess.h> |
7 | 8 | ||
9 | static inline unsigned long ex_to_addr(const struct exception_table_entry *x) | ||
10 | { | ||
11 | return (unsigned long)&x->insn + x->insn; | ||
12 | } | ||
13 | |||
14 | static void swap_ex(void *a, void *b, int size) | ||
15 | { | ||
16 | struct exception_table_entry *ex_a = a, *ex_b = b; | ||
17 | unsigned long addr_a = ex_to_addr(ex_a), addr_b = ex_to_addr(ex_b); | ||
18 | unsigned int t = ex_a->fixup.unit; | ||
19 | |||
20 | ex_a->fixup.unit = ex_b->fixup.unit; | ||
21 | ex_b->fixup.unit = t; | ||
22 | ex_a->insn = (int)(addr_b - (unsigned long)&ex_a->insn); | ||
23 | ex_b->insn = (int)(addr_a - (unsigned long)&ex_b->insn); | ||
24 | } | ||
25 | |||
26 | /* | ||
27 | * The exception table needs to be sorted so that the binary | ||
28 | * search that we use to find entries in it works properly. | ||
29 | * This is used both for the kernel exception table and for | ||
30 | * the exception tables of modules that get loaded. | ||
31 | */ | ||
32 | static int cmp_ex(const void *a, const void *b) | ||
33 | { | ||
34 | const struct exception_table_entry *x = a, *y = b; | ||
35 | |||
36 | /* avoid overflow */ | ||
37 | if (ex_to_addr(x) > ex_to_addr(y)) | ||
38 | return 1; | ||
39 | if (ex_to_addr(x) < ex_to_addr(y)) | ||
40 | return -1; | ||
41 | return 0; | ||
42 | } | ||
43 | |||
8 | void sort_extable(struct exception_table_entry *start, | 44 | void sort_extable(struct exception_table_entry *start, |
9 | struct exception_table_entry *finish) | 45 | struct exception_table_entry *finish) |
10 | { | 46 | { |
47 | sort(start, finish - start, sizeof(struct exception_table_entry), | ||
48 | cmp_ex, swap_ex); | ||
11 | } | 49 | } |
12 | 50 | ||
13 | const struct exception_table_entry * | 51 | const struct exception_table_entry * |
@@ -20,7 +58,7 @@ search_extable(const struct exception_table_entry *first, | |||
20 | unsigned long mid_value; | 58 | unsigned long mid_value; |
21 | 59 | ||
22 | mid = (last - first) / 2 + first; | 60 | mid = (last - first) / 2 + first; |
23 | mid_value = (unsigned long)&mid->insn + mid->insn; | 61 | mid_value = ex_to_addr(mid); |
24 | if (mid_value == value) | 62 | if (mid_value == value) |
25 | return mid; | 63 | return mid; |
26 | else if (mid_value < value) | 64 | else if (mid_value < value) |
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index a930e5c5672c..c52f6909f65d 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -299,6 +299,7 @@ config ARCH_MXC | |||
299 | select ARCH_MTD_XIP | 299 | select ARCH_MTD_XIP |
300 | select GENERIC_GPIO | 300 | select GENERIC_GPIO |
301 | select ARCH_REQUIRE_GPIOLIB | 301 | select ARCH_REQUIRE_GPIOLIB |
302 | select HAVE_CLK | ||
302 | help | 303 | help |
303 | Support for Freescale MXC/iMX-based family of processors | 304 | Support for Freescale MXC/iMX-based family of processors |
304 | 305 | ||
@@ -318,15 +319,6 @@ config ARCH_H720X | |||
318 | help | 319 | help |
319 | This enables support for systems based on the Hynix HMS720x | 320 | This enables support for systems based on the Hynix HMS720x |
320 | 321 | ||
321 | config ARCH_IMX | ||
322 | bool "IMX" | ||
323 | select CPU_ARM920T | ||
324 | select GENERIC_GPIO | ||
325 | select GENERIC_TIME | ||
326 | select GENERIC_CLOCKEVENTS | ||
327 | help | ||
328 | Support for Motorola's i.MX family of processors (MX1, MXL). | ||
329 | |||
330 | config ARCH_IOP13XX | 322 | config ARCH_IOP13XX |
331 | bool "IOP13xx-based" | 323 | bool "IOP13xx-based" |
332 | depends on MMU | 324 | depends on MMU |
@@ -507,8 +499,6 @@ config ARCH_PXA | |||
507 | select HAVE_CLK | 499 | select HAVE_CLK |
508 | select COMMON_CLKDEV | 500 | select COMMON_CLKDEV |
509 | select ARCH_REQUIRE_GPIOLIB | 501 | select ARCH_REQUIRE_GPIOLIB |
510 | select HAVE_CLK | ||
511 | select COMMON_CLKDEV | ||
512 | select GENERIC_TIME | 502 | select GENERIC_TIME |
513 | select GENERIC_CLOCKEVENTS | 503 | select GENERIC_CLOCKEVENTS |
514 | select TICK_ONESHOT | 504 | select TICK_ONESHOT |
@@ -603,6 +593,8 @@ config ARCH_DAVINCI | |||
603 | select ARCH_REQUIRE_GPIOLIB | 593 | select ARCH_REQUIRE_GPIOLIB |
604 | select HAVE_CLK | 594 | select HAVE_CLK |
605 | select ZONE_DMA | 595 | select ZONE_DMA |
596 | select HAVE_IDE | ||
597 | select COMMON_CLKDEV | ||
606 | help | 598 | help |
607 | Support for TI's DaVinci platform. | 599 | Support for TI's DaVinci platform. |
608 | 600 | ||
@@ -681,8 +673,6 @@ endif | |||
681 | 673 | ||
682 | source "arch/arm/mach-lh7a40x/Kconfig" | 674 | source "arch/arm/mach-lh7a40x/Kconfig" |
683 | 675 | ||
684 | source "arch/arm/mach-imx/Kconfig" | ||
685 | |||
686 | source "arch/arm/mach-h720x/Kconfig" | 676 | source "arch/arm/mach-h720x/Kconfig" |
687 | 677 | ||
688 | source "arch/arm/mach-versatile/Kconfig" | 678 | source "arch/arm/mach-versatile/Kconfig" |
@@ -740,6 +730,56 @@ if !MMU | |||
740 | source "arch/arm/Kconfig-nommu" | 730 | source "arch/arm/Kconfig-nommu" |
741 | endif | 731 | endif |
742 | 732 | ||
733 | config ARM_ERRATA_411920 | ||
734 | bool "ARM errata: Invalidation of the Instruction Cache operation can fail" | ||
735 | depends on CPU_V6 && !SMP | ||
736 | help | ||
737 | Invalidation of the Instruction Cache operation can | ||
738 | fail. This erratum is present in 1136 (before r1p4), 1156 and 1176. | ||
739 | It does not affect the MPCore. This option enables the ARM Ltd. | ||
740 | recommended workaround. | ||
741 | |||
742 | config ARM_ERRATA_430973 | ||
743 | bool "ARM errata: Stale prediction on replaced interworking branch" | ||
744 | depends on CPU_V7 | ||
745 | help | ||
746 | This option enables the workaround for the 430973 Cortex-A8 | ||
747 | (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb | ||
748 | interworking branch is replaced with another code sequence at the | ||
749 | same virtual address, whether due to self-modifying code or virtual | ||
750 | to physical address re-mapping, Cortex-A8 does not recover from the | ||
751 | stale interworking branch prediction. This results in Cortex-A8 | ||
752 | executing the new code sequence in the incorrect ARM or Thumb state. | ||
753 | The workaround enables the BTB/BTAC operations by setting ACTLR.IBE | ||
754 | and also flushes the branch target cache at every context switch. | ||
755 | Note that setting specific bits in the ACTLR register may not be | ||
756 | available in non-secure mode. | ||
757 | |||
758 | config ARM_ERRATA_458693 | ||
759 | bool "ARM errata: Processor deadlock when a false hazard is created" | ||
760 | depends on CPU_V7 | ||
761 | help | ||
762 | This option enables the workaround for the 458693 Cortex-A8 (r2p0) | ||
763 | erratum. For very specific sequences of memory operations, it is | ||
764 | possible for a hazard condition intended for a cache line to instead | ||
765 | be incorrectly associated with a different cache line. This false | ||
766 | hazard might then cause a processor deadlock. The workaround enables | ||
767 | the L1 caching of the NEON accesses and disables the PLD instruction | ||
768 | in the ACTLR register. Note that setting specific bits in the ACTLR | ||
769 | register may not be available in non-secure mode. | ||
770 | |||
771 | config ARM_ERRATA_460075 | ||
772 | bool "ARM errata: Data written to the L2 cache can be overwritten with stale data" | ||
773 | depends on CPU_V7 | ||
774 | help | ||
775 | This option enables the workaround for the 460075 Cortex-A8 (r2p0) | ||
776 | erratum. Any asynchronous access to the L2 cache may encounter a | ||
777 | situation in which recent store transactions to the L2 cache are lost | ||
778 | and overwritten with stale memory contents from external memory. The | ||
779 | workaround disables the write-allocate mode for the L2 cache via the | ||
780 | ACTLR register. Note that setting specific bits in the ACTLR register | ||
781 | may not be available in non-secure mode. | ||
782 | |||
743 | endmenu | 783 | endmenu |
744 | 784 | ||
745 | source "arch/arm/common/Kconfig" | 785 | source "arch/arm/common/Kconfig" |
@@ -971,7 +1011,7 @@ source "mm/Kconfig" | |||
971 | config LEDS | 1011 | config LEDS |
972 | bool "Timer and CPU usage LEDs" | 1012 | bool "Timer and CPU usage LEDs" |
973 | depends on ARCH_CDB89712 || ARCH_EBSA110 || \ | 1013 | depends on ARCH_CDB89712 || ARCH_EBSA110 || \ |
974 | ARCH_EBSA285 || ARCH_IMX || ARCH_INTEGRATOR || \ | 1014 | ARCH_EBSA285 || ARCH_INTEGRATOR || \ |
975 | ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \ | 1015 | ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \ |
976 | ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ | 1016 | ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ |
977 | ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \ | 1017 | ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \ |
@@ -1137,7 +1177,7 @@ endmenu | |||
1137 | 1177 | ||
1138 | menu "CPU Power Management" | 1178 | menu "CPU Power Management" |
1139 | 1179 | ||
1140 | if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_IMX || ARCH_PXA) | 1180 | if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_PXA) |
1141 | 1181 | ||
1142 | source "drivers/cpufreq/Kconfig" | 1182 | source "drivers/cpufreq/Kconfig" |
1143 | 1183 | ||
@@ -1162,15 +1202,6 @@ config CPU_FREQ_INTEGRATOR | |||
1162 | 1202 | ||
1163 | If in doubt, say Y. | 1203 | If in doubt, say Y. |
1164 | 1204 | ||
1165 | config CPU_FREQ_IMX | ||
1166 | tristate "CPUfreq driver for i.MX CPUs" | ||
1167 | depends on ARCH_IMX && CPU_FREQ | ||
1168 | default n | ||
1169 | help | ||
1170 | This enables the CPUfreq driver for i.MX CPUs. | ||
1171 | |||
1172 | If in doubt, say N. | ||
1173 | |||
1174 | config CPU_FREQ_PXA | 1205 | config CPU_FREQ_PXA |
1175 | bool | 1206 | bool |
1176 | depends on CPU_FREQ && ARCH_PXA && PXA25x | 1207 | depends on CPU_FREQ && ARCH_PXA && PXA25x |
diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 885a83724b9c..b6b9f6ee467b 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile | |||
@@ -115,7 +115,6 @@ machine-$(CONFIG_ARCH_EBSA110) := ebsa110 | |||
115 | machine-$(CONFIG_ARCH_EP93XX) := ep93xx | 115 | machine-$(CONFIG_ARCH_EP93XX) := ep93xx |
116 | machine-$(CONFIG_ARCH_GEMINI) := gemini | 116 | machine-$(CONFIG_ARCH_GEMINI) := gemini |
117 | machine-$(CONFIG_ARCH_H720X) := h720x | 117 | machine-$(CONFIG_ARCH_H720X) := h720x |
118 | machine-$(CONFIG_ARCH_IMX) := imx | ||
119 | machine-$(CONFIG_ARCH_INTEGRATOR) := integrator | 118 | machine-$(CONFIG_ARCH_INTEGRATOR) := integrator |
120 | machine-$(CONFIG_ARCH_IOP13XX) := iop13xx | 119 | machine-$(CONFIG_ARCH_IOP13XX) := iop13xx |
121 | machine-$(CONFIG_ARCH_IOP32X) := iop32x | 120 | machine-$(CONFIG_ARCH_IOP32X) := iop32x |
diff --git a/arch/arm/configs/davinci_all_defconfig b/arch/arm/configs/davinci_all_defconfig new file mode 100644 index 000000000000..eb2738b5be5f --- /dev/null +++ b/arch/arm/configs/davinci_all_defconfig | |||
@@ -0,0 +1,1784 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.30-rc2 | ||
4 | # Wed Apr 15 08:16:53 2009 | ||
5 | # | ||
6 | CONFIG_ARM=y | ||
7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
8 | CONFIG_GENERIC_GPIO=y | ||
9 | CONFIG_GENERIC_TIME=y | ||
10 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
11 | CONFIG_MMU=y | ||
12 | # CONFIG_NO_IOPORT is not set | ||
13 | CONFIG_GENERIC_HARDIRQS=y | ||
14 | CONFIG_STACKTRACE_SUPPORT=y | ||
15 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
16 | CONFIG_LOCKDEP_SUPPORT=y | ||
17 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
18 | CONFIG_HARDIRQS_SW_RESEND=y | ||
19 | CONFIG_GENERIC_IRQ_PROBE=y | ||
20 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
21 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
22 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
23 | CONFIG_GENERIC_HWEIGHT=y | ||
24 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
25 | CONFIG_ZONE_DMA=y | ||
26 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
27 | CONFIG_VECTORS_BASE=0xffff0000 | ||
28 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
29 | |||
30 | # | ||
31 | # General setup | ||
32 | # | ||
33 | CONFIG_EXPERIMENTAL=y | ||
34 | CONFIG_BROKEN_ON_SMP=y | ||
35 | CONFIG_LOCK_KERNEL=y | ||
36 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
37 | CONFIG_LOCALVERSION="" | ||
38 | CONFIG_LOCALVERSION_AUTO=y | ||
39 | # CONFIG_SWAP is not set | ||
40 | CONFIG_SYSVIPC=y | ||
41 | CONFIG_SYSVIPC_SYSCTL=y | ||
42 | CONFIG_POSIX_MQUEUE=y | ||
43 | CONFIG_POSIX_MQUEUE_SYSCTL=y | ||
44 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
45 | # CONFIG_TASKSTATS is not set | ||
46 | # CONFIG_AUDIT is not set | ||
47 | |||
48 | # | ||
49 | # RCU Subsystem | ||
50 | # | ||
51 | CONFIG_CLASSIC_RCU=y | ||
52 | # CONFIG_TREE_RCU is not set | ||
53 | # CONFIG_PREEMPT_RCU is not set | ||
54 | # CONFIG_TREE_RCU_TRACE is not set | ||
55 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
56 | CONFIG_IKCONFIG=y | ||
57 | CONFIG_IKCONFIG_PROC=y | ||
58 | CONFIG_LOG_BUF_SHIFT=14 | ||
59 | CONFIG_GROUP_SCHED=y | ||
60 | CONFIG_FAIR_GROUP_SCHED=y | ||
61 | # CONFIG_RT_GROUP_SCHED is not set | ||
62 | CONFIG_USER_SCHED=y | ||
63 | # CONFIG_CGROUP_SCHED is not set | ||
64 | # CONFIG_CGROUPS is not set | ||
65 | CONFIG_SYSFS_DEPRECATED=y | ||
66 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
67 | # CONFIG_RELAY is not set | ||
68 | # CONFIG_NAMESPACES is not set | ||
69 | CONFIG_BLK_DEV_INITRD=y | ||
70 | CONFIG_INITRAMFS_SOURCE="" | ||
71 | CONFIG_RD_GZIP=y | ||
72 | # CONFIG_RD_BZIP2 is not set | ||
73 | # CONFIG_RD_LZMA is not set | ||
74 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
75 | CONFIG_SYSCTL=y | ||
76 | CONFIG_ANON_INODES=y | ||
77 | CONFIG_EMBEDDED=y | ||
78 | CONFIG_UID16=y | ||
79 | CONFIG_SYSCTL_SYSCALL=y | ||
80 | CONFIG_KALLSYMS=y | ||
81 | # CONFIG_KALLSYMS_ALL is not set | ||
82 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
83 | # CONFIG_STRIP_ASM_SYMS is not set | ||
84 | CONFIG_HOTPLUG=y | ||
85 | CONFIG_PRINTK=y | ||
86 | CONFIG_BUG=y | ||
87 | CONFIG_ELF_CORE=y | ||
88 | CONFIG_BASE_FULL=y | ||
89 | CONFIG_FUTEX=y | ||
90 | CONFIG_EPOLL=y | ||
91 | CONFIG_SIGNALFD=y | ||
92 | CONFIG_TIMERFD=y | ||
93 | CONFIG_EVENTFD=y | ||
94 | CONFIG_SHMEM=y | ||
95 | CONFIG_AIO=y | ||
96 | CONFIG_VM_EVENT_COUNTERS=y | ||
97 | CONFIG_SLUB_DEBUG=y | ||
98 | CONFIG_COMPAT_BRK=y | ||
99 | # CONFIG_SLAB is not set | ||
100 | CONFIG_SLUB=y | ||
101 | # CONFIG_SLOB is not set | ||
102 | # CONFIG_PROFILING is not set | ||
103 | # CONFIG_MARKERS is not set | ||
104 | CONFIG_HAVE_OPROFILE=y | ||
105 | # CONFIG_KPROBES is not set | ||
106 | CONFIG_HAVE_KPROBES=y | ||
107 | CONFIG_HAVE_KRETPROBES=y | ||
108 | CONFIG_HAVE_CLK=y | ||
109 | # CONFIG_SLOW_WORK is not set | ||
110 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
111 | CONFIG_SLABINFO=y | ||
112 | CONFIG_RT_MUTEXES=y | ||
113 | CONFIG_BASE_SMALL=0 | ||
114 | CONFIG_MODULES=y | ||
115 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
116 | CONFIG_MODULE_UNLOAD=y | ||
117 | CONFIG_MODULE_FORCE_UNLOAD=y | ||
118 | CONFIG_MODVERSIONS=y | ||
119 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
120 | CONFIG_BLOCK=y | ||
121 | # CONFIG_LBD is not set | ||
122 | # CONFIG_BLK_DEV_BSG is not set | ||
123 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
124 | |||
125 | # | ||
126 | # IO Schedulers | ||
127 | # | ||
128 | CONFIG_IOSCHED_NOOP=y | ||
129 | CONFIG_IOSCHED_AS=y | ||
130 | # CONFIG_IOSCHED_DEADLINE is not set | ||
131 | # CONFIG_IOSCHED_CFQ is not set | ||
132 | CONFIG_DEFAULT_AS=y | ||
133 | # CONFIG_DEFAULT_DEADLINE is not set | ||
134 | # CONFIG_DEFAULT_CFQ is not set | ||
135 | # CONFIG_DEFAULT_NOOP is not set | ||
136 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
137 | # CONFIG_FREEZER is not set | ||
138 | |||
139 | # | ||
140 | # System Type | ||
141 | # | ||
142 | # CONFIG_ARCH_AAEC2000 is not set | ||
143 | # CONFIG_ARCH_INTEGRATOR is not set | ||
144 | # CONFIG_ARCH_REALVIEW is not set | ||
145 | # CONFIG_ARCH_VERSATILE is not set | ||
146 | # CONFIG_ARCH_AT91 is not set | ||
147 | # CONFIG_ARCH_CLPS711X is not set | ||
148 | # CONFIG_ARCH_EBSA110 is not set | ||
149 | # CONFIG_ARCH_EP93XX is not set | ||
150 | # CONFIG_ARCH_GEMINI is not set | ||
151 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
152 | # CONFIG_ARCH_NETX is not set | ||
153 | # CONFIG_ARCH_H720X is not set | ||
154 | # CONFIG_ARCH_IMX is not set | ||
155 | # CONFIG_ARCH_IOP13XX is not set | ||
156 | # CONFIG_ARCH_IOP32X is not set | ||
157 | # CONFIG_ARCH_IOP33X is not set | ||
158 | # CONFIG_ARCH_IXP23XX is not set | ||
159 | # CONFIG_ARCH_IXP2000 is not set | ||
160 | # CONFIG_ARCH_IXP4XX is not set | ||
161 | # CONFIG_ARCH_L7200 is not set | ||
162 | # CONFIG_ARCH_KIRKWOOD is not set | ||
163 | # CONFIG_ARCH_KS8695 is not set | ||
164 | # CONFIG_ARCH_NS9XXX is not set | ||
165 | # CONFIG_ARCH_LOKI is not set | ||
166 | # CONFIG_ARCH_MV78XX0 is not set | ||
167 | # CONFIG_ARCH_MXC is not set | ||
168 | # CONFIG_ARCH_ORION5X is not set | ||
169 | # CONFIG_ARCH_PNX4008 is not set | ||
170 | # CONFIG_ARCH_PXA is not set | ||
171 | # CONFIG_ARCH_MMP is not set | ||
172 | # CONFIG_ARCH_RPC is not set | ||
173 | # CONFIG_ARCH_SA1100 is not set | ||
174 | # CONFIG_ARCH_S3C2410 is not set | ||
175 | # CONFIG_ARCH_S3C64XX is not set | ||
176 | # CONFIG_ARCH_SHARK is not set | ||
177 | # CONFIG_ARCH_LH7A40X is not set | ||
178 | CONFIG_ARCH_DAVINCI=y | ||
179 | # CONFIG_ARCH_OMAP is not set | ||
180 | # CONFIG_ARCH_MSM is not set | ||
181 | # CONFIG_ARCH_W90X900 is not set | ||
182 | |||
183 | # | ||
184 | # TI DaVinci Implementations | ||
185 | # | ||
186 | |||
187 | # | ||
188 | # DaVinci Core Type | ||
189 | # | ||
190 | CONFIG_ARCH_DAVINCI_DM644x=y | ||
191 | |||
192 | # | ||
193 | # DaVinci Board Type | ||
194 | # | ||
195 | CONFIG_MACH_DAVINCI_EVM=y | ||
196 | CONFIG_DAVINCI_MUX=y | ||
197 | CONFIG_DAVINCI_MUX_DEBUG=y | ||
198 | CONFIG_DAVINCI_MUX_WARNINGS=y | ||
199 | CONFIG_DAVINCI_RESET_CLOCKS=y | ||
200 | |||
201 | # | ||
202 | # Processor Type | ||
203 | # | ||
204 | CONFIG_CPU_32=y | ||
205 | CONFIG_CPU_ARM926T=y | ||
206 | CONFIG_CPU_32v5=y | ||
207 | CONFIG_CPU_ABRT_EV5TJ=y | ||
208 | CONFIG_CPU_PABRT_NOIFAR=y | ||
209 | CONFIG_CPU_CACHE_VIVT=y | ||
210 | CONFIG_CPU_COPY_V4WB=y | ||
211 | CONFIG_CPU_TLB_V4WBI=y | ||
212 | CONFIG_CPU_CP15=y | ||
213 | CONFIG_CPU_CP15_MMU=y | ||
214 | |||
215 | # | ||
216 | # Processor Features | ||
217 | # | ||
218 | CONFIG_ARM_THUMB=y | ||
219 | # CONFIG_CPU_ICACHE_DISABLE is not set | ||
220 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
221 | # CONFIG_CPU_DCACHE_WRITETHROUGH is not set | ||
222 | # CONFIG_CPU_CACHE_ROUND_ROBIN is not set | ||
223 | # CONFIG_OUTER_CACHE is not set | ||
224 | CONFIG_COMMON_CLKDEV=y | ||
225 | |||
226 | # | ||
227 | # Bus support | ||
228 | # | ||
229 | # CONFIG_PCI_SYSCALL is not set | ||
230 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
231 | # CONFIG_PCCARD is not set | ||
232 | |||
233 | # | ||
234 | # Kernel Features | ||
235 | # | ||
236 | CONFIG_TICK_ONESHOT=y | ||
237 | CONFIG_NO_HZ=y | ||
238 | CONFIG_HIGH_RES_TIMERS=y | ||
239 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
240 | CONFIG_VMSPLIT_3G=y | ||
241 | # CONFIG_VMSPLIT_2G is not set | ||
242 | # CONFIG_VMSPLIT_1G is not set | ||
243 | CONFIG_PAGE_OFFSET=0xC0000000 | ||
244 | CONFIG_PREEMPT=y | ||
245 | CONFIG_HZ=100 | ||
246 | CONFIG_AEABI=y | ||
247 | # CONFIG_OABI_COMPAT is not set | ||
248 | CONFIG_ARCH_FLATMEM_HAS_HOLES=y | ||
249 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | ||
250 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | ||
251 | # CONFIG_HIGHMEM is not set | ||
252 | CONFIG_SELECT_MEMORY_MODEL=y | ||
253 | CONFIG_FLATMEM_MANUAL=y | ||
254 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
255 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
256 | CONFIG_FLATMEM=y | ||
257 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
258 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
259 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | ||
260 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
261 | CONFIG_ZONE_DMA_FLAG=1 | ||
262 | CONFIG_BOUNCE=y | ||
263 | CONFIG_VIRT_TO_BUS=y | ||
264 | CONFIG_UNEVICTABLE_LRU=y | ||
265 | CONFIG_HAVE_MLOCK=y | ||
266 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
267 | CONFIG_LEDS=y | ||
268 | # CONFIG_LEDS_CPU is not set | ||
269 | CONFIG_ALIGNMENT_TRAP=y | ||
270 | |||
271 | # | ||
272 | # Boot options | ||
273 | # | ||
274 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
275 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
276 | CONFIG_CMDLINE="" | ||
277 | # CONFIG_XIP_KERNEL is not set | ||
278 | # CONFIG_KEXEC is not set | ||
279 | |||
280 | # | ||
281 | # CPU Power Management | ||
282 | # | ||
283 | # CONFIG_CPU_IDLE is not set | ||
284 | |||
285 | # | ||
286 | # Floating point emulation | ||
287 | # | ||
288 | |||
289 | # | ||
290 | # At least one emulation must be selected | ||
291 | # | ||
292 | # CONFIG_VFP is not set | ||
293 | |||
294 | # | ||
295 | # Userspace binary formats | ||
296 | # | ||
297 | CONFIG_BINFMT_ELF=y | ||
298 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
299 | CONFIG_HAVE_AOUT=y | ||
300 | # CONFIG_BINFMT_AOUT is not set | ||
301 | # CONFIG_BINFMT_MISC is not set | ||
302 | |||
303 | # | ||
304 | # Power management options | ||
305 | # | ||
306 | # CONFIG_PM is not set | ||
307 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
308 | CONFIG_NET=y | ||
309 | |||
310 | # | ||
311 | # Networking options | ||
312 | # | ||
313 | CONFIG_PACKET=y | ||
314 | # CONFIG_PACKET_MMAP is not set | ||
315 | CONFIG_UNIX=y | ||
316 | CONFIG_XFRM=y | ||
317 | # CONFIG_XFRM_USER is not set | ||
318 | # CONFIG_XFRM_SUB_POLICY is not set | ||
319 | # CONFIG_XFRM_MIGRATE is not set | ||
320 | # CONFIG_XFRM_STATISTICS is not set | ||
321 | # CONFIG_NET_KEY is not set | ||
322 | CONFIG_INET=y | ||
323 | # CONFIG_IP_MULTICAST is not set | ||
324 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
325 | CONFIG_IP_FIB_HASH=y | ||
326 | CONFIG_IP_PNP=y | ||
327 | CONFIG_IP_PNP_DHCP=y | ||
328 | # CONFIG_IP_PNP_BOOTP is not set | ||
329 | # CONFIG_IP_PNP_RARP is not set | ||
330 | # CONFIG_NET_IPIP is not set | ||
331 | # CONFIG_NET_IPGRE is not set | ||
332 | # CONFIG_ARPD is not set | ||
333 | # CONFIG_SYN_COOKIES is not set | ||
334 | # CONFIG_INET_AH is not set | ||
335 | # CONFIG_INET_ESP is not set | ||
336 | # CONFIG_INET_IPCOMP is not set | ||
337 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
338 | CONFIG_INET_TUNNEL=m | ||
339 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
340 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
341 | CONFIG_INET_XFRM_MODE_BEET=y | ||
342 | # CONFIG_INET_LRO is not set | ||
343 | CONFIG_INET_DIAG=y | ||
344 | CONFIG_INET_TCP_DIAG=y | ||
345 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
346 | CONFIG_TCP_CONG_CUBIC=y | ||
347 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
348 | # CONFIG_TCP_MD5SIG is not set | ||
349 | CONFIG_IPV6=m | ||
350 | # CONFIG_IPV6_PRIVACY is not set | ||
351 | # CONFIG_IPV6_ROUTER_PREF is not set | ||
352 | # CONFIG_IPV6_OPTIMISTIC_DAD is not set | ||
353 | # CONFIG_INET6_AH is not set | ||
354 | # CONFIG_INET6_ESP is not set | ||
355 | # CONFIG_INET6_IPCOMP is not set | ||
356 | # CONFIG_IPV6_MIP6 is not set | ||
357 | # CONFIG_INET6_XFRM_TUNNEL is not set | ||
358 | # CONFIG_INET6_TUNNEL is not set | ||
359 | CONFIG_INET6_XFRM_MODE_TRANSPORT=m | ||
360 | CONFIG_INET6_XFRM_MODE_TUNNEL=m | ||
361 | CONFIG_INET6_XFRM_MODE_BEET=m | ||
362 | # CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set | ||
363 | CONFIG_IPV6_SIT=m | ||
364 | CONFIG_IPV6_NDISC_NODETYPE=y | ||
365 | # CONFIG_IPV6_TUNNEL is not set | ||
366 | # CONFIG_IPV6_MULTIPLE_TABLES is not set | ||
367 | # CONFIG_IPV6_MROUTE is not set | ||
368 | # CONFIG_NETWORK_SECMARK is not set | ||
369 | CONFIG_NETFILTER=y | ||
370 | # CONFIG_NETFILTER_DEBUG is not set | ||
371 | CONFIG_NETFILTER_ADVANCED=y | ||
372 | |||
373 | # | ||
374 | # Core Netfilter Configuration | ||
375 | # | ||
376 | # CONFIG_NETFILTER_NETLINK_QUEUE is not set | ||
377 | # CONFIG_NETFILTER_NETLINK_LOG is not set | ||
378 | # CONFIG_NF_CONNTRACK is not set | ||
379 | # CONFIG_NETFILTER_XTABLES is not set | ||
380 | # CONFIG_IP_VS is not set | ||
381 | |||
382 | # | ||
383 | # IP: Netfilter Configuration | ||
384 | # | ||
385 | # CONFIG_NF_DEFRAG_IPV4 is not set | ||
386 | # CONFIG_IP_NF_QUEUE is not set | ||
387 | # CONFIG_IP_NF_IPTABLES is not set | ||
388 | # CONFIG_IP_NF_ARPTABLES is not set | ||
389 | |||
390 | # | ||
391 | # IPv6: Netfilter Configuration | ||
392 | # | ||
393 | # CONFIG_IP6_NF_QUEUE is not set | ||
394 | # CONFIG_IP6_NF_IPTABLES is not set | ||
395 | # CONFIG_IP_DCCP is not set | ||
396 | # CONFIG_IP_SCTP is not set | ||
397 | # CONFIG_TIPC is not set | ||
398 | # CONFIG_ATM is not set | ||
399 | # CONFIG_BRIDGE is not set | ||
400 | # CONFIG_NET_DSA is not set | ||
401 | # CONFIG_VLAN_8021Q is not set | ||
402 | # CONFIG_DECNET is not set | ||
403 | # CONFIG_LLC2 is not set | ||
404 | # CONFIG_IPX is not set | ||
405 | # CONFIG_ATALK is not set | ||
406 | # CONFIG_X25 is not set | ||
407 | # CONFIG_LAPB is not set | ||
408 | # CONFIG_ECONET is not set | ||
409 | # CONFIG_WAN_ROUTER is not set | ||
410 | # CONFIG_PHONET is not set | ||
411 | # CONFIG_NET_SCHED is not set | ||
412 | # CONFIG_DCB is not set | ||
413 | |||
414 | # | ||
415 | # Network testing | ||
416 | # | ||
417 | # CONFIG_NET_PKTGEN is not set | ||
418 | # CONFIG_HAMRADIO is not set | ||
419 | # CONFIG_CAN is not set | ||
420 | # CONFIG_IRDA is not set | ||
421 | # CONFIG_BT is not set | ||
422 | # CONFIG_AF_RXRPC is not set | ||
423 | # CONFIG_WIRELESS is not set | ||
424 | # CONFIG_WIMAX is not set | ||
425 | # CONFIG_RFKILL is not set | ||
426 | # CONFIG_NET_9P is not set | ||
427 | |||
428 | # | ||
429 | # Device Drivers | ||
430 | # | ||
431 | |||
432 | # | ||
433 | # Generic Driver Options | ||
434 | # | ||
435 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
436 | CONFIG_STANDALONE=y | ||
437 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
438 | # CONFIG_FW_LOADER is not set | ||
439 | # CONFIG_DEBUG_DRIVER is not set | ||
440 | # CONFIG_DEBUG_DEVRES is not set | ||
441 | # CONFIG_SYS_HYPERVISOR is not set | ||
442 | # CONFIG_CONNECTOR is not set | ||
443 | CONFIG_MTD=m | ||
444 | # CONFIG_MTD_DEBUG is not set | ||
445 | # CONFIG_MTD_CONCAT is not set | ||
446 | CONFIG_MTD_PARTITIONS=y | ||
447 | # CONFIG_MTD_TESTS is not set | ||
448 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
449 | # CONFIG_MTD_AFS_PARTS is not set | ||
450 | # CONFIG_MTD_AR7_PARTS is not set | ||
451 | |||
452 | # | ||
453 | # User Modules And Translation Layers | ||
454 | # | ||
455 | CONFIG_MTD_CHAR=m | ||
456 | CONFIG_MTD_BLKDEVS=m | ||
457 | CONFIG_MTD_BLOCK=m | ||
458 | # CONFIG_MTD_BLOCK_RO is not set | ||
459 | # CONFIG_FTL is not set | ||
460 | # CONFIG_NFTL is not set | ||
461 | # CONFIG_INFTL is not set | ||
462 | # CONFIG_RFD_FTL is not set | ||
463 | # CONFIG_SSFDC is not set | ||
464 | # CONFIG_MTD_OOPS is not set | ||
465 | |||
466 | # | ||
467 | # RAM/ROM/Flash chip drivers | ||
468 | # | ||
469 | CONFIG_MTD_CFI=m | ||
470 | # CONFIG_MTD_JEDECPROBE is not set | ||
471 | CONFIG_MTD_GEN_PROBE=m | ||
472 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | ||
473 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
474 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
475 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
476 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
477 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
478 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
479 | CONFIG_MTD_CFI_I1=y | ||
480 | CONFIG_MTD_CFI_I2=y | ||
481 | # CONFIG_MTD_CFI_I4 is not set | ||
482 | # CONFIG_MTD_CFI_I8 is not set | ||
483 | # CONFIG_MTD_CFI_INTELEXT is not set | ||
484 | CONFIG_MTD_CFI_AMDSTD=m | ||
485 | # CONFIG_MTD_CFI_STAA is not set | ||
486 | CONFIG_MTD_CFI_UTIL=m | ||
487 | # CONFIG_MTD_RAM is not set | ||
488 | # CONFIG_MTD_ROM is not set | ||
489 | # CONFIG_MTD_ABSENT is not set | ||
490 | |||
491 | # | ||
492 | # Mapping drivers for chip access | ||
493 | # | ||
494 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
495 | CONFIG_MTD_PHYSMAP=m | ||
496 | # CONFIG_MTD_PHYSMAP_COMPAT is not set | ||
497 | # CONFIG_MTD_ARM_INTEGRATOR is not set | ||
498 | # CONFIG_MTD_PLATRAM is not set | ||
499 | |||
500 | # | ||
501 | # Self-contained MTD device drivers | ||
502 | # | ||
503 | # CONFIG_MTD_SLRAM is not set | ||
504 | # CONFIG_MTD_PHRAM is not set | ||
505 | # CONFIG_MTD_MTDRAM is not set | ||
506 | # CONFIG_MTD_BLOCK2MTD is not set | ||
507 | |||
508 | # | ||
509 | # Disk-On-Chip Device Drivers | ||
510 | # | ||
511 | # CONFIG_MTD_DOC2000 is not set | ||
512 | # CONFIG_MTD_DOC2001 is not set | ||
513 | # CONFIG_MTD_DOC2001PLUS is not set | ||
514 | CONFIG_MTD_NAND=m | ||
515 | # CONFIG_MTD_NAND_VERIFY_WRITE is not set | ||
516 | # CONFIG_MTD_NAND_ECC_SMC is not set | ||
517 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set | ||
518 | # CONFIG_MTD_NAND_GPIO is not set | ||
519 | CONFIG_MTD_NAND_IDS=m | ||
520 | # CONFIG_MTD_NAND_DISKONCHIP is not set | ||
521 | # CONFIG_MTD_NAND_NANDSIM is not set | ||
522 | # CONFIG_MTD_NAND_PLATFORM is not set | ||
523 | # CONFIG_MTD_ALAUDA is not set | ||
524 | CONFIG_MTD_NAND_DAVINCI=m | ||
525 | # CONFIG_MTD_ONENAND is not set | ||
526 | |||
527 | # | ||
528 | # LPDDR flash memory drivers | ||
529 | # | ||
530 | # CONFIG_MTD_LPDDR is not set | ||
531 | |||
532 | # | ||
533 | # UBI - Unsorted block images | ||
534 | # | ||
535 | # CONFIG_MTD_UBI is not set | ||
536 | # CONFIG_PARPORT is not set | ||
537 | CONFIG_BLK_DEV=y | ||
538 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
539 | CONFIG_BLK_DEV_LOOP=m | ||
540 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
541 | # CONFIG_BLK_DEV_NBD is not set | ||
542 | # CONFIG_BLK_DEV_UB is not set | ||
543 | CONFIG_BLK_DEV_RAM=y | ||
544 | CONFIG_BLK_DEV_RAM_COUNT=1 | ||
545 | CONFIG_BLK_DEV_RAM_SIZE=32768 | ||
546 | # CONFIG_BLK_DEV_XIP is not set | ||
547 | # CONFIG_CDROM_PKTCDVD is not set | ||
548 | # CONFIG_ATA_OVER_ETH is not set | ||
549 | CONFIG_MISC_DEVICES=y | ||
550 | # CONFIG_ICS932S401 is not set | ||
551 | # CONFIG_ENCLOSURE_SERVICES is not set | ||
552 | # CONFIG_ISL29003 is not set | ||
553 | # CONFIG_C2PORT is not set | ||
554 | |||
555 | # | ||
556 | # EEPROM support | ||
557 | # | ||
558 | CONFIG_EEPROM_AT24=y | ||
559 | # CONFIG_EEPROM_LEGACY is not set | ||
560 | # CONFIG_EEPROM_93CX6 is not set | ||
561 | CONFIG_HAVE_IDE=y | ||
562 | CONFIG_IDE=m | ||
563 | |||
564 | # | ||
565 | # Please see Documentation/ide/ide.txt for help/info on IDE drives | ||
566 | # | ||
567 | CONFIG_IDE_XFER_MODE=y | ||
568 | CONFIG_IDE_TIMINGS=y | ||
569 | # CONFIG_BLK_DEV_IDE_SATA is not set | ||
570 | CONFIG_IDE_GD=m | ||
571 | CONFIG_IDE_GD_ATA=y | ||
572 | # CONFIG_IDE_GD_ATAPI is not set | ||
573 | # CONFIG_BLK_DEV_IDECD is not set | ||
574 | # CONFIG_BLK_DEV_IDETAPE is not set | ||
575 | # CONFIG_IDE_TASK_IOCTL is not set | ||
576 | CONFIG_IDE_PROC_FS=y | ||
577 | |||
578 | # | ||
579 | # IDE chipset support/bugfixes | ||
580 | # | ||
581 | # CONFIG_BLK_DEV_PLATFORM is not set | ||
582 | CONFIG_BLK_DEV_IDEDMA_SFF=y | ||
583 | CONFIG_BLK_DEV_PALMCHIP_BK3710=m | ||
584 | CONFIG_BLK_DEV_IDEDMA=y | ||
585 | |||
586 | # | ||
587 | # SCSI device support | ||
588 | # | ||
589 | # CONFIG_RAID_ATTRS is not set | ||
590 | CONFIG_SCSI=m | ||
591 | CONFIG_SCSI_DMA=y | ||
592 | # CONFIG_SCSI_TGT is not set | ||
593 | # CONFIG_SCSI_NETLINK is not set | ||
594 | CONFIG_SCSI_PROC_FS=y | ||
595 | |||
596 | # | ||
597 | # SCSI support type (disk, tape, CD-ROM) | ||
598 | # | ||
599 | CONFIG_BLK_DEV_SD=m | ||
600 | # CONFIG_CHR_DEV_ST is not set | ||
601 | # CONFIG_CHR_DEV_OSST is not set | ||
602 | # CONFIG_BLK_DEV_SR is not set | ||
603 | # CONFIG_CHR_DEV_SG is not set | ||
604 | # CONFIG_CHR_DEV_SCH is not set | ||
605 | |||
606 | # | ||
607 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
608 | # | ||
609 | # CONFIG_SCSI_MULTI_LUN is not set | ||
610 | # CONFIG_SCSI_CONSTANTS is not set | ||
611 | # CONFIG_SCSI_LOGGING is not set | ||
612 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
613 | CONFIG_SCSI_WAIT_SCAN=m | ||
614 | |||
615 | # | ||
616 | # SCSI Transports | ||
617 | # | ||
618 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
619 | # CONFIG_SCSI_FC_ATTRS is not set | ||
620 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
621 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
622 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
623 | CONFIG_SCSI_LOWLEVEL=y | ||
624 | # CONFIG_ISCSI_TCP is not set | ||
625 | # CONFIG_LIBFC is not set | ||
626 | # CONFIG_LIBFCOE is not set | ||
627 | # CONFIG_SCSI_DEBUG is not set | ||
628 | # CONFIG_SCSI_DH is not set | ||
629 | # CONFIG_SCSI_OSD_INITIATOR is not set | ||
630 | # CONFIG_ATA is not set | ||
631 | # CONFIG_MD is not set | ||
632 | CONFIG_NETDEVICES=y | ||
633 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
634 | # CONFIG_DUMMY is not set | ||
635 | # CONFIG_BONDING is not set | ||
636 | # CONFIG_MACVLAN is not set | ||
637 | # CONFIG_EQUALIZER is not set | ||
638 | CONFIG_TUN=m | ||
639 | # CONFIG_VETH is not set | ||
640 | CONFIG_PHYLIB=y | ||
641 | |||
642 | # | ||
643 | # MII PHY device drivers | ||
644 | # | ||
645 | # CONFIG_MARVELL_PHY is not set | ||
646 | # CONFIG_DAVICOM_PHY is not set | ||
647 | # CONFIG_QSEMI_PHY is not set | ||
648 | CONFIG_LXT_PHY=y | ||
649 | # CONFIG_CICADA_PHY is not set | ||
650 | # CONFIG_VITESSE_PHY is not set | ||
651 | # CONFIG_SMSC_PHY is not set | ||
652 | # CONFIG_BROADCOM_PHY is not set | ||
653 | # CONFIG_ICPLUS_PHY is not set | ||
654 | # CONFIG_REALTEK_PHY is not set | ||
655 | # CONFIG_NATIONAL_PHY is not set | ||
656 | # CONFIG_STE10XP is not set | ||
657 | CONFIG_LSI_ET1011C_PHY=y | ||
658 | # CONFIG_FIXED_PHY is not set | ||
659 | # CONFIG_MDIO_BITBANG is not set | ||
660 | CONFIG_NET_ETHERNET=y | ||
661 | CONFIG_MII=y | ||
662 | # CONFIG_AX88796 is not set | ||
663 | # CONFIG_SMC91X is not set | ||
664 | # CONFIG_DM9000 is not set | ||
665 | # CONFIG_ETHOC is not set | ||
666 | # CONFIG_SMC911X is not set | ||
667 | # CONFIG_SMSC911X is not set | ||
668 | # CONFIG_DNET is not set | ||
669 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
670 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
671 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
672 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
673 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
674 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
675 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
676 | # CONFIG_B44 is not set | ||
677 | # CONFIG_NETDEV_1000 is not set | ||
678 | # CONFIG_NETDEV_10000 is not set | ||
679 | |||
680 | # | ||
681 | # Wireless LAN | ||
682 | # | ||
683 | # CONFIG_WLAN_PRE80211 is not set | ||
684 | # CONFIG_WLAN_80211 is not set | ||
685 | |||
686 | # | ||
687 | # Enable WiMAX (Networking options) to see the WiMAX drivers | ||
688 | # | ||
689 | |||
690 | # | ||
691 | # USB Network Adapters | ||
692 | # | ||
693 | # CONFIG_USB_CATC is not set | ||
694 | # CONFIG_USB_KAWETH is not set | ||
695 | # CONFIG_USB_PEGASUS is not set | ||
696 | # CONFIG_USB_RTL8150 is not set | ||
697 | # CONFIG_USB_USBNET is not set | ||
698 | # CONFIG_WAN is not set | ||
699 | CONFIG_PPP=m | ||
700 | # CONFIG_PPP_MULTILINK is not set | ||
701 | # CONFIG_PPP_FILTER is not set | ||
702 | CONFIG_PPP_ASYNC=m | ||
703 | CONFIG_PPP_SYNC_TTY=m | ||
704 | CONFIG_PPP_DEFLATE=m | ||
705 | # CONFIG_PPP_BSDCOMP is not set | ||
706 | # CONFIG_PPP_MPPE is not set | ||
707 | # CONFIG_PPPOE is not set | ||
708 | # CONFIG_PPPOL2TP is not set | ||
709 | # CONFIG_SLIP is not set | ||
710 | CONFIG_SLHC=m | ||
711 | CONFIG_NETCONSOLE=y | ||
712 | # CONFIG_NETCONSOLE_DYNAMIC is not set | ||
713 | CONFIG_NETPOLL=y | ||
714 | CONFIG_NETPOLL_TRAP=y | ||
715 | CONFIG_NET_POLL_CONTROLLER=y | ||
716 | # CONFIG_ISDN is not set | ||
717 | |||
718 | # | ||
719 | # Input device support | ||
720 | # | ||
721 | CONFIG_INPUT=y | ||
722 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
723 | # CONFIG_INPUT_POLLDEV is not set | ||
724 | |||
725 | # | ||
726 | # Userland interfaces | ||
727 | # | ||
728 | CONFIG_INPUT_MOUSEDEV=m | ||
729 | CONFIG_INPUT_MOUSEDEV_PSAUX=y | ||
730 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
731 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
732 | # CONFIG_INPUT_JOYDEV is not set | ||
733 | CONFIG_INPUT_EVDEV=m | ||
734 | CONFIG_INPUT_EVBUG=m | ||
735 | |||
736 | # | ||
737 | # Input Device Drivers | ||
738 | # | ||
739 | CONFIG_INPUT_KEYBOARD=y | ||
740 | CONFIG_KEYBOARD_ATKBD=m | ||
741 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
742 | # CONFIG_KEYBOARD_LKKBD is not set | ||
743 | CONFIG_KEYBOARD_XTKBD=m | ||
744 | # CONFIG_KEYBOARD_NEWTON is not set | ||
745 | # CONFIG_KEYBOARD_STOWAWAY is not set | ||
746 | CONFIG_KEYBOARD_GPIO=y | ||
747 | # CONFIG_INPUT_MOUSE is not set | ||
748 | # CONFIG_INPUT_JOYSTICK is not set | ||
749 | # CONFIG_INPUT_TABLET is not set | ||
750 | CONFIG_INPUT_TOUCHSCREEN=y | ||
751 | # CONFIG_TOUCHSCREEN_AD7879_I2C is not set | ||
752 | # CONFIG_TOUCHSCREEN_AD7879 is not set | ||
753 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | ||
754 | # CONFIG_TOUCHSCREEN_GUNZE is not set | ||
755 | # CONFIG_TOUCHSCREEN_ELO is not set | ||
756 | # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set | ||
757 | # CONFIG_TOUCHSCREEN_MTOUCH is not set | ||
758 | # CONFIG_TOUCHSCREEN_INEXIO is not set | ||
759 | # CONFIG_TOUCHSCREEN_MK712 is not set | ||
760 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set | ||
761 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | ||
762 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set | ||
763 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | ||
764 | # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set | ||
765 | # CONFIG_TOUCHSCREEN_TSC2007 is not set | ||
766 | # CONFIG_INPUT_MISC is not set | ||
767 | |||
768 | # | ||
769 | # Hardware I/O ports | ||
770 | # | ||
771 | CONFIG_SERIO=y | ||
772 | CONFIG_SERIO_SERPORT=y | ||
773 | CONFIG_SERIO_LIBPS2=y | ||
774 | # CONFIG_SERIO_RAW is not set | ||
775 | # CONFIG_GAMEPORT is not set | ||
776 | |||
777 | # | ||
778 | # Character devices | ||
779 | # | ||
780 | CONFIG_VT=y | ||
781 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
782 | # CONFIG_VT_CONSOLE is not set | ||
783 | CONFIG_HW_CONSOLE=y | ||
784 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
785 | CONFIG_DEVKMEM=y | ||
786 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
787 | |||
788 | # | ||
789 | # Serial drivers | ||
790 | # | ||
791 | CONFIG_SERIAL_8250=y | ||
792 | CONFIG_SERIAL_8250_CONSOLE=y | ||
793 | CONFIG_SERIAL_8250_NR_UARTS=3 | ||
794 | CONFIG_SERIAL_8250_RUNTIME_UARTS=3 | ||
795 | # CONFIG_SERIAL_8250_EXTENDED is not set | ||
796 | |||
797 | # | ||
798 | # Non-8250 serial port support | ||
799 | # | ||
800 | CONFIG_SERIAL_CORE=y | ||
801 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
802 | CONFIG_UNIX98_PTYS=y | ||
803 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
804 | CONFIG_LEGACY_PTYS=y | ||
805 | CONFIG_LEGACY_PTY_COUNT=256 | ||
806 | # CONFIG_IPMI_HANDLER is not set | ||
807 | CONFIG_HW_RANDOM=m | ||
808 | # CONFIG_HW_RANDOM_TIMERIOMEM is not set | ||
809 | # CONFIG_R3964 is not set | ||
810 | # CONFIG_RAW_DRIVER is not set | ||
811 | # CONFIG_TCG_TPM is not set | ||
812 | CONFIG_I2C=y | ||
813 | CONFIG_I2C_BOARDINFO=y | ||
814 | CONFIG_I2C_CHARDEV=y | ||
815 | CONFIG_I2C_HELPER_AUTO=y | ||
816 | |||
817 | # | ||
818 | # I2C Hardware Bus support | ||
819 | # | ||
820 | |||
821 | # | ||
822 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
823 | # | ||
824 | CONFIG_I2C_DAVINCI=y | ||
825 | # CONFIG_I2C_GPIO is not set | ||
826 | # CONFIG_I2C_OCORES is not set | ||
827 | # CONFIG_I2C_SIMTEC is not set | ||
828 | |||
829 | # | ||
830 | # External I2C/SMBus adapter drivers | ||
831 | # | ||
832 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
833 | # CONFIG_I2C_TAOS_EVM is not set | ||
834 | # CONFIG_I2C_TINY_USB is not set | ||
835 | |||
836 | # | ||
837 | # Other I2C/SMBus bus drivers | ||
838 | # | ||
839 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
840 | # CONFIG_I2C_STUB is not set | ||
841 | |||
842 | # | ||
843 | # Miscellaneous I2C Chip support | ||
844 | # | ||
845 | # CONFIG_DS1682 is not set | ||
846 | # CONFIG_SENSORS_PCA9539 is not set | ||
847 | # CONFIG_SENSORS_MAX6875 is not set | ||
848 | # CONFIG_SENSORS_TSL2550 is not set | ||
849 | # CONFIG_I2C_DEBUG_CORE is not set | ||
850 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
851 | # CONFIG_I2C_DEBUG_BUS is not set | ||
852 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
853 | # CONFIG_SPI is not set | ||
854 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
855 | CONFIG_GPIOLIB=y | ||
856 | # CONFIG_DEBUG_GPIO is not set | ||
857 | # CONFIG_GPIO_SYSFS is not set | ||
858 | |||
859 | # | ||
860 | # Memory mapped GPIO expanders: | ||
861 | # | ||
862 | |||
863 | # | ||
864 | # I2C GPIO expanders: | ||
865 | # | ||
866 | # CONFIG_GPIO_MAX732X is not set | ||
867 | # CONFIG_GPIO_PCA953X is not set | ||
868 | CONFIG_GPIO_PCF857X=m | ||
869 | |||
870 | # | ||
871 | # PCI GPIO expanders: | ||
872 | # | ||
873 | |||
874 | # | ||
875 | # SPI GPIO expanders: | ||
876 | # | ||
877 | # CONFIG_W1 is not set | ||
878 | # CONFIG_POWER_SUPPLY is not set | ||
879 | CONFIG_HWMON=y | ||
880 | # CONFIG_HWMON_VID is not set | ||
881 | # CONFIG_SENSORS_AD7414 is not set | ||
882 | # CONFIG_SENSORS_AD7418 is not set | ||
883 | # CONFIG_SENSORS_ADM1021 is not set | ||
884 | # CONFIG_SENSORS_ADM1025 is not set | ||
885 | # CONFIG_SENSORS_ADM1026 is not set | ||
886 | # CONFIG_SENSORS_ADM1029 is not set | ||
887 | # CONFIG_SENSORS_ADM1031 is not set | ||
888 | # CONFIG_SENSORS_ADM9240 is not set | ||
889 | # CONFIG_SENSORS_ADT7462 is not set | ||
890 | # CONFIG_SENSORS_ADT7470 is not set | ||
891 | # CONFIG_SENSORS_ADT7473 is not set | ||
892 | # CONFIG_SENSORS_ADT7475 is not set | ||
893 | # CONFIG_SENSORS_ATXP1 is not set | ||
894 | # CONFIG_SENSORS_DS1621 is not set | ||
895 | # CONFIG_SENSORS_F71805F is not set | ||
896 | # CONFIG_SENSORS_F71882FG is not set | ||
897 | # CONFIG_SENSORS_F75375S is not set | ||
898 | # CONFIG_SENSORS_G760A is not set | ||
899 | # CONFIG_SENSORS_GL518SM is not set | ||
900 | # CONFIG_SENSORS_GL520SM is not set | ||
901 | # CONFIG_SENSORS_IT87 is not set | ||
902 | # CONFIG_SENSORS_LM63 is not set | ||
903 | # CONFIG_SENSORS_LM75 is not set | ||
904 | # CONFIG_SENSORS_LM77 is not set | ||
905 | # CONFIG_SENSORS_LM78 is not set | ||
906 | # CONFIG_SENSORS_LM80 is not set | ||
907 | # CONFIG_SENSORS_LM83 is not set | ||
908 | # CONFIG_SENSORS_LM85 is not set | ||
909 | # CONFIG_SENSORS_LM87 is not set | ||
910 | # CONFIG_SENSORS_LM90 is not set | ||
911 | # CONFIG_SENSORS_LM92 is not set | ||
912 | # CONFIG_SENSORS_LM93 is not set | ||
913 | # CONFIG_SENSORS_LTC4215 is not set | ||
914 | # CONFIG_SENSORS_LTC4245 is not set | ||
915 | # CONFIG_SENSORS_LM95241 is not set | ||
916 | # CONFIG_SENSORS_MAX1619 is not set | ||
917 | # CONFIG_SENSORS_MAX6650 is not set | ||
918 | # CONFIG_SENSORS_PC87360 is not set | ||
919 | # CONFIG_SENSORS_PC87427 is not set | ||
920 | # CONFIG_SENSORS_PCF8591 is not set | ||
921 | # CONFIG_SENSORS_SHT15 is not set | ||
922 | # CONFIG_SENSORS_DME1737 is not set | ||
923 | # CONFIG_SENSORS_SMSC47M1 is not set | ||
924 | # CONFIG_SENSORS_SMSC47M192 is not set | ||
925 | # CONFIG_SENSORS_SMSC47B397 is not set | ||
926 | # CONFIG_SENSORS_ADS7828 is not set | ||
927 | # CONFIG_SENSORS_THMC50 is not set | ||
928 | # CONFIG_SENSORS_VT1211 is not set | ||
929 | # CONFIG_SENSORS_W83781D is not set | ||
930 | # CONFIG_SENSORS_W83791D is not set | ||
931 | # CONFIG_SENSORS_W83792D is not set | ||
932 | # CONFIG_SENSORS_W83793 is not set | ||
933 | # CONFIG_SENSORS_W83L785TS is not set | ||
934 | # CONFIG_SENSORS_W83L786NG is not set | ||
935 | # CONFIG_SENSORS_W83627HF is not set | ||
936 | # CONFIG_SENSORS_W83627EHF is not set | ||
937 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
938 | # CONFIG_THERMAL is not set | ||
939 | # CONFIG_THERMAL_HWMON is not set | ||
940 | CONFIG_WATCHDOG=y | ||
941 | # CONFIG_WATCHDOG_NOWAYOUT is not set | ||
942 | |||
943 | # | ||
944 | # Watchdog Device Drivers | ||
945 | # | ||
946 | # CONFIG_SOFT_WATCHDOG is not set | ||
947 | CONFIG_DAVINCI_WATCHDOG=m | ||
948 | |||
949 | # | ||
950 | # USB-based Watchdog Cards | ||
951 | # | ||
952 | # CONFIG_USBPCWATCHDOG is not set | ||
953 | CONFIG_SSB_POSSIBLE=y | ||
954 | |||
955 | # | ||
956 | # Sonics Silicon Backplane | ||
957 | # | ||
958 | # CONFIG_SSB is not set | ||
959 | |||
960 | # | ||
961 | # Multifunction device drivers | ||
962 | # | ||
963 | # CONFIG_MFD_CORE is not set | ||
964 | # CONFIG_MFD_SM501 is not set | ||
965 | # CONFIG_MFD_ASIC3 is not set | ||
966 | # CONFIG_HTC_EGPIO is not set | ||
967 | # CONFIG_HTC_PASIC3 is not set | ||
968 | # CONFIG_TPS65010 is not set | ||
969 | # CONFIG_TWL4030_CORE is not set | ||
970 | # CONFIG_MFD_TMIO is not set | ||
971 | # CONFIG_MFD_T7L66XB is not set | ||
972 | # CONFIG_MFD_TC6387XB is not set | ||
973 | # CONFIG_MFD_TC6393XB is not set | ||
974 | # CONFIG_PMIC_DA903X is not set | ||
975 | # CONFIG_MFD_WM8400 is not set | ||
976 | # CONFIG_MFD_WM8350_I2C is not set | ||
977 | # CONFIG_MFD_PCF50633 is not set | ||
978 | |||
979 | # | ||
980 | # Multimedia devices | ||
981 | # | ||
982 | |||
983 | # | ||
984 | # Multimedia core support | ||
985 | # | ||
986 | CONFIG_VIDEO_DEV=y | ||
987 | CONFIG_VIDEO_V4L2_COMMON=y | ||
988 | CONFIG_VIDEO_ALLOW_V4L1=y | ||
989 | CONFIG_VIDEO_V4L1_COMPAT=y | ||
990 | # CONFIG_DVB_CORE is not set | ||
991 | CONFIG_VIDEO_MEDIA=y | ||
992 | |||
993 | # | ||
994 | # Multimedia drivers | ||
995 | # | ||
996 | # CONFIG_MEDIA_ATTACH is not set | ||
997 | CONFIG_MEDIA_TUNER=y | ||
998 | # CONFIG_MEDIA_TUNER_CUSTOMISE is not set | ||
999 | CONFIG_MEDIA_TUNER_SIMPLE=y | ||
1000 | CONFIG_MEDIA_TUNER_TDA8290=y | ||
1001 | CONFIG_MEDIA_TUNER_TDA9887=y | ||
1002 | CONFIG_MEDIA_TUNER_TEA5761=y | ||
1003 | CONFIG_MEDIA_TUNER_TEA5767=y | ||
1004 | CONFIG_MEDIA_TUNER_MT20XX=y | ||
1005 | CONFIG_MEDIA_TUNER_XC2028=y | ||
1006 | CONFIG_MEDIA_TUNER_XC5000=y | ||
1007 | CONFIG_MEDIA_TUNER_MC44S803=y | ||
1008 | CONFIG_VIDEO_V4L2=y | ||
1009 | CONFIG_VIDEO_V4L1=y | ||
1010 | CONFIG_VIDEO_CAPTURE_DRIVERS=y | ||
1011 | # CONFIG_VIDEO_ADV_DEBUG is not set | ||
1012 | # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set | ||
1013 | CONFIG_VIDEO_HELPER_CHIPS_AUTO=y | ||
1014 | # CONFIG_VIDEO_VIVI is not set | ||
1015 | # CONFIG_VIDEO_CPIA is not set | ||
1016 | # CONFIG_VIDEO_CPIA2 is not set | ||
1017 | # CONFIG_VIDEO_SAA5246A is not set | ||
1018 | # CONFIG_VIDEO_SAA5249 is not set | ||
1019 | # CONFIG_SOC_CAMERA is not set | ||
1020 | # CONFIG_V4L_USB_DRIVERS is not set | ||
1021 | # CONFIG_RADIO_ADAPTERS is not set | ||
1022 | CONFIG_DAB=y | ||
1023 | # CONFIG_USB_DABUSB is not set | ||
1024 | |||
1025 | # | ||
1026 | # Graphics support | ||
1027 | # | ||
1028 | # CONFIG_VGASTATE is not set | ||
1029 | CONFIG_VIDEO_OUTPUT_CONTROL=m | ||
1030 | CONFIG_FB=y | ||
1031 | CONFIG_FIRMWARE_EDID=y | ||
1032 | # CONFIG_FB_DDC is not set | ||
1033 | # CONFIG_FB_BOOT_VESA_SUPPORT is not set | ||
1034 | # CONFIG_FB_CFB_FILLRECT is not set | ||
1035 | # CONFIG_FB_CFB_COPYAREA is not set | ||
1036 | # CONFIG_FB_CFB_IMAGEBLIT is not set | ||
1037 | # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | ||
1038 | # CONFIG_FB_SYS_FILLRECT is not set | ||
1039 | # CONFIG_FB_SYS_COPYAREA is not set | ||
1040 | # CONFIG_FB_SYS_IMAGEBLIT is not set | ||
1041 | # CONFIG_FB_FOREIGN_ENDIAN is not set | ||
1042 | # CONFIG_FB_SYS_FOPS is not set | ||
1043 | # CONFIG_FB_SVGALIB is not set | ||
1044 | # CONFIG_FB_MACMODES is not set | ||
1045 | # CONFIG_FB_BACKLIGHT is not set | ||
1046 | # CONFIG_FB_MODE_HELPERS is not set | ||
1047 | # CONFIG_FB_TILEBLITTING is not set | ||
1048 | |||
1049 | # | ||
1050 | # Frame buffer hardware drivers | ||
1051 | # | ||
1052 | # CONFIG_FB_S1D13XXX is not set | ||
1053 | # CONFIG_FB_VIRTUAL is not set | ||
1054 | # CONFIG_FB_METRONOME is not set | ||
1055 | # CONFIG_FB_MB862XX is not set | ||
1056 | # CONFIG_FB_BROADSHEET is not set | ||
1057 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
1058 | |||
1059 | # | ||
1060 | # Display device support | ||
1061 | # | ||
1062 | # CONFIG_DISPLAY_SUPPORT is not set | ||
1063 | |||
1064 | # | ||
1065 | # Console display driver support | ||
1066 | # | ||
1067 | # CONFIG_VGA_CONSOLE is not set | ||
1068 | CONFIG_DUMMY_CONSOLE=y | ||
1069 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
1070 | # CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set | ||
1071 | # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | ||
1072 | # CONFIG_FONTS is not set | ||
1073 | CONFIG_FONT_8x8=y | ||
1074 | CONFIG_FONT_8x16=y | ||
1075 | CONFIG_LOGO=y | ||
1076 | CONFIG_LOGO_LINUX_MONO=y | ||
1077 | CONFIG_LOGO_LINUX_VGA16=y | ||
1078 | CONFIG_LOGO_LINUX_CLUT224=y | ||
1079 | CONFIG_SOUND=m | ||
1080 | # CONFIG_SOUND_OSS_CORE is not set | ||
1081 | CONFIG_SND=m | ||
1082 | CONFIG_SND_TIMER=m | ||
1083 | CONFIG_SND_PCM=m | ||
1084 | CONFIG_SND_JACK=y | ||
1085 | # CONFIG_SND_SEQUENCER is not set | ||
1086 | # CONFIG_SND_MIXER_OSS is not set | ||
1087 | # CONFIG_SND_PCM_OSS is not set | ||
1088 | # CONFIG_SND_HRTIMER is not set | ||
1089 | # CONFIG_SND_DYNAMIC_MINORS is not set | ||
1090 | CONFIG_SND_SUPPORT_OLD_API=y | ||
1091 | CONFIG_SND_VERBOSE_PROCFS=y | ||
1092 | # CONFIG_SND_VERBOSE_PRINTK is not set | ||
1093 | # CONFIG_SND_DEBUG is not set | ||
1094 | CONFIG_SND_DRIVERS=y | ||
1095 | # CONFIG_SND_DUMMY is not set | ||
1096 | # CONFIG_SND_MTPAV is not set | ||
1097 | # CONFIG_SND_SERIAL_U16550 is not set | ||
1098 | # CONFIG_SND_MPU401 is not set | ||
1099 | CONFIG_SND_ARM=y | ||
1100 | CONFIG_SND_USB=y | ||
1101 | # CONFIG_SND_USB_AUDIO is not set | ||
1102 | # CONFIG_SND_USB_CAIAQ is not set | ||
1103 | CONFIG_SND_SOC=m | ||
1104 | # CONFIG_SND_DAVINCI_SOC is not set | ||
1105 | CONFIG_SND_SOC_I2C_AND_SPI=m | ||
1106 | # CONFIG_SND_SOC_ALL_CODECS is not set | ||
1107 | # CONFIG_SOUND_PRIME is not set | ||
1108 | CONFIG_HID_SUPPORT=y | ||
1109 | CONFIG_HID=m | ||
1110 | # CONFIG_HID_DEBUG is not set | ||
1111 | # CONFIG_HIDRAW is not set | ||
1112 | |||
1113 | # | ||
1114 | # USB Input Devices | ||
1115 | # | ||
1116 | CONFIG_USB_HID=m | ||
1117 | # CONFIG_HID_PID is not set | ||
1118 | # CONFIG_USB_HIDDEV is not set | ||
1119 | |||
1120 | # | ||
1121 | # USB HID Boot Protocol drivers | ||
1122 | # | ||
1123 | # CONFIG_USB_KBD is not set | ||
1124 | # CONFIG_USB_MOUSE is not set | ||
1125 | |||
1126 | # | ||
1127 | # Special HID drivers | ||
1128 | # | ||
1129 | CONFIG_HID_A4TECH=m | ||
1130 | CONFIG_HID_APPLE=m | ||
1131 | CONFIG_HID_BELKIN=m | ||
1132 | CONFIG_HID_CHERRY=m | ||
1133 | CONFIG_HID_CHICONY=m | ||
1134 | CONFIG_HID_CYPRESS=m | ||
1135 | # CONFIG_DRAGONRISE_FF is not set | ||
1136 | CONFIG_HID_EZKEY=m | ||
1137 | # CONFIG_HID_KYE is not set | ||
1138 | CONFIG_HID_GYRATION=m | ||
1139 | # CONFIG_HID_KENSINGTON is not set | ||
1140 | CONFIG_HID_LOGITECH=m | ||
1141 | # CONFIG_LOGITECH_FF is not set | ||
1142 | # CONFIG_LOGIRUMBLEPAD2_FF is not set | ||
1143 | CONFIG_HID_MICROSOFT=m | ||
1144 | CONFIG_HID_MONTEREY=m | ||
1145 | # CONFIG_HID_NTRIG is not set | ||
1146 | CONFIG_HID_PANTHERLORD=m | ||
1147 | # CONFIG_PANTHERLORD_FF is not set | ||
1148 | CONFIG_HID_PETALYNX=m | ||
1149 | CONFIG_HID_SAMSUNG=m | ||
1150 | CONFIG_HID_SONY=m | ||
1151 | CONFIG_HID_SUNPLUS=m | ||
1152 | # CONFIG_GREENASIA_FF is not set | ||
1153 | # CONFIG_HID_TOPSEED is not set | ||
1154 | # CONFIG_THRUSTMASTER_FF is not set | ||
1155 | # CONFIG_ZEROPLUS_FF is not set | ||
1156 | CONFIG_USB_SUPPORT=y | ||
1157 | CONFIG_USB_ARCH_HAS_HCD=y | ||
1158 | # CONFIG_USB_ARCH_HAS_OHCI is not set | ||
1159 | # CONFIG_USB_ARCH_HAS_EHCI is not set | ||
1160 | CONFIG_USB=m | ||
1161 | # CONFIG_USB_DEBUG is not set | ||
1162 | # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set | ||
1163 | |||
1164 | # | ||
1165 | # Miscellaneous USB options | ||
1166 | # | ||
1167 | CONFIG_USB_DEVICEFS=y | ||
1168 | CONFIG_USB_DEVICE_CLASS=y | ||
1169 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
1170 | # CONFIG_USB_OTG is not set | ||
1171 | # CONFIG_USB_OTG_WHITELIST is not set | ||
1172 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
1173 | CONFIG_USB_MON=m | ||
1174 | # CONFIG_USB_WUSB is not set | ||
1175 | # CONFIG_USB_WUSB_CBAF is not set | ||
1176 | |||
1177 | # | ||
1178 | # USB Host Controller Drivers | ||
1179 | # | ||
1180 | # CONFIG_USB_C67X00_HCD is not set | ||
1181 | # CONFIG_USB_OXU210HP_HCD is not set | ||
1182 | # CONFIG_USB_ISP116X_HCD is not set | ||
1183 | # CONFIG_USB_ISP1760_HCD is not set | ||
1184 | # CONFIG_USB_SL811_HCD is not set | ||
1185 | # CONFIG_USB_R8A66597_HCD is not set | ||
1186 | # CONFIG_USB_HWA_HCD is not set | ||
1187 | CONFIG_USB_MUSB_HDRC=m | ||
1188 | CONFIG_USB_MUSB_SOC=y | ||
1189 | |||
1190 | # | ||
1191 | # DaVinci 35x and 644x USB support | ||
1192 | # | ||
1193 | # CONFIG_USB_MUSB_HOST is not set | ||
1194 | CONFIG_USB_MUSB_PERIPHERAL=y | ||
1195 | # CONFIG_USB_MUSB_OTG is not set | ||
1196 | CONFIG_USB_GADGET_MUSB_HDRC=y | ||
1197 | CONFIG_MUSB_PIO_ONLY=y | ||
1198 | # CONFIG_USB_MUSB_DEBUG is not set | ||
1199 | |||
1200 | # | ||
1201 | # USB Device Class drivers | ||
1202 | # | ||
1203 | # CONFIG_USB_ACM is not set | ||
1204 | # CONFIG_USB_PRINTER is not set | ||
1205 | # CONFIG_USB_WDM is not set | ||
1206 | # CONFIG_USB_TMC is not set | ||
1207 | |||
1208 | # | ||
1209 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may | ||
1210 | # | ||
1211 | |||
1212 | # | ||
1213 | # also be needed; see USB_STORAGE Help for more info | ||
1214 | # | ||
1215 | CONFIG_USB_STORAGE=m | ||
1216 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
1217 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
1218 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
1219 | # CONFIG_USB_STORAGE_ISD200 is not set | ||
1220 | # CONFIG_USB_STORAGE_USBAT is not set | ||
1221 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
1222 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
1223 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
1224 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
1225 | # CONFIG_USB_STORAGE_ONETOUCH is not set | ||
1226 | # CONFIG_USB_STORAGE_KARMA is not set | ||
1227 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | ||
1228 | # CONFIG_USB_LIBUSUAL is not set | ||
1229 | |||
1230 | # | ||
1231 | # USB Imaging devices | ||
1232 | # | ||
1233 | # CONFIG_USB_MDC800 is not set | ||
1234 | # CONFIG_USB_MICROTEK is not set | ||
1235 | |||
1236 | # | ||
1237 | # USB port drivers | ||
1238 | # | ||
1239 | # CONFIG_USB_SERIAL is not set | ||
1240 | |||
1241 | # | ||
1242 | # USB Miscellaneous drivers | ||
1243 | # | ||
1244 | # CONFIG_USB_EMI62 is not set | ||
1245 | # CONFIG_USB_EMI26 is not set | ||
1246 | # CONFIG_USB_ADUTUX is not set | ||
1247 | # CONFIG_USB_SEVSEG is not set | ||
1248 | # CONFIG_USB_RIO500 is not set | ||
1249 | # CONFIG_USB_LEGOTOWER is not set | ||
1250 | # CONFIG_USB_LCD is not set | ||
1251 | # CONFIG_USB_BERRY_CHARGE is not set | ||
1252 | # CONFIG_USB_LED is not set | ||
1253 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
1254 | # CONFIG_USB_CYTHERM is not set | ||
1255 | # CONFIG_USB_IDMOUSE is not set | ||
1256 | # CONFIG_USB_FTDI_ELAN is not set | ||
1257 | # CONFIG_USB_APPLEDISPLAY is not set | ||
1258 | # CONFIG_USB_LD is not set | ||
1259 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
1260 | # CONFIG_USB_IOWARRIOR is not set | ||
1261 | CONFIG_USB_TEST=m | ||
1262 | # CONFIG_USB_ISIGHTFW is not set | ||
1263 | # CONFIG_USB_VST is not set | ||
1264 | CONFIG_USB_GADGET=m | ||
1265 | # CONFIG_USB_GADGET_DEBUG is not set | ||
1266 | CONFIG_USB_GADGET_DEBUG_FILES=y | ||
1267 | CONFIG_USB_GADGET_DEBUG_FS=y | ||
1268 | CONFIG_USB_GADGET_VBUS_DRAW=2 | ||
1269 | CONFIG_USB_GADGET_SELECTED=y | ||
1270 | # CONFIG_USB_GADGET_AT91 is not set | ||
1271 | # CONFIG_USB_GADGET_ATMEL_USBA is not set | ||
1272 | # CONFIG_USB_GADGET_FSL_USB2 is not set | ||
1273 | # CONFIG_USB_GADGET_LH7A40X is not set | ||
1274 | # CONFIG_USB_GADGET_OMAP is not set | ||
1275 | # CONFIG_USB_GADGET_PXA25X is not set | ||
1276 | # CONFIG_USB_GADGET_PXA27X is not set | ||
1277 | # CONFIG_USB_GADGET_S3C2410 is not set | ||
1278 | # CONFIG_USB_GADGET_IMX is not set | ||
1279 | # CONFIG_USB_GADGET_M66592 is not set | ||
1280 | # CONFIG_USB_GADGET_AMD5536UDC is not set | ||
1281 | # CONFIG_USB_GADGET_FSL_QE is not set | ||
1282 | # CONFIG_USB_GADGET_CI13XXX is not set | ||
1283 | # CONFIG_USB_GADGET_NET2280 is not set | ||
1284 | # CONFIG_USB_GADGET_GOKU is not set | ||
1285 | # CONFIG_USB_GADGET_DUMMY_HCD is not set | ||
1286 | CONFIG_USB_GADGET_DUALSPEED=y | ||
1287 | CONFIG_USB_ZERO=m | ||
1288 | CONFIG_USB_ETH=m | ||
1289 | CONFIG_USB_ETH_RNDIS=y | ||
1290 | CONFIG_USB_GADGETFS=m | ||
1291 | CONFIG_USB_FILE_STORAGE=m | ||
1292 | # CONFIG_USB_FILE_STORAGE_TEST is not set | ||
1293 | CONFIG_USB_G_SERIAL=m | ||
1294 | # CONFIG_USB_MIDI_GADGET is not set | ||
1295 | CONFIG_USB_G_PRINTER=m | ||
1296 | CONFIG_USB_CDC_COMPOSITE=m | ||
1297 | |||
1298 | # | ||
1299 | # OTG and related infrastructure | ||
1300 | # | ||
1301 | CONFIG_USB_OTG_UTILS=y | ||
1302 | # CONFIG_USB_GPIO_VBUS is not set | ||
1303 | # CONFIG_NOP_USB_XCEIV is not set | ||
1304 | CONFIG_MMC=m | ||
1305 | # CONFIG_MMC_DEBUG is not set | ||
1306 | # CONFIG_MMC_UNSAFE_RESUME is not set | ||
1307 | |||
1308 | # | ||
1309 | # MMC/SD/SDIO Card Drivers | ||
1310 | # | ||
1311 | CONFIG_MMC_BLOCK=m | ||
1312 | # CONFIG_MMC_BLOCK_BOUNCE is not set | ||
1313 | # CONFIG_SDIO_UART is not set | ||
1314 | # CONFIG_MMC_TEST is not set | ||
1315 | |||
1316 | # | ||
1317 | # MMC/SD/SDIO Host Controller Drivers | ||
1318 | # | ||
1319 | # CONFIG_MMC_SDHCI is not set | ||
1320 | # CONFIG_MEMSTICK is not set | ||
1321 | # CONFIG_ACCESSIBILITY is not set | ||
1322 | CONFIG_NEW_LEDS=y | ||
1323 | CONFIG_LEDS_CLASS=m | ||
1324 | |||
1325 | # | ||
1326 | # LED drivers | ||
1327 | # | ||
1328 | # CONFIG_LEDS_PCA9532 is not set | ||
1329 | CONFIG_LEDS_GPIO=m | ||
1330 | CONFIG_LEDS_GPIO_PLATFORM=y | ||
1331 | # CONFIG_LEDS_LP5521 is not set | ||
1332 | # CONFIG_LEDS_PCA955X is not set | ||
1333 | # CONFIG_LEDS_BD2802 is not set | ||
1334 | |||
1335 | # | ||
1336 | # LED Triggers | ||
1337 | # | ||
1338 | CONFIG_LEDS_TRIGGERS=y | ||
1339 | CONFIG_LEDS_TRIGGER_TIMER=m | ||
1340 | # CONFIG_LEDS_TRIGGER_IDE_DISK is not set | ||
1341 | CONFIG_LEDS_TRIGGER_HEARTBEAT=m | ||
1342 | # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set | ||
1343 | # CONFIG_LEDS_TRIGGER_GPIO is not set | ||
1344 | # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set | ||
1345 | |||
1346 | # | ||
1347 | # iptables trigger is under Netfilter config (LED target) | ||
1348 | # | ||
1349 | CONFIG_RTC_LIB=y | ||
1350 | CONFIG_RTC_CLASS=m | ||
1351 | |||
1352 | # | ||
1353 | # RTC interfaces | ||
1354 | # | ||
1355 | CONFIG_RTC_INTF_SYSFS=y | ||
1356 | CONFIG_RTC_INTF_PROC=y | ||
1357 | CONFIG_RTC_INTF_DEV=y | ||
1358 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
1359 | # CONFIG_RTC_DRV_TEST is not set | ||
1360 | |||
1361 | # | ||
1362 | # I2C RTC drivers | ||
1363 | # | ||
1364 | # CONFIG_RTC_DRV_DS1307 is not set | ||
1365 | # CONFIG_RTC_DRV_DS1374 is not set | ||
1366 | # CONFIG_RTC_DRV_DS1672 is not set | ||
1367 | # CONFIG_RTC_DRV_MAX6900 is not set | ||
1368 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
1369 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
1370 | # CONFIG_RTC_DRV_X1205 is not set | ||
1371 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
1372 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
1373 | # CONFIG_RTC_DRV_M41T80 is not set | ||
1374 | # CONFIG_RTC_DRV_S35390A is not set | ||
1375 | # CONFIG_RTC_DRV_FM3130 is not set | ||
1376 | # CONFIG_RTC_DRV_RX8581 is not set | ||
1377 | |||
1378 | # | ||
1379 | # SPI RTC drivers | ||
1380 | # | ||
1381 | |||
1382 | # | ||
1383 | # Platform RTC drivers | ||
1384 | # | ||
1385 | # CONFIG_RTC_DRV_CMOS is not set | ||
1386 | # CONFIG_RTC_DRV_DS1286 is not set | ||
1387 | # CONFIG_RTC_DRV_DS1511 is not set | ||
1388 | # CONFIG_RTC_DRV_DS1553 is not set | ||
1389 | # CONFIG_RTC_DRV_DS1742 is not set | ||
1390 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
1391 | # CONFIG_RTC_DRV_M48T86 is not set | ||
1392 | # CONFIG_RTC_DRV_M48T35 is not set | ||
1393 | # CONFIG_RTC_DRV_M48T59 is not set | ||
1394 | # CONFIG_RTC_DRV_BQ4802 is not set | ||
1395 | # CONFIG_RTC_DRV_V3020 is not set | ||
1396 | |||
1397 | # | ||
1398 | # on-CPU RTC drivers | ||
1399 | # | ||
1400 | # CONFIG_DMADEVICES is not set | ||
1401 | # CONFIG_AUXDISPLAY is not set | ||
1402 | # CONFIG_REGULATOR is not set | ||
1403 | # CONFIG_UIO is not set | ||
1404 | # CONFIG_STAGING is not set | ||
1405 | |||
1406 | # | ||
1407 | # File systems | ||
1408 | # | ||
1409 | CONFIG_EXT2_FS=y | ||
1410 | # CONFIG_EXT2_FS_XATTR is not set | ||
1411 | # CONFIG_EXT2_FS_XIP is not set | ||
1412 | CONFIG_EXT3_FS=y | ||
1413 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
1414 | CONFIG_EXT3_FS_XATTR=y | ||
1415 | # CONFIG_EXT3_FS_POSIX_ACL is not set | ||
1416 | # CONFIG_EXT3_FS_SECURITY is not set | ||
1417 | # CONFIG_EXT4_FS is not set | ||
1418 | CONFIG_JBD=y | ||
1419 | # CONFIG_JBD_DEBUG is not set | ||
1420 | CONFIG_FS_MBCACHE=y | ||
1421 | # CONFIG_REISERFS_FS is not set | ||
1422 | # CONFIG_JFS_FS is not set | ||
1423 | # CONFIG_FS_POSIX_ACL is not set | ||
1424 | CONFIG_FILE_LOCKING=y | ||
1425 | CONFIG_XFS_FS=m | ||
1426 | # CONFIG_XFS_QUOTA is not set | ||
1427 | # CONFIG_XFS_POSIX_ACL is not set | ||
1428 | # CONFIG_XFS_RT is not set | ||
1429 | # CONFIG_XFS_DEBUG is not set | ||
1430 | # CONFIG_OCFS2_FS is not set | ||
1431 | # CONFIG_BTRFS_FS is not set | ||
1432 | CONFIG_DNOTIFY=y | ||
1433 | CONFIG_INOTIFY=y | ||
1434 | CONFIG_INOTIFY_USER=y | ||
1435 | # CONFIG_QUOTA is not set | ||
1436 | # CONFIG_AUTOFS_FS is not set | ||
1437 | CONFIG_AUTOFS4_FS=m | ||
1438 | # CONFIG_FUSE_FS is not set | ||
1439 | |||
1440 | # | ||
1441 | # Caches | ||
1442 | # | ||
1443 | # CONFIG_FSCACHE is not set | ||
1444 | |||
1445 | # | ||
1446 | # CD-ROM/DVD Filesystems | ||
1447 | # | ||
1448 | # CONFIG_ISO9660_FS is not set | ||
1449 | # CONFIG_UDF_FS is not set | ||
1450 | |||
1451 | # | ||
1452 | # DOS/FAT/NT Filesystems | ||
1453 | # | ||
1454 | CONFIG_FAT_FS=y | ||
1455 | CONFIG_MSDOS_FS=y | ||
1456 | CONFIG_VFAT_FS=y | ||
1457 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
1458 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
1459 | # CONFIG_NTFS_FS is not set | ||
1460 | |||
1461 | # | ||
1462 | # Pseudo filesystems | ||
1463 | # | ||
1464 | CONFIG_PROC_FS=y | ||
1465 | CONFIG_PROC_SYSCTL=y | ||
1466 | CONFIG_PROC_PAGE_MONITOR=y | ||
1467 | CONFIG_SYSFS=y | ||
1468 | CONFIG_TMPFS=y | ||
1469 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
1470 | # CONFIG_HUGETLB_PAGE is not set | ||
1471 | # CONFIG_CONFIGFS_FS is not set | ||
1472 | CONFIG_MISC_FILESYSTEMS=y | ||
1473 | # CONFIG_ADFS_FS is not set | ||
1474 | # CONFIG_AFFS_FS is not set | ||
1475 | # CONFIG_HFS_FS is not set | ||
1476 | # CONFIG_HFSPLUS_FS is not set | ||
1477 | # CONFIG_BEFS_FS is not set | ||
1478 | # CONFIG_BFS_FS is not set | ||
1479 | # CONFIG_EFS_FS is not set | ||
1480 | CONFIG_JFFS2_FS=m | ||
1481 | CONFIG_JFFS2_FS_DEBUG=0 | ||
1482 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
1483 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
1484 | # CONFIG_JFFS2_SUMMARY is not set | ||
1485 | # CONFIG_JFFS2_FS_XATTR is not set | ||
1486 | # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set | ||
1487 | CONFIG_JFFS2_ZLIB=y | ||
1488 | # CONFIG_JFFS2_LZO is not set | ||
1489 | CONFIG_JFFS2_RTIME=y | ||
1490 | # CONFIG_JFFS2_RUBIN is not set | ||
1491 | CONFIG_CRAMFS=y | ||
1492 | # CONFIG_SQUASHFS is not set | ||
1493 | # CONFIG_VXFS_FS is not set | ||
1494 | CONFIG_MINIX_FS=m | ||
1495 | # CONFIG_OMFS_FS is not set | ||
1496 | # CONFIG_HPFS_FS is not set | ||
1497 | # CONFIG_QNX4FS_FS is not set | ||
1498 | # CONFIG_ROMFS_FS is not set | ||
1499 | # CONFIG_SYSV_FS is not set | ||
1500 | # CONFIG_UFS_FS is not set | ||
1501 | # CONFIG_NILFS2_FS is not set | ||
1502 | CONFIG_NETWORK_FILESYSTEMS=y | ||
1503 | CONFIG_NFS_FS=y | ||
1504 | CONFIG_NFS_V3=y | ||
1505 | # CONFIG_NFS_V3_ACL is not set | ||
1506 | # CONFIG_NFS_V4 is not set | ||
1507 | CONFIG_ROOT_NFS=y | ||
1508 | CONFIG_NFSD=m | ||
1509 | CONFIG_NFSD_V3=y | ||
1510 | # CONFIG_NFSD_V3_ACL is not set | ||
1511 | # CONFIG_NFSD_V4 is not set | ||
1512 | CONFIG_LOCKD=y | ||
1513 | CONFIG_LOCKD_V4=y | ||
1514 | CONFIG_EXPORTFS=m | ||
1515 | CONFIG_NFS_COMMON=y | ||
1516 | CONFIG_SUNRPC=y | ||
1517 | # CONFIG_RPCSEC_GSS_KRB5 is not set | ||
1518 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
1519 | CONFIG_SMB_FS=m | ||
1520 | # CONFIG_SMB_NLS_DEFAULT is not set | ||
1521 | # CONFIG_CIFS is not set | ||
1522 | # CONFIG_NCP_FS is not set | ||
1523 | # CONFIG_CODA_FS is not set | ||
1524 | # CONFIG_AFS_FS is not set | ||
1525 | |||
1526 | # | ||
1527 | # Partition Types | ||
1528 | # | ||
1529 | CONFIG_PARTITION_ADVANCED=y | ||
1530 | # CONFIG_ACORN_PARTITION is not set | ||
1531 | # CONFIG_OSF_PARTITION is not set | ||
1532 | # CONFIG_AMIGA_PARTITION is not set | ||
1533 | # CONFIG_ATARI_PARTITION is not set | ||
1534 | # CONFIG_MAC_PARTITION is not set | ||
1535 | CONFIG_MSDOS_PARTITION=y | ||
1536 | # CONFIG_BSD_DISKLABEL is not set | ||
1537 | # CONFIG_MINIX_SUBPARTITION is not set | ||
1538 | # CONFIG_SOLARIS_X86_PARTITION is not set | ||
1539 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
1540 | # CONFIG_LDM_PARTITION is not set | ||
1541 | # CONFIG_SGI_PARTITION is not set | ||
1542 | # CONFIG_ULTRIX_PARTITION is not set | ||
1543 | # CONFIG_SUN_PARTITION is not set | ||
1544 | # CONFIG_KARMA_PARTITION is not set | ||
1545 | # CONFIG_EFI_PARTITION is not set | ||
1546 | # CONFIG_SYSV68_PARTITION is not set | ||
1547 | CONFIG_NLS=y | ||
1548 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
1549 | CONFIG_NLS_CODEPAGE_437=y | ||
1550 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
1551 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
1552 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
1553 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
1554 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
1555 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
1556 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
1557 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
1558 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
1559 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
1560 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
1561 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
1562 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
1563 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
1564 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
1565 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
1566 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
1567 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
1568 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
1569 | # CONFIG_NLS_ISO8859_8 is not set | ||
1570 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
1571 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
1572 | CONFIG_NLS_ASCII=m | ||
1573 | CONFIG_NLS_ISO8859_1=y | ||
1574 | # CONFIG_NLS_ISO8859_2 is not set | ||
1575 | # CONFIG_NLS_ISO8859_3 is not set | ||
1576 | # CONFIG_NLS_ISO8859_4 is not set | ||
1577 | # CONFIG_NLS_ISO8859_5 is not set | ||
1578 | # CONFIG_NLS_ISO8859_6 is not set | ||
1579 | # CONFIG_NLS_ISO8859_7 is not set | ||
1580 | # CONFIG_NLS_ISO8859_9 is not set | ||
1581 | # CONFIG_NLS_ISO8859_13 is not set | ||
1582 | # CONFIG_NLS_ISO8859_14 is not set | ||
1583 | # CONFIG_NLS_ISO8859_15 is not set | ||
1584 | # CONFIG_NLS_KOI8_R is not set | ||
1585 | # CONFIG_NLS_KOI8_U is not set | ||
1586 | CONFIG_NLS_UTF8=m | ||
1587 | # CONFIG_DLM is not set | ||
1588 | |||
1589 | # | ||
1590 | # Kernel hacking | ||
1591 | # | ||
1592 | # CONFIG_PRINTK_TIME is not set | ||
1593 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
1594 | CONFIG_ENABLE_MUST_CHECK=y | ||
1595 | CONFIG_FRAME_WARN=1024 | ||
1596 | # CONFIG_MAGIC_SYSRQ is not set | ||
1597 | # CONFIG_UNUSED_SYMBOLS is not set | ||
1598 | CONFIG_DEBUG_FS=y | ||
1599 | # CONFIG_HEADERS_CHECK is not set | ||
1600 | CONFIG_DEBUG_KERNEL=y | ||
1601 | # CONFIG_DEBUG_SHIRQ is not set | ||
1602 | CONFIG_DETECT_SOFTLOCKUP=y | ||
1603 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | ||
1604 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | ||
1605 | CONFIG_DETECT_HUNG_TASK=y | ||
1606 | # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set | ||
1607 | CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 | ||
1608 | CONFIG_SCHED_DEBUG=y | ||
1609 | # CONFIG_SCHEDSTATS is not set | ||
1610 | CONFIG_TIMER_STATS=y | ||
1611 | # CONFIG_DEBUG_OBJECTS is not set | ||
1612 | # CONFIG_SLUB_DEBUG_ON is not set | ||
1613 | # CONFIG_SLUB_STATS is not set | ||
1614 | CONFIG_DEBUG_PREEMPT=y | ||
1615 | CONFIG_DEBUG_RT_MUTEXES=y | ||
1616 | CONFIG_DEBUG_PI_LIST=y | ||
1617 | # CONFIG_RT_MUTEX_TESTER is not set | ||
1618 | # CONFIG_DEBUG_SPINLOCK is not set | ||
1619 | CONFIG_DEBUG_MUTEXES=y | ||
1620 | # CONFIG_DEBUG_LOCK_ALLOC is not set | ||
1621 | # CONFIG_PROVE_LOCKING is not set | ||
1622 | # CONFIG_LOCK_STAT is not set | ||
1623 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
1624 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
1625 | # CONFIG_DEBUG_KOBJECT is not set | ||
1626 | CONFIG_DEBUG_BUGVERBOSE=y | ||
1627 | # CONFIG_DEBUG_INFO is not set | ||
1628 | # CONFIG_DEBUG_VM is not set | ||
1629 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
1630 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
1631 | # CONFIG_DEBUG_LIST is not set | ||
1632 | # CONFIG_DEBUG_SG is not set | ||
1633 | # CONFIG_DEBUG_NOTIFIERS is not set | ||
1634 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
1635 | # CONFIG_RCU_TORTURE_TEST is not set | ||
1636 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
1637 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
1638 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
1639 | # CONFIG_FAULT_INJECTION is not set | ||
1640 | # CONFIG_LATENCYTOP is not set | ||
1641 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
1642 | # CONFIG_PAGE_POISONING is not set | ||
1643 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
1644 | CONFIG_TRACING_SUPPORT=y | ||
1645 | |||
1646 | # | ||
1647 | # Tracers | ||
1648 | # | ||
1649 | # CONFIG_FUNCTION_TRACER is not set | ||
1650 | # CONFIG_IRQSOFF_TRACER is not set | ||
1651 | # CONFIG_PREEMPT_TRACER is not set | ||
1652 | # CONFIG_SCHED_TRACER is not set | ||
1653 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | ||
1654 | # CONFIG_EVENT_TRACER is not set | ||
1655 | # CONFIG_BOOT_TRACER is not set | ||
1656 | # CONFIG_TRACE_BRANCH_PROFILING is not set | ||
1657 | # CONFIG_STACK_TRACER is not set | ||
1658 | # CONFIG_KMEMTRACE is not set | ||
1659 | # CONFIG_WORKQUEUE_TRACER is not set | ||
1660 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
1661 | # CONFIG_DYNAMIC_DEBUG is not set | ||
1662 | # CONFIG_SAMPLES is not set | ||
1663 | CONFIG_HAVE_ARCH_KGDB=y | ||
1664 | # CONFIG_KGDB is not set | ||
1665 | CONFIG_ARM_UNWIND=y | ||
1666 | CONFIG_DEBUG_USER=y | ||
1667 | CONFIG_DEBUG_ERRORS=y | ||
1668 | # CONFIG_DEBUG_STACK_USAGE is not set | ||
1669 | # CONFIG_DEBUG_LL is not set | ||
1670 | |||
1671 | # | ||
1672 | # Security options | ||
1673 | # | ||
1674 | # CONFIG_KEYS is not set | ||
1675 | # CONFIG_SECURITY is not set | ||
1676 | # CONFIG_SECURITYFS is not set | ||
1677 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
1678 | CONFIG_CRYPTO=y | ||
1679 | |||
1680 | # | ||
1681 | # Crypto core or helper | ||
1682 | # | ||
1683 | # CONFIG_CRYPTO_FIPS is not set | ||
1684 | # CONFIG_CRYPTO_MANAGER is not set | ||
1685 | # CONFIG_CRYPTO_MANAGER2 is not set | ||
1686 | # CONFIG_CRYPTO_GF128MUL is not set | ||
1687 | # CONFIG_CRYPTO_NULL is not set | ||
1688 | # CONFIG_CRYPTO_CRYPTD is not set | ||
1689 | # CONFIG_CRYPTO_AUTHENC is not set | ||
1690 | # CONFIG_CRYPTO_TEST is not set | ||
1691 | |||
1692 | # | ||
1693 | # Authenticated Encryption with Associated Data | ||
1694 | # | ||
1695 | # CONFIG_CRYPTO_CCM is not set | ||
1696 | # CONFIG_CRYPTO_GCM is not set | ||
1697 | # CONFIG_CRYPTO_SEQIV is not set | ||
1698 | |||
1699 | # | ||
1700 | # Block modes | ||
1701 | # | ||
1702 | # CONFIG_CRYPTO_CBC is not set | ||
1703 | # CONFIG_CRYPTO_CTR is not set | ||
1704 | # CONFIG_CRYPTO_CTS is not set | ||
1705 | # CONFIG_CRYPTO_ECB is not set | ||
1706 | # CONFIG_CRYPTO_LRW is not set | ||
1707 | # CONFIG_CRYPTO_PCBC is not set | ||
1708 | # CONFIG_CRYPTO_XTS is not set | ||
1709 | |||
1710 | # | ||
1711 | # Hash modes | ||
1712 | # | ||
1713 | # CONFIG_CRYPTO_HMAC is not set | ||
1714 | # CONFIG_CRYPTO_XCBC is not set | ||
1715 | |||
1716 | # | ||
1717 | # Digest | ||
1718 | # | ||
1719 | # CONFIG_CRYPTO_CRC32C is not set | ||
1720 | # CONFIG_CRYPTO_MD4 is not set | ||
1721 | # CONFIG_CRYPTO_MD5 is not set | ||
1722 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
1723 | # CONFIG_CRYPTO_RMD128 is not set | ||
1724 | # CONFIG_CRYPTO_RMD160 is not set | ||
1725 | # CONFIG_CRYPTO_RMD256 is not set | ||
1726 | # CONFIG_CRYPTO_RMD320 is not set | ||
1727 | # CONFIG_CRYPTO_SHA1 is not set | ||
1728 | # CONFIG_CRYPTO_SHA256 is not set | ||
1729 | # CONFIG_CRYPTO_SHA512 is not set | ||
1730 | # CONFIG_CRYPTO_TGR192 is not set | ||
1731 | # CONFIG_CRYPTO_WP512 is not set | ||
1732 | |||
1733 | # | ||
1734 | # Ciphers | ||
1735 | # | ||
1736 | # CONFIG_CRYPTO_AES is not set | ||
1737 | # CONFIG_CRYPTO_ANUBIS is not set | ||
1738 | # CONFIG_CRYPTO_ARC4 is not set | ||
1739 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
1740 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
1741 | # CONFIG_CRYPTO_CAST5 is not set | ||
1742 | # CONFIG_CRYPTO_CAST6 is not set | ||
1743 | # CONFIG_CRYPTO_DES is not set | ||
1744 | # CONFIG_CRYPTO_FCRYPT is not set | ||
1745 | # CONFIG_CRYPTO_KHAZAD is not set | ||
1746 | # CONFIG_CRYPTO_SALSA20 is not set | ||
1747 | # CONFIG_CRYPTO_SEED is not set | ||
1748 | # CONFIG_CRYPTO_SERPENT is not set | ||
1749 | # CONFIG_CRYPTO_TEA is not set | ||
1750 | # CONFIG_CRYPTO_TWOFISH is not set | ||
1751 | |||
1752 | # | ||
1753 | # Compression | ||
1754 | # | ||
1755 | # CONFIG_CRYPTO_DEFLATE is not set | ||
1756 | # CONFIG_CRYPTO_ZLIB is not set | ||
1757 | # CONFIG_CRYPTO_LZO is not set | ||
1758 | |||
1759 | # | ||
1760 | # Random Number Generation | ||
1761 | # | ||
1762 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
1763 | # CONFIG_CRYPTO_HW is not set | ||
1764 | # CONFIG_BINARY_PRINTF is not set | ||
1765 | |||
1766 | # | ||
1767 | # Library routines | ||
1768 | # | ||
1769 | CONFIG_BITREVERSE=y | ||
1770 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
1771 | CONFIG_CRC_CCITT=m | ||
1772 | # CONFIG_CRC16 is not set | ||
1773 | CONFIG_CRC_T10DIF=m | ||
1774 | # CONFIG_CRC_ITU_T is not set | ||
1775 | CONFIG_CRC32=y | ||
1776 | # CONFIG_CRC7 is not set | ||
1777 | # CONFIG_LIBCRC32C is not set | ||
1778 | CONFIG_ZLIB_INFLATE=y | ||
1779 | CONFIG_ZLIB_DEFLATE=m | ||
1780 | CONFIG_DECOMPRESS_GZIP=y | ||
1781 | CONFIG_HAS_IOMEM=y | ||
1782 | CONFIG_HAS_IOPORT=y | ||
1783 | CONFIG_HAS_DMA=y | ||
1784 | CONFIG_NLATTR=y | ||
diff --git a/arch/arm/configs/mx31moboard_defconfig b/arch/arm/configs/mx21_defconfig index e90f86d6deef..4b04290d8e81 100644 --- a/arch/arm/configs/mx31moboard_defconfig +++ b/arch/arm/configs/mx21_defconfig | |||
@@ -1,9 +1,10 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.27-rc5 | 3 | # Linux kernel version: 2.6.30-rc1 |
4 | # Fri Oct 24 11:41:22 2008 | 4 | # Tue Apr 14 16:58:09 2009 |
5 | # | 5 | # |
6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
7 | CONFIG_HAVE_PWM=y | ||
7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | 8 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y |
8 | CONFIG_GENERIC_GPIO=y | 9 | CONFIG_GENERIC_GPIO=y |
9 | CONFIG_GENERIC_TIME=y | 10 | CONFIG_GENERIC_TIME=y |
@@ -22,8 +23,6 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y | |||
22 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | 23 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set |
23 | CONFIG_GENERIC_HWEIGHT=y | 24 | CONFIG_GENERIC_HWEIGHT=y |
24 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 25 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
25 | CONFIG_ARCH_SUPPORTS_AOUT=y | ||
26 | CONFIG_ZONE_DMA=y | ||
27 | CONFIG_ARCH_MTD_XIP=y | 26 | CONFIG_ARCH_MTD_XIP=y |
28 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | 27 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y |
29 | CONFIG_VECTORS_BASE=0xffff0000 | 28 | CONFIG_VECTORS_BASE=0xffff0000 |
@@ -38,48 +37,53 @@ CONFIG_LOCK_KERNEL=y | |||
38 | CONFIG_INIT_ENV_ARG_LIMIT=32 | 37 | CONFIG_INIT_ENV_ARG_LIMIT=32 |
39 | CONFIG_LOCALVERSION="" | 38 | CONFIG_LOCALVERSION="" |
40 | CONFIG_LOCALVERSION_AUTO=y | 39 | CONFIG_LOCALVERSION_AUTO=y |
41 | CONFIG_SWAP=y | 40 | # CONFIG_SWAP is not set |
42 | CONFIG_SYSVIPC=y | 41 | CONFIG_SYSVIPC=y |
43 | CONFIG_SYSVIPC_SYSCTL=y | 42 | CONFIG_SYSVIPC_SYSCTL=y |
44 | # CONFIG_POSIX_MQUEUE is not set | 43 | # CONFIG_POSIX_MQUEUE is not set |
45 | # CONFIG_BSD_PROCESS_ACCT is not set | 44 | # CONFIG_BSD_PROCESS_ACCT is not set |
46 | # CONFIG_TASKSTATS is not set | 45 | # CONFIG_TASKSTATS is not set |
47 | # CONFIG_AUDIT is not set | 46 | # CONFIG_AUDIT is not set |
48 | CONFIG_IKCONFIG=y | 47 | |
49 | CONFIG_IKCONFIG_PROC=y | 48 | # |
49 | # RCU Subsystem | ||
50 | # | ||
51 | CONFIG_CLASSIC_RCU=y | ||
52 | # CONFIG_TREE_RCU is not set | ||
53 | # CONFIG_PREEMPT_RCU is not set | ||
54 | # CONFIG_TREE_RCU_TRACE is not set | ||
55 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
56 | # CONFIG_IKCONFIG is not set | ||
50 | CONFIG_LOG_BUF_SHIFT=14 | 57 | CONFIG_LOG_BUF_SHIFT=14 |
58 | # CONFIG_GROUP_SCHED is not set | ||
51 | # CONFIG_CGROUPS is not set | 59 | # CONFIG_CGROUPS is not set |
52 | CONFIG_GROUP_SCHED=y | ||
53 | CONFIG_FAIR_GROUP_SCHED=y | ||
54 | # CONFIG_RT_GROUP_SCHED is not set | ||
55 | CONFIG_USER_SCHED=y | ||
56 | # CONFIG_CGROUP_SCHED is not set | ||
57 | CONFIG_SYSFS_DEPRECATED=y | 60 | CONFIG_SYSFS_DEPRECATED=y |
58 | CONFIG_SYSFS_DEPRECATED_V2=y | 61 | CONFIG_SYSFS_DEPRECATED_V2=y |
59 | # CONFIG_RELAY is not set | 62 | # CONFIG_RELAY is not set |
60 | # CONFIG_NAMESPACES is not set | 63 | # CONFIG_NAMESPACES is not set |
61 | # CONFIG_BLK_DEV_INITRD is not set | 64 | # CONFIG_BLK_DEV_INITRD is not set |
62 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | 65 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set |
63 | CONFIG_SYSCTL=y | 66 | CONFIG_SYSCTL=y |
67 | CONFIG_ANON_INODES=y | ||
64 | CONFIG_EMBEDDED=y | 68 | CONFIG_EMBEDDED=y |
65 | CONFIG_UID16=y | 69 | CONFIG_UID16=y |
66 | CONFIG_SYSCTL_SYSCALL=y | 70 | CONFIG_SYSCTL_SYSCALL=y |
67 | CONFIG_KALLSYMS=y | 71 | CONFIG_KALLSYMS=y |
68 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 72 | CONFIG_KALLSYMS_EXTRA_PASS=y |
69 | CONFIG_HOTPLUG=y | 73 | CONFIG_HOTPLUG=y |
70 | CONFIG_PRINTK=y | 74 | CONFIG_PRINTK=y |
71 | CONFIG_BUG=y | 75 | CONFIG_BUG=y |
72 | CONFIG_ELF_CORE=y | 76 | CONFIG_ELF_CORE=y |
73 | CONFIG_COMPAT_BRK=y | ||
74 | CONFIG_BASE_FULL=y | 77 | CONFIG_BASE_FULL=y |
75 | CONFIG_FUTEX=y | 78 | CONFIG_FUTEX=y |
76 | CONFIG_ANON_INODES=y | ||
77 | CONFIG_EPOLL=y | 79 | CONFIG_EPOLL=y |
78 | CONFIG_SIGNALFD=y | 80 | CONFIG_SIGNALFD=y |
79 | CONFIG_TIMERFD=y | 81 | CONFIG_TIMERFD=y |
80 | CONFIG_EVENTFD=y | 82 | CONFIG_EVENTFD=y |
81 | CONFIG_SHMEM=y | 83 | CONFIG_SHMEM=y |
84 | CONFIG_AIO=y | ||
82 | CONFIG_VM_EVENT_COUNTERS=y | 85 | CONFIG_VM_EVENT_COUNTERS=y |
86 | CONFIG_COMPAT_BRK=y | ||
83 | CONFIG_SLAB=y | 87 | CONFIG_SLAB=y |
84 | # CONFIG_SLUB is not set | 88 | # CONFIG_SLUB is not set |
85 | # CONFIG_SLOB is not set | 89 | # CONFIG_SLOB is not set |
@@ -87,31 +91,21 @@ CONFIG_SLAB=y | |||
87 | # CONFIG_MARKERS is not set | 91 | # CONFIG_MARKERS is not set |
88 | CONFIG_HAVE_OPROFILE=y | 92 | CONFIG_HAVE_OPROFILE=y |
89 | # CONFIG_KPROBES is not set | 93 | # CONFIG_KPROBES is not set |
90 | # CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set | ||
91 | # CONFIG_HAVE_IOREMAP_PROT is not set | ||
92 | CONFIG_HAVE_KPROBES=y | 94 | CONFIG_HAVE_KPROBES=y |
93 | CONFIG_HAVE_KRETPROBES=y | 95 | CONFIG_HAVE_KRETPROBES=y |
94 | # CONFIG_HAVE_ARCH_TRACEHOOK is not set | 96 | # CONFIG_SLOW_WORK is not set |
95 | # CONFIG_HAVE_DMA_ATTRS is not set | ||
96 | # CONFIG_USE_GENERIC_SMP_HELPERS is not set | ||
97 | # CONFIG_HAVE_CLK is not set | ||
98 | CONFIG_PROC_PAGE_MONITOR=y | ||
99 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | 97 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y |
100 | CONFIG_SLABINFO=y | 98 | CONFIG_SLABINFO=y |
101 | CONFIG_RT_MUTEXES=y | 99 | CONFIG_RT_MUTEXES=y |
102 | # CONFIG_TINY_SHMEM is not set | ||
103 | CONFIG_BASE_SMALL=0 | 100 | CONFIG_BASE_SMALL=0 |
104 | CONFIG_MODULES=y | 101 | CONFIG_MODULES=y |
105 | # CONFIG_MODULE_FORCE_LOAD is not set | 102 | # CONFIG_MODULE_FORCE_LOAD is not set |
106 | CONFIG_MODULE_UNLOAD=y | 103 | CONFIG_MODULE_UNLOAD=y |
107 | CONFIG_MODULE_FORCE_UNLOAD=y | 104 | # CONFIG_MODULE_FORCE_UNLOAD is not set |
108 | CONFIG_MODVERSIONS=y | 105 | # CONFIG_MODVERSIONS is not set |
109 | # CONFIG_MODULE_SRCVERSION_ALL is not set | 106 | # CONFIG_MODULE_SRCVERSION_ALL is not set |
110 | CONFIG_KMOD=y | ||
111 | CONFIG_BLOCK=y | 107 | CONFIG_BLOCK=y |
112 | # CONFIG_LBD is not set | 108 | # CONFIG_LBD is not set |
113 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
114 | # CONFIG_LSF is not set | ||
115 | # CONFIG_BLK_DEV_BSG is not set | 109 | # CONFIG_BLK_DEV_BSG is not set |
116 | # CONFIG_BLK_DEV_INTEGRITY is not set | 110 | # CONFIG_BLK_DEV_INTEGRITY is not set |
117 | 111 | ||
@@ -119,15 +113,15 @@ CONFIG_BLOCK=y | |||
119 | # IO Schedulers | 113 | # IO Schedulers |
120 | # | 114 | # |
121 | CONFIG_IOSCHED_NOOP=y | 115 | CONFIG_IOSCHED_NOOP=y |
122 | CONFIG_IOSCHED_AS=y | 116 | # CONFIG_IOSCHED_AS is not set |
123 | CONFIG_IOSCHED_DEADLINE=y | 117 | # CONFIG_IOSCHED_DEADLINE is not set |
124 | CONFIG_IOSCHED_CFQ=y | 118 | # CONFIG_IOSCHED_CFQ is not set |
125 | # CONFIG_DEFAULT_AS is not set | 119 | # CONFIG_DEFAULT_AS is not set |
126 | # CONFIG_DEFAULT_DEADLINE is not set | 120 | # CONFIG_DEFAULT_DEADLINE is not set |
127 | CONFIG_DEFAULT_CFQ=y | 121 | # CONFIG_DEFAULT_CFQ is not set |
128 | # CONFIG_DEFAULT_NOOP is not set | 122 | CONFIG_DEFAULT_NOOP=y |
129 | CONFIG_DEFAULT_IOSCHED="cfq" | 123 | CONFIG_DEFAULT_IOSCHED="noop" |
130 | CONFIG_CLASSIC_RCU=y | 124 | # CONFIG_FREEZER is not set |
131 | 125 | ||
132 | # | 126 | # |
133 | # System Type | 127 | # System Type |
@@ -137,14 +131,13 @@ CONFIG_CLASSIC_RCU=y | |||
137 | # CONFIG_ARCH_REALVIEW is not set | 131 | # CONFIG_ARCH_REALVIEW is not set |
138 | # CONFIG_ARCH_VERSATILE is not set | 132 | # CONFIG_ARCH_VERSATILE is not set |
139 | # CONFIG_ARCH_AT91 is not set | 133 | # CONFIG_ARCH_AT91 is not set |
140 | # CONFIG_ARCH_CLPS7500 is not set | ||
141 | # CONFIG_ARCH_CLPS711X is not set | 134 | # CONFIG_ARCH_CLPS711X is not set |
142 | # CONFIG_ARCH_EBSA110 is not set | 135 | # CONFIG_ARCH_EBSA110 is not set |
143 | # CONFIG_ARCH_EP93XX is not set | 136 | # CONFIG_ARCH_EP93XX is not set |
137 | # CONFIG_ARCH_GEMINI is not set | ||
144 | # CONFIG_ARCH_FOOTBRIDGE is not set | 138 | # CONFIG_ARCH_FOOTBRIDGE is not set |
145 | # CONFIG_ARCH_NETX is not set | 139 | # CONFIG_ARCH_NETX is not set |
146 | # CONFIG_ARCH_H720X is not set | 140 | # CONFIG_ARCH_H720X is not set |
147 | # CONFIG_ARCH_IMX is not set | ||
148 | # CONFIG_ARCH_IOP13XX is not set | 141 | # CONFIG_ARCH_IOP13XX is not set |
149 | # CONFIG_ARCH_IOP32X is not set | 142 | # CONFIG_ARCH_IOP32X is not set |
150 | # CONFIG_ARCH_IOP33X is not set | 143 | # CONFIG_ARCH_IOP33X is not set |
@@ -161,52 +154,45 @@ CONFIG_ARCH_MXC=y | |||
161 | # CONFIG_ARCH_ORION5X is not set | 154 | # CONFIG_ARCH_ORION5X is not set |
162 | # CONFIG_ARCH_PNX4008 is not set | 155 | # CONFIG_ARCH_PNX4008 is not set |
163 | # CONFIG_ARCH_PXA is not set | 156 | # CONFIG_ARCH_PXA is not set |
157 | # CONFIG_ARCH_MMP is not set | ||
164 | # CONFIG_ARCH_RPC is not set | 158 | # CONFIG_ARCH_RPC is not set |
165 | # CONFIG_ARCH_SA1100 is not set | 159 | # CONFIG_ARCH_SA1100 is not set |
166 | # CONFIG_ARCH_S3C2410 is not set | 160 | # CONFIG_ARCH_S3C2410 is not set |
161 | # CONFIG_ARCH_S3C64XX is not set | ||
167 | # CONFIG_ARCH_SHARK is not set | 162 | # CONFIG_ARCH_SHARK is not set |
168 | # CONFIG_ARCH_LH7A40X is not set | 163 | # CONFIG_ARCH_LH7A40X is not set |
169 | # CONFIG_ARCH_DAVINCI is not set | 164 | # CONFIG_ARCH_DAVINCI is not set |
170 | # CONFIG_ARCH_OMAP is not set | 165 | # CONFIG_ARCH_OMAP is not set |
171 | # CONFIG_ARCH_MSM7X00A is not set | 166 | # CONFIG_ARCH_MSM is not set |
172 | 167 | # CONFIG_ARCH_W90X900 is not set | |
173 | # | ||
174 | # Boot options | ||
175 | # | ||
176 | |||
177 | # | ||
178 | # Power management | ||
179 | # | ||
180 | 168 | ||
181 | # | 169 | # |
182 | # Freescale MXC Implementations | 170 | # Freescale MXC Implementations |
183 | # | 171 | # |
184 | # CONFIG_ARCH_MX2 is not set | 172 | # CONFIG_ARCH_MX1 is not set |
185 | CONFIG_ARCH_MX3=y | 173 | CONFIG_ARCH_MX2=y |
174 | # CONFIG_ARCH_MX3 is not set | ||
175 | CONFIG_MACH_MX21=y | ||
176 | # CONFIG_MACH_MX27 is not set | ||
186 | 177 | ||
187 | # | 178 | # |
188 | # MX3 Options | 179 | # MX2 platforms: |
189 | # | 180 | # |
190 | # CONFIG_MACH_MX31ADS is not set | 181 | CONFIG_MACH_MX21ADS=y |
191 | # CONFIG_MACH_PCM037 is not set | ||
192 | # CONFIG_MACH_MX31LITE is not set | ||
193 | CONFIG_MACH_MX31MOBOARD=y | ||
194 | # CONFIG_MXC_IRQ_PRIOR is not set | 182 | # CONFIG_MXC_IRQ_PRIOR is not set |
183 | CONFIG_MXC_PWM=y | ||
195 | 184 | ||
196 | # | 185 | # |
197 | # Processor Type | 186 | # Processor Type |
198 | # | 187 | # |
199 | CONFIG_CPU_32=y | 188 | CONFIG_CPU_32=y |
200 | CONFIG_CPU_V6=y | 189 | CONFIG_CPU_ARM926T=y |
201 | # CONFIG_CPU_32v6K is not set | 190 | CONFIG_CPU_32v5=y |
202 | CONFIG_CPU_32v6=y | 191 | CONFIG_CPU_ABRT_EV5TJ=y |
203 | CONFIG_CPU_ABRT_EV6=y | ||
204 | CONFIG_CPU_PABRT_NOIFAR=y | 192 | CONFIG_CPU_PABRT_NOIFAR=y |
205 | CONFIG_CPU_CACHE_V6=y | 193 | CONFIG_CPU_CACHE_VIVT=y |
206 | CONFIG_CPU_CACHE_VIPT=y | 194 | CONFIG_CPU_COPY_V4WB=y |
207 | CONFIG_CPU_COPY_V6=y | 195 | CONFIG_CPU_TLB_V4WBI=y |
208 | CONFIG_CPU_TLB_V6=y | ||
209 | CONFIG_CPU_HAS_ASID=y | ||
210 | CONFIG_CPU_CP15=y | 196 | CONFIG_CPU_CP15=y |
211 | CONFIG_CPU_CP15_MMU=y | 197 | CONFIG_CPU_CP15_MMU=y |
212 | 198 | ||
@@ -216,8 +202,10 @@ CONFIG_CPU_CP15_MMU=y | |||
216 | CONFIG_ARM_THUMB=y | 202 | CONFIG_ARM_THUMB=y |
217 | # CONFIG_CPU_ICACHE_DISABLE is not set | 203 | # CONFIG_CPU_ICACHE_DISABLE is not set |
218 | # CONFIG_CPU_DCACHE_DISABLE is not set | 204 | # CONFIG_CPU_DCACHE_DISABLE is not set |
219 | # CONFIG_CPU_BPREDICT_DISABLE is not set | 205 | # CONFIG_CPU_DCACHE_WRITETHROUGH is not set |
206 | # CONFIG_CPU_CACHE_ROUND_ROBIN is not set | ||
220 | # CONFIG_OUTER_CACHE is not set | 207 | # CONFIG_OUTER_CACHE is not set |
208 | CONFIG_COMMON_CLKDEV=y | ||
221 | 209 | ||
222 | # | 210 | # |
223 | # Bus support | 211 | # Bus support |
@@ -233,26 +221,32 @@ CONFIG_TICK_ONESHOT=y | |||
233 | CONFIG_NO_HZ=y | 221 | CONFIG_NO_HZ=y |
234 | CONFIG_HIGH_RES_TIMERS=y | 222 | CONFIG_HIGH_RES_TIMERS=y |
235 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | 223 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y |
224 | CONFIG_VMSPLIT_3G=y | ||
225 | # CONFIG_VMSPLIT_2G is not set | ||
226 | # CONFIG_VMSPLIT_1G is not set | ||
227 | CONFIG_PAGE_OFFSET=0xC0000000 | ||
236 | CONFIG_PREEMPT=y | 228 | CONFIG_PREEMPT=y |
237 | CONFIG_HZ=100 | 229 | CONFIG_HZ=100 |
238 | CONFIG_AEABI=y | 230 | CONFIG_AEABI=y |
239 | # CONFIG_OABI_COMPAT is not set | 231 | CONFIG_OABI_COMPAT=y |
240 | CONFIG_ARCH_FLATMEM_HAS_HOLES=y | 232 | CONFIG_ARCH_FLATMEM_HAS_HOLES=y |
241 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set | 233 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set |
234 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | ||
235 | # CONFIG_HIGHMEM is not set | ||
242 | CONFIG_SELECT_MEMORY_MODEL=y | 236 | CONFIG_SELECT_MEMORY_MODEL=y |
243 | CONFIG_FLATMEM_MANUAL=y | 237 | CONFIG_FLATMEM_MANUAL=y |
244 | # CONFIG_DISCONTIGMEM_MANUAL is not set | 238 | # CONFIG_DISCONTIGMEM_MANUAL is not set |
245 | # CONFIG_SPARSEMEM_MANUAL is not set | 239 | # CONFIG_SPARSEMEM_MANUAL is not set |
246 | CONFIG_FLATMEM=y | 240 | CONFIG_FLATMEM=y |
247 | CONFIG_FLAT_NODE_MEM_MAP=y | 241 | CONFIG_FLAT_NODE_MEM_MAP=y |
248 | # CONFIG_SPARSEMEM_STATIC is not set | ||
249 | # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set | ||
250 | CONFIG_PAGEFLAGS_EXTENDED=y | 242 | CONFIG_PAGEFLAGS_EXTENDED=y |
251 | CONFIG_SPLIT_PTLOCK_CPUS=4 | 243 | CONFIG_SPLIT_PTLOCK_CPUS=4096 |
252 | # CONFIG_RESOURCES_64BIT is not set | 244 | # CONFIG_PHYS_ADDR_T_64BIT is not set |
253 | CONFIG_ZONE_DMA_FLAG=1 | 245 | CONFIG_ZONE_DMA_FLAG=0 |
254 | CONFIG_BOUNCE=y | ||
255 | CONFIG_VIRT_TO_BUS=y | 246 | CONFIG_VIRT_TO_BUS=y |
247 | CONFIG_UNEVICTABLE_LRU=y | ||
248 | CONFIG_HAVE_MLOCK=y | ||
249 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
256 | CONFIG_ALIGNMENT_TRAP=y | 250 | CONFIG_ALIGNMENT_TRAP=y |
257 | 251 | ||
258 | # | 252 | # |
@@ -260,23 +254,32 @@ CONFIG_ALIGNMENT_TRAP=y | |||
260 | # | 254 | # |
261 | CONFIG_ZBOOT_ROM_TEXT=0x0 | 255 | CONFIG_ZBOOT_ROM_TEXT=0x0 |
262 | CONFIG_ZBOOT_ROM_BSS=0x0 | 256 | CONFIG_ZBOOT_ROM_BSS=0x0 |
263 | CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw ip=off" | 257 | CONFIG_CMDLINE="" |
264 | # CONFIG_XIP_KERNEL is not set | 258 | # CONFIG_XIP_KERNEL is not set |
265 | # CONFIG_KEXEC is not set | 259 | # CONFIG_KEXEC is not set |
266 | 260 | ||
267 | # | 261 | # |
262 | # CPU Power Management | ||
263 | # | ||
264 | # CONFIG_CPU_IDLE is not set | ||
265 | |||
266 | # | ||
268 | # Floating point emulation | 267 | # Floating point emulation |
269 | # | 268 | # |
270 | 269 | ||
271 | # | 270 | # |
272 | # At least one emulation must be selected | 271 | # At least one emulation must be selected |
273 | # | 272 | # |
274 | CONFIG_VFP=y | 273 | # CONFIG_FPE_NWFPE is not set |
274 | # CONFIG_FPE_FASTFPE is not set | ||
275 | # CONFIG_VFP is not set | ||
275 | 276 | ||
276 | # | 277 | # |
277 | # Userspace binary formats | 278 | # Userspace binary formats |
278 | # | 279 | # |
279 | CONFIG_BINFMT_ELF=y | 280 | CONFIG_BINFMT_ELF=y |
281 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
282 | CONFIG_HAVE_AOUT=y | ||
280 | # CONFIG_BINFMT_AOUT is not set | 283 | # CONFIG_BINFMT_AOUT is not set |
281 | # CONFIG_BINFMT_MISC is not set | 284 | # CONFIG_BINFMT_MISC is not set |
282 | 285 | ||
@@ -290,9 +293,13 @@ CONFIG_NET=y | |||
290 | # | 293 | # |
291 | # Networking options | 294 | # Networking options |
292 | # | 295 | # |
293 | CONFIG_PACKET=y | 296 | # CONFIG_PACKET is not set |
294 | # CONFIG_PACKET_MMAP is not set | 297 | # CONFIG_UNIX is not set |
295 | CONFIG_UNIX=y | 298 | CONFIG_XFRM=y |
299 | # CONFIG_XFRM_USER is not set | ||
300 | # CONFIG_XFRM_SUB_POLICY is not set | ||
301 | # CONFIG_XFRM_MIGRATE is not set | ||
302 | # CONFIG_XFRM_STATISTICS is not set | ||
296 | # CONFIG_NET_KEY is not set | 303 | # CONFIG_NET_KEY is not set |
297 | CONFIG_INET=y | 304 | CONFIG_INET=y |
298 | # CONFIG_IP_MULTICAST is not set | 305 | # CONFIG_IP_MULTICAST is not set |
@@ -300,7 +307,7 @@ CONFIG_INET=y | |||
300 | CONFIG_IP_FIB_HASH=y | 307 | CONFIG_IP_FIB_HASH=y |
301 | CONFIG_IP_PNP=y | 308 | CONFIG_IP_PNP=y |
302 | CONFIG_IP_PNP_DHCP=y | 309 | CONFIG_IP_PNP_DHCP=y |
303 | # CONFIG_IP_PNP_BOOTP is not set | 310 | CONFIG_IP_PNP_BOOTP=y |
304 | # CONFIG_IP_PNP_RARP is not set | 311 | # CONFIG_IP_PNP_RARP is not set |
305 | # CONFIG_NET_IPIP is not set | 312 | # CONFIG_NET_IPIP is not set |
306 | # CONFIG_NET_IPGRE is not set | 313 | # CONFIG_NET_IPGRE is not set |
@@ -311,7 +318,7 @@ CONFIG_IP_PNP_DHCP=y | |||
311 | # CONFIG_INET_IPCOMP is not set | 318 | # CONFIG_INET_IPCOMP is not set |
312 | # CONFIG_INET_XFRM_TUNNEL is not set | 319 | # CONFIG_INET_XFRM_TUNNEL is not set |
313 | # CONFIG_INET_TUNNEL is not set | 320 | # CONFIG_INET_TUNNEL is not set |
314 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | 321 | CONFIG_INET_XFRM_MODE_TRANSPORT=y |
315 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | 322 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
316 | # CONFIG_INET_XFRM_MODE_BEET is not set | 323 | # CONFIG_INET_XFRM_MODE_BEET is not set |
317 | # CONFIG_INET_LRO is not set | 324 | # CONFIG_INET_LRO is not set |
@@ -328,6 +335,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
328 | # CONFIG_TIPC is not set | 335 | # CONFIG_TIPC is not set |
329 | # CONFIG_ATM is not set | 336 | # CONFIG_ATM is not set |
330 | # CONFIG_BRIDGE is not set | 337 | # CONFIG_BRIDGE is not set |
338 | # CONFIG_NET_DSA is not set | ||
331 | # CONFIG_VLAN_8021Q is not set | 339 | # CONFIG_VLAN_8021Q is not set |
332 | # CONFIG_DECNET is not set | 340 | # CONFIG_DECNET is not set |
333 | # CONFIG_LLC2 is not set | 341 | # CONFIG_LLC2 is not set |
@@ -337,7 +345,9 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
337 | # CONFIG_LAPB is not set | 345 | # CONFIG_LAPB is not set |
338 | # CONFIG_ECONET is not set | 346 | # CONFIG_ECONET is not set |
339 | # CONFIG_WAN_ROUTER is not set | 347 | # CONFIG_WAN_ROUTER is not set |
348 | # CONFIG_PHONET is not set | ||
340 | # CONFIG_NET_SCHED is not set | 349 | # CONFIG_NET_SCHED is not set |
350 | # CONFIG_DCB is not set | ||
341 | 351 | ||
342 | # | 352 | # |
343 | # Network testing | 353 | # Network testing |
@@ -348,14 +358,13 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
348 | # CONFIG_IRDA is not set | 358 | # CONFIG_IRDA is not set |
349 | # CONFIG_BT is not set | 359 | # CONFIG_BT is not set |
350 | # CONFIG_AF_RXRPC is not set | 360 | # CONFIG_AF_RXRPC is not set |
351 | 361 | CONFIG_WIRELESS=y | |
352 | # | ||
353 | # Wireless | ||
354 | # | ||
355 | # CONFIG_CFG80211 is not set | 362 | # CONFIG_CFG80211 is not set |
363 | # CONFIG_WIRELESS_OLD_REGULATORY is not set | ||
356 | # CONFIG_WIRELESS_EXT is not set | 364 | # CONFIG_WIRELESS_EXT is not set |
365 | # CONFIG_LIB80211 is not set | ||
357 | # CONFIG_MAC80211 is not set | 366 | # CONFIG_MAC80211 is not set |
358 | # CONFIG_IEEE80211 is not set | 367 | # CONFIG_WIMAX is not set |
359 | # CONFIG_RFKILL is not set | 368 | # CONFIG_RFKILL is not set |
360 | # CONFIG_NET_9P is not set | 369 | # CONFIG_NET_9P is not set |
361 | 370 | ||
@@ -369,20 +378,20 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
369 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 378 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
370 | CONFIG_STANDALONE=y | 379 | CONFIG_STANDALONE=y |
371 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 380 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
372 | CONFIG_FW_LOADER=m | 381 | # CONFIG_FW_LOADER is not set |
373 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
374 | CONFIG_EXTRA_FIRMWARE="" | ||
375 | # CONFIG_SYS_HYPERVISOR is not set | 382 | # CONFIG_SYS_HYPERVISOR is not set |
376 | # CONFIG_CONNECTOR is not set | 383 | # CONFIG_CONNECTOR is not set |
377 | CONFIG_MTD=y | 384 | CONFIG_MTD=y |
378 | # CONFIG_MTD_DEBUG is not set | 385 | CONFIG_MTD_DEBUG=y |
386 | CONFIG_MTD_DEBUG_VERBOSE=3 | ||
379 | # CONFIG_MTD_CONCAT is not set | 387 | # CONFIG_MTD_CONCAT is not set |
380 | CONFIG_MTD_PARTITIONS=y | 388 | CONFIG_MTD_PARTITIONS=y |
389 | # CONFIG_MTD_TESTS is not set | ||
381 | CONFIG_MTD_REDBOOT_PARTS=y | 390 | CONFIG_MTD_REDBOOT_PARTS=y |
382 | CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 | 391 | CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 |
383 | # CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set | 392 | # CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set |
384 | CONFIG_MTD_REDBOOT_PARTS_READONLY=y | 393 | # CONFIG_MTD_REDBOOT_PARTS_READONLY is not set |
385 | # CONFIG_MTD_CMDLINE_PARTS is not set | 394 | CONFIG_MTD_CMDLINE_PARTS=y |
386 | # CONFIG_MTD_AFS_PARTS is not set | 395 | # CONFIG_MTD_AFS_PARTS is not set |
387 | # CONFIG_MTD_AR7_PARTS is not set | 396 | # CONFIG_MTD_AR7_PARTS is not set |
388 | 397 | ||
@@ -412,12 +421,12 @@ CONFIG_MTD_CFI_NOSWAP=y | |||
412 | CONFIG_MTD_CFI_GEOMETRY=y | 421 | CONFIG_MTD_CFI_GEOMETRY=y |
413 | # CONFIG_MTD_MAP_BANK_WIDTH_1 is not set | 422 | # CONFIG_MTD_MAP_BANK_WIDTH_1 is not set |
414 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | 423 | CONFIG_MTD_MAP_BANK_WIDTH_2=y |
415 | # CONFIG_MTD_MAP_BANK_WIDTH_4 is not set | 424 | CONFIG_MTD_MAP_BANK_WIDTH_4=y |
416 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | 425 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set |
417 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | 426 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set |
418 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | 427 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set |
419 | CONFIG_MTD_CFI_I1=y | 428 | CONFIG_MTD_CFI_I1=y |
420 | # CONFIG_MTD_CFI_I2 is not set | 429 | CONFIG_MTD_CFI_I2=y |
421 | # CONFIG_MTD_CFI_I4 is not set | 430 | # CONFIG_MTD_CFI_I4 is not set |
422 | # CONFIG_MTD_CFI_I8 is not set | 431 | # CONFIG_MTD_CFI_I8 is not set |
423 | # CONFIG_MTD_OTP is not set | 432 | # CONFIG_MTD_OTP is not set |
@@ -435,15 +444,15 @@ CONFIG_MTD_CFI_UTIL=y | |||
435 | # | 444 | # |
436 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | 445 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set |
437 | CONFIG_MTD_PHYSMAP=y | 446 | CONFIG_MTD_PHYSMAP=y |
438 | CONFIG_MTD_PHYSMAP_START=0x0 | 447 | # CONFIG_MTD_PHYSMAP_COMPAT is not set |
439 | CONFIG_MTD_PHYSMAP_LEN=0x0 | ||
440 | CONFIG_MTD_PHYSMAP_BANKWIDTH=2 | ||
441 | # CONFIG_MTD_ARM_INTEGRATOR is not set | 448 | # CONFIG_MTD_ARM_INTEGRATOR is not set |
442 | # CONFIG_MTD_PLATRAM is not set | 449 | # CONFIG_MTD_PLATRAM is not set |
443 | 450 | ||
444 | # | 451 | # |
445 | # Self-contained MTD device drivers | 452 | # Self-contained MTD device drivers |
446 | # | 453 | # |
454 | # CONFIG_MTD_DATAFLASH is not set | ||
455 | # CONFIG_MTD_M25P80 is not set | ||
447 | # CONFIG_MTD_SLRAM is not set | 456 | # CONFIG_MTD_SLRAM is not set |
448 | # CONFIG_MTD_PHRAM is not set | 457 | # CONFIG_MTD_PHRAM is not set |
449 | # CONFIG_MTD_MTDRAM is not set | 458 | # CONFIG_MTD_MTDRAM is not set |
@@ -455,16 +464,48 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2 | |||
455 | # CONFIG_MTD_DOC2000 is not set | 464 | # CONFIG_MTD_DOC2000 is not set |
456 | # CONFIG_MTD_DOC2001 is not set | 465 | # CONFIG_MTD_DOC2001 is not set |
457 | # CONFIG_MTD_DOC2001PLUS is not set | 466 | # CONFIG_MTD_DOC2001PLUS is not set |
458 | # CONFIG_MTD_NAND is not set | 467 | CONFIG_MTD_NAND=y |
468 | # CONFIG_MTD_NAND_VERIFY_WRITE is not set | ||
469 | # CONFIG_MTD_NAND_ECC_SMC is not set | ||
470 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set | ||
471 | # CONFIG_MTD_NAND_GPIO is not set | ||
472 | CONFIG_MTD_NAND_IDS=y | ||
473 | # CONFIG_MTD_NAND_DISKONCHIP is not set | ||
474 | # CONFIG_MTD_NAND_NANDSIM is not set | ||
475 | # CONFIG_MTD_NAND_PLATFORM is not set | ||
476 | CONFIG_MTD_NAND_MXC=y | ||
459 | # CONFIG_MTD_ONENAND is not set | 477 | # CONFIG_MTD_ONENAND is not set |
460 | 478 | ||
461 | # | 479 | # |
480 | # LPDDR flash memory drivers | ||
481 | # | ||
482 | # CONFIG_MTD_LPDDR is not set | ||
483 | |||
484 | # | ||
462 | # UBI - Unsorted block images | 485 | # UBI - Unsorted block images |
463 | # | 486 | # |
464 | # CONFIG_MTD_UBI is not set | 487 | # CONFIG_MTD_UBI is not set |
465 | # CONFIG_PARPORT is not set | 488 | # CONFIG_PARPORT is not set |
466 | # CONFIG_BLK_DEV is not set | 489 | CONFIG_BLK_DEV=y |
467 | # CONFIG_MISC_DEVICES is not set | 490 | # CONFIG_BLK_DEV_COW_COMMON is not set |
491 | # CONFIG_BLK_DEV_LOOP is not set | ||
492 | # CONFIG_BLK_DEV_NBD is not set | ||
493 | # CONFIG_BLK_DEV_RAM is not set | ||
494 | # CONFIG_CDROM_PKTCDVD is not set | ||
495 | # CONFIG_ATA_OVER_ETH is not set | ||
496 | CONFIG_MISC_DEVICES=y | ||
497 | # CONFIG_ICS932S401 is not set | ||
498 | # CONFIG_ENCLOSURE_SERVICES is not set | ||
499 | # CONFIG_ISL29003 is not set | ||
500 | # CONFIG_C2PORT is not set | ||
501 | |||
502 | # | ||
503 | # EEPROM support | ||
504 | # | ||
505 | # CONFIG_EEPROM_AT24 is not set | ||
506 | # CONFIG_EEPROM_AT25 is not set | ||
507 | # CONFIG_EEPROM_LEGACY is not set | ||
508 | # CONFIG_EEPROM_93CX6 is not set | ||
468 | CONFIG_HAVE_IDE=y | 509 | CONFIG_HAVE_IDE=y |
469 | # CONFIG_IDE is not set | 510 | # CONFIG_IDE is not set |
470 | 511 | ||
@@ -478,6 +519,7 @@ CONFIG_HAVE_IDE=y | |||
478 | # CONFIG_ATA is not set | 519 | # CONFIG_ATA is not set |
479 | # CONFIG_MD is not set | 520 | # CONFIG_MD is not set |
480 | CONFIG_NETDEVICES=y | 521 | CONFIG_NETDEVICES=y |
522 | CONFIG_COMPAT_NET_DEV_OPS=y | ||
481 | # CONFIG_DUMMY is not set | 523 | # CONFIG_DUMMY is not set |
482 | # CONFIG_BONDING is not set | 524 | # CONFIG_BONDING is not set |
483 | # CONFIG_MACVLAN is not set | 525 | # CONFIG_MACVLAN is not set |
@@ -488,13 +530,23 @@ CONFIG_NETDEVICES=y | |||
488 | CONFIG_NET_ETHERNET=y | 530 | CONFIG_NET_ETHERNET=y |
489 | CONFIG_MII=y | 531 | CONFIG_MII=y |
490 | # CONFIG_AX88796 is not set | 532 | # CONFIG_AX88796 is not set |
491 | CONFIG_SMC91X=y | 533 | # CONFIG_SMC91X is not set |
492 | # CONFIG_DM9000 is not set | 534 | # CONFIG_DM9000 is not set |
535 | # CONFIG_ENC28J60 is not set | ||
536 | # CONFIG_ETHOC is not set | ||
537 | # CONFIG_SMC911X is not set | ||
538 | # CONFIG_SMSC911X is not set | ||
539 | # CONFIG_DNET is not set | ||
493 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | 540 | # CONFIG_IBM_NEW_EMAC_ZMII is not set |
494 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | 541 | # CONFIG_IBM_NEW_EMAC_RGMII is not set |
495 | # CONFIG_IBM_NEW_EMAC_TAH is not set | 542 | # CONFIG_IBM_NEW_EMAC_TAH is not set |
496 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | 543 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set |
544 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
545 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
546 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
497 | # CONFIG_B44 is not set | 547 | # CONFIG_B44 is not set |
548 | CONFIG_CS89x0=y | ||
549 | CONFIG_CS89x0_NONISA_IRQ=y | ||
498 | # CONFIG_NETDEV_1000 is not set | 550 | # CONFIG_NETDEV_1000 is not set |
499 | # CONFIG_NETDEV_10000 is not set | 551 | # CONFIG_NETDEV_10000 is not set |
500 | 552 | ||
@@ -503,7 +555,10 @@ CONFIG_SMC91X=y | |||
503 | # | 555 | # |
504 | # CONFIG_WLAN_PRE80211 is not set | 556 | # CONFIG_WLAN_PRE80211 is not set |
505 | # CONFIG_WLAN_80211 is not set | 557 | # CONFIG_WLAN_80211 is not set |
506 | # CONFIG_IWLWIFI_LEDS is not set | 558 | |
559 | # | ||
560 | # Enable WiMAX (Networking options) to see the WiMAX drivers | ||
561 | # | ||
507 | # CONFIG_WAN is not set | 562 | # CONFIG_WAN is not set |
508 | # CONFIG_PPP is not set | 563 | # CONFIG_PPP is not set |
509 | # CONFIG_SLIP is not set | 564 | # CONFIG_SLIP is not set |
@@ -515,7 +570,40 @@ CONFIG_SMC91X=y | |||
515 | # | 570 | # |
516 | # Input device support | 571 | # Input device support |
517 | # | 572 | # |
518 | # CONFIG_INPUT is not set | 573 | CONFIG_INPUT=y |
574 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
575 | # CONFIG_INPUT_POLLDEV is not set | ||
576 | |||
577 | # | ||
578 | # Userland interfaces | ||
579 | # | ||
580 | # CONFIG_INPUT_MOUSEDEV is not set | ||
581 | # CONFIG_INPUT_JOYDEV is not set | ||
582 | CONFIG_INPUT_EVDEV=y | ||
583 | # CONFIG_INPUT_EVBUG is not set | ||
584 | |||
585 | # | ||
586 | # Input Device Drivers | ||
587 | # | ||
588 | # CONFIG_INPUT_KEYBOARD is not set | ||
589 | # CONFIG_INPUT_MOUSE is not set | ||
590 | # CONFIG_INPUT_JOYSTICK is not set | ||
591 | # CONFIG_INPUT_TABLET is not set | ||
592 | CONFIG_INPUT_TOUCHSCREEN=y | ||
593 | # CONFIG_TOUCHSCREEN_ADS7846 is not set | ||
594 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | ||
595 | # CONFIG_TOUCHSCREEN_GUNZE is not set | ||
596 | # CONFIG_TOUCHSCREEN_ELO is not set | ||
597 | # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set | ||
598 | # CONFIG_TOUCHSCREEN_MTOUCH is not set | ||
599 | # CONFIG_TOUCHSCREEN_INEXIO is not set | ||
600 | # CONFIG_TOUCHSCREEN_MK712 is not set | ||
601 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set | ||
602 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | ||
603 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set | ||
604 | # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set | ||
605 | # CONFIG_TOUCHSCREEN_TSC2007 is not set | ||
606 | # CONFIG_INPUT_MISC is not set | ||
519 | 607 | ||
520 | # | 608 | # |
521 | # Hardware I/O ports | 609 | # Hardware I/O ports |
@@ -526,39 +614,109 @@ CONFIG_SMC91X=y | |||
526 | # | 614 | # |
527 | # Character devices | 615 | # Character devices |
528 | # | 616 | # |
529 | # CONFIG_VT is not set | 617 | CONFIG_VT=y |
618 | # CONFIG_CONSOLE_TRANSLATIONS is not set | ||
619 | CONFIG_VT_CONSOLE=y | ||
620 | CONFIG_HW_CONSOLE=y | ||
621 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
530 | CONFIG_DEVKMEM=y | 622 | CONFIG_DEVKMEM=y |
531 | # CONFIG_SERIAL_NONSTANDARD is not set | 623 | # CONFIG_SERIAL_NONSTANDARD is not set |
532 | 624 | ||
533 | # | 625 | # |
534 | # Serial drivers | 626 | # Serial drivers |
535 | # | 627 | # |
536 | # CONFIG_SERIAL_8250 is not set | 628 | CONFIG_SERIAL_8250=y |
629 | CONFIG_SERIAL_8250_CONSOLE=y | ||
630 | CONFIG_SERIAL_8250_NR_UARTS=1 | ||
631 | CONFIG_SERIAL_8250_RUNTIME_UARTS=1 | ||
632 | # CONFIG_SERIAL_8250_EXTENDED is not set | ||
537 | 633 | ||
538 | # | 634 | # |
539 | # Non-8250 serial port support | 635 | # Non-8250 serial port support |
540 | # | 636 | # |
637 | # CONFIG_SERIAL_MAX3100 is not set | ||
541 | CONFIG_SERIAL_IMX=y | 638 | CONFIG_SERIAL_IMX=y |
542 | CONFIG_SERIAL_IMX_CONSOLE=y | 639 | CONFIG_SERIAL_IMX_CONSOLE=y |
543 | CONFIG_SERIAL_CORE=y | 640 | CONFIG_SERIAL_CORE=y |
544 | CONFIG_SERIAL_CORE_CONSOLE=y | 641 | CONFIG_SERIAL_CORE_CONSOLE=y |
545 | CONFIG_UNIX98_PTYS=y | 642 | CONFIG_UNIX98_PTYS=y |
643 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
546 | # CONFIG_LEGACY_PTYS is not set | 644 | # CONFIG_LEGACY_PTYS is not set |
547 | # CONFIG_IPMI_HANDLER is not set | 645 | # CONFIG_IPMI_HANDLER is not set |
548 | # CONFIG_HW_RANDOM is not set | 646 | # CONFIG_HW_RANDOM is not set |
549 | # CONFIG_NVRAM is not set | ||
550 | # CONFIG_R3964 is not set | 647 | # CONFIG_R3964 is not set |
551 | # CONFIG_RAW_DRIVER is not set | 648 | # CONFIG_RAW_DRIVER is not set |
552 | # CONFIG_TCG_TPM is not set | 649 | # CONFIG_TCG_TPM is not set |
553 | # CONFIG_I2C is not set | 650 | CONFIG_I2C=y |
554 | # CONFIG_SPI is not set | 651 | CONFIG_I2C_BOARDINFO=y |
652 | CONFIG_I2C_CHARDEV=y | ||
653 | CONFIG_I2C_HELPER_AUTO=y | ||
654 | |||
655 | # | ||
656 | # I2C Hardware Bus support | ||
657 | # | ||
658 | |||
659 | # | ||
660 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
661 | # | ||
662 | # CONFIG_I2C_GPIO is not set | ||
663 | CONFIG_I2C_IMX=y | ||
664 | # CONFIG_I2C_OCORES is not set | ||
665 | # CONFIG_I2C_SIMTEC is not set | ||
666 | |||
667 | # | ||
668 | # External I2C/SMBus adapter drivers | ||
669 | # | ||
670 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
671 | # CONFIG_I2C_TAOS_EVM is not set | ||
672 | |||
673 | # | ||
674 | # Other I2C/SMBus bus drivers | ||
675 | # | ||
676 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
677 | # CONFIG_I2C_STUB is not set | ||
678 | |||
679 | # | ||
680 | # Miscellaneous I2C Chip support | ||
681 | # | ||
682 | # CONFIG_DS1682 is not set | ||
683 | # CONFIG_SENSORS_PCF8574 is not set | ||
684 | # CONFIG_PCF8575 is not set | ||
685 | # CONFIG_SENSORS_PCA9539 is not set | ||
686 | # CONFIG_SENSORS_MAX6875 is not set | ||
687 | # CONFIG_SENSORS_TSL2550 is not set | ||
688 | # CONFIG_I2C_DEBUG_CORE is not set | ||
689 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
690 | # CONFIG_I2C_DEBUG_BUS is not set | ||
691 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
692 | CONFIG_SPI=y | ||
693 | CONFIG_SPI_MASTER=y | ||
694 | |||
695 | # | ||
696 | # SPI Master Controller Drivers | ||
697 | # | ||
698 | # CONFIG_SPI_BITBANG is not set | ||
699 | # CONFIG_SPI_GPIO is not set | ||
700 | |||
701 | # | ||
702 | # SPI Protocol Masters | ||
703 | # | ||
704 | # CONFIG_SPI_SPIDEV is not set | ||
705 | # CONFIG_SPI_TLE62X0 is not set | ||
555 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | 706 | CONFIG_ARCH_REQUIRE_GPIOLIB=y |
556 | CONFIG_GPIOLIB=y | 707 | CONFIG_GPIOLIB=y |
557 | # CONFIG_GPIO_SYSFS is not set | 708 | # CONFIG_GPIO_SYSFS is not set |
558 | 709 | ||
559 | # | 710 | # |
711 | # Memory mapped GPIO expanders: | ||
712 | # | ||
713 | |||
714 | # | ||
560 | # I2C GPIO expanders: | 715 | # I2C GPIO expanders: |
561 | # | 716 | # |
717 | # CONFIG_GPIO_MAX732X is not set | ||
718 | # CONFIG_GPIO_PCA953X is not set | ||
719 | # CONFIG_GPIO_PCF857X is not set | ||
562 | 720 | ||
563 | # | 721 | # |
564 | # PCI GPIO expanders: | 722 | # PCI GPIO expanders: |
@@ -567,15 +725,19 @@ CONFIG_GPIOLIB=y | |||
567 | # | 725 | # |
568 | # SPI GPIO expanders: | 726 | # SPI GPIO expanders: |
569 | # | 727 | # |
728 | # CONFIG_GPIO_MAX7301 is not set | ||
729 | # CONFIG_GPIO_MCP23S08 is not set | ||
570 | # CONFIG_W1 is not set | 730 | # CONFIG_W1 is not set |
571 | # CONFIG_POWER_SUPPLY is not set | 731 | # CONFIG_POWER_SUPPLY is not set |
572 | # CONFIG_HWMON is not set | 732 | # CONFIG_HWMON is not set |
733 | # CONFIG_THERMAL is not set | ||
734 | # CONFIG_THERMAL_HWMON is not set | ||
573 | # CONFIG_WATCHDOG is not set | 735 | # CONFIG_WATCHDOG is not set |
736 | CONFIG_SSB_POSSIBLE=y | ||
574 | 737 | ||
575 | # | 738 | # |
576 | # Sonics Silicon Backplane | 739 | # Sonics Silicon Backplane |
577 | # | 740 | # |
578 | CONFIG_SSB_POSSIBLE=y | ||
579 | # CONFIG_SSB is not set | 741 | # CONFIG_SSB is not set |
580 | 742 | ||
581 | # | 743 | # |
@@ -583,12 +745,17 @@ CONFIG_SSB_POSSIBLE=y | |||
583 | # | 745 | # |
584 | # CONFIG_MFD_CORE is not set | 746 | # CONFIG_MFD_CORE is not set |
585 | # CONFIG_MFD_SM501 is not set | 747 | # CONFIG_MFD_SM501 is not set |
748 | # CONFIG_MFD_ASIC3 is not set | ||
586 | # CONFIG_HTC_EGPIO is not set | 749 | # CONFIG_HTC_EGPIO is not set |
587 | # CONFIG_HTC_PASIC3 is not set | 750 | # CONFIG_HTC_PASIC3 is not set |
751 | # CONFIG_TPS65010 is not set | ||
752 | # CONFIG_TWL4030_CORE is not set | ||
588 | # CONFIG_MFD_TMIO is not set | 753 | # CONFIG_MFD_TMIO is not set |
589 | # CONFIG_MFD_T7L66XB is not set | ||
590 | # CONFIG_MFD_TC6387XB is not set | ||
591 | # CONFIG_MFD_TC6393XB is not set | 754 | # CONFIG_MFD_TC6393XB is not set |
755 | # CONFIG_PMIC_DA903X is not set | ||
756 | # CONFIG_MFD_WM8400 is not set | ||
757 | # CONFIG_MFD_WM8350_I2C is not set | ||
758 | # CONFIG_MFD_PCF50633 is not set | ||
592 | 759 | ||
593 | # | 760 | # |
594 | # Multimedia devices | 761 | # Multimedia devices |
@@ -611,50 +778,122 @@ CONFIG_SSB_POSSIBLE=y | |||
611 | # | 778 | # |
612 | # CONFIG_VGASTATE is not set | 779 | # CONFIG_VGASTATE is not set |
613 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | 780 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set |
614 | # CONFIG_FB is not set | 781 | CONFIG_FB=y |
782 | # CONFIG_FIRMWARE_EDID is not set | ||
783 | # CONFIG_FB_DDC is not set | ||
784 | # CONFIG_FB_BOOT_VESA_SUPPORT is not set | ||
785 | CONFIG_FB_CFB_FILLRECT=y | ||
786 | CONFIG_FB_CFB_COPYAREA=y | ||
787 | CONFIG_FB_CFB_IMAGEBLIT=y | ||
788 | # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | ||
789 | # CONFIG_FB_SYS_FILLRECT is not set | ||
790 | # CONFIG_FB_SYS_COPYAREA is not set | ||
791 | # CONFIG_FB_SYS_IMAGEBLIT is not set | ||
792 | # CONFIG_FB_FOREIGN_ENDIAN is not set | ||
793 | # CONFIG_FB_SYS_FOPS is not set | ||
794 | # CONFIG_FB_SVGALIB is not set | ||
795 | # CONFIG_FB_MACMODES is not set | ||
796 | # CONFIG_FB_BACKLIGHT is not set | ||
797 | # CONFIG_FB_MODE_HELPERS is not set | ||
798 | # CONFIG_FB_TILEBLITTING is not set | ||
799 | |||
800 | # | ||
801 | # Frame buffer hardware drivers | ||
802 | # | ||
803 | CONFIG_FB_IMX=y | ||
804 | # CONFIG_FB_S1D13XXX is not set | ||
805 | # CONFIG_FB_VIRTUAL is not set | ||
806 | # CONFIG_FB_METRONOME is not set | ||
807 | # CONFIG_FB_MB862XX is not set | ||
808 | # CONFIG_FB_BROADSHEET is not set | ||
615 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | 809 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set |
616 | 810 | ||
617 | # | 811 | # |
618 | # Display device support | 812 | # Display device support |
619 | # | 813 | # |
620 | # CONFIG_DISPLAY_SUPPORT is not set | 814 | # CONFIG_DISPLAY_SUPPORT is not set |
815 | |||
816 | # | ||
817 | # Console display driver support | ||
818 | # | ||
819 | # CONFIG_VGA_CONSOLE is not set | ||
820 | CONFIG_DUMMY_CONSOLE=y | ||
821 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
822 | # CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set | ||
823 | # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | ||
824 | CONFIG_FONTS=y | ||
825 | CONFIG_FONT_8x8=y | ||
826 | # CONFIG_FONT_8x16 is not set | ||
827 | # CONFIG_FONT_6x11 is not set | ||
828 | # CONFIG_FONT_7x14 is not set | ||
829 | # CONFIG_FONT_PEARL_8x8 is not set | ||
830 | # CONFIG_FONT_ACORN_8x8 is not set | ||
831 | # CONFIG_FONT_MINI_4x6 is not set | ||
832 | # CONFIG_FONT_SUN8x16 is not set | ||
833 | # CONFIG_FONT_SUN12x22 is not set | ||
834 | # CONFIG_FONT_10x18 is not set | ||
835 | CONFIG_LOGO=y | ||
836 | CONFIG_LOGO_LINUX_MONO=y | ||
837 | CONFIG_LOGO_LINUX_VGA16=y | ||
838 | CONFIG_LOGO_LINUX_CLUT224=y | ||
621 | # CONFIG_SOUND is not set | 839 | # CONFIG_SOUND is not set |
840 | # CONFIG_HID_SUPPORT is not set | ||
622 | # CONFIG_USB_SUPPORT is not set | 841 | # CONFIG_USB_SUPPORT is not set |
623 | # CONFIG_MMC is not set | 842 | CONFIG_MMC=y |
843 | # CONFIG_MMC_DEBUG is not set | ||
844 | # CONFIG_MMC_UNSAFE_RESUME is not set | ||
845 | |||
846 | # | ||
847 | # MMC/SD/SDIO Card Drivers | ||
848 | # | ||
849 | CONFIG_MMC_BLOCK=y | ||
850 | CONFIG_MMC_BLOCK_BOUNCE=y | ||
851 | # CONFIG_SDIO_UART is not set | ||
852 | # CONFIG_MMC_TEST is not set | ||
853 | |||
854 | # | ||
855 | # MMC/SD/SDIO Host Controller Drivers | ||
856 | # | ||
857 | # CONFIG_MMC_SDHCI is not set | ||
858 | CONFIG_MMC_MXC=y | ||
859 | # CONFIG_MMC_SPI is not set | ||
860 | # CONFIG_MEMSTICK is not set | ||
861 | # CONFIG_ACCESSIBILITY is not set | ||
624 | # CONFIG_NEW_LEDS is not set | 862 | # CONFIG_NEW_LEDS is not set |
625 | CONFIG_RTC_LIB=y | 863 | CONFIG_RTC_LIB=y |
626 | # CONFIG_RTC_CLASS is not set | 864 | # CONFIG_RTC_CLASS is not set |
627 | # CONFIG_DMADEVICES is not set | 865 | # CONFIG_DMADEVICES is not set |
628 | 866 | # CONFIG_AUXDISPLAY is not set | |
629 | # | ||
630 | # Voltage and Current regulators | ||
631 | # | ||
632 | # CONFIG_REGULATOR is not set | 867 | # CONFIG_REGULATOR is not set |
633 | # CONFIG_REGULATOR_FIXED_VOLTAGE is not set | ||
634 | # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set | ||
635 | # CONFIG_REGULATOR_BQ24022 is not set | ||
636 | # CONFIG_UIO is not set | 868 | # CONFIG_UIO is not set |
869 | # CONFIG_STAGING is not set | ||
637 | 870 | ||
638 | # | 871 | # |
639 | # File systems | 872 | # File systems |
640 | # | 873 | # |
641 | # CONFIG_EXT2_FS is not set | 874 | # CONFIG_EXT2_FS is not set |
642 | # CONFIG_EXT3_FS is not set | 875 | # CONFIG_EXT3_FS is not set |
643 | # CONFIG_EXT4DEV_FS is not set | 876 | # CONFIG_EXT4_FS is not set |
644 | # CONFIG_REISERFS_FS is not set | 877 | # CONFIG_REISERFS_FS is not set |
645 | # CONFIG_JFS_FS is not set | 878 | # CONFIG_JFS_FS is not set |
646 | # CONFIG_FS_POSIX_ACL is not set | 879 | # CONFIG_FS_POSIX_ACL is not set |
880 | CONFIG_FILE_LOCKING=y | ||
647 | # CONFIG_XFS_FS is not set | 881 | # CONFIG_XFS_FS is not set |
648 | # CONFIG_OCFS2_FS is not set | 882 | # CONFIG_OCFS2_FS is not set |
883 | # CONFIG_BTRFS_FS is not set | ||
649 | # CONFIG_DNOTIFY is not set | 884 | # CONFIG_DNOTIFY is not set |
650 | CONFIG_INOTIFY=y | 885 | # CONFIG_INOTIFY is not set |
651 | CONFIG_INOTIFY_USER=y | ||
652 | # CONFIG_QUOTA is not set | 886 | # CONFIG_QUOTA is not set |
653 | # CONFIG_AUTOFS_FS is not set | 887 | # CONFIG_AUTOFS_FS is not set |
654 | # CONFIG_AUTOFS4_FS is not set | 888 | # CONFIG_AUTOFS4_FS is not set |
655 | # CONFIG_FUSE_FS is not set | 889 | # CONFIG_FUSE_FS is not set |
656 | 890 | ||
657 | # | 891 | # |
892 | # Caches | ||
893 | # | ||
894 | # CONFIG_FSCACHE is not set | ||
895 | |||
896 | # | ||
658 | # CD-ROM/DVD Filesystems | 897 | # CD-ROM/DVD Filesystems |
659 | # | 898 | # |
660 | # CONFIG_ISO9660_FS is not set | 899 | # CONFIG_ISO9660_FS is not set |
@@ -663,8 +902,10 @@ CONFIG_INOTIFY_USER=y | |||
663 | # | 902 | # |
664 | # DOS/FAT/NT Filesystems | 903 | # DOS/FAT/NT Filesystems |
665 | # | 904 | # |
666 | # CONFIG_MSDOS_FS is not set | 905 | CONFIG_FAT_FS=y |
906 | CONFIG_MSDOS_FS=y | ||
667 | # CONFIG_VFAT_FS is not set | 907 | # CONFIG_VFAT_FS is not set |
908 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
668 | # CONFIG_NTFS_FS is not set | 909 | # CONFIG_NTFS_FS is not set |
669 | 910 | ||
670 | # | 911 | # |
@@ -672,15 +913,13 @@ CONFIG_INOTIFY_USER=y | |||
672 | # | 913 | # |
673 | CONFIG_PROC_FS=y | 914 | CONFIG_PROC_FS=y |
674 | CONFIG_PROC_SYSCTL=y | 915 | CONFIG_PROC_SYSCTL=y |
916 | CONFIG_PROC_PAGE_MONITOR=y | ||
675 | CONFIG_SYSFS=y | 917 | CONFIG_SYSFS=y |
676 | CONFIG_TMPFS=y | 918 | CONFIG_TMPFS=y |
677 | # CONFIG_TMPFS_POSIX_ACL is not set | 919 | # CONFIG_TMPFS_POSIX_ACL is not set |
678 | # CONFIG_HUGETLB_PAGE is not set | 920 | # CONFIG_HUGETLB_PAGE is not set |
679 | # CONFIG_CONFIGFS_FS is not set | 921 | # CONFIG_CONFIGFS_FS is not set |
680 | 922 | CONFIG_MISC_FILESYSTEMS=y | |
681 | # | ||
682 | # Miscellaneous filesystems | ||
683 | # | ||
684 | # CONFIG_ADFS_FS is not set | 923 | # CONFIG_ADFS_FS is not set |
685 | # CONFIG_AFFS_FS is not set | 924 | # CONFIG_AFFS_FS is not set |
686 | # CONFIG_HFS_FS is not set | 925 | # CONFIG_HFS_FS is not set |
@@ -700,6 +939,7 @@ CONFIG_JFFS2_ZLIB=y | |||
700 | CONFIG_JFFS2_RTIME=y | 939 | CONFIG_JFFS2_RTIME=y |
701 | # CONFIG_JFFS2_RUBIN is not set | 940 | # CONFIG_JFFS2_RUBIN is not set |
702 | # CONFIG_CRAMFS is not set | 941 | # CONFIG_CRAMFS is not set |
942 | # CONFIG_SQUASHFS is not set | ||
703 | # CONFIG_VXFS_FS is not set | 943 | # CONFIG_VXFS_FS is not set |
704 | # CONFIG_MINIX_FS is not set | 944 | # CONFIG_MINIX_FS is not set |
705 | # CONFIG_OMFS_FS is not set | 945 | # CONFIG_OMFS_FS is not set |
@@ -708,13 +948,16 @@ CONFIG_JFFS2_RTIME=y | |||
708 | # CONFIG_ROMFS_FS is not set | 948 | # CONFIG_ROMFS_FS is not set |
709 | # CONFIG_SYSV_FS is not set | 949 | # CONFIG_SYSV_FS is not set |
710 | # CONFIG_UFS_FS is not set | 950 | # CONFIG_UFS_FS is not set |
951 | # CONFIG_NILFS2_FS is not set | ||
711 | CONFIG_NETWORK_FILESYSTEMS=y | 952 | CONFIG_NETWORK_FILESYSTEMS=y |
712 | CONFIG_NFS_FS=y | 953 | CONFIG_NFS_FS=y |
713 | # CONFIG_NFS_V3 is not set | 954 | CONFIG_NFS_V3=y |
955 | # CONFIG_NFS_V3_ACL is not set | ||
714 | # CONFIG_NFS_V4 is not set | 956 | # CONFIG_NFS_V4 is not set |
715 | CONFIG_ROOT_NFS=y | 957 | CONFIG_ROOT_NFS=y |
716 | # CONFIG_NFSD is not set | 958 | # CONFIG_NFSD is not set |
717 | CONFIG_LOCKD=y | 959 | CONFIG_LOCKD=y |
960 | CONFIG_LOCKD_V4=y | ||
718 | CONFIG_NFS_COMMON=y | 961 | CONFIG_NFS_COMMON=y |
719 | CONFIG_SUNRPC=y | 962 | CONFIG_SUNRPC=y |
720 | # CONFIG_RPCSEC_GSS_KRB5 is not set | 963 | # CONFIG_RPCSEC_GSS_KRB5 is not set |
@@ -730,15 +973,54 @@ CONFIG_SUNRPC=y | |||
730 | # | 973 | # |
731 | # CONFIG_PARTITION_ADVANCED is not set | 974 | # CONFIG_PARTITION_ADVANCED is not set |
732 | CONFIG_MSDOS_PARTITION=y | 975 | CONFIG_MSDOS_PARTITION=y |
733 | # CONFIG_NLS is not set | 976 | CONFIG_NLS=y |
977 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
978 | # CONFIG_NLS_CODEPAGE_437 is not set | ||
979 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
980 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
981 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
982 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
983 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
984 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
985 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
986 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
987 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
988 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
989 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
990 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
991 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
992 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
993 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
994 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
995 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
996 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
997 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
998 | # CONFIG_NLS_ISO8859_8 is not set | ||
999 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
1000 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
1001 | # CONFIG_NLS_ASCII is not set | ||
1002 | # CONFIG_NLS_ISO8859_1 is not set | ||
1003 | # CONFIG_NLS_ISO8859_2 is not set | ||
1004 | # CONFIG_NLS_ISO8859_3 is not set | ||
1005 | # CONFIG_NLS_ISO8859_4 is not set | ||
1006 | # CONFIG_NLS_ISO8859_5 is not set | ||
1007 | # CONFIG_NLS_ISO8859_6 is not set | ||
1008 | # CONFIG_NLS_ISO8859_7 is not set | ||
1009 | # CONFIG_NLS_ISO8859_9 is not set | ||
1010 | # CONFIG_NLS_ISO8859_13 is not set | ||
1011 | # CONFIG_NLS_ISO8859_14 is not set | ||
1012 | # CONFIG_NLS_ISO8859_15 is not set | ||
1013 | # CONFIG_NLS_KOI8_R is not set | ||
1014 | # CONFIG_NLS_KOI8_U is not set | ||
1015 | # CONFIG_NLS_UTF8 is not set | ||
734 | # CONFIG_DLM is not set | 1016 | # CONFIG_DLM is not set |
735 | 1017 | ||
736 | # | 1018 | # |
737 | # Kernel hacking | 1019 | # Kernel hacking |
738 | # | 1020 | # |
739 | # CONFIG_PRINTK_TIME is not set | 1021 | # CONFIG_PRINTK_TIME is not set |
740 | # CONFIG_ENABLE_WARN_DEPRECATED is not set | 1022 | CONFIG_ENABLE_WARN_DEPRECATED=y |
741 | # CONFIG_ENABLE_MUST_CHECK is not set | 1023 | CONFIG_ENABLE_MUST_CHECK=y |
742 | CONFIG_FRAME_WARN=1024 | 1024 | CONFIG_FRAME_WARN=1024 |
743 | # CONFIG_MAGIC_SYSRQ is not set | 1025 | # CONFIG_MAGIC_SYSRQ is not set |
744 | # CONFIG_UNUSED_SYMBOLS is not set | 1026 | # CONFIG_UNUSED_SYMBOLS is not set |
@@ -747,18 +1029,30 @@ CONFIG_FRAME_WARN=1024 | |||
747 | # CONFIG_DEBUG_KERNEL is not set | 1029 | # CONFIG_DEBUG_KERNEL is not set |
748 | # CONFIG_DEBUG_BUGVERBOSE is not set | 1030 | # CONFIG_DEBUG_BUGVERBOSE is not set |
749 | # CONFIG_DEBUG_MEMORY_INIT is not set | 1031 | # CONFIG_DEBUG_MEMORY_INIT is not set |
750 | CONFIG_FRAME_POINTER=y | 1032 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set |
751 | # CONFIG_LATENCYTOP is not set | 1033 | # CONFIG_LATENCYTOP is not set |
752 | CONFIG_SYSCTL_SYSCALL_CHECK=y | 1034 | CONFIG_SYSCTL_SYSCALL_CHECK=y |
753 | CONFIG_HAVE_FTRACE=y | 1035 | CONFIG_HAVE_FUNCTION_TRACER=y |
754 | CONFIG_HAVE_DYNAMIC_FTRACE=y | 1036 | CONFIG_TRACING_SUPPORT=y |
755 | # CONFIG_FTRACE is not set | 1037 | |
1038 | # | ||
1039 | # Tracers | ||
1040 | # | ||
1041 | # CONFIG_FUNCTION_TRACER is not set | ||
756 | # CONFIG_IRQSOFF_TRACER is not set | 1042 | # CONFIG_IRQSOFF_TRACER is not set |
757 | # CONFIG_PREEMPT_TRACER is not set | 1043 | # CONFIG_PREEMPT_TRACER is not set |
758 | # CONFIG_SCHED_TRACER is not set | 1044 | # CONFIG_SCHED_TRACER is not set |
759 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | 1045 | # CONFIG_CONTEXT_SWITCH_TRACER is not set |
1046 | # CONFIG_EVENT_TRACER is not set | ||
1047 | # CONFIG_BOOT_TRACER is not set | ||
1048 | # CONFIG_TRACE_BRANCH_PROFILING is not set | ||
1049 | # CONFIG_STACK_TRACER is not set | ||
1050 | # CONFIG_KMEMTRACE is not set | ||
1051 | # CONFIG_WORKQUEUE_TRACER is not set | ||
1052 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
760 | # CONFIG_SAMPLES is not set | 1053 | # CONFIG_SAMPLES is not set |
761 | CONFIG_HAVE_ARCH_KGDB=y | 1054 | CONFIG_HAVE_ARCH_KGDB=y |
1055 | CONFIG_ARM_UNWIND=y | ||
762 | # CONFIG_DEBUG_USER is not set | 1056 | # CONFIG_DEBUG_USER is not set |
763 | 1057 | ||
764 | # | 1058 | # |
@@ -766,15 +1060,101 @@ CONFIG_HAVE_ARCH_KGDB=y | |||
766 | # | 1060 | # |
767 | # CONFIG_KEYS is not set | 1061 | # CONFIG_KEYS is not set |
768 | # CONFIG_SECURITY is not set | 1062 | # CONFIG_SECURITY is not set |
1063 | # CONFIG_SECURITYFS is not set | ||
769 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | 1064 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set |
770 | # CONFIG_CRYPTO is not set | 1065 | CONFIG_CRYPTO=y |
1066 | |||
1067 | # | ||
1068 | # Crypto core or helper | ||
1069 | # | ||
1070 | # CONFIG_CRYPTO_FIPS is not set | ||
1071 | # CONFIG_CRYPTO_MANAGER is not set | ||
1072 | # CONFIG_CRYPTO_MANAGER2 is not set | ||
1073 | # CONFIG_CRYPTO_GF128MUL is not set | ||
1074 | # CONFIG_CRYPTO_NULL is not set | ||
1075 | # CONFIG_CRYPTO_CRYPTD is not set | ||
1076 | # CONFIG_CRYPTO_AUTHENC is not set | ||
1077 | # CONFIG_CRYPTO_TEST is not set | ||
1078 | |||
1079 | # | ||
1080 | # Authenticated Encryption with Associated Data | ||
1081 | # | ||
1082 | # CONFIG_CRYPTO_CCM is not set | ||
1083 | # CONFIG_CRYPTO_GCM is not set | ||
1084 | # CONFIG_CRYPTO_SEQIV is not set | ||
1085 | |||
1086 | # | ||
1087 | # Block modes | ||
1088 | # | ||
1089 | # CONFIG_CRYPTO_CBC is not set | ||
1090 | # CONFIG_CRYPTO_CTR is not set | ||
1091 | # CONFIG_CRYPTO_CTS is not set | ||
1092 | # CONFIG_CRYPTO_ECB is not set | ||
1093 | # CONFIG_CRYPTO_LRW is not set | ||
1094 | # CONFIG_CRYPTO_PCBC is not set | ||
1095 | # CONFIG_CRYPTO_XTS is not set | ||
1096 | |||
1097 | # | ||
1098 | # Hash modes | ||
1099 | # | ||
1100 | # CONFIG_CRYPTO_HMAC is not set | ||
1101 | # CONFIG_CRYPTO_XCBC is not set | ||
1102 | |||
1103 | # | ||
1104 | # Digest | ||
1105 | # | ||
1106 | # CONFIG_CRYPTO_CRC32C is not set | ||
1107 | # CONFIG_CRYPTO_MD4 is not set | ||
1108 | # CONFIG_CRYPTO_MD5 is not set | ||
1109 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
1110 | # CONFIG_CRYPTO_RMD128 is not set | ||
1111 | # CONFIG_CRYPTO_RMD160 is not set | ||
1112 | # CONFIG_CRYPTO_RMD256 is not set | ||
1113 | # CONFIG_CRYPTO_RMD320 is not set | ||
1114 | # CONFIG_CRYPTO_SHA1 is not set | ||
1115 | # CONFIG_CRYPTO_SHA256 is not set | ||
1116 | # CONFIG_CRYPTO_SHA512 is not set | ||
1117 | # CONFIG_CRYPTO_TGR192 is not set | ||
1118 | # CONFIG_CRYPTO_WP512 is not set | ||
1119 | |||
1120 | # | ||
1121 | # Ciphers | ||
1122 | # | ||
1123 | # CONFIG_CRYPTO_AES is not set | ||
1124 | # CONFIG_CRYPTO_ANUBIS is not set | ||
1125 | # CONFIG_CRYPTO_ARC4 is not set | ||
1126 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
1127 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
1128 | # CONFIG_CRYPTO_CAST5 is not set | ||
1129 | # CONFIG_CRYPTO_CAST6 is not set | ||
1130 | # CONFIG_CRYPTO_DES is not set | ||
1131 | # CONFIG_CRYPTO_FCRYPT is not set | ||
1132 | # CONFIG_CRYPTO_KHAZAD is not set | ||
1133 | # CONFIG_CRYPTO_SALSA20 is not set | ||
1134 | # CONFIG_CRYPTO_SEED is not set | ||
1135 | # CONFIG_CRYPTO_SERPENT is not set | ||
1136 | # CONFIG_CRYPTO_TEA is not set | ||
1137 | # CONFIG_CRYPTO_TWOFISH is not set | ||
1138 | |||
1139 | # | ||
1140 | # Compression | ||
1141 | # | ||
1142 | # CONFIG_CRYPTO_DEFLATE is not set | ||
1143 | # CONFIG_CRYPTO_ZLIB is not set | ||
1144 | # CONFIG_CRYPTO_LZO is not set | ||
1145 | |||
1146 | # | ||
1147 | # Random Number Generation | ||
1148 | # | ||
1149 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
1150 | CONFIG_CRYPTO_HW=y | ||
1151 | # CONFIG_BINARY_PRINTF is not set | ||
771 | 1152 | ||
772 | # | 1153 | # |
773 | # Library routines | 1154 | # Library routines |
774 | # | 1155 | # |
775 | CONFIG_BITREVERSE=y | 1156 | CONFIG_BITREVERSE=y |
776 | # CONFIG_GENERIC_FIND_FIRST_BIT is not set | 1157 | CONFIG_GENERIC_FIND_LAST_BIT=y |
777 | # CONFIG_GENERIC_FIND_NEXT_BIT is not set | ||
778 | # CONFIG_CRC_CCITT is not set | 1158 | # CONFIG_CRC_CCITT is not set |
779 | # CONFIG_CRC16 is not set | 1159 | # CONFIG_CRC16 is not set |
780 | # CONFIG_CRC_T10DIF is not set | 1160 | # CONFIG_CRC_T10DIF is not set |
@@ -784,7 +1164,7 @@ CONFIG_CRC32=y | |||
784 | # CONFIG_LIBCRC32C is not set | 1164 | # CONFIG_LIBCRC32C is not set |
785 | CONFIG_ZLIB_INFLATE=y | 1165 | CONFIG_ZLIB_INFLATE=y |
786 | CONFIG_ZLIB_DEFLATE=y | 1166 | CONFIG_ZLIB_DEFLATE=y |
787 | CONFIG_PLIST=y | ||
788 | CONFIG_HAS_IOMEM=y | 1167 | CONFIG_HAS_IOMEM=y |
789 | CONFIG_HAS_IOPORT=y | 1168 | CONFIG_HAS_IOPORT=y |
790 | CONFIG_HAS_DMA=y | 1169 | CONFIG_HAS_DMA=y |
1170 | CONFIG_NLATTR=y | ||
diff --git a/arch/arm/configs/mx3_defconfig b/arch/arm/configs/mx3_defconfig index 72a8201a5370..20ada526f6de 100644 --- a/arch/arm/configs/mx3_defconfig +++ b/arch/arm/configs/mx3_defconfig | |||
@@ -197,7 +197,7 @@ CONFIG_MXC_PWM=y | |||
197 | # | 197 | # |
198 | CONFIG_CPU_32=y | 198 | CONFIG_CPU_32=y |
199 | CONFIG_CPU_V6=y | 199 | CONFIG_CPU_V6=y |
200 | CONFIG_CPU_32v6K=y | 200 | # CONFIG_CPU_32v6K is not set |
201 | CONFIG_CPU_32v6=y | 201 | CONFIG_CPU_32v6=y |
202 | CONFIG_CPU_ABRT_EV6=y | 202 | CONFIG_CPU_ABRT_EV6=y |
203 | CONFIG_CPU_PABRT_NOIFAR=y | 203 | CONFIG_CPU_PABRT_NOIFAR=y |
diff --git a/arch/arm/configs/viper_defconfig b/arch/arm/configs/viper_defconfig index 30f463d2fa8a..6ab5dd5868de 100644 --- a/arch/arm/configs/viper_defconfig +++ b/arch/arm/configs/viper_defconfig | |||
@@ -298,7 +298,6 @@ CONFIG_CPU_FREQ_GOV_POWERSAVE=m | |||
298 | CONFIG_CPU_FREQ_GOV_USERSPACE=m | 298 | CONFIG_CPU_FREQ_GOV_USERSPACE=m |
299 | CONFIG_CPU_FREQ_GOV_ONDEMAND=m | 299 | CONFIG_CPU_FREQ_GOV_ONDEMAND=m |
300 | CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m | 300 | CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m |
301 | CONFIG_CPU_FREQ_PXA=y | ||
302 | 301 | ||
303 | # | 302 | # |
304 | # Floating point emulation | 303 | # Floating point emulation |
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig index bac988e7a4c3..a9c78bc72b84 100644 --- a/arch/arm/mach-davinci/Kconfig +++ b/arch/arm/mach-davinci/Kconfig | |||
@@ -4,19 +4,56 @@ menu "TI DaVinci Implementations" | |||
4 | 4 | ||
5 | comment "DaVinci Core Type" | 5 | comment "DaVinci Core Type" |
6 | 6 | ||
7 | config ARCH_DAVINCI644x | 7 | config ARCH_DAVINCI_DM644x |
8 | default y | ||
9 | bool "DaVinci 644x based system" | 8 | bool "DaVinci 644x based system" |
10 | 9 | ||
11 | comment "DaVinci Board Type" | 10 | comment "DaVinci Board Type" |
12 | 11 | ||
13 | config MACH_DAVINCI_EVM | 12 | config MACH_DAVINCI_EVM |
14 | bool "TI DaVinci EVM" | 13 | bool "TI DM644x EVM" |
15 | default y | 14 | default y |
16 | depends on ARCH_DAVINCI644x | 15 | depends on ARCH_DAVINCI_DM644x |
17 | help | 16 | help |
18 | Configure this option to specify the whether the board used | 17 | Configure this option to specify the whether the board used |
19 | for development is a DaVinci EVM | 18 | for development is a DM644x EVM |
19 | |||
20 | |||
21 | config DAVINCI_MUX | ||
22 | bool "DAVINCI multiplexing support" | ||
23 | depends on ARCH_DAVINCI | ||
24 | default y | ||
25 | help | ||
26 | Pin multiplexing support for DAVINCI boards. If your bootloader | ||
27 | sets the multiplexing correctly, say N. Otherwise, or if unsure, | ||
28 | say Y. | ||
29 | |||
30 | config DAVINCI_MUX_DEBUG | ||
31 | bool "Multiplexing debug output" | ||
32 | depends on DAVINCI_MUX | ||
33 | help | ||
34 | Makes the multiplexing functions print out a lot of debug info. | ||
35 | This is useful if you want to find out the correct values of the | ||
36 | multiplexing registers. | ||
37 | |||
38 | config DAVINCI_MUX_WARNINGS | ||
39 | bool "Warn about pins the bootloader didn't set up" | ||
40 | depends on DAVINCI_MUX | ||
41 | help | ||
42 | Choose Y here to warn whenever driver initialization logic needs | ||
43 | to change the pin multiplexing setup. When there are no warnings | ||
44 | printed, it's safe to deselect DAVINCI_MUX for your product. | ||
45 | |||
46 | config DAVINCI_RESET_CLOCKS | ||
47 | bool "Reset unused clocks during boot" | ||
48 | depends on ARCH_DAVINCI | ||
49 | help | ||
50 | Say Y if you want to reset unused clocks during boot. | ||
51 | This option saves power, but assumes all drivers are | ||
52 | using the clock framework. Broken drivers that do not | ||
53 | yet use clock framework may not work with this option. | ||
54 | If you are booting from another operating system, you | ||
55 | probably do not want this option enabled until your | ||
56 | device drivers work properly. | ||
20 | 57 | ||
21 | endmenu | 58 | endmenu |
22 | 59 | ||
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile index 4dc458597f40..1674661942f3 100644 --- a/arch/arm/mach-davinci/Makefile +++ b/arch/arm/mach-davinci/Makefile | |||
@@ -5,7 +5,12 @@ | |||
5 | 5 | ||
6 | # Common objects | 6 | # Common objects |
7 | obj-y := time.o irq.o clock.o serial.o io.o id.o psc.o \ | 7 | obj-y := time.o irq.o clock.o serial.o io.o id.o psc.o \ |
8 | gpio.o mux.o devices.o usb.o | 8 | gpio.o devices.o dma.o usb.o |
9 | |||
10 | obj-$(CONFIG_DAVINCI_MUX) += mux.o | ||
11 | |||
12 | # Chip specific | ||
13 | obj-$(CONFIG_ARCH_DAVINCI_DM644x) += dm644x.o | ||
9 | 14 | ||
10 | # Board specific | 15 | # Board specific |
11 | obj-$(CONFIG_MACH_DAVINCI_EVM) += board-evm.o | 16 | obj-$(CONFIG_MACH_DAVINCI_EVM) += board-dm644x-evm.o |
diff --git a/arch/arm/mach-davinci/board-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c index 0b97a528902b..c039674fe99e 100644 --- a/arch/arm/mach-davinci/board-evm.c +++ b/arch/arm/mach-davinci/board-dm644x-evm.c | |||
@@ -15,15 +15,20 @@ | |||
15 | #include <linux/platform_device.h> | 15 | #include <linux/platform_device.h> |
16 | #include <linux/gpio.h> | 16 | #include <linux/gpio.h> |
17 | #include <linux/leds.h> | 17 | #include <linux/leds.h> |
18 | #include <linux/memory.h> | ||
19 | #include <linux/etherdevice.h> | ||
18 | 20 | ||
19 | #include <linux/i2c.h> | 21 | #include <linux/i2c.h> |
20 | #include <linux/i2c/pcf857x.h> | 22 | #include <linux/i2c/pcf857x.h> |
21 | #include <linux/i2c/at24.h> | 23 | #include <linux/i2c/at24.h> |
22 | 24 | ||
23 | #include <linux/mtd/mtd.h> | 25 | #include <linux/mtd/mtd.h> |
26 | #include <linux/mtd/nand.h> | ||
24 | #include <linux/mtd/partitions.h> | 27 | #include <linux/mtd/partitions.h> |
25 | #include <linux/mtd/physmap.h> | 28 | #include <linux/mtd/physmap.h> |
26 | #include <linux/io.h> | 29 | #include <linux/io.h> |
30 | #include <linux/phy.h> | ||
31 | #include <linux/clk.h> | ||
27 | 32 | ||
28 | #include <asm/setup.h> | 33 | #include <asm/setup.h> |
29 | #include <asm/mach-types.h> | 34 | #include <asm/mach-types.h> |
@@ -32,25 +37,34 @@ | |||
32 | #include <asm/mach/map.h> | 37 | #include <asm/mach/map.h> |
33 | #include <asm/mach/flash.h> | 38 | #include <asm/mach/flash.h> |
34 | 39 | ||
35 | #include <mach/hardware.h> | 40 | #include <mach/dm644x.h> |
36 | #include <mach/common.h> | 41 | #include <mach/common.h> |
37 | #include <mach/i2c.h> | 42 | #include <mach/i2c.h> |
43 | #include <mach/serial.h> | ||
44 | #include <mach/mux.h> | ||
45 | #include <mach/psc.h> | ||
46 | #include <mach/nand.h> | ||
38 | 47 | ||
39 | /* other misc. init functions */ | 48 | #define DM644X_EVM_PHY_MASK (0x2) |
40 | void __init davinci_psc_init(void); | 49 | #define DM644X_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */ |
41 | void __init davinci_irq_init(void); | ||
42 | void __init davinci_map_common_io(void); | ||
43 | void __init davinci_init_common_hw(void); | ||
44 | 50 | ||
45 | #if defined(CONFIG_MTD_PHYSMAP) || \ | 51 | #define DAVINCI_CFC_ATA_BASE 0x01C66000 |
46 | defined(CONFIG_MTD_PHYSMAP_MODULE) | 52 | |
53 | #define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x01e00000 | ||
54 | #define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 | ||
55 | #define DAVINCI_ASYNC_EMIF_DATA_CE1_BASE 0x04000000 | ||
56 | #define DAVINCI_ASYNC_EMIF_DATA_CE2_BASE 0x06000000 | ||
57 | #define DAVINCI_ASYNC_EMIF_DATA_CE3_BASE 0x08000000 | ||
58 | |||
59 | #define LXT971_PHY_ID (0x001378e2) | ||
60 | #define LXT971_PHY_MASK (0xfffffff0) | ||
47 | 61 | ||
48 | static struct mtd_partition davinci_evm_norflash_partitions[] = { | 62 | static struct mtd_partition davinci_evm_norflash_partitions[] = { |
49 | /* bootloader (U-Boot, etc) in first 4 sectors */ | 63 | /* bootloader (UBL, U-Boot, etc) in first 5 sectors */ |
50 | { | 64 | { |
51 | .name = "bootloader", | 65 | .name = "bootloader", |
52 | .offset = 0, | 66 | .offset = 0, |
53 | .size = 4 * SZ_64K, | 67 | .size = 5 * SZ_64K, |
54 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | 68 | .mask_flags = MTD_WRITEABLE, /* force read-only */ |
55 | }, | 69 | }, |
56 | /* bootloader params in the next 1 sectors */ | 70 | /* bootloader params in the next 1 sectors */ |
@@ -100,10 +114,89 @@ static struct platform_device davinci_evm_norflash_device = { | |||
100 | .resource = &davinci_evm_norflash_resource, | 114 | .resource = &davinci_evm_norflash_resource, |
101 | }; | 115 | }; |
102 | 116 | ||
103 | #endif | 117 | /* DM644x EVM includes a 64 MByte small-page NAND flash (16K blocks). |
118 | * It may used instead of the (default) NOR chip to boot, using TI's | ||
119 | * tools to install the secondary boot loader (UBL) and U-Boot. | ||
120 | */ | ||
121 | struct mtd_partition davinci_evm_nandflash_partition[] = { | ||
122 | /* Bootloader layout depends on whose u-boot is installed, but we | ||
123 | * can hide all the details. | ||
124 | * - block 0 for u-boot environment ... in mainline u-boot | ||
125 | * - block 1 for UBL (plus up to four backup copies in blocks 2..5) | ||
126 | * - blocks 6...? for u-boot | ||
127 | * - blocks 16..23 for u-boot environment ... in TI's u-boot | ||
128 | */ | ||
129 | { | ||
130 | .name = "bootloader", | ||
131 | .offset = 0, | ||
132 | .size = SZ_256K + SZ_128K, | ||
133 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | ||
134 | }, | ||
135 | /* Kernel */ | ||
136 | { | ||
137 | .name = "kernel", | ||
138 | .offset = MTDPART_OFS_APPEND, | ||
139 | .size = SZ_4M, | ||
140 | .mask_flags = 0, | ||
141 | }, | ||
142 | /* File system (older GIT kernels started this on the 5MB mark) */ | ||
143 | { | ||
144 | .name = "filesystem", | ||
145 | .offset = MTDPART_OFS_APPEND, | ||
146 | .size = MTDPART_SIZ_FULL, | ||
147 | .mask_flags = 0, | ||
148 | } | ||
149 | /* A few blocks at end hold a flash BBT ... created by TI's CCS | ||
150 | * using flashwriter_nand.out, but ignored by TI's versions of | ||
151 | * Linux and u-boot. We boot faster by using them. | ||
152 | */ | ||
153 | }; | ||
104 | 154 | ||
105 | #if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \ | 155 | static struct davinci_nand_pdata davinci_evm_nandflash_data = { |
106 | defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE) | 156 | .parts = davinci_evm_nandflash_partition, |
157 | .nr_parts = ARRAY_SIZE(davinci_evm_nandflash_partition), | ||
158 | .ecc_mode = NAND_ECC_HW, | ||
159 | .options = NAND_USE_FLASH_BBT, | ||
160 | }; | ||
161 | |||
162 | static struct resource davinci_evm_nandflash_resource[] = { | ||
163 | { | ||
164 | .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE, | ||
165 | .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1, | ||
166 | .flags = IORESOURCE_MEM, | ||
167 | }, { | ||
168 | .start = DAVINCI_ASYNC_EMIF_CONTROL_BASE, | ||
169 | .end = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1, | ||
170 | .flags = IORESOURCE_MEM, | ||
171 | }, | ||
172 | }; | ||
173 | |||
174 | static struct platform_device davinci_evm_nandflash_device = { | ||
175 | .name = "davinci_nand", | ||
176 | .id = 0, | ||
177 | .dev = { | ||
178 | .platform_data = &davinci_evm_nandflash_data, | ||
179 | }, | ||
180 | .num_resources = ARRAY_SIZE(davinci_evm_nandflash_resource), | ||
181 | .resource = davinci_evm_nandflash_resource, | ||
182 | }; | ||
183 | |||
184 | static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32); | ||
185 | |||
186 | static struct platform_device davinci_fb_device = { | ||
187 | .name = "davincifb", | ||
188 | .id = -1, | ||
189 | .dev = { | ||
190 | .dma_mask = &davinci_fb_dma_mask, | ||
191 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
192 | }, | ||
193 | .num_resources = 0, | ||
194 | }; | ||
195 | |||
196 | static struct platform_device rtc_dev = { | ||
197 | .name = "rtc_davinci_evm", | ||
198 | .id = -1, | ||
199 | }; | ||
107 | 200 | ||
108 | static struct resource ide_resources[] = { | 201 | static struct resource ide_resources[] = { |
109 | { | 202 | { |
@@ -118,7 +211,7 @@ static struct resource ide_resources[] = { | |||
118 | }, | 211 | }, |
119 | }; | 212 | }; |
120 | 213 | ||
121 | static u64 ide_dma_mask = DMA_BIT_MASK(32); | 214 | static u64 ide_dma_mask = DMA_32BIT_MASK; |
122 | 215 | ||
123 | static struct platform_device ide_dev = { | 216 | static struct platform_device ide_dev = { |
124 | .name = "palm_bk3710", | 217 | .name = "palm_bk3710", |
@@ -127,12 +220,10 @@ static struct platform_device ide_dev = { | |||
127 | .num_resources = ARRAY_SIZE(ide_resources), | 220 | .num_resources = ARRAY_SIZE(ide_resources), |
128 | .dev = { | 221 | .dev = { |
129 | .dma_mask = &ide_dma_mask, | 222 | .dma_mask = &ide_dma_mask, |
130 | .coherent_dma_mask = DMA_BIT_MASK(32), | 223 | .coherent_dma_mask = DMA_32BIT_MASK, |
131 | }, | 224 | }, |
132 | }; | 225 | }; |
133 | 226 | ||
134 | #endif | ||
135 | |||
136 | /*----------------------------------------------------------------------*/ | 227 | /*----------------------------------------------------------------------*/ |
137 | 228 | ||
138 | /* | 229 | /* |
@@ -311,7 +402,9 @@ evm_u35_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c) | |||
311 | gpio_request(gpio + 7, "nCF_SEL"); | 402 | gpio_request(gpio + 7, "nCF_SEL"); |
312 | gpio_direction_output(gpio + 7, 1); | 403 | gpio_direction_output(gpio + 7, 1); |
313 | 404 | ||
314 | /* irlml6401 sustains over 3A, switches 5V in under 8 msec */ | 405 | /* irlml6401 switches over 1A, in under 8 msec; |
406 | * now it can be managed by nDRV_VBUS ... | ||
407 | */ | ||
315 | setup_usb(500, 8); | 408 | setup_usb(500, 8); |
316 | 409 | ||
317 | return 0; | 410 | return 0; |
@@ -343,14 +436,120 @@ static struct pcf857x_platform_data pcf_data_u35 = { | |||
343 | * - 0x0039, 1 byte NTSC vs PAL (bit 0x80 == PAL) | 436 | * - 0x0039, 1 byte NTSC vs PAL (bit 0x80 == PAL) |
344 | * - ... newer boards may have more | 437 | * - ... newer boards may have more |
345 | */ | 438 | */ |
439 | static struct memory_accessor *at24_mem_acc; | ||
440 | |||
441 | static void at24_setup(struct memory_accessor *mem_acc, void *context) | ||
442 | { | ||
443 | DECLARE_MAC_BUF(mac_str); | ||
444 | char mac_addr[6]; | ||
445 | |||
446 | at24_mem_acc = mem_acc; | ||
447 | |||
448 | /* Read MAC addr from EEPROM */ | ||
449 | if (at24_mem_acc->read(at24_mem_acc, mac_addr, 0x7f00, 6) == 6) { | ||
450 | printk(KERN_INFO "Read MAC addr from EEPROM: %s\n", | ||
451 | print_mac(mac_str, mac_addr)); | ||
452 | } | ||
453 | } | ||
454 | |||
346 | static struct at24_platform_data eeprom_info = { | 455 | static struct at24_platform_data eeprom_info = { |
347 | .byte_len = (256*1024) / 8, | 456 | .byte_len = (256*1024) / 8, |
348 | .page_size = 64, | 457 | .page_size = 64, |
349 | .flags = AT24_FLAG_ADDR16, | 458 | .flags = AT24_FLAG_ADDR16, |
459 | .setup = at24_setup, | ||
350 | }; | 460 | }; |
351 | 461 | ||
462 | int dm6446evm_eeprom_read(void *buf, off_t off, size_t count) | ||
463 | { | ||
464 | if (at24_mem_acc) | ||
465 | return at24_mem_acc->read(at24_mem_acc, buf, off, count); | ||
466 | return -ENODEV; | ||
467 | } | ||
468 | EXPORT_SYMBOL(dm6446evm_eeprom_read); | ||
469 | |||
470 | int dm6446evm_eeprom_write(void *buf, off_t off, size_t count) | ||
471 | { | ||
472 | if (at24_mem_acc) | ||
473 | return at24_mem_acc->write(at24_mem_acc, buf, off, count); | ||
474 | return -ENODEV; | ||
475 | } | ||
476 | EXPORT_SYMBOL(dm6446evm_eeprom_write); | ||
477 | |||
478 | /* | ||
479 | * MSP430 supports RTC, card detection, input from IR remote, and | ||
480 | * a bit more. It triggers interrupts on GPIO(7) from pressing | ||
481 | * buttons on the IR remote, and for card detect switches. | ||
482 | */ | ||
483 | static struct i2c_client *dm6446evm_msp; | ||
484 | |||
485 | static int dm6446evm_msp_probe(struct i2c_client *client, | ||
486 | const struct i2c_device_id *id) | ||
487 | { | ||
488 | dm6446evm_msp = client; | ||
489 | return 0; | ||
490 | } | ||
491 | |||
492 | static int dm6446evm_msp_remove(struct i2c_client *client) | ||
493 | { | ||
494 | dm6446evm_msp = NULL; | ||
495 | return 0; | ||
496 | } | ||
497 | |||
498 | static const struct i2c_device_id dm6446evm_msp_ids[] = { | ||
499 | { "dm6446evm_msp", 0, }, | ||
500 | { /* end of list */ }, | ||
501 | }; | ||
502 | |||
503 | static struct i2c_driver dm6446evm_msp_driver = { | ||
504 | .driver.name = "dm6446evm_msp", | ||
505 | .id_table = dm6446evm_msp_ids, | ||
506 | .probe = dm6446evm_msp_probe, | ||
507 | .remove = dm6446evm_msp_remove, | ||
508 | }; | ||
509 | |||
510 | static int dm6444evm_msp430_get_pins(void) | ||
511 | { | ||
512 | static const char txbuf[2] = { 2, 4, }; | ||
513 | char buf[4]; | ||
514 | struct i2c_msg msg[2] = { | ||
515 | { | ||
516 | .addr = dm6446evm_msp->addr, | ||
517 | .flags = 0, | ||
518 | .len = 2, | ||
519 | .buf = (void __force *)txbuf, | ||
520 | }, | ||
521 | { | ||
522 | .addr = dm6446evm_msp->addr, | ||
523 | .flags = I2C_M_RD, | ||
524 | .len = 4, | ||
525 | .buf = buf, | ||
526 | }, | ||
527 | }; | ||
528 | int status; | ||
529 | |||
530 | if (!dm6446evm_msp) | ||
531 | return -ENXIO; | ||
532 | |||
533 | /* Command 4 == get input state, returns port 2 and port3 data | ||
534 | * S Addr W [A] len=2 [A] cmd=4 [A] | ||
535 | * RS Addr R [A] [len=4] A [cmd=4] A [port2] A [port3] N P | ||
536 | */ | ||
537 | status = i2c_transfer(dm6446evm_msp->adapter, msg, 2); | ||
538 | if (status < 0) | ||
539 | return status; | ||
540 | |||
541 | dev_dbg(&dm6446evm_msp->dev, | ||
542 | "PINS: %02x %02x %02x %02x\n", | ||
543 | buf[0], buf[1], buf[2], buf[3]); | ||
544 | |||
545 | return (buf[3] << 8) | buf[2]; | ||
546 | } | ||
547 | |||
352 | static struct i2c_board_info __initdata i2c_info[] = { | 548 | static struct i2c_board_info __initdata i2c_info[] = { |
353 | { | 549 | { |
550 | I2C_BOARD_INFO("dm6446evm_msp", 0x23), | ||
551 | }, | ||
552 | { | ||
354 | I2C_BOARD_INFO("pcf8574", 0x38), | 553 | I2C_BOARD_INFO("pcf8574", 0x38), |
355 | .platform_data = &pcf_data_u2, | 554 | .platform_data = &pcf_data_u2, |
356 | }, | 555 | }, |
@@ -368,7 +567,6 @@ static struct i2c_board_info __initdata i2c_info[] = { | |||
368 | }, | 567 | }, |
369 | /* ALSO: | 568 | /* ALSO: |
370 | * - tvl320aic33 audio codec (0x1b) | 569 | * - tvl320aic33 audio codec (0x1b) |
371 | * - msp430 microcontroller (0x23) | ||
372 | * - tvp5146 video decoder (0x5d) | 570 | * - tvp5146 video decoder (0x5d) |
373 | */ | 571 | */ |
374 | }; | 572 | }; |
@@ -384,51 +582,109 @@ static struct davinci_i2c_platform_data i2c_pdata = { | |||
384 | static void __init evm_init_i2c(void) | 582 | static void __init evm_init_i2c(void) |
385 | { | 583 | { |
386 | davinci_init_i2c(&i2c_pdata); | 584 | davinci_init_i2c(&i2c_pdata); |
585 | i2c_add_driver(&dm6446evm_msp_driver); | ||
387 | i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info)); | 586 | i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info)); |
388 | } | 587 | } |
389 | 588 | ||
390 | static struct platform_device *davinci_evm_devices[] __initdata = { | 589 | static struct platform_device *davinci_evm_devices[] __initdata = { |
391 | #if defined(CONFIG_MTD_PHYSMAP) || \ | 590 | &davinci_fb_device, |
392 | defined(CONFIG_MTD_PHYSMAP_MODULE) | 591 | &rtc_dev, |
393 | &davinci_evm_norflash_device, | 592 | }; |
394 | #endif | 593 | |
395 | #if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \ | 594 | static struct davinci_uart_config uart_config __initdata = { |
396 | defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE) | 595 | .enabled_uarts = (1 << 0), |
397 | &ide_dev, | ||
398 | #endif | ||
399 | }; | 596 | }; |
400 | 597 | ||
401 | static void __init | 598 | static void __init |
402 | davinci_evm_map_io(void) | 599 | davinci_evm_map_io(void) |
403 | { | 600 | { |
404 | davinci_map_common_io(); | 601 | davinci_map_common_io(); |
602 | dm644x_init(); | ||
405 | } | 603 | } |
406 | 604 | ||
407 | static __init void davinci_evm_init(void) | 605 | static int davinci_phy_fixup(struct phy_device *phydev) |
408 | { | 606 | { |
409 | davinci_psc_init(); | 607 | unsigned int control; |
608 | /* CRITICAL: Fix for increasing PHY signal drive strength for | ||
609 | * TX lockup issue. On DaVinci EVM, the Intel LXT971 PHY | ||
610 | * signal strength was low causing TX to fail randomly. The | ||
611 | * fix is to Set bit 11 (Increased MII drive strength) of PHY | ||
612 | * register 26 (Digital Config register) on this phy. */ | ||
613 | control = phy_read(phydev, 26); | ||
614 | phy_write(phydev, 26, (control | 0x800)); | ||
615 | return 0; | ||
616 | } | ||
410 | 617 | ||
411 | #if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \ | 618 | #if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \ |
412 | defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE) | 619 | defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE) |
620 | #define HAS_ATA 1 | ||
621 | #else | ||
622 | #define HAS_ATA 0 | ||
623 | #endif | ||
624 | |||
413 | #if defined(CONFIG_MTD_PHYSMAP) || \ | 625 | #if defined(CONFIG_MTD_PHYSMAP) || \ |
414 | defined(CONFIG_MTD_PHYSMAP_MODULE) | 626 | defined(CONFIG_MTD_PHYSMAP_MODULE) |
415 | printk(KERN_WARNING "WARNING: both IDE and NOR flash are enabled, " | 627 | #define HAS_NOR 1 |
416 | "but share pins.\n\t Disable IDE for NOR support.\n"); | 628 | #else |
629 | #define HAS_NOR 0 | ||
417 | #endif | 630 | #endif |
631 | |||
632 | #if defined(CONFIG_MTD_NAND_DAVINCI) || \ | ||
633 | defined(CONFIG_MTD_NAND_DAVINCI_MODULE) | ||
634 | #define HAS_NAND 1 | ||
635 | #else | ||
636 | #define HAS_NAND 0 | ||
418 | #endif | 637 | #endif |
419 | 638 | ||
639 | static __init void davinci_evm_init(void) | ||
640 | { | ||
641 | struct clk *aemif_clk; | ||
642 | |||
643 | aemif_clk = clk_get(NULL, "aemif"); | ||
644 | clk_enable(aemif_clk); | ||
645 | |||
646 | if (HAS_ATA) { | ||
647 | if (HAS_NAND || HAS_NOR) | ||
648 | pr_warning("WARNING: both IDE and Flash are " | ||
649 | "enabled, but they share AEMIF pins.\n" | ||
650 | "\tDisable IDE for NAND/NOR support.\n"); | ||
651 | davinci_cfg_reg(DM644X_HPIEN_DISABLE); | ||
652 | davinci_cfg_reg(DM644X_ATAEN); | ||
653 | davinci_cfg_reg(DM644X_HDIREN); | ||
654 | platform_device_register(&ide_dev); | ||
655 | } else if (HAS_NAND || HAS_NOR) { | ||
656 | davinci_cfg_reg(DM644X_HPIEN_DISABLE); | ||
657 | davinci_cfg_reg(DM644X_ATAEN_DISABLE); | ||
658 | |||
659 | /* only one device will be jumpered and detected */ | ||
660 | if (HAS_NAND) { | ||
661 | platform_device_register(&davinci_evm_nandflash_device); | ||
662 | evm_leds[7].default_trigger = "nand-disk"; | ||
663 | if (HAS_NOR) | ||
664 | pr_warning("WARNING: both NAND and NOR flash " | ||
665 | "are enabled; disable one of them.\n"); | ||
666 | } else if (HAS_NOR) | ||
667 | platform_device_register(&davinci_evm_norflash_device); | ||
668 | } | ||
669 | |||
420 | platform_add_devices(davinci_evm_devices, | 670 | platform_add_devices(davinci_evm_devices, |
421 | ARRAY_SIZE(davinci_evm_devices)); | 671 | ARRAY_SIZE(davinci_evm_devices)); |
422 | evm_init_i2c(); | 672 | evm_init_i2c(); |
673 | |||
674 | davinci_serial_init(&uart_config); | ||
675 | |||
676 | /* Register the fixup for PHY on DaVinci */ | ||
677 | phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK, | ||
678 | davinci_phy_fixup); | ||
679 | |||
423 | } | 680 | } |
424 | 681 | ||
425 | static __init void davinci_evm_irq_init(void) | 682 | static __init void davinci_evm_irq_init(void) |
426 | { | 683 | { |
427 | davinci_init_common_hw(); | ||
428 | davinci_irq_init(); | 684 | davinci_irq_init(); |
429 | } | 685 | } |
430 | 686 | ||
431 | MACHINE_START(DAVINCI_EVM, "DaVinci EVM") | 687 | MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM") |
432 | /* Maintainer: MontaVista Software <source@mvista.com> */ | 688 | /* Maintainer: MontaVista Software <source@mvista.com> */ |
433 | .phys_io = IO_PHYS, | 689 | .phys_io = IO_PHYS, |
434 | .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, | 690 | .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, |
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c index abb92b7eca0c..f0baaa15a57e 100644 --- a/arch/arm/mach-davinci/clock.c +++ b/arch/arm/mach-davinci/clock.c | |||
@@ -1,7 +1,8 @@ | |||
1 | /* | 1 | /* |
2 | * TI DaVinci clock config file | 2 | * Clock and PLL control for DaVinci devices |
3 | * | 3 | * |
4 | * Copyright (C) 2006 Texas Instruments. | 4 | * Copyright (C) 2006-2007 Texas Instruments. |
5 | * Copyright (C) 2008-2009 Deep Root Systems, LLC | ||
5 | * | 6 | * |
6 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 8 | * it under the terms of the GNU General Public License as published by |
@@ -13,6 +14,7 @@ | |||
13 | #include <linux/kernel.h> | 14 | #include <linux/kernel.h> |
14 | #include <linux/init.h> | 15 | #include <linux/init.h> |
15 | #include <linux/errno.h> | 16 | #include <linux/errno.h> |
17 | #include <linux/clk.h> | ||
16 | #include <linux/err.h> | 18 | #include <linux/err.h> |
17 | #include <linux/mutex.h> | 19 | #include <linux/mutex.h> |
18 | #include <linux/platform_device.h> | 20 | #include <linux/platform_device.h> |
@@ -21,98 +23,50 @@ | |||
21 | #include <mach/hardware.h> | 23 | #include <mach/hardware.h> |
22 | 24 | ||
23 | #include <mach/psc.h> | 25 | #include <mach/psc.h> |
26 | #include <mach/cputype.h> | ||
24 | #include "clock.h" | 27 | #include "clock.h" |
25 | 28 | ||
26 | /* PLL/Reset register offsets */ | ||
27 | #define PLLM 0x110 | ||
28 | |||
29 | static LIST_HEAD(clocks); | 29 | static LIST_HEAD(clocks); |
30 | static DEFINE_MUTEX(clocks_mutex); | 30 | static DEFINE_MUTEX(clocks_mutex); |
31 | static DEFINE_SPINLOCK(clockfw_lock); | 31 | static DEFINE_SPINLOCK(clockfw_lock); |
32 | 32 | ||
33 | static unsigned int commonrate; | 33 | static unsigned psc_domain(struct clk *clk) |
34 | static unsigned int armrate; | ||
35 | static unsigned int fixedrate = 27000000; /* 27 MHZ */ | ||
36 | |||
37 | extern void davinci_psc_config(unsigned int domain, unsigned int id, char enable); | ||
38 | |||
39 | /* | ||
40 | * Returns a clock. Note that we first try to use device id on the bus | ||
41 | * and clock name. If this fails, we try to use clock name only. | ||
42 | */ | ||
43 | struct clk *clk_get(struct device *dev, const char *id) | ||
44 | { | 34 | { |
45 | struct clk *p, *clk = ERR_PTR(-ENOENT); | 35 | return (clk->flags & PSC_DSP) |
46 | int idno; | 36 | ? DAVINCI_GPSC_DSPDOMAIN |
47 | 37 | : DAVINCI_GPSC_ARMDOMAIN; | |
48 | if (dev == NULL || dev->bus != &platform_bus_type) | ||
49 | idno = -1; | ||
50 | else | ||
51 | idno = to_platform_device(dev)->id; | ||
52 | |||
53 | mutex_lock(&clocks_mutex); | ||
54 | |||
55 | list_for_each_entry(p, &clocks, node) { | ||
56 | if (p->id == idno && | ||
57 | strcmp(id, p->name) == 0 && try_module_get(p->owner)) { | ||
58 | clk = p; | ||
59 | goto found; | ||
60 | } | ||
61 | } | ||
62 | |||
63 | list_for_each_entry(p, &clocks, node) { | ||
64 | if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) { | ||
65 | clk = p; | ||
66 | break; | ||
67 | } | ||
68 | } | ||
69 | |||
70 | found: | ||
71 | mutex_unlock(&clocks_mutex); | ||
72 | |||
73 | return clk; | ||
74 | } | 38 | } |
75 | EXPORT_SYMBOL(clk_get); | ||
76 | 39 | ||
77 | void clk_put(struct clk *clk) | 40 | static void __clk_enable(struct clk *clk) |
78 | { | 41 | { |
79 | if (clk && !IS_ERR(clk)) | 42 | if (clk->parent) |
80 | module_put(clk->owner); | 43 | __clk_enable(clk->parent); |
81 | } | 44 | if (clk->usecount++ == 0 && (clk->flags & CLK_PSC)) |
82 | EXPORT_SYMBOL(clk_put); | 45 | davinci_psc_config(psc_domain(clk), clk->lpsc, 1); |
83 | |||
84 | static int __clk_enable(struct clk *clk) | ||
85 | { | ||
86 | if (clk->flags & ALWAYS_ENABLED) | ||
87 | return 0; | ||
88 | |||
89 | davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, clk->lpsc, 1); | ||
90 | return 0; | ||
91 | } | 46 | } |
92 | 47 | ||
93 | static void __clk_disable(struct clk *clk) | 48 | static void __clk_disable(struct clk *clk) |
94 | { | 49 | { |
95 | if (clk->usecount) | 50 | if (WARN_ON(clk->usecount == 0)) |
96 | return; | 51 | return; |
97 | 52 | if (--clk->usecount == 0 && !(clk->flags & CLK_PLL)) | |
98 | davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, clk->lpsc, 0); | 53 | davinci_psc_config(psc_domain(clk), clk->lpsc, 0); |
54 | if (clk->parent) | ||
55 | __clk_disable(clk->parent); | ||
99 | } | 56 | } |
100 | 57 | ||
101 | int clk_enable(struct clk *clk) | 58 | int clk_enable(struct clk *clk) |
102 | { | 59 | { |
103 | unsigned long flags; | 60 | unsigned long flags; |
104 | int ret = 0; | ||
105 | 61 | ||
106 | if (clk == NULL || IS_ERR(clk)) | 62 | if (clk == NULL || IS_ERR(clk)) |
107 | return -EINVAL; | 63 | return -EINVAL; |
108 | 64 | ||
109 | if (clk->usecount++ == 0) { | 65 | spin_lock_irqsave(&clockfw_lock, flags); |
110 | spin_lock_irqsave(&clockfw_lock, flags); | 66 | __clk_enable(clk); |
111 | ret = __clk_enable(clk); | 67 | spin_unlock_irqrestore(&clockfw_lock, flags); |
112 | spin_unlock_irqrestore(&clockfw_lock, flags); | ||
113 | } | ||
114 | 68 | ||
115 | return ret; | 69 | return 0; |
116 | } | 70 | } |
117 | EXPORT_SYMBOL(clk_enable); | 71 | EXPORT_SYMBOL(clk_enable); |
118 | 72 | ||
@@ -123,11 +77,9 @@ void clk_disable(struct clk *clk) | |||
123 | if (clk == NULL || IS_ERR(clk)) | 77 | if (clk == NULL || IS_ERR(clk)) |
124 | return; | 78 | return; |
125 | 79 | ||
126 | if (clk->usecount > 0 && !(--clk->usecount)) { | 80 | spin_lock_irqsave(&clockfw_lock, flags); |
127 | spin_lock_irqsave(&clockfw_lock, flags); | 81 | __clk_disable(clk); |
128 | __clk_disable(clk); | 82 | spin_unlock_irqrestore(&clockfw_lock, flags); |
129 | spin_unlock_irqrestore(&clockfw_lock, flags); | ||
130 | } | ||
131 | } | 83 | } |
132 | EXPORT_SYMBOL(clk_disable); | 84 | EXPORT_SYMBOL(clk_disable); |
133 | 85 | ||
@@ -136,7 +88,7 @@ unsigned long clk_get_rate(struct clk *clk) | |||
136 | if (clk == NULL || IS_ERR(clk)) | 88 | if (clk == NULL || IS_ERR(clk)) |
137 | return -EINVAL; | 89 | return -EINVAL; |
138 | 90 | ||
139 | return *(clk->rate); | 91 | return clk->rate; |
140 | } | 92 | } |
141 | EXPORT_SYMBOL(clk_get_rate); | 93 | EXPORT_SYMBOL(clk_get_rate); |
142 | 94 | ||
@@ -145,7 +97,7 @@ long clk_round_rate(struct clk *clk, unsigned long rate) | |||
145 | if (clk == NULL || IS_ERR(clk)) | 97 | if (clk == NULL || IS_ERR(clk)) |
146 | return -EINVAL; | 98 | return -EINVAL; |
147 | 99 | ||
148 | return *(clk->rate); | 100 | return clk->rate; |
149 | } | 101 | } |
150 | EXPORT_SYMBOL(clk_round_rate); | 102 | EXPORT_SYMBOL(clk_round_rate); |
151 | 103 | ||
@@ -164,10 +116,23 @@ int clk_register(struct clk *clk) | |||
164 | if (clk == NULL || IS_ERR(clk)) | 116 | if (clk == NULL || IS_ERR(clk)) |
165 | return -EINVAL; | 117 | return -EINVAL; |
166 | 118 | ||
119 | if (WARN(clk->parent && !clk->parent->rate, | ||
120 | "CLK: %s parent %s has no rate!\n", | ||
121 | clk->name, clk->parent->name)) | ||
122 | return -EINVAL; | ||
123 | |||
167 | mutex_lock(&clocks_mutex); | 124 | mutex_lock(&clocks_mutex); |
168 | list_add(&clk->node, &clocks); | 125 | list_add_tail(&clk->node, &clocks); |
169 | mutex_unlock(&clocks_mutex); | 126 | mutex_unlock(&clocks_mutex); |
170 | 127 | ||
128 | /* If rate is already set, use it */ | ||
129 | if (clk->rate) | ||
130 | return 0; | ||
131 | |||
132 | /* Otherwise, default to parent rate */ | ||
133 | if (clk->parent) | ||
134 | clk->rate = clk->parent->rate; | ||
135 | |||
171 | return 0; | 136 | return 0; |
172 | } | 137 | } |
173 | EXPORT_SYMBOL(clk_register); | 138 | EXPORT_SYMBOL(clk_register); |
@@ -183,84 +148,150 @@ void clk_unregister(struct clk *clk) | |||
183 | } | 148 | } |
184 | EXPORT_SYMBOL(clk_unregister); | 149 | EXPORT_SYMBOL(clk_unregister); |
185 | 150 | ||
186 | static struct clk davinci_clks[] = { | 151 | #ifdef CONFIG_DAVINCI_RESET_CLOCKS |
187 | { | 152 | /* |
188 | .name = "ARMCLK", | 153 | * Disable any unused clocks left on by the bootloader |
189 | .rate = &armrate, | 154 | */ |
190 | .lpsc = -1, | 155 | static int __init clk_disable_unused(void) |
191 | .flags = ALWAYS_ENABLED, | 156 | { |
192 | }, | 157 | struct clk *ck; |
193 | { | 158 | |
194 | .name = "UART", | 159 | spin_lock_irq(&clockfw_lock); |
195 | .rate = &fixedrate, | 160 | list_for_each_entry(ck, &clocks, node) { |
196 | .lpsc = DAVINCI_LPSC_UART0, | 161 | if (ck->usecount > 0) |
197 | }, | 162 | continue; |
198 | { | 163 | if (!(ck->flags & CLK_PSC)) |
199 | .name = "EMACCLK", | 164 | continue; |
200 | .rate = &commonrate, | 165 | |
201 | .lpsc = DAVINCI_LPSC_EMAC_WRAPPER, | 166 | /* ignore if in Disabled or SwRstDisable states */ |
202 | }, | 167 | if (!davinci_psc_is_clk_active(ck->lpsc)) |
203 | { | 168 | continue; |
204 | .name = "I2CCLK", | 169 | |
205 | .rate = &fixedrate, | 170 | pr_info("Clocks: disable unused %s\n", ck->name); |
206 | .lpsc = DAVINCI_LPSC_I2C, | 171 | davinci_psc_config(psc_domain(ck), ck->lpsc, 0); |
207 | }, | ||
208 | { | ||
209 | .name = "IDECLK", | ||
210 | .rate = &commonrate, | ||
211 | .lpsc = DAVINCI_LPSC_ATA, | ||
212 | }, | ||
213 | { | ||
214 | .name = "McBSPCLK", | ||
215 | .rate = &commonrate, | ||
216 | .lpsc = DAVINCI_LPSC_McBSP, | ||
217 | }, | ||
218 | { | ||
219 | .name = "MMCSDCLK", | ||
220 | .rate = &commonrate, | ||
221 | .lpsc = DAVINCI_LPSC_MMC_SD, | ||
222 | }, | ||
223 | { | ||
224 | .name = "SPICLK", | ||
225 | .rate = &commonrate, | ||
226 | .lpsc = DAVINCI_LPSC_SPI, | ||
227 | }, | ||
228 | { | ||
229 | .name = "gpio", | ||
230 | .rate = &commonrate, | ||
231 | .lpsc = DAVINCI_LPSC_GPIO, | ||
232 | }, | ||
233 | { | ||
234 | .name = "usb", | ||
235 | .rate = &commonrate, | ||
236 | .lpsc = DAVINCI_LPSC_USB, | ||
237 | }, | ||
238 | { | ||
239 | .name = "AEMIFCLK", | ||
240 | .rate = &commonrate, | ||
241 | .lpsc = DAVINCI_LPSC_AEMIF, | ||
242 | .usecount = 1, | ||
243 | } | 172 | } |
244 | }; | 173 | spin_unlock_irq(&clockfw_lock); |
174 | |||
175 | return 0; | ||
176 | } | ||
177 | late_initcall(clk_disable_unused); | ||
178 | #endif | ||
245 | 179 | ||
246 | int __init davinci_clk_init(void) | 180 | static void clk_sysclk_recalc(struct clk *clk) |
247 | { | 181 | { |
248 | struct clk *clkp; | 182 | u32 v, plldiv; |
249 | int count = 0; | 183 | struct pll_data *pll; |
250 | u32 pll_mult; | 184 | |
251 | 185 | /* If this is the PLL base clock, no more calculations needed */ | |
252 | pll_mult = davinci_readl(DAVINCI_PLL_CNTRL0_BASE + PLLM); | 186 | if (clk->pll_data) |
253 | commonrate = ((pll_mult + 1) * 27000000) / 6; | 187 | return; |
254 | armrate = ((pll_mult + 1) * 27000000) / 2; | 188 | |
255 | 189 | if (WARN_ON(!clk->parent)) | |
256 | for (clkp = davinci_clks; count < ARRAY_SIZE(davinci_clks); | 190 | return; |
257 | count++, clkp++) { | 191 | |
258 | clk_register(clkp); | 192 | clk->rate = clk->parent->rate; |
259 | 193 | ||
260 | /* Turn on clocks that have been enabled in the | 194 | /* Otherwise, the parent must be a PLL */ |
261 | * table above */ | 195 | if (WARN_ON(!clk->parent->pll_data)) |
262 | if (clkp->usecount) | 196 | return; |
263 | clk_enable(clkp); | 197 | |
198 | pll = clk->parent->pll_data; | ||
199 | |||
200 | /* If pre-PLL, source clock is before the multiplier and divider(s) */ | ||
201 | if (clk->flags & PRE_PLL) | ||
202 | clk->rate = pll->input_rate; | ||
203 | |||
204 | if (!clk->div_reg) | ||
205 | return; | ||
206 | |||
207 | v = __raw_readl(pll->base + clk->div_reg); | ||
208 | if (v & PLLDIV_EN) { | ||
209 | plldiv = (v & PLLDIV_RATIO_MASK) + 1; | ||
210 | if (plldiv) | ||
211 | clk->rate /= plldiv; | ||
212 | } | ||
213 | } | ||
214 | |||
215 | static void __init clk_pll_init(struct clk *clk) | ||
216 | { | ||
217 | u32 ctrl, mult = 1, prediv = 1, postdiv = 1; | ||
218 | u8 bypass; | ||
219 | struct pll_data *pll = clk->pll_data; | ||
220 | |||
221 | pll->base = IO_ADDRESS(pll->phys_base); | ||
222 | ctrl = __raw_readl(pll->base + PLLCTL); | ||
223 | clk->rate = pll->input_rate = clk->parent->rate; | ||
224 | |||
225 | if (ctrl & PLLCTL_PLLEN) { | ||
226 | bypass = 0; | ||
227 | mult = __raw_readl(pll->base + PLLM); | ||
228 | mult = (mult & PLLM_PLLM_MASK) + 1; | ||
229 | } else | ||
230 | bypass = 1; | ||
231 | |||
232 | if (pll->flags & PLL_HAS_PREDIV) { | ||
233 | prediv = __raw_readl(pll->base + PREDIV); | ||
234 | if (prediv & PLLDIV_EN) | ||
235 | prediv = (prediv & PLLDIV_RATIO_MASK) + 1; | ||
236 | else | ||
237 | prediv = 1; | ||
238 | } | ||
239 | |||
240 | /* pre-divider is fixed, but (some?) chips won't report that */ | ||
241 | if (cpu_is_davinci_dm355() && pll->num == 1) | ||
242 | prediv = 8; | ||
243 | |||
244 | if (pll->flags & PLL_HAS_POSTDIV) { | ||
245 | postdiv = __raw_readl(pll->base + POSTDIV); | ||
246 | if (postdiv & PLLDIV_EN) | ||
247 | postdiv = (postdiv & PLLDIV_RATIO_MASK) + 1; | ||
248 | else | ||
249 | postdiv = 1; | ||
250 | } | ||
251 | |||
252 | if (!bypass) { | ||
253 | clk->rate /= prediv; | ||
254 | clk->rate *= mult; | ||
255 | clk->rate /= postdiv; | ||
256 | } | ||
257 | |||
258 | pr_debug("PLL%d: input = %lu MHz [ ", | ||
259 | pll->num, clk->parent->rate / 1000000); | ||
260 | if (bypass) | ||
261 | pr_debug("bypass "); | ||
262 | if (prediv > 1) | ||
263 | pr_debug("/ %d ", prediv); | ||
264 | if (mult > 1) | ||
265 | pr_debug("* %d ", mult); | ||
266 | if (postdiv > 1) | ||
267 | pr_debug("/ %d ", postdiv); | ||
268 | pr_debug("] --> %lu MHz output.\n", clk->rate / 1000000); | ||
269 | } | ||
270 | |||
271 | int __init davinci_clk_init(struct davinci_clk *clocks) | ||
272 | { | ||
273 | struct davinci_clk *c; | ||
274 | struct clk *clk; | ||
275 | |||
276 | for (c = clocks; c->lk.clk; c++) { | ||
277 | clk = c->lk.clk; | ||
278 | |||
279 | if (clk->pll_data) | ||
280 | clk_pll_init(clk); | ||
281 | |||
282 | /* Calculate rates for PLL-derived clocks */ | ||
283 | else if (clk->flags & CLK_PLL) | ||
284 | clk_sysclk_recalc(clk); | ||
285 | |||
286 | if (clk->lpsc) | ||
287 | clk->flags |= CLK_PSC; | ||
288 | |||
289 | clkdev_add(&c->lk); | ||
290 | clk_register(clk); | ||
291 | |||
292 | /* Turn on clocks that Linux doesn't otherwise manage */ | ||
293 | if (clk->flags & ALWAYS_ENABLED) | ||
294 | clk_enable(clk); | ||
264 | } | 295 | } |
265 | 296 | ||
266 | return 0; | 297 | return 0; |
@@ -285,12 +316,52 @@ static void davinci_ck_stop(struct seq_file *m, void *v) | |||
285 | { | 316 | { |
286 | } | 317 | } |
287 | 318 | ||
288 | static int davinci_ck_show(struct seq_file *m, void *v) | 319 | #define CLKNAME_MAX 10 /* longest clock name */ |
320 | #define NEST_DELTA 2 | ||
321 | #define NEST_MAX 4 | ||
322 | |||
323 | static void | ||
324 | dump_clock(struct seq_file *s, unsigned nest, struct clk *parent) | ||
289 | { | 325 | { |
290 | struct clk *cp; | 326 | char *state; |
327 | char buf[CLKNAME_MAX + NEST_DELTA * NEST_MAX]; | ||
328 | struct clk *clk; | ||
329 | unsigned i; | ||
330 | |||
331 | if (parent->flags & CLK_PLL) | ||
332 | state = "pll"; | ||
333 | else if (parent->flags & CLK_PSC) | ||
334 | state = "psc"; | ||
335 | else | ||
336 | state = ""; | ||
337 | |||
338 | /* <nest spaces> name <pad to end> */ | ||
339 | memset(buf, ' ', sizeof(buf) - 1); | ||
340 | buf[sizeof(buf) - 1] = 0; | ||
341 | i = strlen(parent->name); | ||
342 | memcpy(buf + nest, parent->name, | ||
343 | min(i, (unsigned)(sizeof(buf) - 1 - nest))); | ||
344 | |||
345 | seq_printf(s, "%s users=%2d %-3s %9ld Hz\n", | ||
346 | buf, parent->usecount, state, clk_get_rate(parent)); | ||
347 | /* REVISIT show device associations too */ | ||
348 | |||
349 | /* cost is now small, but not linear... */ | ||
350 | list_for_each_entry(clk, &clocks, node) { | ||
351 | if (clk->parent == parent) | ||
352 | dump_clock(s, nest + NEST_DELTA, clk); | ||
353 | } | ||
354 | } | ||
291 | 355 | ||
292 | list_for_each_entry(cp, &clocks, node) | 356 | static int davinci_ck_show(struct seq_file *m, void *v) |
293 | seq_printf(m,"%s %d %d\n", cp->name, *(cp->rate), cp->usecount); | 357 | { |
358 | /* Show clock tree; we know the main oscillator is first. | ||
359 | * We trust nonzero usecounts equate to PSC enables... | ||
360 | */ | ||
361 | mutex_lock(&clocks_mutex); | ||
362 | if (!list_empty(&clocks)) | ||
363 | dump_clock(m, 0, list_first_entry(&clocks, struct clk, node)); | ||
364 | mutex_unlock(&clocks_mutex); | ||
294 | 365 | ||
295 | return 0; | 366 | return 0; |
296 | } | 367 | } |
@@ -321,4 +392,4 @@ static int __init davinci_ck_proc_init(void) | |||
321 | 392 | ||
322 | } | 393 | } |
323 | __initcall(davinci_ck_proc_init); | 394 | __initcall(davinci_ck_proc_init); |
324 | #endif /* CONFIG_DEBUG_PROC_FS */ | 395 | #endif /* CONFIG_DEBUG_PROC_FS */ |
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h index ed47079a52e4..35736ec202f8 100644 --- a/arch/arm/mach-davinci/clock.h +++ b/arch/arm/mach-davinci/clock.h | |||
@@ -1,7 +1,8 @@ | |||
1 | /* | 1 | /* |
2 | * TI DaVinci clock definitions | 2 | * TI DaVinci clock definitions |
3 | * | 3 | * |
4 | * Copyright (C) 2006 Texas Instruments. | 4 | * Copyright (C) 2006-2007 Texas Instruments. |
5 | * Copyright (C) 2008-2009 Deep Root Systems, LLC | ||
5 | * | 6 | * |
6 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License version 2 as | 8 | * it under the terms of the GNU General Public License version 2 as |
@@ -11,23 +12,85 @@ | |||
11 | #ifndef __ARCH_ARM_DAVINCI_CLOCK_H | 12 | #ifndef __ARCH_ARM_DAVINCI_CLOCK_H |
12 | #define __ARCH_ARM_DAVINCI_CLOCK_H | 13 | #define __ARCH_ARM_DAVINCI_CLOCK_H |
13 | 14 | ||
15 | #include <linux/list.h> | ||
16 | #include <asm/clkdev.h> | ||
17 | |||
18 | #define DAVINCI_PLL1_BASE 0x01c40800 | ||
19 | #define DAVINCI_PLL2_BASE 0x01c40c00 | ||
20 | #define MAX_PLL 2 | ||
21 | |||
22 | /* PLL/Reset register offsets */ | ||
23 | #define PLLCTL 0x100 | ||
24 | #define PLLCTL_PLLEN BIT(0) | ||
25 | #define PLLCTL_CLKMODE BIT(8) | ||
26 | |||
27 | #define PLLM 0x110 | ||
28 | #define PLLM_PLLM_MASK 0xff | ||
29 | |||
30 | #define PREDIV 0x114 | ||
31 | #define PLLDIV1 0x118 | ||
32 | #define PLLDIV2 0x11c | ||
33 | #define PLLDIV3 0x120 | ||
34 | #define POSTDIV 0x128 | ||
35 | #define BPDIV 0x12c | ||
36 | #define PLLCMD 0x138 | ||
37 | #define PLLSTAT 0x13c | ||
38 | #define PLLALNCTL 0x140 | ||
39 | #define PLLDCHANGE 0x144 | ||
40 | #define PLLCKEN 0x148 | ||
41 | #define PLLCKSTAT 0x14c | ||
42 | #define PLLSYSTAT 0x150 | ||
43 | #define PLLDIV4 0x160 | ||
44 | #define PLLDIV5 0x164 | ||
45 | #define PLLDIV6 0x168 | ||
46 | #define PLLDIV7 0x16c | ||
47 | #define PLLDIV8 0x170 | ||
48 | #define PLLDIV9 0x174 | ||
49 | #define PLLDIV_EN BIT(15) | ||
50 | #define PLLDIV_RATIO_MASK 0x1f | ||
51 | |||
52 | struct pll_data { | ||
53 | u32 phys_base; | ||
54 | void __iomem *base; | ||
55 | u32 num; | ||
56 | u32 flags; | ||
57 | u32 input_rate; | ||
58 | }; | ||
59 | #define PLL_HAS_PREDIV 0x01 | ||
60 | #define PLL_HAS_POSTDIV 0x02 | ||
61 | |||
14 | struct clk { | 62 | struct clk { |
15 | struct list_head node; | 63 | struct list_head node; |
16 | struct module *owner; | 64 | struct module *owner; |
17 | const char *name; | 65 | const char *name; |
18 | unsigned int *rate; | 66 | unsigned long rate; |
19 | int id; | 67 | u8 usecount; |
20 | __s8 usecount; | 68 | u8 flags; |
21 | __u8 flags; | 69 | u8 lpsc; |
22 | __u8 lpsc; | 70 | struct clk *parent; |
71 | struct pll_data *pll_data; | ||
72 | u32 div_reg; | ||
23 | }; | 73 | }; |
24 | 74 | ||
25 | /* Clock flags */ | 75 | /* Clock flags */ |
26 | #define RATE_CKCTL 1 | 76 | #define ALWAYS_ENABLED BIT(1) |
27 | #define RATE_FIXED 2 | 77 | #define CLK_PSC BIT(2) |
28 | #define RATE_PROPAGATES 4 | 78 | #define PSC_DSP BIT(3) /* PSC uses DSP domain, not ARM */ |
29 | #define VIRTUAL_CLOCK 8 | 79 | #define CLK_PLL BIT(4) /* PLL-derived clock */ |
30 | #define ALWAYS_ENABLED 16 | 80 | #define PRE_PLL BIT(5) /* source is before PLL mult/div */ |
31 | #define ENABLE_REG_32BIT 32 | 81 | |
82 | struct davinci_clk { | ||
83 | struct clk_lookup lk; | ||
84 | }; | ||
85 | |||
86 | #define CLK(dev, con, ck) \ | ||
87 | { \ | ||
88 | .lk = { \ | ||
89 | .dev_id = dev, \ | ||
90 | .con_id = con, \ | ||
91 | .clk = ck, \ | ||
92 | }, \ | ||
93 | } | ||
32 | 94 | ||
95 | int davinci_clk_init(struct davinci_clk *clocks); | ||
33 | #endif | 96 | #endif |
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c index 808633f9f03c..a31370b93dd2 100644 --- a/arch/arm/mach-davinci/devices.c +++ b/arch/arm/mach-davinci/devices.c | |||
@@ -21,6 +21,10 @@ | |||
21 | #include <mach/hardware.h> | 21 | #include <mach/hardware.h> |
22 | #include <mach/i2c.h> | 22 | #include <mach/i2c.h> |
23 | #include <mach/irqs.h> | 23 | #include <mach/irqs.h> |
24 | #include <mach/cputype.h> | ||
25 | #include <mach/mux.h> | ||
26 | |||
27 | #define DAVINCI_I2C_BASE 0x01C21000 | ||
24 | 28 | ||
25 | static struct resource i2c_resources[] = { | 29 | static struct resource i2c_resources[] = { |
26 | { | 30 | { |
@@ -43,6 +47,9 @@ static struct platform_device davinci_i2c_device = { | |||
43 | 47 | ||
44 | void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata) | 48 | void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata) |
45 | { | 49 | { |
50 | if (cpu_is_davinci_dm644x()) | ||
51 | davinci_cfg_reg(DM644X_I2C); | ||
52 | |||
46 | davinci_i2c_device.dev.platform_data = pdata; | 53 | davinci_i2c_device.dev.platform_data = pdata; |
47 | (void) platform_device_register(&davinci_i2c_device); | 54 | (void) platform_device_register(&davinci_i2c_device); |
48 | } | 55 | } |
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c new file mode 100644 index 000000000000..d428ef192eac --- /dev/null +++ b/arch/arm/mach-davinci/dm644x.c | |||
@@ -0,0 +1,461 @@ | |||
1 | /* | ||
2 | * TI DaVinci DM644x chip specific setup | ||
3 | * | ||
4 | * Author: Kevin Hilman, Deep Root Systems, LLC | ||
5 | * | ||
6 | * 2007 (c) Deep Root Systems, LLC. This file is licensed under | ||
7 | * the terms of the GNU General Public License version 2. This program | ||
8 | * is licensed "as is" without any warranty of any kind, whether express | ||
9 | * or implied. | ||
10 | */ | ||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/clk.h> | ||
14 | #include <linux/platform_device.h> | ||
15 | |||
16 | #include <mach/dm644x.h> | ||
17 | #include <mach/clock.h> | ||
18 | #include <mach/cputype.h> | ||
19 | #include <mach/edma.h> | ||
20 | #include <mach/irqs.h> | ||
21 | #include <mach/psc.h> | ||
22 | #include <mach/mux.h> | ||
23 | |||
24 | #include "clock.h" | ||
25 | #include "mux.h" | ||
26 | |||
27 | /* | ||
28 | * Device specific clocks | ||
29 | */ | ||
30 | #define DM644X_REF_FREQ 27000000 | ||
31 | |||
32 | static struct pll_data pll1_data = { | ||
33 | .num = 1, | ||
34 | .phys_base = DAVINCI_PLL1_BASE, | ||
35 | }; | ||
36 | |||
37 | static struct pll_data pll2_data = { | ||
38 | .num = 2, | ||
39 | .phys_base = DAVINCI_PLL2_BASE, | ||
40 | }; | ||
41 | |||
42 | static struct clk ref_clk = { | ||
43 | .name = "ref_clk", | ||
44 | .rate = DM644X_REF_FREQ, | ||
45 | }; | ||
46 | |||
47 | static struct clk pll1_clk = { | ||
48 | .name = "pll1", | ||
49 | .parent = &ref_clk, | ||
50 | .pll_data = &pll1_data, | ||
51 | .flags = CLK_PLL, | ||
52 | }; | ||
53 | |||
54 | static struct clk pll1_sysclk1 = { | ||
55 | .name = "pll1_sysclk1", | ||
56 | .parent = &pll1_clk, | ||
57 | .flags = CLK_PLL, | ||
58 | .div_reg = PLLDIV1, | ||
59 | }; | ||
60 | |||
61 | static struct clk pll1_sysclk2 = { | ||
62 | .name = "pll1_sysclk2", | ||
63 | .parent = &pll1_clk, | ||
64 | .flags = CLK_PLL, | ||
65 | .div_reg = PLLDIV2, | ||
66 | }; | ||
67 | |||
68 | static struct clk pll1_sysclk3 = { | ||
69 | .name = "pll1_sysclk3", | ||
70 | .parent = &pll1_clk, | ||
71 | .flags = CLK_PLL, | ||
72 | .div_reg = PLLDIV3, | ||
73 | }; | ||
74 | |||
75 | static struct clk pll1_sysclk5 = { | ||
76 | .name = "pll1_sysclk5", | ||
77 | .parent = &pll1_clk, | ||
78 | .flags = CLK_PLL, | ||
79 | .div_reg = PLLDIV5, | ||
80 | }; | ||
81 | |||
82 | static struct clk pll1_aux_clk = { | ||
83 | .name = "pll1_aux_clk", | ||
84 | .parent = &pll1_clk, | ||
85 | .flags = CLK_PLL | PRE_PLL, | ||
86 | }; | ||
87 | |||
88 | static struct clk pll1_sysclkbp = { | ||
89 | .name = "pll1_sysclkbp", | ||
90 | .parent = &pll1_clk, | ||
91 | .flags = CLK_PLL | PRE_PLL, | ||
92 | .div_reg = BPDIV | ||
93 | }; | ||
94 | |||
95 | static struct clk pll2_clk = { | ||
96 | .name = "pll2", | ||
97 | .parent = &ref_clk, | ||
98 | .pll_data = &pll2_data, | ||
99 | .flags = CLK_PLL, | ||
100 | }; | ||
101 | |||
102 | static struct clk pll2_sysclk1 = { | ||
103 | .name = "pll2_sysclk1", | ||
104 | .parent = &pll2_clk, | ||
105 | .flags = CLK_PLL, | ||
106 | .div_reg = PLLDIV1, | ||
107 | }; | ||
108 | |||
109 | static struct clk pll2_sysclk2 = { | ||
110 | .name = "pll2_sysclk2", | ||
111 | .parent = &pll2_clk, | ||
112 | .flags = CLK_PLL, | ||
113 | .div_reg = PLLDIV2, | ||
114 | }; | ||
115 | |||
116 | static struct clk pll2_sysclkbp = { | ||
117 | .name = "pll2_sysclkbp", | ||
118 | .parent = &pll2_clk, | ||
119 | .flags = CLK_PLL | PRE_PLL, | ||
120 | .div_reg = BPDIV | ||
121 | }; | ||
122 | |||
123 | static struct clk dsp_clk = { | ||
124 | .name = "dsp", | ||
125 | .parent = &pll1_sysclk1, | ||
126 | .lpsc = DAVINCI_LPSC_GEM, | ||
127 | .flags = PSC_DSP, | ||
128 | .usecount = 1, /* REVISIT how to disable? */ | ||
129 | }; | ||
130 | |||
131 | static struct clk arm_clk = { | ||
132 | .name = "arm", | ||
133 | .parent = &pll1_sysclk2, | ||
134 | .lpsc = DAVINCI_LPSC_ARM, | ||
135 | .flags = ALWAYS_ENABLED, | ||
136 | }; | ||
137 | |||
138 | static struct clk vicp_clk = { | ||
139 | .name = "vicp", | ||
140 | .parent = &pll1_sysclk2, | ||
141 | .lpsc = DAVINCI_LPSC_IMCOP, | ||
142 | .flags = PSC_DSP, | ||
143 | .usecount = 1, /* REVISIT how to disable? */ | ||
144 | }; | ||
145 | |||
146 | static struct clk vpss_master_clk = { | ||
147 | .name = "vpss_master", | ||
148 | .parent = &pll1_sysclk3, | ||
149 | .lpsc = DAVINCI_LPSC_VPSSMSTR, | ||
150 | .flags = CLK_PSC, | ||
151 | }; | ||
152 | |||
153 | static struct clk vpss_slave_clk = { | ||
154 | .name = "vpss_slave", | ||
155 | .parent = &pll1_sysclk3, | ||
156 | .lpsc = DAVINCI_LPSC_VPSSSLV, | ||
157 | }; | ||
158 | |||
159 | static struct clk uart0_clk = { | ||
160 | .name = "uart0", | ||
161 | .parent = &pll1_aux_clk, | ||
162 | .lpsc = DAVINCI_LPSC_UART0, | ||
163 | }; | ||
164 | |||
165 | static struct clk uart1_clk = { | ||
166 | .name = "uart1", | ||
167 | .parent = &pll1_aux_clk, | ||
168 | .lpsc = DAVINCI_LPSC_UART1, | ||
169 | }; | ||
170 | |||
171 | static struct clk uart2_clk = { | ||
172 | .name = "uart2", | ||
173 | .parent = &pll1_aux_clk, | ||
174 | .lpsc = DAVINCI_LPSC_UART2, | ||
175 | }; | ||
176 | |||
177 | static struct clk emac_clk = { | ||
178 | .name = "emac", | ||
179 | .parent = &pll1_sysclk5, | ||
180 | .lpsc = DAVINCI_LPSC_EMAC_WRAPPER, | ||
181 | }; | ||
182 | |||
183 | static struct clk i2c_clk = { | ||
184 | .name = "i2c", | ||
185 | .parent = &pll1_aux_clk, | ||
186 | .lpsc = DAVINCI_LPSC_I2C, | ||
187 | }; | ||
188 | |||
189 | static struct clk ide_clk = { | ||
190 | .name = "ide", | ||
191 | .parent = &pll1_sysclk5, | ||
192 | .lpsc = DAVINCI_LPSC_ATA, | ||
193 | }; | ||
194 | |||
195 | static struct clk asp_clk = { | ||
196 | .name = "asp0", | ||
197 | .parent = &pll1_sysclk5, | ||
198 | .lpsc = DAVINCI_LPSC_McBSP, | ||
199 | }; | ||
200 | |||
201 | static struct clk mmcsd_clk = { | ||
202 | .name = "mmcsd", | ||
203 | .parent = &pll1_sysclk5, | ||
204 | .lpsc = DAVINCI_LPSC_MMC_SD, | ||
205 | }; | ||
206 | |||
207 | static struct clk spi_clk = { | ||
208 | .name = "spi", | ||
209 | .parent = &pll1_sysclk5, | ||
210 | .lpsc = DAVINCI_LPSC_SPI, | ||
211 | }; | ||
212 | |||
213 | static struct clk gpio_clk = { | ||
214 | .name = "gpio", | ||
215 | .parent = &pll1_sysclk5, | ||
216 | .lpsc = DAVINCI_LPSC_GPIO, | ||
217 | }; | ||
218 | |||
219 | static struct clk usb_clk = { | ||
220 | .name = "usb", | ||
221 | .parent = &pll1_sysclk5, | ||
222 | .lpsc = DAVINCI_LPSC_USB, | ||
223 | }; | ||
224 | |||
225 | static struct clk vlynq_clk = { | ||
226 | .name = "vlynq", | ||
227 | .parent = &pll1_sysclk5, | ||
228 | .lpsc = DAVINCI_LPSC_VLYNQ, | ||
229 | }; | ||
230 | |||
231 | static struct clk aemif_clk = { | ||
232 | .name = "aemif", | ||
233 | .parent = &pll1_sysclk5, | ||
234 | .lpsc = DAVINCI_LPSC_AEMIF, | ||
235 | }; | ||
236 | |||
237 | static struct clk pwm0_clk = { | ||
238 | .name = "pwm0", | ||
239 | .parent = &pll1_aux_clk, | ||
240 | .lpsc = DAVINCI_LPSC_PWM0, | ||
241 | }; | ||
242 | |||
243 | static struct clk pwm1_clk = { | ||
244 | .name = "pwm1", | ||
245 | .parent = &pll1_aux_clk, | ||
246 | .lpsc = DAVINCI_LPSC_PWM1, | ||
247 | }; | ||
248 | |||
249 | static struct clk pwm2_clk = { | ||
250 | .name = "pwm2", | ||
251 | .parent = &pll1_aux_clk, | ||
252 | .lpsc = DAVINCI_LPSC_PWM2, | ||
253 | }; | ||
254 | |||
255 | static struct clk timer0_clk = { | ||
256 | .name = "timer0", | ||
257 | .parent = &pll1_aux_clk, | ||
258 | .lpsc = DAVINCI_LPSC_TIMER0, | ||
259 | }; | ||
260 | |||
261 | static struct clk timer1_clk = { | ||
262 | .name = "timer1", | ||
263 | .parent = &pll1_aux_clk, | ||
264 | .lpsc = DAVINCI_LPSC_TIMER1, | ||
265 | }; | ||
266 | |||
267 | static struct clk timer2_clk = { | ||
268 | .name = "timer2", | ||
269 | .parent = &pll1_aux_clk, | ||
270 | .lpsc = DAVINCI_LPSC_TIMER2, | ||
271 | .usecount = 1, /* REVISIT: why cant' this be disabled? */ | ||
272 | }; | ||
273 | |||
274 | struct davinci_clk dm644x_clks[] = { | ||
275 | CLK(NULL, "ref", &ref_clk), | ||
276 | CLK(NULL, "pll1", &pll1_clk), | ||
277 | CLK(NULL, "pll1_sysclk1", &pll1_sysclk1), | ||
278 | CLK(NULL, "pll1_sysclk2", &pll1_sysclk2), | ||
279 | CLK(NULL, "pll1_sysclk3", &pll1_sysclk3), | ||
280 | CLK(NULL, "pll1_sysclk5", &pll1_sysclk5), | ||
281 | CLK(NULL, "pll1_aux", &pll1_aux_clk), | ||
282 | CLK(NULL, "pll1_sysclkbp", &pll1_sysclkbp), | ||
283 | CLK(NULL, "pll2", &pll2_clk), | ||
284 | CLK(NULL, "pll2_sysclk1", &pll2_sysclk1), | ||
285 | CLK(NULL, "pll2_sysclk2", &pll2_sysclk2), | ||
286 | CLK(NULL, "pll2_sysclkbp", &pll2_sysclkbp), | ||
287 | CLK(NULL, "dsp", &dsp_clk), | ||
288 | CLK(NULL, "arm", &arm_clk), | ||
289 | CLK(NULL, "vicp", &vicp_clk), | ||
290 | CLK(NULL, "vpss_master", &vpss_master_clk), | ||
291 | CLK(NULL, "vpss_slave", &vpss_slave_clk), | ||
292 | CLK(NULL, "arm", &arm_clk), | ||
293 | CLK(NULL, "uart0", &uart0_clk), | ||
294 | CLK(NULL, "uart1", &uart1_clk), | ||
295 | CLK(NULL, "uart2", &uart2_clk), | ||
296 | CLK("davinci_emac.1", NULL, &emac_clk), | ||
297 | CLK("i2c_davinci.1", NULL, &i2c_clk), | ||
298 | CLK("palm_bk3710", NULL, &ide_clk), | ||
299 | CLK("soc-audio.0", NULL, &asp_clk), | ||
300 | CLK("davinci_mmc.0", NULL, &mmcsd_clk), | ||
301 | CLK(NULL, "spi", &spi_clk), | ||
302 | CLK(NULL, "gpio", &gpio_clk), | ||
303 | CLK(NULL, "usb", &usb_clk), | ||
304 | CLK(NULL, "vlynq", &vlynq_clk), | ||
305 | CLK(NULL, "aemif", &aemif_clk), | ||
306 | CLK(NULL, "pwm0", &pwm0_clk), | ||
307 | CLK(NULL, "pwm1", &pwm1_clk), | ||
308 | CLK(NULL, "pwm2", &pwm2_clk), | ||
309 | CLK(NULL, "timer0", &timer0_clk), | ||
310 | CLK(NULL, "timer1", &timer1_clk), | ||
311 | CLK("watchdog", NULL, &timer2_clk), | ||
312 | CLK(NULL, NULL, NULL), | ||
313 | }; | ||
314 | |||
315 | #if defined(CONFIG_TI_DAVINCI_EMAC) || defined(CONFIG_TI_DAVINCI_EMAC_MODULE) | ||
316 | |||
317 | static struct resource dm644x_emac_resources[] = { | ||
318 | { | ||
319 | .start = DM644X_EMAC_BASE, | ||
320 | .end = DM644X_EMAC_BASE + 0x47ff, | ||
321 | .flags = IORESOURCE_MEM, | ||
322 | }, | ||
323 | { | ||
324 | .start = IRQ_EMACINT, | ||
325 | .end = IRQ_EMACINT, | ||
326 | .flags = IORESOURCE_IRQ, | ||
327 | }, | ||
328 | }; | ||
329 | |||
330 | static struct platform_device dm644x_emac_device = { | ||
331 | .name = "davinci_emac", | ||
332 | .id = 1, | ||
333 | .num_resources = ARRAY_SIZE(dm644x_emac_resources), | ||
334 | .resource = dm644x_emac_resources, | ||
335 | }; | ||
336 | |||
337 | #endif | ||
338 | |||
339 | /* | ||
340 | * Device specific mux setup | ||
341 | * | ||
342 | * soc description mux mode mode mux dbg | ||
343 | * reg offset mask mode | ||
344 | */ | ||
345 | static const struct mux_config dm644x_pins[] = { | ||
346 | MUX_CFG(DM644X, HDIREN, 0, 16, 1, 1, true) | ||
347 | MUX_CFG(DM644X, ATAEN, 0, 17, 1, 1, true) | ||
348 | MUX_CFG(DM644X, ATAEN_DISABLE, 0, 17, 1, 0, true) | ||
349 | |||
350 | MUX_CFG(DM644X, HPIEN_DISABLE, 0, 29, 1, 0, true) | ||
351 | |||
352 | MUX_CFG(DM644X, AEAW, 0, 0, 31, 31, true) | ||
353 | |||
354 | MUX_CFG(DM644X, MSTK, 1, 9, 1, 0, false) | ||
355 | |||
356 | MUX_CFG(DM644X, I2C, 1, 7, 1, 1, false) | ||
357 | |||
358 | MUX_CFG(DM644X, MCBSP, 1, 10, 1, 1, false) | ||
359 | |||
360 | MUX_CFG(DM644X, UART1, 1, 1, 1, 1, true) | ||
361 | MUX_CFG(DM644X, UART2, 1, 2, 1, 1, true) | ||
362 | |||
363 | MUX_CFG(DM644X, PWM0, 1, 4, 1, 1, false) | ||
364 | |||
365 | MUX_CFG(DM644X, PWM1, 1, 5, 1, 1, false) | ||
366 | |||
367 | MUX_CFG(DM644X, PWM2, 1, 6, 1, 1, false) | ||
368 | |||
369 | MUX_CFG(DM644X, VLYNQEN, 0, 15, 1, 1, false) | ||
370 | MUX_CFG(DM644X, VLSCREN, 0, 14, 1, 1, false) | ||
371 | MUX_CFG(DM644X, VLYNQWD, 0, 12, 3, 3, false) | ||
372 | |||
373 | MUX_CFG(DM644X, EMACEN, 0, 31, 1, 1, true) | ||
374 | |||
375 | MUX_CFG(DM644X, GPIO3V, 0, 31, 1, 0, true) | ||
376 | |||
377 | MUX_CFG(DM644X, GPIO0, 0, 24, 1, 0, true) | ||
378 | MUX_CFG(DM644X, GPIO3, 0, 25, 1, 0, false) | ||
379 | MUX_CFG(DM644X, GPIO43_44, 1, 7, 1, 0, false) | ||
380 | MUX_CFG(DM644X, GPIO46_47, 0, 22, 1, 0, true) | ||
381 | |||
382 | MUX_CFG(DM644X, RGB666, 0, 22, 1, 1, true) | ||
383 | |||
384 | MUX_CFG(DM644X, LOEEN, 0, 24, 1, 1, true) | ||
385 | MUX_CFG(DM644X, LFLDEN, 0, 25, 1, 1, false) | ||
386 | }; | ||
387 | |||
388 | |||
389 | /*----------------------------------------------------------------------*/ | ||
390 | |||
391 | static const s8 dma_chan_dm644x_no_event[] = { | ||
392 | 0, 1, 12, 13, 14, | ||
393 | 15, 25, 30, 31, 45, | ||
394 | 46, 47, 55, 56, 57, | ||
395 | 58, 59, 60, 61, 62, | ||
396 | 63, | ||
397 | -1 | ||
398 | }; | ||
399 | |||
400 | static struct edma_soc_info dm644x_edma_info = { | ||
401 | .n_channel = 64, | ||
402 | .n_region = 4, | ||
403 | .n_slot = 128, | ||
404 | .n_tc = 2, | ||
405 | .noevent = dma_chan_dm644x_no_event, | ||
406 | }; | ||
407 | |||
408 | static struct resource edma_resources[] = { | ||
409 | { | ||
410 | .name = "edma_cc", | ||
411 | .start = 0x01c00000, | ||
412 | .end = 0x01c00000 + SZ_64K - 1, | ||
413 | .flags = IORESOURCE_MEM, | ||
414 | }, | ||
415 | { | ||
416 | .name = "edma_tc0", | ||
417 | .start = 0x01c10000, | ||
418 | .end = 0x01c10000 + SZ_1K - 1, | ||
419 | .flags = IORESOURCE_MEM, | ||
420 | }, | ||
421 | { | ||
422 | .name = "edma_tc1", | ||
423 | .start = 0x01c10400, | ||
424 | .end = 0x01c10400 + SZ_1K - 1, | ||
425 | .flags = IORESOURCE_MEM, | ||
426 | }, | ||
427 | { | ||
428 | .start = IRQ_CCINT0, | ||
429 | .flags = IORESOURCE_IRQ, | ||
430 | }, | ||
431 | { | ||
432 | .start = IRQ_CCERRINT, | ||
433 | .flags = IORESOURCE_IRQ, | ||
434 | }, | ||
435 | /* not using TC*_ERR */ | ||
436 | }; | ||
437 | |||
438 | static struct platform_device dm644x_edma_device = { | ||
439 | .name = "edma", | ||
440 | .id = -1, | ||
441 | .dev.platform_data = &dm644x_edma_info, | ||
442 | .num_resources = ARRAY_SIZE(edma_resources), | ||
443 | .resource = edma_resources, | ||
444 | }; | ||
445 | |||
446 | /*----------------------------------------------------------------------*/ | ||
447 | void __init dm644x_init(void) | ||
448 | { | ||
449 | davinci_clk_init(dm644x_clks); | ||
450 | davinci_mux_register(dm644x_pins, ARRAY_SIZE(dm644x_pins)); | ||
451 | } | ||
452 | |||
453 | static int __init dm644x_init_devices(void) | ||
454 | { | ||
455 | if (!cpu_is_davinci_dm644x()) | ||
456 | return 0; | ||
457 | |||
458 | platform_device_register(&dm644x_edma_device); | ||
459 | return 0; | ||
460 | } | ||
461 | postcore_initcall(dm644x_init_devices); | ||
diff --git a/arch/arm/mach-davinci/dma.c b/arch/arm/mach-davinci/dma.c new file mode 100644 index 000000000000..15e9eb158bb7 --- /dev/null +++ b/arch/arm/mach-davinci/dma.c | |||
@@ -0,0 +1,1135 @@ | |||
1 | /* | ||
2 | * EDMA3 support for DaVinci | ||
3 | * | ||
4 | * Copyright (C) 2006-2009 Texas Instruments. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
19 | */ | ||
20 | #include <linux/kernel.h> | ||
21 | #include <linux/sched.h> | ||
22 | #include <linux/init.h> | ||
23 | #include <linux/module.h> | ||
24 | #include <linux/interrupt.h> | ||
25 | #include <linux/platform_device.h> | ||
26 | #include <linux/spinlock.h> | ||
27 | #include <linux/compiler.h> | ||
28 | #include <linux/io.h> | ||
29 | |||
30 | #include <mach/cputype.h> | ||
31 | #include <mach/memory.h> | ||
32 | #include <mach/hardware.h> | ||
33 | #include <mach/irqs.h> | ||
34 | #include <mach/edma.h> | ||
35 | #include <mach/mux.h> | ||
36 | |||
37 | |||
38 | /* Offsets matching "struct edmacc_param" */ | ||
39 | #define PARM_OPT 0x00 | ||
40 | #define PARM_SRC 0x04 | ||
41 | #define PARM_A_B_CNT 0x08 | ||
42 | #define PARM_DST 0x0c | ||
43 | #define PARM_SRC_DST_BIDX 0x10 | ||
44 | #define PARM_LINK_BCNTRLD 0x14 | ||
45 | #define PARM_SRC_DST_CIDX 0x18 | ||
46 | #define PARM_CCNT 0x1c | ||
47 | |||
48 | #define PARM_SIZE 0x20 | ||
49 | |||
50 | /* Offsets for EDMA CC global channel registers and their shadows */ | ||
51 | #define SH_ER 0x00 /* 64 bits */ | ||
52 | #define SH_ECR 0x08 /* 64 bits */ | ||
53 | #define SH_ESR 0x10 /* 64 bits */ | ||
54 | #define SH_CER 0x18 /* 64 bits */ | ||
55 | #define SH_EER 0x20 /* 64 bits */ | ||
56 | #define SH_EECR 0x28 /* 64 bits */ | ||
57 | #define SH_EESR 0x30 /* 64 bits */ | ||
58 | #define SH_SER 0x38 /* 64 bits */ | ||
59 | #define SH_SECR 0x40 /* 64 bits */ | ||
60 | #define SH_IER 0x50 /* 64 bits */ | ||
61 | #define SH_IECR 0x58 /* 64 bits */ | ||
62 | #define SH_IESR 0x60 /* 64 bits */ | ||
63 | #define SH_IPR 0x68 /* 64 bits */ | ||
64 | #define SH_ICR 0x70 /* 64 bits */ | ||
65 | #define SH_IEVAL 0x78 | ||
66 | #define SH_QER 0x80 | ||
67 | #define SH_QEER 0x84 | ||
68 | #define SH_QEECR 0x88 | ||
69 | #define SH_QEESR 0x8c | ||
70 | #define SH_QSER 0x90 | ||
71 | #define SH_QSECR 0x94 | ||
72 | #define SH_SIZE 0x200 | ||
73 | |||
74 | /* Offsets for EDMA CC global registers */ | ||
75 | #define EDMA_REV 0x0000 | ||
76 | #define EDMA_CCCFG 0x0004 | ||
77 | #define EDMA_QCHMAP 0x0200 /* 8 registers */ | ||
78 | #define EDMA_DMAQNUM 0x0240 /* 8 registers (4 on OMAP-L1xx) */ | ||
79 | #define EDMA_QDMAQNUM 0x0260 | ||
80 | #define EDMA_QUETCMAP 0x0280 | ||
81 | #define EDMA_QUEPRI 0x0284 | ||
82 | #define EDMA_EMR 0x0300 /* 64 bits */ | ||
83 | #define EDMA_EMCR 0x0308 /* 64 bits */ | ||
84 | #define EDMA_QEMR 0x0310 | ||
85 | #define EDMA_QEMCR 0x0314 | ||
86 | #define EDMA_CCERR 0x0318 | ||
87 | #define EDMA_CCERRCLR 0x031c | ||
88 | #define EDMA_EEVAL 0x0320 | ||
89 | #define EDMA_DRAE 0x0340 /* 4 x 64 bits*/ | ||
90 | #define EDMA_QRAE 0x0380 /* 4 registers */ | ||
91 | #define EDMA_QUEEVTENTRY 0x0400 /* 2 x 16 registers */ | ||
92 | #define EDMA_QSTAT 0x0600 /* 2 registers */ | ||
93 | #define EDMA_QWMTHRA 0x0620 | ||
94 | #define EDMA_QWMTHRB 0x0624 | ||
95 | #define EDMA_CCSTAT 0x0640 | ||
96 | |||
97 | #define EDMA_M 0x1000 /* global channel registers */ | ||
98 | #define EDMA_ECR 0x1008 | ||
99 | #define EDMA_ECRH 0x100C | ||
100 | #define EDMA_SHADOW0 0x2000 /* 4 regions shadowing global channels */ | ||
101 | #define EDMA_PARM 0x4000 /* 128 param entries */ | ||
102 | |||
103 | #define DAVINCI_DMA_3PCC_BASE 0x01C00000 | ||
104 | |||
105 | #define PARM_OFFSET(param_no) (EDMA_PARM + ((param_no) << 5)) | ||
106 | |||
107 | #define EDMA_MAX_DMACH 64 | ||
108 | #define EDMA_MAX_PARAMENTRY 512 | ||
109 | #define EDMA_MAX_EVQUE 2 /* FIXME too small */ | ||
110 | |||
111 | |||
112 | /*****************************************************************************/ | ||
113 | |||
114 | static void __iomem *edmacc_regs_base; | ||
115 | |||
116 | static inline unsigned int edma_read(int offset) | ||
117 | { | ||
118 | return (unsigned int)__raw_readl(edmacc_regs_base + offset); | ||
119 | } | ||
120 | |||
121 | static inline void edma_write(int offset, int val) | ||
122 | { | ||
123 | __raw_writel(val, edmacc_regs_base + offset); | ||
124 | } | ||
125 | static inline void edma_modify(int offset, unsigned and, unsigned or) | ||
126 | { | ||
127 | unsigned val = edma_read(offset); | ||
128 | val &= and; | ||
129 | val |= or; | ||
130 | edma_write(offset, val); | ||
131 | } | ||
132 | static inline void edma_and(int offset, unsigned and) | ||
133 | { | ||
134 | unsigned val = edma_read(offset); | ||
135 | val &= and; | ||
136 | edma_write(offset, val); | ||
137 | } | ||
138 | static inline void edma_or(int offset, unsigned or) | ||
139 | { | ||
140 | unsigned val = edma_read(offset); | ||
141 | val |= or; | ||
142 | edma_write(offset, val); | ||
143 | } | ||
144 | static inline unsigned int edma_read_array(int offset, int i) | ||
145 | { | ||
146 | return edma_read(offset + (i << 2)); | ||
147 | } | ||
148 | static inline void edma_write_array(int offset, int i, unsigned val) | ||
149 | { | ||
150 | edma_write(offset + (i << 2), val); | ||
151 | } | ||
152 | static inline void edma_modify_array(int offset, int i, | ||
153 | unsigned and, unsigned or) | ||
154 | { | ||
155 | edma_modify(offset + (i << 2), and, or); | ||
156 | } | ||
157 | static inline void edma_or_array(int offset, int i, unsigned or) | ||
158 | { | ||
159 | edma_or(offset + (i << 2), or); | ||
160 | } | ||
161 | static inline void edma_or_array2(int offset, int i, int j, unsigned or) | ||
162 | { | ||
163 | edma_or(offset + ((i*2 + j) << 2), or); | ||
164 | } | ||
165 | static inline void edma_write_array2(int offset, int i, int j, unsigned val) | ||
166 | { | ||
167 | edma_write(offset + ((i*2 + j) << 2), val); | ||
168 | } | ||
169 | static inline unsigned int edma_shadow0_read(int offset) | ||
170 | { | ||
171 | return edma_read(EDMA_SHADOW0 + offset); | ||
172 | } | ||
173 | static inline unsigned int edma_shadow0_read_array(int offset, int i) | ||
174 | { | ||
175 | return edma_read(EDMA_SHADOW0 + offset + (i << 2)); | ||
176 | } | ||
177 | static inline void edma_shadow0_write(int offset, unsigned val) | ||
178 | { | ||
179 | edma_write(EDMA_SHADOW0 + offset, val); | ||
180 | } | ||
181 | static inline void edma_shadow0_write_array(int offset, int i, unsigned val) | ||
182 | { | ||
183 | edma_write(EDMA_SHADOW0 + offset + (i << 2), val); | ||
184 | } | ||
185 | static inline unsigned int edma_parm_read(int offset, int param_no) | ||
186 | { | ||
187 | return edma_read(EDMA_PARM + offset + (param_no << 5)); | ||
188 | } | ||
189 | static inline void edma_parm_write(int offset, int param_no, unsigned val) | ||
190 | { | ||
191 | edma_write(EDMA_PARM + offset + (param_no << 5), val); | ||
192 | } | ||
193 | static inline void edma_parm_modify(int offset, int param_no, | ||
194 | unsigned and, unsigned or) | ||
195 | { | ||
196 | edma_modify(EDMA_PARM + offset + (param_no << 5), and, or); | ||
197 | } | ||
198 | static inline void edma_parm_and(int offset, int param_no, unsigned and) | ||
199 | { | ||
200 | edma_and(EDMA_PARM + offset + (param_no << 5), and); | ||
201 | } | ||
202 | static inline void edma_parm_or(int offset, int param_no, unsigned or) | ||
203 | { | ||
204 | edma_or(EDMA_PARM + offset + (param_no << 5), or); | ||
205 | } | ||
206 | |||
207 | /*****************************************************************************/ | ||
208 | |||
209 | /* actual number of DMA channels and slots on this silicon */ | ||
210 | static unsigned num_channels; | ||
211 | static unsigned num_slots; | ||
212 | |||
213 | static struct dma_interrupt_data { | ||
214 | void (*callback)(unsigned channel, unsigned short ch_status, | ||
215 | void *data); | ||
216 | void *data; | ||
217 | } intr_data[EDMA_MAX_DMACH]; | ||
218 | |||
219 | /* The edma_inuse bit for each PaRAM slot is clear unless the | ||
220 | * channel is in use ... by ARM or DSP, for QDMA, or whatever. | ||
221 | */ | ||
222 | static DECLARE_BITMAP(edma_inuse, EDMA_MAX_PARAMENTRY); | ||
223 | |||
224 | /* The edma_noevent bit for each channel is clear unless | ||
225 | * it doesn't trigger DMA events on this platform. It uses a | ||
226 | * bit of SOC-specific initialization code. | ||
227 | */ | ||
228 | static DECLARE_BITMAP(edma_noevent, EDMA_MAX_DMACH); | ||
229 | |||
230 | /* dummy param set used to (re)initialize parameter RAM slots */ | ||
231 | static const struct edmacc_param dummy_paramset = { | ||
232 | .link_bcntrld = 0xffff, | ||
233 | .ccnt = 1, | ||
234 | }; | ||
235 | |||
236 | static const int __initconst | ||
237 | queue_tc_mapping[EDMA_MAX_EVQUE + 1][2] = { | ||
238 | /* {event queue no, TC no} */ | ||
239 | {0, 0}, | ||
240 | {1, 1}, | ||
241 | {-1, -1} | ||
242 | }; | ||
243 | |||
244 | static const int __initconst | ||
245 | queue_priority_mapping[EDMA_MAX_EVQUE + 1][2] = { | ||
246 | /* {event queue no, Priority} */ | ||
247 | {0, 3}, | ||
248 | {1, 7}, | ||
249 | {-1, -1} | ||
250 | }; | ||
251 | |||
252 | /*****************************************************************************/ | ||
253 | |||
254 | static void map_dmach_queue(unsigned ch_no, enum dma_event_q queue_no) | ||
255 | { | ||
256 | int bit = (ch_no & 0x7) * 4; | ||
257 | |||
258 | /* default to low priority queue */ | ||
259 | if (queue_no == EVENTQ_DEFAULT) | ||
260 | queue_no = EVENTQ_1; | ||
261 | |||
262 | queue_no &= 7; | ||
263 | edma_modify_array(EDMA_DMAQNUM, (ch_no >> 3), | ||
264 | ~(0x7 << bit), queue_no << bit); | ||
265 | } | ||
266 | |||
267 | static void __init map_queue_tc(int queue_no, int tc_no) | ||
268 | { | ||
269 | int bit = queue_no * 4; | ||
270 | edma_modify(EDMA_QUETCMAP, ~(0x7 << bit), ((tc_no & 0x7) << bit)); | ||
271 | } | ||
272 | |||
273 | static void __init assign_priority_to_queue(int queue_no, int priority) | ||
274 | { | ||
275 | int bit = queue_no * 4; | ||
276 | edma_modify(EDMA_QUEPRI, ~(0x7 << bit), ((priority & 0x7) << bit)); | ||
277 | } | ||
278 | |||
279 | static inline void | ||
280 | setup_dma_interrupt(unsigned lch, | ||
281 | void (*callback)(unsigned channel, u16 ch_status, void *data), | ||
282 | void *data) | ||
283 | { | ||
284 | if (!callback) { | ||
285 | edma_shadow0_write_array(SH_IECR, lch >> 5, | ||
286 | (1 << (lch & 0x1f))); | ||
287 | } | ||
288 | |||
289 | intr_data[lch].callback = callback; | ||
290 | intr_data[lch].data = data; | ||
291 | |||
292 | if (callback) { | ||
293 | edma_shadow0_write_array(SH_ICR, lch >> 5, | ||
294 | (1 << (lch & 0x1f))); | ||
295 | edma_shadow0_write_array(SH_IESR, lch >> 5, | ||
296 | (1 << (lch & 0x1f))); | ||
297 | } | ||
298 | } | ||
299 | |||
300 | /****************************************************************************** | ||
301 | * | ||
302 | * DMA interrupt handler | ||
303 | * | ||
304 | *****************************************************************************/ | ||
305 | static irqreturn_t dma_irq_handler(int irq, void *data) | ||
306 | { | ||
307 | int i; | ||
308 | unsigned int cnt = 0; | ||
309 | |||
310 | dev_dbg(data, "dma_irq_handler\n"); | ||
311 | |||
312 | if ((edma_shadow0_read_array(SH_IPR, 0) == 0) | ||
313 | && (edma_shadow0_read_array(SH_IPR, 1) == 0)) | ||
314 | return IRQ_NONE; | ||
315 | |||
316 | while (1) { | ||
317 | int j; | ||
318 | if (edma_shadow0_read_array(SH_IPR, 0)) | ||
319 | j = 0; | ||
320 | else if (edma_shadow0_read_array(SH_IPR, 1)) | ||
321 | j = 1; | ||
322 | else | ||
323 | break; | ||
324 | dev_dbg(data, "IPR%d %08x\n", j, | ||
325 | edma_shadow0_read_array(SH_IPR, j)); | ||
326 | for (i = 0; i < 32; i++) { | ||
327 | int k = (j << 5) + i; | ||
328 | if (edma_shadow0_read_array(SH_IPR, j) & (1 << i)) { | ||
329 | /* Clear the corresponding IPR bits */ | ||
330 | edma_shadow0_write_array(SH_ICR, j, (1 << i)); | ||
331 | if (intr_data[k].callback) { | ||
332 | intr_data[k].callback(k, DMA_COMPLETE, | ||
333 | intr_data[k].data); | ||
334 | } | ||
335 | } | ||
336 | } | ||
337 | cnt++; | ||
338 | if (cnt > 10) | ||
339 | break; | ||
340 | } | ||
341 | edma_shadow0_write(SH_IEVAL, 1); | ||
342 | return IRQ_HANDLED; | ||
343 | } | ||
344 | |||
345 | /****************************************************************************** | ||
346 | * | ||
347 | * DMA error interrupt handler | ||
348 | * | ||
349 | *****************************************************************************/ | ||
350 | static irqreturn_t dma_ccerr_handler(int irq, void *data) | ||
351 | { | ||
352 | int i; | ||
353 | unsigned int cnt = 0; | ||
354 | |||
355 | dev_dbg(data, "dma_ccerr_handler\n"); | ||
356 | |||
357 | if ((edma_read_array(EDMA_EMR, 0) == 0) && | ||
358 | (edma_read_array(EDMA_EMR, 1) == 0) && | ||
359 | (edma_read(EDMA_QEMR) == 0) && (edma_read(EDMA_CCERR) == 0)) | ||
360 | return IRQ_NONE; | ||
361 | |||
362 | while (1) { | ||
363 | int j = -1; | ||
364 | if (edma_read_array(EDMA_EMR, 0)) | ||
365 | j = 0; | ||
366 | else if (edma_read_array(EDMA_EMR, 1)) | ||
367 | j = 1; | ||
368 | if (j >= 0) { | ||
369 | dev_dbg(data, "EMR%d %08x\n", j, | ||
370 | edma_read_array(EDMA_EMR, j)); | ||
371 | for (i = 0; i < 32; i++) { | ||
372 | int k = (j << 5) + i; | ||
373 | if (edma_read_array(EDMA_EMR, j) & (1 << i)) { | ||
374 | /* Clear the corresponding EMR bits */ | ||
375 | edma_write_array(EDMA_EMCR, j, 1 << i); | ||
376 | /* Clear any SER */ | ||
377 | edma_shadow0_write_array(SH_SECR, j, | ||
378 | (1 << i)); | ||
379 | if (intr_data[k].callback) { | ||
380 | intr_data[k].callback(k, | ||
381 | DMA_CC_ERROR, | ||
382 | intr_data | ||
383 | [k].data); | ||
384 | } | ||
385 | } | ||
386 | } | ||
387 | } else if (edma_read(EDMA_QEMR)) { | ||
388 | dev_dbg(data, "QEMR %02x\n", | ||
389 | edma_read(EDMA_QEMR)); | ||
390 | for (i = 0; i < 8; i++) { | ||
391 | if (edma_read(EDMA_QEMR) & (1 << i)) { | ||
392 | /* Clear the corresponding IPR bits */ | ||
393 | edma_write(EDMA_QEMCR, 1 << i); | ||
394 | edma_shadow0_write(SH_QSECR, (1 << i)); | ||
395 | |||
396 | /* NOTE: not reported!! */ | ||
397 | } | ||
398 | } | ||
399 | } else if (edma_read(EDMA_CCERR)) { | ||
400 | dev_dbg(data, "CCERR %08x\n", | ||
401 | edma_read(EDMA_CCERR)); | ||
402 | /* FIXME: CCERR.BIT(16) ignored! much better | ||
403 | * to just write CCERRCLR with CCERR value... | ||
404 | */ | ||
405 | for (i = 0; i < 8; i++) { | ||
406 | if (edma_read(EDMA_CCERR) & (1 << i)) { | ||
407 | /* Clear the corresponding IPR bits */ | ||
408 | edma_write(EDMA_CCERRCLR, 1 << i); | ||
409 | |||
410 | /* NOTE: not reported!! */ | ||
411 | } | ||
412 | } | ||
413 | } | ||
414 | if ((edma_read_array(EDMA_EMR, 0) == 0) | ||
415 | && (edma_read_array(EDMA_EMR, 1) == 0) | ||
416 | && (edma_read(EDMA_QEMR) == 0) | ||
417 | && (edma_read(EDMA_CCERR) == 0)) { | ||
418 | break; | ||
419 | } | ||
420 | cnt++; | ||
421 | if (cnt > 10) | ||
422 | break; | ||
423 | } | ||
424 | edma_write(EDMA_EEVAL, 1); | ||
425 | return IRQ_HANDLED; | ||
426 | } | ||
427 | |||
428 | /****************************************************************************** | ||
429 | * | ||
430 | * Transfer controller error interrupt handlers | ||
431 | * | ||
432 | *****************************************************************************/ | ||
433 | |||
434 | #define tc_errs_handled false /* disabled as long as they're NOPs */ | ||
435 | |||
436 | static irqreturn_t dma_tc0err_handler(int irq, void *data) | ||
437 | { | ||
438 | dev_dbg(data, "dma_tc0err_handler\n"); | ||
439 | return IRQ_HANDLED; | ||
440 | } | ||
441 | |||
442 | static irqreturn_t dma_tc1err_handler(int irq, void *data) | ||
443 | { | ||
444 | dev_dbg(data, "dma_tc1err_handler\n"); | ||
445 | return IRQ_HANDLED; | ||
446 | } | ||
447 | |||
448 | /*-----------------------------------------------------------------------*/ | ||
449 | |||
450 | /* Resource alloc/free: dma channels, parameter RAM slots */ | ||
451 | |||
452 | /** | ||
453 | * edma_alloc_channel - allocate DMA channel and paired parameter RAM | ||
454 | * @channel: specific channel to allocate; negative for "any unmapped channel" | ||
455 | * @callback: optional; to be issued on DMA completion or errors | ||
456 | * @data: passed to callback | ||
457 | * @eventq_no: an EVENTQ_* constant, used to choose which Transfer | ||
458 | * Controller (TC) executes requests using this channel. Use | ||
459 | * EVENTQ_DEFAULT unless you really need a high priority queue. | ||
460 | * | ||
461 | * This allocates a DMA channel and its associated parameter RAM slot. | ||
462 | * The parameter RAM is initialized to hold a dummy transfer. | ||
463 | * | ||
464 | * Normal use is to pass a specific channel number as @channel, to make | ||
465 | * use of hardware events mapped to that channel. When the channel will | ||
466 | * be used only for software triggering or event chaining, channels not | ||
467 | * mapped to hardware events (or mapped to unused events) are preferable. | ||
468 | * | ||
469 | * DMA transfers start from a channel using edma_start(), or by | ||
470 | * chaining. When the transfer described in that channel's parameter RAM | ||
471 | * slot completes, that slot's data may be reloaded through a link. | ||
472 | * | ||
473 | * DMA errors are only reported to the @callback associated with the | ||
474 | * channel driving that transfer, but transfer completion callbacks can | ||
475 | * be sent to another channel under control of the TCC field in | ||
476 | * the option word of the transfer's parameter RAM set. Drivers must not | ||
477 | * use DMA transfer completion callbacks for channels they did not allocate. | ||
478 | * (The same applies to TCC codes used in transfer chaining.) | ||
479 | * | ||
480 | * Returns the number of the channel, else negative errno. | ||
481 | */ | ||
482 | int edma_alloc_channel(int channel, | ||
483 | void (*callback)(unsigned channel, u16 ch_status, void *data), | ||
484 | void *data, | ||
485 | enum dma_event_q eventq_no) | ||
486 | { | ||
487 | if (channel < 0) { | ||
488 | channel = 0; | ||
489 | for (;;) { | ||
490 | channel = find_next_bit(edma_noevent, | ||
491 | num_channels, channel); | ||
492 | if (channel == num_channels) | ||
493 | return -ENOMEM; | ||
494 | if (!test_and_set_bit(channel, edma_inuse)) | ||
495 | break; | ||
496 | channel++; | ||
497 | } | ||
498 | } else if (channel >= num_channels) { | ||
499 | return -EINVAL; | ||
500 | } else if (test_and_set_bit(channel, edma_inuse)) { | ||
501 | return -EBUSY; | ||
502 | } | ||
503 | |||
504 | /* ensure access through shadow region 0 */ | ||
505 | edma_or_array2(EDMA_DRAE, 0, channel >> 5, 1 << (channel & 0x1f)); | ||
506 | |||
507 | /* ensure no events are pending */ | ||
508 | edma_stop(channel); | ||
509 | memcpy_toio(edmacc_regs_base + PARM_OFFSET(channel), | ||
510 | &dummy_paramset, PARM_SIZE); | ||
511 | |||
512 | if (callback) | ||
513 | setup_dma_interrupt(channel, callback, data); | ||
514 | |||
515 | map_dmach_queue(channel, eventq_no); | ||
516 | |||
517 | return channel; | ||
518 | } | ||
519 | EXPORT_SYMBOL(edma_alloc_channel); | ||
520 | |||
521 | |||
522 | /** | ||
523 | * edma_free_channel - deallocate DMA channel | ||
524 | * @channel: dma channel returned from edma_alloc_channel() | ||
525 | * | ||
526 | * This deallocates the DMA channel and associated parameter RAM slot | ||
527 | * allocated by edma_alloc_channel(). | ||
528 | * | ||
529 | * Callers are responsible for ensuring the channel is inactive, and | ||
530 | * will not be reactivated by linking, chaining, or software calls to | ||
531 | * edma_start(). | ||
532 | */ | ||
533 | void edma_free_channel(unsigned channel) | ||
534 | { | ||
535 | if (channel >= num_channels) | ||
536 | return; | ||
537 | |||
538 | setup_dma_interrupt(channel, NULL, NULL); | ||
539 | /* REVISIT should probably take out of shadow region 0 */ | ||
540 | |||
541 | memcpy_toio(edmacc_regs_base + PARM_OFFSET(channel), | ||
542 | &dummy_paramset, PARM_SIZE); | ||
543 | clear_bit(channel, edma_inuse); | ||
544 | } | ||
545 | EXPORT_SYMBOL(edma_free_channel); | ||
546 | |||
547 | /** | ||
548 | * edma_alloc_slot - allocate DMA parameter RAM | ||
549 | * @slot: specific slot to allocate; negative for "any unused slot" | ||
550 | * | ||
551 | * This allocates a parameter RAM slot, initializing it to hold a | ||
552 | * dummy transfer. Slots allocated using this routine have not been | ||
553 | * mapped to a hardware DMA channel, and will normally be used by | ||
554 | * linking to them from a slot associated with a DMA channel. | ||
555 | * | ||
556 | * Normal use is to pass EDMA_SLOT_ANY as the @slot, but specific | ||
557 | * slots may be allocated on behalf of DSP firmware. | ||
558 | * | ||
559 | * Returns the number of the slot, else negative errno. | ||
560 | */ | ||
561 | int edma_alloc_slot(int slot) | ||
562 | { | ||
563 | if (slot < 0) { | ||
564 | slot = num_channels; | ||
565 | for (;;) { | ||
566 | slot = find_next_zero_bit(edma_inuse, | ||
567 | num_slots, slot); | ||
568 | if (slot == num_slots) | ||
569 | return -ENOMEM; | ||
570 | if (!test_and_set_bit(slot, edma_inuse)) | ||
571 | break; | ||
572 | } | ||
573 | } else if (slot < num_channels || slot >= num_slots) { | ||
574 | return -EINVAL; | ||
575 | } else if (test_and_set_bit(slot, edma_inuse)) { | ||
576 | return -EBUSY; | ||
577 | } | ||
578 | |||
579 | memcpy_toio(edmacc_regs_base + PARM_OFFSET(slot), | ||
580 | &dummy_paramset, PARM_SIZE); | ||
581 | |||
582 | return slot; | ||
583 | } | ||
584 | EXPORT_SYMBOL(edma_alloc_slot); | ||
585 | |||
586 | /** | ||
587 | * edma_free_slot - deallocate DMA parameter RAM | ||
588 | * @slot: parameter RAM slot returned from edma_alloc_slot() | ||
589 | * | ||
590 | * This deallocates the parameter RAM slot allocated by edma_alloc_slot(). | ||
591 | * Callers are responsible for ensuring the slot is inactive, and will | ||
592 | * not be activated. | ||
593 | */ | ||
594 | void edma_free_slot(unsigned slot) | ||
595 | { | ||
596 | if (slot < num_channels || slot >= num_slots) | ||
597 | return; | ||
598 | |||
599 | memcpy_toio(edmacc_regs_base + PARM_OFFSET(slot), | ||
600 | &dummy_paramset, PARM_SIZE); | ||
601 | clear_bit(slot, edma_inuse); | ||
602 | } | ||
603 | EXPORT_SYMBOL(edma_free_slot); | ||
604 | |||
605 | /*-----------------------------------------------------------------------*/ | ||
606 | |||
607 | /* Parameter RAM operations (i) -- read/write partial slots */ | ||
608 | |||
609 | /** | ||
610 | * edma_set_src - set initial DMA source address in parameter RAM slot | ||
611 | * @slot: parameter RAM slot being configured | ||
612 | * @src_port: physical address of source (memory, controller FIFO, etc) | ||
613 | * @addressMode: INCR, except in very rare cases | ||
614 | * @fifoWidth: ignored unless @addressMode is FIFO, else specifies the | ||
615 | * width to use when addressing the fifo (e.g. W8BIT, W32BIT) | ||
616 | * | ||
617 | * Note that the source address is modified during the DMA transfer | ||
618 | * according to edma_set_src_index(). | ||
619 | */ | ||
620 | void edma_set_src(unsigned slot, dma_addr_t src_port, | ||
621 | enum address_mode mode, enum fifo_width width) | ||
622 | { | ||
623 | if (slot < num_slots) { | ||
624 | unsigned int i = edma_parm_read(PARM_OPT, slot); | ||
625 | |||
626 | if (mode) { | ||
627 | /* set SAM and program FWID */ | ||
628 | i = (i & ~(EDMA_FWID)) | (SAM | ((width & 0x7) << 8)); | ||
629 | } else { | ||
630 | /* clear SAM */ | ||
631 | i &= ~SAM; | ||
632 | } | ||
633 | edma_parm_write(PARM_OPT, slot, i); | ||
634 | |||
635 | /* set the source port address | ||
636 | in source register of param structure */ | ||
637 | edma_parm_write(PARM_SRC, slot, src_port); | ||
638 | } | ||
639 | } | ||
640 | EXPORT_SYMBOL(edma_set_src); | ||
641 | |||
642 | /** | ||
643 | * edma_set_dest - set initial DMA destination address in parameter RAM slot | ||
644 | * @slot: parameter RAM slot being configured | ||
645 | * @dest_port: physical address of destination (memory, controller FIFO, etc) | ||
646 | * @addressMode: INCR, except in very rare cases | ||
647 | * @fifoWidth: ignored unless @addressMode is FIFO, else specifies the | ||
648 | * width to use when addressing the fifo (e.g. W8BIT, W32BIT) | ||
649 | * | ||
650 | * Note that the destination address is modified during the DMA transfer | ||
651 | * according to edma_set_dest_index(). | ||
652 | */ | ||
653 | void edma_set_dest(unsigned slot, dma_addr_t dest_port, | ||
654 | enum address_mode mode, enum fifo_width width) | ||
655 | { | ||
656 | if (slot < num_slots) { | ||
657 | unsigned int i = edma_parm_read(PARM_OPT, slot); | ||
658 | |||
659 | if (mode) { | ||
660 | /* set DAM and program FWID */ | ||
661 | i = (i & ~(EDMA_FWID)) | (DAM | ((width & 0x7) << 8)); | ||
662 | } else { | ||
663 | /* clear DAM */ | ||
664 | i &= ~DAM; | ||
665 | } | ||
666 | edma_parm_write(PARM_OPT, slot, i); | ||
667 | /* set the destination port address | ||
668 | in dest register of param structure */ | ||
669 | edma_parm_write(PARM_DST, slot, dest_port); | ||
670 | } | ||
671 | } | ||
672 | EXPORT_SYMBOL(edma_set_dest); | ||
673 | |||
674 | /** | ||
675 | * edma_get_position - returns the current transfer points | ||
676 | * @slot: parameter RAM slot being examined | ||
677 | * @src: pointer to source port position | ||
678 | * @dst: pointer to destination port position | ||
679 | * | ||
680 | * Returns current source and destination addresses for a particular | ||
681 | * parameter RAM slot. Its channel should not be active when this is called. | ||
682 | */ | ||
683 | void edma_get_position(unsigned slot, dma_addr_t *src, dma_addr_t *dst) | ||
684 | { | ||
685 | struct edmacc_param temp; | ||
686 | |||
687 | edma_read_slot(slot, &temp); | ||
688 | if (src != NULL) | ||
689 | *src = temp.src; | ||
690 | if (dst != NULL) | ||
691 | *dst = temp.dst; | ||
692 | } | ||
693 | EXPORT_SYMBOL(edma_get_position); | ||
694 | |||
695 | /** | ||
696 | * edma_set_src_index - configure DMA source address indexing | ||
697 | * @slot: parameter RAM slot being configured | ||
698 | * @src_bidx: byte offset between source arrays in a frame | ||
699 | * @src_cidx: byte offset between source frames in a block | ||
700 | * | ||
701 | * Offsets are specified to support either contiguous or discontiguous | ||
702 | * memory transfers, or repeated access to a hardware register, as needed. | ||
703 | * When accessing hardware registers, both offsets are normally zero. | ||
704 | */ | ||
705 | void edma_set_src_index(unsigned slot, s16 src_bidx, s16 src_cidx) | ||
706 | { | ||
707 | if (slot < num_slots) { | ||
708 | edma_parm_modify(PARM_SRC_DST_BIDX, slot, | ||
709 | 0xffff0000, src_bidx); | ||
710 | edma_parm_modify(PARM_SRC_DST_CIDX, slot, | ||
711 | 0xffff0000, src_cidx); | ||
712 | } | ||
713 | } | ||
714 | EXPORT_SYMBOL(edma_set_src_index); | ||
715 | |||
716 | /** | ||
717 | * edma_set_dest_index - configure DMA destination address indexing | ||
718 | * @slot: parameter RAM slot being configured | ||
719 | * @dest_bidx: byte offset between destination arrays in a frame | ||
720 | * @dest_cidx: byte offset between destination frames in a block | ||
721 | * | ||
722 | * Offsets are specified to support either contiguous or discontiguous | ||
723 | * memory transfers, or repeated access to a hardware register, as needed. | ||
724 | * When accessing hardware registers, both offsets are normally zero. | ||
725 | */ | ||
726 | void edma_set_dest_index(unsigned slot, s16 dest_bidx, s16 dest_cidx) | ||
727 | { | ||
728 | if (slot < num_slots) { | ||
729 | edma_parm_modify(PARM_SRC_DST_BIDX, slot, | ||
730 | 0x0000ffff, dest_bidx << 16); | ||
731 | edma_parm_modify(PARM_SRC_DST_CIDX, slot, | ||
732 | 0x0000ffff, dest_cidx << 16); | ||
733 | } | ||
734 | } | ||
735 | EXPORT_SYMBOL(edma_set_dest_index); | ||
736 | |||
737 | /** | ||
738 | * edma_set_transfer_params - configure DMA transfer parameters | ||
739 | * @slot: parameter RAM slot being configured | ||
740 | * @acnt: how many bytes per array (at least one) | ||
741 | * @bcnt: how many arrays per frame (at least one) | ||
742 | * @ccnt: how many frames per block (at least one) | ||
743 | * @bcnt_rld: used only for A-Synchronized transfers; this specifies | ||
744 | * the value to reload into bcnt when it decrements to zero | ||
745 | * @sync_mode: ASYNC or ABSYNC | ||
746 | * | ||
747 | * See the EDMA3 documentation to understand how to configure and link | ||
748 | * transfers using the fields in PaRAM slots. If you are not doing it | ||
749 | * all at once with edma_write_slot(), you will use this routine | ||
750 | * plus two calls each for source and destination, setting the initial | ||
751 | * address and saying how to index that address. | ||
752 | * | ||
753 | * An example of an A-Synchronized transfer is a serial link using a | ||
754 | * single word shift register. In that case, @acnt would be equal to | ||
755 | * that word size; the serial controller issues a DMA synchronization | ||
756 | * event to transfer each word, and memory access by the DMA transfer | ||
757 | * controller will be word-at-a-time. | ||
758 | * | ||
759 | * An example of an AB-Synchronized transfer is a device using a FIFO. | ||
760 | * In that case, @acnt equals the FIFO width and @bcnt equals its depth. | ||
761 | * The controller with the FIFO issues DMA synchronization events when | ||
762 | * the FIFO threshold is reached, and the DMA transfer controller will | ||
763 | * transfer one frame to (or from) the FIFO. It will probably use | ||
764 | * efficient burst modes to access memory. | ||
765 | */ | ||
766 | void edma_set_transfer_params(unsigned slot, | ||
767 | u16 acnt, u16 bcnt, u16 ccnt, | ||
768 | u16 bcnt_rld, enum sync_dimension sync_mode) | ||
769 | { | ||
770 | if (slot < num_slots) { | ||
771 | edma_parm_modify(PARM_LINK_BCNTRLD, slot, | ||
772 | 0x0000ffff, bcnt_rld << 16); | ||
773 | if (sync_mode == ASYNC) | ||
774 | edma_parm_and(PARM_OPT, slot, ~SYNCDIM); | ||
775 | else | ||
776 | edma_parm_or(PARM_OPT, slot, SYNCDIM); | ||
777 | /* Set the acount, bcount, ccount registers */ | ||
778 | edma_parm_write(PARM_A_B_CNT, slot, (bcnt << 16) | acnt); | ||
779 | edma_parm_write(PARM_CCNT, slot, ccnt); | ||
780 | } | ||
781 | } | ||
782 | EXPORT_SYMBOL(edma_set_transfer_params); | ||
783 | |||
784 | /** | ||
785 | * edma_link - link one parameter RAM slot to another | ||
786 | * @from: parameter RAM slot originating the link | ||
787 | * @to: parameter RAM slot which is the link target | ||
788 | * | ||
789 | * The originating slot should not be part of any active DMA transfer. | ||
790 | */ | ||
791 | void edma_link(unsigned from, unsigned to) | ||
792 | { | ||
793 | if (from >= num_slots) | ||
794 | return; | ||
795 | if (to >= num_slots) | ||
796 | return; | ||
797 | edma_parm_modify(PARM_LINK_BCNTRLD, from, 0xffff0000, PARM_OFFSET(to)); | ||
798 | } | ||
799 | EXPORT_SYMBOL(edma_link); | ||
800 | |||
801 | /** | ||
802 | * edma_unlink - cut link from one parameter RAM slot | ||
803 | * @from: parameter RAM slot originating the link | ||
804 | * | ||
805 | * The originating slot should not be part of any active DMA transfer. | ||
806 | * Its link is set to 0xffff. | ||
807 | */ | ||
808 | void edma_unlink(unsigned from) | ||
809 | { | ||
810 | if (from >= num_slots) | ||
811 | return; | ||
812 | edma_parm_or(PARM_LINK_BCNTRLD, from, 0xffff); | ||
813 | } | ||
814 | EXPORT_SYMBOL(edma_unlink); | ||
815 | |||
816 | /*-----------------------------------------------------------------------*/ | ||
817 | |||
818 | /* Parameter RAM operations (ii) -- read/write whole parameter sets */ | ||
819 | |||
820 | /** | ||
821 | * edma_write_slot - write parameter RAM data for slot | ||
822 | * @slot: number of parameter RAM slot being modified | ||
823 | * @param: data to be written into parameter RAM slot | ||
824 | * | ||
825 | * Use this to assign all parameters of a transfer at once. This | ||
826 | * allows more efficient setup of transfers than issuing multiple | ||
827 | * calls to set up those parameters in small pieces, and provides | ||
828 | * complete control over all transfer options. | ||
829 | */ | ||
830 | void edma_write_slot(unsigned slot, const struct edmacc_param *param) | ||
831 | { | ||
832 | if (slot >= num_slots) | ||
833 | return; | ||
834 | memcpy_toio(edmacc_regs_base + PARM_OFFSET(slot), param, PARM_SIZE); | ||
835 | } | ||
836 | EXPORT_SYMBOL(edma_write_slot); | ||
837 | |||
838 | /** | ||
839 | * edma_read_slot - read parameter RAM data from slot | ||
840 | * @slot: number of parameter RAM slot being copied | ||
841 | * @param: where to store copy of parameter RAM data | ||
842 | * | ||
843 | * Use this to read data from a parameter RAM slot, perhaps to | ||
844 | * save them as a template for later reuse. | ||
845 | */ | ||
846 | void edma_read_slot(unsigned slot, struct edmacc_param *param) | ||
847 | { | ||
848 | if (slot >= num_slots) | ||
849 | return; | ||
850 | memcpy_fromio(param, edmacc_regs_base + PARM_OFFSET(slot), PARM_SIZE); | ||
851 | } | ||
852 | EXPORT_SYMBOL(edma_read_slot); | ||
853 | |||
854 | /*-----------------------------------------------------------------------*/ | ||
855 | |||
856 | /* Various EDMA channel control operations */ | ||
857 | |||
858 | /** | ||
859 | * edma_pause - pause dma on a channel | ||
860 | * @channel: on which edma_start() has been called | ||
861 | * | ||
862 | * This temporarily disables EDMA hardware events on the specified channel, | ||
863 | * preventing them from triggering new transfers on its behalf | ||
864 | */ | ||
865 | void edma_pause(unsigned channel) | ||
866 | { | ||
867 | if (channel < num_channels) { | ||
868 | unsigned int mask = (1 << (channel & 0x1f)); | ||
869 | |||
870 | edma_shadow0_write_array(SH_EECR, channel >> 5, mask); | ||
871 | } | ||
872 | } | ||
873 | EXPORT_SYMBOL(edma_pause); | ||
874 | |||
875 | /** | ||
876 | * edma_resume - resumes dma on a paused channel | ||
877 | * @channel: on which edma_pause() has been called | ||
878 | * | ||
879 | * This re-enables EDMA hardware events on the specified channel. | ||
880 | */ | ||
881 | void edma_resume(unsigned channel) | ||
882 | { | ||
883 | if (channel < num_channels) { | ||
884 | unsigned int mask = (1 << (channel & 0x1f)); | ||
885 | |||
886 | edma_shadow0_write_array(SH_EESR, channel >> 5, mask); | ||
887 | } | ||
888 | } | ||
889 | EXPORT_SYMBOL(edma_resume); | ||
890 | |||
891 | /** | ||
892 | * edma_start - start dma on a channel | ||
893 | * @channel: channel being activated | ||
894 | * | ||
895 | * Channels with event associations will be triggered by their hardware | ||
896 | * events, and channels without such associations will be triggered by | ||
897 | * software. (At this writing there is no interface for using software | ||
898 | * triggers except with channels that don't support hardware triggers.) | ||
899 | * | ||
900 | * Returns zero on success, else negative errno. | ||
901 | */ | ||
902 | int edma_start(unsigned channel) | ||
903 | { | ||
904 | if (channel < num_channels) { | ||
905 | int j = channel >> 5; | ||
906 | unsigned int mask = (1 << (channel & 0x1f)); | ||
907 | |||
908 | /* EDMA channels without event association */ | ||
909 | if (test_bit(channel, edma_noevent)) { | ||
910 | pr_debug("EDMA: ESR%d %08x\n", j, | ||
911 | edma_shadow0_read_array(SH_ESR, j)); | ||
912 | edma_shadow0_write_array(SH_ESR, j, mask); | ||
913 | return 0; | ||
914 | } | ||
915 | |||
916 | /* EDMA channel with event association */ | ||
917 | pr_debug("EDMA: ER%d %08x\n", j, | ||
918 | edma_shadow0_read_array(SH_ER, j)); | ||
919 | /* Clear any pending error */ | ||
920 | edma_write_array(EDMA_EMCR, j, mask); | ||
921 | /* Clear any SER */ | ||
922 | edma_shadow0_write_array(SH_SECR, j, mask); | ||
923 | edma_shadow0_write_array(SH_EESR, j, mask); | ||
924 | pr_debug("EDMA: EER%d %08x\n", j, | ||
925 | edma_shadow0_read_array(SH_EER, j)); | ||
926 | return 0; | ||
927 | } | ||
928 | |||
929 | return -EINVAL; | ||
930 | } | ||
931 | EXPORT_SYMBOL(edma_start); | ||
932 | |||
933 | /** | ||
934 | * edma_stop - stops dma on the channel passed | ||
935 | * @channel: channel being deactivated | ||
936 | * | ||
937 | * When @lch is a channel, any active transfer is paused and | ||
938 | * all pending hardware events are cleared. The current transfer | ||
939 | * may not be resumed, and the channel's Parameter RAM should be | ||
940 | * reinitialized before being reused. | ||
941 | */ | ||
942 | void edma_stop(unsigned channel) | ||
943 | { | ||
944 | if (channel < num_channels) { | ||
945 | int j = channel >> 5; | ||
946 | unsigned int mask = (1 << (channel & 0x1f)); | ||
947 | |||
948 | edma_shadow0_write_array(SH_EECR, j, mask); | ||
949 | edma_shadow0_write_array(SH_ECR, j, mask); | ||
950 | edma_shadow0_write_array(SH_SECR, j, mask); | ||
951 | edma_write_array(EDMA_EMCR, j, mask); | ||
952 | |||
953 | pr_debug("EDMA: EER%d %08x\n", j, | ||
954 | edma_shadow0_read_array(SH_EER, j)); | ||
955 | |||
956 | /* REVISIT: consider guarding against inappropriate event | ||
957 | * chaining by overwriting with dummy_paramset. | ||
958 | */ | ||
959 | } | ||
960 | } | ||
961 | EXPORT_SYMBOL(edma_stop); | ||
962 | |||
963 | /****************************************************************************** | ||
964 | * | ||
965 | * It cleans ParamEntry qand bring back EDMA to initial state if media has | ||
966 | * been removed before EDMA has finished.It is usedful for removable media. | ||
967 | * Arguments: | ||
968 | * ch_no - channel no | ||
969 | * | ||
970 | * Return: zero on success, or corresponding error no on failure | ||
971 | * | ||
972 | * FIXME this should not be needed ... edma_stop() should suffice. | ||
973 | * | ||
974 | *****************************************************************************/ | ||
975 | |||
976 | void edma_clean_channel(unsigned channel) | ||
977 | { | ||
978 | if (channel < num_channels) { | ||
979 | int j = (channel >> 5); | ||
980 | unsigned int mask = 1 << (channel & 0x1f); | ||
981 | |||
982 | pr_debug("EDMA: EMR%d %08x\n", j, | ||
983 | edma_read_array(EDMA_EMR, j)); | ||
984 | edma_shadow0_write_array(SH_ECR, j, mask); | ||
985 | /* Clear the corresponding EMR bits */ | ||
986 | edma_write_array(EDMA_EMCR, j, mask); | ||
987 | /* Clear any SER */ | ||
988 | edma_shadow0_write_array(SH_SECR, j, mask); | ||
989 | edma_write(EDMA_CCERRCLR, (1 << 16) | 0x3); | ||
990 | } | ||
991 | } | ||
992 | EXPORT_SYMBOL(edma_clean_channel); | ||
993 | |||
994 | /* | ||
995 | * edma_clear_event - clear an outstanding event on the DMA channel | ||
996 | * Arguments: | ||
997 | * channel - channel number | ||
998 | */ | ||
999 | void edma_clear_event(unsigned channel) | ||
1000 | { | ||
1001 | if (channel >= num_channels) | ||
1002 | return; | ||
1003 | if (channel < 32) | ||
1004 | edma_write(EDMA_ECR, 1 << channel); | ||
1005 | else | ||
1006 | edma_write(EDMA_ECRH, 1 << (channel - 32)); | ||
1007 | } | ||
1008 | EXPORT_SYMBOL(edma_clear_event); | ||
1009 | |||
1010 | /*-----------------------------------------------------------------------*/ | ||
1011 | |||
1012 | static int __init edma_probe(struct platform_device *pdev) | ||
1013 | { | ||
1014 | struct edma_soc_info *info = pdev->dev.platform_data; | ||
1015 | int i; | ||
1016 | int status; | ||
1017 | const s8 *noevent; | ||
1018 | int irq = 0, err_irq = 0; | ||
1019 | struct resource *r; | ||
1020 | resource_size_t len; | ||
1021 | |||
1022 | if (!info) | ||
1023 | return -ENODEV; | ||
1024 | |||
1025 | r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "edma_cc"); | ||
1026 | if (!r) | ||
1027 | return -ENODEV; | ||
1028 | |||
1029 | len = r->end - r->start + 1; | ||
1030 | |||
1031 | r = request_mem_region(r->start, len, r->name); | ||
1032 | if (!r) | ||
1033 | return -EBUSY; | ||
1034 | |||
1035 | edmacc_regs_base = ioremap(r->start, len); | ||
1036 | if (!edmacc_regs_base) { | ||
1037 | status = -EBUSY; | ||
1038 | goto fail1; | ||
1039 | } | ||
1040 | |||
1041 | num_channels = min_t(unsigned, info->n_channel, EDMA_MAX_DMACH); | ||
1042 | num_slots = min_t(unsigned, info->n_slot, EDMA_MAX_PARAMENTRY); | ||
1043 | |||
1044 | dev_dbg(&pdev->dev, "DMA REG BASE ADDR=%p\n", edmacc_regs_base); | ||
1045 | |||
1046 | for (i = 0; i < num_slots; i++) | ||
1047 | memcpy_toio(edmacc_regs_base + PARM_OFFSET(i), | ||
1048 | &dummy_paramset, PARM_SIZE); | ||
1049 | |||
1050 | noevent = info->noevent; | ||
1051 | if (noevent) { | ||
1052 | while (*noevent != -1) | ||
1053 | set_bit(*noevent++, edma_noevent); | ||
1054 | } | ||
1055 | |||
1056 | irq = platform_get_irq(pdev, 0); | ||
1057 | status = request_irq(irq, dma_irq_handler, 0, "edma", &pdev->dev); | ||
1058 | if (status < 0) { | ||
1059 | dev_dbg(&pdev->dev, "request_irq %d failed --> %d\n", | ||
1060 | irq, status); | ||
1061 | goto fail; | ||
1062 | } | ||
1063 | |||
1064 | err_irq = platform_get_irq(pdev, 1); | ||
1065 | status = request_irq(err_irq, dma_ccerr_handler, 0, | ||
1066 | "edma_error", &pdev->dev); | ||
1067 | if (status < 0) { | ||
1068 | dev_dbg(&pdev->dev, "request_irq %d failed --> %d\n", | ||
1069 | err_irq, status); | ||
1070 | goto fail; | ||
1071 | } | ||
1072 | |||
1073 | if (tc_errs_handled) { | ||
1074 | status = request_irq(IRQ_TCERRINT0, dma_tc0err_handler, 0, | ||
1075 | "edma_tc0", &pdev->dev); | ||
1076 | if (status < 0) { | ||
1077 | dev_dbg(&pdev->dev, "request_irq %d failed --> %d\n", | ||
1078 | IRQ_TCERRINT0, status); | ||
1079 | return status; | ||
1080 | } | ||
1081 | status = request_irq(IRQ_TCERRINT, dma_tc1err_handler, 0, | ||
1082 | "edma_tc1", &pdev->dev); | ||
1083 | if (status < 0) { | ||
1084 | dev_dbg(&pdev->dev, "request_irq %d --> %d\n", | ||
1085 | IRQ_TCERRINT, status); | ||
1086 | return status; | ||
1087 | } | ||
1088 | } | ||
1089 | |||
1090 | /* Everything lives on transfer controller 1 until otherwise specified. | ||
1091 | * This way, long transfers on the low priority queue | ||
1092 | * started by the codec engine will not cause audio defects. | ||
1093 | */ | ||
1094 | for (i = 0; i < num_channels; i++) | ||
1095 | map_dmach_queue(i, EVENTQ_1); | ||
1096 | |||
1097 | /* Event queue to TC mapping */ | ||
1098 | for (i = 0; queue_tc_mapping[i][0] != -1; i++) | ||
1099 | map_queue_tc(queue_tc_mapping[i][0], queue_tc_mapping[i][1]); | ||
1100 | |||
1101 | /* Event queue priority mapping */ | ||
1102 | for (i = 0; queue_priority_mapping[i][0] != -1; i++) | ||
1103 | assign_priority_to_queue(queue_priority_mapping[i][0], | ||
1104 | queue_priority_mapping[i][1]); | ||
1105 | |||
1106 | for (i = 0; i < info->n_region; i++) { | ||
1107 | edma_write_array2(EDMA_DRAE, i, 0, 0x0); | ||
1108 | edma_write_array2(EDMA_DRAE, i, 1, 0x0); | ||
1109 | edma_write_array(EDMA_QRAE, i, 0x0); | ||
1110 | } | ||
1111 | |||
1112 | return 0; | ||
1113 | |||
1114 | fail: | ||
1115 | if (err_irq) | ||
1116 | free_irq(err_irq, NULL); | ||
1117 | if (irq) | ||
1118 | free_irq(irq, NULL); | ||
1119 | iounmap(edmacc_regs_base); | ||
1120 | fail1: | ||
1121 | release_mem_region(r->start, len); | ||
1122 | return status; | ||
1123 | } | ||
1124 | |||
1125 | |||
1126 | static struct platform_driver edma_driver = { | ||
1127 | .driver.name = "edma", | ||
1128 | }; | ||
1129 | |||
1130 | static int __init edma_init(void) | ||
1131 | { | ||
1132 | return platform_driver_probe(&edma_driver, edma_probe); | ||
1133 | } | ||
1134 | arch_initcall(edma_init); | ||
1135 | |||
diff --git a/arch/arm/mach-davinci/gpio.c b/arch/arm/mach-davinci/gpio.c index b49e9d092aab..1aba41c6351e 100644 --- a/arch/arm/mach-davinci/gpio.c +++ b/arch/arm/mach-davinci/gpio.c | |||
@@ -20,6 +20,7 @@ | |||
20 | #include <linux/irq.h> | 20 | #include <linux/irq.h> |
21 | #include <linux/bitops.h> | 21 | #include <linux/bitops.h> |
22 | 22 | ||
23 | #include <mach/cputype.h> | ||
23 | #include <mach/irqs.h> | 24 | #include <mach/irqs.h> |
24 | #include <mach/hardware.h> | 25 | #include <mach/hardware.h> |
25 | #include <mach/gpio.h> | 26 | #include <mach/gpio.h> |
@@ -36,9 +37,10 @@ struct davinci_gpio { | |||
36 | 37 | ||
37 | static struct davinci_gpio chips[DIV_ROUND_UP(DAVINCI_N_GPIO, 32)]; | 38 | static struct davinci_gpio chips[DIV_ROUND_UP(DAVINCI_N_GPIO, 32)]; |
38 | 39 | ||
40 | static unsigned __initdata ngpio; | ||
39 | 41 | ||
40 | /* create a non-inlined version */ | 42 | /* create a non-inlined version */ |
41 | static struct gpio_controller *__iomem __init gpio2controller(unsigned gpio) | 43 | static struct gpio_controller __iomem * __init gpio2controller(unsigned gpio) |
42 | { | 44 | { |
43 | return __gpio_to_controller(gpio); | 45 | return __gpio_to_controller(gpio); |
44 | } | 46 | } |
@@ -114,9 +116,30 @@ static int __init davinci_gpio_setup(void) | |||
114 | { | 116 | { |
115 | int i, base; | 117 | int i, base; |
116 | 118 | ||
117 | for (i = 0, base = 0; | 119 | /* The gpio banks conceptually expose a segmented bitmap, |
118 | i < ARRAY_SIZE(chips); | 120 | * and "ngpio" is one more than the largest zero-based |
119 | i++, base += 32) { | 121 | * bit index that's valid. |
122 | */ | ||
123 | if (cpu_is_davinci_dm355()) { /* or dm335() */ | ||
124 | ngpio = 104; | ||
125 | } else if (cpu_is_davinci_dm644x()) { /* or dm337() */ | ||
126 | ngpio = 71; | ||
127 | } else if (cpu_is_davinci_dm646x()) { | ||
128 | /* NOTE: each bank has several "reserved" bits, | ||
129 | * unusable as GPIOs. Only 33 of the GPIO numbers | ||
130 | * are usable, and we're not rejecting the others. | ||
131 | */ | ||
132 | ngpio = 43; | ||
133 | } else { | ||
134 | /* if cpu_is_davinci_dm643x() ngpio = 111 */ | ||
135 | pr_err("GPIO setup: how many GPIOs?\n"); | ||
136 | return -EINVAL; | ||
137 | } | ||
138 | |||
139 | if (WARN_ON(DAVINCI_N_GPIO < ngpio)) | ||
140 | ngpio = DAVINCI_N_GPIO; | ||
141 | |||
142 | for (i = 0, base = 0; base < ngpio; i++, base += 32) { | ||
120 | chips[i].chip.label = "DaVinci"; | 143 | chips[i].chip.label = "DaVinci"; |
121 | 144 | ||
122 | chips[i].chip.direction_input = davinci_direction_in; | 145 | chips[i].chip.direction_input = davinci_direction_in; |
@@ -125,7 +148,7 @@ static int __init davinci_gpio_setup(void) | |||
125 | chips[i].chip.set = davinci_gpio_set; | 148 | chips[i].chip.set = davinci_gpio_set; |
126 | 149 | ||
127 | chips[i].chip.base = base; | 150 | chips[i].chip.base = base; |
128 | chips[i].chip.ngpio = DAVINCI_N_GPIO - base; | 151 | chips[i].chip.ngpio = ngpio - base; |
129 | if (chips[i].chip.ngpio > 32) | 152 | if (chips[i].chip.ngpio > 32) |
130 | chips[i].chip.ngpio = 32; | 153 | chips[i].chip.ngpio = 32; |
131 | 154 | ||
@@ -143,11 +166,11 @@ pure_initcall(davinci_gpio_setup); | |||
143 | * We expect irqs will normally be set up as input pins, but they can also be | 166 | * We expect irqs will normally be set up as input pins, but they can also be |
144 | * used as output pins ... which is convenient for testing. | 167 | * used as output pins ... which is convenient for testing. |
145 | * | 168 | * |
146 | * NOTE: GPIO0..GPIO7 also have direct INTC hookups, which work in addition | 169 | * NOTE: The first few GPIOs also have direct INTC hookups in addition |
147 | * to their GPIOBNK0 irq (but with a bit less overhead). But we don't have | 170 | * to their GPIOBNK0 irq, with a bit less overhead but less flexibility |
148 | * a good way to hook those up ... | 171 | * on triggering (e.g. no edge options). We don't try to use those. |
149 | * | 172 | * |
150 | * All those INTC hookups (GPIO0..GPIO7 plus five IRQ banks) can also | 173 | * All those INTC hookups (direct, plus several IRQ banks) can also |
151 | * serve as EDMA event triggers. | 174 | * serve as EDMA event triggers. |
152 | */ | 175 | */ |
153 | 176 | ||
@@ -235,29 +258,42 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc) | |||
235 | } | 258 | } |
236 | 259 | ||
237 | /* | 260 | /* |
238 | * NOTE: for suspend/resume, probably best to make a sysdev (and class) | 261 | * NOTE: for suspend/resume, probably best to make a platform_device with |
239 | * with its suspend/resume calls hooking into the results of the set_wake() | 262 | * suspend_late/resume_resume calls hooking into results of the set_wake() |
240 | * calls ... so if no gpios are wakeup events the clock can be disabled, | 263 | * calls ... so if no gpios are wakeup events the clock can be disabled, |
241 | * with outputs left at previously set levels, and so that VDD3P3V.IOPWDN0 | 264 | * with outputs left at previously set levels, and so that VDD3P3V.IOPWDN0 |
242 | * can be set appropriately for GPIOV33 pins. | 265 | * (dm6446) can be set appropriately for GPIOV33 pins. |
243 | */ | 266 | */ |
244 | 267 | ||
245 | static int __init davinci_gpio_irq_setup(void) | 268 | static int __init davinci_gpio_irq_setup(void) |
246 | { | 269 | { |
247 | unsigned gpio, irq, bank; | 270 | unsigned gpio, irq, bank; |
271 | unsigned bank_irq; | ||
248 | struct clk *clk; | 272 | struct clk *clk; |
273 | u32 binten = 0; | ||
274 | |||
275 | if (cpu_is_davinci_dm355()) { /* or dm335() */ | ||
276 | bank_irq = IRQ_DM355_GPIOBNK0; | ||
277 | } else if (cpu_is_davinci_dm644x()) { | ||
278 | bank_irq = IRQ_GPIOBNK0; | ||
279 | } else if (cpu_is_davinci_dm646x()) { | ||
280 | bank_irq = IRQ_DM646X_GPIOBNK0; | ||
281 | } else { | ||
282 | printk(KERN_ERR "Don't know first GPIO bank IRQ.\n"); | ||
283 | return -EINVAL; | ||
284 | } | ||
249 | 285 | ||
250 | clk = clk_get(NULL, "gpio"); | 286 | clk = clk_get(NULL, "gpio"); |
251 | if (IS_ERR(clk)) { | 287 | if (IS_ERR(clk)) { |
252 | printk(KERN_ERR "Error %ld getting gpio clock?\n", | 288 | printk(KERN_ERR "Error %ld getting gpio clock?\n", |
253 | PTR_ERR(clk)); | 289 | PTR_ERR(clk)); |
254 | return 0; | 290 | return PTR_ERR(clk); |
255 | } | 291 | } |
256 | |||
257 | clk_enable(clk); | 292 | clk_enable(clk); |
258 | 293 | ||
259 | for (gpio = 0, irq = gpio_to_irq(0), bank = IRQ_GPIOBNK0; | 294 | for (gpio = 0, irq = gpio_to_irq(0), bank = 0; |
260 | gpio < DAVINCI_N_GPIO; bank++) { | 295 | gpio < ngpio; |
296 | bank++, bank_irq++) { | ||
261 | struct gpio_controller *__iomem g = gpio2controller(gpio); | 297 | struct gpio_controller *__iomem g = gpio2controller(gpio); |
262 | unsigned i; | 298 | unsigned i; |
263 | 299 | ||
@@ -265,28 +301,28 @@ static int __init davinci_gpio_irq_setup(void) | |||
265 | __raw_writel(~0, &g->clr_rising); | 301 | __raw_writel(~0, &g->clr_rising); |
266 | 302 | ||
267 | /* set up all irqs in this bank */ | 303 | /* set up all irqs in this bank */ |
268 | set_irq_chained_handler(bank, gpio_irq_handler); | 304 | set_irq_chained_handler(bank_irq, gpio_irq_handler); |
269 | set_irq_chip_data(bank, g); | 305 | set_irq_chip_data(bank_irq, g); |
270 | set_irq_data(bank, (void *)irq); | 306 | set_irq_data(bank_irq, (void *)irq); |
271 | 307 | ||
272 | for (i = 0; i < 16 && gpio < DAVINCI_N_GPIO; | 308 | for (i = 0; i < 16 && gpio < ngpio; i++, irq++, gpio++) { |
273 | i++, irq++, gpio++) { | ||
274 | set_irq_chip(irq, &gpio_irqchip); | 309 | set_irq_chip(irq, &gpio_irqchip); |
275 | set_irq_chip_data(irq, g); | 310 | set_irq_chip_data(irq, g); |
276 | set_irq_handler(irq, handle_simple_irq); | 311 | set_irq_handler(irq, handle_simple_irq); |
277 | set_irq_flags(irq, IRQF_VALID); | 312 | set_irq_flags(irq, IRQF_VALID); |
278 | } | 313 | } |
314 | |||
315 | binten |= BIT(bank); | ||
279 | } | 316 | } |
280 | 317 | ||
281 | /* BINTEN -- per-bank interrupt enable. genirq would also let these | 318 | /* BINTEN -- per-bank interrupt enable. genirq would also let these |
282 | * bits be set/cleared dynamically. | 319 | * bits be set/cleared dynamically. |
283 | */ | 320 | */ |
284 | __raw_writel(0x1f, (void *__iomem) | 321 | __raw_writel(binten, (void *__iomem) |
285 | IO_ADDRESS(DAVINCI_GPIO_BASE + 0x08)); | 322 | IO_ADDRESS(DAVINCI_GPIO_BASE + 0x08)); |
286 | 323 | ||
287 | printk(KERN_INFO "DaVinci: %d gpio irqs\n", irq - gpio_to_irq(0)); | 324 | printk(KERN_INFO "DaVinci: %d gpio irqs\n", irq - gpio_to_irq(0)); |
288 | 325 | ||
289 | return 0; | 326 | return 0; |
290 | } | 327 | } |
291 | |||
292 | arch_initcall(davinci_gpio_irq_setup); | 328 | arch_initcall(davinci_gpio_irq_setup); |
diff --git a/arch/arm/mach-davinci/id.c b/arch/arm/mach-davinci/id.c index bf067d604918..018b994cd794 100644 --- a/arch/arm/mach-davinci/id.c +++ b/arch/arm/mach-davinci/id.c | |||
@@ -15,7 +15,9 @@ | |||
15 | #include <linux/init.h> | 15 | #include <linux/init.h> |
16 | #include <linux/io.h> | 16 | #include <linux/io.h> |
17 | 17 | ||
18 | #define JTAG_ID_BASE 0x01c40028 | 18 | #define JTAG_ID_BASE IO_ADDRESS(0x01c40028) |
19 | |||
20 | static unsigned int davinci_revision; | ||
19 | 21 | ||
20 | struct davinci_id { | 22 | struct davinci_id { |
21 | u8 variant; /* JTAG ID bits 31:28 */ | 23 | u8 variant; /* JTAG ID bits 31:28 */ |
@@ -33,6 +35,20 @@ static struct davinci_id davinci_ids[] __initdata = { | |||
33 | .manufacturer = 0x017, | 35 | .manufacturer = 0x017, |
34 | .type = 0x64460000, | 36 | .type = 0x64460000, |
35 | }, | 37 | }, |
38 | { | ||
39 | /* DM646X */ | ||
40 | .part_no = 0xb770, | ||
41 | .variant = 0x0, | ||
42 | .manufacturer = 0x017, | ||
43 | .type = 0x64670000, | ||
44 | }, | ||
45 | { | ||
46 | /* DM355 */ | ||
47 | .part_no = 0xb73b, | ||
48 | .variant = 0x0, | ||
49 | .manufacturer = 0x00f, | ||
50 | .type = 0x03550000, | ||
51 | }, | ||
36 | }; | 52 | }; |
37 | 53 | ||
38 | /* | 54 | /* |
@@ -42,7 +58,7 @@ static u16 __init davinci_get_part_no(void) | |||
42 | { | 58 | { |
43 | u32 dev_id, part_no; | 59 | u32 dev_id, part_no; |
44 | 60 | ||
45 | dev_id = davinci_readl(JTAG_ID_BASE); | 61 | dev_id = __raw_readl(JTAG_ID_BASE); |
46 | 62 | ||
47 | part_no = ((dev_id >> 12) & 0xffff); | 63 | part_no = ((dev_id >> 12) & 0xffff); |
48 | 64 | ||
@@ -56,13 +72,19 @@ static u8 __init davinci_get_variant(void) | |||
56 | { | 72 | { |
57 | u32 variant; | 73 | u32 variant; |
58 | 74 | ||
59 | variant = davinci_readl(JTAG_ID_BASE); | 75 | variant = __raw_readl(JTAG_ID_BASE); |
60 | 76 | ||
61 | variant = (variant >> 28) & 0xf; | 77 | variant = (variant >> 28) & 0xf; |
62 | 78 | ||
63 | return variant; | 79 | return variant; |
64 | } | 80 | } |
65 | 81 | ||
82 | unsigned int davinci_rev(void) | ||
83 | { | ||
84 | return davinci_revision >> 16; | ||
85 | } | ||
86 | EXPORT_SYMBOL(davinci_rev); | ||
87 | |||
66 | void __init davinci_check_revision(void) | 88 | void __init davinci_check_revision(void) |
67 | { | 89 | { |
68 | int i; | 90 | int i; |
@@ -75,7 +97,7 @@ void __init davinci_check_revision(void) | |||
75 | /* First check only the major version in a safe way */ | 97 | /* First check only the major version in a safe way */ |
76 | for (i = 0; i < ARRAY_SIZE(davinci_ids); i++) { | 98 | for (i = 0; i < ARRAY_SIZE(davinci_ids); i++) { |
77 | if (part_no == (davinci_ids[i].part_no)) { | 99 | if (part_no == (davinci_ids[i].part_no)) { |
78 | system_rev = davinci_ids[i].type; | 100 | davinci_revision = davinci_ids[i].type; |
79 | break; | 101 | break; |
80 | } | 102 | } |
81 | } | 103 | } |
@@ -84,10 +106,11 @@ void __init davinci_check_revision(void) | |||
84 | for (i = 0; i < ARRAY_SIZE(davinci_ids); i++) { | 106 | for (i = 0; i < ARRAY_SIZE(davinci_ids); i++) { |
85 | if (part_no == davinci_ids[i].part_no && | 107 | if (part_no == davinci_ids[i].part_no && |
86 | variant == davinci_ids[i].variant) { | 108 | variant == davinci_ids[i].variant) { |
87 | system_rev = davinci_ids[i].type; | 109 | davinci_revision = davinci_ids[i].type; |
88 | break; | 110 | break; |
89 | } | 111 | } |
90 | } | 112 | } |
91 | 113 | ||
92 | printk("DaVinci DM%04x variant 0x%x\n", system_rev >> 16, variant); | 114 | printk(KERN_INFO "DaVinci DM%04x variant 0x%x\n", |
115 | davinci_rev(), variant); | ||
93 | } | 116 | } |
diff --git a/arch/arm/mach-davinci/include/mach/board-dm6446evm.h b/arch/arm/mach-davinci/include/mach/board-dm6446evm.h new file mode 100644 index 000000000000..3216f21c1238 --- /dev/null +++ b/arch/arm/mach-davinci/include/mach/board-dm6446evm.h | |||
@@ -0,0 +1,20 @@ | |||
1 | /* | ||
2 | * DaVinci DM6446 EVM board specific headers | ||
3 | * | ||
4 | * Author: Kevin Hilman, Deep Root Systems, LLC | ||
5 | * | ||
6 | * 2007 (c) Deep Root Systems, LLC. This file is licensed under | ||
7 | * the terms of the GNU General Public License version 2. This program | ||
8 | * is licensed "as is" without any warranty of any kind, whether express | ||
9 | * or ifndef. | ||
10 | */ | ||
11 | |||
12 | #ifndef _MACH_DAVINCI_DM6446EVM_H | ||
13 | #define _MACH_DAVINCI_DM6446EVM_H | ||
14 | |||
15 | #include <linux/types.h> | ||
16 | |||
17 | int dm6446evm_eeprom_read(char *buf, off_t off, size_t count); | ||
18 | int dm6446evm_eeprom_write(char *buf, off_t off, size_t count); | ||
19 | |||
20 | #endif | ||
diff --git a/arch/arm/mach-davinci/include/mach/clkdev.h b/arch/arm/mach-davinci/include/mach/clkdev.h new file mode 100644 index 000000000000..730c49d1ebd8 --- /dev/null +++ b/arch/arm/mach-davinci/include/mach/clkdev.h | |||
@@ -0,0 +1,13 @@ | |||
1 | #ifndef __MACH_CLKDEV_H | ||
2 | #define __MACH_CLKDEV_H | ||
3 | |||
4 | static inline int __clk_get(struct clk *clk) | ||
5 | { | ||
6 | return 1; | ||
7 | } | ||
8 | |||
9 | static inline void __clk_put(struct clk *clk) | ||
10 | { | ||
11 | } | ||
12 | |||
13 | #endif | ||
diff --git a/arch/arm/mach-davinci/include/mach/clock.h b/arch/arm/mach-davinci/include/mach/clock.h index 38bdd49bc181..a3b040219876 100644 --- a/arch/arm/mach-davinci/include/mach/clock.h +++ b/arch/arm/mach-davinci/include/mach/clock.h | |||
@@ -17,6 +17,5 @@ struct clk; | |||
17 | 17 | ||
18 | extern int clk_register(struct clk *clk); | 18 | extern int clk_register(struct clk *clk); |
19 | extern void clk_unregister(struct clk *clk); | 19 | extern void clk_unregister(struct clk *clk); |
20 | extern int davinci_clk_init(void); | ||
21 | 20 | ||
22 | #endif | 21 | #endif |
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h index 4b522e5c70ec..191770976250 100644 --- a/arch/arm/mach-davinci/include/mach/common.h +++ b/arch/arm/mach-davinci/include/mach/common.h | |||
@@ -16,6 +16,12 @@ struct sys_timer; | |||
16 | 16 | ||
17 | extern struct sys_timer davinci_timer; | 17 | extern struct sys_timer davinci_timer; |
18 | 18 | ||
19 | extern void davinci_irq_init(void); | ||
20 | extern void davinci_map_common_io(void); | ||
21 | |||
22 | /* parameters describe VBUS sourcing for host mode */ | ||
23 | extern void setup_usb(unsigned mA, unsigned potpgt_msec); | ||
24 | |||
19 | /* parameters describe VBUS sourcing for host mode */ | 25 | /* parameters describe VBUS sourcing for host mode */ |
20 | extern void setup_usb(unsigned mA, unsigned potpgt_msec); | 26 | extern void setup_usb(unsigned mA, unsigned potpgt_msec); |
21 | 27 | ||
diff --git a/arch/arm/mach-davinci/include/mach/cputype.h b/arch/arm/mach-davinci/include/mach/cputype.h new file mode 100644 index 000000000000..27cfb1b3a662 --- /dev/null +++ b/arch/arm/mach-davinci/include/mach/cputype.h | |||
@@ -0,0 +1,49 @@ | |||
1 | /* | ||
2 | * DaVinci CPU type detection | ||
3 | * | ||
4 | * Author: Kevin Hilman, Deep Root Systems, LLC | ||
5 | * | ||
6 | * Defines the cpu_is_*() macros for runtime detection of DaVinci | ||
7 | * device type. In addtion, if support for a given device is not | ||
8 | * compiled in to the kernel, the macros return 0 so that | ||
9 | * resulting code can be optimized out. | ||
10 | * | ||
11 | * 2009 (c) Deep Root Systems, LLC. This file is licensed under | ||
12 | * the terms of the GNU General Public License version 2. This program | ||
13 | * is licensed "as is" without any warranty of any kind, whether express | ||
14 | * or implied. | ||
15 | */ | ||
16 | #ifndef _ASM_ARCH_CPU_H | ||
17 | #define _ASM_ARCH_CPU_H | ||
18 | |||
19 | extern unsigned int davinci_rev(void); | ||
20 | |||
21 | #define IS_DAVINCI_CPU(type, id) \ | ||
22 | static inline int is_davinci_dm ##type(void) \ | ||
23 | { \ | ||
24 | return (davinci_rev() == (id)) ? 1 : 0; \ | ||
25 | } | ||
26 | |||
27 | IS_DAVINCI_CPU(644x, 0x6446) | ||
28 | IS_DAVINCI_CPU(646x, 0x6467) | ||
29 | IS_DAVINCI_CPU(355, 0x355) | ||
30 | |||
31 | #ifdef CONFIG_ARCH_DAVINCI_DM644x | ||
32 | #define cpu_is_davinci_dm644x() is_davinci_dm644x() | ||
33 | #else | ||
34 | #define cpu_is_davinci_dm644x() 0 | ||
35 | #endif | ||
36 | |||
37 | #ifdef CONFIG_ARCH_DAVINCI_DM646x | ||
38 | #define cpu_is_davinci_dm646x() is_davinci_dm646x() | ||
39 | #else | ||
40 | #define cpu_is_davinci_dm646x() 0 | ||
41 | #endif | ||
42 | |||
43 | #ifdef CONFIG_ARCH_DAVINCI_DM355 | ||
44 | #define cpu_is_davinci_dm355() is_davinci_dm355() | ||
45 | #else | ||
46 | #define cpu_is_davinci_dm355() 0 | ||
47 | #endif | ||
48 | |||
49 | #endif | ||
diff --git a/arch/arm/mach-imx/include/mach/mx1ads.h b/arch/arm/mach-davinci/include/mach/dm644x.h index def05d510eb3..3dcb9f4e58b4 100644 --- a/arch/arm/mach-imx/include/mach/mx1ads.h +++ b/arch/arm/mach-davinci/include/mach/dm644x.h | |||
@@ -1,7 +1,8 @@ | |||
1 | /* | 1 | /* |
2 | * arch/arm/mach-imx/include/mach/mx1ads.h | 2 | * This file contains the processor specific definitions |
3 | * of the TI DM644x. | ||
3 | * | 4 | * |
4 | * Copyright (C) 2004 Robert Schwebel, Pengutronix | 5 | * Copyright (C) 2008 Texas Instruments. |
5 | * | 6 | * |
6 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 8 | * it under the terms of the GNU General Public License as published by |
@@ -18,19 +19,19 @@ | |||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | * | 20 | * |
20 | */ | 21 | */ |
22 | #ifndef __ASM_ARCH_DM644X_H | ||
23 | #define __ASM_ARCH_DM644X_H | ||
21 | 24 | ||
22 | #ifndef __ASM_ARCH_MX1ADS_H | 25 | #include <linux/platform_device.h> |
23 | #define __ASM_ARCH_MX1ADS_H | 26 | #include <mach/hardware.h> |
24 | 27 | ||
25 | /* ------------------------------------------------------------------------ */ | 28 | #define DM644X_EMAC_BASE (0x01C80000) |
26 | /* Memory Map for the M9328MX1ADS (MX1ADS) Board */ | 29 | #define DM644X_EMAC_CNTRL_OFFSET (0x0000) |
27 | /* ------------------------------------------------------------------------ */ | 30 | #define DM644X_EMAC_CNTRL_MOD_OFFSET (0x1000) |
31 | #define DM644X_EMAC_CNTRL_RAM_OFFSET (0x2000) | ||
32 | #define DM644X_EMAC_MDIO_OFFSET (0x4000) | ||
33 | #define DM644X_EMAC_CNTRL_RAM_SIZE (0x2000) | ||
28 | 34 | ||
29 | #define MX1ADS_FLASH_PHYS 0x10000000 | 35 | void __init dm644x_init(void); |
30 | #define MX1ADS_FLASH_SIZE (16*1024*1024) | ||
31 | 36 | ||
32 | #define IMX_FB_PHYS (0x0C000000 - 0x40000) | 37 | #endif /* __ASM_ARCH_DM644X_H */ |
33 | |||
34 | #define CLK32 32000 | ||
35 | |||
36 | #endif /* __ASM_ARCH_MX1ADS_H */ | ||
diff --git a/arch/arm/mach-davinci/include/mach/edma.h b/arch/arm/mach-davinci/include/mach/edma.h new file mode 100644 index 000000000000..f6fc5396dafc --- /dev/null +++ b/arch/arm/mach-davinci/include/mach/edma.h | |||
@@ -0,0 +1,228 @@ | |||
1 | /* | ||
2 | * TI DAVINCI dma definitions | ||
3 | * | ||
4 | * Copyright (C) 2006-2009 Texas Instruments. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | * | ||
11 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED | ||
12 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | ||
13 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN | ||
14 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | ||
15 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | ||
16 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF | ||
17 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | ||
18 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
19 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | ||
20 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
21 | * | ||
22 | * You should have received a copy of the GNU General Public License along | ||
23 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
24 | * 675 Mass Ave, Cambridge, MA 02139, USA. | ||
25 | * | ||
26 | */ | ||
27 | |||
28 | /* | ||
29 | * This EDMA3 programming framework exposes two basic kinds of resource: | ||
30 | * | ||
31 | * Channel Triggers transfers, usually from a hardware event but | ||
32 | * also manually or by "chaining" from DMA completions. | ||
33 | * Each channel is coupled to a Parameter RAM (PaRAM) slot. | ||
34 | * | ||
35 | * Slot Each PaRAM slot holds a DMA transfer descriptor (PaRAM | ||
36 | * "set"), source and destination addresses, a link to a | ||
37 | * next PaRAM slot (if any), options for the transfer, and | ||
38 | * instructions for updating those addresses. There are | ||
39 | * more than twice as many slots as event channels. | ||
40 | * | ||
41 | * Each PaRAM set describes a sequence of transfers, either for one large | ||
42 | * buffer or for several discontiguous smaller buffers. An EDMA transfer | ||
43 | * is driven only from a channel, which performs the transfers specified | ||
44 | * in its PaRAM slot until there are no more transfers. When that last | ||
45 | * transfer completes, the "link" field may be used to reload the channel's | ||
46 | * PaRAM slot with a new transfer descriptor. | ||
47 | * | ||
48 | * The EDMA Channel Controller (CC) maps requests from channels into physical | ||
49 | * Transfer Controller (TC) requests when the channel triggers (by hardware | ||
50 | * or software events, or by chaining). The two physical DMA channels provided | ||
51 | * by the TCs are thus shared by many logical channels. | ||
52 | * | ||
53 | * DaVinci hardware also has a "QDMA" mechanism which is not currently | ||
54 | * supported through this interface. (DSP firmware uses it though.) | ||
55 | */ | ||
56 | |||
57 | #ifndef EDMA_H_ | ||
58 | #define EDMA_H_ | ||
59 | |||
60 | /* PaRAM slots are laid out like this */ | ||
61 | struct edmacc_param { | ||
62 | unsigned int opt; | ||
63 | unsigned int src; | ||
64 | unsigned int a_b_cnt; | ||
65 | unsigned int dst; | ||
66 | unsigned int src_dst_bidx; | ||
67 | unsigned int link_bcntrld; | ||
68 | unsigned int src_dst_cidx; | ||
69 | unsigned int ccnt; | ||
70 | }; | ||
71 | |||
72 | #define CCINT0_INTERRUPT 16 | ||
73 | #define CCERRINT_INTERRUPT 17 | ||
74 | #define TCERRINT0_INTERRUPT 18 | ||
75 | #define TCERRINT1_INTERRUPT 19 | ||
76 | |||
77 | /* fields in edmacc_param.opt */ | ||
78 | #define SAM BIT(0) | ||
79 | #define DAM BIT(1) | ||
80 | #define SYNCDIM BIT(2) | ||
81 | #define STATIC BIT(3) | ||
82 | #define EDMA_FWID (0x07 << 8) | ||
83 | #define TCCMODE BIT(11) | ||
84 | #define EDMA_TCC(t) ((t) << 12) | ||
85 | #define TCINTEN BIT(20) | ||
86 | #define ITCINTEN BIT(21) | ||
87 | #define TCCHEN BIT(22) | ||
88 | #define ITCCHEN BIT(23) | ||
89 | |||
90 | #define TRWORD (0x7<<2) | ||
91 | #define PAENTRY (0x1ff<<5) | ||
92 | |||
93 | /* Drivers should avoid using these symbolic names for dm644x | ||
94 | * channels, and use platform_device IORESOURCE_DMA resources | ||
95 | * instead. (Other DaVinci chips have different peripherals | ||
96 | * and thus have different DMA channel mappings.) | ||
97 | */ | ||
98 | #define DAVINCI_DMA_MCBSP_TX 2 | ||
99 | #define DAVINCI_DMA_MCBSP_RX 3 | ||
100 | #define DAVINCI_DMA_VPSS_HIST 4 | ||
101 | #define DAVINCI_DMA_VPSS_H3A 5 | ||
102 | #define DAVINCI_DMA_VPSS_PRVU 6 | ||
103 | #define DAVINCI_DMA_VPSS_RSZ 7 | ||
104 | #define DAVINCI_DMA_IMCOP_IMXINT 8 | ||
105 | #define DAVINCI_DMA_IMCOP_VLCDINT 9 | ||
106 | #define DAVINCI_DMA_IMCO_PASQINT 10 | ||
107 | #define DAVINCI_DMA_IMCOP_DSQINT 11 | ||
108 | #define DAVINCI_DMA_SPI_SPIX 16 | ||
109 | #define DAVINCI_DMA_SPI_SPIR 17 | ||
110 | #define DAVINCI_DMA_UART0_URXEVT0 18 | ||
111 | #define DAVINCI_DMA_UART0_UTXEVT0 19 | ||
112 | #define DAVINCI_DMA_UART1_URXEVT1 20 | ||
113 | #define DAVINCI_DMA_UART1_UTXEVT1 21 | ||
114 | #define DAVINCI_DMA_UART2_URXEVT2 22 | ||
115 | #define DAVINCI_DMA_UART2_UTXEVT2 23 | ||
116 | #define DAVINCI_DMA_MEMSTK_MSEVT 24 | ||
117 | #define DAVINCI_DMA_MMCRXEVT 26 | ||
118 | #define DAVINCI_DMA_MMCTXEVT 27 | ||
119 | #define DAVINCI_DMA_I2C_ICREVT 28 | ||
120 | #define DAVINCI_DMA_I2C_ICXEVT 29 | ||
121 | #define DAVINCI_DMA_GPIO_GPINT0 32 | ||
122 | #define DAVINCI_DMA_GPIO_GPINT1 33 | ||
123 | #define DAVINCI_DMA_GPIO_GPINT2 34 | ||
124 | #define DAVINCI_DMA_GPIO_GPINT3 35 | ||
125 | #define DAVINCI_DMA_GPIO_GPINT4 36 | ||
126 | #define DAVINCI_DMA_GPIO_GPINT5 37 | ||
127 | #define DAVINCI_DMA_GPIO_GPINT6 38 | ||
128 | #define DAVINCI_DMA_GPIO_GPINT7 39 | ||
129 | #define DAVINCI_DMA_GPIO_GPBNKINT0 40 | ||
130 | #define DAVINCI_DMA_GPIO_GPBNKINT1 41 | ||
131 | #define DAVINCI_DMA_GPIO_GPBNKINT2 42 | ||
132 | #define DAVINCI_DMA_GPIO_GPBNKINT3 43 | ||
133 | #define DAVINCI_DMA_GPIO_GPBNKINT4 44 | ||
134 | #define DAVINCI_DMA_TIMER0_TINT0 48 | ||
135 | #define DAVINCI_DMA_TIMER1_TINT1 49 | ||
136 | #define DAVINCI_DMA_TIMER2_TINT2 50 | ||
137 | #define DAVINCI_DMA_TIMER3_TINT3 51 | ||
138 | #define DAVINCI_DMA_PWM0 52 | ||
139 | #define DAVINCI_DMA_PWM1 53 | ||
140 | #define DAVINCI_DMA_PWM2 54 | ||
141 | |||
142 | /*ch_status paramater of callback function possible values*/ | ||
143 | #define DMA_COMPLETE 1 | ||
144 | #define DMA_CC_ERROR 2 | ||
145 | #define DMA_TC1_ERROR 3 | ||
146 | #define DMA_TC2_ERROR 4 | ||
147 | |||
148 | enum address_mode { | ||
149 | INCR = 0, | ||
150 | FIFO = 1 | ||
151 | }; | ||
152 | |||
153 | enum fifo_width { | ||
154 | W8BIT = 0, | ||
155 | W16BIT = 1, | ||
156 | W32BIT = 2, | ||
157 | W64BIT = 3, | ||
158 | W128BIT = 4, | ||
159 | W256BIT = 5 | ||
160 | }; | ||
161 | |||
162 | enum dma_event_q { | ||
163 | EVENTQ_0 = 0, | ||
164 | EVENTQ_1 = 1, | ||
165 | EVENTQ_DEFAULT = -1 | ||
166 | }; | ||
167 | |||
168 | enum sync_dimension { | ||
169 | ASYNC = 0, | ||
170 | ABSYNC = 1 | ||
171 | }; | ||
172 | |||
173 | #define EDMA_CHANNEL_ANY -1 /* for edma_alloc_channel() */ | ||
174 | #define EDMA_SLOT_ANY -1 /* for edma_alloc_slot() */ | ||
175 | |||
176 | /* alloc/free DMA channels and their dedicated parameter RAM slots */ | ||
177 | int edma_alloc_channel(int channel, | ||
178 | void (*callback)(unsigned channel, u16 ch_status, void *data), | ||
179 | void *data, enum dma_event_q); | ||
180 | void edma_free_channel(unsigned channel); | ||
181 | |||
182 | /* alloc/free parameter RAM slots */ | ||
183 | int edma_alloc_slot(int slot); | ||
184 | void edma_free_slot(unsigned slot); | ||
185 | |||
186 | /* calls that operate on part of a parameter RAM slot */ | ||
187 | void edma_set_src(unsigned slot, dma_addr_t src_port, | ||
188 | enum address_mode mode, enum fifo_width); | ||
189 | void edma_set_dest(unsigned slot, dma_addr_t dest_port, | ||
190 | enum address_mode mode, enum fifo_width); | ||
191 | void edma_get_position(unsigned slot, dma_addr_t *src, dma_addr_t *dst); | ||
192 | void edma_set_src_index(unsigned slot, s16 src_bidx, s16 src_cidx); | ||
193 | void edma_set_dest_index(unsigned slot, s16 dest_bidx, s16 dest_cidx); | ||
194 | void edma_set_transfer_params(unsigned slot, u16 acnt, u16 bcnt, u16 ccnt, | ||
195 | u16 bcnt_rld, enum sync_dimension sync_mode); | ||
196 | void edma_link(unsigned from, unsigned to); | ||
197 | void edma_unlink(unsigned from); | ||
198 | |||
199 | /* calls that operate on an entire parameter RAM slot */ | ||
200 | void edma_write_slot(unsigned slot, const struct edmacc_param *params); | ||
201 | void edma_read_slot(unsigned slot, struct edmacc_param *params); | ||
202 | |||
203 | /* channel control operations */ | ||
204 | int edma_start(unsigned channel); | ||
205 | void edma_stop(unsigned channel); | ||
206 | void edma_clean_channel(unsigned channel); | ||
207 | void edma_clear_event(unsigned channel); | ||
208 | void edma_pause(unsigned channel); | ||
209 | void edma_resume(unsigned channel); | ||
210 | |||
211 | /* UNRELATED TO DMA */ | ||
212 | int davinci_alloc_iram(unsigned size); | ||
213 | void davinci_free_iram(unsigned addr, unsigned size); | ||
214 | |||
215 | /* platform_data for EDMA driver */ | ||
216 | struct edma_soc_info { | ||
217 | |||
218 | /* how many dma resources of each type */ | ||
219 | unsigned n_channel; | ||
220 | unsigned n_region; | ||
221 | unsigned n_slot; | ||
222 | unsigned n_tc; | ||
223 | |||
224 | /* list of channels with no even trigger; terminated by "-1" */ | ||
225 | const s8 *noevent; | ||
226 | }; | ||
227 | |||
228 | #endif | ||
diff --git a/arch/arm/mach-davinci/include/mach/gpio.h b/arch/arm/mach-davinci/include/mach/gpio.h index b456f079f43f..efe3281364e6 100644 --- a/arch/arm/mach-davinci/include/mach/gpio.h +++ b/arch/arm/mach-davinci/include/mach/gpio.h | |||
@@ -15,9 +15,11 @@ | |||
15 | 15 | ||
16 | #include <linux/io.h> | 16 | #include <linux/io.h> |
17 | #include <asm-generic/gpio.h> | 17 | #include <asm-generic/gpio.h> |
18 | #include <mach/hardware.h> | 18 | |
19 | #include <mach/irqs.h> | 19 | #include <mach/irqs.h> |
20 | 20 | ||
21 | #define DAVINCI_GPIO_BASE 0x01C67000 | ||
22 | |||
21 | /* | 23 | /* |
22 | * basic gpio routines | 24 | * basic gpio routines |
23 | * | 25 | * |
@@ -26,23 +28,18 @@ | |||
26 | * go through boot loaders. | 28 | * go through boot loaders. |
27 | * | 29 | * |
28 | * the gpio clock will be turned on when gpios are used, and you may also | 30 | * the gpio clock will be turned on when gpios are used, and you may also |
29 | * need to pay attention to PINMUX0 and PINMUX1 to be sure those pins are | 31 | * need to pay attention to PINMUX registers to be sure those pins are |
30 | * used as gpios, not with other peripherals. | 32 | * used as gpios, not with other peripherals. |
31 | * | 33 | * |
32 | * On-chip GPIOs are numbered 0..(DAVINCI_N_GPIO-1). For documentation, | 34 | * On-chip GPIOs are numbered 0..(DAVINCI_N_GPIO-1). For documentation, |
33 | * and maybe for later updates, code should write GPIO(N) or: | 35 | * and maybe for later updates, code may write GPIO(N). These may be |
34 | * - GPIOV18(N) for 1.8V pins, N in 0..53; same as GPIO(0)..GPIO(53) | 36 | * all 1.8V signals, all 3.3V ones, or a mix of the two. A given chip |
35 | * - GPIOV33(N) for 3.3V pins, N in 0..17; same as GPIO(54)..GPIO(70) | 37 | * may not support all the GPIOs in that range. |
36 | * | ||
37 | * For GPIO IRQs use gpio_to_irq(GPIO(N)) or gpio_to_irq(GPIOV33(N)) etc | ||
38 | * for now, that's != GPIO(N) | ||
39 | * | 38 | * |
40 | * GPIOs can also be on external chips, numbered after the ones built-in | 39 | * GPIOs can also be on external chips, numbered after the ones built-in |
41 | * to the DaVinci chip. For now, they won't be usable as IRQ sources. | 40 | * to the DaVinci chip. For now, they won't be usable as IRQ sources. |
42 | */ | 41 | */ |
43 | #define GPIO(X) (X) /* 0 <= X <= 70 */ | 42 | #define GPIO(X) (X) /* 0 <= X <= (DAVINCI_N_GPIO - 1) */ |
44 | #define GPIOV18(X) (X) /* 1.8V i/o; 0 <= X <= 53 */ | ||
45 | #define GPIOV33(X) ((X)+54) /* 3.3V i/o; 0 <= X <= 17 */ | ||
46 | 43 | ||
47 | struct gpio_controller { | 44 | struct gpio_controller { |
48 | u32 dir; | 45 | u32 dir; |
@@ -71,12 +68,14 @@ __gpio_to_controller(unsigned gpio) | |||
71 | { | 68 | { |
72 | void *__iomem ptr; | 69 | void *__iomem ptr; |
73 | 70 | ||
74 | if (gpio < 32) | 71 | if (gpio < 32 * 1) |
75 | ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x10); | 72 | ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x10); |
76 | else if (gpio < 64) | 73 | else if (gpio < 32 * 2) |
77 | ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x38); | 74 | ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x38); |
78 | else if (gpio < DAVINCI_N_GPIO) | 75 | else if (gpio < 32 * 3) |
79 | ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x60); | 76 | ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x60); |
77 | else if (gpio < 32 * 4) | ||
78 | ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x88); | ||
80 | else | 79 | else |
81 | ptr = NULL; | 80 | ptr = NULL; |
82 | return ptr; | 81 | return ptr; |
diff --git a/arch/arm/mach-davinci/include/mach/hardware.h b/arch/arm/mach-davinci/include/mach/hardware.h index a2e8969afaca..48c77934d519 100644 --- a/arch/arm/mach-davinci/include/mach/hardware.h +++ b/arch/arm/mach-davinci/include/mach/hardware.h | |||
@@ -1,9 +1,9 @@ | |||
1 | /* | 1 | /* |
2 | * Common hardware definitions | 2 | * Hardware definitions common to all DaVinci family processors |
3 | * | 3 | * |
4 | * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com> | 4 | * Author: Kevin Hilman, Deep Root Systems, LLC |
5 | * | 5 | * |
6 | * 2007 (c) MontaVista Software, Inc. This file is licensed under | 6 | * 2007 (c) Deep Root Systems, LLC. This file is licensed under |
7 | * the terms of the GNU General Public License version 2. This program | 7 | * the terms of the GNU General Public License version 2. This program |
8 | * is licensed "as is" without any warranty of any kind, whether express | 8 | * is licensed "as is" without any warranty of any kind, whether express |
9 | * or implied. | 9 | * or implied. |
@@ -12,41 +12,16 @@ | |||
12 | #define __ASM_ARCH_HARDWARE_H | 12 | #define __ASM_ARCH_HARDWARE_H |
13 | 13 | ||
14 | /* | 14 | /* |
15 | * Base register addresses | 15 | * Before you add anything to ths file: |
16 | * | ||
17 | * This header is for defines common to ALL DaVinci family chips. | ||
18 | * Anything that is chip specific should go in <chipname>.h, | ||
19 | * and the chip/board init code should then explicitly include | ||
20 | * <chipname>.h | ||
16 | */ | 21 | */ |
17 | #define DAVINCI_DMA_3PCC_BASE (0x01C00000) | 22 | #define DAVINCI_SYSTEM_MODULE_BASE 0x01C40000 |
18 | #define DAVINCI_DMA_3PTC0_BASE (0x01C10000) | 23 | |
19 | #define DAVINCI_DMA_3PTC1_BASE (0x01C10400) | 24 | /* System control register offsets */ |
20 | #define DAVINCI_I2C_BASE (0x01C21000) | 25 | #define DM64XX_VDD3P3V_PWDN 0x48 |
21 | #define DAVINCI_PWM0_BASE (0x01C22000) | ||
22 | #define DAVINCI_PWM1_BASE (0x01C22400) | ||
23 | #define DAVINCI_PWM2_BASE (0x01C22800) | ||
24 | #define DAVINCI_SYSTEM_MODULE_BASE (0x01C40000) | ||
25 | #define DAVINCI_PLL_CNTRL0_BASE (0x01C40800) | ||
26 | #define DAVINCI_PLL_CNTRL1_BASE (0x01C40C00) | ||
27 | #define DAVINCI_PWR_SLEEP_CNTRL_BASE (0x01C41000) | ||
28 | #define DAVINCI_SYSTEM_DFT_BASE (0x01C42000) | ||
29 | #define DAVINCI_IEEE1394_BASE (0x01C60000) | ||
30 | #define DAVINCI_USB_OTG_BASE (0x01C64000) | ||
31 | #define DAVINCI_CFC_ATA_BASE (0x01C66000) | ||
32 | #define DAVINCI_SPI_BASE (0x01C66800) | ||
33 | #define DAVINCI_GPIO_BASE (0x01C67000) | ||
34 | #define DAVINCI_UHPI_BASE (0x01C67800) | ||
35 | #define DAVINCI_VPSS_REGS_BASE (0x01C70000) | ||
36 | #define DAVINCI_EMAC_CNTRL_REGS_BASE (0x01C80000) | ||
37 | #define DAVINCI_EMAC_WRAPPER_CNTRL_REGS_BASE (0x01C81000) | ||
38 | #define DAVINCI_EMAC_WRAPPER_RAM_BASE (0x01C82000) | ||
39 | #define DAVINCI_MDIO_CNTRL_REGS_BASE (0x01C84000) | ||
40 | #define DAVINCI_IMCOP_BASE (0x01CC0000) | ||
41 | #define DAVINCI_ASYNC_EMIF_CNTRL_BASE (0x01E00000) | ||
42 | #define DAVINCI_VLYNQ_BASE (0x01E01000) | ||
43 | #define DAVINCI_MCBSP_BASE (0x01E02000) | ||
44 | #define DAVINCI_MMC_SD_BASE (0x01E10000) | ||
45 | #define DAVINCI_MS_BASE (0x01E20000) | ||
46 | #define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE (0x02000000) | ||
47 | #define DAVINCI_ASYNC_EMIF_DATA_CE1_BASE (0x04000000) | ||
48 | #define DAVINCI_ASYNC_EMIF_DATA_CE2_BASE (0x06000000) | ||
49 | #define DAVINCI_ASYNC_EMIF_DATA_CE3_BASE (0x08000000) | ||
50 | #define DAVINCI_VLYNQ_REMOTE_BASE (0x0C000000) | ||
51 | 26 | ||
52 | #endif /* __ASM_ARCH_HARDWARE_H */ | 27 | #endif /* __ASM_ARCH_HARDWARE_H */ |
diff --git a/arch/arm/mach-davinci/include/mach/io.h b/arch/arm/mach-davinci/include/mach/io.h index a48795fd2417..2479785405af 100644 --- a/arch/arm/mach-davinci/include/mach/io.h +++ b/arch/arm/mach-davinci/include/mach/io.h | |||
@@ -40,22 +40,12 @@ | |||
40 | #else | 40 | #else |
41 | #define IOMEM(x) ((void __force __iomem *)(x)) | 41 | #define IOMEM(x) ((void __force __iomem *)(x)) |
42 | 42 | ||
43 | /* | 43 | #define __arch_ioremap(p, s, t) davinci_ioremap(p, s, t) |
44 | * Functions to access the DaVinci IO region | 44 | #define __arch_iounmap(v) davinci_iounmap(v) |
45 | * | ||
46 | * NOTE: - Use davinci_read/write[bwl] for physical register addresses | ||
47 | * - Use __raw_read/write[bwl]() for virtual register addresses | ||
48 | * - Use IO_ADDRESS(phys_addr) to convert registers to virtual addresses | ||
49 | * - DO NOT use hardcoded virtual addresses to allow changing the | ||
50 | * IO address space again if needed | ||
51 | */ | ||
52 | #define davinci_readb(a) __raw_readb(IO_ADDRESS(a)) | ||
53 | #define davinci_readw(a) __raw_readw(IO_ADDRESS(a)) | ||
54 | #define davinci_readl(a) __raw_readl(IO_ADDRESS(a)) | ||
55 | 45 | ||
56 | #define davinci_writeb(v, a) __raw_writeb(v, IO_ADDRESS(a)) | 46 | void __iomem *davinci_ioremap(unsigned long phys, size_t size, |
57 | #define davinci_writew(v, a) __raw_writew(v, IO_ADDRESS(a)) | 47 | unsigned int type); |
58 | #define davinci_writel(v, a) __raw_writel(v, IO_ADDRESS(a)) | 48 | void davinci_iounmap(volatile void __iomem *addr); |
59 | 49 | ||
60 | #endif /* __ASSEMBLER__ */ | 50 | #endif /* __ASSEMBLER__ */ |
61 | #endif /* __ASM_ARCH_IO_H */ | 51 | #endif /* __ASM_ARCH_IO_H */ |
diff --git a/arch/arm/mach-davinci/include/mach/irqs.h b/arch/arm/mach-davinci/include/mach/irqs.h index f4c5ca6da9f4..18066074c995 100644 --- a/arch/arm/mach-davinci/include/mach/irqs.h +++ b/arch/arm/mach-davinci/include/mach/irqs.h | |||
@@ -96,10 +96,111 @@ | |||
96 | #define IRQ_EMUINT 63 | 96 | #define IRQ_EMUINT 63 |
97 | 97 | ||
98 | #define DAVINCI_N_AINTC_IRQ 64 | 98 | #define DAVINCI_N_AINTC_IRQ 64 |
99 | #define DAVINCI_N_GPIO 71 | 99 | #define DAVINCI_N_GPIO 104 |
100 | 100 | ||
101 | #define NR_IRQS (DAVINCI_N_AINTC_IRQ + DAVINCI_N_GPIO) | 101 | #define NR_IRQS (DAVINCI_N_AINTC_IRQ + DAVINCI_N_GPIO) |
102 | 102 | ||
103 | #define ARCH_TIMER_IRQ IRQ_TINT1_TINT34 | 103 | #define ARCH_TIMER_IRQ IRQ_TINT1_TINT34 |
104 | 104 | ||
105 | /* DaVinci DM6467-specific Interrupts */ | ||
106 | #define IRQ_DM646X_VP_VERTINT0 0 | ||
107 | #define IRQ_DM646X_VP_VERTINT1 1 | ||
108 | #define IRQ_DM646X_VP_VERTINT2 2 | ||
109 | #define IRQ_DM646X_VP_VERTINT3 3 | ||
110 | #define IRQ_DM646X_VP_ERRINT 4 | ||
111 | #define IRQ_DM646X_RESERVED_1 5 | ||
112 | #define IRQ_DM646X_RESERVED_2 6 | ||
113 | #define IRQ_DM646X_WDINT 7 | ||
114 | #define IRQ_DM646X_CRGENINT0 8 | ||
115 | #define IRQ_DM646X_CRGENINT1 9 | ||
116 | #define IRQ_DM646X_TSIFINT0 10 | ||
117 | #define IRQ_DM646X_TSIFINT1 11 | ||
118 | #define IRQ_DM646X_VDCEINT 12 | ||
119 | #define IRQ_DM646X_USBINT 13 | ||
120 | #define IRQ_DM646X_USBDMAINT 14 | ||
121 | #define IRQ_DM646X_PCIINT 15 | ||
122 | #define IRQ_DM646X_TCERRINT2 20 | ||
123 | #define IRQ_DM646X_TCERRINT3 21 | ||
124 | #define IRQ_DM646X_IDE 22 | ||
125 | #define IRQ_DM646X_HPIINT 23 | ||
126 | #define IRQ_DM646X_EMACRXTHINT 24 | ||
127 | #define IRQ_DM646X_EMACRXINT 25 | ||
128 | #define IRQ_DM646X_EMACTXINT 26 | ||
129 | #define IRQ_DM646X_EMACMISCINT 27 | ||
130 | #define IRQ_DM646X_MCASP0TXINT 28 | ||
131 | #define IRQ_DM646X_MCASP0RXINT 29 | ||
132 | #define IRQ_DM646X_RESERVED_3 31 | ||
133 | #define IRQ_DM646X_MCASP1TXINT 32 | ||
134 | #define IRQ_DM646X_VLQINT 38 | ||
135 | #define IRQ_DM646X_UARTINT2 42 | ||
136 | #define IRQ_DM646X_SPINT0 43 | ||
137 | #define IRQ_DM646X_SPINT1 44 | ||
138 | #define IRQ_DM646X_DSP2ARMINT 45 | ||
139 | #define IRQ_DM646X_RESERVED_4 46 | ||
140 | #define IRQ_DM646X_PSCINT 47 | ||
141 | #define IRQ_DM646X_GPIO0 48 | ||
142 | #define IRQ_DM646X_GPIO1 49 | ||
143 | #define IRQ_DM646X_GPIO2 50 | ||
144 | #define IRQ_DM646X_GPIO3 51 | ||
145 | #define IRQ_DM646X_GPIO4 52 | ||
146 | #define IRQ_DM646X_GPIO5 53 | ||
147 | #define IRQ_DM646X_GPIO6 54 | ||
148 | #define IRQ_DM646X_GPIO7 55 | ||
149 | #define IRQ_DM646X_GPIOBNK0 56 | ||
150 | #define IRQ_DM646X_GPIOBNK1 57 | ||
151 | #define IRQ_DM646X_GPIOBNK2 58 | ||
152 | #define IRQ_DM646X_DDRINT 59 | ||
153 | #define IRQ_DM646X_AEMIFINT 60 | ||
154 | |||
155 | /* DaVinci DM355-specific Interrupts */ | ||
156 | #define IRQ_DM355_CCDC_VDINT0 0 | ||
157 | #define IRQ_DM355_CCDC_VDINT1 1 | ||
158 | #define IRQ_DM355_CCDC_VDINT2 2 | ||
159 | #define IRQ_DM355_IPIPE_HST 3 | ||
160 | #define IRQ_DM355_H3AINT 4 | ||
161 | #define IRQ_DM355_IPIPE_SDR 5 | ||
162 | #define IRQ_DM355_IPIPEIFINT 6 | ||
163 | #define IRQ_DM355_OSDINT 7 | ||
164 | #define IRQ_DM355_VENCINT 8 | ||
165 | #define IRQ_DM355_IMCOPINT 11 | ||
166 | #define IRQ_DM355_RTOINT 13 | ||
167 | #define IRQ_DM355_TINT4 13 | ||
168 | #define IRQ_DM355_TINT2_TINT12 13 | ||
169 | #define IRQ_DM355_UARTINT2 14 | ||
170 | #define IRQ_DM355_TINT5 14 | ||
171 | #define IRQ_DM355_TINT2_TINT34 14 | ||
172 | #define IRQ_DM355_TINT6 15 | ||
173 | #define IRQ_DM355_TINT3_TINT12 15 | ||
174 | #define IRQ_DM355_SPINT1_0 17 | ||
175 | #define IRQ_DM355_SPINT1_1 18 | ||
176 | #define IRQ_DM355_SPINT2_0 19 | ||
177 | #define IRQ_DM355_SPINT2_1 21 | ||
178 | #define IRQ_DM355_TINT7 22 | ||
179 | #define IRQ_DM355_TINT3_TINT34 22 | ||
180 | #define IRQ_DM355_SDIOINT0 23 | ||
181 | #define IRQ_DM355_MMCINT0 26 | ||
182 | #define IRQ_DM355_MSINT 26 | ||
183 | #define IRQ_DM355_MMCINT1 27 | ||
184 | #define IRQ_DM355_PWMINT3 28 | ||
185 | #define IRQ_DM355_SDIOINT1 31 | ||
186 | #define IRQ_DM355_SPINT0_0 42 | ||
187 | #define IRQ_DM355_SPINT0_1 43 | ||
188 | #define IRQ_DM355_GPIO0 44 | ||
189 | #define IRQ_DM355_GPIO1 45 | ||
190 | #define IRQ_DM355_GPIO2 46 | ||
191 | #define IRQ_DM355_GPIO3 47 | ||
192 | #define IRQ_DM355_GPIO4 48 | ||
193 | #define IRQ_DM355_GPIO5 49 | ||
194 | #define IRQ_DM355_GPIO6 50 | ||
195 | #define IRQ_DM355_GPIO7 51 | ||
196 | #define IRQ_DM355_GPIO8 52 | ||
197 | #define IRQ_DM355_GPIO9 53 | ||
198 | #define IRQ_DM355_GPIOBNK0 54 | ||
199 | #define IRQ_DM355_GPIOBNK1 55 | ||
200 | #define IRQ_DM355_GPIOBNK2 56 | ||
201 | #define IRQ_DM355_GPIOBNK3 57 | ||
202 | #define IRQ_DM355_GPIOBNK4 58 | ||
203 | #define IRQ_DM355_GPIOBNK5 59 | ||
204 | #define IRQ_DM355_GPIOBNK6 60 | ||
205 | |||
105 | #endif /* __ASM_ARCH_IRQS_H */ | 206 | #endif /* __ASM_ARCH_IRQS_H */ |
diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h index c24b6782804d..bae22cb3e27b 100644 --- a/arch/arm/mach-davinci/include/mach/mux.h +++ b/arch/arm/mach-davinci/include/mach/mux.h | |||
@@ -1,55 +1,183 @@ | |||
1 | /* | 1 | /* |
2 | * DaVinci pin multiplexing defines | 2 | * Table of the DAVINCI register configurations for the PINMUX combinations |
3 | * | 3 | * |
4 | * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com> | 4 | * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com> |
5 | * | 5 | * |
6 | * Based on linux/include/asm-arm/arch-omap/mux.h: | ||
7 | * Copyright (C) 2003 - 2005 Nokia Corporation | ||
8 | * | ||
9 | * Written by Tony Lindgren | ||
10 | * | ||
6 | * 2007 (c) MontaVista Software, Inc. This file is licensed under | 11 | * 2007 (c) MontaVista Software, Inc. This file is licensed under |
7 | * the terms of the GNU General Public License version 2. This program | 12 | * the terms of the GNU General Public License version 2. This program |
8 | * is licensed "as is" without any warranty of any kind, whether express | 13 | * is licensed "as is" without any warranty of any kind, whether express |
9 | * or implied. | 14 | * or implied. |
15 | * | ||
16 | * Copyright (C) 2008 Texas Instruments. | ||
10 | */ | 17 | */ |
11 | #ifndef __ASM_ARCH_MUX_H | 18 | |
12 | #define __ASM_ARCH_MUX_H | 19 | #ifndef __INC_MACH_MUX_H |
13 | 20 | #define __INC_MACH_MUX_H | |
14 | #define DAVINCI_MUX_AEAW0 0 | 21 | |
15 | #define DAVINCI_MUX_AEAW1 1 | 22 | /* System module registers */ |
16 | #define DAVINCI_MUX_AEAW2 2 | 23 | #define PINMUX0 0x00 |
17 | #define DAVINCI_MUX_AEAW3 3 | 24 | #define PINMUX1 0x04 |
18 | #define DAVINCI_MUX_AEAW4 4 | 25 | /* dm355 only */ |
19 | #define DAVINCI_MUX_AECS4 10 | 26 | #define PINMUX2 0x08 |
20 | #define DAVINCI_MUX_AECS5 11 | 27 | #define PINMUX3 0x0c |
21 | #define DAVINCI_MUX_VLYNQWD0 12 | 28 | #define PINMUX4 0x10 |
22 | #define DAVINCI_MUX_VLYNQWD1 13 | 29 | #define INTMUX 0x18 |
23 | #define DAVINCI_MUX_VLSCREN 14 | 30 | #define EVTMUX 0x1c |
24 | #define DAVINCI_MUX_VLYNQEN 15 | 31 | |
25 | #define DAVINCI_MUX_HDIREN 16 | 32 | struct mux_config { |
26 | #define DAVINCI_MUX_ATAEN 17 | 33 | const char *name; |
27 | #define DAVINCI_MUX_RGB666 22 | 34 | const char *mux_reg_name; |
28 | #define DAVINCI_MUX_RGB888 23 | 35 | const unsigned char mux_reg; |
29 | #define DAVINCI_MUX_LOEEN 24 | 36 | const unsigned char mask_offset; |
30 | #define DAVINCI_MUX_LFLDEN 25 | 37 | const unsigned char mask; |
31 | #define DAVINCI_MUX_CWEN 26 | 38 | const unsigned char mode; |
32 | #define DAVINCI_MUX_CFLDEN 27 | 39 | bool debug; |
33 | #define DAVINCI_MUX_HPIEN 29 | 40 | }; |
34 | #define DAVINCI_MUX_1394EN 30 | 41 | |
35 | #define DAVINCI_MUX_EMACEN 31 | 42 | enum davinci_dm644x_index { |
36 | 43 | /* ATA and HDDIR functions */ | |
37 | #define DAVINCI_MUX_LEVEL2 32 | 44 | DM644X_HDIREN, |
38 | #define DAVINCI_MUX_UART0 (DAVINCI_MUX_LEVEL2 + 0) | 45 | DM644X_ATAEN, |
39 | #define DAVINCI_MUX_UART1 (DAVINCI_MUX_LEVEL2 + 1) | 46 | DM644X_ATAEN_DISABLE, |
40 | #define DAVINCI_MUX_UART2 (DAVINCI_MUX_LEVEL2 + 2) | 47 | |
41 | #define DAVINCI_MUX_U2FLO (DAVINCI_MUX_LEVEL2 + 3) | 48 | /* HPI functions */ |
42 | #define DAVINCI_MUX_PWM0 (DAVINCI_MUX_LEVEL2 + 4) | 49 | DM644X_HPIEN_DISABLE, |
43 | #define DAVINCI_MUX_PWM1 (DAVINCI_MUX_LEVEL2 + 5) | 50 | |
44 | #define DAVINCI_MUX_PWM2 (DAVINCI_MUX_LEVEL2 + 6) | 51 | /* AEAW functions */ |
45 | #define DAVINCI_MUX_I2C (DAVINCI_MUX_LEVEL2 + 7) | 52 | DM644X_AEAW, |
46 | #define DAVINCI_MUX_SPI (DAVINCI_MUX_LEVEL2 + 8) | 53 | |
47 | #define DAVINCI_MUX_MSTK (DAVINCI_MUX_LEVEL2 + 9) | 54 | /* Memory Stick */ |
48 | #define DAVINCI_MUX_ASP (DAVINCI_MUX_LEVEL2 + 10) | 55 | DM644X_MSTK, |
49 | #define DAVINCI_MUX_CLK0 (DAVINCI_MUX_LEVEL2 + 16) | 56 | |
50 | #define DAVINCI_MUX_CLK1 (DAVINCI_MUX_LEVEL2 + 17) | 57 | /* I2C */ |
51 | #define DAVINCI_MUX_TIMIN (DAVINCI_MUX_LEVEL2 + 18) | 58 | DM644X_I2C, |
52 | 59 | ||
53 | extern void davinci_mux_peripheral(unsigned int mux, unsigned int enable); | 60 | /* ASP function */ |
54 | 61 | DM644X_MCBSP, | |
55 | #endif /* __ASM_ARCH_MUX_H */ | 62 | |
63 | /* UART1 */ | ||
64 | DM644X_UART1, | ||
65 | |||
66 | /* UART2 */ | ||
67 | DM644X_UART2, | ||
68 | |||
69 | /* PWM0 */ | ||
70 | DM644X_PWM0, | ||
71 | |||
72 | /* PWM1 */ | ||
73 | DM644X_PWM1, | ||
74 | |||
75 | /* PWM2 */ | ||
76 | DM644X_PWM2, | ||
77 | |||
78 | /* VLYNQ function */ | ||
79 | DM644X_VLYNQEN, | ||
80 | DM644X_VLSCREN, | ||
81 | DM644X_VLYNQWD, | ||
82 | |||
83 | /* EMAC and MDIO function */ | ||
84 | DM644X_EMACEN, | ||
85 | |||
86 | /* GPIO3V[0:16] pins */ | ||
87 | DM644X_GPIO3V, | ||
88 | |||
89 | /* GPIO pins */ | ||
90 | DM644X_GPIO0, | ||
91 | DM644X_GPIO3, | ||
92 | DM644X_GPIO43_44, | ||
93 | DM644X_GPIO46_47, | ||
94 | |||
95 | /* VPBE */ | ||
96 | DM644X_RGB666, | ||
97 | |||
98 | /* LCD */ | ||
99 | DM644X_LOEEN, | ||
100 | DM644X_LFLDEN, | ||
101 | }; | ||
102 | |||
103 | enum davinci_dm646x_index { | ||
104 | /* ATA function */ | ||
105 | DM646X_ATAEN, | ||
106 | |||
107 | /* AUDIO Clock */ | ||
108 | DM646X_AUDCK1, | ||
109 | DM646X_AUDCK0, | ||
110 | |||
111 | /* CRGEN Control */ | ||
112 | DM646X_CRGMUX, | ||
113 | |||
114 | /* VPIF Control */ | ||
115 | DM646X_STSOMUX_DISABLE, | ||
116 | DM646X_STSIMUX_DISABLE, | ||
117 | DM646X_PTSOMUX_DISABLE, | ||
118 | DM646X_PTSIMUX_DISABLE, | ||
119 | |||
120 | /* TSIF Control */ | ||
121 | DM646X_STSOMUX, | ||
122 | DM646X_STSIMUX, | ||
123 | DM646X_PTSOMUX_PARALLEL, | ||
124 | DM646X_PTSIMUX_PARALLEL, | ||
125 | DM646X_PTSOMUX_SERIAL, | ||
126 | DM646X_PTSIMUX_SERIAL, | ||
127 | }; | ||
128 | |||
129 | enum davinci_dm355_index { | ||
130 | /* MMC/SD 0 */ | ||
131 | DM355_MMCSD0, | ||
132 | |||
133 | /* MMC/SD 1 */ | ||
134 | DM355_SD1_CLK, | ||
135 | DM355_SD1_CMD, | ||
136 | DM355_SD1_DATA3, | ||
137 | DM355_SD1_DATA2, | ||
138 | DM355_SD1_DATA1, | ||
139 | DM355_SD1_DATA0, | ||
140 | |||
141 | /* I2C */ | ||
142 | DM355_I2C_SDA, | ||
143 | DM355_I2C_SCL, | ||
144 | |||
145 | /* ASP0 function */ | ||
146 | DM355_MCBSP0_BDX, | ||
147 | DM355_MCBSP0_X, | ||
148 | DM355_MCBSP0_BFSX, | ||
149 | DM355_MCBSP0_BDR, | ||
150 | DM355_MCBSP0_R, | ||
151 | DM355_MCBSP0_BFSR, | ||
152 | |||
153 | /* SPI0 */ | ||
154 | DM355_SPI0_SDI, | ||
155 | DM355_SPI0_SDENA0, | ||
156 | DM355_SPI0_SDENA1, | ||
157 | |||
158 | /* IRQ muxing */ | ||
159 | DM355_INT_EDMA_CC, | ||
160 | DM355_INT_EDMA_TC0_ERR, | ||
161 | DM355_INT_EDMA_TC1_ERR, | ||
162 | |||
163 | /* EDMA event muxing */ | ||
164 | DM355_EVT8_ASP1_TX, | ||
165 | DM355_EVT9_ASP1_RX, | ||
166 | DM355_EVT26_MMC0_RX, | ||
167 | }; | ||
168 | |||
169 | #ifdef CONFIG_DAVINCI_MUX | ||
170 | /* setup pin muxing */ | ||
171 | extern void davinci_mux_init(void); | ||
172 | extern int davinci_mux_register(const struct mux_config *pins, | ||
173 | unsigned long size); | ||
174 | extern int davinci_cfg_reg(unsigned long reg_cfg); | ||
175 | #else | ||
176 | /* boot loader does it all (no warnings from CONFIG_DAVINCI_MUX_WARNINGS) */ | ||
177 | static inline void davinci_mux_init(void) {} | ||
178 | static inline int davinci_mux_register(const struct mux_config *pins, | ||
179 | unsigned long size) { return 0; } | ||
180 | static inline int davinci_cfg_reg(unsigned long reg_cfg) { return 0; } | ||
181 | #endif | ||
182 | |||
183 | #endif /* __INC_MACH_MUX_H */ | ||
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h index 4977aa071e1e..55a90d419fac 100644 --- a/arch/arm/mach-davinci/include/mach/psc.h +++ b/arch/arm/mach-davinci/include/mach/psc.h | |||
@@ -38,8 +38,6 @@ | |||
38 | #define DAVINCI_LPSC_TPTC1 4 | 38 | #define DAVINCI_LPSC_TPTC1 4 |
39 | #define DAVINCI_LPSC_EMAC 5 | 39 | #define DAVINCI_LPSC_EMAC 5 |
40 | #define DAVINCI_LPSC_EMAC_WRAPPER 6 | 40 | #define DAVINCI_LPSC_EMAC_WRAPPER 6 |
41 | #define DAVINCI_LPSC_MDIO 7 | ||
42 | #define DAVINCI_LPSC_IEEE1394 8 | ||
43 | #define DAVINCI_LPSC_USB 9 | 41 | #define DAVINCI_LPSC_USB 9 |
44 | #define DAVINCI_LPSC_ATA 10 | 42 | #define DAVINCI_LPSC_ATA 10 |
45 | #define DAVINCI_LPSC_VLYNQ 11 | 43 | #define DAVINCI_LPSC_VLYNQ 11 |
@@ -47,7 +45,6 @@ | |||
47 | #define DAVINCI_LPSC_DDR_EMIF 13 | 45 | #define DAVINCI_LPSC_DDR_EMIF 13 |
48 | #define DAVINCI_LPSC_AEMIF 14 | 46 | #define DAVINCI_LPSC_AEMIF 14 |
49 | #define DAVINCI_LPSC_MMC_SD 15 | 47 | #define DAVINCI_LPSC_MMC_SD 15 |
50 | #define DAVINCI_LPSC_MEMSTICK 16 | ||
51 | #define DAVINCI_LPSC_McBSP 17 | 48 | #define DAVINCI_LPSC_McBSP 17 |
52 | #define DAVINCI_LPSC_I2C 18 | 49 | #define DAVINCI_LPSC_I2C 18 |
53 | #define DAVINCI_LPSC_UART0 19 | 50 | #define DAVINCI_LPSC_UART0 19 |
@@ -73,4 +70,54 @@ | |||
73 | #define DAVINCI_LPSC_GEM 39 | 70 | #define DAVINCI_LPSC_GEM 39 |
74 | #define DAVINCI_LPSC_IMCOP 40 | 71 | #define DAVINCI_LPSC_IMCOP 40 |
75 | 72 | ||
73 | #define DM355_LPSC_TIMER3 5 | ||
74 | #define DM355_LPSC_SPI1 6 | ||
75 | #define DM355_LPSC_MMC_SD1 7 | ||
76 | #define DM355_LPSC_McBSP1 8 | ||
77 | #define DM355_LPSC_PWM3 10 | ||
78 | #define DM355_LPSC_SPI2 11 | ||
79 | #define DM355_LPSC_RTO 12 | ||
80 | #define DM355_LPSC_VPSS_DAC 41 | ||
81 | |||
82 | /* | ||
83 | * LPSC Assignments | ||
84 | */ | ||
85 | #define DM646X_LPSC_ARM 0 | ||
86 | #define DM646X_LPSC_C64X_CPU 1 | ||
87 | #define DM646X_LPSC_HDVICP0 2 | ||
88 | #define DM646X_LPSC_HDVICP1 3 | ||
89 | #define DM646X_LPSC_TPCC 4 | ||
90 | #define DM646X_LPSC_TPTC0 5 | ||
91 | #define DM646X_LPSC_TPTC1 6 | ||
92 | #define DM646X_LPSC_TPTC2 7 | ||
93 | #define DM646X_LPSC_TPTC3 8 | ||
94 | #define DM646X_LPSC_PCI 13 | ||
95 | #define DM646X_LPSC_EMAC 14 | ||
96 | #define DM646X_LPSC_VDCE 15 | ||
97 | #define DM646X_LPSC_VPSSMSTR 16 | ||
98 | #define DM646X_LPSC_VPSSSLV 17 | ||
99 | #define DM646X_LPSC_TSIF0 18 | ||
100 | #define DM646X_LPSC_TSIF1 19 | ||
101 | #define DM646X_LPSC_DDR_EMIF 20 | ||
102 | #define DM646X_LPSC_AEMIF 21 | ||
103 | #define DM646X_LPSC_McASP0 22 | ||
104 | #define DM646X_LPSC_McASP1 23 | ||
105 | #define DM646X_LPSC_CRGEN0 24 | ||
106 | #define DM646X_LPSC_CRGEN1 25 | ||
107 | #define DM646X_LPSC_UART0 26 | ||
108 | #define DM646X_LPSC_UART1 27 | ||
109 | #define DM646X_LPSC_UART2 28 | ||
110 | #define DM646X_LPSC_PWM0 29 | ||
111 | #define DM646X_LPSC_PWM1 30 | ||
112 | #define DM646X_LPSC_I2C 31 | ||
113 | #define DM646X_LPSC_SPI 32 | ||
114 | #define DM646X_LPSC_GPIO 33 | ||
115 | #define DM646X_LPSC_TIMER0 34 | ||
116 | #define DM646X_LPSC_TIMER1 35 | ||
117 | #define DM646X_LPSC_ARM_INTC 45 | ||
118 | |||
119 | extern int davinci_psc_is_clk_active(unsigned int id); | ||
120 | extern void davinci_psc_config(unsigned int domain, unsigned int id, | ||
121 | char enable); | ||
122 | |||
76 | #endif /* __ASM_ARCH_PSC_H */ | 123 | #endif /* __ASM_ARCH_PSC_H */ |
diff --git a/arch/arm/mach-davinci/include/mach/serial.h b/arch/arm/mach-davinci/include/mach/serial.h index fb8cb229bfd2..632847d74a1c 100644 --- a/arch/arm/mach-davinci/include/mach/serial.h +++ b/arch/arm/mach-davinci/include/mach/serial.h | |||
@@ -13,8 +13,23 @@ | |||
13 | 13 | ||
14 | #include <mach/io.h> | 14 | #include <mach/io.h> |
15 | 15 | ||
16 | #define DAVINCI_UART0_BASE (IO_PHYS + 0x20000) | 16 | #define DAVINCI_MAX_NR_UARTS 3 |
17 | #define DAVINCI_UART1_BASE (IO_PHYS + 0x20400) | 17 | #define DAVINCI_UART0_BASE (IO_PHYS + 0x20000) |
18 | #define DAVINCI_UART2_BASE (IO_PHYS + 0x20800) | 18 | #define DAVINCI_UART1_BASE (IO_PHYS + 0x20400) |
19 | #define DAVINCI_UART2_BASE (IO_PHYS + 0x20800) | ||
20 | |||
21 | #define DM355_UART2_BASE (IO_PHYS + 0x206000) | ||
22 | |||
23 | /* DaVinci UART register offsets */ | ||
24 | #define UART_DAVINCI_PWREMU 0x0c | ||
25 | #define UART_DM646X_SCR 0x10 | ||
26 | #define UART_DM646X_SCR_TX_WATERMARK 0x08 | ||
27 | |||
28 | struct davinci_uart_config { | ||
29 | /* Bit field of UARTs present; bit 0 --> UART1 */ | ||
30 | unsigned int enabled_uarts; | ||
31 | }; | ||
32 | |||
33 | extern void davinci_serial_init(struct davinci_uart_config *); | ||
19 | 34 | ||
20 | #endif /* __ASM_ARCH_SERIAL_H */ | 35 | #endif /* __ASM_ARCH_SERIAL_H */ |
diff --git a/arch/arm/mach-davinci/io.c b/arch/arm/mach-davinci/io.c index 299515f70b8b..a548abb513e2 100644 --- a/arch/arm/mach-davinci/io.c +++ b/arch/arm/mach-davinci/io.c | |||
@@ -51,7 +51,26 @@ void __init davinci_map_common_io(void) | |||
51 | davinci_check_revision(); | 51 | davinci_check_revision(); |
52 | } | 52 | } |
53 | 53 | ||
54 | void __init davinci_init_common_hw(void) | 54 | #define BETWEEN(p, st, sz) ((p) >= (st) && (p) < ((st) + (sz))) |
55 | #define XLATE(p, pst, vst) ((void __iomem *)((p) - (pst) + (vst))) | ||
56 | |||
57 | /* | ||
58 | * Intercept ioremap() requests for addresses in our fixed mapping regions. | ||
59 | */ | ||
60 | void __iomem *davinci_ioremap(unsigned long p, size_t size, unsigned int type) | ||
61 | { | ||
62 | if (BETWEEN(p, IO_PHYS, IO_SIZE)) | ||
63 | return XLATE(p, IO_PHYS, IO_VIRT); | ||
64 | |||
65 | return __arm_ioremap(p, size, type); | ||
66 | } | ||
67 | EXPORT_SYMBOL(davinci_ioremap); | ||
68 | |||
69 | void davinci_iounmap(volatile void __iomem *addr) | ||
55 | { | 70 | { |
56 | davinci_clk_init(); | 71 | unsigned long virt = (unsigned long)addr; |
72 | |||
73 | if (virt >= VMALLOC_START && virt < VMALLOC_END) | ||
74 | __iounmap(addr); | ||
57 | } | 75 | } |
76 | EXPORT_SYMBOL(davinci_iounmap); | ||
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c index 38021af8359a..5a324c90e291 100644 --- a/arch/arm/mach-davinci/irq.c +++ b/arch/arm/mach-davinci/irq.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <linux/io.h> | 25 | #include <linux/io.h> |
26 | 26 | ||
27 | #include <mach/hardware.h> | 27 | #include <mach/hardware.h> |
28 | #include <mach/cputype.h> | ||
28 | #include <asm/mach/irq.h> | 29 | #include <asm/mach/irq.h> |
29 | 30 | ||
30 | #define IRQ_BIT(irq) ((irq) & 0x1f) | 31 | #define IRQ_BIT(irq) ((irq) & 0x1f) |
@@ -40,14 +41,18 @@ | |||
40 | #define IRQ_INTPRI0_REG_OFFSET 0x0030 | 41 | #define IRQ_INTPRI0_REG_OFFSET 0x0030 |
41 | #define IRQ_INTPRI7_REG_OFFSET 0x004C | 42 | #define IRQ_INTPRI7_REG_OFFSET 0x004C |
42 | 43 | ||
44 | const u8 *davinci_def_priorities; | ||
45 | |||
46 | #define INTC_BASE IO_ADDRESS(DAVINCI_ARM_INTC_BASE) | ||
47 | |||
43 | static inline unsigned int davinci_irq_readl(int offset) | 48 | static inline unsigned int davinci_irq_readl(int offset) |
44 | { | 49 | { |
45 | return davinci_readl(DAVINCI_ARM_INTC_BASE + offset); | 50 | return __raw_readl(INTC_BASE + offset); |
46 | } | 51 | } |
47 | 52 | ||
48 | static inline void davinci_irq_writel(unsigned long value, int offset) | 53 | static inline void davinci_irq_writel(unsigned long value, int offset) |
49 | { | 54 | { |
50 | davinci_writel(value, DAVINCI_ARM_INTC_BASE + offset); | 55 | __raw_writel(value, INTC_BASE + offset); |
51 | } | 56 | } |
52 | 57 | ||
53 | /* Disable interrupt */ | 58 | /* Disable interrupt */ |
@@ -108,9 +113,8 @@ static struct irq_chip davinci_irq_chip_0 = { | |||
108 | .unmask = davinci_unmask_irq, | 113 | .unmask = davinci_unmask_irq, |
109 | }; | 114 | }; |
110 | 115 | ||
111 | |||
112 | /* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */ | 116 | /* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */ |
113 | static const u8 default_priorities[DAVINCI_N_AINTC_IRQ] __initdata = { | 117 | static const u8 dm644x_default_priorities[DAVINCI_N_AINTC_IRQ] __initdata = { |
114 | [IRQ_VDINT0] = 2, | 118 | [IRQ_VDINT0] = 2, |
115 | [IRQ_VDINT1] = 6, | 119 | [IRQ_VDINT1] = 6, |
116 | [IRQ_VDINT2] = 6, | 120 | [IRQ_VDINT2] = 6, |
@@ -177,11 +181,149 @@ static const u8 default_priorities[DAVINCI_N_AINTC_IRQ] __initdata = { | |||
177 | [IRQ_EMUINT] = 7, | 181 | [IRQ_EMUINT] = 7, |
178 | }; | 182 | }; |
179 | 183 | ||
184 | static const u8 dm646x_default_priorities[DAVINCI_N_AINTC_IRQ] = { | ||
185 | [IRQ_DM646X_VP_VERTINT0] = 7, | ||
186 | [IRQ_DM646X_VP_VERTINT1] = 7, | ||
187 | [IRQ_DM646X_VP_VERTINT2] = 7, | ||
188 | [IRQ_DM646X_VP_VERTINT3] = 7, | ||
189 | [IRQ_DM646X_VP_ERRINT] = 7, | ||
190 | [IRQ_DM646X_RESERVED_1] = 7, | ||
191 | [IRQ_DM646X_RESERVED_2] = 7, | ||
192 | [IRQ_DM646X_WDINT] = 7, | ||
193 | [IRQ_DM646X_CRGENINT0] = 7, | ||
194 | [IRQ_DM646X_CRGENINT1] = 7, | ||
195 | [IRQ_DM646X_TSIFINT0] = 7, | ||
196 | [IRQ_DM646X_TSIFINT1] = 7, | ||
197 | [IRQ_DM646X_VDCEINT] = 7, | ||
198 | [IRQ_DM646X_USBINT] = 7, | ||
199 | [IRQ_DM646X_USBDMAINT] = 7, | ||
200 | [IRQ_DM646X_PCIINT] = 7, | ||
201 | [IRQ_CCINT0] = 7, /* dma */ | ||
202 | [IRQ_CCERRINT] = 7, /* dma */ | ||
203 | [IRQ_TCERRINT0] = 7, /* dma */ | ||
204 | [IRQ_TCERRINT] = 7, /* dma */ | ||
205 | [IRQ_DM646X_TCERRINT2] = 7, | ||
206 | [IRQ_DM646X_TCERRINT3] = 7, | ||
207 | [IRQ_DM646X_IDE] = 7, | ||
208 | [IRQ_DM646X_HPIINT] = 7, | ||
209 | [IRQ_DM646X_EMACRXTHINT] = 7, | ||
210 | [IRQ_DM646X_EMACRXINT] = 7, | ||
211 | [IRQ_DM646X_EMACTXINT] = 7, | ||
212 | [IRQ_DM646X_EMACMISCINT] = 7, | ||
213 | [IRQ_DM646X_MCASP0TXINT] = 7, | ||
214 | [IRQ_DM646X_MCASP0RXINT] = 7, | ||
215 | [IRQ_AEMIFINT] = 7, | ||
216 | [IRQ_DM646X_RESERVED_3] = 7, | ||
217 | [IRQ_DM646X_MCASP1TXINT] = 7, /* clockevent */ | ||
218 | [IRQ_TINT0_TINT34] = 7, /* clocksource */ | ||
219 | [IRQ_TINT1_TINT12] = 7, /* DSP timer */ | ||
220 | [IRQ_TINT1_TINT34] = 7, /* system tick */ | ||
221 | [IRQ_PWMINT0] = 7, | ||
222 | [IRQ_PWMINT1] = 7, | ||
223 | [IRQ_DM646X_VLQINT] = 7, | ||
224 | [IRQ_I2C] = 7, | ||
225 | [IRQ_UARTINT0] = 7, | ||
226 | [IRQ_UARTINT1] = 7, | ||
227 | [IRQ_DM646X_UARTINT2] = 7, | ||
228 | [IRQ_DM646X_SPINT0] = 7, | ||
229 | [IRQ_DM646X_SPINT1] = 7, | ||
230 | [IRQ_DM646X_DSP2ARMINT] = 7, | ||
231 | [IRQ_DM646X_RESERVED_4] = 7, | ||
232 | [IRQ_DM646X_PSCINT] = 7, | ||
233 | [IRQ_DM646X_GPIO0] = 7, | ||
234 | [IRQ_DM646X_GPIO1] = 7, | ||
235 | [IRQ_DM646X_GPIO2] = 7, | ||
236 | [IRQ_DM646X_GPIO3] = 7, | ||
237 | [IRQ_DM646X_GPIO4] = 7, | ||
238 | [IRQ_DM646X_GPIO5] = 7, | ||
239 | [IRQ_DM646X_GPIO6] = 7, | ||
240 | [IRQ_DM646X_GPIO7] = 7, | ||
241 | [IRQ_DM646X_GPIOBNK0] = 7, | ||
242 | [IRQ_DM646X_GPIOBNK1] = 7, | ||
243 | [IRQ_DM646X_GPIOBNK2] = 7, | ||
244 | [IRQ_DM646X_DDRINT] = 7, | ||
245 | [IRQ_DM646X_AEMIFINT] = 7, | ||
246 | [IRQ_COMMTX] = 7, | ||
247 | [IRQ_COMMRX] = 7, | ||
248 | [IRQ_EMUINT] = 7, | ||
249 | }; | ||
250 | |||
251 | static const u8 dm355_default_priorities[DAVINCI_N_AINTC_IRQ] = { | ||
252 | [IRQ_DM355_CCDC_VDINT0] = 2, | ||
253 | [IRQ_DM355_CCDC_VDINT1] = 6, | ||
254 | [IRQ_DM355_CCDC_VDINT2] = 6, | ||
255 | [IRQ_DM355_IPIPE_HST] = 6, | ||
256 | [IRQ_DM355_H3AINT] = 6, | ||
257 | [IRQ_DM355_IPIPE_SDR] = 6, | ||
258 | [IRQ_DM355_IPIPEIFINT] = 6, | ||
259 | [IRQ_DM355_OSDINT] = 7, | ||
260 | [IRQ_DM355_VENCINT] = 6, | ||
261 | [IRQ_ASQINT] = 6, | ||
262 | [IRQ_IMXINT] = 6, | ||
263 | [IRQ_USBINT] = 4, | ||
264 | [IRQ_DM355_RTOINT] = 4, | ||
265 | [IRQ_DM355_UARTINT2] = 7, | ||
266 | [IRQ_DM355_TINT6] = 7, | ||
267 | [IRQ_CCINT0] = 5, /* dma */ | ||
268 | [IRQ_CCERRINT] = 5, /* dma */ | ||
269 | [IRQ_TCERRINT0] = 5, /* dma */ | ||
270 | [IRQ_TCERRINT] = 5, /* dma */ | ||
271 | [IRQ_DM355_SPINT2_1] = 7, | ||
272 | [IRQ_DM355_TINT7] = 4, | ||
273 | [IRQ_DM355_SDIOINT0] = 7, | ||
274 | [IRQ_MBXINT] = 7, | ||
275 | [IRQ_MBRINT] = 7, | ||
276 | [IRQ_MMCINT] = 7, | ||
277 | [IRQ_DM355_MMCINT1] = 7, | ||
278 | [IRQ_DM355_PWMINT3] = 7, | ||
279 | [IRQ_DDRINT] = 7, | ||
280 | [IRQ_AEMIFINT] = 7, | ||
281 | [IRQ_DM355_SDIOINT1] = 4, | ||
282 | [IRQ_TINT0_TINT12] = 2, /* clockevent */ | ||
283 | [IRQ_TINT0_TINT34] = 2, /* clocksource */ | ||
284 | [IRQ_TINT1_TINT12] = 7, /* DSP timer */ | ||
285 | [IRQ_TINT1_TINT34] = 7, /* system tick */ | ||
286 | [IRQ_PWMINT0] = 7, | ||
287 | [IRQ_PWMINT1] = 7, | ||
288 | [IRQ_PWMINT2] = 7, | ||
289 | [IRQ_I2C] = 3, | ||
290 | [IRQ_UARTINT0] = 3, | ||
291 | [IRQ_UARTINT1] = 3, | ||
292 | [IRQ_DM355_SPINT0_0] = 3, | ||
293 | [IRQ_DM355_SPINT0_1] = 3, | ||
294 | [IRQ_DM355_GPIO0] = 3, | ||
295 | [IRQ_DM355_GPIO1] = 7, | ||
296 | [IRQ_DM355_GPIO2] = 4, | ||
297 | [IRQ_DM355_GPIO3] = 4, | ||
298 | [IRQ_DM355_GPIO4] = 7, | ||
299 | [IRQ_DM355_GPIO5] = 7, | ||
300 | [IRQ_DM355_GPIO6] = 7, | ||
301 | [IRQ_DM355_GPIO7] = 7, | ||
302 | [IRQ_DM355_GPIO8] = 7, | ||
303 | [IRQ_DM355_GPIO9] = 7, | ||
304 | [IRQ_DM355_GPIOBNK0] = 7, | ||
305 | [IRQ_DM355_GPIOBNK1] = 7, | ||
306 | [IRQ_DM355_GPIOBNK2] = 7, | ||
307 | [IRQ_DM355_GPIOBNK3] = 7, | ||
308 | [IRQ_DM355_GPIOBNK4] = 7, | ||
309 | [IRQ_DM355_GPIOBNK5] = 7, | ||
310 | [IRQ_DM355_GPIOBNK6] = 7, | ||
311 | [IRQ_COMMTX] = 7, | ||
312 | [IRQ_COMMRX] = 7, | ||
313 | [IRQ_EMUINT] = 7, | ||
314 | }; | ||
315 | |||
180 | /* ARM Interrupt Controller Initialization */ | 316 | /* ARM Interrupt Controller Initialization */ |
181 | void __init davinci_irq_init(void) | 317 | void __init davinci_irq_init(void) |
182 | { | 318 | { |
183 | unsigned i; | 319 | unsigned i; |
184 | const u8 *priority = default_priorities; | 320 | |
321 | if (cpu_is_davinci_dm644x()) | ||
322 | davinci_def_priorities = dm644x_default_priorities; | ||
323 | else if (cpu_is_davinci_dm646x()) | ||
324 | davinci_def_priorities = dm646x_default_priorities; | ||
325 | else if (cpu_is_davinci_dm355()) | ||
326 | davinci_def_priorities = dm355_default_priorities; | ||
185 | 327 | ||
186 | /* Clear all interrupt requests */ | 328 | /* Clear all interrupt requests */ |
187 | davinci_irq_writel(~0x0, FIQ_REG0_OFFSET); | 329 | davinci_irq_writel(~0x0, FIQ_REG0_OFFSET); |
@@ -209,8 +351,8 @@ void __init davinci_irq_init(void) | |||
209 | unsigned j; | 351 | unsigned j; |
210 | u32 pri; | 352 | u32 pri; |
211 | 353 | ||
212 | for (j = 0, pri = 0; j < 32; j += 4, priority++) | 354 | for (j = 0, pri = 0; j < 32; j += 4, davinci_def_priorities++) |
213 | pri |= (*priority & 0x07) << j; | 355 | pri |= (*davinci_def_priorities & 0x07) << j; |
214 | davinci_irq_writel(pri, i); | 356 | davinci_irq_writel(pri, i); |
215 | } | 357 | } |
216 | 358 | ||
diff --git a/arch/arm/mach-davinci/mux.c b/arch/arm/mach-davinci/mux.c index 8ff9d8aca60b..bbba0b247a44 100644 --- a/arch/arm/mach-davinci/mux.c +++ b/arch/arm/mach-davinci/mux.c | |||
@@ -1,41 +1,103 @@ | |||
1 | /* | 1 | /* |
2 | * DaVinci pin multiplexing configurations | 2 | * Utility to set the DAVINCI MUX register from a table in mux.h |
3 | * | 3 | * |
4 | * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com> | 4 | * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com> |
5 | * | 5 | * |
6 | * Based on linux/arch/arm/plat-omap/mux.c: | ||
7 | * Copyright (C) 2003 - 2005 Nokia Corporation | ||
8 | * | ||
9 | * Written by Tony Lindgren | ||
10 | * | ||
6 | * 2007 (c) MontaVista Software, Inc. This file is licensed under | 11 | * 2007 (c) MontaVista Software, Inc. This file is licensed under |
7 | * the terms of the GNU General Public License version 2. This program | 12 | * the terms of the GNU General Public License version 2. This program |
8 | * is licensed "as is" without any warranty of any kind, whether express | 13 | * is licensed "as is" without any warranty of any kind, whether express |
9 | * or implied. | 14 | * or implied. |
15 | * | ||
16 | * Copyright (C) 2008 Texas Instruments. | ||
10 | */ | 17 | */ |
11 | #include <linux/io.h> | 18 | #include <linux/io.h> |
19 | #include <linux/module.h> | ||
12 | #include <linux/spinlock.h> | 20 | #include <linux/spinlock.h> |
13 | 21 | ||
14 | #include <mach/hardware.h> | 22 | #include <mach/hardware.h> |
15 | |||
16 | #include <mach/mux.h> | 23 | #include <mach/mux.h> |
17 | 24 | ||
18 | /* System control register offsets */ | 25 | static const struct mux_config *mux_table; |
19 | #define PINMUX0 0x00 | 26 | static unsigned long pin_table_sz; |
20 | #define PINMUX1 0x04 | 27 | |
28 | int __init davinci_mux_register(const struct mux_config *pins, | ||
29 | unsigned long size) | ||
30 | { | ||
31 | mux_table = pins; | ||
32 | pin_table_sz = size; | ||
21 | 33 | ||
22 | static DEFINE_SPINLOCK(mux_lock); | 34 | return 0; |
35 | } | ||
23 | 36 | ||
24 | void davinci_mux_peripheral(unsigned int mux, unsigned int enable) | 37 | /* |
38 | * Sets the DAVINCI MUX register based on the table | ||
39 | */ | ||
40 | int __init_or_module davinci_cfg_reg(const unsigned long index) | ||
25 | { | 41 | { |
26 | u32 pinmux, muxreg = PINMUX0; | 42 | static DEFINE_SPINLOCK(mux_spin_lock); |
43 | void __iomem *base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE); | ||
44 | unsigned long flags; | ||
45 | const struct mux_config *cfg; | ||
46 | unsigned int reg_orig = 0, reg = 0; | ||
47 | unsigned int mask, warn = 0; | ||
48 | |||
49 | if (!mux_table) | ||
50 | BUG(); | ||
51 | |||
52 | if (index >= pin_table_sz) { | ||
53 | printk(KERN_ERR "Invalid pin mux index: %lu (%lu)\n", | ||
54 | index, pin_table_sz); | ||
55 | dump_stack(); | ||
56 | return -ENODEV; | ||
57 | } | ||
58 | |||
59 | cfg = &mux_table[index]; | ||
60 | |||
61 | if (cfg->name == NULL) { | ||
62 | printk(KERN_ERR "No entry for the specified index\n"); | ||
63 | return -ENODEV; | ||
64 | } | ||
65 | |||
66 | /* Update the mux register in question */ | ||
67 | if (cfg->mask) { | ||
68 | unsigned tmp1, tmp2; | ||
69 | |||
70 | spin_lock_irqsave(&mux_spin_lock, flags); | ||
71 | reg_orig = __raw_readl(base + cfg->mux_reg); | ||
72 | |||
73 | mask = (cfg->mask << cfg->mask_offset); | ||
74 | tmp1 = reg_orig & mask; | ||
75 | reg = reg_orig & ~mask; | ||
76 | |||
77 | tmp2 = (cfg->mode << cfg->mask_offset); | ||
78 | reg |= tmp2; | ||
79 | |||
80 | if (tmp1 != tmp2) | ||
81 | warn = 1; | ||
82 | |||
83 | __raw_writel(reg, base + cfg->mux_reg); | ||
84 | spin_unlock_irqrestore(&mux_spin_lock, flags); | ||
85 | } | ||
86 | |||
87 | if (warn) { | ||
88 | #ifdef CONFIG_DAVINCI_MUX_WARNINGS | ||
89 | printk(KERN_WARNING "MUX: initialized %s\n", cfg->name); | ||
90 | #endif | ||
91 | } | ||
27 | 92 | ||
28 | if (mux >= DAVINCI_MUX_LEVEL2) { | 93 | #ifdef CONFIG_DAVINCI_MUX_DEBUG |
29 | muxreg = PINMUX1; | 94 | if (cfg->debug || warn) { |
30 | mux -= DAVINCI_MUX_LEVEL2; | 95 | printk(KERN_WARNING "MUX: Setting register %s\n", cfg->name); |
96 | printk(KERN_WARNING " %s (0x%08x) = 0x%08x -> 0x%08x\n", | ||
97 | cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg); | ||
31 | } | 98 | } |
99 | #endif | ||
32 | 100 | ||
33 | spin_lock(&mux_lock); | 101 | return 0; |
34 | pinmux = davinci_readl(DAVINCI_SYSTEM_MODULE_BASE + muxreg); | ||
35 | if (enable) | ||
36 | pinmux |= (1 << mux); | ||
37 | else | ||
38 | pinmux &= ~(1 << mux); | ||
39 | davinci_writel(pinmux, DAVINCI_SYSTEM_MODULE_BASE + muxreg); | ||
40 | spin_unlock(&mux_lock); | ||
41 | } | 102 | } |
103 | EXPORT_SYMBOL(davinci_cfg_reg); | ||
diff --git a/arch/arm/mach-davinci/mux.h b/arch/arm/mach-davinci/mux.h new file mode 100644 index 000000000000..adc869413371 --- /dev/null +++ b/arch/arm/mach-davinci/mux.h | |||
@@ -0,0 +1,51 @@ | |||
1 | /* | ||
2 | * Pin-multiplex helper macros for TI DaVinci family devices | ||
3 | * | ||
4 | * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com> | ||
5 | * | ||
6 | * 2007 (c) MontaVista Software, Inc. This file is licensed under | ||
7 | * the terms of the GNU General Public License version 2. This program | ||
8 | * is licensed "as is" without any warranty of any kind, whether express | ||
9 | * or implied. | ||
10 | * | ||
11 | * Copyright (C) 2008 Texas Instruments. | ||
12 | */ | ||
13 | #ifndef _MACH_DAVINCI_MUX_H_ | ||
14 | #define _MACH_DAVINCI_MUX_H_ | ||
15 | |||
16 | #include <mach/mux.h> | ||
17 | |||
18 | #define MUX_CFG(soc, desc, muxreg, mode_offset, mode_mask, mux_mode, dbg)\ | ||
19 | [soc##_##desc] = { \ | ||
20 | .name = #desc, \ | ||
21 | .debug = dbg, \ | ||
22 | .mux_reg_name = "PINMUX"#muxreg, \ | ||
23 | .mux_reg = PINMUX##muxreg, \ | ||
24 | .mask_offset = mode_offset, \ | ||
25 | .mask = mode_mask, \ | ||
26 | .mode = mux_mode, \ | ||
27 | }, | ||
28 | |||
29 | #define INT_CFG(soc, desc, mode_offset, mode_mask, mux_mode, dbg) \ | ||
30 | [soc##_##desc] = { \ | ||
31 | .name = #desc, \ | ||
32 | .debug = dbg, \ | ||
33 | .mux_reg_name = "INTMUX", \ | ||
34 | .mux_reg = INTMUX, \ | ||
35 | .mask_offset = mode_offset, \ | ||
36 | .mask = mode_mask, \ | ||
37 | .mode = mux_mode, \ | ||
38 | }, | ||
39 | |||
40 | #define EVT_CFG(soc, desc, mode_offset, mode_mask, mux_mode, dbg) \ | ||
41 | [soc##_##desc] = { \ | ||
42 | .name = #desc, \ | ||
43 | .debug = dbg, \ | ||
44 | .mux_reg_name = "EVTMUX", \ | ||
45 | .mux_reg = EVTMUX, \ | ||
46 | .mask_offset = mode_offset, \ | ||
47 | .mask = mode_mask, \ | ||
48 | .mode = mux_mode, \ | ||
49 | }, | ||
50 | |||
51 | #endif /* _MACH_DAVINCI_MUX_H */ | ||
diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c index 58754f066d5b..84171abf5f7b 100644 --- a/arch/arm/mach-davinci/psc.c +++ b/arch/arm/mach-davinci/psc.c | |||
@@ -23,10 +23,13 @@ | |||
23 | #include <linux/init.h> | 23 | #include <linux/init.h> |
24 | #include <linux/io.h> | 24 | #include <linux/io.h> |
25 | 25 | ||
26 | #include <mach/cputype.h> | ||
26 | #include <mach/hardware.h> | 27 | #include <mach/hardware.h> |
27 | #include <mach/psc.h> | 28 | #include <mach/psc.h> |
28 | #include <mach/mux.h> | 29 | #include <mach/mux.h> |
29 | 30 | ||
31 | #define DAVINCI_PWR_SLEEP_CNTRL_BASE 0x01C41000 | ||
32 | |||
30 | /* PSC register offsets */ | 33 | /* PSC register offsets */ |
31 | #define EPCPR 0x070 | 34 | #define EPCPR 0x070 |
32 | #define PTCMD 0x120 | 35 | #define PTCMD 0x120 |
@@ -36,102 +39,61 @@ | |||
36 | #define MDSTAT 0x800 | 39 | #define MDSTAT 0x800 |
37 | #define MDCTL 0xA00 | 40 | #define MDCTL 0xA00 |
38 | 41 | ||
39 | /* System control register offsets */ | 42 | #define MDSTAT_STATE_MASK 0x1f |
40 | #define VDD3P3V_PWDN 0x48 | ||
41 | 43 | ||
42 | static void davinci_psc_mux(unsigned int id) | 44 | /* Return nonzero iff the domain's clock is active */ |
45 | int __init davinci_psc_is_clk_active(unsigned int id) | ||
43 | { | 46 | { |
44 | switch (id) { | 47 | void __iomem *psc_base = IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE); |
45 | case DAVINCI_LPSC_ATA: | 48 | u32 mdstat = __raw_readl(psc_base + MDSTAT + 4 * id); |
46 | davinci_mux_peripheral(DAVINCI_MUX_HDIREN, 1); | 49 | |
47 | davinci_mux_peripheral(DAVINCI_MUX_ATAEN, 1); | 50 | /* if clocked, state can be "Enable" or "SyncReset" */ |
48 | break; | 51 | return mdstat & BIT(12); |
49 | case DAVINCI_LPSC_MMC_SD: | ||
50 | /* VDD power manupulations are done in U-Boot for CPMAC | ||
51 | * so applies to MMC as well | ||
52 | */ | ||
53 | /*Set up the pull regiter for MMC */ | ||
54 | davinci_writel(0, DAVINCI_SYSTEM_MODULE_BASE + VDD3P3V_PWDN); | ||
55 | davinci_mux_peripheral(DAVINCI_MUX_MSTK, 0); | ||
56 | break; | ||
57 | case DAVINCI_LPSC_I2C: | ||
58 | davinci_mux_peripheral(DAVINCI_MUX_I2C, 1); | ||
59 | break; | ||
60 | case DAVINCI_LPSC_McBSP: | ||
61 | davinci_mux_peripheral(DAVINCI_MUX_ASP, 1); | ||
62 | break; | ||
63 | default: | ||
64 | break; | ||
65 | } | ||
66 | } | 52 | } |
67 | 53 | ||
68 | /* Enable or disable a PSC domain */ | 54 | /* Enable or disable a PSC domain */ |
69 | void davinci_psc_config(unsigned int domain, unsigned int id, char enable) | 55 | void davinci_psc_config(unsigned int domain, unsigned int id, char enable) |
70 | { | 56 | { |
71 | u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl, mdstat_mask; | 57 | u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl; |
58 | void __iomem *psc_base = IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE); | ||
59 | u32 next_state = enable ? 0x3 : 0x2; /* 0x3 enables, 0x2 disables */ | ||
72 | 60 | ||
73 | mdctl = davinci_readl(DAVINCI_PWR_SLEEP_CNTRL_BASE + MDCTL + 4 * id); | 61 | mdctl = __raw_readl(psc_base + MDCTL + 4 * id); |
74 | if (enable) | 62 | mdctl &= ~MDSTAT_STATE_MASK; |
75 | mdctl |= 0x00000003; /* Enable Module */ | 63 | mdctl |= next_state; |
76 | else | 64 | __raw_writel(mdctl, psc_base + MDCTL + 4 * id); |
77 | mdctl &= 0xFFFFFFF2; /* Disable Module */ | ||
78 | davinci_writel(mdctl, DAVINCI_PWR_SLEEP_CNTRL_BASE + MDCTL + 4 * id); | ||
79 | 65 | ||
80 | pdstat = davinci_readl(DAVINCI_PWR_SLEEP_CNTRL_BASE + PDSTAT); | 66 | pdstat = __raw_readl(psc_base + PDSTAT); |
81 | if ((pdstat & 0x00000001) == 0) { | 67 | if ((pdstat & 0x00000001) == 0) { |
82 | pdctl1 = davinci_readl(DAVINCI_PWR_SLEEP_CNTRL_BASE + PDCTL1); | 68 | pdctl1 = __raw_readl(psc_base + PDCTL1); |
83 | pdctl1 |= 0x1; | 69 | pdctl1 |= 0x1; |
84 | davinci_writel(pdctl1, DAVINCI_PWR_SLEEP_CNTRL_BASE + PDCTL1); | 70 | __raw_writel(pdctl1, psc_base + PDCTL1); |
85 | 71 | ||
86 | ptcmd = 1 << domain; | 72 | ptcmd = 1 << domain; |
87 | davinci_writel(ptcmd, DAVINCI_PWR_SLEEP_CNTRL_BASE + PTCMD); | 73 | __raw_writel(ptcmd, psc_base + PTCMD); |
88 | 74 | ||
89 | do { | 75 | do { |
90 | epcpr = davinci_readl(DAVINCI_PWR_SLEEP_CNTRL_BASE + | 76 | epcpr = __raw_readl(psc_base + EPCPR); |
91 | EPCPR); | ||
92 | } while ((((epcpr >> domain) & 1) == 0)); | 77 | } while ((((epcpr >> domain) & 1) == 0)); |
93 | 78 | ||
94 | pdctl1 = davinci_readl(DAVINCI_PWR_SLEEP_CNTRL_BASE + PDCTL1); | 79 | pdctl1 = __raw_readl(psc_base + PDCTL1); |
95 | pdctl1 |= 0x100; | 80 | pdctl1 |= 0x100; |
96 | davinci_writel(pdctl1, DAVINCI_PWR_SLEEP_CNTRL_BASE + PDCTL1); | 81 | __raw_writel(pdctl1, psc_base + PDCTL1); |
97 | 82 | ||
98 | do { | 83 | do { |
99 | ptstat = davinci_readl(DAVINCI_PWR_SLEEP_CNTRL_BASE + | 84 | ptstat = __raw_readl(psc_base + |
100 | PTSTAT); | 85 | PTSTAT); |
101 | } while (!(((ptstat >> domain) & 1) == 0)); | 86 | } while (!(((ptstat >> domain) & 1) == 0)); |
102 | } else { | 87 | } else { |
103 | ptcmd = 1 << domain; | 88 | ptcmd = 1 << domain; |
104 | davinci_writel(ptcmd, DAVINCI_PWR_SLEEP_CNTRL_BASE + PTCMD); | 89 | __raw_writel(ptcmd, psc_base + PTCMD); |
105 | 90 | ||
106 | do { | 91 | do { |
107 | ptstat = davinci_readl(DAVINCI_PWR_SLEEP_CNTRL_BASE + | 92 | ptstat = __raw_readl(psc_base + PTSTAT); |
108 | PTSTAT); | ||
109 | } while (!(((ptstat >> domain) & 1) == 0)); | 93 | } while (!(((ptstat >> domain) & 1) == 0)); |
110 | } | 94 | } |
111 | 95 | ||
112 | if (enable) | ||
113 | mdstat_mask = 0x3; | ||
114 | else | ||
115 | mdstat_mask = 0x2; | ||
116 | |||
117 | do { | 96 | do { |
118 | mdstat = davinci_readl(DAVINCI_PWR_SLEEP_CNTRL_BASE + | 97 | mdstat = __raw_readl(psc_base + MDSTAT + 4 * id); |
119 | MDSTAT + 4 * id); | 98 | } while (!((mdstat & MDSTAT_STATE_MASK) == next_state)); |
120 | } while (!((mdstat & 0x0000001F) == mdstat_mask)); | ||
121 | |||
122 | if (enable) | ||
123 | davinci_psc_mux(id); | ||
124 | } | ||
125 | |||
126 | void __init davinci_psc_init(void) | ||
127 | { | ||
128 | davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_VPSSMSTR, 1); | ||
129 | davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_VPSSSLV, 1); | ||
130 | davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_TPCC, 1); | ||
131 | davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_TPTC0, 1); | ||
132 | davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_TPTC1, 1); | ||
133 | davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_GPIO, 1); | ||
134 | |||
135 | /* Turn on WatchDog timer LPSC. Needed for RESET to work */ | ||
136 | davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_TIMER2, 1); | ||
137 | } | 99 | } |
diff --git a/arch/arm/mach-davinci/serial.c b/arch/arm/mach-davinci/serial.c index 3010f9971255..695075796522 100644 --- a/arch/arm/mach-davinci/serial.c +++ b/arch/arm/mach-davinci/serial.c | |||
@@ -32,32 +32,47 @@ | |||
32 | #include <mach/hardware.h> | 32 | #include <mach/hardware.h> |
33 | #include <mach/serial.h> | 33 | #include <mach/serial.h> |
34 | #include <mach/irqs.h> | 34 | #include <mach/irqs.h> |
35 | #include <mach/cputype.h> | ||
36 | #include "clock.h" | ||
35 | 37 | ||
36 | #define UART_DAVINCI_PWREMU 0x0c | 38 | static inline unsigned int serial_read_reg(struct plat_serial8250_port *up, |
37 | 39 | int offset) | |
38 | static inline unsigned int davinci_serial_in(struct plat_serial8250_port *up, | ||
39 | int offset) | ||
40 | { | 40 | { |
41 | offset <<= up->regshift; | 41 | offset <<= up->regshift; |
42 | return (unsigned int)__raw_readb(up->membase + offset); | 42 | return (unsigned int)__raw_readl(IO_ADDRESS(up->mapbase) + offset); |
43 | } | 43 | } |
44 | 44 | ||
45 | static inline void davinci_serial_outp(struct plat_serial8250_port *p, | 45 | static inline void serial_write_reg(struct plat_serial8250_port *p, int offset, |
46 | int offset, int value) | 46 | int value) |
47 | { | 47 | { |
48 | offset <<= p->regshift; | 48 | offset <<= p->regshift; |
49 | __raw_writeb(value, p->membase + offset); | 49 | __raw_writel(value, IO_ADDRESS(p->mapbase) + offset); |
50 | } | 50 | } |
51 | 51 | ||
52 | static struct plat_serial8250_port serial_platform_data[] = { | 52 | static struct plat_serial8250_port serial_platform_data[] = { |
53 | { | 53 | { |
54 | .membase = (char *)IO_ADDRESS(DAVINCI_UART0_BASE), | 54 | .mapbase = DAVINCI_UART0_BASE, |
55 | .mapbase = (unsigned long)DAVINCI_UART0_BASE, | ||
56 | .irq = IRQ_UARTINT0, | 55 | .irq = IRQ_UARTINT0, |
57 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, | 56 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | |
57 | UPF_IOREMAP, | ||
58 | .iotype = UPIO_MEM, | ||
59 | .regshift = 2, | ||
60 | }, | ||
61 | { | ||
62 | .mapbase = DAVINCI_UART1_BASE, | ||
63 | .irq = IRQ_UARTINT1, | ||
64 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | | ||
65 | UPF_IOREMAP, | ||
66 | .iotype = UPIO_MEM, | ||
67 | .regshift = 2, | ||
68 | }, | ||
69 | { | ||
70 | .mapbase = DAVINCI_UART2_BASE, | ||
71 | .irq = IRQ_UARTINT2, | ||
72 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | | ||
73 | UPF_IOREMAP, | ||
58 | .iotype = UPIO_MEM, | 74 | .iotype = UPIO_MEM, |
59 | .regshift = 2, | 75 | .regshift = 2, |
60 | .uartclk = 27000000, | ||
61 | }, | 76 | }, |
62 | { | 77 | { |
63 | .flags = 0 | 78 | .flags = 0 |
@@ -74,22 +89,68 @@ static struct platform_device serial_device = { | |||
74 | 89 | ||
75 | static void __init davinci_serial_reset(struct plat_serial8250_port *p) | 90 | static void __init davinci_serial_reset(struct plat_serial8250_port *p) |
76 | { | 91 | { |
77 | /* reset both transmitter and receiver: bits 14,13 = UTRST, URRST */ | ||
78 | unsigned int pwremu = 0; | 92 | unsigned int pwremu = 0; |
79 | 93 | ||
80 | davinci_serial_outp(p, UART_IER, 0); /* disable all interrupts */ | 94 | serial_write_reg(p, UART_IER, 0); /* disable all interrupts */ |
81 | 95 | ||
82 | davinci_serial_outp(p, UART_DAVINCI_PWREMU, pwremu); | 96 | /* reset both transmitter and receiver: bits 14,13 = UTRST, URRST */ |
97 | serial_write_reg(p, UART_DAVINCI_PWREMU, pwremu); | ||
83 | mdelay(10); | 98 | mdelay(10); |
84 | 99 | ||
85 | pwremu |= (0x3 << 13); | 100 | pwremu |= (0x3 << 13); |
86 | pwremu |= 0x1; | 101 | pwremu |= 0x1; |
87 | davinci_serial_outp(p, UART_DAVINCI_PWREMU, pwremu); | 102 | serial_write_reg(p, UART_DAVINCI_PWREMU, pwremu); |
103 | |||
104 | if (cpu_is_davinci_dm646x()) | ||
105 | serial_write_reg(p, UART_DM646X_SCR, | ||
106 | UART_DM646X_SCR_TX_WATERMARK); | ||
107 | } | ||
108 | |||
109 | void __init davinci_serial_init(struct davinci_uart_config *info) | ||
110 | { | ||
111 | int i; | ||
112 | char name[16]; | ||
113 | struct clk *uart_clk; | ||
114 | struct device *dev = &serial_device.dev; | ||
115 | |||
116 | /* | ||
117 | * Make sure the serial ports are muxed on at this point. | ||
118 | * You have to mux them off in device drivers later on | ||
119 | * if not needed. | ||
120 | */ | ||
121 | for (i = 0; i < DAVINCI_MAX_NR_UARTS; i++) { | ||
122 | struct plat_serial8250_port *p = serial_platform_data + i; | ||
123 | |||
124 | if (!(info->enabled_uarts & (1 << i))) { | ||
125 | p->flags = 0; | ||
126 | continue; | ||
127 | } | ||
128 | |||
129 | if (cpu_is_davinci_dm646x()) | ||
130 | p->iotype = UPIO_MEM32; | ||
131 | |||
132 | if (cpu_is_davinci_dm355()) { | ||
133 | if (i == 2) { | ||
134 | p->mapbase = (unsigned long)DM355_UART2_BASE; | ||
135 | p->irq = IRQ_DM355_UARTINT2; | ||
136 | } | ||
137 | } | ||
138 | |||
139 | sprintf(name, "uart%d", i); | ||
140 | uart_clk = clk_get(dev, name); | ||
141 | if (IS_ERR(uart_clk)) | ||
142 | printk(KERN_ERR "%s:%d: failed to get UART%d clock\n", | ||
143 | __func__, __LINE__, i); | ||
144 | else { | ||
145 | clk_enable(uart_clk); | ||
146 | p->uartclk = clk_get_rate(uart_clk); | ||
147 | davinci_serial_reset(p); | ||
148 | } | ||
149 | } | ||
88 | } | 150 | } |
89 | 151 | ||
90 | static int __init davinci_init(void) | 152 | static int __init davinci_init(void) |
91 | { | 153 | { |
92 | davinci_serial_reset(&serial_platform_data[0]); | ||
93 | return platform_device_register(&serial_device); | 154 | return platform_device_register(&serial_device); |
94 | } | 155 | } |
95 | 156 | ||
diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c index 6c227d4ba998..494e01bff5c3 100644 --- a/arch/arm/mach-davinci/time.c +++ b/arch/arm/mach-davinci/time.c | |||
@@ -16,6 +16,9 @@ | |||
16 | #include <linux/clockchips.h> | 16 | #include <linux/clockchips.h> |
17 | #include <linux/spinlock.h> | 17 | #include <linux/spinlock.h> |
18 | #include <linux/io.h> | 18 | #include <linux/io.h> |
19 | #include <linux/clk.h> | ||
20 | #include <linux/err.h> | ||
21 | #include <linux/device.h> | ||
19 | 22 | ||
20 | #include <mach/hardware.h> | 23 | #include <mach/hardware.h> |
21 | #include <asm/system.h> | 24 | #include <asm/system.h> |
@@ -24,8 +27,11 @@ | |||
24 | #include <asm/mach/time.h> | 27 | #include <asm/mach/time.h> |
25 | #include <asm/errno.h> | 28 | #include <asm/errno.h> |
26 | #include <mach/io.h> | 29 | #include <mach/io.h> |
30 | #include <mach/cputype.h> | ||
31 | #include "clock.h" | ||
27 | 32 | ||
28 | static struct clock_event_device clockevent_davinci; | 33 | static struct clock_event_device clockevent_davinci; |
34 | static unsigned int davinci_clock_tick_rate; | ||
29 | 35 | ||
30 | #define DAVINCI_TIMER0_BASE (IO_PHYS + 0x21400) | 36 | #define DAVINCI_TIMER0_BASE (IO_PHYS + 0x21400) |
31 | #define DAVINCI_TIMER1_BASE (IO_PHYS + 0x21800) | 37 | #define DAVINCI_TIMER1_BASE (IO_PHYS + 0x21800) |
@@ -99,9 +105,9 @@ struct timer_s { | |||
99 | unsigned int id; | 105 | unsigned int id; |
100 | unsigned long period; | 106 | unsigned long period; |
101 | unsigned long opts; | 107 | unsigned long opts; |
102 | unsigned long reg_base; | 108 | void __iomem *base; |
103 | unsigned long tim_reg; | 109 | unsigned long tim_off; |
104 | unsigned long prd_reg; | 110 | unsigned long prd_off; |
105 | unsigned long enamode_shift; | 111 | unsigned long enamode_shift; |
106 | struct irqaction irqaction; | 112 | struct irqaction irqaction; |
107 | }; | 113 | }; |
@@ -114,15 +120,15 @@ static struct timer_s timers[]; | |||
114 | 120 | ||
115 | static int timer32_config(struct timer_s *t) | 121 | static int timer32_config(struct timer_s *t) |
116 | { | 122 | { |
117 | u32 tcr = davinci_readl(t->reg_base + TCR); | 123 | u32 tcr = __raw_readl(t->base + TCR); |
118 | 124 | ||
119 | /* disable timer */ | 125 | /* disable timer */ |
120 | tcr &= ~(TCR_ENAMODE_MASK << t->enamode_shift); | 126 | tcr &= ~(TCR_ENAMODE_MASK << t->enamode_shift); |
121 | davinci_writel(tcr, t->reg_base + TCR); | 127 | __raw_writel(tcr, t->base + TCR); |
122 | 128 | ||
123 | /* reset counter to zero, set new period */ | 129 | /* reset counter to zero, set new period */ |
124 | davinci_writel(0, t->tim_reg); | 130 | __raw_writel(0, t->base + t->tim_off); |
125 | davinci_writel(t->period, t->prd_reg); | 131 | __raw_writel(t->period, t->base + t->prd_off); |
126 | 132 | ||
127 | /* Set enable mode */ | 133 | /* Set enable mode */ |
128 | if (t->opts & TIMER_OPTS_ONESHOT) { | 134 | if (t->opts & TIMER_OPTS_ONESHOT) { |
@@ -131,13 +137,13 @@ static int timer32_config(struct timer_s *t) | |||
131 | tcr |= TCR_ENAMODE_PERIODIC << t->enamode_shift; | 137 | tcr |= TCR_ENAMODE_PERIODIC << t->enamode_shift; |
132 | } | 138 | } |
133 | 139 | ||
134 | davinci_writel(tcr, t->reg_base + TCR); | 140 | __raw_writel(tcr, t->base + TCR); |
135 | return 0; | 141 | return 0; |
136 | } | 142 | } |
137 | 143 | ||
138 | static inline u32 timer32_read(struct timer_s *t) | 144 | static inline u32 timer32_read(struct timer_s *t) |
139 | { | 145 | { |
140 | return davinci_readl(t->tim_reg); | 146 | return __raw_readl(t->base + t->tim_off); |
141 | } | 147 | } |
142 | 148 | ||
143 | static irqreturn_t timer_interrupt(int irq, void *dev_id) | 149 | static irqreturn_t timer_interrupt(int irq, void *dev_id) |
@@ -176,51 +182,54 @@ static struct timer_s timers[] = { | |||
176 | 182 | ||
177 | static void __init timer_init(void) | 183 | static void __init timer_init(void) |
178 | { | 184 | { |
179 | u32 bases[] = {DAVINCI_TIMER0_BASE, DAVINCI_TIMER1_BASE}; | 185 | u32 phys_bases[] = {DAVINCI_TIMER0_BASE, DAVINCI_TIMER1_BASE}; |
180 | int i; | 186 | int i; |
181 | 187 | ||
182 | /* Global init of each 64-bit timer as a whole */ | 188 | /* Global init of each 64-bit timer as a whole */ |
183 | for(i=0; i<2; i++) { | 189 | for(i=0; i<2; i++) { |
184 | u32 tgcr, base = bases[i]; | 190 | u32 tgcr; |
191 | void __iomem *base = IO_ADDRESS(phys_bases[i]); | ||
185 | 192 | ||
186 | /* Disabled, Internal clock source */ | 193 | /* Disabled, Internal clock source */ |
187 | davinci_writel(0, base + TCR); | 194 | __raw_writel(0, base + TCR); |
188 | 195 | ||
189 | /* reset both timers, no pre-scaler for timer34 */ | 196 | /* reset both timers, no pre-scaler for timer34 */ |
190 | tgcr = 0; | 197 | tgcr = 0; |
191 | davinci_writel(tgcr, base + TGCR); | 198 | __raw_writel(tgcr, base + TGCR); |
192 | 199 | ||
193 | /* Set both timers to unchained 32-bit */ | 200 | /* Set both timers to unchained 32-bit */ |
194 | tgcr = TGCR_TIMMODE_32BIT_UNCHAINED << TGCR_TIMMODE_SHIFT; | 201 | tgcr = TGCR_TIMMODE_32BIT_UNCHAINED << TGCR_TIMMODE_SHIFT; |
195 | davinci_writel(tgcr, base + TGCR); | 202 | __raw_writel(tgcr, base + TGCR); |
196 | 203 | ||
197 | /* Unreset timers */ | 204 | /* Unreset timers */ |
198 | tgcr |= (TGCR_UNRESET << TGCR_TIM12RS_SHIFT) | | 205 | tgcr |= (TGCR_UNRESET << TGCR_TIM12RS_SHIFT) | |
199 | (TGCR_UNRESET << TGCR_TIM34RS_SHIFT); | 206 | (TGCR_UNRESET << TGCR_TIM34RS_SHIFT); |
200 | davinci_writel(tgcr, base + TGCR); | 207 | __raw_writel(tgcr, base + TGCR); |
201 | 208 | ||
202 | /* Init both counters to zero */ | 209 | /* Init both counters to zero */ |
203 | davinci_writel(0, base + TIM12); | 210 | __raw_writel(0, base + TIM12); |
204 | davinci_writel(0, base + TIM34); | 211 | __raw_writel(0, base + TIM34); |
205 | } | 212 | } |
206 | 213 | ||
207 | /* Init of each timer as a 32-bit timer */ | 214 | /* Init of each timer as a 32-bit timer */ |
208 | for (i=0; i< ARRAY_SIZE(timers); i++) { | 215 | for (i=0; i< ARRAY_SIZE(timers); i++) { |
209 | struct timer_s *t = &timers[i]; | 216 | struct timer_s *t = &timers[i]; |
217 | u32 phys_base; | ||
210 | 218 | ||
211 | if (t->name) { | 219 | if (t->name) { |
212 | t->id = i; | 220 | t->id = i; |
213 | t->reg_base = (IS_TIMER1(t->id) ? | 221 | phys_base = (IS_TIMER1(t->id) ? |
214 | DAVINCI_TIMER1_BASE : DAVINCI_TIMER0_BASE); | 222 | DAVINCI_TIMER1_BASE : DAVINCI_TIMER0_BASE); |
223 | t->base = IO_ADDRESS(phys_base); | ||
215 | 224 | ||
216 | if (IS_TIMER_BOT(t->id)) { | 225 | if (IS_TIMER_BOT(t->id)) { |
217 | t->enamode_shift = 6; | 226 | t->enamode_shift = 6; |
218 | t->tim_reg = t->reg_base + TIM12; | 227 | t->tim_off = TIM12; |
219 | t->prd_reg = t->reg_base + PRD12; | 228 | t->prd_off = PRD12; |
220 | } else { | 229 | } else { |
221 | t->enamode_shift = 22; | 230 | t->enamode_shift = 22; |
222 | t->tim_reg = t->reg_base + TIM34; | 231 | t->tim_off = TIM34; |
223 | t->prd_reg = t->reg_base + PRD34; | 232 | t->prd_off = PRD34; |
224 | } | 233 | } |
225 | 234 | ||
226 | /* Register interrupt */ | 235 | /* Register interrupt */ |
@@ -274,7 +283,7 @@ static void davinci_set_mode(enum clock_event_mode mode, | |||
274 | 283 | ||
275 | switch (mode) { | 284 | switch (mode) { |
276 | case CLOCK_EVT_MODE_PERIODIC: | 285 | case CLOCK_EVT_MODE_PERIODIC: |
277 | t->period = CLOCK_TICK_RATE / (HZ); | 286 | t->period = davinci_clock_tick_rate / (HZ); |
278 | t->opts = TIMER_OPTS_PERIODIC; | 287 | t->opts = TIMER_OPTS_PERIODIC; |
279 | timer32_config(t); | 288 | timer32_config(t); |
280 | break; | 289 | break; |
@@ -301,21 +310,29 @@ static struct clock_event_device clockevent_davinci = { | |||
301 | 310 | ||
302 | static void __init davinci_timer_init(void) | 311 | static void __init davinci_timer_init(void) |
303 | { | 312 | { |
313 | struct clk *timer_clk; | ||
314 | |||
304 | static char err[] __initdata = KERN_ERR | 315 | static char err[] __initdata = KERN_ERR |
305 | "%s: can't register clocksource!\n"; | 316 | "%s: can't register clocksource!\n"; |
306 | 317 | ||
307 | /* init timer hw */ | 318 | /* init timer hw */ |
308 | timer_init(); | 319 | timer_init(); |
309 | 320 | ||
321 | timer_clk = clk_get(NULL, "timer0"); | ||
322 | BUG_ON(IS_ERR(timer_clk)); | ||
323 | clk_enable(timer_clk); | ||
324 | |||
325 | davinci_clock_tick_rate = clk_get_rate(timer_clk); | ||
326 | |||
310 | /* setup clocksource */ | 327 | /* setup clocksource */ |
311 | clocksource_davinci.mult = | 328 | clocksource_davinci.mult = |
312 | clocksource_khz2mult(CLOCK_TICK_RATE/1000, | 329 | clocksource_khz2mult(davinci_clock_tick_rate/1000, |
313 | clocksource_davinci.shift); | 330 | clocksource_davinci.shift); |
314 | if (clocksource_register(&clocksource_davinci)) | 331 | if (clocksource_register(&clocksource_davinci)) |
315 | printk(err, clocksource_davinci.name); | 332 | printk(err, clocksource_davinci.name); |
316 | 333 | ||
317 | /* setup clockevent */ | 334 | /* setup clockevent */ |
318 | clockevent_davinci.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, | 335 | clockevent_davinci.mult = div_sc(davinci_clock_tick_rate, NSEC_PER_SEC, |
319 | clockevent_davinci.shift); | 336 | clockevent_davinci.shift); |
320 | clockevent_davinci.max_delta_ns = | 337 | clockevent_davinci.max_delta_ns = |
321 | clockevent_delta2ns(0xfffffffe, &clockevent_davinci); | 338 | clockevent_delta2ns(0xfffffffe, &clockevent_davinci); |
@@ -333,42 +350,52 @@ struct sys_timer davinci_timer = { | |||
333 | 350 | ||
334 | /* reset board using watchdog timer */ | 351 | /* reset board using watchdog timer */ |
335 | void davinci_watchdog_reset(void) { | 352 | void davinci_watchdog_reset(void) { |
336 | u32 tgcr, wdtcr, base = DAVINCI_WDOG_BASE; | 353 | u32 tgcr, wdtcr; |
354 | void __iomem *base = IO_ADDRESS(DAVINCI_WDOG_BASE); | ||
355 | struct device dev; | ||
356 | struct clk *wd_clk; | ||
357 | char *name = "watchdog"; | ||
358 | |||
359 | dev_set_name(&dev, name); | ||
360 | wd_clk = clk_get(&dev, NULL); | ||
361 | if (WARN_ON(IS_ERR(wd_clk))) | ||
362 | return; | ||
363 | clk_enable(wd_clk); | ||
337 | 364 | ||
338 | /* disable, internal clock source */ | 365 | /* disable, internal clock source */ |
339 | davinci_writel(0, base + TCR); | 366 | __raw_writel(0, base + TCR); |
340 | 367 | ||
341 | /* reset timer, set mode to 64-bit watchdog, and unreset */ | 368 | /* reset timer, set mode to 64-bit watchdog, and unreset */ |
342 | tgcr = 0; | 369 | tgcr = 0; |
343 | davinci_writel(tgcr, base + TCR); | 370 | __raw_writel(tgcr, base + TCR); |
344 | tgcr = TGCR_TIMMODE_64BIT_WDOG << TGCR_TIMMODE_SHIFT; | 371 | tgcr = TGCR_TIMMODE_64BIT_WDOG << TGCR_TIMMODE_SHIFT; |
345 | tgcr |= (TGCR_UNRESET << TGCR_TIM12RS_SHIFT) | | 372 | tgcr |= (TGCR_UNRESET << TGCR_TIM12RS_SHIFT) | |
346 | (TGCR_UNRESET << TGCR_TIM34RS_SHIFT); | 373 | (TGCR_UNRESET << TGCR_TIM34RS_SHIFT); |
347 | davinci_writel(tgcr, base + TCR); | 374 | __raw_writel(tgcr, base + TCR); |
348 | 375 | ||
349 | /* clear counter and period regs */ | 376 | /* clear counter and period regs */ |
350 | davinci_writel(0, base + TIM12); | 377 | __raw_writel(0, base + TIM12); |
351 | davinci_writel(0, base + TIM34); | 378 | __raw_writel(0, base + TIM34); |
352 | davinci_writel(0, base + PRD12); | 379 | __raw_writel(0, base + PRD12); |
353 | davinci_writel(0, base + PRD34); | 380 | __raw_writel(0, base + PRD34); |
354 | 381 | ||
355 | /* enable */ | 382 | /* enable */ |
356 | wdtcr = davinci_readl(base + WDTCR); | 383 | wdtcr = __raw_readl(base + WDTCR); |
357 | wdtcr |= WDTCR_WDEN_ENABLE << WDTCR_WDEN_SHIFT; | 384 | wdtcr |= WDTCR_WDEN_ENABLE << WDTCR_WDEN_SHIFT; |
358 | davinci_writel(wdtcr, base + WDTCR); | 385 | __raw_writel(wdtcr, base + WDTCR); |
359 | 386 | ||
360 | /* put watchdog in pre-active state */ | 387 | /* put watchdog in pre-active state */ |
361 | wdtcr = (WDTCR_WDKEY_SEQ0 << WDTCR_WDKEY_SHIFT) | | 388 | wdtcr = (WDTCR_WDKEY_SEQ0 << WDTCR_WDKEY_SHIFT) | |
362 | (WDTCR_WDEN_ENABLE << WDTCR_WDEN_SHIFT); | 389 | (WDTCR_WDEN_ENABLE << WDTCR_WDEN_SHIFT); |
363 | davinci_writel(wdtcr, base + WDTCR); | 390 | __raw_writel(wdtcr, base + WDTCR); |
364 | 391 | ||
365 | /* put watchdog in active state */ | 392 | /* put watchdog in active state */ |
366 | wdtcr = (WDTCR_WDKEY_SEQ1 << WDTCR_WDKEY_SHIFT) | | 393 | wdtcr = (WDTCR_WDKEY_SEQ1 << WDTCR_WDKEY_SHIFT) | |
367 | (WDTCR_WDEN_ENABLE << WDTCR_WDEN_SHIFT); | 394 | (WDTCR_WDEN_ENABLE << WDTCR_WDEN_SHIFT); |
368 | davinci_writel(wdtcr, base + WDTCR); | 395 | __raw_writel(wdtcr, base + WDTCR); |
369 | 396 | ||
370 | /* write an invalid value to the WDKEY field to trigger | 397 | /* write an invalid value to the WDKEY field to trigger |
371 | * a watchdog reset */ | 398 | * a watchdog reset */ |
372 | wdtcr = 0x00004000; | 399 | wdtcr = 0x00004000; |
373 | davinci_writel(wdtcr, base + WDTCR); | 400 | __raw_writel(wdtcr, base + WDTCR); |
374 | } | 401 | } |
diff --git a/arch/arm/mach-davinci/usb.c b/arch/arm/mach-davinci/usb.c index 2429b79f6da2..abedb6337182 100644 --- a/arch/arm/mach-davinci/usb.c +++ b/arch/arm/mach-davinci/usb.c | |||
@@ -14,6 +14,8 @@ | |||
14 | #include <mach/hardware.h> | 14 | #include <mach/hardware.h> |
15 | #include <mach/irqs.h> | 15 | #include <mach/irqs.h> |
16 | 16 | ||
17 | #define DAVINCI_USB_OTG_BASE 0x01C64000 | ||
18 | |||
17 | #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE) | 19 | #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE) |
18 | static struct musb_hdrc_eps_bits musb_eps[] = { | 20 | static struct musb_hdrc_eps_bits musb_eps[] = { |
19 | { "ep1_tx", 8, }, | 21 | { "ep1_tx", 8, }, |
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig deleted file mode 100644 index cddd194ac6eb..000000000000 --- a/arch/arm/mach-imx/Kconfig +++ /dev/null | |||
@@ -1,11 +0,0 @@ | |||
1 | menu "IMX Implementations" | ||
2 | depends on ARCH_IMX | ||
3 | |||
4 | config ARCH_MX1ADS | ||
5 | bool "mx1ads" | ||
6 | depends on ARCH_IMX | ||
7 | select ISA | ||
8 | help | ||
9 | Say Y here if you are using the Motorola MX1ADS board | ||
10 | |||
11 | endmenu | ||
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile deleted file mode 100644 index b047c7e795a9..000000000000 --- a/arch/arm/mach-imx/Makefile +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | # | ||
2 | # Makefile for the linux kernel. | ||
3 | # | ||
4 | |||
5 | # Object file lists. | ||
6 | |||
7 | obj-y += irq.o time.o dma.o generic.o clock.o | ||
8 | |||
9 | obj-$(CONFIG_CPU_FREQ_IMX) += cpufreq.o | ||
10 | |||
11 | # Specific board support | ||
12 | obj-$(CONFIG_ARCH_MX1ADS) += mx1ads.o | ||
13 | |||
14 | # Support for blinky lights | ||
15 | led-y := leds.o | ||
16 | |||
17 | obj-$(CONFIG_LEDS) += $(led-y) | ||
18 | led-$(CONFIG_ARCH_MX1ADS) += leds-mx1ads.o | ||
diff --git a/arch/arm/mach-imx/Makefile.boot b/arch/arm/mach-imx/Makefile.boot deleted file mode 100644 index fd72ce5b8081..000000000000 --- a/arch/arm/mach-imx/Makefile.boot +++ /dev/null | |||
@@ -1,2 +0,0 @@ | |||
1 | zreladdr-$(CONFIG_ARCH_MX1ADS) := 0x08008000 | ||
2 | |||
diff --git a/arch/arm/mach-imx/clock.c b/arch/arm/mach-imx/clock.c deleted file mode 100644 index cf332aeb942e..000000000000 --- a/arch/arm/mach-imx/clock.c +++ /dev/null | |||
@@ -1,210 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2008 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License as published by | ||
6 | * the Free Software Foundation; either version 2 of the License, or | ||
7 | * (at your option) any later version. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License | ||
15 | * along with this program; if not, write to the Free Software | ||
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
17 | */ | ||
18 | |||
19 | #include <linux/kernel.h> | ||
20 | #include <linux/device.h> | ||
21 | #include <linux/list.h> | ||
22 | #include <linux/math64.h> | ||
23 | #include <linux/err.h> | ||
24 | #include <linux/io.h> | ||
25 | |||
26 | #include <mach/hardware.h> | ||
27 | |||
28 | /* | ||
29 | * Very simple approach: We can't disable clocks, so we do | ||
30 | * not need refcounting | ||
31 | */ | ||
32 | |||
33 | struct clk { | ||
34 | struct list_head node; | ||
35 | const char *name; | ||
36 | unsigned long (*get_rate)(void); | ||
37 | }; | ||
38 | |||
39 | /* | ||
40 | * get the system pll clock in Hz | ||
41 | * | ||
42 | * mfi + mfn / (mfd +1) | ||
43 | * f = 2 * f_ref * -------------------- | ||
44 | * pd + 1 | ||
45 | */ | ||
46 | static unsigned long imx_decode_pll(unsigned int pll, u32 f_ref) | ||
47 | { | ||
48 | unsigned long long ll; | ||
49 | unsigned long quot; | ||
50 | |||
51 | u32 mfi = (pll >> 10) & 0xf; | ||
52 | u32 mfn = pll & 0x3ff; | ||
53 | u32 mfd = (pll >> 16) & 0x3ff; | ||
54 | u32 pd = (pll >> 26) & 0xf; | ||
55 | |||
56 | mfi = mfi <= 5 ? 5 : mfi; | ||
57 | |||
58 | ll = 2 * (unsigned long long)f_ref * | ||
59 | ((mfi << 16) + (mfn << 16) / (mfd + 1)); | ||
60 | quot = (pd + 1) * (1 << 16); | ||
61 | ll += quot / 2; | ||
62 | do_div(ll, quot); | ||
63 | return (unsigned long)ll; | ||
64 | } | ||
65 | |||
66 | static unsigned long imx_get_system_clk(void) | ||
67 | { | ||
68 | u32 f_ref = (CSCR & CSCR_SYSTEM_SEL) ? 16000000 : (CLK32 * 512); | ||
69 | |||
70 | return imx_decode_pll(SPCTL0, f_ref); | ||
71 | } | ||
72 | |||
73 | static unsigned long imx_get_mcu_clk(void) | ||
74 | { | ||
75 | return imx_decode_pll(MPCTL0, CLK32 * 512); | ||
76 | } | ||
77 | |||
78 | /* | ||
79 | * get peripheral clock 1 ( UART[12], Timer[12], PWM ) | ||
80 | */ | ||
81 | static unsigned long imx_get_perclk1(void) | ||
82 | { | ||
83 | return imx_get_system_clk() / (((PCDR) & 0xf)+1); | ||
84 | } | ||
85 | |||
86 | /* | ||
87 | * get peripheral clock 2 ( LCD, SD, SPI[12] ) | ||
88 | */ | ||
89 | static unsigned long imx_get_perclk2(void) | ||
90 | { | ||
91 | return imx_get_system_clk() / (((PCDR>>4) & 0xf)+1); | ||
92 | } | ||
93 | |||
94 | /* | ||
95 | * get peripheral clock 3 ( SSI ) | ||
96 | */ | ||
97 | static unsigned long imx_get_perclk3(void) | ||
98 | { | ||
99 | return imx_get_system_clk() / (((PCDR>>16) & 0x7f)+1); | ||
100 | } | ||
101 | |||
102 | /* | ||
103 | * get hclk ( SDRAM, CSI, Memory Stick, I2C, DMA ) | ||
104 | */ | ||
105 | static unsigned long imx_get_hclk(void) | ||
106 | { | ||
107 | return imx_get_system_clk() / (((CSCR>>10) & 0xf)+1); | ||
108 | } | ||
109 | |||
110 | static struct clk clk_system_clk = { | ||
111 | .name = "system_clk", | ||
112 | .get_rate = imx_get_system_clk, | ||
113 | }; | ||
114 | |||
115 | static struct clk clk_hclk = { | ||
116 | .name = "hclk", | ||
117 | .get_rate = imx_get_hclk, | ||
118 | }; | ||
119 | |||
120 | static struct clk clk_mcu_clk = { | ||
121 | .name = "mcu_clk", | ||
122 | .get_rate = imx_get_mcu_clk, | ||
123 | }; | ||
124 | |||
125 | static struct clk clk_perclk1 = { | ||
126 | .name = "perclk1", | ||
127 | .get_rate = imx_get_perclk1, | ||
128 | }; | ||
129 | |||
130 | static struct clk clk_uart_clk = { | ||
131 | .name = "uart_clk", | ||
132 | .get_rate = imx_get_perclk1, | ||
133 | }; | ||
134 | |||
135 | static struct clk clk_perclk2 = { | ||
136 | .name = "perclk2", | ||
137 | .get_rate = imx_get_perclk2, | ||
138 | }; | ||
139 | |||
140 | static struct clk clk_perclk3 = { | ||
141 | .name = "perclk3", | ||
142 | .get_rate = imx_get_perclk3, | ||
143 | }; | ||
144 | |||
145 | static struct clk *clks[] = { | ||
146 | &clk_perclk1, | ||
147 | &clk_perclk2, | ||
148 | &clk_perclk3, | ||
149 | &clk_system_clk, | ||
150 | &clk_hclk, | ||
151 | &clk_mcu_clk, | ||
152 | &clk_uart_clk, | ||
153 | }; | ||
154 | |||
155 | static LIST_HEAD(clocks); | ||
156 | static DEFINE_MUTEX(clocks_mutex); | ||
157 | |||
158 | struct clk *clk_get(struct device *dev, const char *id) | ||
159 | { | ||
160 | struct clk *p, *clk = ERR_PTR(-ENOENT); | ||
161 | |||
162 | mutex_lock(&clocks_mutex); | ||
163 | list_for_each_entry(p, &clocks, node) { | ||
164 | if (!strcmp(p->name, id)) { | ||
165 | clk = p; | ||
166 | goto found; | ||
167 | } | ||
168 | } | ||
169 | |||
170 | found: | ||
171 | mutex_unlock(&clocks_mutex); | ||
172 | |||
173 | return clk; | ||
174 | } | ||
175 | EXPORT_SYMBOL(clk_get); | ||
176 | |||
177 | void clk_put(struct clk *clk) | ||
178 | { | ||
179 | } | ||
180 | EXPORT_SYMBOL(clk_put); | ||
181 | |||
182 | int clk_enable(struct clk *clk) | ||
183 | { | ||
184 | return 0; | ||
185 | } | ||
186 | EXPORT_SYMBOL(clk_enable); | ||
187 | |||
188 | void clk_disable(struct clk *clk) | ||
189 | { | ||
190 | } | ||
191 | EXPORT_SYMBOL(clk_disable); | ||
192 | |||
193 | unsigned long clk_get_rate(struct clk *clk) | ||
194 | { | ||
195 | return clk->get_rate(); | ||
196 | } | ||
197 | EXPORT_SYMBOL(clk_get_rate); | ||
198 | |||
199 | int imx_clocks_init(void) | ||
200 | { | ||
201 | int i; | ||
202 | |||
203 | mutex_lock(&clocks_mutex); | ||
204 | for (i = 0; i < ARRAY_SIZE(clks); i++) | ||
205 | list_add(&clks[i]->node, &clocks); | ||
206 | mutex_unlock(&clocks_mutex); | ||
207 | |||
208 | return 0; | ||
209 | } | ||
210 | |||
diff --git a/arch/arm/mach-imx/cpufreq.c b/arch/arm/mach-imx/cpufreq.c deleted file mode 100644 index 434b4ca0af67..000000000000 --- a/arch/arm/mach-imx/cpufreq.c +++ /dev/null | |||
@@ -1,315 +0,0 @@ | |||
1 | /* | ||
2 | * cpu.c: clock scaling for the iMX | ||
3 | * | ||
4 | * Copyright (C) 2000 2001, The Delft University of Technology | ||
5 | * Copyright (c) 2004 Sascha Hauer <sascha@saschahauer.de> | ||
6 | * Copyright (C) 2006 Inky Lung <ilung@cwlinux.com> | ||
7 | * Copyright (C) 2006 Pavel Pisa, PiKRON <ppisa@pikron.com> | ||
8 | * | ||
9 | * Based on SA1100 version written by: | ||
10 | * - Johan Pouwelse (J.A.Pouwelse@its.tudelft.nl): initial version | ||
11 | * - Erik Mouw (J.A.K.Mouw@its.tudelft.nl): | ||
12 | * | ||
13 | * This program is free software; you can redistribute it and/or modify | ||
14 | * it under the terms of the GNU General Public License as published by | ||
15 | * the Free Software Foundation; either version 2 of the License, or | ||
16 | * (at your option) any later version. | ||
17 | * | ||
18 | * This program is distributed in the hope that it will be useful, | ||
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
21 | * GNU General Public License for more details. | ||
22 | * | ||
23 | * You should have received a copy of the GNU General Public License | ||
24 | * along with this program; if not, write to the Free Software | ||
25 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
26 | * | ||
27 | */ | ||
28 | |||
29 | /*#define DEBUG*/ | ||
30 | |||
31 | #include <linux/kernel.h> | ||
32 | #include <linux/types.h> | ||
33 | #include <linux/init.h> | ||
34 | #include <linux/cpufreq.h> | ||
35 | #include <linux/clk.h> | ||
36 | #include <linux/err.h> | ||
37 | #include <asm/system.h> | ||
38 | |||
39 | #include <mach/hardware.h> | ||
40 | |||
41 | #include "generic.h" | ||
42 | |||
43 | #ifndef __val2mfld | ||
44 | #define __val2mfld(mask,val) (((mask)&~((mask)<<1))*(val)&(mask)) | ||
45 | #endif | ||
46 | #ifndef __mfld2val | ||
47 | #define __mfld2val(mask,val) (((val)&(mask))/((mask)&~((mask)<<1))) | ||
48 | #endif | ||
49 | |||
50 | #define CR_920T_CLOCK_MODE 0xC0000000 | ||
51 | #define CR_920T_FASTBUS_MODE 0x00000000 | ||
52 | #define CR_920T_ASYNC_MODE 0xC0000000 | ||
53 | |||
54 | static u32 mpctl0_at_boot; | ||
55 | static u32 bclk_div_at_boot; | ||
56 | |||
57 | static struct clk *system_clk, *mcu_clk; | ||
58 | |||
59 | static void imx_set_async_mode(void) | ||
60 | { | ||
61 | adjust_cr(CR_920T_CLOCK_MODE, CR_920T_ASYNC_MODE); | ||
62 | } | ||
63 | |||
64 | static void imx_set_fastbus_mode(void) | ||
65 | { | ||
66 | adjust_cr(CR_920T_CLOCK_MODE, CR_920T_FASTBUS_MODE); | ||
67 | } | ||
68 | |||
69 | static void imx_set_mpctl0(u32 mpctl0) | ||
70 | { | ||
71 | unsigned long flags; | ||
72 | |||
73 | if (mpctl0 == 0) { | ||
74 | local_irq_save(flags); | ||
75 | CSCR &= ~CSCR_MPEN; | ||
76 | local_irq_restore(flags); | ||
77 | return; | ||
78 | } | ||
79 | |||
80 | local_irq_save(flags); | ||
81 | MPCTL0 = mpctl0; | ||
82 | CSCR |= CSCR_MPEN; | ||
83 | local_irq_restore(flags); | ||
84 | } | ||
85 | |||
86 | /** | ||
87 | * imx_compute_mpctl - compute new PLL parameters | ||
88 | * @new_mpctl: pointer to location assigned by new PLL control register value | ||
89 | * @cur_mpctl: current PLL control register parameters | ||
90 | * @f_ref: reference source frequency Hz | ||
91 | * @freq: required frequency in Hz | ||
92 | * @relation: is one of %CPUFREQ_RELATION_L (supremum) | ||
93 | * and %CPUFREQ_RELATION_H (infimum) | ||
94 | */ | ||
95 | long imx_compute_mpctl(u32 *new_mpctl, u32 cur_mpctl, u32 f_ref, unsigned long freq, int relation) | ||
96 | { | ||
97 | u32 mfi; | ||
98 | u32 mfn; | ||
99 | u32 mfd; | ||
100 | u32 pd; | ||
101 | unsigned long long ll; | ||
102 | long l; | ||
103 | long quot; | ||
104 | |||
105 | /* Fdppl=2*Fref*(MFI+MFN/(MFD+1))/(PD+1) */ | ||
106 | /* PD=<0,15>, MFD=<1,1023>, MFI=<5,15> MFN=<0,1022> */ | ||
107 | |||
108 | if (cur_mpctl) { | ||
109 | mfd = ((cur_mpctl >> 16) & 0x3ff) + 1; | ||
110 | pd = ((cur_mpctl >> 26) & 0xf) + 1; | ||
111 | } else { | ||
112 | pd=2; mfd=313; | ||
113 | } | ||
114 | |||
115 | /* pd=2; mfd=313; mfi=8; mfn=183; */ | ||
116 | /* (MFI+MFN/(MFD)) = Fdppl / (2*Fref) * (PD); */ | ||
117 | |||
118 | quot = (f_ref + (1 << 9)) >> 10; | ||
119 | l = (freq * pd + quot) / (2 * quot); | ||
120 | mfi = l >> 10; | ||
121 | mfn = ((l & ((1 << 10) - 1)) * mfd + (1 << 9)) >> 10; | ||
122 | |||
123 | mfd -= 1; | ||
124 | pd -= 1; | ||
125 | |||
126 | *new_mpctl = ((mfi & 0xf) << 10) | (mfn & 0x3ff) | ((mfd & 0x3ff) << 16) | ||
127 | | ((pd & 0xf) << 26); | ||
128 | |||
129 | ll = 2 * (unsigned long long)f_ref * ( (mfi<<16) + (mfn<<16) / (mfd+1) ); | ||
130 | quot = (pd+1) * (1<<16); | ||
131 | ll += quot / 2; | ||
132 | do_div(ll, quot); | ||
133 | freq = ll; | ||
134 | |||
135 | pr_debug(KERN_DEBUG "imx: new PLL parameters pd=%d mfd=%d mfi=%d mfn=%d, freq=%ld\n", | ||
136 | pd, mfd, mfi, mfn, freq); | ||
137 | |||
138 | return freq; | ||
139 | } | ||
140 | |||
141 | |||
142 | static int imx_verify_speed(struct cpufreq_policy *policy) | ||
143 | { | ||
144 | if (policy->cpu != 0) | ||
145 | return -EINVAL; | ||
146 | |||
147 | cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq); | ||
148 | |||
149 | return 0; | ||
150 | } | ||
151 | |||
152 | static unsigned int imx_get_speed(unsigned int cpu) | ||
153 | { | ||
154 | unsigned int freq; | ||
155 | unsigned int cr; | ||
156 | unsigned int cscr; | ||
157 | unsigned int bclk_div; | ||
158 | |||
159 | if (cpu) | ||
160 | return 0; | ||
161 | |||
162 | cscr = CSCR; | ||
163 | bclk_div = __mfld2val(CSCR_BCLK_DIV, cscr) + 1; | ||
164 | cr = get_cr(); | ||
165 | |||
166 | if((cr & CR_920T_CLOCK_MODE) == CR_920T_FASTBUS_MODE) { | ||
167 | freq = clk_get_rate(system_clk); | ||
168 | freq = (freq + bclk_div/2) / bclk_div; | ||
169 | } else { | ||
170 | freq = clk_get_rate(mcu_clk); | ||
171 | if (cscr & CSCR_MPU_PRESC) | ||
172 | freq /= 2; | ||
173 | } | ||
174 | |||
175 | freq = (freq + 500) / 1000; | ||
176 | |||
177 | return freq; | ||
178 | } | ||
179 | |||
180 | static int imx_set_target(struct cpufreq_policy *policy, | ||
181 | unsigned int target_freq, | ||
182 | unsigned int relation) | ||
183 | { | ||
184 | struct cpufreq_freqs freqs; | ||
185 | u32 mpctl0 = 0; | ||
186 | u32 cscr; | ||
187 | unsigned long flags; | ||
188 | long freq; | ||
189 | long sysclk; | ||
190 | unsigned int bclk_div = bclk_div_at_boot; | ||
191 | |||
192 | /* | ||
193 | * Some governors do not respects CPU and policy lower limits | ||
194 | * which leads to bad things (division by zero etc), ensure | ||
195 | * that such things do not happen. | ||
196 | */ | ||
197 | if(target_freq < policy->cpuinfo.min_freq) | ||
198 | target_freq = policy->cpuinfo.min_freq; | ||
199 | |||
200 | if(target_freq < policy->min) | ||
201 | target_freq = policy->min; | ||
202 | |||
203 | freq = target_freq * 1000; | ||
204 | |||
205 | pr_debug(KERN_DEBUG "imx: requested frequency %ld Hz, mpctl0 at boot 0x%08x\n", | ||
206 | freq, mpctl0_at_boot); | ||
207 | |||
208 | sysclk = clk_get_rate(system_clk); | ||
209 | |||
210 | if (freq > sysclk / bclk_div_at_boot + 1000000) { | ||
211 | freq = imx_compute_mpctl(&mpctl0, mpctl0_at_boot, CLK32 * 512, freq, relation); | ||
212 | if (freq < 0) { | ||
213 | printk(KERN_WARNING "imx: target frequency %ld Hz cannot be set\n", freq); | ||
214 | return -EINVAL; | ||
215 | } | ||
216 | } else { | ||
217 | if(freq + 1000 < sysclk) { | ||
218 | if (relation == CPUFREQ_RELATION_L) | ||
219 | bclk_div = (sysclk - 1000) / freq; | ||
220 | else | ||
221 | bclk_div = (sysclk + freq + 1000) / freq; | ||
222 | |||
223 | if(bclk_div > 16) | ||
224 | bclk_div = 16; | ||
225 | if(bclk_div < bclk_div_at_boot) | ||
226 | bclk_div = bclk_div_at_boot; | ||
227 | } | ||
228 | freq = (sysclk + bclk_div / 2) / bclk_div; | ||
229 | } | ||
230 | |||
231 | freqs.old = imx_get_speed(0); | ||
232 | freqs.new = (freq + 500) / 1000; | ||
233 | freqs.cpu = 0; | ||
234 | freqs.flags = 0; | ||
235 | |||
236 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | ||
237 | |||
238 | local_irq_save(flags); | ||
239 | |||
240 | imx_set_fastbus_mode(); | ||
241 | |||
242 | imx_set_mpctl0(mpctl0); | ||
243 | |||
244 | cscr = CSCR; | ||
245 | cscr &= ~CSCR_BCLK_DIV; | ||
246 | cscr |= __val2mfld(CSCR_BCLK_DIV, bclk_div - 1); | ||
247 | CSCR = cscr; | ||
248 | |||
249 | if(mpctl0) { | ||
250 | CSCR |= CSCR_MPLL_RESTART; | ||
251 | |||
252 | /* Wait until MPLL is stabilized */ | ||
253 | while( CSCR & CSCR_MPLL_RESTART ); | ||
254 | |||
255 | imx_set_async_mode(); | ||
256 | } | ||
257 | |||
258 | local_irq_restore(flags); | ||
259 | |||
260 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | ||
261 | |||
262 | pr_debug(KERN_INFO "imx: set frequency %ld Hz, running from %s\n", | ||
263 | freq, mpctl0? "MPLL": "SPLL"); | ||
264 | |||
265 | return 0; | ||
266 | } | ||
267 | |||
268 | static int __init imx_cpufreq_driver_init(struct cpufreq_policy *policy) | ||
269 | { | ||
270 | printk(KERN_INFO "i.MX cpu freq change driver v1.0\n"); | ||
271 | |||
272 | if (policy->cpu != 0) | ||
273 | return -EINVAL; | ||
274 | |||
275 | policy->cur = policy->min = policy->max = imx_get_speed(0); | ||
276 | policy->cpuinfo.min_freq = 8000; | ||
277 | policy->cpuinfo.max_freq = 200000; | ||
278 | /* Manual states, that PLL stabilizes in two CLK32 periods */ | ||
279 | policy->cpuinfo.transition_latency = 4 * 1000000000LL / CLK32; | ||
280 | return 0; | ||
281 | } | ||
282 | |||
283 | static struct cpufreq_driver imx_driver = { | ||
284 | .flags = CPUFREQ_STICKY, | ||
285 | .verify = imx_verify_speed, | ||
286 | .target = imx_set_target, | ||
287 | .get = imx_get_speed, | ||
288 | .init = imx_cpufreq_driver_init, | ||
289 | .name = "imx", | ||
290 | }; | ||
291 | |||
292 | static int __init imx_cpufreq_init(void) | ||
293 | { | ||
294 | bclk_div_at_boot = __mfld2val(CSCR_BCLK_DIV, CSCR) + 1; | ||
295 | mpctl0_at_boot = 0; | ||
296 | |||
297 | system_clk = clk_get(NULL, "system_clk"); | ||
298 | if (IS_ERR(system_clk)) | ||
299 | return PTR_ERR(system_clk); | ||
300 | |||
301 | mcu_clk = clk_get(NULL, "mcu_clk"); | ||
302 | if (IS_ERR(mcu_clk)) { | ||
303 | clk_put(system_clk); | ||
304 | return PTR_ERR(mcu_clk); | ||
305 | } | ||
306 | |||
307 | if((CSCR & CSCR_MPEN) && | ||
308 | ((get_cr() & CR_920T_CLOCK_MODE) != CR_920T_FASTBUS_MODE)) | ||
309 | mpctl0_at_boot = MPCTL0; | ||
310 | |||
311 | return cpufreq_register_driver(&imx_driver); | ||
312 | } | ||
313 | |||
314 | arch_initcall(imx_cpufreq_init); | ||
315 | |||
diff --git a/arch/arm/mach-imx/dma.c b/arch/arm/mach-imx/dma.c deleted file mode 100644 index 1536583eece0..000000000000 --- a/arch/arm/mach-imx/dma.c +++ /dev/null | |||
@@ -1,597 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-imx/dma.c | ||
3 | * | ||
4 | * imx DMA registration and IRQ dispatching | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | * 2004-03-03 Sascha Hauer <sascha@saschahauer.de> | ||
11 | * initial version heavily inspired by | ||
12 | * linux/arch/arm/mach-pxa/dma.c | ||
13 | * | ||
14 | * 2005-04-17 Pavel Pisa <pisa@cmp.felk.cvut.cz> | ||
15 | * Changed to support scatter gather DMA | ||
16 | * by taking Russell's code from RiscPC | ||
17 | * | ||
18 | * 2006-05-31 Pavel Pisa <pisa@cmp.felk.cvut.cz> | ||
19 | * Corrected error handling code. | ||
20 | * | ||
21 | */ | ||
22 | |||
23 | #undef DEBUG | ||
24 | |||
25 | #include <linux/module.h> | ||
26 | #include <linux/init.h> | ||
27 | #include <linux/kernel.h> | ||
28 | #include <linux/interrupt.h> | ||
29 | #include <linux/errno.h> | ||
30 | |||
31 | #include <asm/scatterlist.h> | ||
32 | #include <asm/system.h> | ||
33 | #include <asm/irq.h> | ||
34 | #include <mach/hardware.h> | ||
35 | #include <mach/dma.h> | ||
36 | #include <mach/imx-dma.h> | ||
37 | |||
38 | struct imx_dma_channel imx_dma_channels[IMX_DMA_CHANNELS]; | ||
39 | |||
40 | /* | ||
41 | * imx_dma_sg_next - prepare next chunk for scatter-gather DMA emulation | ||
42 | * @dma_ch: i.MX DMA channel number | ||
43 | * @lastcount: number of bytes transferred during last transfer | ||
44 | * | ||
45 | * Functions prepares DMA controller for next sg data chunk transfer. | ||
46 | * The @lastcount argument informs function about number of bytes transferred | ||
47 | * during last block. Zero value can be used for @lastcount to setup DMA | ||
48 | * for the first chunk. | ||
49 | */ | ||
50 | static inline int imx_dma_sg_next(imx_dmach_t dma_ch, unsigned int lastcount) | ||
51 | { | ||
52 | struct imx_dma_channel *imxdma = &imx_dma_channels[dma_ch]; | ||
53 | unsigned int nextcount; | ||
54 | unsigned int nextaddr; | ||
55 | |||
56 | if (!imxdma->name) { | ||
57 | printk(KERN_CRIT "%s: called for not allocated channel %d\n", | ||
58 | __func__, dma_ch); | ||
59 | return 0; | ||
60 | } | ||
61 | |||
62 | imxdma->resbytes -= lastcount; | ||
63 | |||
64 | if (!imxdma->sg) { | ||
65 | pr_debug("imxdma%d: no sg data\n", dma_ch); | ||
66 | return 0; | ||
67 | } | ||
68 | |||
69 | imxdma->sgbc += lastcount; | ||
70 | if ((imxdma->sgbc >= imxdma->sg->length) || !imxdma->resbytes) { | ||
71 | if ((imxdma->sgcount <= 1) || !imxdma->resbytes) { | ||
72 | pr_debug("imxdma%d: sg transfer limit reached\n", | ||
73 | dma_ch); | ||
74 | imxdma->sgcount=0; | ||
75 | imxdma->sg = NULL; | ||
76 | return 0; | ||
77 | } else { | ||
78 | imxdma->sgcount--; | ||
79 | imxdma->sg++; | ||
80 | imxdma->sgbc = 0; | ||
81 | } | ||
82 | } | ||
83 | nextcount = imxdma->sg->length - imxdma->sgbc; | ||
84 | nextaddr = imxdma->sg->dma_address + imxdma->sgbc; | ||
85 | |||
86 | if(imxdma->resbytes < nextcount) | ||
87 | nextcount = imxdma->resbytes; | ||
88 | |||
89 | if ((imxdma->dma_mode & DMA_MODE_MASK) == DMA_MODE_READ) | ||
90 | DAR(dma_ch) = nextaddr; | ||
91 | else | ||
92 | SAR(dma_ch) = nextaddr; | ||
93 | |||
94 | CNTR(dma_ch) = nextcount; | ||
95 | pr_debug("imxdma%d: next sg chunk dst 0x%08x, src 0x%08x, size 0x%08x\n", | ||
96 | dma_ch, DAR(dma_ch), SAR(dma_ch), CNTR(dma_ch)); | ||
97 | |||
98 | return nextcount; | ||
99 | } | ||
100 | |||
101 | /* | ||
102 | * imx_dma_setup_sg_base - scatter-gather DMA emulation | ||
103 | * @dma_ch: i.MX DMA channel number | ||
104 | * @sg: pointer to the scatter-gather list/vector | ||
105 | * @sgcount: scatter-gather list hungs count | ||
106 | * | ||
107 | * Functions sets up i.MX DMA state for emulated scatter-gather transfer | ||
108 | * and sets up channel registers to be ready for the first chunk | ||
109 | */ | ||
110 | static int | ||
111 | imx_dma_setup_sg_base(imx_dmach_t dma_ch, | ||
112 | struct scatterlist *sg, unsigned int sgcount) | ||
113 | { | ||
114 | struct imx_dma_channel *imxdma = &imx_dma_channels[dma_ch]; | ||
115 | |||
116 | imxdma->sg = sg; | ||
117 | imxdma->sgcount = sgcount; | ||
118 | imxdma->sgbc = 0; | ||
119 | return imx_dma_sg_next(dma_ch, 0); | ||
120 | } | ||
121 | |||
122 | /** | ||
123 | * imx_dma_setup_single - setup i.MX DMA channel for linear memory to/from device transfer | ||
124 | * @dma_ch: i.MX DMA channel number | ||
125 | * @dma_address: the DMA/physical memory address of the linear data block | ||
126 | * to transfer | ||
127 | * @dma_length: length of the data block in bytes | ||
128 | * @dev_addr: physical device port address | ||
129 | * @dmamode: DMA transfer mode, %DMA_MODE_READ from the device to the memory | ||
130 | * or %DMA_MODE_WRITE from memory to the device | ||
131 | * | ||
132 | * The function setups DMA channel source and destination addresses for transfer | ||
133 | * specified by provided parameters. The scatter-gather emulation is disabled, | ||
134 | * because linear data block | ||
135 | * form the physical address range is transferred. | ||
136 | * Return value: if incorrect parameters are provided -%EINVAL. | ||
137 | * Zero indicates success. | ||
138 | */ | ||
139 | int | ||
140 | imx_dma_setup_single(imx_dmach_t dma_ch, dma_addr_t dma_address, | ||
141 | unsigned int dma_length, unsigned int dev_addr, | ||
142 | unsigned int dmamode) | ||
143 | { | ||
144 | struct imx_dma_channel *imxdma = &imx_dma_channels[dma_ch]; | ||
145 | |||
146 | imxdma->sg = NULL; | ||
147 | imxdma->sgcount = 0; | ||
148 | imxdma->dma_mode = dmamode; | ||
149 | imxdma->resbytes = dma_length; | ||
150 | |||
151 | if (!dma_address) { | ||
152 | printk(KERN_ERR "imxdma%d: imx_dma_setup_single null address\n", | ||
153 | dma_ch); | ||
154 | return -EINVAL; | ||
155 | } | ||
156 | |||
157 | if (!dma_length) { | ||
158 | printk(KERN_ERR "imxdma%d: imx_dma_setup_single zero length\n", | ||
159 | dma_ch); | ||
160 | return -EINVAL; | ||
161 | } | ||
162 | |||
163 | if ((dmamode & DMA_MODE_MASK) == DMA_MODE_READ) { | ||
164 | pr_debug("imxdma%d: mx_dma_setup_single2dev dma_addressg=0x%08x dma_length=%d dev_addr=0x%08x for read\n", | ||
165 | dma_ch, (unsigned int)dma_address, dma_length, | ||
166 | dev_addr); | ||
167 | SAR(dma_ch) = dev_addr; | ||
168 | DAR(dma_ch) = (unsigned int)dma_address; | ||
169 | } else if ((dmamode & DMA_MODE_MASK) == DMA_MODE_WRITE) { | ||
170 | pr_debug("imxdma%d: mx_dma_setup_single2dev dma_addressg=0x%08x dma_length=%d dev_addr=0x%08x for write\n", | ||
171 | dma_ch, (unsigned int)dma_address, dma_length, | ||
172 | dev_addr); | ||
173 | SAR(dma_ch) = (unsigned int)dma_address; | ||
174 | DAR(dma_ch) = dev_addr; | ||
175 | } else { | ||
176 | printk(KERN_ERR "imxdma%d: imx_dma_setup_single bad dmamode\n", | ||
177 | dma_ch); | ||
178 | return -EINVAL; | ||
179 | } | ||
180 | |||
181 | CNTR(dma_ch) = dma_length; | ||
182 | |||
183 | return 0; | ||
184 | } | ||
185 | |||
186 | /** | ||
187 | * imx_dma_setup_sg - setup i.MX DMA channel SG list to/from device transfer | ||
188 | * @dma_ch: i.MX DMA channel number | ||
189 | * @sg: pointer to the scatter-gather list/vector | ||
190 | * @sgcount: scatter-gather list hungs count | ||
191 | * @dma_length: total length of the transfer request in bytes | ||
192 | * @dev_addr: physical device port address | ||
193 | * @dmamode: DMA transfer mode, %DMA_MODE_READ from the device to the memory | ||
194 | * or %DMA_MODE_WRITE from memory to the device | ||
195 | * | ||
196 | * The function sets up DMA channel state and registers to be ready for transfer | ||
197 | * specified by provided parameters. The scatter-gather emulation is set up | ||
198 | * according to the parameters. | ||
199 | * | ||
200 | * The full preparation of the transfer requires setup of more register | ||
201 | * by the caller before imx_dma_enable() can be called. | ||
202 | * | ||
203 | * %BLR(dma_ch) holds transfer burst length in bytes, 0 means 64 bytes | ||
204 | * | ||
205 | * %RSSR(dma_ch) has to be set to the DMA request line source %DMA_REQ_xxx | ||
206 | * | ||
207 | * %CCR(dma_ch) has to specify transfer parameters, the next settings is typical | ||
208 | * for linear or simple scatter-gather transfers if %DMA_MODE_READ is specified | ||
209 | * | ||
210 | * %CCR_DMOD_LINEAR | %CCR_DSIZ_32 | %CCR_SMOD_FIFO | %CCR_SSIZ_x | ||
211 | * | ||
212 | * The typical setup for %DMA_MODE_WRITE is specified by next options combination | ||
213 | * | ||
214 | * %CCR_SMOD_LINEAR | %CCR_SSIZ_32 | %CCR_DMOD_FIFO | %CCR_DSIZ_x | ||
215 | * | ||
216 | * Be careful here and do not mistakenly mix source and target device | ||
217 | * port sizes constants, they are really different: | ||
218 | * %CCR_SSIZ_8, %CCR_SSIZ_16, %CCR_SSIZ_32, | ||
219 | * %CCR_DSIZ_8, %CCR_DSIZ_16, %CCR_DSIZ_32 | ||
220 | * | ||
221 | * Return value: if incorrect parameters are provided -%EINVAL. | ||
222 | * Zero indicates success. | ||
223 | */ | ||
224 | int | ||
225 | imx_dma_setup_sg(imx_dmach_t dma_ch, | ||
226 | struct scatterlist *sg, unsigned int sgcount, unsigned int dma_length, | ||
227 | unsigned int dev_addr, unsigned int dmamode) | ||
228 | { | ||
229 | int res; | ||
230 | struct imx_dma_channel *imxdma = &imx_dma_channels[dma_ch]; | ||
231 | |||
232 | imxdma->sg = NULL; | ||
233 | imxdma->sgcount = 0; | ||
234 | imxdma->dma_mode = dmamode; | ||
235 | imxdma->resbytes = dma_length; | ||
236 | |||
237 | if (!sg || !sgcount) { | ||
238 | printk(KERN_ERR "imxdma%d: imx_dma_setup_sg epty sg list\n", | ||
239 | dma_ch); | ||
240 | return -EINVAL; | ||
241 | } | ||
242 | |||
243 | if (!sg->length) { | ||
244 | printk(KERN_ERR "imxdma%d: imx_dma_setup_sg zero length\n", | ||
245 | dma_ch); | ||
246 | return -EINVAL; | ||
247 | } | ||
248 | |||
249 | if ((dmamode & DMA_MODE_MASK) == DMA_MODE_READ) { | ||
250 | pr_debug("imxdma%d: mx_dma_setup_sg2dev sg=%p sgcount=%d total length=%d dev_addr=0x%08x for read\n", | ||
251 | dma_ch, sg, sgcount, dma_length, dev_addr); | ||
252 | SAR(dma_ch) = dev_addr; | ||
253 | } else if ((dmamode & DMA_MODE_MASK) == DMA_MODE_WRITE) { | ||
254 | pr_debug("imxdma%d: mx_dma_setup_sg2dev sg=%p sgcount=%d total length=%d dev_addr=0x%08x for write\n", | ||
255 | dma_ch, sg, sgcount, dma_length, dev_addr); | ||
256 | DAR(dma_ch) = dev_addr; | ||
257 | } else { | ||
258 | printk(KERN_ERR "imxdma%d: imx_dma_setup_sg bad dmamode\n", | ||
259 | dma_ch); | ||
260 | return -EINVAL; | ||
261 | } | ||
262 | |||
263 | res = imx_dma_setup_sg_base(dma_ch, sg, sgcount); | ||
264 | if (res <= 0) { | ||
265 | printk(KERN_ERR "imxdma%d: no sg chunk ready\n", dma_ch); | ||
266 | return -EINVAL; | ||
267 | } | ||
268 | |||
269 | return 0; | ||
270 | } | ||
271 | |||
272 | /** | ||
273 | * imx_dma_setup_handlers - setup i.MX DMA channel end and error notification handlers | ||
274 | * @dma_ch: i.MX DMA channel number | ||
275 | * @irq_handler: the pointer to the function called if the transfer | ||
276 | * ends successfully | ||
277 | * @err_handler: the pointer to the function called if the premature | ||
278 | * end caused by error occurs | ||
279 | * @data: user specified value to be passed to the handlers | ||
280 | */ | ||
281 | int | ||
282 | imx_dma_setup_handlers(imx_dmach_t dma_ch, | ||
283 | void (*irq_handler) (int, void *), | ||
284 | void (*err_handler) (int, void *, int), | ||
285 | void *data) | ||
286 | { | ||
287 | struct imx_dma_channel *imxdma = &imx_dma_channels[dma_ch]; | ||
288 | unsigned long flags; | ||
289 | |||
290 | if (!imxdma->name) { | ||
291 | printk(KERN_CRIT "%s: called for not allocated channel %d\n", | ||
292 | __func__, dma_ch); | ||
293 | return -ENODEV; | ||
294 | } | ||
295 | |||
296 | local_irq_save(flags); | ||
297 | DISR = (1 << dma_ch); | ||
298 | imxdma->irq_handler = irq_handler; | ||
299 | imxdma->err_handler = err_handler; | ||
300 | imxdma->data = data; | ||
301 | local_irq_restore(flags); | ||
302 | return 0; | ||
303 | } | ||
304 | |||
305 | /** | ||
306 | * imx_dma_enable - function to start i.MX DMA channel operation | ||
307 | * @dma_ch: i.MX DMA channel number | ||
308 | * | ||
309 | * The channel has to be allocated by driver through imx_dma_request() | ||
310 | * or imx_dma_request_by_prio() function. | ||
311 | * The transfer parameters has to be set to the channel registers through | ||
312 | * call of the imx_dma_setup_single() or imx_dma_setup_sg() function | ||
313 | * and registers %BLR(dma_ch), %RSSR(dma_ch) and %CCR(dma_ch) has to | ||
314 | * be set prior this function call by the channel user. | ||
315 | */ | ||
316 | void imx_dma_enable(imx_dmach_t dma_ch) | ||
317 | { | ||
318 | struct imx_dma_channel *imxdma = &imx_dma_channels[dma_ch]; | ||
319 | unsigned long flags; | ||
320 | |||
321 | pr_debug("imxdma%d: imx_dma_enable\n", dma_ch); | ||
322 | |||
323 | if (!imxdma->name) { | ||
324 | printk(KERN_CRIT "%s: called for not allocated channel %d\n", | ||
325 | __func__, dma_ch); | ||
326 | return; | ||
327 | } | ||
328 | |||
329 | local_irq_save(flags); | ||
330 | DISR = (1 << dma_ch); | ||
331 | DIMR &= ~(1 << dma_ch); | ||
332 | CCR(dma_ch) |= CCR_CEN; | ||
333 | local_irq_restore(flags); | ||
334 | } | ||
335 | |||
336 | /** | ||
337 | * imx_dma_disable - stop, finish i.MX DMA channel operatin | ||
338 | * @dma_ch: i.MX DMA channel number | ||
339 | */ | ||
340 | void imx_dma_disable(imx_dmach_t dma_ch) | ||
341 | { | ||
342 | unsigned long flags; | ||
343 | |||
344 | pr_debug("imxdma%d: imx_dma_disable\n", dma_ch); | ||
345 | |||
346 | local_irq_save(flags); | ||
347 | DIMR |= (1 << dma_ch); | ||
348 | CCR(dma_ch) &= ~CCR_CEN; | ||
349 | DISR = (1 << dma_ch); | ||
350 | local_irq_restore(flags); | ||
351 | } | ||
352 | |||
353 | /** | ||
354 | * imx_dma_request - request/allocate specified channel number | ||
355 | * @dma_ch: i.MX DMA channel number | ||
356 | * @name: the driver/caller own non-%NULL identification | ||
357 | */ | ||
358 | int imx_dma_request(imx_dmach_t dma_ch, const char *name) | ||
359 | { | ||
360 | struct imx_dma_channel *imxdma = &imx_dma_channels[dma_ch]; | ||
361 | unsigned long flags; | ||
362 | |||
363 | /* basic sanity checks */ | ||
364 | if (!name) | ||
365 | return -EINVAL; | ||
366 | |||
367 | if (dma_ch >= IMX_DMA_CHANNELS) { | ||
368 | printk(KERN_CRIT "%s: called for non-existed channel %d\n", | ||
369 | __func__, dma_ch); | ||
370 | return -EINVAL; | ||
371 | } | ||
372 | |||
373 | local_irq_save(flags); | ||
374 | if (imxdma->name) { | ||
375 | local_irq_restore(flags); | ||
376 | return -ENODEV; | ||
377 | } | ||
378 | |||
379 | imxdma->name = name; | ||
380 | imxdma->irq_handler = NULL; | ||
381 | imxdma->err_handler = NULL; | ||
382 | imxdma->data = NULL; | ||
383 | imxdma->sg = NULL; | ||
384 | local_irq_restore(flags); | ||
385 | return 0; | ||
386 | } | ||
387 | |||
388 | /** | ||
389 | * imx_dma_free - release previously acquired channel | ||
390 | * @dma_ch: i.MX DMA channel number | ||
391 | */ | ||
392 | void imx_dma_free(imx_dmach_t dma_ch) | ||
393 | { | ||
394 | unsigned long flags; | ||
395 | struct imx_dma_channel *imxdma = &imx_dma_channels[dma_ch]; | ||
396 | |||
397 | if (!imxdma->name) { | ||
398 | printk(KERN_CRIT | ||
399 | "%s: trying to free channel %d which is already freed\n", | ||
400 | __func__, dma_ch); | ||
401 | return; | ||
402 | } | ||
403 | |||
404 | local_irq_save(flags); | ||
405 | /* Disable interrupts */ | ||
406 | DIMR |= (1 << dma_ch); | ||
407 | CCR(dma_ch) &= ~CCR_CEN; | ||
408 | imxdma->name = NULL; | ||
409 | local_irq_restore(flags); | ||
410 | } | ||
411 | |||
412 | /** | ||
413 | * imx_dma_request_by_prio - find and request some of free channels best suiting requested priority | ||
414 | * @name: the driver/caller own non-%NULL identification | ||
415 | * @prio: one of the hardware distinguished priority level: | ||
416 | * %DMA_PRIO_HIGH, %DMA_PRIO_MEDIUM, %DMA_PRIO_LOW | ||
417 | * | ||
418 | * This function tries to find free channel in the specified priority group | ||
419 | * if the priority cannot be achieved it tries to look for free channel | ||
420 | * in the higher and then even lower priority groups. | ||
421 | * | ||
422 | * Return value: If there is no free channel to allocate, -%ENODEV is returned. | ||
423 | * On successful allocation channel is returned. | ||
424 | */ | ||
425 | imx_dmach_t imx_dma_request_by_prio(const char *name, imx_dma_prio prio) | ||
426 | { | ||
427 | int i; | ||
428 | int best; | ||
429 | |||
430 | switch (prio) { | ||
431 | case (DMA_PRIO_HIGH): | ||
432 | best = 8; | ||
433 | break; | ||
434 | case (DMA_PRIO_MEDIUM): | ||
435 | best = 4; | ||
436 | break; | ||
437 | case (DMA_PRIO_LOW): | ||
438 | default: | ||
439 | best = 0; | ||
440 | break; | ||
441 | } | ||
442 | |||
443 | for (i = best; i < IMX_DMA_CHANNELS; i++) { | ||
444 | if (!imx_dma_request(i, name)) { | ||
445 | return i; | ||
446 | } | ||
447 | } | ||
448 | |||
449 | for (i = best - 1; i >= 0; i--) { | ||
450 | if (!imx_dma_request(i, name)) { | ||
451 | return i; | ||
452 | } | ||
453 | } | ||
454 | |||
455 | printk(KERN_ERR "%s: no free DMA channel found\n", __func__); | ||
456 | |||
457 | return -ENODEV; | ||
458 | } | ||
459 | |||
460 | static irqreturn_t dma_err_handler(int irq, void *dev_id) | ||
461 | { | ||
462 | int i, disr = DISR; | ||
463 | struct imx_dma_channel *channel; | ||
464 | unsigned int err_mask = DBTOSR | DRTOSR | DSESR | DBOSR; | ||
465 | int errcode; | ||
466 | |||
467 | DISR = disr & err_mask; | ||
468 | for (i = 0; i < IMX_DMA_CHANNELS; i++) { | ||
469 | if(!(err_mask & (1 << i))) | ||
470 | continue; | ||
471 | channel = &imx_dma_channels[i]; | ||
472 | errcode = 0; | ||
473 | |||
474 | if (DBTOSR & (1 << i)) { | ||
475 | DBTOSR = (1 << i); | ||
476 | errcode |= IMX_DMA_ERR_BURST; | ||
477 | } | ||
478 | if (DRTOSR & (1 << i)) { | ||
479 | DRTOSR = (1 << i); | ||
480 | errcode |= IMX_DMA_ERR_REQUEST; | ||
481 | } | ||
482 | if (DSESR & (1 << i)) { | ||
483 | DSESR = (1 << i); | ||
484 | errcode |= IMX_DMA_ERR_TRANSFER; | ||
485 | } | ||
486 | if (DBOSR & (1 << i)) { | ||
487 | DBOSR = (1 << i); | ||
488 | errcode |= IMX_DMA_ERR_BUFFER; | ||
489 | } | ||
490 | |||
491 | /* | ||
492 | * The cleaning of @sg field would be questionable | ||
493 | * there, because its value can help to compute | ||
494 | * remaining/transferred bytes count in the handler | ||
495 | */ | ||
496 | /*imx_dma_channels[i].sg = NULL;*/ | ||
497 | |||
498 | if (channel->name && channel->err_handler) { | ||
499 | channel->err_handler(i, channel->data, errcode); | ||
500 | continue; | ||
501 | } | ||
502 | |||
503 | imx_dma_channels[i].sg = NULL; | ||
504 | |||
505 | printk(KERN_WARNING | ||
506 | "DMA timeout on channel %d (%s) -%s%s%s%s\n", | ||
507 | i, channel->name, | ||
508 | errcode&IMX_DMA_ERR_BURST? " burst":"", | ||
509 | errcode&IMX_DMA_ERR_REQUEST? " request":"", | ||
510 | errcode&IMX_DMA_ERR_TRANSFER? " transfer":"", | ||
511 | errcode&IMX_DMA_ERR_BUFFER? " buffer":""); | ||
512 | } | ||
513 | return IRQ_HANDLED; | ||
514 | } | ||
515 | |||
516 | static irqreturn_t dma_irq_handler(int irq, void *dev_id) | ||
517 | { | ||
518 | int i, disr = DISR; | ||
519 | |||
520 | pr_debug("imxdma: dma_irq_handler called, disr=0x%08x\n", | ||
521 | disr); | ||
522 | |||
523 | DISR = disr; | ||
524 | for (i = 0; i < IMX_DMA_CHANNELS; i++) { | ||
525 | if (disr & (1 << i)) { | ||
526 | struct imx_dma_channel *channel = &imx_dma_channels[i]; | ||
527 | if (channel->name) { | ||
528 | if (imx_dma_sg_next(i, CNTR(i))) { | ||
529 | CCR(i) &= ~CCR_CEN; | ||
530 | mb(); | ||
531 | CCR(i) |= CCR_CEN; | ||
532 | } else { | ||
533 | if (channel->irq_handler) | ||
534 | channel->irq_handler(i, | ||
535 | channel->data); | ||
536 | } | ||
537 | } else { | ||
538 | /* | ||
539 | * IRQ for an unregistered DMA channel: | ||
540 | * let's clear the interrupts and disable it. | ||
541 | */ | ||
542 | printk(KERN_WARNING | ||
543 | "spurious IRQ for DMA channel %d\n", i); | ||
544 | } | ||
545 | } | ||
546 | } | ||
547 | return IRQ_HANDLED; | ||
548 | } | ||
549 | |||
550 | static int __init imx_dma_init(void) | ||
551 | { | ||
552 | int ret; | ||
553 | int i; | ||
554 | |||
555 | /* reset DMA module */ | ||
556 | DCR = DCR_DRST; | ||
557 | |||
558 | ret = request_irq(DMA_INT, dma_irq_handler, 0, "DMA", NULL); | ||
559 | if (ret) { | ||
560 | printk(KERN_CRIT "Wow! Can't register IRQ for DMA\n"); | ||
561 | return ret; | ||
562 | } | ||
563 | |||
564 | ret = request_irq(DMA_ERR, dma_err_handler, 0, "DMA", NULL); | ||
565 | if (ret) { | ||
566 | printk(KERN_CRIT "Wow! Can't register ERRIRQ for DMA\n"); | ||
567 | free_irq(DMA_INT, NULL); | ||
568 | } | ||
569 | |||
570 | /* enable DMA module */ | ||
571 | DCR = DCR_DEN; | ||
572 | |||
573 | /* clear all interrupts */ | ||
574 | DISR = (1 << IMX_DMA_CHANNELS) - 1; | ||
575 | |||
576 | /* enable interrupts */ | ||
577 | DIMR = (1 << IMX_DMA_CHANNELS) - 1; | ||
578 | |||
579 | for (i = 0; i < IMX_DMA_CHANNELS; i++) { | ||
580 | imx_dma_channels[i].sg = NULL; | ||
581 | imx_dma_channels[i].dma_num = i; | ||
582 | } | ||
583 | |||
584 | return ret; | ||
585 | } | ||
586 | |||
587 | arch_initcall(imx_dma_init); | ||
588 | |||
589 | EXPORT_SYMBOL(imx_dma_setup_single); | ||
590 | EXPORT_SYMBOL(imx_dma_setup_sg); | ||
591 | EXPORT_SYMBOL(imx_dma_setup_handlers); | ||
592 | EXPORT_SYMBOL(imx_dma_enable); | ||
593 | EXPORT_SYMBOL(imx_dma_disable); | ||
594 | EXPORT_SYMBOL(imx_dma_request); | ||
595 | EXPORT_SYMBOL(imx_dma_free); | ||
596 | EXPORT_SYMBOL(imx_dma_request_by_prio); | ||
597 | EXPORT_SYMBOL(imx_dma_channels); | ||
diff --git a/arch/arm/mach-imx/generic.c b/arch/arm/mach-imx/generic.c deleted file mode 100644 index 05f1739ee127..000000000000 --- a/arch/arm/mach-imx/generic.c +++ /dev/null | |||
@@ -1,271 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-imx/generic.c | ||
3 | * | ||
4 | * author: Sascha Hauer | ||
5 | * Created: april 20th, 2004 | ||
6 | * Copyright: Synertronixx GmbH | ||
7 | * | ||
8 | * Common code for i.MX machines | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License as published by | ||
12 | * the Free Software Foundation; either version 2 of the License, or | ||
13 | * (at your option) any later version. | ||
14 | * | ||
15 | * This program is distributed in the hope that it will be useful, | ||
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
18 | * GNU General Public License for more details. | ||
19 | * | ||
20 | * You should have received a copy of the GNU General Public License | ||
21 | * along with this program; if not, write to the Free Software | ||
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
23 | * | ||
24 | */ | ||
25 | #include <linux/platform_device.h> | ||
26 | #include <linux/init.h> | ||
27 | #include <linux/kernel.h> | ||
28 | #include <linux/module.h> | ||
29 | #include <linux/string.h> | ||
30 | |||
31 | #include <asm/errno.h> | ||
32 | #include <mach/hardware.h> | ||
33 | #include <mach/imx-regs.h> | ||
34 | |||
35 | #include <asm/mach/map.h> | ||
36 | #include <mach/mmc.h> | ||
37 | #include <mach/gpio.h> | ||
38 | |||
39 | unsigned long imx_gpio_alloc_map[(GPIO_PORT_MAX + 1) * 32 / BITS_PER_LONG]; | ||
40 | |||
41 | void imx_gpio_mode(int gpio_mode) | ||
42 | { | ||
43 | unsigned int pin = gpio_mode & GPIO_PIN_MASK; | ||
44 | unsigned int port = (gpio_mode & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT; | ||
45 | unsigned int ocr = (gpio_mode & GPIO_OCR_MASK) >> GPIO_OCR_SHIFT; | ||
46 | unsigned int tmp; | ||
47 | |||
48 | /* Pullup enable */ | ||
49 | if(gpio_mode & GPIO_PUEN) | ||
50 | PUEN(port) |= (1<<pin); | ||
51 | else | ||
52 | PUEN(port) &= ~(1<<pin); | ||
53 | |||
54 | /* Data direction */ | ||
55 | if(gpio_mode & GPIO_OUT) | ||
56 | DDIR(port) |= 1<<pin; | ||
57 | else | ||
58 | DDIR(port) &= ~(1<<pin); | ||
59 | |||
60 | /* Primary / alternate function */ | ||
61 | if(gpio_mode & GPIO_AF) | ||
62 | GPR(port) |= (1<<pin); | ||
63 | else | ||
64 | GPR(port) &= ~(1<<pin); | ||
65 | |||
66 | /* use as gpio? */ | ||
67 | if(gpio_mode & GPIO_GIUS) | ||
68 | GIUS(port) |= (1<<pin); | ||
69 | else | ||
70 | GIUS(port) &= ~(1<<pin); | ||
71 | |||
72 | /* Output / input configuration */ | ||
73 | /* FIXME: I'm not very sure about OCR and ICONF, someone | ||
74 | * should have a look over it | ||
75 | */ | ||
76 | if(pin<16) { | ||
77 | tmp = OCR1(port); | ||
78 | tmp &= ~( 3<<(pin*2)); | ||
79 | tmp |= (ocr << (pin*2)); | ||
80 | OCR1(port) = tmp; | ||
81 | |||
82 | ICONFA1(port) &= ~( 3<<(pin*2)); | ||
83 | ICONFA1(port) |= ((gpio_mode >> GPIO_AOUT_SHIFT) & 3) << (pin * 2); | ||
84 | ICONFB1(port) &= ~( 3<<(pin*2)); | ||
85 | ICONFB1(port) |= ((gpio_mode >> GPIO_BOUT_SHIFT) & 3) << (pin * 2); | ||
86 | } else { | ||
87 | tmp = OCR2(port); | ||
88 | tmp &= ~( 3<<((pin-16)*2)); | ||
89 | tmp |= (ocr << ((pin-16)*2)); | ||
90 | OCR2(port) = tmp; | ||
91 | |||
92 | ICONFA2(port) &= ~( 3<<((pin-16)*2)); | ||
93 | ICONFA2(port) |= ((gpio_mode >> GPIO_AOUT_SHIFT) & 3) << ((pin-16) * 2); | ||
94 | ICONFB2(port) &= ~( 3<<((pin-16)*2)); | ||
95 | ICONFB2(port) |= ((gpio_mode >> GPIO_BOUT_SHIFT) & 3) << ((pin-16) * 2); | ||
96 | } | ||
97 | } | ||
98 | |||
99 | EXPORT_SYMBOL(imx_gpio_mode); | ||
100 | |||
101 | int imx_gpio_request(unsigned gpio, const char *label) | ||
102 | { | ||
103 | if(gpio >= (GPIO_PORT_MAX + 1) * 32) { | ||
104 | printk(KERN_ERR "imx_gpio: Attempt to request nonexistent GPIO %d for \"%s\"\n", | ||
105 | gpio, label ? label : "?"); | ||
106 | return -EINVAL; | ||
107 | } | ||
108 | |||
109 | if(test_and_set_bit(gpio, imx_gpio_alloc_map)) { | ||
110 | printk(KERN_ERR "imx_gpio: GPIO %d already used. Allocation for \"%s\" failed\n", | ||
111 | gpio, label ? label : "?"); | ||
112 | return -EBUSY; | ||
113 | } | ||
114 | |||
115 | return 0; | ||
116 | } | ||
117 | |||
118 | EXPORT_SYMBOL(imx_gpio_request); | ||
119 | |||
120 | void imx_gpio_free(unsigned gpio) | ||
121 | { | ||
122 | if(gpio >= (GPIO_PORT_MAX + 1) * 32) | ||
123 | return; | ||
124 | |||
125 | clear_bit(gpio, imx_gpio_alloc_map); | ||
126 | } | ||
127 | |||
128 | EXPORT_SYMBOL(imx_gpio_free); | ||
129 | |||
130 | int imx_gpio_direction_input(unsigned gpio) | ||
131 | { | ||
132 | imx_gpio_mode(gpio | GPIO_IN | GPIO_GIUS | GPIO_DR); | ||
133 | return 0; | ||
134 | } | ||
135 | |||
136 | EXPORT_SYMBOL(imx_gpio_direction_input); | ||
137 | |||
138 | int imx_gpio_direction_output(unsigned gpio, int value) | ||
139 | { | ||
140 | imx_gpio_set_value(gpio, value); | ||
141 | imx_gpio_mode(gpio | GPIO_OUT | GPIO_GIUS | GPIO_DR); | ||
142 | return 0; | ||
143 | } | ||
144 | |||
145 | EXPORT_SYMBOL(imx_gpio_direction_output); | ||
146 | |||
147 | int imx_gpio_setup_multiple_pins(const int *pin_list, unsigned count, | ||
148 | int alloc_mode, const char *label) | ||
149 | { | ||
150 | const int *p = pin_list; | ||
151 | int i; | ||
152 | unsigned gpio; | ||
153 | unsigned mode; | ||
154 | |||
155 | for (i = 0; i < count; i++) { | ||
156 | gpio = *p & (GPIO_PIN_MASK | GPIO_PORT_MASK); | ||
157 | mode = *p & ~(GPIO_PIN_MASK | GPIO_PORT_MASK); | ||
158 | |||
159 | if (gpio >= (GPIO_PORT_MAX + 1) * 32) | ||
160 | goto setup_error; | ||
161 | |||
162 | if (alloc_mode & IMX_GPIO_ALLOC_MODE_RELEASE) | ||
163 | imx_gpio_free(gpio); | ||
164 | else if (!(alloc_mode & IMX_GPIO_ALLOC_MODE_NO_ALLOC)) | ||
165 | if (imx_gpio_request(gpio, label)) | ||
166 | if (!(alloc_mode & IMX_GPIO_ALLOC_MODE_TRY_ALLOC)) | ||
167 | goto setup_error; | ||
168 | |||
169 | if (!(alloc_mode & (IMX_GPIO_ALLOC_MODE_ALLOC_ONLY | | ||
170 | IMX_GPIO_ALLOC_MODE_RELEASE))) | ||
171 | imx_gpio_mode(gpio | mode); | ||
172 | |||
173 | p++; | ||
174 | } | ||
175 | return 0; | ||
176 | |||
177 | setup_error: | ||
178 | if(alloc_mode & (IMX_GPIO_ALLOC_MODE_NO_ALLOC | | ||
179 | IMX_GPIO_ALLOC_MODE_TRY_ALLOC)) | ||
180 | return -EINVAL; | ||
181 | |||
182 | while (p != pin_list) { | ||
183 | p--; | ||
184 | gpio = *p & (GPIO_PIN_MASK | GPIO_PORT_MASK); | ||
185 | imx_gpio_free(gpio); | ||
186 | } | ||
187 | |||
188 | return -EINVAL; | ||
189 | } | ||
190 | |||
191 | EXPORT_SYMBOL(imx_gpio_setup_multiple_pins); | ||
192 | |||
193 | void __imx_gpio_set_value(unsigned gpio, int value) | ||
194 | { | ||
195 | imx_gpio_set_value_inline(gpio, value); | ||
196 | } | ||
197 | |||
198 | EXPORT_SYMBOL(__imx_gpio_set_value); | ||
199 | |||
200 | int imx_gpio_to_irq(unsigned gpio) | ||
201 | { | ||
202 | return IRQ_GPIOA(0) + gpio; | ||
203 | } | ||
204 | |||
205 | EXPORT_SYMBOL(imx_gpio_to_irq); | ||
206 | |||
207 | int imx_irq_to_gpio(unsigned irq) | ||
208 | { | ||
209 | if (irq < IRQ_GPIOA(0)) | ||
210 | return -EINVAL; | ||
211 | return irq - IRQ_GPIOA(0); | ||
212 | } | ||
213 | |||
214 | EXPORT_SYMBOL(imx_irq_to_gpio); | ||
215 | |||
216 | static struct resource imx_mmc_resources[] = { | ||
217 | [0] = { | ||
218 | .start = 0x00214000, | ||
219 | .end = 0x002140FF, | ||
220 | .flags = IORESOURCE_MEM, | ||
221 | }, | ||
222 | [1] = { | ||
223 | .start = (SDHC_INT), | ||
224 | .end = (SDHC_INT), | ||
225 | .flags = IORESOURCE_IRQ, | ||
226 | }, | ||
227 | }; | ||
228 | |||
229 | static u64 imxmmmc_dmamask = 0xffffffffUL; | ||
230 | |||
231 | static struct platform_device imx_mmc_device = { | ||
232 | .name = "imx-mmc", | ||
233 | .id = 0, | ||
234 | .dev = { | ||
235 | .dma_mask = &imxmmmc_dmamask, | ||
236 | .coherent_dma_mask = 0xffffffff, | ||
237 | }, | ||
238 | .num_resources = ARRAY_SIZE(imx_mmc_resources), | ||
239 | .resource = imx_mmc_resources, | ||
240 | }; | ||
241 | |||
242 | void __init imx_set_mmc_info(struct imxmmc_platform_data *info) | ||
243 | { | ||
244 | imx_mmc_device.dev.platform_data = info; | ||
245 | } | ||
246 | |||
247 | static struct platform_device *devices[] __initdata = { | ||
248 | &imx_mmc_device, | ||
249 | }; | ||
250 | |||
251 | static struct map_desc imx_io_desc[] __initdata = { | ||
252 | { | ||
253 | .virtual = IMX_IO_BASE, | ||
254 | .pfn = __phys_to_pfn(IMX_IO_PHYS), | ||
255 | .length = IMX_IO_SIZE, | ||
256 | .type = MT_DEVICE | ||
257 | } | ||
258 | }; | ||
259 | |||
260 | void __init | ||
261 | imx_map_io(void) | ||
262 | { | ||
263 | iotable_init(imx_io_desc, ARRAY_SIZE(imx_io_desc)); | ||
264 | } | ||
265 | |||
266 | static int __init imx_init(void) | ||
267 | { | ||
268 | return platform_add_devices(devices, ARRAY_SIZE(devices)); | ||
269 | } | ||
270 | |||
271 | subsys_initcall(imx_init); | ||
diff --git a/arch/arm/mach-imx/generic.h b/arch/arm/mach-imx/generic.h deleted file mode 100644 index e91003e4bef3..000000000000 --- a/arch/arm/mach-imx/generic.h +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-imx/generic.h | ||
3 | * | ||
4 | * Author: Sascha Hauer <sascha@saschahauer.de> | ||
5 | * Copyright: Synertronixx GmbH | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | extern void __init imx_map_io(void); | ||
13 | extern void __init imx_init_irq(void); | ||
14 | |||
15 | struct sys_timer; | ||
16 | extern struct sys_timer imx_timer; | ||
diff --git a/arch/arm/mach-imx/include/mach/debug-macro.S b/arch/arm/mach-imx/include/mach/debug-macro.S deleted file mode 100644 index 87802bbfe633..000000000000 --- a/arch/arm/mach-imx/include/mach/debug-macro.S +++ /dev/null | |||
@@ -1,34 +0,0 @@ | |||
1 | /* arch/arm/mach-imx/include/mach/debug-macro.S | ||
2 | * | ||
3 | * Debugging macro include header | ||
4 | * | ||
5 | * Copyright (C) 1994-1999 Russell King | ||
6 | * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | * | ||
12 | */ | ||
13 | |||
14 | .macro addruart,rx | ||
15 | mrc p15, 0, \rx, c1, c0 | ||
16 | tst \rx, #1 @ MMU enabled? | ||
17 | moveq \rx, #0x00000000 @ physical | ||
18 | movne \rx, #0xe0000000 @ virtual | ||
19 | orreq \rx, \rx, #0x00200000 @ physical | ||
20 | orr \rx, \rx, #0x00006000 @ UART1 offset | ||
21 | .endm | ||
22 | |||
23 | .macro senduart,rd,rx | ||
24 | str \rd, [\rx, #0x40] @ TXDATA | ||
25 | .endm | ||
26 | |||
27 | .macro waituart,rd,rx | ||
28 | .endm | ||
29 | |||
30 | .macro busyuart,rd,rx | ||
31 | 1002: ldr \rd, [\rx, #0x98] @ SR2 | ||
32 | tst \rd, #1 << 3 @ TXDC | ||
33 | beq 1002b @ wait until transmit done | ||
34 | .endm | ||
diff --git a/arch/arm/mach-imx/include/mach/dma.h b/arch/arm/mach-imx/include/mach/dma.h deleted file mode 100644 index 621ff2c730f2..000000000000 --- a/arch/arm/mach-imx/include/mach/dma.h +++ /dev/null | |||
@@ -1,56 +0,0 @@ | |||
1 | /* | ||
2 | * linux/include/asm-arm/imxads/dma.h | ||
3 | * | ||
4 | * Copyright (C) 1997,1998 Russell King | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | |||
21 | #ifndef __ASM_ARCH_DMA_H | ||
22 | #define __ASM_ARCH_DMA_H | ||
23 | |||
24 | typedef enum { | ||
25 | DMA_PRIO_HIGH = 0, | ||
26 | DMA_PRIO_MEDIUM = 1, | ||
27 | DMA_PRIO_LOW = 2 | ||
28 | } imx_dma_prio; | ||
29 | |||
30 | #define DMA_REQ_UART3_T 2 | ||
31 | #define DMA_REQ_UART3_R 3 | ||
32 | #define DMA_REQ_SSI2_T 4 | ||
33 | #define DMA_REQ_SSI2_R 5 | ||
34 | #define DMA_REQ_CSI_STAT 6 | ||
35 | #define DMA_REQ_CSI_R 7 | ||
36 | #define DMA_REQ_MSHC 8 | ||
37 | #define DMA_REQ_DSPA_DCT_DOUT 9 | ||
38 | #define DMA_REQ_DSPA_DCT_DIN 10 | ||
39 | #define DMA_REQ_DSPA_MAC 11 | ||
40 | #define DMA_REQ_EXT 12 | ||
41 | #define DMA_REQ_SDHC 13 | ||
42 | #define DMA_REQ_SPI1_R 14 | ||
43 | #define DMA_REQ_SPI1_T 15 | ||
44 | #define DMA_REQ_SSI_T 16 | ||
45 | #define DMA_REQ_SSI_R 17 | ||
46 | #define DMA_REQ_ASP_DAC 18 | ||
47 | #define DMA_REQ_ASP_ADC 19 | ||
48 | #define DMA_REQ_USP_EP(x) (20+(x)) | ||
49 | #define DMA_REQ_SPI2_R 26 | ||
50 | #define DMA_REQ_SPI2_T 27 | ||
51 | #define DMA_REQ_UART2_T 28 | ||
52 | #define DMA_REQ_UART2_R 29 | ||
53 | #define DMA_REQ_UART1_T 30 | ||
54 | #define DMA_REQ_UART1_R 31 | ||
55 | |||
56 | #endif /* _ASM_ARCH_DMA_H */ | ||
diff --git a/arch/arm/mach-imx/include/mach/entry-macro.S b/arch/arm/mach-imx/include/mach/entry-macro.S deleted file mode 100644 index e4db679f7766..000000000000 --- a/arch/arm/mach-imx/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,32 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-imx/include/mach/entry-macro.S | ||
3 | * | ||
4 | * Low-level IRQ helper macros for iMX-based platforms | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | #include <mach/hardware.h> | ||
11 | |||
12 | .macro disable_fiq | ||
13 | .endm | ||
14 | |||
15 | .macro get_irqnr_preamble, base, tmp | ||
16 | .endm | ||
17 | |||
18 | .macro arch_ret_to_user, tmp1, tmp2 | ||
19 | .endm | ||
20 | |||
21 | #define AITC_NIVECSR 0x40 | ||
22 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | ||
23 | ldr \base, =IO_ADDRESS(IMX_AITC_BASE) | ||
24 | @ Load offset & priority of the highest priority | ||
25 | @ interrupt pending. | ||
26 | ldr \irqstat, [\base, #AITC_NIVECSR] | ||
27 | @ Shift off the priority leaving the offset or | ||
28 | @ "interrupt number", use arithmetic shift to | ||
29 | @ transform illegal source (0xffff) as -1 | ||
30 | mov \irqnr, \irqstat, asr #16 | ||
31 | adds \tmp, \irqnr, #1 | ||
32 | .endm | ||
diff --git a/arch/arm/mach-imx/include/mach/gpio.h b/arch/arm/mach-imx/include/mach/gpio.h deleted file mode 100644 index 6c2942f82922..000000000000 --- a/arch/arm/mach-imx/include/mach/gpio.h +++ /dev/null | |||
@@ -1,106 +0,0 @@ | |||
1 | #ifndef _IMX_GPIO_H | ||
2 | |||
3 | #include <linux/kernel.h> | ||
4 | #include <mach/hardware.h> | ||
5 | #include <mach/imx-regs.h> | ||
6 | |||
7 | #define IMX_GPIO_ALLOC_MODE_NORMAL 0 | ||
8 | #define IMX_GPIO_ALLOC_MODE_NO_ALLOC 1 | ||
9 | #define IMX_GPIO_ALLOC_MODE_TRY_ALLOC 2 | ||
10 | #define IMX_GPIO_ALLOC_MODE_ALLOC_ONLY 4 | ||
11 | #define IMX_GPIO_ALLOC_MODE_RELEASE 8 | ||
12 | |||
13 | extern int imx_gpio_request(unsigned gpio, const char *label); | ||
14 | |||
15 | extern void imx_gpio_free(unsigned gpio); | ||
16 | |||
17 | extern int imx_gpio_setup_multiple_pins(const int *pin_list, unsigned count, | ||
18 | int alloc_mode, const char *label); | ||
19 | |||
20 | extern int imx_gpio_direction_input(unsigned gpio); | ||
21 | |||
22 | extern int imx_gpio_direction_output(unsigned gpio, int value); | ||
23 | |||
24 | extern void __imx_gpio_set_value(unsigned gpio, int value); | ||
25 | |||
26 | static inline int imx_gpio_get_value(unsigned gpio) | ||
27 | { | ||
28 | return SSR(gpio >> GPIO_PORT_SHIFT) & (1 << (gpio & GPIO_PIN_MASK)); | ||
29 | } | ||
30 | |||
31 | static inline void imx_gpio_set_value_inline(unsigned gpio, int value) | ||
32 | { | ||
33 | unsigned long flags; | ||
34 | |||
35 | raw_local_irq_save(flags); | ||
36 | if(value) | ||
37 | DR(gpio >> GPIO_PORT_SHIFT) |= (1 << (gpio & GPIO_PIN_MASK)); | ||
38 | else | ||
39 | DR(gpio >> GPIO_PORT_SHIFT) &= ~(1 << (gpio & GPIO_PIN_MASK)); | ||
40 | raw_local_irq_restore(flags); | ||
41 | } | ||
42 | |||
43 | static inline void imx_gpio_set_value(unsigned gpio, int value) | ||
44 | { | ||
45 | if(__builtin_constant_p(gpio)) | ||
46 | imx_gpio_set_value_inline(gpio, value); | ||
47 | else | ||
48 | __imx_gpio_set_value(gpio, value); | ||
49 | } | ||
50 | |||
51 | extern int imx_gpio_to_irq(unsigned gpio); | ||
52 | |||
53 | extern int imx_irq_to_gpio(unsigned irq); | ||
54 | |||
55 | /*-------------------------------------------------------------------------*/ | ||
56 | |||
57 | /* Wrappers for "new style" GPIO calls. These calls i.MX specific versions | ||
58 | * to allow future extension of GPIO logic. | ||
59 | */ | ||
60 | |||
61 | static inline int gpio_request(unsigned gpio, const char *label) | ||
62 | { | ||
63 | return imx_gpio_request(gpio, label); | ||
64 | } | ||
65 | |||
66 | static inline void gpio_free(unsigned gpio) | ||
67 | { | ||
68 | might_sleep(); | ||
69 | |||
70 | imx_gpio_free(gpio); | ||
71 | } | ||
72 | |||
73 | static inline int gpio_direction_input(unsigned gpio) | ||
74 | { | ||
75 | return imx_gpio_direction_input(gpio); | ||
76 | } | ||
77 | |||
78 | static inline int gpio_direction_output(unsigned gpio, int value) | ||
79 | { | ||
80 | return imx_gpio_direction_output(gpio, value); | ||
81 | } | ||
82 | |||
83 | static inline int gpio_get_value(unsigned gpio) | ||
84 | { | ||
85 | return imx_gpio_get_value(gpio); | ||
86 | } | ||
87 | |||
88 | static inline void gpio_set_value(unsigned gpio, int value) | ||
89 | { | ||
90 | imx_gpio_set_value(gpio, value); | ||
91 | } | ||
92 | |||
93 | #include <asm-generic/gpio.h> /* cansleep wrappers */ | ||
94 | |||
95 | static inline int gpio_to_irq(unsigned gpio) | ||
96 | { | ||
97 | return imx_gpio_to_irq(gpio); | ||
98 | } | ||
99 | |||
100 | static inline int irq_to_gpio(unsigned irq) | ||
101 | { | ||
102 | return imx_irq_to_gpio(irq); | ||
103 | } | ||
104 | |||
105 | |||
106 | #endif | ||
diff --git a/arch/arm/mach-imx/include/mach/hardware.h b/arch/arm/mach-imx/include/mach/hardware.h deleted file mode 100644 index c73e9e724c75..000000000000 --- a/arch/arm/mach-imx/include/mach/hardware.h +++ /dev/null | |||
@@ -1,91 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-imx/include/mach/hardware.h | ||
3 | * | ||
4 | * Copyright (C) 1999 ARM Limited. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | #ifndef __ASM_ARCH_HARDWARE_H | ||
21 | #define __ASM_ARCH_HARDWARE_H | ||
22 | |||
23 | #include <asm/sizes.h> | ||
24 | #include "imx-regs.h" | ||
25 | |||
26 | #ifndef __ASSEMBLY__ | ||
27 | # define __REG(x) (*((volatile u32 *)IO_ADDRESS(x))) | ||
28 | |||
29 | # define __REG2(x,y) (*(volatile u32 *)((u32)&__REG(x) + (y))) | ||
30 | #endif | ||
31 | |||
32 | /* | ||
33 | * Memory map | ||
34 | */ | ||
35 | |||
36 | #define IMX_IO_PHYS 0x00200000 | ||
37 | #define IMX_IO_SIZE 0x00100000 | ||
38 | #define IMX_IO_BASE 0xe0000000 | ||
39 | |||
40 | #define IMX_CS0_PHYS 0x10000000 | ||
41 | #define IMX_CS0_SIZE 0x02000000 | ||
42 | #define IMX_CS0_VIRT 0xe8000000 | ||
43 | |||
44 | #define IMX_CS1_PHYS 0x12000000 | ||
45 | #define IMX_CS1_SIZE 0x01000000 | ||
46 | #define IMX_CS1_VIRT 0xea000000 | ||
47 | |||
48 | #define IMX_CS2_PHYS 0x13000000 | ||
49 | #define IMX_CS2_SIZE 0x01000000 | ||
50 | #define IMX_CS2_VIRT 0xeb000000 | ||
51 | |||
52 | #define IMX_CS3_PHYS 0x14000000 | ||
53 | #define IMX_CS3_SIZE 0x01000000 | ||
54 | #define IMX_CS3_VIRT 0xec000000 | ||
55 | |||
56 | #define IMX_CS4_PHYS 0x15000000 | ||
57 | #define IMX_CS4_SIZE 0x01000000 | ||
58 | #define IMX_CS4_VIRT 0xed000000 | ||
59 | |||
60 | #define IMX_CS5_PHYS 0x16000000 | ||
61 | #define IMX_CS5_SIZE 0x01000000 | ||
62 | #define IMX_CS5_VIRT 0xee000000 | ||
63 | |||
64 | #define IMX_FB_VIRT 0xF1000000 | ||
65 | #define IMX_FB_SIZE (256*1024) | ||
66 | |||
67 | /* macro to get at IO space when running virtually */ | ||
68 | #define IO_ADDRESS(x) ((x) | IMX_IO_BASE) | ||
69 | |||
70 | #ifndef __ASSEMBLY__ | ||
71 | /* | ||
72 | * Handy routine to set GPIO functions | ||
73 | */ | ||
74 | extern void imx_gpio_mode( int gpio_mode ); | ||
75 | |||
76 | #endif | ||
77 | |||
78 | #define MAXIRQNUM 62 | ||
79 | #define MAXFIQNUM 62 | ||
80 | #define MAXSWINUM 62 | ||
81 | |||
82 | /* | ||
83 | * Use SDRAM for memory | ||
84 | */ | ||
85 | #define MEM_SIZE 0x01000000 | ||
86 | |||
87 | #ifdef CONFIG_ARCH_MX1ADS | ||
88 | #include "mx1ads.h" | ||
89 | #endif | ||
90 | |||
91 | #endif | ||
diff --git a/arch/arm/mach-imx/include/mach/imx-dma.h b/arch/arm/mach-imx/include/mach/imx-dma.h deleted file mode 100644 index bbe54df7f0de..000000000000 --- a/arch/arm/mach-imx/include/mach/imx-dma.h +++ /dev/null | |||
@@ -1,98 +0,0 @@ | |||
1 | /* | ||
2 | * linux/include/asm-arm/imxads/dma.h | ||
3 | * | ||
4 | * Copyright (C) 1997,1998 Russell King | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | |||
21 | #include <mach/dma.h> | ||
22 | |||
23 | #ifndef __ASM_ARCH_IMX_DMA_H | ||
24 | #define __ASM_ARCH_IMX_DMA_H | ||
25 | |||
26 | #define IMX_DMA_CHANNELS 11 | ||
27 | |||
28 | /* | ||
29 | * struct imx_dma_channel - i.MX specific DMA extension | ||
30 | * @name: name specified by DMA client | ||
31 | * @irq_handler: client callback for end of transfer | ||
32 | * @err_handler: client callback for error condition | ||
33 | * @data: clients context data for callbacks | ||
34 | * @dma_mode: direction of the transfer %DMA_MODE_READ or %DMA_MODE_WRITE | ||
35 | * @sg: pointer to the actual read/written chunk for scatter-gather emulation | ||
36 | * @sgbc: counter of processed bytes in the actual read/written chunk | ||
37 | * @resbytes: total residual number of bytes to transfer | ||
38 | * (it can be lower or same as sum of SG mapped chunk sizes) | ||
39 | * @sgcount: number of chunks to be read/written | ||
40 | * | ||
41 | * Structure is used for IMX DMA processing. It would be probably good | ||
42 | * @struct dma_struct in the future for external interfacing and use | ||
43 | * @struct imx_dma_channel only as extension to it. | ||
44 | */ | ||
45 | |||
46 | struct imx_dma_channel { | ||
47 | const char *name; | ||
48 | void (*irq_handler) (int, void *); | ||
49 | void (*err_handler) (int, void *, int errcode); | ||
50 | void *data; | ||
51 | unsigned int dma_mode; | ||
52 | struct scatterlist *sg; | ||
53 | unsigned int sgbc; | ||
54 | unsigned int sgcount; | ||
55 | unsigned int resbytes; | ||
56 | int dma_num; | ||
57 | }; | ||
58 | |||
59 | extern struct imx_dma_channel imx_dma_channels[IMX_DMA_CHANNELS]; | ||
60 | |||
61 | #define IMX_DMA_ERR_BURST 1 | ||
62 | #define IMX_DMA_ERR_REQUEST 2 | ||
63 | #define IMX_DMA_ERR_TRANSFER 4 | ||
64 | #define IMX_DMA_ERR_BUFFER 8 | ||
65 | |||
66 | /* The type to distinguish channel numbers parameter from ordinal int type */ | ||
67 | typedef int imx_dmach_t; | ||
68 | |||
69 | #define DMA_MODE_READ 0 | ||
70 | #define DMA_MODE_WRITE 1 | ||
71 | #define DMA_MODE_MASK 1 | ||
72 | |||
73 | int | ||
74 | imx_dma_setup_single(imx_dmach_t dma_ch, dma_addr_t dma_address, | ||
75 | unsigned int dma_length, unsigned int dev_addr, unsigned int dmamode); | ||
76 | |||
77 | int | ||
78 | imx_dma_setup_sg(imx_dmach_t dma_ch, | ||
79 | struct scatterlist *sg, unsigned int sgcount, unsigned int dma_length, | ||
80 | unsigned int dev_addr, unsigned int dmamode); | ||
81 | |||
82 | int | ||
83 | imx_dma_setup_handlers(imx_dmach_t dma_ch, | ||
84 | void (*irq_handler) (int, void *), | ||
85 | void (*err_handler) (int, void *, int), void *data); | ||
86 | |||
87 | void imx_dma_enable(imx_dmach_t dma_ch); | ||
88 | |||
89 | void imx_dma_disable(imx_dmach_t dma_ch); | ||
90 | |||
91 | int imx_dma_request(imx_dmach_t dma_ch, const char *name); | ||
92 | |||
93 | void imx_dma_free(imx_dmach_t dma_ch); | ||
94 | |||
95 | imx_dmach_t imx_dma_request_by_prio(const char *name, imx_dma_prio prio); | ||
96 | |||
97 | |||
98 | #endif /* _ASM_ARCH_IMX_DMA_H */ | ||
diff --git a/arch/arm/mach-imx/include/mach/imx-regs.h b/arch/arm/mach-imx/include/mach/imx-regs.h deleted file mode 100644 index 490297fc0e38..000000000000 --- a/arch/arm/mach-imx/include/mach/imx-regs.h +++ /dev/null | |||
@@ -1,376 +0,0 @@ | |||
1 | #ifndef _IMX_REGS_H | ||
2 | #define _IMX_REGS_H | ||
3 | /* ------------------------------------------------------------------------ | ||
4 | * Motorola IMX system registers | ||
5 | * ------------------------------------------------------------------------ | ||
6 | * | ||
7 | */ | ||
8 | |||
9 | /* | ||
10 | * Register BASEs, based on OFFSETs | ||
11 | * | ||
12 | */ | ||
13 | #define IMX_AIPI1_BASE (0x00000 + IMX_IO_BASE) | ||
14 | #define IMX_WDT_BASE (0x01000 + IMX_IO_BASE) | ||
15 | #define IMX_TIM1_BASE (0x02000 + IMX_IO_BASE) | ||
16 | #define IMX_TIM2_BASE (0x03000 + IMX_IO_BASE) | ||
17 | #define IMX_RTC_BASE (0x04000 + IMX_IO_BASE) | ||
18 | #define IMX_LCDC_BASE (0x05000 + IMX_IO_BASE) | ||
19 | #define IMX_UART1_BASE (0x06000 + IMX_IO_BASE) | ||
20 | #define IMX_UART2_BASE (0x07000 + IMX_IO_BASE) | ||
21 | #define IMX_PWM_BASE (0x08000 + IMX_IO_BASE) | ||
22 | #define IMX_DMAC_BASE (0x09000 + IMX_IO_BASE) | ||
23 | #define IMX_AIPI2_BASE (0x10000 + IMX_IO_BASE) | ||
24 | #define IMX_SIM_BASE (0x11000 + IMX_IO_BASE) | ||
25 | #define IMX_USBD_BASE (0x12000 + IMX_IO_BASE) | ||
26 | #define IMX_SPI1_BASE (0x13000 + IMX_IO_BASE) | ||
27 | #define IMX_MMC_BASE (0x14000 + IMX_IO_BASE) | ||
28 | #define IMX_ASP_BASE (0x15000 + IMX_IO_BASE) | ||
29 | #define IMX_BTA_BASE (0x16000 + IMX_IO_BASE) | ||
30 | #define IMX_I2C_BASE (0x17000 + IMX_IO_BASE) | ||
31 | #define IMX_SSI_BASE (0x18000 + IMX_IO_BASE) | ||
32 | #define IMX_SPI2_BASE (0x19000 + IMX_IO_BASE) | ||
33 | #define IMX_MSHC_BASE (0x1A000 + IMX_IO_BASE) | ||
34 | #define IMX_PLL_BASE (0x1B000 + IMX_IO_BASE) | ||
35 | #define IMX_GPIO_BASE (0x1C000 + IMX_IO_BASE) | ||
36 | #define IMX_EIM_BASE (0x20000 + IMX_IO_BASE) | ||
37 | #define IMX_SDRAMC_BASE (0x21000 + IMX_IO_BASE) | ||
38 | #define IMX_MMA_BASE (0x22000 + IMX_IO_BASE) | ||
39 | #define IMX_AITC_BASE (0x23000 + IMX_IO_BASE) | ||
40 | #define IMX_CSI_BASE (0x24000 + IMX_IO_BASE) | ||
41 | |||
42 | /* PLL registers */ | ||
43 | #define CSCR __REG(IMX_PLL_BASE) /* Clock Source Control Register */ | ||
44 | #define CSCR_SPLL_RESTART (1<<22) | ||
45 | #define CSCR_MPLL_RESTART (1<<21) | ||
46 | #define CSCR_SYSTEM_SEL (1<<16) | ||
47 | #define CSCR_BCLK_DIV (0xf<<10) | ||
48 | #define CSCR_MPU_PRESC (1<<15) | ||
49 | #define CSCR_SPEN (1<<1) | ||
50 | #define CSCR_MPEN (1<<0) | ||
51 | |||
52 | #define MPCTL0 __REG(IMX_PLL_BASE + 0x4) /* MCU PLL Control Register 0 */ | ||
53 | #define MPCTL1 __REG(IMX_PLL_BASE + 0x8) /* MCU PLL and System Clock Register 1 */ | ||
54 | #define SPCTL0 __REG(IMX_PLL_BASE + 0xc) /* System PLL Control Register 0 */ | ||
55 | #define SPCTL1 __REG(IMX_PLL_BASE + 0x10) /* System PLL Control Register 1 */ | ||
56 | #define PCDR __REG(IMX_PLL_BASE + 0x20) /* Peripheral Clock Divider Register */ | ||
57 | |||
58 | /* | ||
59 | * GPIO Module and I/O Multiplexer | ||
60 | * x = 0..3 for reg_A, reg_B, reg_C, reg_D | ||
61 | */ | ||
62 | #define DDIR(x) __REG2(IMX_GPIO_BASE + 0x00, ((x) & 3) << 8) | ||
63 | #define OCR1(x) __REG2(IMX_GPIO_BASE + 0x04, ((x) & 3) << 8) | ||
64 | #define OCR2(x) __REG2(IMX_GPIO_BASE + 0x08, ((x) & 3) << 8) | ||
65 | #define ICONFA1(x) __REG2(IMX_GPIO_BASE + 0x0c, ((x) & 3) << 8) | ||
66 | #define ICONFA2(x) __REG2(IMX_GPIO_BASE + 0x10, ((x) & 3) << 8) | ||
67 | #define ICONFB1(x) __REG2(IMX_GPIO_BASE + 0x14, ((x) & 3) << 8) | ||
68 | #define ICONFB2(x) __REG2(IMX_GPIO_BASE + 0x18, ((x) & 3) << 8) | ||
69 | #define DR(x) __REG2(IMX_GPIO_BASE + 0x1c, ((x) & 3) << 8) | ||
70 | #define GIUS(x) __REG2(IMX_GPIO_BASE + 0x20, ((x) & 3) << 8) | ||
71 | #define SSR(x) __REG2(IMX_GPIO_BASE + 0x24, ((x) & 3) << 8) | ||
72 | #define ICR1(x) __REG2(IMX_GPIO_BASE + 0x28, ((x) & 3) << 8) | ||
73 | #define ICR2(x) __REG2(IMX_GPIO_BASE + 0x2c, ((x) & 3) << 8) | ||
74 | #define IMR(x) __REG2(IMX_GPIO_BASE + 0x30, ((x) & 3) << 8) | ||
75 | #define ISR(x) __REG2(IMX_GPIO_BASE + 0x34, ((x) & 3) << 8) | ||
76 | #define GPR(x) __REG2(IMX_GPIO_BASE + 0x38, ((x) & 3) << 8) | ||
77 | #define SWR(x) __REG2(IMX_GPIO_BASE + 0x3c, ((x) & 3) << 8) | ||
78 | #define PUEN(x) __REG2(IMX_GPIO_BASE + 0x40, ((x) & 3) << 8) | ||
79 | |||
80 | #define GPIO_PORT_MAX 3 | ||
81 | |||
82 | #define GPIO_PIN_MASK 0x1f | ||
83 | #define GPIO_PORT_MASK (0x3 << 5) | ||
84 | |||
85 | #define GPIO_PORT_SHIFT 5 | ||
86 | #define GPIO_PORTA (0<<5) | ||
87 | #define GPIO_PORTB (1<<5) | ||
88 | #define GPIO_PORTC (2<<5) | ||
89 | #define GPIO_PORTD (3<<5) | ||
90 | |||
91 | #define GPIO_OUT (1<<7) | ||
92 | #define GPIO_IN (0<<7) | ||
93 | #define GPIO_PUEN (1<<8) | ||
94 | |||
95 | #define GPIO_PF (0<<9) | ||
96 | #define GPIO_AF (1<<9) | ||
97 | |||
98 | #define GPIO_OCR_SHIFT 10 | ||
99 | #define GPIO_OCR_MASK (3<<10) | ||
100 | #define GPIO_AIN (0<<10) | ||
101 | #define GPIO_BIN (1<<10) | ||
102 | #define GPIO_CIN (2<<10) | ||
103 | #define GPIO_DR (3<<10) | ||
104 | |||
105 | #define GPIO_AOUT_SHIFT 12 | ||
106 | #define GPIO_AOUT_MASK (3<<12) | ||
107 | #define GPIO_AOUT (0<<12) | ||
108 | #define GPIO_AOUT_ISR (1<<12) | ||
109 | #define GPIO_AOUT_0 (2<<12) | ||
110 | #define GPIO_AOUT_1 (3<<12) | ||
111 | |||
112 | #define GPIO_BOUT_SHIFT 14 | ||
113 | #define GPIO_BOUT_MASK (3<<14) | ||
114 | #define GPIO_BOUT (0<<14) | ||
115 | #define GPIO_BOUT_ISR (1<<14) | ||
116 | #define GPIO_BOUT_0 (2<<14) | ||
117 | #define GPIO_BOUT_1 (3<<14) | ||
118 | |||
119 | #define GPIO_GIUS (1<<16) | ||
120 | |||
121 | /* assignements for GPIO alternate/primary functions */ | ||
122 | |||
123 | /* FIXME: This list is not completed. The correct directions are | ||
124 | * missing on some (many) pins | ||
125 | */ | ||
126 | #define PA0_AIN_SPI2_CLK ( GPIO_GIUS | GPIO_PORTA | GPIO_OUT | 0 ) | ||
127 | #define PA0_AF_ETMTRACESYNC ( GPIO_PORTA | GPIO_AF | 0 ) | ||
128 | #define PA1_AOUT_SPI2_RXD ( GPIO_GIUS | GPIO_PORTA | GPIO_IN | 1 ) | ||
129 | #define PA1_PF_TIN ( GPIO_PORTA | GPIO_PF | 1 ) | ||
130 | #define PA2_PF_PWM0 ( GPIO_PORTA | GPIO_OUT | GPIO_PF | 2 ) | ||
131 | #define PA3_PF_CSI_MCLK ( GPIO_PORTA | GPIO_PF | 3 ) | ||
132 | #define PA4_PF_CSI_D0 ( GPIO_PORTA | GPIO_PF | 4 ) | ||
133 | #define PA5_PF_CSI_D1 ( GPIO_PORTA | GPIO_PF | 5 ) | ||
134 | #define PA6_PF_CSI_D2 ( GPIO_PORTA | GPIO_PF | 6 ) | ||
135 | #define PA7_PF_CSI_D3 ( GPIO_PORTA | GPIO_PF | 7 ) | ||
136 | #define PA8_PF_CSI_D4 ( GPIO_PORTA | GPIO_PF | 8 ) | ||
137 | #define PA9_PF_CSI_D5 ( GPIO_PORTA | GPIO_PF | 9 ) | ||
138 | #define PA10_PF_CSI_D6 ( GPIO_PORTA | GPIO_PF | 10 ) | ||
139 | #define PA11_PF_CSI_D7 ( GPIO_PORTA | GPIO_PF | 11 ) | ||
140 | #define PA12_PF_CSI_VSYNC ( GPIO_PORTA | GPIO_PF | 12 ) | ||
141 | #define PA13_PF_CSI_HSYNC ( GPIO_PORTA | GPIO_PF | 13 ) | ||
142 | #define PA14_PF_CSI_PIXCLK ( GPIO_PORTA | GPIO_PF | 14 ) | ||
143 | #define PA15_PF_I2C_SDA ( GPIO_PORTA | GPIO_OUT | GPIO_PF | 15 ) | ||
144 | #define PA16_PF_I2C_SCL ( GPIO_PORTA | GPIO_OUT | GPIO_PF | 16 ) | ||
145 | #define PA17_AF_ETMTRACEPKT4 ( GPIO_PORTA | GPIO_AF | 17 ) | ||
146 | #define PA17_AIN_SPI2_SS ( GPIO_GIUS | GPIO_PORTA | GPIO_OUT | 17 ) | ||
147 | #define PA18_AF_ETMTRACEPKT5 ( GPIO_PORTA | GPIO_AF | 18 ) | ||
148 | #define PA19_AF_ETMTRACEPKT6 ( GPIO_PORTA | GPIO_AF | 19 ) | ||
149 | #define PA20_AF_ETMTRACEPKT7 ( GPIO_PORTA | GPIO_AF | 20 ) | ||
150 | #define PA21_PF_A0 ( GPIO_PORTA | GPIO_PF | 21 ) | ||
151 | #define PA22_PF_CS4 ( GPIO_PORTA | GPIO_PF | 22 ) | ||
152 | #define PA23_PF_CS5 ( GPIO_PORTA | GPIO_PF | 23 ) | ||
153 | #define PA24_PF_A16 ( GPIO_PORTA | GPIO_PF | 24 ) | ||
154 | #define PA24_AF_ETMTRACEPKT0 ( GPIO_PORTA | GPIO_AF | 24 ) | ||
155 | #define PA25_PF_A17 ( GPIO_PORTA | GPIO_PF | 25 ) | ||
156 | #define PA25_AF_ETMTRACEPKT1 ( GPIO_PORTA | GPIO_AF | 25 ) | ||
157 | #define PA26_PF_A18 ( GPIO_PORTA | GPIO_PF | 26 ) | ||
158 | #define PA26_AF_ETMTRACEPKT2 ( GPIO_PORTA | GPIO_AF | 26 ) | ||
159 | #define PA27_PF_A19 ( GPIO_PORTA | GPIO_PF | 27 ) | ||
160 | #define PA27_AF_ETMTRACEPKT3 ( GPIO_PORTA | GPIO_AF | 27 ) | ||
161 | #define PA28_PF_A20 ( GPIO_PORTA | GPIO_PF | 28 ) | ||
162 | #define PA28_AF_ETMPIPESTAT0 ( GPIO_PORTA | GPIO_AF | 28 ) | ||
163 | #define PA29_PF_A21 ( GPIO_PORTA | GPIO_PF | 29 ) | ||
164 | #define PA29_AF_ETMPIPESTAT1 ( GPIO_PORTA | GPIO_AF | 29 ) | ||
165 | #define PA30_PF_A22 ( GPIO_PORTA | GPIO_PF | 30 ) | ||
166 | #define PA30_AF_ETMPIPESTAT2 ( GPIO_PORTA | GPIO_AF | 30 ) | ||
167 | #define PA31_PF_A23 ( GPIO_PORTA | GPIO_PF | 31 ) | ||
168 | #define PA31_AF_ETMTRACECLK ( GPIO_PORTA | GPIO_AF | 31 ) | ||
169 | #define PB8_PF_SD_DAT0 ( GPIO_PORTB | GPIO_PF | GPIO_PUEN | 8 ) | ||
170 | #define PB8_AF_MS_PIO ( GPIO_PORTB | GPIO_AF | 8 ) | ||
171 | #define PB9_PF_SD_DAT1 ( GPIO_PORTB | GPIO_PF | GPIO_PUEN | 9 ) | ||
172 | #define PB9_AF_MS_PI1 ( GPIO_PORTB | GPIO_AF | 9 ) | ||
173 | #define PB10_PF_SD_DAT2 ( GPIO_PORTB | GPIO_PF | GPIO_PUEN | 10 ) | ||
174 | #define PB10_AF_MS_SCLKI ( GPIO_PORTB | GPIO_AF | 10 ) | ||
175 | #define PB11_PF_SD_DAT3 ( GPIO_PORTB | GPIO_PF | 11 ) | ||
176 | #define PB11_AF_MS_SDIO ( GPIO_PORTB | GPIO_AF | 11 ) | ||
177 | #define PB12_PF_SD_CLK ( GPIO_PORTB | GPIO_PF | 12 ) | ||
178 | #define PB12_AF_MS_SCLK0 ( GPIO_PORTB | GPIO_AF | 12 ) | ||
179 | #define PB13_PF_SD_CMD ( GPIO_PORTB | GPIO_PF | GPIO_PUEN | 13 ) | ||
180 | #define PB13_AF_MS_BS ( GPIO_PORTB | GPIO_AF | 13 ) | ||
181 | #define PB14_AF_SSI_RXFS ( GPIO_PORTB | GPIO_AF | 14 ) | ||
182 | #define PB15_AF_SSI_RXCLK ( GPIO_PORTB | GPIO_AF | 15 ) | ||
183 | #define PB16_AF_SSI_RXDAT ( GPIO_PORTB | GPIO_IN | GPIO_AF | 16 ) | ||
184 | #define PB17_AF_SSI_TXDAT ( GPIO_PORTB | GPIO_OUT | GPIO_AF | 17 ) | ||
185 | #define PB18_AF_SSI_TXFS ( GPIO_PORTB | GPIO_AF | 18 ) | ||
186 | #define PB19_AF_SSI_TXCLK ( GPIO_PORTB | GPIO_AF | 19 ) | ||
187 | #define PB20_PF_USBD_AFE ( GPIO_PORTB | GPIO_PF | 20 ) | ||
188 | #define PB21_PF_USBD_OE ( GPIO_PORTB | GPIO_PF | 21 ) | ||
189 | #define PB22_PFUSBD_RCV ( GPIO_PORTB | GPIO_PF | 22 ) | ||
190 | #define PB23_PF_USBD_SUSPND ( GPIO_PORTB | GPIO_PF | 23 ) | ||
191 | #define PB24_PF_USBD_VP ( GPIO_PORTB | GPIO_PF | 24 ) | ||
192 | #define PB25_PF_USBD_VM ( GPIO_PORTB | GPIO_PF | 25 ) | ||
193 | #define PB26_PF_USBD_VPO ( GPIO_PORTB | GPIO_PF | 26 ) | ||
194 | #define PB27_PF_USBD_VMO ( GPIO_PORTB | GPIO_PF | 27 ) | ||
195 | #define PB28_PF_UART2_CTS ( GPIO_PORTB | GPIO_OUT | GPIO_PF | 28 ) | ||
196 | #define PB29_PF_UART2_RTS ( GPIO_PORTB | GPIO_IN | GPIO_PF | 29 ) | ||
197 | #define PB30_PF_UART2_TXD ( GPIO_PORTB | GPIO_OUT | GPIO_PF | 30 ) | ||
198 | #define PB31_PF_UART2_RXD ( GPIO_PORTB | GPIO_IN | GPIO_PF | 31 ) | ||
199 | #define PC3_PF_SSI_RXFS ( GPIO_PORTC | GPIO_PF | 3 ) | ||
200 | #define PC4_PF_SSI_RXCLK ( GPIO_PORTC | GPIO_PF | 4 ) | ||
201 | #define PC5_PF_SSI_RXDAT ( GPIO_PORTC | GPIO_IN | GPIO_PF | 5 ) | ||
202 | #define PC6_PF_SSI_TXDAT ( GPIO_PORTC | GPIO_OUT | GPIO_PF | 6 ) | ||
203 | #define PC7_PF_SSI_TXFS ( GPIO_PORTC | GPIO_PF | 7 ) | ||
204 | #define PC8_PF_SSI_TXCLK ( GPIO_PORTC | GPIO_PF | 8 ) | ||
205 | #define PC9_PF_UART1_CTS ( GPIO_PORTC | GPIO_OUT | GPIO_PF | 9 ) | ||
206 | #define PC10_PF_UART1_RTS ( GPIO_PORTC | GPIO_IN | GPIO_PF | 10 ) | ||
207 | #define PC11_PF_UART1_TXD ( GPIO_PORTC | GPIO_OUT | GPIO_PF | 11 ) | ||
208 | #define PC12_PF_UART1_RXD ( GPIO_PORTC | GPIO_IN | GPIO_PF | 12 ) | ||
209 | #define PC13_PF_SPI1_SPI_RDY ( GPIO_PORTC | GPIO_PF | 13 ) | ||
210 | #define PC14_PF_SPI1_SCLK ( GPIO_PORTC | GPIO_PF | 14 ) | ||
211 | #define PC15_PF_SPI1_SS ( GPIO_PORTC | GPIO_PF | 15 ) | ||
212 | #define PC16_PF_SPI1_MISO ( GPIO_PORTC | GPIO_PF | 16 ) | ||
213 | #define PC17_PF_SPI1_MOSI ( GPIO_PORTC | GPIO_PF | 17 ) | ||
214 | #define PC24_BIN_UART3_RI ( GPIO_GIUS | GPIO_PORTC | GPIO_OUT | GPIO_BIN | 24 ) | ||
215 | #define PC25_BIN_UART3_DSR ( GPIO_GIUS | GPIO_PORTC | GPIO_OUT | GPIO_BIN | 25 ) | ||
216 | #define PC26_AOUT_UART3_DTR ( GPIO_GIUS | GPIO_PORTC | GPIO_IN | 26 ) | ||
217 | #define PC27_BIN_UART3_DCD ( GPIO_GIUS | GPIO_PORTC | GPIO_OUT | GPIO_BIN | 27 ) | ||
218 | #define PC28_BIN_UART3_CTS ( GPIO_GIUS | GPIO_PORTC | GPIO_OUT | GPIO_BIN | 28 ) | ||
219 | #define PC29_AOUT_UART3_RTS ( GPIO_GIUS | GPIO_PORTC | GPIO_IN | 29 ) | ||
220 | #define PC30_BIN_UART3_TX ( GPIO_GIUS | GPIO_PORTC | GPIO_BIN | 30 ) | ||
221 | #define PC31_AOUT_UART3_RX ( GPIO_GIUS | GPIO_PORTC | GPIO_IN | 31) | ||
222 | #define PD6_PF_LSCLK ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 6 ) | ||
223 | #define PD7_PF_REV ( GPIO_PORTD | GPIO_PF | 7 ) | ||
224 | #define PD7_AF_UART2_DTR ( GPIO_GIUS | GPIO_PORTD | GPIO_IN | GPIO_AF | 7 ) | ||
225 | #define PD7_AIN_SPI2_SCLK ( GPIO_GIUS | GPIO_PORTD | GPIO_AIN | 7 ) | ||
226 | #define PD8_PF_CLS ( GPIO_PORTD | GPIO_PF | 8 ) | ||
227 | #define PD8_AF_UART2_DCD ( GPIO_PORTD | GPIO_OUT | GPIO_AF | 8 ) | ||
228 | #define PD8_AIN_SPI2_SS ( GPIO_GIUS | GPIO_PORTD | GPIO_AIN | 8 ) | ||
229 | #define PD9_PF_PS ( GPIO_PORTD | GPIO_PF | 9 ) | ||
230 | #define PD9_AF_UART2_RI ( GPIO_PORTD | GPIO_OUT | GPIO_AF | 9 ) | ||
231 | #define PD9_AOUT_SPI2_RXD ( GPIO_GIUS | GPIO_PORTD | GPIO_IN | 9 ) | ||
232 | #define PD10_PF_SPL_SPR ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 10 ) | ||
233 | #define PD10_AF_UART2_DSR ( GPIO_PORTD | GPIO_OUT | GPIO_AF | 10 ) | ||
234 | #define PD10_AIN_SPI2_TXD ( GPIO_GIUS | GPIO_PORTD | GPIO_OUT | 10 ) | ||
235 | #define PD11_PF_CONTRAST ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 11 ) | ||
236 | #define PD12_PF_ACD_OE ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 12 ) | ||
237 | #define PD13_PF_LP_HSYNC ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 13 ) | ||
238 | #define PD14_PF_FLM_VSYNC ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 14 ) | ||
239 | #define PD15_PF_LD0 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 15 ) | ||
240 | #define PD16_PF_LD1 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 16 ) | ||
241 | #define PD17_PF_LD2 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 17 ) | ||
242 | #define PD18_PF_LD3 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 18 ) | ||
243 | #define PD19_PF_LD4 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 19 ) | ||
244 | #define PD20_PF_LD5 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 20 ) | ||
245 | #define PD21_PF_LD6 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 21 ) | ||
246 | #define PD22_PF_LD7 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 22 ) | ||
247 | #define PD23_PF_LD8 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 23 ) | ||
248 | #define PD24_PF_LD9 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 24 ) | ||
249 | #define PD25_PF_LD10 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 25 ) | ||
250 | #define PD26_PF_LD11 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 26 ) | ||
251 | #define PD27_PF_LD12 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 27 ) | ||
252 | #define PD28_PF_LD13 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 28 ) | ||
253 | #define PD29_PF_LD14 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 29 ) | ||
254 | #define PD30_PF_LD15 ( GPIO_PORTD | GPIO_OUT | GPIO_PF | 30 ) | ||
255 | #define PD31_PF_TMR2OUT ( GPIO_PORTD | GPIO_PF | 31 ) | ||
256 | #define PD31_BIN_SPI2_TXD ( GPIO_GIUS | GPIO_PORTD | GPIO_BIN | 31 ) | ||
257 | |||
258 | /* | ||
259 | * PWM controller | ||
260 | */ | ||
261 | #define PWMC __REG(IMX_PWM_BASE + 0x00) /* PWM Control Register */ | ||
262 | #define PWMS __REG(IMX_PWM_BASE + 0x04) /* PWM Sample Register */ | ||
263 | #define PWMP __REG(IMX_PWM_BASE + 0x08) /* PWM Period Register */ | ||
264 | #define PWMCNT __REG(IMX_PWM_BASE + 0x0C) /* PWM Counter Register */ | ||
265 | |||
266 | #define PWMC_HCTR (0x01<<18) /* Halfword FIFO Data Swapping */ | ||
267 | #define PWMC_BCTR (0x01<<17) /* Byte FIFO Data Swapping */ | ||
268 | #define PWMC_SWR (0x01<<16) /* Software Reset */ | ||
269 | #define PWMC_CLKSRC (0x01<<15) /* Clock Source */ | ||
270 | #define PWMC_PRESCALER(x) (((x-1) & 0x7F) << 8) /* PRESCALER */ | ||
271 | #define PWMC_IRQ (0x01<< 7) /* Interrupt Request */ | ||
272 | #define PWMC_IRQEN (0x01<< 6) /* Interrupt Request Enable */ | ||
273 | #define PWMC_FIFOAV (0x01<< 5) /* FIFO Available */ | ||
274 | #define PWMC_EN (0x01<< 4) /* Enables/Disables the PWM */ | ||
275 | #define PWMC_REPEAT(x) (((x) & 0x03) << 2) /* Sample Repeats */ | ||
276 | #define PWMC_CLKSEL(x) (((x) & 0x03) << 0) /* Clock Selection */ | ||
277 | |||
278 | #define PWMS_SAMPLE(x) ((x) & 0xFFFF) /* Contains a two-sample word */ | ||
279 | #define PWMP_PERIOD(x) ((x) & 0xFFFF) /* Represents the PWM's period */ | ||
280 | #define PWMC_COUNTER(x) ((x) & 0xFFFF) /* Represents the current count value */ | ||
281 | |||
282 | /* | ||
283 | * DMA Controller | ||
284 | */ | ||
285 | #define DCR __REG(IMX_DMAC_BASE +0x00) /* DMA Control Register */ | ||
286 | #define DISR __REG(IMX_DMAC_BASE +0x04) /* DMA Interrupt status Register */ | ||
287 | #define DIMR __REG(IMX_DMAC_BASE +0x08) /* DMA Interrupt mask Register */ | ||
288 | #define DBTOSR __REG(IMX_DMAC_BASE +0x0c) /* DMA Burst timeout status Register */ | ||
289 | #define DRTOSR __REG(IMX_DMAC_BASE +0x10) /* DMA Request timeout Register */ | ||
290 | #define DSESR __REG(IMX_DMAC_BASE +0x14) /* DMA Transfer Error Status Register */ | ||
291 | #define DBOSR __REG(IMX_DMAC_BASE +0x18) /* DMA Buffer overflow status Register */ | ||
292 | #define DBTOCR __REG(IMX_DMAC_BASE +0x1c) /* DMA Burst timeout control Register */ | ||
293 | #define WSRA __REG(IMX_DMAC_BASE +0x40) /* W-Size Register A */ | ||
294 | #define XSRA __REG(IMX_DMAC_BASE +0x44) /* X-Size Register A */ | ||
295 | #define YSRA __REG(IMX_DMAC_BASE +0x48) /* Y-Size Register A */ | ||
296 | #define WSRB __REG(IMX_DMAC_BASE +0x4c) /* W-Size Register B */ | ||
297 | #define XSRB __REG(IMX_DMAC_BASE +0x50) /* X-Size Register B */ | ||
298 | #define YSRB __REG(IMX_DMAC_BASE +0x54) /* Y-Size Register B */ | ||
299 | #define SAR(x) __REG2( IMX_DMAC_BASE + 0x80, (x) << 6) /* Source Address Registers */ | ||
300 | #define DAR(x) __REG2( IMX_DMAC_BASE + 0x84, (x) << 6) /* Destination Address Registers */ | ||
301 | #define CNTR(x) __REG2( IMX_DMAC_BASE + 0x88, (x) << 6) /* Count Registers */ | ||
302 | #define CCR(x) __REG2( IMX_DMAC_BASE + 0x8c, (x) << 6) /* Control Registers */ | ||
303 | #define RSSR(x) __REG2( IMX_DMAC_BASE + 0x90, (x) << 6) /* Request source select Registers */ | ||
304 | #define BLR(x) __REG2( IMX_DMAC_BASE + 0x94, (x) << 6) /* Burst length Registers */ | ||
305 | #define RTOR(x) __REG2( IMX_DMAC_BASE + 0x98, (x) << 6) /* Request timeout Registers */ | ||
306 | #define BUCR(x) __REG2( IMX_DMAC_BASE + 0x98, (x) << 6) /* Bus Utilization Registers */ | ||
307 | |||
308 | #define DCR_DRST (1<<1) | ||
309 | #define DCR_DEN (1<<0) | ||
310 | #define DBTOCR_EN (1<<15) | ||
311 | #define DBTOCR_CNT(x) ((x) & 0x7fff ) | ||
312 | #define CNTR_CNT(x) ((x) & 0xffffff ) | ||
313 | #define CCR_DMOD_LINEAR ( 0x0 << 12 ) | ||
314 | #define CCR_DMOD_2D ( 0x1 << 12 ) | ||
315 | #define CCR_DMOD_FIFO ( 0x2 << 12 ) | ||
316 | #define CCR_DMOD_EOBFIFO ( 0x3 << 12 ) | ||
317 | #define CCR_SMOD_LINEAR ( 0x0 << 10 ) | ||
318 | #define CCR_SMOD_2D ( 0x1 << 10 ) | ||
319 | #define CCR_SMOD_FIFO ( 0x2 << 10 ) | ||
320 | #define CCR_SMOD_EOBFIFO ( 0x3 << 10 ) | ||
321 | #define CCR_MDIR_DEC (1<<9) | ||
322 | #define CCR_MSEL_B (1<<8) | ||
323 | #define CCR_DSIZ_32 ( 0x0 << 6 ) | ||
324 | #define CCR_DSIZ_8 ( 0x1 << 6 ) | ||
325 | #define CCR_DSIZ_16 ( 0x2 << 6 ) | ||
326 | #define CCR_SSIZ_32 ( 0x0 << 4 ) | ||
327 | #define CCR_SSIZ_8 ( 0x1 << 4 ) | ||
328 | #define CCR_SSIZ_16 ( 0x2 << 4 ) | ||
329 | #define CCR_REN (1<<3) | ||
330 | #define CCR_RPT (1<<2) | ||
331 | #define CCR_FRC (1<<1) | ||
332 | #define CCR_CEN (1<<0) | ||
333 | #define RTOR_EN (1<<15) | ||
334 | #define RTOR_CLK (1<<14) | ||
335 | #define RTOR_PSC (1<<13) | ||
336 | |||
337 | /* | ||
338 | * Interrupt controller | ||
339 | */ | ||
340 | |||
341 | #define IMX_INTCNTL __REG(IMX_AITC_BASE+0x00) | ||
342 | #define INTCNTL_FIAD (1<<19) | ||
343 | #define INTCNTL_NIAD (1<<20) | ||
344 | |||
345 | #define IMX_NIMASK __REG(IMX_AITC_BASE+0x04) | ||
346 | #define IMX_INTENNUM __REG(IMX_AITC_BASE+0x08) | ||
347 | #define IMX_INTDISNUM __REG(IMX_AITC_BASE+0x0c) | ||
348 | #define IMX_INTENABLEH __REG(IMX_AITC_BASE+0x10) | ||
349 | #define IMX_INTENABLEL __REG(IMX_AITC_BASE+0x14) | ||
350 | |||
351 | /* | ||
352 | * General purpose timers | ||
353 | */ | ||
354 | #define IMX_TCTL(x) __REG( 0x00 + (x)) | ||
355 | #define TCTL_SWR (1<<15) | ||
356 | #define TCTL_FRR (1<<8) | ||
357 | #define TCTL_CAP_RIS (1<<6) | ||
358 | #define TCTL_CAP_FAL (2<<6) | ||
359 | #define TCTL_CAP_RIS_FAL (3<<6) | ||
360 | #define TCTL_OM (1<<5) | ||
361 | #define TCTL_IRQEN (1<<4) | ||
362 | #define TCTL_CLK_PCLK1 (1<<1) | ||
363 | #define TCTL_CLK_PCLK1_16 (2<<1) | ||
364 | #define TCTL_CLK_TIN (3<<1) | ||
365 | #define TCTL_CLK_32 (4<<1) | ||
366 | #define TCTL_TEN (1<<0) | ||
367 | |||
368 | #define IMX_TPRER(x) __REG( 0x04 + (x)) | ||
369 | #define IMX_TCMP(x) __REG( 0x08 + (x)) | ||
370 | #define IMX_TCR(x) __REG( 0x0C + (x)) | ||
371 | #define IMX_TCN(x) __REG( 0x10 + (x)) | ||
372 | #define IMX_TSTAT(x) __REG( 0x14 + (x)) | ||
373 | #define TSTAT_CAPT (1<<1) | ||
374 | #define TSTAT_COMP (1<<0) | ||
375 | |||
376 | #endif // _IMX_REGS_H | ||
diff --git a/arch/arm/mach-imx/include/mach/imx-uart.h b/arch/arm/mach-imx/include/mach/imx-uart.h deleted file mode 100644 index d54eb1d48026..000000000000 --- a/arch/arm/mach-imx/include/mach/imx-uart.h +++ /dev/null | |||
@@ -1,12 +0,0 @@ | |||
1 | #ifndef ASMARM_ARCH_UART_H | ||
2 | #define ASMARM_ARCH_UART_H | ||
3 | |||
4 | #define IMXUART_HAVE_RTSCTS (1<<0) | ||
5 | |||
6 | struct imxuart_platform_data { | ||
7 | int (*init)(struct platform_device *pdev); | ||
8 | void (*exit)(struct platform_device *pdev); | ||
9 | unsigned int flags; | ||
10 | }; | ||
11 | |||
12 | #endif | ||
diff --git a/arch/arm/mach-imx/include/mach/io.h b/arch/arm/mach-imx/include/mach/io.h deleted file mode 100644 index 9e197ae4590f..000000000000 --- a/arch/arm/mach-imx/include/mach/io.h +++ /dev/null | |||
@@ -1,28 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-imxads/include/mach/io.h | ||
3 | * | ||
4 | * Copyright (C) 1999 ARM Limited | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | #ifndef __ASM_ARM_ARCH_IO_H | ||
21 | #define __ASM_ARM_ARCH_IO_H | ||
22 | |||
23 | #define IO_SPACE_LIMIT 0xffffffff | ||
24 | |||
25 | #define __io(a) __typesafe_io(a) | ||
26 | #define __mem_pci(a) (a) | ||
27 | |||
28 | #endif | ||
diff --git a/arch/arm/mach-imx/include/mach/irqs.h b/arch/arm/mach-imx/include/mach/irqs.h deleted file mode 100644 index 67812c5ac1f9..000000000000 --- a/arch/arm/mach-imx/include/mach/irqs.h +++ /dev/null | |||
@@ -1,121 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-imxads/include/mach/irqs.h | ||
3 | * | ||
4 | * Copyright (C) 1999 ARM Limited | ||
5 | * Copyright (C) 2000 Deep Blue Solutions Ltd. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | */ | ||
21 | |||
22 | #ifndef __ARM_IRQS_H__ | ||
23 | #define __ARM_IRQS_H__ | ||
24 | |||
25 | /* Use the imx definitions */ | ||
26 | #include <mach/hardware.h> | ||
27 | |||
28 | /* | ||
29 | * IMX Interrupt numbers | ||
30 | * | ||
31 | */ | ||
32 | #define INT_SOFTINT 0 | ||
33 | #define CSI_INT 6 | ||
34 | #define DSPA_MAC_INT 7 | ||
35 | #define DSPA_INT 8 | ||
36 | #define COMP_INT 9 | ||
37 | #define MSHC_XINT 10 | ||
38 | #define GPIO_INT_PORTA 11 | ||
39 | #define GPIO_INT_PORTB 12 | ||
40 | #define GPIO_INT_PORTC 13 | ||
41 | #define LCDC_INT 14 | ||
42 | #define SIM_INT 15 | ||
43 | #define SIM_DATA_INT 16 | ||
44 | #define RTC_INT 17 | ||
45 | #define RTC_SAMINT 18 | ||
46 | #define UART2_MINT_PFERR 19 | ||
47 | #define UART2_MINT_RTS 20 | ||
48 | #define UART2_MINT_DTR 21 | ||
49 | #define UART2_MINT_UARTC 22 | ||
50 | #define UART2_MINT_TX 23 | ||
51 | #define UART2_MINT_RX 24 | ||
52 | #define UART1_MINT_PFERR 25 | ||
53 | #define UART1_MINT_RTS 26 | ||
54 | #define UART1_MINT_DTR 27 | ||
55 | #define UART1_MINT_UARTC 28 | ||
56 | #define UART1_MINT_TX 29 | ||
57 | #define UART1_MINT_RX 30 | ||
58 | #define VOICE_DAC_INT 31 | ||
59 | #define VOICE_ADC_INT 32 | ||
60 | #define PEN_DATA_INT 33 | ||
61 | #define PWM_INT 34 | ||
62 | #define SDHC_INT 35 | ||
63 | #define I2C_INT 39 | ||
64 | #define CSPI_INT 41 | ||
65 | #define SSI_TX_INT 42 | ||
66 | #define SSI_TX_ERR_INT 43 | ||
67 | #define SSI_RX_INT 44 | ||
68 | #define SSI_RX_ERR_INT 45 | ||
69 | #define TOUCH_INT 46 | ||
70 | #define USBD_INT0 47 | ||
71 | #define USBD_INT1 48 | ||
72 | #define USBD_INT2 49 | ||
73 | #define USBD_INT3 50 | ||
74 | #define USBD_INT4 51 | ||
75 | #define USBD_INT5 52 | ||
76 | #define USBD_INT6 53 | ||
77 | #define BTSYS_INT 55 | ||
78 | #define BTTIM_INT 56 | ||
79 | #define BTWUI_INT 57 | ||
80 | #define TIM2_INT 58 | ||
81 | #define TIM1_INT 59 | ||
82 | #define DMA_ERR 60 | ||
83 | #define DMA_INT 61 | ||
84 | #define GPIO_INT_PORTD 62 | ||
85 | |||
86 | #define IMX_IRQS (64) | ||
87 | |||
88 | /* note: the IMX has four gpio ports (A-D), but only | ||
89 | * the following pins are connected to the outside | ||
90 | * world: | ||
91 | * | ||
92 | * PORT A: bits 0-31 | ||
93 | * PORT B: bits 8-31 | ||
94 | * PORT C: bits 3-17 | ||
95 | * PORT D: bits 6-31 | ||
96 | * | ||
97 | * We map these interrupts straight on. As a result we have | ||
98 | * several holes in the interrupt mapping. We do this for two | ||
99 | * reasons: | ||
100 | * - mapping the interrupts without holes would get | ||
101 | * far more complicated | ||
102 | * - Motorola could well decide to bring some processor | ||
103 | * with more pins connected | ||
104 | */ | ||
105 | |||
106 | #define IRQ_GPIOA(x) (IMX_IRQS + x) | ||
107 | #define IRQ_GPIOB(x) (IRQ_GPIOA(32) + x) | ||
108 | #define IRQ_GPIOC(x) (IRQ_GPIOB(32) + x) | ||
109 | #define IRQ_GPIOD(x) (IRQ_GPIOC(32) + x) | ||
110 | |||
111 | /* decode irq number to use with IMR(x), ISR(x) and friends */ | ||
112 | #define IRQ_TO_REG(irq) ((irq - IMX_IRQS) >> 5) | ||
113 | |||
114 | /* all normal IRQs can be FIQs */ | ||
115 | #define FIQ_START 0 | ||
116 | /* switch betwean IRQ and FIQ */ | ||
117 | extern int imx_set_irq_fiq(unsigned int irq, unsigned int type); | ||
118 | |||
119 | #define NR_IRQS (IRQ_GPIOD(32) + 1) | ||
120 | #define IRQ_GPIO(x) | ||
121 | #endif | ||
diff --git a/arch/arm/mach-imx/include/mach/memory.h b/arch/arm/mach-imx/include/mach/memory.h deleted file mode 100644 index a93df7cba694..000000000000 --- a/arch/arm/mach-imx/include/mach/memory.h +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-imx/include/mach/memory.h | ||
3 | * | ||
4 | * Copyright (C) 1999 ARM Limited | ||
5 | * Copyright (C) 2002 Shane Nay (shane@minirl.com) | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | */ | ||
21 | #ifndef __ASM_ARCH_MMU_H | ||
22 | #define __ASM_ARCH_MMU_H | ||
23 | |||
24 | #define PHYS_OFFSET UL(0x08000000) | ||
25 | |||
26 | #endif | ||
diff --git a/arch/arm/mach-imx/include/mach/mmc.h b/arch/arm/mach-imx/include/mach/mmc.h deleted file mode 100644 index 4712f354dcca..000000000000 --- a/arch/arm/mach-imx/include/mach/mmc.h +++ /dev/null | |||
@@ -1,15 +0,0 @@ | |||
1 | #ifndef ASMARM_ARCH_MMC_H | ||
2 | #define ASMARM_ARCH_MMC_H | ||
3 | |||
4 | #include <linux/mmc/host.h> | ||
5 | |||
6 | struct device; | ||
7 | |||
8 | struct imxmmc_platform_data { | ||
9 | int (*card_present)(struct device *); | ||
10 | int (*get_ro)(struct device *); | ||
11 | }; | ||
12 | |||
13 | extern void imx_set_mmc_info(struct imxmmc_platform_data *info); | ||
14 | |||
15 | #endif | ||
diff --git a/arch/arm/mach-imx/include/mach/spi_imx.h b/arch/arm/mach-imx/include/mach/spi_imx.h deleted file mode 100644 index 4186430feecf..000000000000 --- a/arch/arm/mach-imx/include/mach/spi_imx.h +++ /dev/null | |||
@@ -1,72 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-imx/include/mach/spi_imx.h | ||
3 | * | ||
4 | * Copyright (C) 2006 SWAPP | ||
5 | * Andrea Paterniani <a.paterniani@swapp-eng.it> | ||
6 | * | ||
7 | * Initial version inspired by: | ||
8 | * linux-2.6.17-rc3-mm1/arch/arm/mach-pxa/include/mach/pxa2xx_spi.h | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License as published by | ||
12 | * the Free Software Foundation; either version 2 of the License, or | ||
13 | * (at your option) any later version. | ||
14 | * | ||
15 | * This program is distributed in the hope that it will be useful, | ||
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
18 | * GNU General Public License for more details. | ||
19 | * | ||
20 | * You should have received a copy of the GNU General Public License | ||
21 | * along with this program; if not, write to the Free Software | ||
22 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
23 | */ | ||
24 | |||
25 | #ifndef SPI_IMX_H_ | ||
26 | #define SPI_IMX_H_ | ||
27 | |||
28 | |||
29 | /*-------------------------------------------------------------------------*/ | ||
30 | /** | ||
31 | * struct spi_imx_master - device.platform_data for SPI controller devices. | ||
32 | * @num_chipselect: chipselects are used to distinguish individual | ||
33 | * SPI slaves, and are numbered from zero to num_chipselects - 1. | ||
34 | * each slave has a chipselect signal, but it's common that not | ||
35 | * every chipselect is connected to a slave. | ||
36 | * @enable_dma: if true enables DMA driven transfers. | ||
37 | */ | ||
38 | struct spi_imx_master { | ||
39 | u8 num_chipselect; | ||
40 | u8 enable_dma:1; | ||
41 | }; | ||
42 | /*-------------------------------------------------------------------------*/ | ||
43 | |||
44 | |||
45 | /*-------------------------------------------------------------------------*/ | ||
46 | /** | ||
47 | * struct spi_imx_chip - spi_board_info.controller_data for SPI | ||
48 | * slave devices, copied to spi_device.controller_data. | ||
49 | * @enable_loopback : used for test purpouse to internally connect RX and TX | ||
50 | * sections. | ||
51 | * @enable_dma : enables dma transfer (provided that controller driver has | ||
52 | * dma enabled too). | ||
53 | * @ins_ss_pulse : enable /SS pulse insertion between SPI burst. | ||
54 | * @bclk_wait : number of bclk waits between each bits_per_word SPI burst. | ||
55 | * @cs_control : function pointer to board-specific function to assert/deassert | ||
56 | * I/O port to control HW generation of devices chip-select. | ||
57 | */ | ||
58 | struct spi_imx_chip { | ||
59 | u8 enable_loopback:1; | ||
60 | u8 enable_dma:1; | ||
61 | u8 ins_ss_pulse:1; | ||
62 | u16 bclk_wait:15; | ||
63 | void (*cs_control)(u32 control); | ||
64 | }; | ||
65 | |||
66 | /* Chip-select state */ | ||
67 | #define SPI_CS_ASSERT (1 << 0) | ||
68 | #define SPI_CS_DEASSERT (1 << 1) | ||
69 | /*-------------------------------------------------------------------------*/ | ||
70 | |||
71 | |||
72 | #endif /* SPI_IMX_H_*/ | ||
diff --git a/arch/arm/mach-imx/include/mach/system.h b/arch/arm/mach-imx/include/mach/system.h deleted file mode 100644 index 46d4ca91af79..000000000000 --- a/arch/arm/mach-imx/include/mach/system.h +++ /dev/null | |||
@@ -1,40 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-imxads/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 1999 ARM Limited | ||
5 | * Copyright (C) 2000 Deep Blue Solutions Ltd | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | */ | ||
21 | #ifndef __ASM_ARCH_SYSTEM_H | ||
22 | #define __ASM_ARCH_SYSTEM_H | ||
23 | |||
24 | static void | ||
25 | arch_idle(void) | ||
26 | { | ||
27 | /* | ||
28 | * This should do all the clock switching | ||
29 | * and wait for interrupt tricks | ||
30 | */ | ||
31 | cpu_do_idle(); | ||
32 | } | ||
33 | |||
34 | static inline void | ||
35 | arch_reset(char mode, const char *cmd) | ||
36 | { | ||
37 | cpu_reset(0); | ||
38 | } | ||
39 | |||
40 | #endif | ||
diff --git a/arch/arm/mach-imx/include/mach/uncompress.h b/arch/arm/mach-imx/include/mach/uncompress.h deleted file mode 100644 index 70523e67a8f6..000000000000 --- a/arch/arm/mach-imx/include/mach/uncompress.h +++ /dev/null | |||
@@ -1,71 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-imxads/include/mach/uncompress.h | ||
3 | * | ||
4 | * | ||
5 | * | ||
6 | * Copyright (C) 1999 ARM Limited | ||
7 | * Copyright (C) Shane Nay (shane@minirl.com) | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License, or | ||
12 | * (at your option) any later version. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License | ||
20 | * along with this program; if not, write to the Free Software | ||
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
22 | */ | ||
23 | |||
24 | #define UART(x) (*(volatile unsigned long *)(serial_port + (x))) | ||
25 | |||
26 | #define UART1_BASE 0x206000 | ||
27 | #define UART2_BASE 0x207000 | ||
28 | #define USR2 0x98 | ||
29 | #define USR2_TXFE (1<<14) | ||
30 | #define TXR 0x40 | ||
31 | #define UCR1 0x80 | ||
32 | #define UCR1_UARTEN 1 | ||
33 | |||
34 | /* | ||
35 | * The following code assumes the serial port has already been | ||
36 | * initialized by the bootloader. We search for the first enabled | ||
37 | * port in the most probable order. If you didn't setup a port in | ||
38 | * your bootloader then nothing will appear (which might be desired). | ||
39 | * | ||
40 | * This does not append a newline | ||
41 | */ | ||
42 | static void putc(int c) | ||
43 | { | ||
44 | unsigned long serial_port; | ||
45 | |||
46 | do { | ||
47 | serial_port = UART1_BASE; | ||
48 | if ( UART(UCR1) & UCR1_UARTEN ) | ||
49 | break; | ||
50 | serial_port = UART2_BASE; | ||
51 | if ( UART(UCR1) & UCR1_UARTEN ) | ||
52 | break; | ||
53 | return; | ||
54 | } while(0); | ||
55 | |||
56 | while (!(UART(USR2) & USR2_TXFE)) | ||
57 | barrier(); | ||
58 | |||
59 | UART(TXR) = c; | ||
60 | } | ||
61 | |||
62 | static inline void flush(void) | ||
63 | { | ||
64 | } | ||
65 | |||
66 | /* | ||
67 | * nothing to do | ||
68 | */ | ||
69 | #define arch_decomp_setup() | ||
70 | |||
71 | #define arch_decomp_wdog() | ||
diff --git a/arch/arm/mach-imx/include/mach/vmalloc.h b/arch/arm/mach-imx/include/mach/vmalloc.h deleted file mode 100644 index 7d7cb0bde3e8..000000000000 --- a/arch/arm/mach-imx/include/mach/vmalloc.h +++ /dev/null | |||
@@ -1,20 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-imx/include/mach/vmalloc.h | ||
3 | * | ||
4 | * Copyright (C) 2000 Russell King. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | #define VMALLOC_END (PAGE_OFFSET + 0x10000000) | ||
diff --git a/arch/arm/mach-imx/irq.c b/arch/arm/mach-imx/irq.c deleted file mode 100644 index 531b95deadc0..000000000000 --- a/arch/arm/mach-imx/irq.c +++ /dev/null | |||
@@ -1,311 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-imx/irq.c | ||
3 | * | ||
4 | * Copyright (C) 1999 ARM Limited | ||
5 | * Copyright (C) 2002 Shane Nay (shane@minirl.com) | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | * | ||
21 | * 03/03/2004 Sascha Hauer <sascha@saschahauer.de> | ||
22 | * Copied from the motorola bsp package and added gpio demux | ||
23 | * interrupt handler | ||
24 | */ | ||
25 | |||
26 | #include <linux/init.h> | ||
27 | #include <linux/list.h> | ||
28 | #include <linux/timer.h> | ||
29 | #include <linux/io.h> | ||
30 | |||
31 | #include <mach/hardware.h> | ||
32 | #include <asm/irq.h> | ||
33 | |||
34 | #include <asm/mach/irq.h> | ||
35 | |||
36 | /* | ||
37 | * | ||
38 | * We simply use the ENABLE DISABLE registers inside of the IMX | ||
39 | * to turn on/off specific interrupts. | ||
40 | * | ||
41 | */ | ||
42 | |||
43 | #define INTCNTL_OFF 0x00 | ||
44 | #define NIMASK_OFF 0x04 | ||
45 | #define INTENNUM_OFF 0x08 | ||
46 | #define INTDISNUM_OFF 0x0C | ||
47 | #define INTENABLEH_OFF 0x10 | ||
48 | #define INTENABLEL_OFF 0x14 | ||
49 | #define INTTYPEH_OFF 0x18 | ||
50 | #define INTTYPEL_OFF 0x1C | ||
51 | #define NIPRIORITY_OFF(x) (0x20+4*(7-(x))) | ||
52 | #define NIVECSR_OFF 0x40 | ||
53 | #define FIVECSR_OFF 0x44 | ||
54 | #define INTSRCH_OFF 0x48 | ||
55 | #define INTSRCL_OFF 0x4C | ||
56 | #define INTFRCH_OFF 0x50 | ||
57 | #define INTFRCL_OFF 0x54 | ||
58 | #define NIPNDH_OFF 0x58 | ||
59 | #define NIPNDL_OFF 0x5C | ||
60 | #define FIPNDH_OFF 0x60 | ||
61 | #define FIPNDL_OFF 0x64 | ||
62 | |||
63 | #define VA_AITC_BASE IO_ADDRESS(IMX_AITC_BASE) | ||
64 | #define IMX_AITC_INTCNTL (VA_AITC_BASE + INTCNTL_OFF) | ||
65 | #define IMX_AITC_NIMASK (VA_AITC_BASE + NIMASK_OFF) | ||
66 | #define IMX_AITC_INTENNUM (VA_AITC_BASE + INTENNUM_OFF) | ||
67 | #define IMX_AITC_INTDISNUM (VA_AITC_BASE + INTDISNUM_OFF) | ||
68 | #define IMX_AITC_INTENABLEH (VA_AITC_BASE + INTENABLEH_OFF) | ||
69 | #define IMX_AITC_INTENABLEL (VA_AITC_BASE + INTENABLEL_OFF) | ||
70 | #define IMX_AITC_INTTYPEH (VA_AITC_BASE + INTTYPEH_OFF) | ||
71 | #define IMX_AITC_INTTYPEL (VA_AITC_BASE + INTTYPEL_OFF) | ||
72 | #define IMX_AITC_NIPRIORITY(x) (VA_AITC_BASE + NIPRIORITY_OFF(x)) | ||
73 | #define IMX_AITC_NIVECSR (VA_AITC_BASE + NIVECSR_OFF) | ||
74 | #define IMX_AITC_FIVECSR (VA_AITC_BASE + FIVECSR_OFF) | ||
75 | #define IMX_AITC_INTSRCH (VA_AITC_BASE + INTSRCH_OFF) | ||
76 | #define IMX_AITC_INTSRCL (VA_AITC_BASE + INTSRCL_OFF) | ||
77 | #define IMX_AITC_INTFRCH (VA_AITC_BASE + INTFRCH_OFF) | ||
78 | #define IMX_AITC_INTFRCL (VA_AITC_BASE + INTFRCL_OFF) | ||
79 | #define IMX_AITC_NIPNDH (VA_AITC_BASE + NIPNDH_OFF) | ||
80 | #define IMX_AITC_NIPNDL (VA_AITC_BASE + NIPNDL_OFF) | ||
81 | #define IMX_AITC_FIPNDH (VA_AITC_BASE + FIPNDH_OFF) | ||
82 | #define IMX_AITC_FIPNDL (VA_AITC_BASE + FIPNDL_OFF) | ||
83 | |||
84 | #if 0 | ||
85 | #define DEBUG_IRQ(fmt...) printk(fmt) | ||
86 | #else | ||
87 | #define DEBUG_IRQ(fmt...) do { } while (0) | ||
88 | #endif | ||
89 | |||
90 | static void | ||
91 | imx_mask_irq(unsigned int irq) | ||
92 | { | ||
93 | __raw_writel(irq, IMX_AITC_INTDISNUM); | ||
94 | } | ||
95 | |||
96 | static void | ||
97 | imx_unmask_irq(unsigned int irq) | ||
98 | { | ||
99 | __raw_writel(irq, IMX_AITC_INTENNUM); | ||
100 | } | ||
101 | |||
102 | #ifdef CONFIG_FIQ | ||
103 | int imx_set_irq_fiq(unsigned int irq, unsigned int type) | ||
104 | { | ||
105 | unsigned int irqt; | ||
106 | |||
107 | if (irq >= IMX_IRQS) | ||
108 | return -EINVAL; | ||
109 | |||
110 | if (irq < IMX_IRQS / 2) { | ||
111 | irqt = __raw_readl(IMX_AITC_INTTYPEL) & ~(1 << irq); | ||
112 | __raw_writel(irqt | (!!type << irq), IMX_AITC_INTTYPEL); | ||
113 | } else { | ||
114 | irq -= IMX_IRQS / 2; | ||
115 | irqt = __raw_readl(IMX_AITC_INTTYPEH) & ~(1 << irq); | ||
116 | __raw_writel(irqt | (!!type << irq), IMX_AITC_INTTYPEH); | ||
117 | } | ||
118 | |||
119 | return 0; | ||
120 | } | ||
121 | EXPORT_SYMBOL(imx_set_irq_fiq); | ||
122 | #endif /* CONFIG_FIQ */ | ||
123 | |||
124 | static int | ||
125 | imx_gpio_irq_type(unsigned int _irq, unsigned int type) | ||
126 | { | ||
127 | unsigned int irq_type = 0, irq, reg, bit; | ||
128 | |||
129 | irq = _irq - IRQ_GPIOA(0); | ||
130 | reg = irq >> 5; | ||
131 | bit = 1 << (irq % 32); | ||
132 | |||
133 | if (type == IRQ_TYPE_PROBE) { | ||
134 | /* Don't mess with enabled GPIOs using preconfigured edges or | ||
135 | GPIOs set to alternate function during probe */ | ||
136 | /* TODO: support probe */ | ||
137 | // if ((GPIO_IRQ_rising_edge[idx] | GPIO_IRQ_falling_edge[idx]) & | ||
138 | // GPIO_bit(gpio)) | ||
139 | // return 0; | ||
140 | // if (GAFR(gpio) & (0x3 << (((gpio) & 0xf)*2))) | ||
141 | // return 0; | ||
142 | // type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING; | ||
143 | } | ||
144 | |||
145 | GIUS(reg) |= bit; | ||
146 | DDIR(reg) &= ~(bit); | ||
147 | |||
148 | DEBUG_IRQ("setting type of irq %d to ", _irq); | ||
149 | |||
150 | if (type & IRQ_TYPE_EDGE_RISING) { | ||
151 | DEBUG_IRQ("rising edges\n"); | ||
152 | irq_type = 0x0; | ||
153 | } | ||
154 | if (type & IRQ_TYPE_EDGE_FALLING) { | ||
155 | DEBUG_IRQ("falling edges\n"); | ||
156 | irq_type = 0x1; | ||
157 | } | ||
158 | if (type & IRQ_TYPE_LEVEL_LOW) { | ||
159 | DEBUG_IRQ("low level\n"); | ||
160 | irq_type = 0x3; | ||
161 | } | ||
162 | if (type & IRQ_TYPE_LEVEL_HIGH) { | ||
163 | DEBUG_IRQ("high level\n"); | ||
164 | irq_type = 0x2; | ||
165 | } | ||
166 | |||
167 | if (irq % 32 < 16) { | ||
168 | ICR1(reg) = (ICR1(reg) & ~(0x3 << ((irq % 16) * 2))) | | ||
169 | (irq_type << ((irq % 16) * 2)); | ||
170 | } else { | ||
171 | ICR2(reg) = (ICR2(reg) & ~(0x3 << ((irq % 16) * 2))) | | ||
172 | (irq_type << ((irq % 16) * 2)); | ||
173 | } | ||
174 | |||
175 | return 0; | ||
176 | |||
177 | } | ||
178 | |||
179 | static void | ||
180 | imx_gpio_ack_irq(unsigned int irq) | ||
181 | { | ||
182 | DEBUG_IRQ("%s: irq %d\n", __func__, irq); | ||
183 | ISR(IRQ_TO_REG(irq)) = 1 << ((irq - IRQ_GPIOA(0)) % 32); | ||
184 | } | ||
185 | |||
186 | static void | ||
187 | imx_gpio_mask_irq(unsigned int irq) | ||
188 | { | ||
189 | DEBUG_IRQ("%s: irq %d\n", __func__, irq); | ||
190 | IMR(IRQ_TO_REG(irq)) &= ~( 1 << ((irq - IRQ_GPIOA(0)) % 32)); | ||
191 | } | ||
192 | |||
193 | static void | ||
194 | imx_gpio_unmask_irq(unsigned int irq) | ||
195 | { | ||
196 | DEBUG_IRQ("%s: irq %d\n", __func__, irq); | ||
197 | IMR(IRQ_TO_REG(irq)) |= 1 << ((irq - IRQ_GPIOA(0)) % 32); | ||
198 | } | ||
199 | |||
200 | static void | ||
201 | imx_gpio_handler(unsigned int mask, unsigned int irq, | ||
202 | struct irq_desc *desc) | ||
203 | { | ||
204 | while (mask) { | ||
205 | if (mask & 1) { | ||
206 | DEBUG_IRQ("handling irq %d\n", irq); | ||
207 | generic_handle_irq(irq); | ||
208 | } | ||
209 | irq++; | ||
210 | mask >>= 1; | ||
211 | } | ||
212 | } | ||
213 | |||
214 | static void | ||
215 | imx_gpioa_demux_handler(unsigned int irq_unused, struct irq_desc *desc) | ||
216 | { | ||
217 | unsigned int mask, irq; | ||
218 | |||
219 | mask = ISR(0); | ||
220 | irq = IRQ_GPIOA(0); | ||
221 | imx_gpio_handler(mask, irq, desc); | ||
222 | } | ||
223 | |||
224 | static void | ||
225 | imx_gpiob_demux_handler(unsigned int irq_unused, struct irq_desc *desc) | ||
226 | { | ||
227 | unsigned int mask, irq; | ||
228 | |||
229 | mask = ISR(1); | ||
230 | irq = IRQ_GPIOB(0); | ||
231 | imx_gpio_handler(mask, irq, desc); | ||
232 | } | ||
233 | |||
234 | static void | ||
235 | imx_gpioc_demux_handler(unsigned int irq_unused, struct irq_desc *desc) | ||
236 | { | ||
237 | unsigned int mask, irq; | ||
238 | |||
239 | mask = ISR(2); | ||
240 | irq = IRQ_GPIOC(0); | ||
241 | imx_gpio_handler(mask, irq, desc); | ||
242 | } | ||
243 | |||
244 | static void | ||
245 | imx_gpiod_demux_handler(unsigned int irq_unused, struct irq_desc *desc) | ||
246 | { | ||
247 | unsigned int mask, irq; | ||
248 | |||
249 | mask = ISR(3); | ||
250 | irq = IRQ_GPIOD(0); | ||
251 | imx_gpio_handler(mask, irq, desc); | ||
252 | } | ||
253 | |||
254 | static struct irq_chip imx_internal_chip = { | ||
255 | .name = "MPU", | ||
256 | .ack = imx_mask_irq, | ||
257 | .mask = imx_mask_irq, | ||
258 | .unmask = imx_unmask_irq, | ||
259 | }; | ||
260 | |||
261 | static struct irq_chip imx_gpio_chip = { | ||
262 | .name = "GPIO", | ||
263 | .ack = imx_gpio_ack_irq, | ||
264 | .mask = imx_gpio_mask_irq, | ||
265 | .unmask = imx_gpio_unmask_irq, | ||
266 | .set_type = imx_gpio_irq_type, | ||
267 | }; | ||
268 | |||
269 | void __init | ||
270 | imx_init_irq(void) | ||
271 | { | ||
272 | unsigned int irq; | ||
273 | |||
274 | DEBUG_IRQ("Initializing imx interrupts\n"); | ||
275 | |||
276 | /* Disable all interrupts initially. */ | ||
277 | /* Do not rely on the bootloader. */ | ||
278 | __raw_writel(0, IMX_AITC_INTENABLEH); | ||
279 | __raw_writel(0, IMX_AITC_INTENABLEL); | ||
280 | |||
281 | /* Mask all GPIO interrupts as well */ | ||
282 | IMR(0) = 0; | ||
283 | IMR(1) = 0; | ||
284 | IMR(2) = 0; | ||
285 | IMR(3) = 0; | ||
286 | |||
287 | for (irq = 0; irq < IMX_IRQS; irq++) { | ||
288 | set_irq_chip(irq, &imx_internal_chip); | ||
289 | set_irq_handler(irq, handle_level_irq); | ||
290 | set_irq_flags(irq, IRQF_VALID); | ||
291 | } | ||
292 | |||
293 | for (irq = IRQ_GPIOA(0); irq < IRQ_GPIOD(32); irq++) { | ||
294 | set_irq_chip(irq, &imx_gpio_chip); | ||
295 | set_irq_handler(irq, handle_edge_irq); | ||
296 | set_irq_flags(irq, IRQF_VALID); | ||
297 | } | ||
298 | |||
299 | set_irq_chained_handler(GPIO_INT_PORTA, imx_gpioa_demux_handler); | ||
300 | set_irq_chained_handler(GPIO_INT_PORTB, imx_gpiob_demux_handler); | ||
301 | set_irq_chained_handler(GPIO_INT_PORTC, imx_gpioc_demux_handler); | ||
302 | set_irq_chained_handler(GPIO_INT_PORTD, imx_gpiod_demux_handler); | ||
303 | |||
304 | /* Release masking of interrupts according to priority */ | ||
305 | __raw_writel(-1, IMX_AITC_NIMASK); | ||
306 | |||
307 | #ifdef CONFIG_FIQ | ||
308 | /* Initialize FIQ */ | ||
309 | init_FIQ(); | ||
310 | #endif | ||
311 | } | ||
diff --git a/arch/arm/mach-imx/leds-mx1ads.c b/arch/arm/mach-imx/leds-mx1ads.c deleted file mode 100644 index 1d48f2762cbc..000000000000 --- a/arch/arm/mach-imx/leds-mx1ads.c +++ /dev/null | |||
@@ -1,53 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-imx/leds-mx1ads.c | ||
3 | * | ||
4 | * Copyright (c) 2004 Sascha Hauer <sascha@saschahauer.de> | ||
5 | * | ||
6 | * Original (leds-footbridge.c) by Russell King | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | * | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/io.h> | ||
17 | #include <mach/hardware.h> | ||
18 | #include <asm/system.h> | ||
19 | #include <asm/leds.h> | ||
20 | #include "leds.h" | ||
21 | |||
22 | /* | ||
23 | * The MX1ADS Board has only one usable LED, | ||
24 | * so select only the timer led or the | ||
25 | * cpu usage led | ||
26 | */ | ||
27 | void | ||
28 | mx1ads_leds_event(led_event_t ledevt) | ||
29 | { | ||
30 | unsigned long flags; | ||
31 | |||
32 | local_irq_save(flags); | ||
33 | |||
34 | switch (ledevt) { | ||
35 | #ifdef CONFIG_LEDS_CPU | ||
36 | case led_idle_start: | ||
37 | DR(0) &= ~(1<<2); | ||
38 | break; | ||
39 | |||
40 | case led_idle_end: | ||
41 | DR(0) |= 1<<2; | ||
42 | break; | ||
43 | #endif | ||
44 | |||
45 | #ifdef CONFIG_LEDS_TIMER | ||
46 | case led_timer: | ||
47 | DR(0) ^= 1<<2; | ||
48 | #endif | ||
49 | default: | ||
50 | break; | ||
51 | } | ||
52 | local_irq_restore(flags); | ||
53 | } | ||
diff --git a/arch/arm/mach-imx/leds.c b/arch/arm/mach-imx/leds.c deleted file mode 100644 index cf30803e019b..000000000000 --- a/arch/arm/mach-imx/leds.c +++ /dev/null | |||
@@ -1,31 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-imx/leds.c | ||
3 | * | ||
4 | * Copyright (C) 2004 Sascha Hauer <sascha@saschahauer.de> | ||
5 | * | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | * | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/init.h> | ||
15 | |||
16 | #include <asm/leds.h> | ||
17 | #include <asm/mach-types.h> | ||
18 | |||
19 | #include "leds.h" | ||
20 | |||
21 | static int __init | ||
22 | leds_init(void) | ||
23 | { | ||
24 | if (machine_is_mx1ads()) { | ||
25 | leds_event = mx1ads_leds_event; | ||
26 | } | ||
27 | |||
28 | return 0; | ||
29 | } | ||
30 | |||
31 | __initcall(leds_init); | ||
diff --git a/arch/arm/mach-imx/leds.h b/arch/arm/mach-imx/leds.h deleted file mode 100644 index 49dc1c1da338..000000000000 --- a/arch/arm/mach-imx/leds.h +++ /dev/null | |||
@@ -1,9 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-imx/leds.h | ||
3 | * | ||
4 | * Copyright (c) 2004 Sascha Hauer <sascha@saschahauer.de> | ||
5 | * | ||
6 | * blinky lights for IMX-based systems | ||
7 | * | ||
8 | */ | ||
9 | extern void mx1ads_leds_event(led_event_t evt); | ||
diff --git a/arch/arm/mach-imx/mx1ads.c b/arch/arm/mach-imx/mx1ads.c deleted file mode 100644 index 87fa1ff43b0b..000000000000 --- a/arch/arm/mach-imx/mx1ads.c +++ /dev/null | |||
@@ -1,180 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-imx/mx1ads.c | ||
3 | * | ||
4 | * Initially based on: | ||
5 | * linux-2.6.7-imx/arch/arm/mach-imx/scb9328.c | ||
6 | * Copyright (c) 2004 Sascha Hauer <sascha@saschahauer.de> | ||
7 | * | ||
8 | * 2004 (c) MontaVista Software, Inc. | ||
9 | * | ||
10 | * This file is licensed under the terms of the GNU General Public | ||
11 | * License version 2. This program is licensed "as is" without any | ||
12 | * warranty of any kind, whether express or implied. | ||
13 | */ | ||
14 | |||
15 | #include <linux/device.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <linux/platform_device.h> | ||
18 | #include <asm/system.h> | ||
19 | #include <mach/hardware.h> | ||
20 | #include <asm/irq.h> | ||
21 | #include <asm/pgtable.h> | ||
22 | #include <asm/page.h> | ||
23 | |||
24 | #include <asm/mach/map.h> | ||
25 | #include <asm/mach-types.h> | ||
26 | |||
27 | #include <asm/mach/arch.h> | ||
28 | #include <mach/mmc.h> | ||
29 | #include <mach/imx-uart.h> | ||
30 | #include <linux/interrupt.h> | ||
31 | #include "generic.h" | ||
32 | |||
33 | static struct resource cs89x0_resources[] = { | ||
34 | [0] = { | ||
35 | .start = IMX_CS4_PHYS + 0x300, | ||
36 | .end = IMX_CS4_PHYS + 0x300 + 16, | ||
37 | .flags = IORESOURCE_MEM, | ||
38 | }, | ||
39 | [1] = { | ||
40 | .start = IRQ_GPIOC(17), | ||
41 | .end = IRQ_GPIOC(17), | ||
42 | .flags = IORESOURCE_IRQ, | ||
43 | }, | ||
44 | }; | ||
45 | |||
46 | static struct platform_device cs89x0_device = { | ||
47 | .name = "cirrus-cs89x0", | ||
48 | .num_resources = ARRAY_SIZE(cs89x0_resources), | ||
49 | .resource = cs89x0_resources, | ||
50 | }; | ||
51 | |||
52 | static struct imxuart_platform_data uart_pdata = { | ||
53 | .flags = IMXUART_HAVE_RTSCTS, | ||
54 | }; | ||
55 | |||
56 | static struct resource imx_uart1_resources[] = { | ||
57 | [0] = { | ||
58 | .start = 0x00206000, | ||
59 | .end = 0x002060FF, | ||
60 | .flags = IORESOURCE_MEM, | ||
61 | }, | ||
62 | [1] = { | ||
63 | .start = (UART1_MINT_RX), | ||
64 | .end = (UART1_MINT_RX), | ||
65 | .flags = IORESOURCE_IRQ, | ||
66 | }, | ||
67 | [2] = { | ||
68 | .start = (UART1_MINT_TX), | ||
69 | .end = (UART1_MINT_TX), | ||
70 | .flags = IORESOURCE_IRQ, | ||
71 | }, | ||
72 | [3] = { | ||
73 | .start = UART1_MINT_RTS, | ||
74 | .end = UART1_MINT_RTS, | ||
75 | .flags = IORESOURCE_IRQ, | ||
76 | }, | ||
77 | }; | ||
78 | |||
79 | static struct platform_device imx_uart1_device = { | ||
80 | .name = "imx-uart", | ||
81 | .id = 0, | ||
82 | .num_resources = ARRAY_SIZE(imx_uart1_resources), | ||
83 | .resource = imx_uart1_resources, | ||
84 | .dev = { | ||
85 | .platform_data = &uart_pdata, | ||
86 | } | ||
87 | }; | ||
88 | |||
89 | static struct resource imx_uart2_resources[] = { | ||
90 | [0] = { | ||
91 | .start = 0x00207000, | ||
92 | .end = 0x002070FF, | ||
93 | .flags = IORESOURCE_MEM, | ||
94 | }, | ||
95 | [1] = { | ||
96 | .start = (UART2_MINT_RX), | ||
97 | .end = (UART2_MINT_RX), | ||
98 | .flags = IORESOURCE_IRQ, | ||
99 | }, | ||
100 | [2] = { | ||
101 | .start = (UART2_MINT_TX), | ||
102 | .end = (UART2_MINT_TX), | ||
103 | .flags = IORESOURCE_IRQ, | ||
104 | }, | ||
105 | [3] = { | ||
106 | .start = UART2_MINT_RTS, | ||
107 | .end = UART2_MINT_RTS, | ||
108 | .flags = IORESOURCE_IRQ, | ||
109 | }, | ||
110 | }; | ||
111 | |||
112 | static struct platform_device imx_uart2_device = { | ||
113 | .name = "imx-uart", | ||
114 | .id = 1, | ||
115 | .num_resources = ARRAY_SIZE(imx_uart2_resources), | ||
116 | .resource = imx_uart2_resources, | ||
117 | .dev = { | ||
118 | .platform_data = &uart_pdata, | ||
119 | } | ||
120 | }; | ||
121 | |||
122 | static struct platform_device *devices[] __initdata = { | ||
123 | &cs89x0_device, | ||
124 | &imx_uart1_device, | ||
125 | &imx_uart2_device, | ||
126 | }; | ||
127 | |||
128 | #if defined(CONFIG_MMC_IMX) || defined(CONFIG_MMC_IMX_MODULE) | ||
129 | static int mx1ads_mmc_card_present(struct device *dev) | ||
130 | { | ||
131 | /* MMC/SD Card Detect is PB 20 on MX1ADS V1.0.7 */ | ||
132 | return (SSR(1) & (1 << 20) ? 0 : 1); | ||
133 | } | ||
134 | |||
135 | static struct imxmmc_platform_data mx1ads_mmc_info = { | ||
136 | .card_present = mx1ads_mmc_card_present, | ||
137 | }; | ||
138 | #endif | ||
139 | |||
140 | static void __init | ||
141 | mx1ads_init(void) | ||
142 | { | ||
143 | #ifdef CONFIG_LEDS | ||
144 | imx_gpio_mode(GPIO_PORTA | GPIO_OUT | 2); | ||
145 | #endif | ||
146 | #if defined(CONFIG_MMC_IMX) || defined(CONFIG_MMC_IMX_MODULE) | ||
147 | /* SD/MMC card detect */ | ||
148 | imx_gpio_mode(GPIO_PORTB | GPIO_GIUS | GPIO_IN | 20); | ||
149 | imx_set_mmc_info(&mx1ads_mmc_info); | ||
150 | #endif | ||
151 | |||
152 | imx_gpio_mode(PC9_PF_UART1_CTS); | ||
153 | imx_gpio_mode(PC10_PF_UART1_RTS); | ||
154 | imx_gpio_mode(PC11_PF_UART1_TXD); | ||
155 | imx_gpio_mode(PC12_PF_UART1_RXD); | ||
156 | |||
157 | imx_gpio_mode(PB28_PF_UART2_CTS); | ||
158 | imx_gpio_mode(PB29_PF_UART2_RTS); | ||
159 | imx_gpio_mode(PB30_PF_UART2_TXD); | ||
160 | imx_gpio_mode(PB31_PF_UART2_RXD); | ||
161 | |||
162 | platform_add_devices(devices, ARRAY_SIZE(devices)); | ||
163 | } | ||
164 | |||
165 | static void __init | ||
166 | mx1ads_map_io(void) | ||
167 | { | ||
168 | imx_map_io(); | ||
169 | } | ||
170 | |||
171 | MACHINE_START(MX1ADS, "Motorola MX1ADS") | ||
172 | /* Maintainer: Sascha Hauer, Pengutronix */ | ||
173 | .phys_io = 0x00200000, | ||
174 | .io_pg_offst = ((0xe0000000) >> 18) & 0xfffc, | ||
175 | .boot_params = 0x08000100, | ||
176 | .map_io = mx1ads_map_io, | ||
177 | .init_irq = imx_init_irq, | ||
178 | .timer = &imx_timer, | ||
179 | .init_machine = mx1ads_init, | ||
180 | MACHINE_END | ||
diff --git a/arch/arm/mach-imx/time.c b/arch/arm/mach-imx/time.c deleted file mode 100644 index 5aef18b599e5..000000000000 --- a/arch/arm/mach-imx/time.c +++ /dev/null | |||
@@ -1,220 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-imx/time.c | ||
3 | * | ||
4 | * Copyright (C) 2000-2001 Deep Blue Solutions | ||
5 | * Copyright (C) 2002 Shane Nay (shane@minirl.com) | ||
6 | * Copyright (C) 2006-2007 Pavel Pisa (ppisa@pikron.com) | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/sched.h> | ||
14 | #include <linux/init.h> | ||
15 | #include <linux/interrupt.h> | ||
16 | #include <linux/irq.h> | ||
17 | #include <linux/time.h> | ||
18 | #include <linux/clocksource.h> | ||
19 | #include <linux/clockchips.h> | ||
20 | #include <linux/clk.h> | ||
21 | #include <linux/io.h> | ||
22 | |||
23 | #include <mach/hardware.h> | ||
24 | #include <asm/leds.h> | ||
25 | #include <asm/irq.h> | ||
26 | #include <asm/mach/time.h> | ||
27 | |||
28 | /* Use timer 1 as system timer */ | ||
29 | #define TIMER_BASE IMX_TIM1_BASE | ||
30 | |||
31 | static struct clock_event_device clockevent_imx; | ||
32 | static enum clock_event_mode clockevent_mode = CLOCK_EVT_MODE_UNUSED; | ||
33 | |||
34 | /* | ||
35 | * IRQ handler for the timer | ||
36 | */ | ||
37 | static irqreturn_t | ||
38 | imx_timer_interrupt(int irq, void *dev_id) | ||
39 | { | ||
40 | struct clock_event_device *evt = &clockevent_imx; | ||
41 | uint32_t tstat; | ||
42 | irqreturn_t ret = IRQ_NONE; | ||
43 | |||
44 | /* clear the interrupt */ | ||
45 | tstat = IMX_TSTAT(TIMER_BASE); | ||
46 | IMX_TSTAT(TIMER_BASE) = 0; | ||
47 | |||
48 | if (tstat & TSTAT_COMP) { | ||
49 | evt->event_handler(evt); | ||
50 | ret = IRQ_HANDLED; | ||
51 | } | ||
52 | |||
53 | return ret; | ||
54 | } | ||
55 | |||
56 | static struct irqaction imx_timer_irq = { | ||
57 | .name = "i.MX Timer Tick", | ||
58 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | ||
59 | .handler = imx_timer_interrupt, | ||
60 | }; | ||
61 | |||
62 | /* | ||
63 | * Set up timer hardware into expected mode and state. | ||
64 | */ | ||
65 | static void __init imx_timer_hardware_init(void) | ||
66 | { | ||
67 | /* | ||
68 | * Initialise to a known state (all timers off, and timing reset) | ||
69 | */ | ||
70 | IMX_TCTL(TIMER_BASE) = 0; | ||
71 | IMX_TPRER(TIMER_BASE) = 0; | ||
72 | |||
73 | IMX_TCTL(TIMER_BASE) = TCTL_FRR | TCTL_CLK_PCLK1 | TCTL_TEN; | ||
74 | } | ||
75 | |||
76 | cycle_t imx_get_cycles(struct clocksource *cs) | ||
77 | { | ||
78 | return IMX_TCN(TIMER_BASE); | ||
79 | } | ||
80 | |||
81 | static struct clocksource clocksource_imx = { | ||
82 | .name = "imx_timer1", | ||
83 | .rating = 200, | ||
84 | .read = imx_get_cycles, | ||
85 | .mask = 0xFFFFFFFF, | ||
86 | .shift = 20, | ||
87 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | ||
88 | }; | ||
89 | |||
90 | static int __init imx_clocksource_init(unsigned long rate) | ||
91 | { | ||
92 | clocksource_imx.mult = | ||
93 | clocksource_hz2mult(rate, clocksource_imx.shift); | ||
94 | clocksource_register(&clocksource_imx); | ||
95 | |||
96 | return 0; | ||
97 | } | ||
98 | |||
99 | static int imx_set_next_event(unsigned long evt, | ||
100 | struct clock_event_device *unused) | ||
101 | { | ||
102 | unsigned long tcmp; | ||
103 | |||
104 | tcmp = IMX_TCN(TIMER_BASE) + evt; | ||
105 | IMX_TCMP(TIMER_BASE) = tcmp; | ||
106 | |||
107 | return (int32_t)(tcmp - IMX_TCN(TIMER_BASE)) < 0 ? -ETIME : 0; | ||
108 | } | ||
109 | |||
110 | #ifdef DEBUG | ||
111 | static const char *clock_event_mode_label[]={ | ||
112 | [CLOCK_EVT_MODE_PERIODIC] = "CLOCK_EVT_MODE_PERIODIC", | ||
113 | [CLOCK_EVT_MODE_ONESHOT] = "CLOCK_EVT_MODE_ONESHOT", | ||
114 | [CLOCK_EVT_MODE_SHUTDOWN] = "CLOCK_EVT_MODE_SHUTDOWN", | ||
115 | [CLOCK_EVT_MODE_UNUSED] = "CLOCK_EVT_MODE_UNUSED" | ||
116 | }; | ||
117 | #endif /*DEBUG*/ | ||
118 | |||
119 | static void imx_set_mode(enum clock_event_mode mode, struct clock_event_device *evt) | ||
120 | { | ||
121 | unsigned long flags; | ||
122 | |||
123 | /* | ||
124 | * The timer interrupt generation is disabled at least | ||
125 | * for enough time to call imx_set_next_event() | ||
126 | */ | ||
127 | local_irq_save(flags); | ||
128 | /* Disable interrupt in GPT module */ | ||
129 | IMX_TCTL(TIMER_BASE) &= ~TCTL_IRQEN; | ||
130 | if (mode != clockevent_mode) { | ||
131 | /* Set event time into far-far future */ | ||
132 | IMX_TCMP(TIMER_BASE) = IMX_TCN(TIMER_BASE) - 3; | ||
133 | /* Clear pending interrupt */ | ||
134 | IMX_TSTAT(TIMER_BASE) &= ~TSTAT_COMP; | ||
135 | } | ||
136 | |||
137 | #ifdef DEBUG | ||
138 | printk(KERN_INFO "imx_set_mode: changing mode from %s to %s\n", | ||
139 | clock_event_mode_label[clockevent_mode], clock_event_mode_label[mode]); | ||
140 | #endif /*DEBUG*/ | ||
141 | |||
142 | /* Remember timer mode */ | ||
143 | clockevent_mode = mode; | ||
144 | local_irq_restore(flags); | ||
145 | |||
146 | switch (mode) { | ||
147 | case CLOCK_EVT_MODE_PERIODIC: | ||
148 | printk(KERN_ERR "imx_set_mode: Periodic mode is not supported for i.MX\n"); | ||
149 | break; | ||
150 | case CLOCK_EVT_MODE_ONESHOT: | ||
151 | /* | ||
152 | * Do not put overhead of interrupt enable/disable into | ||
153 | * imx_set_next_event(), the core has about 4 minutes | ||
154 | * to call imx_set_next_event() or shutdown clock after | ||
155 | * mode switching | ||
156 | */ | ||
157 | local_irq_save(flags); | ||
158 | IMX_TCTL(TIMER_BASE) |= TCTL_IRQEN; | ||
159 | local_irq_restore(flags); | ||
160 | break; | ||
161 | case CLOCK_EVT_MODE_SHUTDOWN: | ||
162 | case CLOCK_EVT_MODE_UNUSED: | ||
163 | case CLOCK_EVT_MODE_RESUME: | ||
164 | /* Left event sources disabled, no more interrupts appears */ | ||
165 | break; | ||
166 | } | ||
167 | } | ||
168 | |||
169 | static struct clock_event_device clockevent_imx = { | ||
170 | .name = "imx_timer1", | ||
171 | .features = CLOCK_EVT_FEAT_ONESHOT, | ||
172 | .shift = 32, | ||
173 | .set_mode = imx_set_mode, | ||
174 | .set_next_event = imx_set_next_event, | ||
175 | .rating = 200, | ||
176 | }; | ||
177 | |||
178 | static int __init imx_clockevent_init(unsigned long rate) | ||
179 | { | ||
180 | clockevent_imx.mult = div_sc(rate, NSEC_PER_SEC, | ||
181 | clockevent_imx.shift); | ||
182 | clockevent_imx.max_delta_ns = | ||
183 | clockevent_delta2ns(0xfffffffe, &clockevent_imx); | ||
184 | clockevent_imx.min_delta_ns = | ||
185 | clockevent_delta2ns(0xf, &clockevent_imx); | ||
186 | |||
187 | clockevent_imx.cpumask = cpumask_of(0); | ||
188 | |||
189 | clockevents_register_device(&clockevent_imx); | ||
190 | |||
191 | return 0; | ||
192 | } | ||
193 | |||
194 | extern int imx_clocks_init(void); | ||
195 | |||
196 | static void __init imx_timer_init(void) | ||
197 | { | ||
198 | struct clk *clk; | ||
199 | unsigned long rate; | ||
200 | |||
201 | imx_clocks_init(); | ||
202 | |||
203 | clk = clk_get(NULL, "perclk1"); | ||
204 | clk_enable(clk); | ||
205 | rate = clk_get_rate(clk); | ||
206 | |||
207 | imx_timer_hardware_init(); | ||
208 | imx_clocksource_init(rate); | ||
209 | |||
210 | imx_clockevent_init(rate); | ||
211 | |||
212 | /* | ||
213 | * Make irqs happen for the system timer | ||
214 | */ | ||
215 | setup_irq(TIM1_INT, &imx_timer_irq); | ||
216 | } | ||
217 | |||
218 | struct sys_timer imx_timer = { | ||
219 | .init = imx_timer_init, | ||
220 | }; | ||
diff --git a/arch/arm/mach-mx1/generic.c b/arch/arm/mach-mx1/generic.c index 0dec6f300ffc..7622c9b38c97 100644 --- a/arch/arm/mach-mx1/generic.c +++ b/arch/arm/mach-mx1/generic.c | |||
@@ -26,6 +26,7 @@ | |||
26 | 26 | ||
27 | #include <asm/mach/map.h> | 27 | #include <asm/mach/map.h> |
28 | 28 | ||
29 | #include <mach/common.h> | ||
29 | #include <mach/hardware.h> | 30 | #include <mach/hardware.h> |
30 | 31 | ||
31 | static struct map_desc imx_io_desc[] __initdata = { | 32 | static struct map_desc imx_io_desc[] __initdata = { |
@@ -37,7 +38,9 @@ static struct map_desc imx_io_desc[] __initdata = { | |||
37 | } | 38 | } |
38 | }; | 39 | }; |
39 | 40 | ||
40 | void __init mxc_map_io(void) | 41 | void __init mx1_map_io(void) |
41 | { | 42 | { |
43 | mxc_set_cpu_type(MXC_CPU_MX1); | ||
44 | |||
42 | iotable_init(imx_io_desc, ARRAY_SIZE(imx_io_desc)); | 45 | iotable_init(imx_io_desc, ARRAY_SIZE(imx_io_desc)); |
43 | } | 46 | } |
diff --git a/arch/arm/mach-mx1/mx1ads.c b/arch/arm/mach-mx1/mx1ads.c index e54057fb855b..e5b0c0a83c3b 100644 --- a/arch/arm/mach-mx1/mx1ads.c +++ b/arch/arm/mach-mx1/mx1ads.c | |||
@@ -12,77 +12,56 @@ | |||
12 | * warranty of any kind, whether express or implied. | 12 | * warranty of any kind, whether express or implied. |
13 | */ | 13 | */ |
14 | 14 | ||
15 | #include <linux/kernel.h> | 15 | #include <linux/i2c.h> |
16 | #include <linux/i2c/pcf857x.h> | ||
16 | #include <linux/init.h> | 17 | #include <linux/init.h> |
18 | #include <linux/kernel.h> | ||
17 | #include <linux/platform_device.h> | 19 | #include <linux/platform_device.h> |
18 | #include <linux/mtd/physmap.h> | 20 | #include <linux/mtd/physmap.h> |
19 | #include <linux/i2c.h> | ||
20 | #include <linux/i2c/pcf857x.h> | ||
21 | 21 | ||
22 | #include <asm/mach-types.h> | 22 | #include <asm/mach-types.h> |
23 | #include <asm/mach/arch.h> | 23 | #include <asm/mach/arch.h> |
24 | #include <asm/mach/time.h> | 24 | #include <asm/mach/time.h> |
25 | 25 | ||
26 | #include <mach/irqs.h> | ||
27 | #include <mach/hardware.h> | ||
28 | #include <mach/common.h> | 26 | #include <mach/common.h> |
29 | #include <mach/imx-uart.h> | 27 | #include <mach/hardware.h> |
30 | #include <mach/irqs.h> | ||
31 | #include <mach/i2c.h> | 28 | #include <mach/i2c.h> |
29 | #include <mach/imx-uart.h> | ||
32 | #include <mach/iomux.h> | 30 | #include <mach/iomux.h> |
31 | #include <mach/irqs.h> | ||
32 | |||
33 | #include "devices.h" | 33 | #include "devices.h" |
34 | 34 | ||
35 | /* | 35 | static int mx1ads_pins[] = { |
36 | * UARTs platform data | 36 | /* UART1 */ |
37 | */ | ||
38 | static int mxc_uart1_pins[] = { | ||
39 | PC9_PF_UART1_CTS, | 37 | PC9_PF_UART1_CTS, |
40 | PC10_PF_UART1_RTS, | 38 | PC10_PF_UART1_RTS, |
41 | PC11_PF_UART1_TXD, | 39 | PC11_PF_UART1_TXD, |
42 | PC12_PF_UART1_RXD, | 40 | PC12_PF_UART1_RXD, |
43 | }; | 41 | /* UART2 */ |
44 | |||
45 | static int uart1_mxc_init(struct platform_device *pdev) | ||
46 | { | ||
47 | return mxc_gpio_setup_multiple_pins(mxc_uart1_pins, | ||
48 | ARRAY_SIZE(mxc_uart1_pins), "UART1"); | ||
49 | } | ||
50 | |||
51 | static int uart1_mxc_exit(struct platform_device *pdev) | ||
52 | { | ||
53 | mxc_gpio_release_multiple_pins(mxc_uart1_pins, | ||
54 | ARRAY_SIZE(mxc_uart1_pins)); | ||
55 | return 0; | ||
56 | } | ||
57 | |||
58 | static int mxc_uart2_pins[] = { | ||
59 | PB28_PF_UART2_CTS, | 42 | PB28_PF_UART2_CTS, |
60 | PB29_PF_UART2_RTS, | 43 | PB29_PF_UART2_RTS, |
61 | PB30_PF_UART2_TXD, | 44 | PB30_PF_UART2_TXD, |
62 | PB31_PF_UART2_RXD, | 45 | PB31_PF_UART2_RXD, |
46 | /* I2C */ | ||
47 | PA15_PF_I2C_SDA, | ||
48 | PA16_PF_I2C_SCL, | ||
49 | /* SPI */ | ||
50 | PC13_PF_SPI1_SPI_RDY, | ||
51 | PC14_PF_SPI1_SCLK, | ||
52 | PC15_PF_SPI1_SS, | ||
53 | PC16_PF_SPI1_MISO, | ||
54 | PC17_PF_SPI1_MOSI, | ||
63 | }; | 55 | }; |
64 | 56 | ||
65 | static int uart2_mxc_init(struct platform_device *pdev) | 57 | /* |
66 | { | 58 | * UARTs platform data |
67 | return mxc_gpio_setup_multiple_pins(mxc_uart2_pins, | 59 | */ |
68 | ARRAY_SIZE(mxc_uart2_pins), "UART2"); | ||
69 | } | ||
70 | |||
71 | static int uart2_mxc_exit(struct platform_device *pdev) | ||
72 | { | ||
73 | mxc_gpio_release_multiple_pins(mxc_uart2_pins, | ||
74 | ARRAY_SIZE(mxc_uart2_pins)); | ||
75 | return 0; | ||
76 | } | ||
77 | 60 | ||
78 | static struct imxuart_platform_data uart_pdata[] = { | 61 | static struct imxuart_platform_data uart_pdata[] = { |
79 | { | 62 | { |
80 | .init = uart1_mxc_init, | ||
81 | .exit = uart1_mxc_exit, | ||
82 | .flags = IMXUART_HAVE_RTSCTS, | 63 | .flags = IMXUART_HAVE_RTSCTS, |
83 | }, { | 64 | }, { |
84 | .init = uart2_mxc_init, | ||
85 | .exit = uart2_mxc_exit, | ||
86 | .flags = IMXUART_HAVE_RTSCTS, | 65 | .flags = IMXUART_HAVE_RTSCTS, |
87 | }, | 66 | }, |
88 | }; | 67 | }; |
@@ -111,24 +90,6 @@ static struct platform_device flash_device = { | |||
111 | /* | 90 | /* |
112 | * I2C | 91 | * I2C |
113 | */ | 92 | */ |
114 | |||
115 | static int i2c_pins[] = { | ||
116 | PA15_PF_I2C_SDA, | ||
117 | PA16_PF_I2C_SCL, | ||
118 | }; | ||
119 | |||
120 | static int i2c_init(struct device *dev) | ||
121 | { | ||
122 | return mxc_gpio_setup_multiple_pins(i2c_pins, | ||
123 | ARRAY_SIZE(i2c_pins), "I2C"); | ||
124 | } | ||
125 | |||
126 | static void i2c_exit(struct device *dev) | ||
127 | { | ||
128 | mxc_gpio_release_multiple_pins(i2c_pins, | ||
129 | ARRAY_SIZE(i2c_pins)); | ||
130 | } | ||
131 | |||
132 | static struct pcf857x_platform_data pcf857x_data[] = { | 93 | static struct pcf857x_platform_data pcf857x_data[] = { |
133 | { | 94 | { |
134 | .gpio_base = 4 * 32, | 95 | .gpio_base = 4 * 32, |
@@ -139,8 +100,6 @@ static struct pcf857x_platform_data pcf857x_data[] = { | |||
139 | 100 | ||
140 | static struct imxi2c_platform_data mx1ads_i2c_data = { | 101 | static struct imxi2c_platform_data mx1ads_i2c_data = { |
141 | .bitrate = 100000, | 102 | .bitrate = 100000, |
142 | .init = i2c_init, | ||
143 | .exit = i2c_exit, | ||
144 | }; | 103 | }; |
145 | 104 | ||
146 | static struct i2c_board_info mx1ads_i2c_devices[] = { | 105 | static struct i2c_board_info mx1ads_i2c_devices[] = { |
@@ -160,6 +119,9 @@ static struct i2c_board_info mx1ads_i2c_devices[] = { | |||
160 | */ | 119 | */ |
161 | static void __init mx1ads_init(void) | 120 | static void __init mx1ads_init(void) |
162 | { | 121 | { |
122 | mxc_gpio_setup_multiple_pins(mx1ads_pins, | ||
123 | ARRAY_SIZE(mx1ads_pins), "mx1ads"); | ||
124 | |||
163 | /* UART */ | 125 | /* UART */ |
164 | mxc_register_device(&imx_uart1_device, &uart_pdata[0]); | 126 | mxc_register_device(&imx_uart1_device, &uart_pdata[0]); |
165 | mxc_register_device(&imx_uart2_device, &uart_pdata[1]); | 127 | mxc_register_device(&imx_uart2_device, &uart_pdata[1]); |
@@ -188,7 +150,7 @@ MACHINE_START(MX1ADS, "Freescale MX1ADS") | |||
188 | .phys_io = IMX_IO_PHYS, | 150 | .phys_io = IMX_IO_PHYS, |
189 | .io_pg_offst = (IMX_IO_BASE >> 18) & 0xfffc, | 151 | .io_pg_offst = (IMX_IO_BASE >> 18) & 0xfffc, |
190 | .boot_params = PHYS_OFFSET + 0x100, | 152 | .boot_params = PHYS_OFFSET + 0x100, |
191 | .map_io = mxc_map_io, | 153 | .map_io = mx1_map_io, |
192 | .init_irq = mxc_init_irq, | 154 | .init_irq = mxc_init_irq, |
193 | .timer = &mx1ads_timer, | 155 | .timer = &mx1ads_timer, |
194 | .init_machine = mx1ads_init, | 156 | .init_machine = mx1ads_init, |
@@ -198,7 +160,7 @@ MACHINE_START(MXLADS, "Freescale MXLADS") | |||
198 | .phys_io = IMX_IO_PHYS, | 160 | .phys_io = IMX_IO_PHYS, |
199 | .io_pg_offst = (IMX_IO_BASE >> 18) & 0xfffc, | 161 | .io_pg_offst = (IMX_IO_BASE >> 18) & 0xfffc, |
200 | .boot_params = PHYS_OFFSET + 0x100, | 162 | .boot_params = PHYS_OFFSET + 0x100, |
201 | .map_io = mxc_map_io, | 163 | .map_io = mx1_map_io, |
202 | .init_irq = mxc_init_irq, | 164 | .init_irq = mxc_init_irq, |
203 | .timer = &mx1ads_timer, | 165 | .timer = &mx1ads_timer, |
204 | .init_machine = mx1ads_init, | 166 | .init_machine = mx1ads_init, |
diff --git a/arch/arm/mach-mx1/scb9328.c b/arch/arm/mach-mx1/scb9328.c index 0e71f3fa28bf..20e0b5bcdffc 100644 --- a/arch/arm/mach-mx1/scb9328.c +++ b/arch/arm/mach-mx1/scb9328.c | |||
@@ -153,7 +153,7 @@ MACHINE_START(SCB9328, "Synertronixx scb9328") | |||
153 | .phys_io = 0x00200000, | 153 | .phys_io = 0x00200000, |
154 | .io_pg_offst = ((0xe0200000) >> 18) & 0xfffc, | 154 | .io_pg_offst = ((0xe0200000) >> 18) & 0xfffc, |
155 | .boot_params = 0x08000100, | 155 | .boot_params = 0x08000100, |
156 | .map_io = mxc_map_io, | 156 | .map_io = mx1_map_io, |
157 | .init_irq = mxc_init_irq, | 157 | .init_irq = mxc_init_irq, |
158 | .timer = &scb9328_timer, | 158 | .timer = &scb9328_timer, |
159 | .init_machine = scb9328_init, | 159 | .init_machine = scb9328_init, |
diff --git a/arch/arm/mach-mx2/Kconfig b/arch/arm/mach-mx2/Kconfig index 42a788842f49..61550443a233 100644 --- a/arch/arm/mach-mx2/Kconfig +++ b/arch/arm/mach-mx2/Kconfig | |||
@@ -18,6 +18,13 @@ endchoice | |||
18 | 18 | ||
19 | comment "MX2 platforms:" | 19 | comment "MX2 platforms:" |
20 | 20 | ||
21 | config MACH_MX21ADS | ||
22 | bool "MX21ADS platform" | ||
23 | depends on MACH_MX21 | ||
24 | help | ||
25 | Include support for MX21ADS platform. This includes specific | ||
26 | configurations for the board and its peripherals. | ||
27 | |||
21 | config MACH_MX27ADS | 28 | config MACH_MX27ADS |
22 | bool "MX27ADS platform" | 29 | bool "MX27ADS platform" |
23 | depends on MACH_MX27 | 30 | depends on MACH_MX27 |
@@ -46,4 +53,10 @@ config MACH_PCM970_BASEBOARD | |||
46 | 53 | ||
47 | endchoice | 54 | endchoice |
48 | 55 | ||
56 | config MACH_MX27_3DS | ||
57 | bool "MX27PDK platform" | ||
58 | depends on MACH_MX27 | ||
59 | help | ||
60 | Include support for MX27PDK platform. This includes specific | ||
61 | configurations for the board and its peripherals. | ||
49 | endif | 62 | endif |
diff --git a/arch/arm/mach-mx2/Makefile b/arch/arm/mach-mx2/Makefile index 950649a91540..d140e2dcf942 100644 --- a/arch/arm/mach-mx2/Makefile +++ b/arch/arm/mach-mx2/Makefile | |||
@@ -11,6 +11,8 @@ obj-$(CONFIG_MACH_MX21) += clock_imx21.o | |||
11 | obj-$(CONFIG_MACH_MX27) += cpu_imx27.o | 11 | obj-$(CONFIG_MACH_MX27) += cpu_imx27.o |
12 | obj-$(CONFIG_MACH_MX27) += clock_imx27.o | 12 | obj-$(CONFIG_MACH_MX27) += clock_imx27.o |
13 | 13 | ||
14 | obj-$(CONFIG_MACH_MX21ADS) += mx21ads.o | ||
14 | obj-$(CONFIG_MACH_MX27ADS) += mx27ads.o | 15 | obj-$(CONFIG_MACH_MX27ADS) += mx27ads.o |
15 | obj-$(CONFIG_MACH_PCM038) += pcm038.o | 16 | obj-$(CONFIG_MACH_PCM038) += pcm038.o |
16 | obj-$(CONFIG_MACH_PCM970_BASEBOARD) += pcm970-baseboard.o | 17 | obj-$(CONFIG_MACH_PCM970_BASEBOARD) += pcm970-baseboard.o |
18 | obj-$(CONFIG_MACH_MX27_3DS) += mx27pdk.o | ||
diff --git a/arch/arm/mach-mx2/generic.c b/arch/arm/mach-mx2/generic.c index bd51dd04948e..169372f69d8f 100644 --- a/arch/arm/mach-mx2/generic.c +++ b/arch/arm/mach-mx2/generic.c | |||
@@ -69,7 +69,17 @@ static struct map_desc mxc_io_desc[] __initdata = { | |||
69 | * system startup to create static physical to virtual | 69 | * system startup to create static physical to virtual |
70 | * memory map for the IO modules. | 70 | * memory map for the IO modules. |
71 | */ | 71 | */ |
72 | void __init mxc_map_io(void) | 72 | void __init mx21_map_io(void) |
73 | { | 73 | { |
74 | mxc_set_cpu_type(MXC_CPU_MX21); | ||
75 | |||
74 | iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); | 76 | iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); |
75 | } | 77 | } |
78 | |||
79 | void __init mx27_map_io(void) | ||
80 | { | ||
81 | mxc_set_cpu_type(MXC_CPU_MX27); | ||
82 | |||
83 | iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); | ||
84 | } | ||
85 | |||
diff --git a/arch/arm/mach-mx2/mx21ads.c b/arch/arm/mach-mx2/mx21ads.c new file mode 100644 index 000000000000..a5ee461cb405 --- /dev/null +++ b/arch/arm/mach-mx2/mx21ads.c | |||
@@ -0,0 +1,286 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2000 Deep Blue Solutions Ltd | ||
3 | * Copyright (C) 2002 Shane Nay (shane@minirl.com) | ||
4 | * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | |||
21 | #include <linux/platform_device.h> | ||
22 | #include <linux/mtd/mtd.h> | ||
23 | #include <linux/mtd/physmap.h> | ||
24 | #include <linux/gpio.h> | ||
25 | #include <mach/common.h> | ||
26 | #include <mach/hardware.h> | ||
27 | #include <asm/mach-types.h> | ||
28 | #include <asm/mach/arch.h> | ||
29 | #include <asm/mach/time.h> | ||
30 | #include <asm/mach/map.h> | ||
31 | #include <mach/imx-uart.h> | ||
32 | #include <mach/imxfb.h> | ||
33 | #include <mach/iomux.h> | ||
34 | #include <mach/mxc_nand.h> | ||
35 | #include <mach/mmc.h> | ||
36 | #include <mach/board-mx21ads.h> | ||
37 | |||
38 | #include "devices.h" | ||
39 | |||
40 | static unsigned int mx21ads_pins[] = { | ||
41 | |||
42 | /* CS8900A */ | ||
43 | (GPIO_PORTE | GPIO_GPIO | GPIO_IN | 11), | ||
44 | |||
45 | /* UART1 */ | ||
46 | PE12_PF_UART1_TXD, | ||
47 | PE13_PF_UART1_RXD, | ||
48 | PE14_PF_UART1_CTS, | ||
49 | PE15_PF_UART1_RTS, | ||
50 | |||
51 | /* UART3 (IrDA) - only TXD and RXD */ | ||
52 | PE8_PF_UART3_TXD, | ||
53 | PE9_PF_UART3_RXD, | ||
54 | |||
55 | /* UART4 */ | ||
56 | PB26_AF_UART4_RTS, | ||
57 | PB28_AF_UART4_TXD, | ||
58 | PB29_AF_UART4_CTS, | ||
59 | PB31_AF_UART4_RXD, | ||
60 | |||
61 | /* LCDC */ | ||
62 | PA5_PF_LSCLK, | ||
63 | PA6_PF_LD0, | ||
64 | PA7_PF_LD1, | ||
65 | PA8_PF_LD2, | ||
66 | PA9_PF_LD3, | ||
67 | PA10_PF_LD4, | ||
68 | PA11_PF_LD5, | ||
69 | PA12_PF_LD6, | ||
70 | PA13_PF_LD7, | ||
71 | PA14_PF_LD8, | ||
72 | PA15_PF_LD9, | ||
73 | PA16_PF_LD10, | ||
74 | PA17_PF_LD11, | ||
75 | PA18_PF_LD12, | ||
76 | PA19_PF_LD13, | ||
77 | PA20_PF_LD14, | ||
78 | PA21_PF_LD15, | ||
79 | PA22_PF_LD16, | ||
80 | PA24_PF_REV, /* Sharp panel dedicated signal */ | ||
81 | PA25_PF_CLS, /* Sharp panel dedicated signal */ | ||
82 | PA26_PF_PS, /* Sharp panel dedicated signal */ | ||
83 | PA27_PF_SPL_SPR, /* Sharp panel dedicated signal */ | ||
84 | PA28_PF_HSYNC, | ||
85 | PA29_PF_VSYNC, | ||
86 | PA30_PF_CONTRAST, | ||
87 | PA31_PF_OE_ACD, | ||
88 | |||
89 | /* MMC/SDHC */ | ||
90 | PE18_PF_SD1_D0, | ||
91 | PE19_PF_SD1_D1, | ||
92 | PE20_PF_SD1_D2, | ||
93 | PE21_PF_SD1_D3, | ||
94 | PE22_PF_SD1_CMD, | ||
95 | PE23_PF_SD1_CLK, | ||
96 | |||
97 | /* NFC */ | ||
98 | PF0_PF_NRFB, | ||
99 | PF1_PF_NFCE, | ||
100 | PF2_PF_NFWP, | ||
101 | PF3_PF_NFCLE, | ||
102 | PF4_PF_NFALE, | ||
103 | PF5_PF_NFRE, | ||
104 | PF6_PF_NFWE, | ||
105 | PF7_PF_NFIO0, | ||
106 | PF8_PF_NFIO1, | ||
107 | PF9_PF_NFIO2, | ||
108 | PF10_PF_NFIO3, | ||
109 | PF11_PF_NFIO4, | ||
110 | PF12_PF_NFIO5, | ||
111 | PF13_PF_NFIO6, | ||
112 | PF14_PF_NFIO7, | ||
113 | }; | ||
114 | |||
115 | /* ADS's NOR flash: 2x AM29BDS128HE9VKI on 32-bit bus */ | ||
116 | static struct physmap_flash_data mx21ads_flash_data = { | ||
117 | .width = 4, | ||
118 | }; | ||
119 | |||
120 | static struct resource mx21ads_flash_resource = { | ||
121 | .start = CS0_BASE_ADDR, | ||
122 | .end = CS0_BASE_ADDR + 0x02000000 - 1, | ||
123 | .flags = IORESOURCE_MEM, | ||
124 | }; | ||
125 | |||
126 | static struct platform_device mx21ads_nor_mtd_device = { | ||
127 | .name = "physmap-flash", | ||
128 | .id = 0, | ||
129 | .dev = { | ||
130 | .platform_data = &mx21ads_flash_data, | ||
131 | }, | ||
132 | .num_resources = 1, | ||
133 | .resource = &mx21ads_flash_resource, | ||
134 | }; | ||
135 | |||
136 | static struct imxuart_platform_data uart_pdata = { | ||
137 | .flags = IMXUART_HAVE_RTSCTS, | ||
138 | }; | ||
139 | |||
140 | static struct imxuart_platform_data uart_norts_pdata = { | ||
141 | }; | ||
142 | |||
143 | |||
144 | static int mx21ads_fb_init(struct platform_device *pdev) | ||
145 | { | ||
146 | u16 tmp; | ||
147 | |||
148 | tmp = __raw_readw(MX21ADS_IO_REG); | ||
149 | tmp |= MX21ADS_IO_LCDON; | ||
150 | __raw_writew(tmp, MX21ADS_IO_REG); | ||
151 | return 0; | ||
152 | } | ||
153 | |||
154 | static void mx21ads_fb_exit(struct platform_device *pdev) | ||
155 | { | ||
156 | u16 tmp; | ||
157 | |||
158 | tmp = __raw_readw(MX21ADS_IO_REG); | ||
159 | tmp &= ~MX21ADS_IO_LCDON; | ||
160 | __raw_writew(tmp, MX21ADS_IO_REG); | ||
161 | } | ||
162 | |||
163 | /* | ||
164 | * Connected is a portrait Sharp-QVGA display | ||
165 | * of type: LQ035Q7DB02 | ||
166 | */ | ||
167 | static struct imx_fb_platform_data mx21ads_fb_data = { | ||
168 | .pixclock = 188679, /* in ps */ | ||
169 | .xres = 240, | ||
170 | .yres = 320, | ||
171 | |||
172 | .bpp = 16, | ||
173 | .hsync_len = 2, | ||
174 | .left_margin = 6, | ||
175 | .right_margin = 16, | ||
176 | |||
177 | .vsync_len = 1, | ||
178 | .upper_margin = 8, | ||
179 | .lower_margin = 10, | ||
180 | .fixed_screen_cpu = 0, | ||
181 | |||
182 | .pcr = 0xFB108BC7, | ||
183 | .pwmr = 0x00A901ff, | ||
184 | .lscr1 = 0x00120300, | ||
185 | .dmacr = 0x00020008, | ||
186 | |||
187 | .init = mx21ads_fb_init, | ||
188 | .exit = mx21ads_fb_exit, | ||
189 | }; | ||
190 | |||
191 | static int mx21ads_sdhc_get_ro(struct device *dev) | ||
192 | { | ||
193 | return (__raw_readw(MX21ADS_IO_REG) & MX21ADS_IO_SD_WP) ? 1 : 0; | ||
194 | } | ||
195 | |||
196 | static int mx21ads_sdhc_init(struct device *dev, irq_handler_t detect_irq, | ||
197 | void *data) | ||
198 | { | ||
199 | int ret; | ||
200 | |||
201 | ret = request_irq(IRQ_GPIOD(25), detect_irq, | ||
202 | IRQF_TRIGGER_FALLING, "mmc-detect", data); | ||
203 | if (ret) | ||
204 | goto out; | ||
205 | return 0; | ||
206 | out: | ||
207 | return ret; | ||
208 | } | ||
209 | |||
210 | static void mx21ads_sdhc_exit(struct device *dev, void *data) | ||
211 | { | ||
212 | free_irq(IRQ_GPIOD(25), data); | ||
213 | } | ||
214 | |||
215 | static struct imxmmc_platform_data mx21ads_sdhc_pdata = { | ||
216 | .ocr_avail = MMC_VDD_29_30 | MMC_VDD_30_31, /* 3.0V */ | ||
217 | .get_ro = mx21ads_sdhc_get_ro, | ||
218 | .init = mx21ads_sdhc_init, | ||
219 | .exit = mx21ads_sdhc_exit, | ||
220 | }; | ||
221 | |||
222 | static struct mxc_nand_platform_data mx21ads_nand_board_info = { | ||
223 | .width = 1, | ||
224 | .hw_ecc = 1, | ||
225 | }; | ||
226 | |||
227 | static struct map_desc mx21ads_io_desc[] __initdata = { | ||
228 | /* | ||
229 | * Memory-mapped I/O on MX21ADS Base board: | ||
230 | * - CS8900A Ethernet controller | ||
231 | * - ST16C2552CJ UART | ||
232 | * - CPU and Base board version | ||
233 | * - Base board I/O register | ||
234 | */ | ||
235 | { | ||
236 | .virtual = MX21ADS_MMIO_BASE_ADDR, | ||
237 | .pfn = __phys_to_pfn(CS1_BASE_ADDR), | ||
238 | .length = MX21ADS_MMIO_SIZE, | ||
239 | .type = MT_DEVICE, | ||
240 | }, | ||
241 | }; | ||
242 | |||
243 | static void __init mx21ads_map_io(void) | ||
244 | { | ||
245 | mx21_map_io(); | ||
246 | iotable_init(mx21ads_io_desc, ARRAY_SIZE(mx21ads_io_desc)); | ||
247 | } | ||
248 | |||
249 | static struct platform_device *platform_devices[] __initdata = { | ||
250 | &mx21ads_nor_mtd_device, | ||
251 | }; | ||
252 | |||
253 | static void __init mx21ads_board_init(void) | ||
254 | { | ||
255 | mxc_gpio_setup_multiple_pins(mx21ads_pins, ARRAY_SIZE(mx21ads_pins), | ||
256 | "mx21ads"); | ||
257 | |||
258 | mxc_register_device(&mxc_uart_device0, &uart_pdata); | ||
259 | mxc_register_device(&mxc_uart_device2, &uart_norts_pdata); | ||
260 | mxc_register_device(&mxc_uart_device3, &uart_pdata); | ||
261 | mxc_register_device(&mxc_fb_device, &mx21ads_fb_data); | ||
262 | mxc_register_device(&mxc_sdhc_device0, &mx21ads_sdhc_pdata); | ||
263 | mxc_register_device(&mxc_nand_device, &mx21ads_nand_board_info); | ||
264 | |||
265 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); | ||
266 | } | ||
267 | |||
268 | static void __init mx21ads_timer_init(void) | ||
269 | { | ||
270 | mx21_clocks_init(32768, 26000000); | ||
271 | } | ||
272 | |||
273 | static struct sys_timer mx21ads_timer = { | ||
274 | .init = mx21ads_timer_init, | ||
275 | }; | ||
276 | |||
277 | MACHINE_START(MX21ADS, "Freescale i.MX21ADS") | ||
278 | /* maintainer: Freescale Semiconductor, Inc. */ | ||
279 | .phys_io = AIPI_BASE_ADDR, | ||
280 | .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, | ||
281 | .boot_params = PHYS_OFFSET + 0x100, | ||
282 | .map_io = mx21ads_map_io, | ||
283 | .init_irq = mxc_init_irq, | ||
284 | .init_machine = mx21ads_board_init, | ||
285 | .timer = &mx21ads_timer, | ||
286 | MACHINE_END | ||
diff --git a/arch/arm/mach-mx2/mx27ads.c b/arch/arm/mach-mx2/mx27ads.c index 4a3b097adc12..02daddac6995 100644 --- a/arch/arm/mach-mx2/mx27ads.c +++ b/arch/arm/mach-mx2/mx27ads.c | |||
@@ -23,6 +23,8 @@ | |||
23 | #include <linux/mtd/map.h> | 23 | #include <linux/mtd/map.h> |
24 | #include <linux/mtd/partitions.h> | 24 | #include <linux/mtd/partitions.h> |
25 | #include <linux/mtd/physmap.h> | 25 | #include <linux/mtd/physmap.h> |
26 | #include <linux/i2c.h> | ||
27 | #include <linux/irq.h> | ||
26 | #include <mach/common.h> | 28 | #include <mach/common.h> |
27 | #include <mach/hardware.h> | 29 | #include <mach/hardware.h> |
28 | #include <asm/mach-types.h> | 30 | #include <asm/mach-types.h> |
@@ -33,9 +35,117 @@ | |||
33 | #include <mach/imx-uart.h> | 35 | #include <mach/imx-uart.h> |
34 | #include <mach/iomux.h> | 36 | #include <mach/iomux.h> |
35 | #include <mach/board-mx27ads.h> | 37 | #include <mach/board-mx27ads.h> |
38 | #include <mach/mxc_nand.h> | ||
39 | #include <mach/i2c.h> | ||
40 | #include <mach/imxfb.h> | ||
41 | #include <mach/mmc.h> | ||
36 | 42 | ||
37 | #include "devices.h" | 43 | #include "devices.h" |
38 | 44 | ||
45 | static unsigned int mx27ads_pins[] = { | ||
46 | /* UART0 */ | ||
47 | PE12_PF_UART1_TXD, | ||
48 | PE13_PF_UART1_RXD, | ||
49 | PE14_PF_UART1_CTS, | ||
50 | PE15_PF_UART1_RTS, | ||
51 | /* UART1 */ | ||
52 | PE3_PF_UART2_CTS, | ||
53 | PE4_PF_UART2_RTS, | ||
54 | PE6_PF_UART2_TXD, | ||
55 | PE7_PF_UART2_RXD, | ||
56 | /* UART2 */ | ||
57 | PE8_PF_UART3_TXD, | ||
58 | PE9_PF_UART3_RXD, | ||
59 | PE10_PF_UART3_CTS, | ||
60 | PE11_PF_UART3_RTS, | ||
61 | /* UART3 */ | ||
62 | PB26_AF_UART4_RTS, | ||
63 | PB28_AF_UART4_TXD, | ||
64 | PB29_AF_UART4_CTS, | ||
65 | PB31_AF_UART4_RXD, | ||
66 | /* UART4 */ | ||
67 | PB18_AF_UART5_TXD, | ||
68 | PB19_AF_UART5_RXD, | ||
69 | PB20_AF_UART5_CTS, | ||
70 | PB21_AF_UART5_RTS, | ||
71 | /* UART5 */ | ||
72 | PB10_AF_UART6_TXD, | ||
73 | PB12_AF_UART6_CTS, | ||
74 | PB11_AF_UART6_RXD, | ||
75 | PB13_AF_UART6_RTS, | ||
76 | /* FEC */ | ||
77 | PD0_AIN_FEC_TXD0, | ||
78 | PD1_AIN_FEC_TXD1, | ||
79 | PD2_AIN_FEC_TXD2, | ||
80 | PD3_AIN_FEC_TXD3, | ||
81 | PD4_AOUT_FEC_RX_ER, | ||
82 | PD5_AOUT_FEC_RXD1, | ||
83 | PD6_AOUT_FEC_RXD2, | ||
84 | PD7_AOUT_FEC_RXD3, | ||
85 | PD8_AF_FEC_MDIO, | ||
86 | PD9_AIN_FEC_MDC, | ||
87 | PD10_AOUT_FEC_CRS, | ||
88 | PD11_AOUT_FEC_TX_CLK, | ||
89 | PD12_AOUT_FEC_RXD0, | ||
90 | PD13_AOUT_FEC_RX_DV, | ||
91 | PD14_AOUT_FEC_RX_CLK, | ||
92 | PD15_AOUT_FEC_COL, | ||
93 | PD16_AIN_FEC_TX_ER, | ||
94 | PF23_AIN_FEC_TX_EN, | ||
95 | /* I2C2 */ | ||
96 | PC5_PF_I2C2_SDA, | ||
97 | PC6_PF_I2C2_SCL, | ||
98 | /* FB */ | ||
99 | PA5_PF_LSCLK, | ||
100 | PA6_PF_LD0, | ||
101 | PA7_PF_LD1, | ||
102 | PA8_PF_LD2, | ||
103 | PA9_PF_LD3, | ||
104 | PA10_PF_LD4, | ||
105 | PA11_PF_LD5, | ||
106 | PA12_PF_LD6, | ||
107 | PA13_PF_LD7, | ||
108 | PA14_PF_LD8, | ||
109 | PA15_PF_LD9, | ||
110 | PA16_PF_LD10, | ||
111 | PA17_PF_LD11, | ||
112 | PA18_PF_LD12, | ||
113 | PA19_PF_LD13, | ||
114 | PA20_PF_LD14, | ||
115 | PA21_PF_LD15, | ||
116 | PA22_PF_LD16, | ||
117 | PA23_PF_LD17, | ||
118 | PA24_PF_REV, | ||
119 | PA25_PF_CLS, | ||
120 | PA26_PF_PS, | ||
121 | PA27_PF_SPL_SPR, | ||
122 | PA28_PF_HSYNC, | ||
123 | PA29_PF_VSYNC, | ||
124 | PA30_PF_CONTRAST, | ||
125 | PA31_PF_OE_ACD, | ||
126 | /* OWIRE */ | ||
127 | PE16_AF_OWIRE, | ||
128 | /* SDHC1*/ | ||
129 | PE18_PF_SD1_D0, | ||
130 | PE19_PF_SD1_D1, | ||
131 | PE20_PF_SD1_D2, | ||
132 | PE21_PF_SD1_D3, | ||
133 | PE22_PF_SD1_CMD, | ||
134 | PE23_PF_SD1_CLK, | ||
135 | /* SDHC2*/ | ||
136 | PB4_PF_SD2_D0, | ||
137 | PB5_PF_SD2_D1, | ||
138 | PB6_PF_SD2_D2, | ||
139 | PB7_PF_SD2_D3, | ||
140 | PB8_PF_SD2_CMD, | ||
141 | PB9_PF_SD2_CLK, | ||
142 | }; | ||
143 | |||
144 | static struct mxc_nand_platform_data mx27ads_nand_board_info = { | ||
145 | .width = 1, | ||
146 | .hw_ecc = 1, | ||
147 | }; | ||
148 | |||
39 | /* ADS's NOR flash */ | 149 | /* ADS's NOR flash */ |
40 | static struct physmap_flash_data mx27ads_flash_data = { | 150 | static struct physmap_flash_data mx27ads_flash_data = { |
41 | .width = 2, | 151 | .width = 2, |
@@ -58,189 +168,113 @@ static struct platform_device mx27ads_nor_mtd_device = { | |||
58 | .resource = &mx27ads_flash_resource, | 168 | .resource = &mx27ads_flash_resource, |
59 | }; | 169 | }; |
60 | 170 | ||
61 | static int mxc_uart0_pins[] = { | 171 | static struct imxi2c_platform_data mx27ads_i2c_data = { |
62 | PE12_PF_UART1_TXD, | 172 | .bitrate = 100000, |
63 | PE13_PF_UART1_RXD, | ||
64 | PE14_PF_UART1_CTS, | ||
65 | PE15_PF_UART1_RTS | ||
66 | }; | 173 | }; |
67 | 174 | ||
68 | static int uart_mxc_port0_init(struct platform_device *pdev) | 175 | static struct i2c_board_info mx27ads_i2c_devices[] = { |
69 | { | ||
70 | return mxc_gpio_setup_multiple_pins(mxc_uart0_pins, | ||
71 | ARRAY_SIZE(mxc_uart0_pins), "UART0"); | ||
72 | } | ||
73 | |||
74 | static int uart_mxc_port0_exit(struct platform_device *pdev) | ||
75 | { | ||
76 | mxc_gpio_release_multiple_pins(mxc_uart0_pins, | ||
77 | ARRAY_SIZE(mxc_uart0_pins)); | ||
78 | return 0; | ||
79 | } | ||
80 | |||
81 | static int mxc_uart1_pins[] = { | ||
82 | PE3_PF_UART2_CTS, | ||
83 | PE4_PF_UART2_RTS, | ||
84 | PE6_PF_UART2_TXD, | ||
85 | PE7_PF_UART2_RXD | ||
86 | }; | 176 | }; |
87 | 177 | ||
88 | static int uart_mxc_port1_init(struct platform_device *pdev) | 178 | void lcd_power(int on) |
89 | { | 179 | { |
90 | return mxc_gpio_setup_multiple_pins(mxc_uart1_pins, | 180 | if (on) |
91 | ARRAY_SIZE(mxc_uart1_pins), "UART1"); | 181 | __raw_writew(PBC_BCTRL1_LCDON, PBC_BCTRL1_SET_REG); |
182 | else | ||
183 | __raw_writew(PBC_BCTRL1_LCDON, PBC_BCTRL1_CLEAR_REG); | ||
92 | } | 184 | } |
93 | 185 | ||
94 | static int uart_mxc_port1_exit(struct platform_device *pdev) | 186 | static struct imx_fb_platform_data mx27ads_fb_data = { |
95 | { | 187 | .pixclock = 188679, |
96 | mxc_gpio_release_multiple_pins(mxc_uart1_pins, | 188 | .xres = 240, |
97 | ARRAY_SIZE(mxc_uart1_pins)); | 189 | .yres = 320, |
98 | return 0; | 190 | |
99 | } | 191 | .bpp = 16, |
100 | 192 | .hsync_len = 1, | |
101 | static int mxc_uart2_pins[] = { | 193 | .left_margin = 9, |
102 | PE8_PF_UART3_TXD, | 194 | .right_margin = 16, |
103 | PE9_PF_UART3_RXD, | 195 | |
104 | PE10_PF_UART3_CTS, | 196 | .vsync_len = 1, |
105 | PE11_PF_UART3_RTS | 197 | .upper_margin = 7, |
198 | .lower_margin = 9, | ||
199 | .fixed_screen_cpu = 0, | ||
200 | |||
201 | /* | ||
202 | * - HSYNC active high | ||
203 | * - VSYNC active high | ||
204 | * - clk notenabled while idle | ||
205 | * - clock inverted | ||
206 | * - data not inverted | ||
207 | * - data enable low active | ||
208 | * - enable sharp mode | ||
209 | */ | ||
210 | .pcr = 0xFB008BC0, | ||
211 | .pwmr = 0x00A903FF, | ||
212 | .lscr1 = 0x00120300, | ||
213 | .dmacr = 0x00020010, | ||
214 | |||
215 | .lcd_power = lcd_power, | ||
106 | }; | 216 | }; |
107 | 217 | ||
108 | static int uart_mxc_port2_init(struct platform_device *pdev) | 218 | static int mx27ads_sdhc1_init(struct device *dev, irq_handler_t detect_irq, |
219 | void *data) | ||
109 | { | 220 | { |
110 | return mxc_gpio_setup_multiple_pins(mxc_uart2_pins, | 221 | return request_irq(IRQ_GPIOE(21), detect_irq, IRQF_TRIGGER_RISING, |
111 | ARRAY_SIZE(mxc_uart2_pins), "UART2"); | 222 | "sdhc1-card-detect", data); |
112 | } | 223 | } |
113 | 224 | ||
114 | static int uart_mxc_port2_exit(struct platform_device *pdev) | 225 | static int mx27ads_sdhc2_init(struct device *dev, irq_handler_t detect_irq, |
226 | void *data) | ||
115 | { | 227 | { |
116 | mxc_gpio_release_multiple_pins(mxc_uart2_pins, | 228 | return request_irq(IRQ_GPIOB(7), detect_irq, IRQF_TRIGGER_RISING, |
117 | ARRAY_SIZE(mxc_uart2_pins)); | 229 | "sdhc2-card-detect", data); |
118 | return 0; | ||
119 | } | 230 | } |
120 | 231 | ||
121 | static int mxc_uart3_pins[] = { | 232 | static void mx27ads_sdhc1_exit(struct device *dev, void *data) |
122 | PB26_AF_UART4_RTS, | ||
123 | PB28_AF_UART4_TXD, | ||
124 | PB29_AF_UART4_CTS, | ||
125 | PB31_AF_UART4_RXD | ||
126 | }; | ||
127 | |||
128 | static int uart_mxc_port3_init(struct platform_device *pdev) | ||
129 | { | 233 | { |
130 | return mxc_gpio_setup_multiple_pins(mxc_uart3_pins, | 234 | free_irq(IRQ_GPIOE(21), data); |
131 | ARRAY_SIZE(mxc_uart3_pins), "UART3"); | ||
132 | } | 235 | } |
133 | 236 | ||
134 | static int uart_mxc_port3_exit(struct platform_device *pdev) | 237 | static void mx27ads_sdhc2_exit(struct device *dev, void *data) |
135 | { | 238 | { |
136 | mxc_gpio_release_multiple_pins(mxc_uart3_pins, | 239 | free_irq(IRQ_GPIOB(7), data); |
137 | ARRAY_SIZE(mxc_uart3_pins)); | ||
138 | return 0; | ||
139 | } | 240 | } |
140 | 241 | ||
141 | static int mxc_uart4_pins[] = { | 242 | static struct imxmmc_platform_data sdhc1_pdata = { |
142 | PB18_AF_UART5_TXD, | 243 | .init = mx27ads_sdhc1_init, |
143 | PB19_AF_UART5_RXD, | 244 | .exit = mx27ads_sdhc1_exit, |
144 | PB20_AF_UART5_CTS, | ||
145 | PB21_AF_UART5_RTS | ||
146 | }; | 245 | }; |
147 | 246 | ||
148 | static int uart_mxc_port4_init(struct platform_device *pdev) | 247 | static struct imxmmc_platform_data sdhc2_pdata = { |
149 | { | 248 | .init = mx27ads_sdhc2_init, |
150 | return mxc_gpio_setup_multiple_pins(mxc_uart4_pins, | 249 | .exit = mx27ads_sdhc2_exit, |
151 | ARRAY_SIZE(mxc_uart4_pins), "UART4"); | ||
152 | } | ||
153 | |||
154 | static int uart_mxc_port4_exit(struct platform_device *pdev) | ||
155 | { | ||
156 | mxc_gpio_release_multiple_pins(mxc_uart4_pins, | ||
157 | ARRAY_SIZE(mxc_uart4_pins)); | ||
158 | return 0; | ||
159 | } | ||
160 | |||
161 | static int mxc_uart5_pins[] = { | ||
162 | PB10_AF_UART6_TXD, | ||
163 | PB12_AF_UART6_CTS, | ||
164 | PB11_AF_UART6_RXD, | ||
165 | PB13_AF_UART6_RTS | ||
166 | }; | 250 | }; |
167 | 251 | ||
168 | static int uart_mxc_port5_init(struct platform_device *pdev) | ||
169 | { | ||
170 | return mxc_gpio_setup_multiple_pins(mxc_uart5_pins, | ||
171 | ARRAY_SIZE(mxc_uart5_pins), "UART5"); | ||
172 | } | ||
173 | |||
174 | static int uart_mxc_port5_exit(struct platform_device *pdev) | ||
175 | { | ||
176 | mxc_gpio_release_multiple_pins(mxc_uart5_pins, | ||
177 | ARRAY_SIZE(mxc_uart5_pins)); | ||
178 | return 0; | ||
179 | } | ||
180 | |||
181 | static struct platform_device *platform_devices[] __initdata = { | 252 | static struct platform_device *platform_devices[] __initdata = { |
182 | &mx27ads_nor_mtd_device, | 253 | &mx27ads_nor_mtd_device, |
183 | &mxc_fec_device, | 254 | &mxc_fec_device, |
255 | &mxc_w1_master_device, | ||
184 | }; | 256 | }; |
185 | 257 | ||
186 | static int mxc_fec_pins[] = { | ||
187 | PD0_AIN_FEC_TXD0, | ||
188 | PD1_AIN_FEC_TXD1, | ||
189 | PD2_AIN_FEC_TXD2, | ||
190 | PD3_AIN_FEC_TXD3, | ||
191 | PD4_AOUT_FEC_RX_ER, | ||
192 | PD5_AOUT_FEC_RXD1, | ||
193 | PD6_AOUT_FEC_RXD2, | ||
194 | PD7_AOUT_FEC_RXD3, | ||
195 | PD8_AF_FEC_MDIO, | ||
196 | PD9_AIN_FEC_MDC, | ||
197 | PD10_AOUT_FEC_CRS, | ||
198 | PD11_AOUT_FEC_TX_CLK, | ||
199 | PD12_AOUT_FEC_RXD0, | ||
200 | PD13_AOUT_FEC_RX_DV, | ||
201 | PD14_AOUT_FEC_RX_CLK, | ||
202 | PD15_AOUT_FEC_COL, | ||
203 | PD16_AIN_FEC_TX_ER, | ||
204 | PF23_AIN_FEC_TX_EN | ||
205 | }; | ||
206 | |||
207 | static void gpio_fec_active(void) | ||
208 | { | ||
209 | mxc_gpio_setup_multiple_pins(mxc_fec_pins, | ||
210 | ARRAY_SIZE(mxc_fec_pins), "FEC"); | ||
211 | } | ||
212 | |||
213 | static struct imxuart_platform_data uart_pdata[] = { | 258 | static struct imxuart_platform_data uart_pdata[] = { |
214 | { | 259 | { |
215 | .init = uart_mxc_port0_init, | ||
216 | .exit = uart_mxc_port0_exit, | ||
217 | .flags = IMXUART_HAVE_RTSCTS, | 260 | .flags = IMXUART_HAVE_RTSCTS, |
218 | }, { | 261 | }, { |
219 | .init = uart_mxc_port1_init, | ||
220 | .exit = uart_mxc_port1_exit, | ||
221 | .flags = IMXUART_HAVE_RTSCTS, | 262 | .flags = IMXUART_HAVE_RTSCTS, |
222 | }, { | 263 | }, { |
223 | .init = uart_mxc_port2_init, | ||
224 | .exit = uart_mxc_port2_exit, | ||
225 | .flags = IMXUART_HAVE_RTSCTS, | 264 | .flags = IMXUART_HAVE_RTSCTS, |
226 | }, { | 265 | }, { |
227 | .init = uart_mxc_port3_init, | ||
228 | .exit = uart_mxc_port3_exit, | ||
229 | .flags = IMXUART_HAVE_RTSCTS, | 266 | .flags = IMXUART_HAVE_RTSCTS, |
230 | }, { | 267 | }, { |
231 | .init = uart_mxc_port4_init, | ||
232 | .exit = uart_mxc_port4_exit, | ||
233 | .flags = IMXUART_HAVE_RTSCTS, | 268 | .flags = IMXUART_HAVE_RTSCTS, |
234 | }, { | 269 | }, { |
235 | .init = uart_mxc_port5_init, | ||
236 | .exit = uart_mxc_port5_exit, | ||
237 | .flags = IMXUART_HAVE_RTSCTS, | 270 | .flags = IMXUART_HAVE_RTSCTS, |
238 | }, | 271 | }, |
239 | }; | 272 | }; |
240 | 273 | ||
241 | static void __init mx27ads_board_init(void) | 274 | static void __init mx27ads_board_init(void) |
242 | { | 275 | { |
243 | gpio_fec_active(); | 276 | mxc_gpio_setup_multiple_pins(mx27ads_pins, ARRAY_SIZE(mx27ads_pins), |
277 | "mx27ads"); | ||
244 | 278 | ||
245 | mxc_register_device(&mxc_uart_device0, &uart_pdata[0]); | 279 | mxc_register_device(&mxc_uart_device0, &uart_pdata[0]); |
246 | mxc_register_device(&mxc_uart_device1, &uart_pdata[1]); | 280 | mxc_register_device(&mxc_uart_device1, &uart_pdata[1]); |
@@ -248,6 +282,15 @@ static void __init mx27ads_board_init(void) | |||
248 | mxc_register_device(&mxc_uart_device3, &uart_pdata[3]); | 282 | mxc_register_device(&mxc_uart_device3, &uart_pdata[3]); |
249 | mxc_register_device(&mxc_uart_device4, &uart_pdata[4]); | 283 | mxc_register_device(&mxc_uart_device4, &uart_pdata[4]); |
250 | mxc_register_device(&mxc_uart_device5, &uart_pdata[5]); | 284 | mxc_register_device(&mxc_uart_device5, &uart_pdata[5]); |
285 | mxc_register_device(&mxc_nand_device, &mx27ads_nand_board_info); | ||
286 | |||
287 | /* only the i2c master 1 is used on this CPU card */ | ||
288 | i2c_register_board_info(1, mx27ads_i2c_devices, | ||
289 | ARRAY_SIZE(mx27ads_i2c_devices)); | ||
290 | mxc_register_device(&mxc_i2c_device1, &mx27ads_i2c_data); | ||
291 | mxc_register_device(&mxc_fb_device, &mx27ads_fb_data); | ||
292 | mxc_register_device(&mxc_sdhc_device0, &sdhc1_pdata); | ||
293 | mxc_register_device(&mxc_sdhc_device1, &sdhc2_pdata); | ||
251 | 294 | ||
252 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); | 295 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); |
253 | } | 296 | } |
@@ -277,7 +320,7 @@ static struct map_desc mx27ads_io_desc[] __initdata = { | |||
277 | 320 | ||
278 | static void __init mx27ads_map_io(void) | 321 | static void __init mx27ads_map_io(void) |
279 | { | 322 | { |
280 | mxc_map_io(); | 323 | mx27_map_io(); |
281 | iotable_init(mx27ads_io_desc, ARRAY_SIZE(mx27ads_io_desc)); | 324 | iotable_init(mx27ads_io_desc, ARRAY_SIZE(mx27ads_io_desc)); |
282 | } | 325 | } |
283 | 326 | ||
diff --git a/arch/arm/mach-mx2/mx27pdk.c b/arch/arm/mach-mx2/mx27pdk.c new file mode 100644 index 000000000000..90b1fa5d1849 --- /dev/null +++ b/arch/arm/mach-mx2/mx27pdk.c | |||
@@ -0,0 +1,95 @@ | |||
1 | /* | ||
2 | * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. | ||
3 | * | ||
4 | * Author: Fabio Estevam <fabio.estevam@freescale.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | |||
21 | #include <linux/platform_device.h> | ||
22 | #include <linux/gpio.h> | ||
23 | #include <asm/mach-types.h> | ||
24 | #include <asm/mach/arch.h> | ||
25 | #include <asm/mach/time.h> | ||
26 | #include <mach/hardware.h> | ||
27 | #include <mach/common.h> | ||
28 | #include <mach/imx-uart.h> | ||
29 | #include <mach/iomux.h> | ||
30 | #include <mach/board-mx27pdk.h> | ||
31 | |||
32 | #include "devices.h" | ||
33 | |||
34 | static unsigned int mx27pdk_pins[] = { | ||
35 | /* UART1 */ | ||
36 | PE12_PF_UART1_TXD, | ||
37 | PE13_PF_UART1_RXD, | ||
38 | PE14_PF_UART1_CTS, | ||
39 | PE15_PF_UART1_RTS, | ||
40 | /* FEC */ | ||
41 | PD0_AIN_FEC_TXD0, | ||
42 | PD1_AIN_FEC_TXD1, | ||
43 | PD2_AIN_FEC_TXD2, | ||
44 | PD3_AIN_FEC_TXD3, | ||
45 | PD4_AOUT_FEC_RX_ER, | ||
46 | PD5_AOUT_FEC_RXD1, | ||
47 | PD6_AOUT_FEC_RXD2, | ||
48 | PD7_AOUT_FEC_RXD3, | ||
49 | PD8_AF_FEC_MDIO, | ||
50 | PD9_AIN_FEC_MDC, | ||
51 | PD10_AOUT_FEC_CRS, | ||
52 | PD11_AOUT_FEC_TX_CLK, | ||
53 | PD12_AOUT_FEC_RXD0, | ||
54 | PD13_AOUT_FEC_RX_DV, | ||
55 | PD14_AOUT_FEC_RX_CLK, | ||
56 | PD15_AOUT_FEC_COL, | ||
57 | PD16_AIN_FEC_TX_ER, | ||
58 | PF23_AIN_FEC_TX_EN, | ||
59 | }; | ||
60 | |||
61 | static struct imxuart_platform_data uart_pdata = { | ||
62 | .flags = IMXUART_HAVE_RTSCTS, | ||
63 | }; | ||
64 | |||
65 | static struct platform_device *platform_devices[] __initdata = { | ||
66 | &mxc_fec_device, | ||
67 | }; | ||
68 | |||
69 | static void __init mx27pdk_init(void) | ||
70 | { | ||
71 | mxc_gpio_setup_multiple_pins(mx27pdk_pins, ARRAY_SIZE(mx27pdk_pins), | ||
72 | "mx27pdk"); | ||
73 | mxc_register_device(&mxc_uart_device0, &uart_pdata); | ||
74 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); | ||
75 | } | ||
76 | |||
77 | static void __init mx27pdk_timer_init(void) | ||
78 | { | ||
79 | mx27_clocks_init(26000000); | ||
80 | } | ||
81 | |||
82 | static struct sys_timer mx27pdk_timer = { | ||
83 | .init = mx27pdk_timer_init, | ||
84 | }; | ||
85 | |||
86 | MACHINE_START(MX27_3DS, "Freescale MX27PDK") | ||
87 | /* maintainer: Freescale Semiconductor, Inc. */ | ||
88 | .phys_io = AIPI_BASE_ADDR, | ||
89 | .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, | ||
90 | .boot_params = PHYS_OFFSET + 0x100, | ||
91 | .map_io = mxc_map_io, | ||
92 | .init_irq = mxc_init_irq, | ||
93 | .init_machine = mx27pdk_init, | ||
94 | .timer = &mx27pdk_timer, | ||
95 | MACHINE_END | ||
diff --git a/arch/arm/mach-mx2/pcm038.c b/arch/arm/mach-mx2/pcm038.c index aa4eaa61d1b5..a4628d004343 100644 --- a/arch/arm/mach-mx2/pcm038.c +++ b/arch/arm/mach-mx2/pcm038.c | |||
@@ -17,28 +17,84 @@ | |||
17 | * MA 02110-1301, USA. | 17 | * MA 02110-1301, USA. |
18 | */ | 18 | */ |
19 | 19 | ||
20 | #include <linux/platform_device.h> | ||
21 | #include <linux/mtd/physmap.h> | ||
22 | #include <linux/mtd/plat-ram.h> | ||
23 | #include <linux/io.h> | ||
24 | #include <linux/i2c.h> | 20 | #include <linux/i2c.h> |
25 | #include <linux/i2c/at24.h> | 21 | #include <linux/i2c/at24.h> |
22 | #include <linux/io.h> | ||
23 | #include <linux/mtd/plat-ram.h> | ||
24 | #include <linux/mtd/physmap.h> | ||
25 | #include <linux/platform_device.h> | ||
26 | 26 | ||
27 | #include <asm/mach/arch.h> | ||
28 | #include <asm/mach-types.h> | 27 | #include <asm/mach-types.h> |
28 | #include <asm/mach/arch.h> | ||
29 | #include <asm/mach/time.h> | ||
30 | |||
31 | #include <mach/board-pcm038.h> | ||
29 | #include <mach/common.h> | 32 | #include <mach/common.h> |
30 | #include <mach/hardware.h> | 33 | #include <mach/hardware.h> |
31 | #include <mach/iomux.h> | ||
32 | #ifdef CONFIG_I2C_IMX | ||
33 | #include <mach/i2c.h> | 34 | #include <mach/i2c.h> |
34 | #endif | 35 | #include <mach/iomux.h> |
35 | #include <asm/mach/time.h> | ||
36 | #include <mach/imx-uart.h> | 36 | #include <mach/imx-uart.h> |
37 | #include <mach/board-pcm038.h> | ||
38 | #include <mach/mxc_nand.h> | 37 | #include <mach/mxc_nand.h> |
39 | 38 | ||
40 | #include "devices.h" | 39 | #include "devices.h" |
41 | 40 | ||
41 | static int pcm038_pins[] = { | ||
42 | /* UART1 */ | ||
43 | PE12_PF_UART1_TXD, | ||
44 | PE13_PF_UART1_RXD, | ||
45 | PE14_PF_UART1_CTS, | ||
46 | PE15_PF_UART1_RTS, | ||
47 | /* UART2 */ | ||
48 | PE3_PF_UART2_CTS, | ||
49 | PE4_PF_UART2_RTS, | ||
50 | PE6_PF_UART2_TXD, | ||
51 | PE7_PF_UART2_RXD, | ||
52 | /* UART3 */ | ||
53 | PE8_PF_UART3_TXD, | ||
54 | PE9_PF_UART3_RXD, | ||
55 | PE10_PF_UART3_CTS, | ||
56 | PE11_PF_UART3_RTS, | ||
57 | /* FEC */ | ||
58 | PD0_AIN_FEC_TXD0, | ||
59 | PD1_AIN_FEC_TXD1, | ||
60 | PD2_AIN_FEC_TXD2, | ||
61 | PD3_AIN_FEC_TXD3, | ||
62 | PD4_AOUT_FEC_RX_ER, | ||
63 | PD5_AOUT_FEC_RXD1, | ||
64 | PD6_AOUT_FEC_RXD2, | ||
65 | PD7_AOUT_FEC_RXD3, | ||
66 | PD8_AF_FEC_MDIO, | ||
67 | PD9_AIN_FEC_MDC, | ||
68 | PD10_AOUT_FEC_CRS, | ||
69 | PD11_AOUT_FEC_TX_CLK, | ||
70 | PD12_AOUT_FEC_RXD0, | ||
71 | PD13_AOUT_FEC_RX_DV, | ||
72 | PD14_AOUT_FEC_RX_CLK, | ||
73 | PD15_AOUT_FEC_COL, | ||
74 | PD16_AIN_FEC_TX_ER, | ||
75 | PF23_AIN_FEC_TX_EN, | ||
76 | /* I2C2 */ | ||
77 | PC5_PF_I2C2_SDA, | ||
78 | PC6_PF_I2C2_SCL, | ||
79 | /* SPI1 */ | ||
80 | PD25_PF_CSPI1_RDY, | ||
81 | PD27_PF_CSPI1_SS1, | ||
82 | PD28_PF_CSPI1_SS0, | ||
83 | PD29_PF_CSPI1_SCLK, | ||
84 | PD30_PF_CSPI1_MISO, | ||
85 | PD31_PF_CSPI1_MOSI, | ||
86 | /* SSI1 */ | ||
87 | PC20_PF_SSI1_FS, | ||
88 | PC21_PF_SSI1_RXD, | ||
89 | PC22_PF_SSI1_TXD, | ||
90 | PC23_PF_SSI1_CLK, | ||
91 | /* SSI4 */ | ||
92 | PC16_PF_SSI4_FS, | ||
93 | PC17_PF_SSI4_RXD, | ||
94 | PC18_PF_SSI4_TXD, | ||
95 | PC19_PF_SSI4_CLK, | ||
96 | }; | ||
97 | |||
42 | /* | 98 | /* |
43 | * Phytec's PCM038 comes with 2MiB battery buffered SRAM, | 99 | * Phytec's PCM038 comes with 2MiB battery buffered SRAM, |
44 | * 16 bit width | 100 | * 16 bit width |
@@ -88,107 +144,16 @@ static struct platform_device pcm038_nor_mtd_device = { | |||
88 | .resource = &pcm038_flash_resource, | 144 | .resource = &pcm038_flash_resource, |
89 | }; | 145 | }; |
90 | 146 | ||
91 | static int mxc_uart0_pins[] = { | ||
92 | PE12_PF_UART1_TXD, | ||
93 | PE13_PF_UART1_RXD, | ||
94 | PE14_PF_UART1_CTS, | ||
95 | PE15_PF_UART1_RTS | ||
96 | }; | ||
97 | |||
98 | static int uart_mxc_port0_init(struct platform_device *pdev) | ||
99 | { | ||
100 | return mxc_gpio_setup_multiple_pins(mxc_uart0_pins, | ||
101 | ARRAY_SIZE(mxc_uart0_pins), "UART0"); | ||
102 | } | ||
103 | |||
104 | static int uart_mxc_port0_exit(struct platform_device *pdev) | ||
105 | { | ||
106 | mxc_gpio_release_multiple_pins(mxc_uart0_pins, | ||
107 | ARRAY_SIZE(mxc_uart0_pins)); | ||
108 | return 0; | ||
109 | } | ||
110 | |||
111 | static int mxc_uart1_pins[] = { | ||
112 | PE3_PF_UART2_CTS, | ||
113 | PE4_PF_UART2_RTS, | ||
114 | PE6_PF_UART2_TXD, | ||
115 | PE7_PF_UART2_RXD | ||
116 | }; | ||
117 | |||
118 | static int uart_mxc_port1_init(struct platform_device *pdev) | ||
119 | { | ||
120 | return mxc_gpio_setup_multiple_pins(mxc_uart1_pins, | ||
121 | ARRAY_SIZE(mxc_uart1_pins), "UART1"); | ||
122 | } | ||
123 | |||
124 | static int uart_mxc_port1_exit(struct platform_device *pdev) | ||
125 | { | ||
126 | mxc_gpio_release_multiple_pins(mxc_uart1_pins, | ||
127 | ARRAY_SIZE(mxc_uart1_pins)); | ||
128 | return 0; | ||
129 | } | ||
130 | |||
131 | static int mxc_uart2_pins[] = { PE8_PF_UART3_TXD, | ||
132 | PE9_PF_UART3_RXD, | ||
133 | PE10_PF_UART3_CTS, | ||
134 | PE11_PF_UART3_RTS }; | ||
135 | |||
136 | static int uart_mxc_port2_init(struct platform_device *pdev) | ||
137 | { | ||
138 | return mxc_gpio_setup_multiple_pins(mxc_uart2_pins, | ||
139 | ARRAY_SIZE(mxc_uart2_pins), "UART2"); | ||
140 | } | ||
141 | |||
142 | static int uart_mxc_port2_exit(struct platform_device *pdev) | ||
143 | { | ||
144 | mxc_gpio_release_multiple_pins(mxc_uart2_pins, | ||
145 | ARRAY_SIZE(mxc_uart2_pins)); | ||
146 | return 0; | ||
147 | } | ||
148 | |||
149 | static struct imxuart_platform_data uart_pdata[] = { | 147 | static struct imxuart_platform_data uart_pdata[] = { |
150 | { | 148 | { |
151 | .init = uart_mxc_port0_init, | ||
152 | .exit = uart_mxc_port0_exit, | ||
153 | .flags = IMXUART_HAVE_RTSCTS, | 149 | .flags = IMXUART_HAVE_RTSCTS, |
154 | }, { | 150 | }, { |
155 | .init = uart_mxc_port1_init, | ||
156 | .exit = uart_mxc_port1_exit, | ||
157 | .flags = IMXUART_HAVE_RTSCTS, | 151 | .flags = IMXUART_HAVE_RTSCTS, |
158 | }, { | 152 | }, { |
159 | .init = uart_mxc_port2_init, | ||
160 | .exit = uart_mxc_port2_exit, | ||
161 | .flags = IMXUART_HAVE_RTSCTS, | 153 | .flags = IMXUART_HAVE_RTSCTS, |
162 | }, | 154 | }, |
163 | }; | 155 | }; |
164 | 156 | ||
165 | static int mxc_fec_pins[] = { | ||
166 | PD0_AIN_FEC_TXD0, | ||
167 | PD1_AIN_FEC_TXD1, | ||
168 | PD2_AIN_FEC_TXD2, | ||
169 | PD3_AIN_FEC_TXD3, | ||
170 | PD4_AOUT_FEC_RX_ER, | ||
171 | PD5_AOUT_FEC_RXD1, | ||
172 | PD6_AOUT_FEC_RXD2, | ||
173 | PD7_AOUT_FEC_RXD3, | ||
174 | PD8_AF_FEC_MDIO, | ||
175 | PD9_AIN_FEC_MDC, | ||
176 | PD10_AOUT_FEC_CRS, | ||
177 | PD11_AOUT_FEC_TX_CLK, | ||
178 | PD12_AOUT_FEC_RXD0, | ||
179 | PD13_AOUT_FEC_RX_DV, | ||
180 | PD14_AOUT_FEC_RX_CLK, | ||
181 | PD15_AOUT_FEC_COL, | ||
182 | PD16_AIN_FEC_TX_ER, | ||
183 | PF23_AIN_FEC_TX_EN | ||
184 | }; | ||
185 | |||
186 | static void gpio_fec_active(void) | ||
187 | { | ||
188 | mxc_gpio_setup_multiple_pins(mxc_fec_pins, | ||
189 | ARRAY_SIZE(mxc_fec_pins), "FEC"); | ||
190 | } | ||
191 | |||
192 | static struct mxc_nand_platform_data pcm038_nand_board_info = { | 157 | static struct mxc_nand_platform_data pcm038_nand_board_info = { |
193 | .width = 1, | 158 | .width = 1, |
194 | .hw_ecc = 1, | 159 | .hw_ecc = 1, |
@@ -210,27 +175,8 @@ static void __init pcm038_init_sram(void) | |||
210 | __raw_writel(0x22220a00, CSCR_A(1)); | 175 | __raw_writel(0x22220a00, CSCR_A(1)); |
211 | } | 176 | } |
212 | 177 | ||
213 | #ifdef CONFIG_I2C_IMX | ||
214 | static int mxc_i2c1_pins[] = { | ||
215 | PC5_PF_I2C2_SDA, | ||
216 | PC6_PF_I2C2_SCL | ||
217 | }; | ||
218 | |||
219 | static int pcm038_i2c_1_init(struct device *dev) | ||
220 | { | ||
221 | return mxc_gpio_setup_multiple_pins(mxc_i2c1_pins, ARRAY_SIZE(mxc_i2c1_pins), | ||
222 | "I2C1"); | ||
223 | } | ||
224 | |||
225 | static void pcm038_i2c_1_exit(struct device *dev) | ||
226 | { | ||
227 | mxc_gpio_release_multiple_pins(mxc_i2c1_pins, ARRAY_SIZE(mxc_i2c1_pins)); | ||
228 | } | ||
229 | |||
230 | static struct imxi2c_platform_data pcm038_i2c_1_data = { | 178 | static struct imxi2c_platform_data pcm038_i2c_1_data = { |
231 | .bitrate = 100000, | 179 | .bitrate = 100000, |
232 | .init = pcm038_i2c_1_init, | ||
233 | .exit = pcm038_i2c_1_exit, | ||
234 | }; | 180 | }; |
235 | 181 | ||
236 | static struct at24_platform_data board_eeprom = { | 182 | static struct at24_platform_data board_eeprom = { |
@@ -253,11 +199,12 @@ static struct i2c_board_info pcm038_i2c_devices[] = { | |||
253 | .type = "lm75" | 199 | .type = "lm75" |
254 | } | 200 | } |
255 | }; | 201 | }; |
256 | #endif | ||
257 | 202 | ||
258 | static void __init pcm038_init(void) | 203 | static void __init pcm038_init(void) |
259 | { | 204 | { |
260 | gpio_fec_active(); | 205 | mxc_gpio_setup_multiple_pins(pcm038_pins, ARRAY_SIZE(pcm038_pins), |
206 | "PCM038"); | ||
207 | |||
261 | pcm038_init_sram(); | 208 | pcm038_init_sram(); |
262 | 209 | ||
263 | mxc_register_device(&mxc_uart_device0, &uart_pdata[0]); | 210 | mxc_register_device(&mxc_uart_device0, &uart_pdata[0]); |
@@ -267,13 +214,11 @@ static void __init pcm038_init(void) | |||
267 | mxc_gpio_mode(PE16_AF_OWIRE); | 214 | mxc_gpio_mode(PE16_AF_OWIRE); |
268 | mxc_register_device(&mxc_nand_device, &pcm038_nand_board_info); | 215 | mxc_register_device(&mxc_nand_device, &pcm038_nand_board_info); |
269 | 216 | ||
270 | #ifdef CONFIG_I2C_IMX | ||
271 | /* only the i2c master 1 is used on this CPU card */ | 217 | /* only the i2c master 1 is used on this CPU card */ |
272 | i2c_register_board_info(1, pcm038_i2c_devices, | 218 | i2c_register_board_info(1, pcm038_i2c_devices, |
273 | ARRAY_SIZE(pcm038_i2c_devices)); | 219 | ARRAY_SIZE(pcm038_i2c_devices)); |
274 | 220 | ||
275 | mxc_register_device(&mxc_i2c_device1, &pcm038_i2c_1_data); | 221 | mxc_register_device(&mxc_i2c_device1, &pcm038_i2c_1_data); |
276 | #endif | ||
277 | 222 | ||
278 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); | 223 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); |
279 | 224 | ||
@@ -295,7 +240,7 @@ MACHINE_START(PCM038, "phyCORE-i.MX27") | |||
295 | .phys_io = AIPI_BASE_ADDR, | 240 | .phys_io = AIPI_BASE_ADDR, |
296 | .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, | 241 | .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc, |
297 | .boot_params = PHYS_OFFSET + 0x100, | 242 | .boot_params = PHYS_OFFSET + 0x100, |
298 | .map_io = mxc_map_io, | 243 | .map_io = mx27_map_io, |
299 | .init_irq = mxc_init_irq, | 244 | .init_irq = mxc_init_irq, |
300 | .init_machine = pcm038_init, | 245 | .init_machine = pcm038_init, |
301 | .timer = &pcm038_timer, | 246 | .timer = &pcm038_timer, |
diff --git a/arch/arm/mach-mx2/pcm970-baseboard.c b/arch/arm/mach-mx2/pcm970-baseboard.c index bf4e520bc1bc..6a3acaf57dd4 100644 --- a/arch/arm/mach-mx2/pcm970-baseboard.c +++ b/arch/arm/mach-mx2/pcm970-baseboard.c | |||
@@ -16,71 +16,107 @@ | |||
16 | * MA 02110-1301, USA. | 16 | * MA 02110-1301, USA. |
17 | */ | 17 | */ |
18 | 18 | ||
19 | #include <linux/platform_device.h> | ||
20 | #include <linux/gpio.h> | 19 | #include <linux/gpio.h> |
21 | #include <linux/irq.h> | 20 | #include <linux/irq.h> |
21 | #include <linux/platform_device.h> | ||
22 | 22 | ||
23 | #include <asm/mach/arch.h> | 23 | #include <asm/mach/arch.h> |
24 | 24 | ||
25 | #include <mach/hardware.h> | ||
26 | #include <mach/common.h> | 25 | #include <mach/common.h> |
27 | #include <mach/mmc.h> | ||
28 | #include <mach/imxfb.h> | ||
29 | #include <mach/iomux.h> | 26 | #include <mach/iomux.h> |
27 | #include <mach/imxfb.h> | ||
28 | #include <mach/hardware.h> | ||
29 | #include <mach/mmc.h> | ||
30 | 30 | ||
31 | #include "devices.h" | 31 | #include "devices.h" |
32 | 32 | ||
33 | static int pcm970_sdhc2_get_ro(struct device *dev) | 33 | static int pcm970_pins[] = { |
34 | { | 34 | /* SDHC */ |
35 | return gpio_get_value(GPIO_PORTC + 28); | ||
36 | } | ||
37 | |||
38 | static int pcm970_sdhc2_pins[] = { | ||
39 | PB4_PF_SD2_D0, | 35 | PB4_PF_SD2_D0, |
40 | PB5_PF_SD2_D1, | 36 | PB5_PF_SD2_D1, |
41 | PB6_PF_SD2_D2, | 37 | PB6_PF_SD2_D2, |
42 | PB7_PF_SD2_D3, | 38 | PB7_PF_SD2_D3, |
43 | PB8_PF_SD2_CMD, | 39 | PB8_PF_SD2_CMD, |
44 | PB9_PF_SD2_CLK, | 40 | PB9_PF_SD2_CLK, |
41 | GPIO_PORTC | 28 | GPIO_GPIO | GPIO_IN, /* card detect */ | ||
42 | /* display */ | ||
43 | PA5_PF_LSCLK, | ||
44 | PA6_PF_LD0, | ||
45 | PA7_PF_LD1, | ||
46 | PA8_PF_LD2, | ||
47 | PA9_PF_LD3, | ||
48 | PA10_PF_LD4, | ||
49 | PA11_PF_LD5, | ||
50 | PA12_PF_LD6, | ||
51 | PA13_PF_LD7, | ||
52 | PA14_PF_LD8, | ||
53 | PA15_PF_LD9, | ||
54 | PA16_PF_LD10, | ||
55 | PA17_PF_LD11, | ||
56 | PA18_PF_LD12, | ||
57 | PA19_PF_LD13, | ||
58 | PA20_PF_LD14, | ||
59 | PA21_PF_LD15, | ||
60 | PA22_PF_LD16, | ||
61 | PA23_PF_LD17, | ||
62 | PA24_PF_REV, | ||
63 | PA25_PF_CLS, | ||
64 | PA26_PF_PS, | ||
65 | PA27_PF_SPL_SPR, | ||
66 | PA28_PF_HSYNC, | ||
67 | PA29_PF_VSYNC, | ||
68 | PA30_PF_CONTRAST, | ||
69 | PA31_PF_OE_ACD, | ||
70 | /* | ||
71 | * it seems the data line misses a pullup, so we must enable | ||
72 | * the internal pullup as a local workaround | ||
73 | */ | ||
74 | PD17_PF_I2C_DATA | GPIO_PUEN, | ||
75 | PD18_PF_I2C_CLK, | ||
76 | /* Camera */ | ||
77 | PB10_PF_CSI_D0, | ||
78 | PB11_PF_CSI_D1, | ||
79 | PB12_PF_CSI_D2, | ||
80 | PB13_PF_CSI_D3, | ||
81 | PB14_PF_CSI_D4, | ||
82 | PB15_PF_CSI_MCLK, | ||
83 | PB16_PF_CSI_PIXCLK, | ||
84 | PB17_PF_CSI_D5, | ||
85 | PB18_PF_CSI_D6, | ||
86 | PB19_PF_CSI_D7, | ||
87 | PB20_PF_CSI_VSYNC, | ||
88 | PB21_PF_CSI_HSYNC, | ||
45 | }; | 89 | }; |
46 | 90 | ||
91 | static int pcm970_sdhc2_get_ro(struct device *dev) | ||
92 | { | ||
93 | return gpio_get_value(GPIO_PORTC + 28); | ||
94 | } | ||
95 | |||
47 | static int pcm970_sdhc2_init(struct device *dev, irq_handler_t detect_irq, void *data) | 96 | static int pcm970_sdhc2_init(struct device *dev, irq_handler_t detect_irq, void *data) |
48 | { | 97 | { |
49 | int ret; | 98 | int ret; |
50 | 99 | ||
51 | ret = mxc_gpio_setup_multiple_pins(pcm970_sdhc2_pins, | 100 | ret = request_irq(IRQ_GPIOC(29), detect_irq, IRQF_TRIGGER_FALLING, |
52 | ARRAY_SIZE(pcm970_sdhc2_pins), "sdhc2"); | ||
53 | if(ret) | ||
54 | return ret; | ||
55 | |||
56 | ret = request_irq(IRQ_GPIOC(29), detect_irq, 0, | ||
57 | "imx-mmc-detect", data); | 101 | "imx-mmc-detect", data); |
58 | if (ret) | 102 | if (ret) |
59 | goto out_release_gpio; | 103 | return ret; |
60 | |||
61 | set_irq_type(IRQ_GPIOC(29), IRQF_TRIGGER_FALLING); | ||
62 | 104 | ||
63 | ret = gpio_request(GPIO_PORTC + 28, "imx-mmc-ro"); | 105 | ret = gpio_request(GPIO_PORTC + 28, "imx-mmc-ro"); |
64 | if (ret) | 106 | if (ret) { |
65 | goto out_release_gpio; | 107 | free_irq(IRQ_GPIOC(29), data); |
108 | return ret; | ||
109 | } | ||
66 | 110 | ||
67 | mxc_gpio_mode((GPIO_PORTC | 28) | GPIO_GPIO | GPIO_IN); | ||
68 | gpio_direction_input(GPIO_PORTC + 28); | 111 | gpio_direction_input(GPIO_PORTC + 28); |
69 | 112 | ||
70 | return 0; | 113 | return 0; |
71 | |||
72 | out_release_gpio: | ||
73 | mxc_gpio_release_multiple_pins(pcm970_sdhc2_pins, | ||
74 | ARRAY_SIZE(pcm970_sdhc2_pins)); | ||
75 | return ret; | ||
76 | } | 114 | } |
77 | 115 | ||
78 | static void pcm970_sdhc2_exit(struct device *dev, void *data) | 116 | static void pcm970_sdhc2_exit(struct device *dev, void *data) |
79 | { | 117 | { |
80 | free_irq(IRQ_GPIOC(29), data); | 118 | free_irq(IRQ_GPIOC(29), data); |
81 | gpio_free(GPIO_PORTC + 28); | 119 | gpio_free(GPIO_PORTC + 28); |
82 | mxc_gpio_release_multiple_pins(pcm970_sdhc2_pins, | ||
83 | ARRAY_SIZE(pcm970_sdhc2_pins)); | ||
84 | } | 120 | } |
85 | 121 | ||
86 | static struct imxmmc_platform_data sdhc_pdata = { | 122 | static struct imxmmc_platform_data sdhc_pdata = { |
@@ -89,29 +125,6 @@ static struct imxmmc_platform_data sdhc_pdata = { | |||
89 | .exit = pcm970_sdhc2_exit, | 125 | .exit = pcm970_sdhc2_exit, |
90 | }; | 126 | }; |
91 | 127 | ||
92 | static int mxc_fb_pins[] = { | ||
93 | PA5_PF_LSCLK, PA6_PF_LD0, PA7_PF_LD1, PA8_PF_LD2, | ||
94 | PA9_PF_LD3, PA10_PF_LD4, PA11_PF_LD5, PA12_PF_LD6, | ||
95 | PA13_PF_LD7, PA14_PF_LD8, PA15_PF_LD9, PA16_PF_LD10, | ||
96 | PA17_PF_LD11, PA18_PF_LD12, PA19_PF_LD13, PA20_PF_LD14, | ||
97 | PA21_PF_LD15, PA22_PF_LD16, PA23_PF_LD17, PA24_PF_REV, | ||
98 | PA25_PF_CLS, PA26_PF_PS, PA27_PF_SPL_SPR, PA28_PF_HSYNC, | ||
99 | PA29_PF_VSYNC, PA30_PF_CONTRAST, PA31_PF_OE_ACD | ||
100 | }; | ||
101 | |||
102 | static int pcm038_fb_init(struct platform_device *pdev) | ||
103 | { | ||
104 | return mxc_gpio_setup_multiple_pins(mxc_fb_pins, | ||
105 | ARRAY_SIZE(mxc_fb_pins), "FB"); | ||
106 | } | ||
107 | |||
108 | static int pcm038_fb_exit(struct platform_device *pdev) | ||
109 | { | ||
110 | mxc_gpio_release_multiple_pins(mxc_fb_pins, ARRAY_SIZE(mxc_fb_pins)); | ||
111 | |||
112 | return 0; | ||
113 | } | ||
114 | |||
115 | /* | 128 | /* |
116 | * Connected is a portrait Sharp-QVGA display | 129 | * Connected is a portrait Sharp-QVGA display |
117 | * of type: LQ035Q7DH06 | 130 | * of type: LQ035Q7DH06 |
@@ -144,9 +157,6 @@ static struct imx_fb_platform_data pcm038_fb_data = { | |||
144 | .pwmr = 0x00A903FF, | 157 | .pwmr = 0x00A903FF, |
145 | .lscr1 = 0x00120300, | 158 | .lscr1 = 0x00120300, |
146 | .dmacr = 0x00020010, | 159 | .dmacr = 0x00020010, |
147 | |||
148 | .init = pcm038_fb_init, | ||
149 | .exit = pcm038_fb_exit, | ||
150 | }; | 160 | }; |
151 | 161 | ||
152 | /* | 162 | /* |
@@ -157,6 +167,9 @@ static struct imx_fb_platform_data pcm038_fb_data = { | |||
157 | */ | 167 | */ |
158 | void __init pcm970_baseboard_init(void) | 168 | void __init pcm970_baseboard_init(void) |
159 | { | 169 | { |
170 | mxc_gpio_setup_multiple_pins(pcm970_pins, ARRAY_SIZE(pcm970_pins), | ||
171 | "PCM970"); | ||
172 | |||
160 | mxc_register_device(&mxc_fb_device, &pcm038_fb_data); | 173 | mxc_register_device(&mxc_fb_device, &pcm038_fb_data); |
161 | mxc_register_device(&mxc_sdhc_device1, &sdhc_pdata); | 174 | mxc_register_device(&mxc_sdhc_device1, &sdhc_pdata); |
162 | } | 175 | } |
diff --git a/arch/arm/mach-mx3/Kconfig b/arch/arm/mach-mx3/Kconfig index 194b8428bba4..32e45155089a 100644 --- a/arch/arm/mach-mx3/Kconfig +++ b/arch/arm/mach-mx3/Kconfig | |||
@@ -1,10 +1,12 @@ | |||
1 | if ARCH_MX3 | 1 | if ARCH_MX3 |
2 | 2 | ||
3 | config ARCH_MX31 | 3 | config ARCH_MX31 |
4 | select ARCH_HAS_RNGA | ||
4 | bool | 5 | bool |
5 | 6 | ||
6 | config ARCH_MX35 | 7 | config ARCH_MX35 |
7 | bool | 8 | bool |
9 | select ARCH_MXC_IOMUX_V3 | ||
8 | 10 | ||
9 | comment "MX3 platforms:" | 11 | comment "MX3 platforms:" |
10 | 12 | ||
@@ -66,4 +68,11 @@ config MACH_QONG | |||
66 | Include support for Dave/DENX QongEVB-LITE platform. This includes | 68 | Include support for Dave/DENX QongEVB-LITE platform. This includes |
67 | specific configurations for the board and its peripherals. | 69 | specific configurations for the board and its peripherals. |
68 | 70 | ||
71 | config MACH_PCM043 | ||
72 | bool "Support Phytec pcm043 (i.MX35) platforms" | ||
73 | select ARCH_MX35 | ||
74 | help | ||
75 | Include support for Phytec pcm043 platform. This includes | ||
76 | specific configurations for the board and its peripherals. | ||
77 | |||
69 | endif | 78 | endif |
diff --git a/arch/arm/mach-mx3/Makefile b/arch/arm/mach-mx3/Makefile index 272c8a953b30..cd6547b61b1e 100644 --- a/arch/arm/mach-mx3/Makefile +++ b/arch/arm/mach-mx3/Makefile | |||
@@ -14,3 +14,4 @@ obj-$(CONFIG_MACH_MX31_3DS) += mx31pdk.o | |||
14 | obj-$(CONFIG_MACH_MX31MOBOARD) += mx31moboard.o mx31moboard-devboard.o \ | 14 | obj-$(CONFIG_MACH_MX31MOBOARD) += mx31moboard.o mx31moboard-devboard.o \ |
15 | mx31moboard-marxbot.o | 15 | mx31moboard-marxbot.o |
16 | obj-$(CONFIG_MACH_QONG) += qong.o | 16 | obj-$(CONFIG_MACH_QONG) += qong.o |
17 | obj-$(CONFIG_MACH_PCM043) += pcm043.o | ||
diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c index 53a112d4e04a..0d76521cb491 100644 --- a/arch/arm/mach-mx3/clock-imx35.c +++ b/arch/arm/mach-mx3/clock-imx35.c | |||
@@ -147,34 +147,16 @@ static struct arm_ahb_div clk_consumer[] = { | |||
147 | { .arm = 0, .ahb = 0, .sel = 0}, | 147 | { .arm = 0, .ahb = 0, .sel = 0}, |
148 | }; | 148 | }; |
149 | 149 | ||
150 | static struct arm_ahb_div clk_automotive[] = { | ||
151 | { .arm = 1, .ahb = 3, .sel = 0}, | ||
152 | { .arm = 1, .ahb = 2, .sel = 1}, | ||
153 | { .arm = 2, .ahb = 1, .sel = 1}, | ||
154 | { .arm = 0, .ahb = 0, .sel = 0}, | ||
155 | { .arm = 1, .ahb = 6, .sel = 0}, | ||
156 | { .arm = 1, .ahb = 4, .sel = 1}, | ||
157 | { .arm = 2, .ahb = 2, .sel = 1}, | ||
158 | { .arm = 0, .ahb = 0, .sel = 0}, | ||
159 | }; | ||
160 | |||
161 | static unsigned long get_rate_arm(void) | 150 | static unsigned long get_rate_arm(void) |
162 | { | 151 | { |
163 | unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0); | 152 | unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0); |
164 | struct arm_ahb_div *aad; | 153 | struct arm_ahb_div *aad; |
165 | unsigned long fref = get_rate_mpll(); | 154 | unsigned long fref = get_rate_mpll(); |
166 | 155 | ||
167 | if (pdr0 & 1) { | 156 | aad = &clk_consumer[(pdr0 >> 16) & 0xf]; |
168 | /* consumer path */ | 157 | if (aad->sel) |
169 | aad = &clk_consumer[(pdr0 >> 16) & 0xf]; | 158 | fref = fref * 2 / 3; |
170 | if (aad->sel) | 159 | |
171 | fref = fref * 2 / 3; | ||
172 | } else { | ||
173 | /* auto path */ | ||
174 | aad = &clk_automotive[(pdr0 >> 9) & 0x7]; | ||
175 | if (aad->sel) | ||
176 | fref = fref * 3 / 4; | ||
177 | } | ||
178 | return fref / aad->arm; | 160 | return fref / aad->arm; |
179 | } | 161 | } |
180 | 162 | ||
@@ -184,12 +166,7 @@ static unsigned long get_rate_ahb(struct clk *clk) | |||
184 | struct arm_ahb_div *aad; | 166 | struct arm_ahb_div *aad; |
185 | unsigned long fref = get_rate_mpll(); | 167 | unsigned long fref = get_rate_mpll(); |
186 | 168 | ||
187 | if (pdr0 & 1) | 169 | aad = &clk_consumer[(pdr0 >> 16) & 0xf]; |
188 | /* consumer path */ | ||
189 | aad = &clk_consumer[(pdr0 >> 16) & 0xf]; | ||
190 | else | ||
191 | /* auto path */ | ||
192 | aad = &clk_automotive[(pdr0 >> 9) & 0x7]; | ||
193 | 170 | ||
194 | return fref / aad->ahb; | 171 | return fref / aad->ahb; |
195 | } | 172 | } |
@@ -430,7 +407,8 @@ static struct clk_lookup lookups[] __initdata = { | |||
430 | _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk) | 407 | _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk) |
431 | _REGISTER_CLOCK("imx-i2c.2", NULL, i2c3_clk) | 408 | _REGISTER_CLOCK("imx-i2c.2", NULL, i2c3_clk) |
432 | _REGISTER_CLOCK(NULL, "iomuxc", iomuxc_clk) | 409 | _REGISTER_CLOCK(NULL, "iomuxc", iomuxc_clk) |
433 | _REGISTER_CLOCK(NULL, "ipu", ipu_clk) | 410 | _REGISTER_CLOCK("ipu-core", NULL, ipu_clk) |
411 | _REGISTER_CLOCK("mx3_sdc_fb", NULL, ipu_clk) | ||
434 | _REGISTER_CLOCK(NULL, "kpp", kpp_clk) | 412 | _REGISTER_CLOCK(NULL, "kpp", kpp_clk) |
435 | _REGISTER_CLOCK(NULL, "mlb", mlb_clk) | 413 | _REGISTER_CLOCK(NULL, "mlb", mlb_clk) |
436 | _REGISTER_CLOCK(NULL, "mshc", mshc_clk) | 414 | _REGISTER_CLOCK(NULL, "mshc", mshc_clk) |
@@ -462,8 +440,6 @@ int __init mx35_clocks_init() | |||
462 | int i; | 440 | int i; |
463 | unsigned int ll = 0; | 441 | unsigned int ll = 0; |
464 | 442 | ||
465 | mxc_set_cpu_type(MXC_CPU_MX35); | ||
466 | |||
467 | #ifdef CONFIG_DEBUG_LL_CONSOLE | 443 | #ifdef CONFIG_DEBUG_LL_CONSOLE |
468 | ll = (3 << 16); | 444 | ll = (3 << 16); |
469 | #endif | 445 | #endif |
diff --git a/arch/arm/mach-mx3/clock.c b/arch/arm/mach-mx3/clock.c index 9957a11533a4..28bd11dc89b8 100644 --- a/arch/arm/mach-mx3/clock.c +++ b/arch/arm/mach-mx3/clock.c | |||
@@ -566,8 +566,6 @@ int __init mx31_clocks_init(unsigned long fref) | |||
566 | u32 reg; | 566 | u32 reg; |
567 | int i; | 567 | int i; |
568 | 568 | ||
569 | mxc_set_cpu_type(MXC_CPU_MX31); | ||
570 | |||
571 | ckih_rate = fref; | 569 | ckih_rate = fref; |
572 | 570 | ||
573 | for (i = 0; i < ARRAY_SIZE(lookups); i++) | 571 | for (i = 0; i < ARRAY_SIZE(lookups); i++) |
@@ -581,6 +579,12 @@ int __init mx31_clocks_init(unsigned long fref) | |||
581 | MX32, but still required to be set */ | 579 | MX32, but still required to be set */ |
582 | MXC_CCM_CGR2); | 580 | MXC_CCM_CGR2); |
583 | 581 | ||
582 | /* | ||
583 | * Before turning off usb_pll make sure ipg_per_clk is generated | ||
584 | * by ipg_clk and not usb_pll. | ||
585 | */ | ||
586 | __raw_writel(__raw_readl(MXC_CCM_CCMR) | (1 << 24), MXC_CCM_CCMR); | ||
587 | |||
584 | usb_pll_disable(&usb_pll_clk); | 588 | usb_pll_disable(&usb_pll_clk); |
585 | 589 | ||
586 | pr_info("Clock input source is %ld\n", clk_get_rate(&ckih_clk)); | 590 | pr_info("Clock input source is %ld\n", clk_get_rate(&ckih_clk)); |
diff --git a/arch/arm/mach-mx3/devices.c b/arch/arm/mach-mx3/devices.c index 380be0c9b213..d927eddcad46 100644 --- a/arch/arm/mach-mx3/devices.c +++ b/arch/arm/mach-mx3/devices.c | |||
@@ -17,13 +17,17 @@ | |||
17 | * Boston, MA 02110-1301, USA. | 17 | * Boston, MA 02110-1301, USA. |
18 | */ | 18 | */ |
19 | 19 | ||
20 | #include <linux/dma-mapping.h> | ||
20 | #include <linux/module.h> | 21 | #include <linux/module.h> |
21 | #include <linux/platform_device.h> | 22 | #include <linux/platform_device.h> |
22 | #include <linux/serial.h> | 23 | #include <linux/serial.h> |
23 | #include <linux/gpio.h> | 24 | #include <linux/gpio.h> |
25 | #include <linux/dma-mapping.h> | ||
24 | #include <mach/hardware.h> | 26 | #include <mach/hardware.h> |
25 | #include <mach/irqs.h> | 27 | #include <mach/irqs.h> |
28 | #include <mach/common.h> | ||
26 | #include <mach/imx-uart.h> | 29 | #include <mach/imx-uart.h> |
30 | #include <mach/mx3_camera.h> | ||
27 | 31 | ||
28 | #include "devices.h" | 32 | #include "devices.h" |
29 | 33 | ||
@@ -283,6 +287,21 @@ struct platform_device mxcsdhc_device1 = { | |||
283 | .num_resources = ARRAY_SIZE(mxcsdhc1_resources), | 287 | .num_resources = ARRAY_SIZE(mxcsdhc1_resources), |
284 | .resource = mxcsdhc1_resources, | 288 | .resource = mxcsdhc1_resources, |
285 | }; | 289 | }; |
290 | |||
291 | static struct resource rnga_resources[] = { | ||
292 | { | ||
293 | .start = RNGA_BASE_ADDR, | ||
294 | .end = RNGA_BASE_ADDR + 0x28, | ||
295 | .flags = IORESOURCE_MEM, | ||
296 | }, | ||
297 | }; | ||
298 | |||
299 | struct platform_device mxc_rnga_device = { | ||
300 | .name = "mxc_rnga", | ||
301 | .id = -1, | ||
302 | .num_resources = 1, | ||
303 | .resource = rnga_resources, | ||
304 | }; | ||
286 | #endif /* CONFIG_ARCH_MX31 */ | 305 | #endif /* CONFIG_ARCH_MX31 */ |
287 | 306 | ||
288 | /* i.MX31 Image Processing Unit */ | 307 | /* i.MX31 Image Processing Unit */ |
@@ -329,10 +348,54 @@ struct platform_device mx3_fb = { | |||
329 | .num_resources = ARRAY_SIZE(fb_resources), | 348 | .num_resources = ARRAY_SIZE(fb_resources), |
330 | .resource = fb_resources, | 349 | .resource = fb_resources, |
331 | .dev = { | 350 | .dev = { |
332 | .coherent_dma_mask = 0xffffffff, | 351 | .coherent_dma_mask = DMA_BIT_MASK(32), |
333 | }, | 352 | }, |
334 | }; | 353 | }; |
335 | 354 | ||
355 | static struct resource camera_resources[] = { | ||
356 | { | ||
357 | .start = IPU_CTRL_BASE_ADDR + 0x60, | ||
358 | .end = IPU_CTRL_BASE_ADDR + 0x87, | ||
359 | .flags = IORESOURCE_MEM, | ||
360 | }, | ||
361 | }; | ||
362 | |||
363 | struct platform_device mx3_camera = { | ||
364 | .name = "mx3-camera", | ||
365 | .id = 0, | ||
366 | .num_resources = ARRAY_SIZE(camera_resources), | ||
367 | .resource = camera_resources, | ||
368 | .dev = { | ||
369 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
370 | }, | ||
371 | }; | ||
372 | |||
373 | static struct resource otg_resources[] = { | ||
374 | { | ||
375 | .start = OTG_BASE_ADDR, | ||
376 | .end = OTG_BASE_ADDR + 0x1ff, | ||
377 | .flags = IORESOURCE_MEM, | ||
378 | }, { | ||
379 | .start = MXC_INT_USB3, | ||
380 | .end = MXC_INT_USB3, | ||
381 | .flags = IORESOURCE_IRQ, | ||
382 | }, | ||
383 | }; | ||
384 | |||
385 | static u64 otg_dmamask = DMA_BIT_MASK(32); | ||
386 | |||
387 | /* OTG gadget device */ | ||
388 | struct platform_device mxc_otg_udc_device = { | ||
389 | .name = "fsl-usb2-udc", | ||
390 | .id = -1, | ||
391 | .dev = { | ||
392 | .dma_mask = &otg_dmamask, | ||
393 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
394 | }, | ||
395 | .resource = otg_resources, | ||
396 | .num_resources = ARRAY_SIZE(otg_resources), | ||
397 | }; | ||
398 | |||
336 | #ifdef CONFIG_ARCH_MX35 | 399 | #ifdef CONFIG_ARCH_MX35 |
337 | static struct resource mxc_fec_resources[] = { | 400 | static struct resource mxc_fec_resources[] = { |
338 | { | 401 | { |
@@ -359,6 +422,7 @@ static int mx3_devices_init(void) | |||
359 | if (cpu_is_mx31()) { | 422 | if (cpu_is_mx31()) { |
360 | mxc_nand_resources[0].start = MX31_NFC_BASE_ADDR; | 423 | mxc_nand_resources[0].start = MX31_NFC_BASE_ADDR; |
361 | mxc_nand_resources[0].end = MX31_NFC_BASE_ADDR + 0xfff; | 424 | mxc_nand_resources[0].end = MX31_NFC_BASE_ADDR + 0xfff; |
425 | mxc_register_device(&mxc_rnga_device, NULL); | ||
362 | } | 426 | } |
363 | if (cpu_is_mx35()) { | 427 | if (cpu_is_mx35()) { |
364 | mxc_nand_resources[0].start = MX35_NFC_BASE_ADDR; | 428 | mxc_nand_resources[0].start = MX35_NFC_BASE_ADDR; |
diff --git a/arch/arm/mach-mx3/devices.h b/arch/arm/mach-mx3/devices.h index 88c04b296fab..475410ada60a 100644 --- a/arch/arm/mach-mx3/devices.h +++ b/arch/arm/mach-mx3/devices.h | |||
@@ -11,6 +11,8 @@ extern struct platform_device mxc_i2c_device1; | |||
11 | extern struct platform_device mxc_i2c_device2; | 11 | extern struct platform_device mxc_i2c_device2; |
12 | extern struct platform_device mx3_ipu; | 12 | extern struct platform_device mx3_ipu; |
13 | extern struct platform_device mx3_fb; | 13 | extern struct platform_device mx3_fb; |
14 | extern struct platform_device mx3_camera; | ||
14 | extern struct platform_device mxc_fec_device; | 15 | extern struct platform_device mxc_fec_device; |
15 | extern struct platform_device mxcsdhc_device0; | 16 | extern struct platform_device mxcsdhc_device0; |
16 | extern struct platform_device mxcsdhc_device1; | 17 | extern struct platform_device mxcsdhc_device1; |
18 | extern struct platform_device mxc_otg_udc_device; | ||
diff --git a/arch/arm/mach-mx3/iomux.c b/arch/arm/mach-mx3/iomux.c index 40ffc5a664d9..c66ccbcdc11b 100644 --- a/arch/arm/mach-mx3/iomux.c +++ b/arch/arm/mach-mx3/iomux.c | |||
@@ -21,7 +21,6 @@ | |||
21 | #include <linux/module.h> | 21 | #include <linux/module.h> |
22 | #include <linux/spinlock.h> | 22 | #include <linux/spinlock.h> |
23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
24 | #include <linux/gpio.h> | ||
25 | #include <linux/kernel.h> | 24 | #include <linux/kernel.h> |
26 | #include <mach/hardware.h> | 25 | #include <mach/hardware.h> |
27 | #include <mach/gpio.h> | 26 | #include <mach/gpio.h> |
@@ -94,15 +93,13 @@ void mxc_iomux_set_pad(enum iomux_pins pin, u32 config) | |||
94 | EXPORT_SYMBOL(mxc_iomux_set_pad); | 93 | EXPORT_SYMBOL(mxc_iomux_set_pad); |
95 | 94 | ||
96 | /* | 95 | /* |
97 | * setups a single pin: | 96 | * allocs a single pin: |
98 | * - reserves the pin so that it is not claimed by another driver | 97 | * - reserves the pin so that it is not claimed by another driver |
99 | * - setups the iomux according to the configuration | 98 | * - setups the iomux according to the configuration |
100 | * - if the pin is configured as a GPIO, we claim it through kernel gpiolib | ||
101 | */ | 99 | */ |
102 | int mxc_iomux_setup_pin(const unsigned int pin, const char *label) | 100 | int mxc_iomux_alloc_pin(const unsigned int pin, const char *label) |
103 | { | 101 | { |
104 | unsigned pad = pin & IOMUX_PADNUM_MASK; | 102 | unsigned pad = pin & IOMUX_PADNUM_MASK; |
105 | unsigned gpio; | ||
106 | 103 | ||
107 | if (pad >= (PIN_MAX + 1)) { | 104 | if (pad >= (PIN_MAX + 1)) { |
108 | printk(KERN_ERR "mxc_iomux: Attempt to request nonexistant pin %u for \"%s\"\n", | 105 | printk(KERN_ERR "mxc_iomux: Attempt to request nonexistant pin %u for \"%s\"\n", |
@@ -113,19 +110,13 @@ int mxc_iomux_setup_pin(const unsigned int pin, const char *label) | |||
113 | if (test_and_set_bit(pad, mxc_pin_alloc_map)) { | 110 | if (test_and_set_bit(pad, mxc_pin_alloc_map)) { |
114 | printk(KERN_ERR "mxc_iomux: pin %u already used. Allocation for \"%s\" failed\n", | 111 | printk(KERN_ERR "mxc_iomux: pin %u already used. Allocation for \"%s\" failed\n", |
115 | pad, label ? label : "?"); | 112 | pad, label ? label : "?"); |
116 | return -EINVAL; | 113 | return -EBUSY; |
117 | } | 114 | } |
118 | mxc_iomux_mode(pin); | 115 | mxc_iomux_mode(pin); |
119 | 116 | ||
120 | /* if we have a gpio, we can allocate it */ | ||
121 | gpio = (pin & IOMUX_GPIONUM_MASK) >> IOMUX_GPIONUM_SHIFT; | ||
122 | if (gpio < (GPIO_PORT_MAX + 1) * 32) | ||
123 | if (gpio_request(gpio, label)) | ||
124 | return -EINVAL; | ||
125 | |||
126 | return 0; | 117 | return 0; |
127 | } | 118 | } |
128 | EXPORT_SYMBOL(mxc_iomux_setup_pin); | 119 | EXPORT_SYMBOL(mxc_iomux_alloc_pin); |
129 | 120 | ||
130 | int mxc_iomux_setup_multiple_pins(unsigned int *pin_list, unsigned count, | 121 | int mxc_iomux_setup_multiple_pins(unsigned int *pin_list, unsigned count, |
131 | const char *label) | 122 | const char *label) |
@@ -135,7 +126,8 @@ int mxc_iomux_setup_multiple_pins(unsigned int *pin_list, unsigned count, | |||
135 | int ret = -EINVAL; | 126 | int ret = -EINVAL; |
136 | 127 | ||
137 | for (i = 0; i < count; i++) { | 128 | for (i = 0; i < count; i++) { |
138 | if (mxc_iomux_setup_pin(*p, label)) | 129 | ret = mxc_iomux_alloc_pin(*p, label); |
130 | if (ret) | ||
139 | goto setup_error; | 131 | goto setup_error; |
140 | p++; | 132 | p++; |
141 | } | 133 | } |
@@ -150,14 +142,9 @@ EXPORT_SYMBOL(mxc_iomux_setup_multiple_pins); | |||
150 | void mxc_iomux_release_pin(const unsigned int pin) | 142 | void mxc_iomux_release_pin(const unsigned int pin) |
151 | { | 143 | { |
152 | unsigned pad = pin & IOMUX_PADNUM_MASK; | 144 | unsigned pad = pin & IOMUX_PADNUM_MASK; |
153 | unsigned gpio; | ||
154 | 145 | ||
155 | if (pad < (PIN_MAX + 1)) | 146 | if (pad < (PIN_MAX + 1)) |
156 | clear_bit(pad, mxc_pin_alloc_map); | 147 | clear_bit(pad, mxc_pin_alloc_map); |
157 | |||
158 | gpio = (pin & IOMUX_GPIONUM_MASK) >> IOMUX_GPIONUM_SHIFT; | ||
159 | if (gpio < (GPIO_PORT_MAX + 1) * 32) | ||
160 | gpio_free(gpio); | ||
161 | } | 148 | } |
162 | EXPORT_SYMBOL(mxc_iomux_release_pin); | 149 | EXPORT_SYMBOL(mxc_iomux_release_pin); |
163 | 150 | ||
diff --git a/arch/arm/mach-mx3/mm.c b/arch/arm/mach-mx3/mm.c index 9e1459cb4b74..1f5fdd456cb9 100644 --- a/arch/arm/mach-mx3/mm.c +++ b/arch/arm/mach-mx3/mm.c | |||
@@ -72,8 +72,17 @@ static struct map_desc mxc_io_desc[] __initdata = { | |||
72 | * system startup to create static physical to virtual memory mappings | 72 | * system startup to create static physical to virtual memory mappings |
73 | * for the IO modules. | 73 | * for the IO modules. |
74 | */ | 74 | */ |
75 | void __init mxc_map_io(void) | 75 | void __init mx31_map_io(void) |
76 | { | 76 | { |
77 | mxc_set_cpu_type(MXC_CPU_MX31); | ||
78 | |||
79 | iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); | ||
80 | } | ||
81 | |||
82 | void __init mx35_map_io(void) | ||
83 | { | ||
84 | mxc_set_cpu_type(MXC_CPU_MX35); | ||
85 | |||
77 | iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); | 86 | iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); |
78 | } | 87 | } |
79 | 88 | ||
diff --git a/arch/arm/mach-mx3/mx31ads.c b/arch/arm/mach-mx3/mx31ads.c index a6d6efefa6aa..30e2767a78ae 100644 --- a/arch/arm/mach-mx3/mx31ads.c +++ b/arch/arm/mach-mx3/mx31ads.c | |||
@@ -187,7 +187,7 @@ static void __init mx31ads_init_expio(void) | |||
187 | /* | 187 | /* |
188 | * Configure INT line as GPIO input | 188 | * Configure INT line as GPIO input |
189 | */ | 189 | */ |
190 | mxc_iomux_setup_pin(IOMUX_MODE(MX31_PIN_GPIO1_4, IOMUX_CONFIG_GPIO), "expio"); | 190 | mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_GPIO1_4, IOMUX_CONFIG_GPIO), "expio"); |
191 | 191 | ||
192 | /* disable the interrupt and clear the status */ | 192 | /* disable the interrupt and clear the status */ |
193 | __raw_writew(0xFFFF, PBC_INTMASK_CLEAR_REG); | 193 | __raw_writew(0xFFFF, PBC_INTMASK_CLEAR_REG); |
@@ -511,7 +511,7 @@ static struct map_desc mx31ads_io_desc[] __initdata = { | |||
511 | */ | 511 | */ |
512 | static void __init mx31ads_map_io(void) | 512 | static void __init mx31ads_map_io(void) |
513 | { | 513 | { |
514 | mxc_map_io(); | 514 | mx31_map_io(); |
515 | iotable_init(mx31ads_io_desc, ARRAY_SIZE(mx31ads_io_desc)); | 515 | iotable_init(mx31ads_io_desc, ARRAY_SIZE(mx31ads_io_desc)); |
516 | } | 516 | } |
517 | 517 | ||
diff --git a/arch/arm/mach-mx3/mx31lite.c b/arch/arm/mach-mx3/mx31lite.c index 894d98cd9941..86fe70fa3e13 100644 --- a/arch/arm/mach-mx3/mx31lite.c +++ b/arch/arm/mach-mx3/mx31lite.c | |||
@@ -22,6 +22,9 @@ | |||
22 | #include <linux/init.h> | 22 | #include <linux/init.h> |
23 | #include <linux/kernel.h> | 23 | #include <linux/kernel.h> |
24 | #include <linux/memory.h> | 24 | #include <linux/memory.h> |
25 | #include <linux/platform_device.h> | ||
26 | #include <linux/gpio.h> | ||
27 | #include <linux/smsc911x.h> | ||
25 | 28 | ||
26 | #include <mach/hardware.h> | 29 | #include <mach/hardware.h> |
27 | #include <asm/mach-types.h> | 30 | #include <asm/mach-types.h> |
@@ -32,11 +35,64 @@ | |||
32 | #include <asm/page.h> | 35 | #include <asm/page.h> |
33 | #include <asm/setup.h> | 36 | #include <asm/setup.h> |
34 | #include <mach/board-mx31lite.h> | 37 | #include <mach/board-mx31lite.h> |
38 | #include <mach/imx-uart.h> | ||
39 | #include <mach/iomux-mx3.h> | ||
40 | #include <mach/irqs.h> | ||
41 | #include <mach/mxc_nand.h> | ||
42 | #include "devices.h" | ||
35 | 43 | ||
36 | /* | 44 | /* |
37 | * This file contains the board-specific initialization routines. | 45 | * This file contains the board-specific initialization routines. |
38 | */ | 46 | */ |
39 | 47 | ||
48 | static unsigned int mx31lite_pins[] = { | ||
49 | /* UART1 */ | ||
50 | MX31_PIN_CTS1__CTS1, | ||
51 | MX31_PIN_RTS1__RTS1, | ||
52 | MX31_PIN_TXD1__TXD1, | ||
53 | MX31_PIN_RXD1__RXD1, | ||
54 | /* LAN9117 IRQ pin */ | ||
55 | IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO), | ||
56 | }; | ||
57 | |||
58 | static struct imxuart_platform_data uart_pdata = { | ||
59 | .flags = IMXUART_HAVE_RTSCTS, | ||
60 | }; | ||
61 | |||
62 | static struct mxc_nand_platform_data mx31lite_nand_board_info = { | ||
63 | .width = 1, | ||
64 | .hw_ecc = 1, | ||
65 | }; | ||
66 | |||
67 | static struct smsc911x_platform_config smsc911x_config = { | ||
68 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, | ||
69 | .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, | ||
70 | .flags = SMSC911X_USE_16BIT, | ||
71 | }; | ||
72 | |||
73 | static struct resource smsc911x_resources[] = { | ||
74 | [0] = { | ||
75 | .start = CS4_BASE_ADDR, | ||
76 | .end = CS4_BASE_ADDR + 0x100, | ||
77 | .flags = IORESOURCE_MEM, | ||
78 | }, | ||
79 | [1] = { | ||
80 | .start = IOMUX_TO_IRQ(MX31_PIN_SFS6), | ||
81 | .end = IOMUX_TO_IRQ(MX31_PIN_SFS6), | ||
82 | .flags = IORESOURCE_IRQ, | ||
83 | }, | ||
84 | }; | ||
85 | |||
86 | static struct platform_device smsc911x_device = { | ||
87 | .name = "smsc911x", | ||
88 | .id = -1, | ||
89 | .num_resources = ARRAY_SIZE(smsc911x_resources), | ||
90 | .resource = smsc911x_resources, | ||
91 | .dev = { | ||
92 | .platform_data = &smsc911x_config, | ||
93 | }, | ||
94 | }; | ||
95 | |||
40 | /* | 96 | /* |
41 | * This structure defines the MX31 memory map. | 97 | * This structure defines the MX31 memory map. |
42 | */ | 98 | */ |
@@ -59,7 +115,7 @@ static struct map_desc mx31lite_io_desc[] __initdata = { | |||
59 | */ | 115 | */ |
60 | void __init mx31lite_map_io(void) | 116 | void __init mx31lite_map_io(void) |
61 | { | 117 | { |
62 | mxc_map_io(); | 118 | mx31_map_io(); |
63 | iotable_init(mx31lite_io_desc, ARRAY_SIZE(mx31lite_io_desc)); | 119 | iotable_init(mx31lite_io_desc, ARRAY_SIZE(mx31lite_io_desc)); |
64 | } | 120 | } |
65 | 121 | ||
@@ -68,6 +124,22 @@ void __init mx31lite_map_io(void) | |||
68 | */ | 124 | */ |
69 | static void __init mxc_board_init(void) | 125 | static void __init mxc_board_init(void) |
70 | { | 126 | { |
127 | int ret; | ||
128 | |||
129 | mxc_iomux_setup_multiple_pins(mx31lite_pins, ARRAY_SIZE(mx31lite_pins), | ||
130 | "mx31lite"); | ||
131 | |||
132 | mxc_register_device(&mxc_uart_device0, &uart_pdata); | ||
133 | mxc_register_device(&mxc_nand_device, &mx31lite_nand_board_info); | ||
134 | |||
135 | /* SMSC9117 IRQ pin */ | ||
136 | ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq"); | ||
137 | if (ret) | ||
138 | pr_warning("could not get LAN irq gpio\n"); | ||
139 | else { | ||
140 | gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_SFS6)); | ||
141 | platform_device_register(&smsc911x_device); | ||
142 | } | ||
71 | } | 143 | } |
72 | 144 | ||
73 | static void __init mx31lite_timer_init(void) | 145 | static void __init mx31lite_timer_init(void) |
diff --git a/arch/arm/mach-mx3/mx31moboard-devboard.c b/arch/arm/mach-mx3/mx31moboard-devboard.c index d080b4add79c..4704405165a1 100644 --- a/arch/arm/mach-mx3/mx31moboard-devboard.c +++ b/arch/arm/mach-mx3/mx31moboard-devboard.c | |||
@@ -16,33 +16,142 @@ | |||
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
17 | */ | 17 | */ |
18 | 18 | ||
19 | #include <linux/types.h> | 19 | #include <linux/fsl_devices.h> |
20 | #include <linux/gpio.h> | ||
20 | #include <linux/init.h> | 21 | #include <linux/init.h> |
21 | 22 | #include <linux/interrupt.h> | |
22 | #include <linux/platform_device.h> | 23 | #include <linux/platform_device.h> |
24 | #include <linux/types.h> | ||
23 | 25 | ||
24 | #include <mach/hardware.h> | ||
25 | #include <mach/common.h> | 26 | #include <mach/common.h> |
26 | #include <mach/imx-uart.h> | 27 | #include <mach/imx-uart.h> |
27 | #include <mach/iomux-mx3.h> | 28 | #include <mach/iomux-mx3.h> |
29 | #include <mach/hardware.h> | ||
30 | #include <mach/mmc.h> | ||
28 | 31 | ||
29 | #include "devices.h" | 32 | #include "devices.h" |
30 | 33 | ||
34 | static unsigned int devboard_pins[] = { | ||
35 | /* UART1 */ | ||
36 | MX31_PIN_CTS2__CTS2, MX31_PIN_RTS2__RTS2, | ||
37 | MX31_PIN_TXD2__TXD2, MX31_PIN_RXD2__RXD2, | ||
38 | /* SDHC2 */ | ||
39 | MX31_PIN_PC_PWRON__SD2_DATA3, MX31_PIN_PC_VS1__SD2_DATA2, | ||
40 | MX31_PIN_PC_READY__SD2_DATA1, MX31_PIN_PC_WAIT_B__SD2_DATA0, | ||
41 | MX31_PIN_PC_CD2_B__SD2_CLK, MX31_PIN_PC_CD1_B__SD2_CMD, | ||
42 | MX31_PIN_ATA_DIOR__GPIO3_28, MX31_PIN_ATA_DIOW__GPIO3_29, | ||
43 | /* USB OTG */ | ||
44 | MX31_PIN_USBOTG_DATA0__USBOTG_DATA0, | ||
45 | MX31_PIN_USBOTG_DATA1__USBOTG_DATA1, | ||
46 | MX31_PIN_USBOTG_DATA2__USBOTG_DATA2, | ||
47 | MX31_PIN_USBOTG_DATA3__USBOTG_DATA3, | ||
48 | MX31_PIN_USBOTG_DATA4__USBOTG_DATA4, | ||
49 | MX31_PIN_USBOTG_DATA5__USBOTG_DATA5, | ||
50 | MX31_PIN_USBOTG_DATA6__USBOTG_DATA6, | ||
51 | MX31_PIN_USBOTG_DATA7__USBOTG_DATA7, | ||
52 | MX31_PIN_USBOTG_CLK__USBOTG_CLK, MX31_PIN_USBOTG_DIR__USBOTG_DIR, | ||
53 | MX31_PIN_USBOTG_NXT__USBOTG_NXT, MX31_PIN_USBOTG_STP__USBOTG_STP, | ||
54 | MX31_PIN_USB_OC__GPIO1_30, | ||
55 | }; | ||
56 | |||
31 | static struct imxuart_platform_data uart_pdata = { | 57 | static struct imxuart_platform_data uart_pdata = { |
32 | .flags = IMXUART_HAVE_RTSCTS, | 58 | .flags = IMXUART_HAVE_RTSCTS, |
33 | }; | 59 | }; |
34 | 60 | ||
35 | static int mxc_uart1_pins[] = { | 61 | #define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR) |
36 | MX31_PIN_CTS2__CTS2, MX31_PIN_RTS2__RTS2, | 62 | #define SDHC2_WP IOMUX_TO_GPIO(MX31_PIN_ATA_DIOW) |
37 | MX31_PIN_TXD2__TXD2, MX31_PIN_RXD2__RXD2, | 63 | |
64 | static int devboard_sdhc2_get_ro(struct device *dev) | ||
65 | { | ||
66 | return gpio_get_value(SDHC2_WP); | ||
67 | } | ||
68 | |||
69 | static int devboard_sdhc2_init(struct device *dev, irq_handler_t detect_irq, | ||
70 | void *data) | ||
71 | { | ||
72 | int ret; | ||
73 | |||
74 | ret = gpio_request(SDHC2_CD, "sdhc-detect"); | ||
75 | if (ret) | ||
76 | return ret; | ||
77 | |||
78 | gpio_direction_input(SDHC2_CD); | ||
79 | |||
80 | ret = gpio_request(SDHC2_WP, "sdhc-wp"); | ||
81 | if (ret) | ||
82 | goto err_gpio_free; | ||
83 | gpio_direction_input(SDHC2_WP); | ||
84 | |||
85 | ret = request_irq(gpio_to_irq(SDHC2_CD), detect_irq, | ||
86 | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, | ||
87 | "sdhc2-card-detect", data); | ||
88 | if (ret) | ||
89 | goto err_gpio_free_2; | ||
90 | |||
91 | return 0; | ||
92 | |||
93 | err_gpio_free_2: | ||
94 | gpio_free(SDHC2_WP); | ||
95 | err_gpio_free: | ||
96 | gpio_free(SDHC2_CD); | ||
97 | |||
98 | return ret; | ||
99 | } | ||
100 | |||
101 | static void devboard_sdhc2_exit(struct device *dev, void *data) | ||
102 | { | ||
103 | free_irq(gpio_to_irq(SDHC2_CD), data); | ||
104 | gpio_free(SDHC2_WP); | ||
105 | gpio_free(SDHC2_CD); | ||
106 | } | ||
107 | |||
108 | static struct imxmmc_platform_data sdhc2_pdata = { | ||
109 | .get_ro = devboard_sdhc2_get_ro, | ||
110 | .init = devboard_sdhc2_init, | ||
111 | .exit = devboard_sdhc2_exit, | ||
112 | }; | ||
113 | |||
114 | static struct fsl_usb2_platform_data usb_pdata = { | ||
115 | .operating_mode = FSL_USB2_DR_DEVICE, | ||
116 | .phy_mode = FSL_USB2_PHY_ULPI, | ||
38 | }; | 117 | }; |
39 | 118 | ||
119 | #define OTG_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST) | ||
120 | #define OTG_EN_B IOMUX_TO_GPIO(MX31_PIN_USB_OC) | ||
121 | |||
122 | static void devboard_usbotg_init(void) | ||
123 | { | ||
124 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, OTG_PAD_CFG); | ||
125 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, OTG_PAD_CFG); | ||
126 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, OTG_PAD_CFG); | ||
127 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, OTG_PAD_CFG); | ||
128 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, OTG_PAD_CFG); | ||
129 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, OTG_PAD_CFG); | ||
130 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, OTG_PAD_CFG); | ||
131 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, OTG_PAD_CFG); | ||
132 | mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, OTG_PAD_CFG); | ||
133 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, OTG_PAD_CFG); | ||
134 | mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, OTG_PAD_CFG); | ||
135 | mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, OTG_PAD_CFG); | ||
136 | |||
137 | gpio_request(OTG_EN_B, "usb-udc-en"); | ||
138 | gpio_direction_output(OTG_EN_B, 0); | ||
139 | } | ||
140 | |||
40 | /* | 141 | /* |
41 | * system init for baseboard usage. Will be called by mx31moboard init. | 142 | * system init for baseboard usage. Will be called by mx31moboard init. |
42 | */ | 143 | */ |
43 | void __init mx31moboard_devboard_init(void) | 144 | void __init mx31moboard_devboard_init(void) |
44 | { | 145 | { |
45 | printk(KERN_INFO "Initializing mx31devboard peripherals\n"); | 146 | printk(KERN_INFO "Initializing mx31devboard peripherals\n"); |
46 | mxc_iomux_setup_multiple_pins(mxc_uart1_pins, ARRAY_SIZE(mxc_uart1_pins), "uart1"); | 147 | |
148 | mxc_iomux_setup_multiple_pins(devboard_pins, ARRAY_SIZE(devboard_pins), | ||
149 | "devboard"); | ||
150 | |||
47 | mxc_register_device(&mxc_uart_device1, &uart_pdata); | 151 | mxc_register_device(&mxc_uart_device1, &uart_pdata); |
152 | |||
153 | mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata); | ||
154 | |||
155 | devboard_usbotg_init(); | ||
156 | mxc_register_device(&mxc_otg_udc_device, &usb_pdata); | ||
48 | } | 157 | } |
diff --git a/arch/arm/mach-mx3/mx31moboard-marxbot.c b/arch/arm/mach-mx3/mx31moboard-marxbot.c index 9ef9566823fb..641c3d6153ae 100644 --- a/arch/arm/mach-mx3/mx31moboard-marxbot.c +++ b/arch/arm/mach-mx3/mx31moboard-marxbot.c | |||
@@ -16,22 +16,144 @@ | |||
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
17 | */ | 17 | */ |
18 | 18 | ||
19 | #include <linux/types.h> | 19 | #include <linux/fsl_devices.h> |
20 | #include <linux/gpio.h> | ||
20 | #include <linux/init.h> | 21 | #include <linux/init.h> |
21 | 22 | #include <linux/interrupt.h> | |
22 | #include <linux/platform_device.h> | 23 | #include <linux/platform_device.h> |
24 | #include <linux/types.h> | ||
23 | 25 | ||
24 | #include <mach/hardware.h> | ||
25 | #include <mach/common.h> | 26 | #include <mach/common.h> |
27 | #include <mach/hardware.h> | ||
26 | #include <mach/imx-uart.h> | 28 | #include <mach/imx-uart.h> |
27 | #include <mach/iomux-mx3.h> | 29 | #include <mach/iomux-mx3.h> |
30 | #include <mach/mmc.h> | ||
28 | 31 | ||
29 | #include "devices.h" | 32 | #include "devices.h" |
30 | 33 | ||
34 | static unsigned int marxbot_pins[] = { | ||
35 | /* SDHC2 */ | ||
36 | MX31_PIN_PC_PWRON__SD2_DATA3, MX31_PIN_PC_VS1__SD2_DATA2, | ||
37 | MX31_PIN_PC_READY__SD2_DATA1, MX31_PIN_PC_WAIT_B__SD2_DATA0, | ||
38 | MX31_PIN_PC_CD2_B__SD2_CLK, MX31_PIN_PC_CD1_B__SD2_CMD, | ||
39 | MX31_PIN_ATA_DIOR__GPIO3_28, MX31_PIN_ATA_DIOW__GPIO3_29, | ||
40 | /* CSI */ | ||
41 | MX31_PIN_CSI_D4__CSI_D4, MX31_PIN_CSI_D5__CSI_D5, | ||
42 | MX31_PIN_CSI_D6__CSI_D6, MX31_PIN_CSI_D7__CSI_D7, | ||
43 | MX31_PIN_CSI_D8__CSI_D8, MX31_PIN_CSI_D9__CSI_D9, | ||
44 | MX31_PIN_CSI_D10__CSI_D10, MX31_PIN_CSI_D11__CSI_D11, | ||
45 | MX31_PIN_CSI_D12__CSI_D12, MX31_PIN_CSI_D13__CSI_D13, | ||
46 | MX31_PIN_CSI_D14__CSI_D14, MX31_PIN_CSI_D15__CSI_D15, | ||
47 | MX31_PIN_CSI_HSYNC__CSI_HSYNC, MX31_PIN_CSI_MCLK__CSI_MCLK, | ||
48 | MX31_PIN_CSI_PIXCLK__CSI_PIXCLK, MX31_PIN_CSI_VSYNC__CSI_VSYNC, | ||
49 | MX31_PIN_GPIO3_0__GPIO3_0, MX31_PIN_GPIO3_1__GPIO3_1, | ||
50 | MX31_PIN_TXD2__GPIO1_28, | ||
51 | /* USB OTG */ | ||
52 | MX31_PIN_USBOTG_DATA0__USBOTG_DATA0, | ||
53 | MX31_PIN_USBOTG_DATA1__USBOTG_DATA1, | ||
54 | MX31_PIN_USBOTG_DATA2__USBOTG_DATA2, | ||
55 | MX31_PIN_USBOTG_DATA3__USBOTG_DATA3, | ||
56 | MX31_PIN_USBOTG_DATA4__USBOTG_DATA4, | ||
57 | MX31_PIN_USBOTG_DATA5__USBOTG_DATA5, | ||
58 | MX31_PIN_USBOTG_DATA6__USBOTG_DATA6, | ||
59 | MX31_PIN_USBOTG_DATA7__USBOTG_DATA7, | ||
60 | MX31_PIN_USBOTG_CLK__USBOTG_CLK, MX31_PIN_USBOTG_DIR__USBOTG_DIR, | ||
61 | MX31_PIN_USBOTG_NXT__USBOTG_NXT, MX31_PIN_USBOTG_STP__USBOTG_STP, | ||
62 | MX31_PIN_USB_OC__GPIO1_30, | ||
63 | }; | ||
64 | |||
65 | #define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR) | ||
66 | #define SDHC2_WP IOMUX_TO_GPIO(MX31_PIN_ATA_DIOW) | ||
67 | |||
68 | static int marxbot_sdhc2_get_ro(struct device *dev) | ||
69 | { | ||
70 | return gpio_get_value(SDHC2_WP); | ||
71 | } | ||
72 | |||
73 | static int marxbot_sdhc2_init(struct device *dev, irq_handler_t detect_irq, | ||
74 | void *data) | ||
75 | { | ||
76 | int ret; | ||
77 | |||
78 | ret = gpio_request(SDHC2_CD, "sdhc-detect"); | ||
79 | if (ret) | ||
80 | return ret; | ||
81 | |||
82 | gpio_direction_input(SDHC2_CD); | ||
83 | |||
84 | ret = gpio_request(SDHC2_WP, "sdhc-wp"); | ||
85 | if (ret) | ||
86 | goto err_gpio_free; | ||
87 | gpio_direction_input(SDHC2_WP); | ||
88 | |||
89 | ret = request_irq(gpio_to_irq(SDHC2_CD), detect_irq, | ||
90 | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, | ||
91 | "sdhc2-card-detect", data); | ||
92 | if (ret) | ||
93 | goto err_gpio_free_2; | ||
94 | |||
95 | return 0; | ||
96 | |||
97 | err_gpio_free_2: | ||
98 | gpio_free(SDHC2_WP); | ||
99 | err_gpio_free: | ||
100 | gpio_free(SDHC2_CD); | ||
101 | |||
102 | return ret; | ||
103 | } | ||
104 | |||
105 | static void marxbot_sdhc2_exit(struct device *dev, void *data) | ||
106 | { | ||
107 | free_irq(gpio_to_irq(SDHC2_CD), data); | ||
108 | gpio_free(SDHC2_WP); | ||
109 | gpio_free(SDHC2_CD); | ||
110 | } | ||
111 | |||
112 | static struct imxmmc_platform_data sdhc2_pdata = { | ||
113 | .get_ro = marxbot_sdhc2_get_ro, | ||
114 | .init = marxbot_sdhc2_init, | ||
115 | .exit = marxbot_sdhc2_exit, | ||
116 | }; | ||
117 | |||
118 | static struct fsl_usb2_platform_data usb_pdata = { | ||
119 | .operating_mode = FSL_USB2_DR_DEVICE, | ||
120 | .phy_mode = FSL_USB2_PHY_ULPI, | ||
121 | }; | ||
122 | |||
123 | #define OTG_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST) | ||
124 | #define OTG_EN_B IOMUX_TO_GPIO(MX31_PIN_USB_OC) | ||
125 | |||
126 | static void marxbot_usbotg_init(void) | ||
127 | { | ||
128 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, OTG_PAD_CFG); | ||
129 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, OTG_PAD_CFG); | ||
130 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, OTG_PAD_CFG); | ||
131 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, OTG_PAD_CFG); | ||
132 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, OTG_PAD_CFG); | ||
133 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, OTG_PAD_CFG); | ||
134 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, OTG_PAD_CFG); | ||
135 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, OTG_PAD_CFG); | ||
136 | mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, OTG_PAD_CFG); | ||
137 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, OTG_PAD_CFG); | ||
138 | mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, OTG_PAD_CFG); | ||
139 | mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, OTG_PAD_CFG); | ||
140 | |||
141 | gpio_request(OTG_EN_B, "usb-udc-en"); | ||
142 | gpio_direction_output(OTG_EN_B, 0); | ||
143 | } | ||
144 | |||
31 | /* | 145 | /* |
32 | * system init for baseboard usage. Will be called by mx31moboard init. | 146 | * system init for baseboard usage. Will be called by mx31moboard init. |
33 | */ | 147 | */ |
34 | void __init mx31moboard_marxbot_init(void) | 148 | void __init mx31moboard_marxbot_init(void) |
35 | { | 149 | { |
36 | printk(KERN_INFO "Initializing mx31marxbot peripherals\n"); | 150 | printk(KERN_INFO "Initializing mx31marxbot peripherals\n"); |
151 | |||
152 | mxc_iomux_setup_multiple_pins(marxbot_pins, ARRAY_SIZE(marxbot_pins), | ||
153 | "marxbot"); | ||
154 | |||
155 | mxc_register_device(&mxcsdhc_device1, &sdhc2_pdata); | ||
156 | |||
157 | marxbot_usbotg_init(); | ||
158 | mxc_register_device(&mxc_otg_udc_device, &usb_pdata); | ||
37 | } | 159 | } |
diff --git a/arch/arm/mach-mx3/mx31moboard.c b/arch/arm/mach-mx3/mx31moboard.c index 34c2a1b99d4f..a17f2e411609 100644 --- a/arch/arm/mach-mx3/mx31moboard.c +++ b/arch/arm/mach-mx3/mx31moboard.c | |||
@@ -16,26 +16,47 @@ | |||
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
17 | */ | 17 | */ |
18 | 18 | ||
19 | #include <linux/types.h> | 19 | #include <linux/gpio.h> |
20 | #include <linux/init.h> | 20 | #include <linux/init.h> |
21 | 21 | #include <linux/interrupt.h> | |
22 | #include <linux/platform_device.h> | 22 | #include <linux/memory.h> |
23 | #include <linux/mtd/physmap.h> | 23 | #include <linux/mtd/physmap.h> |
24 | #include <linux/mtd/partitions.h> | 24 | #include <linux/mtd/partitions.h> |
25 | #include <linux/memory.h> | 25 | #include <linux/platform_device.h> |
26 | #include <linux/types.h> | ||
26 | 27 | ||
27 | #include <mach/hardware.h> | ||
28 | #include <asm/mach-types.h> | 28 | #include <asm/mach-types.h> |
29 | #include <asm/mach/arch.h> | 29 | #include <asm/mach/arch.h> |
30 | #include <asm/mach/time.h> | 30 | #include <asm/mach/time.h> |
31 | #include <asm/mach/map.h> | 31 | #include <asm/mach/map.h> |
32 | #include <mach/board-mx31moboard.h> | ||
32 | #include <mach/common.h> | 33 | #include <mach/common.h> |
34 | #include <mach/hardware.h> | ||
33 | #include <mach/imx-uart.h> | 35 | #include <mach/imx-uart.h> |
34 | #include <mach/iomux-mx3.h> | 36 | #include <mach/iomux-mx3.h> |
35 | #include <mach/board-mx31moboard.h> | 37 | #include <mach/i2c.h> |
38 | #include <mach/mmc.h> | ||
36 | 39 | ||
37 | #include "devices.h" | 40 | #include "devices.h" |
38 | 41 | ||
42 | static unsigned int moboard_pins[] = { | ||
43 | /* UART0 */ | ||
44 | MX31_PIN_CTS1__CTS1, MX31_PIN_RTS1__RTS1, | ||
45 | MX31_PIN_TXD1__TXD1, MX31_PIN_RXD1__RXD1, | ||
46 | /* UART4 */ | ||
47 | MX31_PIN_PC_RST__CTS5, MX31_PIN_PC_VS2__RTS5, | ||
48 | MX31_PIN_PC_BVD2__TXD5, MX31_PIN_PC_BVD1__RXD5, | ||
49 | /* I2C0 */ | ||
50 | MX31_PIN_I2C_DAT__I2C1_SDA, MX31_PIN_I2C_CLK__I2C1_SCL, | ||
51 | /* I2C1 */ | ||
52 | MX31_PIN_DCD_DTE1__I2C2_SDA, MX31_PIN_RI_DTE1__I2C2_SCL, | ||
53 | /* SDHC1 */ | ||
54 | MX31_PIN_SD1_DATA3__SD1_DATA3, MX31_PIN_SD1_DATA2__SD1_DATA2, | ||
55 | MX31_PIN_SD1_DATA1__SD1_DATA1, MX31_PIN_SD1_DATA0__SD1_DATA0, | ||
56 | MX31_PIN_SD1_CLK__SD1_CLK, MX31_PIN_SD1_CMD__SD1_CMD, | ||
57 | MX31_PIN_ATA_CS0__GPIO3_26, MX31_PIN_ATA_CS1__GPIO3_27, | ||
58 | }; | ||
59 | |||
39 | static struct physmap_flash_data mx31moboard_flash_data = { | 60 | static struct physmap_flash_data mx31moboard_flash_data = { |
40 | .width = 2, | 61 | .width = 2, |
41 | }; | 62 | }; |
@@ -60,17 +81,69 @@ static struct imxuart_platform_data uart_pdata = { | |||
60 | .flags = IMXUART_HAVE_RTSCTS, | 81 | .flags = IMXUART_HAVE_RTSCTS, |
61 | }; | 82 | }; |
62 | 83 | ||
63 | static struct platform_device *devices[] __initdata = { | 84 | static struct imxi2c_platform_data moboard_i2c0_pdata = { |
64 | &mx31moboard_flash, | 85 | .bitrate = 400000, |
65 | }; | 86 | }; |
66 | 87 | ||
67 | static int mxc_uart0_pins[] = { | 88 | static struct imxi2c_platform_data moboard_i2c1_pdata = { |
68 | MX31_PIN_CTS1__CTS1, MX31_PIN_RTS1__RTS1, | 89 | .bitrate = 100000, |
69 | MX31_PIN_TXD1__TXD1, MX31_PIN_RXD1__RXD1, | ||
70 | }; | 90 | }; |
71 | static int mxc_uart4_pins[] = { | 91 | |
72 | MX31_PIN_PC_RST__CTS5, MX31_PIN_PC_VS2__RTS5, | 92 | #define SDHC1_CD IOMUX_TO_GPIO(MX31_PIN_ATA_CS0) |
73 | MX31_PIN_PC_BVD2__TXD5, MX31_PIN_PC_BVD1__RXD5, | 93 | #define SDHC1_WP IOMUX_TO_GPIO(MX31_PIN_ATA_CS1) |
94 | |||
95 | static int moboard_sdhc1_get_ro(struct device *dev) | ||
96 | { | ||
97 | return gpio_get_value(SDHC1_WP); | ||
98 | } | ||
99 | |||
100 | static int moboard_sdhc1_init(struct device *dev, irq_handler_t detect_irq, | ||
101 | void *data) | ||
102 | { | ||
103 | int ret; | ||
104 | |||
105 | ret = gpio_request(SDHC1_CD, "sdhc-detect"); | ||
106 | if (ret) | ||
107 | return ret; | ||
108 | |||
109 | gpio_direction_input(SDHC1_CD); | ||
110 | |||
111 | ret = gpio_request(SDHC1_WP, "sdhc-wp"); | ||
112 | if (ret) | ||
113 | goto err_gpio_free; | ||
114 | gpio_direction_input(SDHC1_WP); | ||
115 | |||
116 | ret = request_irq(gpio_to_irq(SDHC1_CD), detect_irq, | ||
117 | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, | ||
118 | "sdhc1-card-detect", data); | ||
119 | if (ret) | ||
120 | goto err_gpio_free_2; | ||
121 | |||
122 | return 0; | ||
123 | |||
124 | err_gpio_free_2: | ||
125 | gpio_free(SDHC1_WP); | ||
126 | err_gpio_free: | ||
127 | gpio_free(SDHC1_CD); | ||
128 | |||
129 | return ret; | ||
130 | } | ||
131 | |||
132 | static void moboard_sdhc1_exit(struct device *dev, void *data) | ||
133 | { | ||
134 | free_irq(gpio_to_irq(SDHC1_CD), data); | ||
135 | gpio_free(SDHC1_WP); | ||
136 | gpio_free(SDHC1_CD); | ||
137 | } | ||
138 | |||
139 | static struct imxmmc_platform_data sdhc1_pdata = { | ||
140 | .get_ro = moboard_sdhc1_get_ro, | ||
141 | .init = moboard_sdhc1_init, | ||
142 | .exit = moboard_sdhc1_exit, | ||
143 | }; | ||
144 | |||
145 | static struct platform_device *devices[] __initdata = { | ||
146 | &mx31moboard_flash, | ||
74 | }; | 147 | }; |
75 | 148 | ||
76 | static int mx31moboard_baseboard; | 149 | static int mx31moboard_baseboard; |
@@ -81,14 +154,19 @@ core_param(mx31moboard_baseboard, mx31moboard_baseboard, int, 0444); | |||
81 | */ | 154 | */ |
82 | static void __init mxc_board_init(void) | 155 | static void __init mxc_board_init(void) |
83 | { | 156 | { |
157 | mxc_iomux_setup_multiple_pins(moboard_pins, ARRAY_SIZE(moboard_pins), | ||
158 | "moboard"); | ||
159 | |||
84 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 160 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
85 | 161 | ||
86 | mxc_iomux_setup_multiple_pins(mxc_uart0_pins, ARRAY_SIZE(mxc_uart0_pins), "uart0"); | ||
87 | mxc_register_device(&mxc_uart_device0, &uart_pdata); | 162 | mxc_register_device(&mxc_uart_device0, &uart_pdata); |
88 | |||
89 | mxc_iomux_setup_multiple_pins(mxc_uart4_pins, ARRAY_SIZE(mxc_uart4_pins), "uart4"); | ||
90 | mxc_register_device(&mxc_uart_device4, &uart_pdata); | 163 | mxc_register_device(&mxc_uart_device4, &uart_pdata); |
91 | 164 | ||
165 | mxc_register_device(&mxc_i2c_device0, &moboard_i2c0_pdata); | ||
166 | mxc_register_device(&mxc_i2c_device1, &moboard_i2c1_pdata); | ||
167 | |||
168 | mxc_register_device(&mxcsdhc_device0, &sdhc1_pdata); | ||
169 | |||
92 | switch (mx31moboard_baseboard) { | 170 | switch (mx31moboard_baseboard) { |
93 | case MX31NOBOARD: | 171 | case MX31NOBOARD: |
94 | break; | 172 | break; |
@@ -99,7 +177,8 @@ static void __init mxc_board_init(void) | |||
99 | mx31moboard_marxbot_init(); | 177 | mx31moboard_marxbot_init(); |
100 | break; | 178 | break; |
101 | default: | 179 | default: |
102 | printk(KERN_ERR "Illegal mx31moboard_baseboard type %d\n", mx31moboard_baseboard); | 180 | printk(KERN_ERR "Illegal mx31moboard_baseboard type %d\n", |
181 | mx31moboard_baseboard); | ||
103 | } | 182 | } |
104 | } | 183 | } |
105 | 184 | ||
@@ -117,7 +196,7 @@ MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard") | |||
117 | .phys_io = AIPS1_BASE_ADDR, | 196 | .phys_io = AIPS1_BASE_ADDR, |
118 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, | 197 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, |
119 | .boot_params = PHYS_OFFSET + 0x100, | 198 | .boot_params = PHYS_OFFSET + 0x100, |
120 | .map_io = mxc_map_io, | 199 | .map_io = mx31_map_io, |
121 | .init_irq = mxc_init_irq, | 200 | .init_irq = mxc_init_irq, |
122 | .init_machine = mxc_board_init, | 201 | .init_machine = mxc_board_init, |
123 | .timer = &mx31moboard_timer, | 202 | .timer = &mx31moboard_timer, |
diff --git a/arch/arm/mach-mx3/mx31pdk.c b/arch/arm/mach-mx3/mx31pdk.c index bc63f1785691..32599e507534 100644 --- a/arch/arm/mach-mx3/mx31pdk.c +++ b/arch/arm/mach-mx3/mx31pdk.c | |||
@@ -20,6 +20,7 @@ | |||
20 | #include <linux/init.h> | 20 | #include <linux/init.h> |
21 | #include <linux/clk.h> | 21 | #include <linux/clk.h> |
22 | #include <linux/irq.h> | 22 | #include <linux/irq.h> |
23 | #include <linux/gpio.h> | ||
23 | 24 | ||
24 | #include <mach/hardware.h> | 25 | #include <mach/hardware.h> |
25 | #include <asm/mach-types.h> | 26 | #include <asm/mach-types.h> |
@@ -41,21 +42,159 @@ | |||
41 | * @ingroup System | 42 | * @ingroup System |
42 | */ | 43 | */ |
43 | 44 | ||
45 | static int mx31pdk_pins[] = { | ||
46 | /* UART1 */ | ||
47 | MX31_PIN_CTS1__CTS1, | ||
48 | MX31_PIN_RTS1__RTS1, | ||
49 | MX31_PIN_TXD1__TXD1, | ||
50 | MX31_PIN_RXD1__RXD1, | ||
51 | IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO), | ||
52 | }; | ||
53 | |||
44 | static struct imxuart_platform_data uart_pdata = { | 54 | static struct imxuart_platform_data uart_pdata = { |
45 | .flags = IMXUART_HAVE_RTSCTS, | 55 | .flags = IMXUART_HAVE_RTSCTS, |
46 | }; | 56 | }; |
47 | 57 | ||
48 | static int uart_pins[] = { | 58 | /* |
49 | MX31_PIN_CTS1__CTS1, | 59 | * Routines for the CPLD on the debug board. It contains a CPLD handling |
50 | MX31_PIN_RTS1__RTS1, | 60 | * LEDs, switches, interrupts for Ethernet. |
51 | MX31_PIN_TXD1__TXD1, | 61 | */ |
52 | MX31_PIN_RXD1__RXD1 | 62 | |
63 | static void mx31pdk_expio_irq_handler(uint32_t irq, struct irq_desc *desc) | ||
64 | { | ||
65 | uint32_t imr_val; | ||
66 | uint32_t int_valid; | ||
67 | uint32_t expio_irq; | ||
68 | |||
69 | imr_val = __raw_readw(CPLD_INT_MASK_REG); | ||
70 | int_valid = __raw_readw(CPLD_INT_STATUS_REG) & ~imr_val; | ||
71 | |||
72 | expio_irq = MXC_EXP_IO_BASE; | ||
73 | for (; int_valid != 0; int_valid >>= 1, expio_irq++) { | ||
74 | if ((int_valid & 1) == 0) | ||
75 | continue; | ||
76 | generic_handle_irq(expio_irq); | ||
77 | } | ||
78 | } | ||
79 | |||
80 | /* | ||
81 | * Disable an expio pin's interrupt by setting the bit in the imr. | ||
82 | * @param irq an expio virtual irq number | ||
83 | */ | ||
84 | static void expio_mask_irq(uint32_t irq) | ||
85 | { | ||
86 | uint16_t reg; | ||
87 | uint32_t expio = MXC_IRQ_TO_EXPIO(irq); | ||
88 | |||
89 | /* mask the interrupt */ | ||
90 | reg = __raw_readw(CPLD_INT_MASK_REG); | ||
91 | reg |= 1 << expio; | ||
92 | __raw_writew(reg, CPLD_INT_MASK_REG); | ||
93 | } | ||
94 | |||
95 | /* | ||
96 | * Acknowledge an expanded io pin's interrupt by clearing the bit in the isr. | ||
97 | * @param irq an expanded io virtual irq number | ||
98 | */ | ||
99 | static void expio_ack_irq(uint32_t irq) | ||
100 | { | ||
101 | uint32_t expio = MXC_IRQ_TO_EXPIO(irq); | ||
102 | |||
103 | /* clear the interrupt status */ | ||
104 | __raw_writew(1 << expio, CPLD_INT_RESET_REG); | ||
105 | __raw_writew(0, CPLD_INT_RESET_REG); | ||
106 | /* mask the interrupt */ | ||
107 | expio_mask_irq(irq); | ||
108 | } | ||
109 | |||
110 | /* | ||
111 | * Enable a expio pin's interrupt by clearing the bit in the imr. | ||
112 | * @param irq a expio virtual irq number | ||
113 | */ | ||
114 | static void expio_unmask_irq(uint32_t irq) | ||
115 | { | ||
116 | uint16_t reg; | ||
117 | uint32_t expio = MXC_IRQ_TO_EXPIO(irq); | ||
118 | |||
119 | /* unmask the interrupt */ | ||
120 | reg = __raw_readw(CPLD_INT_MASK_REG); | ||
121 | reg &= ~(1 << expio); | ||
122 | __raw_writew(reg, CPLD_INT_MASK_REG); | ||
123 | } | ||
124 | |||
125 | static struct irq_chip expio_irq_chip = { | ||
126 | .ack = expio_ack_irq, | ||
127 | .mask = expio_mask_irq, | ||
128 | .unmask = expio_unmask_irq, | ||
53 | }; | 129 | }; |
54 | 130 | ||
55 | static inline void mxc_init_imx_uart(void) | 131 | static int __init mx31pdk_init_expio(void) |
56 | { | 132 | { |
57 | mxc_iomux_setup_multiple_pins(uart_pins, ARRAY_SIZE(uart_pins), "uart-0"); | 133 | int i; |
58 | mxc_register_device(&mxc_uart_device0, &uart_pdata); | 134 | int ret; |
135 | |||
136 | /* Check if there's a debug board connected */ | ||
137 | if ((__raw_readw(CPLD_MAGIC_NUMBER1_REG) != 0xAAAA) || | ||
138 | (__raw_readw(CPLD_MAGIC_NUMBER2_REG) != 0x5555) || | ||
139 | (__raw_readw(CPLD_MAGIC_NUMBER3_REG) != 0xCAFE)) { | ||
140 | /* No Debug board found */ | ||
141 | return -ENODEV; | ||
142 | } | ||
143 | |||
144 | pr_info("i.MX31PDK Debug board detected, rev = 0x%04X\n", | ||
145 | __raw_readw(CPLD_CODE_VER_REG)); | ||
146 | |||
147 | /* | ||
148 | * Configure INT line as GPIO input | ||
149 | */ | ||
150 | ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1), "sms9217-irq"); | ||
151 | if (ret) | ||
152 | pr_warning("could not get LAN irq gpio\n"); | ||
153 | else | ||
154 | gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1)); | ||
155 | |||
156 | /* Disable the interrupts and clear the status */ | ||
157 | __raw_writew(0, CPLD_INT_MASK_REG); | ||
158 | __raw_writew(0xFFFF, CPLD_INT_RESET_REG); | ||
159 | __raw_writew(0, CPLD_INT_RESET_REG); | ||
160 | __raw_writew(0x1F, CPLD_INT_MASK_REG); | ||
161 | for (i = MXC_EXP_IO_BASE; | ||
162 | i < (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES); | ||
163 | i++) { | ||
164 | set_irq_chip(i, &expio_irq_chip); | ||
165 | set_irq_handler(i, handle_level_irq); | ||
166 | set_irq_flags(i, IRQF_VALID); | ||
167 | } | ||
168 | set_irq_type(EXPIO_PARENT_INT, IRQ_TYPE_LEVEL_LOW); | ||
169 | set_irq_chained_handler(EXPIO_PARENT_INT, mx31pdk_expio_irq_handler); | ||
170 | |||
171 | return 0; | ||
172 | } | ||
173 | |||
174 | /* | ||
175 | * This structure defines the MX31 memory map. | ||
176 | */ | ||
177 | static struct map_desc mx31pdk_io_desc[] __initdata = { | ||
178 | { | ||
179 | .virtual = SPBA0_BASE_ADDR_VIRT, | ||
180 | .pfn = __phys_to_pfn(SPBA0_BASE_ADDR), | ||
181 | .length = SPBA0_SIZE, | ||
182 | .type = MT_DEVICE_NONSHARED, | ||
183 | }, { | ||
184 | .virtual = CS5_BASE_ADDR_VIRT, | ||
185 | .pfn = __phys_to_pfn(CS5_BASE_ADDR), | ||
186 | .length = CS5_SIZE, | ||
187 | .type = MT_DEVICE, | ||
188 | }, | ||
189 | }; | ||
190 | |||
191 | /* | ||
192 | * Set up static virtual mappings. | ||
193 | */ | ||
194 | static void __init mx31pdk_map_io(void) | ||
195 | { | ||
196 | mx31_map_io(); | ||
197 | iotable_init(mx31pdk_io_desc, ARRAY_SIZE(mx31pdk_io_desc)); | ||
59 | } | 198 | } |
60 | 199 | ||
61 | /*! | 200 | /*! |
@@ -63,7 +202,12 @@ static inline void mxc_init_imx_uart(void) | |||
63 | */ | 202 | */ |
64 | static void __init mxc_board_init(void) | 203 | static void __init mxc_board_init(void) |
65 | { | 204 | { |
66 | mxc_init_imx_uart(); | 205 | mxc_iomux_setup_multiple_pins(mx31pdk_pins, ARRAY_SIZE(mx31pdk_pins), |
206 | "mx31pdk"); | ||
207 | |||
208 | mxc_register_device(&mxc_uart_device0, &uart_pdata); | ||
209 | |||
210 | mx31pdk_init_expio(); | ||
67 | } | 211 | } |
68 | 212 | ||
69 | static void __init mx31pdk_timer_init(void) | 213 | static void __init mx31pdk_timer_init(void) |
@@ -84,7 +228,7 @@ MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)") | |||
84 | .phys_io = AIPS1_BASE_ADDR, | 228 | .phys_io = AIPS1_BASE_ADDR, |
85 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, | 229 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, |
86 | .boot_params = PHYS_OFFSET + 0x100, | 230 | .boot_params = PHYS_OFFSET + 0x100, |
87 | .map_io = mxc_map_io, | 231 | .map_io = mx31pdk_map_io, |
88 | .init_irq = mxc_init_irq, | 232 | .init_irq = mxc_init_irq, |
89 | .init_machine = mxc_board_init, | 233 | .init_machine = mxc_board_init, |
90 | .timer = &mx31pdk_timer, | 234 | .timer = &mx31pdk_timer, |
diff --git a/arch/arm/mach-mx3/pcm037.c b/arch/arm/mach-mx3/pcm037.c index b5227d837b2f..c6f61a1f06c8 100644 --- a/arch/arm/mach-mx3/pcm037.c +++ b/arch/arm/mach-mx3/pcm037.c | |||
@@ -28,6 +28,10 @@ | |||
28 | #include <linux/interrupt.h> | 28 | #include <linux/interrupt.h> |
29 | #include <linux/i2c.h> | 29 | #include <linux/i2c.h> |
30 | #include <linux/i2c/at24.h> | 30 | #include <linux/i2c/at24.h> |
31 | #include <linux/delay.h> | ||
32 | #include <linux/spi/spi.h> | ||
33 | #include <linux/irq.h> | ||
34 | #include <linux/fsl_devices.h> | ||
31 | 35 | ||
32 | #include <mach/hardware.h> | 36 | #include <mach/hardware.h> |
33 | #include <asm/mach-types.h> | 37 | #include <asm/mach-types.h> |
@@ -37,7 +41,9 @@ | |||
37 | #include <mach/common.h> | 41 | #include <mach/common.h> |
38 | #include <mach/imx-uart.h> | 42 | #include <mach/imx-uart.h> |
39 | #include <mach/iomux-mx3.h> | 43 | #include <mach/iomux-mx3.h> |
44 | #include <mach/ipu.h> | ||
40 | #include <mach/board-pcm037.h> | 45 | #include <mach/board-pcm037.h> |
46 | #include <mach/mx3fb.h> | ||
41 | #include <mach/mxc_nand.h> | 47 | #include <mach/mxc_nand.h> |
42 | #include <mach/mmc.h> | 48 | #include <mach/mmc.h> |
43 | #ifdef CONFIG_I2C_IMX | 49 | #ifdef CONFIG_I2C_IMX |
@@ -46,6 +52,76 @@ | |||
46 | 52 | ||
47 | #include "devices.h" | 53 | #include "devices.h" |
48 | 54 | ||
55 | static unsigned int pcm037_pins[] = { | ||
56 | /* I2C */ | ||
57 | MX31_PIN_CSPI2_MOSI__SCL, | ||
58 | MX31_PIN_CSPI2_MISO__SDA, | ||
59 | /* SDHC1 */ | ||
60 | MX31_PIN_SD1_DATA3__SD1_DATA3, | ||
61 | MX31_PIN_SD1_DATA2__SD1_DATA2, | ||
62 | MX31_PIN_SD1_DATA1__SD1_DATA1, | ||
63 | MX31_PIN_SD1_DATA0__SD1_DATA0, | ||
64 | MX31_PIN_SD1_CLK__SD1_CLK, | ||
65 | MX31_PIN_SD1_CMD__SD1_CMD, | ||
66 | IOMUX_MODE(MX31_PIN_SCK6, IOMUX_CONFIG_GPIO), /* card detect */ | ||
67 | IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO), /* write protect */ | ||
68 | /* SPI1 */ | ||
69 | MX31_PIN_CSPI1_MOSI__MOSI, | ||
70 | MX31_PIN_CSPI1_MISO__MISO, | ||
71 | MX31_PIN_CSPI1_SCLK__SCLK, | ||
72 | MX31_PIN_CSPI1_SPI_RDY__SPI_RDY, | ||
73 | MX31_PIN_CSPI1_SS0__SS0, | ||
74 | MX31_PIN_CSPI1_SS1__SS1, | ||
75 | MX31_PIN_CSPI1_SS2__SS2, | ||
76 | /* UART1 */ | ||
77 | MX31_PIN_CTS1__CTS1, | ||
78 | MX31_PIN_RTS1__RTS1, | ||
79 | MX31_PIN_TXD1__TXD1, | ||
80 | MX31_PIN_RXD1__RXD1, | ||
81 | /* UART2 */ | ||
82 | MX31_PIN_TXD2__TXD2, | ||
83 | MX31_PIN_RXD2__RXD2, | ||
84 | MX31_PIN_CTS2__CTS2, | ||
85 | MX31_PIN_RTS2__RTS2, | ||
86 | /* UART3 */ | ||
87 | MX31_PIN_CSPI3_MOSI__RXD3, | ||
88 | MX31_PIN_CSPI3_MISO__TXD3, | ||
89 | MX31_PIN_CSPI3_SCLK__RTS3, | ||
90 | MX31_PIN_CSPI3_SPI_RDY__CTS3, | ||
91 | /* LAN9217 irq pin */ | ||
92 | IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO), | ||
93 | /* Onewire */ | ||
94 | MX31_PIN_BATT_LINE__OWIRE, | ||
95 | /* Framebuffer */ | ||
96 | MX31_PIN_LD0__LD0, | ||
97 | MX31_PIN_LD1__LD1, | ||
98 | MX31_PIN_LD2__LD2, | ||
99 | MX31_PIN_LD3__LD3, | ||
100 | MX31_PIN_LD4__LD4, | ||
101 | MX31_PIN_LD5__LD5, | ||
102 | MX31_PIN_LD6__LD6, | ||
103 | MX31_PIN_LD7__LD7, | ||
104 | MX31_PIN_LD8__LD8, | ||
105 | MX31_PIN_LD9__LD9, | ||
106 | MX31_PIN_LD10__LD10, | ||
107 | MX31_PIN_LD11__LD11, | ||
108 | MX31_PIN_LD12__LD12, | ||
109 | MX31_PIN_LD13__LD13, | ||
110 | MX31_PIN_LD14__LD14, | ||
111 | MX31_PIN_LD15__LD15, | ||
112 | MX31_PIN_LD16__LD16, | ||
113 | MX31_PIN_LD17__LD17, | ||
114 | MX31_PIN_VSYNC3__VSYNC3, | ||
115 | MX31_PIN_HSYNC__HSYNC, | ||
116 | MX31_PIN_FPSHIFT__FPSHIFT, | ||
117 | MX31_PIN_DRDY0__DRDY0, | ||
118 | MX31_PIN_D3_REV__D3_REV, | ||
119 | MX31_PIN_CONTRAST__CONTRAST, | ||
120 | MX31_PIN_D3_SPL__D3_SPL, | ||
121 | MX31_PIN_D3_CLS__D3_CLS, | ||
122 | MX31_PIN_LCS0__GPI03_23, | ||
123 | }; | ||
124 | |||
49 | static struct physmap_flash_data pcm037_flash_data = { | 125 | static struct physmap_flash_data pcm037_flash_data = { |
50 | .width = 2, | 126 | .width = 2, |
51 | }; | 127 | }; |
@@ -56,6 +132,54 @@ static struct resource pcm037_flash_resource = { | |||
56 | .flags = IORESOURCE_MEM, | 132 | .flags = IORESOURCE_MEM, |
57 | }; | 133 | }; |
58 | 134 | ||
135 | static int usbotg_pins[] = { | ||
136 | MX31_PIN_USBOTG_DATA0__USBOTG_DATA0, | ||
137 | MX31_PIN_USBOTG_DATA1__USBOTG_DATA1, | ||
138 | MX31_PIN_USBOTG_DATA2__USBOTG_DATA2, | ||
139 | MX31_PIN_USBOTG_DATA3__USBOTG_DATA3, | ||
140 | MX31_PIN_USBOTG_DATA4__USBOTG_DATA4, | ||
141 | MX31_PIN_USBOTG_DATA5__USBOTG_DATA5, | ||
142 | MX31_PIN_USBOTG_DATA6__USBOTG_DATA6, | ||
143 | MX31_PIN_USBOTG_DATA7__USBOTG_DATA7, | ||
144 | MX31_PIN_USBOTG_CLK__USBOTG_CLK, | ||
145 | MX31_PIN_USBOTG_DIR__USBOTG_DIR, | ||
146 | MX31_PIN_USBOTG_NXT__USBOTG_NXT, | ||
147 | MX31_PIN_USBOTG_STP__USBOTG_STP, | ||
148 | }; | ||
149 | |||
150 | /* USB OTG HS port */ | ||
151 | static int __init gpio_usbotg_hs_activate(void) | ||
152 | { | ||
153 | int ret = mxc_iomux_setup_multiple_pins(usbotg_pins, | ||
154 | ARRAY_SIZE(usbotg_pins), "usbotg"); | ||
155 | |||
156 | if (ret < 0) { | ||
157 | printk(KERN_ERR "Cannot set up OTG pins\n"); | ||
158 | return ret; | ||
159 | } | ||
160 | |||
161 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST); | ||
162 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST); | ||
163 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST); | ||
164 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST); | ||
165 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST); | ||
166 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST); | ||
167 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST); | ||
168 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST); | ||
169 | mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST); | ||
170 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST); | ||
171 | mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST); | ||
172 | mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST); | ||
173 | |||
174 | return 0; | ||
175 | } | ||
176 | |||
177 | /* OTG config */ | ||
178 | static struct fsl_usb2_platform_data usb_pdata = { | ||
179 | .operating_mode = FSL_USB2_DR_DEVICE, | ||
180 | .phy_mode = FSL_USB2_PHY_ULPI, | ||
181 | }; | ||
182 | |||
59 | static struct platform_device pcm037_flash = { | 183 | static struct platform_device pcm037_flash = { |
60 | .name = "physmap-flash", | 184 | .name = "physmap-flash", |
61 | .id = 0, | 185 | .id = 0, |
@@ -127,26 +251,8 @@ static struct mxc_nand_platform_data pcm037_nand_board_info = { | |||
127 | }; | 251 | }; |
128 | 252 | ||
129 | #ifdef CONFIG_I2C_IMX | 253 | #ifdef CONFIG_I2C_IMX |
130 | static int i2c_1_pins[] = { | ||
131 | MX31_PIN_CSPI2_MOSI__SCL, | ||
132 | MX31_PIN_CSPI2_MISO__SDA, | ||
133 | }; | ||
134 | |||
135 | static int pcm037_i2c_1_init(struct device *dev) | ||
136 | { | ||
137 | return mxc_iomux_setup_multiple_pins(i2c_1_pins, ARRAY_SIZE(i2c_1_pins), | ||
138 | "i2c-1"); | ||
139 | } | ||
140 | |||
141 | static void pcm037_i2c_1_exit(struct device *dev) | ||
142 | { | ||
143 | mxc_iomux_release_multiple_pins(i2c_1_pins, ARRAY_SIZE(i2c_1_pins)); | ||
144 | } | ||
145 | |||
146 | static struct imxi2c_platform_data pcm037_i2c_1_data = { | 254 | static struct imxi2c_platform_data pcm037_i2c_1_data = { |
147 | .bitrate = 100000, | 255 | .bitrate = 100000, |
148 | .init = pcm037_i2c_1_init, | ||
149 | .exit = pcm037_i2c_1_exit, | ||
150 | }; | 256 | }; |
151 | 257 | ||
152 | static struct at24_platform_data board_eeprom = { | 258 | static struct at24_platform_data board_eeprom = { |
@@ -166,48 +272,119 @@ static struct i2c_board_info pcm037_i2c_devices[] = { | |||
166 | }; | 272 | }; |
167 | #endif | 273 | #endif |
168 | 274 | ||
169 | static int sdhc1_pins[] = { | 275 | /* Not connected by default */ |
170 | MX31_PIN_SD1_DATA3__SD1_DATA3, | 276 | #ifdef PCM970_SDHC_RW_SWITCH |
171 | MX31_PIN_SD1_DATA2__SD1_DATA2, | 277 | static int pcm970_sdhc1_get_ro(struct device *dev) |
172 | MX31_PIN_SD1_DATA1__SD1_DATA1, | 278 | { |
173 | MX31_PIN_SD1_DATA0__SD1_DATA0, | 279 | return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_SFS6)); |
174 | MX31_PIN_SD1_CLK__SD1_CLK, | 280 | } |
175 | MX31_PIN_SD1_CMD__SD1_CMD, | 281 | #endif |
176 | }; | 282 | |
283 | #define SDHC1_GPIO_WP IOMUX_TO_GPIO(MX31_PIN_SFS6) | ||
284 | #define SDHC1_GPIO_DET IOMUX_TO_GPIO(MX31_PIN_SCK6) | ||
177 | 285 | ||
178 | static int pcm970_sdhc1_init(struct device *dev, irq_handler_t h, void *data) | 286 | static int pcm970_sdhc1_init(struct device *dev, irq_handler_t detect_irq, |
287 | void *data) | ||
179 | { | 288 | { |
180 | return mxc_iomux_setup_multiple_pins(sdhc1_pins, ARRAY_SIZE(sdhc1_pins), | 289 | int ret; |
181 | "sdhc-1"); | 290 | |
291 | ret = gpio_request(SDHC1_GPIO_DET, "sdhc-detect"); | ||
292 | if (ret) | ||
293 | return ret; | ||
294 | |||
295 | gpio_direction_input(SDHC1_GPIO_DET); | ||
296 | |||
297 | #ifdef PCM970_SDHC_RW_SWITCH | ||
298 | ret = gpio_request(SDHC1_GPIO_WP, "sdhc-wp"); | ||
299 | if (ret) | ||
300 | goto err_gpio_free; | ||
301 | gpio_direction_input(SDHC1_GPIO_WP); | ||
302 | #endif | ||
303 | |||
304 | ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_SCK6), detect_irq, | ||
305 | IRQF_DISABLED | IRQF_TRIGGER_FALLING, | ||
306 | "sdhc-detect", data); | ||
307 | if (ret) | ||
308 | goto err_gpio_free_2; | ||
309 | |||
310 | return 0; | ||
311 | |||
312 | err_gpio_free_2: | ||
313 | #ifdef PCM970_SDHC_RW_SWITCH | ||
314 | gpio_free(SDHC1_GPIO_WP); | ||
315 | err_gpio_free: | ||
316 | #endif | ||
317 | gpio_free(SDHC1_GPIO_DET); | ||
318 | |||
319 | return ret; | ||
182 | } | 320 | } |
183 | 321 | ||
184 | static void pcm970_sdhc1_exit(struct device *dev, void *data) | 322 | static void pcm970_sdhc1_exit(struct device *dev, void *data) |
185 | { | 323 | { |
186 | mxc_iomux_release_multiple_pins(sdhc1_pins, ARRAY_SIZE(sdhc1_pins)); | 324 | free_irq(IOMUX_TO_IRQ(MX31_PIN_SCK6), data); |
325 | gpio_free(SDHC1_GPIO_DET); | ||
326 | gpio_free(SDHC1_GPIO_WP); | ||
187 | } | 327 | } |
188 | 328 | ||
189 | /* No card and rw detection at the moment */ | ||
190 | static struct imxmmc_platform_data sdhc_pdata = { | 329 | static struct imxmmc_platform_data sdhc_pdata = { |
330 | #ifdef PCM970_SDHC_RW_SWITCH | ||
331 | .get_ro = pcm970_sdhc1_get_ro, | ||
332 | #endif | ||
191 | .init = pcm970_sdhc1_init, | 333 | .init = pcm970_sdhc1_init, |
192 | .exit = pcm970_sdhc1_exit, | 334 | .exit = pcm970_sdhc1_exit, |
193 | }; | 335 | }; |
194 | 336 | ||
195 | static struct platform_device *devices[] __initdata = { | 337 | static struct platform_device *devices[] __initdata = { |
196 | &pcm037_flash, | 338 | &pcm037_flash, |
197 | &pcm037_eth, | ||
198 | &pcm037_sram_device, | 339 | &pcm037_sram_device, |
199 | }; | 340 | }; |
200 | 341 | ||
201 | static int uart0_pins[] = { | 342 | static struct ipu_platform_data mx3_ipu_data = { |
202 | MX31_PIN_CTS1__CTS1, | 343 | .irq_base = MXC_IPU_IRQ_START, |
203 | MX31_PIN_RTS1__RTS1, | ||
204 | MX31_PIN_TXD1__TXD1, | ||
205 | MX31_PIN_RXD1__RXD1 | ||
206 | }; | 344 | }; |
207 | 345 | ||
208 | static int uart2_pins[] = { | 346 | static const struct fb_videomode fb_modedb[] = { |
209 | MX31_PIN_CSPI3_MOSI__RXD3, | 347 | { |
210 | MX31_PIN_CSPI3_MISO__TXD3 | 348 | /* 240x320 @ 60 Hz Sharp */ |
349 | .name = "Sharp-LQ035Q7DH06-QVGA", | ||
350 | .refresh = 60, | ||
351 | .xres = 240, | ||
352 | .yres = 320, | ||
353 | .pixclock = 185925, | ||
354 | .left_margin = 9, | ||
355 | .right_margin = 16, | ||
356 | .upper_margin = 7, | ||
357 | .lower_margin = 9, | ||
358 | .hsync_len = 1, | ||
359 | .vsync_len = 1, | ||
360 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_SHARP_MODE | | ||
361 | FB_SYNC_CLK_INVERT | FB_SYNC_CLK_IDLE_EN, | ||
362 | .vmode = FB_VMODE_NONINTERLACED, | ||
363 | .flag = 0, | ||
364 | }, { | ||
365 | /* 240x320 @ 60 Hz */ | ||
366 | .name = "TX090", | ||
367 | .refresh = 60, | ||
368 | .xres = 240, | ||
369 | .yres = 320, | ||
370 | .pixclock = 38255, | ||
371 | .left_margin = 144, | ||
372 | .right_margin = 0, | ||
373 | .upper_margin = 7, | ||
374 | .lower_margin = 40, | ||
375 | .hsync_len = 96, | ||
376 | .vsync_len = 1, | ||
377 | .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_ACT_HIGH, | ||
378 | .vmode = FB_VMODE_NONINTERLACED, | ||
379 | .flag = 0, | ||
380 | }, | ||
381 | }; | ||
382 | |||
383 | static struct mx3fb_platform_data mx3fb_pdata = { | ||
384 | .dma_dev = &mx3_ipu.dev, | ||
385 | .name = "Sharp-LQ035Q7DH06-QVGA", | ||
386 | .mode = fb_modedb, | ||
387 | .num_modes = ARRAY_SIZE(fb_modedb), | ||
211 | }; | 388 | }; |
212 | 389 | ||
213 | /* | 390 | /* |
@@ -215,21 +392,28 @@ static int uart2_pins[] = { | |||
215 | */ | 392 | */ |
216 | static void __init mxc_board_init(void) | 393 | static void __init mxc_board_init(void) |
217 | { | 394 | { |
395 | int ret; | ||
396 | |||
397 | mxc_iomux_setup_multiple_pins(pcm037_pins, ARRAY_SIZE(pcm037_pins), | ||
398 | "pcm037"); | ||
399 | |||
218 | platform_add_devices(devices, ARRAY_SIZE(devices)); | 400 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
219 | 401 | ||
220 | mxc_iomux_setup_multiple_pins(uart0_pins, ARRAY_SIZE(uart0_pins), "uart-0"); | ||
221 | mxc_register_device(&mxc_uart_device0, &uart_pdata); | 402 | mxc_register_device(&mxc_uart_device0, &uart_pdata); |
222 | 403 | mxc_register_device(&mxc_uart_device1, &uart_pdata); | |
223 | mxc_iomux_setup_multiple_pins(uart2_pins, ARRAY_SIZE(uart2_pins), "uart-2"); | ||
224 | mxc_register_device(&mxc_uart_device2, &uart_pdata); | 404 | mxc_register_device(&mxc_uart_device2, &uart_pdata); |
225 | 405 | ||
226 | mxc_iomux_setup_pin(MX31_PIN_BATT_LINE__OWIRE, "batt-0wire"); | ||
227 | mxc_register_device(&mxc_w1_master_device, NULL); | 406 | mxc_register_device(&mxc_w1_master_device, NULL); |
228 | 407 | ||
229 | /* LAN9217 IRQ pin */ | 408 | /* LAN9217 IRQ pin */ |
230 | if (!mxc_iomux_setup_pin(IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO), | 409 | ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1), "lan9217-irq"); |
231 | "pcm037-eth")) | 410 | if (ret) |
411 | pr_warning("could not get LAN irq gpio\n"); | ||
412 | else { | ||
232 | gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)); | 413 | gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)); |
414 | platform_device_register(&pcm037_eth); | ||
415 | } | ||
416 | |||
233 | 417 | ||
234 | #ifdef CONFIG_I2C_IMX | 418 | #ifdef CONFIG_I2C_IMX |
235 | i2c_register_board_info(1, pcm037_i2c_devices, | 419 | i2c_register_board_info(1, pcm037_i2c_devices, |
@@ -239,6 +423,10 @@ static void __init mxc_board_init(void) | |||
239 | #endif | 423 | #endif |
240 | mxc_register_device(&mxc_nand_device, &pcm037_nand_board_info); | 424 | mxc_register_device(&mxc_nand_device, &pcm037_nand_board_info); |
241 | mxc_register_device(&mxcsdhc_device0, &sdhc_pdata); | 425 | mxc_register_device(&mxcsdhc_device0, &sdhc_pdata); |
426 | mxc_register_device(&mx3_ipu, &mx3_ipu_data); | ||
427 | mxc_register_device(&mx3_fb, &mx3fb_pdata); | ||
428 | if (!gpio_usbotg_hs_activate()) | ||
429 | mxc_register_device(&mxc_otg_udc_device, &usb_pdata); | ||
242 | } | 430 | } |
243 | 431 | ||
244 | static void __init pcm037_timer_init(void) | 432 | static void __init pcm037_timer_init(void) |
@@ -255,7 +443,7 @@ MACHINE_START(PCM037, "Phytec Phycore pcm037") | |||
255 | .phys_io = AIPS1_BASE_ADDR, | 443 | .phys_io = AIPS1_BASE_ADDR, |
256 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, | 444 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, |
257 | .boot_params = PHYS_OFFSET + 0x100, | 445 | .boot_params = PHYS_OFFSET + 0x100, |
258 | .map_io = mxc_map_io, | 446 | .map_io = mx31_map_io, |
259 | .init_irq = mxc_init_irq, | 447 | .init_irq = mxc_init_irq, |
260 | .init_machine = mxc_board_init, | 448 | .init_machine = mxc_board_init, |
261 | .timer = &pcm037_timer, | 449 | .timer = &pcm037_timer, |
diff --git a/arch/arm/mach-mx3/pcm043.c b/arch/arm/mach-mx3/pcm043.c new file mode 100644 index 000000000000..8d27c324abf2 --- /dev/null +++ b/arch/arm/mach-mx3/pcm043.c | |||
@@ -0,0 +1,252 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2009 Sascha Hauer, Pengutronix | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License as published by | ||
6 | * the Free Software Foundation; either version 2 of the License, or | ||
7 | * (at your option) any later version. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License | ||
15 | * along with this program; if not, write to the Free Software | ||
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
17 | */ | ||
18 | |||
19 | #include <linux/types.h> | ||
20 | #include <linux/init.h> | ||
21 | |||
22 | #include <linux/platform_device.h> | ||
23 | #include <linux/mtd/physmap.h> | ||
24 | #include <linux/mtd/plat-ram.h> | ||
25 | #include <linux/memory.h> | ||
26 | #include <linux/gpio.h> | ||
27 | #include <linux/smc911x.h> | ||
28 | #include <linux/interrupt.h> | ||
29 | #include <linux/i2c.h> | ||
30 | #include <linux/i2c/at24.h> | ||
31 | |||
32 | #include <asm/mach-types.h> | ||
33 | #include <asm/mach/arch.h> | ||
34 | #include <asm/mach/time.h> | ||
35 | #include <asm/mach/map.h> | ||
36 | |||
37 | #include <mach/hardware.h> | ||
38 | #include <mach/common.h> | ||
39 | #include <mach/imx-uart.h> | ||
40 | #if defined CONFIG_I2C_IMX || defined CONFIG_I2C_IMX_MODULE | ||
41 | #include <mach/i2c.h> | ||
42 | #endif | ||
43 | #include <mach/iomux-mx35.h> | ||
44 | #include <mach/ipu.h> | ||
45 | #include <mach/mx3fb.h> | ||
46 | |||
47 | #include "devices.h" | ||
48 | |||
49 | static const struct fb_videomode fb_modedb[] = { | ||
50 | { | ||
51 | /* 240x320 @ 60 Hz */ | ||
52 | .name = "Sharp-LQ035Q7", | ||
53 | .refresh = 60, | ||
54 | .xres = 240, | ||
55 | .yres = 320, | ||
56 | .pixclock = 185925, | ||
57 | .left_margin = 9, | ||
58 | .right_margin = 16, | ||
59 | .upper_margin = 7, | ||
60 | .lower_margin = 9, | ||
61 | .hsync_len = 1, | ||
62 | .vsync_len = 1, | ||
63 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_SHARP_MODE | FB_SYNC_CLK_INVERT | FB_SYNC_CLK_IDLE_EN, | ||
64 | .vmode = FB_VMODE_NONINTERLACED, | ||
65 | .flag = 0, | ||
66 | }, { | ||
67 | /* 240x320 @ 60 Hz */ | ||
68 | .name = "TX090", | ||
69 | .refresh = 60, | ||
70 | .xres = 240, | ||
71 | .yres = 320, | ||
72 | .pixclock = 38255, | ||
73 | .left_margin = 144, | ||
74 | .right_margin = 0, | ||
75 | .upper_margin = 7, | ||
76 | .lower_margin = 40, | ||
77 | .hsync_len = 96, | ||
78 | .vsync_len = 1, | ||
79 | .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_ACT_HIGH, | ||
80 | .vmode = FB_VMODE_NONINTERLACED, | ||
81 | .flag = 0, | ||
82 | }, | ||
83 | }; | ||
84 | |||
85 | static struct ipu_platform_data mx3_ipu_data = { | ||
86 | .irq_base = MXC_IPU_IRQ_START, | ||
87 | }; | ||
88 | |||
89 | static struct mx3fb_platform_data mx3fb_pdata = { | ||
90 | .dma_dev = &mx3_ipu.dev, | ||
91 | .name = "Sharp-LQ035Q7", | ||
92 | .mode = fb_modedb, | ||
93 | .num_modes = ARRAY_SIZE(fb_modedb), | ||
94 | }; | ||
95 | |||
96 | static struct physmap_flash_data pcm043_flash_data = { | ||
97 | .width = 2, | ||
98 | }; | ||
99 | |||
100 | static struct resource pcm043_flash_resource = { | ||
101 | .start = 0xa0000000, | ||
102 | .end = 0xa1ffffff, | ||
103 | .flags = IORESOURCE_MEM, | ||
104 | }; | ||
105 | |||
106 | static struct platform_device pcm043_flash = { | ||
107 | .name = "physmap-flash", | ||
108 | .id = 0, | ||
109 | .dev = { | ||
110 | .platform_data = &pcm043_flash_data, | ||
111 | }, | ||
112 | .resource = &pcm043_flash_resource, | ||
113 | .num_resources = 1, | ||
114 | }; | ||
115 | |||
116 | static struct imxuart_platform_data uart_pdata = { | ||
117 | .flags = IMXUART_HAVE_RTSCTS, | ||
118 | }; | ||
119 | |||
120 | #if defined CONFIG_I2C_IMX || defined CONFIG_I2C_IMX_MODULE | ||
121 | static struct imxi2c_platform_data pcm043_i2c_1_data = { | ||
122 | .bitrate = 50000, | ||
123 | }; | ||
124 | |||
125 | static struct at24_platform_data board_eeprom = { | ||
126 | .byte_len = 4096, | ||
127 | .page_size = 32, | ||
128 | .flags = AT24_FLAG_ADDR16, | ||
129 | }; | ||
130 | |||
131 | static struct i2c_board_info pcm043_i2c_devices[] = { | ||
132 | { | ||
133 | I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */ | ||
134 | .platform_data = &board_eeprom, | ||
135 | }, { | ||
136 | I2C_BOARD_INFO("rtc-pcf8563", 0x51), | ||
137 | .type = "pcf8563", | ||
138 | } | ||
139 | }; | ||
140 | #endif | ||
141 | |||
142 | static struct platform_device *devices[] __initdata = { | ||
143 | &pcm043_flash, | ||
144 | &mxc_fec_device, | ||
145 | }; | ||
146 | |||
147 | static struct pad_desc pcm043_pads[] = { | ||
148 | /* UART1 */ | ||
149 | MX35_PAD_CTS1__UART1_CTS, | ||
150 | MX35_PAD_RTS1__UART1_RTS, | ||
151 | MX35_PAD_TXD1__UART1_TXD_MUX, | ||
152 | MX35_PAD_RXD1__UART1_RXD_MUX, | ||
153 | /* UART2 */ | ||
154 | MX35_PAD_CTS2__UART2_CTS, | ||
155 | MX35_PAD_RTS2__UART2_RTS, | ||
156 | MX35_PAD_TXD2__UART2_TXD_MUX, | ||
157 | MX35_PAD_RXD2__UART2_RXD_MUX, | ||
158 | /* FEC */ | ||
159 | MX35_PAD_FEC_TX_CLK__FEC_TX_CLK, | ||
160 | MX35_PAD_FEC_RX_CLK__FEC_RX_CLK, | ||
161 | MX35_PAD_FEC_RX_DV__FEC_RX_DV, | ||
162 | MX35_PAD_FEC_COL__FEC_COL, | ||
163 | MX35_PAD_FEC_RDATA0__FEC_RDATA_0, | ||
164 | MX35_PAD_FEC_TDATA0__FEC_TDATA_0, | ||
165 | MX35_PAD_FEC_TX_EN__FEC_TX_EN, | ||
166 | MX35_PAD_FEC_MDC__FEC_MDC, | ||
167 | MX35_PAD_FEC_MDIO__FEC_MDIO, | ||
168 | MX35_PAD_FEC_TX_ERR__FEC_TX_ERR, | ||
169 | MX35_PAD_FEC_RX_ERR__FEC_RX_ERR, | ||
170 | MX35_PAD_FEC_CRS__FEC_CRS, | ||
171 | MX35_PAD_FEC_RDATA1__FEC_RDATA_1, | ||
172 | MX35_PAD_FEC_TDATA1__FEC_TDATA_1, | ||
173 | MX35_PAD_FEC_RDATA2__FEC_RDATA_2, | ||
174 | MX35_PAD_FEC_TDATA2__FEC_TDATA_2, | ||
175 | MX35_PAD_FEC_RDATA3__FEC_RDATA_3, | ||
176 | MX35_PAD_FEC_TDATA3__FEC_TDATA_3, | ||
177 | /* I2C1 */ | ||
178 | MX35_PAD_I2C1_CLK__I2C1_SCL, | ||
179 | MX35_PAD_I2C1_DAT__I2C1_SDA, | ||
180 | /* Display */ | ||
181 | MX35_PAD_LD0__IPU_DISPB_DAT_0, | ||
182 | MX35_PAD_LD1__IPU_DISPB_DAT_1, | ||
183 | MX35_PAD_LD2__IPU_DISPB_DAT_2, | ||
184 | MX35_PAD_LD3__IPU_DISPB_DAT_3, | ||
185 | MX35_PAD_LD4__IPU_DISPB_DAT_4, | ||
186 | MX35_PAD_LD5__IPU_DISPB_DAT_5, | ||
187 | MX35_PAD_LD6__IPU_DISPB_DAT_6, | ||
188 | MX35_PAD_LD7__IPU_DISPB_DAT_7, | ||
189 | MX35_PAD_LD8__IPU_DISPB_DAT_8, | ||
190 | MX35_PAD_LD9__IPU_DISPB_DAT_9, | ||
191 | MX35_PAD_LD10__IPU_DISPB_DAT_10, | ||
192 | MX35_PAD_LD11__IPU_DISPB_DAT_11, | ||
193 | MX35_PAD_LD12__IPU_DISPB_DAT_12, | ||
194 | MX35_PAD_LD13__IPU_DISPB_DAT_13, | ||
195 | MX35_PAD_LD14__IPU_DISPB_DAT_14, | ||
196 | MX35_PAD_LD15__IPU_DISPB_DAT_15, | ||
197 | MX35_PAD_LD16__IPU_DISPB_DAT_16, | ||
198 | MX35_PAD_LD17__IPU_DISPB_DAT_17, | ||
199 | MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC, | ||
200 | MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK, | ||
201 | MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY, | ||
202 | MX35_PAD_CONTRAST__IPU_DISPB_CONTR, | ||
203 | MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC, | ||
204 | MX35_PAD_D3_REV__IPU_DISPB_D3_REV, | ||
205 | MX35_PAD_D3_CLS__IPU_DISPB_D3_CLS, | ||
206 | MX35_PAD_D3_SPL__IPU_DISPB_D3_SPL | ||
207 | }; | ||
208 | |||
209 | /* | ||
210 | * Board specific initialization. | ||
211 | */ | ||
212 | static void __init mxc_board_init(void) | ||
213 | { | ||
214 | mxc_iomux_v3_setup_multiple_pads(pcm043_pads, ARRAY_SIZE(pcm043_pads)); | ||
215 | |||
216 | platform_add_devices(devices, ARRAY_SIZE(devices)); | ||
217 | |||
218 | mxc_register_device(&mxc_uart_device0, &uart_pdata); | ||
219 | |||
220 | mxc_register_device(&mxc_uart_device1, &uart_pdata); | ||
221 | |||
222 | #if defined CONFIG_I2C_IMX || defined CONFIG_I2C_IMX_MODULE | ||
223 | i2c_register_board_info(0, pcm043_i2c_devices, | ||
224 | ARRAY_SIZE(pcm043_i2c_devices)); | ||
225 | |||
226 | mxc_register_device(&mxc_i2c_device0, &pcm043_i2c_1_data); | ||
227 | #endif | ||
228 | |||
229 | mxc_register_device(&mx3_ipu, &mx3_ipu_data); | ||
230 | mxc_register_device(&mx3_fb, &mx3fb_pdata); | ||
231 | } | ||
232 | |||
233 | static void __init pcm043_timer_init(void) | ||
234 | { | ||
235 | mx35_clocks_init(); | ||
236 | } | ||
237 | |||
238 | struct sys_timer pcm043_timer = { | ||
239 | .init = pcm043_timer_init, | ||
240 | }; | ||
241 | |||
242 | MACHINE_START(PCM043, "Phytec Phycore pcm043") | ||
243 | /* Maintainer: Pengutronix */ | ||
244 | .phys_io = AIPS1_BASE_ADDR, | ||
245 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, | ||
246 | .boot_params = PHYS_OFFSET + 0x100, | ||
247 | .map_io = mx35_map_io, | ||
248 | .init_irq = mxc_init_irq, | ||
249 | .init_machine = mxc_board_init, | ||
250 | .timer = &pcm043_timer, | ||
251 | MACHINE_END | ||
252 | |||
diff --git a/arch/arm/mach-mx3/qong.c b/arch/arm/mach-mx3/qong.c index 5a01e48fd8f1..82b31c4ab11f 100644 --- a/arch/arm/mach-mx3/qong.c +++ b/arch/arm/mach-mx3/qong.c | |||
@@ -279,7 +279,7 @@ MACHINE_START(QONG, "Dave/DENX QongEVB-LITE") | |||
279 | .phys_io = AIPS1_BASE_ADDR, | 279 | .phys_io = AIPS1_BASE_ADDR, |
280 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, | 280 | .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, |
281 | .boot_params = PHYS_OFFSET + 0x100, | 281 | .boot_params = PHYS_OFFSET + 0x100, |
282 | .map_io = mxc_map_io, | 282 | .map_io = mx31_map_io, |
283 | .init_irq = mxc_init_irq, | 283 | .init_irq = mxc_init_irq, |
284 | .init_machine = mxc_board_init, | 284 | .init_machine = mxc_board_init, |
285 | .timer = &qong_timer, | 285 | .timer = &qong_timer, |
diff --git a/arch/arm/mach-omap1/board-h2-mmc.c b/arch/arm/mach-omap1/board-h2-mmc.c index 44d4a966bed9..46098f546824 100644 --- a/arch/arm/mach-omap1/board-h2-mmc.c +++ b/arch/arm/mach-omap1/board-h2-mmc.c | |||
@@ -26,19 +26,13 @@ | |||
26 | static int mmc_set_power(struct device *dev, int slot, int power_on, | 26 | static int mmc_set_power(struct device *dev, int slot, int power_on, |
27 | int vdd) | 27 | int vdd) |
28 | { | 28 | { |
29 | if (power_on) | 29 | gpio_set_value(H2_TPS_GPIO_MMC_PWR_EN, power_on); |
30 | gpio_direction_output(H2_TPS_GPIO_MMC_PWR_EN, 1); | ||
31 | else | ||
32 | gpio_direction_output(H2_TPS_GPIO_MMC_PWR_EN, 0); | ||
33 | |||
34 | return 0; | 30 | return 0; |
35 | } | 31 | } |
36 | 32 | ||
37 | static int mmc_late_init(struct device *dev) | 33 | static int mmc_late_init(struct device *dev) |
38 | { | 34 | { |
39 | int ret; | 35 | int ret = gpio_request(H2_TPS_GPIO_MMC_PWR_EN, "MMC power"); |
40 | |||
41 | ret = gpio_request(H2_TPS_GPIO_MMC_PWR_EN, "MMC power"); | ||
42 | if (ret < 0) | 36 | if (ret < 0) |
43 | return ret; | 37 | return ret; |
44 | 38 | ||
@@ -47,7 +41,7 @@ static int mmc_late_init(struct device *dev) | |||
47 | return ret; | 41 | return ret; |
48 | } | 42 | } |
49 | 43 | ||
50 | static void mmc_shutdown(struct device *dev) | 44 | static void mmc_cleanup(struct device *dev) |
51 | { | 45 | { |
52 | gpio_free(H2_TPS_GPIO_MMC_PWR_EN); | 46 | gpio_free(H2_TPS_GPIO_MMC_PWR_EN); |
53 | } | 47 | } |
@@ -60,7 +54,7 @@ static void mmc_shutdown(struct device *dev) | |||
60 | static struct omap_mmc_platform_data mmc1_data = { | 54 | static struct omap_mmc_platform_data mmc1_data = { |
61 | .nr_slots = 1, | 55 | .nr_slots = 1, |
62 | .init = mmc_late_init, | 56 | .init = mmc_late_init, |
63 | .shutdown = mmc_shutdown, | 57 | .cleanup = mmc_cleanup, |
64 | .dma_mask = 0xffffffff, | 58 | .dma_mask = 0xffffffff, |
65 | .slots[0] = { | 59 | .slots[0] = { |
66 | .set_power = mmc_set_power, | 60 | .set_power = mmc_set_power, |
diff --git a/arch/arm/mach-omap1/board-h3-mmc.c b/arch/arm/mach-omap1/board-h3-mmc.c index 0d8a3c195e2e..5e8877ce35e0 100644 --- a/arch/arm/mach-omap1/board-h3-mmc.c +++ b/arch/arm/mach-omap1/board-h3-mmc.c | |||
@@ -26,11 +26,7 @@ | |||
26 | static int mmc_set_power(struct device *dev, int slot, int power_on, | 26 | static int mmc_set_power(struct device *dev, int slot, int power_on, |
27 | int vdd) | 27 | int vdd) |
28 | { | 28 | { |
29 | if (power_on) | 29 | gpio_set_value(H3_TPS_GPIO_MMC_PWR_EN, power_on); |
30 | gpio_direction_output(H3_TPS_GPIO_MMC_PWR_EN, 1); | ||
31 | else | ||
32 | gpio_direction_output(H3_TPS_GPIO_MMC_PWR_EN, 0); | ||
33 | |||
34 | return 0; | 30 | return 0; |
35 | } | 31 | } |
36 | 32 | ||
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c index 4695965114c4..f597968733b4 100644 --- a/arch/arm/mach-omap1/board-h3.c +++ b/arch/arm/mach-omap1/board-h3.c | |||
@@ -39,12 +39,10 @@ | |||
39 | #include <asm/mach/flash.h> | 39 | #include <asm/mach/flash.h> |
40 | #include <asm/mach/map.h> | 40 | #include <asm/mach/map.h> |
41 | 41 | ||
42 | #include <mach/gpioexpander.h> | ||
43 | #include <mach/irqs.h> | 42 | #include <mach/irqs.h> |
44 | #include <mach/mux.h> | 43 | #include <mach/mux.h> |
45 | #include <mach/tc.h> | 44 | #include <mach/tc.h> |
46 | #include <mach/nand.h> | 45 | #include <mach/nand.h> |
47 | #include <mach/irda.h> | ||
48 | #include <mach/usb.h> | 46 | #include <mach/usb.h> |
49 | #include <mach/keypad.h> | 47 | #include <mach/keypad.h> |
50 | #include <mach/dma.h> | 48 | #include <mach/dma.h> |
@@ -276,104 +274,6 @@ static struct platform_device h3_kp_device = { | |||
276 | .resource = h3_kp_resources, | 274 | .resource = h3_kp_resources, |
277 | }; | 275 | }; |
278 | 276 | ||
279 | |||
280 | /* Select between the IrDA and aGPS module | ||
281 | */ | ||
282 | static int h3_select_irda(struct device *dev, int state) | ||
283 | { | ||
284 | unsigned char expa; | ||
285 | int err = 0; | ||
286 | |||
287 | if ((err = read_gpio_expa(&expa, 0x26))) { | ||
288 | printk(KERN_ERR "Error reading from I/O EXPANDER \n"); | ||
289 | return err; | ||
290 | } | ||
291 | |||
292 | /* 'P6' enable/disable IRDA_TX and IRDA_RX */ | ||
293 | if (state & IR_SEL) { /* IrDA */ | ||
294 | if ((err = write_gpio_expa(expa | 0x40, 0x26))) { | ||
295 | printk(KERN_ERR "Error writing to I/O EXPANDER \n"); | ||
296 | return err; | ||
297 | } | ||
298 | } else { | ||
299 | if ((err = write_gpio_expa(expa & ~0x40, 0x26))) { | ||
300 | printk(KERN_ERR "Error writing to I/O EXPANDER \n"); | ||
301 | return err; | ||
302 | } | ||
303 | } | ||
304 | return err; | ||
305 | } | ||
306 | |||
307 | static void set_trans_mode(struct work_struct *work) | ||
308 | { | ||
309 | struct omap_irda_config *irda_config = | ||
310 | container_of(work, struct omap_irda_config, gpio_expa.work); | ||
311 | int mode = irda_config->mode; | ||
312 | unsigned char expa; | ||
313 | int err = 0; | ||
314 | |||
315 | if ((err = read_gpio_expa(&expa, 0x27)) != 0) { | ||
316 | printk(KERN_ERR "Error reading from I/O expander\n"); | ||
317 | } | ||
318 | |||
319 | expa &= ~0x03; | ||
320 | |||
321 | if (mode & IR_SIRMODE) { | ||
322 | expa |= 0x01; | ||
323 | } else { /* MIR/FIR */ | ||
324 | expa |= 0x03; | ||
325 | } | ||
326 | |||
327 | if ((err = write_gpio_expa(expa, 0x27)) != 0) { | ||
328 | printk(KERN_ERR "Error writing to I/O expander\n"); | ||
329 | } | ||
330 | } | ||
331 | |||
332 | static int h3_transceiver_mode(struct device *dev, int mode) | ||
333 | { | ||
334 | struct omap_irda_config *irda_config = dev->platform_data; | ||
335 | |||
336 | irda_config->mode = mode; | ||
337 | cancel_delayed_work(&irda_config->gpio_expa); | ||
338 | PREPARE_DELAYED_WORK(&irda_config->gpio_expa, set_trans_mode); | ||
339 | schedule_delayed_work(&irda_config->gpio_expa, 0); | ||
340 | |||
341 | return 0; | ||
342 | } | ||
343 | |||
344 | static struct omap_irda_config h3_irda_data = { | ||
345 | .transceiver_cap = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE, | ||
346 | .transceiver_mode = h3_transceiver_mode, | ||
347 | .select_irda = h3_select_irda, | ||
348 | .rx_channel = OMAP_DMA_UART3_RX, | ||
349 | .tx_channel = OMAP_DMA_UART3_TX, | ||
350 | .dest_start = UART3_THR, | ||
351 | .src_start = UART3_RHR, | ||
352 | .tx_trigger = 0, | ||
353 | .rx_trigger = 0, | ||
354 | }; | ||
355 | |||
356 | static struct resource h3_irda_resources[] = { | ||
357 | [0] = { | ||
358 | .start = INT_UART3, | ||
359 | .end = INT_UART3, | ||
360 | .flags = IORESOURCE_IRQ, | ||
361 | }, | ||
362 | }; | ||
363 | |||
364 | static u64 irda_dmamask = 0xffffffff; | ||
365 | |||
366 | static struct platform_device h3_irda_device = { | ||
367 | .name = "omapirda", | ||
368 | .id = 0, | ||
369 | .dev = { | ||
370 | .platform_data = &h3_irda_data, | ||
371 | .dma_mask = &irda_dmamask, | ||
372 | }, | ||
373 | .num_resources = ARRAY_SIZE(h3_irda_resources), | ||
374 | .resource = h3_irda_resources, | ||
375 | }; | ||
376 | |||
377 | static struct platform_device h3_lcd_device = { | 277 | static struct platform_device h3_lcd_device = { |
378 | .name = "lcd_h3", | 278 | .name = "lcd_h3", |
379 | .id = -1, | 279 | .id = -1, |
@@ -395,7 +295,6 @@ static struct platform_device *devices[] __initdata = { | |||
395 | &nand_device, | 295 | &nand_device, |
396 | &smc91x_device, | 296 | &smc91x_device, |
397 | &intlat_device, | 297 | &intlat_device, |
398 | &h3_irda_device, | ||
399 | &h3_kp_device, | 298 | &h3_kp_device, |
400 | &h3_lcd_device, | 299 | &h3_lcd_device, |
401 | }; | 300 | }; |
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c index 7bc7a3cb9c51..d1ed1365319e 100644 --- a/arch/arm/mach-omap1/board-nokia770.c +++ b/arch/arm/mach-omap1/board-nokia770.c | |||
@@ -181,11 +181,7 @@ static struct omap_usb_config nokia770_usb_config __initdata = { | |||
181 | static int nokia770_mmc_set_power(struct device *dev, int slot, int power_on, | 181 | static int nokia770_mmc_set_power(struct device *dev, int slot, int power_on, |
182 | int vdd) | 182 | int vdd) |
183 | { | 183 | { |
184 | if (power_on) | 184 | gpio_set_value(NOKIA770_GPIO_MMC_POWER, power_on); |
185 | gpio_set_value(NOKIA770_GPIO_MMC_POWER, 1); | ||
186 | else | ||
187 | gpio_set_value(NOKIA770_GPIO_MMC_POWER, 0); | ||
188 | |||
189 | return 0; | 185 | return 0; |
190 | } | 186 | } |
191 | 187 | ||
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c index d040c3f1027f..a2d7814896be 100644 --- a/arch/arm/mach-omap1/mcbsp.c +++ b/arch/arm/mach-omap1/mcbsp.c | |||
@@ -40,8 +40,8 @@ static void omap1_mcbsp_request(unsigned int id) | |||
40 | */ | 40 | */ |
41 | if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) { | 41 | if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) { |
42 | if (dsp_use++ == 0) { | 42 | if (dsp_use++ == 0) { |
43 | api_clk = clk_get(NULL, "api_clk"); | 43 | api_clk = clk_get(NULL, "api_ck"); |
44 | dsp_clk = clk_get(NULL, "dsp_clk"); | 44 | dsp_clk = clk_get(NULL, "dsp_ck"); |
45 | if (!IS_ERR(api_clk) && !IS_ERR(dsp_clk)) { | 45 | if (!IS_ERR(api_clk) && !IS_ERR(dsp_clk)) { |
46 | clk_enable(api_clk); | 46 | clk_enable(api_clk); |
47 | clk_enable(dsp_clk); | 47 | clk_enable(dsp_clk); |
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c index a0267a9ab466..e7d017cdc438 100644 --- a/arch/arm/mach-omap2/board-h4.c +++ b/arch/arm/mach-omap2/board-h4.c | |||
@@ -33,10 +33,8 @@ | |||
33 | 33 | ||
34 | #include <mach/control.h> | 34 | #include <mach/control.h> |
35 | #include <mach/gpio.h> | 35 | #include <mach/gpio.h> |
36 | #include <mach/gpioexpander.h> | ||
37 | #include <mach/mux.h> | 36 | #include <mach/mux.h> |
38 | #include <mach/usb.h> | 37 | #include <mach/usb.h> |
39 | #include <mach/irda.h> | ||
40 | #include <mach/board.h> | 38 | #include <mach/board.h> |
41 | #include <mach/common.h> | 39 | #include <mach/common.h> |
42 | #include <mach/keypad.h> | 40 | #include <mach/keypad.h> |
@@ -138,98 +136,6 @@ static struct platform_device h4_flash_device = { | |||
138 | .resource = &h4_flash_resource, | 136 | .resource = &h4_flash_resource, |
139 | }; | 137 | }; |
140 | 138 | ||
141 | /* Select between the IrDA and aGPS module | ||
142 | */ | ||
143 | static int h4_select_irda(struct device *dev, int state) | ||
144 | { | ||
145 | unsigned char expa; | ||
146 | int err = 0; | ||
147 | |||
148 | if ((err = read_gpio_expa(&expa, 0x21))) { | ||
149 | printk(KERN_ERR "Error reading from I/O expander\n"); | ||
150 | return err; | ||
151 | } | ||
152 | |||
153 | /* 'P6' enable/disable IRDA_TX and IRDA_RX */ | ||
154 | if (state & IR_SEL) { /* IrDa */ | ||
155 | if ((err = write_gpio_expa(expa | 0x01, 0x21))) { | ||
156 | printk(KERN_ERR "Error writing to I/O expander\n"); | ||
157 | return err; | ||
158 | } | ||
159 | } else { | ||
160 | if ((err = write_gpio_expa(expa & ~0x01, 0x21))) { | ||
161 | printk(KERN_ERR "Error writing to I/O expander\n"); | ||
162 | return err; | ||
163 | } | ||
164 | } | ||
165 | return err; | ||
166 | } | ||
167 | |||
168 | static void set_trans_mode(struct work_struct *work) | ||
169 | { | ||
170 | struct omap_irda_config *irda_config = | ||
171 | container_of(work, struct omap_irda_config, gpio_expa.work); | ||
172 | int mode = irda_config->mode; | ||
173 | unsigned char expa; | ||
174 | int err = 0; | ||
175 | |||
176 | if ((err = read_gpio_expa(&expa, 0x20)) != 0) { | ||
177 | printk(KERN_ERR "Error reading from I/O expander\n"); | ||
178 | } | ||
179 | |||
180 | expa &= ~0x01; | ||
181 | |||
182 | if (!(mode & IR_SIRMODE)) { /* MIR/FIR */ | ||
183 | expa |= 0x01; | ||
184 | } | ||
185 | |||
186 | if ((err = write_gpio_expa(expa, 0x20)) != 0) { | ||
187 | printk(KERN_ERR "Error writing to I/O expander\n"); | ||
188 | } | ||
189 | } | ||
190 | |||
191 | static int h4_transceiver_mode(struct device *dev, int mode) | ||
192 | { | ||
193 | struct omap_irda_config *irda_config = dev->platform_data; | ||
194 | |||
195 | irda_config->mode = mode; | ||
196 | cancel_delayed_work(&irda_config->gpio_expa); | ||
197 | PREPARE_DELAYED_WORK(&irda_config->gpio_expa, set_trans_mode); | ||
198 | schedule_delayed_work(&irda_config->gpio_expa, 0); | ||
199 | |||
200 | return 0; | ||
201 | } | ||
202 | |||
203 | static struct omap_irda_config h4_irda_data = { | ||
204 | .transceiver_cap = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE, | ||
205 | .transceiver_mode = h4_transceiver_mode, | ||
206 | .select_irda = h4_select_irda, | ||
207 | .rx_channel = OMAP24XX_DMA_UART3_RX, | ||
208 | .tx_channel = OMAP24XX_DMA_UART3_TX, | ||
209 | .dest_start = OMAP_UART3_BASE, | ||
210 | .src_start = OMAP_UART3_BASE, | ||
211 | .tx_trigger = OMAP24XX_DMA_UART3_TX, | ||
212 | .rx_trigger = OMAP24XX_DMA_UART3_RX, | ||
213 | }; | ||
214 | |||
215 | static struct resource h4_irda_resources[] = { | ||
216 | [0] = { | ||
217 | .start = INT_24XX_UART3_IRQ, | ||
218 | .end = INT_24XX_UART3_IRQ, | ||
219 | .flags = IORESOURCE_IRQ, | ||
220 | }, | ||
221 | }; | ||
222 | |||
223 | static struct platform_device h4_irda_device = { | ||
224 | .name = "omapirda", | ||
225 | .id = -1, | ||
226 | .dev = { | ||
227 | .platform_data = &h4_irda_data, | ||
228 | }, | ||
229 | .num_resources = 1, | ||
230 | .resource = h4_irda_resources, | ||
231 | }; | ||
232 | |||
233 | static struct omap_kp_platform_data h4_kp_data = { | 139 | static struct omap_kp_platform_data h4_kp_data = { |
234 | .rows = 6, | 140 | .rows = 6, |
235 | .cols = 7, | 141 | .cols = 7, |
@@ -255,7 +161,6 @@ static struct platform_device h4_lcd_device = { | |||
255 | 161 | ||
256 | static struct platform_device *h4_devices[] __initdata = { | 162 | static struct platform_device *h4_devices[] __initdata = { |
257 | &h4_flash_device, | 163 | &h4_flash_device, |
258 | &h4_irda_device, | ||
259 | &h4_kp_device, | 164 | &h4_kp_device, |
260 | &h4_lcd_device, | 165 | &h4_lcd_device, |
261 | }; | 166 | }; |
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index 744740ae1b9c..3a7a29d1f9a7 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c | |||
@@ -42,6 +42,7 @@ | |||
42 | #include <mach/nand.h> | 42 | #include <mach/nand.h> |
43 | #include <mach/mux.h> | 43 | #include <mach/mux.h> |
44 | #include <mach/usb.h> | 44 | #include <mach/usb.h> |
45 | #include <mach/timer-gp.h> | ||
45 | 46 | ||
46 | #include "mmc-twl4030.h" | 47 | #include "mmc-twl4030.h" |
47 | 48 | ||
@@ -186,6 +187,9 @@ static void __init omap3_beagle_init_irq(void) | |||
186 | { | 187 | { |
187 | omap2_init_common_hw(NULL); | 188 | omap2_init_common_hw(NULL); |
188 | omap_init_irq(); | 189 | omap_init_irq(); |
190 | #ifdef CONFIG_OMAP_32K_TIMER | ||
191 | omap2_gp_clockevent_set_gptimer(12); | ||
192 | #endif | ||
189 | omap_gpio_init(); | 193 | omap_gpio_init(); |
190 | } | 194 | } |
191 | 195 | ||
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c index 3a0daac6c839..374ff63c3eb2 100644 --- a/arch/arm/mach-omap2/board-rx51.c +++ b/arch/arm/mach-omap2/board-rx51.c | |||
@@ -15,7 +15,6 @@ | |||
15 | #include <linux/err.h> | 15 | #include <linux/err.h> |
16 | #include <linux/clk.h> | 16 | #include <linux/clk.h> |
17 | #include <linux/io.h> | 17 | #include <linux/io.h> |
18 | #include <linux/delay.h> | ||
19 | #include <linux/gpio.h> | 18 | #include <linux/gpio.h> |
20 | 19 | ||
21 | #include <mach/hardware.h> | 20 | #include <mach/hardware.h> |
diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c index 1e839c5a28c5..efc59c49341b 100644 --- a/arch/arm/mach-omap2/clock24xx.c +++ b/arch/arm/mach-omap2/clock24xx.c | |||
@@ -60,12 +60,13 @@ struct omap_clk { | |||
60 | }, \ | 60 | }, \ |
61 | } | 61 | } |
62 | 62 | ||
63 | #define CK_243X (1 << 0) | 63 | #define CK_243X RATE_IN_243X |
64 | #define CK_242X (1 << 1) | 64 | #define CK_242X RATE_IN_242X |
65 | 65 | ||
66 | static struct omap_clk omap24xx_clks[] = { | 66 | static struct omap_clk omap24xx_clks[] = { |
67 | /* external root sources */ | 67 | /* external root sources */ |
68 | CLK(NULL, "func_32k_ck", &func_32k_ck, CK_243X | CK_242X), | 68 | CLK(NULL, "func_32k_ck", &func_32k_ck, CK_243X | CK_242X), |
69 | CLK(NULL, "secure_32k_ck", &secure_32k_ck, CK_243X | CK_242X), | ||
69 | CLK(NULL, "osc_ck", &osc_ck, CK_243X | CK_242X), | 70 | CLK(NULL, "osc_ck", &osc_ck, CK_243X | CK_242X), |
70 | CLK(NULL, "sys_ck", &sys_ck, CK_243X | CK_242X), | 71 | CLK(NULL, "sys_ck", &sys_ck, CK_243X | CK_242X), |
71 | CLK(NULL, "alt_ck", &alt_ck, CK_243X | CK_242X), | 72 | CLK(NULL, "alt_ck", &alt_ck, CK_243X | CK_242X), |
@@ -711,7 +712,7 @@ int __init omap2_clk_init(void) | |||
711 | { | 712 | { |
712 | struct prcm_config *prcm; | 713 | struct prcm_config *prcm; |
713 | struct omap_clk *c; | 714 | struct omap_clk *c; |
714 | u32 clkrate, cpu_mask; | 715 | u32 clkrate; |
715 | 716 | ||
716 | if (cpu_is_omap242x()) | 717 | if (cpu_is_omap242x()) |
717 | cpu_mask = RATE_IN_242X; | 718 | cpu_mask = RATE_IN_242X; |
@@ -720,21 +721,15 @@ int __init omap2_clk_init(void) | |||
720 | 721 | ||
721 | clk_init(&omap2_clk_functions); | 722 | clk_init(&omap2_clk_functions); |
722 | 723 | ||
724 | for (c = omap24xx_clks; c < omap24xx_clks + ARRAY_SIZE(omap24xx_clks); c++) | ||
725 | clk_init_one(c->lk.clk); | ||
726 | |||
723 | osc_ck.rate = omap2_osc_clk_recalc(&osc_ck); | 727 | osc_ck.rate = omap2_osc_clk_recalc(&osc_ck); |
724 | propagate_rate(&osc_ck); | 728 | propagate_rate(&osc_ck); |
725 | sys_ck.rate = omap2_sys_clk_recalc(&sys_ck); | 729 | sys_ck.rate = omap2_sys_clk_recalc(&sys_ck); |
726 | propagate_rate(&sys_ck); | 730 | propagate_rate(&sys_ck); |
727 | 731 | ||
728 | for (c = omap24xx_clks; c < omap24xx_clks + ARRAY_SIZE(omap24xx_clks); c++) | 732 | for (c = omap24xx_clks; c < omap24xx_clks + ARRAY_SIZE(omap24xx_clks); c++) |
729 | clk_init_one(c->lk.clk); | ||
730 | |||
731 | cpu_mask = 0; | ||
732 | if (cpu_is_omap2420()) | ||
733 | cpu_mask |= CK_242X; | ||
734 | if (cpu_is_omap2430()) | ||
735 | cpu_mask |= CK_243X; | ||
736 | |||
737 | for (c = omap24xx_clks; c < omap24xx_clks + ARRAY_SIZE(omap24xx_clks); c++) | ||
738 | if (c->cpu & cpu_mask) { | 733 | if (c->cpu & cpu_mask) { |
739 | clkdev_add(&c->lk); | 734 | clkdev_add(&c->lk); |
740 | clk_register(c->lk.clk); | 735 | clk_register(c->lk.clk); |
diff --git a/arch/arm/mach-omap2/clock24xx.h b/arch/arm/mach-omap2/clock24xx.h index 33c3e5b14323..88c5acb40fcf 100644 --- a/arch/arm/mach-omap2/clock24xx.h +++ b/arch/arm/mach-omap2/clock24xx.h | |||
@@ -625,6 +625,14 @@ static struct clk func_32k_ck = { | |||
625 | .clkdm_name = "wkup_clkdm", | 625 | .clkdm_name = "wkup_clkdm", |
626 | }; | 626 | }; |
627 | 627 | ||
628 | static struct clk secure_32k_ck = { | ||
629 | .name = "secure_32k_ck", | ||
630 | .ops = &clkops_null, | ||
631 | .rate = 32768, | ||
632 | .flags = RATE_FIXED, | ||
633 | .clkdm_name = "wkup_clkdm", | ||
634 | }; | ||
635 | |||
628 | /* Typical 12/13MHz in standalone mode, will be 26Mhz in chassis mode */ | 636 | /* Typical 12/13MHz in standalone mode, will be 26Mhz in chassis mode */ |
629 | static struct clk osc_ck = { /* (*12, *13, 19.2, *26, 38.4)MHz */ | 637 | static struct clk osc_ck = { /* (*12, *13, 19.2, *26, 38.4)MHz */ |
630 | .name = "osc_ck", | 638 | .name = "osc_ck", |
@@ -1790,7 +1798,7 @@ static struct clk gpt12_ick = { | |||
1790 | static struct clk gpt12_fck = { | 1798 | static struct clk gpt12_fck = { |
1791 | .name = "gpt12_fck", | 1799 | .name = "gpt12_fck", |
1792 | .ops = &clkops_omap2_dflt_wait, | 1800 | .ops = &clkops_omap2_dflt_wait, |
1793 | .parent = &func_32k_ck, | 1801 | .parent = &secure_32k_ck, |
1794 | .clkdm_name = "core_l4_clkdm", | 1802 | .clkdm_name = "core_l4_clkdm", |
1795 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), | 1803 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), |
1796 | .enable_bit = OMAP24XX_EN_GPT12_SHIFT, | 1804 | .enable_bit = OMAP24XX_EN_GPT12_SHIFT, |
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h index 70ec10deb654..6763b8f73028 100644 --- a/arch/arm/mach-omap2/clock34xx.h +++ b/arch/arm/mach-omap2/clock34xx.h | |||
@@ -2052,7 +2052,7 @@ static struct clk dss_ick = { | |||
2052 | 2052 | ||
2053 | static struct clk cam_mclk = { | 2053 | static struct clk cam_mclk = { |
2054 | .name = "cam_mclk", | 2054 | .name = "cam_mclk", |
2055 | .ops = &clkops_omap2_dflt_wait, | 2055 | .ops = &clkops_omap2_dflt, |
2056 | .parent = &dpll4_m5x2_ck, | 2056 | .parent = &dpll4_m5x2_ck, |
2057 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_FCLKEN), | 2057 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_FCLKEN), |
2058 | .enable_bit = OMAP3430_EN_CAM_SHIFT, | 2058 | .enable_bit = OMAP3430_EN_CAM_SHIFT, |
@@ -2063,7 +2063,7 @@ static struct clk cam_mclk = { | |||
2063 | static struct clk cam_ick = { | 2063 | static struct clk cam_ick = { |
2064 | /* Handles both L3 and L4 clocks */ | 2064 | /* Handles both L3 and L4 clocks */ |
2065 | .name = "cam_ick", | 2065 | .name = "cam_ick", |
2066 | .ops = &clkops_omap2_dflt_wait, | 2066 | .ops = &clkops_omap2_dflt, |
2067 | .parent = &l4_ick, | 2067 | .parent = &l4_ick, |
2068 | .init = &omap2_init_clk_clkdm, | 2068 | .init = &omap2_init_clk_clkdm, |
2069 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_ICLKEN), | 2069 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_ICLKEN), |
@@ -2074,7 +2074,7 @@ static struct clk cam_ick = { | |||
2074 | 2074 | ||
2075 | static struct clk csi2_96m_fck = { | 2075 | static struct clk csi2_96m_fck = { |
2076 | .name = "csi2_96m_fck", | 2076 | .name = "csi2_96m_fck", |
2077 | .ops = &clkops_omap2_dflt_wait, | 2077 | .ops = &clkops_omap2_dflt, |
2078 | .parent = &core_96m_fck, | 2078 | .parent = &core_96m_fck, |
2079 | .init = &omap2_init_clk_clkdm, | 2079 | .init = &omap2_init_clk_clkdm, |
2080 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_FCLKEN), | 2080 | .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_FCLKEN), |
@@ -2901,7 +2901,6 @@ static struct clk sr_l4_ick = { | |||
2901 | 2901 | ||
2902 | /* SECURE_32K_FCK clocks */ | 2902 | /* SECURE_32K_FCK clocks */ |
2903 | 2903 | ||
2904 | /* XXX This clock no longer exists in 3430 TRM rev F */ | ||
2905 | static struct clk gpt12_fck = { | 2904 | static struct clk gpt12_fck = { |
2906 | .name = "gpt12_fck", | 2905 | .name = "gpt12_fck", |
2907 | .ops = &clkops_null, | 2906 | .ops = &clkops_null, |
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index d6b4b2f8722f..496983ade97e 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c | |||
@@ -25,7 +25,6 @@ | |||
25 | #include <mach/board.h> | 25 | #include <mach/board.h> |
26 | #include <mach/mux.h> | 26 | #include <mach/mux.h> |
27 | #include <mach/gpio.h> | 27 | #include <mach/gpio.h> |
28 | #include <mach/eac.h> | ||
29 | #include <mach/mmc.h> | 28 | #include <mach/mmc.h> |
30 | 29 | ||
31 | #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE) | 30 | #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE) |
@@ -366,38 +365,6 @@ static void omap_init_mcspi(void) | |||
366 | static inline void omap_init_mcspi(void) {} | 365 | static inline void omap_init_mcspi(void) {} |
367 | #endif | 366 | #endif |
368 | 367 | ||
369 | #ifdef CONFIG_SND_OMAP24XX_EAC | ||
370 | |||
371 | #define OMAP2_EAC_BASE 0x48090000 | ||
372 | |||
373 | static struct resource omap2_eac_resources[] = { | ||
374 | { | ||
375 | .start = OMAP2_EAC_BASE, | ||
376 | .end = OMAP2_EAC_BASE + 0x109, | ||
377 | .flags = IORESOURCE_MEM, | ||
378 | }, | ||
379 | }; | ||
380 | |||
381 | static struct platform_device omap2_eac_device = { | ||
382 | .name = "omap24xx-eac", | ||
383 | .id = -1, | ||
384 | .num_resources = ARRAY_SIZE(omap2_eac_resources), | ||
385 | .resource = omap2_eac_resources, | ||
386 | .dev = { | ||
387 | .platform_data = NULL, | ||
388 | }, | ||
389 | }; | ||
390 | |||
391 | void omap_init_eac(struct eac_platform_data *pdata) | ||
392 | { | ||
393 | omap2_eac_device.dev.platform_data = pdata; | ||
394 | platform_device_register(&omap2_eac_device); | ||
395 | } | ||
396 | |||
397 | #else | ||
398 | void omap_init_eac(struct eac_platform_data *pdata) {} | ||
399 | #endif | ||
400 | |||
401 | #ifdef CONFIG_OMAP_SHA1_MD5 | 368 | #ifdef CONFIG_OMAP_SHA1_MD5 |
402 | static struct resource sha1_md5_resources[] = { | 369 | static struct resource sha1_md5_resources[] = { |
403 | { | 370 | { |
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 9ba20d985dda..998c5c45587e 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c | |||
@@ -73,9 +73,9 @@ static int omap_check_spurious(unsigned int irq) | |||
73 | u32 sir, spurious; | 73 | u32 sir, spurious; |
74 | 74 | ||
75 | sir = intc_bank_read_reg(&irq_banks[0], INTC_SIR); | 75 | sir = intc_bank_read_reg(&irq_banks[0], INTC_SIR); |
76 | spurious = sir >> 6; | 76 | spurious = sir >> 7; |
77 | 77 | ||
78 | if (spurious > 1) { | 78 | if (spurious) { |
79 | printk(KERN_WARNING "Spurious irq %i: 0x%08x, please flush " | 79 | printk(KERN_WARNING "Spurious irq %i: 0x%08x, please flush " |
80 | "posted write for irq %i\n", | 80 | "posted write for irq %i\n", |
81 | irq, sir, previous_irq); | 81 | irq, sir, previous_irq); |
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c index 1cb2c0909c2b..f36aba12090e 100644 --- a/arch/arm/mach-omap2/timer-gp.c +++ b/arch/arm/mach-omap2/timer-gp.c | |||
@@ -3,6 +3,8 @@ | |||
3 | * | 3 | * |
4 | * OMAP2 GP timer support. | 4 | * OMAP2 GP timer support. |
5 | * | 5 | * |
6 | * Copyright (C) 2009 Nokia Corporation | ||
7 | * | ||
6 | * Update to use new clocksource/clockevent layers | 8 | * Update to use new clocksource/clockevent layers |
7 | * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com> | 9 | * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com> |
8 | * Copyright (C) 2007 MontaVista Software, Inc. | 10 | * Copyright (C) 2007 MontaVista Software, Inc. |
@@ -36,8 +38,13 @@ | |||
36 | #include <asm/mach/time.h> | 38 | #include <asm/mach/time.h> |
37 | #include <mach/dmtimer.h> | 39 | #include <mach/dmtimer.h> |
38 | 40 | ||
41 | /* MAX_GPTIMER_ID: number of GPTIMERs on the chip */ | ||
42 | #define MAX_GPTIMER_ID 12 | ||
43 | |||
39 | static struct omap_dm_timer *gptimer; | 44 | static struct omap_dm_timer *gptimer; |
40 | static struct clock_event_device clockevent_gpt; | 45 | static struct clock_event_device clockevent_gpt; |
46 | static u8 __initdata gptimer_id = 1; | ||
47 | static u8 __initdata inited; | ||
41 | 48 | ||
42 | static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) | 49 | static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) |
43 | { | 50 | { |
@@ -95,20 +102,53 @@ static struct clock_event_device clockevent_gpt = { | |||
95 | .set_mode = omap2_gp_timer_set_mode, | 102 | .set_mode = omap2_gp_timer_set_mode, |
96 | }; | 103 | }; |
97 | 104 | ||
105 | /** | ||
106 | * omap2_gp_clockevent_set_gptimer - set which GPTIMER is used for clockevents | ||
107 | * @id: GPTIMER to use (1..MAX_GPTIMER_ID) | ||
108 | * | ||
109 | * Define the GPTIMER that the system should use for the tick timer. | ||
110 | * Meant to be called from board-*.c files in the event that GPTIMER1, the | ||
111 | * default, is unsuitable. Returns -EINVAL on error or 0 on success. | ||
112 | */ | ||
113 | int __init omap2_gp_clockevent_set_gptimer(u8 id) | ||
114 | { | ||
115 | if (id < 1 || id > MAX_GPTIMER_ID) | ||
116 | return -EINVAL; | ||
117 | |||
118 | BUG_ON(inited); | ||
119 | |||
120 | gptimer_id = id; | ||
121 | |||
122 | return 0; | ||
123 | } | ||
124 | |||
98 | static void __init omap2_gp_clockevent_init(void) | 125 | static void __init omap2_gp_clockevent_init(void) |
99 | { | 126 | { |
100 | u32 tick_rate; | 127 | u32 tick_rate; |
128 | int src; | ||
129 | |||
130 | inited = 1; | ||
101 | 131 | ||
102 | gptimer = omap_dm_timer_request_specific(1); | 132 | gptimer = omap_dm_timer_request_specific(gptimer_id); |
103 | BUG_ON(gptimer == NULL); | 133 | BUG_ON(gptimer == NULL); |
104 | 134 | ||
105 | #if defined(CONFIG_OMAP_32K_TIMER) | 135 | #if defined(CONFIG_OMAP_32K_TIMER) |
106 | omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_32_KHZ); | 136 | src = OMAP_TIMER_SRC_32_KHZ; |
107 | #else | 137 | #else |
108 | omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_SYS_CLK); | 138 | src = OMAP_TIMER_SRC_SYS_CLK; |
139 | WARN(gptimer_id == 12, "WARNING: GPTIMER12 can only use the " | ||
140 | "secure 32KiHz clock source\n"); | ||
109 | #endif | 141 | #endif |
142 | |||
143 | if (gptimer_id != 12) | ||
144 | WARN(IS_ERR_VALUE(omap_dm_timer_set_source(gptimer, src)), | ||
145 | "timer-gp: omap_dm_timer_set_source() failed\n"); | ||
146 | |||
110 | tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer)); | 147 | tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer)); |
111 | 148 | ||
149 | pr_info("OMAP clockevent source: GPTIMER%d at %u Hz\n", | ||
150 | gptimer_id, tick_rate); | ||
151 | |||
112 | omap2_gp_timer_irq.dev_id = (void *)gptimer; | 152 | omap2_gp_timer_irq.dev_id = (void *)gptimer; |
113 | setup_irq(omap_dm_timer_get_irq(gptimer), &omap2_gp_timer_irq); | 153 | setup_irq(omap_dm_timer_get_irq(gptimer), &omap2_gp_timer_irq); |
114 | omap_dm_timer_set_int_enable(gptimer, OMAP_TIMER_INT_OVERFLOW); | 154 | omap_dm_timer_set_int_enable(gptimer, OMAP_TIMER_INT_OVERFLOW); |
@@ -125,6 +165,8 @@ static void __init omap2_gp_clockevent_init(void) | |||
125 | clockevents_register_device(&clockevent_gpt); | 165 | clockevents_register_device(&clockevent_gpt); |
126 | } | 166 | } |
127 | 167 | ||
168 | /* Clocksource code */ | ||
169 | |||
128 | #ifdef CONFIG_OMAP_32K_TIMER | 170 | #ifdef CONFIG_OMAP_32K_TIMER |
129 | /* | 171 | /* |
130 | * When 32k-timer is enabled, don't use GPTimer for clocksource | 172 | * When 32k-timer is enabled, don't use GPTimer for clocksource |
diff --git a/arch/arm/mach-omap2/usb-tusb6010.c b/arch/arm/mach-omap2/usb-tusb6010.c index 15e509013def..8df55f40f4c0 100644 --- a/arch/arm/mach-omap2/usb-tusb6010.c +++ b/arch/arm/mach-omap2/usb-tusb6010.c | |||
@@ -187,7 +187,7 @@ int tusb6010_platform_retime(unsigned is_refclk) | |||
187 | unsigned sysclk_ps; | 187 | unsigned sysclk_ps; |
188 | int status; | 188 | int status; |
189 | 189 | ||
190 | if (!refclk_psec) | 190 | if (!refclk_psec || sysclk_ps == 0) |
191 | return -ENODEV; | 191 | return -ENODEV; |
192 | 192 | ||
193 | sysclk_ps = is_refclk ? refclk_psec : TUSB6010_OSCCLK_60; | 193 | sysclk_ps = is_refclk ? refclk_psec : TUSB6010_OSCCLK_60; |
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c index cdf21dd135b4..930e364ccde9 100644 --- a/arch/arm/mach-pxa/corgi.c +++ b/arch/arm/mach-pxa/corgi.c | |||
@@ -427,12 +427,22 @@ static struct pxa2xx_spi_master corgi_spi_info = { | |||
427 | .num_chipselect = 3, | 427 | .num_chipselect = 3, |
428 | }; | 428 | }; |
429 | 429 | ||
430 | static void corgi_wait_for_hsync(void) | ||
431 | { | ||
432 | while (gpio_get_value(CORGI_GPIO_HSYNC)) | ||
433 | cpu_relax(); | ||
434 | |||
435 | while (!gpio_get_value(CORGI_GPIO_HSYNC)) | ||
436 | cpu_relax(); | ||
437 | } | ||
438 | |||
430 | static struct ads7846_platform_data corgi_ads7846_info = { | 439 | static struct ads7846_platform_data corgi_ads7846_info = { |
431 | .model = 7846, | 440 | .model = 7846, |
432 | .vref_delay_usecs = 100, | 441 | .vref_delay_usecs = 100, |
433 | .x_plate_ohms = 419, | 442 | .x_plate_ohms = 419, |
434 | .y_plate_ohms = 486, | 443 | .y_plate_ohms = 486, |
435 | .gpio_pendown = CORGI_GPIO_TP_INT, | 444 | .gpio_pendown = CORGI_GPIO_TP_INT, |
445 | .wait_for_sync = corgi_wait_for_hsync, | ||
436 | }; | 446 | }; |
437 | 447 | ||
438 | static void corgi_ads7846_cs(u32 command) | 448 | static void corgi_ads7846_cs(u32 command) |
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c index e13f6a81c223..c872b9feb4d4 100644 --- a/arch/arm/mach-pxa/littleton.c +++ b/arch/arm/mach-pxa/littleton.c | |||
@@ -334,6 +334,11 @@ static struct led_info littleton_da9034_leds[] = { | |||
334 | }, | 334 | }, |
335 | }; | 335 | }; |
336 | 336 | ||
337 | static struct da9034_touch_pdata littleton_da9034_touch = { | ||
338 | .x_inverted = 1, | ||
339 | .interval_ms = 20, | ||
340 | }; | ||
341 | |||
337 | static struct da903x_subdev_info littleton_da9034_subdevs[] = { | 342 | static struct da903x_subdev_info littleton_da9034_subdevs[] = { |
338 | { | 343 | { |
339 | .name = "da903x-led", | 344 | .name = "da903x-led", |
@@ -350,6 +355,10 @@ static struct da903x_subdev_info littleton_da9034_subdevs[] = { | |||
350 | }, { | 355 | }, { |
351 | .name = "da903x-backlight", | 356 | .name = "da903x-backlight", |
352 | .id = DA9034_ID_WLED, | 357 | .id = DA9034_ID_WLED, |
358 | }, { | ||
359 | .name = "da9034-touch", | ||
360 | .id = DA9034_ID_TOUCH, | ||
361 | .platform_data = &littleton_da9034_touch, | ||
353 | }, | 362 | }, |
354 | }; | 363 | }; |
355 | 364 | ||
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index 8c61ddac119e..c18e34acafcb 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c | |||
@@ -299,12 +299,22 @@ static struct pxa2xx_spi_master spitz_spi_info = { | |||
299 | .num_chipselect = 3, | 299 | .num_chipselect = 3, |
300 | }; | 300 | }; |
301 | 301 | ||
302 | static void spitz_wait_for_hsync(void) | ||
303 | { | ||
304 | while (gpio_get_value(SPITZ_GPIO_HSYNC)) | ||
305 | cpu_relax(); | ||
306 | |||
307 | while (!gpio_get_value(SPITZ_GPIO_HSYNC)) | ||
308 | cpu_relax(); | ||
309 | } | ||
310 | |||
302 | static struct ads7846_platform_data spitz_ads7846_info = { | 311 | static struct ads7846_platform_data spitz_ads7846_info = { |
303 | .model = 7846, | 312 | .model = 7846, |
304 | .vref_delay_usecs = 100, | 313 | .vref_delay_usecs = 100, |
305 | .x_plate_ohms = 419, | 314 | .x_plate_ohms = 419, |
306 | .y_plate_ohms = 486, | 315 | .y_plate_ohms = 486, |
307 | .gpio_pendown = SPITZ_GPIO_TP_INT, | 316 | .gpio_pendown = SPITZ_GPIO_TP_INT, |
317 | .wait_for_sync = spitz_wait_for_hsync, | ||
308 | }; | 318 | }; |
309 | 319 | ||
310 | static void spitz_ads7846_cs(u32 command) | 320 | static void spitz_ads7846_cs(u32 command) |
diff --git a/arch/arm/mach-pxa/zylonite_pxa300.c b/arch/arm/mach-pxa/zylonite_pxa300.c index c1f73205d078..c256c57642c0 100644 --- a/arch/arm/mach-pxa/zylonite_pxa300.c +++ b/arch/arm/mach-pxa/zylonite_pxa300.c | |||
@@ -72,6 +72,7 @@ static mfp_cfg_t common_mfp_cfg[] __initdata = { | |||
72 | GPIO25_AC97_SDATA_IN_0, | 72 | GPIO25_AC97_SDATA_IN_0, |
73 | GPIO27_AC97_SDATA_OUT, | 73 | GPIO27_AC97_SDATA_OUT, |
74 | GPIO28_AC97_SYNC, | 74 | GPIO28_AC97_SYNC, |
75 | GPIO17_GPIO, /* SDATA_IN_1 but unused - configure to GPIO */ | ||
75 | 76 | ||
76 | /* SSP3 */ | 77 | /* SSP3 */ |
77 | GPIO91_SSP3_SCLK, | 78 | GPIO91_SSP3_SCLK, |
@@ -126,6 +127,10 @@ static mfp_cfg_t common_mfp_cfg[] __initdata = { | |||
126 | /* Standard I2C */ | 127 | /* Standard I2C */ |
127 | GPIO21_I2C_SCL, | 128 | GPIO21_I2C_SCL, |
128 | GPIO22_I2C_SDA, | 129 | GPIO22_I2C_SDA, |
130 | |||
131 | /* GPIO */ | ||
132 | GPIO18_GPIO, /* GPIO Expander #0 INT_N */ | ||
133 | GPIO19_GPIO, /* GPIO Expander #1 INT_N */ | ||
129 | }; | 134 | }; |
130 | 135 | ||
131 | static mfp_cfg_t pxa300_mfp_cfg[] __initdata = { | 136 | static mfp_cfg_t pxa300_mfp_cfg[] __initdata = { |
diff --git a/arch/arm/mach-pxa/zylonite_pxa320.c b/arch/arm/mach-pxa/zylonite_pxa320.c index 4e1c488c6906..cc5a22833605 100644 --- a/arch/arm/mach-pxa/zylonite_pxa320.c +++ b/arch/arm/mach-pxa/zylonite_pxa320.c | |||
@@ -68,6 +68,7 @@ static mfp_cfg_t mfp_cfg[] __initdata = { | |||
68 | GPIO38_AC97_SYNC, | 68 | GPIO38_AC97_SYNC, |
69 | GPIO39_AC97_BITCLK, | 69 | GPIO39_AC97_BITCLK, |
70 | GPIO40_AC97_nACRESET, | 70 | GPIO40_AC97_nACRESET, |
71 | GPIO36_GPIO, /* SDATA_IN_1 but unused - configure to GPIO */ | ||
71 | 72 | ||
72 | /* SSP3 */ | 73 | /* SSP3 */ |
73 | GPIO89_SSP3_SCLK, | 74 | GPIO89_SSP3_SCLK, |
diff --git a/arch/arm/mach-sa1100/lart.c b/arch/arm/mach-sa1100/lart.c index 0cd52692d2f7..1f940df0e5af 100644 --- a/arch/arm/mach-sa1100/lart.c +++ b/arch/arm/mach-sa1100/lart.c | |||
@@ -9,6 +9,7 @@ | |||
9 | #include <mach/hardware.h> | 9 | #include <mach/hardware.h> |
10 | #include <asm/setup.h> | 10 | #include <asm/setup.h> |
11 | #include <asm/mach-types.h> | 11 | #include <asm/mach-types.h> |
12 | #include <asm/page.h> | ||
12 | 13 | ||
13 | #include <asm/mach/arch.h> | 14 | #include <asm/mach/arch.h> |
14 | #include <asm/mach/map.h> | 15 | #include <asm/mach/map.h> |
diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S index 2c6c2a7c05a0..8f5c13f4c936 100644 --- a/arch/arm/mm/cache-v6.S +++ b/arch/arm/mm/cache-v6.S | |||
@@ -20,6 +20,31 @@ | |||
20 | #define D_CACHE_LINE_SIZE 32 | 20 | #define D_CACHE_LINE_SIZE 32 |
21 | #define BTB_FLUSH_SIZE 8 | 21 | #define BTB_FLUSH_SIZE 8 |
22 | 22 | ||
23 | #ifdef CONFIG_ARM_ERRATA_411920 | ||
24 | /* | ||
25 | * Invalidate the entire I cache (this code is a workaround for the ARM1136 | ||
26 | * erratum 411920 - Invalidate Instruction Cache operation can fail. This | ||
27 | * erratum is present in 1136, 1156 and 1176. It does not affect the MPCore. | ||
28 | * | ||
29 | * Registers: | ||
30 | * r0 - set to 0 | ||
31 | * r1 - corrupted | ||
32 | */ | ||
33 | ENTRY(v6_icache_inval_all) | ||
34 | mov r0, #0 | ||
35 | mrs r1, cpsr | ||
36 | cpsid ifa @ disable interrupts | ||
37 | mcr p15, 0, r0, c7, c5, 0 @ invalidate entire I-cache | ||
38 | mcr p15, 0, r0, c7, c5, 0 @ invalidate entire I-cache | ||
39 | mcr p15, 0, r0, c7, c5, 0 @ invalidate entire I-cache | ||
40 | mcr p15, 0, r0, c7, c5, 0 @ invalidate entire I-cache | ||
41 | msr cpsr_cx, r1 @ restore interrupts | ||
42 | .rept 11 @ ARM Ltd recommends at least | ||
43 | nop @ 11 NOPs | ||
44 | .endr | ||
45 | mov pc, lr | ||
46 | #endif | ||
47 | |||
23 | /* | 48 | /* |
24 | * v6_flush_cache_all() | 49 | * v6_flush_cache_all() |
25 | * | 50 | * |
@@ -31,8 +56,12 @@ ENTRY(v6_flush_kern_cache_all) | |||
31 | mov r0, #0 | 56 | mov r0, #0 |
32 | #ifdef HARVARD_CACHE | 57 | #ifdef HARVARD_CACHE |
33 | mcr p15, 0, r0, c7, c14, 0 @ D cache clean+invalidate | 58 | mcr p15, 0, r0, c7, c14, 0 @ D cache clean+invalidate |
59 | #ifndef CONFIG_ARM_ERRATA_411920 | ||
34 | mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate | 60 | mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate |
35 | #else | 61 | #else |
62 | b v6_icache_inval_all | ||
63 | #endif | ||
64 | #else | ||
36 | mcr p15, 0, r0, c7, c15, 0 @ Cache clean+invalidate | 65 | mcr p15, 0, r0, c7, c15, 0 @ Cache clean+invalidate |
37 | #endif | 66 | #endif |
38 | mov pc, lr | 67 | mov pc, lr |
@@ -103,8 +132,12 @@ ENTRY(v6_coherent_user_range) | |||
103 | mov r0, #0 | 132 | mov r0, #0 |
104 | #ifdef HARVARD_CACHE | 133 | #ifdef HARVARD_CACHE |
105 | mcr p15, 0, r0, c7, c10, 4 @ drain write buffer | 134 | mcr p15, 0, r0, c7, c10, 4 @ drain write buffer |
135 | #ifndef CONFIG_ARM_ERRATA_411920 | ||
106 | mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate | 136 | mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate |
107 | #else | 137 | #else |
138 | b v6_icache_inval_all | ||
139 | #endif | ||
140 | #else | ||
108 | mcr p15, 0, r0, c7, c5, 6 @ invalidate BTB | 141 | mcr p15, 0, r0, c7, c5, 6 @ invalidate BTB |
109 | #endif | 142 | #endif |
110 | mov pc, lr | 143 | mov pc, lr |
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c index 4e283481cee1..c07222eb5ce0 100644 --- a/arch/arm/mm/flush.c +++ b/arch/arm/mm/flush.c | |||
@@ -18,6 +18,10 @@ | |||
18 | 18 | ||
19 | #include "mm.h" | 19 | #include "mm.h" |
20 | 20 | ||
21 | #ifdef CONFIG_ARM_ERRATA_411920 | ||
22 | extern void v6_icache_inval_all(void); | ||
23 | #endif | ||
24 | |||
21 | #ifdef CONFIG_CPU_CACHE_VIPT | 25 | #ifdef CONFIG_CPU_CACHE_VIPT |
22 | 26 | ||
23 | #define ALIAS_FLUSH_START 0xffff4000 | 27 | #define ALIAS_FLUSH_START 0xffff4000 |
@@ -32,10 +36,15 @@ static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr) | |||
32 | 36 | ||
33 | asm( "mcrr p15, 0, %1, %0, c14\n" | 37 | asm( "mcrr p15, 0, %1, %0, c14\n" |
34 | " mcr p15, 0, %2, c7, c10, 4\n" | 38 | " mcr p15, 0, %2, c7, c10, 4\n" |
39 | #ifndef CONFIG_ARM_ERRATA_411920 | ||
35 | " mcr p15, 0, %2, c7, c5, 0\n" | 40 | " mcr p15, 0, %2, c7, c5, 0\n" |
41 | #endif | ||
36 | : | 42 | : |
37 | : "r" (to), "r" (to + PAGE_SIZE - L1_CACHE_BYTES), "r" (zero) | 43 | : "r" (to), "r" (to + PAGE_SIZE - L1_CACHE_BYTES), "r" (zero) |
38 | : "cc"); | 44 | : "cc"); |
45 | #ifdef CONFIG_ARM_ERRATA_411920 | ||
46 | v6_icache_inval_all(); | ||
47 | #endif | ||
39 | } | 48 | } |
40 | 49 | ||
41 | void flush_cache_mm(struct mm_struct *mm) | 50 | void flush_cache_mm(struct mm_struct *mm) |
@@ -48,11 +57,16 @@ void flush_cache_mm(struct mm_struct *mm) | |||
48 | 57 | ||
49 | if (cache_is_vipt_aliasing()) { | 58 | if (cache_is_vipt_aliasing()) { |
50 | asm( "mcr p15, 0, %0, c7, c14, 0\n" | 59 | asm( "mcr p15, 0, %0, c7, c14, 0\n" |
60 | " mcr p15, 0, %0, c7, c10, 4\n" | ||
61 | #ifndef CONFIG_ARM_ERRATA_411920 | ||
51 | " mcr p15, 0, %0, c7, c5, 0\n" | 62 | " mcr p15, 0, %0, c7, c5, 0\n" |
52 | " mcr p15, 0, %0, c7, c10, 4" | 63 | #endif |
53 | : | 64 | : |
54 | : "r" (0) | 65 | : "r" (0) |
55 | : "cc"); | 66 | : "cc"); |
67 | #ifdef CONFIG_ARM_ERRATA_411920 | ||
68 | v6_icache_inval_all(); | ||
69 | #endif | ||
56 | } | 70 | } |
57 | } | 71 | } |
58 | 72 | ||
@@ -67,11 +81,16 @@ void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned | |||
67 | 81 | ||
68 | if (cache_is_vipt_aliasing()) { | 82 | if (cache_is_vipt_aliasing()) { |
69 | asm( "mcr p15, 0, %0, c7, c14, 0\n" | 83 | asm( "mcr p15, 0, %0, c7, c14, 0\n" |
84 | " mcr p15, 0, %0, c7, c10, 4\n" | ||
85 | #ifndef CONFIG_ARM_ERRATA_411920 | ||
70 | " mcr p15, 0, %0, c7, c5, 0\n" | 86 | " mcr p15, 0, %0, c7, c5, 0\n" |
71 | " mcr p15, 0, %0, c7, c10, 4" | 87 | #endif |
72 | : | 88 | : |
73 | : "r" (0) | 89 | : "r" (0) |
74 | : "cc"); | 90 | : "cc"); |
91 | #ifdef CONFIG_ARM_ERRATA_411920 | ||
92 | v6_icache_inval_all(); | ||
93 | #endif | ||
75 | } | 94 | } |
76 | } | 95 | } |
77 | 96 | ||
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S index f0cc599facb7..087e239704df 100644 --- a/arch/arm/mm/proc-v6.S +++ b/arch/arm/mm/proc-v6.S | |||
@@ -10,6 +10,7 @@ | |||
10 | * | 10 | * |
11 | * This is the "shell" of the ARMv6 processor support. | 11 | * This is the "shell" of the ARMv6 processor support. |
12 | */ | 12 | */ |
13 | #include <linux/init.h> | ||
13 | #include <linux/linkage.h> | 14 | #include <linux/linkage.h> |
14 | #include <asm/assembler.h> | 15 | #include <asm/assembler.h> |
15 | #include <asm/asm-offsets.h> | 16 | #include <asm/asm-offsets.h> |
@@ -132,7 +133,7 @@ cpu_v6_name: | |||
132 | .asciz "ARMv6-compatible processor" | 133 | .asciz "ARMv6-compatible processor" |
133 | .align | 134 | .align |
134 | 135 | ||
135 | .section ".text.init", #alloc, #execinstr | 136 | __INIT |
136 | 137 | ||
137 | /* | 138 | /* |
138 | * __v6_setup | 139 | * __v6_setup |
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index d1ebec42521d..3397f1e64d76 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S | |||
@@ -9,6 +9,7 @@ | |||
9 | * | 9 | * |
10 | * This is the "shell" of the ARMv7 processor support. | 10 | * This is the "shell" of the ARMv7 processor support. |
11 | */ | 11 | */ |
12 | #include <linux/init.h> | ||
12 | #include <linux/linkage.h> | 13 | #include <linux/linkage.h> |
13 | #include <asm/assembler.h> | 14 | #include <asm/assembler.h> |
14 | #include <asm/asm-offsets.h> | 15 | #include <asm/asm-offsets.h> |
@@ -95,6 +96,9 @@ ENTRY(cpu_v7_switch_mm) | |||
95 | mov r2, #0 | 96 | mov r2, #0 |
96 | ldr r1, [r1, #MM_CONTEXT_ID] @ get mm->context.id | 97 | ldr r1, [r1, #MM_CONTEXT_ID] @ get mm->context.id |
97 | orr r0, r0, #TTB_FLAGS | 98 | orr r0, r0, #TTB_FLAGS |
99 | #ifdef CONFIG_ARM_ERRATA_430973 | ||
100 | mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB | ||
101 | #endif | ||
98 | mcr p15, 0, r2, c13, c0, 1 @ set reserved context ID | 102 | mcr p15, 0, r2, c13, c0, 1 @ set reserved context ID |
99 | isb | 103 | isb |
100 | 1: mcr p15, 0, r0, c2, c0, 0 @ set TTB 0 | 104 | 1: mcr p15, 0, r0, c2, c0, 0 @ set TTB 0 |
@@ -153,7 +157,7 @@ cpu_v7_name: | |||
153 | .ascii "ARMv7 Processor" | 157 | .ascii "ARMv7 Processor" |
154 | .align | 158 | .align |
155 | 159 | ||
156 | .section ".text.init", #alloc, #execinstr | 160 | __INIT |
157 | 161 | ||
158 | /* | 162 | /* |
159 | * __v7_setup | 163 | * __v7_setup |
@@ -180,6 +184,22 @@ __v7_setup: | |||
180 | stmia r12, {r0-r5, r7, r9, r11, lr} | 184 | stmia r12, {r0-r5, r7, r9, r11, lr} |
181 | bl v7_flush_dcache_all | 185 | bl v7_flush_dcache_all |
182 | ldmia r12, {r0-r5, r7, r9, r11, lr} | 186 | ldmia r12, {r0-r5, r7, r9, r11, lr} |
187 | #ifdef CONFIG_ARM_ERRATA_430973 | ||
188 | mrc p15, 0, r10, c1, c0, 1 @ read aux control register | ||
189 | orr r10, r10, #(1 << 6) @ set IBE to 1 | ||
190 | mcr p15, 0, r10, c1, c0, 1 @ write aux control register | ||
191 | #endif | ||
192 | #ifdef CONFIG_ARM_ERRATA_458693 | ||
193 | mrc p15, 0, r10, c1, c0, 1 @ read aux control register | ||
194 | orr r10, r10, #(1 << 5) @ set L1NEON to 1 | ||
195 | orr r10, r10, #(1 << 9) @ set PLDNOP to 1 | ||
196 | mcr p15, 0, r10, c1, c0, 1 @ write aux control register | ||
197 | #endif | ||
198 | #ifdef CONFIG_ARM_ERRATA_460075 | ||
199 | mrc p15, 1, r10, c9, c0, 2 @ read L2 cache aux ctrl register | ||
200 | orr r10, r10, #(1 << 22) @ set the Write Allocate disable bit | ||
201 | mcr p15, 1, r10, c9, c0, 2 @ write the L2 cache aux ctrl register | ||
202 | #endif | ||
183 | mov r10, #0 | 203 | mov r10, #0 |
184 | #ifdef HARVARD_CACHE | 204 | #ifdef HARVARD_CACHE |
185 | mcr p15, 0, r10, c7, c5, 0 @ I+BTB cache invalidate | 205 | mcr p15, 0, r10, c7, c5, 0 @ I+BTB cache invalidate |
diff --git a/arch/arm/mm/tlb-v6.S b/arch/arm/mm/tlb-v6.S index 20f84bbaa9bb..73d7d89b04c4 100644 --- a/arch/arm/mm/tlb-v6.S +++ b/arch/arm/mm/tlb-v6.S | |||
@@ -10,6 +10,7 @@ | |||
10 | * ARM architecture version 6 TLB handling functions. | 10 | * ARM architecture version 6 TLB handling functions. |
11 | * These assume a split I/D TLB. | 11 | * These assume a split I/D TLB. |
12 | */ | 12 | */ |
13 | #include <linux/init.h> | ||
13 | #include <linux/linkage.h> | 14 | #include <linux/linkage.h> |
14 | #include <asm/asm-offsets.h> | 15 | #include <asm/asm-offsets.h> |
15 | #include <asm/page.h> | 16 | #include <asm/page.h> |
@@ -87,7 +88,7 @@ ENTRY(v6wbi_flush_kern_tlb_range) | |||
87 | mcr p15, 0, r2, c7, c5, 4 @ prefetch flush | 88 | mcr p15, 0, r2, c7, c5, 4 @ prefetch flush |
88 | mov pc, lr | 89 | mov pc, lr |
89 | 90 | ||
90 | .section ".text.init", #alloc, #execinstr | 91 | __INIT |
91 | 92 | ||
92 | .type v6wbi_tlb_fns, #object | 93 | .type v6wbi_tlb_fns, #object |
93 | ENTRY(v6wbi_tlb_fns) | 94 | ENTRY(v6wbi_tlb_fns) |
diff --git a/arch/arm/mm/tlb-v7.S b/arch/arm/mm/tlb-v7.S index 24ba5109f2e7..b637e7380ab7 100644 --- a/arch/arm/mm/tlb-v7.S +++ b/arch/arm/mm/tlb-v7.S | |||
@@ -11,6 +11,7 @@ | |||
11 | * ARM architecture version 6 TLB handling functions. | 11 | * ARM architecture version 6 TLB handling functions. |
12 | * These assume a split I/D TLB. | 12 | * These assume a split I/D TLB. |
13 | */ | 13 | */ |
14 | #include <linux/init.h> | ||
14 | #include <linux/linkage.h> | 15 | #include <linux/linkage.h> |
15 | #include <asm/asm-offsets.h> | 16 | #include <asm/asm-offsets.h> |
16 | #include <asm/page.h> | 17 | #include <asm/page.h> |
@@ -80,7 +81,7 @@ ENTRY(v7wbi_flush_kern_tlb_range) | |||
80 | mov pc, lr | 81 | mov pc, lr |
81 | ENDPROC(v7wbi_flush_kern_tlb_range) | 82 | ENDPROC(v7wbi_flush_kern_tlb_range) |
82 | 83 | ||
83 | .section ".text.init", #alloc, #execinstr | 84 | __INIT |
84 | 85 | ||
85 | .type v7wbi_tlb_fns, #object | 86 | .type v7wbi_tlb_fns, #object |
86 | ENTRY(v7wbi_tlb_fns) | 87 | ENTRY(v7wbi_tlb_fns) |
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig index 17d0e9906d5f..8986b7412235 100644 --- a/arch/arm/plat-mxc/Kconfig +++ b/arch/arm/plat-mxc/Kconfig | |||
@@ -48,7 +48,14 @@ config MXC_IRQ_PRIOR | |||
48 | config MXC_PWM | 48 | config MXC_PWM |
49 | tristate "Enable PWM driver" | 49 | tristate "Enable PWM driver" |
50 | depends on ARCH_MXC | 50 | depends on ARCH_MXC |
51 | select HAVE_PWM | ||
51 | help | 52 | help |
52 | Enable support for the i.MX PWM controller(s). | 53 | Enable support for the i.MX PWM controller(s). |
53 | 54 | ||
55 | config ARCH_HAS_RNGA | ||
56 | bool | ||
57 | depends on ARCH_MXC | ||
58 | |||
59 | config ARCH_MXC_IOMUX_V3 | ||
60 | bool | ||
54 | endif | 61 | endif |
diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile index 055406312b69..e3212c8ff421 100644 --- a/arch/arm/plat-mxc/Makefile +++ b/arch/arm/plat-mxc/Makefile | |||
@@ -7,4 +7,5 @@ obj-y := irq.o clock.o gpio.o time.o devices.o cpu.o system.o | |||
7 | 7 | ||
8 | obj-$(CONFIG_ARCH_MX1) += iomux-mx1-mx2.o dma-mx1-mx2.o | 8 | obj-$(CONFIG_ARCH_MX1) += iomux-mx1-mx2.o dma-mx1-mx2.o |
9 | obj-$(CONFIG_ARCH_MX2) += iomux-mx1-mx2.o dma-mx1-mx2.o | 9 | obj-$(CONFIG_ARCH_MX2) += iomux-mx1-mx2.o dma-mx1-mx2.o |
10 | obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o | ||
10 | obj-$(CONFIG_MXC_PWM) += pwm.o | 11 | obj-$(CONFIG_MXC_PWM) += pwm.o |
diff --git a/arch/arm/plat-mxc/dma-mx1-mx2.c b/arch/arm/plat-mxc/dma-mx1-mx2.c index e364a5ed10f1..77646436c00e 100644 --- a/arch/arm/plat-mxc/dma-mx1-mx2.c +++ b/arch/arm/plat-mxc/dma-mx1-mx2.c | |||
@@ -693,12 +693,15 @@ int imx_dma_request(int channel, const char *name) | |||
693 | local_irq_restore(flags); | 693 | local_irq_restore(flags); |
694 | return -EBUSY; | 694 | return -EBUSY; |
695 | } | 695 | } |
696 | memset(imxdma, 0, sizeof(imxdma)); | ||
697 | imxdma->name = name; | ||
698 | local_irq_restore(flags); /* request_irq() can block */ | ||
696 | 699 | ||
697 | #ifdef CONFIG_ARCH_MX2 | 700 | #ifdef CONFIG_ARCH_MX2 |
698 | ret = request_irq(MXC_INT_DMACH0 + channel, dma_irq_handler, 0, "DMA", | 701 | ret = request_irq(MXC_INT_DMACH0 + channel, dma_irq_handler, 0, "DMA", |
699 | NULL); | 702 | NULL); |
700 | if (ret) { | 703 | if (ret) { |
701 | local_irq_restore(flags); | 704 | imxdma->name = NULL; |
702 | printk(KERN_CRIT "Can't register IRQ %d for DMA channel %d\n", | 705 | printk(KERN_CRIT "Can't register IRQ %d for DMA channel %d\n", |
703 | MXC_INT_DMACH0 + channel, channel); | 706 | MXC_INT_DMACH0 + channel, channel); |
704 | return ret; | 707 | return ret; |
@@ -708,13 +711,6 @@ int imx_dma_request(int channel, const char *name) | |||
708 | imxdma->watchdog.data = channel; | 711 | imxdma->watchdog.data = channel; |
709 | #endif | 712 | #endif |
710 | 713 | ||
711 | imxdma->name = name; | ||
712 | imxdma->irq_handler = NULL; | ||
713 | imxdma->err_handler = NULL; | ||
714 | imxdma->data = NULL; | ||
715 | imxdma->sg = NULL; | ||
716 | |||
717 | local_irq_restore(flags); | ||
718 | return ret; | 714 | return ret; |
719 | } | 715 | } |
720 | EXPORT_SYMBOL(imx_dma_request); | 716 | EXPORT_SYMBOL(imx_dma_request); |
@@ -737,10 +733,7 @@ void imx_dma_free(int channel) | |||
737 | 733 | ||
738 | local_irq_save(flags); | 734 | local_irq_save(flags); |
739 | /* Disable interrupts */ | 735 | /* Disable interrupts */ |
740 | __raw_writel(__raw_readl(DMA_BASE + DMA_DIMR) | (1 << channel), | 736 | imx_dma_disable(channel); |
741 | DMA_BASE + DMA_DIMR); | ||
742 | __raw_writel(__raw_readl(DMA_BASE + DMA_CCR(channel)) & ~CCR_CEN, | ||
743 | DMA_BASE + DMA_CCR(channel)); | ||
744 | imxdma->name = NULL; | 737 | imxdma->name = NULL; |
745 | 738 | ||
746 | #ifdef CONFIG_ARCH_MX2 | 739 | #ifdef CONFIG_ARCH_MX2 |
diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c index c6483bad8a26..7506d963be4b 100644 --- a/arch/arm/plat-mxc/gpio.c +++ b/arch/arm/plat-mxc/gpio.c | |||
@@ -64,6 +64,8 @@ static void gpio_unmask_irq(u32 irq) | |||
64 | _set_gpio_irqenable(&mxc_gpio_ports[gpio / 32], gpio & 0x1f, 1); | 64 | _set_gpio_irqenable(&mxc_gpio_ports[gpio / 32], gpio & 0x1f, 1); |
65 | } | 65 | } |
66 | 66 | ||
67 | static int mxc_gpio_get(struct gpio_chip *chip, unsigned offset); | ||
68 | |||
67 | static int gpio_set_irq_type(u32 irq, u32 type) | 69 | static int gpio_set_irq_type(u32 irq, u32 type) |
68 | { | 70 | { |
69 | u32 gpio = irq_to_gpio(irq); | 71 | u32 gpio = irq_to_gpio(irq); |
@@ -72,6 +74,7 @@ static int gpio_set_irq_type(u32 irq, u32 type) | |||
72 | int edge; | 74 | int edge; |
73 | void __iomem *reg = port->base; | 75 | void __iomem *reg = port->base; |
74 | 76 | ||
77 | port->both_edges &= ~(1 << (gpio & 31)); | ||
75 | switch (type) { | 78 | switch (type) { |
76 | case IRQ_TYPE_EDGE_RISING: | 79 | case IRQ_TYPE_EDGE_RISING: |
77 | edge = GPIO_INT_RISE_EDGE; | 80 | edge = GPIO_INT_RISE_EDGE; |
@@ -79,13 +82,24 @@ static int gpio_set_irq_type(u32 irq, u32 type) | |||
79 | case IRQ_TYPE_EDGE_FALLING: | 82 | case IRQ_TYPE_EDGE_FALLING: |
80 | edge = GPIO_INT_FALL_EDGE; | 83 | edge = GPIO_INT_FALL_EDGE; |
81 | break; | 84 | break; |
85 | case IRQ_TYPE_EDGE_BOTH: | ||
86 | val = mxc_gpio_get(&port->chip, gpio & 31); | ||
87 | if (val) { | ||
88 | edge = GPIO_INT_LOW_LEV; | ||
89 | pr_debug("mxc: set GPIO %d to low trigger\n", gpio); | ||
90 | } else { | ||
91 | edge = GPIO_INT_HIGH_LEV; | ||
92 | pr_debug("mxc: set GPIO %d to high trigger\n", gpio); | ||
93 | } | ||
94 | port->both_edges |= 1 << (gpio & 31); | ||
95 | break; | ||
82 | case IRQ_TYPE_LEVEL_LOW: | 96 | case IRQ_TYPE_LEVEL_LOW: |
83 | edge = GPIO_INT_LOW_LEV; | 97 | edge = GPIO_INT_LOW_LEV; |
84 | break; | 98 | break; |
85 | case IRQ_TYPE_LEVEL_HIGH: | 99 | case IRQ_TYPE_LEVEL_HIGH: |
86 | edge = GPIO_INT_HIGH_LEV; | 100 | edge = GPIO_INT_HIGH_LEV; |
87 | break; | 101 | break; |
88 | default: /* this includes IRQ_TYPE_EDGE_BOTH */ | 102 | default: |
89 | return -EINVAL; | 103 | return -EINVAL; |
90 | } | 104 | } |
91 | 105 | ||
@@ -98,6 +112,34 @@ static int gpio_set_irq_type(u32 irq, u32 type) | |||
98 | return 0; | 112 | return 0; |
99 | } | 113 | } |
100 | 114 | ||
115 | static void mxc_flip_edge(struct mxc_gpio_port *port, u32 gpio) | ||
116 | { | ||
117 | void __iomem *reg = port->base; | ||
118 | u32 bit, val; | ||
119 | int edge; | ||
120 | |||
121 | reg += GPIO_ICR1 + ((gpio & 0x10) >> 2); /* lower or upper register */ | ||
122 | bit = gpio & 0xf; | ||
123 | val = __raw_readl(reg); | ||
124 | edge = (val >> (bit << 1)) & 3; | ||
125 | val &= ~(0x3 << (bit << 1)); | ||
126 | switch (edge) { | ||
127 | case GPIO_INT_HIGH_LEV: | ||
128 | edge = GPIO_INT_LOW_LEV; | ||
129 | pr_debug("mxc: switch GPIO %d to low trigger\n", gpio); | ||
130 | break; | ||
131 | case GPIO_INT_LOW_LEV: | ||
132 | edge = GPIO_INT_HIGH_LEV; | ||
133 | pr_debug("mxc: switch GPIO %d to high trigger\n", gpio); | ||
134 | break; | ||
135 | default: | ||
136 | pr_err("mxc: invalid configuration for GPIO %d: %x\n", | ||
137 | gpio, edge); | ||
138 | return; | ||
139 | } | ||
140 | __raw_writel(val | (edge << (bit << 1)), reg); | ||
141 | } | ||
142 | |||
101 | /* handle n interrupts in one status register */ | 143 | /* handle n interrupts in one status register */ |
102 | static void mxc_gpio_irq_handler(struct mxc_gpio_port *port, u32 irq_stat) | 144 | static void mxc_gpio_irq_handler(struct mxc_gpio_port *port, u32 irq_stat) |
103 | { | 145 | { |
@@ -105,11 +147,16 @@ static void mxc_gpio_irq_handler(struct mxc_gpio_port *port, u32 irq_stat) | |||
105 | 147 | ||
106 | gpio_irq_no = port->virtual_irq_start; | 148 | gpio_irq_no = port->virtual_irq_start; |
107 | for (; irq_stat != 0; irq_stat >>= 1, gpio_irq_no++) { | 149 | for (; irq_stat != 0; irq_stat >>= 1, gpio_irq_no++) { |
150 | u32 gpio = irq_to_gpio(gpio_irq_no); | ||
108 | 151 | ||
109 | if ((irq_stat & 1) == 0) | 152 | if ((irq_stat & 1) == 0) |
110 | continue; | 153 | continue; |
111 | 154 | ||
112 | BUG_ON(!(irq_desc[gpio_irq_no].handle_irq)); | 155 | BUG_ON(!(irq_desc[gpio_irq_no].handle_irq)); |
156 | |||
157 | if (port->both_edges & (1 << (gpio & 31))) | ||
158 | mxc_flip_edge(port, gpio); | ||
159 | |||
113 | irq_desc[gpio_irq_no].handle_irq(gpio_irq_no, | 160 | irq_desc[gpio_irq_no].handle_irq(gpio_irq_no, |
114 | &irq_desc[gpio_irq_no]); | 161 | &irq_desc[gpio_irq_no]); |
115 | } | 162 | } |
@@ -124,7 +171,7 @@ static void mx3_gpio_irq_handler(u32 irq, struct irq_desc *desc) | |||
124 | 171 | ||
125 | irq_stat = __raw_readl(port->base + GPIO_ISR) & | 172 | irq_stat = __raw_readl(port->base + GPIO_ISR) & |
126 | __raw_readl(port->base + GPIO_IMR); | 173 | __raw_readl(port->base + GPIO_IMR); |
127 | BUG_ON(!irq_stat); | 174 | |
128 | mxc_gpio_irq_handler(port, irq_stat); | 175 | mxc_gpio_irq_handler(port, irq_stat); |
129 | } | 176 | } |
130 | #endif | 177 | #endif |
diff --git a/arch/arm/plat-mxc/include/mach/board-mx21ads.h b/arch/arm/plat-mxc/include/mach/board-mx21ads.h new file mode 100644 index 000000000000..06701df74c42 --- /dev/null +++ b/arch/arm/plat-mxc/include/mach/board-mx21ads.h | |||
@@ -0,0 +1,58 @@ | |||
1 | /* | ||
2 | * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved. | ||
3 | */ | ||
4 | |||
5 | /* | ||
6 | * The code contained herein is licensed under the GNU General Public | ||
7 | * License. You may obtain a copy of the GNU General Public License | ||
8 | * Version 2 or later at the following locations: | ||
9 | * | ||
10 | * http://www.opensource.org/licenses/gpl-license.html | ||
11 | * http://www.gnu.org/copyleft/gpl.html | ||
12 | */ | ||
13 | |||
14 | #ifndef __ASM_ARCH_MXC_BOARD_MX21ADS_H__ | ||
15 | #define __ASM_ARCH_MXC_BOARD_MX21ADS_H__ | ||
16 | |||
17 | /* | ||
18 | * MXC UART EVB board level configurations | ||
19 | */ | ||
20 | #define MXC_LL_UART_PADDR UART1_BASE_ADDR | ||
21 | #define MXC_LL_UART_VADDR AIPI_IO_ADDRESS(UART1_BASE_ADDR) | ||
22 | |||
23 | /* | ||
24 | * Memory-mapped I/O on MX21ADS base board | ||
25 | */ | ||
26 | #define MX21ADS_MMIO_BASE_ADDR 0xF5000000 | ||
27 | #define MX21ADS_MMIO_SIZE SZ_16M | ||
28 | |||
29 | #define MX21ADS_REG_ADDR(offset) (void __force __iomem *) \ | ||
30 | (MX21ADS_MMIO_BASE_ADDR + (offset)) | ||
31 | |||
32 | #define MX21ADS_CS8900A_IRQ IRQ_GPIOE(11) | ||
33 | #define MX21ADS_CS8900A_IOBASE_REG MX21ADS_REG_ADDR(0x000000) | ||
34 | #define MX21ADS_ST16C255_IOBASE_REG MX21ADS_REG_ADDR(0x200000) | ||
35 | #define MX21ADS_VERSION_REG MX21ADS_REG_ADDR(0x400000) | ||
36 | #define MX21ADS_IO_REG MX21ADS_REG_ADDR(0x800000) | ||
37 | |||
38 | /* MX21ADS_IO_REG bit definitions */ | ||
39 | #define MX21ADS_IO_SD_WP 0x0001 /* read */ | ||
40 | #define MX21ADS_IO_TP6 0x0001 /* write */ | ||
41 | #define MX21ADS_IO_SW_SEL 0x0002 /* read */ | ||
42 | #define MX21ADS_IO_TP7 0x0002 /* write */ | ||
43 | #define MX21ADS_IO_RESET_E_UART 0x0004 | ||
44 | #define MX21ADS_IO_RESET_BASE 0x0008 | ||
45 | #define MX21ADS_IO_CSI_CTL2 0x0010 | ||
46 | #define MX21ADS_IO_CSI_CTL1 0x0020 | ||
47 | #define MX21ADS_IO_CSI_CTL0 0x0040 | ||
48 | #define MX21ADS_IO_UART1_EN 0x0080 | ||
49 | #define MX21ADS_IO_UART4_EN 0x0100 | ||
50 | #define MX21ADS_IO_LCDON 0x0200 | ||
51 | #define MX21ADS_IO_IRDA_EN 0x0400 | ||
52 | #define MX21ADS_IO_IRDA_FIR_SEL 0x0800 | ||
53 | #define MX21ADS_IO_IRDA_MD0_B 0x1000 | ||
54 | #define MX21ADS_IO_IRDA_MD1 0x2000 | ||
55 | #define MX21ADS_IO_LED4_ON 0x4000 | ||
56 | #define MX21ADS_IO_LED3_ON 0x8000 | ||
57 | |||
58 | #endif /* __ASM_ARCH_MXC_BOARD_MX21ADS_H__ */ | ||
diff --git a/arch/arm/plat-mxc/include/mach/board-mx27ads.h b/arch/arm/plat-mxc/include/mach/board-mx27ads.h index 1cac9d1135cd..d42f4e6116f8 100644 --- a/arch/arm/plat-mxc/include/mach/board-mx27ads.h +++ b/arch/arm/plat-mxc/include/mach/board-mx27ads.h | |||
@@ -47,7 +47,7 @@ | |||
47 | /* | 47 | /* |
48 | * Base address of PBC controller, CS4 | 48 | * Base address of PBC controller, CS4 |
49 | */ | 49 | */ |
50 | #define PBC_BASE_ADDRESS 0xEB000000 | 50 | #define PBC_BASE_ADDRESS 0xf4300000 |
51 | #define PBC_REG_ADDR(offset) (void __force __iomem *) \ | 51 | #define PBC_REG_ADDR(offset) (void __force __iomem *) \ |
52 | (PBC_BASE_ADDRESS + (offset)) | 52 | (PBC_BASE_ADDRESS + (offset)) |
53 | 53 | ||
diff --git a/arch/arm/plat-mxc/include/mach/board-mx27pdk.h b/arch/arm/plat-mxc/include/mach/board-mx27pdk.h new file mode 100644 index 000000000000..552b55d714d8 --- /dev/null +++ b/arch/arm/plat-mxc/include/mach/board-mx27pdk.h | |||
@@ -0,0 +1,19 @@ | |||
1 | /* | ||
2 | * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. | ||
3 | */ | ||
4 | |||
5 | /* | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #ifndef __ASM_ARCH_MXC_BOARD_MX27PDK_H__ | ||
12 | #define __ASM_ARCH_MXC_BOARD_MX27PDK_H__ | ||
13 | |||
14 | /* mandatory for CONFIG_DEBUG_LL */ | ||
15 | |||
16 | #define MXC_LL_UART_PADDR UART1_BASE_ADDR | ||
17 | #define MXC_LL_UART_VADDR AIPS1_IO_ADDRESS(UART1_BASE_ADDR) | ||
18 | |||
19 | #endif /* __ASM_ARCH_MXC_BOARD_MX27PDK_H__ */ | ||
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31ads.h b/arch/arm/plat-mxc/include/mach/board-mx31ads.h index 318c72ada13d..06e6895f7f65 100644 --- a/arch/arm/plat-mxc/include/mach/board-mx31ads.h +++ b/arch/arm/plat-mxc/include/mach/board-mx31ads.h | |||
@@ -114,7 +114,7 @@ | |||
114 | 114 | ||
115 | #define MXC_MAX_EXP_IO_LINES 16 | 115 | #define MXC_MAX_EXP_IO_LINES 16 |
116 | 116 | ||
117 | /* mandatory for CONFIG_LL_DEBUG */ | 117 | /* mandatory for CONFIG_DEBUG_LL */ |
118 | 118 | ||
119 | #define MXC_LL_UART_PADDR UART1_BASE_ADDR | 119 | #define MXC_LL_UART_PADDR UART1_BASE_ADDR |
120 | #define MXC_LL_UART_VADDR AIPS1_IO_ADDRESS(UART1_BASE_ADDR) | 120 | #define MXC_LL_UART_VADDR AIPS1_IO_ADDRESS(UART1_BASE_ADDR) |
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31lite.h b/arch/arm/plat-mxc/include/mach/board-mx31lite.h index e4e5cf5ad7db..52fbdf2d6f26 100644 --- a/arch/arm/plat-mxc/include/mach/board-mx31lite.h +++ b/arch/arm/plat-mxc/include/mach/board-mx31lite.h | |||
@@ -11,28 +11,8 @@ | |||
11 | #ifndef __ASM_ARCH_MXC_BOARD_MX31LITE_H__ | 11 | #ifndef __ASM_ARCH_MXC_BOARD_MX31LITE_H__ |
12 | #define __ASM_ARCH_MXC_BOARD_MX31LITE_H__ | 12 | #define __ASM_ARCH_MXC_BOARD_MX31LITE_H__ |
13 | 13 | ||
14 | #define MXC_MAX_EXP_IO_LINES 16 | ||
15 | |||
16 | |||
17 | /* | ||
18 | * Memory Size parameters | ||
19 | */ | ||
20 | |||
21 | /* | ||
22 | * Size of SDRAM memory | ||
23 | */ | ||
24 | #define SDRAM_MEM_SIZE SZ_128M | ||
25 | /* | ||
26 | * Size of MBX buffer memory | ||
27 | */ | ||
28 | #define MXC_MBX_MEM_SIZE SZ_16M | ||
29 | /* | ||
30 | * Size of memory available to kernel | ||
31 | */ | ||
32 | #define MEM_SIZE (SDRAM_MEM_SIZE - MXC_MBX_MEM_SIZE) | ||
33 | |||
34 | #define MXC_LL_UART_PADDR UART1_BASE_ADDR | 14 | #define MXC_LL_UART_PADDR UART1_BASE_ADDR |
35 | #define MXC_LL_UART_VADDR AIPS1_IO_ADDRESS(UART1_BASE_ADDR) | 15 | #define MXC_LL_UART_VADDR AIPS1_IO_ADDRESS(UART1_BASE_ADDR) |
36 | 16 | ||
37 | #endif /* __ASM_ARCH_MXC_BOARD_MX31ADS_H__ */ | 17 | #endif /* __ASM_ARCH_MXC_BOARD_MX31LITE_H__ */ |
38 | 18 | ||
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31moboard.h b/arch/arm/plat-mxc/include/mach/board-mx31moboard.h index f8aef1babb75..303fd2434a21 100644 --- a/arch/arm/plat-mxc/include/mach/board-mx31moboard.h +++ b/arch/arm/plat-mxc/include/mach/board-mx31moboard.h | |||
@@ -19,7 +19,7 @@ | |||
19 | #ifndef __ASM_ARCH_MXC_BOARD_MX31MOBOARD_H__ | 19 | #ifndef __ASM_ARCH_MXC_BOARD_MX31MOBOARD_H__ |
20 | #define __ASM_ARCH_MXC_BOARD_MX31MOBOARD_H__ | 20 | #define __ASM_ARCH_MXC_BOARD_MX31MOBOARD_H__ |
21 | 21 | ||
22 | /* mandatory for CONFIG_LL_DEBUG */ | 22 | /* mandatory for CONFIG_DEBUG_LL */ |
23 | 23 | ||
24 | #define MXC_LL_UART_PADDR UART1_BASE_ADDR | 24 | #define MXC_LL_UART_PADDR UART1_BASE_ADDR |
25 | #define MXC_LL_UART_VADDR (AIPI_BASE_ADDR_VIRT + 0x0A000) | 25 | #define MXC_LL_UART_VADDR (AIPI_BASE_ADDR_VIRT + 0x0A000) |
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31pdk.h b/arch/arm/plat-mxc/include/mach/board-mx31pdk.h index 2b6b316d0f51..519bab3eb28b 100644 --- a/arch/arm/plat-mxc/include/mach/board-mx31pdk.h +++ b/arch/arm/plat-mxc/include/mach/board-mx31pdk.h | |||
@@ -11,9 +11,54 @@ | |||
11 | #ifndef __ASM_ARCH_MXC_BOARD_MX31PDK_H__ | 11 | #ifndef __ASM_ARCH_MXC_BOARD_MX31PDK_H__ |
12 | #define __ASM_ARCH_MXC_BOARD_MX31PDK_H__ | 12 | #define __ASM_ARCH_MXC_BOARD_MX31PDK_H__ |
13 | 13 | ||
14 | /* mandatory for CONFIG_LL_DEBUG */ | 14 | /* mandatory for CONFIG_DEBUG_LL */ |
15 | 15 | ||
16 | #define MXC_LL_UART_PADDR UART1_BASE_ADDR | 16 | #define MXC_LL_UART_PADDR UART1_BASE_ADDR |
17 | #define MXC_LL_UART_VADDR AIPS1_IO_ADDRESS(UART1_BASE_ADDR) | 17 | #define MXC_LL_UART_VADDR AIPS1_IO_ADDRESS(UART1_BASE_ADDR) |
18 | 18 | ||
19 | /* Definitions for components on the Debug board */ | ||
20 | |||
21 | /* Base address of CPLD controller on the Debug board */ | ||
22 | #define DEBUG_BASE_ADDRESS CS5_IO_ADDRESS(CS5_BASE_ADDR) | ||
23 | |||
24 | /* LAN9217 ethernet base address */ | ||
25 | #define LAN9217_BASE_ADDR CS5_BASE_ADDR | ||
26 | |||
27 | /* CPLD config and interrupt base address */ | ||
28 | #define CPLD_ADDR (DEBUG_BASE_ADDRESS + 0x20000) | ||
29 | |||
30 | /* LED switchs */ | ||
31 | #define CPLD_LED_REG (CPLD_ADDR + 0x00) | ||
32 | /* buttons */ | ||
33 | #define CPLD_SWITCH_BUTTONS_REG (EXPIO_ADDR + 0x08) | ||
34 | /* status, interrupt */ | ||
35 | #define CPLD_INT_STATUS_REG (CPLD_ADDR + 0x10) | ||
36 | #define CPLD_INT_MASK_REG (CPLD_ADDR + 0x38) | ||
37 | #define CPLD_INT_RESET_REG (CPLD_ADDR + 0x20) | ||
38 | /* magic word for debug CPLD */ | ||
39 | #define CPLD_MAGIC_NUMBER1_REG (CPLD_ADDR + 0x40) | ||
40 | #define CPLD_MAGIC_NUMBER2_REG (CPLD_ADDR + 0x48) | ||
41 | /* CPLD code version */ | ||
42 | #define CPLD_CODE_VER_REG (CPLD_ADDR + 0x50) | ||
43 | /* magic word for debug CPLD */ | ||
44 | #define CPLD_MAGIC_NUMBER3_REG (CPLD_ADDR + 0x58) | ||
45 | /* module reset register */ | ||
46 | #define CPLD_MODULE_RESET_REG (CPLD_ADDR + 0x60) | ||
47 | /* CPU ID and Personality ID */ | ||
48 | #define CPLD_MCU_BOARD_ID_REG (CPLD_ADDR + 0x68) | ||
49 | |||
50 | /* CPLD IRQ line for external uart, external ethernet etc */ | ||
51 | #define EXPIO_PARENT_INT IOMUX_TO_IRQ(MX31_PIN_GPIO1_1) | ||
52 | |||
53 | #define MXC_EXP_IO_BASE (MXC_BOARD_IRQ_START) | ||
54 | #define MXC_IRQ_TO_EXPIO(irq) ((irq) - MXC_EXP_IO_BASE) | ||
55 | |||
56 | #define EXPIO_INT_ENET (MXC_EXP_IO_BASE + 0) | ||
57 | #define EXPIO_INT_XUART_A (MXC_EXP_IO_BASE + 1) | ||
58 | #define EXPIO_INT_XUART_B (MXC_EXP_IO_BASE + 2) | ||
59 | #define EXPIO_INT_BUTTON_A (MXC_EXP_IO_BASE + 3) | ||
60 | #define EXPIO_INT_BUTTON_B (MXC_EXP_IO_BASE + 4) | ||
61 | |||
62 | #define MXC_MAX_EXP_IO_LINES 16 | ||
63 | |||
19 | #endif /* __ASM_ARCH_MXC_BOARD_MX31PDK_H__ */ | 64 | #endif /* __ASM_ARCH_MXC_BOARD_MX31PDK_H__ */ |
diff --git a/arch/arm/plat-mxc/include/mach/board-pcm037.h b/arch/arm/plat-mxc/include/mach/board-pcm037.h index 82232ba3c8fc..f0a1fa1938a2 100644 --- a/arch/arm/plat-mxc/include/mach/board-pcm037.h +++ b/arch/arm/plat-mxc/include/mach/board-pcm037.h | |||
@@ -19,7 +19,7 @@ | |||
19 | #ifndef __ASM_ARCH_MXC_BOARD_PCM037_H__ | 19 | #ifndef __ASM_ARCH_MXC_BOARD_PCM037_H__ |
20 | #define __ASM_ARCH_MXC_BOARD_PCM037_H__ | 20 | #define __ASM_ARCH_MXC_BOARD_PCM037_H__ |
21 | 21 | ||
22 | /* mandatory for CONFIG_LL_DEBUG */ | 22 | /* mandatory for CONFIG_DEBUG_LL */ |
23 | 23 | ||
24 | #define MXC_LL_UART_PADDR UART1_BASE_ADDR | 24 | #define MXC_LL_UART_PADDR UART1_BASE_ADDR |
25 | #define MXC_LL_UART_VADDR AIPS1_IO_ADDRESS(UART1_BASE_ADDR) | 25 | #define MXC_LL_UART_VADDR AIPS1_IO_ADDRESS(UART1_BASE_ADDR) |
diff --git a/arch/arm/plat-mxc/include/mach/board-pcm038.h b/arch/arm/plat-mxc/include/mach/board-pcm038.h index 750c62afd90f..4fcd7499e092 100644 --- a/arch/arm/plat-mxc/include/mach/board-pcm038.h +++ b/arch/arm/plat-mxc/include/mach/board-pcm038.h | |||
@@ -19,7 +19,7 @@ | |||
19 | #ifndef __ASM_ARCH_MXC_BOARD_PCM038_H__ | 19 | #ifndef __ASM_ARCH_MXC_BOARD_PCM038_H__ |
20 | #define __ASM_ARCH_MXC_BOARD_PCM038_H__ | 20 | #define __ASM_ARCH_MXC_BOARD_PCM038_H__ |
21 | 21 | ||
22 | /* mandatory for CONFIG_LL_DEBUG */ | 22 | /* mandatory for CONFIG_DEBUG_LL */ |
23 | 23 | ||
24 | #define MXC_LL_UART_PADDR UART1_BASE_ADDR | 24 | #define MXC_LL_UART_PADDR UART1_BASE_ADDR |
25 | #define MXC_LL_UART_VADDR (AIPI_BASE_ADDR_VIRT + 0x0A000) | 25 | #define MXC_LL_UART_VADDR (AIPI_BASE_ADDR_VIRT + 0x0A000) |
diff --git a/arch/arm/mach-imx/include/mach/timex.h b/arch/arm/plat-mxc/include/mach/board-pcm043.h index e22ba789546c..15fbdf16abcd 100644 --- a/arch/arm/mach-imx/include/mach/timex.h +++ b/arch/arm/plat-mxc/include/mach/board-pcm043.h | |||
@@ -1,7 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * linux/include/asm-arm/imx/timex.h | 2 | * Copyright (C) 2008 Sascha Hauer, Pengutronix |
3 | * | ||
4 | * Copyright (C) 1999 ARM Limited | ||
5 | * | 3 | * |
6 | * This program is free software; you can redistribute it and/or modify | 4 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 5 | * it under the terms of the GNU General Public License as published by |
@@ -18,9 +16,12 @@ | |||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | */ | 17 | */ |
20 | 18 | ||
21 | #ifndef __ASM_ARCH_TIMEX_H | 19 | #ifndef __ASM_ARCH_MXC_BOARD_PCM043_H__ |
22 | #define __ASM_ARCH_TIMEX_H | 20 | #define __ASM_ARCH_MXC_BOARD_PCM043_H__ |
21 | |||
22 | /* mandatory for CONFIG_LL_DEBUG */ | ||
23 | 23 | ||
24 | #define CLOCK_TICK_RATE (16000000) | 24 | #define MXC_LL_UART_PADDR UART1_BASE_ADDR |
25 | #define MXC_LL_UART_VADDR AIPS1_IO_ADDRESS(UART1_BASE_ADDR) | ||
25 | 26 | ||
26 | #endif | 27 | #endif /* __ASM_ARCH_MXC_BOARD_PCM043_H__ */ |
diff --git a/arch/arm/plat-mxc/include/mach/board-qong.h b/arch/arm/plat-mxc/include/mach/board-qong.h index 4ff762dd45cf..04033ec637d2 100644 --- a/arch/arm/plat-mxc/include/mach/board-qong.h +++ b/arch/arm/plat-mxc/include/mach/board-qong.h | |||
@@ -11,7 +11,7 @@ | |||
11 | #ifndef __ASM_ARCH_MXC_BOARD_QONG_H__ | 11 | #ifndef __ASM_ARCH_MXC_BOARD_QONG_H__ |
12 | #define __ASM_ARCH_MXC_BOARD_QONG_H__ | 12 | #define __ASM_ARCH_MXC_BOARD_QONG_H__ |
13 | 13 | ||
14 | /* mandatory for CONFIG_LL_DEBUG */ | 14 | /* mandatory for CONFIG_DEBUG_LL */ |
15 | 15 | ||
16 | #define MXC_LL_UART_PADDR UART1_BASE_ADDR | 16 | #define MXC_LL_UART_PADDR UART1_BASE_ADDR |
17 | #define MXC_LL_UART_VADDR AIPS1_IO_ADDRESS(UART1_BASE_ADDR) | 17 | #define MXC_LL_UART_VADDR AIPS1_IO_ADDRESS(UART1_BASE_ADDR) |
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h index b2f9b72644db..02c3cd004db3 100644 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/plat-mxc/include/mach/common.h | |||
@@ -14,7 +14,11 @@ | |||
14 | struct platform_device; | 14 | struct platform_device; |
15 | struct clk; | 15 | struct clk; |
16 | 16 | ||
17 | extern void mxc_map_io(void); | 17 | extern void mx1_map_io(void); |
18 | extern void mx21_map_io(void); | ||
19 | extern void mx27_map_io(void); | ||
20 | extern void mx31_map_io(void); | ||
21 | extern void mx35_map_io(void); | ||
18 | extern void mxc_init_irq(void); | 22 | extern void mxc_init_irq(void); |
19 | extern void mxc_timer_init(struct clk *timer_clk); | 23 | extern void mxc_timer_init(struct clk *timer_clk); |
20 | extern int mx1_clocks_init(unsigned long fref); | 24 | extern int mx1_clocks_init(unsigned long fref); |
diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S index 4f773148bc20..e6b841b15e36 100644 --- a/arch/arm/plat-mxc/include/mach/debug-macro.S +++ b/arch/arm/plat-mxc/include/mach/debug-macro.S | |||
@@ -25,6 +25,9 @@ | |||
25 | #ifdef CONFIG_MACH_MX27ADS | 25 | #ifdef CONFIG_MACH_MX27ADS |
26 | #include <mach/board-mx27ads.h> | 26 | #include <mach/board-mx27ads.h> |
27 | #endif | 27 | #endif |
28 | #ifdef CONFIG_MACH_MX21ADS | ||
29 | #include <mach/board-mx21ads.h> | ||
30 | #endif | ||
28 | #ifdef CONFIG_MACH_PCM038 | 31 | #ifdef CONFIG_MACH_PCM038 |
29 | #include <mach/board-pcm038.h> | 32 | #include <mach/board-pcm038.h> |
30 | #endif | 33 | #endif |
@@ -34,6 +37,12 @@ | |||
34 | #ifdef CONFIG_MACH_QONG | 37 | #ifdef CONFIG_MACH_QONG |
35 | #include <mach/board-qong.h> | 38 | #include <mach/board-qong.h> |
36 | #endif | 39 | #endif |
40 | #ifdef CONFIG_MACH_PCM043 | ||
41 | #include <mach/board-pcm043.h> | ||
42 | #endif | ||
43 | #ifdef CONFIG_MACH_MX27_3DS | ||
44 | #include <mach/board-mx27pdk.h> | ||
45 | #endif | ||
37 | .macro addruart,rx | 46 | .macro addruart,rx |
38 | mrc p15, 0, \rx, c1, c0 | 47 | mrc p15, 0, \rx, c1, c0 |
39 | tst \rx, #1 @ MMU enabled? | 48 | tst \rx, #1 @ MMU enabled? |
diff --git a/arch/arm/plat-mxc/include/mach/gpio.h b/arch/arm/plat-mxc/include/mach/gpio.h index ea509f1090fb..894d2f87c856 100644 --- a/arch/arm/plat-mxc/include/mach/gpio.h +++ b/arch/arm/plat-mxc/include/mach/gpio.h | |||
@@ -35,6 +35,7 @@ struct mxc_gpio_port { | |||
35 | int irq; | 35 | int irq; |
36 | int virtual_irq_start; | 36 | int virtual_irq_start; |
37 | struct gpio_chip chip; | 37 | struct gpio_chip chip; |
38 | u32 both_edges; | ||
38 | }; | 39 | }; |
39 | 40 | ||
40 | int mxc_gpio_init(struct mxc_gpio_port*, int); | 41 | int mxc_gpio_init(struct mxc_gpio_port*, int); |
diff --git a/arch/arm/plat-mxc/include/mach/imx-uart.h b/arch/arm/plat-mxc/include/mach/imx-uart.h index 599217b2e13f..90af4d9bc19e 100644 --- a/arch/arm/plat-mxc/include/mach/imx-uart.h +++ b/arch/arm/plat-mxc/include/mach/imx-uart.h | |||
@@ -23,7 +23,7 @@ | |||
23 | 23 | ||
24 | struct imxuart_platform_data { | 24 | struct imxuart_platform_data { |
25 | int (*init)(struct platform_device *pdev); | 25 | int (*init)(struct platform_device *pdev); |
26 | int (*exit)(struct platform_device *pdev); | 26 | void (*exit)(struct platform_device *pdev); |
27 | unsigned int flags; | 27 | unsigned int flags; |
28 | }; | 28 | }; |
29 | 29 | ||
diff --git a/arch/arm/plat-mxc/include/mach/imxfb.h b/arch/arm/plat-mxc/include/mach/imxfb.h index 762a7b0430e2..9f0101157ec1 100644 --- a/arch/arm/plat-mxc/include/mach/imxfb.h +++ b/arch/arm/plat-mxc/include/mach/imxfb.h | |||
@@ -76,8 +76,8 @@ struct imx_fb_platform_data { | |||
76 | u_char * fixed_screen_cpu; | 76 | u_char * fixed_screen_cpu; |
77 | dma_addr_t fixed_screen_dma; | 77 | dma_addr_t fixed_screen_dma; |
78 | 78 | ||
79 | int (*init)(struct platform_device*); | 79 | int (*init)(struct platform_device *); |
80 | int (*exit)(struct platform_device*); | 80 | void (*exit)(struct platform_device *); |
81 | 81 | ||
82 | void (*lcd_power)(int); | 82 | void (*lcd_power)(int); |
83 | void (*backlight_power)(int); | 83 | void (*backlight_power)(int); |
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx3.h b/arch/arm/plat-mxc/include/mach/iomux-mx3.h index 57e927a1fd3a..27f8d1b2bc6b 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx3.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx3.h | |||
@@ -114,7 +114,7 @@ enum iomux_gp_func { | |||
114 | * - setups the iomux according to the configuration | 114 | * - setups the iomux according to the configuration |
115 | * - if the pin is configured as a GPIO, we claim it throug kernel gpiolib | 115 | * - if the pin is configured as a GPIO, we claim it throug kernel gpiolib |
116 | */ | 116 | */ |
117 | int mxc_iomux_setup_pin(const unsigned int pin, const char *label); | 117 | int mxc_iomux_alloc_pin(const unsigned int pin, const char *label); |
118 | /* | 118 | /* |
119 | * setups mutliple pins | 119 | * setups mutliple pins |
120 | * convenient way to call the above function with tables | 120 | * convenient way to call the above function with tables |
@@ -633,6 +633,40 @@ enum iomux_pins { | |||
633 | #define MX31_PIN_USBOTG_DIR__USBOTG_DIR IOMUX_MODE(MX31_PIN_USBOTG_DIR, IOMUX_CONFIG_FUNC) | 633 | #define MX31_PIN_USBOTG_DIR__USBOTG_DIR IOMUX_MODE(MX31_PIN_USBOTG_DIR, IOMUX_CONFIG_FUNC) |
634 | #define MX31_PIN_USBOTG_NXT__USBOTG_NXT IOMUX_MODE(MX31_PIN_USBOTG_NXT, IOMUX_CONFIG_FUNC) | 634 | #define MX31_PIN_USBOTG_NXT__USBOTG_NXT IOMUX_MODE(MX31_PIN_USBOTG_NXT, IOMUX_CONFIG_FUNC) |
635 | #define MX31_PIN_USBOTG_STP__USBOTG_STP IOMUX_MODE(MX31_PIN_USBOTG_STP, IOMUX_CONFIG_FUNC) | 635 | #define MX31_PIN_USBOTG_STP__USBOTG_STP IOMUX_MODE(MX31_PIN_USBOTG_STP, IOMUX_CONFIG_FUNC) |
636 | #define MX31_PIN_USB_OC__GPIO1_30 IOMUX_MODE(MX31_PIN_USB_OC, IOMUX_CONFIG_GPIO) | ||
637 | #define MX31_PIN_I2C_DAT__I2C1_SDA IOMUX_MODE(MX31_PIN_I2C_DAT, IOMUX_CONFIG_FUNC) | ||
638 | #define MX31_PIN_I2C_CLK__I2C1_SCL IOMUX_MODE(MX31_PIN_I2C_CLK, IOMUX_CONFIG_FUNC) | ||
639 | #define MX31_PIN_DCD_DTE1__I2C2_SDA IOMUX_MODE(MX31_PIN_DCD_DTE1, IOMUX_CONFIG_ALT2) | ||
640 | #define MX31_PIN_RI_DTE1__I2C2_SCL IOMUX_MODE(MX31_PIN_RI_DTE1, IOMUX_CONFIG_ALT2) | ||
641 | #define MX31_PIN_ATA_CS0__GPIO3_26 IOMUX_MODE(MX31_PIN_ATA_CS0, IOMUX_CONFIG_GPIO) | ||
642 | #define MX31_PIN_ATA_CS1__GPIO3_27 IOMUX_MODE(MX31_PIN_ATA_CS1, IOMUX_CONFIG_GPIO) | ||
643 | #define MX31_PIN_PC_PWRON__SD2_DATA3 IOMUX_MODE(MX31_PIN_PC_PWRON, IOMUX_CONFIG_ALT1) | ||
644 | #define MX31_PIN_PC_VS1__SD2_DATA2 IOMUX_MODE(MX31_PIN_PC_VS1, IOMUX_CONFIG_ALT1) | ||
645 | #define MX31_PIN_PC_READY__SD2_DATA1 IOMUX_MODE(MX31_PIN_PC_READY, IOMUX_CONFIG_ALT1) | ||
646 | #define MX31_PIN_PC_WAIT_B__SD2_DATA0 IOMUX_MODE(MX31_PIN_PC_WAIT_B, IOMUX_CONFIG_ALT1) | ||
647 | #define MX31_PIN_PC_CD2_B__SD2_CLK IOMUX_MODE(MX31_PIN_PC_CD2_B, IOMUX_CONFIG_ALT1) | ||
648 | #define MX31_PIN_PC_CD1_B__SD2_CMD IOMUX_MODE(MX31_PIN_PC_CD1_B, IOMUX_CONFIG_ALT1) | ||
649 | #define MX31_PIN_ATA_DIOR__GPIO3_28 IOMUX_MODE(MX31_PIN_ATA_DIOR, IOMUX_CONFIG_GPIO) | ||
650 | #define MX31_PIN_ATA_DIOW__GPIO3_29 IOMUX_MODE(MX31_PIN_ATA_DIOW, IOMUX_CONFIG_GPIO) | ||
651 | #define MX31_PIN_CSI_D4__CSI_D4 IOMUX_MODE(MX31_PIN_CSI_D4, IOMUX_CONFIG_FUNC) | ||
652 | #define MX31_PIN_CSI_D5__CSI_D5 IOMUX_MODE(MX31_PIN_CSI_D5, IOMUX_CONFIG_FUNC) | ||
653 | #define MX31_PIN_CSI_D6__CSI_D6 IOMUX_MODE(MX31_PIN_CSI_D6, IOMUX_CONFIG_FUNC) | ||
654 | #define MX31_PIN_CSI_D7__CSI_D7 IOMUX_MODE(MX31_PIN_CSI_D7, IOMUX_CONFIG_FUNC) | ||
655 | #define MX31_PIN_CSI_D8__CSI_D8 IOMUX_MODE(MX31_PIN_CSI_D8, IOMUX_CONFIG_FUNC) | ||
656 | #define MX31_PIN_CSI_D9__CSI_D9 IOMUX_MODE(MX31_PIN_CSI_D9, IOMUX_CONFIG_FUNC) | ||
657 | #define MX31_PIN_CSI_D10__CSI_D10 IOMUX_MODE(MX31_PIN_CSI_D10, IOMUX_CONFIG_FUNC) | ||
658 | #define MX31_PIN_CSI_D11__CSI_D11 IOMUX_MODE(MX31_PIN_CSI_D11, IOMUX_CONFIG_FUNC) | ||
659 | #define MX31_PIN_CSI_D12__CSI_D12 IOMUX_MODE(MX31_PIN_CSI_D12, IOMUX_CONFIG_FUNC) | ||
660 | #define MX31_PIN_CSI_D13__CSI_D13 IOMUX_MODE(MX31_PIN_CSI_D13, IOMUX_CONFIG_FUNC) | ||
661 | #define MX31_PIN_CSI_D14__CSI_D14 IOMUX_MODE(MX31_PIN_CSI_D14, IOMUX_CONFIG_FUNC) | ||
662 | #define MX31_PIN_CSI_D15__CSI_D15 IOMUX_MODE(MX31_PIN_CSI_D15, IOMUX_CONFIG_FUNC) | ||
663 | #define MX31_PIN_CSI_HSYNC__CSI_HSYNC IOMUX_MODE(MX31_PIN_CSI_HSYNC, IOMUX_CONFIG_FUNC) | ||
664 | #define MX31_PIN_CSI_MCLK__CSI_MCLK IOMUX_MODE(MX31_PIN_CSI_MCLK, IOMUX_CONFIG_FUNC) | ||
665 | #define MX31_PIN_CSI_PIXCLK__CSI_PIXCLK IOMUX_MODE(MX31_PIN_CSI_PIXCLK, IOMUX_CONFIG_FUNC) | ||
666 | #define MX31_PIN_CSI_VSYNC__CSI_VSYNC IOMUX_MODE(MX31_PIN_CSI_VSYNC, IOMUX_CONFIG_FUNC) | ||
667 | #define MX31_PIN_GPIO3_0__GPIO3_0 IOMUX_MODE(MX31_PIN_GPIO3_0, IOMUX_CONFIG_GPIO) | ||
668 | #define MX31_PIN_GPIO3_1__GPIO3_1 IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO) | ||
669 | #define MX31_PIN_TXD2__GPIO1_28 IOMUX_MODE(MX31_PIN_TXD2, IOMUX_CONFIG_GPIO) | ||
636 | 670 | ||
637 | /*XXX: The SS0, SS1, SS2, SS3 lines of spi3 are multiplexed by cspi2_ss0, cspi2_ss1, cspi1_ss0 | 671 | /*XXX: The SS0, SS1, SS2, SS3 lines of spi3 are multiplexed by cspi2_ss0, cspi2_ss1, cspi1_ss0 |
638 | * cspi1_ss1*/ | 672 | * cspi1_ss1*/ |
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx35.h b/arch/arm/plat-mxc/include/mach/iomux-mx35.h new file mode 100644 index 000000000000..00b0ac1db225 --- /dev/null +++ b/arch/arm/plat-mxc/include/mach/iomux-mx35.h | |||
@@ -0,0 +1,1267 @@ | |||
1 | /* | ||
2 | * Copyright (C, NO_PAD_CTRL) 2009 by Jan Weitzel Phytec Messtechnik GmbH <armlinux@phytec.de> | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or | ||
5 | * modify it under the terms of the GNU General Public License | ||
6 | * as published by the Free Software Foundation; either version 2 | ||
7 | * of the License, or (at your option, NO_PAD_CTRL) any later version. | ||
8 | * This program is distributed in the hope that it will be useful, | ||
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
11 | * GNU General Public License for more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License | ||
14 | * along with this program; if not, write to the Free Software | ||
15 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | ||
16 | * MA 02110-1301, USA. | ||
17 | */ | ||
18 | |||
19 | #ifndef __MACH_IOMUX_MX35_H__ | ||
20 | #define __MACH_IOMUX_MX35_H__ | ||
21 | |||
22 | #include <mach/iomux-v3.h> | ||
23 | |||
24 | /* | ||
25 | * The naming convention for the pad modes is MX35_PAD_<padname>__<padmode> | ||
26 | * If <padname> or <padmode> refers to a GPIO, it is named | ||
27 | * GPIO_<unit>_<num> see also iomux-v3.h | ||
28 | */ | ||
29 | |||
30 | /* PAD MUX ALT INPSE PATH */ | ||
31 | #define MX35_PAD_CAPTURE__GPT_CAPIN1 IOMUX_PAD(0x328, 0x004, 0, 0x0, 0, NO_PAD_CTRL) | ||
32 | #define MX35_PAD_CAPTURE__GPT_CMPOUT2 IOMUX_PAD(0x328, 0x004, 1, 0x0, 0, NO_PAD_CTRL) | ||
33 | #define MX35_PAD_CAPTURE__CSPI2_SS1 IOMUX_PAD(0x328, 0x004, 2, 0x7f4, 0, NO_PAD_CTRL) | ||
34 | #define MX35_PAD_CAPTURE__EPIT1_EPITO IOMUX_PAD(0x328, 0x004, 3, 0x0, 0, NO_PAD_CTRL) | ||
35 | #define MX35_PAD_CAPTURE__CCM_CLK32K IOMUX_PAD(0x328, 0x004, 4, 0x7d0, 0, NO_PAD_CTRL) | ||
36 | #define MX35_PAD_CAPTURE__GPIO1_4 IOMUX_PAD(0x328, 0x004, 5, 0x850, 0, NO_PAD_CTRL) | ||
37 | |||
38 | #define MX35_PAD_COMPARE__GPT_CMPOUT1 IOMUX_PAD(0x32c, 0x008, 0, 0x0, 0, NO_PAD_CTRL) | ||
39 | #define MX35_PAD_COMPARE__GPT_CAPIN2 IOMUX_PAD(0x32c, 0x008, 1, 0x0, 0, NO_PAD_CTRL) | ||
40 | #define MX35_PAD_COMPARE__GPT_CMPOUT3 IOMUX_PAD(0x32c, 0x008, 2, 0x0, 0, NO_PAD_CTRL) | ||
41 | #define MX35_PAD_COMPARE__EPIT2_EPITO IOMUX_PAD(0x32c, 0x008, 3, 0x0, 0, NO_PAD_CTRL) | ||
42 | #define MX35_PAD_COMPARE__GPIO1_5 IOMUX_PAD(0x32c, 0x008, 5, 0x854, 0, NO_PAD_CTRL) | ||
43 | #define MX35_PAD_COMPARE__SDMA_EXTDMA_2 IOMUX_PAD(0x32c, 0x008, 7, 0x0, 0, NO_PAD_CTRL) | ||
44 | |||
45 | #define MX35_PAD_WDOG_RST__WDOG_WDOG_B IOMUX_PAD(0x330, 0x00c, 0, 0x0, 0, NO_PAD_CTRL) | ||
46 | #define MX35_PAD_WDOG_RST__IPU_FLASH_STROBE IOMUX_PAD(0x330, 0x00c, 3, 0x0, 0, NO_PAD_CTRL) | ||
47 | #define MX35_PAD_WDOG_RST__GPIO1_6 IOMUX_PAD(0x330, 0x00c, 5, 0x858, 0, NO_PAD_CTRL) | ||
48 | |||
49 | #define MX35_PAD_GPIO1_0__GPIO1_0 IOMUX_PAD(0x334, 0x010, 0, 0x82c, 0, NO_PAD_CTRL) | ||
50 | #define MX35_PAD_GPIO1_0__CCM_PMIC_RDY IOMUX_PAD(0x334, 0x010, 1, 0x7d4, 0, NO_PAD_CTRL) | ||
51 | #define MX35_PAD_GPIO1_0__OWIRE_LINE IOMUX_PAD(0x334, 0x010, 2, 0x990, 0, NO_PAD_CTRL) | ||
52 | #define MX35_PAD_GPIO1_0__SDMA_EXTDMA_0 IOMUX_PAD(0x334, 0x010, 7, 0x0, 0, NO_PAD_CTRL) | ||
53 | |||
54 | #define MX35_PAD_GPIO1_1__GPIO1_1 IOMUX_PAD(0x338, 0x014, 0, 0x838, 0, NO_PAD_CTRL) | ||
55 | #define MX35_PAD_GPIO1_1__PWM_PWMO IOMUX_PAD(0x338, 0x014, 2, 0x0, 0, NO_PAD_CTRL) | ||
56 | #define MX35_PAD_GPIO1_1__CSPI1_SS2 IOMUX_PAD(0x338, 0x014, 3, 0x7d8, 0, NO_PAD_CTRL) | ||
57 | #define MX35_PAD_GPIO1_1__SCC_TAMPER_DETECT IOMUX_PAD(0x338, 0x014, 6, 0x0, 0, NO_PAD_CTRL) | ||
58 | #define MX35_PAD_GPIO1_1__SDMA_EXTDMA_1 IOMUX_PAD(0x338, 0x014, 7, 0x0, 0, NO_PAD_CTRL) | ||
59 | |||
60 | #define MX35_PAD_GPIO2_0__GPIO2_0 IOMUX_PAD(0x33c, 0x018, 0, 0x868, 0, NO_PAD_CTRL) | ||
61 | #define MX35_PAD_GPIO2_0__USB_TOP_USBOTG_CLK IOMUX_PAD(0x33c, 0x018, 1, 0x0, 0, NO_PAD_CTRL) | ||
62 | |||
63 | #define MX35_PAD_GPIO3_0__GPIO3_0 IOMUX_PAD(0x340, 0x01c, 0, 0x8e8, 0, NO_PAD_CTRL) | ||
64 | #define MX35_PAD_GPIO3_0__USB_TOP_USBH2_CLK IOMUX_PAD(0x340, 0x01c, 1, 0x0, 0, NO_PAD_CTRL) | ||
65 | |||
66 | #define MX35_PAD_RESET_IN_B__CCM_RESET_IN_B IOMUX_PAD(0x344, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
67 | |||
68 | #define MX35_PAD_POR_B__CCM_POR_B IOMUX_PAD(0x348, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
69 | |||
70 | #define MX35_PAD_CLKO__CCM_CLKO IOMUX_PAD(0x34c, 0x020, 0, 0x0, 0, NO_PAD_CTRL) | ||
71 | #define MX35_PAD_CLKO__GPIO1_8 IOMUX_PAD(0x34c, 0x020, 5, 0x860, 0, NO_PAD_CTRL) | ||
72 | |||
73 | #define MX35_PAD_BOOT_MODE0__CCM_BOOT_MODE_0 IOMUX_PAD(0x350, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
74 | |||
75 | #define MX35_PAD_BOOT_MODE1__CCM_BOOT_MODE_1 IOMUX_PAD(0x354, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
76 | |||
77 | #define MX35_PAD_CLK_MODE0__CCM_CLK_MODE_0 IOMUX_PAD(0x358, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
78 | |||
79 | #define MX35_PAD_CLK_MODE1__CCM_CLK_MODE_1 IOMUX_PAD(0x35c, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
80 | |||
81 | #define MX35_PAD_POWER_FAIL__CCM_DSM_WAKEUP_INT_26 IOMUX_PAD(0x360, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
82 | |||
83 | #define MX35_PAD_VSTBY__CCM_VSTBY IOMUX_PAD(0x364, 0x024, 0, 0x0, 0, NO_PAD_CTRL) | ||
84 | #define MX35_PAD_VSTBY__GPIO1_7 IOMUX_PAD(0x364, 0x024, 5, 0x85c, 0, NO_PAD_CTRL) | ||
85 | |||
86 | #define MX35_PAD_A0__EMI_EIM_DA_L_0 IOMUX_PAD(0x368, 0x028, 0, 0x0, 0, NO_PAD_CTRL) | ||
87 | |||
88 | #define MX35_PAD_A1__EMI_EIM_DA_L_1 IOMUX_PAD(0x36c, 0x02c, 0, 0x0, 0, NO_PAD_CTRL) | ||
89 | |||
90 | #define MX35_PAD_A2__EMI_EIM_DA_L_2 IOMUX_PAD(0x370, 0x030, 0, 0x0, 0, NO_PAD_CTRL) | ||
91 | |||
92 | #define MX35_PAD_A3__EMI_EIM_DA_L_3 IOMUX_PAD(0x374, 0x034, 0, 0x0, 0, NO_PAD_CTRL) | ||
93 | |||
94 | #define MX35_PAD_A4__EMI_EIM_DA_L_4 IOMUX_PAD(0x378, 0x038, 0, 0x0, 0, NO_PAD_CTRL) | ||
95 | |||
96 | #define MX35_PAD_A5__EMI_EIM_DA_L_5 IOMUX_PAD(0x37c, 0x03c, 0, 0x0, 0, NO_PAD_CTRL) | ||
97 | |||
98 | #define MX35_PAD_A6__EMI_EIM_DA_L_6 IOMUX_PAD(0x380, 0x040, 0, 0x0, 0, NO_PAD_CTRL) | ||
99 | |||
100 | #define MX35_PAD_A7__EMI_EIM_DA_L_7 IOMUX_PAD(0x384, 0x044, 0, 0x0, 0, NO_PAD_CTRL) | ||
101 | |||
102 | #define MX35_PAD_A8__EMI_EIM_DA_H_8 IOMUX_PAD(0x388, 0x048, 0, 0x0, 0, NO_PAD_CTRL) | ||
103 | |||
104 | #define MX35_PAD_A9__EMI_EIM_DA_H_9 IOMUX_PAD(0x38c, 0x04c, 0, 0x0, 0, NO_PAD_CTRL) | ||
105 | |||
106 | #define MX35_PAD_A10__EMI_EIM_DA_H_10 IOMUX_PAD(0x390, 0x050, 0, 0x0, 0, NO_PAD_CTRL) | ||
107 | |||
108 | #define MX35_PAD_MA10__EMI_MA10 IOMUX_PAD(0x394, 0x054, 0, 0x0, 0, NO_PAD_CTRL) | ||
109 | |||
110 | #define MX35_PAD_A11__EMI_EIM_DA_H_11 IOMUX_PAD(0x398, 0x058, 0, 0x0, 0, NO_PAD_CTRL) | ||
111 | |||
112 | #define MX35_PAD_A12__EMI_EIM_DA_H_12 IOMUX_PAD(0x39c, 0x05c, 0, 0x0, 0, NO_PAD_CTRL) | ||
113 | |||
114 | #define MX35_PAD_A13__EMI_EIM_DA_H_13 IOMUX_PAD(0x3a0, 0x060, 0, 0x0, 0, NO_PAD_CTRL) | ||
115 | |||
116 | #define MX35_PAD_A14__EMI_EIM_DA_H2_14 IOMUX_PAD(0x3a4, 0x064, 0, 0x0, 0, NO_PAD_CTRL) | ||
117 | |||
118 | #define MX35_PAD_A15__EMI_EIM_DA_H2_15 IOMUX_PAD(0x3a8, 0x068, 0, 0x0, 0, NO_PAD_CTRL) | ||
119 | |||
120 | #define MX35_PAD_A16__EMI_EIM_A_16 IOMUX_PAD(0x3ac, 0x06c, 0, 0x0, 0, NO_PAD_CTRL) | ||
121 | |||
122 | #define MX35_PAD_A17__EMI_EIM_A_17 IOMUX_PAD(0x3b0, 0x070, 0, 0x0, 0, NO_PAD_CTRL) | ||
123 | |||
124 | #define MX35_PAD_A18__EMI_EIM_A_18 IOMUX_PAD(0x3b4, 0x074, 0, 0x0, 0, NO_PAD_CTRL) | ||
125 | |||
126 | #define MX35_PAD_A19__EMI_EIM_A_19 IOMUX_PAD(0x3b8, 0x078, 0, 0x0, 0, NO_PAD_CTRL) | ||
127 | |||
128 | #define MX35_PAD_A20__EMI_EIM_A_20 IOMUX_PAD(0x3bc, 0x07c, 0, 0x0, 0, NO_PAD_CTRL) | ||
129 | |||
130 | #define MX35_PAD_A21__EMI_EIM_A_21 IOMUX_PAD(0x3c0, 0x080, 0, 0x0, 0, NO_PAD_CTRL) | ||
131 | |||
132 | #define MX35_PAD_A22__EMI_EIM_A_22 IOMUX_PAD(0x3c4, 0x084, 0, 0x0, 0, NO_PAD_CTRL) | ||
133 | |||
134 | #define MX35_PAD_A23__EMI_EIM_A_23 IOMUX_PAD(0x3c8, 0x088, 0, 0x0, 0, NO_PAD_CTRL) | ||
135 | |||
136 | #define MX35_PAD_A24__EMI_EIM_A_24 IOMUX_PAD(0x3cc, 0x08c, 0, 0x0, 0, NO_PAD_CTRL) | ||
137 | |||
138 | #define MX35_PAD_A25__EMI_EIM_A_25 IOMUX_PAD(0x3d0, 0x090, 0, 0x0, 0, NO_PAD_CTRL) | ||
139 | |||
140 | #define MX35_PAD_SDBA1__EMI_EIM_SDBA1 IOMUX_PAD(0x3d4, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
141 | |||
142 | #define MX35_PAD_SDBA0__EMI_EIM_SDBA0 IOMUX_PAD(0x3d8, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
143 | |||
144 | #define MX35_PAD_SD0__EMI_DRAM_D_0 IOMUX_PAD(0x3dc, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
145 | |||
146 | #define MX35_PAD_SD1__EMI_DRAM_D_1 IOMUX_PAD(0x3e0, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
147 | |||
148 | #define MX35_PAD_SD2__EMI_DRAM_D_2 IOMUX_PAD(0x3e4, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
149 | |||
150 | #define MX35_PAD_SD3__EMI_DRAM_D_3 IOMUX_PAD(0x3e8, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
151 | |||
152 | #define MX35_PAD_SD4__EMI_DRAM_D_4 IOMUX_PAD(0x3ec, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
153 | |||
154 | #define MX35_PAD_SD5__EMI_DRAM_D_5 IOMUX_PAD(0x3f0, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
155 | |||
156 | #define MX35_PAD_SD6__EMI_DRAM_D_6 IOMUX_PAD(0x3f4, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
157 | |||
158 | #define MX35_PAD_SD7__EMI_DRAM_D_7 IOMUX_PAD(0x3f8, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
159 | |||
160 | #define MX35_PAD_SD8__EMI_DRAM_D_8 IOMUX_PAD(0x3fc, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
161 | |||
162 | #define MX35_PAD_SD9__EMI_DRAM_D_9 IOMUX_PAD(0x400, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
163 | |||
164 | #define MX35_PAD_SD10__EMI_DRAM_D_10 IOMUX_PAD(0x404, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
165 | |||
166 | #define MX35_PAD_SD11__EMI_DRAM_D_11 IOMUX_PAD(0x408, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
167 | |||
168 | #define MX35_PAD_SD12__EMI_DRAM_D_12 IOMUX_PAD(0x40c, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
169 | |||
170 | #define MX35_PAD_SD13__EMI_DRAM_D_13 IOMUX_PAD(0x410, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
171 | |||
172 | #define MX35_PAD_SD14__EMI_DRAM_D_14 IOMUX_PAD(0x414, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
173 | |||
174 | #define MX35_PAD_SD15__EMI_DRAM_D_15 IOMUX_PAD(0x418, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
175 | |||
176 | #define MX35_PAD_SD16__EMI_DRAM_D_16 IOMUX_PAD(0x41c, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
177 | |||
178 | #define MX35_PAD_SD17__EMI_DRAM_D_17 IOMUX_PAD(0x420, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
179 | |||
180 | #define MX35_PAD_SD18__EMI_DRAM_D_18 IOMUX_PAD(0x424, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
181 | |||
182 | #define MX35_PAD_SD19__EMI_DRAM_D_19 IOMUX_PAD(0x428, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
183 | |||
184 | #define MX35_PAD_SD20__EMI_DRAM_D_20 IOMUX_PAD(0x42c, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
185 | |||
186 | #define MX35_PAD_SD21__EMI_DRAM_D_21 IOMUX_PAD(0x430, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
187 | |||
188 | #define MX35_PAD_SD22__EMI_DRAM_D_22 IOMUX_PAD(0x434, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
189 | |||
190 | #define MX35_PAD_SD23__EMI_DRAM_D_23 IOMUX_PAD(0x438, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
191 | |||
192 | #define MX35_PAD_SD24__EMI_DRAM_D_24 IOMUX_PAD(0x43c, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
193 | |||
194 | #define MX35_PAD_SD25__EMI_DRAM_D_25 IOMUX_PAD(0x440, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
195 | |||
196 | #define MX35_PAD_SD26__EMI_DRAM_D_26 IOMUX_PAD(0x444, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
197 | |||
198 | #define MX35_PAD_SD27__EMI_DRAM_D_27 IOMUX_PAD(0x448, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
199 | |||
200 | #define MX35_PAD_SD28__EMI_DRAM_D_28 IOMUX_PAD(0x44c, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
201 | |||
202 | #define MX35_PAD_SD29__EMI_DRAM_D_29 IOMUX_PAD(0x450, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
203 | |||
204 | #define MX35_PAD_SD30__EMI_DRAM_D_30 IOMUX_PAD(0x454, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
205 | |||
206 | #define MX35_PAD_SD31__EMI_DRAM_D_31 IOMUX_PAD(0x458, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
207 | |||
208 | #define MX35_PAD_DQM0__EMI_DRAM_DQM_0 IOMUX_PAD(0x45c, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
209 | |||
210 | #define MX35_PAD_DQM1__EMI_DRAM_DQM_1 IOMUX_PAD(0x460, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
211 | |||
212 | #define MX35_PAD_DQM2__EMI_DRAM_DQM_2 IOMUX_PAD(0x464, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
213 | |||
214 | #define MX35_PAD_DQM3__EMI_DRAM_DQM_3 IOMUX_PAD(0x468, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
215 | |||
216 | #define MX35_PAD_EB0__EMI_EIM_EB0_B IOMUX_PAD(0x46c, 0x094, 0, 0x0, 0, NO_PAD_CTRL) | ||
217 | |||
218 | #define MX35_PAD_EB1__EMI_EIM_EB1_B IOMUX_PAD(0x470, 0x098, 0, 0x0, 0, NO_PAD_CTRL) | ||
219 | |||
220 | #define MX35_PAD_OE__EMI_EIM_OE IOMUX_PAD(0x474, 0x09c, 0, 0x0, 0, NO_PAD_CTRL) | ||
221 | |||
222 | #define MX35_PAD_CS0__EMI_EIM_CS0 IOMUX_PAD(0x478, 0x0a0, 0, 0x0, 0, NO_PAD_CTRL) | ||
223 | |||
224 | #define MX35_PAD_CS1__EMI_EIM_CS1 IOMUX_PAD(0x47c, 0x0a4, 0, 0x0, 0, NO_PAD_CTRL) | ||
225 | #define MX35_PAD_CS1__EMI_NANDF_CE3 IOMUX_PAD(0x47c, 0x0a4, 3, 0x0, 0, NO_PAD_CTRL) | ||
226 | |||
227 | #define MX35_PAD_CS2__EMI_EIM_CS2 IOMUX_PAD(0x480, 0x0a8, 0, 0x0, 0, NO_PAD_CTRL) | ||
228 | |||
229 | #define MX35_PAD_CS3__EMI_EIM_CS3 IOMUX_PAD(0x484, 0x0ac, 0, 0x0, 0, NO_PAD_CTRL) | ||
230 | |||
231 | #define MX35_PAD_CS4__EMI_EIM_CS4 IOMUX_PAD(0x488, 0x0b0, 0, 0x0, 0, NO_PAD_CTRL) | ||
232 | #define MX35_PAD_CS4__EMI_DTACK_B IOMUX_PAD(0x488, 0x0b0, 1, 0x800, 0, NO_PAD_CTRL) | ||
233 | #define MX35_PAD_CS4__EMI_NANDF_CE1 IOMUX_PAD(0x488, 0x0b0, 3, 0x0, 0, NO_PAD_CTRL) | ||
234 | #define MX35_PAD_CS4__GPIO1_20 IOMUX_PAD(0x488, 0x0b0, 5, 0x83c, 0, NO_PAD_CTRL) | ||
235 | |||
236 | #define MX35_PAD_CS5__EMI_EIM_CS5 IOMUX_PAD(0x48c, 0x0b4, 0, 0x0, 0, NO_PAD_CTRL) | ||
237 | #define MX35_PAD_CS5__CSPI2_SS2 IOMUX_PAD(0x48c, 0x0b4, 1, 0x7f8, 0, NO_PAD_CTRL) | ||
238 | #define MX35_PAD_CS5__CSPI1_SS2 IOMUX_PAD(0x48c, 0x0b4, 2, 0x7d8, 1, NO_PAD_CTRL) | ||
239 | #define MX35_PAD_CS5__EMI_NANDF_CE2 IOMUX_PAD(0x48c, 0x0b4, 3, 0x0, 0, NO_PAD_CTRL) | ||
240 | #define MX35_PAD_CS5__GPIO1_21 IOMUX_PAD(0x48c, 0x0b4, 5, 0x840, 0, NO_PAD_CTRL) | ||
241 | |||
242 | #define MX35_PAD_NF_CE0__EMI_NANDF_CE0 IOMUX_PAD(0x490, 0x0b8, 0, 0x0, 0, NO_PAD_CTRL) | ||
243 | #define MX35_PAD_NF_CE0__GPIO1_22 IOMUX_PAD(0x490, 0x0b8, 5, 0x844, 0, NO_PAD_CTRL) | ||
244 | |||
245 | #define MX35_PAD_ECB__EMI_EIM_ECB IOMUX_PAD(0x494, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
246 | |||
247 | #define MX35_PAD_LBA__EMI_EIM_LBA IOMUX_PAD(0x498, 0x0bc, 0, 0x0, 0, NO_PAD_CTRL) | ||
248 | |||
249 | #define MX35_PAD_BCLK__EMI_EIM_BCLK IOMUX_PAD(0x49c, 0x0c0, 0, 0x0, 0, NO_PAD_CTRL) | ||
250 | |||
251 | #define MX35_PAD_RW__EMI_EIM_RW IOMUX_PAD(0x4a0, 0x0c4, 0, 0x0, 0, NO_PAD_CTRL) | ||
252 | |||
253 | #define MX35_PAD_RAS__EMI_DRAM_RAS IOMUX_PAD(0x4a4, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
254 | |||
255 | #define MX35_PAD_CAS__EMI_DRAM_CAS IOMUX_PAD(0x4a8, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
256 | |||
257 | #define MX35_PAD_SDWE__EMI_DRAM_SDWE IOMUX_PAD(0x4ac, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
258 | |||
259 | #define MX35_PAD_SDCKE0__EMI_DRAM_SDCKE_0 IOMUX_PAD(0x4b0, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
260 | |||
261 | #define MX35_PAD_SDCKE1__EMI_DRAM_SDCKE_1 IOMUX_PAD(0x4b4, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
262 | |||
263 | #define MX35_PAD_SDCLK__EMI_DRAM_SDCLK IOMUX_PAD(0x4b8, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
264 | |||
265 | #define MX35_PAD_SDQS0__EMI_DRAM_SDQS_0 IOMUX_PAD(0x4bc, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
266 | |||
267 | #define MX35_PAD_SDQS1__EMI_DRAM_SDQS_1 IOMUX_PAD(0x4c0, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
268 | |||
269 | #define MX35_PAD_SDQS2__EMI_DRAM_SDQS_2 IOMUX_PAD(0x4c4, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
270 | |||
271 | #define MX35_PAD_SDQS3__EMI_DRAM_SDQS_3 IOMUX_PAD(0x4c8, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
272 | |||
273 | #define MX35_PAD_NFWE_B__EMI_NANDF_WE_B IOMUX_PAD(0x4cc, 0x0c8, 0, 0x0, 0, NO_PAD_CTRL) | ||
274 | #define MX35_PAD_NFWE_B__USB_TOP_USBH2_DATA_3 IOMUX_PAD(0x4cc, 0x0c8, 1, 0x9d8, 0, NO_PAD_CTRL) | ||
275 | #define MX35_PAD_NFWE_B__IPU_DISPB_D0_VSYNC IOMUX_PAD(0x4cc, 0x0c8, 2, 0x924, 0, NO_PAD_CTRL) | ||
276 | #define MX35_PAD_NFWE_B__GPIO2_18 IOMUX_PAD(0x4cc, 0x0c8, 5, 0x88c, 0, NO_PAD_CTRL) | ||
277 | #define MX35_PAD_NFWE_B__ARM11P_TOP_TRACE_0 IOMUX_PAD(0x4cc, 0x0c8, 7, 0x0, 0, NO_PAD_CTRL) | ||
278 | |||
279 | #define MX35_PAD_NFRE_B__EMI_NANDF_RE_B IOMUX_PAD(0x4d0, 0x0cc, 0, 0x0, 0, NO_PAD_CTRL) | ||
280 | #define MX35_PAD_NFRE_B__USB_TOP_USBH2_DIR IOMUX_PAD(0x4d0, 0x0cc, 1, 0x9ec, 0, NO_PAD_CTRL) | ||
281 | #define MX35_PAD_NFRE_B__IPU_DISPB_BCLK IOMUX_PAD(0x4d0, 0x0cc, 2, 0x0, 0, NO_PAD_CTRL) | ||
282 | #define MX35_PAD_NFRE_B__GPIO2_19 IOMUX_PAD(0x4d0, 0x0cc, 5, 0x890, 0, NO_PAD_CTRL) | ||
283 | #define MX35_PAD_NFRE_B__ARM11P_TOP_TRACE_1 IOMUX_PAD(0x4d0, 0x0cc, 7, 0x0, 0, NO_PAD_CTRL) | ||
284 | |||
285 | #define MX35_PAD_NFALE__EMI_NANDF_ALE IOMUX_PAD(0x4d4, 0x0d0, 0, 0x0, 0, NO_PAD_CTRL) | ||
286 | #define MX35_PAD_NFALE__USB_TOP_USBH2_STP IOMUX_PAD(0x4d4, 0x0d0, 1, 0x0, 0, NO_PAD_CTRL) | ||
287 | #define MX35_PAD_NFALE__IPU_DISPB_CS0 IOMUX_PAD(0x4d4, 0x0d0, 2, 0x0, 0, NO_PAD_CTRL) | ||
288 | #define MX35_PAD_NFALE__GPIO2_20 IOMUX_PAD(0x4d4, 0x0d0, 5, 0x898, 0, NO_PAD_CTRL) | ||
289 | #define MX35_PAD_NFALE__ARM11P_TOP_TRACE_2 IOMUX_PAD(0x4d4, 0x0d0, 7, 0x0, 0, NO_PAD_CTRL) | ||
290 | |||
291 | #define MX35_PAD_NFCLE__EMI_NANDF_CLE IOMUX_PAD(0x4d8, 0x0d4, 0, 0x0, 0, NO_PAD_CTRL) | ||
292 | #define MX35_PAD_NFCLE__USB_TOP_USBH2_NXT IOMUX_PAD(0x4d8, 0x0d4, 1, 0x9f0, 0, NO_PAD_CTRL) | ||
293 | #define MX35_PAD_NFCLE__IPU_DISPB_PAR_RS IOMUX_PAD(0x4d8, 0x0d4, 2, 0x0, 0, NO_PAD_CTRL) | ||
294 | #define MX35_PAD_NFCLE__GPIO2_21 IOMUX_PAD(0x4d8, 0x0d4, 5, 0x89c, 0, NO_PAD_CTRL) | ||
295 | #define MX35_PAD_NFCLE__ARM11P_TOP_TRACE_3 IOMUX_PAD(0x4d8, 0x0d4, 7, 0x0, 0, NO_PAD_CTRL) | ||
296 | |||
297 | #define MX35_PAD_NFWP_B__EMI_NANDF_WP_B IOMUX_PAD(0x4dc, 0x0d8, 0, 0x0, 0, NO_PAD_CTRL) | ||
298 | #define MX35_PAD_NFWP_B__USB_TOP_USBH2_DATA_7 IOMUX_PAD(0x4dc, 0x0d8, 1, 0x9e8, 0, NO_PAD_CTRL) | ||
299 | #define MX35_PAD_NFWP_B__IPU_DISPB_WR IOMUX_PAD(0x4dc, 0x0d8, 2, 0x0, 0, NO_PAD_CTRL) | ||
300 | #define MX35_PAD_NFWP_B__GPIO2_22 IOMUX_PAD(0x4dc, 0x0d8, 5, 0x8a0, 0, NO_PAD_CTRL) | ||
301 | #define MX35_PAD_NFWP_B__ARM11P_TOP_TRCTL IOMUX_PAD(0x4dc, 0x0d8, 7, 0x0, 0, NO_PAD_CTRL) | ||
302 | |||
303 | #define MX35_PAD_NFRB__EMI_NANDF_RB IOMUX_PAD(0x4e0, 0x0dc, 0, 0x0, 0, NO_PAD_CTRL) | ||
304 | #define MX35_PAD_NFRB__IPU_DISPB_RD IOMUX_PAD(0x4e0, 0x0dc, 2, 0x0, 0, NO_PAD_CTRL) | ||
305 | #define MX35_PAD_NFRB__GPIO2_23 IOMUX_PAD(0x4e0, 0x0dc, 5, 0x8a4, 0, NO_PAD_CTRL) | ||
306 | #define MX35_PAD_NFRB__ARM11P_TOP_TRCLK IOMUX_PAD(0x4e0, 0x0dc, 7, 0x0, 0, NO_PAD_CTRL) | ||
307 | |||
308 | #define MX35_PAD_D15__EMI_EIM_D_15 IOMUX_PAD(0x4e4, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
309 | |||
310 | #define MX35_PAD_D14__EMI_EIM_D_14 IOMUX_PAD(0x4e8, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
311 | |||
312 | #define MX35_PAD_D13__EMI_EIM_D_13 IOMUX_PAD(0x4ec, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
313 | |||
314 | #define MX35_PAD_D12__EMI_EIM_D_12 IOMUX_PAD(0x4f0, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
315 | |||
316 | #define MX35_PAD_D11__EMI_EIM_D_11 IOMUX_PAD(0x4f4, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
317 | |||
318 | #define MX35_PAD_D10__EMI_EIM_D_10 IOMUX_PAD(0x4f8, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
319 | |||
320 | #define MX35_PAD_D9__EMI_EIM_D_9 IOMUX_PAD(0x4fc, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
321 | |||
322 | #define MX35_PAD_D8__EMI_EIM_D_8 IOMUX_PAD(0x500, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
323 | |||
324 | #define MX35_PAD_D7__EMI_EIM_D_7 IOMUX_PAD(0x504, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
325 | |||
326 | #define MX35_PAD_D6__EMI_EIM_D_6 IOMUX_PAD(0x508, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
327 | |||
328 | #define MX35_PAD_D5__EMI_EIM_D_5 IOMUX_PAD(0x50c, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
329 | |||
330 | #define MX35_PAD_D4__EMI_EIM_D_4 IOMUX_PAD(0x510, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
331 | |||
332 | #define MX35_PAD_D3__EMI_EIM_D_3 IOMUX_PAD(0x514, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
333 | |||
334 | #define MX35_PAD_D2__EMI_EIM_D_2 IOMUX_PAD(0x518, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
335 | |||
336 | #define MX35_PAD_D1__EMI_EIM_D_1 IOMUX_PAD(0x51c, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
337 | |||
338 | #define MX35_PAD_D0__EMI_EIM_D_0 IOMUX_PAD(0x520, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
339 | |||
340 | #define MX35_PAD_CSI_D8__IPU_CSI_D_8 IOMUX_PAD(0x524, 0x0e0, 0, 0x0, 0, NO_PAD_CTRL) | ||
341 | #define MX35_PAD_CSI_D8__KPP_COL_0 IOMUX_PAD(0x524, 0x0e0, 1, 0x950, 0, NO_PAD_CTRL) | ||
342 | #define MX35_PAD_CSI_D8__GPIO1_20 IOMUX_PAD(0x524, 0x0e0, 5, 0x83c, 1, NO_PAD_CTRL) | ||
343 | #define MX35_PAD_CSI_D8__ARM11P_TOP_EVNTBUS_13 IOMUX_PAD(0x524, 0x0e0, 7, 0x0, 0, NO_PAD_CTRL) | ||
344 | |||
345 | #define MX35_PAD_CSI_D9__IPU_CSI_D_9 IOMUX_PAD(0x528, 0x0e4, 0, 0x0, 0, NO_PAD_CTRL) | ||
346 | #define MX35_PAD_CSI_D9__KPP_COL_1 IOMUX_PAD(0x528, 0x0e4, 1, 0x954, 0, NO_PAD_CTRL) | ||
347 | #define MX35_PAD_CSI_D9__GPIO1_21 IOMUX_PAD(0x528, 0x0e4, 5, 0x840, 1, NO_PAD_CTRL) | ||
348 | #define MX35_PAD_CSI_D9__ARM11P_TOP_EVNTBUS_14 IOMUX_PAD(0x528, 0x0e4, 7, 0x0, 0, NO_PAD_CTRL) | ||
349 | |||
350 | #define MX35_PAD_CSI_D10__IPU_CSI_D_10 IOMUX_PAD(0x52c, 0x0e8, 0, 0x0, 0, NO_PAD_CTRL) | ||
351 | #define MX35_PAD_CSI_D10__KPP_COL_2 IOMUX_PAD(0x52c, 0x0e8, 1, 0x958, 0, NO_PAD_CTRL) | ||
352 | #define MX35_PAD_CSI_D10__GPIO1_22 IOMUX_PAD(0x52c, 0x0e8, 5, 0x844, 1, NO_PAD_CTRL) | ||
353 | #define MX35_PAD_CSI_D10__ARM11P_TOP_EVNTBUS_15 IOMUX_PAD(0x52c, 0x0e8, 7, 0x0, 0, NO_PAD_CTRL) | ||
354 | |||
355 | #define MX35_PAD_CSI_D11__IPU_CSI_D_11 IOMUX_PAD(0x530, 0x0ec, 0, 0x0, 0, NO_PAD_CTRL) | ||
356 | #define MX35_PAD_CSI_D11__KPP_COL_3 IOMUX_PAD(0x530, 0x0ec, 1, 0x95c, 0, NO_PAD_CTRL) | ||
357 | #define MX35_PAD_CSI_D11__GPIO1_23 IOMUX_PAD(0x530, 0x0ec, 5, 0x0, 0, NO_PAD_CTRL) | ||
358 | |||
359 | #define MX35_PAD_CSI_D12__IPU_CSI_D_12 IOMUX_PAD(0x534, 0x0f0, 0, 0x0, 0, NO_PAD_CTRL) | ||
360 | #define MX35_PAD_CSI_D12__KPP_ROW_0 IOMUX_PAD(0x534, 0x0f0, 1, 0x970, 0, NO_PAD_CTRL) | ||
361 | #define MX35_PAD_CSI_D12__GPIO1_24 IOMUX_PAD(0x534, 0x0f0, 5, 0x0, 0, NO_PAD_CTRL) | ||
362 | |||
363 | #define MX35_PAD_CSI_D13__IPU_CSI_D_13 IOMUX_PAD(0x538, 0x0f4, 0, 0x0, 0, NO_PAD_CTRL) | ||
364 | #define MX35_PAD_CSI_D13__KPP_ROW_1 IOMUX_PAD(0x538, 0x0f4, 1, 0x974, 0, NO_PAD_CTRL) | ||
365 | #define MX35_PAD_CSI_D13__GPIO1_25 IOMUX_PAD(0x538, 0x0f4, 5, 0x0, 0, NO_PAD_CTRL) | ||
366 | |||
367 | #define MX35_PAD_CSI_D14__IPU_CSI_D_14 IOMUX_PAD(0x53c, 0x0f8, 0, 0x0, 0, NO_PAD_CTRL) | ||
368 | #define MX35_PAD_CSI_D14__KPP_ROW_2 IOMUX_PAD(0x53c, 0x0f8, 1, 0x978, 0, NO_PAD_CTRL) | ||
369 | #define MX35_PAD_CSI_D14__GPIO1_26 IOMUX_PAD(0x53c, 0x0f8, 5, 0x0, 0, NO_PAD_CTRL) | ||
370 | |||
371 | #define MX35_PAD_CSI_D15__IPU_CSI_D_15 IOMUX_PAD(0x540, 0x0fc, 0, 0x97c, 0, NO_PAD_CTRL) | ||
372 | #define MX35_PAD_CSI_D15__KPP_ROW_3 IOMUX_PAD(0x540, 0x0fc, 1, 0x0, 0, NO_PAD_CTRL) | ||
373 | #define MX35_PAD_CSI_D15__GPIO1_27 IOMUX_PAD(0x540, 0x0fc, 5, 0x0, 0, NO_PAD_CTRL) | ||
374 | |||
375 | #define MX35_PAD_CSI_MCLK__IPU_CSI_MCLK IOMUX_PAD(0x544, 0x100, 0, 0x0, 0, NO_PAD_CTRL) | ||
376 | #define MX35_PAD_CSI_MCLK__GPIO1_28 IOMUX_PAD(0x544, 0x100, 5, 0x0, 0, NO_PAD_CTRL) | ||
377 | |||
378 | #define MX35_PAD_CSI_VSYNC__IPU_CSI_VSYNC IOMUX_PAD(0x548, 0x104, 0, 0x0, 0, NO_PAD_CTRL) | ||
379 | #define MX35_PAD_CSI_VSYNC__GPIO1_29 IOMUX_PAD(0x548, 0x104, 5, 0x0, 0, NO_PAD_CTRL) | ||
380 | |||
381 | #define MX35_PAD_CSI_HSYNC__IPU_CSI_HSYNC IOMUX_PAD(0x54c, 0x108, 0, 0x0, 0, NO_PAD_CTRL) | ||
382 | #define MX35_PAD_CSI_HSYNC__GPIO1_30 IOMUX_PAD(0x54c, 0x108, 5, 0x0, 0, NO_PAD_CTRL) | ||
383 | |||
384 | #define MX35_PAD_CSI_PIXCLK__IPU_CSI_PIXCLK IOMUX_PAD(0x550, 0x10c, 0, 0x0, 0, NO_PAD_CTRL) | ||
385 | #define MX35_PAD_CSI_PIXCLK__GPIO1_31 IOMUX_PAD(0x550, 0x10c, 5, 0x0, 0, NO_PAD_CTRL) | ||
386 | |||
387 | #define MX35_PAD_I2C1_CLK__I2C1_SCL IOMUX_PAD(0x554, 0x110, 0, 0x0, 0, NO_PAD_CTRL) | ||
388 | #define MX35_PAD_I2C1_CLK__GPIO2_24 IOMUX_PAD(0x554, 0x110, 5, 0x8a8, 0, NO_PAD_CTRL) | ||
389 | #define MX35_PAD_I2C1_CLK__CCM_USB_BYP_CLK IOMUX_PAD(0x554, 0x110, 6, 0x0, 0, NO_PAD_CTRL) | ||
390 | |||
391 | #define MX35_PAD_I2C1_DAT__I2C1_SDA IOMUX_PAD(0x558, 0x114, 0, 0x0, 0, NO_PAD_CTRL) | ||
392 | #define MX35_PAD_I2C1_DAT__GPIO2_25 IOMUX_PAD(0x558, 0x114, 5, 0x8ac, 0, NO_PAD_CTRL) | ||
393 | |||
394 | #define MX35_PAD_I2C2_CLK__I2C2_SCL IOMUX_PAD(0x55c, 0x118, 0, 0x0, 0, NO_PAD_CTRL) | ||
395 | #define MX35_PAD_I2C2_CLK__CAN1_TXCAN IOMUX_PAD(0x55c, 0x118, 1, 0x0, 0, NO_PAD_CTRL) | ||
396 | #define MX35_PAD_I2C2_CLK__USB_TOP_USBH2_PWR IOMUX_PAD(0x55c, 0x118, 2, 0x0, 0, NO_PAD_CTRL) | ||
397 | #define MX35_PAD_I2C2_CLK__GPIO2_26 IOMUX_PAD(0x55c, 0x118, 5, 0x8b0, 0, NO_PAD_CTRL) | ||
398 | #define MX35_PAD_I2C2_CLK__SDMA_DEBUG_BUS_DEVICE_2 IOMUX_PAD(0x55c, 0x118, 6, 0x0, 0, NO_PAD_CTRL) | ||
399 | |||
400 | #define MX35_PAD_I2C2_DAT__I2C2_SDA IOMUX_PAD(0x560, 0x11c, 0, 0x0, 0, NO_PAD_CTRL) | ||
401 | #define MX35_PAD_I2C2_DAT__CAN1_RXCAN IOMUX_PAD(0x560, 0x11c, 1, 0x7c8, 0, NO_PAD_CTRL) | ||
402 | #define MX35_PAD_I2C2_DAT__USB_TOP_USBH2_OC IOMUX_PAD(0x560, 0x11c, 2, 0x9f4, 0, NO_PAD_CTRL) | ||
403 | #define MX35_PAD_I2C2_DAT__GPIO2_27 IOMUX_PAD(0x560, 0x11c, 5, 0x8b4, 0, NO_PAD_CTRL) | ||
404 | #define MX35_PAD_I2C2_DAT__SDMA_DEBUG_BUS_DEVICE_3 IOMUX_PAD(0x560, 0x11c, 6, 0x0, 0, NO_PAD_CTRL) | ||
405 | |||
406 | #define MX35_PAD_STXD4__AUDMUX_AUD4_TXD IOMUX_PAD(0x564, 0x120, 0, 0x0, 0, NO_PAD_CTRL) | ||
407 | #define MX35_PAD_STXD4__GPIO2_28 IOMUX_PAD(0x564, 0x120, 5, 0x8b8, 0, NO_PAD_CTRL) | ||
408 | #define MX35_PAD_STXD4__ARM11P_TOP_ARM_COREASID0 IOMUX_PAD(0x564, 0x120, 7, 0x0, 0, NO_PAD_CTRL) | ||
409 | |||
410 | #define MX35_PAD_SRXD4__AUDMUX_AUD4_RXD IOMUX_PAD(0x568, 0x124, 0, 0x0, 0, NO_PAD_CTRL) | ||
411 | #define MX35_PAD_SRXD4__GPIO2_29 IOMUX_PAD(0x568, 0x124, 5, 0x8bc, 0, NO_PAD_CTRL) | ||
412 | #define MX35_PAD_SRXD4__ARM11P_TOP_ARM_COREASID1 IOMUX_PAD(0x568, 0x124, 7, 0x0, 0, NO_PAD_CTRL) | ||
413 | |||
414 | #define MX35_PAD_SCK4__AUDMUX_AUD4_TXC IOMUX_PAD(0x56c, 0x128, 0, 0x0, 0, NO_PAD_CTRL) | ||
415 | #define MX35_PAD_SCK4__GPIO2_30 IOMUX_PAD(0x56c, 0x128, 5, 0x8c4, 0, NO_PAD_CTRL) | ||
416 | #define MX35_PAD_SCK4__ARM11P_TOP_ARM_COREASID2 IOMUX_PAD(0x56c, 0x128, 7, 0x0, 0, NO_PAD_CTRL) | ||
417 | |||
418 | #define MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS IOMUX_PAD(0x570, 0x12c, 0, 0x0, 0, NO_PAD_CTRL) | ||
419 | #define MX35_PAD_STXFS4__GPIO2_31 IOMUX_PAD(0x570, 0x12c, 5, 0x8c8, 0, NO_PAD_CTRL) | ||
420 | #define MX35_PAD_STXFS4__ARM11P_TOP_ARM_COREASID3 IOMUX_PAD(0x570, 0x12c, 7, 0x0, 0, NO_PAD_CTRL) | ||
421 | |||
422 | #define MX35_PAD_STXD5__AUDMUX_AUD5_TXD IOMUX_PAD(0x574, 0x130, 0, 0x0, 0, NO_PAD_CTRL) | ||
423 | #define MX35_PAD_STXD5__SPDIF_SPDIF_OUT1 IOMUX_PAD(0x574, 0x130, 1, 0x0, 0, NO_PAD_CTRL) | ||
424 | #define MX35_PAD_STXD5__CSPI2_MOSI IOMUX_PAD(0x574, 0x130, 2, 0x7ec, 0, NO_PAD_CTRL) | ||
425 | #define MX35_PAD_STXD5__GPIO1_0 IOMUX_PAD(0x574, 0x130, 5, 0x82c, 1, NO_PAD_CTRL) | ||
426 | #define MX35_PAD_STXD5__ARM11P_TOP_ARM_COREASID4 IOMUX_PAD(0x574, 0x130, 7, 0x0, 0, NO_PAD_CTRL) | ||
427 | |||
428 | #define MX35_PAD_SRXD5__AUDMUX_AUD5_RXD IOMUX_PAD(0x578, 0x134, 0, 0x0, 0, NO_PAD_CTRL) | ||
429 | #define MX35_PAD_SRXD5__SPDIF_SPDIF_IN1 IOMUX_PAD(0x578, 0x134, 1, 0x998, 0, NO_PAD_CTRL) | ||
430 | #define MX35_PAD_SRXD5__CSPI2_MISO IOMUX_PAD(0x578, 0x134, 2, 0x7e8, 0, NO_PAD_CTRL) | ||
431 | #define MX35_PAD_SRXD5__GPIO1_1 IOMUX_PAD(0x578, 0x134, 5, 0x838, 1, NO_PAD_CTRL) | ||
432 | #define MX35_PAD_SRXD5__ARM11P_TOP_ARM_COREASID5 IOMUX_PAD(0x578, 0x134, 7, 0x0, 0, NO_PAD_CTRL) | ||
433 | |||
434 | #define MX35_PAD_SCK5__AUDMUX_AUD5_TXC IOMUX_PAD(0x57c, 0x138, 0, 0x0, 0, NO_PAD_CTRL) | ||
435 | #define MX35_PAD_SCK5__SPDIF_SPDIF_EXTCLK IOMUX_PAD(0x57c, 0x138, 1, 0x994, 0, NO_PAD_CTRL) | ||
436 | #define MX35_PAD_SCK5__CSPI2_SCLK IOMUX_PAD(0x57c, 0x138, 2, 0x7e0, 0, NO_PAD_CTRL) | ||
437 | #define MX35_PAD_SCK5__GPIO1_2 IOMUX_PAD(0x57c, 0x138, 5, 0x848, 0, NO_PAD_CTRL) | ||
438 | #define MX35_PAD_SCK5__ARM11P_TOP_ARM_COREASID6 IOMUX_PAD(0x57c, 0x138, 7, 0x0, 0, NO_PAD_CTRL) | ||
439 | |||
440 | #define MX35_PAD_STXFS5__AUDMUX_AUD5_TXFS IOMUX_PAD(0x580, 0x13c, 0, 0x0, 0, NO_PAD_CTRL) | ||
441 | #define MX35_PAD_STXFS5__CSPI2_RDY IOMUX_PAD(0x580, 0x13c, 2, 0x7e4, 0, NO_PAD_CTRL) | ||
442 | #define MX35_PAD_STXFS5__GPIO1_3 IOMUX_PAD(0x580, 0x13c, 5, 0x84c, 0, NO_PAD_CTRL) | ||
443 | #define MX35_PAD_STXFS5__ARM11P_TOP_ARM_COREASID7 IOMUX_PAD(0x580, 0x13c, 7, 0x0, 0, NO_PAD_CTRL) | ||
444 | |||
445 | #define MX35_PAD_SCKR__ESAI_SCKR IOMUX_PAD(0x584, 0x140, 0, 0x0, 0, NO_PAD_CTRL) | ||
446 | #define MX35_PAD_SCKR__GPIO1_4 IOMUX_PAD(0x584, 0x140, 5, 0x850, 1, NO_PAD_CTRL) | ||
447 | #define MX35_PAD_SCKR__ARM11P_TOP_EVNTBUS_10 IOMUX_PAD(0x584, 0x140, 7, 0x0, 0, NO_PAD_CTRL) | ||
448 | |||
449 | #define MX35_PAD_FSR__ESAI_FSR IOMUX_PAD(0x588, 0x144, 0, 0x0, 0, NO_PAD_CTRL) | ||
450 | #define MX35_PAD_FSR__GPIO1_5 IOMUX_PAD(0x588, 0x144, 5, 0x854, 1, NO_PAD_CTRL) | ||
451 | #define MX35_PAD_FSR__ARM11P_TOP_EVNTBUS_11 IOMUX_PAD(0x588, 0x144, 7, 0x0, 0, NO_PAD_CTRL) | ||
452 | |||
453 | #define MX35_PAD_HCKR__ESAI_HCKR IOMUX_PAD(0x58c, 0x148, 0, 0x0, 0, NO_PAD_CTRL) | ||
454 | #define MX35_PAD_HCKR__AUDMUX_AUD5_RXFS IOMUX_PAD(0x58c, 0x148, 1, 0x0, 0, NO_PAD_CTRL) | ||
455 | #define MX35_PAD_HCKR__CSPI2_SS0 IOMUX_PAD(0x58c, 0x148, 2, 0x7f0, 0, NO_PAD_CTRL) | ||
456 | #define MX35_PAD_HCKR__IPU_FLASH_STROBE IOMUX_PAD(0x58c, 0x148, 3, 0x0, 0, NO_PAD_CTRL) | ||
457 | #define MX35_PAD_HCKR__GPIO1_6 IOMUX_PAD(0x58c, 0x148, 5, 0x858, 1, NO_PAD_CTRL) | ||
458 | #define MX35_PAD_HCKR__ARM11P_TOP_EVNTBUS_12 IOMUX_PAD(0x58c, 0x148, 7, 0x0, 0, NO_PAD_CTRL) | ||
459 | |||
460 | #define MX35_PAD_SCKT__ESAI_SCKT IOMUX_PAD(0x590, 0x14c, 0, 0x0, 0, NO_PAD_CTRL) | ||
461 | #define MX35_PAD_SCKT__GPIO1_7 IOMUX_PAD(0x590, 0x14c, 5, 0x85c, 1, NO_PAD_CTRL) | ||
462 | #define MX35_PAD_SCKT__IPU_CSI_D_0 IOMUX_PAD(0x590, 0x14c, 6, 0x930, 0, NO_PAD_CTRL) | ||
463 | #define MX35_PAD_SCKT__KPP_ROW_2 IOMUX_PAD(0x590, 0x14c, 7, 0x978, 1, NO_PAD_CTRL) | ||
464 | |||
465 | #define MX35_PAD_FST__ESAI_FST IOMUX_PAD(0x594, 0x150, 0, 0x0, 0, NO_PAD_CTRL) | ||
466 | #define MX35_PAD_FST__GPIO1_8 IOMUX_PAD(0x594, 0x150, 5, 0x860, 1, NO_PAD_CTRL) | ||
467 | #define MX35_PAD_FST__IPU_CSI_D_1 IOMUX_PAD(0x594, 0x150, 6, 0x934, 0, NO_PAD_CTRL) | ||
468 | #define MX35_PAD_FST__KPP_ROW_3 IOMUX_PAD(0x594, 0x150, 7, 0x97c, 1, NO_PAD_CTRL) | ||
469 | |||
470 | #define MX35_PAD_HCKT__ESAI_HCKT IOMUX_PAD(0x598, 0x154, 0, 0x0, 0, NO_PAD_CTRL) | ||
471 | #define MX35_PAD_HCKT__AUDMUX_AUD5_RXC IOMUX_PAD(0x598, 0x154, 1, 0x7a8, 0, NO_PAD_CTRL) | ||
472 | #define MX35_PAD_HCKT__GPIO1_9 IOMUX_PAD(0x598, 0x154, 5, 0x864, 0, NO_PAD_CTRL) | ||
473 | #define MX35_PAD_HCKT__IPU_CSI_D_2 IOMUX_PAD(0x598, 0x154, 6, 0x938, 0, NO_PAD_CTRL) | ||
474 | #define MX35_PAD_HCKT__KPP_COL_3 IOMUX_PAD(0x598, 0x154, 7, 0x95c, 1, NO_PAD_CTRL) | ||
475 | |||
476 | #define MX35_PAD_TX5_RX0__ESAI_TX5_RX0 IOMUX_PAD(0x59c, 0x158, 0, 0x0, 0, NO_PAD_CTRL) | ||
477 | #define MX35_PAD_TX5_RX0__AUDMUX_AUD4_RXC IOMUX_PAD(0x59c, 0x158, 1, 0x0, 0, NO_PAD_CTRL) | ||
478 | #define MX35_PAD_TX5_RX0__CSPI2_SS2 IOMUX_PAD(0x59c, 0x158, 2, 0x7f8, 1, NO_PAD_CTRL) | ||
479 | #define MX35_PAD_TX5_RX0__CAN2_TXCAN IOMUX_PAD(0x59c, 0x158, 3, 0x0, 0, NO_PAD_CTRL) | ||
480 | #define MX35_PAD_TX5_RX0__UART2_DTR IOMUX_PAD(0x59c, 0x158, 4, 0x0, 0, NO_PAD_CTRL) | ||
481 | #define MX35_PAD_TX5_RX0__GPIO1_10 IOMUX_PAD(0x59c, 0x158, 5, 0x830, 0, NO_PAD_CTRL) | ||
482 | #define MX35_PAD_TX5_RX0__EMI_M3IF_CHOSEN_MASTER_0 IOMUX_PAD(0x59c, 0x158, 7, 0x0, 0, NO_PAD_CTRL) | ||
483 | |||
484 | #define MX35_PAD_TX4_RX1__ESAI_TX4_RX1 IOMUX_PAD(0x5a0, 0x15c, 0, 0x0, 0, NO_PAD_CTRL) | ||
485 | #define MX35_PAD_TX4_RX1__AUDMUX_AUD4_RXFS IOMUX_PAD(0x5a0, 0x15c, 1, 0x0, 0, NO_PAD_CTRL) | ||
486 | #define MX35_PAD_TX4_RX1__CSPI2_SS3 IOMUX_PAD(0x5a0, 0x15c, 2, 0x7fc, 0, NO_PAD_CTRL) | ||
487 | #define MX35_PAD_TX4_RX1__CAN2_RXCAN IOMUX_PAD(0x5a0, 0x15c, 3, 0x7cc, 0, NO_PAD_CTRL) | ||
488 | #define MX35_PAD_TX4_RX1__UART2_DSR IOMUX_PAD(0x5a0, 0x15c, 4, 0x0, 0, NO_PAD_CTRL) | ||
489 | #define MX35_PAD_TX4_RX1__GPIO1_11 IOMUX_PAD(0x5a0, 0x15c, 5, 0x834, 0, NO_PAD_CTRL) | ||
490 | #define MX35_PAD_TX4_RX1__IPU_CSI_D_3 IOMUX_PAD(0x5a0, 0x15c, 6, 0x93c, 0, NO_PAD_CTRL) | ||
491 | #define MX35_PAD_TX4_RX1__KPP_ROW_0 IOMUX_PAD(0x5a0, 0x15c, 7, 0x970, 1, NO_PAD_CTRL) | ||
492 | |||
493 | #define MX35_PAD_TX3_RX2__ESAI_TX3_RX2 IOMUX_PAD(0x5a4, 0x160, 0, 0x0, 0, NO_PAD_CTRL) | ||
494 | #define MX35_PAD_TX3_RX2__I2C3_SCL IOMUX_PAD(0x5a4, 0x160, 1, 0x91c, 0, NO_PAD_CTRL) | ||
495 | #define MX35_PAD_TX3_RX2__EMI_NANDF_CE1 IOMUX_PAD(0x5a4, 0x160, 3, 0x0, 0, NO_PAD_CTRL) | ||
496 | #define MX35_PAD_TX3_RX2__GPIO1_12 IOMUX_PAD(0x5a4, 0x160, 5, 0x0, 0, NO_PAD_CTRL) | ||
497 | #define MX35_PAD_TX3_RX2__IPU_CSI_D_4 IOMUX_PAD(0x5a4, 0x160, 6, 0x940, 0, NO_PAD_CTRL) | ||
498 | #define MX35_PAD_TX3_RX2__KPP_ROW_1 IOMUX_PAD(0x5a4, 0x160, 7, 0x974, 1, NO_PAD_CTRL) | ||
499 | |||
500 | #define MX35_PAD_TX2_RX3__ESAI_TX2_RX3 IOMUX_PAD(0x5a8, 0x164, 0, 0x0, 0, NO_PAD_CTRL) | ||
501 | #define MX35_PAD_TX2_RX3__I2C3_SDA IOMUX_PAD(0x5a8, 0x164, 1, 0x920, 0, NO_PAD_CTRL) | ||
502 | #define MX35_PAD_TX2_RX3__EMI_NANDF_CE2 IOMUX_PAD(0x5a8, 0x164, 3, 0x0, 0, NO_PAD_CTRL) | ||
503 | #define MX35_PAD_TX2_RX3__GPIO1_13 IOMUX_PAD(0x5a8, 0x164, 5, 0x0, 0, NO_PAD_CTRL) | ||
504 | #define MX35_PAD_TX2_RX3__IPU_CSI_D_5 IOMUX_PAD(0x5a8, 0x164, 6, 0x944, 0, NO_PAD_CTRL) | ||
505 | #define MX35_PAD_TX2_RX3__KPP_COL_0 IOMUX_PAD(0x5a8, 0x164, 7, 0x950, 1, NO_PAD_CTRL) | ||
506 | |||
507 | #define MX35_PAD_TX1__ESAI_TX1 IOMUX_PAD(0x5ac, 0x168, 0, 0x0, 0, NO_PAD_CTRL) | ||
508 | #define MX35_PAD_TX1__CCM_PMIC_RDY IOMUX_PAD(0x5ac, 0x168, 1, 0x7d4, 1, NO_PAD_CTRL) | ||
509 | #define MX35_PAD_TX1__CSPI1_SS2 IOMUX_PAD(0x5ac, 0x168, 2, 0x7d8, 2, NO_PAD_CTRL) | ||
510 | #define MX35_PAD_TX1__EMI_NANDF_CE3 IOMUX_PAD(0x5ac, 0x168, 3, 0x0, 0, NO_PAD_CTRL) | ||
511 | #define MX35_PAD_TX1__UART2_RI IOMUX_PAD(0x5ac, 0x168, 4, 0x0, 0, NO_PAD_CTRL) | ||
512 | #define MX35_PAD_TX1__GPIO1_14 IOMUX_PAD(0x5ac, 0x168, 5, 0x0, 0, NO_PAD_CTRL) | ||
513 | #define MX35_PAD_TX1__IPU_CSI_D_6 IOMUX_PAD(0x5ac, 0x168, 6, 0x948, 0, NO_PAD_CTRL) | ||
514 | #define MX35_PAD_TX1__KPP_COL_1 IOMUX_PAD(0x5ac, 0x168, 7, 0x954, 1, NO_PAD_CTRL) | ||
515 | |||
516 | #define MX35_PAD_TX0__ESAI_TX0 IOMUX_PAD(0x5b0, 0x16c, 0, 0x0, 0, NO_PAD_CTRL) | ||
517 | #define MX35_PAD_TX0__SPDIF_SPDIF_EXTCLK IOMUX_PAD(0x5b0, 0x16c, 1, 0x994, 1, NO_PAD_CTRL) | ||
518 | #define MX35_PAD_TX0__CSPI1_SS3 IOMUX_PAD(0x5b0, 0x16c, 2, 0x7dc, 0, NO_PAD_CTRL) | ||
519 | #define MX35_PAD_TX0__EMI_DTACK_B IOMUX_PAD(0x5b0, 0x16c, 3, 0x800, 1, NO_PAD_CTRL) | ||
520 | #define MX35_PAD_TX0__UART2_DCD IOMUX_PAD(0x5b0, 0x16c, 4, 0x0, 0, NO_PAD_CTRL) | ||
521 | #define MX35_PAD_TX0__GPIO1_15 IOMUX_PAD(0x5b0, 0x16c, 5, 0x0, 0, NO_PAD_CTRL) | ||
522 | #define MX35_PAD_TX0__IPU_CSI_D_7 IOMUX_PAD(0x5b0, 0x16c, 6, 0x94c, 0, NO_PAD_CTRL) | ||
523 | #define MX35_PAD_TX0__KPP_COL_2 IOMUX_PAD(0x5b0, 0x16c, 7, 0x958, 1, NO_PAD_CTRL) | ||
524 | |||
525 | #define MX35_PAD_CSPI1_MOSI__CSPI1_MOSI IOMUX_PAD(0x5b4, 0x170, 0, 0x0, 0, NO_PAD_CTRL) | ||
526 | #define MX35_PAD_CSPI1_MOSI__GPIO1_16 IOMUX_PAD(0x5b4, 0x170, 5, 0x0, 0, NO_PAD_CTRL) | ||
527 | #define MX35_PAD_CSPI1_MOSI__ECT_CTI_TRIG_OUT1_2 IOMUX_PAD(0x5b4, 0x170, 7, 0x0, 0, NO_PAD_CTRL) | ||
528 | |||
529 | #define MX35_PAD_CSPI1_MISO__CSPI1_MISO IOMUX_PAD(0x5b8, 0x174, 0, 0x0, 0, NO_PAD_CTRL) | ||
530 | #define MX35_PAD_CSPI1_MISO__GPIO1_17 IOMUX_PAD(0x5b8, 0x174, 5, 0x0, 0, NO_PAD_CTRL) | ||
531 | #define MX35_PAD_CSPI1_MISO__ECT_CTI_TRIG_OUT1_3 IOMUX_PAD(0x5b8, 0x174, 7, 0x0, 0, NO_PAD_CTRL) | ||
532 | |||
533 | #define MX35_PAD_CSPI1_SS0__CSPI1_SS0 IOMUX_PAD(0x5bc, 0x178, 0, 0x0, 0, NO_PAD_CTRL) | ||
534 | #define MX35_PAD_CSPI1_SS0__OWIRE_LINE IOMUX_PAD(0x5bc, 0x178, 1, 0x990, 1, NO_PAD_CTRL) | ||
535 | #define MX35_PAD_CSPI1_SS0__CSPI2_SS3 IOMUX_PAD(0x5bc, 0x178, 2, 0x7fc, 1, NO_PAD_CTRL) | ||
536 | #define MX35_PAD_CSPI1_SS0__GPIO1_18 IOMUX_PAD(0x5bc, 0x178, 5, 0x0, 0, NO_PAD_CTRL) | ||
537 | #define MX35_PAD_CSPI1_SS0__ECT_CTI_TRIG_OUT1_4 IOMUX_PAD(0x5bc, 0x178, 7, 0x0, 0, NO_PAD_CTRL) | ||
538 | |||
539 | #define MX35_PAD_CSPI1_SS1__CSPI1_SS1 IOMUX_PAD(0x5c0, 0x17c, 0, 0x0, 0, NO_PAD_CTRL) | ||
540 | #define MX35_PAD_CSPI1_SS1__PWM_PWMO IOMUX_PAD(0x5c0, 0x17c, 1, 0x0, 0, NO_PAD_CTRL) | ||
541 | #define MX35_PAD_CSPI1_SS1__CCM_CLK32K IOMUX_PAD(0x5c0, 0x17c, 2, 0x7d0, 1, NO_PAD_CTRL) | ||
542 | #define MX35_PAD_CSPI1_SS1__GPIO1_19 IOMUX_PAD(0x5c0, 0x17c, 5, 0x0, 0, NO_PAD_CTRL) | ||
543 | #define MX35_PAD_CSPI1_SS1__IPU_DIAGB_29 IOMUX_PAD(0x5c0, 0x17c, 6, 0x0, 0, NO_PAD_CTRL) | ||
544 | #define MX35_PAD_CSPI1_SS1__ECT_CTI_TRIG_OUT1_5 IOMUX_PAD(0x5c0, 0x17c, 7, 0x0, 0, NO_PAD_CTRL) | ||
545 | |||
546 | #define MX35_PAD_CSPI1_SCLK__CSPI1_SCLK IOMUX_PAD(0x5c4, 0x180, 0, 0x0, 0, NO_PAD_CTRL) | ||
547 | #define MX35_PAD_CSPI1_SCLK__GPIO3_4 IOMUX_PAD(0x5c4, 0x180, 5, 0x904, 0, NO_PAD_CTRL) | ||
548 | #define MX35_PAD_CSPI1_SCLK__IPU_DIAGB_30 IOMUX_PAD(0x5c4, 0x180, 6, 0x0, 0, NO_PAD_CTRL) | ||
549 | #define MX35_PAD_CSPI1_SCLK__EMI_M3IF_CHOSEN_MASTER_1 IOMUX_PAD(0x5c4, 0x180, 7, 0x0, 0, NO_PAD_CTRL) | ||
550 | |||
551 | #define MX35_PAD_CSPI1_SPI_RDY__CSPI1_RDY IOMUX_PAD(0x5c8, 0x184, 0, 0x0, 0, NO_PAD_CTRL) | ||
552 | #define MX35_PAD_CSPI1_SPI_RDY__GPIO3_5 IOMUX_PAD(0x5c8, 0x184, 5, 0x908, 0, NO_PAD_CTRL) | ||
553 | #define MX35_PAD_CSPI1_SPI_RDY__IPU_DIAGB_31 IOMUX_PAD(0x5c8, 0x184, 6, 0x0, 0, NO_PAD_CTRL) | ||
554 | #define MX35_PAD_CSPI1_SPI_RDY__EMI_M3IF_CHOSEN_MASTER_2 IOMUX_PAD(0x5c8, 0x184, 7, 0x0, 0, NO_PAD_CTRL) | ||
555 | |||
556 | #define MX35_PAD_RXD1__UART1_RXD_MUX IOMUX_PAD(0x5cc, 0x188, 0, 0x0, 0, NO_PAD_CTRL) | ||
557 | #define MX35_PAD_RXD1__CSPI2_MOSI IOMUX_PAD(0x5cc, 0x188, 1, 0x7ec, 1, NO_PAD_CTRL) | ||
558 | #define MX35_PAD_RXD1__KPP_COL_4 IOMUX_PAD(0x5cc, 0x188, 4, 0x960, 0, NO_PAD_CTRL) | ||
559 | #define MX35_PAD_RXD1__GPIO3_6 IOMUX_PAD(0x5cc, 0x188, 5, 0x90c, 0, NO_PAD_CTRL) | ||
560 | #define MX35_PAD_RXD1__ARM11P_TOP_EVNTBUS_16 IOMUX_PAD(0x5cc, 0x188, 7, 0x0, 0, NO_PAD_CTRL) | ||
561 | |||
562 | #define MX35_PAD_TXD1__UART1_TXD_MUX IOMUX_PAD(0x5d0, 0x18c, 0, 0x0, 0, NO_PAD_CTRL) | ||
563 | #define MX35_PAD_TXD1__CSPI2_MISO IOMUX_PAD(0x5d0, 0x18c, 1, 0x7e8, 1, NO_PAD_CTRL) | ||
564 | #define MX35_PAD_TXD1__KPP_COL_5 IOMUX_PAD(0x5d0, 0x18c, 4, 0x964, 0, NO_PAD_CTRL) | ||
565 | #define MX35_PAD_TXD1__GPIO3_7 IOMUX_PAD(0x5d0, 0x18c, 5, 0x910, 0, NO_PAD_CTRL) | ||
566 | #define MX35_PAD_TXD1__ARM11P_TOP_EVNTBUS_17 IOMUX_PAD(0x5d0, 0x18c, 7, 0x0, 0, NO_PAD_CTRL) | ||
567 | |||
568 | #define MX35_PAD_RTS1__UART1_RTS IOMUX_PAD(0x5d4, 0x190, 0, 0x0, 0, NO_PAD_CTRL) | ||
569 | #define MX35_PAD_RTS1__CSPI2_SCLK IOMUX_PAD(0x5d4, 0x190, 1, 0x7e0, 1, NO_PAD_CTRL) | ||
570 | #define MX35_PAD_RTS1__I2C3_SCL IOMUX_PAD(0x5d4, 0x190, 2, 0x91c, 1, NO_PAD_CTRL) | ||
571 | #define MX35_PAD_RTS1__IPU_CSI_D_0 IOMUX_PAD(0x5d4, 0x190, 3, 0x930, 1, NO_PAD_CTRL) | ||
572 | #define MX35_PAD_RTS1__KPP_COL_6 IOMUX_PAD(0x5d4, 0x190, 4, 0x968, 0, NO_PAD_CTRL) | ||
573 | #define MX35_PAD_RTS1__GPIO3_8 IOMUX_PAD(0x5d4, 0x190, 5, 0x914, 0, NO_PAD_CTRL) | ||
574 | #define MX35_PAD_RTS1__EMI_NANDF_CE1 IOMUX_PAD(0x5d4, 0x190, 6, 0x0, 0, NO_PAD_CTRL) | ||
575 | #define MX35_PAD_RTS1__ARM11P_TOP_EVNTBUS_18 IOMUX_PAD(0x5d4, 0x190, 7, 0x0, 0, NO_PAD_CTRL) | ||
576 | |||
577 | #define MX35_PAD_CTS1__UART1_CTS IOMUX_PAD(0x5d8, 0x194, 0, 0x0, 0, NO_PAD_CTRL) | ||
578 | #define MX35_PAD_CTS1__CSPI2_RDY IOMUX_PAD(0x5d8, 0x194, 1, 0x7e4, 1, NO_PAD_CTRL) | ||
579 | #define MX35_PAD_CTS1__I2C3_SDA IOMUX_PAD(0x5d8, 0x194, 2, 0x920, 1, NO_PAD_CTRL) | ||
580 | #define MX35_PAD_CTS1__IPU_CSI_D_1 IOMUX_PAD(0x5d8, 0x194, 3, 0x934, 1, NO_PAD_CTRL) | ||
581 | #define MX35_PAD_CTS1__KPP_COL_7 IOMUX_PAD(0x5d8, 0x194, 4, 0x96c, 0, NO_PAD_CTRL) | ||
582 | #define MX35_PAD_CTS1__GPIO3_9 IOMUX_PAD(0x5d8, 0x194, 5, 0x918, 0, NO_PAD_CTRL) | ||
583 | #define MX35_PAD_CTS1__EMI_NANDF_CE2 IOMUX_PAD(0x5d8, 0x194, 6, 0x0, 0, NO_PAD_CTRL) | ||
584 | #define MX35_PAD_CTS1__ARM11P_TOP_EVNTBUS_19 IOMUX_PAD(0x5d8, 0x194, 7, 0x0, 0, NO_PAD_CTRL) | ||
585 | |||
586 | #define MX35_PAD_RXD2__UART2_RXD_MUX IOMUX_PAD(0x5dc, 0x198, 0, 0x0, 0, NO_PAD_CTRL) | ||
587 | #define MX35_PAD_RXD2__KPP_ROW_4 IOMUX_PAD(0x5dc, 0x198, 4, 0x980, 0, NO_PAD_CTRL) | ||
588 | #define MX35_PAD_RXD2__GPIO3_10 IOMUX_PAD(0x5dc, 0x198, 5, 0x8ec, 0, NO_PAD_CTRL) | ||
589 | |||
590 | #define MX35_PAD_TXD2__UART2_TXD_MUX IOMUX_PAD(0x5e0, 0x19c, 0, 0x0, 0, NO_PAD_CTRL) | ||
591 | #define MX35_PAD_TXD2__SPDIF_SPDIF_EXTCLK IOMUX_PAD(0x5e0, 0x19c, 1, 0x994, 2, NO_PAD_CTRL) | ||
592 | #define MX35_PAD_TXD2__KPP_ROW_5 IOMUX_PAD(0x5e0, 0x19c, 4, 0x984, 0, NO_PAD_CTRL) | ||
593 | #define MX35_PAD_TXD2__GPIO3_11 IOMUX_PAD(0x5e0, 0x19c, 5, 0x8f0, 0, NO_PAD_CTRL) | ||
594 | |||
595 | #define MX35_PAD_RTS2__UART2_RTS IOMUX_PAD(0x5e4, 0x1a0, 0, 0x0, 0, NO_PAD_CTRL) | ||
596 | #define MX35_PAD_RTS2__SPDIF_SPDIF_IN1 IOMUX_PAD(0x5e4, 0x1a0, 1, 0x998, 1, NO_PAD_CTRL) | ||
597 | #define MX35_PAD_RTS2__CAN2_RXCAN IOMUX_PAD(0x5e4, 0x1a0, 2, 0x7cc, 1, NO_PAD_CTRL) | ||
598 | #define MX35_PAD_RTS2__IPU_CSI_D_2 IOMUX_PAD(0x5e4, 0x1a0, 3, 0x938, 1, NO_PAD_CTRL) | ||
599 | #define MX35_PAD_RTS2__KPP_ROW_6 IOMUX_PAD(0x5e4, 0x1a0, 4, 0x988, 0, NO_PAD_CTRL) | ||
600 | #define MX35_PAD_RTS2__GPIO3_12 IOMUX_PAD(0x5e4, 0x1a0, 5, 0x8f4, 0, NO_PAD_CTRL) | ||
601 | #define MX35_PAD_RTS2__AUDMUX_AUD5_RXC IOMUX_PAD(0x5e4, 0x1a0, 6, 0x0, 0, NO_PAD_CTRL) | ||
602 | #define MX35_PAD_RTS2__UART3_RXD_MUX IOMUX_PAD(0x5e4, 0x1a0, 7, 0x9a0, 0, NO_PAD_CTRL) | ||
603 | |||
604 | #define MX35_PAD_CTS2__UART2_CTS IOMUX_PAD(0x5e8, 0x1a4, 0, 0x0, 0, NO_PAD_CTRL) | ||
605 | #define MX35_PAD_CTS2__SPDIF_SPDIF_OUT1 IOMUX_PAD(0x5e8, 0x1a4, 1, 0x0, 0, NO_PAD_CTRL) | ||
606 | #define MX35_PAD_CTS2__CAN2_TXCAN IOMUX_PAD(0x5e8, 0x1a4, 2, 0x0, 0, NO_PAD_CTRL) | ||
607 | #define MX35_PAD_CTS2__IPU_CSI_D_3 IOMUX_PAD(0x5e8, 0x1a4, 3, 0x93c, 1, NO_PAD_CTRL) | ||
608 | #define MX35_PAD_CTS2__KPP_ROW_7 IOMUX_PAD(0x5e8, 0x1a4, 4, 0x98c, 0, NO_PAD_CTRL) | ||
609 | #define MX35_PAD_CTS2__GPIO3_13 IOMUX_PAD(0x5e8, 0x1a4, 5, 0x8f8, 0, NO_PAD_CTRL) | ||
610 | #define MX35_PAD_CTS2__AUDMUX_AUD5_RXFS IOMUX_PAD(0x5e8, 0x1a4, 6, 0x0, 0, NO_PAD_CTRL) | ||
611 | #define MX35_PAD_CTS2__UART3_TXD_MUX IOMUX_PAD(0x5e8, 0x1a4, 7, 0x0, 0, NO_PAD_CTRL) | ||
612 | |||
613 | #define MX35_PAD_RTCK__ARM11P_TOP_RTCK IOMUX_PAD(0x5ec, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
614 | |||
615 | #define MX35_PAD_TCK__SJC_TCK IOMUX_PAD(0x5f0, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
616 | |||
617 | #define MX35_PAD_TMS__SJC_TMS IOMUX_PAD(0x5f4, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
618 | |||
619 | #define MX35_PAD_TDI__SJC_TDI IOMUX_PAD(0x5f8, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
620 | |||
621 | #define MX35_PAD_TDO__SJC_TDO IOMUX_PAD(0x5fc, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
622 | |||
623 | #define MX35_PAD_TRSTB__SJC_TRSTB IOMUX_PAD(0x600, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
624 | |||
625 | #define MX35_PAD_DE_B__SJC_DE_B IOMUX_PAD(0x604, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
626 | |||
627 | #define MX35_PAD_SJC_MOD__SJC_MOD IOMUX_PAD(0x608, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
628 | |||
629 | #define MX35_PAD_USBOTG_PWR__USB_TOP_USBOTG_PWR IOMUX_PAD(0x60c, 0x1a8, 0, 0x0, 0, NO_PAD_CTRL) | ||
630 | #define MX35_PAD_USBOTG_PWR__USB_TOP_USBH2_PWR IOMUX_PAD(0x60c, 0x1a8, 1, 0x0, 0, NO_PAD_CTRL) | ||
631 | #define MX35_PAD_USBOTG_PWR__GPIO3_14 IOMUX_PAD(0x60c, 0x1a8, 5, 0x8fc, 0, NO_PAD_CTRL) | ||
632 | |||
633 | #define MX35_PAD_USBOTG_OC__USB_TOP_USBOTG_OC IOMUX_PAD(0x610, 0x1ac, 0, 0x0, 0, NO_PAD_CTRL) | ||
634 | #define MX35_PAD_USBOTG_OC__USB_TOP_USBH2_OC IOMUX_PAD(0x610, 0x1ac, 1, 0x9f4, 1, NO_PAD_CTRL) | ||
635 | #define MX35_PAD_USBOTG_OC__GPIO3_15 IOMUX_PAD(0x610, 0x1ac, 5, 0x900, 0, NO_PAD_CTRL) | ||
636 | |||
637 | #define MX35_PAD_LD0__IPU_DISPB_DAT_0 IOMUX_PAD(0x614, 0x1b0, 0, 0x0, 0, NO_PAD_CTRL) | ||
638 | #define MX35_PAD_LD0__GPIO2_0 IOMUX_PAD(0x614, 0x1b0, 5, 0x868, 1, NO_PAD_CTRL) | ||
639 | #define MX35_PAD_LD0__SDMA_SDMA_DEBUG_PC_0 IOMUX_PAD(0x614, 0x1b0, 6, 0x0, 0, NO_PAD_CTRL) | ||
640 | |||
641 | #define MX35_PAD_LD1__IPU_DISPB_DAT_1 IOMUX_PAD(0x618, 0x1b4, 0, 0x0, 0, NO_PAD_CTRL) | ||
642 | #define MX35_PAD_LD1__GPIO2_1 IOMUX_PAD(0x618, 0x1b4, 5, 0x894, 0, NO_PAD_CTRL) | ||
643 | #define MX35_PAD_LD1__SDMA_SDMA_DEBUG_PC_1 IOMUX_PAD(0x618, 0x1b4, 6, 0x0, 0, NO_PAD_CTRL) | ||
644 | |||
645 | #define MX35_PAD_LD2__IPU_DISPB_DAT_2 IOMUX_PAD(0x61c, 0x1b8, 0, 0x0, 0, NO_PAD_CTRL) | ||
646 | #define MX35_PAD_LD2__GPIO2_2 IOMUX_PAD(0x61c, 0x1b8, 5, 0x8c0, 0, NO_PAD_CTRL) | ||
647 | #define MX35_PAD_LD2__SDMA_SDMA_DEBUG_PC_2 IOMUX_PAD(0x61c, 0x1b8, 6, 0x0, 0, NO_PAD_CTRL) | ||
648 | |||
649 | #define MX35_PAD_LD3__IPU_DISPB_DAT_3 IOMUX_PAD(0x620, 0x1bc, 0, 0x0, 0, NO_PAD_CTRL) | ||
650 | #define MX35_PAD_LD3__GPIO2_3 IOMUX_PAD(0x620, 0x1bc, 5, 0x8cc, 0, NO_PAD_CTRL) | ||
651 | #define MX35_PAD_LD3__SDMA_SDMA_DEBUG_PC_3 IOMUX_PAD(0x620, 0x1bc, 6, 0x0, 0, NO_PAD_CTRL) | ||
652 | |||
653 | #define MX35_PAD_LD4__IPU_DISPB_DAT_4 IOMUX_PAD(0x624, 0x1c0, 0, 0x0, 0, NO_PAD_CTRL) | ||
654 | #define MX35_PAD_LD4__GPIO2_4 IOMUX_PAD(0x624, 0x1c0, 5, 0x8d0, 0, NO_PAD_CTRL) | ||
655 | #define MX35_PAD_LD4__SDMA_SDMA_DEBUG_PC_4 IOMUX_PAD(0x624, 0x1c0, 6, 0x0, 0, NO_PAD_CTRL) | ||
656 | |||
657 | #define MX35_PAD_LD5__IPU_DISPB_DAT_5 IOMUX_PAD(0x628, 0x1c4, 0, 0x0, 0, NO_PAD_CTRL) | ||
658 | #define MX35_PAD_LD5__GPIO2_5 IOMUX_PAD(0x628, 0x1c4, 5, 0x8d4, 0, NO_PAD_CTRL) | ||
659 | #define MX35_PAD_LD5__SDMA_SDMA_DEBUG_PC_5 IOMUX_PAD(0x628, 0x1c4, 6, 0x0, 0, NO_PAD_CTRL) | ||
660 | |||
661 | #define MX35_PAD_LD6__IPU_DISPB_DAT_6 IOMUX_PAD(0x62c, 0x1c8, 0, 0x0, 0, NO_PAD_CTRL) | ||
662 | #define MX35_PAD_LD6__GPIO2_6 IOMUX_PAD(0x62c, 0x1c8, 5, 0x8d8, 0, NO_PAD_CTRL) | ||
663 | #define MX35_PAD_LD6__SDMA_SDMA_DEBUG_PC_6 IOMUX_PAD(0x62c, 0x1c8, 6, 0x0, 0, NO_PAD_CTRL) | ||
664 | |||
665 | #define MX35_PAD_LD7__IPU_DISPB_DAT_7 IOMUX_PAD(0x630, 0x1cc, 0, 0x0, 0, NO_PAD_CTRL) | ||
666 | #define MX35_PAD_LD7__GPIO2_7 IOMUX_PAD(0x630, 0x1cc, 5, 0x8dc, 0, NO_PAD_CTRL) | ||
667 | #define MX35_PAD_LD7__SDMA_SDMA_DEBUG_PC_7 IOMUX_PAD(0x630, 0x1cc, 6, 0x0, 0, NO_PAD_CTRL) | ||
668 | |||
669 | #define MX35_PAD_LD8__IPU_DISPB_DAT_8 IOMUX_PAD(0x634, 0x1d0, 0, 0x0, 0, NO_PAD_CTRL) | ||
670 | #define MX35_PAD_LD8__GPIO2_8 IOMUX_PAD(0x634, 0x1d0, 5, 0x8e0, 0, NO_PAD_CTRL) | ||
671 | #define MX35_PAD_LD8__SDMA_SDMA_DEBUG_PC_8 IOMUX_PAD(0x634, 0x1d0, 6, 0x0, 0, NO_PAD_CTRL) | ||
672 | |||
673 | #define MX35_PAD_LD9__IPU_DISPB_DAT_9 IOMUX_PAD(0x638, 0x1d4, 0, 0x0, 0, NO_PAD_CTRL) | ||
674 | #define MX35_PAD_LD9__GPIO2_9 IOMUX_PAD(0x638, 0x1d4, 5, 0x8e4 0, NO_PAD_CTRL) | ||
675 | #define MX35_PAD_LD9__SDMA_SDMA_DEBUG_PC_9 IOMUX_PAD(0x638, 0x1d4, 6, 0x0, 0, NO_PAD_CTRL) | ||
676 | |||
677 | #define MX35_PAD_LD10__IPU_DISPB_DAT_10 IOMUX_PAD(0x63c, 0x1d8, 0, 0x0, 0, NO_PAD_CTRL) | ||
678 | #define MX35_PAD_LD10__GPIO2_10 IOMUX_PAD(0x63c, 0x1d8, 5, 0x86c, 0, NO_PAD_CTRL) | ||
679 | #define MX35_PAD_LD10__SDMA_SDMA_DEBUG_PC_10 IOMUX_PAD(0x63c, 0x1d8, 6, 0x0, 0, NO_PAD_CTRL) | ||
680 | |||
681 | #define MX35_PAD_LD11__IPU_DISPB_DAT_11 IOMUX_PAD(0x640, 0x1dc, 0, 0x0, 0, NO_PAD_CTRL) | ||
682 | #define MX35_PAD_LD11__GPIO2_11 IOMUX_PAD(0x640, 0x1dc, 5, 0x870, 0, NO_PAD_CTRL) | ||
683 | #define MX35_PAD_LD11__SDMA_SDMA_DEBUG_PC_11 IOMUX_PAD(0x640, 0x1dc, 6, 0x0, 0, NO_PAD_CTRL) | ||
684 | #define MX35_PAD_LD11__ARM11P_TOP_TRACE_4 IOMUX_PAD(0x640, 0x1dc, 7, 0x0, 0, NO_PAD_CTRL) | ||
685 | |||
686 | #define MX35_PAD_LD12__IPU_DISPB_DAT_12 IOMUX_PAD(0x644, 0x1e0, 0, 0x0, 0, NO_PAD_CTRL) | ||
687 | #define MX35_PAD_LD12__GPIO2_12 IOMUX_PAD(0x644, 0x1e0, 5, 0x874, 0, NO_PAD_CTRL) | ||
688 | #define MX35_PAD_LD12__SDMA_SDMA_DEBUG_PC_12 IOMUX_PAD(0x644, 0x1e0, 6, 0x0, 0, NO_PAD_CTRL) | ||
689 | #define MX35_PAD_LD12__ARM11P_TOP_TRACE_5 IOMUX_PAD(0x644, 0x1e0, 7, 0x0, 0, NO_PAD_CTRL) | ||
690 | |||
691 | #define MX35_PAD_LD13__IPU_DISPB_DAT_13 IOMUX_PAD(0x648, 0x1e4, 0, 0x0, 0, NO_PAD_CTRL) | ||
692 | #define MX35_PAD_LD13__GPIO2_13 IOMUX_PAD(0x648, 0x1e4, 5, 0x878, 0, NO_PAD_CTRL) | ||
693 | #define MX35_PAD_LD13__SDMA_SDMA_DEBUG_PC_13 IOMUX_PAD(0x648, 0x1e4, 6, 0x0, 0, NO_PAD_CTRL) | ||
694 | #define MX35_PAD_LD13__ARM11P_TOP_TRACE_6 IOMUX_PAD(0x648, 0x1e4, 7, 0x0, 0, NO_PAD_CTRL) | ||
695 | |||
696 | #define MX35_PAD_LD14__IPU_DISPB_DAT_14 IOMUX_PAD(0x64c, 0x1e8, 0, 0x0, 0, NO_PAD_CTRL) | ||
697 | #define MX35_PAD_LD14__GPIO2_14 IOMUX_PAD(0x64c, 0x1e8, 5, 0x87c, 0, NO_PAD_CTRL) | ||
698 | #define MX35_PAD_LD14__SDMA_SDMA_DEBUG_EVENT_CHANNEL_0 IOMUX_PAD(0x64c, 0x1e8, 6, 0x0, 0, NO_PAD_CTRL) | ||
699 | #define MX35_PAD_LD14__ARM11P_TOP_TRACE_7 IOMUX_PAD(0x64c, 0x1e8, 7, 0x0, 0, NO_PAD_CTRL) | ||
700 | |||
701 | #define MX35_PAD_LD15__IPU_DISPB_DAT_15 IOMUX_PAD(0x650, 0x1ec, 0, 0x0, 0, NO_PAD_CTRL) | ||
702 | #define MX35_PAD_LD15__GPIO2_15 IOMUX_PAD(0x650, 0x1ec, 5, 0x880, 0, NO_PAD_CTRL) | ||
703 | #define MX35_PAD_LD15__SDMA_SDMA_DEBUG_EVENT_CHANNEL_1 IOMUX_PAD(0x650, 0x1ec, 6, 0x0, 0, NO_PAD_CTRL) | ||
704 | #define MX35_PAD_LD15__ARM11P_TOP_TRACE_8 IOMUX_PAD(0x650, 0x1ec, 7, 0x0, 0, NO_PAD_CTRL) | ||
705 | |||
706 | #define MX35_PAD_LD16__IPU_DISPB_DAT_16 IOMUX_PAD(0x654, 0x1f0, 0, 0x0, 0, NO_PAD_CTRL) | ||
707 | #define MX35_PAD_LD16__IPU_DISPB_D12_VSYNC IOMUX_PAD(0x654, 0x1f0, 2, 0x928, 0, NO_PAD_CTRL) | ||
708 | #define MX35_PAD_LD16__GPIO2_16 IOMUX_PAD(0x654, 0x1f0, 5, 0x884, 0, NO_PAD_CTRL) | ||
709 | #define MX35_PAD_LD16__SDMA_SDMA_DEBUG_EVENT_CHANNEL_2 IOMUX_PAD(0x654, 0x1f0, 6, 0x0, 0, NO_PAD_CTRL) | ||
710 | #define MX35_PAD_LD16__ARM11P_TOP_TRACE_9 IOMUX_PAD(0x654, 0x1f0, 7, 0x0, 0, NO_PAD_CTRL) | ||
711 | |||
712 | #define MX35_PAD_LD17__IPU_DISPB_DAT_17 IOMUX_PAD(0x658, 0x1f4, 0, 0x0, 0, NO_PAD_CTRL) | ||
713 | #define MX35_PAD_LD17__IPU_DISPB_CS2 IOMUX_PAD(0x658, 0x1f4, 2, 0x0, 0, NO_PAD_CTRL) | ||
714 | #define MX35_PAD_LD17__GPIO2_17 IOMUX_PAD(0x658, 0x1f4, 5, 0x888, 0, NO_PAD_CTRL) | ||
715 | #define MX35_PAD_LD17__SDMA_SDMA_DEBUG_EVENT_CHANNEL_3 IOMUX_PAD(0x658, 0x1f4, 6, 0x0, 0, NO_PAD_CTRL) | ||
716 | #define MX35_PAD_LD17__ARM11P_TOP_TRACE_10 IOMUX_PAD(0x658, 0x1f4, 7, 0x0, 0, NO_PAD_CTRL) | ||
717 | |||
718 | #define MX35_PAD_LD18__IPU_DISPB_DAT_18 IOMUX_PAD(0x65c, 0x1f8, 0, 0x0, 0, NO_PAD_CTRL) | ||
719 | #define MX35_PAD_LD18__IPU_DISPB_D0_VSYNC IOMUX_PAD(0x65c, 0x1f8, 1, 0x924, 1, NO_PAD_CTRL) | ||
720 | #define MX35_PAD_LD18__IPU_DISPB_D12_VSYNC IOMUX_PAD(0x65c, 0x1f8, 2, 0x928, 1, NO_PAD_CTRL) | ||
721 | #define MX35_PAD_LD18__ESDHC3_CMD IOMUX_PAD(0x65c, 0x1f8, 3, 0x818, 0, NO_PAD_CTRL) | ||
722 | #define MX35_PAD_LD18__USB_TOP_USBOTG_DATA_3 IOMUX_PAD(0x65c, 0x1f8, 4, 0x9b0, 0, NO_PAD_CTRL) | ||
723 | #define MX35_PAD_LD18__GPIO3_24 IOMUX_PAD(0x65c, 0x1f8, 5, 0x0, 0, NO_PAD_CTRL) | ||
724 | #define MX35_PAD_LD18__SDMA_SDMA_DEBUG_EVENT_CHANNEL_4 IOMUX_PAD(0x65c, 0x1f8, 6, 0x0, 0, NO_PAD_CTRL) | ||
725 | #define MX35_PAD_LD18__ARM11P_TOP_TRACE_11 IOMUX_PAD(0x65c, 0x1f8, 7, 0x0, 0, NO_PAD_CTRL) | ||
726 | |||
727 | #define MX35_PAD_LD19__IPU_DISPB_DAT_19 IOMUX_PAD(0x660, 0x1fc, 0, 0x0, 0, NO_PAD_CTRL) | ||
728 | #define MX35_PAD_LD19__IPU_DISPB_BCLK IOMUX_PAD(0x660, 0x1fc, 1, 0x0, 0, NO_PAD_CTRL) | ||
729 | #define MX35_PAD_LD19__IPU_DISPB_CS1 IOMUX_PAD(0x660, 0x1fc, 2, 0x0, 0, NO_PAD_CTRL) | ||
730 | #define MX35_PAD_LD19__ESDHC3_CLK IOMUX_PAD(0x660, 0x1fc, 3, 0x814, 0, NO_PAD_CTRL) | ||
731 | #define MX35_PAD_LD19__USB_TOP_USBOTG_DIR IOMUX_PAD(0x660, 0x1fc, 4, 0x9c4, 0, NO_PAD_CTRL) | ||
732 | #define MX35_PAD_LD19__GPIO3_25 IOMUX_PAD(0x660, 0x1fc, 5, 0x0, 0, NO_PAD_CTRL) | ||
733 | #define MX35_PAD_LD19__SDMA_SDMA_DEBUG_EVENT_CHANNEL_5 IOMUX_PAD(0x660, 0x1fc, 6, 0x0, 0, NO_PAD_CTRL) | ||
734 | #define MX35_PAD_LD19__ARM11P_TOP_TRACE_12 IOMUX_PAD(0x660, 0x1fc, 7, 0x0, 0, NO_PAD_CTRL) | ||
735 | |||
736 | #define MX35_PAD_LD20__IPU_DISPB_DAT_20 IOMUX_PAD(0x664, 0x200, 0, 0x0, 0, NO_PAD_CTRL) | ||
737 | #define MX35_PAD_LD20__IPU_DISPB_CS0 IOMUX_PAD(0x664, 0x200, 1, 0x0, 0, NO_PAD_CTRL) | ||
738 | #define MX35_PAD_LD20__IPU_DISPB_SD_CLK IOMUX_PAD(0x664, 0x200, 2, 0x0, 0, NO_PAD_CTRL) | ||
739 | #define MX35_PAD_LD20__ESDHC3_DAT0 IOMUX_PAD(0x664, 0x200, 3, 0x81c, 0, NO_PAD_CTRL) | ||
740 | #define MX35_PAD_LD20__GPIO3_26 IOMUX_PAD(0x664, 0x200, 5, 0x0, 0, NO_PAD_CTRL) | ||
741 | #define MX35_PAD_LD20__SDMA_SDMA_DEBUG_CORE_STATUS_3 IOMUX_PAD(0x664, 0x200, 6, 0x0, 0, NO_PAD_CTRL) | ||
742 | #define MX35_PAD_LD20__ARM11P_TOP_TRACE_13 IOMUX_PAD(0x664, 0x200, 7, 0x0, 0, NO_PAD_CTRL) | ||
743 | |||
744 | #define MX35_PAD_LD21__IPU_DISPB_DAT_21 IOMUX_PAD(0x668, 0x204, 0, 0x0, 0, NO_PAD_CTRL) | ||
745 | #define MX35_PAD_LD21__IPU_DISPB_PAR_RS IOMUX_PAD(0x668, 0x204, 1, 0x0, 0, NO_PAD_CTRL) | ||
746 | #define MX35_PAD_LD21__IPU_DISPB_SER_RS IOMUX_PAD(0x668, 0x204, 2, 0x0, 0, NO_PAD_CTRL) | ||
747 | #define MX35_PAD_LD21__ESDHC3_DAT1 IOMUX_PAD(0x668, 0x204, 3, 0x820, 0, NO_PAD_CTRL) | ||
748 | #define MX35_PAD_LD21__USB_TOP_USBOTG_STP IOMUX_PAD(0x668, 0x204, 4, 0x0, 0, NO_PAD_CTRL) | ||
749 | #define MX35_PAD_LD21__GPIO3_27 IOMUX_PAD(0x668, 0x204, 5, 0x0, 0, NO_PAD_CTRL) | ||
750 | #define MX35_PAD_LD21__SDMA_DEBUG_EVENT_CHANNEL_SEL IOMUX_PAD(0x668, 0x204, 6, 0x0, 0, NO_PAD_CTRL) | ||
751 | #define MX35_PAD_LD21__ARM11P_TOP_TRACE_14 IOMUX_PAD(0x668, 0x204, 7, 0x0, 0, NO_PAD_CTRL) | ||
752 | |||
753 | #define MX35_PAD_LD22__IPU_DISPB_DAT_22 IOMUX_PAD(0x66c, 0x208, 0, 0x0, 0, NO_PAD_CTRL) | ||
754 | #define MX35_PAD_LD22__IPU_DISPB_WR IOMUX_PAD(0x66c, 0x208, 1, 0x0, 0, NO_PAD_CTRL) | ||
755 | #define MX35_PAD_LD22__IPU_DISPB_SD_D_I IOMUX_PAD(0x66c, 0x208, 2, 0x92c, 0, NO_PAD_CTRL) | ||
756 | #define MX35_PAD_LD22__ESDHC3_DAT2 IOMUX_PAD(0x66c, 0x208, 3, 0x824, 0, NO_PAD_CTRL) | ||
757 | #define MX35_PAD_LD22__USB_TOP_USBOTG_NXT IOMUX_PAD(0x66c, 0x208, 4, 0x9c8, 0, NO_PAD_CTRL) | ||
758 | #define MX35_PAD_LD22__GPIO3_28 IOMUX_PAD(0x66c, 0x208, 5, 0x0, 0, NO_PAD_CTRL) | ||
759 | #define MX35_PAD_LD22__SDMA_DEBUG_BUS_ERROR IOMUX_PAD(0x66c, 0x208, 6, 0x0, 0, NO_PAD_CTRL) | ||
760 | #define MX35_PAD_LD22__ARM11P_TOP_TRCTL IOMUX_PAD(0x66c, 0x208, 7, 0x0, 0, NO_PAD_CTRL) | ||
761 | |||
762 | #define MX35_PAD_LD23__IPU_DISPB_DAT_23 IOMUX_PAD(0x670, 0x20c, 0, 0x0, 0, NO_PAD_CTRL) | ||
763 | #define MX35_PAD_LD23__IPU_DISPB_RD IOMUX_PAD(0x670, 0x20c, 1, 0x0, 0, NO_PAD_CTRL) | ||
764 | #define MX35_PAD_LD23__IPU_DISPB_SD_D_IO IOMUX_PAD(0x670, 0x20c, 2, 0x92c, 1, NO_PAD_CTRL) | ||
765 | #define MX35_PAD_LD23__ESDHC3_DAT3 IOMUX_PAD(0x670, 0x20c, 3, 0x828, 0, NO_PAD_CTRL) | ||
766 | #define MX35_PAD_LD23__USB_TOP_USBOTG_DATA_7 IOMUX_PAD(0x670, 0x20c, 4, 0x9c0, 0, NO_PAD_CTRL) | ||
767 | #define MX35_PAD_LD23__GPIO3_29 IOMUX_PAD(0x670, 0x20c, 5, 0x0, 0, NO_PAD_CTRL) | ||
768 | #define MX35_PAD_LD23__SDMA_DEBUG_MATCHED_DMBUS IOMUX_PAD(0x670, 0x20c, 6, 0x0, 0, NO_PAD_CTRL) | ||
769 | #define MX35_PAD_LD23__ARM11P_TOP_TRCLK IOMUX_PAD(0x670, 0x20c, 7, 0x0, 0, NO_PAD_CTRL) | ||
770 | |||
771 | #define MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC IOMUX_PAD(0x674, 0x210, 0, 0x0, 0, NO_PAD_CTRL) | ||
772 | #define MX35_PAD_D3_HSYNC__IPU_DISPB_SD_D_IO IOMUX_PAD(0x674, 0x210, 2, 0x92c, 2, NO_PAD_CTRL) | ||
773 | #define MX35_PAD_D3_HSYNC__GPIO3_30 IOMUX_PAD(0x674, 0x210, 5, 0x0, 0, NO_PAD_CTRL) | ||
774 | #define MX35_PAD_D3_HSYNC__SDMA_DEBUG_RTBUFFER_WRITE IOMUX_PAD(0x674, 0x210, 6, 0x0, 0, NO_PAD_CTRL) | ||
775 | #define MX35_PAD_D3_HSYNC__ARM11P_TOP_TRACE_15 IOMUX_PAD(0x674, 0x210, 7, 0x0, 0, NO_PAD_CTRL) | ||
776 | |||
777 | #define MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK IOMUX_PAD(0x678, 0x214, 0, 0x0, 0, NO_PAD_CTRL) | ||
778 | #define MX35_PAD_D3_FPSHIFT__IPU_DISPB_SD_CLK IOMUX_PAD(0x678, 0x214, 2, 0x0, 0, NO_PAD_CTRL) | ||
779 | #define MX35_PAD_D3_FPSHIFT__GPIO3_31 IOMUX_PAD(0x678, 0x214, 5, 0x0, 0, NO_PAD_CTRL) | ||
780 | #define MX35_PAD_D3_FPSHIFT__SDMA_SDMA_DEBUG_CORE_STATUS_0 IOMUX_PAD(0x678, 0x214, 6, 0x0, 0, NO_PAD_CTRL) | ||
781 | #define MX35_PAD_D3_FPSHIFT__ARM11P_TOP_TRACE_16 IOMUX_PAD(0x678, 0x214, 7, 0x0, 0, NO_PAD_CTRL) | ||
782 | |||
783 | #define MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY IOMUX_PAD(0x67c, 0x218, 0, 0x0, 0, NO_PAD_CTRL) | ||
784 | #define MX35_PAD_D3_DRDY__IPU_DISPB_SD_D_O IOMUX_PAD(0x67c, 0x218, 2, 0x0, 0, NO_PAD_CTRL) | ||
785 | #define MX35_PAD_D3_DRDY__GPIO1_0 IOMUX_PAD(0x67c, 0x218, 5, 0x82c, 2, NO_PAD_CTRL) | ||
786 | #define MX35_PAD_D3_DRDY__SDMA_SDMA_DEBUG_CORE_STATUS_1 IOMUX_PAD(0x67c, 0x218, 6, 0x0, 0, NO_PAD_CTRL) | ||
787 | #define MX35_PAD_D3_DRDY__ARM11P_TOP_TRACE_17 IOMUX_PAD(0x67c, 0x218, 7, 0x0, 0, NO_PAD_CTRL) | ||
788 | |||
789 | #define MX35_PAD_CONTRAST__IPU_DISPB_CONTR IOMUX_PAD(0x680, 0x21c, 0, 0x0, 0, NO_PAD_CTRL) | ||
790 | #define MX35_PAD_CONTRAST__GPIO1_1 IOMUX_PAD(0x680, 0x21c, 5, 0x838, 2, NO_PAD_CTRL) | ||
791 | #define MX35_PAD_CONTRAST__SDMA_SDMA_DEBUG_CORE_STATUS_2 IOMUX_PAD(0x680, 0x21c, 6, 0x0, 0, NO_PAD_CTRL) | ||
792 | #define MX35_PAD_CONTRAST__ARM11P_TOP_TRACE_18 IOMUX_PAD(0x680, 0x21c, 7, 0x0, 0, NO_PAD_CTRL) | ||
793 | |||
794 | #define MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC IOMUX_PAD(0x684, 0x220, 0, 0x0, 0, NO_PAD_CTRL) | ||
795 | #define MX35_PAD_D3_VSYNC__IPU_DISPB_CS1 IOMUX_PAD(0x684, 0x220, 2, 0x0, 0, NO_PAD_CTRL) | ||
796 | #define MX35_PAD_D3_VSYNC__GPIO1_2 IOMUX_PAD(0x684, 0x220, 5, 0x848, 1, NO_PAD_CTRL) | ||
797 | #define MX35_PAD_D3_VSYNC__SDMA_DEBUG_YIELD IOMUX_PAD(0x684, 0x220, 6, 0x0, 0, NO_PAD_CTRL) | ||
798 | #define MX35_PAD_D3_VSYNC__ARM11P_TOP_TRACE_19 IOMUX_PAD(0x684, 0x220, 7, 0x0, 0, NO_PAD_CTRL) | ||
799 | |||
800 | #define MX35_PAD_D3_REV__IPU_DISPB_D3_REV IOMUX_PAD(0x688, 0x224, 0, 0x0, 0, NO_PAD_CTRL) | ||
801 | #define MX35_PAD_D3_REV__IPU_DISPB_SER_RS IOMUX_PAD(0x688, 0x224, 2, 0x0, 0, NO_PAD_CTRL) | ||
802 | #define MX35_PAD_D3_REV__GPIO1_3 IOMUX_PAD(0x688, 0x224, 5, 0x84c, 1, NO_PAD_CTRL) | ||
803 | #define MX35_PAD_D3_REV__SDMA_DEBUG_BUS_RWB IOMUX_PAD(0x688, 0x224, 6, 0x0, 0, NO_PAD_CTRL) | ||
804 | #define MX35_PAD_D3_REV__ARM11P_TOP_TRACE_20 IOMUX_PAD(0x688, 0x224, 7, 0x0, 0, NO_PAD_CTRL) | ||
805 | |||
806 | #define MX35_PAD_D3_CLS__IPU_DISPB_D3_CLS IOMUX_PAD(0x68c, 0x228, 0, 0x0, 0, NO_PAD_CTRL) | ||
807 | #define MX35_PAD_D3_CLS__IPU_DISPB_CS2 IOMUX_PAD(0x68c, 0x228, 2, 0x0, 0, NO_PAD_CTRL) | ||
808 | #define MX35_PAD_D3_CLS__GPIO1_4 IOMUX_PAD(0x68c, 0x228, 5, 0x850, 2, NO_PAD_CTRL) | ||
809 | #define MX35_PAD_D3_CLS__SDMA_DEBUG_BUS_DEVICE_0 IOMUX_PAD(0x68c, 0x228, 6, 0x0, 0, NO_PAD_CTRL) | ||
810 | #define MX35_PAD_D3_CLS__ARM11P_TOP_TRACE_21 IOMUX_PAD(0x68c, 0x228, 7, 0x0, 0, NO_PAD_CTRL) | ||
811 | |||
812 | #define MX35_PAD_D3_SPL__IPU_DISPB_D3_SPL IOMUX_PAD(0x690, 0x22c, 0, 0x0, 0, NO_PAD_CTRL) | ||
813 | #define MX35_PAD_D3_SPL__IPU_DISPB_D12_VSYNC IOMUX_PAD(0x690, 0x22c, 2, 0x928, 2, NO_PAD_CTRL) | ||
814 | #define MX35_PAD_D3_SPL__GPIO1_5 IOMUX_PAD(0x690, 0x22c, 5, 0x854, 2, NO_PAD_CTRL) | ||
815 | #define MX35_PAD_D3_SPL__SDMA_DEBUG_BUS_DEVICE_1 IOMUX_PAD(0x690, 0x22c, 6, 0x0, 0, NO_PAD_CTRL) | ||
816 | #define MX35_PAD_D3_SPL__ARM11P_TOP_TRACE_22 IOMUX_PAD(0x690, 0x22c, 7, 0x0, 0, NO_PAD_CTRL) | ||
817 | |||
818 | #define MX35_PAD_SD1_CMD__ESDHC1_CMD IOMUX_PAD(0x694, 0x230, 0, 0x0, 0, NO_PAD_CTRL) | ||
819 | #define MX35_PAD_SD1_CMD__MSHC_SCLK IOMUX_PAD(0x694, 0x230, 1, 0x0, 0, NO_PAD_CTRL) | ||
820 | #define MX35_PAD_SD1_CMD__IPU_DISPB_D0_VSYNC IOMUX_PAD(0x694, 0x230, 3, 0x924, 2, NO_PAD_CTRL) | ||
821 | #define MX35_PAD_SD1_CMD__USB_TOP_USBOTG_DATA_4 IOMUX_PAD(0x694, 0x230, 4, 0x9b4, 0, NO_PAD_CTRL) | ||
822 | #define MX35_PAD_SD1_CMD__GPIO1_6 IOMUX_PAD(0x694, 0x230, 5, 0x858, 2, NO_PAD_CTRL) | ||
823 | #define MX35_PAD_SD1_CMD__ARM11P_TOP_TRCTL IOMUX_PAD(0x694, 0x230, 7, 0x0, 0, NO_PAD_CTRL) | ||
824 | |||
825 | #define MX35_PAD_SD1_CLK__ESDHC1_CLK IOMUX_PAD(0x698, 0x234, 0, 0x0, 0, NO_PAD_CTRL) | ||
826 | #define MX35_PAD_SD1_CLK__MSHC_BS IOMUX_PAD(0x698, 0x234, 1, 0x0, 0, NO_PAD_CTRL) | ||
827 | #define MX35_PAD_SD1_CLK__IPU_DISPB_BCLK IOMUX_PAD(0x698, 0x234, 3, 0x0, 0, NO_PAD_CTRL) | ||
828 | #define MX35_PAD_SD1_CLK__USB_TOP_USBOTG_DATA_5 IOMUX_PAD(0x698, 0x234, 4, 0x9b8, 0, NO_PAD_CTRL) | ||
829 | #define MX35_PAD_SD1_CLK__GPIO1_7 IOMUX_PAD(0x698, 0x234, 5, 0x85c, 2, NO_PAD_CTRL) | ||
830 | #define MX35_PAD_SD1_CLK__ARM11P_TOP_TRCLK IOMUX_PAD(0x698, 0x234, 7, 0x0, 0, NO_PAD_CTRL) | ||
831 | |||
832 | #define MX35_PAD_SD1_DATA0__ESDHC1_DAT0 IOMUX_PAD(0x69c, 0x238, 0, 0x0, 0, NO_PAD_CTRL) | ||
833 | #define MX35_PAD_SD1_DATA0__MSHC_DATA_0 IOMUX_PAD(0x69c, 0x238, 1, 0x0, 0, NO_PAD_CTRL) | ||
834 | #define MX35_PAD_SD1_DATA0__IPU_DISPB_CS0 IOMUX_PAD(0x69c, 0x238, 3, 0x0, 0, NO_PAD_CTRL) | ||
835 | #define MX35_PAD_SD1_DATA0__USB_TOP_USBOTG_DATA_6 IOMUX_PAD(0x69c, 0x238, 4, 0x9bc, 0, NO_PAD_CTRL) | ||
836 | #define MX35_PAD_SD1_DATA0__GPIO1_8 IOMUX_PAD(0x69c, 0x238, 5, 0x860, 2, NO_PAD_CTRL) | ||
837 | #define MX35_PAD_SD1_DATA0__ARM11P_TOP_TRACE_23 IOMUX_PAD(0x69c, 0x238, 7, 0x0, 0, NO_PAD_CTRL) | ||
838 | |||
839 | #define MX35_PAD_SD1_DATA1__ESDHC1_DAT1 IOMUX_PAD(0x6a0, 0x23c, 0, 0x0, 0, NO_PAD_CTRL) | ||
840 | #define MX35_PAD_SD1_DATA1__MSHC_DATA_1 IOMUX_PAD(0x6a0, 0x23c, 1, 0x0, 0, NO_PAD_CTRL) | ||
841 | #define MX35_PAD_SD1_DATA1__IPU_DISPB_PAR_RS IOMUX_PAD(0x6a0, 0x23c, 3, 0x0, 0, NO_PAD_CTRL) | ||
842 | #define MX35_PAD_SD1_DATA1__USB_TOP_USBOTG_DATA_0 IOMUX_PAD(0x6a0, 0x23c, 4, 0x9a4, 0, NO_PAD_CTRL) | ||
843 | #define MX35_PAD_SD1_DATA1__GPIO1_9 IOMUX_PAD(0x6a0, 0x23c, 5, 0x864, 1, NO_PAD_CTRL) | ||
844 | #define MX35_PAD_SD1_DATA1__ARM11P_TOP_TRACE_24 IOMUX_PAD(0x6a0, 0x23c, 7, 0x0, 0, NO_PAD_CTRL) | ||
845 | |||
846 | #define MX35_PAD_SD1_DATA2__ESDHC1_DAT2 IOMUX_PAD(0x6a4, 0x240, 0, 0x0, 0, NO_PAD_CTRL) | ||
847 | #define MX35_PAD_SD1_DATA2__MSHC_DATA_2 IOMUX_PAD(0x6a4, 0x240, 1, 0x0, 0, NO_PAD_CTRL) | ||
848 | #define MX35_PAD_SD1_DATA2__IPU_DISPB_WR IOMUX_PAD(0x6a4, 0x240, 3, 0x0, 0, NO_PAD_CTRL) | ||
849 | #define MX35_PAD_SD1_DATA2__USB_TOP_USBOTG_DATA_1 IOMUX_PAD(0x6a4, 0x240, 4, 0x9a8, 0, NO_PAD_CTRL) | ||
850 | #define MX35_PAD_SD1_DATA2__GPIO1_10 IOMUX_PAD(0x6a4, 0x240, 5, 0x830, 1, NO_PAD_CTRL) | ||
851 | #define MX35_PAD_SD1_DATA2__ARM11P_TOP_TRACE_25 IOMUX_PAD(0x6a4, 0x240, 7, 0x0, 0, NO_PAD_CTRL) | ||
852 | |||
853 | #define MX35_PAD_SD1_DATA3__ESDHC1_DAT3 IOMUX_PAD(0x6a8, 0x244, 0, 0x0, 0, NO_PAD_CTRL) | ||
854 | #define MX35_PAD_SD1_DATA3__MSHC_DATA_3 IOMUX_PAD(0x6a8, 0x244, 1, 0x0, 0, NO_PAD_CTRL) | ||
855 | #define MX35_PAD_SD1_DATA3__IPU_DISPB_RD IOMUX_PAD(0x6a8, 0x244, 3, 0x0, 0, NO_PAD_CTRL) | ||
856 | #define MX35_PAD_SD1_DATA3__USB_TOP_USBOTG_DATA_2 IOMUX_PAD(0x6a8, 0x244, 4, 0x9ac, 0, NO_PAD_CTRL) | ||
857 | #define MX35_PAD_SD1_DATA3__GPIO1_11 IOMUX_PAD(0x6a8, 0x244, 5, 0x834, 1, NO_PAD_CTRL) | ||
858 | #define MX35_PAD_SD1_DATA3__ARM11P_TOP_TRACE_26 IOMUX_PAD(0x6a8, 0x244, 7, 0x0, 0, NO_PAD_CTRL) | ||
859 | |||
860 | #define MX35_PAD_SD2_CMD__ESDHC2_CMD IOMUX_PAD(0x6ac, 0x248, 0, 0x0, 0, NO_PAD_CTRL) | ||
861 | #define MX35_PAD_SD2_CMD__I2C3_SCL IOMUX_PAD(0x6ac, 0x248, 1, 0x91c, 2, NO_PAD_CTRL) | ||
862 | #define MX35_PAD_SD2_CMD__ESDHC1_DAT4 IOMUX_PAD(0x6ac, 0x248, 2, 0x804, 0, NO_PAD_CTRL) | ||
863 | #define MX35_PAD_SD2_CMD__IPU_CSI_D_2 IOMUX_PAD(0x6ac, 0x248, 3, 0x938, 2, NO_PAD_CTRL) | ||
864 | #define MX35_PAD_SD2_CMD__USB_TOP_USBH2_DATA_4 IOMUX_PAD(0x6ac, 0x248, 4, 0x9dc, 0, NO_PAD_CTRL) | ||
865 | #define MX35_PAD_SD2_CMD__GPIO2_0 IOMUX_PAD(0x6ac, 0x248, 5, 0x868, 2, NO_PAD_CTRL) | ||
866 | #define MX35_PAD_SD2_CMD__SPDIF_SPDIF_OUT1 IOMUX_PAD(0x6ac, 0x248, 6, 0x0, 0, NO_PAD_CTRL) | ||
867 | #define MX35_PAD_SD2_CMD__IPU_DISPB_D12_VSYNC IOMUX_PAD(0x6ac, 0x248, 7, 0x928, 3, NO_PAD_CTRL) | ||
868 | |||
869 | #define MX35_PAD_SD2_CLK__ESDHC2_CLK IOMUX_PAD(0x6b0, 0x24c, 0, 0x0, 0, NO_PAD_CTRL) | ||
870 | #define MX35_PAD_SD2_CLK__I2C3_SDA IOMUX_PAD(0x6b0, 0x24c, 1, 0x920, 2, NO_PAD_CTRL) | ||
871 | #define MX35_PAD_SD2_CLK__ESDHC1_DAT5 IOMUX_PAD(0x6b0, 0x24c, 2, 0x808, 0, NO_PAD_CTRL) | ||
872 | #define MX35_PAD_SD2_CLK__IPU_CSI_D_3 IOMUX_PAD(0x6b0, 0x24c, 3, 0x93c, 2, NO_PAD_CTRL) | ||
873 | #define MX35_PAD_SD2_CLK__USB_TOP_USBH2_DATA_5 IOMUX_PAD(0x6b0, 0x24c, 4, 0x9e0, 0, NO_PAD_CTRL) | ||
874 | #define MX35_PAD_SD2_CLK__GPIO2_1 IOMUX_PAD(0x6b0, 0x24c, 5, 0x894, 1, NO_PAD_CTRL) | ||
875 | #define MX35_PAD_SD2_CLK__SPDIF_SPDIF_IN1 IOMUX_PAD(0x6b0, 0x24c, 6, 0x998, 2, NO_PAD_CTRL) | ||
876 | #define MX35_PAD_SD2_CLK__IPU_DISPB_CS2 IOMUX_PAD(0x6b0, 0x24c, 7, 0x0, 0, NO_PAD_CTRL) | ||
877 | |||
878 | #define MX35_PAD_SD2_DATA0__ESDHC2_DAT0 IOMUX_PAD(0x6b4, 0x250, 0, 0x0, 0, NO_PAD_CTRL) | ||
879 | #define MX35_PAD_SD2_DATA0__UART3_RXD_MUX IOMUX_PAD(0x6b4, 0x250, 1, 0x9a0, 1, NO_PAD_CTRL) | ||
880 | #define MX35_PAD_SD2_DATA0__ESDHC1_DAT6 IOMUX_PAD(0x6b4, 0x250, 2, 0x80c, 0, NO_PAD_CTRL) | ||
881 | #define MX35_PAD_SD2_DATA0__IPU_CSI_D_4 IOMUX_PAD(0x6b4, 0x250, 3, 0x940, 1, NO_PAD_CTRL) | ||
882 | #define MX35_PAD_SD2_DATA0__USB_TOP_USBH2_DATA_6 IOMUX_PAD(0x6b4, 0x250, 4, 0x9e4, 0, NO_PAD_CTRL) | ||
883 | #define MX35_PAD_SD2_DATA0__GPIO2_2 IOMUX_PAD(0x6b4, 0x250, 5, 0x8c0, 1, NO_PAD_CTRL) | ||
884 | #define MX35_PAD_SD2_DATA0__SPDIF_SPDIF_EXTCLK IOMUX_PAD(0x6b4, 0x250, 6, 0x994, 3, NO_PAD_CTRL) | ||
885 | |||
886 | #define MX35_PAD_SD2_DATA1__ESDHC2_DAT1 IOMUX_PAD(0x6b8, 0x254, 0, 0x0, 0, NO_PAD_CTRL) | ||
887 | #define MX35_PAD_SD2_DATA1__UART3_TXD_MUX IOMUX_PAD(0x6b8, 0x254, 1, 0x0, 0, NO_PAD_CTRL) | ||
888 | #define MX35_PAD_SD2_DATA1__ESDHC1_DAT7 IOMUX_PAD(0x6b8, 0x254, 2, 0x810, 0, NO_PAD_CTRL) | ||
889 | #define MX35_PAD_SD2_DATA1__IPU_CSI_D_5 IOMUX_PAD(0x6b8, 0x254, 3, 0x944, 1, NO_PAD_CTRL) | ||
890 | #define MX35_PAD_SD2_DATA1__USB_TOP_USBH2_DATA_0 IOMUX_PAD(0x6b8, 0x254, 4, 0x9cc, 0, NO_PAD_CTRL) | ||
891 | #define MX35_PAD_SD2_DATA1__GPIO2_3 IOMUX_PAD(0x6b8, 0x254, 5, 0x8cc, 1, NO_PAD_CTRL) | ||
892 | |||
893 | #define MX35_PAD_SD2_DATA2__ESDHC2_DAT2 IOMUX_PAD(0x6bc, 0x258, 0, 0x0, 0, NO_PAD_CTRL) | ||
894 | #define MX35_PAD_SD2_DATA2__UART3_RTS IOMUX_PAD(0x6bc, 0x258, 1, 0x99c, 0, NO_PAD_CTRL) | ||
895 | #define MX35_PAD_SD2_DATA2__CAN1_RXCAN IOMUX_PAD(0x6bc, 0x258, 2, 0x7c8, 1, NO_PAD_CTRL) | ||
896 | #define MX35_PAD_SD2_DATA2__IPU_CSI_D_6 IOMUX_PAD(0x6bc, 0x258, 3, 0x948, 1, NO_PAD_CTRL) | ||
897 | #define MX35_PAD_SD2_DATA2__USB_TOP_USBH2_DATA_1 IOMUX_PAD(0x6bc, 0x258, 4, 0x9d0, 0, NO_PAD_CTRL) | ||
898 | #define MX35_PAD_SD2_DATA2__GPIO2_4 IOMUX_PAD(0x6bc, 0x258, 5, 0x8d0, 1, NO_PAD_CTRL) | ||
899 | |||
900 | #define MX35_PAD_SD2_DATA3__ESDHC2_DAT3 IOMUX_PAD(0x6c0, 0x25c, 0, 0x0, 0, NO_PAD_CTRL) | ||
901 | #define MX35_PAD_SD2_DATA3__UART3_CTS IOMUX_PAD(0x6c0, 0x25c, 1, 0x0, 0, NO_PAD_CTRL) | ||
902 | #define MX35_PAD_SD2_DATA3__CAN1_TXCAN IOMUX_PAD(0x6c0, 0x25c, 2, 0x0, 0, NO_PAD_CTRL) | ||
903 | #define MX35_PAD_SD2_DATA3__IPU_CSI_D_7 IOMUX_PAD(0x6c0, 0x25c, 3, 0x94c, 1, NO_PAD_CTRL) | ||
904 | #define MX35_PAD_SD2_DATA3__USB_TOP_USBH2_DATA_2 IOMUX_PAD(0x6c0, 0x25c, 4, 0x9d4, 0, NO_PAD_CTRL) | ||
905 | #define MX35_PAD_SD2_DATA3__GPIO2_5 IOMUX_PAD(0x6c0, 0x25c, 5, 0x8d4, 1, NO_PAD_CTRL) | ||
906 | |||
907 | #define MX35_PAD_ATA_CS0__ATA_CS0 IOMUX_PAD(0x6c4, 0x260, 0, 0x0, 0, NO_PAD_CTRL) | ||
908 | #define MX35_PAD_ATA_CS0__CSPI1_SS3 IOMUX_PAD(0x6c4, 0x260, 1, 0x7dc, 1, NO_PAD_CTRL) | ||
909 | #define MX35_PAD_ATA_CS0__IPU_DISPB_CS1 IOMUX_PAD(0x6c4, 0x260, 3, 0x0, 0, NO_PAD_CTRL) | ||
910 | #define MX35_PAD_ATA_CS0__GPIO2_6 IOMUX_PAD(0x6c4, 0x260, 5, 0x8d8, 1, NO_PAD_CTRL) | ||
911 | #define MX35_PAD_ATA_CS0__IPU_DIAGB_0 IOMUX_PAD(0x6c4, 0x260, 6, 0x0, 0, NO_PAD_CTRL) | ||
912 | #define MX35_PAD_ATA_CS0__ARM11P_TOP_MAX1_HMASTER_0 IOMUX_PAD(0x6c4, 0x260, 7, 0x0, 0, NO_PAD_CTRL) | ||
913 | |||
914 | #define MX35_PAD_ATA_CS1__ATA_CS1 IOMUX_PAD(0x6c8, 0x264, 0, 0x0, 0, NO_PAD_CTRL) | ||
915 | #define MX35_PAD_ATA_CS1__IPU_DISPB_CS2 IOMUX_PAD(0x6c8, 0x264, 3, 0x0, 0, NO_PAD_CTRL) | ||
916 | #define MX35_PAD_ATA_CS1__CSPI2_SS0 IOMUX_PAD(0x6c8, 0x264, 4, 0x7f0, 1, NO_PAD_CTRL) | ||
917 | #define MX35_PAD_ATA_CS1__GPIO2_7 IOMUX_PAD(0x6c8, 0x264, 5, 0x8dc, 1, NO_PAD_CTRL) | ||
918 | #define MX35_PAD_ATA_CS1__IPU_DIAGB_1 IOMUX_PAD(0x6c8, 0x264, 6, 0x0, 0, NO_PAD_CTRL) | ||
919 | #define MX35_PAD_ATA_CS1__ARM11P_TOP_MAX1_HMASTER_1 IOMUX_PAD(0x6c8, 0x264, 7, 0x0, 0, NO_PAD_CTRL) | ||
920 | |||
921 | #define MX35_PAD_ATA_DIOR__ATA_DIOR IOMUX_PAD(0x6cc, 0x268, 0, 0x0, 0, NO_PAD_CTRL) | ||
922 | #define MX35_PAD_ATA_DIOR__ESDHC3_DAT0 IOMUX_PAD(0x6cc, 0x268, 1, 0x81c, 1, NO_PAD_CTRL) | ||
923 | #define MX35_PAD_ATA_DIOR__USB_TOP_USBOTG_DIR IOMUX_PAD(0x6cc, 0x268, 2, 0x9c4, 1, NO_PAD_CTRL) | ||
924 | #define MX35_PAD_ATA_DIOR__IPU_DISPB_BE0 IOMUX_PAD(0x6cc, 0x268, 3, 0x0, 0, NO_PAD_CTRL) | ||
925 | #define MX35_PAD_ATA_DIOR__CSPI2_SS1 IOMUX_PAD(0x6cc, 0x268, 4, 0x7f4, 1, NO_PAD_CTRL) | ||
926 | #define MX35_PAD_ATA_DIOR__GPIO2_8 IOMUX_PAD(0x6cc, 0x268, 5, 0x8e0, 1, NO_PAD_CTRL) | ||
927 | #define MX35_PAD_ATA_DIOR__IPU_DIAGB_2 IOMUX_PAD(0x6cc, 0x268, 6, 0x0, 0, NO_PAD_CTRL) | ||
928 | #define MX35_PAD_ATA_DIOR__ARM11P_TOP_MAX1_HMASTER_2 IOMUX_PAD(0x6cc, 0x268, 7, 0x0, 0, NO_PAD_CTRL) | ||
929 | |||
930 | #define MX35_PAD_ATA_DIOW__ATA_DIOW IOMUX_PAD(0x6d0, 0x26c, 0, 0x0, 0, NO_PAD_CTRL) | ||
931 | #define MX35_PAD_ATA_DIOW__ESDHC3_DAT1 IOMUX_PAD(0x6d0, 0x26c, 1, 0x820, 1, NO_PAD_CTRL) | ||
932 | #define MX35_PAD_ATA_DIOW__USB_TOP_USBOTG_STP IOMUX_PAD(0x6d0, 0x26c, 2, 0x0, 0, NO_PAD_CTRL) | ||
933 | #define MX35_PAD_ATA_DIOW__IPU_DISPB_BE1 IOMUX_PAD(0x6d0, 0x26c, 3, 0x0, 0, NO_PAD_CTRL) | ||
934 | #define MX35_PAD_ATA_DIOW__CSPI2_MOSI IOMUX_PAD(0x6d0, 0x26c, 4, 0x7ec, 2, NO_PAD_CTRL) | ||
935 | #define MX35_PAD_ATA_DIOW__GPIO2_9 IOMUX_PAD(0x6d0, 0x26c, 5, 0x8e4, 1, NO_PAD_CTRL) | ||
936 | #define MX35_PAD_ATA_DIOW__IPU_DIAGB_3 IOMUX_PAD(0x6d0, 0x26c, 6, 0x0, 0, NO_PAD_CTRL) | ||
937 | #define MX35_PAD_ATA_DIOW__ARM11P_TOP_MAX1_HMASTER_3 IOMUX_PAD(0x6d0, 0x26c, 7, 0x0, 0, NO_PAD_CTRL) | ||
938 | |||
939 | #define MX35_PAD_ATA_DMACK__ATA_DMACK IOMUX_PAD(0x6d4, 0x270, 0, 0x0, 0, NO_PAD_CTRL) | ||
940 | #define MX35_PAD_ATA_DMACK__ESDHC3_DAT2 IOMUX_PAD(0x6d4, 0x270, 1, 0x824, 1, NO_PAD_CTRL) | ||
941 | #define MX35_PAD_ATA_DMACK__USB_TOP_USBOTG_NXT IOMUX_PAD(0x6d4, 0x270, 2, 0x9c8, 1, NO_PAD_CTRL) | ||
942 | #define MX35_PAD_ATA_DMACK__CSPI2_MISO IOMUX_PAD(0x6d4, 0x270, 4, 0x7e8, 2, NO_PAD_CTRL) | ||
943 | #define MX35_PAD_ATA_DMACK__GPIO2_10 IOMUX_PAD(0x6d4, 0x270, 5, 0x86c, 1, NO_PAD_CTRL) | ||
944 | #define MX35_PAD_ATA_DMACK__IPU_DIAGB_4 IOMUX_PAD(0x6d4, 0x270, 6, 0x0, 0, NO_PAD_CTRL) | ||
945 | #define MX35_PAD_ATA_DMACK__ARM11P_TOP_MAX0_HMASTER_0 IOMUX_PAD(0x6d4, 0x270, 7, 0x0, 0, NO_PAD_CTRL) | ||
946 | |||
947 | #define MX35_PAD_ATA_RESET_B__ATA_RESET_B IOMUX_PAD(0x6d8, 0x274, 0, 0x0, 0, NO_PAD_CTRL) | ||
948 | #define MX35_PAD_ATA_RESET_B__ESDHC3_DAT3 IOMUX_PAD(0x6d8, 0x274, 1, 0x828, 1, NO_PAD_CTRL) | ||
949 | #define MX35_PAD_ATA_RESET_B__USB_TOP_USBOTG_DATA_0 IOMUX_PAD(0x6d8, 0x274, 2, 0x9a4, 1, NO_PAD_CTRL) | ||
950 | #define MX35_PAD_ATA_RESET_B__IPU_DISPB_SD_D_O IOMUX_PAD(0x6d8, 0x274, 3, 0x0, 0, NO_PAD_CTRL) | ||
951 | #define MX35_PAD_ATA_RESET_B__CSPI2_RDY IOMUX_PAD(0x6d8, 0x274, 4, 0x7e4, 2, NO_PAD_CTRL) | ||
952 | #define MX35_PAD_ATA_RESET_B__GPIO2_11 IOMUX_PAD(0x6d8, 0x274, 5, 0x870, 1, NO_PAD_CTRL) | ||
953 | #define MX35_PAD_ATA_RESET_B__IPU_DIAGB_5 IOMUX_PAD(0x6d8, 0x274, 6, 0x0, 0, NO_PAD_CTRL) | ||
954 | #define MX35_PAD_ATA_RESET_B__ARM11P_TOP_MAX0_HMASTER_1 IOMUX_PAD(0x6d8, 0x274, 7, 0x0, 0, NO_PAD_CTRL) | ||
955 | |||
956 | #define MX35_PAD_ATA_IORDY__ATA_IORDY IOMUX_PAD(0x6dc, 0x278, 0, 0x0, 0, NO_PAD_CTRL) | ||
957 | #define MX35_PAD_ATA_IORDY__ESDHC3_DAT4 IOMUX_PAD(0x6dc, 0x278, 1, 0x0, 0, NO_PAD_CTRL) | ||
958 | #define MX35_PAD_ATA_IORDY__USB_TOP_USBOTG_DATA_1 IOMUX_PAD(0x6dc, 0x278, 2, 0x9a8, 1, NO_PAD_CTRL) | ||
959 | #define MX35_PAD_ATA_IORDY__IPU_DISPB_SD_D_IO IOMUX_PAD(0x6dc, 0x278, 3, 0x92c, 3, NO_PAD_CTRL) | ||
960 | #define MX35_PAD_ATA_IORDY__ESDHC2_DAT4 IOMUX_PAD(0x6dc, 0x278, 4, 0x0, 0, NO_PAD_CTRL) | ||
961 | #define MX35_PAD_ATA_IORDY__GPIO2_12 IOMUX_PAD(0x6dc, 0x278, 5, 0x874, 1, NO_PAD_CTRL) | ||
962 | #define MX35_PAD_ATA_IORDY__IPU_DIAGB_6 IOMUX_PAD(0x6dc, 0x278, 6, 0x0, 0, NO_PAD_CTRL) | ||
963 | #define MX35_PAD_ATA_IORDY__ARM11P_TOP_MAX0_HMASTER_2 IOMUX_PAD(0x6dc, 0x278, 7, 0x0, 0, NO_PAD_CTRL) | ||
964 | |||
965 | #define MX35_PAD_ATA_DATA0__ATA_DATA_0 IOMUX_PAD(0x6e0, 0x27c, 0, 0x0, 0, NO_PAD_CTRL) | ||
966 | #define MX35_PAD_ATA_DATA0__ESDHC3_DAT5 IOMUX_PAD(0x6e0, 0x27c, 1, 0x0, 0, NO_PAD_CTRL) | ||
967 | #define MX35_PAD_ATA_DATA0__USB_TOP_USBOTG_DATA_2 IOMUX_PAD(0x6e0, 0x27c, 2, 0x9ac, 1, NO_PAD_CTRL) | ||
968 | #define MX35_PAD_ATA_DATA0__IPU_DISPB_D12_VSYNC IOMUX_PAD(0x6e0, 0x27c, 3, 0x928, 4, NO_PAD_CTRL) | ||
969 | #define MX35_PAD_ATA_DATA0__ESDHC2_DAT5 IOMUX_PAD(0x6e0, 0x27c, 4, 0x0, 0, NO_PAD_CTRL) | ||
970 | #define MX35_PAD_ATA_DATA0__GPIO2_13 IOMUX_PAD(0x6e0, 0x27c, 5, 0x878, 1, NO_PAD_CTRL) | ||
971 | #define MX35_PAD_ATA_DATA0__IPU_DIAGB_7 IOMUX_PAD(0x6e0, 0x27c, 6, 0x0, 0, NO_PAD_CTRL) | ||
972 | #define MX35_PAD_ATA_DATA0__ARM11P_TOP_MAX0_HMASTER_3 IOMUX_PAD(0x6e0, 0x27c, 7, 0x0, 0, NO_PAD_CTRL) | ||
973 | |||
974 | #define MX35_PAD_ATA_DATA1__ATA_DATA_1 IOMUX_PAD(0x6e4, 0x280, 0, 0x0, 0, NO_PAD_CTRL) | ||
975 | #define MX35_PAD_ATA_DATA1__ESDHC3_DAT6 IOMUX_PAD(0x6e4, 0x280, 1, 0x0, 0, NO_PAD_CTRL) | ||
976 | #define MX35_PAD_ATA_DATA1__USB_TOP_USBOTG_DATA_3 IOMUX_PAD(0x6e4, 0x280, 2, 0x9b0, 1, NO_PAD_CTRL) | ||
977 | #define MX35_PAD_ATA_DATA1__IPU_DISPB_SD_CLK IOMUX_PAD(0x6e4, 0x280, 3, 0x0, 0, NO_PAD_CTRL) | ||
978 | #define MX35_PAD_ATA_DATA1__ESDHC2_DAT6 IOMUX_PAD(0x6e4, 0x280, 4, 0x0, 0, NO_PAD_CTRL) | ||
979 | #define MX35_PAD_ATA_DATA1__GPIO2_14 IOMUX_PAD(0x6e4, 0x280, 5, 0x87c, 1, NO_PAD_CTRL) | ||
980 | #define MX35_PAD_ATA_DATA1__IPU_DIAGB_8 IOMUX_PAD(0x6e4, 0x280, 6, 0x0, 0, NO_PAD_CTRL) | ||
981 | #define MX35_PAD_ATA_DATA1__ARM11P_TOP_TRACE_27 IOMUX_PAD(0x6e4, 0x280, 7, 0x0, 0, NO_PAD_CTRL) | ||
982 | |||
983 | #define MX35_PAD_ATA_DATA2__ATA_DATA_2 IOMUX_PAD(0x6e8, 0x284, 0, 0x0, 0, NO_PAD_CTRL) | ||
984 | #define MX35_PAD_ATA_DATA2__ESDHC3_DAT7 IOMUX_PAD(0x6e8, 0x284, 1, 0x0, 0, NO_PAD_CTRL) | ||
985 | #define MX35_PAD_ATA_DATA2__USB_TOP_USBOTG_DATA_4 IOMUX_PAD(0x6e8, 0x284, 2, 0x9b4, 1, NO_PAD_CTRL) | ||
986 | #define MX35_PAD_ATA_DATA2__IPU_DISPB_SER_RS IOMUX_PAD(0x6e8, 0x284, 3, 0x0, 0, NO_PAD_CTRL) | ||
987 | #define MX35_PAD_ATA_DATA2__ESDHC2_DAT7 IOMUX_PAD(0x6e8, 0x284, 4, 0x0, 0, NO_PAD_CTRL) | ||
988 | #define MX35_PAD_ATA_DATA2__GPIO2_15 IOMUX_PAD(0x6e8, 0x284, 5, 0x880, 1, NO_PAD_CTRL) | ||
989 | #define MX35_PAD_ATA_DATA2__IPU_DIAGB_9 IOMUX_PAD(0x6e8, 0x284, 6, 0x0, 0, NO_PAD_CTRL) | ||
990 | #define MX35_PAD_ATA_DATA2__ARM11P_TOP_TRACE_28 IOMUX_PAD(0x6e8, 0x284, 7, 0x0, 0, NO_PAD_CTRL) | ||
991 | |||
992 | #define MX35_PAD_ATA_DATA3__ATA_DATA_3 IOMUX_PAD(0x6e8, 0x288, 0, 0x0, 0, NO_PAD_CTRL) | ||
993 | #define MX35_PAD_ATA_DATA3__ESDHC3_CLK IOMUX_PAD(0x6e8, 0x288, 1, 0x814, 1, NO_PAD_CTRL) | ||
994 | #define MX35_PAD_ATA_DATA3__USB_TOP_USBOTG_DATA_5 IOMUX_PAD(0x6e8, 0x288, 2, 0x9b8, 1, NO_PAD_CTRL) | ||
995 | #define MX35_PAD_ATA_DATA3__CSPI2_SCLK IOMUX_PAD(0x6e8, 0x288, 4, 0x7e0, 2, NO_PAD_CTRL) | ||
996 | #define MX35_PAD_ATA_DATA3__GPIO2_16 IOMUX_PAD(0x6e8, 0x288, 5, 0x884, 1, NO_PAD_CTRL) | ||
997 | #define MX35_PAD_ATA_DATA3__IPU_DIAGB_10 IOMUX_PAD(0x6e8, 0x288, 6, 0x0, 0, NO_PAD_CTRL) | ||
998 | #define MX35_PAD_ATA_DATA3__ARM11P_TOP_TRACE_29 IOMUX_PAD(0x6e8, 0x288, 7, 0x0, 0, NO_PAD_CTRL) | ||
999 | |||
1000 | #define MX35_PAD_ATA_DATA4__ATA_DATA_4 IOMUX_PAD(0x6f0, 0x28c, 0, 0x0, 0, NO_PAD_CTRL) | ||
1001 | #define MX35_PAD_ATA_DATA4__ESDHC3_CMD IOMUX_PAD(0x6f0, 0x28c, 1, 0x818, 1, NO_PAD_CTRL) | ||
1002 | #define MX35_PAD_ATA_DATA4__USB_TOP_USBOTG_DATA_6 IOMUX_PAD(0x6f0, 0x28c, 2, 0x9bc, 1, NO_PAD_CTRL) | ||
1003 | #define MX35_PAD_ATA_DATA4__GPIO2_17 IOMUX_PAD(0x6f0, 0x28c, 5, 0x888, 1, NO_PAD_CTRL) | ||
1004 | #define MX35_PAD_ATA_DATA4__IPU_DIAGB_11 IOMUX_PAD(0x6f0, 0x28c, 6, 0x0, 0, NO_PAD_CTRL) | ||
1005 | #define MX35_PAD_ATA_DATA4__ARM11P_TOP_TRACE_30 IOMUX_PAD(0x6f0, 0x28c, 7, 0x0, 0, NO_PAD_CTRL) | ||
1006 | |||
1007 | #define MX35_PAD_ATA_DATA5__ATA_DATA_5 IOMUX_PAD(0x6f4, 0x290, 0, 0x0, 0, NO_PAD_CTRL) | ||
1008 | #define MX35_PAD_ATA_DATA5__USB_TOP_USBOTG_DATA_7 IOMUX_PAD(0x6f4, 0x290, 2, 0x9c0, 1, NO_PAD_CTRL) | ||
1009 | #define MX35_PAD_ATA_DATA5__GPIO2_18 IOMUX_PAD(0x6f4, 0x290, 5, 0x88c, 1, NO_PAD_CTRL) | ||
1010 | #define MX35_PAD_ATA_DATA5__IPU_DIAGB_12 IOMUX_PAD(0x6f4, 0x290, 6, 0x0, 0, NO_PAD_CTRL) | ||
1011 | #define MX35_PAD_ATA_DATA5__ARM11P_TOP_TRACE_31 IOMUX_PAD(0x6f4, 0x290, 7, 0x0, 0, NO_PAD_CTRL) | ||
1012 | |||
1013 | #define MX35_PAD_ATA_DATA6__ATA_DATA_6 IOMUX_PAD(0x6f8, 0x294, 0, 0x0, 0, NO_PAD_CTRL) | ||
1014 | #define MX35_PAD_ATA_DATA6__CAN1_TXCAN IOMUX_PAD(0x6f8, 0x294, 1, 0x0, 0, NO_PAD_CTRL) | ||
1015 | #define MX35_PAD_ATA_DATA6__UART1_DTR IOMUX_PAD(0x6f8, 0x294, 2, 0x0, 0, NO_PAD_CTRL) | ||
1016 | #define MX35_PAD_ATA_DATA6__AUDMUX_AUD6_TXD IOMUX_PAD(0x6f8, 0x294, 3, 0x7b4, 0, NO_PAD_CTRL) | ||
1017 | #define MX35_PAD_ATA_DATA6__GPIO2_19 IOMUX_PAD(0x6f8, 0x294, 5, 0x890, 1, NO_PAD_CTRL) | ||
1018 | #define MX35_PAD_ATA_DATA6__IPU_DIAGB_13 IOMUX_PAD(0x6f8, 0x294, 6, 0x0, 0, NO_PAD_CTRL) | ||
1019 | |||
1020 | #define MX35_PAD_ATA_DATA7__ATA_DATA_7 IOMUX_PAD(0x6fc, 0x298, 0, 0x0, 0, NO_PAD_CTRL) | ||
1021 | #define MX35_PAD_ATA_DATA7__CAN1_RXCAN IOMUX_PAD(0x6fc, 0x298, 1, 0x7c8, 2, NO_PAD_CTRL) | ||
1022 | #define MX35_PAD_ATA_DATA7__UART1_DSR IOMUX_PAD(0x6fc, 0x298, 2, 0x0, 0, NO_PAD_CTRL) | ||
1023 | #define MX35_PAD_ATA_DATA7__AUDMUX_AUD6_RXD IOMUX_PAD(0x6fc, 0x298, 3, 0x7b0, 0, NO_PAD_CTRL) | ||
1024 | #define MX35_PAD_ATA_DATA7__GPIO2_20 IOMUX_PAD(0x6fc, 0x298, 5, 0x898, 1, NO_PAD_CTRL) | ||
1025 | #define MX35_PAD_ATA_DATA7__IPU_DIAGB_14 IOMUX_PAD(0x6fc, 0x298, 6, 0x0, 0, NO_PAD_CTRL) | ||
1026 | |||
1027 | #define MX35_PAD_ATA_DATA8__ATA_DATA_8 IOMUX_PAD(0x700, 0x29c, 0, 0x0, 0, NO_PAD_CTRL) | ||
1028 | #define MX35_PAD_ATA_DATA8__UART3_RTS IOMUX_PAD(0x700, 0x29c, 1, 0x99c, 1, NO_PAD_CTRL) | ||
1029 | #define MX35_PAD_ATA_DATA8__UART1_RI IOMUX_PAD(0x700, 0x29c, 2, 0x0, 0, NO_PAD_CTRL) | ||
1030 | #define MX35_PAD_ATA_DATA8__AUDMUX_AUD6_TXC IOMUX_PAD(0x700, 0x29c, 3, 0x7c0, 0, NO_PAD_CTRL) | ||
1031 | #define MX35_PAD_ATA_DATA8__GPIO2_21 IOMUX_PAD(0x700, 0x29c, 5, 0x89c, 1, NO_PAD_CTRL) | ||
1032 | #define MX35_PAD_ATA_DATA8__IPU_DIAGB_15 IOMUX_PAD(0x700, 0x29c, 6, 0x0, 0, NO_PAD_CTRL) | ||
1033 | |||
1034 | #define MX35_PAD_ATA_DATA9__ATA_DATA_9 IOMUX_PAD(0x704, 0x2a0, 0, 0x0, 0, NO_PAD_CTRL) | ||
1035 | #define MX35_PAD_ATA_DATA9__UART3_CTS IOMUX_PAD(0x704, 0x2a0, 1, 0x0, 0, NO_PAD_CTRL) | ||
1036 | #define MX35_PAD_ATA_DATA9__UART1_DCD IOMUX_PAD(0x704, 0x2a0, 2, 0x0, 0, NO_PAD_CTRL) | ||
1037 | #define MX35_PAD_ATA_DATA9__AUDMUX_AUD6_TXFS IOMUX_PAD(0x704, 0x2a0, 3, 0x7c4, 0, NO_PAD_CTRL) | ||
1038 | #define MX35_PAD_ATA_DATA9__GPIO2_22 IOMUX_PAD(0x704, 0x2a0, 5, 0x8a0, 1, NO_PAD_CTRL) | ||
1039 | #define MX35_PAD_ATA_DATA9__IPU_DIAGB_16 IOMUX_PAD(0x704, 0x2a0, 6, 0x0, 0, NO_PAD_CTRL) | ||
1040 | |||
1041 | #define MX35_PAD_ATA_DATA10__ATA_DATA_10 IOMUX_PAD(0x708, 0x2a4, 0, 0x0, 0, NO_PAD_CTRL) | ||
1042 | #define MX35_PAD_ATA_DATA10__UART3_RXD_MUX IOMUX_PAD(0x708, 0x2a4, 1, 0x9a0, 2, NO_PAD_CTRL) | ||
1043 | #define MX35_PAD_ATA_DATA10__AUDMUX_AUD6_RXC IOMUX_PAD(0x708, 0x2a4, 3, 0x7b8, 0, NO_PAD_CTRL) | ||
1044 | #define MX35_PAD_ATA_DATA10__GPIO2_23 IOMUX_PAD(0x708, 0x2a4, 5, 0x8a4, 1, NO_PAD_CTRL) | ||
1045 | #define MX35_PAD_ATA_DATA10__IPU_DIAGB_17 IOMUX_PAD(0x708, 0x2a4, 6, 0x0, 0, NO_PAD_CTRL) | ||
1046 | |||
1047 | #define MX35_PAD_ATA_DATA11__ATA_DATA_11 IOMUX_PAD(0x70c, 0x2a8, 0, 0x0, 0, NO_PAD_CTRL) | ||
1048 | #define MX35_PAD_ATA_DATA11__UART3_TXD_MUX IOMUX_PAD(0x70c, 0x2a8, 1, 0x0, 0, NO_PAD_CTRL) | ||
1049 | #define MX35_PAD_ATA_DATA11__AUDMUX_AUD6_RXFS IOMUX_PAD(0x70c, 0x2a8, 3, 0x7bc, 0, NO_PAD_CTRL) | ||
1050 | #define MX35_PAD_ATA_DATA11__GPIO2_24 IOMUX_PAD(0x70c, 0x2a8, 5, 0x8a8, 1, NO_PAD_CTRL) | ||
1051 | #define MX35_PAD_ATA_DATA11__IPU_DIAGB_18 IOMUX_PAD(0x70c, 0x2a8, 6, 0x0, 0, NO_PAD_CTRL) | ||
1052 | |||
1053 | #define MX35_PAD_ATA_DATA12__ATA_DATA_12 IOMUX_PAD(0x710, 0x2ac, 0, 0x0, 0, NO_PAD_CTRL) | ||
1054 | #define MX35_PAD_ATA_DATA12__I2C3_SCL IOMUX_PAD(0x710, 0x2ac, 1, 0x91c, 3, NO_PAD_CTRL) | ||
1055 | #define MX35_PAD_ATA_DATA12__GPIO2_25 IOMUX_PAD(0x710, 0x2ac, 5, 0x8ac, 1, NO_PAD_CTRL) | ||
1056 | #define MX35_PAD_ATA_DATA12__IPU_DIAGB_19 IOMUX_PAD(0x710, 0x2ac, 6, 0x0, 0, NO_PAD_CTRL) | ||
1057 | |||
1058 | #define MX35_PAD_ATA_DATA13__ATA_DATA_13 IOMUX_PAD(0x714, 0x2b0, 0, 0x0, 0, NO_PAD_CTRL) | ||
1059 | #define MX35_PAD_ATA_DATA13__I2C3_SDA IOMUX_PAD(0x714, 0x2b0, 1, 0x920, 3, NO_PAD_CTRL) | ||
1060 | #define MX35_PAD_ATA_DATA13__GPIO2_26 IOMUX_PAD(0x714, 0x2b0, 5, 0x8b0, 1, NO_PAD_CTRL) | ||
1061 | #define MX35_PAD_ATA_DATA13__IPU_DIAGB_20 IOMUX_PAD(0x714, 0x2b0, 6, 0x0, 0, NO_PAD_CTRL) | ||
1062 | |||
1063 | #define MX35_PAD_ATA_DATA14__ATA_DATA_14 IOMUX_PAD(0x718, 0x2b4, 0, 0x0, 0, NO_PAD_CTRL) | ||
1064 | #define MX35_PAD_ATA_DATA14__IPU_CSI_D_0 IOMUX_PAD(0x718, 0x2b4, 1, 0x930, 2, NO_PAD_CTRL) | ||
1065 | #define MX35_PAD_ATA_DATA14__KPP_ROW_0 IOMUX_PAD(0x718, 0x2b4, 3, 0x970, 2, NO_PAD_CTRL) | ||
1066 | #define MX35_PAD_ATA_DATA14__GPIO2_27 IOMUX_PAD(0x718, 0x2b4, 5, 0x8b4, 1, NO_PAD_CTRL) | ||
1067 | #define MX35_PAD_ATA_DATA14__IPU_DIAGB_21 IOMUX_PAD(0x718, 0x2b4, 6, 0x0, 0, NO_PAD_CTRL) | ||
1068 | |||
1069 | #define MX35_PAD_ATA_DATA15__ATA_DATA_15 IOMUX_PAD(0x71c, 0x2b8, 0, 0x0, 0, NO_PAD_CTRL) | ||
1070 | #define MX35_PAD_ATA_DATA15__IPU_CSI_D_1 IOMUX_PAD(0x71c, 0x2b8, 1, 0x934, 2, NO_PAD_CTRL) | ||
1071 | #define MX35_PAD_ATA_DATA15__KPP_ROW_1 IOMUX_PAD(0x71c, 0x2b8, 3, 0x974, 2, NO_PAD_CTRL) | ||
1072 | #define MX35_PAD_ATA_DATA15__GPIO2_28 IOMUX_PAD(0x71c, 0x2b8, 5, 0x8b8, 1, NO_PAD_CTRL) | ||
1073 | #define MX35_PAD_ATA_DATA15__IPU_DIAGB_22 IOMUX_PAD(0x71c, 0x2b8, 6, 0x0, 0, NO_PAD_CTRL) | ||
1074 | |||
1075 | #define MX35_PAD_ATA_INTRQ__ATA_INTRQ IOMUX_PAD(0x720, 0x2bc, 0, 0x0, 0, NO_PAD_CTRL) | ||
1076 | #define MX35_PAD_ATA_INTRQ__IPU_CSI_D_2 IOMUX_PAD(0x720, 0x2bc, 1, 0x938, 3, NO_PAD_CTRL) | ||
1077 | #define MX35_PAD_ATA_INTRQ__KPP_ROW_2 IOMUX_PAD(0x720, 0x2bc, 3, 0x978, 2, NO_PAD_CTRL) | ||
1078 | #define MX35_PAD_ATA_INTRQ__GPIO2_29 IOMUX_PAD(0x720, 0x2bc, 5, 0x8bc, 1, NO_PAD_CTRL) | ||
1079 | #define MX35_PAD_ATA_INTRQ__IPU_DIAGB_23 IOMUX_PAD(0x720, 0x2bc, 6, 0x0, 0, NO_PAD_CTRL) | ||
1080 | |||
1081 | #define MX35_PAD_ATA_BUFF_EN__ATA_BUFFER_EN IOMUX_PAD(0x724, 0x2c0, 0, 0x0, 0, NO_PAD_CTRL) | ||
1082 | #define MX35_PAD_ATA_BUFF_EN__IPU_CSI_D_3 IOMUX_PAD(0x724, 0x2c0, 1, 0x93c, 3, NO_PAD_CTRL) | ||
1083 | #define MX35_PAD_ATA_BUFF_EN__KPP_ROW_3 IOMUX_PAD(0x724, 0x2c0, 3, 0x97c, 2, NO_PAD_CTRL) | ||
1084 | #define MX35_PAD_ATA_BUFF_EN__GPIO2_30 IOMUX_PAD(0x724, 0x2c0, 5, 0x8c4, 1, NO_PAD_CTRL) | ||
1085 | #define MX35_PAD_ATA_BUFF_EN__IPU_DIAGB_24 IOMUX_PAD(0x724, 0x2c0, 6, 0x0, 0, NO_PAD_CTRL) | ||
1086 | |||
1087 | #define MX35_PAD_ATA_DMARQ__ATA_DMARQ IOMUX_PAD(0x728, 0x2c4, 0, 0x0, 0, NO_PAD_CTRL) | ||
1088 | #define MX35_PAD_ATA_DMARQ__IPU_CSI_D_4 IOMUX_PAD(0x728, 0x2c4, 1, 0x940, 2, NO_PAD_CTRL) | ||
1089 | #define MX35_PAD_ATA_DMARQ__KPP_COL_0 IOMUX_PAD(0x728, 0x2c4, 3, 0x950, 2, NO_PAD_CTRL) | ||
1090 | #define MX35_PAD_ATA_DMARQ__GPIO2_31 IOMUX_PAD(0x728, 0x2c4, 5, 0x8c8, 1, NO_PAD_CTRL) | ||
1091 | #define MX35_PAD_ATA_DMARQ__IPU_DIAGB_25 IOMUX_PAD(0x728, 0x2c4, 6, 0x0, 0, NO_PAD_CTRL) | ||
1092 | #define MX35_PAD_ATA_DMARQ__ECT_CTI_TRIG_IN1_4 IOMUX_PAD(0x728, 0x2c4, 7, 0x0, 0, NO_PAD_CTRL) | ||
1093 | |||
1094 | #define MX35_PAD_ATA_DA0__ATA_DA_0 IOMUX_PAD(0x72c, 0x2c8, 0, 0x0, 0, NO_PAD_CTRL) | ||
1095 | #define MX35_PAD_ATA_DA0__IPU_CSI_D_5 IOMUX_PAD(0x72c, 0x2c8, 1, 0x944, 2, NO_PAD_CTRL) | ||
1096 | #define MX35_PAD_ATA_DA0__KPP_COL_1 IOMUX_PAD(0x72c, 0x2c8, 3, 0x954, 2, NO_PAD_CTRL) | ||
1097 | #define MX35_PAD_ATA_DA0__GPIO3_0 IOMUX_PAD(0x72c, 0x2c8, 5, 0x8e8, 1, NO_PAD_CTRL) | ||
1098 | #define MX35_PAD_ATA_DA0__IPU_DIAGB_26 IOMUX_PAD(0x72c, 0x2c8, 6, 0x0, 0, NO_PAD_CTRL) | ||
1099 | #define MX35_PAD_ATA_DA0__ECT_CTI_TRIG_IN1_5 IOMUX_PAD(0x72c, 0x2c8, 7, 0x0, 0, NO_PAD_CTRL) | ||
1100 | |||
1101 | #define MX35_PAD_ATA_DA1__ATA_DA_1 IOMUX_PAD(0x730, 0x2cc, 0, 0x0, 0, NO_PAD_CTRL) | ||
1102 | #define MX35_PAD_ATA_DA1__IPU_CSI_D_6 IOMUX_PAD(0x730, 0x2cc, 1, 0x948, 2, NO_PAD_CTRL) | ||
1103 | #define MX35_PAD_ATA_DA1__KPP_COL_2 IOMUX_PAD(0x730, 0x2cc, 3, 0x958, 2, NO_PAD_CTRL) | ||
1104 | #define MX35_PAD_ATA_DA1__GPIO3_1 IOMUX_PAD(0x730, 0x2cc, 5, 0x0, 0, NO_PAD_CTRL) | ||
1105 | #define MX35_PAD_ATA_DA1__IPU_DIAGB_27 IOMUX_PAD(0x730, 0x2cc, 6, 0x0, 0, NO_PAD_CTRL) | ||
1106 | #define MX35_PAD_ATA_DA1__ECT_CTI_TRIG_IN1_6 IOMUX_PAD(0x730, 0x2cc, 7, 0x0, 0, NO_PAD_CTRL) | ||
1107 | |||
1108 | #define MX35_PAD_ATA_DA2__ATA_DA_2 IOMUX_PAD(0x734, 0x2d0, 0, 0x0, 0, NO_PAD_CTRL) | ||
1109 | #define MX35_PAD_ATA_DA2__IPU_CSI_D_7 IOMUX_PAD(0x734, 0x2d0, 1, 0x94c, 2, NO_PAD_CTRL) | ||
1110 | #define MX35_PAD_ATA_DA2__KPP_COL_3 IOMUX_PAD(0x734, 0x2d0, 3, 0x95c, 2, NO_PAD_CTRL) | ||
1111 | #define MX35_PAD_ATA_DA2__GPIO3_2 IOMUX_PAD(0x734, 0x2d0, 5, 0x0, 0, NO_PAD_CTRL) | ||
1112 | #define MX35_PAD_ATA_DA2__IPU_DIAGB_28 IOMUX_PAD(0x734, 0x2d0, 6, 0x0, 0, NO_PAD_CTRL) | ||
1113 | #define MX35_PAD_ATA_DA2__ECT_CTI_TRIG_IN1_7 IOMUX_PAD(0x734, 0x2d0, 7, 0x0, 0, NO_PAD_CTRL) | ||
1114 | |||
1115 | #define MX35_PAD_MLB_CLK__MLB_MLBCLK IOMUX_PAD(0x738, 0x2d4, 0, 0x0, 0, NO_PAD_CTRL) | ||
1116 | #define MX35_PAD_MLB_CLK__GPIO3_3 IOMUX_PAD(0x738, 0x2d4, 5, 0x0, 0, NO_PAD_CTRL) | ||
1117 | |||
1118 | #define MX35_PAD_MLB_DAT__MLB_MLBDAT IOMUX_PAD(0x73c, 0x2d8, 0, 0x0, 0, NO_PAD_CTRL) | ||
1119 | #define MX35_PAD_MLB_DAT__GPIO3_4 IOMUX_PAD(0x73c, 0x2d8, 5, 0x904, 1, NO_PAD_CTRL) | ||
1120 | |||
1121 | #define MX35_PAD_MLB_SIG__MLB_MLBSIG IOMUX_PAD(0x740, 0x2dc, 0, 0x0, 0, NO_PAD_CTRL) | ||
1122 | #define MX35_PAD_MLB_SIG__GPIO3_5 IOMUX_PAD(0x740, 0x2dc, 5, 0x908, 1, NO_PAD_CTRL) | ||
1123 | |||
1124 | #define MX35_PAD_FEC_TX_CLK__FEC_TX_CLK IOMUX_PAD(0x744, 0x2e0, 0, 0x0, 0, NO_PAD_CTRL) | ||
1125 | #define MX35_PAD_FEC_TX_CLK__ESDHC1_DAT4 IOMUX_PAD(0x744, 0x2e0, 1, 0x804, 1, NO_PAD_CTRL) | ||
1126 | #define MX35_PAD_FEC_TX_CLK__UART3_RXD_MUX IOMUX_PAD(0x744, 0x2e0, 2, 0x9a0, 3, NO_PAD_CTRL) | ||
1127 | #define MX35_PAD_FEC_TX_CLK__USB_TOP_USBH2_DIR IOMUX_PAD(0x744, 0x2e0, 3, 0x9ec, 1, NO_PAD_CTRL) | ||
1128 | #define MX35_PAD_FEC_TX_CLK__CSPI2_MOSI IOMUX_PAD(0x744, 0x2e0, 4, 0x7ec, 3, NO_PAD_CTRL) | ||
1129 | #define MX35_PAD_FEC_TX_CLK__GPIO3_6 IOMUX_PAD(0x744, 0x2e0, 5, 0x90c, 1, NO_PAD_CTRL) | ||
1130 | #define MX35_PAD_FEC_TX_CLK__IPU_DISPB_D12_VSYNC IOMUX_PAD(0x744, 0x2e0, 6, 0x928, 5, NO_PAD_CTRL) | ||
1131 | #define MX35_PAD_FEC_TX_CLK__ARM11P_TOP_EVNTBUS_0 IOMUX_PAD(0x744, 0x2e0, 7, 0x0, 0, NO_PAD_CTRL) | ||
1132 | |||
1133 | #define MX35_PAD_FEC_RX_CLK__FEC_RX_CLK IOMUX_PAD(0x748, 0x2e4, 0, 0x0, 0, NO_PAD_CTRL) | ||
1134 | #define MX35_PAD_FEC_RX_CLK__ESDHC1_DAT5 IOMUX_PAD(0x748, 0x2e4, 1, 0x808, 1, NO_PAD_CTRL) | ||
1135 | #define MX35_PAD_FEC_RX_CLK__UART3_TXD_MUX IOMUX_PAD(0x748, 0x2e4, 2, 0x0, 0, NO_PAD_CTRL) | ||
1136 | #define MX35_PAD_FEC_RX_CLK__USB_TOP_USBH2_STP IOMUX_PAD(0x748, 0x2e4, 3, 0x0, 0, NO_PAD_CTRL) | ||
1137 | #define MX35_PAD_FEC_RX_CLK__CSPI2_MISO IOMUX_PAD(0x748, 0x2e4, 4, 0x7e8, 3, NO_PAD_CTRL) | ||
1138 | #define MX35_PAD_FEC_RX_CLK__GPIO3_7 IOMUX_PAD(0x748, 0x2e4, 5, 0x910, 1, NO_PAD_CTRL) | ||
1139 | #define MX35_PAD_FEC_RX_CLK__IPU_DISPB_SD_D_I IOMUX_PAD(0x748, 0x2e4, 6, 0x92c, 4, NO_PAD_CTRL) | ||
1140 | #define MX35_PAD_FEC_RX_CLK__ARM11P_TOP_EVNTBUS_1 IOMUX_PAD(0x748, 0x2e4, 7, 0x0, 0, NO_PAD_CTRL) | ||
1141 | |||
1142 | #define MX35_PAD_FEC_RX_DV__FEC_RX_DV IOMUX_PAD(0x74c, 0x2e8, 0, 0x0, 0, NO_PAD_CTRL) | ||
1143 | #define MX35_PAD_FEC_RX_DV__ESDHC1_DAT6 IOMUX_PAD(0x74c, 0x2e8, 1, 0x80c, 1, NO_PAD_CTRL) | ||
1144 | #define MX35_PAD_FEC_RX_DV__UART3_RTS IOMUX_PAD(0x74c, 0x2e8, 2, 0x99c, 2, NO_PAD_CTRL) | ||
1145 | #define MX35_PAD_FEC_RX_DV__USB_TOP_USBH2_NXT IOMUX_PAD(0x74c, 0x2e8, 3, 0x9f0, 1, NO_PAD_CTRL) | ||
1146 | #define MX35_PAD_FEC_RX_DV__CSPI2_SCLK IOMUX_PAD(0x74c, 0x2e8, 4, 0x7e0, 3, NO_PAD_CTRL) | ||
1147 | #define MX35_PAD_FEC_RX_DV__GPIO3_8 IOMUX_PAD(0x74c, 0x2e8, 5, 0x914, 1, NO_PAD_CTRL) | ||
1148 | #define MX35_PAD_FEC_RX_DV__IPU_DISPB_SD_CLK IOMUX_PAD(0x74c, 0x2e8, 6, 0x0, 0, NO_PAD_CTRL) | ||
1149 | #define MX35_PAD_FEC_RX_DV__ARM11P_TOP_EVNTBUS_2 IOMUX_PAD(0x74c, 0x2e8, 7, 0x0, 0, NO_PAD_CTRL) | ||
1150 | |||
1151 | #define MX35_PAD_FEC_COL__FEC_COL IOMUX_PAD(0x750, 0x2ec, 0, 0x0, 0, NO_PAD_CTRL) | ||
1152 | #define MX35_PAD_FEC_COL__ESDHC1_DAT7 IOMUX_PAD(0x750, 0x2ec, 1, 0x810, 1, NO_PAD_CTRL) | ||
1153 | #define MX35_PAD_FEC_COL__UART3_CTS IOMUX_PAD(0x750, 0x2ec, 2, 0x0, 0, NO_PAD_CTRL) | ||
1154 | #define MX35_PAD_FEC_COL__USB_TOP_USBH2_DATA_0 IOMUX_PAD(0x750, 0x2ec, 3, 0x9cc, 1, NO_PAD_CTRL) | ||
1155 | #define MX35_PAD_FEC_COL__CSPI2_RDY IOMUX_PAD(0x750, 0x2ec, 4, 0x7e4, 3, NO_PAD_CTRL) | ||
1156 | #define MX35_PAD_FEC_COL__GPIO3_9 IOMUX_PAD(0x750, 0x2ec, 5, 0x918, 1, NO_PAD_CTRL) | ||
1157 | #define MX35_PAD_FEC_COL__IPU_DISPB_SER_RS IOMUX_PAD(0x750, 0x2ec, 6, 0x0, 0, NO_PAD_CTRL) | ||
1158 | #define MX35_PAD_FEC_COL__ARM11P_TOP_EVNTBUS_3 IOMUX_PAD(0x750, 0x2ec, 7, 0x0, 0, NO_PAD_CTRL) | ||
1159 | |||
1160 | #define MX35_PAD_FEC_RDATA0__FEC_RDATA_0 IOMUX_PAD(0x754, 0x2f0, 0, 0x0, 0, NO_PAD_CTRL) | ||
1161 | #define MX35_PAD_FEC_RDATA0__PWM_PWMO IOMUX_PAD(0x754, 0x2f0, 1, 0x0, 0, NO_PAD_CTRL) | ||
1162 | #define MX35_PAD_FEC_RDATA0__UART3_DTR IOMUX_PAD(0x754, 0x2f0, 2, 0x0, 0, NO_PAD_CTRL) | ||
1163 | #define MX35_PAD_FEC_RDATA0__USB_TOP_USBH2_DATA_1 IOMUX_PAD(0x754, 0x2f0, 3, 0x9d0, 1, NO_PAD_CTRL) | ||
1164 | #define MX35_PAD_FEC_RDATA0__CSPI2_SS0 IOMUX_PAD(0x754, 0x2f0, 4, 0x7f0, 2, NO_PAD_CTRL) | ||
1165 | #define MX35_PAD_FEC_RDATA0__GPIO3_10 IOMUX_PAD(0x754, 0x2f0, 5, 0x8ec, 1, NO_PAD_CTRL) | ||
1166 | #define MX35_PAD_FEC_RDATA0__IPU_DISPB_CS1 IOMUX_PAD(0x754, 0x2f0, 6, 0x0, 0, NO_PAD_CTRL) | ||
1167 | #define MX35_PAD_FEC_RDATA0__ARM11P_TOP_EVNTBUS_4 IOMUX_PAD(0x754, 0x2f0, 7, 0x0, 0, NO_PAD_CTRL) | ||
1168 | |||
1169 | #define MX35_PAD_FEC_TDATA0__FEC_TDATA_0 IOMUX_PAD(0x758, 0x2f4, 0, 0x0, 0, NO_PAD_CTRL) | ||
1170 | #define MX35_PAD_FEC_TDATA0__SPDIF_SPDIF_OUT1 IOMUX_PAD(0x758, 0x2f4, 1, 0x0, 0, NO_PAD_CTRL) | ||
1171 | #define MX35_PAD_FEC_TDATA0__UART3_DSR IOMUX_PAD(0x758, 0x2f4, 2, 0x0, 0, NO_PAD_CTRL) | ||
1172 | #define MX35_PAD_FEC_TDATA0__USB_TOP_USBH2_DATA_2 IOMUX_PAD(0x758, 0x2f4, 3, 0x9d4, 1, NO_PAD_CTRL) | ||
1173 | #define MX35_PAD_FEC_TDATA0__CSPI2_SS1 IOMUX_PAD(0x758, 0x2f4, 4, 0x7f4, 2, NO_PAD_CTRL) | ||
1174 | #define MX35_PAD_FEC_TDATA0__GPIO3_11 IOMUX_PAD(0x758, 0x2f4, 5, 0x8f0, 1, NO_PAD_CTRL) | ||
1175 | #define MX35_PAD_FEC_TDATA0__IPU_DISPB_CS0 IOMUX_PAD(0x758, 0x2f4, 6, 0x0, 0, NO_PAD_CTRL) | ||
1176 | #define MX35_PAD_FEC_TDATA0__ARM11P_TOP_EVNTBUS_5 IOMUX_PAD(0x758, 0x2f4, 7, 0x0, 0, NO_PAD_CTRL) | ||
1177 | |||
1178 | #define MX35_PAD_FEC_TX_EN__FEC_TX_EN IOMUX_PAD(0x75c, 0x2f8, 0, 0x0, 0, NO_PAD_CTRL) | ||
1179 | #define MX35_PAD_FEC_TX_EN__SPDIF_SPDIF_IN1 IOMUX_PAD(0x75c, 0x2f8, 1, 0x998, 3, NO_PAD_CTRL) | ||
1180 | #define MX35_PAD_FEC_TX_EN__UART3_RI IOMUX_PAD(0x75c, 0x2f8, 2, 0x0, 0, NO_PAD_CTRL) | ||
1181 | #define MX35_PAD_FEC_TX_EN__USB_TOP_USBH2_DATA_3 IOMUX_PAD(0x75c, 0x2f8, 3, 0x9d8, 1, NO_PAD_CTRL) | ||
1182 | #define MX35_PAD_FEC_TX_EN__GPIO3_12 IOMUX_PAD(0x75c, 0x2f8, 5, 0x8f4, 1, NO_PAD_CTRL) | ||
1183 | #define MX35_PAD_FEC_TX_EN__IPU_DISPB_PAR_RS IOMUX_PAD(0x75c, 0x2f8, 6, 0x0, 0, NO_PAD_CTRL) | ||
1184 | #define MX35_PAD_FEC_TX_EN__ARM11P_TOP_EVNTBUS_6 IOMUX_PAD(0x75c, 0x2f8, 7, 0x0, 0, NO_PAD_CTRL) | ||
1185 | |||
1186 | #define MX35_PAD_FEC_MDC__FEC_MDC IOMUX_PAD(0x760, 0x2fc, 0, 0x0, 0, NO_PAD_CTRL) | ||
1187 | #define MX35_PAD_FEC_MDC__CAN2_TXCAN IOMUX_PAD(0x760, 0x2fc, 1, 0x0, 0, NO_PAD_CTRL) | ||
1188 | #define MX35_PAD_FEC_MDC__UART3_DCD IOMUX_PAD(0x760, 0x2fc, 2, 0x0, 0, NO_PAD_CTRL) | ||
1189 | #define MX35_PAD_FEC_MDC__USB_TOP_USBH2_DATA_4 IOMUX_PAD(0x760, 0x2fc, 3, 0x9dc, 1, NO_PAD_CTRL) | ||
1190 | #define MX35_PAD_FEC_MDC__GPIO3_13 IOMUX_PAD(0x760, 0x2fc, 5, 0x8f8, 1, NO_PAD_CTRL) | ||
1191 | #define MX35_PAD_FEC_MDC__IPU_DISPB_WR IOMUX_PAD(0x760, 0x2fc, 6, 0x0, 0, NO_PAD_CTRL) | ||
1192 | #define MX35_PAD_FEC_MDC__ARM11P_TOP_EVNTBUS_7 IOMUX_PAD(0x760, 0x2fc, 7, 0x0, 0, NO_PAD_CTRL) | ||
1193 | |||
1194 | #define MX35_PAD_FEC_MDIO__FEC_MDIO IOMUX_PAD(0x764, 0x300, 0, 0x0, 0, NO_PAD_CTRL) | ||
1195 | #define MX35_PAD_FEC_MDIO__CAN2_RXCAN IOMUX_PAD(0x764, 0x300, 1, 0x7cc, 2, NO_PAD_CTRL) | ||
1196 | #define MX35_PAD_FEC_MDIO__USB_TOP_USBH2_DATA_5 IOMUX_PAD(0x764, 0x300, 3, 0x9e0, 1, NO_PAD_CTRL) | ||
1197 | #define MX35_PAD_FEC_MDIO__GPIO3_14 IOMUX_PAD(0x764, 0x300, 5, 0x8fc, 1, NO_PAD_CTRL) | ||
1198 | #define MX35_PAD_FEC_MDIO__IPU_DISPB_RD IOMUX_PAD(0x764, 0x300, 6, 0x0, 0, NO_PAD_CTRL) | ||
1199 | #define MX35_PAD_FEC_MDIO__ARM11P_TOP_EVNTBUS_8 IOMUX_PAD(0x764, 0x300, 7, 0x0, 0, NO_PAD_CTRL) | ||
1200 | |||
1201 | #define MX35_PAD_FEC_TX_ERR__FEC_TX_ERR IOMUX_PAD(0x768, 0x304, 0, 0x0, 0, NO_PAD_CTRL) | ||
1202 | #define MX35_PAD_FEC_TX_ERR__OWIRE_LINE IOMUX_PAD(0x768, 0x304, 1, 0x990, 2, NO_PAD_CTRL) | ||
1203 | #define MX35_PAD_FEC_TX_ERR__SPDIF_SPDIF_EXTCLK IOMUX_PAD(0x768, 0x304, 2, 0x994, 4, NO_PAD_CTRL) | ||
1204 | #define MX35_PAD_FEC_TX_ERR__USB_TOP_USBH2_DATA_6 IOMUX_PAD(0x768, 0x304, 3, 0x9e4, 1, NO_PAD_CTRL) | ||
1205 | #define MX35_PAD_FEC_TX_ERR__GPIO3_15 IOMUX_PAD(0x768, 0x304, 5, 0x900, 1, NO_PAD_CTRL) | ||
1206 | #define MX35_PAD_FEC_TX_ERR__IPU_DISPB_D0_VSYNC IOMUX_PAD(0x768, 0x304, 6, 0x924, 3, NO_PAD_CTRL) | ||
1207 | #define MX35_PAD_FEC_TX_ERR__ARM11P_TOP_EVNTBUS_9 IOMUX_PAD(0x768, 0x304, 7, 0x0, 0, NO_PAD_CTRL) | ||
1208 | |||
1209 | #define MX35_PAD_FEC_RX_ERR__FEC_RX_ERR IOMUX_PAD(0x76c, 0x308, 0, 0x0, 0, NO_PAD_CTRL) | ||
1210 | #define MX35_PAD_FEC_RX_ERR__IPU_CSI_D_0 IOMUX_PAD(0x76c, 0x308, 1, 0x930, 3, NO_PAD_CTRL) | ||
1211 | #define MX35_PAD_FEC_RX_ERR__USB_TOP_USBH2_DATA_7 IOMUX_PAD(0x76c, 0x308, 3, 0x9e8, 1, NO_PAD_CTRL) | ||
1212 | #define MX35_PAD_FEC_RX_ERR__KPP_COL_4 IOMUX_PAD(0x76c, 0x308, 4, 0x960, 1, NO_PAD_CTRL) | ||
1213 | #define MX35_PAD_FEC_RX_ERR__GPIO3_16 IOMUX_PAD(0x76c, 0x308, 5, 0x0, 0, NO_PAD_CTRL) | ||
1214 | #define MX35_PAD_FEC_RX_ERR__IPU_DISPB_SD_D_IO IOMUX_PAD(0x76c, 0x308, 6, 0x92c, 5, NO_PAD_CTRL) | ||
1215 | |||
1216 | #define MX35_PAD_FEC_CRS__FEC_CRS IOMUX_PAD(0x770, 0x30c, 0, 0x0, 0, NO_PAD_CTRL) | ||
1217 | #define MX35_PAD_FEC_CRS__IPU_CSI_D_1 IOMUX_PAD(0x770, 0x30c, 1, 0x934, 3, NO_PAD_CTRL) | ||
1218 | #define MX35_PAD_FEC_CRS__USB_TOP_USBH2_PWR IOMUX_PAD(0x770, 0x30c, 3, 0x0, 0, NO_PAD_CTRL) | ||
1219 | #define MX35_PAD_FEC_CRS__KPP_COL_5 IOMUX_PAD(0x770, 0x30c, 4, 0x964, 1, NO_PAD_CTRL) | ||
1220 | #define MX35_PAD_FEC_CRS__GPIO3_17 IOMUX_PAD(0x770, 0x30c, 5, 0x0, 0, NO_PAD_CTRL) | ||
1221 | #define MX35_PAD_FEC_CRS__IPU_FLASH_STROBE IOMUX_PAD(0x770, 0x30c, 6, 0x0, 0, NO_PAD_CTRL) | ||
1222 | |||
1223 | #define MX35_PAD_FEC_RDATA1__FEC_RDATA_1 IOMUX_PAD(0x774, 0x310, 0, 0x0, 0, NO_PAD_CTRL) | ||
1224 | #define MX35_PAD_FEC_RDATA1__IPU_CSI_D_2 IOMUX_PAD(0x774, 0x310, 1, 0x938, 4, NO_PAD_CTRL) | ||
1225 | #define MX35_PAD_FEC_RDATA1__AUDMUX_AUD6_RXC IOMUX_PAD(0x774, 0x310, 2, 0x0, 0, NO_PAD_CTRL) | ||
1226 | #define MX35_PAD_FEC_RDATA1__USB_TOP_USBH2_OC IOMUX_PAD(0x774, 0x310, 3, 0x9f4, 2, NO_PAD_CTRL) | ||
1227 | #define MX35_PAD_FEC_RDATA1__KPP_COL_6 IOMUX_PAD(0x774, 0x310, 4, 0x968, 1, NO_PAD_CTRL) | ||
1228 | #define MX35_PAD_FEC_RDATA1__GPIO3_18 IOMUX_PAD(0x774, 0x310, 5, 0x0, 0, NO_PAD_CTRL) | ||
1229 | #define MX35_PAD_FEC_RDATA1__IPU_DISPB_BE0 IOMUX_PAD(0x774, 0x310, 6, 0x0, 0, NO_PAD_CTRL) | ||
1230 | |||
1231 | #define MX35_PAD_FEC_TDATA1__FEC_TDATA_1 IOMUX_PAD(0x778, 0x314, 0, 0x0, 0, NO_PAD_CTRL) | ||
1232 | #define MX35_PAD_FEC_TDATA1__IPU_CSI_D_3 IOMUX_PAD(0x778, 0x314, 1, 0x93c, 4, NO_PAD_CTRL) | ||
1233 | #define MX35_PAD_FEC_TDATA1__AUDMUX_AUD6_RXFS IOMUX_PAD(0x778, 0x314, 2, 0x7bc, 1, NO_PAD_CTRL) | ||
1234 | #define MX35_PAD_FEC_TDATA1__KPP_COL_7 IOMUX_PAD(0x778, 0x314, 4, 0x96c, 1, NO_PAD_CTRL) | ||
1235 | #define MX35_PAD_FEC_TDATA1__GPIO3_19 IOMUX_PAD(0x778, 0x314, 5, 0x0, 0, NO_PAD_CTRL) | ||
1236 | #define MX35_PAD_FEC_TDATA1__IPU_DISPB_BE1 IOMUX_PAD(0x778, 0x314, 6, 0x0, 0, NO_PAD_CTRL) | ||
1237 | |||
1238 | #define MX35_PAD_FEC_RDATA2__FEC_RDATA_2 IOMUX_PAD(0x77c, 0x318, 0, 0x0, 0, NO_PAD_CTRL) | ||
1239 | #define MX35_PAD_FEC_RDATA2__IPU_CSI_D_4 IOMUX_PAD(0x77c, 0x318, 1, 0x940, 3, NO_PAD_CTRL) | ||
1240 | #define MX35_PAD_FEC_RDATA2__AUDMUX_AUD6_TXD IOMUX_PAD(0x77c, 0x318, 2, 0x7b4, 1, NO_PAD_CTRL) | ||
1241 | #define MX35_PAD_FEC_RDATA2__KPP_ROW_4 IOMUX_PAD(0x77c, 0x318, 4, 0x980, 1, NO_PAD_CTRL) | ||
1242 | #define MX35_PAD_FEC_RDATA2__GPIO3_20 IOMUX_PAD(0x77c, 0x318, 5, 0x0, 0, NO_PAD_CTRL) | ||
1243 | |||
1244 | #define MX35_PAD_FEC_TDATA2__FEC_TDATA_2 IOMUX_PAD(0x780, 0x31c, 0, 0x0, 0, NO_PAD_CTRL) | ||
1245 | #define MX35_PAD_FEC_TDATA2__IPU_CSI_D_5 IOMUX_PAD(0x780, 0x31c, 1, 0x944, 3, NO_PAD_CTRL) | ||
1246 | #define MX35_PAD_FEC_TDATA2__AUDMUX_AUD6_RXD IOMUX_PAD(0x780, 0x31c, 2, 0x7b0, 1, NO_PAD_CTRL) | ||
1247 | #define MX35_PAD_FEC_TDATA2__KPP_ROW_5 IOMUX_PAD(0x780, 0x31c, 4, 0x984, 1, NO_PAD_CTRL) | ||
1248 | #define MX35_PAD_FEC_TDATA2__GPIO3_21 IOMUX_PAD(0x780, 0x31c, 5, 0x0, 0, NO_PAD_CTRL) | ||
1249 | |||
1250 | #define MX35_PAD_FEC_RDATA3__FEC_RDATA_3 IOMUX_PAD(0x784, 0x320, 0, 0x0, 0, NO_PAD_CTRL) | ||
1251 | #define MX35_PAD_FEC_RDATA3__IPU_CSI_D_6 IOMUX_PAD(0x784, 0x320, 1, 0x948, 3, NO_PAD_CTRL) | ||
1252 | #define MX35_PAD_FEC_RDATA3__AUDMUX_AUD6_TXC IOMUX_PAD(0x784, 0x320, 2, 0x7c0, 1, NO_PAD_CTRL) | ||
1253 | #define MX35_PAD_FEC_RDATA3__KPP_ROW_6 IOMUX_PAD(0x784, 0x320, 4, 0x988, 1, NO_PAD_CTRL) | ||
1254 | #define MX35_PAD_FEC_RDATA3__GPIO3_22 IOMUX_PAD(0x784, 0x320, 6, 0x0, 0, NO_PAD_CTRL) | ||
1255 | |||
1256 | #define MX35_PAD_FEC_TDATA3__FEC_TDATA_3 IOMUX_PAD(0x788, 0x324, 0, 0x0, 0, NO_PAD_CTRL) | ||
1257 | #define MX35_PAD_FEC_TDATA3__IPU_CSI_D_7 IOMUX_PAD(0x788, 0x324, 1, 0x94c, 3, NO_PAD_CTRL) | ||
1258 | #define MX35_PAD_FEC_TDATA3__AUDMUX_AUD6_TXFS IOMUX_PAD(0x788, 0x324, 2, 0x7c4, 1, NO_PAD_CTRL) | ||
1259 | #define MX35_PAD_FEC_TDATA3__KPP_ROW_7 IOMUX_PAD(0x788, 0x324, 4, 0x98c, 1, NO_PAD_CTRL) | ||
1260 | #define MX35_PAD_FEC_TDATA3__GPIO3_23 IOMUX_PAD(0x788, 0x324, 5, 0x0, 0, NO_PAD_CTRL) | ||
1261 | |||
1262 | #define MX35_PAD_EXT_ARMCLK__CCM_EXT_ARMCLK IOMUX_PAD(0x78c, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
1263 | |||
1264 | #define MX35_PAD_TEST_MODE__TCU_TEST_MODE IOMUX_PAD(0x790, 0x0, 0, 0x0, 0, NO_PAD_CTRL) | ||
1265 | |||
1266 | |||
1267 | #endif /* __MACH_IOMUX_MX35_H__ */ | ||
diff --git a/arch/arm/plat-mxc/include/mach/iomux-v3.h b/arch/arm/plat-mxc/include/mach/iomux-v3.h new file mode 100644 index 000000000000..7cd84547658f --- /dev/null +++ b/arch/arm/plat-mxc/include/mach/iomux-v3.h | |||
@@ -0,0 +1,121 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH, | ||
3 | * <armlinux@phytec.de> | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or | ||
6 | * modify it under the terms of the GNU General Public License | ||
7 | * as published by the Free Software Foundation; either version 2 | ||
8 | * of the License, or (at your option) any later version. | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License | ||
15 | * along with this program; if not, write to the Free Software | ||
16 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | ||
17 | * MA 02110-1301, USA. | ||
18 | */ | ||
19 | |||
20 | #ifndef __MACH_IOMUX_V3_H__ | ||
21 | #define __MACH_IOMUX_V3_H__ | ||
22 | |||
23 | /* | ||
24 | * build IOMUX_PAD structure | ||
25 | * | ||
26 | * This iomux scheme is based around pads, which are the physical balls | ||
27 | * on the processor. | ||
28 | * | ||
29 | * - Each pad has a pad control register (IOMUXC_SW_PAD_CTRL_x) which controls | ||
30 | * things like driving strength and pullup/pulldown. | ||
31 | * - Each pad can have but not necessarily does have an output routing register | ||
32 | * (IOMUXC_SW_MUX_CTL_PAD_x). | ||
33 | * - Each pad can have but not necessarily does have an input routing register | ||
34 | * (IOMUXC_x_SELECT_INPUT) | ||
35 | * | ||
36 | * The three register sets do not have a fixed offset to each other, | ||
37 | * hence we order this table by pad control registers (which all pads | ||
38 | * have) and put the optional i/o routing registers into additional | ||
39 | * fields. | ||
40 | * | ||
41 | * The naming convention for the pad modes is MX35_PAD_<padname>__<padmode> | ||
42 | * If <padname> or <padmode> refers to a GPIO, it is named | ||
43 | * GPIO_<unit>_<num> | ||
44 | * | ||
45 | */ | ||
46 | |||
47 | struct pad_desc { | ||
48 | unsigned mux_ctrl_ofs:12; /* IOMUXC_SW_MUX_CTL_PAD offset */ | ||
49 | unsigned mux_mode:8; | ||
50 | unsigned pad_ctrl_ofs:12; /* IOMUXC_SW_PAD_CTRL offset */ | ||
51 | #define NO_PAD_CTRL (1 << 16) | ||
52 | unsigned pad_ctrl:17; | ||
53 | unsigned select_input_ofs:12; /* IOMUXC_SELECT_INPUT offset */ | ||
54 | unsigned select_input:3; | ||
55 | }; | ||
56 | |||
57 | #define IOMUX_PAD(_pad_ctrl_ofs, _mux_ctrl_ofs, _mux_mode, _select_input_ofs, \ | ||
58 | _select_input, _pad_ctrl) \ | ||
59 | { \ | ||
60 | .mux_ctrl_ofs = _mux_ctrl_ofs, \ | ||
61 | .mux_mode = _mux_mode, \ | ||
62 | .pad_ctrl_ofs = _pad_ctrl_ofs, \ | ||
63 | .pad_ctrl = _pad_ctrl, \ | ||
64 | .select_input_ofs = _select_input_ofs, \ | ||
65 | .select_input = _select_input, \ | ||
66 | } | ||
67 | |||
68 | /* | ||
69 | * Use to set PAD control | ||
70 | */ | ||
71 | #define PAD_CTL_DRIVE_VOLTAGE_3_3_V 0 | ||
72 | #define PAD_CTL_DRIVE_VOLTAGE_1_8_V 1 | ||
73 | |||
74 | #define PAD_CTL_NO_HYSTERESIS 0 | ||
75 | #define PAD_CTL_HYSTERESIS 1 | ||
76 | |||
77 | #define PAD_CTL_PULL_DISABLED 0x0 | ||
78 | #define PAD_CTL_PULL_KEEPER 0xa | ||
79 | #define PAD_CTL_PULL_DOWN_100K 0xc | ||
80 | #define PAD_CTL_PULL_UP_47K 0xd | ||
81 | #define PAD_CTL_PULL_UP_100K 0xe | ||
82 | #define PAD_CTL_PULL_UP_22K 0xf | ||
83 | |||
84 | #define PAD_CTL_OUTPUT_CMOS 0 | ||
85 | #define PAD_CTL_OUTPUT_OPEN_DRAIN 1 | ||
86 | |||
87 | #define PAD_CTL_DRIVE_STRENGTH_NORM 0 | ||
88 | #define PAD_CTL_DRIVE_STRENGTH_HIGH 1 | ||
89 | #define PAD_CTL_DRIVE_STRENGTH_MAX 2 | ||
90 | |||
91 | #define PAD_CTL_SLEW_RATE_SLOW 0 | ||
92 | #define PAD_CTL_SLEW_RATE_FAST 1 | ||
93 | |||
94 | /* | ||
95 | * setups a single pad: | ||
96 | * - reserves the pad so that it is not claimed by another driver | ||
97 | * - setups the iomux according to the configuration | ||
98 | */ | ||
99 | int mxc_iomux_v3_setup_pad(struct pad_desc *pad); | ||
100 | |||
101 | /* | ||
102 | * setups mutliple pads | ||
103 | * convenient way to call the above function with tables | ||
104 | */ | ||
105 | int mxc_iomux_v3_setup_multiple_pads(struct pad_desc *pad_list, unsigned count); | ||
106 | |||
107 | /* | ||
108 | * releases a single pad: | ||
109 | * - make it available for a future use by another driver | ||
110 | * - DOES NOT reconfigure the IOMUX in its reset state | ||
111 | */ | ||
112 | void mxc_iomux_v3_release_pad(struct pad_desc *pad); | ||
113 | |||
114 | /* | ||
115 | * releases multiple pads | ||
116 | * convenvient way to call the above function with tables | ||
117 | */ | ||
118 | void mxc_iomux_v3_release_multiple_pads(struct pad_desc *pad_list, int count); | ||
119 | |||
120 | #endif /* __MACH_IOMUX_V3_H__*/ | ||
121 | |||
diff --git a/arch/arm/plat-mxc/include/mach/memory.h b/arch/arm/plat-mxc/include/mach/memory.h index eca37d09f3f8..6065e00176ed 100644 --- a/arch/arm/plat-mxc/include/mach/memory.h +++ b/arch/arm/plat-mxc/include/mach/memory.h | |||
@@ -32,4 +32,12 @@ | |||
32 | #define CONSISTENT_DMA_SIZE SZ_4M | 32 | #define CONSISTENT_DMA_SIZE SZ_4M |
33 | #endif /* CONFIG_MX1_VIDEO */ | 33 | #endif /* CONFIG_MX1_VIDEO */ |
34 | 34 | ||
35 | #if defined(CONFIG_MX3_VIDEO) | ||
36 | /* | ||
37 | * Increase size of DMA-consistent memory region. | ||
38 | * This is required for mx3 camera driver to capture at least two QXGA frames. | ||
39 | */ | ||
40 | #define CONSISTENT_DMA_SIZE SZ_8M | ||
41 | #endif /* CONFIG_MX3_VIDEO */ | ||
42 | |||
35 | #endif /* __ASM_ARCH_MXC_MEMORY_H__ */ | 43 | #endif /* __ASM_ARCH_MXC_MEMORY_H__ */ |
diff --git a/arch/arm/plat-mxc/include/mach/mx1.h b/arch/arm/plat-mxc/include/mach/mx1.h index b92e02324d8e..1000bf330bcd 100644 --- a/arch/arm/plat-mxc/include/mach/mx1.h +++ b/arch/arm/plat-mxc/include/mach/mx1.h | |||
@@ -179,7 +179,7 @@ | |||
179 | #define DMA_REQ_UART1_T 30 | 179 | #define DMA_REQ_UART1_T 30 |
180 | #define DMA_REQ_UART1_R 31 | 180 | #define DMA_REQ_UART1_R 31 |
181 | 181 | ||
182 | /* mandatory for CONFIG_LL_DEBUG */ | 182 | /* mandatory for CONFIG_DEBUG_LL */ |
183 | #define MXC_LL_UART_PADDR UART1_BASE_ADDR | 183 | #define MXC_LL_UART_PADDR UART1_BASE_ADDR |
184 | #define MXC_LL_UART_VADDR IO_ADDRESS(UART1_BASE_ADDR) | 184 | #define MXC_LL_UART_VADDR IO_ADDRESS(UART1_BASE_ADDR) |
185 | 185 | ||
diff --git a/arch/arm/plat-mxc/include/mach/mx3x.h b/arch/arm/plat-mxc/include/mach/mx3x.h index 3878c6085d5c..b559a4bb5769 100644 --- a/arch/arm/plat-mxc/include/mach/mx3x.h +++ b/arch/arm/plat-mxc/include/mach/mx3x.h | |||
@@ -48,6 +48,9 @@ | |||
48 | #define CS4_SIZE SZ_32M | 48 | #define CS4_SIZE SZ_32M |
49 | 49 | ||
50 | #define CS5_BASE_ADDR 0xB6000000 | 50 | #define CS5_BASE_ADDR 0xB6000000 |
51 | #define CS5_BASE_ADDR_VIRT 0xF6000000 | ||
52 | #define CS5_SIZE SZ_32M | ||
53 | |||
51 | #define PCMCIA_MEM_BASE_ADDR 0xBC000000 | 54 | #define PCMCIA_MEM_BASE_ADDR 0xBC000000 |
52 | 55 | ||
53 | /* | 56 | /* |
@@ -191,6 +194,9 @@ | |||
191 | #define CS4_IO_ADDRESS(x) \ | 194 | #define CS4_IO_ADDRESS(x) \ |
192 | (((x) - CS4_BASE_ADDR) + CS4_BASE_ADDR_VIRT) | 195 | (((x) - CS4_BASE_ADDR) + CS4_BASE_ADDR_VIRT) |
193 | 196 | ||
197 | #define CS5_IO_ADDRESS(x) \ | ||
198 | (((x) - CS5_BASE_ADDR) + CS5_BASE_ADDR_VIRT) | ||
199 | |||
194 | #define X_MEMC_IO_ADDRESS(x) \ | 200 | #define X_MEMC_IO_ADDRESS(x) \ |
195 | (((x) - X_MEMC_BASE_ADDR) + X_MEMC_BASE_ADDR_VIRT) | 201 | (((x) - X_MEMC_BASE_ADDR) + X_MEMC_BASE_ADDR_VIRT) |
196 | 202 | ||
diff --git a/arch/arm/plat-mxc/include/mach/mxc_timer.h b/arch/arm/plat-mxc/include/mach/mxc_timer.h deleted file mode 100644 index 6c19a134744b..000000000000 --- a/arch/arm/plat-mxc/include/mach/mxc_timer.h +++ /dev/null | |||
@@ -1,158 +0,0 @@ | |||
1 | /* | ||
2 | * mxc_timer.h | ||
3 | * | ||
4 | * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de) | ||
5 | * | ||
6 | * Platform independent (i.MX1, i.MX2, i.MX3) definition for timer handling. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License | ||
10 | * as published by the Free Software Foundation; either version 2 | ||
11 | * of the License, or (at your option) any later version. | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, | ||
20 | * Boston, MA 02110-1301, USA. | ||
21 | */ | ||
22 | |||
23 | #ifndef __PLAT_MXC_TIMER_H | ||
24 | #define __PLAT_MXC_TIMER_H | ||
25 | |||
26 | #include <linux/clk.h> | ||
27 | #include <mach/hardware.h> | ||
28 | |||
29 | #ifdef CONFIG_ARCH_MX1 | ||
30 | #define TIMER_BASE IO_ADDRESS(TIM1_BASE_ADDR) | ||
31 | #define TIMER_INTERRUPT TIM1_INT | ||
32 | |||
33 | #define TCTL_VAL TCTL_CLK_PCLK1 | ||
34 | #define TCTL_IRQEN (1<<4) | ||
35 | #define TCTL_FRR (1<<8) | ||
36 | #define TCTL_CLK_PCLK1 (1<<1) | ||
37 | #define TCTL_CLK_PCLK1_4 (2<<1) | ||
38 | #define TCTL_CLK_TIN (3<<1) | ||
39 | #define TCTL_CLK_32 (4<<1) | ||
40 | |||
41 | #define MXC_TCTL 0x00 | ||
42 | #define MXC_TPRER 0x04 | ||
43 | #define MXC_TCMP 0x08 | ||
44 | #define MXC_TCR 0x0c | ||
45 | #define MXC_TCN 0x10 | ||
46 | #define MXC_TSTAT 0x14 | ||
47 | #define TSTAT_CAPT (1<<1) | ||
48 | #define TSTAT_COMP (1<<0) | ||
49 | |||
50 | static inline void gpt_irq_disable(void) | ||
51 | { | ||
52 | unsigned int tmp; | ||
53 | |||
54 | tmp = __raw_readl(TIMER_BASE + MXC_TCTL); | ||
55 | __raw_writel(tmp & ~TCTL_IRQEN, TIMER_BASE + MXC_TCTL); | ||
56 | } | ||
57 | |||
58 | static inline void gpt_irq_enable(void) | ||
59 | { | ||
60 | __raw_writel(__raw_readl(TIMER_BASE + MXC_TCTL) | TCTL_IRQEN, | ||
61 | TIMER_BASE + MXC_TCTL); | ||
62 | } | ||
63 | |||
64 | static void gpt_irq_acknowledge(void) | ||
65 | { | ||
66 | __raw_writel(0, TIMER_BASE + MXC_TSTAT); | ||
67 | } | ||
68 | #endif /* CONFIG_ARCH_MX1 */ | ||
69 | |||
70 | #ifdef CONFIG_ARCH_MX2 | ||
71 | #define TIMER_BASE IO_ADDRESS(GPT1_BASE_ADDR) | ||
72 | #define TIMER_INTERRUPT MXC_INT_GPT1 | ||
73 | |||
74 | #define MXC_TCTL 0x00 | ||
75 | #define TCTL_VAL TCTL_CLK_PCLK1 | ||
76 | #define TCTL_CLK_PCLK1 (1<<1) | ||
77 | #define TCTL_CLK_PCLK1_4 (2<<1) | ||
78 | #define TCTL_IRQEN (1<<4) | ||
79 | #define TCTL_FRR (1<<8) | ||
80 | #define MXC_TPRER 0x04 | ||
81 | #define MXC_TCMP 0x08 | ||
82 | #define MXC_TCR 0x0c | ||
83 | #define MXC_TCN 0x10 | ||
84 | #define MXC_TSTAT 0x14 | ||
85 | #define TSTAT_CAPT (1<<1) | ||
86 | #define TSTAT_COMP (1<<0) | ||
87 | |||
88 | static inline void gpt_irq_disable(void) | ||
89 | { | ||
90 | unsigned int tmp; | ||
91 | |||
92 | tmp = __raw_readl(TIMER_BASE + MXC_TCTL); | ||
93 | __raw_writel(tmp & ~TCTL_IRQEN, TIMER_BASE + MXC_TCTL); | ||
94 | } | ||
95 | |||
96 | static inline void gpt_irq_enable(void) | ||
97 | { | ||
98 | __raw_writel(__raw_readl(TIMER_BASE + MXC_TCTL) | TCTL_IRQEN, | ||
99 | TIMER_BASE + MXC_TCTL); | ||
100 | } | ||
101 | |||
102 | static void gpt_irq_acknowledge(void) | ||
103 | { | ||
104 | __raw_writel(TSTAT_CAPT | TSTAT_COMP, TIMER_BASE + MXC_TSTAT); | ||
105 | } | ||
106 | #endif /* CONFIG_ARCH_MX2 */ | ||
107 | |||
108 | #ifdef CONFIG_ARCH_MX3 | ||
109 | #define TIMER_BASE IO_ADDRESS(GPT1_BASE_ADDR) | ||
110 | #define TIMER_INTERRUPT MXC_INT_GPT | ||
111 | |||
112 | #define MXC_TCTL 0x00 | ||
113 | #define TCTL_VAL (TCTL_CLK_IPG | TCTL_WAITEN) | ||
114 | #define TCTL_CLK_IPG (1<<6) | ||
115 | #define TCTL_FRR (1<<9) | ||
116 | #define TCTL_WAITEN (1<<3) | ||
117 | |||
118 | #define MXC_TPRER 0x04 | ||
119 | #define MXC_TSTAT 0x08 | ||
120 | #define TSTAT_OF1 (1<<0) | ||
121 | #define TSTAT_OF2 (1<<1) | ||
122 | #define TSTAT_OF3 (1<<2) | ||
123 | #define TSTAT_IF1 (1<<3) | ||
124 | #define TSTAT_IF2 (1<<4) | ||
125 | #define TSTAT_ROV (1<<5) | ||
126 | #define MXC_IR 0x0c | ||
127 | #define MXC_TCMP 0x10 | ||
128 | #define MXC_TCMP2 0x14 | ||
129 | #define MXC_TCMP3 0x18 | ||
130 | #define MXC_TCR 0x1c | ||
131 | #define MXC_TCN 0x24 | ||
132 | |||
133 | static inline void gpt_irq_disable(void) | ||
134 | { | ||
135 | __raw_writel(0, TIMER_BASE + MXC_IR); | ||
136 | } | ||
137 | |||
138 | static inline void gpt_irq_enable(void) | ||
139 | { | ||
140 | __raw_writel(1<<0, TIMER_BASE + MXC_IR); | ||
141 | } | ||
142 | |||
143 | static inline void gpt_irq_acknowledge(void) | ||
144 | { | ||
145 | __raw_writel(TSTAT_OF1, TIMER_BASE + MXC_TSTAT); | ||
146 | } | ||
147 | #endif /* CONFIG_ARCH_MX3 */ | ||
148 | |||
149 | #define TCTL_SWR (1<<15) | ||
150 | #define TCTL_CC (1<<10) | ||
151 | #define TCTL_OM (1<<9) | ||
152 | #define TCTL_CAP_RIS (1<<6) | ||
153 | #define TCTL_CAP_FAL (2<<6) | ||
154 | #define TCTL_CAP_RIS_FAL (3<<6) | ||
155 | #define TCTL_CAP_ENA (1<<5) | ||
156 | #define TCTL_TEN (1<<0) | ||
157 | |||
158 | #endif | ||
diff --git a/arch/arm/plat-mxc/include/mach/usb.h b/arch/arm/plat-mxc/include/mach/usb.h index 2dacb3086f1c..be273371f34a 100644 --- a/arch/arm/plat-mxc/include/mach/usb.h +++ b/arch/arm/plat-mxc/include/mach/usb.h | |||
@@ -17,7 +17,7 @@ | |||
17 | 17 | ||
18 | struct imxusb_platform_data { | 18 | struct imxusb_platform_data { |
19 | int (*init)(struct device *); | 19 | int (*init)(struct device *); |
20 | int (*exit)(struct device *); | 20 | void (*exit)(struct device *); |
21 | }; | 21 | }; |
22 | 22 | ||
23 | #endif /* __ASM_ARCH_MXC_USB */ | 23 | #endif /* __ASM_ARCH_MXC_USB */ |
diff --git a/arch/arm/plat-mxc/iomux-v3.c b/arch/arm/plat-mxc/iomux-v3.c new file mode 100644 index 000000000000..77a078f9513f --- /dev/null +++ b/arch/arm/plat-mxc/iomux-v3.c | |||
@@ -0,0 +1,98 @@ | |||
1 | /* | ||
2 | * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved. | ||
3 | * Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de> | ||
4 | * Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH, | ||
5 | * <armlinux@phytec.de> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * as published by the Free Software Foundation; either version 2 | ||
10 | * of the License, or (at your option) any later version. | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | ||
19 | * MA 02110-1301, USA. | ||
20 | */ | ||
21 | #include <linux/errno.h> | ||
22 | #include <linux/init.h> | ||
23 | #include <linux/kernel.h> | ||
24 | #include <linux/module.h> | ||
25 | #include <linux/string.h> | ||
26 | #include <linux/gpio.h> | ||
27 | |||
28 | #include <mach/hardware.h> | ||
29 | #include <asm/mach/map.h> | ||
30 | #include <mach/iomux-v3.h> | ||
31 | |||
32 | #define IOMUX_BASE IO_ADDRESS(IOMUXC_BASE_ADDR) | ||
33 | |||
34 | static unsigned long iomux_v3_pad_alloc_map[0x200 / BITS_PER_LONG]; | ||
35 | |||
36 | /* | ||
37 | * setups a single pin: | ||
38 | * - reserves the pin so that it is not claimed by another driver | ||
39 | * - setups the iomux according to the configuration | ||
40 | */ | ||
41 | int mxc_iomux_v3_setup_pad(struct pad_desc *pad) | ||
42 | { | ||
43 | unsigned int pad_ofs = pad->pad_ctrl_ofs; | ||
44 | |||
45 | if (test_and_set_bit(pad_ofs >> 2, iomux_v3_pad_alloc_map)) | ||
46 | return -EBUSY; | ||
47 | if (pad->mux_ctrl_ofs) | ||
48 | __raw_writel(pad->mux_mode, IOMUX_BASE + pad->mux_ctrl_ofs); | ||
49 | |||
50 | if (pad->select_input_ofs) | ||
51 | __raw_writel(pad->select_input, | ||
52 | IOMUX_BASE + pad->select_input_ofs); | ||
53 | |||
54 | if (!(pad->pad_ctrl & NO_PAD_CTRL)) | ||
55 | __raw_writel(pad->pad_ctrl, IOMUX_BASE + pad->pad_ctrl_ofs); | ||
56 | return 0; | ||
57 | } | ||
58 | EXPORT_SYMBOL(mxc_iomux_v3_setup_pad); | ||
59 | |||
60 | int mxc_iomux_v3_setup_multiple_pads(struct pad_desc *pad_list, unsigned count) | ||
61 | { | ||
62 | struct pad_desc *p = pad_list; | ||
63 | int i; | ||
64 | int ret; | ||
65 | |||
66 | for (i = 0; i < count; i++) { | ||
67 | ret = mxc_iomux_v3_setup_pad(p); | ||
68 | if (ret) | ||
69 | goto setup_error; | ||
70 | p++; | ||
71 | } | ||
72 | return 0; | ||
73 | |||
74 | setup_error: | ||
75 | mxc_iomux_v3_release_multiple_pads(pad_list, i); | ||
76 | return ret; | ||
77 | } | ||
78 | EXPORT_SYMBOL(mxc_iomux_v3_setup_multiple_pads); | ||
79 | |||
80 | void mxc_iomux_v3_release_pad(struct pad_desc *pad) | ||
81 | { | ||
82 | unsigned int pad_ofs = pad->pad_ctrl_ofs; | ||
83 | |||
84 | clear_bit(pad_ofs >> 2, iomux_v3_pad_alloc_map); | ||
85 | } | ||
86 | EXPORT_SYMBOL(mxc_iomux_v3_release_pad); | ||
87 | |||
88 | void mxc_iomux_v3_release_multiple_pads(struct pad_desc *pad_list, int count) | ||
89 | { | ||
90 | struct pad_desc *p = pad_list; | ||
91 | int i; | ||
92 | |||
93 | for (i = 0; i < count; i++) { | ||
94 | mxc_iomux_v3_release_pad(p); | ||
95 | p++; | ||
96 | } | ||
97 | } | ||
98 | EXPORT_SYMBOL(mxc_iomux_v3_release_multiple_pads); | ||
diff --git a/arch/arm/plat-mxc/irq.c b/arch/arm/plat-mxc/irq.c index 0fb68a531f55..8aee76304f8f 100644 --- a/arch/arm/plat-mxc/irq.c +++ b/arch/arm/plat-mxc/irq.c | |||
@@ -24,31 +24,27 @@ | |||
24 | #include <asm/mach/irq.h> | 24 | #include <asm/mach/irq.h> |
25 | #include <mach/hardware.h> | 25 | #include <mach/hardware.h> |
26 | 26 | ||
27 | #define AVIC_BASE IO_ADDRESS(AVIC_BASE_ADDR) | 27 | #define AVIC_INTCNTL 0x00 /* int control reg */ |
28 | #define AVIC_INTCNTL (AVIC_BASE + 0x00) /* int control reg */ | 28 | #define AVIC_NIMASK 0x04 /* int mask reg */ |
29 | #define AVIC_NIMASK (AVIC_BASE + 0x04) /* int mask reg */ | 29 | #define AVIC_INTENNUM 0x08 /* int enable number reg */ |
30 | #define AVIC_INTENNUM (AVIC_BASE + 0x08) /* int enable number reg */ | 30 | #define AVIC_INTDISNUM 0x0C /* int disable number reg */ |
31 | #define AVIC_INTDISNUM (AVIC_BASE + 0x0C) /* int disable number reg */ | 31 | #define AVIC_INTENABLEH 0x10 /* int enable reg high */ |
32 | #define AVIC_INTENABLEH (AVIC_BASE + 0x10) /* int enable reg high */ | 32 | #define AVIC_INTENABLEL 0x14 /* int enable reg low */ |
33 | #define AVIC_INTENABLEL (AVIC_BASE + 0x14) /* int enable reg low */ | 33 | #define AVIC_INTTYPEH 0x18 /* int type reg high */ |
34 | #define AVIC_INTTYPEH (AVIC_BASE + 0x18) /* int type reg high */ | 34 | #define AVIC_INTTYPEL 0x1C /* int type reg low */ |
35 | #define AVIC_INTTYPEL (AVIC_BASE + 0x1C) /* int type reg low */ | 35 | #define AVIC_NIPRIORITY(x) (0x20 + 4 * (7 - (x))) /* int priority */ |
36 | #define AVIC_NIPRIORITY(x) (AVIC_BASE + (0x20 + 4 * (7 - (x)))) /* int priority */ | 36 | #define AVIC_NIVECSR 0x40 /* norm int vector/status */ |
37 | #define AVIC_NIVECSR (AVIC_BASE + 0x40) /* norm int vector/status */ | 37 | #define AVIC_FIVECSR 0x44 /* fast int vector/status */ |
38 | #define AVIC_FIVECSR (AVIC_BASE + 0x44) /* fast int vector/status */ | 38 | #define AVIC_INTSRCH 0x48 /* int source reg high */ |
39 | #define AVIC_INTSRCH (AVIC_BASE + 0x48) /* int source reg high */ | 39 | #define AVIC_INTSRCL 0x4C /* int source reg low */ |
40 | #define AVIC_INTSRCL (AVIC_BASE + 0x4C) /* int source reg low */ | 40 | #define AVIC_INTFRCH 0x50 /* int force reg high */ |
41 | #define AVIC_INTFRCH (AVIC_BASE + 0x50) /* int force reg high */ | 41 | #define AVIC_INTFRCL 0x54 /* int force reg low */ |
42 | #define AVIC_INTFRCL (AVIC_BASE + 0x54) /* int force reg low */ | 42 | #define AVIC_NIPNDH 0x58 /* norm int pending high */ |
43 | #define AVIC_NIPNDH (AVIC_BASE + 0x58) /* norm int pending high */ | 43 | #define AVIC_NIPNDL 0x5C /* norm int pending low */ |
44 | #define AVIC_NIPNDL (AVIC_BASE + 0x5C) /* norm int pending low */ | 44 | #define AVIC_FIPNDH 0x60 /* fast int pending high */ |
45 | #define AVIC_FIPNDH (AVIC_BASE + 0x60) /* fast int pending high */ | 45 | #define AVIC_FIPNDL 0x64 /* fast int pending low */ |
46 | #define AVIC_FIPNDL (AVIC_BASE + 0x64) /* fast int pending low */ | 46 | |
47 | 47 | static void __iomem *avic_base; | |
48 | #define SYSTEM_PREV_REG IO_ADDRESS(IIM_BASE_ADDR + 0x20) | ||
49 | #define SYSTEM_SREV_REG IO_ADDRESS(IIM_BASE_ADDR + 0x24) | ||
50 | #define IIM_PROD_REV_SH 3 | ||
51 | #define IIM_PROD_REV_LEN 5 | ||
52 | 48 | ||
53 | int imx_irq_set_priority(unsigned char irq, unsigned char prio) | 49 | int imx_irq_set_priority(unsigned char irq, unsigned char prio) |
54 | { | 50 | { |
@@ -59,11 +55,11 @@ int imx_irq_set_priority(unsigned char irq, unsigned char prio) | |||
59 | if (irq >= MXC_INTERNAL_IRQS) | 55 | if (irq >= MXC_INTERNAL_IRQS) |
60 | return -EINVAL;; | 56 | return -EINVAL;; |
61 | 57 | ||
62 | temp = __raw_readl(AVIC_NIPRIORITY(irq / 8)); | 58 | temp = __raw_readl(avic_base + AVIC_NIPRIORITY(irq / 8)); |
63 | temp &= ~mask; | 59 | temp &= ~mask; |
64 | temp |= prio & mask; | 60 | temp |= prio & mask; |
65 | 61 | ||
66 | __raw_writel(temp, AVIC_NIPRIORITY(irq / 8)); | 62 | __raw_writel(temp, avic_base + AVIC_NIPRIORITY(irq / 8)); |
67 | 63 | ||
68 | return 0; | 64 | return 0; |
69 | #else | 65 | #else |
@@ -81,12 +77,12 @@ int mxc_set_irq_fiq(unsigned int irq, unsigned int type) | |||
81 | return -EINVAL; | 77 | return -EINVAL; |
82 | 78 | ||
83 | if (irq < MXC_INTERNAL_IRQS / 2) { | 79 | if (irq < MXC_INTERNAL_IRQS / 2) { |
84 | irqt = __raw_readl(AVIC_INTTYPEL) & ~(1 << irq); | 80 | irqt = __raw_readl(avic_base + AVIC_INTTYPEL) & ~(1 << irq); |
85 | __raw_writel(irqt | (!!type << irq), AVIC_INTTYPEL); | 81 | __raw_writel(irqt | (!!type << irq), avic_base + AVIC_INTTYPEL); |
86 | } else { | 82 | } else { |
87 | irq -= MXC_INTERNAL_IRQS / 2; | 83 | irq -= MXC_INTERNAL_IRQS / 2; |
88 | irqt = __raw_readl(AVIC_INTTYPEH) & ~(1 << irq); | 84 | irqt = __raw_readl(avic_base + AVIC_INTTYPEH) & ~(1 << irq); |
89 | __raw_writel(irqt | (!!type << irq), AVIC_INTTYPEH); | 85 | __raw_writel(irqt | (!!type << irq), avic_base + AVIC_INTTYPEH); |
90 | } | 86 | } |
91 | 87 | ||
92 | return 0; | 88 | return 0; |
@@ -97,13 +93,13 @@ EXPORT_SYMBOL(mxc_set_irq_fiq); | |||
97 | /* Disable interrupt number "irq" in the AVIC */ | 93 | /* Disable interrupt number "irq" in the AVIC */ |
98 | static void mxc_mask_irq(unsigned int irq) | 94 | static void mxc_mask_irq(unsigned int irq) |
99 | { | 95 | { |
100 | __raw_writel(irq, AVIC_INTDISNUM); | 96 | __raw_writel(irq, avic_base + AVIC_INTDISNUM); |
101 | } | 97 | } |
102 | 98 | ||
103 | /* Enable interrupt number "irq" in the AVIC */ | 99 | /* Enable interrupt number "irq" in the AVIC */ |
104 | static void mxc_unmask_irq(unsigned int irq) | 100 | static void mxc_unmask_irq(unsigned int irq) |
105 | { | 101 | { |
106 | __raw_writel(irq, AVIC_INTENNUM); | 102 | __raw_writel(irq, avic_base + AVIC_INTENNUM); |
107 | } | 103 | } |
108 | 104 | ||
109 | static struct irq_chip mxc_avic_chip = { | 105 | static struct irq_chip mxc_avic_chip = { |
@@ -121,19 +117,21 @@ void __init mxc_init_irq(void) | |||
121 | { | 117 | { |
122 | int i; | 118 | int i; |
123 | 119 | ||
120 | avic_base = IO_ADDRESS(AVIC_BASE_ADDR); | ||
121 | |||
124 | /* put the AVIC into the reset value with | 122 | /* put the AVIC into the reset value with |
125 | * all interrupts disabled | 123 | * all interrupts disabled |
126 | */ | 124 | */ |
127 | __raw_writel(0, AVIC_INTCNTL); | 125 | __raw_writel(0, avic_base + AVIC_INTCNTL); |
128 | __raw_writel(0x1f, AVIC_NIMASK); | 126 | __raw_writel(0x1f, avic_base + AVIC_NIMASK); |
129 | 127 | ||
130 | /* disable all interrupts */ | 128 | /* disable all interrupts */ |
131 | __raw_writel(0, AVIC_INTENABLEH); | 129 | __raw_writel(0, avic_base + AVIC_INTENABLEH); |
132 | __raw_writel(0, AVIC_INTENABLEL); | 130 | __raw_writel(0, avic_base + AVIC_INTENABLEL); |
133 | 131 | ||
134 | /* all IRQ no FIQ */ | 132 | /* all IRQ no FIQ */ |
135 | __raw_writel(0, AVIC_INTTYPEH); | 133 | __raw_writel(0, avic_base + AVIC_INTTYPEH); |
136 | __raw_writel(0, AVIC_INTTYPEL); | 134 | __raw_writel(0, avic_base + AVIC_INTTYPEL); |
137 | for (i = 0; i < MXC_INTERNAL_IRQS; i++) { | 135 | for (i = 0; i < MXC_INTERNAL_IRQS; i++) { |
138 | set_irq_chip(i, &mxc_avic_chip); | 136 | set_irq_chip(i, &mxc_avic_chip); |
139 | set_irq_handler(i, handle_level_irq); | 137 | set_irq_handler(i, handle_level_irq); |
@@ -142,7 +140,7 @@ void __init mxc_init_irq(void) | |||
142 | 140 | ||
143 | /* Set default priority value (0) for all IRQ's */ | 141 | /* Set default priority value (0) for all IRQ's */ |
144 | for (i = 0; i < 8; i++) | 142 | for (i = 0; i < 8; i++) |
145 | __raw_writel(0, AVIC_NIPRIORITY(i)); | 143 | __raw_writel(0, avic_base + AVIC_NIPRIORITY(i)); |
146 | 144 | ||
147 | /* init architectures chained interrupt handler */ | 145 | /* init architectures chained interrupt handler */ |
148 | mxc_register_gpios(); | 146 | mxc_register_gpios(); |
@@ -154,3 +152,4 @@ void __init mxc_init_irq(void) | |||
154 | 152 | ||
155 | printk(KERN_INFO "MXC IRQ initialized\n"); | 153 | printk(KERN_INFO "MXC IRQ initialized\n"); |
156 | } | 154 | } |
155 | |||
diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c index 9bffbc507cc2..ae34198a79dd 100644 --- a/arch/arm/plat-mxc/pwm.c +++ b/arch/arm/plat-mxc/pwm.c | |||
@@ -15,65 +15,26 @@ | |||
15 | #include <linux/clk.h> | 15 | #include <linux/clk.h> |
16 | #include <linux/io.h> | 16 | #include <linux/io.h> |
17 | #include <linux/pwm.h> | 17 | #include <linux/pwm.h> |
18 | #include <mach/hardware.h> | ||
19 | |||
20 | |||
21 | /* i.MX1 and i.MX21 share the same PWM function block: */ | ||
22 | |||
23 | #define MX1_PWMC 0x00 /* PWM Control Register */ | ||
24 | #define MX1_PWMS 0x04 /* PWM Sample Register */ | ||
25 | #define MX1_PWMP 0x08 /* PWM Period Register */ | ||
26 | |||
27 | |||
28 | /* i.MX27, i.MX31, i.MX35 share the same PWM function block: */ | ||
29 | |||
30 | #define MX3_PWMCR 0x00 /* PWM Control Register */ | ||
31 | #define MX3_PWMSAR 0x0C /* PWM Sample Register */ | ||
32 | #define MX3_PWMPR 0x10 /* PWM Period Register */ | ||
33 | #define MX3_PWMCR_PRESCALER(x) (((x - 1) & 0xFFF) << 4) | ||
34 | #define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16) | ||
35 | #define MX3_PWMCR_EN (1 << 0) | ||
36 | |||
18 | 37 | ||
19 | #if defined CONFIG_ARCH_MX1 || defined CONFIG_ARCH_MX21 | ||
20 | #define PWM_VER_1 | ||
21 | |||
22 | #define PWMCR 0x00 /* PWM Control Register */ | ||
23 | #define PWMSR 0x04 /* PWM Sample Register */ | ||
24 | #define PWMPR 0x08 /* PWM Period Register */ | ||
25 | #define PWMCNR 0x0C /* PWM Counter Register */ | ||
26 | |||
27 | #define PWMCR_HCTR (1 << 18) /* Halfword FIFO Data Swapping */ | ||
28 | #define PWMCR_BCTR (1 << 17) /* Byte FIFO Data Swapping */ | ||
29 | #define PWMCR_SWR (1 << 16) /* Software Reset */ | ||
30 | #define PWMCR_CLKSRC_PERCLK (0 << 15) /* PERCLK Clock Source */ | ||
31 | #define PWMCR_CLKSRC_CLK32 (1 << 15) /* 32KHz Clock Source */ | ||
32 | #define PWMCR_PRESCALER(x) (((x - 1) & 0x7F) << 8) /* PRESCALER */ | ||
33 | #define PWMCR_IRQ (1 << 7) /* Interrupt Request */ | ||
34 | #define PWMCR_IRQEN (1 << 6) /* Interrupt Request Enable */ | ||
35 | #define PWMCR_FIFOAV (1 << 5) /* FIFO Available */ | ||
36 | #define PWMCR_EN (1 << 4) /* Enables/Disables the PWM */ | ||
37 | #define PWMCR_REPEAT(x) (((x) & 0x03) << 2) /* Sample Repeats */ | ||
38 | #define PWMCR_DIV(x) (((x) & 0x03) << 0) /* Clock divider 2/4/8/16 */ | ||
39 | |||
40 | #define MAX_DIV (128 * 16) | ||
41 | #endif | ||
42 | |||
43 | #if defined CONFIG_MACH_MX27 || defined CONFIG_ARCH_MX31 | ||
44 | #define PWM_VER_2 | ||
45 | |||
46 | #define PWMCR 0x00 /* PWM Control Register */ | ||
47 | #define PWMSR 0x04 /* PWM Status Register */ | ||
48 | #define PWMIR 0x08 /* PWM Interrupt Register */ | ||
49 | #define PWMSAR 0x0C /* PWM Sample Register */ | ||
50 | #define PWMPR 0x10 /* PWM Period Register */ | ||
51 | #define PWMCNR 0x14 /* PWM Counter Register */ | ||
52 | |||
53 | #define PWMCR_EN (1 << 0) /* Enables/Disables the PWM */ | ||
54 | #define PWMCR_REPEAT(x) (((x) & 0x03) << 1) /* Sample Repeats */ | ||
55 | #define PWMCR_SWR (1 << 3) /* Software Reset */ | ||
56 | #define PWMCR_PRESCALER(x) (((x - 1) & 0xFFF) << 4)/* PRESCALER */ | ||
57 | #define PWMCR_CLKSRC(x) (((x) & 0x3) << 16) | ||
58 | #define PWMCR_CLKSRC_OFF (0 << 16) | ||
59 | #define PWMCR_CLKSRC_IPG (1 << 16) | ||
60 | #define PWMCR_CLKSRC_IPG_HIGH (2 << 16) | ||
61 | #define PWMCR_CLKSRC_CLK32 (3 << 16) | ||
62 | #define PWMCR_POUTC | ||
63 | #define PWMCR_HCTR (1 << 20) /* Halfword FIFO Data Swapping */ | ||
64 | #define PWMCR_BCTR (1 << 21) /* Byte FIFO Data Swapping */ | ||
65 | #define PWMCR_DBGEN (1 << 22) /* Debug Mode */ | ||
66 | #define PWMCR_WAITEN (1 << 23) /* Wait Mode */ | ||
67 | #define PWMCR_DOZEN (1 << 24) /* Doze Mode */ | ||
68 | #define PWMCR_STOPEN (1 << 25) /* Stop Mode */ | ||
69 | #define PWMCR_FWM(x) (((x) & 0x3) << 26) /* FIFO Water Mark */ | ||
70 | |||
71 | #define MAX_DIV 4096 | ||
72 | #endif | ||
73 | |||
74 | #define PWMS_SAMPLE(x) ((x) & 0xFFFF) /* Contains a two-sample word */ | ||
75 | #define PWMP_PERIOD(x) ((x) & 0xFFFF) /* Represents the PWM's period */ | ||
76 | #define PWMC_COUNTER(x) ((x) & 0xFFFF) /* Represents the current count value */ | ||
77 | 38 | ||
78 | struct pwm_device { | 39 | struct pwm_device { |
79 | struct list_head node; | 40 | struct list_head node; |
@@ -91,32 +52,52 @@ struct pwm_device { | |||
91 | 52 | ||
92 | int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns) | 53 | int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns) |
93 | { | 54 | { |
94 | unsigned long long c; | ||
95 | unsigned long period_cycles, duty_cycles, prescale; | ||
96 | |||
97 | if (pwm == NULL || period_ns == 0 || duty_ns > period_ns) | 55 | if (pwm == NULL || period_ns == 0 || duty_ns > period_ns) |
98 | return -EINVAL; | 56 | return -EINVAL; |
99 | 57 | ||
100 | c = clk_get_rate(pwm->clk); | 58 | if (cpu_is_mx27() || cpu_is_mx3()) { |
101 | c = c * period_ns; | 59 | unsigned long long c; |
102 | do_div(c, 1000000000); | 60 | unsigned long period_cycles, duty_cycles, prescale; |
103 | period_cycles = c; | 61 | c = clk_get_rate(pwm->clk); |
104 | 62 | c = c * period_ns; | |
105 | prescale = period_cycles / 0x10000 + 1; | 63 | do_div(c, 1000000000); |
106 | 64 | period_cycles = c; | |
107 | period_cycles /= prescale; | 65 | |
108 | c = (unsigned long long)period_cycles * duty_ns; | 66 | prescale = period_cycles / 0x10000 + 1; |
109 | do_div(c, period_ns); | 67 | |
110 | duty_cycles = c; | 68 | period_cycles /= prescale; |
111 | 69 | c = (unsigned long long)period_cycles * duty_ns; | |
112 | #ifdef PWM_VER_2 | 70 | do_div(c, period_ns); |
113 | writel(duty_cycles, pwm->mmio_base + PWMSAR); | 71 | duty_cycles = c; |
114 | writel(period_cycles, pwm->mmio_base + PWMPR); | 72 | |
115 | writel(PWMCR_PRESCALER(prescale - 1) | PWMCR_CLKSRC_IPG_HIGH | PWMCR_EN, | 73 | writel(duty_cycles, pwm->mmio_base + MX3_PWMSAR); |
116 | pwm->mmio_base + PWMCR); | 74 | writel(period_cycles, pwm->mmio_base + MX3_PWMPR); |
117 | #elif defined PWM_VER_1 | 75 | writel(MX3_PWMCR_PRESCALER(prescale - 1) | |
118 | #error PWM not yet working on MX1 / MX21 | 76 | MX3_PWMCR_CLKSRC_IPG_HIGH | MX3_PWMCR_EN, |
119 | #endif | 77 | pwm->mmio_base + MX3_PWMCR); |
78 | } else if (cpu_is_mx1() || cpu_is_mx21()) { | ||
79 | /* The PWM subsystem allows for exact frequencies. However, | ||
80 | * I cannot connect a scope on my device to the PWM line and | ||
81 | * thus cannot provide the program the PWM controller | ||
82 | * exactly. Instead, I'm relying on the fact that the | ||
83 | * Bootloader (u-boot or WinCE+haret) has programmed the PWM | ||
84 | * function group already. So I'll just modify the PWM sample | ||
85 | * register to follow the ratio of duty_ns vs. period_ns | ||
86 | * accordingly. | ||
87 | * | ||
88 | * This is good enought for programming the brightness of | ||
89 | * the LCD backlight. | ||
90 | * | ||
91 | * The real implementation would divide PERCLK[0] first by | ||
92 | * both the prescaler (/1 .. /128) and then by CLKSEL | ||
93 | * (/2 .. /16). | ||
94 | */ | ||
95 | u32 max = readl(pwm->mmio_base + MX1_PWMP); | ||
96 | u32 p = max * duty_ns / period_ns; | ||
97 | writel(max - p, pwm->mmio_base + MX1_PWMS); | ||
98 | } else { | ||
99 | BUG(); | ||
100 | } | ||
120 | 101 | ||
121 | return 0; | 102 | return 0; |
122 | } | 103 | } |
@@ -297,4 +278,3 @@ module_exit(mxc_pwm_exit); | |||
297 | 278 | ||
298 | MODULE_LICENSE("GPL v2"); | 279 | MODULE_LICENSE("GPL v2"); |
299 | MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>"); | 280 | MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>"); |
300 | |||
diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/plat-mxc/time.c index dab3357196fb..88fb3a57e029 100644 --- a/arch/arm/plat-mxc/time.c +++ b/arch/arm/plat-mxc/time.c | |||
@@ -29,22 +29,85 @@ | |||
29 | #include <mach/hardware.h> | 29 | #include <mach/hardware.h> |
30 | #include <asm/mach/time.h> | 30 | #include <asm/mach/time.h> |
31 | #include <mach/common.h> | 31 | #include <mach/common.h> |
32 | #include <mach/mxc_timer.h> | 32 | |
33 | /* defines common for all i.MX */ | ||
34 | #define MXC_TCTL 0x00 | ||
35 | #define MXC_TCTL_TEN (1 << 0) | ||
36 | #define MXC_TPRER 0x04 | ||
37 | |||
38 | /* MX1, MX21, MX27 */ | ||
39 | #define MX1_2_TCTL_CLK_PCLK1 (1 << 1) | ||
40 | #define MX1_2_TCTL_IRQEN (1 << 4) | ||
41 | #define MX1_2_TCTL_FRR (1 << 8) | ||
42 | #define MX1_2_TCMP 0x08 | ||
43 | #define MX1_2_TCN 0x10 | ||
44 | #define MX1_2_TSTAT 0x14 | ||
45 | |||
46 | /* MX21, MX27 */ | ||
47 | #define MX2_TSTAT_CAPT (1 << 1) | ||
48 | #define MX2_TSTAT_COMP (1 << 0) | ||
49 | |||
50 | /* MX31, MX35 */ | ||
51 | #define MX3_TCTL_WAITEN (1 << 3) | ||
52 | #define MX3_TCTL_CLK_IPG (1 << 6) | ||
53 | #define MX3_TCTL_FRR (1 << 9) | ||
54 | #define MX3_IR 0x0c | ||
55 | #define MX3_TSTAT 0x08 | ||
56 | #define MX3_TSTAT_OF1 (1 << 0) | ||
57 | #define MX3_TCN 0x24 | ||
58 | #define MX3_TCMP 0x10 | ||
33 | 59 | ||
34 | static struct clock_event_device clockevent_mxc; | 60 | static struct clock_event_device clockevent_mxc; |
35 | static enum clock_event_mode clockevent_mode = CLOCK_EVT_MODE_UNUSED; | 61 | static enum clock_event_mode clockevent_mode = CLOCK_EVT_MODE_UNUSED; |
36 | 62 | ||
37 | /* clock source */ | 63 | static void __iomem *timer_base; |
38 | 64 | ||
39 | static cycle_t mxc_get_cycles(struct clocksource *cs) | 65 | static inline void gpt_irq_disable(void) |
40 | { | 66 | { |
41 | return __raw_readl(TIMER_BASE + MXC_TCN); | 67 | unsigned int tmp; |
68 | |||
69 | if (cpu_is_mx3()) | ||
70 | __raw_writel(0, timer_base + MX3_IR); | ||
71 | else { | ||
72 | tmp = __raw_readl(timer_base + MXC_TCTL); | ||
73 | __raw_writel(tmp & ~MX1_2_TCTL_IRQEN, timer_base + MXC_TCTL); | ||
74 | } | ||
75 | } | ||
76 | |||
77 | static inline void gpt_irq_enable(void) | ||
78 | { | ||
79 | if (cpu_is_mx3()) | ||
80 | __raw_writel(1<<0, timer_base + MX3_IR); | ||
81 | else { | ||
82 | __raw_writel(__raw_readl(timer_base + MXC_TCTL) | MX1_2_TCTL_IRQEN, | ||
83 | timer_base + MXC_TCTL); | ||
84 | } | ||
85 | } | ||
86 | |||
87 | static void gpt_irq_acknowledge(void) | ||
88 | { | ||
89 | if (cpu_is_mx1()) | ||
90 | __raw_writel(0, timer_base + MX1_2_TSTAT); | ||
91 | if (cpu_is_mx2()) | ||
92 | __raw_writel(MX2_TSTAT_CAPT | MX2_TSTAT_COMP, timer_base + MX1_2_TSTAT); | ||
93 | if (cpu_is_mx3()) | ||
94 | __raw_writel(MX3_TSTAT_OF1, timer_base + MX3_TSTAT); | ||
95 | } | ||
96 | |||
97 | static cycle_t mx1_2_get_cycles(struct clocksource *cs) | ||
98 | { | ||
99 | return __raw_readl(timer_base + MX1_2_TCN); | ||
100 | } | ||
101 | |||
102 | static cycle_t mx3_get_cycles(struct clocksource *cs) | ||
103 | { | ||
104 | return __raw_readl(timer_base + MX3_TCN); | ||
42 | } | 105 | } |
43 | 106 | ||
44 | static struct clocksource clocksource_mxc = { | 107 | static struct clocksource clocksource_mxc = { |
45 | .name = "mxc_timer1", | 108 | .name = "mxc_timer1", |
46 | .rating = 200, | 109 | .rating = 200, |
47 | .read = mxc_get_cycles, | 110 | .read = mx1_2_get_cycles, |
48 | .mask = CLOCKSOURCE_MASK(32), | 111 | .mask = CLOCKSOURCE_MASK(32), |
49 | .shift = 20, | 112 | .shift = 20, |
50 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 113 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
@@ -54,6 +117,9 @@ static int __init mxc_clocksource_init(struct clk *timer_clk) | |||
54 | { | 117 | { |
55 | unsigned int c = clk_get_rate(timer_clk); | 118 | unsigned int c = clk_get_rate(timer_clk); |
56 | 119 | ||
120 | if (cpu_is_mx3()) | ||
121 | clocksource_mxc.read = mx3_get_cycles; | ||
122 | |||
57 | clocksource_mxc.mult = clocksource_hz2mult(c, | 123 | clocksource_mxc.mult = clocksource_hz2mult(c, |
58 | clocksource_mxc.shift); | 124 | clocksource_mxc.shift); |
59 | clocksource_register(&clocksource_mxc); | 125 | clocksource_register(&clocksource_mxc); |
@@ -63,15 +129,29 @@ static int __init mxc_clocksource_init(struct clk *timer_clk) | |||
63 | 129 | ||
64 | /* clock event */ | 130 | /* clock event */ |
65 | 131 | ||
66 | static int mxc_set_next_event(unsigned long evt, | 132 | static int mx1_2_set_next_event(unsigned long evt, |
67 | struct clock_event_device *unused) | 133 | struct clock_event_device *unused) |
68 | { | 134 | { |
69 | unsigned long tcmp; | 135 | unsigned long tcmp; |
70 | 136 | ||
71 | tcmp = __raw_readl(TIMER_BASE + MXC_TCN) + evt; | 137 | tcmp = __raw_readl(timer_base + MX1_2_TCN) + evt; |
72 | __raw_writel(tcmp, TIMER_BASE + MXC_TCMP); | ||
73 | 138 | ||
74 | return (int)(tcmp - __raw_readl(TIMER_BASE + MXC_TCN)) < 0 ? | 139 | __raw_writel(tcmp, timer_base + MX1_2_TCMP); |
140 | |||
141 | return (int)(tcmp - __raw_readl(timer_base + MX1_2_TCN)) < 0 ? | ||
142 | -ETIME : 0; | ||
143 | } | ||
144 | |||
145 | static int mx3_set_next_event(unsigned long evt, | ||
146 | struct clock_event_device *unused) | ||
147 | { | ||
148 | unsigned long tcmp; | ||
149 | |||
150 | tcmp = __raw_readl(timer_base + MX3_TCN) + evt; | ||
151 | |||
152 | __raw_writel(tcmp, timer_base + MX3_TCMP); | ||
153 | |||
154 | return (int)(tcmp - __raw_readl(timer_base + MX3_TCN)) < 0 ? | ||
75 | -ETIME : 0; | 155 | -ETIME : 0; |
76 | } | 156 | } |
77 | 157 | ||
@@ -100,8 +180,13 @@ static void mxc_set_mode(enum clock_event_mode mode, | |||
100 | 180 | ||
101 | if (mode != clockevent_mode) { | 181 | if (mode != clockevent_mode) { |
102 | /* Set event time into far-far future */ | 182 | /* Set event time into far-far future */ |
103 | __raw_writel(__raw_readl(TIMER_BASE + MXC_TCN) - 3, | 183 | if (cpu_is_mx3()) |
104 | TIMER_BASE + MXC_TCMP); | 184 | __raw_writel(__raw_readl(timer_base + MX3_TCN) - 3, |
185 | timer_base + MX3_TCMP); | ||
186 | else | ||
187 | __raw_writel(__raw_readl(timer_base + MX1_2_TCN) - 3, | ||
188 | timer_base + MX1_2_TCMP); | ||
189 | |||
105 | /* Clear pending interrupt */ | 190 | /* Clear pending interrupt */ |
106 | gpt_irq_acknowledge(); | 191 | gpt_irq_acknowledge(); |
107 | } | 192 | } |
@@ -148,7 +233,10 @@ static irqreturn_t mxc_timer_interrupt(int irq, void *dev_id) | |||
148 | struct clock_event_device *evt = &clockevent_mxc; | 233 | struct clock_event_device *evt = &clockevent_mxc; |
149 | uint32_t tstat; | 234 | uint32_t tstat; |
150 | 235 | ||
151 | tstat = __raw_readl(TIMER_BASE + MXC_TSTAT); | 236 | if (cpu_is_mx3()) |
237 | tstat = __raw_readl(timer_base + MX3_TSTAT); | ||
238 | else | ||
239 | tstat = __raw_readl(timer_base + MX1_2_TSTAT); | ||
152 | 240 | ||
153 | gpt_irq_acknowledge(); | 241 | gpt_irq_acknowledge(); |
154 | 242 | ||
@@ -168,7 +256,7 @@ static struct clock_event_device clockevent_mxc = { | |||
168 | .features = CLOCK_EVT_FEAT_ONESHOT, | 256 | .features = CLOCK_EVT_FEAT_ONESHOT, |
169 | .shift = 32, | 257 | .shift = 32, |
170 | .set_mode = mxc_set_mode, | 258 | .set_mode = mxc_set_mode, |
171 | .set_next_event = mxc_set_next_event, | 259 | .set_next_event = mx1_2_set_next_event, |
172 | .rating = 200, | 260 | .rating = 200, |
173 | }; | 261 | }; |
174 | 262 | ||
@@ -176,6 +264,9 @@ static int __init mxc_clockevent_init(struct clk *timer_clk) | |||
176 | { | 264 | { |
177 | unsigned int c = clk_get_rate(timer_clk); | 265 | unsigned int c = clk_get_rate(timer_clk); |
178 | 266 | ||
267 | if (cpu_is_mx3()) | ||
268 | clockevent_mxc.set_next_event = mx3_set_next_event; | ||
269 | |||
179 | clockevent_mxc.mult = div_sc(c, NSEC_PER_SEC, | 270 | clockevent_mxc.mult = div_sc(c, NSEC_PER_SEC, |
180 | clockevent_mxc.shift); | 271 | clockevent_mxc.shift); |
181 | clockevent_mxc.max_delta_ns = | 272 | clockevent_mxc.max_delta_ns = |
@@ -192,23 +283,47 @@ static int __init mxc_clockevent_init(struct clk *timer_clk) | |||
192 | 283 | ||
193 | void __init mxc_timer_init(struct clk *timer_clk) | 284 | void __init mxc_timer_init(struct clk *timer_clk) |
194 | { | 285 | { |
286 | uint32_t tctl_val; | ||
287 | int irq; | ||
288 | |||
195 | clk_enable(timer_clk); | 289 | clk_enable(timer_clk); |
196 | 290 | ||
291 | if (cpu_is_mx1()) { | ||
292 | #ifdef CONFIG_ARCH_MX1 | ||
293 | timer_base = IO_ADDRESS(TIM1_BASE_ADDR); | ||
294 | irq = TIM1_INT; | ||
295 | #endif | ||
296 | } else if (cpu_is_mx2()) { | ||
297 | #ifdef CONFIG_ARCH_MX2 | ||
298 | timer_base = IO_ADDRESS(GPT1_BASE_ADDR); | ||
299 | irq = MXC_INT_GPT1; | ||
300 | #endif | ||
301 | } else if (cpu_is_mx3()) { | ||
302 | #ifdef CONFIG_ARCH_MX3 | ||
303 | timer_base = IO_ADDRESS(GPT1_BASE_ADDR); | ||
304 | irq = MXC_INT_GPT; | ||
305 | #endif | ||
306 | } else | ||
307 | BUG(); | ||
308 | |||
197 | /* | 309 | /* |
198 | * Initialise to a known state (all timers off, and timing reset) | 310 | * Initialise to a known state (all timers off, and timing reset) |
199 | */ | 311 | */ |
200 | __raw_writel(0, TIMER_BASE + MXC_TCTL); | ||
201 | __raw_writel(0, TIMER_BASE + MXC_TPRER); /* see datasheet note */ | ||
202 | 312 | ||
203 | __raw_writel(TCTL_FRR | /* free running */ | 313 | __raw_writel(0, timer_base + MXC_TCTL); |
204 | TCTL_VAL | /* set clocksource and arch specific bits */ | 314 | __raw_writel(0, timer_base + MXC_TPRER); /* see datasheet note */ |
205 | TCTL_TEN, /* start the timer */ | 315 | |
206 | TIMER_BASE + MXC_TCTL); | 316 | if (cpu_is_mx3()) |
317 | tctl_val = MX3_TCTL_CLK_IPG | MX3_TCTL_FRR | MX3_TCTL_WAITEN | MXC_TCTL_TEN; | ||
318 | else | ||
319 | tctl_val = MX1_2_TCTL_FRR | MX1_2_TCTL_CLK_PCLK1 | MXC_TCTL_TEN; | ||
320 | |||
321 | __raw_writel(tctl_val, timer_base + MXC_TCTL); | ||
207 | 322 | ||
208 | /* init and register the timer to the framework */ | 323 | /* init and register the timer to the framework */ |
209 | mxc_clocksource_init(timer_clk); | 324 | mxc_clocksource_init(timer_clk); |
210 | mxc_clockevent_init(timer_clk); | 325 | mxc_clockevent_init(timer_clk); |
211 | 326 | ||
212 | /* Make irqs happen */ | 327 | /* Make irqs happen */ |
213 | setup_irq(TIMER_INTERRUPT, &mxc_timer_irq); | 328 | setup_irq(irq, &mxc_timer_irq); |
214 | } | 329 | } |
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c index 2e0614552ac8..29efc279287a 100644 --- a/arch/arm/plat-omap/clock.c +++ b/arch/arm/plat-omap/clock.c | |||
@@ -239,6 +239,13 @@ void recalculate_root_clocks(void) | |||
239 | } | 239 | } |
240 | } | 240 | } |
241 | 241 | ||
242 | /** | ||
243 | * clk_init_one - initialize any fields in the struct clk before clk init | ||
244 | * @clk: struct clk * to initialize | ||
245 | * | ||
246 | * Initialize any struct clk fields needed before normal clk initialization | ||
247 | * can run. No return value. | ||
248 | */ | ||
242 | void clk_init_one(struct clk *clk) | 249 | void clk_init_one(struct clk *clk) |
243 | { | 250 | { |
244 | INIT_LIST_HEAD(&clk->children); | 251 | INIT_LIST_HEAD(&clk->children); |
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index 21cc0142b97a..7fc8c045ad5d 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c | |||
@@ -760,19 +760,12 @@ void omap_free_dma(int lch) | |||
760 | { | 760 | { |
761 | unsigned long flags; | 761 | unsigned long flags; |
762 | 762 | ||
763 | spin_lock_irqsave(&dma_chan_lock, flags); | ||
764 | if (dma_chan[lch].dev_id == -1) { | 763 | if (dma_chan[lch].dev_id == -1) { |
765 | pr_err("omap_dma: trying to free unallocated DMA channel %d\n", | 764 | pr_err("omap_dma: trying to free unallocated DMA channel %d\n", |
766 | lch); | 765 | lch); |
767 | spin_unlock_irqrestore(&dma_chan_lock, flags); | ||
768 | return; | 766 | return; |
769 | } | 767 | } |
770 | 768 | ||
771 | dma_chan[lch].dev_id = -1; | ||
772 | dma_chan[lch].next_lch = -1; | ||
773 | dma_chan[lch].callback = NULL; | ||
774 | spin_unlock_irqrestore(&dma_chan_lock, flags); | ||
775 | |||
776 | if (cpu_class_is_omap1()) { | 769 | if (cpu_class_is_omap1()) { |
777 | /* Disable all DMA interrupts for the channel. */ | 770 | /* Disable all DMA interrupts for the channel. */ |
778 | dma_write(0, CICR(lch)); | 771 | dma_write(0, CICR(lch)); |
@@ -798,6 +791,12 @@ void omap_free_dma(int lch) | |||
798 | dma_write(0, CCR(lch)); | 791 | dma_write(0, CCR(lch)); |
799 | omap_clear_dma(lch); | 792 | omap_clear_dma(lch); |
800 | } | 793 | } |
794 | |||
795 | spin_lock_irqsave(&dma_chan_lock, flags); | ||
796 | dma_chan[lch].dev_id = -1; | ||
797 | dma_chan[lch].next_lch = -1; | ||
798 | dma_chan[lch].callback = NULL; | ||
799 | spin_unlock_irqrestore(&dma_chan_lock, flags); | ||
801 | } | 800 | } |
802 | EXPORT_SYMBOL(omap_free_dma); | 801 | EXPORT_SYMBOL(omap_free_dma); |
803 | 802 | ||
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c index bfd47570cc91..55bb99631292 100644 --- a/arch/arm/plat-omap/dmtimer.c +++ b/arch/arm/plat-omap/dmtimer.c | |||
@@ -238,7 +238,7 @@ static struct omap_dm_timer omap3_dm_timers[] = { | |||
238 | { .phys_base = 0x49040000, .irq = INT_24XX_GPTIMER9 }, | 238 | { .phys_base = 0x49040000, .irq = INT_24XX_GPTIMER9 }, |
239 | { .phys_base = 0x48086000, .irq = INT_24XX_GPTIMER10 }, | 239 | { .phys_base = 0x48086000, .irq = INT_24XX_GPTIMER10 }, |
240 | { .phys_base = 0x48088000, .irq = INT_24XX_GPTIMER11 }, | 240 | { .phys_base = 0x48088000, .irq = INT_24XX_GPTIMER11 }, |
241 | { .phys_base = 0x48304000, .irq = INT_24XX_GPTIMER12 }, | 241 | { .phys_base = 0x48304000, .irq = INT_34XX_GPT12_IRQ }, |
242 | }; | 242 | }; |
243 | 243 | ||
244 | static const char *omap3_dm_source_names[] __initdata = { | 244 | static const char *omap3_dm_source_names[] __initdata = { |
@@ -321,11 +321,9 @@ static void omap_dm_timer_reset(struct omap_dm_timer *timer) | |||
321 | l |= 0x2 << 8; /* Set clock activity to perserve f-clock on idle */ | 321 | l |= 0x2 << 8; /* Set clock activity to perserve f-clock on idle */ |
322 | 322 | ||
323 | /* | 323 | /* |
324 | * Enable wake-up only for GPT1 on OMAP2 CPUs. | 324 | * Enable wake-up on OMAP2 CPUs. |
325 | * FIXME: All timers should have wake-up enabled and clear | ||
326 | * PRCM status. | ||
327 | */ | 325 | */ |
328 | if (cpu_class_is_omap2() && (timer == &dm_timers[0])) | 326 | if (cpu_class_is_omap2()) |
329 | l |= 1 << 2; | 327 | l |= 1 << 2; |
330 | omap_dm_timer_write_reg(timer, OMAP_TIMER_OCP_CFG_REG, l); | 328 | omap_dm_timer_write_reg(timer, OMAP_TIMER_OCP_CFG_REG, l); |
331 | 329 | ||
@@ -511,7 +509,7 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_stop); | |||
511 | 509 | ||
512 | #ifdef CONFIG_ARCH_OMAP1 | 510 | #ifdef CONFIG_ARCH_OMAP1 |
513 | 511 | ||
514 | void omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) | 512 | int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) |
515 | { | 513 | { |
516 | int n = (timer - dm_timers) << 1; | 514 | int n = (timer - dm_timers) << 1; |
517 | u32 l; | 515 | u32 l; |
@@ -519,23 +517,31 @@ void omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) | |||
519 | l = omap_readl(MOD_CONF_CTRL_1) & ~(0x03 << n); | 517 | l = omap_readl(MOD_CONF_CTRL_1) & ~(0x03 << n); |
520 | l |= source << n; | 518 | l |= source << n; |
521 | omap_writel(l, MOD_CONF_CTRL_1); | 519 | omap_writel(l, MOD_CONF_CTRL_1); |
520 | |||
521 | return 0; | ||
522 | } | 522 | } |
523 | EXPORT_SYMBOL_GPL(omap_dm_timer_set_source); | 523 | EXPORT_SYMBOL_GPL(omap_dm_timer_set_source); |
524 | 524 | ||
525 | #else | 525 | #else |
526 | 526 | ||
527 | void omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) | 527 | int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) |
528 | { | 528 | { |
529 | int ret = -EINVAL; | ||
530 | |||
529 | if (source < 0 || source >= 3) | 531 | if (source < 0 || source >= 3) |
530 | return; | 532 | return -EINVAL; |
531 | 533 | ||
532 | clk_disable(timer->fclk); | 534 | clk_disable(timer->fclk); |
533 | clk_set_parent(timer->fclk, dm_source_clocks[source]); | 535 | ret = clk_set_parent(timer->fclk, dm_source_clocks[source]); |
534 | clk_enable(timer->fclk); | 536 | clk_enable(timer->fclk); |
535 | 537 | ||
536 | /* When the functional clock disappears, too quick writes seem to | 538 | /* |
537 | * cause an abort. */ | 539 | * When the functional clock disappears, too quick writes seem |
540 | * to cause an abort. XXX Is this still necessary? | ||
541 | */ | ||
538 | __delay(150000); | 542 | __delay(150000); |
543 | |||
544 | return ret; | ||
539 | } | 545 | } |
540 | EXPORT_SYMBOL_GPL(omap_dm_timer_set_source); | 546 | EXPORT_SYMBOL_GPL(omap_dm_timer_set_source); |
541 | 547 | ||
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index d3fa41e3d8c5..17d7afe42b83 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c | |||
@@ -758,8 +758,12 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) | |||
758 | 758 | ||
759 | /* Workaround for clearing DSP GPIO interrupts to allow retention */ | 759 | /* Workaround for clearing DSP GPIO interrupts to allow retention */ |
760 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 760 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) |
761 | reg = bank->base + OMAP24XX_GPIO_IRQSTATUS2; | ||
761 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) | 762 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) |
762 | __raw_writel(gpio_mask, bank->base + OMAP24XX_GPIO_IRQSTATUS2); | 763 | __raw_writel(gpio_mask, reg); |
764 | |||
765 | /* Flush posted write for the irq status to avoid spurious interrupts */ | ||
766 | __raw_readl(reg); | ||
763 | #endif | 767 | #endif |
764 | } | 768 | } |
765 | 769 | ||
@@ -921,13 +925,10 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable) | |||
921 | case METHOD_MPUIO: | 925 | case METHOD_MPUIO: |
922 | case METHOD_GPIO_1610: | 926 | case METHOD_GPIO_1610: |
923 | spin_lock_irqsave(&bank->lock, flags); | 927 | spin_lock_irqsave(&bank->lock, flags); |
924 | if (enable) { | 928 | if (enable) |
925 | bank->suspend_wakeup |= (1 << gpio); | 929 | bank->suspend_wakeup |= (1 << gpio); |
926 | enable_irq_wake(bank->irq); | 930 | else |
927 | } else { | ||
928 | disable_irq_wake(bank->irq); | ||
929 | bank->suspend_wakeup &= ~(1 << gpio); | 931 | bank->suspend_wakeup &= ~(1 << gpio); |
930 | } | ||
931 | spin_unlock_irqrestore(&bank->lock, flags); | 932 | spin_unlock_irqrestore(&bank->lock, flags); |
932 | return 0; | 933 | return 0; |
933 | #endif | 934 | #endif |
@@ -940,13 +941,10 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable) | |||
940 | return -EINVAL; | 941 | return -EINVAL; |
941 | } | 942 | } |
942 | spin_lock_irqsave(&bank->lock, flags); | 943 | spin_lock_irqsave(&bank->lock, flags); |
943 | if (enable) { | 944 | if (enable) |
944 | bank->suspend_wakeup |= (1 << gpio); | 945 | bank->suspend_wakeup |= (1 << gpio); |
945 | enable_irq_wake(bank->irq); | 946 | else |
946 | } else { | ||
947 | disable_irq_wake(bank->irq); | ||
948 | bank->suspend_wakeup &= ~(1 << gpio); | 947 | bank->suspend_wakeup &= ~(1 << gpio); |
949 | } | ||
950 | spin_unlock_irqrestore(&bank->lock, flags); | 948 | spin_unlock_irqrestore(&bank->lock, flags); |
951 | return 0; | 949 | return 0; |
952 | #endif | 950 | #endif |
diff --git a/arch/arm/plat-omap/include/mach/dmtimer.h b/arch/arm/plat-omap/include/mach/dmtimer.h index 6dc703138210..20f1054c0a80 100644 --- a/arch/arm/plat-omap/include/mach/dmtimer.h +++ b/arch/arm/plat-omap/include/mach/dmtimer.h | |||
@@ -64,7 +64,7 @@ void omap_dm_timer_trigger(struct omap_dm_timer *timer); | |||
64 | void omap_dm_timer_start(struct omap_dm_timer *timer); | 64 | void omap_dm_timer_start(struct omap_dm_timer *timer); |
65 | void omap_dm_timer_stop(struct omap_dm_timer *timer); | 65 | void omap_dm_timer_stop(struct omap_dm_timer *timer); |
66 | 66 | ||
67 | void omap_dm_timer_set_source(struct omap_dm_timer *timer, int source); | 67 | int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source); |
68 | void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, unsigned int value); | 68 | void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, unsigned int value); |
69 | void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, unsigned int value); | 69 | void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, unsigned int value); |
70 | void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable, unsigned int match); | 70 | void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable, unsigned int match); |
diff --git a/arch/arm/plat-omap/include/mach/eac.h b/arch/arm/plat-omap/include/mach/eac.h deleted file mode 100644 index 9e62cf030270..000000000000 --- a/arch/arm/plat-omap/include/mach/eac.h +++ /dev/null | |||
@@ -1,100 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/plat-omap/include/mach2/eac.h | ||
3 | * | ||
4 | * Defines for Enhanced Audio Controller | ||
5 | * | ||
6 | * Contact: Jarkko Nikula <jarkko.nikula@nokia.com> | ||
7 | * | ||
8 | * Copyright (C) 2006 Nokia Corporation | ||
9 | * Copyright (C) 2004 Texas Instruments, Inc. | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or | ||
12 | * modify it under the terms of the GNU General Public License | ||
13 | * version 2 as published by the Free Software Foundation. | ||
14 | * | ||
15 | * This program is distributed in the hope that it will be useful, but | ||
16 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
18 | * General Public License for more details. | ||
19 | * | ||
20 | * You should have received a copy of the GNU General Public License | ||
21 | * along with this program; if not, write to the Free Software | ||
22 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | ||
23 | * 02110-1301 USA | ||
24 | * | ||
25 | */ | ||
26 | |||
27 | #ifndef __ASM_ARM_ARCH_OMAP2_EAC_H | ||
28 | #define __ASM_ARM_ARCH_OMAP2_EAC_H | ||
29 | |||
30 | #include <mach/io.h> | ||
31 | #include <mach/hardware.h> | ||
32 | #include <asm/irq.h> | ||
33 | |||
34 | #include <sound/core.h> | ||
35 | |||
36 | /* master codec clock source */ | ||
37 | #define EAC_MCLK_EXT_MASK 0x100 | ||
38 | enum eac_mclk_src { | ||
39 | EAC_MCLK_INT_11290000, /* internal 96 MHz / 8.5 = 11.29 Mhz */ | ||
40 | EAC_MCLK_EXT_11289600 = EAC_MCLK_EXT_MASK, | ||
41 | EAC_MCLK_EXT_12288000, | ||
42 | EAC_MCLK_EXT_2x11289600, | ||
43 | EAC_MCLK_EXT_2x12288000, | ||
44 | }; | ||
45 | |||
46 | /* codec port interface mode */ | ||
47 | enum eac_codec_mode { | ||
48 | EAC_CODEC_PCM, | ||
49 | EAC_CODEC_AC97, | ||
50 | EAC_CODEC_I2S_MASTER, /* codec port, I.e. EAC is the master */ | ||
51 | EAC_CODEC_I2S_SLAVE, | ||
52 | }; | ||
53 | |||
54 | /* configuration structure for I2S mode */ | ||
55 | struct eac_i2s_conf { | ||
56 | /* if enabled, then first data slot (left channel) is signaled as | ||
57 | * positive level of frame sync EAC.AC_FS */ | ||
58 | unsigned polarity_changed_mode:1; | ||
59 | /* if enabled, then serial data starts one clock cycle after the | ||
60 | * of EAC.AC_FS for first audio slot */ | ||
61 | unsigned sync_delay_enable:1; | ||
62 | }; | ||
63 | |||
64 | /* configuration structure for EAC codec port */ | ||
65 | struct eac_codec { | ||
66 | enum eac_mclk_src mclk_src; | ||
67 | |||
68 | enum eac_codec_mode codec_mode; | ||
69 | union { | ||
70 | struct eac_i2s_conf i2s; | ||
71 | } codec_conf; | ||
72 | |||
73 | int default_rate; /* audio sampling rate */ | ||
74 | |||
75 | int (* set_power)(void *private_data, int dac, int adc); | ||
76 | int (* register_controls)(void *private_data, | ||
77 | struct snd_card *card); | ||
78 | const char *short_name; | ||
79 | |||
80 | void *private_data; | ||
81 | }; | ||
82 | |||
83 | /* structure for passing platform dependent data to the EAC driver */ | ||
84 | struct eac_platform_data { | ||
85 | int (* init)(struct device *eac_dev); | ||
86 | void (* cleanup)(struct device *eac_dev); | ||
87 | /* these callbacks are used to configure & control external MCLK | ||
88 | * source. NULL if not used */ | ||
89 | int (* enable_ext_clocks)(struct device *eac_dev); | ||
90 | void (* disable_ext_clocks)(struct device *eac_dev); | ||
91 | }; | ||
92 | |||
93 | extern void omap_init_eac(struct eac_platform_data *pdata); | ||
94 | |||
95 | extern int eac_register_codec(struct device *eac_dev, struct eac_codec *codec); | ||
96 | extern void eac_unregister_codec(struct device *eac_dev); | ||
97 | |||
98 | extern int eac_set_mode(struct device *eac_dev, int play, int rec); | ||
99 | |||
100 | #endif /* __ASM_ARM_ARCH_OMAP2_EAC_H */ | ||
diff --git a/arch/arm/plat-omap/include/mach/gpioexpander.h b/arch/arm/plat-omap/include/mach/gpioexpander.h deleted file mode 100644 index 90444a0d6b1a..000000000000 --- a/arch/arm/plat-omap/include/mach/gpioexpander.h +++ /dev/null | |||
@@ -1,35 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/plat-omap/include/mach/gpioexpander.h | ||
3 | * | ||
4 | * | ||
5 | * Copyright (C) 2004 Texas Instruments, Inc. | ||
6 | * | ||
7 | * This package is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | * | ||
11 | * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR | ||
12 | * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED | ||
13 | * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. | ||
14 | */ | ||
15 | |||
16 | #ifndef __ASM_ARCH_OMAP_GPIOEXPANDER_H | ||
17 | #define __ASM_ARCH_OMAP_GPIOEXPANDER_H | ||
18 | |||
19 | /* Function Prototypes for GPIO Expander functions */ | ||
20 | |||
21 | #ifdef CONFIG_GPIOEXPANDER_OMAP | ||
22 | int read_gpio_expa(u8 *, int); | ||
23 | int write_gpio_expa(u8 , int); | ||
24 | #else | ||
25 | static inline int read_gpio_expa(u8 *val, int addr) | ||
26 | { | ||
27 | return 0; | ||
28 | } | ||
29 | static inline int write_gpio_expa(u8 val, int addr) | ||
30 | { | ||
31 | return 0; | ||
32 | } | ||
33 | #endif | ||
34 | |||
35 | #endif /* __ASM_ARCH_OMAP_GPIOEXPANDER_H */ | ||
diff --git a/arch/arm/plat-omap/include/mach/irda.h b/arch/arm/plat-omap/include/mach/irda.h index 8372a00d8e0b..40f60339d1c6 100644 --- a/arch/arm/plat-omap/include/mach/irda.h +++ b/arch/arm/plat-omap/include/mach/irda.h | |||
@@ -21,10 +21,6 @@ struct omap_irda_config { | |||
21 | int transceiver_cap; | 21 | int transceiver_cap; |
22 | int (*transceiver_mode)(struct device *dev, int mode); | 22 | int (*transceiver_mode)(struct device *dev, int mode); |
23 | int (*select_irda)(struct device *dev, int state); | 23 | int (*select_irda)(struct device *dev, int state); |
24 | /* Very specific to the needs of some platforms (h3,h4) | ||
25 | * having calls which can sleep in irda_set_speed. | ||
26 | */ | ||
27 | struct delayed_work gpio_expa; | ||
28 | int rx_channel; | 24 | int rx_channel; |
29 | int tx_channel; | 25 | int tx_channel; |
30 | unsigned long dest_start; | 26 | unsigned long dest_start; |
diff --git a/arch/arm/plat-omap/include/mach/mmc.h b/arch/arm/plat-omap/include/mach/mmc.h index 4435bd434e17..81d5b36534b3 100644 --- a/arch/arm/plat-omap/include/mach/mmc.h +++ b/arch/arm/plat-omap/include/mach/mmc.h | |||
@@ -79,7 +79,6 @@ struct omap_mmc_platform_data { | |||
79 | 79 | ||
80 | /* use the internal clock */ | 80 | /* use the internal clock */ |
81 | unsigned internal_clock:1; | 81 | unsigned internal_clock:1; |
82 | s16 power_pin; | ||
83 | 82 | ||
84 | int switch_pin; /* gpio (card detect) */ | 83 | int switch_pin; /* gpio (card detect) */ |
85 | int gpio_wp; /* gpio (write protect) */ | 84 | int gpio_wp; /* gpio (write protect) */ |
diff --git a/arch/arm/plat-omap/include/mach/timer-gp.h b/arch/arm/plat-omap/include/mach/timer-gp.h new file mode 100644 index 000000000000..c88d346b59d9 --- /dev/null +++ b/arch/arm/plat-omap/include/mach/timer-gp.h | |||
@@ -0,0 +1,17 @@ | |||
1 | /* | ||
2 | * OMAP2/3 GPTIMER support.headers | ||
3 | * | ||
4 | * Copyright (C) 2009 Nokia Corporation | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | |||
11 | #ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_TIMER_GP_H | ||
12 | #define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_TIMER_GP_H | ||
13 | |||
14 | int __init omap2_gp_clockevent_set_gptimer(u8 id); | ||
15 | |||
16 | #endif | ||
17 | |||
diff --git a/arch/arm/plat-pxa/gpio.c b/arch/arm/plat-pxa/gpio.c index af819bf21b63..abc79d44acaa 100644 --- a/arch/arm/plat-pxa/gpio.c +++ b/arch/arm/plat-pxa/gpio.c | |||
@@ -121,6 +121,8 @@ static int __init pxa_init_gpio_chip(int gpio_end) | |||
121 | return -ENOMEM; | 121 | return -ENOMEM; |
122 | } | 122 | } |
123 | 123 | ||
124 | memset(chips, 0, nbanks * sizeof(struct pxa_gpio_chip)); | ||
125 | |||
124 | for (i = 0, gpio = 0; i < nbanks; i++, gpio += 32) { | 126 | for (i = 0, gpio = 0; i < nbanks; i++, gpio += 32) { |
125 | struct gpio_chip *c = &chips[i].chip; | 127 | struct gpio_chip *c = &chips[i].chip; |
126 | 128 | ||
@@ -143,6 +145,21 @@ static int __init pxa_init_gpio_chip(int gpio_end) | |||
143 | return 0; | 145 | return 0; |
144 | } | 146 | } |
145 | 147 | ||
148 | /* Update only those GRERx and GFERx edge detection register bits if those | ||
149 | * bits are set in c->irq_mask | ||
150 | */ | ||
151 | static inline void update_edge_detect(struct pxa_gpio_chip *c) | ||
152 | { | ||
153 | uint32_t grer, gfer; | ||
154 | |||
155 | grer = __raw_readl(c->regbase + GRER_OFFSET) & ~c->irq_mask; | ||
156 | gfer = __raw_readl(c->regbase + GFER_OFFSET) & ~c->irq_mask; | ||
157 | grer |= c->irq_edge_rise & c->irq_mask; | ||
158 | gfer |= c->irq_edge_fall & c->irq_mask; | ||
159 | __raw_writel(grer, c->regbase + GRER_OFFSET); | ||
160 | __raw_writel(gfer, c->regbase + GFER_OFFSET); | ||
161 | } | ||
162 | |||
146 | static int pxa_gpio_irq_type(unsigned int irq, unsigned int type) | 163 | static int pxa_gpio_irq_type(unsigned int irq, unsigned int type) |
147 | { | 164 | { |
148 | struct pxa_gpio_chip *c; | 165 | struct pxa_gpio_chip *c; |
@@ -181,8 +198,7 @@ static int pxa_gpio_irq_type(unsigned int irq, unsigned int type) | |||
181 | else | 198 | else |
182 | c->irq_edge_fall &= ~mask; | 199 | c->irq_edge_fall &= ~mask; |
183 | 200 | ||
184 | __raw_writel(c->irq_edge_rise & c->irq_mask, c->regbase + GRER_OFFSET); | 201 | update_edge_detect(c); |
185 | __raw_writel(c->irq_edge_fall & c->irq_mask, c->regbase + GFER_OFFSET); | ||
186 | 202 | ||
187 | pr_debug("%s: IRQ%d (GPIO%d) - edge%s%s\n", __func__, irq, gpio, | 203 | pr_debug("%s: IRQ%d (GPIO%d) - edge%s%s\n", __func__, irq, gpio, |
188 | ((type & IRQ_TYPE_EDGE_RISING) ? " rising" : ""), | 204 | ((type & IRQ_TYPE_EDGE_RISING) ? " rising" : ""), |
@@ -244,8 +260,7 @@ static void pxa_unmask_muxed_gpio(unsigned int irq) | |||
244 | struct pxa_gpio_chip *c = gpio_to_chip(gpio); | 260 | struct pxa_gpio_chip *c = gpio_to_chip(gpio); |
245 | 261 | ||
246 | c->irq_mask |= GPIO_bit(gpio); | 262 | c->irq_mask |= GPIO_bit(gpio); |
247 | __raw_writel(c->irq_edge_rise & c->irq_mask, c->regbase + GRER_OFFSET); | 263 | update_edge_detect(c); |
248 | __raw_writel(c->irq_edge_fall & c->irq_mask, c->regbase + GFER_OFFSET); | ||
249 | } | 264 | } |
250 | 265 | ||
251 | static struct irq_chip pxa_muxed_gpio_chip = { | 266 | static struct irq_chip pxa_muxed_gpio_chip = { |
diff --git a/arch/avr32/Makefile b/arch/avr32/Makefile index 0b97e14f73f6..c21a3290d542 100644 --- a/arch/avr32/Makefile +++ b/arch/avr32/Makefile | |||
@@ -43,8 +43,6 @@ core-y += arch/avr32/mm/ | |||
43 | drivers-$(CONFIG_OPROFILE) += arch/avr32/oprofile/ | 43 | drivers-$(CONFIG_OPROFILE) += arch/avr32/oprofile/ |
44 | libs-y += arch/avr32/lib/ | 44 | libs-y += arch/avr32/lib/ |
45 | 45 | ||
46 | CLEAN_FILES += include/asm-avr32/.arch include/asm-avr32/arch | ||
47 | |||
48 | BOOT_TARGETS := vmlinux.elf vmlinux.bin uImage uImage.srec | 46 | BOOT_TARGETS := vmlinux.elf vmlinux.bin uImage uImage.srec |
49 | 47 | ||
50 | .PHONY: $(BOOT_TARGETS) install | 48 | .PHONY: $(BOOT_TARGETS) install |
diff --git a/arch/frv/include/asm/bug.h b/arch/frv/include/asm/bug.h index 6b1b44d71028..2e054508a2f6 100644 --- a/arch/frv/include/asm/bug.h +++ b/arch/frv/include/asm/bug.h | |||
@@ -30,7 +30,7 @@ extern void __debug_bug_printk(const char *file, unsigned line); | |||
30 | do { \ | 30 | do { \ |
31 | __debug_bug_trap(signr); \ | 31 | __debug_bug_trap(signr); \ |
32 | asm volatile("nop"); \ | 32 | asm volatile("nop"); \ |
33 | } while(0) | 33 | } while(1) |
34 | 34 | ||
35 | #define HAVE_ARCH_BUG | 35 | #define HAVE_ARCH_BUG |
36 | #define BUG() \ | 36 | #define BUG() \ |
@@ -46,7 +46,8 @@ do { \ | |||
46 | #define HAVE_ARCH_KGDB_BAD_PAGE | 46 | #define HAVE_ARCH_KGDB_BAD_PAGE |
47 | #define kgdb_bad_page(page) do { kgdb_raise(SIGABRT); } while(0) | 47 | #define kgdb_bad_page(page) do { kgdb_raise(SIGABRT); } while(0) |
48 | #endif | 48 | #endif |
49 | #endif | 49 | |
50 | #endif /* CONFIG_BUG */ | ||
50 | 51 | ||
51 | #include <asm-generic/bug.h> | 52 | #include <asm-generic/bug.h> |
52 | 53 | ||
diff --git a/arch/frv/include/asm/init.h b/arch/frv/include/asm/init.h deleted file mode 100644 index 8b15838de216..000000000000 --- a/arch/frv/include/asm/init.h +++ /dev/null | |||
@@ -1,12 +0,0 @@ | |||
1 | #ifndef _ASM_INIT_H | ||
2 | #define _ASM_INIT_H | ||
3 | |||
4 | #define __init __attribute__ ((__section__ (".text.init"))) | ||
5 | #define __initdata __attribute__ ((__section__ (".data.init"))) | ||
6 | /* For assembly routines */ | ||
7 | #define __INIT .section ".text.init",#alloc,#execinstr | ||
8 | #define __FINIT .previous | ||
9 | #define __INITDATA .section ".data.init",#alloc,#write | ||
10 | |||
11 | #endif | ||
12 | |||
diff --git a/arch/frv/include/asm/unistd.h b/arch/frv/include/asm/unistd.h index edcfaf5f0414..96d78d5d2c41 100644 --- a/arch/frv/include/asm/unistd.h +++ b/arch/frv/include/asm/unistd.h | |||
@@ -339,10 +339,12 @@ | |||
339 | #define __NR_dup3 330 | 339 | #define __NR_dup3 330 |
340 | #define __NR_pipe2 331 | 340 | #define __NR_pipe2 331 |
341 | #define __NR_inotify_init1 332 | 341 | #define __NR_inotify_init1 332 |
342 | #define __NR_preadv 333 | ||
343 | #define __NR_pwritev 334 | ||
342 | 344 | ||
343 | #ifdef __KERNEL__ | 345 | #ifdef __KERNEL__ |
344 | 346 | ||
345 | #define NR_syscalls 333 | 347 | #define NR_syscalls 335 |
346 | 348 | ||
347 | #define __ARCH_WANT_IPC_PARSE_VERSION | 349 | #define __ARCH_WANT_IPC_PARSE_VERSION |
348 | /* #define __ARCH_WANT_OLD_READDIR */ | 350 | /* #define __ARCH_WANT_OLD_READDIR */ |
diff --git a/arch/frv/kernel/entry.S b/arch/frv/kernel/entry.S index 99060ab507ee..1da523b3298e 100644 --- a/arch/frv/kernel/entry.S +++ b/arch/frv/kernel/entry.S | |||
@@ -1525,5 +1525,7 @@ sys_call_table: | |||
1525 | .long sys_dup3 /* 330 */ | 1525 | .long sys_dup3 /* 330 */ |
1526 | .long sys_pipe2 | 1526 | .long sys_pipe2 |
1527 | .long sys_inotify_init1 | 1527 | .long sys_inotify_init1 |
1528 | .long sys_preadv | ||
1529 | .long sys_pwritev | ||
1528 | 1530 | ||
1529 | syscall_table_size = (. - sys_call_table) | 1531 | syscall_table_size = (. - sys_call_table) |
diff --git a/arch/frv/kernel/head-mmu-fr451.S b/arch/frv/kernel/head-mmu-fr451.S index c8f210d84ff5..98f87d586e59 100644 --- a/arch/frv/kernel/head-mmu-fr451.S +++ b/arch/frv/kernel/head-mmu-fr451.S | |||
@@ -9,6 +9,7 @@ | |||
9 | * 2 of the License, or (at your option) any later version. | 9 | * 2 of the License, or (at your option) any later version. |
10 | */ | 10 | */ |
11 | 11 | ||
12 | #include <linux/init.h> | ||
12 | #include <linux/threads.h> | 13 | #include <linux/threads.h> |
13 | #include <linux/linkage.h> | 14 | #include <linux/linkage.h> |
14 | #include <asm/ptrace.h> | 15 | #include <asm/ptrace.h> |
@@ -31,7 +32,7 @@ | |||
31 | #define __400_LCR 0xfe000100 | 32 | #define __400_LCR 0xfe000100 |
32 | #define __400_LSBR 0xfe000c00 | 33 | #define __400_LSBR 0xfe000c00 |
33 | 34 | ||
34 | .section .text.init,"ax" | 35 | __INIT |
35 | .balign 4 | 36 | .balign 4 |
36 | 37 | ||
37 | ############################################################################### | 38 | ############################################################################### |
diff --git a/arch/frv/kernel/head-uc-fr401.S b/arch/frv/kernel/head-uc-fr401.S index ee282be20fff..438643cfa38e 100644 --- a/arch/frv/kernel/head-uc-fr401.S +++ b/arch/frv/kernel/head-uc-fr401.S | |||
@@ -9,6 +9,7 @@ | |||
9 | * 2 of the License, or (at your option) any later version. | 9 | * 2 of the License, or (at your option) any later version. |
10 | */ | 10 | */ |
11 | 11 | ||
12 | #include <linux/init.h> | ||
12 | #include <linux/threads.h> | 13 | #include <linux/threads.h> |
13 | #include <linux/linkage.h> | 14 | #include <linux/linkage.h> |
14 | #include <asm/ptrace.h> | 15 | #include <asm/ptrace.h> |
@@ -30,7 +31,7 @@ | |||
30 | #define __400_LCR 0xfe000100 | 31 | #define __400_LCR 0xfe000100 |
31 | #define __400_LSBR 0xfe000c00 | 32 | #define __400_LSBR 0xfe000c00 |
32 | 33 | ||
33 | .section .text.init,"ax" | 34 | __INIT |
34 | .balign 4 | 35 | .balign 4 |
35 | 36 | ||
36 | ############################################################################### | 37 | ############################################################################### |
diff --git a/arch/frv/kernel/head-uc-fr451.S b/arch/frv/kernel/head-uc-fr451.S index b10d9c8295d2..b2a76c4a1786 100644 --- a/arch/frv/kernel/head-uc-fr451.S +++ b/arch/frv/kernel/head-uc-fr451.S | |||
@@ -9,6 +9,7 @@ | |||
9 | * 2 of the License, or (at your option) any later version. | 9 | * 2 of the License, or (at your option) any later version. |
10 | */ | 10 | */ |
11 | 11 | ||
12 | #include <linux/init.h> | ||
12 | #include <linux/threads.h> | 13 | #include <linux/threads.h> |
13 | #include <linux/linkage.h> | 14 | #include <linux/linkage.h> |
14 | #include <asm/ptrace.h> | 15 | #include <asm/ptrace.h> |
@@ -30,7 +31,7 @@ | |||
30 | #define __400_LCR 0xfe000100 | 31 | #define __400_LCR 0xfe000100 |
31 | #define __400_LSBR 0xfe000c00 | 32 | #define __400_LSBR 0xfe000c00 |
32 | 33 | ||
33 | .section .text.init,"ax" | 34 | __INIT |
34 | .balign 4 | 35 | .balign 4 |
35 | 36 | ||
36 | ############################################################################### | 37 | ############################################################################### |
diff --git a/arch/frv/kernel/head-uc-fr555.S b/arch/frv/kernel/head-uc-fr555.S index 39937c19b460..5497aaf34f77 100644 --- a/arch/frv/kernel/head-uc-fr555.S +++ b/arch/frv/kernel/head-uc-fr555.S | |||
@@ -9,6 +9,7 @@ | |||
9 | * 2 of the License, or (at your option) any later version. | 9 | * 2 of the License, or (at your option) any later version. |
10 | */ | 10 | */ |
11 | 11 | ||
12 | #include <linux/init.h> | ||
12 | #include <linux/threads.h> | 13 | #include <linux/threads.h> |
13 | #include <linux/linkage.h> | 14 | #include <linux/linkage.h> |
14 | #include <asm/ptrace.h> | 15 | #include <asm/ptrace.h> |
@@ -29,7 +30,7 @@ | |||
29 | #define __551_LCR 0xfeff1100 | 30 | #define __551_LCR 0xfeff1100 |
30 | #define __551_LSBR 0xfeff1c00 | 31 | #define __551_LSBR 0xfeff1c00 |
31 | 32 | ||
32 | .section .text.init,"ax" | 33 | __INIT |
33 | .balign 4 | 34 | .balign 4 |
34 | 35 | ||
35 | ############################################################################### | 36 | ############################################################################### |
diff --git a/arch/frv/kernel/head.S b/arch/frv/kernel/head.S index fecf751c5cae..b825ef3f2d54 100644 --- a/arch/frv/kernel/head.S +++ b/arch/frv/kernel/head.S | |||
@@ -9,6 +9,7 @@ | |||
9 | * 2 of the License, or (at your option) any later version. | 9 | * 2 of the License, or (at your option) any later version. |
10 | */ | 10 | */ |
11 | 11 | ||
12 | #include <linux/init.h> | ||
12 | #include <linux/threads.h> | 13 | #include <linux/threads.h> |
13 | #include <linux/linkage.h> | 14 | #include <linux/linkage.h> |
14 | #include <asm/thread_info.h> | 15 | #include <asm/thread_info.h> |
@@ -27,7 +28,7 @@ | |||
27 | # command line string | 28 | # command line string |
28 | # | 29 | # |
29 | ############################################################################### | 30 | ############################################################################### |
30 | .section .text.head,"ax" | 31 | __HEAD |
31 | .balign 4 | 32 | .balign 4 |
32 | 33 | ||
33 | .globl _boot, __head_reference | 34 | .globl _boot, __head_reference |
diff --git a/arch/frv/kernel/vmlinux.lds.S b/arch/frv/kernel/vmlinux.lds.S index b95c4eace62f..22d9787406ed 100644 --- a/arch/frv/kernel/vmlinux.lds.S +++ b/arch/frv/kernel/vmlinux.lds.S | |||
@@ -26,7 +26,7 @@ SECTIONS | |||
26 | 26 | ||
27 | _sinittext = .; | 27 | _sinittext = .; |
28 | .init.text : { | 28 | .init.text : { |
29 | *(.text.head) | 29 | HEAD_TEXT |
30 | #ifndef CONFIG_DEBUG_INFO | 30 | #ifndef CONFIG_DEBUG_INFO |
31 | INIT_TEXT | 31 | INIT_TEXT |
32 | EXIT_TEXT | 32 | EXIT_TEXT |
diff --git a/arch/m32r/boot/compressed/Makefile b/arch/m32r/boot/compressed/Makefile index d908e1d3c07f..560484ae35ec 100644 --- a/arch/m32r/boot/compressed/Makefile +++ b/arch/m32r/boot/compressed/Makefile | |||
@@ -6,7 +6,6 @@ | |||
6 | 6 | ||
7 | targets := vmlinux vmlinux.bin vmlinux.bin.gz head.o misc.o \ | 7 | targets := vmlinux vmlinux.bin vmlinux.bin.gz head.o misc.o \ |
8 | piggy.o vmlinux.lds | 8 | piggy.o vmlinux.lds |
9 | EXTRA_AFLAGS := -traditional | ||
10 | 9 | ||
11 | OBJECTS = $(obj)/head.o $(obj)/misc.o | 10 | OBJECTS = $(obj)/head.o $(obj)/misc.o |
12 | 11 | ||
diff --git a/arch/m32r/include/asm/assembler.h b/arch/m32r/include/asm/assembler.h index 26351539b5ff..728799fc70aa 100644 --- a/arch/m32r/include/asm/assembler.h +++ b/arch/m32r/include/asm/assembler.h | |||
@@ -9,14 +9,15 @@ | |||
9 | * This file contains M32R architecture specific macro definitions. | 9 | * This file contains M32R architecture specific macro definitions. |
10 | */ | 10 | */ |
11 | 11 | ||
12 | #include <linux/stringify.h> | ||
13 | |||
14 | #undef __STR | ||
12 | 15 | ||
13 | #ifndef __STR | ||
14 | #ifdef __ASSEMBLY__ | 16 | #ifdef __ASSEMBLY__ |
15 | #define __STR(x) x | 17 | #define __STR(x) x |
16 | #else | 18 | #else |
17 | #define __STR(x) #x | 19 | #define __STR(x) __stringify(x) |
18 | #endif | 20 | #endif |
19 | #endif /* __STR */ | ||
20 | 21 | ||
21 | #ifdef CONFIG_SMP | 22 | #ifdef CONFIG_SMP |
22 | #define M32R_LOCK __STR(lock) | 23 | #define M32R_LOCK __STR(lock) |
diff --git a/arch/m32r/kernel/Makefile b/arch/m32r/kernel/Makefile index 09200d4886e3..b1a4b6036591 100644 --- a/arch/m32r/kernel/Makefile +++ b/arch/m32r/kernel/Makefile | |||
@@ -9,5 +9,3 @@ obj-y := process.o entry.o traps.o align.o irq.o setup.o time.o \ | |||
9 | 9 | ||
10 | obj-$(CONFIG_SMP) += smp.o smpboot.o | 10 | obj-$(CONFIG_SMP) += smp.o smpboot.o |
11 | obj-$(CONFIG_MODULES) += module.o | 11 | obj-$(CONFIG_MODULES) += module.o |
12 | |||
13 | EXTRA_AFLAGS := -traditional | ||
diff --git a/arch/m32r/kernel/head.S b/arch/m32r/kernel/head.S index 90916067b9c1..0a7194439eb1 100644 --- a/arch/m32r/kernel/head.S +++ b/arch/m32r/kernel/head.S | |||
@@ -23,7 +23,7 @@ __INITDATA | |||
23 | /* | 23 | /* |
24 | * References to members of the boot_cpu_data structure. | 24 | * References to members of the boot_cpu_data structure. |
25 | */ | 25 | */ |
26 | .section .text.head, "ax" | 26 | __HEAD |
27 | .global start_kernel | 27 | .global start_kernel |
28 | .global __bss_start | 28 | .global __bss_start |
29 | .global _end | 29 | .global _end |
diff --git a/arch/m32r/kernel/vmlinux.lds.S b/arch/m32r/kernel/vmlinux.lds.S index 9db05df20c0e..4179adf6c624 100644 --- a/arch/m32r/kernel/vmlinux.lds.S +++ b/arch/m32r/kernel/vmlinux.lds.S | |||
@@ -27,7 +27,7 @@ SECTIONS | |||
27 | _text = .; /* Text and read-only data */ | 27 | _text = .; /* Text and read-only data */ |
28 | .boot : { *(.boot) } = 0 | 28 | .boot : { *(.boot) } = 0 |
29 | .text : { | 29 | .text : { |
30 | *(.text.head) | 30 | HEAD_TEXT |
31 | TEXT_TEXT | 31 | TEXT_TEXT |
32 | SCHED_TEXT | 32 | SCHED_TEXT |
33 | LOCK_TEXT | 33 | LOCK_TEXT |
diff --git a/arch/m68k/kernel/head.S b/arch/m68k/kernel/head.S index f513f530de91..86edb5fbcfc3 100644 --- a/arch/m68k/kernel/head.S +++ b/arch/m68k/kernel/head.S | |||
@@ -577,7 +577,7 @@ func_define putn,1 | |||
577 | #endif | 577 | #endif |
578 | .endm | 578 | .endm |
579 | 579 | ||
580 | .section ".text.head","ax" | 580 | __HEAD |
581 | ENTRY(_stext) | 581 | ENTRY(_stext) |
582 | /* | 582 | /* |
583 | * Version numbers of the bootinfo interface | 583 | * Version numbers of the bootinfo interface |
diff --git a/arch/m68k/kernel/sun3-head.S b/arch/m68k/kernel/sun3-head.S index aad01592dbbc..43036bf4aeed 100644 --- a/arch/m68k/kernel/sun3-head.S +++ b/arch/m68k/kernel/sun3-head.S | |||
@@ -1,4 +1,5 @@ | |||
1 | #include <linux/linkage.h> | 1 | #include <linux/linkage.h> |
2 | #include <linux/init.h> | ||
2 | 3 | ||
3 | #include <asm/entry.h> | 4 | #include <asm/entry.h> |
4 | #include <asm/page.h> | 5 | #include <asm/page.h> |
@@ -29,7 +30,7 @@ kernel_pmd_table: .skip 0x2000 | |||
29 | .globl kernel_pg_dir | 30 | .globl kernel_pg_dir |
30 | .equ kernel_pg_dir,kernel_pmd_table | 31 | .equ kernel_pg_dir,kernel_pmd_table |
31 | 32 | ||
32 | .section .text.head | 33 | __HEAD |
33 | ENTRY(_stext) | 34 | ENTRY(_stext) |
34 | ENTRY(_start) | 35 | ENTRY(_start) |
35 | 36 | ||
diff --git a/arch/m68k/kernel/vmlinux-std.lds b/arch/m68k/kernel/vmlinux-std.lds index f846d4e3e5e1..01d212bb05a6 100644 --- a/arch/m68k/kernel/vmlinux-std.lds +++ b/arch/m68k/kernel/vmlinux-std.lds | |||
@@ -12,7 +12,7 @@ SECTIONS | |||
12 | . = 0x1000; | 12 | . = 0x1000; |
13 | _text = .; /* Text and read-only data */ | 13 | _text = .; /* Text and read-only data */ |
14 | .text : { | 14 | .text : { |
15 | *(.text.head) | 15 | HEAD_TEXT |
16 | TEXT_TEXT | 16 | TEXT_TEXT |
17 | SCHED_TEXT | 17 | SCHED_TEXT |
18 | LOCK_TEXT | 18 | LOCK_TEXT |
diff --git a/arch/m68k/kernel/vmlinux-sun3.lds b/arch/m68k/kernel/vmlinux-sun3.lds index d9368c0709ba..c192f773db96 100644 --- a/arch/m68k/kernel/vmlinux-sun3.lds +++ b/arch/m68k/kernel/vmlinux-sun3.lds | |||
@@ -12,7 +12,7 @@ SECTIONS | |||
12 | . = 0xE002000; | 12 | . = 0xE002000; |
13 | _text = .; /* Text and read-only data */ | 13 | _text = .; /* Text and read-only data */ |
14 | .text : { | 14 | .text : { |
15 | *(.text.head) | 15 | HEAD_TEXT |
16 | TEXT_TEXT | 16 | TEXT_TEXT |
17 | SCHED_TEXT | 17 | SCHED_TEXT |
18 | LOCK_TEXT | 18 | LOCK_TEXT |
diff --git a/arch/microblaze/include/asm/of_platform.h b/arch/microblaze/include/asm/of_platform.h index 187c0eedaece..37491276c6ca 100644 --- a/arch/microblaze/include/asm/of_platform.h +++ b/arch/microblaze/include/asm/of_platform.h | |||
@@ -36,16 +36,6 @@ static const struct of_device_id of_default_bus_ids[] = { | |||
36 | {}, | 36 | {}, |
37 | }; | 37 | }; |
38 | 38 | ||
39 | /* Platform drivers register/unregister */ | ||
40 | static inline int of_register_platform_driver(struct of_platform_driver *drv) | ||
41 | { | ||
42 | return of_register_driver(drv, &of_platform_bus_type); | ||
43 | } | ||
44 | static inline void of_unregister_platform_driver(struct of_platform_driver *drv) | ||
45 | { | ||
46 | of_unregister_driver(drv); | ||
47 | } | ||
48 | |||
49 | /* Platform devices and busses creation */ | 39 | /* Platform devices and busses creation */ |
50 | extern struct of_device *of_platform_device_create(struct device_node *np, | 40 | extern struct of_device *of_platform_device_create(struct device_node *np, |
51 | const char *bus_id, | 41 | const char *bus_id, |
diff --git a/arch/mn10300/kernel/head.S b/arch/mn10300/kernel/head.S index 8a8309fbe3c4..14f27f3bfaf4 100644 --- a/arch/mn10300/kernel/head.S +++ b/arch/mn10300/kernel/head.S | |||
@@ -9,6 +9,7 @@ | |||
9 | * 2 of the Licence, or (at your option) any later version. | 9 | * 2 of the Licence, or (at your option) any later version. |
10 | */ | 10 | */ |
11 | 11 | ||
12 | #include <linux/init.h> | ||
12 | #include <linux/threads.h> | 13 | #include <linux/threads.h> |
13 | #include <linux/linkage.h> | 14 | #include <linux/linkage.h> |
14 | #include <linux/serial_reg.h> | 15 | #include <linux/serial_reg.h> |
@@ -19,7 +20,7 @@ | |||
19 | #include <asm/param.h> | 20 | #include <asm/param.h> |
20 | #include <unit/serial.h> | 21 | #include <unit/serial.h> |
21 | 22 | ||
22 | .section .text.head,"ax" | 23 | __HEAD |
23 | 24 | ||
24 | ############################################################################### | 25 | ############################################################################### |
25 | # | 26 | # |
diff --git a/arch/mn10300/kernel/vmlinux.lds.S b/arch/mn10300/kernel/vmlinux.lds.S index b8259668f7dc..24de6b90f401 100644 --- a/arch/mn10300/kernel/vmlinux.lds.S +++ b/arch/mn10300/kernel/vmlinux.lds.S | |||
@@ -27,10 +27,7 @@ SECTIONS | |||
27 | _stext = .; | 27 | _stext = .; |
28 | _text = .; /* Text and read-only data */ | 28 | _text = .; /* Text and read-only data */ |
29 | .text : { | 29 | .text : { |
30 | *( | 30 | HEAD_TEXT |
31 | .text.head | ||
32 | .text | ||
33 | ) | ||
34 | TEXT_TEXT | 31 | TEXT_TEXT |
35 | SCHED_TEXT | 32 | SCHED_TEXT |
36 | LOCK_TEXT | 33 | LOCK_TEXT |
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 4c7804551362..a0d1146a0578 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig | |||
@@ -181,6 +181,10 @@ config SYS_SUPPORTS_APM_EMULATION | |||
181 | default y if PMAC_APM_EMU | 181 | default y if PMAC_APM_EMU |
182 | bool | 182 | bool |
183 | 183 | ||
184 | config DTC | ||
185 | bool | ||
186 | default y | ||
187 | |||
184 | config DEFAULT_UIMAGE | 188 | config DEFAULT_UIMAGE |
185 | bool | 189 | bool |
186 | help | 190 | help |
diff --git a/arch/powerpc/boot/4xx.c b/arch/powerpc/boot/4xx.c index 5c878436f348..325b310573b9 100644 --- a/arch/powerpc/boot/4xx.c +++ b/arch/powerpc/boot/4xx.c | |||
@@ -158,21 +158,33 @@ void ibm440spe_fixup_memsize(void) | |||
158 | 158 | ||
159 | #define DDR_GET_VAL(val, mask, shift) (((val) >> (shift)) & (mask)) | 159 | #define DDR_GET_VAL(val, mask, shift) (((val) >> (shift)) & (mask)) |
160 | 160 | ||
161 | void ibm4xx_denali_fixup_memsize(void) | 161 | /* |
162 | * Some U-Boot versions set the number of chipselects to two | ||
163 | * for Sequoia/Rainier boards while they only have one chipselect | ||
164 | * hardwired. Hardcode the number of chipselects to one | ||
165 | * for sequioa/rainer board models or read the actual value | ||
166 | * from the memory controller register DDR0_10 otherwise. | ||
167 | */ | ||
168 | static inline u32 ibm4xx_denali_get_cs(void) | ||
162 | { | 169 | { |
163 | u32 val, max_cs, max_col, max_row; | 170 | void *devp; |
164 | u32 cs, col, row, bank, dpath; | 171 | char model[64]; |
165 | unsigned long memsize; | 172 | u32 val, cs; |
166 | 173 | ||
167 | val = SDRAM0_READ(DDR0_02); | 174 | devp = finddevice("/"); |
168 | if (!DDR_GET_VAL(val, DDR_START, DDR_START_SHIFT)) | 175 | if (!devp) |
169 | fatal("DDR controller is not initialized\n"); | 176 | goto read_cs; |
170 | 177 | ||
171 | /* get maximum cs col and row values */ | 178 | if (getprop(devp, "model", model, sizeof(model)) <= 0) |
172 | max_cs = DDR_GET_VAL(val, DDR_MAX_CS_REG, DDR_MAX_CS_REG_SHIFT); | 179 | goto read_cs; |
173 | max_col = DDR_GET_VAL(val, DDR_MAX_COL_REG, DDR_MAX_COL_REG_SHIFT); | ||
174 | max_row = DDR_GET_VAL(val, DDR_MAX_ROW_REG, DDR_MAX_ROW_REG_SHIFT); | ||
175 | 180 | ||
181 | model[sizeof(model)-1] = 0; | ||
182 | |||
183 | if (!strcmp(model, "amcc,sequoia") || | ||
184 | !strcmp(model, "amcc,rainier")) | ||
185 | return 1; | ||
186 | |||
187 | read_cs: | ||
176 | /* get CS value */ | 188 | /* get CS value */ |
177 | val = SDRAM0_READ(DDR0_10); | 189 | val = SDRAM0_READ(DDR0_10); |
178 | 190 | ||
@@ -183,7 +195,25 @@ void ibm4xx_denali_fixup_memsize(void) | |||
183 | cs++; | 195 | cs++; |
184 | val = val >> 1; | 196 | val = val >> 1; |
185 | } | 197 | } |
198 | return cs; | ||
199 | } | ||
200 | |||
201 | void ibm4xx_denali_fixup_memsize(void) | ||
202 | { | ||
203 | u32 val, max_cs, max_col, max_row; | ||
204 | u32 cs, col, row, bank, dpath; | ||
205 | unsigned long memsize; | ||
206 | |||
207 | val = SDRAM0_READ(DDR0_02); | ||
208 | if (!DDR_GET_VAL(val, DDR_START, DDR_START_SHIFT)) | ||
209 | fatal("DDR controller is not initialized\n"); | ||
186 | 210 | ||
211 | /* get maximum cs col and row values */ | ||
212 | max_cs = DDR_GET_VAL(val, DDR_MAX_CS_REG, DDR_MAX_CS_REG_SHIFT); | ||
213 | max_col = DDR_GET_VAL(val, DDR_MAX_COL_REG, DDR_MAX_COL_REG_SHIFT); | ||
214 | max_row = DDR_GET_VAL(val, DDR_MAX_ROW_REG, DDR_MAX_ROW_REG_SHIFT); | ||
215 | |||
216 | cs = ibm4xx_denali_get_cs(); | ||
187 | if (!cs) | 217 | if (!cs) |
188 | fatal("No memory installed\n"); | 218 | fatal("No memory installed\n"); |
189 | if (cs > max_cs) | 219 | if (cs > max_cs) |
@@ -193,9 +223,9 @@ void ibm4xx_denali_fixup_memsize(void) | |||
193 | val = SDRAM0_READ(DDR0_14); | 223 | val = SDRAM0_READ(DDR0_14); |
194 | 224 | ||
195 | if (DDR_GET_VAL(val, DDR_REDUC, DDR_REDUC_SHIFT)) | 225 | if (DDR_GET_VAL(val, DDR_REDUC, DDR_REDUC_SHIFT)) |
196 | dpath = 8; /* 64 bits */ | ||
197 | else | ||
198 | dpath = 4; /* 32 bits */ | 226 | dpath = 4; /* 32 bits */ |
227 | else | ||
228 | dpath = 8; /* 64 bits */ | ||
199 | 229 | ||
200 | /* get address pins (rows) */ | 230 | /* get address pins (rows) */ |
201 | val = SDRAM0_READ(DDR0_42); | 231 | val = SDRAM0_READ(DDR0_42); |
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile index 4458abb67c51..8da2bf963b57 100644 --- a/arch/powerpc/boot/Makefile +++ b/arch/powerpc/boot/Makefile | |||
@@ -33,7 +33,7 @@ ifeq ($(call cc-option-yn, -fstack-protector),y) | |||
33 | BOOTCFLAGS += -fno-stack-protector | 33 | BOOTCFLAGS += -fno-stack-protector |
34 | endif | 34 | endif |
35 | 35 | ||
36 | BOOTCFLAGS += -I$(obj) -I$(srctree)/$(obj) -I$(srctree)/$(src)/libfdt | 36 | BOOTCFLAGS += -I$(obj) -I$(srctree)/$(obj) |
37 | 37 | ||
38 | DTS_FLAGS ?= -p 1024 | 38 | DTS_FLAGS ?= -p 1024 |
39 | 39 | ||
@@ -53,9 +53,14 @@ zliblinuxheader := zlib.h zconf.h zutil.h | |||
53 | $(addprefix $(obj)/,$(zlib) cuboot-c2k.o gunzip_util.o main.o prpmc2800.o): \ | 53 | $(addprefix $(obj)/,$(zlib) cuboot-c2k.o gunzip_util.o main.o prpmc2800.o): \ |
54 | $(addprefix $(obj)/,$(zliblinuxheader)) $(addprefix $(obj)/,$(zlibheader)) | 54 | $(addprefix $(obj)/,$(zliblinuxheader)) $(addprefix $(obj)/,$(zlibheader)) |
55 | 55 | ||
56 | src-libfdt := fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c | 56 | libfdt := fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c |
57 | libfdtheader := fdt.h libfdt.h libfdt_internal.h | ||
58 | |||
59 | $(addprefix $(obj)/,$(libfdt) libfdt-wrapper.o simpleboot.o): \ | ||
60 | $(addprefix $(obj)/,$(libfdtheader)) | ||
61 | |||
57 | src-wlib := string.S crt0.S crtsavres.S stdio.c main.c \ | 62 | src-wlib := string.S crt0.S crtsavres.S stdio.c main.c \ |
58 | $(addprefix libfdt/,$(src-libfdt)) libfdt-wrapper.c \ | 63 | $(libfdt) libfdt-wrapper.c \ |
59 | ns16550.c serial.c simple_alloc.c div64.S util.S \ | 64 | ns16550.c serial.c simple_alloc.c div64.S util.S \ |
60 | gunzip_util.c elf_util.c $(zlib) devtree.c oflib.c ofconsole.c \ | 65 | gunzip_util.c elf_util.c $(zlib) devtree.c oflib.c ofconsole.c \ |
61 | 4xx.c ebony.c mv64x60.c mpsc.c mv64x60_i2c.c cuboot.c bamboo.c \ | 66 | 4xx.c ebony.c mv64x60.c mpsc.c mv64x60_i2c.c cuboot.c bamboo.c \ |
@@ -96,6 +101,12 @@ $(addprefix $(obj)/,$(zlibheader)): $(obj)/%: $(srctree)/lib/zlib_inflate/% | |||
96 | $(addprefix $(obj)/,$(zliblinuxheader)): $(obj)/%: $(srctree)/include/linux/% | 101 | $(addprefix $(obj)/,$(zliblinuxheader)): $(obj)/%: $(srctree)/include/linux/% |
97 | $(call cmd,copy_zliblinuxheader) | 102 | $(call cmd,copy_zliblinuxheader) |
98 | 103 | ||
104 | quiet_cmd_copy_libfdt = COPY $@ | ||
105 | cmd_copy_libfdt = cp $< $@ | ||
106 | |||
107 | $(addprefix $(obj)/,$(libfdt) $(libfdtheader)): $(obj)/%: $(srctree)/scripts/dtc/libfdt/% | ||
108 | $(call cmd,copy_libfdt) | ||
109 | |||
99 | $(obj)/empty.c: | 110 | $(obj)/empty.c: |
100 | @touch $@ | 111 | @touch $@ |
101 | 112 | ||
@@ -103,6 +114,7 @@ $(obj)/zImage.lds $(obj)/zImage.coff.lds $(obj)/zImage.ps3.lds: $(obj)/%: $(srct | |||
103 | @cp $< $@ | 114 | @cp $< $@ |
104 | 115 | ||
105 | clean-files := $(zlib) $(zlibheader) $(zliblinuxheader) \ | 116 | clean-files := $(zlib) $(zlibheader) $(zliblinuxheader) \ |
117 | $(libfdt) $(libfdtheader) \ | ||
106 | empty.c zImage.coff.lds zImage.ps3.lds zImage.lds | 118 | empty.c zImage.coff.lds zImage.ps3.lds zImage.lds |
107 | 119 | ||
108 | quiet_cmd_bootcc = BOOTCC $@ | 120 | quiet_cmd_bootcc = BOOTCC $@ |
@@ -114,6 +126,8 @@ quiet_cmd_bootas = BOOTAS $@ | |||
114 | quiet_cmd_bootar = BOOTAR $@ | 126 | quiet_cmd_bootar = BOOTAR $@ |
115 | cmd_bootar = $(CROSS32AR) -cr $@.$$$$ $(filter-out FORCE,$^); mv $@.$$$$ $@ | 127 | cmd_bootar = $(CROSS32AR) -cr $@.$$$$ $(filter-out FORCE,$^); mv $@.$$$$ $@ |
116 | 128 | ||
129 | $(obj-libfdt): $(obj)/%.o: $(srctree)/scripts/dtc/libfdt/%.c FORCE | ||
130 | $(call if_changed_dep,bootcc) | ||
117 | $(patsubst %.c,%.o, $(filter %.c, $(src-boot))): %.o: %.c FORCE | 131 | $(patsubst %.c,%.o, $(filter %.c, $(src-boot))): %.o: %.c FORCE |
118 | $(Q)mkdir -p $(dir $@) | 132 | $(Q)mkdir -p $(dir $@) |
119 | $(call if_changed_dep,bootcc) | 133 | $(call if_changed_dep,bootcc) |
@@ -124,7 +138,7 @@ $(patsubst %.S,%.o, $(filter %.S, $(src-boot))): %.o: %.S FORCE | |||
124 | $(obj)/wrapper.a: $(obj-wlib) FORCE | 138 | $(obj)/wrapper.a: $(obj-wlib) FORCE |
125 | $(call if_changed,bootar) | 139 | $(call if_changed,bootar) |
126 | 140 | ||
127 | hostprogs-y := addnote addRamDisk hack-coff mktree dtc | 141 | hostprogs-y := addnote addRamDisk hack-coff mktree |
128 | 142 | ||
129 | targets += $(patsubst $(obj)/%,%,$(obj-boot) wrapper.a) | 143 | targets += $(patsubst $(obj)/%,%,$(obj-boot) wrapper.a) |
130 | extra-y := $(obj)/wrapper.a $(obj-plat) $(obj)/empty.o \ | 144 | extra-y := $(obj)/wrapper.a $(obj-plat) $(obj)/empty.o \ |
@@ -133,47 +147,10 @@ extra-y := $(obj)/wrapper.a $(obj-plat) $(obj)/empty.o \ | |||
133 | dtstree := $(srctree)/$(src)/dts | 147 | dtstree := $(srctree)/$(src)/dts |
134 | 148 | ||
135 | wrapper :=$(srctree)/$(src)/wrapper | 149 | wrapper :=$(srctree)/$(src)/wrapper |
136 | wrapperbits := $(extra-y) $(addprefix $(obj)/,addnote hack-coff mktree dtc) \ | 150 | wrapperbits := $(extra-y) $(addprefix $(obj)/,addnote hack-coff mktree) \ |
137 | $(wrapper) FORCE | 151 | $(wrapper) FORCE |
138 | 152 | ||
139 | ############# | 153 | ############# |
140 | # Bits for building dtc | ||
141 | # DTC_GENPARSER := 1 # Uncomment to rebuild flex/bison output | ||
142 | |||
143 | dtc-objs := dtc.o flattree.o fstree.o data.o livetree.o treesource.o srcpos.o checks.o | ||
144 | dtc-objs += dtc-lexer.lex.o dtc-parser.tab.o | ||
145 | dtc-objs := $(addprefix dtc-src/, $(dtc-objs)) | ||
146 | |||
147 | # prerequisites on generated files needs to be explicit | ||
148 | $(obj)/dtc-src/dtc-parser.tab.o: $(obj)/dtc-src/dtc-parser.tab.c $(obj)/dtc-src/dtc-parser.tab.h | ||
149 | $(obj)/dtc-src/dtc-lexer.lex.o: $(obj)/dtc-src/dtc-lexer.lex.c $(obj)/dtc-src/dtc-parser.tab.h | ||
150 | |||
151 | HOSTCFLAGS += -I$(src)/dtc-src/ -I$(src)/libfdt/ | ||
152 | |||
153 | targets += dtc-src/dtc-parser.tab.c | ||
154 | targets += dtc-src/dtc-lexer.lex.c | ||
155 | |||
156 | clean-files += dtc-src/dtc-parser.tab.h | ||
157 | |||
158 | ifdef DTC_GENPARSER | ||
159 | BISON = bison | ||
160 | FLEX = flex | ||
161 | |||
162 | quiet_cmd_bison = BISON $@ | ||
163 | cmd_bison = $(BISON) -o$@ -d $<; cp $@ $@_shipped | ||
164 | quiet_cmd_flex = FLEX $@ | ||
165 | cmd_flex = $(FLEX) -o$@ $<; cp $@ $@_shipped | ||
166 | |||
167 | $(obj)/dtc-src/dtc-parser.tab.c: $(src)/dtc-src/dtc-parser.y FORCE | ||
168 | $(call if_changed,bison) | ||
169 | |||
170 | $(obj)/dtc-src/dtc-parser.tab.h: $(obj)/dtc-src/dtc-parser.tab.c | ||
171 | |||
172 | $(obj)/dtc-src/dtc-lexer.lex.c: $(src)/dtc-src/dtc-lexer.l FORCE | ||
173 | $(call if_changed,flex) | ||
174 | endif | ||
175 | |||
176 | ############# | ||
177 | # Bits for building various flavours of zImage | 154 | # Bits for building various flavours of zImage |
178 | 155 | ||
179 | ifneq ($(CROSS32_COMPILE),) | 156 | ifneq ($(CROSS32_COMPILE),) |
@@ -347,8 +324,10 @@ $(obj)/treeImage.%: vmlinux $(obj)/%.dtb $(wrapperbits) | |||
347 | $(call if_changed,wrap,treeboot-$*,,$(obj)/$*.dtb) | 324 | $(call if_changed,wrap,treeboot-$*,,$(obj)/$*.dtb) |
348 | 325 | ||
349 | # Rule to build device tree blobs | 326 | # Rule to build device tree blobs |
350 | $(obj)/%.dtb: $(dtstree)/%.dts $(obj)/dtc | 327 | DTC = $(objtree)/scripts/dtc/dtc |
351 | $(obj)/dtc -O dtb -o $(obj)/$*.dtb -b 0 $(DTS_FLAGS) $(dtstree)/$*.dts | 328 | |
329 | $(obj)/%.dtb: $(dtstree)/%.dts | ||
330 | $(DTC) -O dtb -o $(obj)/$*.dtb -b 0 $(DTS_FLAGS) $(dtstree)/$*.dts | ||
352 | 331 | ||
353 | # If there isn't a platform selected then just strip the vmlinux. | 332 | # If there isn't a platform selected then just strip the vmlinux. |
354 | ifeq (,$(image-y)) | 333 | ifeq (,$(image-y)) |
diff --git a/arch/powerpc/boot/dtc-src/Makefile.dtc b/arch/powerpc/boot/dtc-src/Makefile.dtc deleted file mode 100644 index 6ddf9ecac669..000000000000 --- a/arch/powerpc/boot/dtc-src/Makefile.dtc +++ /dev/null | |||
@@ -1,9 +0,0 @@ | |||
1 | # Makefile.dtc | ||
2 | # | ||
3 | # This is not a complete Makefile of itself. Instead, it is designed to | ||
4 | # be easily embeddable into other systems of Makefiles. | ||
5 | # | ||
6 | DTC_SRCS = dtc.c flattree.c fstree.c data.c livetree.c treesource.c srcpos.c \ | ||
7 | checks.c | ||
8 | DTC_GEN_SRCS = dtc-lexer.lex.c dtc-parser.tab.c | ||
9 | DTC_OBJS = $(DTC_SRCS:%.c=%.o) $(DTC_GEN_SRCS:%.c=%.o) | ||
diff --git a/arch/powerpc/boot/dtc-src/checks.c b/arch/powerpc/boot/dtc-src/checks.c deleted file mode 100644 index 95485796f253..000000000000 --- a/arch/powerpc/boot/dtc-src/checks.c +++ /dev/null | |||
@@ -1,587 +0,0 @@ | |||
1 | /* | ||
2 | * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation. 2007. | ||
3 | * | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or | ||
6 | * modify it under the terms of the GNU General Public License as | ||
7 | * published by the Free Software Foundation; either version 2 of the | ||
8 | * License, or (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
13 | * General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 | ||
18 | * USA | ||
19 | */ | ||
20 | |||
21 | #include "dtc.h" | ||
22 | |||
23 | #ifdef TRACE_CHECKS | ||
24 | #define TRACE(c, ...) \ | ||
25 | do { \ | ||
26 | fprintf(stderr, "=== %s: ", (c)->name); \ | ||
27 | fprintf(stderr, __VA_ARGS__); \ | ||
28 | fprintf(stderr, "\n"); \ | ||
29 | } while (0) | ||
30 | #else | ||
31 | #define TRACE(c, fmt, ...) do { } while (0) | ||
32 | #endif | ||
33 | |||
34 | enum checklevel { | ||
35 | IGNORE = 0, | ||
36 | WARN = 1, | ||
37 | ERROR = 2, | ||
38 | }; | ||
39 | |||
40 | enum checkstatus { | ||
41 | UNCHECKED = 0, | ||
42 | PREREQ, | ||
43 | PASSED, | ||
44 | FAILED, | ||
45 | }; | ||
46 | |||
47 | struct check; | ||
48 | |||
49 | typedef void (*tree_check_fn)(struct check *c, struct node *dt); | ||
50 | typedef void (*node_check_fn)(struct check *c, struct node *dt, struct node *node); | ||
51 | typedef void (*prop_check_fn)(struct check *c, struct node *dt, | ||
52 | struct node *node, struct property *prop); | ||
53 | |||
54 | struct check { | ||
55 | const char *name; | ||
56 | tree_check_fn tree_fn; | ||
57 | node_check_fn node_fn; | ||
58 | prop_check_fn prop_fn; | ||
59 | void *data; | ||
60 | enum checklevel level; | ||
61 | enum checkstatus status; | ||
62 | int inprogress; | ||
63 | int num_prereqs; | ||
64 | struct check **prereq; | ||
65 | }; | ||
66 | |||
67 | #define CHECK(nm, tfn, nfn, pfn, d, lvl, ...) \ | ||
68 | static struct check *nm##_prereqs[] = { __VA_ARGS__ }; \ | ||
69 | static struct check nm = { \ | ||
70 | .name = #nm, \ | ||
71 | .tree_fn = (tfn), \ | ||
72 | .node_fn = (nfn), \ | ||
73 | .prop_fn = (pfn), \ | ||
74 | .data = (d), \ | ||
75 | .level = (lvl), \ | ||
76 | .status = UNCHECKED, \ | ||
77 | .num_prereqs = ARRAY_SIZE(nm##_prereqs), \ | ||
78 | .prereq = nm##_prereqs, \ | ||
79 | }; | ||
80 | |||
81 | #define TREE_CHECK(nm, d, lvl, ...) \ | ||
82 | CHECK(nm, check_##nm, NULL, NULL, d, lvl, __VA_ARGS__) | ||
83 | #define NODE_CHECK(nm, d, lvl, ...) \ | ||
84 | CHECK(nm, NULL, check_##nm, NULL, d, lvl, __VA_ARGS__) | ||
85 | #define PROP_CHECK(nm, d, lvl, ...) \ | ||
86 | CHECK(nm, NULL, NULL, check_##nm, d, lvl, __VA_ARGS__) | ||
87 | #define BATCH_CHECK(nm, lvl, ...) \ | ||
88 | CHECK(nm, NULL, NULL, NULL, NULL, lvl, __VA_ARGS__) | ||
89 | |||
90 | #ifdef __GNUC__ | ||
91 | static inline void check_msg(struct check *c, const char *fmt, ...) __attribute__((format (printf, 2, 3))); | ||
92 | #endif | ||
93 | static inline void check_msg(struct check *c, const char *fmt, ...) | ||
94 | { | ||
95 | va_list ap; | ||
96 | va_start(ap, fmt); | ||
97 | |||
98 | if ((c->level < WARN) || (c->level <= quiet)) | ||
99 | return; /* Suppress message */ | ||
100 | |||
101 | fprintf(stderr, "%s (%s): ", | ||
102 | (c->level == ERROR) ? "ERROR" : "Warning", c->name); | ||
103 | vfprintf(stderr, fmt, ap); | ||
104 | fprintf(stderr, "\n"); | ||
105 | } | ||
106 | |||
107 | #define FAIL(c, ...) \ | ||
108 | do { \ | ||
109 | TRACE((c), "\t\tFAILED at %s:%d", __FILE__, __LINE__); \ | ||
110 | (c)->status = FAILED; \ | ||
111 | check_msg((c), __VA_ARGS__); \ | ||
112 | } while (0) | ||
113 | |||
114 | static void check_nodes_props(struct check *c, struct node *dt, struct node *node) | ||
115 | { | ||
116 | struct node *child; | ||
117 | struct property *prop; | ||
118 | |||
119 | TRACE(c, "%s", node->fullpath); | ||
120 | if (c->node_fn) | ||
121 | c->node_fn(c, dt, node); | ||
122 | |||
123 | if (c->prop_fn) | ||
124 | for_each_property(node, prop) { | ||
125 | TRACE(c, "%s\t'%s'", node->fullpath, prop->name); | ||
126 | c->prop_fn(c, dt, node, prop); | ||
127 | } | ||
128 | |||
129 | for_each_child(node, child) | ||
130 | check_nodes_props(c, dt, child); | ||
131 | } | ||
132 | |||
133 | static int run_check(struct check *c, struct node *dt) | ||
134 | { | ||
135 | int error = 0; | ||
136 | int i; | ||
137 | |||
138 | assert(!c->inprogress); | ||
139 | |||
140 | if (c->status != UNCHECKED) | ||
141 | goto out; | ||
142 | |||
143 | c->inprogress = 1; | ||
144 | |||
145 | for (i = 0; i < c->num_prereqs; i++) { | ||
146 | struct check *prq = c->prereq[i]; | ||
147 | error |= run_check(prq, dt); | ||
148 | if (prq->status != PASSED) { | ||
149 | c->status = PREREQ; | ||
150 | check_msg(c, "Failed prerequisite '%s'", | ||
151 | c->prereq[i]->name); | ||
152 | } | ||
153 | } | ||
154 | |||
155 | if (c->status != UNCHECKED) | ||
156 | goto out; | ||
157 | |||
158 | if (c->node_fn || c->prop_fn) | ||
159 | check_nodes_props(c, dt, dt); | ||
160 | |||
161 | if (c->tree_fn) | ||
162 | c->tree_fn(c, dt); | ||
163 | if (c->status == UNCHECKED) | ||
164 | c->status = PASSED; | ||
165 | |||
166 | TRACE(c, "\tCompleted, status %d", c->status); | ||
167 | |||
168 | out: | ||
169 | c->inprogress = 0; | ||
170 | if ((c->status != PASSED) && (c->level == ERROR)) | ||
171 | error = 1; | ||
172 | return error; | ||
173 | } | ||
174 | |||
175 | /* | ||
176 | * Utility check functions | ||
177 | */ | ||
178 | |||
179 | static void check_is_string(struct check *c, struct node *root, | ||
180 | struct node *node) | ||
181 | { | ||
182 | struct property *prop; | ||
183 | char *propname = c->data; | ||
184 | |||
185 | prop = get_property(node, propname); | ||
186 | if (!prop) | ||
187 | return; /* Not present, assumed ok */ | ||
188 | |||
189 | if (!data_is_one_string(prop->val)) | ||
190 | FAIL(c, "\"%s\" property in %s is not a string", | ||
191 | propname, node->fullpath); | ||
192 | } | ||
193 | #define CHECK_IS_STRING(nm, propname, lvl) \ | ||
194 | CHECK(nm, NULL, check_is_string, NULL, (propname), (lvl)) | ||
195 | |||
196 | static void check_is_cell(struct check *c, struct node *root, | ||
197 | struct node *node) | ||
198 | { | ||
199 | struct property *prop; | ||
200 | char *propname = c->data; | ||
201 | |||
202 | prop = get_property(node, propname); | ||
203 | if (!prop) | ||
204 | return; /* Not present, assumed ok */ | ||
205 | |||
206 | if (prop->val.len != sizeof(cell_t)) | ||
207 | FAIL(c, "\"%s\" property in %s is not a single cell", | ||
208 | propname, node->fullpath); | ||
209 | } | ||
210 | #define CHECK_IS_CELL(nm, propname, lvl) \ | ||
211 | CHECK(nm, NULL, check_is_cell, NULL, (propname), (lvl)) | ||
212 | |||
213 | /* | ||
214 | * Structural check functions | ||
215 | */ | ||
216 | |||
217 | static void check_duplicate_node_names(struct check *c, struct node *dt, | ||
218 | struct node *node) | ||
219 | { | ||
220 | struct node *child, *child2; | ||
221 | |||
222 | for_each_child(node, child) | ||
223 | for (child2 = child->next_sibling; | ||
224 | child2; | ||
225 | child2 = child2->next_sibling) | ||
226 | if (streq(child->name, child2->name)) | ||
227 | FAIL(c, "Duplicate node name %s", | ||
228 | child->fullpath); | ||
229 | } | ||
230 | NODE_CHECK(duplicate_node_names, NULL, ERROR); | ||
231 | |||
232 | static void check_duplicate_property_names(struct check *c, struct node *dt, | ||
233 | struct node *node) | ||
234 | { | ||
235 | struct property *prop, *prop2; | ||
236 | |||
237 | for_each_property(node, prop) | ||
238 | for (prop2 = prop->next; prop2; prop2 = prop2->next) | ||
239 | if (streq(prop->name, prop2->name)) | ||
240 | FAIL(c, "Duplicate property name %s in %s", | ||
241 | prop->name, node->fullpath); | ||
242 | } | ||
243 | NODE_CHECK(duplicate_property_names, NULL, ERROR); | ||
244 | |||
245 | #define LOWERCASE "abcdefghijklmnopqrstuvwxyz" | ||
246 | #define UPPERCASE "ABCDEFGHIJKLMNOPQRSTUVWXYZ" | ||
247 | #define DIGITS "0123456789" | ||
248 | #define PROPNODECHARS LOWERCASE UPPERCASE DIGITS ",._+*#?-" | ||
249 | |||
250 | static void check_node_name_chars(struct check *c, struct node *dt, | ||
251 | struct node *node) | ||
252 | { | ||
253 | int n = strspn(node->name, c->data); | ||
254 | |||
255 | if (n < strlen(node->name)) | ||
256 | FAIL(c, "Bad character '%c' in node %s", | ||
257 | node->name[n], node->fullpath); | ||
258 | } | ||
259 | NODE_CHECK(node_name_chars, PROPNODECHARS "@", ERROR); | ||
260 | |||
261 | static void check_node_name_format(struct check *c, struct node *dt, | ||
262 | struct node *node) | ||
263 | { | ||
264 | if (strchr(get_unitname(node), '@')) | ||
265 | FAIL(c, "Node %s has multiple '@' characters in name", | ||
266 | node->fullpath); | ||
267 | } | ||
268 | NODE_CHECK(node_name_format, NULL, ERROR, &node_name_chars); | ||
269 | |||
270 | static void check_property_name_chars(struct check *c, struct node *dt, | ||
271 | struct node *node, struct property *prop) | ||
272 | { | ||
273 | int n = strspn(prop->name, c->data); | ||
274 | |||
275 | if (n < strlen(prop->name)) | ||
276 | FAIL(c, "Bad character '%c' in property name \"%s\", node %s", | ||
277 | prop->name[n], prop->name, node->fullpath); | ||
278 | } | ||
279 | PROP_CHECK(property_name_chars, PROPNODECHARS, ERROR); | ||
280 | |||
281 | static void check_explicit_phandles(struct check *c, struct node *root, | ||
282 | struct node *node) | ||
283 | { | ||
284 | struct property *prop; | ||
285 | struct node *other; | ||
286 | cell_t phandle; | ||
287 | |||
288 | prop = get_property(node, "linux,phandle"); | ||
289 | if (! prop) | ||
290 | return; /* No phandle, that's fine */ | ||
291 | |||
292 | if (prop->val.len != sizeof(cell_t)) { | ||
293 | FAIL(c, "%s has bad length (%d) linux,phandle property", | ||
294 | node->fullpath, prop->val.len); | ||
295 | return; | ||
296 | } | ||
297 | |||
298 | phandle = propval_cell(prop); | ||
299 | if ((phandle == 0) || (phandle == -1)) { | ||
300 | FAIL(c, "%s has invalid linux,phandle value 0x%x", | ||
301 | node->fullpath, phandle); | ||
302 | return; | ||
303 | } | ||
304 | |||
305 | other = get_node_by_phandle(root, phandle); | ||
306 | if (other) { | ||
307 | FAIL(c, "%s has duplicated phandle 0x%x (seen before at %s)", | ||
308 | node->fullpath, phandle, other->fullpath); | ||
309 | return; | ||
310 | } | ||
311 | |||
312 | node->phandle = phandle; | ||
313 | } | ||
314 | NODE_CHECK(explicit_phandles, NULL, ERROR); | ||
315 | |||
316 | static void check_name_properties(struct check *c, struct node *root, | ||
317 | struct node *node) | ||
318 | { | ||
319 | struct property **pp, *prop = NULL; | ||
320 | |||
321 | for (pp = &node->proplist; *pp; pp = &((*pp)->next)) | ||
322 | if (streq((*pp)->name, "name")) { | ||
323 | prop = *pp; | ||
324 | break; | ||
325 | } | ||
326 | |||
327 | if (!prop) | ||
328 | return; /* No name property, that's fine */ | ||
329 | |||
330 | if ((prop->val.len != node->basenamelen+1) | ||
331 | || (memcmp(prop->val.val, node->name, node->basenamelen) != 0)) { | ||
332 | FAIL(c, "\"name\" property in %s is incorrect (\"%s\" instead" | ||
333 | " of base node name)", node->fullpath, prop->val.val); | ||
334 | } else { | ||
335 | /* The name property is correct, and therefore redundant. | ||
336 | * Delete it */ | ||
337 | *pp = prop->next; | ||
338 | free(prop->name); | ||
339 | data_free(prop->val); | ||
340 | free(prop); | ||
341 | } | ||
342 | } | ||
343 | CHECK_IS_STRING(name_is_string, "name", ERROR); | ||
344 | NODE_CHECK(name_properties, NULL, ERROR, &name_is_string); | ||
345 | |||
346 | /* | ||
347 | * Reference fixup functions | ||
348 | */ | ||
349 | |||
350 | static void fixup_phandle_references(struct check *c, struct node *dt, | ||
351 | struct node *node, struct property *prop) | ||
352 | { | ||
353 | struct marker *m = prop->val.markers; | ||
354 | struct node *refnode; | ||
355 | cell_t phandle; | ||
356 | |||
357 | for_each_marker_of_type(m, REF_PHANDLE) { | ||
358 | assert(m->offset + sizeof(cell_t) <= prop->val.len); | ||
359 | |||
360 | refnode = get_node_by_ref(dt, m->ref); | ||
361 | if (! refnode) { | ||
362 | FAIL(c, "Reference to non-existent node or label \"%s\"\n", | ||
363 | m->ref); | ||
364 | continue; | ||
365 | } | ||
366 | |||
367 | phandle = get_node_phandle(dt, refnode); | ||
368 | *((cell_t *)(prop->val.val + m->offset)) = cpu_to_fdt32(phandle); | ||
369 | } | ||
370 | } | ||
371 | CHECK(phandle_references, NULL, NULL, fixup_phandle_references, NULL, ERROR, | ||
372 | &duplicate_node_names, &explicit_phandles); | ||
373 | |||
374 | static void fixup_path_references(struct check *c, struct node *dt, | ||
375 | struct node *node, struct property *prop) | ||
376 | { | ||
377 | struct marker *m = prop->val.markers; | ||
378 | struct node *refnode; | ||
379 | char *path; | ||
380 | |||
381 | for_each_marker_of_type(m, REF_PATH) { | ||
382 | assert(m->offset <= prop->val.len); | ||
383 | |||
384 | refnode = get_node_by_ref(dt, m->ref); | ||
385 | if (!refnode) { | ||
386 | FAIL(c, "Reference to non-existent node or label \"%s\"\n", | ||
387 | m->ref); | ||
388 | continue; | ||
389 | } | ||
390 | |||
391 | path = refnode->fullpath; | ||
392 | prop->val = data_insert_at_marker(prop->val, m, path, | ||
393 | strlen(path) + 1); | ||
394 | } | ||
395 | } | ||
396 | CHECK(path_references, NULL, NULL, fixup_path_references, NULL, ERROR, | ||
397 | &duplicate_node_names); | ||
398 | |||
399 | /* | ||
400 | * Semantic checks | ||
401 | */ | ||
402 | CHECK_IS_CELL(address_cells_is_cell, "#address-cells", WARN); | ||
403 | CHECK_IS_CELL(size_cells_is_cell, "#size-cells", WARN); | ||
404 | CHECK_IS_CELL(interrupt_cells_is_cell, "#interrupt-cells", WARN); | ||
405 | |||
406 | CHECK_IS_STRING(device_type_is_string, "device_type", WARN); | ||
407 | CHECK_IS_STRING(model_is_string, "model", WARN); | ||
408 | CHECK_IS_STRING(status_is_string, "status", WARN); | ||
409 | |||
410 | static void fixup_addr_size_cells(struct check *c, struct node *dt, | ||
411 | struct node *node) | ||
412 | { | ||
413 | struct property *prop; | ||
414 | |||
415 | node->addr_cells = -1; | ||
416 | node->size_cells = -1; | ||
417 | |||
418 | prop = get_property(node, "#address-cells"); | ||
419 | if (prop) | ||
420 | node->addr_cells = propval_cell(prop); | ||
421 | |||
422 | prop = get_property(node, "#size-cells"); | ||
423 | if (prop) | ||
424 | node->size_cells = propval_cell(prop); | ||
425 | } | ||
426 | CHECK(addr_size_cells, NULL, fixup_addr_size_cells, NULL, NULL, WARN, | ||
427 | &address_cells_is_cell, &size_cells_is_cell); | ||
428 | |||
429 | #define node_addr_cells(n) \ | ||
430 | (((n)->addr_cells == -1) ? 2 : (n)->addr_cells) | ||
431 | #define node_size_cells(n) \ | ||
432 | (((n)->size_cells == -1) ? 1 : (n)->size_cells) | ||
433 | |||
434 | static void check_reg_format(struct check *c, struct node *dt, | ||
435 | struct node *node) | ||
436 | { | ||
437 | struct property *prop; | ||
438 | int addr_cells, size_cells, entrylen; | ||
439 | |||
440 | prop = get_property(node, "reg"); | ||
441 | if (!prop) | ||
442 | return; /* No "reg", that's fine */ | ||
443 | |||
444 | if (!node->parent) { | ||
445 | FAIL(c, "Root node has a \"reg\" property"); | ||
446 | return; | ||
447 | } | ||
448 | |||
449 | if (prop->val.len == 0) | ||
450 | FAIL(c, "\"reg\" property in %s is empty", node->fullpath); | ||
451 | |||
452 | addr_cells = node_addr_cells(node->parent); | ||
453 | size_cells = node_size_cells(node->parent); | ||
454 | entrylen = (addr_cells + size_cells) * sizeof(cell_t); | ||
455 | |||
456 | if ((prop->val.len % entrylen) != 0) | ||
457 | FAIL(c, "\"reg\" property in %s has invalid length (%d bytes) " | ||
458 | "(#address-cells == %d, #size-cells == %d)", | ||
459 | node->fullpath, prop->val.len, addr_cells, size_cells); | ||
460 | } | ||
461 | NODE_CHECK(reg_format, NULL, WARN, &addr_size_cells); | ||
462 | |||
463 | static void check_ranges_format(struct check *c, struct node *dt, | ||
464 | struct node *node) | ||
465 | { | ||
466 | struct property *prop; | ||
467 | int c_addr_cells, p_addr_cells, c_size_cells, p_size_cells, entrylen; | ||
468 | |||
469 | prop = get_property(node, "ranges"); | ||
470 | if (!prop) | ||
471 | return; | ||
472 | |||
473 | if (!node->parent) { | ||
474 | FAIL(c, "Root node has a \"ranges\" property"); | ||
475 | return; | ||
476 | } | ||
477 | |||
478 | p_addr_cells = node_addr_cells(node->parent); | ||
479 | p_size_cells = node_size_cells(node->parent); | ||
480 | c_addr_cells = node_addr_cells(node); | ||
481 | c_size_cells = node_size_cells(node); | ||
482 | entrylen = (p_addr_cells + c_addr_cells + c_size_cells) * sizeof(cell_t); | ||
483 | |||
484 | if (prop->val.len == 0) { | ||
485 | if (p_addr_cells != c_addr_cells) | ||
486 | FAIL(c, "%s has empty \"ranges\" property but its " | ||
487 | "#address-cells (%d) differs from %s (%d)", | ||
488 | node->fullpath, c_addr_cells, node->parent->fullpath, | ||
489 | p_addr_cells); | ||
490 | if (p_size_cells != c_size_cells) | ||
491 | FAIL(c, "%s has empty \"ranges\" property but its " | ||
492 | "#size-cells (%d) differs from %s (%d)", | ||
493 | node->fullpath, c_size_cells, node->parent->fullpath, | ||
494 | p_size_cells); | ||
495 | } else if ((prop->val.len % entrylen) != 0) { | ||
496 | FAIL(c, "\"ranges\" property in %s has invalid length (%d bytes) " | ||
497 | "(parent #address-cells == %d, child #address-cells == %d, " | ||
498 | "#size-cells == %d)", node->fullpath, prop->val.len, | ||
499 | p_addr_cells, c_addr_cells, c_size_cells); | ||
500 | } | ||
501 | } | ||
502 | NODE_CHECK(ranges_format, NULL, WARN, &addr_size_cells); | ||
503 | |||
504 | /* | ||
505 | * Style checks | ||
506 | */ | ||
507 | static void check_avoid_default_addr_size(struct check *c, struct node *dt, | ||
508 | struct node *node) | ||
509 | { | ||
510 | struct property *reg, *ranges; | ||
511 | |||
512 | if (!node->parent) | ||
513 | return; /* Ignore root node */ | ||
514 | |||
515 | reg = get_property(node, "reg"); | ||
516 | ranges = get_property(node, "ranges"); | ||
517 | |||
518 | if (!reg && !ranges) | ||
519 | return; | ||
520 | |||
521 | if ((node->parent->addr_cells == -1)) | ||
522 | FAIL(c, "Relying on default #address-cells value for %s", | ||
523 | node->fullpath); | ||
524 | |||
525 | if ((node->parent->size_cells == -1)) | ||
526 | FAIL(c, "Relying on default #size-cells value for %s", | ||
527 | node->fullpath); | ||
528 | } | ||
529 | NODE_CHECK(avoid_default_addr_size, NULL, WARN, &addr_size_cells); | ||
530 | |||
531 | static void check_obsolete_chosen_interrupt_controller(struct check *c, | ||
532 | struct node *dt) | ||
533 | { | ||
534 | struct node *chosen; | ||
535 | struct property *prop; | ||
536 | |||
537 | chosen = get_node_by_path(dt, "/chosen"); | ||
538 | if (!chosen) | ||
539 | return; | ||
540 | |||
541 | prop = get_property(chosen, "interrupt-controller"); | ||
542 | if (prop) | ||
543 | FAIL(c, "/chosen has obsolete \"interrupt-controller\" " | ||
544 | "property"); | ||
545 | } | ||
546 | TREE_CHECK(obsolete_chosen_interrupt_controller, NULL, WARN); | ||
547 | |||
548 | static struct check *check_table[] = { | ||
549 | &duplicate_node_names, &duplicate_property_names, | ||
550 | &node_name_chars, &node_name_format, &property_name_chars, | ||
551 | &name_is_string, &name_properties, | ||
552 | &explicit_phandles, | ||
553 | &phandle_references, &path_references, | ||
554 | |||
555 | &address_cells_is_cell, &size_cells_is_cell, &interrupt_cells_is_cell, | ||
556 | &device_type_is_string, &model_is_string, &status_is_string, | ||
557 | |||
558 | &addr_size_cells, ®_format, &ranges_format, | ||
559 | |||
560 | &avoid_default_addr_size, | ||
561 | &obsolete_chosen_interrupt_controller, | ||
562 | }; | ||
563 | |||
564 | void process_checks(int force, struct boot_info *bi) | ||
565 | { | ||
566 | struct node *dt = bi->dt; | ||
567 | int i; | ||
568 | int error = 0; | ||
569 | |||
570 | for (i = 0; i < ARRAY_SIZE(check_table); i++) { | ||
571 | struct check *c = check_table[i]; | ||
572 | |||
573 | if (c->level != IGNORE) | ||
574 | error = error || run_check(c, dt); | ||
575 | } | ||
576 | |||
577 | if (error) { | ||
578 | if (!force) { | ||
579 | fprintf(stderr, "ERROR: Input tree has errors, aborting " | ||
580 | "(use -f to force output)\n"); | ||
581 | exit(2); | ||
582 | } else if (quiet < 3) { | ||
583 | fprintf(stderr, "Warning: Input tree has errors, " | ||
584 | "output forced\n"); | ||
585 | } | ||
586 | } | ||
587 | } | ||
diff --git a/arch/powerpc/boot/dtc-src/data.c b/arch/powerpc/boot/dtc-src/data.c deleted file mode 100644 index dd2e3d39d4c1..000000000000 --- a/arch/powerpc/boot/dtc-src/data.c +++ /dev/null | |||
@@ -1,321 +0,0 @@ | |||
1 | /* | ||
2 | * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation. 2005. | ||
3 | * | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or | ||
6 | * modify it under the terms of the GNU General Public License as | ||
7 | * published by the Free Software Foundation; either version 2 of the | ||
8 | * License, or (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
13 | * General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 | ||
18 | * USA | ||
19 | */ | ||
20 | |||
21 | #include "dtc.h" | ||
22 | |||
23 | void data_free(struct data d) | ||
24 | { | ||
25 | struct marker *m, *nm; | ||
26 | |||
27 | m = d.markers; | ||
28 | while (m) { | ||
29 | nm = m->next; | ||
30 | free(m->ref); | ||
31 | free(m); | ||
32 | m = nm; | ||
33 | } | ||
34 | |||
35 | if (d.val) | ||
36 | free(d.val); | ||
37 | } | ||
38 | |||
39 | struct data data_grow_for(struct data d, int xlen) | ||
40 | { | ||
41 | struct data nd; | ||
42 | int newsize; | ||
43 | |||
44 | if (xlen == 0) | ||
45 | return d; | ||
46 | |||
47 | nd = d; | ||
48 | |||
49 | newsize = xlen; | ||
50 | |||
51 | while ((d.len + xlen) > newsize) | ||
52 | newsize *= 2; | ||
53 | |||
54 | nd.val = xrealloc(d.val, newsize); | ||
55 | |||
56 | return nd; | ||
57 | } | ||
58 | |||
59 | struct data data_copy_mem(const char *mem, int len) | ||
60 | { | ||
61 | struct data d; | ||
62 | |||
63 | d = data_grow_for(empty_data, len); | ||
64 | |||
65 | d.len = len; | ||
66 | memcpy(d.val, mem, len); | ||
67 | |||
68 | return d; | ||
69 | } | ||
70 | |||
71 | static char get_oct_char(const char *s, int *i) | ||
72 | { | ||
73 | char x[4]; | ||
74 | char *endx; | ||
75 | long val; | ||
76 | |||
77 | x[3] = '\0'; | ||
78 | strncpy(x, s + *i, 3); | ||
79 | |||
80 | val = strtol(x, &endx, 8); | ||
81 | |||
82 | assert(endx > x); | ||
83 | |||
84 | (*i) += endx - x; | ||
85 | return val; | ||
86 | } | ||
87 | |||
88 | static char get_hex_char(const char *s, int *i) | ||
89 | { | ||
90 | char x[3]; | ||
91 | char *endx; | ||
92 | long val; | ||
93 | |||
94 | x[2] = '\0'; | ||
95 | strncpy(x, s + *i, 2); | ||
96 | |||
97 | val = strtol(x, &endx, 16); | ||
98 | if (!(endx > x)) | ||
99 | die("\\x used with no following hex digits\n"); | ||
100 | |||
101 | (*i) += endx - x; | ||
102 | return val; | ||
103 | } | ||
104 | |||
105 | struct data data_copy_escape_string(const char *s, int len) | ||
106 | { | ||
107 | int i = 0; | ||
108 | struct data d; | ||
109 | char *q; | ||
110 | |||
111 | d = data_grow_for(empty_data, strlen(s)+1); | ||
112 | |||
113 | q = d.val; | ||
114 | while (i < len) { | ||
115 | char c = s[i++]; | ||
116 | |||
117 | if (c != '\\') { | ||
118 | q[d.len++] = c; | ||
119 | continue; | ||
120 | } | ||
121 | |||
122 | c = s[i++]; | ||
123 | assert(c); | ||
124 | switch (c) { | ||
125 | case 'a': | ||
126 | q[d.len++] = '\a'; | ||
127 | break; | ||
128 | case 'b': | ||
129 | q[d.len++] = '\b'; | ||
130 | break; | ||
131 | case 't': | ||
132 | q[d.len++] = '\t'; | ||
133 | break; | ||
134 | case 'n': | ||
135 | q[d.len++] = '\n'; | ||
136 | break; | ||
137 | case 'v': | ||
138 | q[d.len++] = '\v'; | ||
139 | break; | ||
140 | case 'f': | ||
141 | q[d.len++] = '\f'; | ||
142 | break; | ||
143 | case 'r': | ||
144 | q[d.len++] = '\r'; | ||
145 | break; | ||
146 | case '0': | ||
147 | case '1': | ||
148 | case '2': | ||
149 | case '3': | ||
150 | case '4': | ||
151 | case '5': | ||
152 | case '6': | ||
153 | case '7': | ||
154 | i--; /* need to re-read the first digit as | ||
155 | * part of the octal value */ | ||
156 | q[d.len++] = get_oct_char(s, &i); | ||
157 | break; | ||
158 | case 'x': | ||
159 | q[d.len++] = get_hex_char(s, &i); | ||
160 | break; | ||
161 | default: | ||
162 | q[d.len++] = c; | ||
163 | } | ||
164 | } | ||
165 | |||
166 | q[d.len++] = '\0'; | ||
167 | return d; | ||
168 | } | ||
169 | |||
170 | struct data data_copy_file(FILE *f, size_t maxlen) | ||
171 | { | ||
172 | struct data d = empty_data; | ||
173 | |||
174 | while (!feof(f) && (d.len < maxlen)) { | ||
175 | size_t chunksize, ret; | ||
176 | |||
177 | if (maxlen == -1) | ||
178 | chunksize = 4096; | ||
179 | else | ||
180 | chunksize = maxlen - d.len; | ||
181 | |||
182 | d = data_grow_for(d, chunksize); | ||
183 | ret = fread(d.val + d.len, 1, chunksize, f); | ||
184 | |||
185 | if (ferror(f)) | ||
186 | die("Error reading file into data: %s", strerror(errno)); | ||
187 | |||
188 | if (d.len + ret < d.len) | ||
189 | die("Overflow reading file into data\n"); | ||
190 | |||
191 | d.len += ret; | ||
192 | } | ||
193 | |||
194 | return d; | ||
195 | } | ||
196 | |||
197 | struct data data_append_data(struct data d, const void *p, int len) | ||
198 | { | ||
199 | d = data_grow_for(d, len); | ||
200 | memcpy(d.val + d.len, p, len); | ||
201 | d.len += len; | ||
202 | return d; | ||
203 | } | ||
204 | |||
205 | struct data data_insert_at_marker(struct data d, struct marker *m, | ||
206 | const void *p, int len) | ||
207 | { | ||
208 | d = data_grow_for(d, len); | ||
209 | memmove(d.val + m->offset + len, d.val + m->offset, d.len - m->offset); | ||
210 | memcpy(d.val + m->offset, p, len); | ||
211 | d.len += len; | ||
212 | |||
213 | /* Adjust all markers after the one we're inserting at */ | ||
214 | m = m->next; | ||
215 | for_each_marker(m) | ||
216 | m->offset += len; | ||
217 | return d; | ||
218 | } | ||
219 | |||
220 | struct data data_append_markers(struct data d, struct marker *m) | ||
221 | { | ||
222 | struct marker **mp = &d.markers; | ||
223 | |||
224 | /* Find the end of the markerlist */ | ||
225 | while (*mp) | ||
226 | mp = &((*mp)->next); | ||
227 | *mp = m; | ||
228 | return d; | ||
229 | } | ||
230 | |||
231 | struct data data_merge(struct data d1, struct data d2) | ||
232 | { | ||
233 | struct data d; | ||
234 | struct marker *m2 = d2.markers; | ||
235 | |||
236 | d = data_append_markers(data_append_data(d1, d2.val, d2.len), m2); | ||
237 | |||
238 | /* Adjust for the length of d1 */ | ||
239 | for_each_marker(m2) | ||
240 | m2->offset += d1.len; | ||
241 | |||
242 | d2.markers = NULL; /* So data_free() doesn't clobber them */ | ||
243 | data_free(d2); | ||
244 | |||
245 | return d; | ||
246 | } | ||
247 | |||
248 | struct data data_append_cell(struct data d, cell_t word) | ||
249 | { | ||
250 | cell_t beword = cpu_to_fdt32(word); | ||
251 | |||
252 | return data_append_data(d, &beword, sizeof(beword)); | ||
253 | } | ||
254 | |||
255 | struct data data_append_re(struct data d, const struct fdt_reserve_entry *re) | ||
256 | { | ||
257 | struct fdt_reserve_entry bere; | ||
258 | |||
259 | bere.address = cpu_to_fdt64(re->address); | ||
260 | bere.size = cpu_to_fdt64(re->size); | ||
261 | |||
262 | return data_append_data(d, &bere, sizeof(bere)); | ||
263 | } | ||
264 | |||
265 | struct data data_append_addr(struct data d, uint64_t addr) | ||
266 | { | ||
267 | uint64_t beaddr = cpu_to_fdt64(addr); | ||
268 | |||
269 | return data_append_data(d, &beaddr, sizeof(beaddr)); | ||
270 | } | ||
271 | |||
272 | struct data data_append_byte(struct data d, uint8_t byte) | ||
273 | { | ||
274 | return data_append_data(d, &byte, 1); | ||
275 | } | ||
276 | |||
277 | struct data data_append_zeroes(struct data d, int len) | ||
278 | { | ||
279 | d = data_grow_for(d, len); | ||
280 | |||
281 | memset(d.val + d.len, 0, len); | ||
282 | d.len += len; | ||
283 | return d; | ||
284 | } | ||
285 | |||
286 | struct data data_append_align(struct data d, int align) | ||
287 | { | ||
288 | int newlen = ALIGN(d.len, align); | ||
289 | return data_append_zeroes(d, newlen - d.len); | ||
290 | } | ||
291 | |||
292 | struct data data_add_marker(struct data d, enum markertype type, char *ref) | ||
293 | { | ||
294 | struct marker *m; | ||
295 | |||
296 | m = xmalloc(sizeof(*m)); | ||
297 | m->offset = d.len; | ||
298 | m->type = type; | ||
299 | m->ref = ref; | ||
300 | m->next = NULL; | ||
301 | |||
302 | return data_append_markers(d, m); | ||
303 | } | ||
304 | |||
305 | int data_is_one_string(struct data d) | ||
306 | { | ||
307 | int i; | ||
308 | int len = d.len; | ||
309 | |||
310 | if (len == 0) | ||
311 | return 0; | ||
312 | |||
313 | for (i = 0; i < len-1; i++) | ||
314 | if (d.val[i] == '\0') | ||
315 | return 0; | ||
316 | |||
317 | if (d.val[len-1] != '\0') | ||
318 | return 0; | ||
319 | |||
320 | return 1; | ||
321 | } | ||
diff --git a/arch/powerpc/boot/dtc-src/dtc-lexer.l b/arch/powerpc/boot/dtc-src/dtc-lexer.l deleted file mode 100644 index 44dbfd3f0976..000000000000 --- a/arch/powerpc/boot/dtc-src/dtc-lexer.l +++ /dev/null | |||
@@ -1,320 +0,0 @@ | |||
1 | /* | ||
2 | * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation. 2005. | ||
3 | * | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or | ||
6 | * modify it under the terms of the GNU General Public License as | ||
7 | * published by the Free Software Foundation; either version 2 of the | ||
8 | * License, or (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
13 | * General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 | ||
18 | * USA | ||
19 | */ | ||
20 | |||
21 | %option noyywrap nounput yylineno | ||
22 | |||
23 | %x INCLUDE | ||
24 | %x BYTESTRING | ||
25 | %x PROPNODENAME | ||
26 | %s V1 | ||
27 | |||
28 | PROPNODECHAR [a-zA-Z0-9,._+*#?@-] | ||
29 | PATHCHAR ({PROPNODECHAR}|[/]) | ||
30 | LABEL [a-zA-Z_][a-zA-Z0-9_]* | ||
31 | STRING \"([^\\"]|\\.)*\" | ||
32 | WS [[:space:]] | ||
33 | COMMENT "/*"([^*]|\*+[^*/])*\*+"/" | ||
34 | LINECOMMENT "//".*\n | ||
35 | |||
36 | %{ | ||
37 | #include "dtc.h" | ||
38 | #include "srcpos.h" | ||
39 | #include "dtc-parser.tab.h" | ||
40 | |||
41 | |||
42 | /*#define LEXDEBUG 1*/ | ||
43 | |||
44 | #ifdef LEXDEBUG | ||
45 | #define DPRINT(fmt, ...) fprintf(stderr, fmt, ##__VA_ARGS__) | ||
46 | #else | ||
47 | #define DPRINT(fmt, ...) do { } while (0) | ||
48 | #endif | ||
49 | |||
50 | static int dts_version; /* = 0 */ | ||
51 | |||
52 | #define BEGIN_DEFAULT() if (dts_version == 0) { \ | ||
53 | DPRINT("<INITIAL>\n"); \ | ||
54 | BEGIN(INITIAL); \ | ||
55 | } else { \ | ||
56 | DPRINT("<V1>\n"); \ | ||
57 | BEGIN(V1); \ | ||
58 | } | ||
59 | |||
60 | static void push_input_file(const char *filename); | ||
61 | static int pop_input_file(void); | ||
62 | %} | ||
63 | |||
64 | %% | ||
65 | <*>"/include/"{WS}*{STRING} { | ||
66 | char *name = strchr(yytext, '\"') + 1; | ||
67 | yytext[yyleng-1] = '\0'; | ||
68 | push_input_file(name); | ||
69 | } | ||
70 | |||
71 | <*><<EOF>> { | ||
72 | if (!pop_input_file()) { | ||
73 | yyterminate(); | ||
74 | } | ||
75 | } | ||
76 | |||
77 | <*>{STRING} { | ||
78 | yylloc.file = srcpos_file; | ||
79 | yylloc.first_line = yylineno; | ||
80 | DPRINT("String: %s\n", yytext); | ||
81 | yylval.data = data_copy_escape_string(yytext+1, | ||
82 | yyleng-2); | ||
83 | yylloc.first_line = yylineno; | ||
84 | return DT_STRING; | ||
85 | } | ||
86 | |||
87 | <*>"/dts-v1/" { | ||
88 | yylloc.file = srcpos_file; | ||
89 | yylloc.first_line = yylineno; | ||
90 | DPRINT("Keyword: /dts-v1/\n"); | ||
91 | dts_version = 1; | ||
92 | BEGIN_DEFAULT(); | ||
93 | return DT_V1; | ||
94 | } | ||
95 | |||
96 | <*>"/memreserve/" { | ||
97 | yylloc.file = srcpos_file; | ||
98 | yylloc.first_line = yylineno; | ||
99 | DPRINT("Keyword: /memreserve/\n"); | ||
100 | BEGIN_DEFAULT(); | ||
101 | return DT_MEMRESERVE; | ||
102 | } | ||
103 | |||
104 | <*>{LABEL}: { | ||
105 | yylloc.file = srcpos_file; | ||
106 | yylloc.first_line = yylineno; | ||
107 | DPRINT("Label: %s\n", yytext); | ||
108 | yylval.labelref = strdup(yytext); | ||
109 | yylval.labelref[yyleng-1] = '\0'; | ||
110 | return DT_LABEL; | ||
111 | } | ||
112 | |||
113 | <INITIAL>[bodh]# { | ||
114 | yylloc.file = srcpos_file; | ||
115 | yylloc.first_line = yylineno; | ||
116 | if (*yytext == 'b') | ||
117 | yylval.cbase = 2; | ||
118 | else if (*yytext == 'o') | ||
119 | yylval.cbase = 8; | ||
120 | else if (*yytext == 'd') | ||
121 | yylval.cbase = 10; | ||
122 | else | ||
123 | yylval.cbase = 16; | ||
124 | DPRINT("Base: %d\n", yylval.cbase); | ||
125 | return DT_BASE; | ||
126 | } | ||
127 | |||
128 | <INITIAL>[0-9a-fA-F]+ { | ||
129 | yylloc.file = srcpos_file; | ||
130 | yylloc.first_line = yylineno; | ||
131 | yylval.literal = strdup(yytext); | ||
132 | DPRINT("Literal: '%s'\n", yylval.literal); | ||
133 | return DT_LEGACYLITERAL; | ||
134 | } | ||
135 | |||
136 | <V1>[0-9]+|0[xX][0-9a-fA-F]+ { | ||
137 | yylloc.file = srcpos_file; | ||
138 | yylloc.first_line = yylineno; | ||
139 | yylval.literal = strdup(yytext); | ||
140 | DPRINT("Literal: '%s'\n", yylval.literal); | ||
141 | return DT_LITERAL; | ||
142 | } | ||
143 | |||
144 | \&{LABEL} { /* label reference */ | ||
145 | yylloc.file = srcpos_file; | ||
146 | yylloc.first_line = yylineno; | ||
147 | DPRINT("Ref: %s\n", yytext+1); | ||
148 | yylval.labelref = strdup(yytext+1); | ||
149 | return DT_REF; | ||
150 | } | ||
151 | |||
152 | "&{/"{PATHCHAR}+\} { /* new-style path reference */ | ||
153 | yylloc.file = srcpos_file; | ||
154 | yylloc.first_line = yylineno; | ||
155 | yytext[yyleng-1] = '\0'; | ||
156 | DPRINT("Ref: %s\n", yytext+2); | ||
157 | yylval.labelref = strdup(yytext+2); | ||
158 | return DT_REF; | ||
159 | } | ||
160 | |||
161 | <INITIAL>"&/"{PATHCHAR}+ { /* old-style path reference */ | ||
162 | yylloc.file = srcpos_file; | ||
163 | yylloc.first_line = yylineno; | ||
164 | DPRINT("Ref: %s\n", yytext+1); | ||
165 | yylval.labelref = strdup(yytext+1); | ||
166 | return DT_REF; | ||
167 | } | ||
168 | |||
169 | <BYTESTRING>[0-9a-fA-F]{2} { | ||
170 | yylloc.file = srcpos_file; | ||
171 | yylloc.first_line = yylineno; | ||
172 | yylval.byte = strtol(yytext, NULL, 16); | ||
173 | DPRINT("Byte: %02x\n", (int)yylval.byte); | ||
174 | return DT_BYTE; | ||
175 | } | ||
176 | |||
177 | <BYTESTRING>"]" { | ||
178 | yylloc.file = srcpos_file; | ||
179 | yylloc.first_line = yylineno; | ||
180 | DPRINT("/BYTESTRING\n"); | ||
181 | BEGIN_DEFAULT(); | ||
182 | return ']'; | ||
183 | } | ||
184 | |||
185 | <PROPNODENAME>{PROPNODECHAR}+ { | ||
186 | yylloc.file = srcpos_file; | ||
187 | yylloc.first_line = yylineno; | ||
188 | DPRINT("PropNodeName: %s\n", yytext); | ||
189 | yylval.propnodename = strdup(yytext); | ||
190 | BEGIN_DEFAULT(); | ||
191 | return DT_PROPNODENAME; | ||
192 | } | ||
193 | |||
194 | "/incbin/" { | ||
195 | yylloc.file = srcpos_file; | ||
196 | yylloc.first_line = yylineno; | ||
197 | DPRINT("Binary Include\n"); | ||
198 | return DT_INCBIN; | ||
199 | } | ||
200 | |||
201 | <*>{WS}+ /* eat whitespace */ | ||
202 | <*>{COMMENT}+ /* eat C-style comments */ | ||
203 | <*>{LINECOMMENT}+ /* eat C++-style comments */ | ||
204 | |||
205 | <*>. { | ||
206 | yylloc.file = srcpos_file; | ||
207 | yylloc.first_line = yylineno; | ||
208 | DPRINT("Char: %c (\\x%02x)\n", yytext[0], | ||
209 | (unsigned)yytext[0]); | ||
210 | if (yytext[0] == '[') { | ||
211 | DPRINT("<BYTESTRING>\n"); | ||
212 | BEGIN(BYTESTRING); | ||
213 | } | ||
214 | if ((yytext[0] == '{') | ||
215 | || (yytext[0] == ';')) { | ||
216 | DPRINT("<PROPNODENAME>\n"); | ||
217 | BEGIN(PROPNODENAME); | ||
218 | } | ||
219 | return yytext[0]; | ||
220 | } | ||
221 | |||
222 | %% | ||
223 | |||
224 | |||
225 | /* | ||
226 | * Stack of nested include file contexts. | ||
227 | */ | ||
228 | |||
229 | struct incl_file { | ||
230 | struct dtc_file *file; | ||
231 | YY_BUFFER_STATE yy_prev_buf; | ||
232 | int yy_prev_lineno; | ||
233 | struct incl_file *prev; | ||
234 | }; | ||
235 | |||
236 | static struct incl_file *incl_file_stack; | ||
237 | |||
238 | |||
239 | /* | ||
240 | * Detect infinite include recursion. | ||
241 | */ | ||
242 | #define MAX_INCLUDE_DEPTH (100) | ||
243 | |||
244 | static int incl_depth = 0; | ||
245 | |||
246 | |||
247 | static void push_input_file(const char *filename) | ||
248 | { | ||
249 | struct incl_file *incl_file; | ||
250 | struct dtc_file *newfile; | ||
251 | struct search_path search, *searchptr = NULL; | ||
252 | |||
253 | assert(filename); | ||
254 | |||
255 | if (incl_depth++ >= MAX_INCLUDE_DEPTH) | ||
256 | die("Includes nested too deeply"); | ||
257 | |||
258 | if (srcpos_file) { | ||
259 | search.dir = srcpos_file->dir; | ||
260 | search.next = NULL; | ||
261 | search.prev = NULL; | ||
262 | searchptr = &search; | ||
263 | } | ||
264 | |||
265 | newfile = dtc_open_file(filename, searchptr); | ||
266 | |||
267 | incl_file = xmalloc(sizeof(struct incl_file)); | ||
268 | |||
269 | /* | ||
270 | * Save current context. | ||
271 | */ | ||
272 | incl_file->yy_prev_buf = YY_CURRENT_BUFFER; | ||
273 | incl_file->yy_prev_lineno = yylineno; | ||
274 | incl_file->file = srcpos_file; | ||
275 | incl_file->prev = incl_file_stack; | ||
276 | |||
277 | incl_file_stack = incl_file; | ||
278 | |||
279 | /* | ||
280 | * Establish new context. | ||
281 | */ | ||
282 | srcpos_file = newfile; | ||
283 | yylineno = 1; | ||
284 | yyin = newfile->file; | ||
285 | yy_switch_to_buffer(yy_create_buffer(yyin, YY_BUF_SIZE)); | ||
286 | } | ||
287 | |||
288 | |||
289 | static int pop_input_file(void) | ||
290 | { | ||
291 | struct incl_file *incl_file; | ||
292 | |||
293 | if (incl_file_stack == 0) | ||
294 | return 0; | ||
295 | |||
296 | dtc_close_file(srcpos_file); | ||
297 | |||
298 | /* | ||
299 | * Pop. | ||
300 | */ | ||
301 | --incl_depth; | ||
302 | incl_file = incl_file_stack; | ||
303 | incl_file_stack = incl_file->prev; | ||
304 | |||
305 | /* | ||
306 | * Recover old context. | ||
307 | */ | ||
308 | yy_delete_buffer(YY_CURRENT_BUFFER); | ||
309 | yy_switch_to_buffer(incl_file->yy_prev_buf); | ||
310 | yylineno = incl_file->yy_prev_lineno; | ||
311 | srcpos_file = incl_file->file; | ||
312 | yyin = incl_file->file ? incl_file->file->file : NULL; | ||
313 | |||
314 | /* | ||
315 | * Free old state. | ||
316 | */ | ||
317 | free(incl_file); | ||
318 | |||
319 | return 1; | ||
320 | } | ||
diff --git a/arch/powerpc/boot/dtc-src/dtc-lexer.lex.c_shipped b/arch/powerpc/boot/dtc-src/dtc-lexer.lex.c_shipped deleted file mode 100644 index ac392cb040f6..000000000000 --- a/arch/powerpc/boot/dtc-src/dtc-lexer.lex.c_shipped +++ /dev/null | |||
@@ -1,2187 +0,0 @@ | |||
1 | #line 2 "dtc-lexer.lex.c" | ||
2 | |||
3 | #line 4 "dtc-lexer.lex.c" | ||
4 | |||
5 | #define YY_INT_ALIGNED short int | ||
6 | |||
7 | /* A lexical scanner generated by flex */ | ||
8 | |||
9 | #define FLEX_SCANNER | ||
10 | #define YY_FLEX_MAJOR_VERSION 2 | ||
11 | #define YY_FLEX_MINOR_VERSION 5 | ||
12 | #define YY_FLEX_SUBMINOR_VERSION 34 | ||
13 | #if YY_FLEX_SUBMINOR_VERSION > 0 | ||
14 | #define FLEX_BETA | ||
15 | #endif | ||
16 | |||
17 | /* First, we deal with platform-specific or compiler-specific issues. */ | ||
18 | |||
19 | /* begin standard C headers. */ | ||
20 | #include <stdio.h> | ||
21 | #include <string.h> | ||
22 | #include <errno.h> | ||
23 | #include <stdlib.h> | ||
24 | |||
25 | /* end standard C headers. */ | ||
26 | |||
27 | /* flex integer type definitions */ | ||
28 | |||
29 | #ifndef FLEXINT_H | ||
30 | #define FLEXINT_H | ||
31 | |||
32 | /* C99 systems have <inttypes.h>. Non-C99 systems may or may not. */ | ||
33 | |||
34 | #if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L | ||
35 | |||
36 | /* C99 says to define __STDC_LIMIT_MACROS before including stdint.h, | ||
37 | * if you want the limit (max/min) macros for int types. | ||
38 | */ | ||
39 | #ifndef __STDC_LIMIT_MACROS | ||
40 | #define __STDC_LIMIT_MACROS 1 | ||
41 | #endif | ||
42 | |||
43 | #include <inttypes.h> | ||
44 | typedef int8_t flex_int8_t; | ||
45 | typedef uint8_t flex_uint8_t; | ||
46 | typedef int16_t flex_int16_t; | ||
47 | typedef uint16_t flex_uint16_t; | ||
48 | typedef int32_t flex_int32_t; | ||
49 | typedef uint32_t flex_uint32_t; | ||
50 | #else | ||
51 | typedef signed char flex_int8_t; | ||
52 | typedef short int flex_int16_t; | ||
53 | typedef int flex_int32_t; | ||
54 | typedef unsigned char flex_uint8_t; | ||
55 | typedef unsigned short int flex_uint16_t; | ||
56 | typedef unsigned int flex_uint32_t; | ||
57 | #endif /* ! C99 */ | ||
58 | |||
59 | /* Limits of integral types. */ | ||
60 | #ifndef INT8_MIN | ||
61 | #define INT8_MIN (-128) | ||
62 | #endif | ||
63 | #ifndef INT16_MIN | ||
64 | #define INT16_MIN (-32767-1) | ||
65 | #endif | ||
66 | #ifndef INT32_MIN | ||
67 | #define INT32_MIN (-2147483647-1) | ||
68 | #endif | ||
69 | #ifndef INT8_MAX | ||
70 | #define INT8_MAX (127) | ||
71 | #endif | ||
72 | #ifndef INT16_MAX | ||
73 | #define INT16_MAX (32767) | ||
74 | #endif | ||
75 | #ifndef INT32_MAX | ||
76 | #define INT32_MAX (2147483647) | ||
77 | #endif | ||
78 | #ifndef UINT8_MAX | ||
79 | #define UINT8_MAX (255U) | ||
80 | #endif | ||
81 | #ifndef UINT16_MAX | ||
82 | #define UINT16_MAX (65535U) | ||
83 | #endif | ||
84 | #ifndef UINT32_MAX | ||
85 | #define UINT32_MAX (4294967295U) | ||
86 | #endif | ||
87 | |||
88 | #endif /* ! FLEXINT_H */ | ||
89 | |||
90 | #ifdef __cplusplus | ||
91 | |||
92 | /* The "const" storage-class-modifier is valid. */ | ||
93 | #define YY_USE_CONST | ||
94 | |||
95 | #else /* ! __cplusplus */ | ||
96 | |||
97 | /* C99 requires __STDC__ to be defined as 1. */ | ||
98 | #if defined (__STDC__) | ||
99 | |||
100 | #define YY_USE_CONST | ||
101 | |||
102 | #endif /* defined (__STDC__) */ | ||
103 | #endif /* ! __cplusplus */ | ||
104 | |||
105 | #ifdef YY_USE_CONST | ||
106 | #define yyconst const | ||
107 | #else | ||
108 | #define yyconst | ||
109 | #endif | ||
110 | |||
111 | /* Returned upon end-of-file. */ | ||
112 | #define YY_NULL 0 | ||
113 | |||
114 | /* Promotes a possibly negative, possibly signed char to an unsigned | ||
115 | * integer for use as an array index. If the signed char is negative, | ||
116 | * we want to instead treat it as an 8-bit unsigned char, hence the | ||
117 | * double cast. | ||
118 | */ | ||
119 | #define YY_SC_TO_UI(c) ((unsigned int) (unsigned char) c) | ||
120 | |||
121 | /* Enter a start condition. This macro really ought to take a parameter, | ||
122 | * but we do it the disgusting crufty way forced on us by the ()-less | ||
123 | * definition of BEGIN. | ||
124 | */ | ||
125 | #define BEGIN (yy_start) = 1 + 2 * | ||
126 | |||
127 | /* Translate the current start state into a value that can be later handed | ||
128 | * to BEGIN to return to the state. The YYSTATE alias is for lex | ||
129 | * compatibility. | ||
130 | */ | ||
131 | #define YY_START (((yy_start) - 1) / 2) | ||
132 | #define YYSTATE YY_START | ||
133 | |||
134 | /* Action number for EOF rule of a given start state. */ | ||
135 | #define YY_STATE_EOF(state) (YY_END_OF_BUFFER + state + 1) | ||
136 | |||
137 | /* Special action meaning "start processing a new file". */ | ||
138 | #define YY_NEW_FILE yyrestart(yyin ) | ||
139 | |||
140 | #define YY_END_OF_BUFFER_CHAR 0 | ||
141 | |||
142 | /* Size of default input buffer. */ | ||
143 | #ifndef YY_BUF_SIZE | ||
144 | #define YY_BUF_SIZE 16384 | ||
145 | #endif | ||
146 | |||
147 | /* The state buf must be large enough to hold one state per character in the main buffer. | ||
148 | */ | ||
149 | #define YY_STATE_BUF_SIZE ((YY_BUF_SIZE + 2) * sizeof(yy_state_type)) | ||
150 | |||
151 | #ifndef YY_TYPEDEF_YY_BUFFER_STATE | ||
152 | #define YY_TYPEDEF_YY_BUFFER_STATE | ||
153 | typedef struct yy_buffer_state *YY_BUFFER_STATE; | ||
154 | #endif | ||
155 | |||
156 | extern int yyleng; | ||
157 | |||
158 | extern FILE *yyin, *yyout; | ||
159 | |||
160 | #define EOB_ACT_CONTINUE_SCAN 0 | ||
161 | #define EOB_ACT_END_OF_FILE 1 | ||
162 | #define EOB_ACT_LAST_MATCH 2 | ||
163 | |||
164 | /* Note: We specifically omit the test for yy_rule_can_match_eol because it requires | ||
165 | * access to the local variable yy_act. Since yyless() is a macro, it would break | ||
166 | * existing scanners that call yyless() from OUTSIDE yylex. | ||
167 | * One obvious solution it to make yy_act a global. I tried that, and saw | ||
168 | * a 5% performance hit in a non-yylineno scanner, because yy_act is | ||
169 | * normally declared as a register variable-- so it is not worth it. | ||
170 | */ | ||
171 | #define YY_LESS_LINENO(n) \ | ||
172 | do { \ | ||
173 | int yyl;\ | ||
174 | for ( yyl = n; yyl < yyleng; ++yyl )\ | ||
175 | if ( yytext[yyl] == '\n' )\ | ||
176 | --yylineno;\ | ||
177 | }while(0) | ||
178 | |||
179 | /* Return all but the first "n" matched characters back to the input stream. */ | ||
180 | #define yyless(n) \ | ||
181 | do \ | ||
182 | { \ | ||
183 | /* Undo effects of setting up yytext. */ \ | ||
184 | int yyless_macro_arg = (n); \ | ||
185 | YY_LESS_LINENO(yyless_macro_arg);\ | ||
186 | *yy_cp = (yy_hold_char); \ | ||
187 | YY_RESTORE_YY_MORE_OFFSET \ | ||
188 | (yy_c_buf_p) = yy_cp = yy_bp + yyless_macro_arg - YY_MORE_ADJ; \ | ||
189 | YY_DO_BEFORE_ACTION; /* set up yytext again */ \ | ||
190 | } \ | ||
191 | while ( 0 ) | ||
192 | |||
193 | #define unput(c) yyunput( c, (yytext_ptr) ) | ||
194 | |||
195 | /* The following is because we cannot portably get our hands on size_t | ||
196 | * (without autoconf's help, which isn't available because we want | ||
197 | * flex-generated scanners to compile on their own). | ||
198 | * Given that the standard has decreed that size_t exists since 1989, | ||
199 | * I guess we can afford to depend on it. Manoj. | ||
200 | */ | ||
201 | |||
202 | #ifndef YY_TYPEDEF_YY_SIZE_T | ||
203 | #define YY_TYPEDEF_YY_SIZE_T | ||
204 | typedef size_t yy_size_t; | ||
205 | #endif | ||
206 | |||
207 | #ifndef YY_STRUCT_YY_BUFFER_STATE | ||
208 | #define YY_STRUCT_YY_BUFFER_STATE | ||
209 | struct yy_buffer_state | ||
210 | { | ||
211 | FILE *yy_input_file; | ||
212 | |||
213 | char *yy_ch_buf; /* input buffer */ | ||
214 | char *yy_buf_pos; /* current position in input buffer */ | ||
215 | |||
216 | /* Size of input buffer in bytes, not including room for EOB | ||
217 | * characters. | ||
218 | */ | ||
219 | yy_size_t yy_buf_size; | ||
220 | |||
221 | /* Number of characters read into yy_ch_buf, not including EOB | ||
222 | * characters. | ||
223 | */ | ||
224 | int yy_n_chars; | ||
225 | |||
226 | /* Whether we "own" the buffer - i.e., we know we created it, | ||
227 | * and can realloc() it to grow it, and should free() it to | ||
228 | * delete it. | ||
229 | */ | ||
230 | int yy_is_our_buffer; | ||
231 | |||
232 | /* Whether this is an "interactive" input source; if so, and | ||
233 | * if we're using stdio for input, then we want to use getc() | ||
234 | * instead of fread(), to make sure we stop fetching input after | ||
235 | * each newline. | ||
236 | */ | ||
237 | int yy_is_interactive; | ||
238 | |||
239 | /* Whether we're considered to be at the beginning of a line. | ||
240 | * If so, '^' rules will be active on the next match, otherwise | ||
241 | * not. | ||
242 | */ | ||
243 | int yy_at_bol; | ||
244 | |||
245 | int yy_bs_lineno; /**< The line count. */ | ||
246 | int yy_bs_column; /**< The column count. */ | ||
247 | |||
248 | /* Whether to try to fill the input buffer when we reach the | ||
249 | * end of it. | ||
250 | */ | ||
251 | int yy_fill_buffer; | ||
252 | |||
253 | int yy_buffer_status; | ||
254 | |||
255 | #define YY_BUFFER_NEW 0 | ||
256 | #define YY_BUFFER_NORMAL 1 | ||
257 | /* When an EOF's been seen but there's still some text to process | ||
258 | * then we mark the buffer as YY_EOF_PENDING, to indicate that we | ||
259 | * shouldn't try reading from the input source any more. We might | ||
260 | * still have a bunch of tokens to match, though, because of | ||
261 | * possible backing-up. | ||
262 | * | ||
263 | * When we actually see the EOF, we change the status to "new" | ||
264 | * (via yyrestart()), so that the user can continue scanning by | ||
265 | * just pointing yyin at a new input file. | ||
266 | */ | ||
267 | #define YY_BUFFER_EOF_PENDING 2 | ||
268 | |||
269 | }; | ||
270 | #endif /* !YY_STRUCT_YY_BUFFER_STATE */ | ||
271 | |||
272 | /* Stack of input buffers. */ | ||
273 | static size_t yy_buffer_stack_top = 0; /**< index of top of stack. */ | ||
274 | static size_t yy_buffer_stack_max = 0; /**< capacity of stack. */ | ||
275 | static YY_BUFFER_STATE * yy_buffer_stack = 0; /**< Stack as an array. */ | ||
276 | |||
277 | /* We provide macros for accessing buffer states in case in the | ||
278 | * future we want to put the buffer states in a more general | ||
279 | * "scanner state". | ||
280 | * | ||
281 | * Returns the top of the stack, or NULL. | ||
282 | */ | ||
283 | #define YY_CURRENT_BUFFER ( (yy_buffer_stack) \ | ||
284 | ? (yy_buffer_stack)[(yy_buffer_stack_top)] \ | ||
285 | : NULL) | ||
286 | |||
287 | /* Same as previous macro, but useful when we know that the buffer stack is not | ||
288 | * NULL or when we need an lvalue. For internal use only. | ||
289 | */ | ||
290 | #define YY_CURRENT_BUFFER_LVALUE (yy_buffer_stack)[(yy_buffer_stack_top)] | ||
291 | |||
292 | /* yy_hold_char holds the character lost when yytext is formed. */ | ||
293 | static char yy_hold_char; | ||
294 | static int yy_n_chars; /* number of characters read into yy_ch_buf */ | ||
295 | int yyleng; | ||
296 | |||
297 | /* Points to current character in buffer. */ | ||
298 | static char *yy_c_buf_p = (char *) 0; | ||
299 | static int yy_init = 0; /* whether we need to initialize */ | ||
300 | static int yy_start = 0; /* start state number */ | ||
301 | |||
302 | /* Flag which is used to allow yywrap()'s to do buffer switches | ||
303 | * instead of setting up a fresh yyin. A bit of a hack ... | ||
304 | */ | ||
305 | static int yy_did_buffer_switch_on_eof; | ||
306 | |||
307 | void yyrestart (FILE *input_file ); | ||
308 | void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer ); | ||
309 | YY_BUFFER_STATE yy_create_buffer (FILE *file,int size ); | ||
310 | void yy_delete_buffer (YY_BUFFER_STATE b ); | ||
311 | void yy_flush_buffer (YY_BUFFER_STATE b ); | ||
312 | void yypush_buffer_state (YY_BUFFER_STATE new_buffer ); | ||
313 | void yypop_buffer_state (void ); | ||
314 | |||
315 | static void yyensure_buffer_stack (void ); | ||
316 | static void yy_load_buffer_state (void ); | ||
317 | static void yy_init_buffer (YY_BUFFER_STATE b,FILE *file ); | ||
318 | |||
319 | #define YY_FLUSH_BUFFER yy_flush_buffer(YY_CURRENT_BUFFER ) | ||
320 | |||
321 | YY_BUFFER_STATE yy_scan_buffer (char *base,yy_size_t size ); | ||
322 | YY_BUFFER_STATE yy_scan_string (yyconst char *yy_str ); | ||
323 | YY_BUFFER_STATE yy_scan_bytes (yyconst char *bytes,int len ); | ||
324 | |||
325 | void *yyalloc (yy_size_t ); | ||
326 | void *yyrealloc (void *,yy_size_t ); | ||
327 | void yyfree (void * ); | ||
328 | |||
329 | #define yy_new_buffer yy_create_buffer | ||
330 | |||
331 | #define yy_set_interactive(is_interactive) \ | ||
332 | { \ | ||
333 | if ( ! YY_CURRENT_BUFFER ){ \ | ||
334 | yyensure_buffer_stack (); \ | ||
335 | YY_CURRENT_BUFFER_LVALUE = \ | ||
336 | yy_create_buffer(yyin,YY_BUF_SIZE ); \ | ||
337 | } \ | ||
338 | YY_CURRENT_BUFFER_LVALUE->yy_is_interactive = is_interactive; \ | ||
339 | } | ||
340 | |||
341 | #define yy_set_bol(at_bol) \ | ||
342 | { \ | ||
343 | if ( ! YY_CURRENT_BUFFER ){\ | ||
344 | yyensure_buffer_stack (); \ | ||
345 | YY_CURRENT_BUFFER_LVALUE = \ | ||
346 | yy_create_buffer(yyin,YY_BUF_SIZE ); \ | ||
347 | } \ | ||
348 | YY_CURRENT_BUFFER_LVALUE->yy_at_bol = at_bol; \ | ||
349 | } | ||
350 | |||
351 | #define YY_AT_BOL() (YY_CURRENT_BUFFER_LVALUE->yy_at_bol) | ||
352 | |||
353 | /* Begin user sect3 */ | ||
354 | |||
355 | #define yywrap(n) 1 | ||
356 | #define YY_SKIP_YYWRAP | ||
357 | |||
358 | typedef unsigned char YY_CHAR; | ||
359 | |||
360 | FILE *yyin = (FILE *) 0, *yyout = (FILE *) 0; | ||
361 | |||
362 | typedef int yy_state_type; | ||
363 | |||
364 | extern int yylineno; | ||
365 | |||
366 | int yylineno = 1; | ||
367 | |||
368 | extern char *yytext; | ||
369 | #define yytext_ptr yytext | ||
370 | |||
371 | static yy_state_type yy_get_previous_state (void ); | ||
372 | static yy_state_type yy_try_NUL_trans (yy_state_type current_state ); | ||
373 | static int yy_get_next_buffer (void ); | ||
374 | static void yy_fatal_error (yyconst char msg[] ); | ||
375 | |||
376 | /* Done after the current pattern has been matched and before the | ||
377 | * corresponding action - sets up yytext. | ||
378 | */ | ||
379 | #define YY_DO_BEFORE_ACTION \ | ||
380 | (yytext_ptr) = yy_bp; \ | ||
381 | yyleng = (size_t) (yy_cp - yy_bp); \ | ||
382 | (yy_hold_char) = *yy_cp; \ | ||
383 | *yy_cp = '\0'; \ | ||
384 | (yy_c_buf_p) = yy_cp; | ||
385 | |||
386 | #define YY_NUM_RULES 20 | ||
387 | #define YY_END_OF_BUFFER 21 | ||
388 | /* This struct is not used in this scanner, | ||
389 | but its presence is necessary. */ | ||
390 | struct yy_trans_info | ||
391 | { | ||
392 | flex_int32_t yy_verify; | ||
393 | flex_int32_t yy_nxt; | ||
394 | }; | ||
395 | static yyconst flex_int16_t yy_accept[104] = | ||
396 | { 0, | ||
397 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, | ||
398 | 21, 19, 16, 16, 19, 19, 19, 7, 7, 19, | ||
399 | 7, 19, 19, 19, 19, 13, 14, 14, 19, 8, | ||
400 | 8, 16, 0, 2, 0, 0, 9, 0, 0, 0, | ||
401 | 0, 0, 0, 7, 7, 5, 0, 6, 0, 12, | ||
402 | 12, 14, 14, 8, 0, 11, 9, 0, 0, 0, | ||
403 | 0, 18, 0, 0, 0, 0, 8, 0, 17, 0, | ||
404 | 0, 0, 0, 0, 10, 0, 0, 0, 0, 0, | ||
405 | 0, 0, 0, 0, 0, 0, 0, 0, 3, 15, | ||
406 | 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, | ||
407 | |||
408 | 0, 4, 0 | ||
409 | } ; | ||
410 | |||
411 | static yyconst flex_int32_t yy_ec[256] = | ||
412 | { 0, | ||
413 | 1, 1, 1, 1, 1, 1, 1, 1, 2, 3, | ||
414 | 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, | ||
415 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, | ||
416 | 1, 2, 1, 4, 5, 1, 1, 6, 1, 1, | ||
417 | 1, 7, 8, 8, 9, 8, 10, 11, 12, 13, | ||
418 | 13, 13, 13, 13, 13, 13, 13, 14, 1, 1, | ||
419 | 1, 1, 8, 8, 15, 15, 15, 15, 15, 15, | ||
420 | 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, | ||
421 | 16, 16, 16, 16, 16, 16, 16, 17, 16, 16, | ||
422 | 1, 18, 19, 1, 16, 1, 15, 20, 21, 22, | ||
423 | |||
424 | 23, 15, 16, 24, 25, 16, 16, 26, 27, 28, | ||
425 | 24, 16, 16, 29, 30, 31, 32, 33, 16, 17, | ||
426 | 16, 16, 34, 1, 35, 1, 1, 1, 1, 1, | ||
427 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, | ||
428 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, | ||
429 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, | ||
430 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, | ||
431 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, | ||
432 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, | ||
433 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, | ||
434 | |||
435 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, | ||
436 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, | ||
437 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, | ||
438 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, | ||
439 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, | ||
440 | 1, 1, 1, 1, 1 | ||
441 | } ; | ||
442 | |||
443 | static yyconst flex_int32_t yy_meta[36] = | ||
444 | { 0, | ||
445 | 1, 1, 1, 1, 2, 1, 2, 2, 2, 3, | ||
446 | 4, 4, 4, 5, 6, 7, 7, 1, 1, 6, | ||
447 | 6, 6, 6, 7, 7, 7, 7, 7, 7, 7, | ||
448 | 7, 7, 7, 8, 1 | ||
449 | } ; | ||
450 | |||
451 | static yyconst flex_int16_t yy_base[117] = | ||
452 | { 0, | ||
453 | 0, 0, 30, 0, 44, 0, 67, 0, 97, 105, | ||
454 | 302, 303, 35, 44, 40, 94, 112, 0, 129, 152, | ||
455 | 296, 295, 159, 0, 176, 303, 0, 116, 95, 165, | ||
456 | 49, 46, 102, 303, 296, 0, 0, 288, 290, 293, | ||
457 | 264, 266, 270, 0, 0, 303, 0, 303, 264, 303, | ||
458 | 0, 0, 195, 101, 0, 0, 0, 0, 284, 125, | ||
459 | 277, 265, 225, 230, 216, 218, 0, 202, 224, 221, | ||
460 | 217, 107, 196, 188, 303, 206, 179, 186, 178, 185, | ||
461 | 183, 162, 161, 150, 169, 160, 145, 125, 303, 303, | ||
462 | 137, 109, 190, 103, 203, 167, 108, 197, 303, 123, | ||
463 | |||
464 | 29, 303, 303, 215, 221, 226, 229, 234, 240, 246, | ||
465 | 250, 257, 265, 270, 275, 282 | ||
466 | } ; | ||
467 | |||
468 | static yyconst flex_int16_t yy_def[117] = | ||
469 | { 0, | ||
470 | 103, 1, 1, 3, 3, 5, 103, 7, 3, 3, | ||
471 | 103, 103, 103, 103, 104, 105, 103, 106, 103, 19, | ||
472 | 19, 20, 103, 107, 20, 103, 108, 109, 105, 103, | ||
473 | 103, 103, 104, 103, 104, 110, 111, 103, 112, 113, | ||
474 | 103, 103, 103, 106, 19, 103, 20, 103, 103, 103, | ||
475 | 20, 108, 109, 103, 114, 110, 111, 115, 112, 112, | ||
476 | 113, 103, 103, 103, 103, 103, 114, 115, 103, 103, | ||
477 | 103, 103, 103, 103, 103, 103, 103, 103, 103, 103, | ||
478 | 103, 103, 103, 103, 103, 103, 103, 103, 103, 103, | ||
479 | 103, 103, 103, 103, 103, 116, 103, 116, 103, 116, | ||
480 | |||
481 | 103, 103, 0, 103, 103, 103, 103, 103, 103, 103, | ||
482 | 103, 103, 103, 103, 103, 103 | ||
483 | } ; | ||
484 | |||
485 | static yyconst flex_int16_t yy_nxt[339] = | ||
486 | { 0, | ||
487 | 12, 13, 14, 15, 12, 16, 12, 12, 12, 17, | ||
488 | 18, 18, 18, 12, 19, 20, 20, 12, 12, 21, | ||
489 | 19, 21, 19, 22, 20, 20, 20, 20, 20, 20, | ||
490 | 20, 20, 20, 12, 12, 12, 32, 32, 102, 23, | ||
491 | 12, 12, 12, 34, 20, 32, 32, 32, 32, 20, | ||
492 | 20, 20, 20, 20, 24, 24, 24, 35, 25, 54, | ||
493 | 54, 54, 26, 25, 25, 25, 25, 12, 13, 14, | ||
494 | 15, 27, 12, 27, 27, 27, 23, 27, 27, 27, | ||
495 | 12, 28, 28, 28, 12, 12, 28, 28, 28, 28, | ||
496 | 28, 28, 28, 28, 28, 28, 28, 28, 28, 28, | ||
497 | |||
498 | 12, 12, 29, 36, 103, 34, 17, 30, 31, 31, | ||
499 | 29, 54, 54, 54, 17, 30, 31, 31, 39, 35, | ||
500 | 52, 40, 52, 52, 52, 103, 78, 38, 38, 46, | ||
501 | 101, 60, 79, 41, 69, 97, 42, 94, 43, 45, | ||
502 | 45, 45, 46, 45, 47, 47, 93, 92, 45, 45, | ||
503 | 45, 45, 47, 47, 47, 47, 47, 47, 47, 47, | ||
504 | 47, 47, 47, 47, 47, 39, 47, 91, 40, 90, | ||
505 | 99, 47, 47, 47, 47, 54, 54, 54, 89, 88, | ||
506 | 41, 55, 87, 49, 100, 43, 51, 51, 51, 86, | ||
507 | 51, 95, 95, 96, 85, 51, 51, 51, 51, 52, | ||
508 | |||
509 | 99, 52, 52, 52, 95, 95, 96, 84, 46, 83, | ||
510 | 82, 81, 39, 79, 100, 33, 33, 33, 33, 33, | ||
511 | 33, 33, 33, 37, 80, 77, 37, 37, 37, 44, | ||
512 | 40, 44, 50, 76, 50, 52, 75, 52, 74, 52, | ||
513 | 52, 53, 73, 53, 53, 53, 53, 56, 56, 56, | ||
514 | 72, 56, 56, 57, 71, 57, 57, 59, 59, 59, | ||
515 | 59, 59, 59, 59, 59, 61, 61, 61, 61, 61, | ||
516 | 61, 61, 61, 67, 70, 67, 68, 68, 68, 62, | ||
517 | 68, 68, 98, 98, 98, 98, 98, 98, 98, 98, | ||
518 | 60, 66, 65, 64, 63, 62, 60, 58, 103, 48, | ||
519 | |||
520 | 48, 103, 11, 103, 103, 103, 103, 103, 103, 103, | ||
521 | 103, 103, 103, 103, 103, 103, 103, 103, 103, 103, | ||
522 | 103, 103, 103, 103, 103, 103, 103, 103, 103, 103, | ||
523 | 103, 103, 103, 103, 103, 103, 103, 103 | ||
524 | } ; | ||
525 | |||
526 | static yyconst flex_int16_t yy_chk[339] = | ||
527 | { 0, | ||
528 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, | ||
529 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, | ||
530 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, | ||
531 | 1, 1, 1, 1, 1, 3, 13, 13, 101, 3, | ||
532 | 3, 3, 3, 15, 3, 14, 14, 32, 32, 3, | ||
533 | 3, 3, 3, 3, 5, 5, 5, 15, 5, 31, | ||
534 | 31, 31, 5, 5, 5, 5, 5, 7, 7, 7, | ||
535 | 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, | ||
536 | 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, | ||
537 | 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, | ||
538 | |||
539 | 7, 7, 9, 16, 29, 33, 9, 9, 9, 9, | ||
540 | 10, 54, 54, 54, 10, 10, 10, 10, 17, 33, | ||
541 | 28, 17, 28, 28, 28, 100, 72, 16, 29, 28, | ||
542 | 97, 60, 72, 17, 60, 94, 17, 92, 17, 19, | ||
543 | 19, 19, 19, 19, 19, 19, 91, 88, 19, 19, | ||
544 | 19, 19, 19, 19, 19, 19, 19, 19, 19, 19, | ||
545 | 19, 19, 20, 20, 20, 23, 20, 87, 23, 86, | ||
546 | 96, 20, 20, 20, 20, 30, 30, 30, 85, 84, | ||
547 | 23, 30, 83, 23, 96, 23, 25, 25, 25, 82, | ||
548 | 25, 93, 93, 93, 81, 25, 25, 25, 25, 53, | ||
549 | |||
550 | 98, 53, 53, 53, 95, 95, 95, 80, 53, 79, | ||
551 | 78, 77, 76, 74, 98, 104, 104, 104, 104, 104, | ||
552 | 104, 104, 104, 105, 73, 71, 105, 105, 105, 106, | ||
553 | 70, 106, 107, 69, 107, 108, 68, 108, 66, 108, | ||
554 | 108, 109, 65, 109, 109, 109, 109, 110, 110, 110, | ||
555 | 64, 110, 110, 111, 63, 111, 111, 112, 112, 112, | ||
556 | 112, 112, 112, 112, 112, 113, 113, 113, 113, 113, | ||
557 | 113, 113, 113, 114, 62, 114, 115, 115, 115, 61, | ||
558 | 115, 115, 116, 116, 116, 116, 116, 116, 116, 116, | ||
559 | 59, 49, 43, 42, 41, 40, 39, 38, 35, 22, | ||
560 | |||
561 | 21, 11, 103, 103, 103, 103, 103, 103, 103, 103, | ||
562 | 103, 103, 103, 103, 103, 103, 103, 103, 103, 103, | ||
563 | 103, 103, 103, 103, 103, 103, 103, 103, 103, 103, | ||
564 | 103, 103, 103, 103, 103, 103, 103, 103 | ||
565 | } ; | ||
566 | |||
567 | /* Table of booleans, true if rule could match eol. */ | ||
568 | static yyconst flex_int32_t yy_rule_can_match_eol[21] = | ||
569 | { 0, | ||
570 | 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, | ||
571 | 0, }; | ||
572 | |||
573 | static yy_state_type yy_last_accepting_state; | ||
574 | static char *yy_last_accepting_cpos; | ||
575 | |||
576 | extern int yy_flex_debug; | ||
577 | int yy_flex_debug = 0; | ||
578 | |||
579 | /* The intent behind this definition is that it'll catch | ||
580 | * any uses of REJECT which flex missed. | ||
581 | */ | ||
582 | #define REJECT reject_used_but_not_detected | ||
583 | #define yymore() yymore_used_but_not_detected | ||
584 | #define YY_MORE_ADJ 0 | ||
585 | #define YY_RESTORE_YY_MORE_OFFSET | ||
586 | char *yytext; | ||
587 | #line 1 "dtc-lexer.l" | ||
588 | /* | ||
589 | * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation. 2005. | ||
590 | * | ||
591 | * | ||
592 | * This program is free software; you can redistribute it and/or | ||
593 | * modify it under the terms of the GNU General Public License as | ||
594 | * published by the Free Software Foundation; either version 2 of the | ||
595 | * License, or (at your option) any later version. | ||
596 | * | ||
597 | * This program is distributed in the hope that it will be useful, | ||
598 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
599 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
600 | * General Public License for more details. | ||
601 | * | ||
602 | * You should have received a copy of the GNU General Public License | ||
603 | * along with this program; if not, write to the Free Software | ||
604 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 | ||
605 | * USA | ||
606 | */ | ||
607 | |||
608 | |||
609 | |||
610 | |||
611 | #line 37 "dtc-lexer.l" | ||
612 | #include "dtc.h" | ||
613 | #include "srcpos.h" | ||
614 | #include "dtc-parser.tab.h" | ||
615 | |||
616 | |||
617 | /*#define LEXDEBUG 1*/ | ||
618 | |||
619 | #ifdef LEXDEBUG | ||
620 | #define DPRINT(fmt, ...) fprintf(stderr, fmt, ##__VA_ARGS__) | ||
621 | #else | ||
622 | #define DPRINT(fmt, ...) do { } while (0) | ||
623 | #endif | ||
624 | |||
625 | static int dts_version; /* = 0 */ | ||
626 | |||
627 | #define BEGIN_DEFAULT() if (dts_version == 0) { \ | ||
628 | DPRINT("<INITIAL>\n"); \ | ||
629 | BEGIN(INITIAL); \ | ||
630 | } else { \ | ||
631 | DPRINT("<V1>\n"); \ | ||
632 | BEGIN(V1); \ | ||
633 | } | ||
634 | |||
635 | static void push_input_file(const char *filename); | ||
636 | static int pop_input_file(void); | ||
637 | #line 638 "dtc-lexer.lex.c" | ||
638 | |||
639 | #define INITIAL 0 | ||
640 | #define INCLUDE 1 | ||
641 | #define BYTESTRING 2 | ||
642 | #define PROPNODENAME 3 | ||
643 | #define V1 4 | ||
644 | |||
645 | #ifndef YY_NO_UNISTD_H | ||
646 | /* Special case for "unistd.h", since it is non-ANSI. We include it way | ||
647 | * down here because we want the user's section 1 to have been scanned first. | ||
648 | * The user has a chance to override it with an option. | ||
649 | */ | ||
650 | #include <unistd.h> | ||
651 | #endif | ||
652 | |||
653 | #ifndef YY_EXTRA_TYPE | ||
654 | #define YY_EXTRA_TYPE void * | ||
655 | #endif | ||
656 | |||
657 | static int yy_init_globals (void ); | ||
658 | |||
659 | /* Macros after this point can all be overridden by user definitions in | ||
660 | * section 1. | ||
661 | */ | ||
662 | |||
663 | #ifndef YY_SKIP_YYWRAP | ||
664 | #ifdef __cplusplus | ||
665 | extern "C" int yywrap (void ); | ||
666 | #else | ||
667 | extern int yywrap (void ); | ||
668 | #endif | ||
669 | #endif | ||
670 | |||
671 | #ifndef yytext_ptr | ||
672 | static void yy_flex_strncpy (char *,yyconst char *,int ); | ||
673 | #endif | ||
674 | |||
675 | #ifdef YY_NEED_STRLEN | ||
676 | static int yy_flex_strlen (yyconst char * ); | ||
677 | #endif | ||
678 | |||
679 | #ifndef YY_NO_INPUT | ||
680 | |||
681 | #ifdef __cplusplus | ||
682 | static int yyinput (void ); | ||
683 | #else | ||
684 | static int input (void ); | ||
685 | #endif | ||
686 | |||
687 | #endif | ||
688 | |||
689 | /* Amount of stuff to slurp up with each read. */ | ||
690 | #ifndef YY_READ_BUF_SIZE | ||
691 | #define YY_READ_BUF_SIZE 8192 | ||
692 | #endif | ||
693 | |||
694 | /* Copy whatever the last rule matched to the standard output. */ | ||
695 | #ifndef ECHO | ||
696 | /* This used to be an fputs(), but since the string might contain NUL's, | ||
697 | * we now use fwrite(). | ||
698 | */ | ||
699 | #define ECHO fwrite( yytext, yyleng, 1, yyout ) | ||
700 | #endif | ||
701 | |||
702 | /* Gets input and stuffs it into "buf". number of characters read, or YY_NULL, | ||
703 | * is returned in "result". | ||
704 | */ | ||
705 | #ifndef YY_INPUT | ||
706 | #define YY_INPUT(buf,result,max_size) \ | ||
707 | if ( YY_CURRENT_BUFFER_LVALUE->yy_is_interactive ) \ | ||
708 | { \ | ||
709 | int c = '*'; \ | ||
710 | int n; \ | ||
711 | for ( n = 0; n < max_size && \ | ||
712 | (c = getc( yyin )) != EOF && c != '\n'; ++n ) \ | ||
713 | buf[n] = (char) c; \ | ||
714 | if ( c == '\n' ) \ | ||
715 | buf[n++] = (char) c; \ | ||
716 | if ( c == EOF && ferror( yyin ) ) \ | ||
717 | YY_FATAL_ERROR( "input in flex scanner failed" ); \ | ||
718 | result = n; \ | ||
719 | } \ | ||
720 | else \ | ||
721 | { \ | ||
722 | errno=0; \ | ||
723 | while ( (result = fread(buf, 1, max_size, yyin))==0 && ferror(yyin)) \ | ||
724 | { \ | ||
725 | if( errno != EINTR) \ | ||
726 | { \ | ||
727 | YY_FATAL_ERROR( "input in flex scanner failed" ); \ | ||
728 | break; \ | ||
729 | } \ | ||
730 | errno=0; \ | ||
731 | clearerr(yyin); \ | ||
732 | } \ | ||
733 | }\ | ||
734 | \ | ||
735 | |||
736 | #endif | ||
737 | |||
738 | /* No semi-colon after return; correct usage is to write "yyterminate();" - | ||
739 | * we don't want an extra ';' after the "return" because that will cause | ||
740 | * some compilers to complain about unreachable statements. | ||
741 | */ | ||
742 | #ifndef yyterminate | ||
743 | #define yyterminate() return YY_NULL | ||
744 | #endif | ||
745 | |||
746 | /* Number of entries by which start-condition stack grows. */ | ||
747 | #ifndef YY_START_STACK_INCR | ||
748 | #define YY_START_STACK_INCR 25 | ||
749 | #endif | ||
750 | |||
751 | /* Report a fatal error. */ | ||
752 | #ifndef YY_FATAL_ERROR | ||
753 | #define YY_FATAL_ERROR(msg) yy_fatal_error( msg ) | ||
754 | #endif | ||
755 | |||
756 | /* end tables serialization structures and prototypes */ | ||
757 | |||
758 | /* Default declaration of generated scanner - a define so the user can | ||
759 | * easily add parameters. | ||
760 | */ | ||
761 | #ifndef YY_DECL | ||
762 | #define YY_DECL_IS_OURS 1 | ||
763 | |||
764 | extern int yylex (void); | ||
765 | |||
766 | #define YY_DECL int yylex (void) | ||
767 | #endif /* !YY_DECL */ | ||
768 | |||
769 | /* Code executed at the beginning of each rule, after yytext and yyleng | ||
770 | * have been set up. | ||
771 | */ | ||
772 | #ifndef YY_USER_ACTION | ||
773 | #define YY_USER_ACTION | ||
774 | #endif | ||
775 | |||
776 | /* Code executed at the end of each rule. */ | ||
777 | #ifndef YY_BREAK | ||
778 | #define YY_BREAK break; | ||
779 | #endif | ||
780 | |||
781 | #define YY_RULE_SETUP \ | ||
782 | YY_USER_ACTION | ||
783 | |||
784 | /** The main scanner function which does all the work. | ||
785 | */ | ||
786 | YY_DECL | ||
787 | { | ||
788 | register yy_state_type yy_current_state; | ||
789 | register char *yy_cp, *yy_bp; | ||
790 | register int yy_act; | ||
791 | |||
792 | #line 64 "dtc-lexer.l" | ||
793 | |||
794 | #line 795 "dtc-lexer.lex.c" | ||
795 | |||
796 | if ( !(yy_init) ) | ||
797 | { | ||
798 | (yy_init) = 1; | ||
799 | |||
800 | #ifdef YY_USER_INIT | ||
801 | YY_USER_INIT; | ||
802 | #endif | ||
803 | |||
804 | if ( ! (yy_start) ) | ||
805 | (yy_start) = 1; /* first start state */ | ||
806 | |||
807 | if ( ! yyin ) | ||
808 | yyin = stdin; | ||
809 | |||
810 | if ( ! yyout ) | ||
811 | yyout = stdout; | ||
812 | |||
813 | if ( ! YY_CURRENT_BUFFER ) { | ||
814 | yyensure_buffer_stack (); | ||
815 | YY_CURRENT_BUFFER_LVALUE = | ||
816 | yy_create_buffer(yyin,YY_BUF_SIZE ); | ||
817 | } | ||
818 | |||
819 | yy_load_buffer_state( ); | ||
820 | } | ||
821 | |||
822 | while ( 1 ) /* loops until end-of-file is reached */ | ||
823 | { | ||
824 | yy_cp = (yy_c_buf_p); | ||
825 | |||
826 | /* Support of yytext. */ | ||
827 | *yy_cp = (yy_hold_char); | ||
828 | |||
829 | /* yy_bp points to the position in yy_ch_buf of the start of | ||
830 | * the current run. | ||
831 | */ | ||
832 | yy_bp = yy_cp; | ||
833 | |||
834 | yy_current_state = (yy_start); | ||
835 | yy_match: | ||
836 | do | ||
837 | { | ||
838 | register YY_CHAR yy_c = yy_ec[YY_SC_TO_UI(*yy_cp)]; | ||
839 | if ( yy_accept[yy_current_state] ) | ||
840 | { | ||
841 | (yy_last_accepting_state) = yy_current_state; | ||
842 | (yy_last_accepting_cpos) = yy_cp; | ||
843 | } | ||
844 | while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) | ||
845 | { | ||
846 | yy_current_state = (int) yy_def[yy_current_state]; | ||
847 | if ( yy_current_state >= 104 ) | ||
848 | yy_c = yy_meta[(unsigned int) yy_c]; | ||
849 | } | ||
850 | yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; | ||
851 | ++yy_cp; | ||
852 | } | ||
853 | while ( yy_base[yy_current_state] != 303 ); | ||
854 | |||
855 | yy_find_action: | ||
856 | yy_act = yy_accept[yy_current_state]; | ||
857 | if ( yy_act == 0 ) | ||
858 | { /* have to back up */ | ||
859 | yy_cp = (yy_last_accepting_cpos); | ||
860 | yy_current_state = (yy_last_accepting_state); | ||
861 | yy_act = yy_accept[yy_current_state]; | ||
862 | } | ||
863 | |||
864 | YY_DO_BEFORE_ACTION; | ||
865 | |||
866 | if ( yy_act != YY_END_OF_BUFFER && yy_rule_can_match_eol[yy_act] ) | ||
867 | { | ||
868 | int yyl; | ||
869 | for ( yyl = 0; yyl < yyleng; ++yyl ) | ||
870 | if ( yytext[yyl] == '\n' ) | ||
871 | |||
872 | yylineno++; | ||
873 | ; | ||
874 | } | ||
875 | |||
876 | do_action: /* This label is used only to access EOF actions. */ | ||
877 | |||
878 | switch ( yy_act ) | ||
879 | { /* beginning of action switch */ | ||
880 | case 0: /* must back up */ | ||
881 | /* undo the effects of YY_DO_BEFORE_ACTION */ | ||
882 | *yy_cp = (yy_hold_char); | ||
883 | yy_cp = (yy_last_accepting_cpos); | ||
884 | yy_current_state = (yy_last_accepting_state); | ||
885 | goto yy_find_action; | ||
886 | |||
887 | case 1: | ||
888 | /* rule 1 can match eol */ | ||
889 | YY_RULE_SETUP | ||
890 | #line 65 "dtc-lexer.l" | ||
891 | { | ||
892 | char *name = strchr(yytext, '\"') + 1; | ||
893 | yytext[yyleng-1] = '\0'; | ||
894 | push_input_file(name); | ||
895 | } | ||
896 | YY_BREAK | ||
897 | case YY_STATE_EOF(INITIAL): | ||
898 | case YY_STATE_EOF(INCLUDE): | ||
899 | case YY_STATE_EOF(BYTESTRING): | ||
900 | case YY_STATE_EOF(PROPNODENAME): | ||
901 | case YY_STATE_EOF(V1): | ||
902 | #line 71 "dtc-lexer.l" | ||
903 | { | ||
904 | if (!pop_input_file()) { | ||
905 | yyterminate(); | ||
906 | } | ||
907 | } | ||
908 | YY_BREAK | ||
909 | case 2: | ||
910 | /* rule 2 can match eol */ | ||
911 | YY_RULE_SETUP | ||
912 | #line 77 "dtc-lexer.l" | ||
913 | { | ||
914 | yylloc.file = srcpos_file; | ||
915 | yylloc.first_line = yylineno; | ||
916 | DPRINT("String: %s\n", yytext); | ||
917 | yylval.data = data_copy_escape_string(yytext+1, | ||
918 | yyleng-2); | ||
919 | yylloc.first_line = yylineno; | ||
920 | return DT_STRING; | ||
921 | } | ||
922 | YY_BREAK | ||
923 | case 3: | ||
924 | YY_RULE_SETUP | ||
925 | #line 87 "dtc-lexer.l" | ||
926 | { | ||
927 | yylloc.file = srcpos_file; | ||
928 | yylloc.first_line = yylineno; | ||
929 | DPRINT("Keyword: /dts-v1/\n"); | ||
930 | dts_version = 1; | ||
931 | BEGIN_DEFAULT(); | ||
932 | return DT_V1; | ||
933 | } | ||
934 | YY_BREAK | ||
935 | case 4: | ||
936 | YY_RULE_SETUP | ||
937 | #line 96 "dtc-lexer.l" | ||
938 | { | ||
939 | yylloc.file = srcpos_file; | ||
940 | yylloc.first_line = yylineno; | ||
941 | DPRINT("Keyword: /memreserve/\n"); | ||
942 | BEGIN_DEFAULT(); | ||
943 | return DT_MEMRESERVE; | ||
944 | } | ||
945 | YY_BREAK | ||
946 | case 5: | ||
947 | YY_RULE_SETUP | ||
948 | #line 104 "dtc-lexer.l" | ||
949 | { | ||
950 | yylloc.file = srcpos_file; | ||
951 | yylloc.first_line = yylineno; | ||
952 | DPRINT("Label: %s\n", yytext); | ||
953 | yylval.labelref = strdup(yytext); | ||
954 | yylval.labelref[yyleng-1] = '\0'; | ||
955 | return DT_LABEL; | ||
956 | } | ||
957 | YY_BREAK | ||
958 | case 6: | ||
959 | YY_RULE_SETUP | ||
960 | #line 113 "dtc-lexer.l" | ||
961 | { | ||
962 | yylloc.file = srcpos_file; | ||
963 | yylloc.first_line = yylineno; | ||
964 | if (*yytext == 'b') | ||
965 | yylval.cbase = 2; | ||
966 | else if (*yytext == 'o') | ||
967 | yylval.cbase = 8; | ||
968 | else if (*yytext == 'd') | ||
969 | yylval.cbase = 10; | ||
970 | else | ||
971 | yylval.cbase = 16; | ||
972 | DPRINT("Base: %d\n", yylval.cbase); | ||
973 | return DT_BASE; | ||
974 | } | ||
975 | YY_BREAK | ||
976 | case 7: | ||
977 | YY_RULE_SETUP | ||
978 | #line 128 "dtc-lexer.l" | ||
979 | { | ||
980 | yylloc.file = srcpos_file; | ||
981 | yylloc.first_line = yylineno; | ||
982 | yylval.literal = strdup(yytext); | ||
983 | DPRINT("Literal: '%s'\n", yylval.literal); | ||
984 | return DT_LEGACYLITERAL; | ||
985 | } | ||
986 | YY_BREAK | ||
987 | case 8: | ||
988 | YY_RULE_SETUP | ||
989 | #line 136 "dtc-lexer.l" | ||
990 | { | ||
991 | yylloc.file = srcpos_file; | ||
992 | yylloc.first_line = yylineno; | ||
993 | yylval.literal = strdup(yytext); | ||
994 | DPRINT("Literal: '%s'\n", yylval.literal); | ||
995 | return DT_LITERAL; | ||
996 | } | ||
997 | YY_BREAK | ||
998 | case 9: | ||
999 | YY_RULE_SETUP | ||
1000 | #line 144 "dtc-lexer.l" | ||
1001 | { /* label reference */ | ||
1002 | yylloc.file = srcpos_file; | ||
1003 | yylloc.first_line = yylineno; | ||
1004 | DPRINT("Ref: %s\n", yytext+1); | ||
1005 | yylval.labelref = strdup(yytext+1); | ||
1006 | return DT_REF; | ||
1007 | } | ||
1008 | YY_BREAK | ||
1009 | case 10: | ||
1010 | YY_RULE_SETUP | ||
1011 | #line 152 "dtc-lexer.l" | ||
1012 | { /* new-style path reference */ | ||
1013 | yylloc.file = srcpos_file; | ||
1014 | yylloc.first_line = yylineno; | ||
1015 | yytext[yyleng-1] = '\0'; | ||
1016 | DPRINT("Ref: %s\n", yytext+2); | ||
1017 | yylval.labelref = strdup(yytext+2); | ||
1018 | return DT_REF; | ||
1019 | } | ||
1020 | YY_BREAK | ||
1021 | case 11: | ||
1022 | YY_RULE_SETUP | ||
1023 | #line 161 "dtc-lexer.l" | ||
1024 | { /* old-style path reference */ | ||
1025 | yylloc.file = srcpos_file; | ||
1026 | yylloc.first_line = yylineno; | ||
1027 | DPRINT("Ref: %s\n", yytext+1); | ||
1028 | yylval.labelref = strdup(yytext+1); | ||
1029 | return DT_REF; | ||
1030 | } | ||
1031 | YY_BREAK | ||
1032 | case 12: | ||
1033 | YY_RULE_SETUP | ||
1034 | #line 169 "dtc-lexer.l" | ||
1035 | { | ||
1036 | yylloc.file = srcpos_file; | ||
1037 | yylloc.first_line = yylineno; | ||
1038 | yylval.byte = strtol(yytext, NULL, 16); | ||
1039 | DPRINT("Byte: %02x\n", (int)yylval.byte); | ||
1040 | return DT_BYTE; | ||
1041 | } | ||
1042 | YY_BREAK | ||
1043 | case 13: | ||
1044 | YY_RULE_SETUP | ||
1045 | #line 177 "dtc-lexer.l" | ||
1046 | { | ||
1047 | yylloc.file = srcpos_file; | ||
1048 | yylloc.first_line = yylineno; | ||
1049 | DPRINT("/BYTESTRING\n"); | ||
1050 | BEGIN_DEFAULT(); | ||
1051 | return ']'; | ||
1052 | } | ||
1053 | YY_BREAK | ||
1054 | case 14: | ||
1055 | YY_RULE_SETUP | ||
1056 | #line 185 "dtc-lexer.l" | ||
1057 | { | ||
1058 | yylloc.file = srcpos_file; | ||
1059 | yylloc.first_line = yylineno; | ||
1060 | DPRINT("PropNodeName: %s\n", yytext); | ||
1061 | yylval.propnodename = strdup(yytext); | ||
1062 | BEGIN_DEFAULT(); | ||
1063 | return DT_PROPNODENAME; | ||
1064 | } | ||
1065 | YY_BREAK | ||
1066 | case 15: | ||
1067 | YY_RULE_SETUP | ||
1068 | #line 194 "dtc-lexer.l" | ||
1069 | { | ||
1070 | yylloc.file = srcpos_file; | ||
1071 | yylloc.first_line = yylineno; | ||
1072 | DPRINT("Binary Include\n"); | ||
1073 | return DT_INCBIN; | ||
1074 | } | ||
1075 | YY_BREAK | ||
1076 | case 16: | ||
1077 | /* rule 16 can match eol */ | ||
1078 | YY_RULE_SETUP | ||
1079 | #line 201 "dtc-lexer.l" | ||
1080 | /* eat whitespace */ | ||
1081 | YY_BREAK | ||
1082 | case 17: | ||
1083 | /* rule 17 can match eol */ | ||
1084 | YY_RULE_SETUP | ||
1085 | #line 202 "dtc-lexer.l" | ||
1086 | /* eat C-style comments */ | ||
1087 | YY_BREAK | ||
1088 | case 18: | ||
1089 | /* rule 18 can match eol */ | ||
1090 | YY_RULE_SETUP | ||
1091 | #line 203 "dtc-lexer.l" | ||
1092 | /* eat C++-style comments */ | ||
1093 | YY_BREAK | ||
1094 | case 19: | ||
1095 | YY_RULE_SETUP | ||
1096 | #line 205 "dtc-lexer.l" | ||
1097 | { | ||
1098 | yylloc.file = srcpos_file; | ||
1099 | yylloc.first_line = yylineno; | ||
1100 | DPRINT("Char: %c (\\x%02x)\n", yytext[0], | ||
1101 | (unsigned)yytext[0]); | ||
1102 | if (yytext[0] == '[') { | ||
1103 | DPRINT("<BYTESTRING>\n"); | ||
1104 | BEGIN(BYTESTRING); | ||
1105 | } | ||
1106 | if ((yytext[0] == '{') | ||
1107 | || (yytext[0] == ';')) { | ||
1108 | DPRINT("<PROPNODENAME>\n"); | ||
1109 | BEGIN(PROPNODENAME); | ||
1110 | } | ||
1111 | return yytext[0]; | ||
1112 | } | ||
1113 | YY_BREAK | ||
1114 | case 20: | ||
1115 | YY_RULE_SETUP | ||
1116 | #line 222 "dtc-lexer.l" | ||
1117 | ECHO; | ||
1118 | YY_BREAK | ||
1119 | #line 1120 "dtc-lexer.lex.c" | ||
1120 | |||
1121 | case YY_END_OF_BUFFER: | ||
1122 | { | ||
1123 | /* Amount of text matched not including the EOB char. */ | ||
1124 | int yy_amount_of_matched_text = (int) (yy_cp - (yytext_ptr)) - 1; | ||
1125 | |||
1126 | /* Undo the effects of YY_DO_BEFORE_ACTION. */ | ||
1127 | *yy_cp = (yy_hold_char); | ||
1128 | YY_RESTORE_YY_MORE_OFFSET | ||
1129 | |||
1130 | if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_NEW ) | ||
1131 | { | ||
1132 | /* We're scanning a new file or input source. It's | ||
1133 | * possible that this happened because the user | ||
1134 | * just pointed yyin at a new source and called | ||
1135 | * yylex(). If so, then we have to assure | ||
1136 | * consistency between YY_CURRENT_BUFFER and our | ||
1137 | * globals. Here is the right place to do so, because | ||
1138 | * this is the first action (other than possibly a | ||
1139 | * back-up) that will match for the new input source. | ||
1140 | */ | ||
1141 | (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars; | ||
1142 | YY_CURRENT_BUFFER_LVALUE->yy_input_file = yyin; | ||
1143 | YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = YY_BUFFER_NORMAL; | ||
1144 | } | ||
1145 | |||
1146 | /* Note that here we test for yy_c_buf_p "<=" to the position | ||
1147 | * of the first EOB in the buffer, since yy_c_buf_p will | ||
1148 | * already have been incremented past the NUL character | ||
1149 | * (since all states make transitions on EOB to the | ||
1150 | * end-of-buffer state). Contrast this with the test | ||
1151 | * in input(). | ||
1152 | */ | ||
1153 | if ( (yy_c_buf_p) <= &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] ) | ||
1154 | { /* This was really a NUL. */ | ||
1155 | yy_state_type yy_next_state; | ||
1156 | |||
1157 | (yy_c_buf_p) = (yytext_ptr) + yy_amount_of_matched_text; | ||
1158 | |||
1159 | yy_current_state = yy_get_previous_state( ); | ||
1160 | |||
1161 | /* Okay, we're now positioned to make the NUL | ||
1162 | * transition. We couldn't have | ||
1163 | * yy_get_previous_state() go ahead and do it | ||
1164 | * for us because it doesn't know how to deal | ||
1165 | * with the possibility of jamming (and we don't | ||
1166 | * want to build jamming into it because then it | ||
1167 | * will run more slowly). | ||
1168 | */ | ||
1169 | |||
1170 | yy_next_state = yy_try_NUL_trans( yy_current_state ); | ||
1171 | |||
1172 | yy_bp = (yytext_ptr) + YY_MORE_ADJ; | ||
1173 | |||
1174 | if ( yy_next_state ) | ||
1175 | { | ||
1176 | /* Consume the NUL. */ | ||
1177 | yy_cp = ++(yy_c_buf_p); | ||
1178 | yy_current_state = yy_next_state; | ||
1179 | goto yy_match; | ||
1180 | } | ||
1181 | |||
1182 | else | ||
1183 | { | ||
1184 | yy_cp = (yy_c_buf_p); | ||
1185 | goto yy_find_action; | ||
1186 | } | ||
1187 | } | ||
1188 | |||
1189 | else switch ( yy_get_next_buffer( ) ) | ||
1190 | { | ||
1191 | case EOB_ACT_END_OF_FILE: | ||
1192 | { | ||
1193 | (yy_did_buffer_switch_on_eof) = 0; | ||
1194 | |||
1195 | if ( yywrap( ) ) | ||
1196 | { | ||
1197 | /* Note: because we've taken care in | ||
1198 | * yy_get_next_buffer() to have set up | ||
1199 | * yytext, we can now set up | ||
1200 | * yy_c_buf_p so that if some total | ||
1201 | * hoser (like flex itself) wants to | ||
1202 | * call the scanner after we return the | ||
1203 | * YY_NULL, it'll still work - another | ||
1204 | * YY_NULL will get returned. | ||
1205 | */ | ||
1206 | (yy_c_buf_p) = (yytext_ptr) + YY_MORE_ADJ; | ||
1207 | |||
1208 | yy_act = YY_STATE_EOF(YY_START); | ||
1209 | goto do_action; | ||
1210 | } | ||
1211 | |||
1212 | else | ||
1213 | { | ||
1214 | if ( ! (yy_did_buffer_switch_on_eof) ) | ||
1215 | YY_NEW_FILE; | ||
1216 | } | ||
1217 | break; | ||
1218 | } | ||
1219 | |||
1220 | case EOB_ACT_CONTINUE_SCAN: | ||
1221 | (yy_c_buf_p) = | ||
1222 | (yytext_ptr) + yy_amount_of_matched_text; | ||
1223 | |||
1224 | yy_current_state = yy_get_previous_state( ); | ||
1225 | |||
1226 | yy_cp = (yy_c_buf_p); | ||
1227 | yy_bp = (yytext_ptr) + YY_MORE_ADJ; | ||
1228 | goto yy_match; | ||
1229 | |||
1230 | case EOB_ACT_LAST_MATCH: | ||
1231 | (yy_c_buf_p) = | ||
1232 | &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)]; | ||
1233 | |||
1234 | yy_current_state = yy_get_previous_state( ); | ||
1235 | |||
1236 | yy_cp = (yy_c_buf_p); | ||
1237 | yy_bp = (yytext_ptr) + YY_MORE_ADJ; | ||
1238 | goto yy_find_action; | ||
1239 | } | ||
1240 | break; | ||
1241 | } | ||
1242 | |||
1243 | default: | ||
1244 | YY_FATAL_ERROR( | ||
1245 | "fatal flex scanner internal error--no action found" ); | ||
1246 | } /* end of action switch */ | ||
1247 | } /* end of scanning one token */ | ||
1248 | } /* end of yylex */ | ||
1249 | |||
1250 | /* yy_get_next_buffer - try to read in a new buffer | ||
1251 | * | ||
1252 | * Returns a code representing an action: | ||
1253 | * EOB_ACT_LAST_MATCH - | ||
1254 | * EOB_ACT_CONTINUE_SCAN - continue scanning from current position | ||
1255 | * EOB_ACT_END_OF_FILE - end of file | ||
1256 | */ | ||
1257 | static int yy_get_next_buffer (void) | ||
1258 | { | ||
1259 | register char *dest = YY_CURRENT_BUFFER_LVALUE->yy_ch_buf; | ||
1260 | register char *source = (yytext_ptr); | ||
1261 | register int number_to_move, i; | ||
1262 | int ret_val; | ||
1263 | |||
1264 | if ( (yy_c_buf_p) > &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] ) | ||
1265 | YY_FATAL_ERROR( | ||
1266 | "fatal flex scanner internal error--end of buffer missed" ); | ||
1267 | |||
1268 | if ( YY_CURRENT_BUFFER_LVALUE->yy_fill_buffer == 0 ) | ||
1269 | { /* Don't try to fill the buffer, so this is an EOF. */ | ||
1270 | if ( (yy_c_buf_p) - (yytext_ptr) - YY_MORE_ADJ == 1 ) | ||
1271 | { | ||
1272 | /* We matched a single character, the EOB, so | ||
1273 | * treat this as a final EOF. | ||
1274 | */ | ||
1275 | return EOB_ACT_END_OF_FILE; | ||
1276 | } | ||
1277 | |||
1278 | else | ||
1279 | { | ||
1280 | /* We matched some text prior to the EOB, first | ||
1281 | * process it. | ||
1282 | */ | ||
1283 | return EOB_ACT_LAST_MATCH; | ||
1284 | } | ||
1285 | } | ||
1286 | |||
1287 | /* Try to read more data. */ | ||
1288 | |||
1289 | /* First move last chars to start of buffer. */ | ||
1290 | number_to_move = (int) ((yy_c_buf_p) - (yytext_ptr)) - 1; | ||
1291 | |||
1292 | for ( i = 0; i < number_to_move; ++i ) | ||
1293 | *(dest++) = *(source++); | ||
1294 | |||
1295 | if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_EOF_PENDING ) | ||
1296 | /* don't do the read, it's not guaranteed to return an EOF, | ||
1297 | * just force an EOF | ||
1298 | */ | ||
1299 | YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars) = 0; | ||
1300 | |||
1301 | else | ||
1302 | { | ||
1303 | int num_to_read = | ||
1304 | YY_CURRENT_BUFFER_LVALUE->yy_buf_size - number_to_move - 1; | ||
1305 | |||
1306 | while ( num_to_read <= 0 ) | ||
1307 | { /* Not enough room in the buffer - grow it. */ | ||
1308 | |||
1309 | /* just a shorter name for the current buffer */ | ||
1310 | YY_BUFFER_STATE b = YY_CURRENT_BUFFER; | ||
1311 | |||
1312 | int yy_c_buf_p_offset = | ||
1313 | (int) ((yy_c_buf_p) - b->yy_ch_buf); | ||
1314 | |||
1315 | if ( b->yy_is_our_buffer ) | ||
1316 | { | ||
1317 | int new_size = b->yy_buf_size * 2; | ||
1318 | |||
1319 | if ( new_size <= 0 ) | ||
1320 | b->yy_buf_size += b->yy_buf_size / 8; | ||
1321 | else | ||
1322 | b->yy_buf_size *= 2; | ||
1323 | |||
1324 | b->yy_ch_buf = (char *) | ||
1325 | /* Include room in for 2 EOB chars. */ | ||
1326 | yyrealloc((void *) b->yy_ch_buf,b->yy_buf_size + 2 ); | ||
1327 | } | ||
1328 | else | ||
1329 | /* Can't grow it, we don't own it. */ | ||
1330 | b->yy_ch_buf = 0; | ||
1331 | |||
1332 | if ( ! b->yy_ch_buf ) | ||
1333 | YY_FATAL_ERROR( | ||
1334 | "fatal error - scanner input buffer overflow" ); | ||
1335 | |||
1336 | (yy_c_buf_p) = &b->yy_ch_buf[yy_c_buf_p_offset]; | ||
1337 | |||
1338 | num_to_read = YY_CURRENT_BUFFER_LVALUE->yy_buf_size - | ||
1339 | number_to_move - 1; | ||
1340 | |||
1341 | } | ||
1342 | |||
1343 | if ( num_to_read > YY_READ_BUF_SIZE ) | ||
1344 | num_to_read = YY_READ_BUF_SIZE; | ||
1345 | |||
1346 | /* Read in more data. */ | ||
1347 | YY_INPUT( (&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]), | ||
1348 | (yy_n_chars), (size_t) num_to_read ); | ||
1349 | |||
1350 | YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); | ||
1351 | } | ||
1352 | |||
1353 | if ( (yy_n_chars) == 0 ) | ||
1354 | { | ||
1355 | if ( number_to_move == YY_MORE_ADJ ) | ||
1356 | { | ||
1357 | ret_val = EOB_ACT_END_OF_FILE; | ||
1358 | yyrestart(yyin ); | ||
1359 | } | ||
1360 | |||
1361 | else | ||
1362 | { | ||
1363 | ret_val = EOB_ACT_LAST_MATCH; | ||
1364 | YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = | ||
1365 | YY_BUFFER_EOF_PENDING; | ||
1366 | } | ||
1367 | } | ||
1368 | |||
1369 | else | ||
1370 | ret_val = EOB_ACT_CONTINUE_SCAN; | ||
1371 | |||
1372 | if ((yy_size_t) ((yy_n_chars) + number_to_move) > YY_CURRENT_BUFFER_LVALUE->yy_buf_size) { | ||
1373 | /* Extend the array by 50%, plus the number we really need. */ | ||
1374 | yy_size_t new_size = (yy_n_chars) + number_to_move + ((yy_n_chars) >> 1); | ||
1375 | YY_CURRENT_BUFFER_LVALUE->yy_ch_buf = (char *) yyrealloc((void *) YY_CURRENT_BUFFER_LVALUE->yy_ch_buf,new_size ); | ||
1376 | if ( ! YY_CURRENT_BUFFER_LVALUE->yy_ch_buf ) | ||
1377 | YY_FATAL_ERROR( "out of dynamic memory in yy_get_next_buffer()" ); | ||
1378 | } | ||
1379 | |||
1380 | (yy_n_chars) += number_to_move; | ||
1381 | YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] = YY_END_OF_BUFFER_CHAR; | ||
1382 | YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] = YY_END_OF_BUFFER_CHAR; | ||
1383 | |||
1384 | (yytext_ptr) = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[0]; | ||
1385 | |||
1386 | return ret_val; | ||
1387 | } | ||
1388 | |||
1389 | /* yy_get_previous_state - get the state just before the EOB char was reached */ | ||
1390 | |||
1391 | static yy_state_type yy_get_previous_state (void) | ||
1392 | { | ||
1393 | register yy_state_type yy_current_state; | ||
1394 | register char *yy_cp; | ||
1395 | |||
1396 | yy_current_state = (yy_start); | ||
1397 | |||
1398 | for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp ) | ||
1399 | { | ||
1400 | register YY_CHAR yy_c = (*yy_cp ? yy_ec[YY_SC_TO_UI(*yy_cp)] : 1); | ||
1401 | if ( yy_accept[yy_current_state] ) | ||
1402 | { | ||
1403 | (yy_last_accepting_state) = yy_current_state; | ||
1404 | (yy_last_accepting_cpos) = yy_cp; | ||
1405 | } | ||
1406 | while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) | ||
1407 | { | ||
1408 | yy_current_state = (int) yy_def[yy_current_state]; | ||
1409 | if ( yy_current_state >= 104 ) | ||
1410 | yy_c = yy_meta[(unsigned int) yy_c]; | ||
1411 | } | ||
1412 | yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; | ||
1413 | } | ||
1414 | |||
1415 | return yy_current_state; | ||
1416 | } | ||
1417 | |||
1418 | /* yy_try_NUL_trans - try to make a transition on the NUL character | ||
1419 | * | ||
1420 | * synopsis | ||
1421 | * next_state = yy_try_NUL_trans( current_state ); | ||
1422 | */ | ||
1423 | static yy_state_type yy_try_NUL_trans (yy_state_type yy_current_state ) | ||
1424 | { | ||
1425 | register int yy_is_jam; | ||
1426 | register char *yy_cp = (yy_c_buf_p); | ||
1427 | |||
1428 | register YY_CHAR yy_c = 1; | ||
1429 | if ( yy_accept[yy_current_state] ) | ||
1430 | { | ||
1431 | (yy_last_accepting_state) = yy_current_state; | ||
1432 | (yy_last_accepting_cpos) = yy_cp; | ||
1433 | } | ||
1434 | while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state ) | ||
1435 | { | ||
1436 | yy_current_state = (int) yy_def[yy_current_state]; | ||
1437 | if ( yy_current_state >= 104 ) | ||
1438 | yy_c = yy_meta[(unsigned int) yy_c]; | ||
1439 | } | ||
1440 | yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c]; | ||
1441 | yy_is_jam = (yy_current_state == 103); | ||
1442 | |||
1443 | return yy_is_jam ? 0 : yy_current_state; | ||
1444 | } | ||
1445 | |||
1446 | #ifndef YY_NO_INPUT | ||
1447 | #ifdef __cplusplus | ||
1448 | static int yyinput (void) | ||
1449 | #else | ||
1450 | static int input (void) | ||
1451 | #endif | ||
1452 | |||
1453 | { | ||
1454 | int c; | ||
1455 | |||
1456 | *(yy_c_buf_p) = (yy_hold_char); | ||
1457 | |||
1458 | if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR ) | ||
1459 | { | ||
1460 | /* yy_c_buf_p now points to the character we want to return. | ||
1461 | * If this occurs *before* the EOB characters, then it's a | ||
1462 | * valid NUL; if not, then we've hit the end of the buffer. | ||
1463 | */ | ||
1464 | if ( (yy_c_buf_p) < &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] ) | ||
1465 | /* This was really a NUL. */ | ||
1466 | *(yy_c_buf_p) = '\0'; | ||
1467 | |||
1468 | else | ||
1469 | { /* need more input */ | ||
1470 | int offset = (yy_c_buf_p) - (yytext_ptr); | ||
1471 | ++(yy_c_buf_p); | ||
1472 | |||
1473 | switch ( yy_get_next_buffer( ) ) | ||
1474 | { | ||
1475 | case EOB_ACT_LAST_MATCH: | ||
1476 | /* This happens because yy_g_n_b() | ||
1477 | * sees that we've accumulated a | ||
1478 | * token and flags that we need to | ||
1479 | * try matching the token before | ||
1480 | * proceeding. But for input(), | ||
1481 | * there's no matching to consider. | ||
1482 | * So convert the EOB_ACT_LAST_MATCH | ||
1483 | * to EOB_ACT_END_OF_FILE. | ||
1484 | */ | ||
1485 | |||
1486 | /* Reset buffer status. */ | ||
1487 | yyrestart(yyin ); | ||
1488 | |||
1489 | /*FALLTHROUGH*/ | ||
1490 | |||
1491 | case EOB_ACT_END_OF_FILE: | ||
1492 | { | ||
1493 | if ( yywrap( ) ) | ||
1494 | return EOF; | ||
1495 | |||
1496 | if ( ! (yy_did_buffer_switch_on_eof) ) | ||
1497 | YY_NEW_FILE; | ||
1498 | #ifdef __cplusplus | ||
1499 | return yyinput(); | ||
1500 | #else | ||
1501 | return input(); | ||
1502 | #endif | ||
1503 | } | ||
1504 | |||
1505 | case EOB_ACT_CONTINUE_SCAN: | ||
1506 | (yy_c_buf_p) = (yytext_ptr) + offset; | ||
1507 | break; | ||
1508 | } | ||
1509 | } | ||
1510 | } | ||
1511 | |||
1512 | c = *(unsigned char *) (yy_c_buf_p); /* cast for 8-bit char's */ | ||
1513 | *(yy_c_buf_p) = '\0'; /* preserve yytext */ | ||
1514 | (yy_hold_char) = *++(yy_c_buf_p); | ||
1515 | |||
1516 | if ( c == '\n' ) | ||
1517 | |||
1518 | yylineno++; | ||
1519 | ; | ||
1520 | |||
1521 | return c; | ||
1522 | } | ||
1523 | #endif /* ifndef YY_NO_INPUT */ | ||
1524 | |||
1525 | /** Immediately switch to a different input stream. | ||
1526 | * @param input_file A readable stream. | ||
1527 | * | ||
1528 | * @note This function does not reset the start condition to @c INITIAL . | ||
1529 | */ | ||
1530 | void yyrestart (FILE * input_file ) | ||
1531 | { | ||
1532 | |||
1533 | if ( ! YY_CURRENT_BUFFER ){ | ||
1534 | yyensure_buffer_stack (); | ||
1535 | YY_CURRENT_BUFFER_LVALUE = | ||
1536 | yy_create_buffer(yyin,YY_BUF_SIZE ); | ||
1537 | } | ||
1538 | |||
1539 | yy_init_buffer(YY_CURRENT_BUFFER,input_file ); | ||
1540 | yy_load_buffer_state( ); | ||
1541 | } | ||
1542 | |||
1543 | /** Switch to a different input buffer. | ||
1544 | * @param new_buffer The new input buffer. | ||
1545 | * | ||
1546 | */ | ||
1547 | void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer ) | ||
1548 | { | ||
1549 | |||
1550 | /* TODO. We should be able to replace this entire function body | ||
1551 | * with | ||
1552 | * yypop_buffer_state(); | ||
1553 | * yypush_buffer_state(new_buffer); | ||
1554 | */ | ||
1555 | yyensure_buffer_stack (); | ||
1556 | if ( YY_CURRENT_BUFFER == new_buffer ) | ||
1557 | return; | ||
1558 | |||
1559 | if ( YY_CURRENT_BUFFER ) | ||
1560 | { | ||
1561 | /* Flush out information for old buffer. */ | ||
1562 | *(yy_c_buf_p) = (yy_hold_char); | ||
1563 | YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p); | ||
1564 | YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); | ||
1565 | } | ||
1566 | |||
1567 | YY_CURRENT_BUFFER_LVALUE = new_buffer; | ||
1568 | yy_load_buffer_state( ); | ||
1569 | |||
1570 | /* We don't actually know whether we did this switch during | ||
1571 | * EOF (yywrap()) processing, but the only time this flag | ||
1572 | * is looked at is after yywrap() is called, so it's safe | ||
1573 | * to go ahead and always set it. | ||
1574 | */ | ||
1575 | (yy_did_buffer_switch_on_eof) = 1; | ||
1576 | } | ||
1577 | |||
1578 | static void yy_load_buffer_state (void) | ||
1579 | { | ||
1580 | (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars; | ||
1581 | (yytext_ptr) = (yy_c_buf_p) = YY_CURRENT_BUFFER_LVALUE->yy_buf_pos; | ||
1582 | yyin = YY_CURRENT_BUFFER_LVALUE->yy_input_file; | ||
1583 | (yy_hold_char) = *(yy_c_buf_p); | ||
1584 | } | ||
1585 | |||
1586 | /** Allocate and initialize an input buffer state. | ||
1587 | * @param file A readable stream. | ||
1588 | * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE. | ||
1589 | * | ||
1590 | * @return the allocated buffer state. | ||
1591 | */ | ||
1592 | YY_BUFFER_STATE yy_create_buffer (FILE * file, int size ) | ||
1593 | { | ||
1594 | YY_BUFFER_STATE b; | ||
1595 | |||
1596 | b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state ) ); | ||
1597 | if ( ! b ) | ||
1598 | YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" ); | ||
1599 | |||
1600 | b->yy_buf_size = size; | ||
1601 | |||
1602 | /* yy_ch_buf has to be 2 characters longer than the size given because | ||
1603 | * we need to put in 2 end-of-buffer characters. | ||
1604 | */ | ||
1605 | b->yy_ch_buf = (char *) yyalloc(b->yy_buf_size + 2 ); | ||
1606 | if ( ! b->yy_ch_buf ) | ||
1607 | YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" ); | ||
1608 | |||
1609 | b->yy_is_our_buffer = 1; | ||
1610 | |||
1611 | yy_init_buffer(b,file ); | ||
1612 | |||
1613 | return b; | ||
1614 | } | ||
1615 | |||
1616 | /** Destroy the buffer. | ||
1617 | * @param b a buffer created with yy_create_buffer() | ||
1618 | * | ||
1619 | */ | ||
1620 | void yy_delete_buffer (YY_BUFFER_STATE b ) | ||
1621 | { | ||
1622 | |||
1623 | if ( ! b ) | ||
1624 | return; | ||
1625 | |||
1626 | if ( b == YY_CURRENT_BUFFER ) /* Not sure if we should pop here. */ | ||
1627 | YY_CURRENT_BUFFER_LVALUE = (YY_BUFFER_STATE) 0; | ||
1628 | |||
1629 | if ( b->yy_is_our_buffer ) | ||
1630 | yyfree((void *) b->yy_ch_buf ); | ||
1631 | |||
1632 | yyfree((void *) b ); | ||
1633 | } | ||
1634 | |||
1635 | #ifndef __cplusplus | ||
1636 | extern int isatty (int ); | ||
1637 | #endif /* __cplusplus */ | ||
1638 | |||
1639 | /* Initializes or reinitializes a buffer. | ||
1640 | * This function is sometimes called more than once on the same buffer, | ||
1641 | * such as during a yyrestart() or at EOF. | ||
1642 | */ | ||
1643 | static void yy_init_buffer (YY_BUFFER_STATE b, FILE * file ) | ||
1644 | |||
1645 | { | ||
1646 | int oerrno = errno; | ||
1647 | |||
1648 | yy_flush_buffer(b ); | ||
1649 | |||
1650 | b->yy_input_file = file; | ||
1651 | b->yy_fill_buffer = 1; | ||
1652 | |||
1653 | /* If b is the current buffer, then yy_init_buffer was _probably_ | ||
1654 | * called from yyrestart() or through yy_get_next_buffer. | ||
1655 | * In that case, we don't want to reset the lineno or column. | ||
1656 | */ | ||
1657 | if (b != YY_CURRENT_BUFFER){ | ||
1658 | b->yy_bs_lineno = 1; | ||
1659 | b->yy_bs_column = 0; | ||
1660 | } | ||
1661 | |||
1662 | b->yy_is_interactive = file ? (isatty( fileno(file) ) > 0) : 0; | ||
1663 | |||
1664 | errno = oerrno; | ||
1665 | } | ||
1666 | |||
1667 | /** Discard all buffered characters. On the next scan, YY_INPUT will be called. | ||
1668 | * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER. | ||
1669 | * | ||
1670 | */ | ||
1671 | void yy_flush_buffer (YY_BUFFER_STATE b ) | ||
1672 | { | ||
1673 | if ( ! b ) | ||
1674 | return; | ||
1675 | |||
1676 | b->yy_n_chars = 0; | ||
1677 | |||
1678 | /* We always need two end-of-buffer characters. The first causes | ||
1679 | * a transition to the end-of-buffer state. The second causes | ||
1680 | * a jam in that state. | ||
1681 | */ | ||
1682 | b->yy_ch_buf[0] = YY_END_OF_BUFFER_CHAR; | ||
1683 | b->yy_ch_buf[1] = YY_END_OF_BUFFER_CHAR; | ||
1684 | |||
1685 | b->yy_buf_pos = &b->yy_ch_buf[0]; | ||
1686 | |||
1687 | b->yy_at_bol = 1; | ||
1688 | b->yy_buffer_status = YY_BUFFER_NEW; | ||
1689 | |||
1690 | if ( b == YY_CURRENT_BUFFER ) | ||
1691 | yy_load_buffer_state( ); | ||
1692 | } | ||
1693 | |||
1694 | /** Pushes the new state onto the stack. The new state becomes | ||
1695 | * the current state. This function will allocate the stack | ||
1696 | * if necessary. | ||
1697 | * @param new_buffer The new state. | ||
1698 | * | ||
1699 | */ | ||
1700 | void yypush_buffer_state (YY_BUFFER_STATE new_buffer ) | ||
1701 | { | ||
1702 | if (new_buffer == NULL) | ||
1703 | return; | ||
1704 | |||
1705 | yyensure_buffer_stack(); | ||
1706 | |||
1707 | /* This block is copied from yy_switch_to_buffer. */ | ||
1708 | if ( YY_CURRENT_BUFFER ) | ||
1709 | { | ||
1710 | /* Flush out information for old buffer. */ | ||
1711 | *(yy_c_buf_p) = (yy_hold_char); | ||
1712 | YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p); | ||
1713 | YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars); | ||
1714 | } | ||
1715 | |||
1716 | /* Only push if top exists. Otherwise, replace top. */ | ||
1717 | if (YY_CURRENT_BUFFER) | ||
1718 | (yy_buffer_stack_top)++; | ||
1719 | YY_CURRENT_BUFFER_LVALUE = new_buffer; | ||
1720 | |||
1721 | /* copied from yy_switch_to_buffer. */ | ||
1722 | yy_load_buffer_state( ); | ||
1723 | (yy_did_buffer_switch_on_eof) = 1; | ||
1724 | } | ||
1725 | |||
1726 | /** Removes and deletes the top of the stack, if present. | ||
1727 | * The next element becomes the new top. | ||
1728 | * | ||
1729 | */ | ||
1730 | void yypop_buffer_state (void) | ||
1731 | { | ||
1732 | if (!YY_CURRENT_BUFFER) | ||
1733 | return; | ||
1734 | |||
1735 | yy_delete_buffer(YY_CURRENT_BUFFER ); | ||
1736 | YY_CURRENT_BUFFER_LVALUE = NULL; | ||
1737 | if ((yy_buffer_stack_top) > 0) | ||
1738 | --(yy_buffer_stack_top); | ||
1739 | |||
1740 | if (YY_CURRENT_BUFFER) { | ||
1741 | yy_load_buffer_state( ); | ||
1742 | (yy_did_buffer_switch_on_eof) = 1; | ||
1743 | } | ||
1744 | } | ||
1745 | |||
1746 | /* Allocates the stack if it does not exist. | ||
1747 | * Guarantees space for at least one push. | ||
1748 | */ | ||
1749 | static void yyensure_buffer_stack (void) | ||
1750 | { | ||
1751 | int num_to_alloc; | ||
1752 | |||
1753 | if (!(yy_buffer_stack)) { | ||
1754 | |||
1755 | /* First allocation is just for 2 elements, since we don't know if this | ||
1756 | * scanner will even need a stack. We use 2 instead of 1 to avoid an | ||
1757 | * immediate realloc on the next call. | ||
1758 | */ | ||
1759 | num_to_alloc = 1; | ||
1760 | (yy_buffer_stack) = (struct yy_buffer_state**)yyalloc | ||
1761 | (num_to_alloc * sizeof(struct yy_buffer_state*) | ||
1762 | ); | ||
1763 | if ( ! (yy_buffer_stack) ) | ||
1764 | YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" ); | ||
1765 | |||
1766 | memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*)); | ||
1767 | |||
1768 | (yy_buffer_stack_max) = num_to_alloc; | ||
1769 | (yy_buffer_stack_top) = 0; | ||
1770 | return; | ||
1771 | } | ||
1772 | |||
1773 | if ((yy_buffer_stack_top) >= ((yy_buffer_stack_max)) - 1){ | ||
1774 | |||
1775 | /* Increase the buffer to prepare for a possible push. */ | ||
1776 | int grow_size = 8 /* arbitrary grow size */; | ||
1777 | |||
1778 | num_to_alloc = (yy_buffer_stack_max) + grow_size; | ||
1779 | (yy_buffer_stack) = (struct yy_buffer_state**)yyrealloc | ||
1780 | ((yy_buffer_stack), | ||
1781 | num_to_alloc * sizeof(struct yy_buffer_state*) | ||
1782 | ); | ||
1783 | if ( ! (yy_buffer_stack) ) | ||
1784 | YY_FATAL_ERROR( "out of dynamic memory in yyensure_buffer_stack()" ); | ||
1785 | |||
1786 | /* zero only the new slots.*/ | ||
1787 | memset((yy_buffer_stack) + (yy_buffer_stack_max), 0, grow_size * sizeof(struct yy_buffer_state*)); | ||
1788 | (yy_buffer_stack_max) = num_to_alloc; | ||
1789 | } | ||
1790 | } | ||
1791 | |||
1792 | /** Setup the input buffer state to scan directly from a user-specified character buffer. | ||
1793 | * @param base the character buffer | ||
1794 | * @param size the size in bytes of the character buffer | ||
1795 | * | ||
1796 | * @return the newly allocated buffer state object. | ||
1797 | */ | ||
1798 | YY_BUFFER_STATE yy_scan_buffer (char * base, yy_size_t size ) | ||
1799 | { | ||
1800 | YY_BUFFER_STATE b; | ||
1801 | |||
1802 | if ( size < 2 || | ||
1803 | base[size-2] != YY_END_OF_BUFFER_CHAR || | ||
1804 | base[size-1] != YY_END_OF_BUFFER_CHAR ) | ||
1805 | /* They forgot to leave room for the EOB's. */ | ||
1806 | return 0; | ||
1807 | |||
1808 | b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state ) ); | ||
1809 | if ( ! b ) | ||
1810 | YY_FATAL_ERROR( "out of dynamic memory in yy_scan_buffer()" ); | ||
1811 | |||
1812 | b->yy_buf_size = size - 2; /* "- 2" to take care of EOB's */ | ||
1813 | b->yy_buf_pos = b->yy_ch_buf = base; | ||
1814 | b->yy_is_our_buffer = 0; | ||
1815 | b->yy_input_file = 0; | ||
1816 | b->yy_n_chars = b->yy_buf_size; | ||
1817 | b->yy_is_interactive = 0; | ||
1818 | b->yy_at_bol = 1; | ||
1819 | b->yy_fill_buffer = 0; | ||
1820 | b->yy_buffer_status = YY_BUFFER_NEW; | ||
1821 | |||
1822 | yy_switch_to_buffer(b ); | ||
1823 | |||
1824 | return b; | ||
1825 | } | ||
1826 | |||
1827 | /** Setup the input buffer state to scan a string. The next call to yylex() will | ||
1828 | * scan from a @e copy of @a str. | ||
1829 | * @param yystr a NUL-terminated string to scan | ||
1830 | * | ||
1831 | * @return the newly allocated buffer state object. | ||
1832 | * @note If you want to scan bytes that may contain NUL values, then use | ||
1833 | * yy_scan_bytes() instead. | ||
1834 | */ | ||
1835 | YY_BUFFER_STATE yy_scan_string (yyconst char * yystr ) | ||
1836 | { | ||
1837 | |||
1838 | return yy_scan_bytes(yystr,strlen(yystr) ); | ||
1839 | } | ||
1840 | |||
1841 | /** Setup the input buffer state to scan the given bytes. The next call to yylex() will | ||
1842 | * scan from a @e copy of @a bytes. | ||
1843 | * @param bytes the byte buffer to scan | ||
1844 | * @param len the number of bytes in the buffer pointed to by @a bytes. | ||
1845 | * | ||
1846 | * @return the newly allocated buffer state object. | ||
1847 | */ | ||
1848 | YY_BUFFER_STATE yy_scan_bytes (yyconst char * yybytes, int _yybytes_len ) | ||
1849 | { | ||
1850 | YY_BUFFER_STATE b; | ||
1851 | char *buf; | ||
1852 | yy_size_t n; | ||
1853 | int i; | ||
1854 | |||
1855 | /* Get memory for full buffer, including space for trailing EOB's. */ | ||
1856 | n = _yybytes_len + 2; | ||
1857 | buf = (char *) yyalloc(n ); | ||
1858 | if ( ! buf ) | ||
1859 | YY_FATAL_ERROR( "out of dynamic memory in yy_scan_bytes()" ); | ||
1860 | |||
1861 | for ( i = 0; i < _yybytes_len; ++i ) | ||
1862 | buf[i] = yybytes[i]; | ||
1863 | |||
1864 | buf[_yybytes_len] = buf[_yybytes_len+1] = YY_END_OF_BUFFER_CHAR; | ||
1865 | |||
1866 | b = yy_scan_buffer(buf,n ); | ||
1867 | if ( ! b ) | ||
1868 | YY_FATAL_ERROR( "bad buffer in yy_scan_bytes()" ); | ||
1869 | |||
1870 | /* It's okay to grow etc. this buffer, and we should throw it | ||
1871 | * away when we're done. | ||
1872 | */ | ||
1873 | b->yy_is_our_buffer = 1; | ||
1874 | |||
1875 | return b; | ||
1876 | } | ||
1877 | |||
1878 | #ifndef YY_EXIT_FAILURE | ||
1879 | #define YY_EXIT_FAILURE 2 | ||
1880 | #endif | ||
1881 | |||
1882 | static void yy_fatal_error (yyconst char* msg ) | ||
1883 | { | ||
1884 | (void) fprintf( stderr, "%s\n", msg ); | ||
1885 | exit( YY_EXIT_FAILURE ); | ||
1886 | } | ||
1887 | |||
1888 | /* Redefine yyless() so it works in section 3 code. */ | ||
1889 | |||
1890 | #undef yyless | ||
1891 | #define yyless(n) \ | ||
1892 | do \ | ||
1893 | { \ | ||
1894 | /* Undo effects of setting up yytext. */ \ | ||
1895 | int yyless_macro_arg = (n); \ | ||
1896 | YY_LESS_LINENO(yyless_macro_arg);\ | ||
1897 | yytext[yyleng] = (yy_hold_char); \ | ||
1898 | (yy_c_buf_p) = yytext + yyless_macro_arg; \ | ||
1899 | (yy_hold_char) = *(yy_c_buf_p); \ | ||
1900 | *(yy_c_buf_p) = '\0'; \ | ||
1901 | yyleng = yyless_macro_arg; \ | ||
1902 | } \ | ||
1903 | while ( 0 ) | ||
1904 | |||
1905 | /* Accessor methods (get/set functions) to struct members. */ | ||
1906 | |||
1907 | /** Get the current line number. | ||
1908 | * | ||
1909 | */ | ||
1910 | int yyget_lineno (void) | ||
1911 | { | ||
1912 | |||
1913 | return yylineno; | ||
1914 | } | ||
1915 | |||
1916 | /** Get the input stream. | ||
1917 | * | ||
1918 | */ | ||
1919 | FILE *yyget_in (void) | ||
1920 | { | ||
1921 | return yyin; | ||
1922 | } | ||
1923 | |||
1924 | /** Get the output stream. | ||
1925 | * | ||
1926 | */ | ||
1927 | FILE *yyget_out (void) | ||
1928 | { | ||
1929 | return yyout; | ||
1930 | } | ||
1931 | |||
1932 | /** Get the length of the current token. | ||
1933 | * | ||
1934 | */ | ||
1935 | int yyget_leng (void) | ||
1936 | { | ||
1937 | return yyleng; | ||
1938 | } | ||
1939 | |||
1940 | /** Get the current token. | ||
1941 | * | ||
1942 | */ | ||
1943 | |||
1944 | char *yyget_text (void) | ||
1945 | { | ||
1946 | return yytext; | ||
1947 | } | ||
1948 | |||
1949 | /** Set the current line number. | ||
1950 | * @param line_number | ||
1951 | * | ||
1952 | */ | ||
1953 | void yyset_lineno (int line_number ) | ||
1954 | { | ||
1955 | |||
1956 | yylineno = line_number; | ||
1957 | } | ||
1958 | |||
1959 | /** Set the input stream. This does not discard the current | ||
1960 | * input buffer. | ||
1961 | * @param in_str A readable stream. | ||
1962 | * | ||
1963 | * @see yy_switch_to_buffer | ||
1964 | */ | ||
1965 | void yyset_in (FILE * in_str ) | ||
1966 | { | ||
1967 | yyin = in_str ; | ||
1968 | } | ||
1969 | |||
1970 | void yyset_out (FILE * out_str ) | ||
1971 | { | ||
1972 | yyout = out_str ; | ||
1973 | } | ||
1974 | |||
1975 | int yyget_debug (void) | ||
1976 | { | ||
1977 | return yy_flex_debug; | ||
1978 | } | ||
1979 | |||
1980 | void yyset_debug (int bdebug ) | ||
1981 | { | ||
1982 | yy_flex_debug = bdebug ; | ||
1983 | } | ||
1984 | |||
1985 | static int yy_init_globals (void) | ||
1986 | { | ||
1987 | /* Initialization is the same as for the non-reentrant scanner. | ||
1988 | * This function is called from yylex_destroy(), so don't allocate here. | ||
1989 | */ | ||
1990 | |||
1991 | /* We do not touch yylineno unless the option is enabled. */ | ||
1992 | yylineno = 1; | ||
1993 | |||
1994 | (yy_buffer_stack) = 0; | ||
1995 | (yy_buffer_stack_top) = 0; | ||
1996 | (yy_buffer_stack_max) = 0; | ||
1997 | (yy_c_buf_p) = (char *) 0; | ||
1998 | (yy_init) = 0; | ||
1999 | (yy_start) = 0; | ||
2000 | |||
2001 | /* Defined in main.c */ | ||
2002 | #ifdef YY_STDINIT | ||
2003 | yyin = stdin; | ||
2004 | yyout = stdout; | ||
2005 | #else | ||
2006 | yyin = (FILE *) 0; | ||
2007 | yyout = (FILE *) 0; | ||
2008 | #endif | ||
2009 | |||
2010 | /* For future reference: Set errno on error, since we are called by | ||
2011 | * yylex_init() | ||
2012 | */ | ||
2013 | return 0; | ||
2014 | } | ||
2015 | |||
2016 | /* yylex_destroy is for both reentrant and non-reentrant scanners. */ | ||
2017 | int yylex_destroy (void) | ||
2018 | { | ||
2019 | |||
2020 | /* Pop the buffer stack, destroying each element. */ | ||
2021 | while(YY_CURRENT_BUFFER){ | ||
2022 | yy_delete_buffer(YY_CURRENT_BUFFER ); | ||
2023 | YY_CURRENT_BUFFER_LVALUE = NULL; | ||
2024 | yypop_buffer_state(); | ||
2025 | } | ||
2026 | |||
2027 | /* Destroy the stack itself. */ | ||
2028 | yyfree((yy_buffer_stack) ); | ||
2029 | (yy_buffer_stack) = NULL; | ||
2030 | |||
2031 | /* Reset the globals. This is important in a non-reentrant scanner so the next time | ||
2032 | * yylex() is called, initialization will occur. */ | ||
2033 | yy_init_globals( ); | ||
2034 | |||
2035 | return 0; | ||
2036 | } | ||
2037 | |||
2038 | /* | ||
2039 | * Internal utility routines. | ||
2040 | */ | ||
2041 | |||
2042 | #ifndef yytext_ptr | ||
2043 | static void yy_flex_strncpy (char* s1, yyconst char * s2, int n ) | ||
2044 | { | ||
2045 | register int i; | ||
2046 | for ( i = 0; i < n; ++i ) | ||
2047 | s1[i] = s2[i]; | ||
2048 | } | ||
2049 | #endif | ||
2050 | |||
2051 | #ifdef YY_NEED_STRLEN | ||
2052 | static int yy_flex_strlen (yyconst char * s ) | ||
2053 | { | ||
2054 | register int n; | ||
2055 | for ( n = 0; s[n]; ++n ) | ||
2056 | ; | ||
2057 | |||
2058 | return n; | ||
2059 | } | ||
2060 | #endif | ||
2061 | |||
2062 | void *yyalloc (yy_size_t size ) | ||
2063 | { | ||
2064 | return (void *) malloc( size ); | ||
2065 | } | ||
2066 | |||
2067 | void *yyrealloc (void * ptr, yy_size_t size ) | ||
2068 | { | ||
2069 | /* The cast to (char *) in the following accommodates both | ||
2070 | * implementations that use char* generic pointers, and those | ||
2071 | * that use void* generic pointers. It works with the latter | ||
2072 | * because both ANSI C and C++ allow castless assignment from | ||
2073 | * any pointer type to void*, and deal with argument conversions | ||
2074 | * as though doing an assignment. | ||
2075 | */ | ||
2076 | return (void *) realloc( (char *) ptr, size ); | ||
2077 | } | ||
2078 | |||
2079 | void yyfree (void * ptr ) | ||
2080 | { | ||
2081 | free( (char *) ptr ); /* see yyrealloc() for (char *) cast */ | ||
2082 | } | ||
2083 | |||
2084 | #define YYTABLES_NAME "yytables" | ||
2085 | |||
2086 | #line 222 "dtc-lexer.l" | ||
2087 | |||
2088 | |||
2089 | |||
2090 | |||
2091 | /* | ||
2092 | * Stack of nested include file contexts. | ||
2093 | */ | ||
2094 | |||
2095 | struct incl_file { | ||
2096 | struct dtc_file *file; | ||
2097 | YY_BUFFER_STATE yy_prev_buf; | ||
2098 | int yy_prev_lineno; | ||
2099 | struct incl_file *prev; | ||
2100 | }; | ||
2101 | |||
2102 | static struct incl_file *incl_file_stack; | ||
2103 | |||
2104 | |||
2105 | /* | ||
2106 | * Detect infinite include recursion. | ||
2107 | */ | ||
2108 | #define MAX_INCLUDE_DEPTH (100) | ||
2109 | |||
2110 | static int incl_depth = 0; | ||
2111 | |||
2112 | |||
2113 | static void push_input_file(const char *filename) | ||
2114 | { | ||
2115 | struct incl_file *incl_file; | ||
2116 | struct dtc_file *newfile; | ||
2117 | struct search_path search, *searchptr = NULL; | ||
2118 | |||
2119 | assert(filename); | ||
2120 | |||
2121 | if (incl_depth++ >= MAX_INCLUDE_DEPTH) | ||
2122 | die("Includes nested too deeply"); | ||
2123 | |||
2124 | if (srcpos_file) { | ||
2125 | search.dir = srcpos_file->dir; | ||
2126 | search.next = NULL; | ||
2127 | search.prev = NULL; | ||
2128 | searchptr = &search; | ||
2129 | } | ||
2130 | |||
2131 | newfile = dtc_open_file(filename, searchptr); | ||
2132 | |||
2133 | incl_file = xmalloc(sizeof(struct incl_file)); | ||
2134 | |||
2135 | /* | ||
2136 | * Save current context. | ||
2137 | */ | ||
2138 | incl_file->yy_prev_buf = YY_CURRENT_BUFFER; | ||
2139 | incl_file->yy_prev_lineno = yylineno; | ||
2140 | incl_file->file = srcpos_file; | ||
2141 | incl_file->prev = incl_file_stack; | ||
2142 | |||
2143 | incl_file_stack = incl_file; | ||
2144 | |||
2145 | /* | ||
2146 | * Establish new context. | ||
2147 | */ | ||
2148 | srcpos_file = newfile; | ||
2149 | yylineno = 1; | ||
2150 | yyin = newfile->file; | ||
2151 | yy_switch_to_buffer(yy_create_buffer(yyin,YY_BUF_SIZE)); | ||
2152 | } | ||
2153 | |||
2154 | |||
2155 | static int pop_input_file(void) | ||
2156 | { | ||
2157 | struct incl_file *incl_file; | ||
2158 | |||
2159 | if (incl_file_stack == 0) | ||
2160 | return 0; | ||
2161 | |||
2162 | dtc_close_file(srcpos_file); | ||
2163 | |||
2164 | /* | ||
2165 | * Pop. | ||
2166 | */ | ||
2167 | --incl_depth; | ||
2168 | incl_file = incl_file_stack; | ||
2169 | incl_file_stack = incl_file->prev; | ||
2170 | |||
2171 | /* | ||
2172 | * Recover old context. | ||
2173 | */ | ||
2174 | yy_delete_buffer(YY_CURRENT_BUFFER); | ||
2175 | yy_switch_to_buffer(incl_file->yy_prev_buf); | ||
2176 | yylineno = incl_file->yy_prev_lineno; | ||
2177 | srcpos_file = incl_file->file; | ||
2178 | yyin = incl_file->file ? incl_file->file->file : NULL; | ||
2179 | |||
2180 | /* | ||
2181 | * Free old state. | ||
2182 | */ | ||
2183 | free(incl_file); | ||
2184 | |||
2185 | return 1; | ||
2186 | } | ||
2187 | |||
diff --git a/arch/powerpc/boot/dtc-src/dtc-parser.tab.c_shipped b/arch/powerpc/boot/dtc-src/dtc-parser.tab.c_shipped deleted file mode 100644 index 27129377e5d2..000000000000 --- a/arch/powerpc/boot/dtc-src/dtc-parser.tab.c_shipped +++ /dev/null | |||
@@ -1,2040 +0,0 @@ | |||
1 | /* A Bison parser, made by GNU Bison 2.3. */ | ||
2 | |||
3 | /* Skeleton implementation for Bison's Yacc-like parsers in C | ||
4 | |||
5 | Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006 | ||
6 | Free Software Foundation, Inc. | ||
7 | |||
8 | This program is free software; you can redistribute it and/or modify | ||
9 | it under the terms of the GNU General Public License as published by | ||
10 | the Free Software Foundation; either version 2, or (at your option) | ||
11 | any later version. | ||
12 | |||
13 | This program is distributed in the hope that it will be useful, | ||
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | GNU General Public License for more details. | ||
17 | |||
18 | You should have received a copy of the GNU General Public License | ||
19 | along with this program; if not, write to the Free Software | ||
20 | Foundation, Inc., 51 Franklin Street, Fifth Floor, | ||
21 | Boston, MA 02110-1301, USA. */ | ||
22 | |||
23 | /* As a special exception, you may create a larger work that contains | ||
24 | part or all of the Bison parser skeleton and distribute that work | ||
25 | under terms of your choice, so long as that work isn't itself a | ||
26 | parser generator using the skeleton or a modified version thereof | ||
27 | as a parser skeleton. Alternatively, if you modify or redistribute | ||
28 | the parser skeleton itself, you may (at your option) remove this | ||
29 | special exception, which will cause the skeleton and the resulting | ||
30 | Bison output files to be licensed under the GNU General Public | ||
31 | License without this special exception. | ||
32 | |||
33 | This special exception was added by the Free Software Foundation in | ||
34 | version 2.2 of Bison. */ | ||
35 | |||
36 | /* C LALR(1) parser skeleton written by Richard Stallman, by | ||
37 | simplifying the original so-called "semantic" parser. */ | ||
38 | |||
39 | /* All symbols defined below should begin with yy or YY, to avoid | ||
40 | infringing on user name space. This should be done even for local | ||
41 | variables, as they might otherwise be expanded by user macros. | ||
42 | There are some unavoidable exceptions within include files to | ||
43 | define necessary library symbols; they are noted "INFRINGES ON | ||
44 | USER NAME SPACE" below. */ | ||
45 | |||
46 | /* Identify Bison output. */ | ||
47 | #define YYBISON 1 | ||
48 | |||
49 | /* Bison version. */ | ||
50 | #define YYBISON_VERSION "2.3" | ||
51 | |||
52 | /* Skeleton name. */ | ||
53 | #define YYSKELETON_NAME "yacc.c" | ||
54 | |||
55 | /* Pure parsers. */ | ||
56 | #define YYPURE 0 | ||
57 | |||
58 | /* Using locations. */ | ||
59 | #define YYLSP_NEEDED 1 | ||
60 | |||
61 | |||
62 | |||
63 | /* Tokens. */ | ||
64 | #ifndef YYTOKENTYPE | ||
65 | # define YYTOKENTYPE | ||
66 | /* Put the tokens into the symbol table, so that GDB and other debuggers | ||
67 | know about them. */ | ||
68 | enum yytokentype { | ||
69 | DT_V1 = 258, | ||
70 | DT_MEMRESERVE = 259, | ||
71 | DT_PROPNODENAME = 260, | ||
72 | DT_LITERAL = 261, | ||
73 | DT_LEGACYLITERAL = 262, | ||
74 | DT_BASE = 263, | ||
75 | DT_BYTE = 264, | ||
76 | DT_STRING = 265, | ||
77 | DT_LABEL = 266, | ||
78 | DT_REF = 267, | ||
79 | DT_INCBIN = 268 | ||
80 | }; | ||
81 | #endif | ||
82 | /* Tokens. */ | ||
83 | #define DT_V1 258 | ||
84 | #define DT_MEMRESERVE 259 | ||
85 | #define DT_PROPNODENAME 260 | ||
86 | #define DT_LITERAL 261 | ||
87 | #define DT_LEGACYLITERAL 262 | ||
88 | #define DT_BASE 263 | ||
89 | #define DT_BYTE 264 | ||
90 | #define DT_STRING 265 | ||
91 | #define DT_LABEL 266 | ||
92 | #define DT_REF 267 | ||
93 | #define DT_INCBIN 268 | ||
94 | |||
95 | |||
96 | |||
97 | |||
98 | /* Copy the first part of user declarations. */ | ||
99 | #line 23 "dtc-parser.y" | ||
100 | |||
101 | #include <stdio.h> | ||
102 | |||
103 | #include "dtc.h" | ||
104 | #include "srcpos.h" | ||
105 | |||
106 | extern int yylex(void); | ||
107 | |||
108 | extern struct boot_info *the_boot_info; | ||
109 | extern int treesource_error; | ||
110 | |||
111 | static unsigned long long eval_literal(const char *s, int base, int bits); | ||
112 | |||
113 | |||
114 | /* Enabling traces. */ | ||
115 | #ifndef YYDEBUG | ||
116 | # define YYDEBUG 0 | ||
117 | #endif | ||
118 | |||
119 | /* Enabling verbose error messages. */ | ||
120 | #ifdef YYERROR_VERBOSE | ||
121 | # undef YYERROR_VERBOSE | ||
122 | # define YYERROR_VERBOSE 1 | ||
123 | #else | ||
124 | # define YYERROR_VERBOSE 0 | ||
125 | #endif | ||
126 | |||
127 | /* Enabling the token table. */ | ||
128 | #ifndef YYTOKEN_TABLE | ||
129 | # define YYTOKEN_TABLE 0 | ||
130 | #endif | ||
131 | |||
132 | #if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED | ||
133 | typedef union YYSTYPE | ||
134 | #line 37 "dtc-parser.y" | ||
135 | { | ||
136 | char *propnodename; | ||
137 | char *literal; | ||
138 | char *labelref; | ||
139 | unsigned int cbase; | ||
140 | uint8_t byte; | ||
141 | struct data data; | ||
142 | |||
143 | uint64_t addr; | ||
144 | cell_t cell; | ||
145 | struct property *prop; | ||
146 | struct property *proplist; | ||
147 | struct node *node; | ||
148 | struct node *nodelist; | ||
149 | struct reserve_info *re; | ||
150 | } | ||
151 | /* Line 187 of yacc.c. */ | ||
152 | #line 153 "dtc-parser.tab.c" | ||
153 | YYSTYPE; | ||
154 | # define yystype YYSTYPE /* obsolescent; will be withdrawn */ | ||
155 | # define YYSTYPE_IS_DECLARED 1 | ||
156 | # define YYSTYPE_IS_TRIVIAL 1 | ||
157 | #endif | ||
158 | |||
159 | #if ! defined YYLTYPE && ! defined YYLTYPE_IS_DECLARED | ||
160 | typedef struct YYLTYPE | ||
161 | { | ||
162 | int first_line; | ||
163 | int first_column; | ||
164 | int last_line; | ||
165 | int last_column; | ||
166 | } YYLTYPE; | ||
167 | # define yyltype YYLTYPE /* obsolescent; will be withdrawn */ | ||
168 | # define YYLTYPE_IS_DECLARED 1 | ||
169 | # define YYLTYPE_IS_TRIVIAL 1 | ||
170 | #endif | ||
171 | |||
172 | |||
173 | /* Copy the second part of user declarations. */ | ||
174 | |||
175 | |||
176 | /* Line 216 of yacc.c. */ | ||
177 | #line 178 "dtc-parser.tab.c" | ||
178 | |||
179 | #ifdef short | ||
180 | # undef short | ||
181 | #endif | ||
182 | |||
183 | #ifdef YYTYPE_UINT8 | ||
184 | typedef YYTYPE_UINT8 yytype_uint8; | ||
185 | #else | ||
186 | typedef unsigned char yytype_uint8; | ||
187 | #endif | ||
188 | |||
189 | #ifdef YYTYPE_INT8 | ||
190 | typedef YYTYPE_INT8 yytype_int8; | ||
191 | #elif (defined __STDC__ || defined __C99__FUNC__ \ | ||
192 | || defined __cplusplus || defined _MSC_VER) | ||
193 | typedef signed char yytype_int8; | ||
194 | #else | ||
195 | typedef short int yytype_int8; | ||
196 | #endif | ||
197 | |||
198 | #ifdef YYTYPE_UINT16 | ||
199 | typedef YYTYPE_UINT16 yytype_uint16; | ||
200 | #else | ||
201 | typedef unsigned short int yytype_uint16; | ||
202 | #endif | ||
203 | |||
204 | #ifdef YYTYPE_INT16 | ||
205 | typedef YYTYPE_INT16 yytype_int16; | ||
206 | #else | ||
207 | typedef short int yytype_int16; | ||
208 | #endif | ||
209 | |||
210 | #ifndef YYSIZE_T | ||
211 | # ifdef __SIZE_TYPE__ | ||
212 | # define YYSIZE_T __SIZE_TYPE__ | ||
213 | # elif defined size_t | ||
214 | # define YYSIZE_T size_t | ||
215 | # elif ! defined YYSIZE_T && (defined __STDC__ || defined __C99__FUNC__ \ | ||
216 | || defined __cplusplus || defined _MSC_VER) | ||
217 | # include <stddef.h> /* INFRINGES ON USER NAME SPACE */ | ||
218 | # define YYSIZE_T size_t | ||
219 | # else | ||
220 | # define YYSIZE_T unsigned int | ||
221 | # endif | ||
222 | #endif | ||
223 | |||
224 | #define YYSIZE_MAXIMUM ((YYSIZE_T) -1) | ||
225 | |||
226 | #ifndef YY_ | ||
227 | # if YYENABLE_NLS | ||
228 | # if ENABLE_NLS | ||
229 | # include <libintl.h> /* INFRINGES ON USER NAME SPACE */ | ||
230 | # define YY_(msgid) dgettext ("bison-runtime", msgid) | ||
231 | # endif | ||
232 | # endif | ||
233 | # ifndef YY_ | ||
234 | # define YY_(msgid) msgid | ||
235 | # endif | ||
236 | #endif | ||
237 | |||
238 | /* Suppress unused-variable warnings by "using" E. */ | ||
239 | #if ! defined lint || defined __GNUC__ | ||
240 | # define YYUSE(e) ((void) (e)) | ||
241 | #else | ||
242 | # define YYUSE(e) /* empty */ | ||
243 | #endif | ||
244 | |||
245 | /* Identity function, used to suppress warnings about constant conditions. */ | ||
246 | #ifndef lint | ||
247 | # define YYID(n) (n) | ||
248 | #else | ||
249 | #if (defined __STDC__ || defined __C99__FUNC__ \ | ||
250 | || defined __cplusplus || defined _MSC_VER) | ||
251 | static int | ||
252 | YYID (int i) | ||
253 | #else | ||
254 | static int | ||
255 | YYID (i) | ||
256 | int i; | ||
257 | #endif | ||
258 | { | ||
259 | return i; | ||
260 | } | ||
261 | #endif | ||
262 | |||
263 | #if ! defined yyoverflow || YYERROR_VERBOSE | ||
264 | |||
265 | /* The parser invokes alloca or malloc; define the necessary symbols. */ | ||
266 | |||
267 | # ifdef YYSTACK_USE_ALLOCA | ||
268 | # if YYSTACK_USE_ALLOCA | ||
269 | # ifdef __GNUC__ | ||
270 | # define YYSTACK_ALLOC __builtin_alloca | ||
271 | # elif defined __BUILTIN_VA_ARG_INCR | ||
272 | # include <alloca.h> /* INFRINGES ON USER NAME SPACE */ | ||
273 | # elif defined _AIX | ||
274 | # define YYSTACK_ALLOC __alloca | ||
275 | # elif defined _MSC_VER | ||
276 | # include <malloc.h> /* INFRINGES ON USER NAME SPACE */ | ||
277 | # define alloca _alloca | ||
278 | # else | ||
279 | # define YYSTACK_ALLOC alloca | ||
280 | # if ! defined _ALLOCA_H && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ | ||
281 | || defined __cplusplus || defined _MSC_VER) | ||
282 | # include <stdlib.h> /* INFRINGES ON USER NAME SPACE */ | ||
283 | # ifndef _STDLIB_H | ||
284 | # define _STDLIB_H 1 | ||
285 | # endif | ||
286 | # endif | ||
287 | # endif | ||
288 | # endif | ||
289 | # endif | ||
290 | |||
291 | # ifdef YYSTACK_ALLOC | ||
292 | /* Pacify GCC's `empty if-body' warning. */ | ||
293 | # define YYSTACK_FREE(Ptr) do { /* empty */; } while (YYID (0)) | ||
294 | # ifndef YYSTACK_ALLOC_MAXIMUM | ||
295 | /* The OS might guarantee only one guard page at the bottom of the stack, | ||
296 | and a page size can be as small as 4096 bytes. So we cannot safely | ||
297 | invoke alloca (N) if N exceeds 4096. Use a slightly smaller number | ||
298 | to allow for a few compiler-allocated temporary stack slots. */ | ||
299 | # define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2006 */ | ||
300 | # endif | ||
301 | # else | ||
302 | # define YYSTACK_ALLOC YYMALLOC | ||
303 | # define YYSTACK_FREE YYFREE | ||
304 | # ifndef YYSTACK_ALLOC_MAXIMUM | ||
305 | # define YYSTACK_ALLOC_MAXIMUM YYSIZE_MAXIMUM | ||
306 | # endif | ||
307 | # if (defined __cplusplus && ! defined _STDLIB_H \ | ||
308 | && ! ((defined YYMALLOC || defined malloc) \ | ||
309 | && (defined YYFREE || defined free))) | ||
310 | # include <stdlib.h> /* INFRINGES ON USER NAME SPACE */ | ||
311 | # ifndef _STDLIB_H | ||
312 | # define _STDLIB_H 1 | ||
313 | # endif | ||
314 | # endif | ||
315 | # ifndef YYMALLOC | ||
316 | # define YYMALLOC malloc | ||
317 | # if ! defined malloc && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ | ||
318 | || defined __cplusplus || defined _MSC_VER) | ||
319 | void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */ | ||
320 | # endif | ||
321 | # endif | ||
322 | # ifndef YYFREE | ||
323 | # define YYFREE free | ||
324 | # if ! defined free && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \ | ||
325 | || defined __cplusplus || defined _MSC_VER) | ||
326 | void free (void *); /* INFRINGES ON USER NAME SPACE */ | ||
327 | # endif | ||
328 | # endif | ||
329 | # endif | ||
330 | #endif /* ! defined yyoverflow || YYERROR_VERBOSE */ | ||
331 | |||
332 | |||
333 | #if (! defined yyoverflow \ | ||
334 | && (! defined __cplusplus \ | ||
335 | || (defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL \ | ||
336 | && defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL))) | ||
337 | |||
338 | /* A type that is properly aligned for any stack member. */ | ||
339 | union yyalloc | ||
340 | { | ||
341 | yytype_int16 yyss; | ||
342 | YYSTYPE yyvs; | ||
343 | YYLTYPE yyls; | ||
344 | }; | ||
345 | |||
346 | /* The size of the maximum gap between one aligned stack and the next. */ | ||
347 | # define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1) | ||
348 | |||
349 | /* The size of an array large to enough to hold all stacks, each with | ||
350 | N elements. */ | ||
351 | # define YYSTACK_BYTES(N) \ | ||
352 | ((N) * (sizeof (yytype_int16) + sizeof (YYSTYPE) + sizeof (YYLTYPE)) \ | ||
353 | + 2 * YYSTACK_GAP_MAXIMUM) | ||
354 | |||
355 | /* Copy COUNT objects from FROM to TO. The source and destination do | ||
356 | not overlap. */ | ||
357 | # ifndef YYCOPY | ||
358 | # if defined __GNUC__ && 1 < __GNUC__ | ||
359 | # define YYCOPY(To, From, Count) \ | ||
360 | __builtin_memcpy (To, From, (Count) * sizeof (*(From))) | ||
361 | # else | ||
362 | # define YYCOPY(To, From, Count) \ | ||
363 | do \ | ||
364 | { \ | ||
365 | YYSIZE_T yyi; \ | ||
366 | for (yyi = 0; yyi < (Count); yyi++) \ | ||
367 | (To)[yyi] = (From)[yyi]; \ | ||
368 | } \ | ||
369 | while (YYID (0)) | ||
370 | # endif | ||
371 | # endif | ||
372 | |||
373 | /* Relocate STACK from its old location to the new one. The | ||
374 | local variables YYSIZE and YYSTACKSIZE give the old and new number of | ||
375 | elements in the stack, and YYPTR gives the new location of the | ||
376 | stack. Advance YYPTR to a properly aligned location for the next | ||
377 | stack. */ | ||
378 | # define YYSTACK_RELOCATE(Stack) \ | ||
379 | do \ | ||
380 | { \ | ||
381 | YYSIZE_T yynewbytes; \ | ||
382 | YYCOPY (&yyptr->Stack, Stack, yysize); \ | ||
383 | Stack = &yyptr->Stack; \ | ||
384 | yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \ | ||
385 | yyptr += yynewbytes / sizeof (*yyptr); \ | ||
386 | } \ | ||
387 | while (YYID (0)) | ||
388 | |||
389 | #endif | ||
390 | |||
391 | /* YYFINAL -- State number of the termination state. */ | ||
392 | #define YYFINAL 9 | ||
393 | /* YYLAST -- Last index in YYTABLE. */ | ||
394 | #define YYLAST 73 | ||
395 | |||
396 | /* YYNTOKENS -- Number of terminals. */ | ||
397 | #define YYNTOKENS 27 | ||
398 | /* YYNNTS -- Number of nonterminals. */ | ||
399 | #define YYNNTS 20 | ||
400 | /* YYNRULES -- Number of rules. */ | ||
401 | #define YYNRULES 45 | ||
402 | /* YYNRULES -- Number of states. */ | ||
403 | #define YYNSTATES 76 | ||
404 | |||
405 | /* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */ | ||
406 | #define YYUNDEFTOK 2 | ||
407 | #define YYMAXUTOK 268 | ||
408 | |||
409 | #define YYTRANSLATE(YYX) \ | ||
410 | ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK) | ||
411 | |||
412 | /* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX. */ | ||
413 | static const yytype_uint8 yytranslate[] = | ||
414 | { | ||
415 | 0, 2, 2, 2, 2, 2, 2, 2, 2, 2, | ||
416 | 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, | ||
417 | 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, | ||
418 | 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, | ||
419 | 24, 26, 2, 2, 25, 15, 2, 16, 2, 2, | ||
420 | 2, 2, 2, 2, 2, 2, 2, 2, 2, 14, | ||
421 | 20, 19, 21, 2, 2, 2, 2, 2, 2, 2, | ||
422 | 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, | ||
423 | 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, | ||
424 | 2, 22, 2, 23, 2, 2, 2, 2, 2, 2, | ||
425 | 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, | ||
426 | 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, | ||
427 | 2, 2, 2, 17, 2, 18, 2, 2, 2, 2, | ||
428 | 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, | ||
429 | 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, | ||
430 | 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, | ||
431 | 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, | ||
432 | 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, | ||
433 | 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, | ||
434 | 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, | ||
435 | 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, | ||
436 | 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, | ||
437 | 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, | ||
438 | 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, | ||
439 | 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, | ||
440 | 2, 2, 2, 2, 2, 2, 1, 2, 3, 4, | ||
441 | 5, 6, 7, 8, 9, 10, 11, 12, 13 | ||
442 | }; | ||
443 | |||
444 | #if YYDEBUG | ||
445 | /* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in | ||
446 | YYRHS. */ | ||
447 | static const yytype_uint8 yyprhs[] = | ||
448 | { | ||
449 | 0, 0, 3, 8, 11, 12, 15, 21, 22, 25, | ||
450 | 27, 34, 36, 38, 41, 47, 48, 51, 57, 61, | ||
451 | 64, 69, 74, 77, 87, 93, 96, 97, 100, 103, | ||
452 | 104, 107, 110, 113, 114, 116, 118, 121, 122, 125, | ||
453 | 128, 129, 132, 135, 139, 140 | ||
454 | }; | ||
455 | |||
456 | /* YYRHS -- A `-1'-separated list of the rules' RHS. */ | ||
457 | static const yytype_int8 yyrhs[] = | ||
458 | { | ||
459 | 28, 0, -1, 3, 14, 29, 34, -1, 31, 34, | ||
460 | -1, -1, 30, 29, -1, 46, 4, 33, 33, 14, | ||
461 | -1, -1, 32, 31, -1, 30, -1, 46, 4, 33, | ||
462 | 15, 33, 14, -1, 6, -1, 7, -1, 16, 35, | ||
463 | -1, 17, 36, 44, 18, 14, -1, -1, 36, 37, | ||
464 | -1, 46, 5, 19, 38, 14, -1, 46, 5, 14, | ||
465 | -1, 39, 10, -1, 39, 20, 40, 21, -1, 39, | ||
466 | 22, 43, 23, -1, 39, 12, -1, 39, 13, 24, | ||
467 | 10, 25, 33, 25, 33, 26, -1, 39, 13, 24, | ||
468 | 10, 26, -1, 38, 11, -1, -1, 38, 25, -1, | ||
469 | 39, 11, -1, -1, 40, 42, -1, 40, 12, -1, | ||
470 | 40, 11, -1, -1, 8, -1, 6, -1, 41, 7, | ||
471 | -1, -1, 43, 9, -1, 43, 11, -1, -1, 45, | ||
472 | 44, -1, 45, 37, -1, 46, 5, 35, -1, -1, | ||
473 | 11, -1 | ||
474 | }; | ||
475 | |||
476 | /* YYRLINE[YYN] -- source line where rule number YYN was defined. */ | ||
477 | static const yytype_uint16 yyrline[] = | ||
478 | { | ||
479 | 0, 89, 89, 93, 101, 104, 111, 119, 122, 129, | ||
480 | 133, 140, 144, 151, 158, 166, 169, 176, 180, 187, | ||
481 | 191, 195, 199, 203, 220, 231, 239, 242, 246, 254, | ||
482 | 257, 261, 266, 274, 277, 281, 285, 293, 296, 300, | ||
483 | 308, 311, 315, 323, 331, 334 | ||
484 | }; | ||
485 | #endif | ||
486 | |||
487 | #if YYDEBUG || YYERROR_VERBOSE || YYTOKEN_TABLE | ||
488 | /* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM. | ||
489 | First, the terminals, then, starting at YYNTOKENS, nonterminals. */ | ||
490 | static const char *const yytname[] = | ||
491 | { | ||
492 | "$end", "error", "$undefined", "DT_V1", "DT_MEMRESERVE", | ||
493 | "DT_PROPNODENAME", "DT_LITERAL", "DT_LEGACYLITERAL", "DT_BASE", | ||
494 | "DT_BYTE", "DT_STRING", "DT_LABEL", "DT_REF", "DT_INCBIN", "';'", "'-'", | ||
495 | "'/'", "'{'", "'}'", "'='", "'<'", "'>'", "'['", "']'", "'('", "','", | ||
496 | "')'", "$accept", "sourcefile", "memreserves", "memreserve", | ||
497 | "v0_memreserves", "v0_memreserve", "addr", "devicetree", "nodedef", | ||
498 | "proplist", "propdef", "propdata", "propdataprefix", "celllist", | ||
499 | "cellbase", "cellval", "bytestring", "subnodes", "subnode", "label", 0 | ||
500 | }; | ||
501 | #endif | ||
502 | |||
503 | # ifdef YYPRINT | ||
504 | /* YYTOKNUM[YYLEX-NUM] -- Internal token number corresponding to | ||
505 | token YYLEX-NUM. */ | ||
506 | static const yytype_uint16 yytoknum[] = | ||
507 | { | ||
508 | 0, 256, 257, 258, 259, 260, 261, 262, 263, 264, | ||
509 | 265, 266, 267, 268, 59, 45, 47, 123, 125, 61, | ||
510 | 60, 62, 91, 93, 40, 44, 41 | ||
511 | }; | ||
512 | # endif | ||
513 | |||
514 | /* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */ | ||
515 | static const yytype_uint8 yyr1[] = | ||
516 | { | ||
517 | 0, 27, 28, 28, 29, 29, 30, 31, 31, 32, | ||
518 | 32, 33, 33, 34, 35, 36, 36, 37, 37, 38, | ||
519 | 38, 38, 38, 38, 38, 38, 39, 39, 39, 40, | ||
520 | 40, 40, 40, 41, 41, 42, 42, 43, 43, 43, | ||
521 | 44, 44, 44, 45, 46, 46 | ||
522 | }; | ||
523 | |||
524 | /* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */ | ||
525 | static const yytype_uint8 yyr2[] = | ||
526 | { | ||
527 | 0, 2, 4, 2, 0, 2, 5, 0, 2, 1, | ||
528 | 6, 1, 1, 2, 5, 0, 2, 5, 3, 2, | ||
529 | 4, 4, 2, 9, 5, 2, 0, 2, 2, 0, | ||
530 | 2, 2, 2, 0, 1, 1, 2, 0, 2, 2, | ||
531 | 0, 2, 2, 3, 0, 1 | ||
532 | }; | ||
533 | |||
534 | /* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state | ||
535 | STATE-NUM when YYTABLE doesn't specify something else to do. Zero | ||
536 | means the default is an error. */ | ||
537 | static const yytype_uint8 yydefact[] = | ||
538 | { | ||
539 | 7, 0, 45, 0, 9, 0, 7, 0, 4, 1, | ||
540 | 0, 3, 8, 0, 0, 4, 0, 15, 13, 11, | ||
541 | 12, 0, 2, 5, 0, 40, 0, 0, 0, 16, | ||
542 | 0, 40, 0, 0, 6, 0, 42, 41, 0, 10, | ||
543 | 14, 18, 26, 43, 0, 0, 25, 17, 27, 19, | ||
544 | 28, 22, 0, 29, 37, 0, 33, 0, 0, 35, | ||
545 | 34, 32, 31, 20, 0, 30, 38, 39, 21, 0, | ||
546 | 24, 36, 0, 0, 0, 23 | ||
547 | }; | ||
548 | |||
549 | /* YYDEFGOTO[NTERM-NUM]. */ | ||
550 | static const yytype_int8 yydefgoto[] = | ||
551 | { | ||
552 | -1, 3, 14, 4, 5, 6, 27, 11, 18, 25, | ||
553 | 29, 44, 45, 56, 64, 65, 57, 30, 31, 7 | ||
554 | }; | ||
555 | |||
556 | /* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing | ||
557 | STATE-NUM. */ | ||
558 | #define YYPACT_NINF -14 | ||
559 | static const yytype_int8 yypact[] = | ||
560 | { | ||
561 | 30, -11, -14, 7, -14, -1, 27, 13, 27, -14, | ||
562 | 8, -14, -14, 40, -1, 27, 35, -14, -14, -14, | ||
563 | -14, 21, -14, -14, 40, 24, 40, 28, 40, -14, | ||
564 | 32, 24, 46, 38, -14, 39, -14, -14, 26, -14, | ||
565 | -14, -14, -14, -14, -9, 10, -14, -14, -14, -14, | ||
566 | -14, -14, 31, -14, -14, 44, -2, 3, 23, -14, | ||
567 | -14, -14, -14, -14, 50, -14, -14, -14, -14, 40, | ||
568 | -14, -14, 33, 40, 36, -14 | ||
569 | }; | ||
570 | |||
571 | /* YYPGOTO[NTERM-NUM]. */ | ||
572 | static const yytype_int8 yypgoto[] = | ||
573 | { | ||
574 | -14, -14, 48, 29, 53, -14, -13, 47, 34, -14, | ||
575 | 37, -14, -14, -14, -14, -14, -14, 42, -14, -7 | ||
576 | }; | ||
577 | |||
578 | /* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If | ||
579 | positive, shift that token. If negative, reduce the rule which | ||
580 | number is the opposite. If zero, do what YYDEFACT says. | ||
581 | If YYTABLE_NINF, syntax error. */ | ||
582 | #define YYTABLE_NINF -45 | ||
583 | static const yytype_int8 yytable[] = | ||
584 | { | ||
585 | 21, 16, 46, 8, 59, 47, 60, 9, 16, 61, | ||
586 | 62, 28, 66, 33, 67, 10, 48, 13, 32, 63, | ||
587 | 49, 50, 51, 52, 32, 17, 68, 19, 20, -44, | ||
588 | 53, -44, 54, 1, -44, 2, 26, 15, 2, 24, | ||
589 | 41, 2, 34, 17, 15, 42, 19, 20, 69, 70, | ||
590 | 35, 38, 39, 40, 58, 55, 72, 71, 73, 12, | ||
591 | 74, 22, 75, 23, 0, 0, 0, 0, 36, 0, | ||
592 | 0, 0, 43, 37 | ||
593 | }; | ||
594 | |||
595 | static const yytype_int8 yycheck[] = | ||
596 | { | ||
597 | 13, 8, 11, 14, 6, 14, 8, 0, 15, 11, | ||
598 | 12, 24, 9, 26, 11, 16, 25, 4, 25, 21, | ||
599 | 10, 11, 12, 13, 31, 17, 23, 6, 7, 5, | ||
600 | 20, 4, 22, 3, 4, 11, 15, 8, 11, 4, | ||
601 | 14, 11, 14, 17, 15, 19, 6, 7, 25, 26, | ||
602 | 18, 5, 14, 14, 10, 24, 69, 7, 25, 6, | ||
603 | 73, 14, 26, 15, -1, -1, -1, -1, 31, -1, | ||
604 | -1, -1, 38, 31 | ||
605 | }; | ||
606 | |||
607 | /* YYSTOS[STATE-NUM] -- The (internal number of the) accessing | ||
608 | symbol of state STATE-NUM. */ | ||
609 | static const yytype_uint8 yystos[] = | ||
610 | { | ||
611 | 0, 3, 11, 28, 30, 31, 32, 46, 14, 0, | ||
612 | 16, 34, 31, 4, 29, 30, 46, 17, 35, 6, | ||
613 | 7, 33, 34, 29, 4, 36, 15, 33, 33, 37, | ||
614 | 44, 45, 46, 33, 14, 18, 37, 44, 5, 14, | ||
615 | 14, 14, 19, 35, 38, 39, 11, 14, 25, 10, | ||
616 | 11, 12, 13, 20, 22, 24, 40, 43, 10, 6, | ||
617 | 8, 11, 12, 21, 41, 42, 9, 11, 23, 25, | ||
618 | 26, 7, 33, 25, 33, 26 | ||
619 | }; | ||
620 | |||
621 | #define yyerrok (yyerrstatus = 0) | ||
622 | #define yyclearin (yychar = YYEMPTY) | ||
623 | #define YYEMPTY (-2) | ||
624 | #define YYEOF 0 | ||
625 | |||
626 | #define YYACCEPT goto yyacceptlab | ||
627 | #define YYABORT goto yyabortlab | ||
628 | #define YYERROR goto yyerrorlab | ||
629 | |||
630 | |||
631 | /* Like YYERROR except do call yyerror. This remains here temporarily | ||
632 | to ease the transition to the new meaning of YYERROR, for GCC. | ||
633 | Once GCC version 2 has supplanted version 1, this can go. */ | ||
634 | |||
635 | #define YYFAIL goto yyerrlab | ||
636 | |||
637 | #define YYRECOVERING() (!!yyerrstatus) | ||
638 | |||
639 | #define YYBACKUP(Token, Value) \ | ||
640 | do \ | ||
641 | if (yychar == YYEMPTY && yylen == 1) \ | ||
642 | { \ | ||
643 | yychar = (Token); \ | ||
644 | yylval = (Value); \ | ||
645 | yytoken = YYTRANSLATE (yychar); \ | ||
646 | YYPOPSTACK (1); \ | ||
647 | goto yybackup; \ | ||
648 | } \ | ||
649 | else \ | ||
650 | { \ | ||
651 | yyerror (YY_("syntax error: cannot back up")); \ | ||
652 | YYERROR; \ | ||
653 | } \ | ||
654 | while (YYID (0)) | ||
655 | |||
656 | |||
657 | #define YYTERROR 1 | ||
658 | #define YYERRCODE 256 | ||
659 | |||
660 | |||
661 | /* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N]. | ||
662 | If N is 0, then set CURRENT to the empty location which ends | ||
663 | the previous symbol: RHS[0] (always defined). */ | ||
664 | |||
665 | #define YYRHSLOC(Rhs, K) ((Rhs)[K]) | ||
666 | #ifndef YYLLOC_DEFAULT | ||
667 | # define YYLLOC_DEFAULT(Current, Rhs, N) \ | ||
668 | do \ | ||
669 | if (YYID (N)) \ | ||
670 | { \ | ||
671 | (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \ | ||
672 | (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \ | ||
673 | (Current).last_line = YYRHSLOC (Rhs, N).last_line; \ | ||
674 | (Current).last_column = YYRHSLOC (Rhs, N).last_column; \ | ||
675 | } \ | ||
676 | else \ | ||
677 | { \ | ||
678 | (Current).first_line = (Current).last_line = \ | ||
679 | YYRHSLOC (Rhs, 0).last_line; \ | ||
680 | (Current).first_column = (Current).last_column = \ | ||
681 | YYRHSLOC (Rhs, 0).last_column; \ | ||
682 | } \ | ||
683 | while (YYID (0)) | ||
684 | #endif | ||
685 | |||
686 | |||
687 | /* YY_LOCATION_PRINT -- Print the location on the stream. | ||
688 | This macro was not mandated originally: define only if we know | ||
689 | we won't break user code: when these are the locations we know. */ | ||
690 | |||
691 | #ifndef YY_LOCATION_PRINT | ||
692 | # if YYLTYPE_IS_TRIVIAL | ||
693 | # define YY_LOCATION_PRINT(File, Loc) \ | ||
694 | fprintf (File, "%d.%d-%d.%d", \ | ||
695 | (Loc).first_line, (Loc).first_column, \ | ||
696 | (Loc).last_line, (Loc).last_column) | ||
697 | # else | ||
698 | # define YY_LOCATION_PRINT(File, Loc) ((void) 0) | ||
699 | # endif | ||
700 | #endif | ||
701 | |||
702 | |||
703 | /* YYLEX -- calling `yylex' with the right arguments. */ | ||
704 | |||
705 | #ifdef YYLEX_PARAM | ||
706 | # define YYLEX yylex (YYLEX_PARAM) | ||
707 | #else | ||
708 | # define YYLEX yylex () | ||
709 | #endif | ||
710 | |||
711 | /* Enable debugging if requested. */ | ||
712 | #if YYDEBUG | ||
713 | |||
714 | # ifndef YYFPRINTF | ||
715 | # include <stdio.h> /* INFRINGES ON USER NAME SPACE */ | ||
716 | # define YYFPRINTF fprintf | ||
717 | # endif | ||
718 | |||
719 | # define YYDPRINTF(Args) \ | ||
720 | do { \ | ||
721 | if (yydebug) \ | ||
722 | YYFPRINTF Args; \ | ||
723 | } while (YYID (0)) | ||
724 | |||
725 | # define YY_SYMBOL_PRINT(Title, Type, Value, Location) \ | ||
726 | do { \ | ||
727 | if (yydebug) \ | ||
728 | { \ | ||
729 | YYFPRINTF (stderr, "%s ", Title); \ | ||
730 | yy_symbol_print (stderr, \ | ||
731 | Type, Value, Location); \ | ||
732 | YYFPRINTF (stderr, "\n"); \ | ||
733 | } \ | ||
734 | } while (YYID (0)) | ||
735 | |||
736 | |||
737 | /*--------------------------------. | ||
738 | | Print this symbol on YYOUTPUT. | | ||
739 | `--------------------------------*/ | ||
740 | |||
741 | /*ARGSUSED*/ | ||
742 | #if (defined __STDC__ || defined __C99__FUNC__ \ | ||
743 | || defined __cplusplus || defined _MSC_VER) | ||
744 | static void | ||
745 | yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep, YYLTYPE const * const yylocationp) | ||
746 | #else | ||
747 | static void | ||
748 | yy_symbol_value_print (yyoutput, yytype, yyvaluep, yylocationp) | ||
749 | FILE *yyoutput; | ||
750 | int yytype; | ||
751 | YYSTYPE const * const yyvaluep; | ||
752 | YYLTYPE const * const yylocationp; | ||
753 | #endif | ||
754 | { | ||
755 | if (!yyvaluep) | ||
756 | return; | ||
757 | YYUSE (yylocationp); | ||
758 | # ifdef YYPRINT | ||
759 | if (yytype < YYNTOKENS) | ||
760 | YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep); | ||
761 | # else | ||
762 | YYUSE (yyoutput); | ||
763 | # endif | ||
764 | switch (yytype) | ||
765 | { | ||
766 | default: | ||
767 | break; | ||
768 | } | ||
769 | } | ||
770 | |||
771 | |||
772 | /*--------------------------------. | ||
773 | | Print this symbol on YYOUTPUT. | | ||
774 | `--------------------------------*/ | ||
775 | |||
776 | #if (defined __STDC__ || defined __C99__FUNC__ \ | ||
777 | || defined __cplusplus || defined _MSC_VER) | ||
778 | static void | ||
779 | yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep, YYLTYPE const * const yylocationp) | ||
780 | #else | ||
781 | static void | ||
782 | yy_symbol_print (yyoutput, yytype, yyvaluep, yylocationp) | ||
783 | FILE *yyoutput; | ||
784 | int yytype; | ||
785 | YYSTYPE const * const yyvaluep; | ||
786 | YYLTYPE const * const yylocationp; | ||
787 | #endif | ||
788 | { | ||
789 | if (yytype < YYNTOKENS) | ||
790 | YYFPRINTF (yyoutput, "token %s (", yytname[yytype]); | ||
791 | else | ||
792 | YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]); | ||
793 | |||
794 | YY_LOCATION_PRINT (yyoutput, *yylocationp); | ||
795 | YYFPRINTF (yyoutput, ": "); | ||
796 | yy_symbol_value_print (yyoutput, yytype, yyvaluep, yylocationp); | ||
797 | YYFPRINTF (yyoutput, ")"); | ||
798 | } | ||
799 | |||
800 | /*------------------------------------------------------------------. | ||
801 | | yy_stack_print -- Print the state stack from its BOTTOM up to its | | ||
802 | | TOP (included). | | ||
803 | `------------------------------------------------------------------*/ | ||
804 | |||
805 | #if (defined __STDC__ || defined __C99__FUNC__ \ | ||
806 | || defined __cplusplus || defined _MSC_VER) | ||
807 | static void | ||
808 | yy_stack_print (yytype_int16 *bottom, yytype_int16 *top) | ||
809 | #else | ||
810 | static void | ||
811 | yy_stack_print (bottom, top) | ||
812 | yytype_int16 *bottom; | ||
813 | yytype_int16 *top; | ||
814 | #endif | ||
815 | { | ||
816 | YYFPRINTF (stderr, "Stack now"); | ||
817 | for (; bottom <= top; ++bottom) | ||
818 | YYFPRINTF (stderr, " %d", *bottom); | ||
819 | YYFPRINTF (stderr, "\n"); | ||
820 | } | ||
821 | |||
822 | # define YY_STACK_PRINT(Bottom, Top) \ | ||
823 | do { \ | ||
824 | if (yydebug) \ | ||
825 | yy_stack_print ((Bottom), (Top)); \ | ||
826 | } while (YYID (0)) | ||
827 | |||
828 | |||
829 | /*------------------------------------------------. | ||
830 | | Report that the YYRULE is going to be reduced. | | ||
831 | `------------------------------------------------*/ | ||
832 | |||
833 | #if (defined __STDC__ || defined __C99__FUNC__ \ | ||
834 | || defined __cplusplus || defined _MSC_VER) | ||
835 | static void | ||
836 | yy_reduce_print (YYSTYPE *yyvsp, YYLTYPE *yylsp, int yyrule) | ||
837 | #else | ||
838 | static void | ||
839 | yy_reduce_print (yyvsp, yylsp, yyrule) | ||
840 | YYSTYPE *yyvsp; | ||
841 | YYLTYPE *yylsp; | ||
842 | int yyrule; | ||
843 | #endif | ||
844 | { | ||
845 | int yynrhs = yyr2[yyrule]; | ||
846 | int yyi; | ||
847 | unsigned long int yylno = yyrline[yyrule]; | ||
848 | YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n", | ||
849 | yyrule - 1, yylno); | ||
850 | /* The symbols being reduced. */ | ||
851 | for (yyi = 0; yyi < yynrhs; yyi++) | ||
852 | { | ||
853 | fprintf (stderr, " $%d = ", yyi + 1); | ||
854 | yy_symbol_print (stderr, yyrhs[yyprhs[yyrule] + yyi], | ||
855 | &(yyvsp[(yyi + 1) - (yynrhs)]) | ||
856 | , &(yylsp[(yyi + 1) - (yynrhs)]) ); | ||
857 | fprintf (stderr, "\n"); | ||
858 | } | ||
859 | } | ||
860 | |||
861 | # define YY_REDUCE_PRINT(Rule) \ | ||
862 | do { \ | ||
863 | if (yydebug) \ | ||
864 | yy_reduce_print (yyvsp, yylsp, Rule); \ | ||
865 | } while (YYID (0)) | ||
866 | |||
867 | /* Nonzero means print parse trace. It is left uninitialized so that | ||
868 | multiple parsers can coexist. */ | ||
869 | int yydebug; | ||
870 | #else /* !YYDEBUG */ | ||
871 | # define YYDPRINTF(Args) | ||
872 | # define YY_SYMBOL_PRINT(Title, Type, Value, Location) | ||
873 | # define YY_STACK_PRINT(Bottom, Top) | ||
874 | # define YY_REDUCE_PRINT(Rule) | ||
875 | #endif /* !YYDEBUG */ | ||
876 | |||
877 | |||
878 | /* YYINITDEPTH -- initial size of the parser's stacks. */ | ||
879 | #ifndef YYINITDEPTH | ||
880 | # define YYINITDEPTH 200 | ||
881 | #endif | ||
882 | |||
883 | /* YYMAXDEPTH -- maximum size the stacks can grow to (effective only | ||
884 | if the built-in stack extension method is used). | ||
885 | |||
886 | Do not make this value too large; the results are undefined if | ||
887 | YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH) | ||
888 | evaluated with infinite-precision integer arithmetic. */ | ||
889 | |||
890 | #ifndef YYMAXDEPTH | ||
891 | # define YYMAXDEPTH 10000 | ||
892 | #endif | ||
893 | |||
894 | |||
895 | |||
896 | #if YYERROR_VERBOSE | ||
897 | |||
898 | # ifndef yystrlen | ||
899 | # if defined __GLIBC__ && defined _STRING_H | ||
900 | # define yystrlen strlen | ||
901 | # else | ||
902 | /* Return the length of YYSTR. */ | ||
903 | #if (defined __STDC__ || defined __C99__FUNC__ \ | ||
904 | || defined __cplusplus || defined _MSC_VER) | ||
905 | static YYSIZE_T | ||
906 | yystrlen (const char *yystr) | ||
907 | #else | ||
908 | static YYSIZE_T | ||
909 | yystrlen (yystr) | ||
910 | const char *yystr; | ||
911 | #endif | ||
912 | { | ||
913 | YYSIZE_T yylen; | ||
914 | for (yylen = 0; yystr[yylen]; yylen++) | ||
915 | continue; | ||
916 | return yylen; | ||
917 | } | ||
918 | # endif | ||
919 | # endif | ||
920 | |||
921 | # ifndef yystpcpy | ||
922 | # if defined __GLIBC__ && defined _STRING_H && defined _GNU_SOURCE | ||
923 | # define yystpcpy stpcpy | ||
924 | # else | ||
925 | /* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in | ||
926 | YYDEST. */ | ||
927 | #if (defined __STDC__ || defined __C99__FUNC__ \ | ||
928 | || defined __cplusplus || defined _MSC_VER) | ||
929 | static char * | ||
930 | yystpcpy (char *yydest, const char *yysrc) | ||
931 | #else | ||
932 | static char * | ||
933 | yystpcpy (yydest, yysrc) | ||
934 | char *yydest; | ||
935 | const char *yysrc; | ||
936 | #endif | ||
937 | { | ||
938 | char *yyd = yydest; | ||
939 | const char *yys = yysrc; | ||
940 | |||
941 | while ((*yyd++ = *yys++) != '\0') | ||
942 | continue; | ||
943 | |||
944 | return yyd - 1; | ||
945 | } | ||
946 | # endif | ||
947 | # endif | ||
948 | |||
949 | # ifndef yytnamerr | ||
950 | /* Copy to YYRES the contents of YYSTR after stripping away unnecessary | ||
951 | quotes and backslashes, so that it's suitable for yyerror. The | ||
952 | heuristic is that double-quoting is unnecessary unless the string | ||
953 | contains an apostrophe, a comma, or backslash (other than | ||
954 | backslash-backslash). YYSTR is taken from yytname. If YYRES is | ||
955 | null, do not copy; instead, return the length of what the result | ||
956 | would have been. */ | ||
957 | static YYSIZE_T | ||
958 | yytnamerr (char *yyres, const char *yystr) | ||
959 | { | ||
960 | if (*yystr == '"') | ||
961 | { | ||
962 | YYSIZE_T yyn = 0; | ||
963 | char const *yyp = yystr; | ||
964 | |||
965 | for (;;) | ||
966 | switch (*++yyp) | ||
967 | { | ||
968 | case '\'': | ||
969 | case ',': | ||
970 | goto do_not_strip_quotes; | ||
971 | |||
972 | case '\\': | ||
973 | if (*++yyp != '\\') | ||
974 | goto do_not_strip_quotes; | ||
975 | /* Fall through. */ | ||
976 | default: | ||
977 | if (yyres) | ||
978 | yyres[yyn] = *yyp; | ||
979 | yyn++; | ||
980 | break; | ||
981 | |||
982 | case '"': | ||
983 | if (yyres) | ||
984 | yyres[yyn] = '\0'; | ||
985 | return yyn; | ||
986 | } | ||
987 | do_not_strip_quotes: ; | ||
988 | } | ||
989 | |||
990 | if (! yyres) | ||
991 | return yystrlen (yystr); | ||
992 | |||
993 | return yystpcpy (yyres, yystr) - yyres; | ||
994 | } | ||
995 | # endif | ||
996 | |||
997 | /* Copy into YYRESULT an error message about the unexpected token | ||
998 | YYCHAR while in state YYSTATE. Return the number of bytes copied, | ||
999 | including the terminating null byte. If YYRESULT is null, do not | ||
1000 | copy anything; just return the number of bytes that would be | ||
1001 | copied. As a special case, return 0 if an ordinary "syntax error" | ||
1002 | message will do. Return YYSIZE_MAXIMUM if overflow occurs during | ||
1003 | size calculation. */ | ||
1004 | static YYSIZE_T | ||
1005 | yysyntax_error (char *yyresult, int yystate, int yychar) | ||
1006 | { | ||
1007 | int yyn = yypact[yystate]; | ||
1008 | |||
1009 | if (! (YYPACT_NINF < yyn && yyn <= YYLAST)) | ||
1010 | return 0; | ||
1011 | else | ||
1012 | { | ||
1013 | int yytype = YYTRANSLATE (yychar); | ||
1014 | YYSIZE_T yysize0 = yytnamerr (0, yytname[yytype]); | ||
1015 | YYSIZE_T yysize = yysize0; | ||
1016 | YYSIZE_T yysize1; | ||
1017 | int yysize_overflow = 0; | ||
1018 | enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 }; | ||
1019 | char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM]; | ||
1020 | int yyx; | ||
1021 | |||
1022 | # if 0 | ||
1023 | /* This is so xgettext sees the translatable formats that are | ||
1024 | constructed on the fly. */ | ||
1025 | YY_("syntax error, unexpected %s"); | ||
1026 | YY_("syntax error, unexpected %s, expecting %s"); | ||
1027 | YY_("syntax error, unexpected %s, expecting %s or %s"); | ||
1028 | YY_("syntax error, unexpected %s, expecting %s or %s or %s"); | ||
1029 | YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s"); | ||
1030 | # endif | ||
1031 | char *yyfmt; | ||
1032 | char const *yyf; | ||
1033 | static char const yyunexpected[] = "syntax error, unexpected %s"; | ||
1034 | static char const yyexpecting[] = ", expecting %s"; | ||
1035 | static char const yyor[] = " or %s"; | ||
1036 | char yyformat[sizeof yyunexpected | ||
1037 | + sizeof yyexpecting - 1 | ||
1038 | + ((YYERROR_VERBOSE_ARGS_MAXIMUM - 2) | ||
1039 | * (sizeof yyor - 1))]; | ||
1040 | char const *yyprefix = yyexpecting; | ||
1041 | |||
1042 | /* Start YYX at -YYN if negative to avoid negative indexes in | ||
1043 | YYCHECK. */ | ||
1044 | int yyxbegin = yyn < 0 ? -yyn : 0; | ||
1045 | |||
1046 | /* Stay within bounds of both yycheck and yytname. */ | ||
1047 | int yychecklim = YYLAST - yyn + 1; | ||
1048 | int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS; | ||
1049 | int yycount = 1; | ||
1050 | |||
1051 | yyarg[0] = yytname[yytype]; | ||
1052 | yyfmt = yystpcpy (yyformat, yyunexpected); | ||
1053 | |||
1054 | for (yyx = yyxbegin; yyx < yyxend; ++yyx) | ||
1055 | if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR) | ||
1056 | { | ||
1057 | if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM) | ||
1058 | { | ||
1059 | yycount = 1; | ||
1060 | yysize = yysize0; | ||
1061 | yyformat[sizeof yyunexpected - 1] = '\0'; | ||
1062 | break; | ||
1063 | } | ||
1064 | yyarg[yycount++] = yytname[yyx]; | ||
1065 | yysize1 = yysize + yytnamerr (0, yytname[yyx]); | ||
1066 | yysize_overflow |= (yysize1 < yysize); | ||
1067 | yysize = yysize1; | ||
1068 | yyfmt = yystpcpy (yyfmt, yyprefix); | ||
1069 | yyprefix = yyor; | ||
1070 | } | ||
1071 | |||
1072 | yyf = YY_(yyformat); | ||
1073 | yysize1 = yysize + yystrlen (yyf); | ||
1074 | yysize_overflow |= (yysize1 < yysize); | ||
1075 | yysize = yysize1; | ||
1076 | |||
1077 | if (yysize_overflow) | ||
1078 | return YYSIZE_MAXIMUM; | ||
1079 | |||
1080 | if (yyresult) | ||
1081 | { | ||
1082 | /* Avoid sprintf, as that infringes on the user's name space. | ||
1083 | Don't have undefined behavior even if the translation | ||
1084 | produced a string with the wrong number of "%s"s. */ | ||
1085 | char *yyp = yyresult; | ||
1086 | int yyi = 0; | ||
1087 | while ((*yyp = *yyf) != '\0') | ||
1088 | { | ||
1089 | if (*yyp == '%' && yyf[1] == 's' && yyi < yycount) | ||
1090 | { | ||
1091 | yyp += yytnamerr (yyp, yyarg[yyi++]); | ||
1092 | yyf += 2; | ||
1093 | } | ||
1094 | else | ||
1095 | { | ||
1096 | yyp++; | ||
1097 | yyf++; | ||
1098 | } | ||
1099 | } | ||
1100 | } | ||
1101 | return yysize; | ||
1102 | } | ||
1103 | } | ||
1104 | #endif /* YYERROR_VERBOSE */ | ||
1105 | |||
1106 | |||
1107 | /*-----------------------------------------------. | ||
1108 | | Release the memory associated to this symbol. | | ||
1109 | `-----------------------------------------------*/ | ||
1110 | |||
1111 | /*ARGSUSED*/ | ||
1112 | #if (defined __STDC__ || defined __C99__FUNC__ \ | ||
1113 | || defined __cplusplus || defined _MSC_VER) | ||
1114 | static void | ||
1115 | yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep, YYLTYPE *yylocationp) | ||
1116 | #else | ||
1117 | static void | ||
1118 | yydestruct (yymsg, yytype, yyvaluep, yylocationp) | ||
1119 | const char *yymsg; | ||
1120 | int yytype; | ||
1121 | YYSTYPE *yyvaluep; | ||
1122 | YYLTYPE *yylocationp; | ||
1123 | #endif | ||
1124 | { | ||
1125 | YYUSE (yyvaluep); | ||
1126 | YYUSE (yylocationp); | ||
1127 | |||
1128 | if (!yymsg) | ||
1129 | yymsg = "Deleting"; | ||
1130 | YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp); | ||
1131 | |||
1132 | switch (yytype) | ||
1133 | { | ||
1134 | |||
1135 | default: | ||
1136 | break; | ||
1137 | } | ||
1138 | } | ||
1139 | |||
1140 | |||
1141 | /* Prevent warnings from -Wmissing-prototypes. */ | ||
1142 | |||
1143 | #ifdef YYPARSE_PARAM | ||
1144 | #if defined __STDC__ || defined __cplusplus | ||
1145 | int yyparse (void *YYPARSE_PARAM); | ||
1146 | #else | ||
1147 | int yyparse (); | ||
1148 | #endif | ||
1149 | #else /* ! YYPARSE_PARAM */ | ||
1150 | #if defined __STDC__ || defined __cplusplus | ||
1151 | int yyparse (void); | ||
1152 | #else | ||
1153 | int yyparse (); | ||
1154 | #endif | ||
1155 | #endif /* ! YYPARSE_PARAM */ | ||
1156 | |||
1157 | |||
1158 | |||
1159 | /* The look-ahead symbol. */ | ||
1160 | int yychar; | ||
1161 | |||
1162 | /* The semantic value of the look-ahead symbol. */ | ||
1163 | YYSTYPE yylval; | ||
1164 | |||
1165 | /* Number of syntax errors so far. */ | ||
1166 | int yynerrs; | ||
1167 | /* Location data for the look-ahead symbol. */ | ||
1168 | YYLTYPE yylloc; | ||
1169 | |||
1170 | |||
1171 | |||
1172 | /*----------. | ||
1173 | | yyparse. | | ||
1174 | `----------*/ | ||
1175 | |||
1176 | #ifdef YYPARSE_PARAM | ||
1177 | #if (defined __STDC__ || defined __C99__FUNC__ \ | ||
1178 | || defined __cplusplus || defined _MSC_VER) | ||
1179 | int | ||
1180 | yyparse (void *YYPARSE_PARAM) | ||
1181 | #else | ||
1182 | int | ||
1183 | yyparse (YYPARSE_PARAM) | ||
1184 | void *YYPARSE_PARAM; | ||
1185 | #endif | ||
1186 | #else /* ! YYPARSE_PARAM */ | ||
1187 | #if (defined __STDC__ || defined __C99__FUNC__ \ | ||
1188 | || defined __cplusplus || defined _MSC_VER) | ||
1189 | int | ||
1190 | yyparse (void) | ||
1191 | #else | ||
1192 | int | ||
1193 | yyparse () | ||
1194 | |||
1195 | #endif | ||
1196 | #endif | ||
1197 | { | ||
1198 | |||
1199 | int yystate; | ||
1200 | int yyn; | ||
1201 | int yyresult; | ||
1202 | /* Number of tokens to shift before error messages enabled. */ | ||
1203 | int yyerrstatus; | ||
1204 | /* Look-ahead token as an internal (translated) token number. */ | ||
1205 | int yytoken = 0; | ||
1206 | #if YYERROR_VERBOSE | ||
1207 | /* Buffer for error messages, and its allocated size. */ | ||
1208 | char yymsgbuf[128]; | ||
1209 | char *yymsg = yymsgbuf; | ||
1210 | YYSIZE_T yymsg_alloc = sizeof yymsgbuf; | ||
1211 | #endif | ||
1212 | |||
1213 | /* Three stacks and their tools: | ||
1214 | `yyss': related to states, | ||
1215 | `yyvs': related to semantic values, | ||
1216 | `yyls': related to locations. | ||
1217 | |||
1218 | Refer to the stacks thru separate pointers, to allow yyoverflow | ||
1219 | to reallocate them elsewhere. */ | ||
1220 | |||
1221 | /* The state stack. */ | ||
1222 | yytype_int16 yyssa[YYINITDEPTH]; | ||
1223 | yytype_int16 *yyss = yyssa; | ||
1224 | yytype_int16 *yyssp; | ||
1225 | |||
1226 | /* The semantic value stack. */ | ||
1227 | YYSTYPE yyvsa[YYINITDEPTH]; | ||
1228 | YYSTYPE *yyvs = yyvsa; | ||
1229 | YYSTYPE *yyvsp; | ||
1230 | |||
1231 | /* The location stack. */ | ||
1232 | YYLTYPE yylsa[YYINITDEPTH]; | ||
1233 | YYLTYPE *yyls = yylsa; | ||
1234 | YYLTYPE *yylsp; | ||
1235 | /* The locations where the error started and ended. */ | ||
1236 | YYLTYPE yyerror_range[2]; | ||
1237 | |||
1238 | #define YYPOPSTACK(N) (yyvsp -= (N), yyssp -= (N), yylsp -= (N)) | ||
1239 | |||
1240 | YYSIZE_T yystacksize = YYINITDEPTH; | ||
1241 | |||
1242 | /* The variables used to return semantic value and location from the | ||
1243 | action routines. */ | ||
1244 | YYSTYPE yyval; | ||
1245 | YYLTYPE yyloc; | ||
1246 | |||
1247 | /* The number of symbols on the RHS of the reduced rule. | ||
1248 | Keep to zero when no symbol should be popped. */ | ||
1249 | int yylen = 0; | ||
1250 | |||
1251 | YYDPRINTF ((stderr, "Starting parse\n")); | ||
1252 | |||
1253 | yystate = 0; | ||
1254 | yyerrstatus = 0; | ||
1255 | yynerrs = 0; | ||
1256 | yychar = YYEMPTY; /* Cause a token to be read. */ | ||
1257 | |||
1258 | /* Initialize stack pointers. | ||
1259 | Waste one element of value and location stack | ||
1260 | so that they stay on the same level as the state stack. | ||
1261 | The wasted elements are never initialized. */ | ||
1262 | |||
1263 | yyssp = yyss; | ||
1264 | yyvsp = yyvs; | ||
1265 | yylsp = yyls; | ||
1266 | #if YYLTYPE_IS_TRIVIAL | ||
1267 | /* Initialize the default location before parsing starts. */ | ||
1268 | yylloc.first_line = yylloc.last_line = 1; | ||
1269 | yylloc.first_column = yylloc.last_column = 0; | ||
1270 | #endif | ||
1271 | |||
1272 | goto yysetstate; | ||
1273 | |||
1274 | /*------------------------------------------------------------. | ||
1275 | | yynewstate -- Push a new state, which is found in yystate. | | ||
1276 | `------------------------------------------------------------*/ | ||
1277 | yynewstate: | ||
1278 | /* In all cases, when you get here, the value and location stacks | ||
1279 | have just been pushed. So pushing a state here evens the stacks. */ | ||
1280 | yyssp++; | ||
1281 | |||
1282 | yysetstate: | ||
1283 | *yyssp = yystate; | ||
1284 | |||
1285 | if (yyss + yystacksize - 1 <= yyssp) | ||
1286 | { | ||
1287 | /* Get the current used size of the three stacks, in elements. */ | ||
1288 | YYSIZE_T yysize = yyssp - yyss + 1; | ||
1289 | |||
1290 | #ifdef yyoverflow | ||
1291 | { | ||
1292 | /* Give user a chance to reallocate the stack. Use copies of | ||
1293 | these so that the &'s don't force the real ones into | ||
1294 | memory. */ | ||
1295 | YYSTYPE *yyvs1 = yyvs; | ||
1296 | yytype_int16 *yyss1 = yyss; | ||
1297 | YYLTYPE *yyls1 = yyls; | ||
1298 | |||
1299 | /* Each stack pointer address is followed by the size of the | ||
1300 | data in use in that stack, in bytes. This used to be a | ||
1301 | conditional around just the two extra args, but that might | ||
1302 | be undefined if yyoverflow is a macro. */ | ||
1303 | yyoverflow (YY_("memory exhausted"), | ||
1304 | &yyss1, yysize * sizeof (*yyssp), | ||
1305 | &yyvs1, yysize * sizeof (*yyvsp), | ||
1306 | &yyls1, yysize * sizeof (*yylsp), | ||
1307 | &yystacksize); | ||
1308 | yyls = yyls1; | ||
1309 | yyss = yyss1; | ||
1310 | yyvs = yyvs1; | ||
1311 | } | ||
1312 | #else /* no yyoverflow */ | ||
1313 | # ifndef YYSTACK_RELOCATE | ||
1314 | goto yyexhaustedlab; | ||
1315 | # else | ||
1316 | /* Extend the stack our own way. */ | ||
1317 | if (YYMAXDEPTH <= yystacksize) | ||
1318 | goto yyexhaustedlab; | ||
1319 | yystacksize *= 2; | ||
1320 | if (YYMAXDEPTH < yystacksize) | ||
1321 | yystacksize = YYMAXDEPTH; | ||
1322 | |||
1323 | { | ||
1324 | yytype_int16 *yyss1 = yyss; | ||
1325 | union yyalloc *yyptr = | ||
1326 | (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize)); | ||
1327 | if (! yyptr) | ||
1328 | goto yyexhaustedlab; | ||
1329 | YYSTACK_RELOCATE (yyss); | ||
1330 | YYSTACK_RELOCATE (yyvs); | ||
1331 | YYSTACK_RELOCATE (yyls); | ||
1332 | # undef YYSTACK_RELOCATE | ||
1333 | if (yyss1 != yyssa) | ||
1334 | YYSTACK_FREE (yyss1); | ||
1335 | } | ||
1336 | # endif | ||
1337 | #endif /* no yyoverflow */ | ||
1338 | |||
1339 | yyssp = yyss + yysize - 1; | ||
1340 | yyvsp = yyvs + yysize - 1; | ||
1341 | yylsp = yyls + yysize - 1; | ||
1342 | |||
1343 | YYDPRINTF ((stderr, "Stack size increased to %lu\n", | ||
1344 | (unsigned long int) yystacksize)); | ||
1345 | |||
1346 | if (yyss + yystacksize - 1 <= yyssp) | ||
1347 | YYABORT; | ||
1348 | } | ||
1349 | |||
1350 | YYDPRINTF ((stderr, "Entering state %d\n", yystate)); | ||
1351 | |||
1352 | goto yybackup; | ||
1353 | |||
1354 | /*-----------. | ||
1355 | | yybackup. | | ||
1356 | `-----------*/ | ||
1357 | yybackup: | ||
1358 | |||
1359 | /* Do appropriate processing given the current state. Read a | ||
1360 | look-ahead token if we need one and don't already have one. */ | ||
1361 | |||
1362 | /* First try to decide what to do without reference to look-ahead token. */ | ||
1363 | yyn = yypact[yystate]; | ||
1364 | if (yyn == YYPACT_NINF) | ||
1365 | goto yydefault; | ||
1366 | |||
1367 | /* Not known => get a look-ahead token if don't already have one. */ | ||
1368 | |||
1369 | /* YYCHAR is either YYEMPTY or YYEOF or a valid look-ahead symbol. */ | ||
1370 | if (yychar == YYEMPTY) | ||
1371 | { | ||
1372 | YYDPRINTF ((stderr, "Reading a token: ")); | ||
1373 | yychar = YYLEX; | ||
1374 | } | ||
1375 | |||
1376 | if (yychar <= YYEOF) | ||
1377 | { | ||
1378 | yychar = yytoken = YYEOF; | ||
1379 | YYDPRINTF ((stderr, "Now at end of input.\n")); | ||
1380 | } | ||
1381 | else | ||
1382 | { | ||
1383 | yytoken = YYTRANSLATE (yychar); | ||
1384 | YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc); | ||
1385 | } | ||
1386 | |||
1387 | /* If the proper action on seeing token YYTOKEN is to reduce or to | ||
1388 | detect an error, take that action. */ | ||
1389 | yyn += yytoken; | ||
1390 | if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken) | ||
1391 | goto yydefault; | ||
1392 | yyn = yytable[yyn]; | ||
1393 | if (yyn <= 0) | ||
1394 | { | ||
1395 | if (yyn == 0 || yyn == YYTABLE_NINF) | ||
1396 | goto yyerrlab; | ||
1397 | yyn = -yyn; | ||
1398 | goto yyreduce; | ||
1399 | } | ||
1400 | |||
1401 | if (yyn == YYFINAL) | ||
1402 | YYACCEPT; | ||
1403 | |||
1404 | /* Count tokens shifted since error; after three, turn off error | ||
1405 | status. */ | ||
1406 | if (yyerrstatus) | ||
1407 | yyerrstatus--; | ||
1408 | |||
1409 | /* Shift the look-ahead token. */ | ||
1410 | YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc); | ||
1411 | |||
1412 | /* Discard the shifted token unless it is eof. */ | ||
1413 | if (yychar != YYEOF) | ||
1414 | yychar = YYEMPTY; | ||
1415 | |||
1416 | yystate = yyn; | ||
1417 | *++yyvsp = yylval; | ||
1418 | *++yylsp = yylloc; | ||
1419 | goto yynewstate; | ||
1420 | |||
1421 | |||
1422 | /*-----------------------------------------------------------. | ||
1423 | | yydefault -- do the default action for the current state. | | ||
1424 | `-----------------------------------------------------------*/ | ||
1425 | yydefault: | ||
1426 | yyn = yydefact[yystate]; | ||
1427 | if (yyn == 0) | ||
1428 | goto yyerrlab; | ||
1429 | goto yyreduce; | ||
1430 | |||
1431 | |||
1432 | /*-----------------------------. | ||
1433 | | yyreduce -- Do a reduction. | | ||
1434 | `-----------------------------*/ | ||
1435 | yyreduce: | ||
1436 | /* yyn is the number of a rule to reduce with. */ | ||
1437 | yylen = yyr2[yyn]; | ||
1438 | |||
1439 | /* If YYLEN is nonzero, implement the default value of the action: | ||
1440 | `$$ = $1'. | ||
1441 | |||
1442 | Otherwise, the following line sets YYVAL to garbage. | ||
1443 | This behavior is undocumented and Bison | ||
1444 | users should not rely upon it. Assigning to YYVAL | ||
1445 | unconditionally makes the parser a bit smaller, and it avoids a | ||
1446 | GCC warning that YYVAL may be used uninitialized. */ | ||
1447 | yyval = yyvsp[1-yylen]; | ||
1448 | |||
1449 | /* Default location. */ | ||
1450 | YYLLOC_DEFAULT (yyloc, (yylsp - yylen), yylen); | ||
1451 | YY_REDUCE_PRINT (yyn); | ||
1452 | switch (yyn) | ||
1453 | { | ||
1454 | case 2: | ||
1455 | #line 90 "dtc-parser.y" | ||
1456 | { | ||
1457 | the_boot_info = build_boot_info((yyvsp[(3) - (4)].re), (yyvsp[(4) - (4)].node), 0); | ||
1458 | ;} | ||
1459 | break; | ||
1460 | |||
1461 | case 3: | ||
1462 | #line 94 "dtc-parser.y" | ||
1463 | { | ||
1464 | the_boot_info = build_boot_info((yyvsp[(1) - (2)].re), (yyvsp[(2) - (2)].node), 0); | ||
1465 | ;} | ||
1466 | break; | ||
1467 | |||
1468 | case 4: | ||
1469 | #line 101 "dtc-parser.y" | ||
1470 | { | ||
1471 | (yyval.re) = NULL; | ||
1472 | ;} | ||
1473 | break; | ||
1474 | |||
1475 | case 5: | ||
1476 | #line 105 "dtc-parser.y" | ||
1477 | { | ||
1478 | (yyval.re) = chain_reserve_entry((yyvsp[(1) - (2)].re), (yyvsp[(2) - (2)].re)); | ||
1479 | ;} | ||
1480 | break; | ||
1481 | |||
1482 | case 6: | ||
1483 | #line 112 "dtc-parser.y" | ||
1484 | { | ||
1485 | (yyval.re) = build_reserve_entry((yyvsp[(3) - (5)].addr), (yyvsp[(4) - (5)].addr), (yyvsp[(1) - (5)].labelref)); | ||
1486 | ;} | ||
1487 | break; | ||
1488 | |||
1489 | case 7: | ||
1490 | #line 119 "dtc-parser.y" | ||
1491 | { | ||
1492 | (yyval.re) = NULL; | ||
1493 | ;} | ||
1494 | break; | ||
1495 | |||
1496 | case 8: | ||
1497 | #line 123 "dtc-parser.y" | ||
1498 | { | ||
1499 | (yyval.re) = chain_reserve_entry((yyvsp[(1) - (2)].re), (yyvsp[(2) - (2)].re)); | ||
1500 | ;} | ||
1501 | break; | ||
1502 | |||
1503 | case 9: | ||
1504 | #line 130 "dtc-parser.y" | ||
1505 | { | ||
1506 | (yyval.re) = (yyvsp[(1) - (1)].re); | ||
1507 | ;} | ||
1508 | break; | ||
1509 | |||
1510 | case 10: | ||
1511 | #line 134 "dtc-parser.y" | ||
1512 | { | ||
1513 | (yyval.re) = build_reserve_entry((yyvsp[(3) - (6)].addr), (yyvsp[(5) - (6)].addr) - (yyvsp[(3) - (6)].addr) + 1, (yyvsp[(1) - (6)].labelref)); | ||
1514 | ;} | ||
1515 | break; | ||
1516 | |||
1517 | case 11: | ||
1518 | #line 141 "dtc-parser.y" | ||
1519 | { | ||
1520 | (yyval.addr) = eval_literal((yyvsp[(1) - (1)].literal), 0, 64); | ||
1521 | ;} | ||
1522 | break; | ||
1523 | |||
1524 | case 12: | ||
1525 | #line 145 "dtc-parser.y" | ||
1526 | { | ||
1527 | (yyval.addr) = eval_literal((yyvsp[(1) - (1)].literal), 16, 64); | ||
1528 | ;} | ||
1529 | break; | ||
1530 | |||
1531 | case 13: | ||
1532 | #line 152 "dtc-parser.y" | ||
1533 | { | ||
1534 | (yyval.node) = name_node((yyvsp[(2) - (2)].node), "", NULL); | ||
1535 | ;} | ||
1536 | break; | ||
1537 | |||
1538 | case 14: | ||
1539 | #line 159 "dtc-parser.y" | ||
1540 | { | ||
1541 | (yyval.node) = build_node((yyvsp[(2) - (5)].proplist), (yyvsp[(3) - (5)].nodelist)); | ||
1542 | ;} | ||
1543 | break; | ||
1544 | |||
1545 | case 15: | ||
1546 | #line 166 "dtc-parser.y" | ||
1547 | { | ||
1548 | (yyval.proplist) = NULL; | ||
1549 | ;} | ||
1550 | break; | ||
1551 | |||
1552 | case 16: | ||
1553 | #line 170 "dtc-parser.y" | ||
1554 | { | ||
1555 | (yyval.proplist) = chain_property((yyvsp[(2) - (2)].prop), (yyvsp[(1) - (2)].proplist)); | ||
1556 | ;} | ||
1557 | break; | ||
1558 | |||
1559 | case 17: | ||
1560 | #line 177 "dtc-parser.y" | ||
1561 | { | ||
1562 | (yyval.prop) = build_property((yyvsp[(2) - (5)].propnodename), (yyvsp[(4) - (5)].data), (yyvsp[(1) - (5)].labelref)); | ||
1563 | ;} | ||
1564 | break; | ||
1565 | |||
1566 | case 18: | ||
1567 | #line 181 "dtc-parser.y" | ||
1568 | { | ||
1569 | (yyval.prop) = build_property((yyvsp[(2) - (3)].propnodename), empty_data, (yyvsp[(1) - (3)].labelref)); | ||
1570 | ;} | ||
1571 | break; | ||
1572 | |||
1573 | case 19: | ||
1574 | #line 188 "dtc-parser.y" | ||
1575 | { | ||
1576 | (yyval.data) = data_merge((yyvsp[(1) - (2)].data), (yyvsp[(2) - (2)].data)); | ||
1577 | ;} | ||
1578 | break; | ||
1579 | |||
1580 | case 20: | ||
1581 | #line 192 "dtc-parser.y" | ||
1582 | { | ||
1583 | (yyval.data) = data_merge((yyvsp[(1) - (4)].data), (yyvsp[(3) - (4)].data)); | ||
1584 | ;} | ||
1585 | break; | ||
1586 | |||
1587 | case 21: | ||
1588 | #line 196 "dtc-parser.y" | ||
1589 | { | ||
1590 | (yyval.data) = data_merge((yyvsp[(1) - (4)].data), (yyvsp[(3) - (4)].data)); | ||
1591 | ;} | ||
1592 | break; | ||
1593 | |||
1594 | case 22: | ||
1595 | #line 200 "dtc-parser.y" | ||
1596 | { | ||
1597 | (yyval.data) = data_add_marker((yyvsp[(1) - (2)].data), REF_PATH, (yyvsp[(2) - (2)].labelref)); | ||
1598 | ;} | ||
1599 | break; | ||
1600 | |||
1601 | case 23: | ||
1602 | #line 204 "dtc-parser.y" | ||
1603 | { | ||
1604 | struct search_path path = { srcpos_file->dir, NULL, NULL }; | ||
1605 | struct dtc_file *file = dtc_open_file((yyvsp[(4) - (9)].data).val, &path); | ||
1606 | struct data d = empty_data; | ||
1607 | |||
1608 | if ((yyvsp[(6) - (9)].addr) != 0) | ||
1609 | if (fseek(file->file, (yyvsp[(6) - (9)].addr), SEEK_SET) != 0) | ||
1610 | yyerrorf("Couldn't seek to offset %llu in \"%s\": %s", | ||
1611 | (unsigned long long)(yyvsp[(6) - (9)].addr), | ||
1612 | (yyvsp[(4) - (9)].data).val, strerror(errno)); | ||
1613 | |||
1614 | d = data_copy_file(file->file, (yyvsp[(8) - (9)].addr)); | ||
1615 | |||
1616 | (yyval.data) = data_merge((yyvsp[(1) - (9)].data), d); | ||
1617 | dtc_close_file(file); | ||
1618 | ;} | ||
1619 | break; | ||
1620 | |||
1621 | case 24: | ||
1622 | #line 221 "dtc-parser.y" | ||
1623 | { | ||
1624 | struct search_path path = { srcpos_file->dir, NULL, NULL }; | ||
1625 | struct dtc_file *file = dtc_open_file((yyvsp[(4) - (5)].data).val, &path); | ||
1626 | struct data d = empty_data; | ||
1627 | |||
1628 | d = data_copy_file(file->file, -1); | ||
1629 | |||
1630 | (yyval.data) = data_merge((yyvsp[(1) - (5)].data), d); | ||
1631 | dtc_close_file(file); | ||
1632 | ;} | ||
1633 | break; | ||
1634 | |||
1635 | case 25: | ||
1636 | #line 232 "dtc-parser.y" | ||
1637 | { | ||
1638 | (yyval.data) = data_add_marker((yyvsp[(1) - (2)].data), LABEL, (yyvsp[(2) - (2)].labelref)); | ||
1639 | ;} | ||
1640 | break; | ||
1641 | |||
1642 | case 26: | ||
1643 | #line 239 "dtc-parser.y" | ||
1644 | { | ||
1645 | (yyval.data) = empty_data; | ||
1646 | ;} | ||
1647 | break; | ||
1648 | |||
1649 | case 27: | ||
1650 | #line 243 "dtc-parser.y" | ||
1651 | { | ||
1652 | (yyval.data) = (yyvsp[(1) - (2)].data); | ||
1653 | ;} | ||
1654 | break; | ||
1655 | |||
1656 | case 28: | ||
1657 | #line 247 "dtc-parser.y" | ||
1658 | { | ||
1659 | (yyval.data) = data_add_marker((yyvsp[(1) - (2)].data), LABEL, (yyvsp[(2) - (2)].labelref)); | ||
1660 | ;} | ||
1661 | break; | ||
1662 | |||
1663 | case 29: | ||
1664 | #line 254 "dtc-parser.y" | ||
1665 | { | ||
1666 | (yyval.data) = empty_data; | ||
1667 | ;} | ||
1668 | break; | ||
1669 | |||
1670 | case 30: | ||
1671 | #line 258 "dtc-parser.y" | ||
1672 | { | ||
1673 | (yyval.data) = data_append_cell((yyvsp[(1) - (2)].data), (yyvsp[(2) - (2)].cell)); | ||
1674 | ;} | ||
1675 | break; | ||
1676 | |||
1677 | case 31: | ||
1678 | #line 262 "dtc-parser.y" | ||
1679 | { | ||
1680 | (yyval.data) = data_append_cell(data_add_marker((yyvsp[(1) - (2)].data), REF_PHANDLE, | ||
1681 | (yyvsp[(2) - (2)].labelref)), -1); | ||
1682 | ;} | ||
1683 | break; | ||
1684 | |||
1685 | case 32: | ||
1686 | #line 267 "dtc-parser.y" | ||
1687 | { | ||
1688 | (yyval.data) = data_add_marker((yyvsp[(1) - (2)].data), LABEL, (yyvsp[(2) - (2)].labelref)); | ||
1689 | ;} | ||
1690 | break; | ||
1691 | |||
1692 | case 33: | ||
1693 | #line 274 "dtc-parser.y" | ||
1694 | { | ||
1695 | (yyval.cbase) = 16; | ||
1696 | ;} | ||
1697 | break; | ||
1698 | |||
1699 | case 35: | ||
1700 | #line 282 "dtc-parser.y" | ||
1701 | { | ||
1702 | (yyval.cell) = eval_literal((yyvsp[(1) - (1)].literal), 0, 32); | ||
1703 | ;} | ||
1704 | break; | ||
1705 | |||
1706 | case 36: | ||
1707 | #line 286 "dtc-parser.y" | ||
1708 | { | ||
1709 | (yyval.cell) = eval_literal((yyvsp[(2) - (2)].literal), (yyvsp[(1) - (2)].cbase), 32); | ||
1710 | ;} | ||
1711 | break; | ||
1712 | |||
1713 | case 37: | ||
1714 | #line 293 "dtc-parser.y" | ||
1715 | { | ||
1716 | (yyval.data) = empty_data; | ||
1717 | ;} | ||
1718 | break; | ||
1719 | |||
1720 | case 38: | ||
1721 | #line 297 "dtc-parser.y" | ||
1722 | { | ||
1723 | (yyval.data) = data_append_byte((yyvsp[(1) - (2)].data), (yyvsp[(2) - (2)].byte)); | ||
1724 | ;} | ||
1725 | break; | ||
1726 | |||
1727 | case 39: | ||
1728 | #line 301 "dtc-parser.y" | ||
1729 | { | ||
1730 | (yyval.data) = data_add_marker((yyvsp[(1) - (2)].data), LABEL, (yyvsp[(2) - (2)].labelref)); | ||
1731 | ;} | ||
1732 | break; | ||
1733 | |||
1734 | case 40: | ||
1735 | #line 308 "dtc-parser.y" | ||
1736 | { | ||
1737 | (yyval.nodelist) = NULL; | ||
1738 | ;} | ||
1739 | break; | ||
1740 | |||
1741 | case 41: | ||
1742 | #line 312 "dtc-parser.y" | ||
1743 | { | ||
1744 | (yyval.nodelist) = chain_node((yyvsp[(1) - (2)].node), (yyvsp[(2) - (2)].nodelist)); | ||
1745 | ;} | ||
1746 | break; | ||
1747 | |||
1748 | case 42: | ||
1749 | #line 316 "dtc-parser.y" | ||
1750 | { | ||
1751 | yyerror("syntax error: properties must precede subnodes"); | ||
1752 | YYERROR; | ||
1753 | ;} | ||
1754 | break; | ||
1755 | |||
1756 | case 43: | ||
1757 | #line 324 "dtc-parser.y" | ||
1758 | { | ||
1759 | (yyval.node) = name_node((yyvsp[(3) - (3)].node), (yyvsp[(2) - (3)].propnodename), (yyvsp[(1) - (3)].labelref)); | ||
1760 | ;} | ||
1761 | break; | ||
1762 | |||
1763 | case 44: | ||
1764 | #line 331 "dtc-parser.y" | ||
1765 | { | ||
1766 | (yyval.labelref) = NULL; | ||
1767 | ;} | ||
1768 | break; | ||
1769 | |||
1770 | case 45: | ||
1771 | #line 335 "dtc-parser.y" | ||
1772 | { | ||
1773 | (yyval.labelref) = (yyvsp[(1) - (1)].labelref); | ||
1774 | ;} | ||
1775 | break; | ||
1776 | |||
1777 | |||
1778 | /* Line 1267 of yacc.c. */ | ||
1779 | #line 1780 "dtc-parser.tab.c" | ||
1780 | default: break; | ||
1781 | } | ||
1782 | YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc); | ||
1783 | |||
1784 | YYPOPSTACK (yylen); | ||
1785 | yylen = 0; | ||
1786 | YY_STACK_PRINT (yyss, yyssp); | ||
1787 | |||
1788 | *++yyvsp = yyval; | ||
1789 | *++yylsp = yyloc; | ||
1790 | |||
1791 | /* Now `shift' the result of the reduction. Determine what state | ||
1792 | that goes to, based on the state we popped back to and the rule | ||
1793 | number reduced by. */ | ||
1794 | |||
1795 | yyn = yyr1[yyn]; | ||
1796 | |||
1797 | yystate = yypgoto[yyn - YYNTOKENS] + *yyssp; | ||
1798 | if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp) | ||
1799 | yystate = yytable[yystate]; | ||
1800 | else | ||
1801 | yystate = yydefgoto[yyn - YYNTOKENS]; | ||
1802 | |||
1803 | goto yynewstate; | ||
1804 | |||
1805 | |||
1806 | /*------------------------------------. | ||
1807 | | yyerrlab -- here on detecting error | | ||
1808 | `------------------------------------*/ | ||
1809 | yyerrlab: | ||
1810 | /* If not already recovering from an error, report this error. */ | ||
1811 | if (!yyerrstatus) | ||
1812 | { | ||
1813 | ++yynerrs; | ||
1814 | #if ! YYERROR_VERBOSE | ||
1815 | yyerror (YY_("syntax error")); | ||
1816 | #else | ||
1817 | { | ||
1818 | YYSIZE_T yysize = yysyntax_error (0, yystate, yychar); | ||
1819 | if (yymsg_alloc < yysize && yymsg_alloc < YYSTACK_ALLOC_MAXIMUM) | ||
1820 | { | ||
1821 | YYSIZE_T yyalloc = 2 * yysize; | ||
1822 | if (! (yysize <= yyalloc && yyalloc <= YYSTACK_ALLOC_MAXIMUM)) | ||
1823 | yyalloc = YYSTACK_ALLOC_MAXIMUM; | ||
1824 | if (yymsg != yymsgbuf) | ||
1825 | YYSTACK_FREE (yymsg); | ||
1826 | yymsg = (char *) YYSTACK_ALLOC (yyalloc); | ||
1827 | if (yymsg) | ||
1828 | yymsg_alloc = yyalloc; | ||
1829 | else | ||
1830 | { | ||
1831 | yymsg = yymsgbuf; | ||
1832 | yymsg_alloc = sizeof yymsgbuf; | ||
1833 | } | ||
1834 | } | ||
1835 | |||
1836 | if (0 < yysize && yysize <= yymsg_alloc) | ||
1837 | { | ||
1838 | (void) yysyntax_error (yymsg, yystate, yychar); | ||
1839 | yyerror (yymsg); | ||
1840 | } | ||
1841 | else | ||
1842 | { | ||
1843 | yyerror (YY_("syntax error")); | ||
1844 | if (yysize != 0) | ||
1845 | goto yyexhaustedlab; | ||
1846 | } | ||
1847 | } | ||
1848 | #endif | ||
1849 | } | ||
1850 | |||
1851 | yyerror_range[0] = yylloc; | ||
1852 | |||
1853 | if (yyerrstatus == 3) | ||
1854 | { | ||
1855 | /* If just tried and failed to reuse look-ahead token after an | ||
1856 | error, discard it. */ | ||
1857 | |||
1858 | if (yychar <= YYEOF) | ||
1859 | { | ||
1860 | /* Return failure if at end of input. */ | ||
1861 | if (yychar == YYEOF) | ||
1862 | YYABORT; | ||
1863 | } | ||
1864 | else | ||
1865 | { | ||
1866 | yydestruct ("Error: discarding", | ||
1867 | yytoken, &yylval, &yylloc); | ||
1868 | yychar = YYEMPTY; | ||
1869 | } | ||
1870 | } | ||
1871 | |||
1872 | /* Else will try to reuse look-ahead token after shifting the error | ||
1873 | token. */ | ||
1874 | goto yyerrlab1; | ||
1875 | |||
1876 | |||
1877 | /*---------------------------------------------------. | ||
1878 | | yyerrorlab -- error raised explicitly by YYERROR. | | ||
1879 | `---------------------------------------------------*/ | ||
1880 | yyerrorlab: | ||
1881 | |||
1882 | /* Pacify compilers like GCC when the user code never invokes | ||
1883 | YYERROR and the label yyerrorlab therefore never appears in user | ||
1884 | code. */ | ||
1885 | if (/*CONSTCOND*/ 0) | ||
1886 | goto yyerrorlab; | ||
1887 | |||
1888 | yyerror_range[0] = yylsp[1-yylen]; | ||
1889 | /* Do not reclaim the symbols of the rule which action triggered | ||
1890 | this YYERROR. */ | ||
1891 | YYPOPSTACK (yylen); | ||
1892 | yylen = 0; | ||
1893 | YY_STACK_PRINT (yyss, yyssp); | ||
1894 | yystate = *yyssp; | ||
1895 | goto yyerrlab1; | ||
1896 | |||
1897 | |||
1898 | /*-------------------------------------------------------------. | ||
1899 | | yyerrlab1 -- common code for both syntax error and YYERROR. | | ||
1900 | `-------------------------------------------------------------*/ | ||
1901 | yyerrlab1: | ||
1902 | yyerrstatus = 3; /* Each real token shifted decrements this. */ | ||
1903 | |||
1904 | for (;;) | ||
1905 | { | ||
1906 | yyn = yypact[yystate]; | ||
1907 | if (yyn != YYPACT_NINF) | ||
1908 | { | ||
1909 | yyn += YYTERROR; | ||
1910 | if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR) | ||
1911 | { | ||
1912 | yyn = yytable[yyn]; | ||
1913 | if (0 < yyn) | ||
1914 | break; | ||
1915 | } | ||
1916 | } | ||
1917 | |||
1918 | /* Pop the current state because it cannot handle the error token. */ | ||
1919 | if (yyssp == yyss) | ||
1920 | YYABORT; | ||
1921 | |||
1922 | yyerror_range[0] = *yylsp; | ||
1923 | yydestruct ("Error: popping", | ||
1924 | yystos[yystate], yyvsp, yylsp); | ||
1925 | YYPOPSTACK (1); | ||
1926 | yystate = *yyssp; | ||
1927 | YY_STACK_PRINT (yyss, yyssp); | ||
1928 | } | ||
1929 | |||
1930 | if (yyn == YYFINAL) | ||
1931 | YYACCEPT; | ||
1932 | |||
1933 | *++yyvsp = yylval; | ||
1934 | |||
1935 | yyerror_range[1] = yylloc; | ||
1936 | /* Using YYLLOC is tempting, but would change the location of | ||
1937 | the look-ahead. YYLOC is available though. */ | ||
1938 | YYLLOC_DEFAULT (yyloc, (yyerror_range - 1), 2); | ||
1939 | *++yylsp = yyloc; | ||
1940 | |||
1941 | /* Shift the error token. */ | ||
1942 | YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp); | ||
1943 | |||
1944 | yystate = yyn; | ||
1945 | goto yynewstate; | ||
1946 | |||
1947 | |||
1948 | /*-------------------------------------. | ||
1949 | | yyacceptlab -- YYACCEPT comes here. | | ||
1950 | `-------------------------------------*/ | ||
1951 | yyacceptlab: | ||
1952 | yyresult = 0; | ||
1953 | goto yyreturn; | ||
1954 | |||
1955 | /*-----------------------------------. | ||
1956 | | yyabortlab -- YYABORT comes here. | | ||
1957 | `-----------------------------------*/ | ||
1958 | yyabortlab: | ||
1959 | yyresult = 1; | ||
1960 | goto yyreturn; | ||
1961 | |||
1962 | #ifndef yyoverflow | ||
1963 | /*-------------------------------------------------. | ||
1964 | | yyexhaustedlab -- memory exhaustion comes here. | | ||
1965 | `-------------------------------------------------*/ | ||
1966 | yyexhaustedlab: | ||
1967 | yyerror (YY_("memory exhausted")); | ||
1968 | yyresult = 2; | ||
1969 | /* Fall through. */ | ||
1970 | #endif | ||
1971 | |||
1972 | yyreturn: | ||
1973 | if (yychar != YYEOF && yychar != YYEMPTY) | ||
1974 | yydestruct ("Cleanup: discarding lookahead", | ||
1975 | yytoken, &yylval, &yylloc); | ||
1976 | /* Do not reclaim the symbols of the rule which action triggered | ||
1977 | this YYABORT or YYACCEPT. */ | ||
1978 | YYPOPSTACK (yylen); | ||
1979 | YY_STACK_PRINT (yyss, yyssp); | ||
1980 | while (yyssp != yyss) | ||
1981 | { | ||
1982 | yydestruct ("Cleanup: popping", | ||
1983 | yystos[*yyssp], yyvsp, yylsp); | ||
1984 | YYPOPSTACK (1); | ||
1985 | } | ||
1986 | #ifndef yyoverflow | ||
1987 | if (yyss != yyssa) | ||
1988 | YYSTACK_FREE (yyss); | ||
1989 | #endif | ||
1990 | #if YYERROR_VERBOSE | ||
1991 | if (yymsg != yymsgbuf) | ||
1992 | YYSTACK_FREE (yymsg); | ||
1993 | #endif | ||
1994 | /* Make sure YYID is used. */ | ||
1995 | return YYID (yyresult); | ||
1996 | } | ||
1997 | |||
1998 | |||
1999 | #line 340 "dtc-parser.y" | ||
2000 | |||
2001 | |||
2002 | void yyerrorf(char const *s, ...) | ||
2003 | { | ||
2004 | const char *fname = srcpos_file ? srcpos_file->name : "<no-file>"; | ||
2005 | va_list va; | ||
2006 | va_start(va, s); | ||
2007 | |||
2008 | if (strcmp(fname, "-") == 0) | ||
2009 | fname = "stdin"; | ||
2010 | |||
2011 | fprintf(stderr, "%s:%d ", fname, yylloc.first_line); | ||
2012 | vfprintf(stderr, s, va); | ||
2013 | fprintf(stderr, "\n"); | ||
2014 | |||
2015 | treesource_error = 1; | ||
2016 | va_end(va); | ||
2017 | } | ||
2018 | |||
2019 | void yyerror (char const *s) | ||
2020 | { | ||
2021 | yyerrorf("%s", s); | ||
2022 | } | ||
2023 | |||
2024 | static unsigned long long eval_literal(const char *s, int base, int bits) | ||
2025 | { | ||
2026 | unsigned long long val; | ||
2027 | char *e; | ||
2028 | |||
2029 | errno = 0; | ||
2030 | val = strtoull(s, &e, base); | ||
2031 | if (*e) | ||
2032 | yyerror("bad characters in literal"); | ||
2033 | else if ((errno == ERANGE) | ||
2034 | || ((bits < 64) && (val >= (1ULL << bits)))) | ||
2035 | yyerror("literal out of range"); | ||
2036 | else if (errno != 0) | ||
2037 | yyerror("bad literal"); | ||
2038 | return val; | ||
2039 | } | ||
2040 | |||
diff --git a/arch/powerpc/boot/dtc-src/dtc-parser.tab.h_shipped b/arch/powerpc/boot/dtc-src/dtc-parser.tab.h_shipped deleted file mode 100644 index ba99100d55c9..000000000000 --- a/arch/powerpc/boot/dtc-src/dtc-parser.tab.h_shipped +++ /dev/null | |||
@@ -1,113 +0,0 @@ | |||
1 | /* A Bison parser, made by GNU Bison 2.3. */ | ||
2 | |||
3 | /* Skeleton interface for Bison's Yacc-like parsers in C | ||
4 | |||
5 | Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006 | ||
6 | Free Software Foundation, Inc. | ||
7 | |||
8 | This program is free software; you can redistribute it and/or modify | ||
9 | it under the terms of the GNU General Public License as published by | ||
10 | the Free Software Foundation; either version 2, or (at your option) | ||
11 | any later version. | ||
12 | |||
13 | This program is distributed in the hope that it will be useful, | ||
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | GNU General Public License for more details. | ||
17 | |||
18 | You should have received a copy of the GNU General Public License | ||
19 | along with this program; if not, write to the Free Software | ||
20 | Foundation, Inc., 51 Franklin Street, Fifth Floor, | ||
21 | Boston, MA 02110-1301, USA. */ | ||
22 | |||
23 | /* As a special exception, you may create a larger work that contains | ||
24 | part or all of the Bison parser skeleton and distribute that work | ||
25 | under terms of your choice, so long as that work isn't itself a | ||
26 | parser generator using the skeleton or a modified version thereof | ||
27 | as a parser skeleton. Alternatively, if you modify or redistribute | ||
28 | the parser skeleton itself, you may (at your option) remove this | ||
29 | special exception, which will cause the skeleton and the resulting | ||
30 | Bison output files to be licensed under the GNU General Public | ||
31 | License without this special exception. | ||
32 | |||
33 | This special exception was added by the Free Software Foundation in | ||
34 | version 2.2 of Bison. */ | ||
35 | |||
36 | /* Tokens. */ | ||
37 | #ifndef YYTOKENTYPE | ||
38 | # define YYTOKENTYPE | ||
39 | /* Put the tokens into the symbol table, so that GDB and other debuggers | ||
40 | know about them. */ | ||
41 | enum yytokentype { | ||
42 | DT_V1 = 258, | ||
43 | DT_MEMRESERVE = 259, | ||
44 | DT_PROPNODENAME = 260, | ||
45 | DT_LITERAL = 261, | ||
46 | DT_LEGACYLITERAL = 262, | ||
47 | DT_BASE = 263, | ||
48 | DT_BYTE = 264, | ||
49 | DT_STRING = 265, | ||
50 | DT_LABEL = 266, | ||
51 | DT_REF = 267, | ||
52 | DT_INCBIN = 268 | ||
53 | }; | ||
54 | #endif | ||
55 | /* Tokens. */ | ||
56 | #define DT_V1 258 | ||
57 | #define DT_MEMRESERVE 259 | ||
58 | #define DT_PROPNODENAME 260 | ||
59 | #define DT_LITERAL 261 | ||
60 | #define DT_LEGACYLITERAL 262 | ||
61 | #define DT_BASE 263 | ||
62 | #define DT_BYTE 264 | ||
63 | #define DT_STRING 265 | ||
64 | #define DT_LABEL 266 | ||
65 | #define DT_REF 267 | ||
66 | #define DT_INCBIN 268 | ||
67 | |||
68 | |||
69 | |||
70 | |||
71 | #if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED | ||
72 | typedef union YYSTYPE | ||
73 | #line 37 "dtc-parser.y" | ||
74 | { | ||
75 | char *propnodename; | ||
76 | char *literal; | ||
77 | char *labelref; | ||
78 | unsigned int cbase; | ||
79 | uint8_t byte; | ||
80 | struct data data; | ||
81 | |||
82 | uint64_t addr; | ||
83 | cell_t cell; | ||
84 | struct property *prop; | ||
85 | struct property *proplist; | ||
86 | struct node *node; | ||
87 | struct node *nodelist; | ||
88 | struct reserve_info *re; | ||
89 | } | ||
90 | /* Line 1489 of yacc.c. */ | ||
91 | #line 92 "dtc-parser.tab.h" | ||
92 | YYSTYPE; | ||
93 | # define yystype YYSTYPE /* obsolescent; will be withdrawn */ | ||
94 | # define YYSTYPE_IS_DECLARED 1 | ||
95 | # define YYSTYPE_IS_TRIVIAL 1 | ||
96 | #endif | ||
97 | |||
98 | extern YYSTYPE yylval; | ||
99 | |||
100 | #if ! defined YYLTYPE && ! defined YYLTYPE_IS_DECLARED | ||
101 | typedef struct YYLTYPE | ||
102 | { | ||
103 | int first_line; | ||
104 | int first_column; | ||
105 | int last_line; | ||
106 | int last_column; | ||
107 | } YYLTYPE; | ||
108 | # define yyltype YYLTYPE /* obsolescent; will be withdrawn */ | ||
109 | # define YYLTYPE_IS_DECLARED 1 | ||
110 | # define YYLTYPE_IS_TRIVIAL 1 | ||
111 | #endif | ||
112 | |||
113 | extern YYLTYPE yylloc; | ||
diff --git a/arch/powerpc/boot/dtc-src/dtc-parser.y b/arch/powerpc/boot/dtc-src/dtc-parser.y deleted file mode 100644 index b2ab562420ea..000000000000 --- a/arch/powerpc/boot/dtc-src/dtc-parser.y +++ /dev/null | |||
@@ -1,379 +0,0 @@ | |||
1 | /* | ||
2 | * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation. 2005. | ||
3 | * | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or | ||
6 | * modify it under the terms of the GNU General Public License as | ||
7 | * published by the Free Software Foundation; either version 2 of the | ||
8 | * License, or (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
13 | * General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 | ||
18 | * USA | ||
19 | */ | ||
20 | |||
21 | %locations | ||
22 | |||
23 | %{ | ||
24 | #include <stdio.h> | ||
25 | |||
26 | #include "dtc.h" | ||
27 | #include "srcpos.h" | ||
28 | |||
29 | extern int yylex(void); | ||
30 | |||
31 | extern struct boot_info *the_boot_info; | ||
32 | extern int treesource_error; | ||
33 | |||
34 | static unsigned long long eval_literal(const char *s, int base, int bits); | ||
35 | %} | ||
36 | |||
37 | %union { | ||
38 | char *propnodename; | ||
39 | char *literal; | ||
40 | char *labelref; | ||
41 | unsigned int cbase; | ||
42 | uint8_t byte; | ||
43 | struct data data; | ||
44 | |||
45 | uint64_t addr; | ||
46 | cell_t cell; | ||
47 | struct property *prop; | ||
48 | struct property *proplist; | ||
49 | struct node *node; | ||
50 | struct node *nodelist; | ||
51 | struct reserve_info *re; | ||
52 | } | ||
53 | |||
54 | %token DT_V1 | ||
55 | %token DT_MEMRESERVE | ||
56 | %token <propnodename> DT_PROPNODENAME | ||
57 | %token <literal> DT_LITERAL | ||
58 | %token <literal> DT_LEGACYLITERAL | ||
59 | %token <cbase> DT_BASE | ||
60 | %token <byte> DT_BYTE | ||
61 | %token <data> DT_STRING | ||
62 | %token <labelref> DT_LABEL | ||
63 | %token <labelref> DT_REF | ||
64 | %token DT_INCBIN | ||
65 | |||
66 | %type <data> propdata | ||
67 | %type <data> propdataprefix | ||
68 | %type <re> memreserve | ||
69 | %type <re> memreserves | ||
70 | %type <re> v0_memreserve | ||
71 | %type <re> v0_memreserves | ||
72 | %type <addr> addr | ||
73 | %type <data> celllist | ||
74 | %type <cbase> cellbase | ||
75 | %type <cell> cellval | ||
76 | %type <data> bytestring | ||
77 | %type <prop> propdef | ||
78 | %type <proplist> proplist | ||
79 | |||
80 | %type <node> devicetree | ||
81 | %type <node> nodedef | ||
82 | %type <node> subnode | ||
83 | %type <nodelist> subnodes | ||
84 | %type <labelref> label | ||
85 | |||
86 | %% | ||
87 | |||
88 | sourcefile: | ||
89 | DT_V1 ';' memreserves devicetree | ||
90 | { | ||
91 | the_boot_info = build_boot_info($3, $4, 0); | ||
92 | } | ||
93 | | v0_memreserves devicetree | ||
94 | { | ||
95 | the_boot_info = build_boot_info($1, $2, 0); | ||
96 | } | ||
97 | ; | ||
98 | |||
99 | memreserves: | ||
100 | /* empty */ | ||
101 | { | ||
102 | $$ = NULL; | ||
103 | } | ||
104 | | memreserve memreserves | ||
105 | { | ||
106 | $$ = chain_reserve_entry($1, $2); | ||
107 | } | ||
108 | ; | ||
109 | |||
110 | memreserve: | ||
111 | label DT_MEMRESERVE addr addr ';' | ||
112 | { | ||
113 | $$ = build_reserve_entry($3, $4, $1); | ||
114 | } | ||
115 | ; | ||
116 | |||
117 | v0_memreserves: | ||
118 | /* empty */ | ||
119 | { | ||
120 | $$ = NULL; | ||
121 | } | ||
122 | | v0_memreserve v0_memreserves | ||
123 | { | ||
124 | $$ = chain_reserve_entry($1, $2); | ||
125 | }; | ||
126 | ; | ||
127 | |||
128 | v0_memreserve: | ||
129 | memreserve | ||
130 | { | ||
131 | $$ = $1; | ||
132 | } | ||
133 | | label DT_MEMRESERVE addr '-' addr ';' | ||
134 | { | ||
135 | $$ = build_reserve_entry($3, $5 - $3 + 1, $1); | ||
136 | } | ||
137 | ; | ||
138 | |||
139 | addr: | ||
140 | DT_LITERAL | ||
141 | { | ||
142 | $$ = eval_literal($1, 0, 64); | ||
143 | } | ||
144 | | DT_LEGACYLITERAL | ||
145 | { | ||
146 | $$ = eval_literal($1, 16, 64); | ||
147 | } | ||
148 | ; | ||
149 | |||
150 | devicetree: | ||
151 | '/' nodedef | ||
152 | { | ||
153 | $$ = name_node($2, "", NULL); | ||
154 | } | ||
155 | ; | ||
156 | |||
157 | nodedef: | ||
158 | '{' proplist subnodes '}' ';' | ||
159 | { | ||
160 | $$ = build_node($2, $3); | ||
161 | } | ||
162 | ; | ||
163 | |||
164 | proplist: | ||
165 | /* empty */ | ||
166 | { | ||
167 | $$ = NULL; | ||
168 | } | ||
169 | | proplist propdef | ||
170 | { | ||
171 | $$ = chain_property($2, $1); | ||
172 | } | ||
173 | ; | ||
174 | |||
175 | propdef: | ||
176 | label DT_PROPNODENAME '=' propdata ';' | ||
177 | { | ||
178 | $$ = build_property($2, $4, $1); | ||
179 | } | ||
180 | | label DT_PROPNODENAME ';' | ||
181 | { | ||
182 | $$ = build_property($2, empty_data, $1); | ||
183 | } | ||
184 | ; | ||
185 | |||
186 | propdata: | ||
187 | propdataprefix DT_STRING | ||
188 | { | ||
189 | $$ = data_merge($1, $2); | ||
190 | } | ||
191 | | propdataprefix '<' celllist '>' | ||
192 | { | ||
193 | $$ = data_merge($1, $3); | ||
194 | } | ||
195 | | propdataprefix '[' bytestring ']' | ||
196 | { | ||
197 | $$ = data_merge($1, $3); | ||
198 | } | ||
199 | | propdataprefix DT_REF | ||
200 | { | ||
201 | $$ = data_add_marker($1, REF_PATH, $2); | ||
202 | } | ||
203 | | propdataprefix DT_INCBIN '(' DT_STRING ',' addr ',' addr ')' | ||
204 | { | ||
205 | struct search_path path = { srcpos_file->dir, NULL, NULL }; | ||
206 | struct dtc_file *file = dtc_open_file($4.val, &path); | ||
207 | struct data d = empty_data; | ||
208 | |||
209 | if ($6 != 0) | ||
210 | if (fseek(file->file, $6, SEEK_SET) != 0) | ||
211 | yyerrorf("Couldn't seek to offset %llu in \"%s\": %s", | ||
212 | (unsigned long long)$6, | ||
213 | $4.val, strerror(errno)); | ||
214 | |||
215 | d = data_copy_file(file->file, $8); | ||
216 | |||
217 | $$ = data_merge($1, d); | ||
218 | dtc_close_file(file); | ||
219 | } | ||
220 | | propdataprefix DT_INCBIN '(' DT_STRING ')' | ||
221 | { | ||
222 | struct search_path path = { srcpos_file->dir, NULL, NULL }; | ||
223 | struct dtc_file *file = dtc_open_file($4.val, &path); | ||
224 | struct data d = empty_data; | ||
225 | |||
226 | d = data_copy_file(file->file, -1); | ||
227 | |||
228 | $$ = data_merge($1, d); | ||
229 | dtc_close_file(file); | ||
230 | } | ||
231 | | propdata DT_LABEL | ||
232 | { | ||
233 | $$ = data_add_marker($1, LABEL, $2); | ||
234 | } | ||
235 | ; | ||
236 | |||
237 | propdataprefix: | ||
238 | /* empty */ | ||
239 | { | ||
240 | $$ = empty_data; | ||
241 | } | ||
242 | | propdata ',' | ||
243 | { | ||
244 | $$ = $1; | ||
245 | } | ||
246 | | propdataprefix DT_LABEL | ||
247 | { | ||
248 | $$ = data_add_marker($1, LABEL, $2); | ||
249 | } | ||
250 | ; | ||
251 | |||
252 | celllist: | ||
253 | /* empty */ | ||
254 | { | ||
255 | $$ = empty_data; | ||
256 | } | ||
257 | | celllist cellval | ||
258 | { | ||
259 | $$ = data_append_cell($1, $2); | ||
260 | } | ||
261 | | celllist DT_REF | ||
262 | { | ||
263 | $$ = data_append_cell(data_add_marker($1, REF_PHANDLE, | ||
264 | $2), -1); | ||
265 | } | ||
266 | | celllist DT_LABEL | ||
267 | { | ||
268 | $$ = data_add_marker($1, LABEL, $2); | ||
269 | } | ||
270 | ; | ||
271 | |||
272 | cellbase: | ||
273 | /* empty */ | ||
274 | { | ||
275 | $$ = 16; | ||
276 | } | ||
277 | | DT_BASE | ||
278 | ; | ||
279 | |||
280 | cellval: | ||
281 | DT_LITERAL | ||
282 | { | ||
283 | $$ = eval_literal($1, 0, 32); | ||
284 | } | ||
285 | | cellbase DT_LEGACYLITERAL | ||
286 | { | ||
287 | $$ = eval_literal($2, $1, 32); | ||
288 | } | ||
289 | ; | ||
290 | |||
291 | bytestring: | ||
292 | /* empty */ | ||
293 | { | ||
294 | $$ = empty_data; | ||
295 | } | ||
296 | | bytestring DT_BYTE | ||
297 | { | ||
298 | $$ = data_append_byte($1, $2); | ||
299 | } | ||
300 | | bytestring DT_LABEL | ||
301 | { | ||
302 | $$ = data_add_marker($1, LABEL, $2); | ||
303 | } | ||
304 | ; | ||
305 | |||
306 | subnodes: | ||
307 | /* empty */ | ||
308 | { | ||
309 | $$ = NULL; | ||
310 | } | ||
311 | | subnode subnodes | ||
312 | { | ||
313 | $$ = chain_node($1, $2); | ||
314 | } | ||
315 | | subnode propdef | ||
316 | { | ||
317 | yyerror("syntax error: properties must precede subnodes"); | ||
318 | YYERROR; | ||
319 | } | ||
320 | ; | ||
321 | |||
322 | subnode: | ||
323 | label DT_PROPNODENAME nodedef | ||
324 | { | ||
325 | $$ = name_node($3, $2, $1); | ||
326 | } | ||
327 | ; | ||
328 | |||
329 | label: | ||
330 | /* empty */ | ||
331 | { | ||
332 | $$ = NULL; | ||
333 | } | ||
334 | | DT_LABEL | ||
335 | { | ||
336 | $$ = $1; | ||
337 | } | ||
338 | ; | ||
339 | |||
340 | %% | ||
341 | |||
342 | void yyerrorf(char const *s, ...) | ||
343 | { | ||
344 | const char *fname = srcpos_file ? srcpos_file->name : "<no-file>"; | ||
345 | va_list va; | ||
346 | va_start(va, s); | ||
347 | |||
348 | if (strcmp(fname, "-") == 0) | ||
349 | fname = "stdin"; | ||
350 | |||
351 | fprintf(stderr, "%s:%d ", fname, yylloc.first_line); | ||
352 | vfprintf(stderr, s, va); | ||
353 | fprintf(stderr, "\n"); | ||
354 | |||
355 | treesource_error = 1; | ||
356 | va_end(va); | ||
357 | } | ||
358 | |||
359 | void yyerror (char const *s) | ||
360 | { | ||
361 | yyerrorf("%s", s); | ||
362 | } | ||
363 | |||
364 | static unsigned long long eval_literal(const char *s, int base, int bits) | ||
365 | { | ||
366 | unsigned long long val; | ||
367 | char *e; | ||
368 | |||
369 | errno = 0; | ||
370 | val = strtoull(s, &e, base); | ||
371 | if (*e) | ||
372 | yyerror("bad characters in literal"); | ||
373 | else if ((errno == ERANGE) | ||
374 | || ((bits < 64) && (val >= (1ULL << bits)))) | ||
375 | yyerror("literal out of range"); | ||
376 | else if (errno != 0) | ||
377 | yyerror("bad literal"); | ||
378 | return val; | ||
379 | } | ||
diff --git a/arch/powerpc/boot/dtc-src/dtc.c b/arch/powerpc/boot/dtc-src/dtc.c deleted file mode 100644 index d8fd43b4ac1a..000000000000 --- a/arch/powerpc/boot/dtc-src/dtc.c +++ /dev/null | |||
@@ -1,226 +0,0 @@ | |||
1 | /* | ||
2 | * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation. 2005. | ||
3 | * | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or | ||
6 | * modify it under the terms of the GNU General Public License as | ||
7 | * published by the Free Software Foundation; either version 2 of the | ||
8 | * License, or (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
13 | * General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 | ||
18 | * USA | ||
19 | */ | ||
20 | |||
21 | #include "dtc.h" | ||
22 | #include "srcpos.h" | ||
23 | |||
24 | #include "version_gen.h" | ||
25 | |||
26 | /* | ||
27 | * Command line options | ||
28 | */ | ||
29 | int quiet; /* Level of quietness */ | ||
30 | int reservenum; /* Number of memory reservation slots */ | ||
31 | int minsize; /* Minimum blob size */ | ||
32 | int padsize; /* Additional padding to blob */ | ||
33 | |||
34 | char *join_path(const char *path, const char *name) | ||
35 | { | ||
36 | int lenp = strlen(path); | ||
37 | int lenn = strlen(name); | ||
38 | int len; | ||
39 | int needslash = 1; | ||
40 | char *str; | ||
41 | |||
42 | len = lenp + lenn + 2; | ||
43 | if ((lenp > 0) && (path[lenp-1] == '/')) { | ||
44 | needslash = 0; | ||
45 | len--; | ||
46 | } | ||
47 | |||
48 | str = xmalloc(len); | ||
49 | memcpy(str, path, lenp); | ||
50 | if (needslash) { | ||
51 | str[lenp] = '/'; | ||
52 | lenp++; | ||
53 | } | ||
54 | memcpy(str+lenp, name, lenn+1); | ||
55 | return str; | ||
56 | } | ||
57 | |||
58 | static void fill_fullpaths(struct node *tree, const char *prefix) | ||
59 | { | ||
60 | struct node *child; | ||
61 | const char *unit; | ||
62 | |||
63 | tree->fullpath = join_path(prefix, tree->name); | ||
64 | |||
65 | unit = strchr(tree->name, '@'); | ||
66 | if (unit) | ||
67 | tree->basenamelen = unit - tree->name; | ||
68 | else | ||
69 | tree->basenamelen = strlen(tree->name); | ||
70 | |||
71 | for_each_child(tree, child) | ||
72 | fill_fullpaths(child, tree->fullpath); | ||
73 | } | ||
74 | |||
75 | static void __attribute__ ((noreturn)) usage(void) | ||
76 | { | ||
77 | fprintf(stderr, "Usage:\n"); | ||
78 | fprintf(stderr, "\tdtc [options] <input file>\n"); | ||
79 | fprintf(stderr, "\nOptions:\n"); | ||
80 | fprintf(stderr, "\t-h\n"); | ||
81 | fprintf(stderr, "\t\tThis help text\n"); | ||
82 | fprintf(stderr, "\t-q\n"); | ||
83 | fprintf(stderr, "\t\tQuiet: -q suppress warnings, -qq errors, -qqq all\n"); | ||
84 | fprintf(stderr, "\t-I <input format>\n"); | ||
85 | fprintf(stderr, "\t\tInput formats are:\n"); | ||
86 | fprintf(stderr, "\t\t\tdts - device tree source text\n"); | ||
87 | fprintf(stderr, "\t\t\tdtb - device tree blob\n"); | ||
88 | fprintf(stderr, "\t\t\tfs - /proc/device-tree style directory\n"); | ||
89 | fprintf(stderr, "\t-o <output file>\n"); | ||
90 | fprintf(stderr, "\t-O <output format>\n"); | ||
91 | fprintf(stderr, "\t\tOutput formats are:\n"); | ||
92 | fprintf(stderr, "\t\t\tdts - device tree source text\n"); | ||
93 | fprintf(stderr, "\t\t\tdtb - device tree blob\n"); | ||
94 | fprintf(stderr, "\t\t\tasm - assembler source\n"); | ||
95 | fprintf(stderr, "\t-V <output version>\n"); | ||
96 | fprintf(stderr, "\t\tBlob version to produce, defaults to %d (relevant for dtb\n\t\tand asm output only)\n", DEFAULT_FDT_VERSION); | ||
97 | fprintf(stderr, "\t-R <number>\n"); | ||
98 | fprintf(stderr, "\t\tMake space for <number> reserve map entries (relevant for \n\t\tdtb and asm output only)\n"); | ||
99 | fprintf(stderr, "\t-S <bytes>\n"); | ||
100 | fprintf(stderr, "\t\tMake the blob at least <bytes> long (extra space)\n"); | ||
101 | fprintf(stderr, "\t-p <bytes>\n"); | ||
102 | fprintf(stderr, "\t\tAdd padding to the blob of <bytes> long (extra space)\n"); | ||
103 | fprintf(stderr, "\t-b <number>\n"); | ||
104 | fprintf(stderr, "\t\tSet the physical boot cpu\n"); | ||
105 | fprintf(stderr, "\t-f\n"); | ||
106 | fprintf(stderr, "\t\tForce - try to produce output even if the input tree has errors\n"); | ||
107 | fprintf(stderr, "\t-v\n"); | ||
108 | fprintf(stderr, "\t\tPrint DTC version and exit\n"); | ||
109 | exit(3); | ||
110 | } | ||
111 | |||
112 | int main(int argc, char *argv[]) | ||
113 | { | ||
114 | struct boot_info *bi; | ||
115 | const char *inform = "dts"; | ||
116 | const char *outform = "dts"; | ||
117 | const char *outname = "-"; | ||
118 | int force = 0, check = 0; | ||
119 | const char *arg; | ||
120 | int opt; | ||
121 | FILE *outf = NULL; | ||
122 | int outversion = DEFAULT_FDT_VERSION; | ||
123 | long long cmdline_boot_cpuid = -1; | ||
124 | |||
125 | quiet = 0; | ||
126 | reservenum = 0; | ||
127 | minsize = 0; | ||
128 | padsize = 0; | ||
129 | |||
130 | while ((opt = getopt(argc, argv, "hI:O:o:V:R:S:p:fcqb:v")) != EOF) { | ||
131 | switch (opt) { | ||
132 | case 'I': | ||
133 | inform = optarg; | ||
134 | break; | ||
135 | case 'O': | ||
136 | outform = optarg; | ||
137 | break; | ||
138 | case 'o': | ||
139 | outname = optarg; | ||
140 | break; | ||
141 | case 'V': | ||
142 | outversion = strtol(optarg, NULL, 0); | ||
143 | break; | ||
144 | case 'R': | ||
145 | reservenum = strtol(optarg, NULL, 0); | ||
146 | break; | ||
147 | case 'S': | ||
148 | minsize = strtol(optarg, NULL, 0); | ||
149 | break; | ||
150 | case 'p': | ||
151 | padsize = strtol(optarg, NULL, 0); | ||
152 | break; | ||
153 | case 'f': | ||
154 | force = 1; | ||
155 | break; | ||
156 | case 'c': | ||
157 | check = 1; | ||
158 | break; | ||
159 | case 'q': | ||
160 | quiet++; | ||
161 | break; | ||
162 | case 'b': | ||
163 | cmdline_boot_cpuid = strtoll(optarg, NULL, 0); | ||
164 | break; | ||
165 | case 'v': | ||
166 | printf("Version: %s\n", DTC_VERSION); | ||
167 | exit(0); | ||
168 | case 'h': | ||
169 | default: | ||
170 | usage(); | ||
171 | } | ||
172 | } | ||
173 | |||
174 | if (argc > (optind+1)) | ||
175 | usage(); | ||
176 | else if (argc < (optind+1)) | ||
177 | arg = "-"; | ||
178 | else | ||
179 | arg = argv[optind]; | ||
180 | |||
181 | /* minsize and padsize are mutually exclusive */ | ||
182 | if (minsize && padsize) | ||
183 | die("Can't set both -p and -S\n"); | ||
184 | |||
185 | fprintf(stderr, "DTC: %s->%s on file \"%s\"\n", | ||
186 | inform, outform, arg); | ||
187 | |||
188 | if (streq(inform, "dts")) | ||
189 | bi = dt_from_source(arg); | ||
190 | else if (streq(inform, "fs")) | ||
191 | bi = dt_from_fs(arg); | ||
192 | else if(streq(inform, "dtb")) | ||
193 | bi = dt_from_blob(arg); | ||
194 | else | ||
195 | die("Unknown input format \"%s\"\n", inform); | ||
196 | |||
197 | if (cmdline_boot_cpuid != -1) | ||
198 | bi->boot_cpuid_phys = cmdline_boot_cpuid; | ||
199 | |||
200 | fill_fullpaths(bi->dt, ""); | ||
201 | process_checks(force, bi); | ||
202 | |||
203 | |||
204 | if (streq(outname, "-")) { | ||
205 | outf = stdout; | ||
206 | } else { | ||
207 | outf = fopen(outname, "w"); | ||
208 | if (! outf) | ||
209 | die("Couldn't open output file %s: %s\n", | ||
210 | outname, strerror(errno)); | ||
211 | } | ||
212 | |||
213 | if (streq(outform, "dts")) { | ||
214 | dt_to_source(outf, bi); | ||
215 | } else if (streq(outform, "dtb")) { | ||
216 | dt_to_blob(outf, bi, outversion); | ||
217 | } else if (streq(outform, "asm")) { | ||
218 | dt_to_asm(outf, bi, outversion); | ||
219 | } else if (streq(outform, "null")) { | ||
220 | /* do nothing */ | ||
221 | } else { | ||
222 | die("Unknown output format \"%s\"\n", outform); | ||
223 | } | ||
224 | |||
225 | exit(0); | ||
226 | } | ||
diff --git a/arch/powerpc/boot/dtc-src/dtc.h b/arch/powerpc/boot/dtc-src/dtc.h deleted file mode 100644 index 08d54c870086..000000000000 --- a/arch/powerpc/boot/dtc-src/dtc.h +++ /dev/null | |||
@@ -1,246 +0,0 @@ | |||
1 | #ifndef _DTC_H | ||
2 | #define _DTC_H | ||
3 | |||
4 | /* | ||
5 | * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation. 2005. | ||
6 | * | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License as | ||
10 | * published by the Free Software Foundation; either version 2 of the | ||
11 | * License, or (at your option) any later version. | ||
12 | * | ||
13 | * This program is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
16 | * General Public License for more details. | ||
17 | * | ||
18 | * You should have received a copy of the GNU General Public License | ||
19 | * along with this program; if not, write to the Free Software | ||
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 | ||
21 | * USA | ||
22 | */ | ||
23 | |||
24 | #include <stdio.h> | ||
25 | #include <string.h> | ||
26 | #include <stdlib.h> | ||
27 | #include <stdint.h> | ||
28 | #include <stdarg.h> | ||
29 | #include <assert.h> | ||
30 | #include <ctype.h> | ||
31 | #include <errno.h> | ||
32 | #include <unistd.h> | ||
33 | |||
34 | #include <libfdt_env.h> | ||
35 | #include <fdt.h> | ||
36 | |||
37 | #define DEFAULT_FDT_VERSION 17 | ||
38 | /* | ||
39 | * Command line options | ||
40 | */ | ||
41 | extern int quiet; /* Level of quietness */ | ||
42 | extern int reservenum; /* Number of memory reservation slots */ | ||
43 | extern int minsize; /* Minimum blob size */ | ||
44 | extern int padsize; /* Additional padding to blob */ | ||
45 | |||
46 | static inline void __attribute__((noreturn)) die(char * str, ...) | ||
47 | { | ||
48 | va_list ap; | ||
49 | |||
50 | va_start(ap, str); | ||
51 | fprintf(stderr, "FATAL ERROR: "); | ||
52 | vfprintf(stderr, str, ap); | ||
53 | exit(1); | ||
54 | } | ||
55 | |||
56 | static inline void *xmalloc(size_t len) | ||
57 | { | ||
58 | void *new = malloc(len); | ||
59 | |||
60 | if (! new) | ||
61 | die("malloc() failed\n"); | ||
62 | |||
63 | return new; | ||
64 | } | ||
65 | |||
66 | static inline void *xrealloc(void *p, size_t len) | ||
67 | { | ||
68 | void *new = realloc(p, len); | ||
69 | |||
70 | if (! new) | ||
71 | die("realloc() failed (len=%d)\n", len); | ||
72 | |||
73 | return new; | ||
74 | } | ||
75 | |||
76 | typedef uint32_t cell_t; | ||
77 | |||
78 | |||
79 | #define streq(a, b) (strcmp((a), (b)) == 0) | ||
80 | #define strneq(a, b, n) (strncmp((a), (b), (n)) == 0) | ||
81 | |||
82 | #define ALIGN(x, a) (((x) + (a) - 1) & ~((a) - 1)) | ||
83 | #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) | ||
84 | |||
85 | /* Data blobs */ | ||
86 | enum markertype { | ||
87 | REF_PHANDLE, | ||
88 | REF_PATH, | ||
89 | LABEL, | ||
90 | }; | ||
91 | |||
92 | struct marker { | ||
93 | enum markertype type; | ||
94 | int offset; | ||
95 | char *ref; | ||
96 | struct marker *next; | ||
97 | }; | ||
98 | |||
99 | struct data { | ||
100 | int len; | ||
101 | char *val; | ||
102 | struct marker *markers; | ||
103 | }; | ||
104 | |||
105 | |||
106 | #define empty_data ((struct data){ /* all .members = 0 or NULL */ }) | ||
107 | |||
108 | #define for_each_marker(m) \ | ||
109 | for (; (m); (m) = (m)->next) | ||
110 | #define for_each_marker_of_type(m, t) \ | ||
111 | for_each_marker(m) \ | ||
112 | if ((m)->type == (t)) | ||
113 | |||
114 | void data_free(struct data d); | ||
115 | |||
116 | struct data data_grow_for(struct data d, int xlen); | ||
117 | |||
118 | struct data data_copy_mem(const char *mem, int len); | ||
119 | struct data data_copy_escape_string(const char *s, int len); | ||
120 | struct data data_copy_file(FILE *f, size_t len); | ||
121 | |||
122 | struct data data_append_data(struct data d, const void *p, int len); | ||
123 | struct data data_insert_at_marker(struct data d, struct marker *m, | ||
124 | const void *p, int len); | ||
125 | struct data data_merge(struct data d1, struct data d2); | ||
126 | struct data data_append_cell(struct data d, cell_t word); | ||
127 | struct data data_append_re(struct data d, const struct fdt_reserve_entry *re); | ||
128 | struct data data_append_addr(struct data d, uint64_t addr); | ||
129 | struct data data_append_byte(struct data d, uint8_t byte); | ||
130 | struct data data_append_zeroes(struct data d, int len); | ||
131 | struct data data_append_align(struct data d, int align); | ||
132 | |||
133 | struct data data_add_marker(struct data d, enum markertype type, char *ref); | ||
134 | |||
135 | int data_is_one_string(struct data d); | ||
136 | |||
137 | /* DT constraints */ | ||
138 | |||
139 | #define MAX_PROPNAME_LEN 31 | ||
140 | #define MAX_NODENAME_LEN 31 | ||
141 | |||
142 | /* Live trees */ | ||
143 | struct property { | ||
144 | char *name; | ||
145 | struct data val; | ||
146 | |||
147 | struct property *next; | ||
148 | |||
149 | char *label; | ||
150 | }; | ||
151 | |||
152 | struct node { | ||
153 | char *name; | ||
154 | struct property *proplist; | ||
155 | struct node *children; | ||
156 | |||
157 | struct node *parent; | ||
158 | struct node *next_sibling; | ||
159 | |||
160 | char *fullpath; | ||
161 | int basenamelen; | ||
162 | |||
163 | cell_t phandle; | ||
164 | int addr_cells, size_cells; | ||
165 | |||
166 | char *label; | ||
167 | }; | ||
168 | |||
169 | #define for_each_property(n, p) \ | ||
170 | for ((p) = (n)->proplist; (p); (p) = (p)->next) | ||
171 | |||
172 | #define for_each_child(n, c) \ | ||
173 | for ((c) = (n)->children; (c); (c) = (c)->next_sibling) | ||
174 | |||
175 | struct property *build_property(char *name, struct data val, char *label); | ||
176 | struct property *chain_property(struct property *first, struct property *list); | ||
177 | struct property *reverse_properties(struct property *first); | ||
178 | |||
179 | struct node *build_node(struct property *proplist, struct node *children); | ||
180 | struct node *name_node(struct node *node, char *name, char *label); | ||
181 | struct node *chain_node(struct node *first, struct node *list); | ||
182 | |||
183 | void add_property(struct node *node, struct property *prop); | ||
184 | void add_child(struct node *parent, struct node *child); | ||
185 | |||
186 | const char *get_unitname(struct node *node); | ||
187 | struct property *get_property(struct node *node, const char *propname); | ||
188 | cell_t propval_cell(struct property *prop); | ||
189 | struct node *get_subnode(struct node *node, const char *nodename); | ||
190 | struct node *get_node_by_path(struct node *tree, const char *path); | ||
191 | struct node *get_node_by_label(struct node *tree, const char *label); | ||
192 | struct node *get_node_by_phandle(struct node *tree, cell_t phandle); | ||
193 | struct node *get_node_by_ref(struct node *tree, const char *ref); | ||
194 | cell_t get_node_phandle(struct node *root, struct node *node); | ||
195 | |||
196 | /* Boot info (tree plus memreserve information */ | ||
197 | |||
198 | struct reserve_info { | ||
199 | struct fdt_reserve_entry re; | ||
200 | |||
201 | struct reserve_info *next; | ||
202 | |||
203 | char *label; | ||
204 | }; | ||
205 | |||
206 | struct reserve_info *build_reserve_entry(uint64_t start, uint64_t len, char *label); | ||
207 | struct reserve_info *chain_reserve_entry(struct reserve_info *first, | ||
208 | struct reserve_info *list); | ||
209 | struct reserve_info *add_reserve_entry(struct reserve_info *list, | ||
210 | struct reserve_info *new); | ||
211 | |||
212 | |||
213 | struct boot_info { | ||
214 | struct reserve_info *reservelist; | ||
215 | struct node *dt; /* the device tree */ | ||
216 | uint32_t boot_cpuid_phys; | ||
217 | }; | ||
218 | |||
219 | struct boot_info *build_boot_info(struct reserve_info *reservelist, | ||
220 | struct node *tree, uint32_t boot_cpuid_phys); | ||
221 | |||
222 | /* Checks */ | ||
223 | |||
224 | void process_checks(int force, struct boot_info *bi); | ||
225 | |||
226 | /* Flattened trees */ | ||
227 | |||
228 | void dt_to_blob(FILE *f, struct boot_info *bi, int version); | ||
229 | void dt_to_asm(FILE *f, struct boot_info *bi, int version); | ||
230 | |||
231 | struct boot_info *dt_from_blob(const char *fname); | ||
232 | |||
233 | /* Tree source */ | ||
234 | |||
235 | void dt_to_source(FILE *f, struct boot_info *bi); | ||
236 | struct boot_info *dt_from_source(const char *f); | ||
237 | |||
238 | /* FS trees */ | ||
239 | |||
240 | struct boot_info *dt_from_fs(const char *dirname); | ||
241 | |||
242 | /* misc */ | ||
243 | |||
244 | char *join_path(const char *path, const char *name); | ||
245 | |||
246 | #endif /* _DTC_H */ | ||
diff --git a/arch/powerpc/boot/dtc-src/flattree.c b/arch/powerpc/boot/dtc-src/flattree.c deleted file mode 100644 index 76acd28c068d..000000000000 --- a/arch/powerpc/boot/dtc-src/flattree.c +++ /dev/null | |||
@@ -1,906 +0,0 @@ | |||
1 | /* | ||
2 | * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation. 2005. | ||
3 | * | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or | ||
6 | * modify it under the terms of the GNU General Public License as | ||
7 | * published by the Free Software Foundation; either version 2 of the | ||
8 | * License, or (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
13 | * General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 | ||
18 | * USA | ||
19 | */ | ||
20 | |||
21 | #include "dtc.h" | ||
22 | #include "srcpos.h" | ||
23 | |||
24 | #define FTF_FULLPATH 0x1 | ||
25 | #define FTF_VARALIGN 0x2 | ||
26 | #define FTF_NAMEPROPS 0x4 | ||
27 | #define FTF_BOOTCPUID 0x8 | ||
28 | #define FTF_STRTABSIZE 0x10 | ||
29 | #define FTF_STRUCTSIZE 0x20 | ||
30 | #define FTF_NOPS 0x40 | ||
31 | |||
32 | static struct version_info { | ||
33 | int version; | ||
34 | int last_comp_version; | ||
35 | int hdr_size; | ||
36 | int flags; | ||
37 | } version_table[] = { | ||
38 | {1, 1, FDT_V1_SIZE, | ||
39 | FTF_FULLPATH|FTF_VARALIGN|FTF_NAMEPROPS}, | ||
40 | {2, 1, FDT_V2_SIZE, | ||
41 | FTF_FULLPATH|FTF_VARALIGN|FTF_NAMEPROPS|FTF_BOOTCPUID}, | ||
42 | {3, 1, FDT_V3_SIZE, | ||
43 | FTF_FULLPATH|FTF_VARALIGN|FTF_NAMEPROPS|FTF_BOOTCPUID|FTF_STRTABSIZE}, | ||
44 | {16, 16, FDT_V3_SIZE, | ||
45 | FTF_BOOTCPUID|FTF_STRTABSIZE|FTF_NOPS}, | ||
46 | {17, 16, FDT_V17_SIZE, | ||
47 | FTF_BOOTCPUID|FTF_STRTABSIZE|FTF_STRUCTSIZE|FTF_NOPS}, | ||
48 | }; | ||
49 | |||
50 | struct emitter { | ||
51 | void (*cell)(void *, cell_t); | ||
52 | void (*string)(void *, char *, int); | ||
53 | void (*align)(void *, int); | ||
54 | void (*data)(void *, struct data); | ||
55 | void (*beginnode)(void *, const char *); | ||
56 | void (*endnode)(void *, const char *); | ||
57 | void (*property)(void *, const char *); | ||
58 | }; | ||
59 | |||
60 | static void bin_emit_cell(void *e, cell_t val) | ||
61 | { | ||
62 | struct data *dtbuf = e; | ||
63 | |||
64 | *dtbuf = data_append_cell(*dtbuf, val); | ||
65 | } | ||
66 | |||
67 | static void bin_emit_string(void *e, char *str, int len) | ||
68 | { | ||
69 | struct data *dtbuf = e; | ||
70 | |||
71 | if (len == 0) | ||
72 | len = strlen(str); | ||
73 | |||
74 | *dtbuf = data_append_data(*dtbuf, str, len); | ||
75 | *dtbuf = data_append_byte(*dtbuf, '\0'); | ||
76 | } | ||
77 | |||
78 | static void bin_emit_align(void *e, int a) | ||
79 | { | ||
80 | struct data *dtbuf = e; | ||
81 | |||
82 | *dtbuf = data_append_align(*dtbuf, a); | ||
83 | } | ||
84 | |||
85 | static void bin_emit_data(void *e, struct data d) | ||
86 | { | ||
87 | struct data *dtbuf = e; | ||
88 | |||
89 | *dtbuf = data_append_data(*dtbuf, d.val, d.len); | ||
90 | } | ||
91 | |||
92 | static void bin_emit_beginnode(void *e, const char *label) | ||
93 | { | ||
94 | bin_emit_cell(e, FDT_BEGIN_NODE); | ||
95 | } | ||
96 | |||
97 | static void bin_emit_endnode(void *e, const char *label) | ||
98 | { | ||
99 | bin_emit_cell(e, FDT_END_NODE); | ||
100 | } | ||
101 | |||
102 | static void bin_emit_property(void *e, const char *label) | ||
103 | { | ||
104 | bin_emit_cell(e, FDT_PROP); | ||
105 | } | ||
106 | |||
107 | static struct emitter bin_emitter = { | ||
108 | .cell = bin_emit_cell, | ||
109 | .string = bin_emit_string, | ||
110 | .align = bin_emit_align, | ||
111 | .data = bin_emit_data, | ||
112 | .beginnode = bin_emit_beginnode, | ||
113 | .endnode = bin_emit_endnode, | ||
114 | .property = bin_emit_property, | ||
115 | }; | ||
116 | |||
117 | static void emit_label(FILE *f, const char *prefix, const char *label) | ||
118 | { | ||
119 | fprintf(f, "\t.globl\t%s_%s\n", prefix, label); | ||
120 | fprintf(f, "%s_%s:\n", prefix, label); | ||
121 | fprintf(f, "_%s_%s:\n", prefix, label); | ||
122 | } | ||
123 | |||
124 | static void emit_offset_label(FILE *f, const char *label, int offset) | ||
125 | { | ||
126 | fprintf(f, "\t.globl\t%s\n", label); | ||
127 | fprintf(f, "%s\t= . + %d\n", label, offset); | ||
128 | } | ||
129 | |||
130 | static void asm_emit_cell(void *e, cell_t val) | ||
131 | { | ||
132 | FILE *f = e; | ||
133 | |||
134 | fprintf(f, "\t.long\t0x%x\n", val); | ||
135 | } | ||
136 | |||
137 | static void asm_emit_string(void *e, char *str, int len) | ||
138 | { | ||
139 | FILE *f = e; | ||
140 | char c = 0; | ||
141 | |||
142 | if (len != 0) { | ||
143 | /* XXX: ewww */ | ||
144 | c = str[len]; | ||
145 | str[len] = '\0'; | ||
146 | } | ||
147 | |||
148 | fprintf(f, "\t.string\t\"%s\"\n", str); | ||
149 | |||
150 | if (len != 0) { | ||
151 | str[len] = c; | ||
152 | } | ||
153 | } | ||
154 | |||
155 | static void asm_emit_align(void *e, int a) | ||
156 | { | ||
157 | FILE *f = e; | ||
158 | |||
159 | fprintf(f, "\t.balign\t%d\n", a); | ||
160 | } | ||
161 | |||
162 | static void asm_emit_data(void *e, struct data d) | ||
163 | { | ||
164 | FILE *f = e; | ||
165 | int off = 0; | ||
166 | struct marker *m = d.markers; | ||
167 | |||
168 | for_each_marker_of_type(m, LABEL) | ||
169 | emit_offset_label(f, m->ref, m->offset); | ||
170 | |||
171 | while ((d.len - off) >= sizeof(uint32_t)) { | ||
172 | fprintf(f, "\t.long\t0x%x\n", | ||
173 | fdt32_to_cpu(*((uint32_t *)(d.val+off)))); | ||
174 | off += sizeof(uint32_t); | ||
175 | } | ||
176 | |||
177 | while ((d.len - off) >= 1) { | ||
178 | fprintf(f, "\t.byte\t0x%hhx\n", d.val[off]); | ||
179 | off += 1; | ||
180 | } | ||
181 | |||
182 | assert(off == d.len); | ||
183 | } | ||
184 | |||
185 | static void asm_emit_beginnode(void *e, const char *label) | ||
186 | { | ||
187 | FILE *f = e; | ||
188 | |||
189 | if (label) { | ||
190 | fprintf(f, "\t.globl\t%s\n", label); | ||
191 | fprintf(f, "%s:\n", label); | ||
192 | } | ||
193 | fprintf(f, "\t.long\tFDT_BEGIN_NODE\n"); | ||
194 | } | ||
195 | |||
196 | static void asm_emit_endnode(void *e, const char *label) | ||
197 | { | ||
198 | FILE *f = e; | ||
199 | |||
200 | fprintf(f, "\t.long\tFDT_END_NODE\n"); | ||
201 | if (label) { | ||
202 | fprintf(f, "\t.globl\t%s_end\n", label); | ||
203 | fprintf(f, "%s_end:\n", label); | ||
204 | } | ||
205 | } | ||
206 | |||
207 | static void asm_emit_property(void *e, const char *label) | ||
208 | { | ||
209 | FILE *f = e; | ||
210 | |||
211 | if (label) { | ||
212 | fprintf(f, "\t.globl\t%s\n", label); | ||
213 | fprintf(f, "%s:\n", label); | ||
214 | } | ||
215 | fprintf(f, "\t.long\tFDT_PROP\n"); | ||
216 | } | ||
217 | |||
218 | static struct emitter asm_emitter = { | ||
219 | .cell = asm_emit_cell, | ||
220 | .string = asm_emit_string, | ||
221 | .align = asm_emit_align, | ||
222 | .data = asm_emit_data, | ||
223 | .beginnode = asm_emit_beginnode, | ||
224 | .endnode = asm_emit_endnode, | ||
225 | .property = asm_emit_property, | ||
226 | }; | ||
227 | |||
228 | static int stringtable_insert(struct data *d, const char *str) | ||
229 | { | ||
230 | int i; | ||
231 | |||
232 | /* FIXME: do this more efficiently? */ | ||
233 | |||
234 | for (i = 0; i < d->len; i++) { | ||
235 | if (streq(str, d->val + i)) | ||
236 | return i; | ||
237 | } | ||
238 | |||
239 | *d = data_append_data(*d, str, strlen(str)+1); | ||
240 | return i; | ||
241 | } | ||
242 | |||
243 | static void flatten_tree(struct node *tree, struct emitter *emit, | ||
244 | void *etarget, struct data *strbuf, | ||
245 | struct version_info *vi) | ||
246 | { | ||
247 | struct property *prop; | ||
248 | struct node *child; | ||
249 | int seen_name_prop = 0; | ||
250 | |||
251 | emit->beginnode(etarget, tree->label); | ||
252 | |||
253 | if (vi->flags & FTF_FULLPATH) | ||
254 | emit->string(etarget, tree->fullpath, 0); | ||
255 | else | ||
256 | emit->string(etarget, tree->name, 0); | ||
257 | |||
258 | emit->align(etarget, sizeof(cell_t)); | ||
259 | |||
260 | for_each_property(tree, prop) { | ||
261 | int nameoff; | ||
262 | |||
263 | if (streq(prop->name, "name")) | ||
264 | seen_name_prop = 1; | ||
265 | |||
266 | nameoff = stringtable_insert(strbuf, prop->name); | ||
267 | |||
268 | emit->property(etarget, prop->label); | ||
269 | emit->cell(etarget, prop->val.len); | ||
270 | emit->cell(etarget, nameoff); | ||
271 | |||
272 | if ((vi->flags & FTF_VARALIGN) && (prop->val.len >= 8)) | ||
273 | emit->align(etarget, 8); | ||
274 | |||
275 | emit->data(etarget, prop->val); | ||
276 | emit->align(etarget, sizeof(cell_t)); | ||
277 | } | ||
278 | |||
279 | if ((vi->flags & FTF_NAMEPROPS) && !seen_name_prop) { | ||
280 | emit->property(etarget, NULL); | ||
281 | emit->cell(etarget, tree->basenamelen+1); | ||
282 | emit->cell(etarget, stringtable_insert(strbuf, "name")); | ||
283 | |||
284 | if ((vi->flags & FTF_VARALIGN) && ((tree->basenamelen+1) >= 8)) | ||
285 | emit->align(etarget, 8); | ||
286 | |||
287 | emit->string(etarget, tree->name, tree->basenamelen); | ||
288 | emit->align(etarget, sizeof(cell_t)); | ||
289 | } | ||
290 | |||
291 | for_each_child(tree, child) { | ||
292 | flatten_tree(child, emit, etarget, strbuf, vi); | ||
293 | } | ||
294 | |||
295 | emit->endnode(etarget, tree->label); | ||
296 | } | ||
297 | |||
298 | static struct data flatten_reserve_list(struct reserve_info *reservelist, | ||
299 | struct version_info *vi) | ||
300 | { | ||
301 | struct reserve_info *re; | ||
302 | struct data d = empty_data; | ||
303 | static struct fdt_reserve_entry null_re = {0,0}; | ||
304 | int j; | ||
305 | |||
306 | for (re = reservelist; re; re = re->next) { | ||
307 | d = data_append_re(d, &re->re); | ||
308 | } | ||
309 | /* | ||
310 | * Add additional reserved slots if the user asked for them. | ||
311 | */ | ||
312 | for (j = 0; j < reservenum; j++) { | ||
313 | d = data_append_re(d, &null_re); | ||
314 | } | ||
315 | |||
316 | return d; | ||
317 | } | ||
318 | |||
319 | static void make_fdt_header(struct fdt_header *fdt, | ||
320 | struct version_info *vi, | ||
321 | int reservesize, int dtsize, int strsize, | ||
322 | int boot_cpuid_phys) | ||
323 | { | ||
324 | int reserve_off; | ||
325 | |||
326 | reservesize += sizeof(struct fdt_reserve_entry); | ||
327 | |||
328 | memset(fdt, 0xff, sizeof(*fdt)); | ||
329 | |||
330 | fdt->magic = cpu_to_fdt32(FDT_MAGIC); | ||
331 | fdt->version = cpu_to_fdt32(vi->version); | ||
332 | fdt->last_comp_version = cpu_to_fdt32(vi->last_comp_version); | ||
333 | |||
334 | /* Reserve map should be doubleword aligned */ | ||
335 | reserve_off = ALIGN(vi->hdr_size, 8); | ||
336 | |||
337 | fdt->off_mem_rsvmap = cpu_to_fdt32(reserve_off); | ||
338 | fdt->off_dt_struct = cpu_to_fdt32(reserve_off + reservesize); | ||
339 | fdt->off_dt_strings = cpu_to_fdt32(reserve_off + reservesize | ||
340 | + dtsize); | ||
341 | fdt->totalsize = cpu_to_fdt32(reserve_off + reservesize + dtsize + strsize); | ||
342 | |||
343 | if (vi->flags & FTF_BOOTCPUID) | ||
344 | fdt->boot_cpuid_phys = cpu_to_fdt32(boot_cpuid_phys); | ||
345 | if (vi->flags & FTF_STRTABSIZE) | ||
346 | fdt->size_dt_strings = cpu_to_fdt32(strsize); | ||
347 | if (vi->flags & FTF_STRUCTSIZE) | ||
348 | fdt->size_dt_struct = cpu_to_fdt32(dtsize); | ||
349 | } | ||
350 | |||
351 | void dt_to_blob(FILE *f, struct boot_info *bi, int version) | ||
352 | { | ||
353 | struct version_info *vi = NULL; | ||
354 | int i; | ||
355 | struct data blob = empty_data; | ||
356 | struct data reservebuf = empty_data; | ||
357 | struct data dtbuf = empty_data; | ||
358 | struct data strbuf = empty_data; | ||
359 | struct fdt_header fdt; | ||
360 | int padlen = 0; | ||
361 | |||
362 | for (i = 0; i < ARRAY_SIZE(version_table); i++) { | ||
363 | if (version_table[i].version == version) | ||
364 | vi = &version_table[i]; | ||
365 | } | ||
366 | if (!vi) | ||
367 | die("Unknown device tree blob version %d\n", version); | ||
368 | |||
369 | flatten_tree(bi->dt, &bin_emitter, &dtbuf, &strbuf, vi); | ||
370 | bin_emit_cell(&dtbuf, FDT_END); | ||
371 | |||
372 | reservebuf = flatten_reserve_list(bi->reservelist, vi); | ||
373 | |||
374 | /* Make header */ | ||
375 | make_fdt_header(&fdt, vi, reservebuf.len, dtbuf.len, strbuf.len, | ||
376 | bi->boot_cpuid_phys); | ||
377 | |||
378 | /* | ||
379 | * If the user asked for more space than is used, adjust the totalsize. | ||
380 | */ | ||
381 | if (minsize > 0) { | ||
382 | padlen = minsize - fdt32_to_cpu(fdt.totalsize); | ||
383 | if ((padlen < 0) && (quiet < 1)) | ||
384 | fprintf(stderr, | ||
385 | "Warning: blob size %d >= minimum size %d\n", | ||
386 | fdt32_to_cpu(fdt.totalsize), minsize); | ||
387 | } | ||
388 | |||
389 | if (padsize > 0) | ||
390 | padlen = padsize; | ||
391 | |||
392 | if (padlen > 0) { | ||
393 | int tsize = fdt32_to_cpu(fdt.totalsize); | ||
394 | tsize += padlen; | ||
395 | fdt.totalsize = cpu_to_fdt32(tsize); | ||
396 | } | ||
397 | |||
398 | /* | ||
399 | * Assemble the blob: start with the header, add with alignment | ||
400 | * the reserve buffer, add the reserve map terminating zeroes, | ||
401 | * the device tree itself, and finally the strings. | ||
402 | */ | ||
403 | blob = data_append_data(blob, &fdt, vi->hdr_size); | ||
404 | blob = data_append_align(blob, 8); | ||
405 | blob = data_merge(blob, reservebuf); | ||
406 | blob = data_append_zeroes(blob, sizeof(struct fdt_reserve_entry)); | ||
407 | blob = data_merge(blob, dtbuf); | ||
408 | blob = data_merge(blob, strbuf); | ||
409 | |||
410 | /* | ||
411 | * If the user asked for more space than is used, pad out the blob. | ||
412 | */ | ||
413 | if (padlen > 0) | ||
414 | blob = data_append_zeroes(blob, padlen); | ||
415 | |||
416 | fwrite(blob.val, blob.len, 1, f); | ||
417 | |||
418 | if (ferror(f)) | ||
419 | die("Error writing device tree blob: %s\n", strerror(errno)); | ||
420 | |||
421 | /* | ||
422 | * data_merge() frees the right-hand element so only the blob | ||
423 | * remains to be freed. | ||
424 | */ | ||
425 | data_free(blob); | ||
426 | } | ||
427 | |||
428 | static void dump_stringtable_asm(FILE *f, struct data strbuf) | ||
429 | { | ||
430 | const char *p; | ||
431 | int len; | ||
432 | |||
433 | p = strbuf.val; | ||
434 | |||
435 | while (p < (strbuf.val + strbuf.len)) { | ||
436 | len = strlen(p); | ||
437 | fprintf(f, "\t.string \"%s\"\n", p); | ||
438 | p += len+1; | ||
439 | } | ||
440 | } | ||
441 | |||
442 | void dt_to_asm(FILE *f, struct boot_info *bi, int version) | ||
443 | { | ||
444 | struct version_info *vi = NULL; | ||
445 | int i; | ||
446 | struct data strbuf = empty_data; | ||
447 | struct reserve_info *re; | ||
448 | const char *symprefix = "dt"; | ||
449 | |||
450 | for (i = 0; i < ARRAY_SIZE(version_table); i++) { | ||
451 | if (version_table[i].version == version) | ||
452 | vi = &version_table[i]; | ||
453 | } | ||
454 | if (!vi) | ||
455 | die("Unknown device tree blob version %d\n", version); | ||
456 | |||
457 | fprintf(f, "/* autogenerated by dtc, do not edit */\n\n"); | ||
458 | fprintf(f, "#define FDT_MAGIC 0x%x\n", FDT_MAGIC); | ||
459 | fprintf(f, "#define FDT_BEGIN_NODE 0x%x\n", FDT_BEGIN_NODE); | ||
460 | fprintf(f, "#define FDT_END_NODE 0x%x\n", FDT_END_NODE); | ||
461 | fprintf(f, "#define FDT_PROP 0x%x\n", FDT_PROP); | ||
462 | fprintf(f, "#define FDT_END 0x%x\n", FDT_END); | ||
463 | fprintf(f, "\n"); | ||
464 | |||
465 | emit_label(f, symprefix, "blob_start"); | ||
466 | emit_label(f, symprefix, "header"); | ||
467 | fprintf(f, "\t.long\tFDT_MAGIC\t\t\t\t/* magic */\n"); | ||
468 | fprintf(f, "\t.long\t_%s_blob_abs_end - _%s_blob_start\t/* totalsize */\n", | ||
469 | symprefix, symprefix); | ||
470 | fprintf(f, "\t.long\t_%s_struct_start - _%s_blob_start\t/* off_dt_struct */\n", | ||
471 | symprefix, symprefix); | ||
472 | fprintf(f, "\t.long\t_%s_strings_start - _%s_blob_start\t/* off_dt_strings */\n", | ||
473 | symprefix, symprefix); | ||
474 | fprintf(f, "\t.long\t_%s_reserve_map - _%s_blob_start\t/* off_dt_strings */\n", | ||
475 | symprefix, symprefix); | ||
476 | fprintf(f, "\t.long\t%d\t\t\t\t\t/* version */\n", vi->version); | ||
477 | fprintf(f, "\t.long\t%d\t\t\t\t\t/* last_comp_version */\n", | ||
478 | vi->last_comp_version); | ||
479 | |||
480 | if (vi->flags & FTF_BOOTCPUID) | ||
481 | fprintf(f, "\t.long\t%i\t\t\t\t\t/* boot_cpuid_phys */\n", | ||
482 | bi->boot_cpuid_phys); | ||
483 | |||
484 | if (vi->flags & FTF_STRTABSIZE) | ||
485 | fprintf(f, "\t.long\t_%s_strings_end - _%s_strings_start\t/* size_dt_strings */\n", | ||
486 | symprefix, symprefix); | ||
487 | |||
488 | if (vi->flags & FTF_STRUCTSIZE) | ||
489 | fprintf(f, "\t.long\t_%s_struct_end - _%s_struct_start\t/* size_dt_struct */\n", | ||
490 | symprefix, symprefix); | ||
491 | |||
492 | /* | ||
493 | * Reserve map entries. | ||
494 | * Align the reserve map to a doubleword boundary. | ||
495 | * Each entry is an (address, size) pair of u64 values. | ||
496 | * Always supply a zero-sized temination entry. | ||
497 | */ | ||
498 | asm_emit_align(f, 8); | ||
499 | emit_label(f, symprefix, "reserve_map"); | ||
500 | |||
501 | fprintf(f, "/* Memory reserve map from source file */\n"); | ||
502 | |||
503 | /* | ||
504 | * Use .long on high and low halfs of u64s to avoid .quad | ||
505 | * as it appears .quad isn't available in some assemblers. | ||
506 | */ | ||
507 | for (re = bi->reservelist; re; re = re->next) { | ||
508 | if (re->label) { | ||
509 | fprintf(f, "\t.globl\t%s\n", re->label); | ||
510 | fprintf(f, "%s:\n", re->label); | ||
511 | } | ||
512 | fprintf(f, "\t.long\t0x%08x, 0x%08x\n", | ||
513 | (unsigned int)(re->re.address >> 32), | ||
514 | (unsigned int)(re->re.address & 0xffffffff)); | ||
515 | fprintf(f, "\t.long\t0x%08x, 0x%08x\n", | ||
516 | (unsigned int)(re->re.size >> 32), | ||
517 | (unsigned int)(re->re.size & 0xffffffff)); | ||
518 | } | ||
519 | for (i = 0; i < reservenum; i++) { | ||
520 | fprintf(f, "\t.long\t0, 0\n\t.long\t0, 0\n"); | ||
521 | } | ||
522 | |||
523 | fprintf(f, "\t.long\t0, 0\n\t.long\t0, 0\n"); | ||
524 | |||
525 | emit_label(f, symprefix, "struct_start"); | ||
526 | flatten_tree(bi->dt, &asm_emitter, f, &strbuf, vi); | ||
527 | fprintf(f, "\t.long\tFDT_END\n"); | ||
528 | emit_label(f, symprefix, "struct_end"); | ||
529 | |||
530 | emit_label(f, symprefix, "strings_start"); | ||
531 | dump_stringtable_asm(f, strbuf); | ||
532 | emit_label(f, symprefix, "strings_end"); | ||
533 | |||
534 | emit_label(f, symprefix, "blob_end"); | ||
535 | |||
536 | /* | ||
537 | * If the user asked for more space than is used, pad it out. | ||
538 | */ | ||
539 | if (minsize > 0) { | ||
540 | fprintf(f, "\t.space\t%d - (_%s_blob_end - _%s_blob_start), 0\n", | ||
541 | minsize, symprefix, symprefix); | ||
542 | } | ||
543 | if (padsize > 0) { | ||
544 | fprintf(f, "\t.space\t%d, 0\n", padsize); | ||
545 | } | ||
546 | emit_label(f, symprefix, "blob_abs_end"); | ||
547 | |||
548 | data_free(strbuf); | ||
549 | } | ||
550 | |||
551 | struct inbuf { | ||
552 | char *base, *limit, *ptr; | ||
553 | }; | ||
554 | |||
555 | static void inbuf_init(struct inbuf *inb, void *base, void *limit) | ||
556 | { | ||
557 | inb->base = base; | ||
558 | inb->limit = limit; | ||
559 | inb->ptr = inb->base; | ||
560 | } | ||
561 | |||
562 | static void flat_read_chunk(struct inbuf *inb, void *p, int len) | ||
563 | { | ||
564 | if ((inb->ptr + len) > inb->limit) | ||
565 | die("Premature end of data parsing flat device tree\n"); | ||
566 | |||
567 | memcpy(p, inb->ptr, len); | ||
568 | |||
569 | inb->ptr += len; | ||
570 | } | ||
571 | |||
572 | static uint32_t flat_read_word(struct inbuf *inb) | ||
573 | { | ||
574 | uint32_t val; | ||
575 | |||
576 | assert(((inb->ptr - inb->base) % sizeof(val)) == 0); | ||
577 | |||
578 | flat_read_chunk(inb, &val, sizeof(val)); | ||
579 | |||
580 | return fdt32_to_cpu(val); | ||
581 | } | ||
582 | |||
583 | static void flat_realign(struct inbuf *inb, int align) | ||
584 | { | ||
585 | int off = inb->ptr - inb->base; | ||
586 | |||
587 | inb->ptr = inb->base + ALIGN(off, align); | ||
588 | if (inb->ptr > inb->limit) | ||
589 | die("Premature end of data parsing flat device tree\n"); | ||
590 | } | ||
591 | |||
592 | static char *flat_read_string(struct inbuf *inb) | ||
593 | { | ||
594 | int len = 0; | ||
595 | const char *p = inb->ptr; | ||
596 | char *str; | ||
597 | |||
598 | do { | ||
599 | if (p >= inb->limit) | ||
600 | die("Premature end of data parsing flat device tree\n"); | ||
601 | len++; | ||
602 | } while ((*p++) != '\0'); | ||
603 | |||
604 | str = strdup(inb->ptr); | ||
605 | |||
606 | inb->ptr += len; | ||
607 | |||
608 | flat_realign(inb, sizeof(uint32_t)); | ||
609 | |||
610 | return str; | ||
611 | } | ||
612 | |||
613 | static struct data flat_read_data(struct inbuf *inb, int len) | ||
614 | { | ||
615 | struct data d = empty_data; | ||
616 | |||
617 | if (len == 0) | ||
618 | return empty_data; | ||
619 | |||
620 | d = data_grow_for(d, len); | ||
621 | d.len = len; | ||
622 | |||
623 | flat_read_chunk(inb, d.val, len); | ||
624 | |||
625 | flat_realign(inb, sizeof(uint32_t)); | ||
626 | |||
627 | return d; | ||
628 | } | ||
629 | |||
630 | static char *flat_read_stringtable(struct inbuf *inb, int offset) | ||
631 | { | ||
632 | const char *p; | ||
633 | |||
634 | p = inb->base + offset; | ||
635 | while (1) { | ||
636 | if (p >= inb->limit || p < inb->base) | ||
637 | die("String offset %d overruns string table\n", | ||
638 | offset); | ||
639 | |||
640 | if (*p == '\0') | ||
641 | break; | ||
642 | |||
643 | p++; | ||
644 | } | ||
645 | |||
646 | return strdup(inb->base + offset); | ||
647 | } | ||
648 | |||
649 | static struct property *flat_read_property(struct inbuf *dtbuf, | ||
650 | struct inbuf *strbuf, int flags) | ||
651 | { | ||
652 | uint32_t proplen, stroff; | ||
653 | char *name; | ||
654 | struct data val; | ||
655 | |||
656 | proplen = flat_read_word(dtbuf); | ||
657 | stroff = flat_read_word(dtbuf); | ||
658 | |||
659 | name = flat_read_stringtable(strbuf, stroff); | ||
660 | |||
661 | if ((flags & FTF_VARALIGN) && (proplen >= 8)) | ||
662 | flat_realign(dtbuf, 8); | ||
663 | |||
664 | val = flat_read_data(dtbuf, proplen); | ||
665 | |||
666 | return build_property(name, val, NULL); | ||
667 | } | ||
668 | |||
669 | |||
670 | static struct reserve_info *flat_read_mem_reserve(struct inbuf *inb) | ||
671 | { | ||
672 | struct reserve_info *reservelist = NULL; | ||
673 | struct reserve_info *new; | ||
674 | const char *p; | ||
675 | struct fdt_reserve_entry re; | ||
676 | |||
677 | /* | ||
678 | * Each entry is a pair of u64 (addr, size) values for 4 cell_t's. | ||
679 | * List terminates at an entry with size equal to zero. | ||
680 | * | ||
681 | * First pass, count entries. | ||
682 | */ | ||
683 | p = inb->ptr; | ||
684 | while (1) { | ||
685 | flat_read_chunk(inb, &re, sizeof(re)); | ||
686 | re.address = fdt64_to_cpu(re.address); | ||
687 | re.size = fdt64_to_cpu(re.size); | ||
688 | if (re.size == 0) | ||
689 | break; | ||
690 | |||
691 | new = build_reserve_entry(re.address, re.size, NULL); | ||
692 | reservelist = add_reserve_entry(reservelist, new); | ||
693 | } | ||
694 | |||
695 | return reservelist; | ||
696 | } | ||
697 | |||
698 | |||
699 | static char *nodename_from_path(const char *ppath, const char *cpath) | ||
700 | { | ||
701 | int plen; | ||
702 | |||
703 | plen = strlen(ppath); | ||
704 | |||
705 | if (!strneq(ppath, cpath, plen)) | ||
706 | die("Path \"%s\" is not valid as a child of \"%s\"\n", | ||
707 | cpath, ppath); | ||
708 | |||
709 | /* root node is a special case */ | ||
710 | if (!streq(ppath, "/")) | ||
711 | plen++; | ||
712 | |||
713 | return strdup(cpath + plen); | ||
714 | } | ||
715 | |||
716 | static struct node *unflatten_tree(struct inbuf *dtbuf, | ||
717 | struct inbuf *strbuf, | ||
718 | const char *parent_flatname, int flags) | ||
719 | { | ||
720 | struct node *node; | ||
721 | char *flatname; | ||
722 | uint32_t val; | ||
723 | |||
724 | node = build_node(NULL, NULL); | ||
725 | |||
726 | flatname = flat_read_string(dtbuf); | ||
727 | |||
728 | if (flags & FTF_FULLPATH) | ||
729 | node->name = nodename_from_path(parent_flatname, flatname); | ||
730 | else | ||
731 | node->name = flatname; | ||
732 | |||
733 | do { | ||
734 | struct property *prop; | ||
735 | struct node *child; | ||
736 | |||
737 | val = flat_read_word(dtbuf); | ||
738 | switch (val) { | ||
739 | case FDT_PROP: | ||
740 | if (node->children) | ||
741 | fprintf(stderr, "Warning: Flat tree input has " | ||
742 | "subnodes preceding a property.\n"); | ||
743 | prop = flat_read_property(dtbuf, strbuf, flags); | ||
744 | add_property(node, prop); | ||
745 | break; | ||
746 | |||
747 | case FDT_BEGIN_NODE: | ||
748 | child = unflatten_tree(dtbuf,strbuf, flatname, flags); | ||
749 | add_child(node, child); | ||
750 | break; | ||
751 | |||
752 | case FDT_END_NODE: | ||
753 | break; | ||
754 | |||
755 | case FDT_END: | ||
756 | die("Premature FDT_END in device tree blob\n"); | ||
757 | break; | ||
758 | |||
759 | case FDT_NOP: | ||
760 | if (!(flags & FTF_NOPS)) | ||
761 | fprintf(stderr, "Warning: NOP tag found in flat tree" | ||
762 | " version <16\n"); | ||
763 | |||
764 | /* Ignore */ | ||
765 | break; | ||
766 | |||
767 | default: | ||
768 | die("Invalid opcode word %08x in device tree blob\n", | ||
769 | val); | ||
770 | } | ||
771 | } while (val != FDT_END_NODE); | ||
772 | |||
773 | return node; | ||
774 | } | ||
775 | |||
776 | |||
777 | struct boot_info *dt_from_blob(const char *fname) | ||
778 | { | ||
779 | struct dtc_file *dtcf; | ||
780 | uint32_t magic, totalsize, version, size_dt, boot_cpuid_phys; | ||
781 | uint32_t off_dt, off_str, off_mem_rsvmap; | ||
782 | int rc; | ||
783 | char *blob; | ||
784 | struct fdt_header *fdt; | ||
785 | char *p; | ||
786 | struct inbuf dtbuf, strbuf; | ||
787 | struct inbuf memresvbuf; | ||
788 | int sizeleft; | ||
789 | struct reserve_info *reservelist; | ||
790 | struct node *tree; | ||
791 | uint32_t val; | ||
792 | int flags = 0; | ||
793 | |||
794 | dtcf = dtc_open_file(fname, NULL); | ||
795 | |||
796 | rc = fread(&magic, sizeof(magic), 1, dtcf->file); | ||
797 | if (ferror(dtcf->file)) | ||
798 | die("Error reading DT blob magic number: %s\n", | ||
799 | strerror(errno)); | ||
800 | if (rc < 1) { | ||
801 | if (feof(dtcf->file)) | ||
802 | die("EOF reading DT blob magic number\n"); | ||
803 | else | ||
804 | die("Mysterious short read reading magic number\n"); | ||
805 | } | ||
806 | |||
807 | magic = fdt32_to_cpu(magic); | ||
808 | if (magic != FDT_MAGIC) | ||
809 | die("Blob has incorrect magic number\n"); | ||
810 | |||
811 | rc = fread(&totalsize, sizeof(totalsize), 1, dtcf->file); | ||
812 | if (ferror(dtcf->file)) | ||
813 | die("Error reading DT blob size: %s\n", strerror(errno)); | ||
814 | if (rc < 1) { | ||
815 | if (feof(dtcf->file)) | ||
816 | die("EOF reading DT blob size\n"); | ||
817 | else | ||
818 | die("Mysterious short read reading blob size\n"); | ||
819 | } | ||
820 | |||
821 | totalsize = fdt32_to_cpu(totalsize); | ||
822 | if (totalsize < FDT_V1_SIZE) | ||
823 | die("DT blob size (%d) is too small\n", totalsize); | ||
824 | |||
825 | blob = xmalloc(totalsize); | ||
826 | |||
827 | fdt = (struct fdt_header *)blob; | ||
828 | fdt->magic = cpu_to_fdt32(magic); | ||
829 | fdt->totalsize = cpu_to_fdt32(totalsize); | ||
830 | |||
831 | sizeleft = totalsize - sizeof(magic) - sizeof(totalsize); | ||
832 | p = blob + sizeof(magic) + sizeof(totalsize); | ||
833 | |||
834 | while (sizeleft) { | ||
835 | if (feof(dtcf->file)) | ||
836 | die("EOF before reading %d bytes of DT blob\n", | ||
837 | totalsize); | ||
838 | |||
839 | rc = fread(p, 1, sizeleft, dtcf->file); | ||
840 | if (ferror(dtcf->file)) | ||
841 | die("Error reading DT blob: %s\n", | ||
842 | strerror(errno)); | ||
843 | |||
844 | sizeleft -= rc; | ||
845 | p += rc; | ||
846 | } | ||
847 | |||
848 | off_dt = fdt32_to_cpu(fdt->off_dt_struct); | ||
849 | off_str = fdt32_to_cpu(fdt->off_dt_strings); | ||
850 | off_mem_rsvmap = fdt32_to_cpu(fdt->off_mem_rsvmap); | ||
851 | version = fdt32_to_cpu(fdt->version); | ||
852 | boot_cpuid_phys = fdt32_to_cpu(fdt->boot_cpuid_phys); | ||
853 | |||
854 | if (off_mem_rsvmap >= totalsize) | ||
855 | die("Mem Reserve structure offset exceeds total size\n"); | ||
856 | |||
857 | if (off_dt >= totalsize) | ||
858 | die("DT structure offset exceeds total size\n"); | ||
859 | |||
860 | if (off_str > totalsize) | ||
861 | die("String table offset exceeds total size\n"); | ||
862 | |||
863 | if (version >= 3) { | ||
864 | uint32_t size_str = fdt32_to_cpu(fdt->size_dt_strings); | ||
865 | if (off_str+size_str > totalsize) | ||
866 | die("String table extends past total size\n"); | ||
867 | inbuf_init(&strbuf, blob + off_str, blob + off_str + size_str); | ||
868 | } else { | ||
869 | inbuf_init(&strbuf, blob + off_str, blob + totalsize); | ||
870 | } | ||
871 | |||
872 | if (version >= 17) { | ||
873 | size_dt = fdt32_to_cpu(fdt->size_dt_struct); | ||
874 | if (off_dt+size_dt > totalsize) | ||
875 | die("Structure block extends past total size\n"); | ||
876 | } | ||
877 | |||
878 | if (version < 16) { | ||
879 | flags |= FTF_FULLPATH | FTF_NAMEPROPS | FTF_VARALIGN; | ||
880 | } else { | ||
881 | flags |= FTF_NOPS; | ||
882 | } | ||
883 | |||
884 | inbuf_init(&memresvbuf, | ||
885 | blob + off_mem_rsvmap, blob + totalsize); | ||
886 | inbuf_init(&dtbuf, blob + off_dt, blob + totalsize); | ||
887 | |||
888 | reservelist = flat_read_mem_reserve(&memresvbuf); | ||
889 | |||
890 | val = flat_read_word(&dtbuf); | ||
891 | |||
892 | if (val != FDT_BEGIN_NODE) | ||
893 | die("Device tree blob doesn't begin with FDT_BEGIN_NODE (begins with 0x%08x)\n", val); | ||
894 | |||
895 | tree = unflatten_tree(&dtbuf, &strbuf, "", flags); | ||
896 | |||
897 | val = flat_read_word(&dtbuf); | ||
898 | if (val != FDT_END) | ||
899 | die("Device tree blob doesn't end with FDT_END\n"); | ||
900 | |||
901 | free(blob); | ||
902 | |||
903 | dtc_close_file(dtcf); | ||
904 | |||
905 | return build_boot_info(reservelist, tree, boot_cpuid_phys); | ||
906 | } | ||
diff --git a/arch/powerpc/boot/dtc-src/fstree.c b/arch/powerpc/boot/dtc-src/fstree.c deleted file mode 100644 index 766b2694d935..000000000000 --- a/arch/powerpc/boot/dtc-src/fstree.c +++ /dev/null | |||
@@ -1,92 +0,0 @@ | |||
1 | /* | ||
2 | * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation. 2005. | ||
3 | * | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or | ||
6 | * modify it under the terms of the GNU General Public License as | ||
7 | * published by the Free Software Foundation; either version 2 of the | ||
8 | * License, or (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
13 | * General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 | ||
18 | * USA | ||
19 | */ | ||
20 | |||
21 | #include "dtc.h" | ||
22 | |||
23 | #include <dirent.h> | ||
24 | #include <sys/stat.h> | ||
25 | |||
26 | static struct node *read_fstree(const char *dirname) | ||
27 | { | ||
28 | DIR *d; | ||
29 | struct dirent *de; | ||
30 | struct stat st; | ||
31 | struct node *tree; | ||
32 | |||
33 | d = opendir(dirname); | ||
34 | if (!d) | ||
35 | die("Couldn't opendir() \"%s\": %s\n", dirname, strerror(errno)); | ||
36 | |||
37 | tree = build_node(NULL, NULL); | ||
38 | |||
39 | while ((de = readdir(d)) != NULL) { | ||
40 | char *tmpnam; | ||
41 | |||
42 | if (streq(de->d_name, ".") | ||
43 | || streq(de->d_name, "..")) | ||
44 | continue; | ||
45 | |||
46 | tmpnam = join_path(dirname, de->d_name); | ||
47 | |||
48 | if (lstat(tmpnam, &st) < 0) | ||
49 | die("stat(%s): %s\n", tmpnam, strerror(errno)); | ||
50 | |||
51 | if (S_ISREG(st.st_mode)) { | ||
52 | struct property *prop; | ||
53 | FILE *pfile; | ||
54 | |||
55 | pfile = fopen(tmpnam, "r"); | ||
56 | if (! pfile) { | ||
57 | fprintf(stderr, | ||
58 | "WARNING: Cannot open %s: %s\n", | ||
59 | tmpnam, strerror(errno)); | ||
60 | } else { | ||
61 | prop = build_property(strdup(de->d_name), | ||
62 | data_copy_file(pfile, | ||
63 | st.st_size), | ||
64 | NULL); | ||
65 | add_property(tree, prop); | ||
66 | fclose(pfile); | ||
67 | } | ||
68 | } else if (S_ISDIR(st.st_mode)) { | ||
69 | struct node *newchild; | ||
70 | |||
71 | newchild = read_fstree(tmpnam); | ||
72 | newchild = name_node(newchild, strdup(de->d_name), | ||
73 | NULL); | ||
74 | add_child(tree, newchild); | ||
75 | } | ||
76 | |||
77 | free(tmpnam); | ||
78 | } | ||
79 | |||
80 | return tree; | ||
81 | } | ||
82 | |||
83 | struct boot_info *dt_from_fs(const char *dirname) | ||
84 | { | ||
85 | struct node *tree; | ||
86 | |||
87 | tree = read_fstree(dirname); | ||
88 | tree = name_node(tree, "", NULL); | ||
89 | |||
90 | return build_boot_info(NULL, tree, 0); | ||
91 | } | ||
92 | |||
diff --git a/arch/powerpc/boot/dtc-src/libfdt_env.h b/arch/powerpc/boot/dtc-src/libfdt_env.h deleted file mode 100644 index 449bf602daf1..000000000000 --- a/arch/powerpc/boot/dtc-src/libfdt_env.h +++ /dev/null | |||
@@ -1,23 +0,0 @@ | |||
1 | #ifndef _LIBFDT_ENV_H | ||
2 | #define _LIBFDT_ENV_H | ||
3 | |||
4 | #include <stddef.h> | ||
5 | #include <stdint.h> | ||
6 | #include <string.h> | ||
7 | |||
8 | #define _B(n) ((unsigned long long)((uint8_t *)&x)[n]) | ||
9 | static inline uint32_t fdt32_to_cpu(uint32_t x) | ||
10 | { | ||
11 | return (_B(0) << 24) | (_B(1) << 16) | (_B(2) << 8) | _B(3); | ||
12 | } | ||
13 | #define cpu_to_fdt32(x) fdt32_to_cpu(x) | ||
14 | |||
15 | static inline uint64_t fdt64_to_cpu(uint64_t x) | ||
16 | { | ||
17 | return (_B(0) << 56) | (_B(1) << 48) | (_B(2) << 40) | (_B(3) << 32) | ||
18 | | (_B(4) << 24) | (_B(5) << 16) | (_B(6) << 8) | _B(7); | ||
19 | } | ||
20 | #define cpu_to_fdt64(x) fdt64_to_cpu(x) | ||
21 | #undef _B | ||
22 | |||
23 | #endif /* _LIBFDT_ENV_H */ | ||
diff --git a/arch/powerpc/boot/dtc-src/livetree.c b/arch/powerpc/boot/dtc-src/livetree.c deleted file mode 100644 index 0ca3de550b3f..000000000000 --- a/arch/powerpc/boot/dtc-src/livetree.c +++ /dev/null | |||
@@ -1,308 +0,0 @@ | |||
1 | /* | ||
2 | * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation. 2005. | ||
3 | * | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or | ||
6 | * modify it under the terms of the GNU General Public License as | ||
7 | * published by the Free Software Foundation; either version 2 of the | ||
8 | * License, or (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
13 | * General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 | ||
18 | * USA | ||
19 | */ | ||
20 | |||
21 | #include "dtc.h" | ||
22 | |||
23 | /* | ||
24 | * Tree building functions | ||
25 | */ | ||
26 | |||
27 | struct property *build_property(char *name, struct data val, char *label) | ||
28 | { | ||
29 | struct property *new = xmalloc(sizeof(*new)); | ||
30 | |||
31 | new->name = name; | ||
32 | new->val = val; | ||
33 | |||
34 | new->next = NULL; | ||
35 | |||
36 | new->label = label; | ||
37 | |||
38 | return new; | ||
39 | } | ||
40 | |||
41 | struct property *chain_property(struct property *first, struct property *list) | ||
42 | { | ||
43 | assert(first->next == NULL); | ||
44 | |||
45 | first->next = list; | ||
46 | return first; | ||
47 | } | ||
48 | |||
49 | struct property *reverse_properties(struct property *first) | ||
50 | { | ||
51 | struct property *p = first; | ||
52 | struct property *head = NULL; | ||
53 | struct property *next; | ||
54 | |||
55 | while (p) { | ||
56 | next = p->next; | ||
57 | p->next = head; | ||
58 | head = p; | ||
59 | p = next; | ||
60 | } | ||
61 | return head; | ||
62 | } | ||
63 | |||
64 | struct node *build_node(struct property *proplist, struct node *children) | ||
65 | { | ||
66 | struct node *new = xmalloc(sizeof(*new)); | ||
67 | struct node *child; | ||
68 | |||
69 | memset(new, 0, sizeof(*new)); | ||
70 | |||
71 | new->proplist = reverse_properties(proplist); | ||
72 | new->children = children; | ||
73 | |||
74 | for_each_child(new, child) { | ||
75 | child->parent = new; | ||
76 | } | ||
77 | |||
78 | return new; | ||
79 | } | ||
80 | |||
81 | struct node *name_node(struct node *node, char *name, char * label) | ||
82 | { | ||
83 | assert(node->name == NULL); | ||
84 | |||
85 | node->name = name; | ||
86 | |||
87 | node->label = label; | ||
88 | |||
89 | return node; | ||
90 | } | ||
91 | |||
92 | struct node *chain_node(struct node *first, struct node *list) | ||
93 | { | ||
94 | assert(first->next_sibling == NULL); | ||
95 | |||
96 | first->next_sibling = list; | ||
97 | return first; | ||
98 | } | ||
99 | |||
100 | void add_property(struct node *node, struct property *prop) | ||
101 | { | ||
102 | struct property **p; | ||
103 | |||
104 | prop->next = NULL; | ||
105 | |||
106 | p = &node->proplist; | ||
107 | while (*p) | ||
108 | p = &((*p)->next); | ||
109 | |||
110 | *p = prop; | ||
111 | } | ||
112 | |||
113 | void add_child(struct node *parent, struct node *child) | ||
114 | { | ||
115 | struct node **p; | ||
116 | |||
117 | child->next_sibling = NULL; | ||
118 | child->parent = parent; | ||
119 | |||
120 | p = &parent->children; | ||
121 | while (*p) | ||
122 | p = &((*p)->next_sibling); | ||
123 | |||
124 | *p = child; | ||
125 | } | ||
126 | |||
127 | struct reserve_info *build_reserve_entry(uint64_t address, uint64_t size, | ||
128 | char *label) | ||
129 | { | ||
130 | struct reserve_info *new = xmalloc(sizeof(*new)); | ||
131 | |||
132 | new->re.address = address; | ||
133 | new->re.size = size; | ||
134 | |||
135 | new->next = NULL; | ||
136 | |||
137 | new->label = label; | ||
138 | |||
139 | return new; | ||
140 | } | ||
141 | |||
142 | struct reserve_info *chain_reserve_entry(struct reserve_info *first, | ||
143 | struct reserve_info *list) | ||
144 | { | ||
145 | assert(first->next == NULL); | ||
146 | |||
147 | first->next = list; | ||
148 | return first; | ||
149 | } | ||
150 | |||
151 | struct reserve_info *add_reserve_entry(struct reserve_info *list, | ||
152 | struct reserve_info *new) | ||
153 | { | ||
154 | struct reserve_info *last; | ||
155 | |||
156 | new->next = NULL; | ||
157 | |||
158 | if (! list) | ||
159 | return new; | ||
160 | |||
161 | for (last = list; last->next; last = last->next) | ||
162 | ; | ||
163 | |||
164 | last->next = new; | ||
165 | |||
166 | return list; | ||
167 | } | ||
168 | |||
169 | struct boot_info *build_boot_info(struct reserve_info *reservelist, | ||
170 | struct node *tree, uint32_t boot_cpuid_phys) | ||
171 | { | ||
172 | struct boot_info *bi; | ||
173 | |||
174 | bi = xmalloc(sizeof(*bi)); | ||
175 | bi->reservelist = reservelist; | ||
176 | bi->dt = tree; | ||
177 | bi->boot_cpuid_phys = boot_cpuid_phys; | ||
178 | |||
179 | return bi; | ||
180 | } | ||
181 | |||
182 | /* | ||
183 | * Tree accessor functions | ||
184 | */ | ||
185 | |||
186 | const char *get_unitname(struct node *node) | ||
187 | { | ||
188 | if (node->name[node->basenamelen] == '\0') | ||
189 | return ""; | ||
190 | else | ||
191 | return node->name + node->basenamelen + 1; | ||
192 | } | ||
193 | |||
194 | struct property *get_property(struct node *node, const char *propname) | ||
195 | { | ||
196 | struct property *prop; | ||
197 | |||
198 | for_each_property(node, prop) | ||
199 | if (streq(prop->name, propname)) | ||
200 | return prop; | ||
201 | |||
202 | return NULL; | ||
203 | } | ||
204 | |||
205 | cell_t propval_cell(struct property *prop) | ||
206 | { | ||
207 | assert(prop->val.len == sizeof(cell_t)); | ||
208 | return fdt32_to_cpu(*((cell_t *)prop->val.val)); | ||
209 | } | ||
210 | |||
211 | struct node *get_subnode(struct node *node, const char *nodename) | ||
212 | { | ||
213 | struct node *child; | ||
214 | |||
215 | for_each_child(node, child) | ||
216 | if (streq(child->name, nodename)) | ||
217 | return child; | ||
218 | |||
219 | return NULL; | ||
220 | } | ||
221 | |||
222 | struct node *get_node_by_path(struct node *tree, const char *path) | ||
223 | { | ||
224 | const char *p; | ||
225 | struct node *child; | ||
226 | |||
227 | if (!path || ! (*path)) | ||
228 | return tree; | ||
229 | |||
230 | while (path[0] == '/') | ||
231 | path++; | ||
232 | |||
233 | p = strchr(path, '/'); | ||
234 | |||
235 | for_each_child(tree, child) { | ||
236 | if (p && strneq(path, child->name, p-path)) | ||
237 | return get_node_by_path(child, p+1); | ||
238 | else if (!p && streq(path, child->name)) | ||
239 | return child; | ||
240 | } | ||
241 | |||
242 | return NULL; | ||
243 | } | ||
244 | |||
245 | struct node *get_node_by_label(struct node *tree, const char *label) | ||
246 | { | ||
247 | struct node *child, *node; | ||
248 | |||
249 | assert(label && (strlen(label) > 0)); | ||
250 | |||
251 | if (tree->label && streq(tree->label, label)) | ||
252 | return tree; | ||
253 | |||
254 | for_each_child(tree, child) { | ||
255 | node = get_node_by_label(child, label); | ||
256 | if (node) | ||
257 | return node; | ||
258 | } | ||
259 | |||
260 | return NULL; | ||
261 | } | ||
262 | |||
263 | struct node *get_node_by_phandle(struct node *tree, cell_t phandle) | ||
264 | { | ||
265 | struct node *child, *node; | ||
266 | |||
267 | assert((phandle != 0) && (phandle != -1)); | ||
268 | |||
269 | if (tree->phandle == phandle) | ||
270 | return tree; | ||
271 | |||
272 | for_each_child(tree, child) { | ||
273 | node = get_node_by_phandle(child, phandle); | ||
274 | if (node) | ||
275 | return node; | ||
276 | } | ||
277 | |||
278 | return NULL; | ||
279 | } | ||
280 | |||
281 | struct node *get_node_by_ref(struct node *tree, const char *ref) | ||
282 | { | ||
283 | if (ref[0] == '/') | ||
284 | return get_node_by_path(tree, ref); | ||
285 | else | ||
286 | return get_node_by_label(tree, ref); | ||
287 | } | ||
288 | |||
289 | cell_t get_node_phandle(struct node *root, struct node *node) | ||
290 | { | ||
291 | static cell_t phandle = 1; /* FIXME: ick, static local */ | ||
292 | |||
293 | if ((node->phandle != 0) && (node->phandle != -1)) | ||
294 | return node->phandle; | ||
295 | |||
296 | assert(! get_property(node, "linux,phandle")); | ||
297 | |||
298 | while (get_node_by_phandle(root, phandle)) | ||
299 | phandle++; | ||
300 | |||
301 | node->phandle = phandle; | ||
302 | add_property(node, | ||
303 | build_property("linux,phandle", | ||
304 | data_append_cell(empty_data, phandle), | ||
305 | NULL)); | ||
306 | |||
307 | return node->phandle; | ||
308 | } | ||
diff --git a/arch/powerpc/boot/dtc-src/srcpos.c b/arch/powerpc/boot/dtc-src/srcpos.c deleted file mode 100644 index 9641b7628b4d..000000000000 --- a/arch/powerpc/boot/dtc-src/srcpos.c +++ /dev/null | |||
@@ -1,116 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright 2007 Jon Loeliger, Freescale Semiconductor, Inc. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or | ||
5 | * modify it under the terms of the GNU General Public License as | ||
6 | * published by the Free Software Foundation; either version 2 of the | ||
7 | * License, or (at your option) any later version. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
12 | * General Public License for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License | ||
15 | * along with this program; if not, write to the Free Software | ||
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 | ||
17 | * USA | ||
18 | */ | ||
19 | |||
20 | #include "dtc.h" | ||
21 | #include "srcpos.h" | ||
22 | |||
23 | /* | ||
24 | * Like yylineno, this is the current open file pos. | ||
25 | */ | ||
26 | |||
27 | struct dtc_file *srcpos_file; | ||
28 | |||
29 | static int dtc_open_one(struct dtc_file *file, | ||
30 | const char *search, | ||
31 | const char *fname) | ||
32 | { | ||
33 | char *fullname; | ||
34 | |||
35 | if (search) { | ||
36 | fullname = xmalloc(strlen(search) + strlen(fname) + 2); | ||
37 | |||
38 | strcpy(fullname, search); | ||
39 | strcat(fullname, "/"); | ||
40 | strcat(fullname, fname); | ||
41 | } else { | ||
42 | fullname = strdup(fname); | ||
43 | } | ||
44 | |||
45 | file->file = fopen(fullname, "r"); | ||
46 | if (!file->file) { | ||
47 | free(fullname); | ||
48 | return 0; | ||
49 | } | ||
50 | |||
51 | file->name = fullname; | ||
52 | return 1; | ||
53 | } | ||
54 | |||
55 | |||
56 | struct dtc_file *dtc_open_file(const char *fname, | ||
57 | const struct search_path *search) | ||
58 | { | ||
59 | static const struct search_path default_search = { NULL, NULL, NULL }; | ||
60 | |||
61 | struct dtc_file *file; | ||
62 | const char *slash; | ||
63 | |||
64 | file = xmalloc(sizeof(struct dtc_file)); | ||
65 | |||
66 | slash = strrchr(fname, '/'); | ||
67 | if (slash) { | ||
68 | char *dir = xmalloc(slash - fname + 1); | ||
69 | |||
70 | memcpy(dir, fname, slash - fname); | ||
71 | dir[slash - fname] = 0; | ||
72 | file->dir = dir; | ||
73 | } else { | ||
74 | file->dir = NULL; | ||
75 | } | ||
76 | |||
77 | if (streq(fname, "-")) { | ||
78 | file->name = "stdin"; | ||
79 | file->file = stdin; | ||
80 | return file; | ||
81 | } | ||
82 | |||
83 | if (fname[0] == '/') { | ||
84 | file->file = fopen(fname, "r"); | ||
85 | if (!file->file) | ||
86 | goto fail; | ||
87 | |||
88 | file->name = strdup(fname); | ||
89 | return file; | ||
90 | } | ||
91 | |||
92 | if (!search) | ||
93 | search = &default_search; | ||
94 | |||
95 | while (search) { | ||
96 | if (dtc_open_one(file, search->dir, fname)) | ||
97 | return file; | ||
98 | |||
99 | if (errno != ENOENT) | ||
100 | goto fail; | ||
101 | |||
102 | search = search->next; | ||
103 | } | ||
104 | |||
105 | fail: | ||
106 | die("Couldn't open \"%s\": %s\n", fname, strerror(errno)); | ||
107 | } | ||
108 | |||
109 | void dtc_close_file(struct dtc_file *file) | ||
110 | { | ||
111 | if (fclose(file->file)) | ||
112 | die("Error closing \"%s\": %s\n", file->name, strerror(errno)); | ||
113 | |||
114 | free(file->dir); | ||
115 | free(file); | ||
116 | } | ||
diff --git a/arch/powerpc/boot/dtc-src/srcpos.h b/arch/powerpc/boot/dtc-src/srcpos.h deleted file mode 100644 index e17c7c04db8e..000000000000 --- a/arch/powerpc/boot/dtc-src/srcpos.h +++ /dev/null | |||
@@ -1,85 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright 2007 Jon Loeliger, Freescale Semiconductor, Inc. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or | ||
5 | * modify it under the terms of the GNU General Public License as | ||
6 | * published by the Free Software Foundation; either version 2 of the | ||
7 | * License, or (at your option) any later version. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
12 | * General Public License for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License | ||
15 | * along with this program; if not, write to the Free Software | ||
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 | ||
17 | * USA | ||
18 | */ | ||
19 | |||
20 | /* | ||
21 | * Augment the standard YYLTYPE with a filenum index into an | ||
22 | * array of all opened filenames. | ||
23 | */ | ||
24 | |||
25 | #include <stdio.h> | ||
26 | |||
27 | struct dtc_file { | ||
28 | char *dir; | ||
29 | const char *name; | ||
30 | FILE *file; | ||
31 | }; | ||
32 | |||
33 | #if ! defined(YYLTYPE) && ! defined(YYLTYPE_IS_DECLARED) | ||
34 | typedef struct YYLTYPE { | ||
35 | int first_line; | ||
36 | int first_column; | ||
37 | int last_line; | ||
38 | int last_column; | ||
39 | struct dtc_file *file; | ||
40 | } YYLTYPE; | ||
41 | |||
42 | #define YYLTYPE_IS_DECLARED 1 | ||
43 | #define YYLTYPE_IS_TRIVIAL 1 | ||
44 | #endif | ||
45 | |||
46 | /* Cater to old parser templates. */ | ||
47 | #ifndef YYID | ||
48 | #define YYID(n) (n) | ||
49 | #endif | ||
50 | |||
51 | #define YYLLOC_DEFAULT(Current, Rhs, N) \ | ||
52 | do \ | ||
53 | if (YYID (N)) \ | ||
54 | { \ | ||
55 | (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \ | ||
56 | (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \ | ||
57 | (Current).last_line = YYRHSLOC (Rhs, N).last_line; \ | ||
58 | (Current).last_column = YYRHSLOC (Rhs, N).last_column; \ | ||
59 | (Current).file = YYRHSLOC (Rhs, N).file; \ | ||
60 | } \ | ||
61 | else \ | ||
62 | { \ | ||
63 | (Current).first_line = (Current).last_line = \ | ||
64 | YYRHSLOC (Rhs, 0).last_line; \ | ||
65 | (Current).first_column = (Current).last_column = \ | ||
66 | YYRHSLOC (Rhs, 0).last_column; \ | ||
67 | (Current).file = YYRHSLOC (Rhs, 0).file; \ | ||
68 | } \ | ||
69 | while (YYID (0)) | ||
70 | |||
71 | |||
72 | |||
73 | extern void yyerror(char const *); | ||
74 | extern void yyerrorf(char const *, ...) __attribute__((format(printf, 1, 2))); | ||
75 | |||
76 | extern struct dtc_file *srcpos_file; | ||
77 | |||
78 | struct search_path { | ||
79 | const char *dir; /* NULL for current directory */ | ||
80 | struct search_path *prev, *next; | ||
81 | }; | ||
82 | |||
83 | extern struct dtc_file *dtc_open_file(const char *fname, | ||
84 | const struct search_path *search); | ||
85 | extern void dtc_close_file(struct dtc_file *file); | ||
diff --git a/arch/powerpc/boot/dtc-src/treesource.c b/arch/powerpc/boot/dtc-src/treesource.c deleted file mode 100644 index ebeb6eb27907..000000000000 --- a/arch/powerpc/boot/dtc-src/treesource.c +++ /dev/null | |||
@@ -1,278 +0,0 @@ | |||
1 | /* | ||
2 | * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation. 2005. | ||
3 | * | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or | ||
6 | * modify it under the terms of the GNU General Public License as | ||
7 | * published by the Free Software Foundation; either version 2 of the | ||
8 | * License, or (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
13 | * General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 | ||
18 | * USA | ||
19 | */ | ||
20 | |||
21 | #include "dtc.h" | ||
22 | #include "srcpos.h" | ||
23 | |||
24 | extern FILE *yyin; | ||
25 | extern int yyparse(void); | ||
26 | |||
27 | struct boot_info *the_boot_info; | ||
28 | int treesource_error; | ||
29 | |||
30 | struct boot_info *dt_from_source(const char *fname) | ||
31 | { | ||
32 | the_boot_info = NULL; | ||
33 | treesource_error = 0; | ||
34 | |||
35 | srcpos_file = dtc_open_file(fname, NULL); | ||
36 | yyin = srcpos_file->file; | ||
37 | |||
38 | if (yyparse() != 0) | ||
39 | die("Unable to parse input tree\n"); | ||
40 | |||
41 | if (treesource_error) | ||
42 | die("Syntax error parsing input tree\n"); | ||
43 | |||
44 | return the_boot_info; | ||
45 | } | ||
46 | |||
47 | static void write_prefix(FILE *f, int level) | ||
48 | { | ||
49 | int i; | ||
50 | |||
51 | for (i = 0; i < level; i++) | ||
52 | fputc('\t', f); | ||
53 | } | ||
54 | |||
55 | int isstring(char c) | ||
56 | { | ||
57 | return (isprint(c) | ||
58 | || (c == '\0') | ||
59 | || strchr("\a\b\t\n\v\f\r", c)); | ||
60 | } | ||
61 | |||
62 | static void write_propval_string(FILE *f, struct data val) | ||
63 | { | ||
64 | const char *str = val.val; | ||
65 | int i; | ||
66 | int newchunk = 1; | ||
67 | struct marker *m = val.markers; | ||
68 | |||
69 | assert(str[val.len-1] == '\0'); | ||
70 | |||
71 | for (i = 0; i < (val.len-1); i++) { | ||
72 | char c = str[i]; | ||
73 | |||
74 | if (newchunk) { | ||
75 | while (m && (m->offset <= i)) { | ||
76 | if (m->type == LABEL) { | ||
77 | assert(m->offset == i); | ||
78 | fprintf(f, "%s: ", m->ref); | ||
79 | } | ||
80 | m = m->next; | ||
81 | } | ||
82 | fprintf(f, "\""); | ||
83 | newchunk = 0; | ||
84 | } | ||
85 | |||
86 | switch (c) { | ||
87 | case '\a': | ||
88 | fprintf(f, "\\a"); | ||
89 | break; | ||
90 | case '\b': | ||
91 | fprintf(f, "\\b"); | ||
92 | break; | ||
93 | case '\t': | ||
94 | fprintf(f, "\\t"); | ||
95 | break; | ||
96 | case '\n': | ||
97 | fprintf(f, "\\n"); | ||
98 | break; | ||
99 | case '\v': | ||
100 | fprintf(f, "\\v"); | ||
101 | break; | ||
102 | case '\f': | ||
103 | fprintf(f, "\\f"); | ||
104 | break; | ||
105 | case '\r': | ||
106 | fprintf(f, "\\r"); | ||
107 | break; | ||
108 | case '\\': | ||
109 | fprintf(f, "\\\\"); | ||
110 | break; | ||
111 | case '\"': | ||
112 | fprintf(f, "\\\""); | ||
113 | break; | ||
114 | case '\0': | ||
115 | fprintf(f, "\", "); | ||
116 | newchunk = 1; | ||
117 | break; | ||
118 | default: | ||
119 | if (isprint(c)) | ||
120 | fprintf(f, "%c", c); | ||
121 | else | ||
122 | fprintf(f, "\\x%02hhx", c); | ||
123 | } | ||
124 | } | ||
125 | fprintf(f, "\""); | ||
126 | |||
127 | /* Wrap up any labels at the end of the value */ | ||
128 | for_each_marker_of_type(m, LABEL) { | ||
129 | assert (m->offset == val.len); | ||
130 | fprintf(f, " %s:", m->ref); | ||
131 | } | ||
132 | } | ||
133 | |||
134 | static void write_propval_cells(FILE *f, struct data val) | ||
135 | { | ||
136 | void *propend = val.val + val.len; | ||
137 | cell_t *cp = (cell_t *)val.val; | ||
138 | struct marker *m = val.markers; | ||
139 | |||
140 | fprintf(f, "<"); | ||
141 | for (;;) { | ||
142 | while (m && (m->offset <= ((char *)cp - val.val))) { | ||
143 | if (m->type == LABEL) { | ||
144 | assert(m->offset == ((char *)cp - val.val)); | ||
145 | fprintf(f, "%s: ", m->ref); | ||
146 | } | ||
147 | m = m->next; | ||
148 | } | ||
149 | |||
150 | fprintf(f, "0x%x", fdt32_to_cpu(*cp++)); | ||
151 | if ((void *)cp >= propend) | ||
152 | break; | ||
153 | fprintf(f, " "); | ||
154 | } | ||
155 | |||
156 | /* Wrap up any labels at the end of the value */ | ||
157 | for_each_marker_of_type(m, LABEL) { | ||
158 | assert (m->offset == val.len); | ||
159 | fprintf(f, " %s:", m->ref); | ||
160 | } | ||
161 | fprintf(f, ">"); | ||
162 | } | ||
163 | |||
164 | static void write_propval_bytes(FILE *f, struct data val) | ||
165 | { | ||
166 | void *propend = val.val + val.len; | ||
167 | const char *bp = val.val; | ||
168 | struct marker *m = val.markers; | ||
169 | |||
170 | fprintf(f, "["); | ||
171 | for (;;) { | ||
172 | while (m && (m->offset == (bp-val.val))) { | ||
173 | if (m->type == LABEL) | ||
174 | fprintf(f, "%s: ", m->ref); | ||
175 | m = m->next; | ||
176 | } | ||
177 | |||
178 | fprintf(f, "%02hhx", *bp++); | ||
179 | if ((const void *)bp >= propend) | ||
180 | break; | ||
181 | fprintf(f, " "); | ||
182 | } | ||
183 | |||
184 | /* Wrap up any labels at the end of the value */ | ||
185 | for_each_marker_of_type(m, LABEL) { | ||
186 | assert (m->offset == val.len); | ||
187 | fprintf(f, " %s:", m->ref); | ||
188 | } | ||
189 | fprintf(f, "]"); | ||
190 | } | ||
191 | |||
192 | static void write_propval(FILE *f, struct property *prop) | ||
193 | { | ||
194 | int len = prop->val.len; | ||
195 | const char *p = prop->val.val; | ||
196 | struct marker *m = prop->val.markers; | ||
197 | int nnotstring = 0, nnul = 0; | ||
198 | int nnotstringlbl = 0, nnotcelllbl = 0; | ||
199 | int i; | ||
200 | |||
201 | if (len == 0) { | ||
202 | fprintf(f, ";\n"); | ||
203 | return; | ||
204 | } | ||
205 | |||
206 | for (i = 0; i < len; i++) { | ||
207 | if (! isstring(p[i])) | ||
208 | nnotstring++; | ||
209 | if (p[i] == '\0') | ||
210 | nnul++; | ||
211 | } | ||
212 | |||
213 | for_each_marker_of_type(m, LABEL) { | ||
214 | if ((m->offset > 0) && (prop->val.val[m->offset - 1] != '\0')) | ||
215 | nnotstringlbl++; | ||
216 | if ((m->offset % sizeof(cell_t)) != 0) | ||
217 | nnotcelllbl++; | ||
218 | } | ||
219 | |||
220 | fprintf(f, " = "); | ||
221 | if ((p[len-1] == '\0') && (nnotstring == 0) && (nnul < (len-nnul)) | ||
222 | && (nnotstringlbl == 0)) { | ||
223 | write_propval_string(f, prop->val); | ||
224 | } else if (((len % sizeof(cell_t)) == 0) && (nnotcelllbl == 0)) { | ||
225 | write_propval_cells(f, prop->val); | ||
226 | } else { | ||
227 | write_propval_bytes(f, prop->val); | ||
228 | } | ||
229 | |||
230 | fprintf(f, ";\n"); | ||
231 | } | ||
232 | |||
233 | static void write_tree_source_node(FILE *f, struct node *tree, int level) | ||
234 | { | ||
235 | struct property *prop; | ||
236 | struct node *child; | ||
237 | |||
238 | write_prefix(f, level); | ||
239 | if (tree->label) | ||
240 | fprintf(f, "%s: ", tree->label); | ||
241 | if (tree->name && (*tree->name)) | ||
242 | fprintf(f, "%s {\n", tree->name); | ||
243 | else | ||
244 | fprintf(f, "/ {\n"); | ||
245 | |||
246 | for_each_property(tree, prop) { | ||
247 | write_prefix(f, level+1); | ||
248 | if (prop->label) | ||
249 | fprintf(f, "%s: ", prop->label); | ||
250 | fprintf(f, "%s", prop->name); | ||
251 | write_propval(f, prop); | ||
252 | } | ||
253 | for_each_child(tree, child) { | ||
254 | fprintf(f, "\n"); | ||
255 | write_tree_source_node(f, child, level+1); | ||
256 | } | ||
257 | write_prefix(f, level); | ||
258 | fprintf(f, "};\n"); | ||
259 | } | ||
260 | |||
261 | |||
262 | void dt_to_source(FILE *f, struct boot_info *bi) | ||
263 | { | ||
264 | struct reserve_info *re; | ||
265 | |||
266 | fprintf(f, "/dts-v1/;\n\n"); | ||
267 | |||
268 | for (re = bi->reservelist; re; re = re->next) { | ||
269 | if (re->label) | ||
270 | fprintf(f, "%s: ", re->label); | ||
271 | fprintf(f, "/memreserve/\t0x%016llx 0x%016llx;\n", | ||
272 | (unsigned long long)re->re.address, | ||
273 | (unsigned long long)re->re.size); | ||
274 | } | ||
275 | |||
276 | write_tree_source_node(f, bi->dt, 0); | ||
277 | } | ||
278 | |||
diff --git a/arch/powerpc/boot/dtc-src/version_gen.h b/arch/powerpc/boot/dtc-src/version_gen.h deleted file mode 100644 index 658ff42429d6..000000000000 --- a/arch/powerpc/boot/dtc-src/version_gen.h +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | #define DTC_VERSION "DTC 1.2.0" | ||
diff --git a/arch/powerpc/boot/dts/gef_ppc9a.dts b/arch/powerpc/boot/dts/gef_ppc9a.dts index d47ad0718759..53a7a6255909 100644 --- a/arch/powerpc/boot/dts/gef_ppc9a.dts +++ b/arch/powerpc/boot/dts/gef_ppc9a.dts | |||
@@ -161,6 +161,7 @@ | |||
161 | #address-cells = <1>; | 161 | #address-cells = <1>; |
162 | #size-cells = <1>; | 162 | #size-cells = <1>; |
163 | #interrupt-cells = <2>; | 163 | #interrupt-cells = <2>; |
164 | device_type = "soc"; | ||
164 | compatible = "fsl,mpc8641-soc", "simple-bus"; | 165 | compatible = "fsl,mpc8641-soc", "simple-bus"; |
165 | ranges = <0x0 0xfef00000 0x00100000>; | 166 | ranges = <0x0 0xfef00000 0x00100000>; |
166 | reg = <0xfef00000 0x100000>; // CCSRBAR 1M | 167 | reg = <0xfef00000 0x100000>; // CCSRBAR 1M |
diff --git a/arch/powerpc/boot/libfdt/Makefile.libfdt b/arch/powerpc/boot/libfdt/Makefile.libfdt deleted file mode 100644 index 6c42acfa21ec..000000000000 --- a/arch/powerpc/boot/libfdt/Makefile.libfdt +++ /dev/null | |||
@@ -1,8 +0,0 @@ | |||
1 | # Makefile.libfdt | ||
2 | # | ||
3 | # This is not a complete Makefile of itself. Instead, it is designed to | ||
4 | # be easily embeddable into other systems of Makefiles. | ||
5 | # | ||
6 | LIBFDT_INCLUDES = fdt.h libfdt.h | ||
7 | LIBFDT_SRCS = fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c | ||
8 | LIBFDT_OBJS = $(LIBFDT_SRCS:%.c=%.o) | ||
diff --git a/arch/powerpc/boot/libfdt/fdt.c b/arch/powerpc/boot/libfdt/fdt.c deleted file mode 100644 index 2acaec5923ae..000000000000 --- a/arch/powerpc/boot/libfdt/fdt.c +++ /dev/null | |||
@@ -1,201 +0,0 @@ | |||
1 | /* | ||
2 | * libfdt - Flat Device Tree manipulation | ||
3 | * Copyright (C) 2006 David Gibson, IBM Corporation. | ||
4 | * | ||
5 | * libfdt is dual licensed: you can use it either under the terms of | ||
6 | * the GPL, or the BSD license, at your option. | ||
7 | * | ||
8 | * a) This library is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License as | ||
10 | * published by the Free Software Foundation; either version 2 of the | ||
11 | * License, or (at your option) any later version. | ||
12 | * | ||
13 | * This library is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | * | ||
18 | * You should have received a copy of the GNU General Public | ||
19 | * License along with this library; if not, write to the Free | ||
20 | * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, | ||
21 | * MA 02110-1301 USA | ||
22 | * | ||
23 | * Alternatively, | ||
24 | * | ||
25 | * b) Redistribution and use in source and binary forms, with or | ||
26 | * without modification, are permitted provided that the following | ||
27 | * conditions are met: | ||
28 | * | ||
29 | * 1. Redistributions of source code must retain the above | ||
30 | * copyright notice, this list of conditions and the following | ||
31 | * disclaimer. | ||
32 | * 2. Redistributions in binary form must reproduce the above | ||
33 | * copyright notice, this list of conditions and the following | ||
34 | * disclaimer in the documentation and/or other materials | ||
35 | * provided with the distribution. | ||
36 | * | ||
37 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND | ||
38 | * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, | ||
39 | * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | ||
40 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | ||
41 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR | ||
42 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | ||
43 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | ||
44 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | ||
45 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | ||
46 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | ||
47 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR | ||
48 | * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, | ||
49 | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
50 | */ | ||
51 | #include "libfdt_env.h" | ||
52 | |||
53 | #include <fdt.h> | ||
54 | #include <libfdt.h> | ||
55 | |||
56 | #include "libfdt_internal.h" | ||
57 | |||
58 | int fdt_check_header(const void *fdt) | ||
59 | { | ||
60 | if (fdt_magic(fdt) == FDT_MAGIC) { | ||
61 | /* Complete tree */ | ||
62 | if (fdt_version(fdt) < FDT_FIRST_SUPPORTED_VERSION) | ||
63 | return -FDT_ERR_BADVERSION; | ||
64 | if (fdt_last_comp_version(fdt) > FDT_LAST_SUPPORTED_VERSION) | ||
65 | return -FDT_ERR_BADVERSION; | ||
66 | } else if (fdt_magic(fdt) == FDT_SW_MAGIC) { | ||
67 | /* Unfinished sequential-write blob */ | ||
68 | if (fdt_size_dt_struct(fdt) == 0) | ||
69 | return -FDT_ERR_BADSTATE; | ||
70 | } else { | ||
71 | return -FDT_ERR_BADMAGIC; | ||
72 | } | ||
73 | |||
74 | return 0; | ||
75 | } | ||
76 | |||
77 | const void *fdt_offset_ptr(const void *fdt, int offset, int len) | ||
78 | { | ||
79 | const char *p; | ||
80 | |||
81 | if (fdt_version(fdt) >= 0x11) | ||
82 | if (((offset + len) < offset) | ||
83 | || ((offset + len) > fdt_size_dt_struct(fdt))) | ||
84 | return NULL; | ||
85 | |||
86 | p = _fdt_offset_ptr(fdt, offset); | ||
87 | |||
88 | if (p + len < p) | ||
89 | return NULL; | ||
90 | return p; | ||
91 | } | ||
92 | |||
93 | uint32_t fdt_next_tag(const void *fdt, int offset, int *nextoffset) | ||
94 | { | ||
95 | const uint32_t *tagp, *lenp; | ||
96 | uint32_t tag; | ||
97 | const char *p; | ||
98 | |||
99 | if (offset % FDT_TAGSIZE) | ||
100 | return -1; | ||
101 | |||
102 | tagp = fdt_offset_ptr(fdt, offset, FDT_TAGSIZE); | ||
103 | if (! tagp) | ||
104 | return FDT_END; /* premature end */ | ||
105 | tag = fdt32_to_cpu(*tagp); | ||
106 | offset += FDT_TAGSIZE; | ||
107 | |||
108 | switch (tag) { | ||
109 | case FDT_BEGIN_NODE: | ||
110 | /* skip name */ | ||
111 | do { | ||
112 | p = fdt_offset_ptr(fdt, offset++, 1); | ||
113 | } while (p && (*p != '\0')); | ||
114 | if (! p) | ||
115 | return FDT_END; | ||
116 | break; | ||
117 | case FDT_PROP: | ||
118 | lenp = fdt_offset_ptr(fdt, offset, sizeof(*lenp)); | ||
119 | if (! lenp) | ||
120 | return FDT_END; | ||
121 | /* skip name offset, length and value */ | ||
122 | offset += 2*FDT_TAGSIZE + fdt32_to_cpu(*lenp); | ||
123 | break; | ||
124 | } | ||
125 | |||
126 | if (nextoffset) | ||
127 | *nextoffset = FDT_TAGALIGN(offset); | ||
128 | |||
129 | return tag; | ||
130 | } | ||
131 | |||
132 | int _fdt_check_node_offset(const void *fdt, int offset) | ||
133 | { | ||
134 | if ((offset < 0) || (offset % FDT_TAGSIZE) | ||
135 | || (fdt_next_tag(fdt, offset, &offset) != FDT_BEGIN_NODE)) | ||
136 | return -FDT_ERR_BADOFFSET; | ||
137 | |||
138 | return offset; | ||
139 | } | ||
140 | |||
141 | int fdt_next_node(const void *fdt, int offset, int *depth) | ||
142 | { | ||
143 | int nextoffset = 0; | ||
144 | uint32_t tag; | ||
145 | |||
146 | if (offset >= 0) | ||
147 | if ((nextoffset = _fdt_check_node_offset(fdt, offset)) < 0) | ||
148 | return nextoffset; | ||
149 | |||
150 | do { | ||
151 | offset = nextoffset; | ||
152 | tag = fdt_next_tag(fdt, offset, &nextoffset); | ||
153 | |||
154 | switch (tag) { | ||
155 | case FDT_PROP: | ||
156 | case FDT_NOP: | ||
157 | break; | ||
158 | |||
159 | case FDT_BEGIN_NODE: | ||
160 | if (depth) | ||
161 | (*depth)++; | ||
162 | break; | ||
163 | |||
164 | case FDT_END_NODE: | ||
165 | if (depth) | ||
166 | (*depth)--; | ||
167 | break; | ||
168 | |||
169 | case FDT_END: | ||
170 | return -FDT_ERR_NOTFOUND; | ||
171 | |||
172 | default: | ||
173 | return -FDT_ERR_BADSTRUCTURE; | ||
174 | } | ||
175 | } while (tag != FDT_BEGIN_NODE); | ||
176 | |||
177 | return offset; | ||
178 | } | ||
179 | |||
180 | const char *_fdt_find_string(const char *strtab, int tabsize, const char *s) | ||
181 | { | ||
182 | int len = strlen(s) + 1; | ||
183 | const char *last = strtab + tabsize - len; | ||
184 | const char *p; | ||
185 | |||
186 | for (p = strtab; p <= last; p++) | ||
187 | if (memcmp(p, s, len) == 0) | ||
188 | return p; | ||
189 | return NULL; | ||
190 | } | ||
191 | |||
192 | int fdt_move(const void *fdt, void *buf, int bufsize) | ||
193 | { | ||
194 | FDT_CHECK_HEADER(fdt); | ||
195 | |||
196 | if (fdt_totalsize(fdt) > bufsize) | ||
197 | return -FDT_ERR_NOSPACE; | ||
198 | |||
199 | memmove(buf, fdt, fdt_totalsize(fdt)); | ||
200 | return 0; | ||
201 | } | ||
diff --git a/arch/powerpc/boot/libfdt/fdt.h b/arch/powerpc/boot/libfdt/fdt.h deleted file mode 100644 index 48ccfd910000..000000000000 --- a/arch/powerpc/boot/libfdt/fdt.h +++ /dev/null | |||
@@ -1,60 +0,0 @@ | |||
1 | #ifndef _FDT_H | ||
2 | #define _FDT_H | ||
3 | |||
4 | #ifndef __ASSEMBLY__ | ||
5 | |||
6 | struct fdt_header { | ||
7 | uint32_t magic; /* magic word FDT_MAGIC */ | ||
8 | uint32_t totalsize; /* total size of DT block */ | ||
9 | uint32_t off_dt_struct; /* offset to structure */ | ||
10 | uint32_t off_dt_strings; /* offset to strings */ | ||
11 | uint32_t off_mem_rsvmap; /* offset to memory reserve map */ | ||
12 | uint32_t version; /* format version */ | ||
13 | uint32_t last_comp_version; /* last compatible version */ | ||
14 | |||
15 | /* version 2 fields below */ | ||
16 | uint32_t boot_cpuid_phys; /* Which physical CPU id we're | ||
17 | booting on */ | ||
18 | /* version 3 fields below */ | ||
19 | uint32_t size_dt_strings; /* size of the strings block */ | ||
20 | |||
21 | /* version 17 fields below */ | ||
22 | uint32_t size_dt_struct; /* size of the structure block */ | ||
23 | }; | ||
24 | |||
25 | struct fdt_reserve_entry { | ||
26 | uint64_t address; | ||
27 | uint64_t size; | ||
28 | }; | ||
29 | |||
30 | struct fdt_node_header { | ||
31 | uint32_t tag; | ||
32 | char name[0]; | ||
33 | }; | ||
34 | |||
35 | struct fdt_property { | ||
36 | uint32_t tag; | ||
37 | uint32_t len; | ||
38 | uint32_t nameoff; | ||
39 | char data[0]; | ||
40 | }; | ||
41 | |||
42 | #endif /* !__ASSEMBLY */ | ||
43 | |||
44 | #define FDT_MAGIC 0xd00dfeed /* 4: version, 4: total size */ | ||
45 | #define FDT_TAGSIZE sizeof(uint32_t) | ||
46 | |||
47 | #define FDT_BEGIN_NODE 0x1 /* Start node: full name */ | ||
48 | #define FDT_END_NODE 0x2 /* End node */ | ||
49 | #define FDT_PROP 0x3 /* Property: name off, | ||
50 | size, content */ | ||
51 | #define FDT_NOP 0x4 /* nop */ | ||
52 | #define FDT_END 0x9 | ||
53 | |||
54 | #define FDT_V1_SIZE (7*sizeof(uint32_t)) | ||
55 | #define FDT_V2_SIZE (FDT_V1_SIZE + sizeof(uint32_t)) | ||
56 | #define FDT_V3_SIZE (FDT_V2_SIZE + sizeof(uint32_t)) | ||
57 | #define FDT_V16_SIZE FDT_V3_SIZE | ||
58 | #define FDT_V17_SIZE (FDT_V16_SIZE + sizeof(uint32_t)) | ||
59 | |||
60 | #endif /* _FDT_H */ | ||
diff --git a/arch/powerpc/boot/libfdt/fdt_ro.c b/arch/powerpc/boot/libfdt/fdt_ro.c deleted file mode 100644 index fbbba44fcd0d..000000000000 --- a/arch/powerpc/boot/libfdt/fdt_ro.c +++ /dev/null | |||
@@ -1,469 +0,0 @@ | |||
1 | /* | ||
2 | * libfdt - Flat Device Tree manipulation | ||
3 | * Copyright (C) 2006 David Gibson, IBM Corporation. | ||
4 | * | ||
5 | * libfdt is dual licensed: you can use it either under the terms of | ||
6 | * the GPL, or the BSD license, at your option. | ||
7 | * | ||
8 | * a) This library is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License as | ||
10 | * published by the Free Software Foundation; either version 2 of the | ||
11 | * License, or (at your option) any later version. | ||
12 | * | ||
13 | * This library is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | * | ||
18 | * You should have received a copy of the GNU General Public | ||
19 | * License along with this library; if not, write to the Free | ||
20 | * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, | ||
21 | * MA 02110-1301 USA | ||
22 | * | ||
23 | * Alternatively, | ||
24 | * | ||
25 | * b) Redistribution and use in source and binary forms, with or | ||
26 | * without modification, are permitted provided that the following | ||
27 | * conditions are met: | ||
28 | * | ||
29 | * 1. Redistributions of source code must retain the above | ||
30 | * copyright notice, this list of conditions and the following | ||
31 | * disclaimer. | ||
32 | * 2. Redistributions in binary form must reproduce the above | ||
33 | * copyright notice, this list of conditions and the following | ||
34 | * disclaimer in the documentation and/or other materials | ||
35 | * provided with the distribution. | ||
36 | * | ||
37 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND | ||
38 | * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, | ||
39 | * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | ||
40 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | ||
41 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR | ||
42 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | ||
43 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | ||
44 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | ||
45 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | ||
46 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | ||
47 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR | ||
48 | * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, | ||
49 | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
50 | */ | ||
51 | #include "libfdt_env.h" | ||
52 | |||
53 | #include <fdt.h> | ||
54 | #include <libfdt.h> | ||
55 | |||
56 | #include "libfdt_internal.h" | ||
57 | |||
58 | static int _fdt_nodename_eq(const void *fdt, int offset, | ||
59 | const char *s, int len) | ||
60 | { | ||
61 | const char *p = fdt_offset_ptr(fdt, offset + FDT_TAGSIZE, len+1); | ||
62 | |||
63 | if (! p) | ||
64 | /* short match */ | ||
65 | return 0; | ||
66 | |||
67 | if (memcmp(p, s, len) != 0) | ||
68 | return 0; | ||
69 | |||
70 | if (p[len] == '\0') | ||
71 | return 1; | ||
72 | else if (!memchr(s, '@', len) && (p[len] == '@')) | ||
73 | return 1; | ||
74 | else | ||
75 | return 0; | ||
76 | } | ||
77 | |||
78 | const char *fdt_string(const void *fdt, int stroffset) | ||
79 | { | ||
80 | return (const char *)fdt + fdt_off_dt_strings(fdt) + stroffset; | ||
81 | } | ||
82 | |||
83 | int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size) | ||
84 | { | ||
85 | FDT_CHECK_HEADER(fdt); | ||
86 | *address = fdt64_to_cpu(_fdt_mem_rsv(fdt, n)->address); | ||
87 | *size = fdt64_to_cpu(_fdt_mem_rsv(fdt, n)->size); | ||
88 | return 0; | ||
89 | } | ||
90 | |||
91 | int fdt_num_mem_rsv(const void *fdt) | ||
92 | { | ||
93 | int i = 0; | ||
94 | |||
95 | while (fdt64_to_cpu(_fdt_mem_rsv(fdt, i)->size) != 0) | ||
96 | i++; | ||
97 | return i; | ||
98 | } | ||
99 | |||
100 | int fdt_subnode_offset_namelen(const void *fdt, int offset, | ||
101 | const char *name, int namelen) | ||
102 | { | ||
103 | int depth; | ||
104 | |||
105 | FDT_CHECK_HEADER(fdt); | ||
106 | |||
107 | for (depth = 0, offset = fdt_next_node(fdt, offset, &depth); | ||
108 | (offset >= 0) && (depth > 0); | ||
109 | offset = fdt_next_node(fdt, offset, &depth)) { | ||
110 | if (depth < 0) | ||
111 | return -FDT_ERR_NOTFOUND; | ||
112 | else if ((depth == 1) | ||
113 | && _fdt_nodename_eq(fdt, offset, name, namelen)) | ||
114 | return offset; | ||
115 | } | ||
116 | |||
117 | if (offset < 0) | ||
118 | return offset; /* error */ | ||
119 | else | ||
120 | return -FDT_ERR_NOTFOUND; | ||
121 | } | ||
122 | |||
123 | int fdt_subnode_offset(const void *fdt, int parentoffset, | ||
124 | const char *name) | ||
125 | { | ||
126 | return fdt_subnode_offset_namelen(fdt, parentoffset, name, strlen(name)); | ||
127 | } | ||
128 | |||
129 | int fdt_path_offset(const void *fdt, const char *path) | ||
130 | { | ||
131 | const char *end = path + strlen(path); | ||
132 | const char *p = path; | ||
133 | int offset = 0; | ||
134 | |||
135 | FDT_CHECK_HEADER(fdt); | ||
136 | |||
137 | if (*path != '/') | ||
138 | return -FDT_ERR_BADPATH; | ||
139 | |||
140 | while (*p) { | ||
141 | const char *q; | ||
142 | |||
143 | while (*p == '/') | ||
144 | p++; | ||
145 | if (! *p) | ||
146 | return offset; | ||
147 | q = strchr(p, '/'); | ||
148 | if (! q) | ||
149 | q = end; | ||
150 | |||
151 | offset = fdt_subnode_offset_namelen(fdt, offset, p, q-p); | ||
152 | if (offset < 0) | ||
153 | return offset; | ||
154 | |||
155 | p = q; | ||
156 | } | ||
157 | |||
158 | return offset; | ||
159 | } | ||
160 | |||
161 | const char *fdt_get_name(const void *fdt, int nodeoffset, int *len) | ||
162 | { | ||
163 | const struct fdt_node_header *nh = _fdt_offset_ptr(fdt, nodeoffset); | ||
164 | int err; | ||
165 | |||
166 | if (((err = fdt_check_header(fdt)) != 0) | ||
167 | || ((err = _fdt_check_node_offset(fdt, nodeoffset)) < 0)) | ||
168 | goto fail; | ||
169 | |||
170 | if (len) | ||
171 | *len = strlen(nh->name); | ||
172 | |||
173 | return nh->name; | ||
174 | |||
175 | fail: | ||
176 | if (len) | ||
177 | *len = err; | ||
178 | return NULL; | ||
179 | } | ||
180 | |||
181 | const struct fdt_property *fdt_get_property(const void *fdt, | ||
182 | int nodeoffset, | ||
183 | const char *name, int *lenp) | ||
184 | { | ||
185 | uint32_t tag; | ||
186 | const struct fdt_property *prop; | ||
187 | int namestroff; | ||
188 | int offset, nextoffset; | ||
189 | int err; | ||
190 | |||
191 | if (((err = fdt_check_header(fdt)) != 0) | ||
192 | || ((err = _fdt_check_node_offset(fdt, nodeoffset)) < 0)) | ||
193 | goto fail; | ||
194 | |||
195 | nextoffset = err; | ||
196 | do { | ||
197 | offset = nextoffset; | ||
198 | |||
199 | tag = fdt_next_tag(fdt, offset, &nextoffset); | ||
200 | switch (tag) { | ||
201 | case FDT_END: | ||
202 | err = -FDT_ERR_TRUNCATED; | ||
203 | goto fail; | ||
204 | |||
205 | case FDT_BEGIN_NODE: | ||
206 | case FDT_END_NODE: | ||
207 | case FDT_NOP: | ||
208 | break; | ||
209 | |||
210 | case FDT_PROP: | ||
211 | err = -FDT_ERR_BADSTRUCTURE; | ||
212 | prop = fdt_offset_ptr(fdt, offset, sizeof(*prop)); | ||
213 | if (! prop) | ||
214 | goto fail; | ||
215 | namestroff = fdt32_to_cpu(prop->nameoff); | ||
216 | if (strcmp(fdt_string(fdt, namestroff), name) == 0) { | ||
217 | /* Found it! */ | ||
218 | int len = fdt32_to_cpu(prop->len); | ||
219 | prop = fdt_offset_ptr(fdt, offset, | ||
220 | sizeof(*prop)+len); | ||
221 | if (! prop) | ||
222 | goto fail; | ||
223 | |||
224 | if (lenp) | ||
225 | *lenp = len; | ||
226 | |||
227 | return prop; | ||
228 | } | ||
229 | break; | ||
230 | |||
231 | default: | ||
232 | err = -FDT_ERR_BADSTRUCTURE; | ||
233 | goto fail; | ||
234 | } | ||
235 | } while ((tag != FDT_BEGIN_NODE) && (tag != FDT_END_NODE)); | ||
236 | |||
237 | err = -FDT_ERR_NOTFOUND; | ||
238 | fail: | ||
239 | if (lenp) | ||
240 | *lenp = err; | ||
241 | return NULL; | ||
242 | } | ||
243 | |||
244 | const void *fdt_getprop(const void *fdt, int nodeoffset, | ||
245 | const char *name, int *lenp) | ||
246 | { | ||
247 | const struct fdt_property *prop; | ||
248 | |||
249 | prop = fdt_get_property(fdt, nodeoffset, name, lenp); | ||
250 | if (! prop) | ||
251 | return NULL; | ||
252 | |||
253 | return prop->data; | ||
254 | } | ||
255 | |||
256 | uint32_t fdt_get_phandle(const void *fdt, int nodeoffset) | ||
257 | { | ||
258 | const uint32_t *php; | ||
259 | int len; | ||
260 | |||
261 | php = fdt_getprop(fdt, nodeoffset, "linux,phandle", &len); | ||
262 | if (!php || (len != sizeof(*php))) | ||
263 | return 0; | ||
264 | |||
265 | return fdt32_to_cpu(*php); | ||
266 | } | ||
267 | |||
268 | int fdt_get_path(const void *fdt, int nodeoffset, char *buf, int buflen) | ||
269 | { | ||
270 | int pdepth = 0, p = 0; | ||
271 | int offset, depth, namelen; | ||
272 | const char *name; | ||
273 | |||
274 | FDT_CHECK_HEADER(fdt); | ||
275 | |||
276 | if (buflen < 2) | ||
277 | return -FDT_ERR_NOSPACE; | ||
278 | |||
279 | for (offset = 0, depth = 0; | ||
280 | (offset >= 0) && (offset <= nodeoffset); | ||
281 | offset = fdt_next_node(fdt, offset, &depth)) { | ||
282 | if (pdepth < depth) | ||
283 | continue; /* overflowed buffer */ | ||
284 | |||
285 | while (pdepth > depth) { | ||
286 | do { | ||
287 | p--; | ||
288 | } while (buf[p-1] != '/'); | ||
289 | pdepth--; | ||
290 | } | ||
291 | |||
292 | name = fdt_get_name(fdt, offset, &namelen); | ||
293 | if (!name) | ||
294 | return namelen; | ||
295 | if ((p + namelen + 1) <= buflen) { | ||
296 | memcpy(buf + p, name, namelen); | ||
297 | p += namelen; | ||
298 | buf[p++] = '/'; | ||
299 | pdepth++; | ||
300 | } | ||
301 | |||
302 | if (offset == nodeoffset) { | ||
303 | if (pdepth < (depth + 1)) | ||
304 | return -FDT_ERR_NOSPACE; | ||
305 | |||
306 | if (p > 1) /* special case so that root path is "/", not "" */ | ||
307 | p--; | ||
308 | buf[p] = '\0'; | ||
309 | return p; | ||
310 | } | ||
311 | } | ||
312 | |||
313 | if ((offset == -FDT_ERR_NOTFOUND) || (offset >= 0)) | ||
314 | return -FDT_ERR_BADOFFSET; | ||
315 | else if (offset == -FDT_ERR_BADOFFSET) | ||
316 | return -FDT_ERR_BADSTRUCTURE; | ||
317 | |||
318 | return offset; /* error from fdt_next_node() */ | ||
319 | } | ||
320 | |||
321 | int fdt_supernode_atdepth_offset(const void *fdt, int nodeoffset, | ||
322 | int supernodedepth, int *nodedepth) | ||
323 | { | ||
324 | int offset, depth; | ||
325 | int supernodeoffset = -FDT_ERR_INTERNAL; | ||
326 | |||
327 | FDT_CHECK_HEADER(fdt); | ||
328 | |||
329 | if (supernodedepth < 0) | ||
330 | return -FDT_ERR_NOTFOUND; | ||
331 | |||
332 | for (offset = 0, depth = 0; | ||
333 | (offset >= 0) && (offset <= nodeoffset); | ||
334 | offset = fdt_next_node(fdt, offset, &depth)) { | ||
335 | if (depth == supernodedepth) | ||
336 | supernodeoffset = offset; | ||
337 | |||
338 | if (offset == nodeoffset) { | ||
339 | if (nodedepth) | ||
340 | *nodedepth = depth; | ||
341 | |||
342 | if (supernodedepth > depth) | ||
343 | return -FDT_ERR_NOTFOUND; | ||
344 | else | ||
345 | return supernodeoffset; | ||
346 | } | ||
347 | } | ||
348 | |||
349 | if ((offset == -FDT_ERR_NOTFOUND) || (offset >= 0)) | ||
350 | return -FDT_ERR_BADOFFSET; | ||
351 | else if (offset == -FDT_ERR_BADOFFSET) | ||
352 | return -FDT_ERR_BADSTRUCTURE; | ||
353 | |||
354 | return offset; /* error from fdt_next_node() */ | ||
355 | } | ||
356 | |||
357 | int fdt_node_depth(const void *fdt, int nodeoffset) | ||
358 | { | ||
359 | int nodedepth; | ||
360 | int err; | ||
361 | |||
362 | err = fdt_supernode_atdepth_offset(fdt, nodeoffset, 0, &nodedepth); | ||
363 | if (err) | ||
364 | return (err < 0) ? err : -FDT_ERR_INTERNAL; | ||
365 | return nodedepth; | ||
366 | } | ||
367 | |||
368 | int fdt_parent_offset(const void *fdt, int nodeoffset) | ||
369 | { | ||
370 | int nodedepth = fdt_node_depth(fdt, nodeoffset); | ||
371 | |||
372 | if (nodedepth < 0) | ||
373 | return nodedepth; | ||
374 | return fdt_supernode_atdepth_offset(fdt, nodeoffset, | ||
375 | nodedepth - 1, NULL); | ||
376 | } | ||
377 | |||
378 | int fdt_node_offset_by_prop_value(const void *fdt, int startoffset, | ||
379 | const char *propname, | ||
380 | const void *propval, int proplen) | ||
381 | { | ||
382 | int offset; | ||
383 | const void *val; | ||
384 | int len; | ||
385 | |||
386 | FDT_CHECK_HEADER(fdt); | ||
387 | |||
388 | /* FIXME: The algorithm here is pretty horrible: we scan each | ||
389 | * property of a node in fdt_getprop(), then if that didn't | ||
390 | * find what we want, we scan over them again making our way | ||
391 | * to the next node. Still it's the easiest to implement | ||
392 | * approach; performance can come later. */ | ||
393 | for (offset = fdt_next_node(fdt, startoffset, NULL); | ||
394 | offset >= 0; | ||
395 | offset = fdt_next_node(fdt, offset, NULL)) { | ||
396 | val = fdt_getprop(fdt, offset, propname, &len); | ||
397 | if (val && (len == proplen) | ||
398 | && (memcmp(val, propval, len) == 0)) | ||
399 | return offset; | ||
400 | } | ||
401 | |||
402 | return offset; /* error from fdt_next_node() */ | ||
403 | } | ||
404 | |||
405 | int fdt_node_offset_by_phandle(const void *fdt, uint32_t phandle) | ||
406 | { | ||
407 | if ((phandle == 0) || (phandle == -1)) | ||
408 | return -FDT_ERR_BADPHANDLE; | ||
409 | phandle = cpu_to_fdt32(phandle); | ||
410 | return fdt_node_offset_by_prop_value(fdt, -1, "linux,phandle", | ||
411 | &phandle, sizeof(phandle)); | ||
412 | } | ||
413 | |||
414 | int _stringlist_contains(const char *strlist, int listlen, const char *str) | ||
415 | { | ||
416 | int len = strlen(str); | ||
417 | const char *p; | ||
418 | |||
419 | while (listlen >= len) { | ||
420 | if (memcmp(str, strlist, len+1) == 0) | ||
421 | return 1; | ||
422 | p = memchr(strlist, '\0', listlen); | ||
423 | if (!p) | ||
424 | return 0; /* malformed strlist.. */ | ||
425 | listlen -= (p-strlist) + 1; | ||
426 | strlist = p + 1; | ||
427 | } | ||
428 | return 0; | ||
429 | } | ||
430 | |||
431 | int fdt_node_check_compatible(const void *fdt, int nodeoffset, | ||
432 | const char *compatible) | ||
433 | { | ||
434 | const void *prop; | ||
435 | int len; | ||
436 | |||
437 | prop = fdt_getprop(fdt, nodeoffset, "compatible", &len); | ||
438 | if (!prop) | ||
439 | return len; | ||
440 | if (_stringlist_contains(prop, len, compatible)) | ||
441 | return 0; | ||
442 | else | ||
443 | return 1; | ||
444 | } | ||
445 | |||
446 | int fdt_node_offset_by_compatible(const void *fdt, int startoffset, | ||
447 | const char *compatible) | ||
448 | { | ||
449 | int offset, err; | ||
450 | |||
451 | FDT_CHECK_HEADER(fdt); | ||
452 | |||
453 | /* FIXME: The algorithm here is pretty horrible: we scan each | ||
454 | * property of a node in fdt_node_check_compatible(), then if | ||
455 | * that didn't find what we want, we scan over them again | ||
456 | * making our way to the next node. Still it's the easiest to | ||
457 | * implement approach; performance can come later. */ | ||
458 | for (offset = fdt_next_node(fdt, startoffset, NULL); | ||
459 | offset >= 0; | ||
460 | offset = fdt_next_node(fdt, offset, NULL)) { | ||
461 | err = fdt_node_check_compatible(fdt, offset, compatible); | ||
462 | if ((err < 0) && (err != -FDT_ERR_NOTFOUND)) | ||
463 | return err; | ||
464 | else if (err == 0) | ||
465 | return offset; | ||
466 | } | ||
467 | |||
468 | return offset; /* error from fdt_next_node() */ | ||
469 | } | ||
diff --git a/arch/powerpc/boot/libfdt/fdt_rw.c b/arch/powerpc/boot/libfdt/fdt_rw.c deleted file mode 100644 index 8e7ec4cb7bcd..000000000000 --- a/arch/powerpc/boot/libfdt/fdt_rw.c +++ /dev/null | |||
@@ -1,463 +0,0 @@ | |||
1 | /* | ||
2 | * libfdt - Flat Device Tree manipulation | ||
3 | * Copyright (C) 2006 David Gibson, IBM Corporation. | ||
4 | * | ||
5 | * libfdt is dual licensed: you can use it either under the terms of | ||
6 | * the GPL, or the BSD license, at your option. | ||
7 | * | ||
8 | * a) This library is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License as | ||
10 | * published by the Free Software Foundation; either version 2 of the | ||
11 | * License, or (at your option) any later version. | ||
12 | * | ||
13 | * This library is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | * | ||
18 | * You should have received a copy of the GNU General Public | ||
19 | * License along with this library; if not, write to the Free | ||
20 | * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, | ||
21 | * MA 02110-1301 USA | ||
22 | * | ||
23 | * Alternatively, | ||
24 | * | ||
25 | * b) Redistribution and use in source and binary forms, with or | ||
26 | * without modification, are permitted provided that the following | ||
27 | * conditions are met: | ||
28 | * | ||
29 | * 1. Redistributions of source code must retain the above | ||
30 | * copyright notice, this list of conditions and the following | ||
31 | * disclaimer. | ||
32 | * 2. Redistributions in binary form must reproduce the above | ||
33 | * copyright notice, this list of conditions and the following | ||
34 | * disclaimer in the documentation and/or other materials | ||
35 | * provided with the distribution. | ||
36 | * | ||
37 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND | ||
38 | * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, | ||
39 | * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | ||
40 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | ||
41 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR | ||
42 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | ||
43 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | ||
44 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | ||
45 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | ||
46 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | ||
47 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR | ||
48 | * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, | ||
49 | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
50 | */ | ||
51 | #include "libfdt_env.h" | ||
52 | |||
53 | #include <fdt.h> | ||
54 | #include <libfdt.h> | ||
55 | |||
56 | #include "libfdt_internal.h" | ||
57 | |||
58 | static int _fdt_blocks_misordered(const void *fdt, | ||
59 | int mem_rsv_size, int struct_size) | ||
60 | { | ||
61 | return (fdt_off_mem_rsvmap(fdt) < FDT_ALIGN(sizeof(struct fdt_header), 8)) | ||
62 | || (fdt_off_dt_struct(fdt) < | ||
63 | (fdt_off_mem_rsvmap(fdt) + mem_rsv_size)) | ||
64 | || (fdt_off_dt_strings(fdt) < | ||
65 | (fdt_off_dt_struct(fdt) + struct_size)) | ||
66 | || (fdt_totalsize(fdt) < | ||
67 | (fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt))); | ||
68 | } | ||
69 | |||
70 | static int _fdt_rw_check_header(void *fdt) | ||
71 | { | ||
72 | FDT_CHECK_HEADER(fdt); | ||
73 | |||
74 | if (fdt_version(fdt) < 17) | ||
75 | return -FDT_ERR_BADVERSION; | ||
76 | if (_fdt_blocks_misordered(fdt, sizeof(struct fdt_reserve_entry), | ||
77 | fdt_size_dt_struct(fdt))) | ||
78 | return -FDT_ERR_BADLAYOUT; | ||
79 | if (fdt_version(fdt) > 17) | ||
80 | fdt_set_version(fdt, 17); | ||
81 | |||
82 | return 0; | ||
83 | } | ||
84 | |||
85 | #define FDT_RW_CHECK_HEADER(fdt) \ | ||
86 | { \ | ||
87 | int err; \ | ||
88 | if ((err = _fdt_rw_check_header(fdt)) != 0) \ | ||
89 | return err; \ | ||
90 | } | ||
91 | |||
92 | static inline int _fdt_data_size(void *fdt) | ||
93 | { | ||
94 | return fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt); | ||
95 | } | ||
96 | |||
97 | static int _fdt_splice(void *fdt, void *splicepoint, int oldlen, int newlen) | ||
98 | { | ||
99 | char *p = splicepoint; | ||
100 | char *end = (char *)fdt + _fdt_data_size(fdt); | ||
101 | |||
102 | if (((p + oldlen) < p) || ((p + oldlen) > end)) | ||
103 | return -FDT_ERR_BADOFFSET; | ||
104 | if ((end - oldlen + newlen) > ((char *)fdt + fdt_totalsize(fdt))) | ||
105 | return -FDT_ERR_NOSPACE; | ||
106 | memmove(p + newlen, p + oldlen, end - p - oldlen); | ||
107 | return 0; | ||
108 | } | ||
109 | |||
110 | static int _fdt_splice_mem_rsv(void *fdt, struct fdt_reserve_entry *p, | ||
111 | int oldn, int newn) | ||
112 | { | ||
113 | int delta = (newn - oldn) * sizeof(*p); | ||
114 | int err; | ||
115 | err = _fdt_splice(fdt, p, oldn * sizeof(*p), newn * sizeof(*p)); | ||
116 | if (err) | ||
117 | return err; | ||
118 | fdt_set_off_dt_struct(fdt, fdt_off_dt_struct(fdt) + delta); | ||
119 | fdt_set_off_dt_strings(fdt, fdt_off_dt_strings(fdt) + delta); | ||
120 | return 0; | ||
121 | } | ||
122 | |||
123 | static int _fdt_splice_struct(void *fdt, void *p, | ||
124 | int oldlen, int newlen) | ||
125 | { | ||
126 | int delta = newlen - oldlen; | ||
127 | int err; | ||
128 | |||
129 | if ((err = _fdt_splice(fdt, p, oldlen, newlen))) | ||
130 | return err; | ||
131 | |||
132 | fdt_set_size_dt_struct(fdt, fdt_size_dt_struct(fdt) + delta); | ||
133 | fdt_set_off_dt_strings(fdt, fdt_off_dt_strings(fdt) + delta); | ||
134 | return 0; | ||
135 | } | ||
136 | |||
137 | static int _fdt_splice_string(void *fdt, int newlen) | ||
138 | { | ||
139 | void *p = (char *)fdt | ||
140 | + fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt); | ||
141 | int err; | ||
142 | |||
143 | if ((err = _fdt_splice(fdt, p, 0, newlen))) | ||
144 | return err; | ||
145 | |||
146 | fdt_set_size_dt_strings(fdt, fdt_size_dt_strings(fdt) + newlen); | ||
147 | return 0; | ||
148 | } | ||
149 | |||
150 | static int _fdt_find_add_string(void *fdt, const char *s) | ||
151 | { | ||
152 | char *strtab = (char *)fdt + fdt_off_dt_strings(fdt); | ||
153 | const char *p; | ||
154 | char *new; | ||
155 | int len = strlen(s) + 1; | ||
156 | int err; | ||
157 | |||
158 | p = _fdt_find_string(strtab, fdt_size_dt_strings(fdt), s); | ||
159 | if (p) | ||
160 | /* found it */ | ||
161 | return (p - strtab); | ||
162 | |||
163 | new = strtab + fdt_size_dt_strings(fdt); | ||
164 | err = _fdt_splice_string(fdt, len); | ||
165 | if (err) | ||
166 | return err; | ||
167 | |||
168 | memcpy(new, s, len); | ||
169 | return (new - strtab); | ||
170 | } | ||
171 | |||
172 | int fdt_add_mem_rsv(void *fdt, uint64_t address, uint64_t size) | ||
173 | { | ||
174 | struct fdt_reserve_entry *re; | ||
175 | int err; | ||
176 | |||
177 | FDT_RW_CHECK_HEADER(fdt); | ||
178 | |||
179 | re = _fdt_mem_rsv_w(fdt, fdt_num_mem_rsv(fdt)); | ||
180 | err = _fdt_splice_mem_rsv(fdt, re, 0, 1); | ||
181 | if (err) | ||
182 | return err; | ||
183 | |||
184 | re->address = cpu_to_fdt64(address); | ||
185 | re->size = cpu_to_fdt64(size); | ||
186 | return 0; | ||
187 | } | ||
188 | |||
189 | int fdt_del_mem_rsv(void *fdt, int n) | ||
190 | { | ||
191 | struct fdt_reserve_entry *re = _fdt_mem_rsv_w(fdt, n); | ||
192 | int err; | ||
193 | |||
194 | FDT_RW_CHECK_HEADER(fdt); | ||
195 | |||
196 | if (n >= fdt_num_mem_rsv(fdt)) | ||
197 | return -FDT_ERR_NOTFOUND; | ||
198 | |||
199 | err = _fdt_splice_mem_rsv(fdt, re, 1, 0); | ||
200 | if (err) | ||
201 | return err; | ||
202 | return 0; | ||
203 | } | ||
204 | |||
205 | static int _fdt_resize_property(void *fdt, int nodeoffset, const char *name, | ||
206 | int len, struct fdt_property **prop) | ||
207 | { | ||
208 | int oldlen; | ||
209 | int err; | ||
210 | |||
211 | *prop = fdt_get_property_w(fdt, nodeoffset, name, &oldlen); | ||
212 | if (! (*prop)) | ||
213 | return oldlen; | ||
214 | |||
215 | if ((err = _fdt_splice_struct(fdt, (*prop)->data, FDT_TAGALIGN(oldlen), | ||
216 | FDT_TAGALIGN(len)))) | ||
217 | return err; | ||
218 | |||
219 | (*prop)->len = cpu_to_fdt32(len); | ||
220 | return 0; | ||
221 | } | ||
222 | |||
223 | static int _fdt_add_property(void *fdt, int nodeoffset, const char *name, | ||
224 | int len, struct fdt_property **prop) | ||
225 | { | ||
226 | int proplen; | ||
227 | int nextoffset; | ||
228 | int namestroff; | ||
229 | int err; | ||
230 | |||
231 | if ((nextoffset = _fdt_check_node_offset(fdt, nodeoffset)) < 0) | ||
232 | return nextoffset; | ||
233 | |||
234 | namestroff = _fdt_find_add_string(fdt, name); | ||
235 | if (namestroff < 0) | ||
236 | return namestroff; | ||
237 | |||
238 | *prop = _fdt_offset_ptr_w(fdt, nextoffset); | ||
239 | proplen = sizeof(**prop) + FDT_TAGALIGN(len); | ||
240 | |||
241 | err = _fdt_splice_struct(fdt, *prop, 0, proplen); | ||
242 | if (err) | ||
243 | return err; | ||
244 | |||
245 | (*prop)->tag = cpu_to_fdt32(FDT_PROP); | ||
246 | (*prop)->nameoff = cpu_to_fdt32(namestroff); | ||
247 | (*prop)->len = cpu_to_fdt32(len); | ||
248 | return 0; | ||
249 | } | ||
250 | |||
251 | int fdt_set_name(void *fdt, int nodeoffset, const char *name) | ||
252 | { | ||
253 | char *namep; | ||
254 | int oldlen, newlen; | ||
255 | int err; | ||
256 | |||
257 | FDT_RW_CHECK_HEADER(fdt); | ||
258 | |||
259 | namep = (char *)(uintptr_t)fdt_get_name(fdt, nodeoffset, &oldlen); | ||
260 | if (!namep) | ||
261 | return oldlen; | ||
262 | |||
263 | newlen = strlen(name); | ||
264 | |||
265 | err = _fdt_splice_struct(fdt, namep, FDT_TAGALIGN(oldlen+1), | ||
266 | FDT_TAGALIGN(newlen+1)); | ||
267 | if (err) | ||
268 | return err; | ||
269 | |||
270 | memcpy(namep, name, newlen+1); | ||
271 | return 0; | ||
272 | } | ||
273 | |||
274 | int fdt_setprop(void *fdt, int nodeoffset, const char *name, | ||
275 | const void *val, int len) | ||
276 | { | ||
277 | struct fdt_property *prop; | ||
278 | int err; | ||
279 | |||
280 | FDT_RW_CHECK_HEADER(fdt); | ||
281 | |||
282 | err = _fdt_resize_property(fdt, nodeoffset, name, len, &prop); | ||
283 | if (err == -FDT_ERR_NOTFOUND) | ||
284 | err = _fdt_add_property(fdt, nodeoffset, name, len, &prop); | ||
285 | if (err) | ||
286 | return err; | ||
287 | |||
288 | memcpy(prop->data, val, len); | ||
289 | return 0; | ||
290 | } | ||
291 | |||
292 | int fdt_delprop(void *fdt, int nodeoffset, const char *name) | ||
293 | { | ||
294 | struct fdt_property *prop; | ||
295 | int len, proplen; | ||
296 | |||
297 | FDT_RW_CHECK_HEADER(fdt); | ||
298 | |||
299 | prop = fdt_get_property_w(fdt, nodeoffset, name, &len); | ||
300 | if (! prop) | ||
301 | return len; | ||
302 | |||
303 | proplen = sizeof(*prop) + FDT_TAGALIGN(len); | ||
304 | return _fdt_splice_struct(fdt, prop, proplen, 0); | ||
305 | } | ||
306 | |||
307 | int fdt_add_subnode_namelen(void *fdt, int parentoffset, | ||
308 | const char *name, int namelen) | ||
309 | { | ||
310 | struct fdt_node_header *nh; | ||
311 | int offset, nextoffset; | ||
312 | int nodelen; | ||
313 | int err; | ||
314 | uint32_t tag; | ||
315 | uint32_t *endtag; | ||
316 | |||
317 | FDT_RW_CHECK_HEADER(fdt); | ||
318 | |||
319 | offset = fdt_subnode_offset_namelen(fdt, parentoffset, name, namelen); | ||
320 | if (offset >= 0) | ||
321 | return -FDT_ERR_EXISTS; | ||
322 | else if (offset != -FDT_ERR_NOTFOUND) | ||
323 | return offset; | ||
324 | |||
325 | /* Try to place the new node after the parent's properties */ | ||
326 | fdt_next_tag(fdt, parentoffset, &nextoffset); /* skip the BEGIN_NODE */ | ||
327 | do { | ||
328 | offset = nextoffset; | ||
329 | tag = fdt_next_tag(fdt, offset, &nextoffset); | ||
330 | } while ((tag == FDT_PROP) || (tag == FDT_NOP)); | ||
331 | |||
332 | nh = _fdt_offset_ptr_w(fdt, offset); | ||
333 | nodelen = sizeof(*nh) + FDT_TAGALIGN(namelen+1) + FDT_TAGSIZE; | ||
334 | |||
335 | err = _fdt_splice_struct(fdt, nh, 0, nodelen); | ||
336 | if (err) | ||
337 | return err; | ||
338 | |||
339 | nh->tag = cpu_to_fdt32(FDT_BEGIN_NODE); | ||
340 | memset(nh->name, 0, FDT_TAGALIGN(namelen+1)); | ||
341 | memcpy(nh->name, name, namelen); | ||
342 | endtag = (uint32_t *)((char *)nh + nodelen - FDT_TAGSIZE); | ||
343 | *endtag = cpu_to_fdt32(FDT_END_NODE); | ||
344 | |||
345 | return offset; | ||
346 | } | ||
347 | |||
348 | int fdt_add_subnode(void *fdt, int parentoffset, const char *name) | ||
349 | { | ||
350 | return fdt_add_subnode_namelen(fdt, parentoffset, name, strlen(name)); | ||
351 | } | ||
352 | |||
353 | int fdt_del_node(void *fdt, int nodeoffset) | ||
354 | { | ||
355 | int endoffset; | ||
356 | |||
357 | FDT_RW_CHECK_HEADER(fdt); | ||
358 | |||
359 | endoffset = _fdt_node_end_offset(fdt, nodeoffset); | ||
360 | if (endoffset < 0) | ||
361 | return endoffset; | ||
362 | |||
363 | return _fdt_splice_struct(fdt, _fdt_offset_ptr_w(fdt, nodeoffset), | ||
364 | endoffset - nodeoffset, 0); | ||
365 | } | ||
366 | |||
367 | static void _fdt_packblocks(const char *old, char *new, | ||
368 | int mem_rsv_size, int struct_size) | ||
369 | { | ||
370 | int mem_rsv_off, struct_off, strings_off; | ||
371 | |||
372 | mem_rsv_off = FDT_ALIGN(sizeof(struct fdt_header), 8); | ||
373 | struct_off = mem_rsv_off + mem_rsv_size; | ||
374 | strings_off = struct_off + struct_size; | ||
375 | |||
376 | memmove(new + mem_rsv_off, old + fdt_off_mem_rsvmap(old), mem_rsv_size); | ||
377 | fdt_set_off_mem_rsvmap(new, mem_rsv_off); | ||
378 | |||
379 | memmove(new + struct_off, old + fdt_off_dt_struct(old), struct_size); | ||
380 | fdt_set_off_dt_struct(new, struct_off); | ||
381 | fdt_set_size_dt_struct(new, struct_size); | ||
382 | |||
383 | memmove(new + strings_off, old + fdt_off_dt_strings(old), | ||
384 | fdt_size_dt_strings(old)); | ||
385 | fdt_set_off_dt_strings(new, strings_off); | ||
386 | fdt_set_size_dt_strings(new, fdt_size_dt_strings(old)); | ||
387 | } | ||
388 | |||
389 | int fdt_open_into(const void *fdt, void *buf, int bufsize) | ||
390 | { | ||
391 | int err; | ||
392 | int mem_rsv_size, struct_size; | ||
393 | int newsize; | ||
394 | const char *fdtstart = fdt; | ||
395 | const char *fdtend = fdtstart + fdt_totalsize(fdt); | ||
396 | char *tmp; | ||
397 | |||
398 | FDT_CHECK_HEADER(fdt); | ||
399 | |||
400 | mem_rsv_size = (fdt_num_mem_rsv(fdt)+1) | ||
401 | * sizeof(struct fdt_reserve_entry); | ||
402 | |||
403 | if (fdt_version(fdt) >= 17) { | ||
404 | struct_size = fdt_size_dt_struct(fdt); | ||
405 | } else { | ||
406 | struct_size = 0; | ||
407 | while (fdt_next_tag(fdt, struct_size, &struct_size) != FDT_END) | ||
408 | ; | ||
409 | } | ||
410 | |||
411 | if (!_fdt_blocks_misordered(fdt, mem_rsv_size, struct_size)) { | ||
412 | /* no further work necessary */ | ||
413 | err = fdt_move(fdt, buf, bufsize); | ||
414 | if (err) | ||
415 | return err; | ||
416 | fdt_set_version(buf, 17); | ||
417 | fdt_set_size_dt_struct(buf, struct_size); | ||
418 | fdt_set_totalsize(buf, bufsize); | ||
419 | return 0; | ||
420 | } | ||
421 | |||
422 | /* Need to reorder */ | ||
423 | newsize = FDT_ALIGN(sizeof(struct fdt_header), 8) + mem_rsv_size | ||
424 | + struct_size + fdt_size_dt_strings(fdt); | ||
425 | |||
426 | if (bufsize < newsize) | ||
427 | return -FDT_ERR_NOSPACE; | ||
428 | |||
429 | /* First attempt to build converted tree at beginning of buffer */ | ||
430 | tmp = buf; | ||
431 | /* But if that overlaps with the old tree... */ | ||
432 | if (((tmp + newsize) > fdtstart) && (tmp < fdtend)) { | ||
433 | /* Try right after the old tree instead */ | ||
434 | tmp = (char *)(uintptr_t)fdtend; | ||
435 | if ((tmp + newsize) > ((char *)buf + bufsize)) | ||
436 | return -FDT_ERR_NOSPACE; | ||
437 | } | ||
438 | |||
439 | _fdt_packblocks(fdt, tmp, mem_rsv_size, struct_size); | ||
440 | memmove(buf, tmp, newsize); | ||
441 | |||
442 | fdt_set_magic(buf, FDT_MAGIC); | ||
443 | fdt_set_totalsize(buf, bufsize); | ||
444 | fdt_set_version(buf, 17); | ||
445 | fdt_set_last_comp_version(buf, 16); | ||
446 | fdt_set_boot_cpuid_phys(buf, fdt_boot_cpuid_phys(fdt)); | ||
447 | |||
448 | return 0; | ||
449 | } | ||
450 | |||
451 | int fdt_pack(void *fdt) | ||
452 | { | ||
453 | int mem_rsv_size; | ||
454 | |||
455 | FDT_RW_CHECK_HEADER(fdt); | ||
456 | |||
457 | mem_rsv_size = (fdt_num_mem_rsv(fdt)+1) | ||
458 | * sizeof(struct fdt_reserve_entry); | ||
459 | _fdt_packblocks(fdt, fdt, mem_rsv_size, fdt_size_dt_struct(fdt)); | ||
460 | fdt_set_totalsize(fdt, _fdt_data_size(fdt)); | ||
461 | |||
462 | return 0; | ||
463 | } | ||
diff --git a/arch/powerpc/boot/libfdt/fdt_strerror.c b/arch/powerpc/boot/libfdt/fdt_strerror.c deleted file mode 100644 index e6c3ceee8c58..000000000000 --- a/arch/powerpc/boot/libfdt/fdt_strerror.c +++ /dev/null | |||
@@ -1,96 +0,0 @@ | |||
1 | /* | ||
2 | * libfdt - Flat Device Tree manipulation | ||
3 | * Copyright (C) 2006 David Gibson, IBM Corporation. | ||
4 | * | ||
5 | * libfdt is dual licensed: you can use it either under the terms of | ||
6 | * the GPL, or the BSD license, at your option. | ||
7 | * | ||
8 | * a) This library is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License as | ||
10 | * published by the Free Software Foundation; either version 2 of the | ||
11 | * License, or (at your option) any later version. | ||
12 | * | ||
13 | * This library is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | * | ||
18 | * You should have received a copy of the GNU General Public | ||
19 | * License along with this library; if not, write to the Free | ||
20 | * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, | ||
21 | * MA 02110-1301 USA | ||
22 | * | ||
23 | * Alternatively, | ||
24 | * | ||
25 | * b) Redistribution and use in source and binary forms, with or | ||
26 | * without modification, are permitted provided that the following | ||
27 | * conditions are met: | ||
28 | * | ||
29 | * 1. Redistributions of source code must retain the above | ||
30 | * copyright notice, this list of conditions and the following | ||
31 | * disclaimer. | ||
32 | * 2. Redistributions in binary form must reproduce the above | ||
33 | * copyright notice, this list of conditions and the following | ||
34 | * disclaimer in the documentation and/or other materials | ||
35 | * provided with the distribution. | ||
36 | * | ||
37 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND | ||
38 | * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, | ||
39 | * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | ||
40 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | ||
41 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR | ||
42 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | ||
43 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | ||
44 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | ||
45 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | ||
46 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | ||
47 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR | ||
48 | * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, | ||
49 | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
50 | */ | ||
51 | #include "libfdt_env.h" | ||
52 | |||
53 | #include <fdt.h> | ||
54 | #include <libfdt.h> | ||
55 | |||
56 | #include "libfdt_internal.h" | ||
57 | |||
58 | struct fdt_errtabent { | ||
59 | const char *str; | ||
60 | }; | ||
61 | |||
62 | #define FDT_ERRTABENT(val) \ | ||
63 | [(val)] = { .str = #val, } | ||
64 | |||
65 | static struct fdt_errtabent fdt_errtable[] = { | ||
66 | FDT_ERRTABENT(FDT_ERR_NOTFOUND), | ||
67 | FDT_ERRTABENT(FDT_ERR_EXISTS), | ||
68 | FDT_ERRTABENT(FDT_ERR_NOSPACE), | ||
69 | |||
70 | FDT_ERRTABENT(FDT_ERR_BADOFFSET), | ||
71 | FDT_ERRTABENT(FDT_ERR_BADPATH), | ||
72 | FDT_ERRTABENT(FDT_ERR_BADSTATE), | ||
73 | |||
74 | FDT_ERRTABENT(FDT_ERR_TRUNCATED), | ||
75 | FDT_ERRTABENT(FDT_ERR_BADMAGIC), | ||
76 | FDT_ERRTABENT(FDT_ERR_BADVERSION), | ||
77 | FDT_ERRTABENT(FDT_ERR_BADSTRUCTURE), | ||
78 | FDT_ERRTABENT(FDT_ERR_BADLAYOUT), | ||
79 | }; | ||
80 | #define FDT_ERRTABSIZE (sizeof(fdt_errtable) / sizeof(fdt_errtable[0])) | ||
81 | |||
82 | const char *fdt_strerror(int errval) | ||
83 | { | ||
84 | if (errval > 0) | ||
85 | return "<valid offset/length>"; | ||
86 | else if (errval == 0) | ||
87 | return "<no error>"; | ||
88 | else if (errval > -FDT_ERRTABSIZE) { | ||
89 | const char *s = fdt_errtable[-errval].str; | ||
90 | |||
91 | if (s) | ||
92 | return s; | ||
93 | } | ||
94 | |||
95 | return "<unknown error>"; | ||
96 | } | ||
diff --git a/arch/powerpc/boot/libfdt/fdt_sw.c b/arch/powerpc/boot/libfdt/fdt_sw.c deleted file mode 100644 index 698329e0ccaf..000000000000 --- a/arch/powerpc/boot/libfdt/fdt_sw.c +++ /dev/null | |||
@@ -1,257 +0,0 @@ | |||
1 | /* | ||
2 | * libfdt - Flat Device Tree manipulation | ||
3 | * Copyright (C) 2006 David Gibson, IBM Corporation. | ||
4 | * | ||
5 | * libfdt is dual licensed: you can use it either under the terms of | ||
6 | * the GPL, or the BSD license, at your option. | ||
7 | * | ||
8 | * a) This library is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License as | ||
10 | * published by the Free Software Foundation; either version 2 of the | ||
11 | * License, or (at your option) any later version. | ||
12 | * | ||
13 | * This library is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | * | ||
18 | * You should have received a copy of the GNU General Public | ||
19 | * License along with this library; if not, write to the Free | ||
20 | * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, | ||
21 | * MA 02110-1301 USA | ||
22 | * | ||
23 | * Alternatively, | ||
24 | * | ||
25 | * b) Redistribution and use in source and binary forms, with or | ||
26 | * without modification, are permitted provided that the following | ||
27 | * conditions are met: | ||
28 | * | ||
29 | * 1. Redistributions of source code must retain the above | ||
30 | * copyright notice, this list of conditions and the following | ||
31 | * disclaimer. | ||
32 | * 2. Redistributions in binary form must reproduce the above | ||
33 | * copyright notice, this list of conditions and the following | ||
34 | * disclaimer in the documentation and/or other materials | ||
35 | * provided with the distribution. | ||
36 | * | ||
37 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND | ||
38 | * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, | ||
39 | * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | ||
40 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | ||
41 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR | ||
42 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | ||
43 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | ||
44 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | ||
45 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | ||
46 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | ||
47 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR | ||
48 | * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, | ||
49 | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
50 | */ | ||
51 | #include "libfdt_env.h" | ||
52 | |||
53 | #include <fdt.h> | ||
54 | #include <libfdt.h> | ||
55 | |||
56 | #include "libfdt_internal.h" | ||
57 | |||
58 | static int _fdt_sw_check_header(void *fdt) | ||
59 | { | ||
60 | if (fdt_magic(fdt) != FDT_SW_MAGIC) | ||
61 | return -FDT_ERR_BADMAGIC; | ||
62 | /* FIXME: should check more details about the header state */ | ||
63 | return 0; | ||
64 | } | ||
65 | |||
66 | #define FDT_SW_CHECK_HEADER(fdt) \ | ||
67 | { \ | ||
68 | int err; \ | ||
69 | if ((err = _fdt_sw_check_header(fdt)) != 0) \ | ||
70 | return err; \ | ||
71 | } | ||
72 | |||
73 | static void *_fdt_grab_space(void *fdt, int len) | ||
74 | { | ||
75 | int offset = fdt_size_dt_struct(fdt); | ||
76 | int spaceleft; | ||
77 | |||
78 | spaceleft = fdt_totalsize(fdt) - fdt_off_dt_struct(fdt) | ||
79 | - fdt_size_dt_strings(fdt); | ||
80 | |||
81 | if ((offset + len < offset) || (offset + len > spaceleft)) | ||
82 | return NULL; | ||
83 | |||
84 | fdt_set_size_dt_struct(fdt, offset + len); | ||
85 | return fdt_offset_ptr_w(fdt, offset, len); | ||
86 | } | ||
87 | |||
88 | int fdt_create(void *buf, int bufsize) | ||
89 | { | ||
90 | void *fdt = buf; | ||
91 | |||
92 | if (bufsize < sizeof(struct fdt_header)) | ||
93 | return -FDT_ERR_NOSPACE; | ||
94 | |||
95 | memset(buf, 0, bufsize); | ||
96 | |||
97 | fdt_set_magic(fdt, FDT_SW_MAGIC); | ||
98 | fdt_set_version(fdt, FDT_LAST_SUPPORTED_VERSION); | ||
99 | fdt_set_last_comp_version(fdt, FDT_FIRST_SUPPORTED_VERSION); | ||
100 | fdt_set_totalsize(fdt, bufsize); | ||
101 | |||
102 | fdt_set_off_mem_rsvmap(fdt, FDT_ALIGN(sizeof(struct fdt_header), | ||
103 | sizeof(struct fdt_reserve_entry))); | ||
104 | fdt_set_off_dt_struct(fdt, fdt_off_mem_rsvmap(fdt)); | ||
105 | fdt_set_off_dt_strings(fdt, bufsize); | ||
106 | |||
107 | return 0; | ||
108 | } | ||
109 | |||
110 | int fdt_add_reservemap_entry(void *fdt, uint64_t addr, uint64_t size) | ||
111 | { | ||
112 | struct fdt_reserve_entry *re; | ||
113 | int offset; | ||
114 | |||
115 | FDT_SW_CHECK_HEADER(fdt); | ||
116 | |||
117 | if (fdt_size_dt_struct(fdt)) | ||
118 | return -FDT_ERR_BADSTATE; | ||
119 | |||
120 | offset = fdt_off_dt_struct(fdt); | ||
121 | if ((offset + sizeof(*re)) > fdt_totalsize(fdt)) | ||
122 | return -FDT_ERR_NOSPACE; | ||
123 | |||
124 | re = (struct fdt_reserve_entry *)((char *)fdt + offset); | ||
125 | re->address = cpu_to_fdt64(addr); | ||
126 | re->size = cpu_to_fdt64(size); | ||
127 | |||
128 | fdt_set_off_dt_struct(fdt, offset + sizeof(*re)); | ||
129 | |||
130 | return 0; | ||
131 | } | ||
132 | |||
133 | int fdt_finish_reservemap(void *fdt) | ||
134 | { | ||
135 | return fdt_add_reservemap_entry(fdt, 0, 0); | ||
136 | } | ||
137 | |||
138 | int fdt_begin_node(void *fdt, const char *name) | ||
139 | { | ||
140 | struct fdt_node_header *nh; | ||
141 | int namelen = strlen(name) + 1; | ||
142 | |||
143 | FDT_SW_CHECK_HEADER(fdt); | ||
144 | |||
145 | nh = _fdt_grab_space(fdt, sizeof(*nh) + FDT_TAGALIGN(namelen)); | ||
146 | if (! nh) | ||
147 | return -FDT_ERR_NOSPACE; | ||
148 | |||
149 | nh->tag = cpu_to_fdt32(FDT_BEGIN_NODE); | ||
150 | memcpy(nh->name, name, namelen); | ||
151 | return 0; | ||
152 | } | ||
153 | |||
154 | int fdt_end_node(void *fdt) | ||
155 | { | ||
156 | uint32_t *en; | ||
157 | |||
158 | FDT_SW_CHECK_HEADER(fdt); | ||
159 | |||
160 | en = _fdt_grab_space(fdt, FDT_TAGSIZE); | ||
161 | if (! en) | ||
162 | return -FDT_ERR_NOSPACE; | ||
163 | |||
164 | *en = cpu_to_fdt32(FDT_END_NODE); | ||
165 | return 0; | ||
166 | } | ||
167 | |||
168 | static int _fdt_find_add_string(void *fdt, const char *s) | ||
169 | { | ||
170 | char *strtab = (char *)fdt + fdt_totalsize(fdt); | ||
171 | const char *p; | ||
172 | int strtabsize = fdt_size_dt_strings(fdt); | ||
173 | int len = strlen(s) + 1; | ||
174 | int struct_top, offset; | ||
175 | |||
176 | p = _fdt_find_string(strtab - strtabsize, strtabsize, s); | ||
177 | if (p) | ||
178 | return p - strtab; | ||
179 | |||
180 | /* Add it */ | ||
181 | offset = -strtabsize - len; | ||
182 | struct_top = fdt_off_dt_struct(fdt) + fdt_size_dt_struct(fdt); | ||
183 | if (fdt_totalsize(fdt) + offset < struct_top) | ||
184 | return 0; /* no more room :( */ | ||
185 | |||
186 | memcpy(strtab + offset, s, len); | ||
187 | fdt_set_size_dt_strings(fdt, strtabsize + len); | ||
188 | return offset; | ||
189 | } | ||
190 | |||
191 | int fdt_property(void *fdt, const char *name, const void *val, int len) | ||
192 | { | ||
193 | struct fdt_property *prop; | ||
194 | int nameoff; | ||
195 | |||
196 | FDT_SW_CHECK_HEADER(fdt); | ||
197 | |||
198 | nameoff = _fdt_find_add_string(fdt, name); | ||
199 | if (nameoff == 0) | ||
200 | return -FDT_ERR_NOSPACE; | ||
201 | |||
202 | prop = _fdt_grab_space(fdt, sizeof(*prop) + FDT_TAGALIGN(len)); | ||
203 | if (! prop) | ||
204 | return -FDT_ERR_NOSPACE; | ||
205 | |||
206 | prop->tag = cpu_to_fdt32(FDT_PROP); | ||
207 | prop->nameoff = cpu_to_fdt32(nameoff); | ||
208 | prop->len = cpu_to_fdt32(len); | ||
209 | memcpy(prop->data, val, len); | ||
210 | return 0; | ||
211 | } | ||
212 | |||
213 | int fdt_finish(void *fdt) | ||
214 | { | ||
215 | char *p = (char *)fdt; | ||
216 | uint32_t *end; | ||
217 | int oldstroffset, newstroffset; | ||
218 | uint32_t tag; | ||
219 | int offset, nextoffset; | ||
220 | |||
221 | FDT_SW_CHECK_HEADER(fdt); | ||
222 | |||
223 | /* Add terminator */ | ||
224 | end = _fdt_grab_space(fdt, sizeof(*end)); | ||
225 | if (! end) | ||
226 | return -FDT_ERR_NOSPACE; | ||
227 | *end = cpu_to_fdt32(FDT_END); | ||
228 | |||
229 | /* Relocate the string table */ | ||
230 | oldstroffset = fdt_totalsize(fdt) - fdt_size_dt_strings(fdt); | ||
231 | newstroffset = fdt_off_dt_struct(fdt) + fdt_size_dt_struct(fdt); | ||
232 | memmove(p + newstroffset, p + oldstroffset, fdt_size_dt_strings(fdt)); | ||
233 | fdt_set_off_dt_strings(fdt, newstroffset); | ||
234 | |||
235 | /* Walk the structure, correcting string offsets */ | ||
236 | offset = 0; | ||
237 | while ((tag = fdt_next_tag(fdt, offset, &nextoffset)) != FDT_END) { | ||
238 | if (tag == FDT_PROP) { | ||
239 | struct fdt_property *prop = | ||
240 | fdt_offset_ptr_w(fdt, offset, sizeof(*prop)); | ||
241 | int nameoff; | ||
242 | |||
243 | if (! prop) | ||
244 | return -FDT_ERR_BADSTRUCTURE; | ||
245 | |||
246 | nameoff = fdt32_to_cpu(prop->nameoff); | ||
247 | nameoff += fdt_size_dt_strings(fdt); | ||
248 | prop->nameoff = cpu_to_fdt32(nameoff); | ||
249 | } | ||
250 | offset = nextoffset; | ||
251 | } | ||
252 | |||
253 | /* Finally, adjust the header */ | ||
254 | fdt_set_totalsize(fdt, newstroffset + fdt_size_dt_strings(fdt)); | ||
255 | fdt_set_magic(fdt, FDT_MAGIC); | ||
256 | return 0; | ||
257 | } | ||
diff --git a/arch/powerpc/boot/libfdt/fdt_wip.c b/arch/powerpc/boot/libfdt/fdt_wip.c deleted file mode 100644 index a4652c6e787e..000000000000 --- a/arch/powerpc/boot/libfdt/fdt_wip.c +++ /dev/null | |||
@@ -1,145 +0,0 @@ | |||
1 | /* | ||
2 | * libfdt - Flat Device Tree manipulation | ||
3 | * Copyright (C) 2006 David Gibson, IBM Corporation. | ||
4 | * | ||
5 | * libfdt is dual licensed: you can use it either under the terms of | ||
6 | * the GPL, or the BSD license, at your option. | ||
7 | * | ||
8 | * a) This library is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License as | ||
10 | * published by the Free Software Foundation; either version 2 of the | ||
11 | * License, or (at your option) any later version. | ||
12 | * | ||
13 | * This library is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | * | ||
18 | * You should have received a copy of the GNU General Public | ||
19 | * License along with this library; if not, write to the Free | ||
20 | * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, | ||
21 | * MA 02110-1301 USA | ||
22 | * | ||
23 | * Alternatively, | ||
24 | * | ||
25 | * b) Redistribution and use in source and binary forms, with or | ||
26 | * without modification, are permitted provided that the following | ||
27 | * conditions are met: | ||
28 | * | ||
29 | * 1. Redistributions of source code must retain the above | ||
30 | * copyright notice, this list of conditions and the following | ||
31 | * disclaimer. | ||
32 | * 2. Redistributions in binary form must reproduce the above | ||
33 | * copyright notice, this list of conditions and the following | ||
34 | * disclaimer in the documentation and/or other materials | ||
35 | * provided with the distribution. | ||
36 | * | ||
37 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND | ||
38 | * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, | ||
39 | * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | ||
40 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | ||
41 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR | ||
42 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | ||
43 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | ||
44 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | ||
45 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | ||
46 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | ||
47 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR | ||
48 | * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, | ||
49 | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
50 | */ | ||
51 | #include "libfdt_env.h" | ||
52 | |||
53 | #include <fdt.h> | ||
54 | #include <libfdt.h> | ||
55 | |||
56 | #include "libfdt_internal.h" | ||
57 | |||
58 | int fdt_setprop_inplace(void *fdt, int nodeoffset, const char *name, | ||
59 | const void *val, int len) | ||
60 | { | ||
61 | void *propval; | ||
62 | int proplen; | ||
63 | |||
64 | propval = fdt_getprop_w(fdt, nodeoffset, name, &proplen); | ||
65 | if (! propval) | ||
66 | return proplen; | ||
67 | |||
68 | if (proplen != len) | ||
69 | return -FDT_ERR_NOSPACE; | ||
70 | |||
71 | memcpy(propval, val, len); | ||
72 | return 0; | ||
73 | } | ||
74 | |||
75 | static void _fdt_nop_region(void *start, int len) | ||
76 | { | ||
77 | uint32_t *p; | ||
78 | |||
79 | for (p = start; (char *)p < ((char *)start + len); p++) | ||
80 | *p = cpu_to_fdt32(FDT_NOP); | ||
81 | } | ||
82 | |||
83 | int fdt_nop_property(void *fdt, int nodeoffset, const char *name) | ||
84 | { | ||
85 | struct fdt_property *prop; | ||
86 | int len; | ||
87 | |||
88 | prop = fdt_get_property_w(fdt, nodeoffset, name, &len); | ||
89 | if (! prop) | ||
90 | return len; | ||
91 | |||
92 | _fdt_nop_region(prop, len + sizeof(*prop)); | ||
93 | |||
94 | return 0; | ||
95 | } | ||
96 | |||
97 | int _fdt_node_end_offset(void *fdt, int nodeoffset) | ||
98 | { | ||
99 | int level = 0; | ||
100 | uint32_t tag; | ||
101 | int offset, nextoffset; | ||
102 | |||
103 | tag = fdt_next_tag(fdt, nodeoffset, &nextoffset); | ||
104 | if (tag != FDT_BEGIN_NODE) | ||
105 | return -FDT_ERR_BADOFFSET; | ||
106 | do { | ||
107 | offset = nextoffset; | ||
108 | tag = fdt_next_tag(fdt, offset, &nextoffset); | ||
109 | |||
110 | switch (tag) { | ||
111 | case FDT_END: | ||
112 | return offset; | ||
113 | |||
114 | case FDT_BEGIN_NODE: | ||
115 | level++; | ||
116 | break; | ||
117 | |||
118 | case FDT_END_NODE: | ||
119 | level--; | ||
120 | break; | ||
121 | |||
122 | case FDT_PROP: | ||
123 | case FDT_NOP: | ||
124 | break; | ||
125 | |||
126 | default: | ||
127 | return -FDT_ERR_BADSTRUCTURE; | ||
128 | } | ||
129 | } while (level >= 0); | ||
130 | |||
131 | return nextoffset; | ||
132 | } | ||
133 | |||
134 | int fdt_nop_node(void *fdt, int nodeoffset) | ||
135 | { | ||
136 | int endoffset; | ||
137 | |||
138 | endoffset = _fdt_node_end_offset(fdt, nodeoffset); | ||
139 | if (endoffset < 0) | ||
140 | return endoffset; | ||
141 | |||
142 | _fdt_nop_region(fdt_offset_ptr_w(fdt, nodeoffset, 0), | ||
143 | endoffset - nodeoffset); | ||
144 | return 0; | ||
145 | } | ||
diff --git a/arch/powerpc/boot/libfdt/libfdt.h b/arch/powerpc/boot/libfdt/libfdt.h deleted file mode 100644 index ce80e4fb41b2..000000000000 --- a/arch/powerpc/boot/libfdt/libfdt.h +++ /dev/null | |||
@@ -1,1076 +0,0 @@ | |||
1 | #ifndef _LIBFDT_H | ||
2 | #define _LIBFDT_H | ||
3 | /* | ||
4 | * libfdt - Flat Device Tree manipulation | ||
5 | * Copyright (C) 2006 David Gibson, IBM Corporation. | ||
6 | * | ||
7 | * libfdt is dual licensed: you can use it either under the terms of | ||
8 | * the GPL, or the BSD license, at your option. | ||
9 | * | ||
10 | * a) This library is free software; you can redistribute it and/or | ||
11 | * modify it under the terms of the GNU General Public License as | ||
12 | * published by the Free Software Foundation; either version 2 of the | ||
13 | * License, or (at your option) any later version. | ||
14 | * | ||
15 | * This library is distributed in the hope that it will be useful, | ||
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
18 | * GNU General Public License for more details. | ||
19 | * | ||
20 | * You should have received a copy of the GNU General Public | ||
21 | * License along with this library; if not, write to the Free | ||
22 | * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, | ||
23 | * MA 02110-1301 USA | ||
24 | * | ||
25 | * Alternatively, | ||
26 | * | ||
27 | * b) Redistribution and use in source and binary forms, with or | ||
28 | * without modification, are permitted provided that the following | ||
29 | * conditions are met: | ||
30 | * | ||
31 | * 1. Redistributions of source code must retain the above | ||
32 | * copyright notice, this list of conditions and the following | ||
33 | * disclaimer. | ||
34 | * 2. Redistributions in binary form must reproduce the above | ||
35 | * copyright notice, this list of conditions and the following | ||
36 | * disclaimer in the documentation and/or other materials | ||
37 | * provided with the distribution. | ||
38 | * | ||
39 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND | ||
40 | * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, | ||
41 | * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | ||
42 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | ||
43 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR | ||
44 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | ||
45 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | ||
46 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | ||
47 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | ||
48 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | ||
49 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR | ||
50 | * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, | ||
51 | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
52 | */ | ||
53 | |||
54 | #include <libfdt_env.h> | ||
55 | #include <fdt.h> | ||
56 | |||
57 | #define FDT_FIRST_SUPPORTED_VERSION 0x10 | ||
58 | #define FDT_LAST_SUPPORTED_VERSION 0x11 | ||
59 | |||
60 | /* Error codes: informative error codes */ | ||
61 | #define FDT_ERR_NOTFOUND 1 | ||
62 | /* FDT_ERR_NOTFOUND: The requested node or property does not exist */ | ||
63 | #define FDT_ERR_EXISTS 2 | ||
64 | /* FDT_ERR_EXISTS: Attemped to create a node or property which | ||
65 | * already exists */ | ||
66 | #define FDT_ERR_NOSPACE 3 | ||
67 | /* FDT_ERR_NOSPACE: Operation needed to expand the device | ||
68 | * tree, but its buffer did not have sufficient space to | ||
69 | * contain the expanded tree. Use fdt_open_into() to move the | ||
70 | * device tree to a buffer with more space. */ | ||
71 | |||
72 | /* Error codes: codes for bad parameters */ | ||
73 | #define FDT_ERR_BADOFFSET 4 | ||
74 | /* FDT_ERR_BADOFFSET: Function was passed a structure block | ||
75 | * offset which is out-of-bounds, or which points to an | ||
76 | * unsuitable part of the structure for the operation. */ | ||
77 | #define FDT_ERR_BADPATH 5 | ||
78 | /* FDT_ERR_BADPATH: Function was passed a badly formatted path | ||
79 | * (e.g. missing a leading / for a function which requires an | ||
80 | * absolute path) */ | ||
81 | #define FDT_ERR_BADPHANDLE 6 | ||
82 | /* FDT_ERR_BADPHANDLE: Function was passed an invalid phandle | ||
83 | * value. phandle values of 0 and -1 are not permitted. */ | ||
84 | #define FDT_ERR_BADSTATE 7 | ||
85 | /* FDT_ERR_BADSTATE: Function was passed an incomplete device | ||
86 | * tree created by the sequential-write functions, which is | ||
87 | * not sufficiently complete for the requested operation. */ | ||
88 | |||
89 | /* Error codes: codes for bad device tree blobs */ | ||
90 | #define FDT_ERR_TRUNCATED 8 | ||
91 | /* FDT_ERR_TRUNCATED: Structure block of the given device tree | ||
92 | * ends without an FDT_END tag. */ | ||
93 | #define FDT_ERR_BADMAGIC 9 | ||
94 | /* FDT_ERR_BADMAGIC: Given "device tree" appears not to be a | ||
95 | * device tree at all - it is missing the flattened device | ||
96 | * tree magic number. */ | ||
97 | #define FDT_ERR_BADVERSION 10 | ||
98 | /* FDT_ERR_BADVERSION: Given device tree has a version which | ||
99 | * can't be handled by the requested operation. For | ||
100 | * read-write functions, this may mean that fdt_open_into() is | ||
101 | * required to convert the tree to the expected version. */ | ||
102 | #define FDT_ERR_BADSTRUCTURE 11 | ||
103 | /* FDT_ERR_BADSTRUCTURE: Given device tree has a corrupt | ||
104 | * structure block or other serious error (e.g. misnested | ||
105 | * nodes, or subnodes preceding properties). */ | ||
106 | #define FDT_ERR_BADLAYOUT 12 | ||
107 | /* FDT_ERR_BADLAYOUT: For read-write functions, the given | ||
108 | * device tree has it's sub-blocks in an order that the | ||
109 | * function can't handle (memory reserve map, then structure, | ||
110 | * then strings). Use fdt_open_into() to reorganize the tree | ||
111 | * into a form suitable for the read-write operations. */ | ||
112 | |||
113 | /* "Can't happen" error indicating a bug in libfdt */ | ||
114 | #define FDT_ERR_INTERNAL 13 | ||
115 | /* FDT_ERR_INTERNAL: libfdt has failed an internal assertion. | ||
116 | * Should never be returned, if it is, it indicates a bug in | ||
117 | * libfdt itself. */ | ||
118 | |||
119 | #define FDT_ERR_MAX 13 | ||
120 | |||
121 | /**********************************************************************/ | ||
122 | /* Low-level functions (you probably don't need these) */ | ||
123 | /**********************************************************************/ | ||
124 | |||
125 | const void *fdt_offset_ptr(const void *fdt, int offset, int checklen); | ||
126 | static inline void *fdt_offset_ptr_w(void *fdt, int offset, int checklen) | ||
127 | { | ||
128 | return (void *)(uintptr_t)fdt_offset_ptr(fdt, offset, checklen); | ||
129 | } | ||
130 | |||
131 | uint32_t fdt_next_tag(const void *fdt, int offset, int *nextoffset); | ||
132 | |||
133 | /**********************************************************************/ | ||
134 | /* Traversal functions */ | ||
135 | /**********************************************************************/ | ||
136 | |||
137 | int fdt_next_node(const void *fdt, int offset, int *depth); | ||
138 | |||
139 | /**********************************************************************/ | ||
140 | /* General functions */ | ||
141 | /**********************************************************************/ | ||
142 | |||
143 | #define fdt_get_header(fdt, field) \ | ||
144 | (fdt32_to_cpu(((const struct fdt_header *)(fdt))->field)) | ||
145 | #define fdt_magic(fdt) (fdt_get_header(fdt, magic)) | ||
146 | #define fdt_totalsize(fdt) (fdt_get_header(fdt, totalsize)) | ||
147 | #define fdt_off_dt_struct(fdt) (fdt_get_header(fdt, off_dt_struct)) | ||
148 | #define fdt_off_dt_strings(fdt) (fdt_get_header(fdt, off_dt_strings)) | ||
149 | #define fdt_off_mem_rsvmap(fdt) (fdt_get_header(fdt, off_mem_rsvmap)) | ||
150 | #define fdt_version(fdt) (fdt_get_header(fdt, version)) | ||
151 | #define fdt_last_comp_version(fdt) (fdt_get_header(fdt, last_comp_version)) | ||
152 | #define fdt_boot_cpuid_phys(fdt) (fdt_get_header(fdt, boot_cpuid_phys)) | ||
153 | #define fdt_size_dt_strings(fdt) (fdt_get_header(fdt, size_dt_strings)) | ||
154 | #define fdt_size_dt_struct(fdt) (fdt_get_header(fdt, size_dt_struct)) | ||
155 | |||
156 | #define __fdt_set_hdr(name) \ | ||
157 | static inline void fdt_set_##name(void *fdt, uint32_t val) \ | ||
158 | { \ | ||
159 | struct fdt_header *fdth = fdt; \ | ||
160 | fdth->name = cpu_to_fdt32(val); \ | ||
161 | } | ||
162 | __fdt_set_hdr(magic); | ||
163 | __fdt_set_hdr(totalsize); | ||
164 | __fdt_set_hdr(off_dt_struct); | ||
165 | __fdt_set_hdr(off_dt_strings); | ||
166 | __fdt_set_hdr(off_mem_rsvmap); | ||
167 | __fdt_set_hdr(version); | ||
168 | __fdt_set_hdr(last_comp_version); | ||
169 | __fdt_set_hdr(boot_cpuid_phys); | ||
170 | __fdt_set_hdr(size_dt_strings); | ||
171 | __fdt_set_hdr(size_dt_struct); | ||
172 | #undef __fdt_set_hdr | ||
173 | |||
174 | /** | ||
175 | * fdt_check_header - sanity check a device tree or possible device tree | ||
176 | * @fdt: pointer to data which might be a flattened device tree | ||
177 | * | ||
178 | * fdt_check_header() checks that the given buffer contains what | ||
179 | * appears to be a flattened device tree with sane information in its | ||
180 | * header. | ||
181 | * | ||
182 | * returns: | ||
183 | * 0, if the buffer appears to contain a valid device tree | ||
184 | * -FDT_ERR_BADMAGIC, | ||
185 | * -FDT_ERR_BADVERSION, | ||
186 | * -FDT_ERR_BADSTATE, standard meanings, as above | ||
187 | */ | ||
188 | int fdt_check_header(const void *fdt); | ||
189 | |||
190 | /** | ||
191 | * fdt_move - move a device tree around in memory | ||
192 | * @fdt: pointer to the device tree to move | ||
193 | * @buf: pointer to memory where the device is to be moved | ||
194 | * @bufsize: size of the memory space at buf | ||
195 | * | ||
196 | * fdt_move() relocates, if possible, the device tree blob located at | ||
197 | * fdt to the buffer at buf of size bufsize. The buffer may overlap | ||
198 | * with the existing device tree blob at fdt. Therefore, | ||
199 | * fdt_move(fdt, fdt, fdt_totalsize(fdt)) | ||
200 | * should always succeed. | ||
201 | * | ||
202 | * returns: | ||
203 | * 0, on success | ||
204 | * -FDT_ERR_NOSPACE, bufsize is insufficient to contain the device tree | ||
205 | * -FDT_ERR_BADMAGIC, | ||
206 | * -FDT_ERR_BADVERSION, | ||
207 | * -FDT_ERR_BADSTATE, standard meanings | ||
208 | */ | ||
209 | int fdt_move(const void *fdt, void *buf, int bufsize); | ||
210 | |||
211 | /**********************************************************************/ | ||
212 | /* Read-only functions */ | ||
213 | /**********************************************************************/ | ||
214 | |||
215 | /** | ||
216 | * fdt_string - retrieve a string from the strings block of a device tree | ||
217 | * @fdt: pointer to the device tree blob | ||
218 | * @stroffset: offset of the string within the strings block (native endian) | ||
219 | * | ||
220 | * fdt_string() retrieves a pointer to a single string from the | ||
221 | * strings block of the device tree blob at fdt. | ||
222 | * | ||
223 | * returns: | ||
224 | * a pointer to the string, on success | ||
225 | * NULL, if stroffset is out of bounds | ||
226 | */ | ||
227 | const char *fdt_string(const void *fdt, int stroffset); | ||
228 | |||
229 | /** | ||
230 | * fdt_num_mem_rsv - retrieve the number of memory reserve map entries | ||
231 | * @fdt: pointer to the device tree blob | ||
232 | * | ||
233 | * Returns the number of entries in the device tree blob's memory | ||
234 | * reservation map. This does not include the terminating 0,0 entry | ||
235 | * or any other (0,0) entries reserved for expansion. | ||
236 | * | ||
237 | * returns: | ||
238 | * the number of entries | ||
239 | */ | ||
240 | int fdt_num_mem_rsv(const void *fdt); | ||
241 | |||
242 | /** | ||
243 | * fdt_get_mem_rsv - retrieve one memory reserve map entry | ||
244 | * @fdt: pointer to the device tree blob | ||
245 | * @address, @size: pointers to 64-bit variables | ||
246 | * | ||
247 | * On success, *address and *size will contain the address and size of | ||
248 | * the n-th reserve map entry from the device tree blob, in | ||
249 | * native-endian format. | ||
250 | * | ||
251 | * returns: | ||
252 | * 0, on success | ||
253 | * -FDT_ERR_BADMAGIC, | ||
254 | * -FDT_ERR_BADVERSION, | ||
255 | * -FDT_ERR_BADSTATE, standard meanings | ||
256 | */ | ||
257 | int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size); | ||
258 | |||
259 | /** | ||
260 | * fdt_subnode_offset_namelen - find a subnode based on substring | ||
261 | * @fdt: pointer to the device tree blob | ||
262 | * @parentoffset: structure block offset of a node | ||
263 | * @name: name of the subnode to locate | ||
264 | * @namelen: number of characters of name to consider | ||
265 | * | ||
266 | * Identical to fdt_subnode_offset(), but only examine the first | ||
267 | * namelen characters of name for matching the subnode name. This is | ||
268 | * useful for finding subnodes based on a portion of a larger string, | ||
269 | * such as a full path. | ||
270 | */ | ||
271 | int fdt_subnode_offset_namelen(const void *fdt, int parentoffset, | ||
272 | const char *name, int namelen); | ||
273 | /** | ||
274 | * fdt_subnode_offset - find a subnode of a given node | ||
275 | * @fdt: pointer to the device tree blob | ||
276 | * @parentoffset: structure block offset of a node | ||
277 | * @name: name of the subnode to locate | ||
278 | * | ||
279 | * fdt_subnode_offset() finds a subnode of the node at structure block | ||
280 | * offset parentoffset with the given name. name may include a unit | ||
281 | * address, in which case fdt_subnode_offset() will find the subnode | ||
282 | * with that unit address, or the unit address may be omitted, in | ||
283 | * which case fdt_subnode_offset() will find an arbitrary subnode | ||
284 | * whose name excluding unit address matches the given name. | ||
285 | * | ||
286 | * returns: | ||
287 | * structure block offset of the requested subnode (>=0), on success | ||
288 | * -FDT_ERR_NOTFOUND, if the requested subnode does not exist | ||
289 | * -FDT_ERR_BADOFFSET, if parentoffset did not point to an FDT_BEGIN_NODE tag | ||
290 | * -FDT_ERR_BADMAGIC, | ||
291 | * -FDT_ERR_BADVERSION, | ||
292 | * -FDT_ERR_BADSTATE, | ||
293 | * -FDT_ERR_BADSTRUCTURE, | ||
294 | * -FDT_ERR_TRUNCATED, standard meanings. | ||
295 | */ | ||
296 | int fdt_subnode_offset(const void *fdt, int parentoffset, const char *name); | ||
297 | |||
298 | /** | ||
299 | * fdt_path_offset - find a tree node by its full path | ||
300 | * @fdt: pointer to the device tree blob | ||
301 | * @path: full path of the node to locate | ||
302 | * | ||
303 | * fdt_path_offset() finds a node of a given path in the device tree. | ||
304 | * Each path component may omit the unit address portion, but the | ||
305 | * results of this are undefined if any such path component is | ||
306 | * ambiguous (that is if there are multiple nodes at the relevant | ||
307 | * level matching the given component, differentiated only by unit | ||
308 | * address). | ||
309 | * | ||
310 | * returns: | ||
311 | * structure block offset of the node with the requested path (>=0), on success | ||
312 | * -FDT_ERR_BADPATH, given path does not begin with '/' or is invalid | ||
313 | * -FDT_ERR_NOTFOUND, if the requested node does not exist | ||
314 | * -FDT_ERR_BADMAGIC, | ||
315 | * -FDT_ERR_BADVERSION, | ||
316 | * -FDT_ERR_BADSTATE, | ||
317 | * -FDT_ERR_BADSTRUCTURE, | ||
318 | * -FDT_ERR_TRUNCATED, standard meanings. | ||
319 | */ | ||
320 | int fdt_path_offset(const void *fdt, const char *path); | ||
321 | |||
322 | /** | ||
323 | * fdt_get_name - retrieve the name of a given node | ||
324 | * @fdt: pointer to the device tree blob | ||
325 | * @nodeoffset: structure block offset of the starting node | ||
326 | * @lenp: pointer to an integer variable (will be overwritten) or NULL | ||
327 | * | ||
328 | * fdt_get_name() retrieves the name (including unit address) of the | ||
329 | * device tree node at structure block offset nodeoffset. If lenp is | ||
330 | * non-NULL, the length of this name is also returned, in the integer | ||
331 | * pointed to by lenp. | ||
332 | * | ||
333 | * returns: | ||
334 | * pointer to the node's name, on success | ||
335 | * If lenp is non-NULL, *lenp contains the length of that name (>=0) | ||
336 | * NULL, on error | ||
337 | * if lenp is non-NULL *lenp contains an error code (<0): | ||
338 | * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag | ||
339 | * -FDT_ERR_BADMAGIC, | ||
340 | * -FDT_ERR_BADVERSION, | ||
341 | * -FDT_ERR_BADSTATE, standard meanings | ||
342 | */ | ||
343 | const char *fdt_get_name(const void *fdt, int nodeoffset, int *lenp); | ||
344 | |||
345 | /** | ||
346 | * fdt_get_property - find a given property in a given node | ||
347 | * @fdt: pointer to the device tree blob | ||
348 | * @nodeoffset: offset of the node whose property to find | ||
349 | * @name: name of the property to find | ||
350 | * @lenp: pointer to an integer variable (will be overwritten) or NULL | ||
351 | * | ||
352 | * fdt_get_property() retrieves a pointer to the fdt_property | ||
353 | * structure within the device tree blob corresponding to the property | ||
354 | * named 'name' of the node at offset nodeoffset. If lenp is | ||
355 | * non-NULL, the length of the property value is also returned, in the | ||
356 | * integer pointed to by lenp. | ||
357 | * | ||
358 | * returns: | ||
359 | * pointer to the structure representing the property | ||
360 | * if lenp is non-NULL, *lenp contains the length of the property | ||
361 | * value (>=0) | ||
362 | * NULL, on error | ||
363 | * if lenp is non-NULL, *lenp contains an error code (<0): | ||
364 | * -FDT_ERR_NOTFOUND, node does not have named property | ||
365 | * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag | ||
366 | * -FDT_ERR_BADMAGIC, | ||
367 | * -FDT_ERR_BADVERSION, | ||
368 | * -FDT_ERR_BADSTATE, | ||
369 | * -FDT_ERR_BADSTRUCTURE, | ||
370 | * -FDT_ERR_TRUNCATED, standard meanings | ||
371 | */ | ||
372 | const struct fdt_property *fdt_get_property(const void *fdt, int nodeoffset, | ||
373 | const char *name, int *lenp); | ||
374 | static inline struct fdt_property *fdt_get_property_w(void *fdt, int nodeoffset, | ||
375 | const char *name, | ||
376 | int *lenp) | ||
377 | { | ||
378 | return (struct fdt_property *)(uintptr_t) | ||
379 | fdt_get_property(fdt, nodeoffset, name, lenp); | ||
380 | } | ||
381 | |||
382 | /** | ||
383 | * fdt_getprop - retrieve the value of a given property | ||
384 | * @fdt: pointer to the device tree blob | ||
385 | * @nodeoffset: offset of the node whose property to find | ||
386 | * @name: name of the property to find | ||
387 | * @lenp: pointer to an integer variable (will be overwritten) or NULL | ||
388 | * | ||
389 | * fdt_getprop() retrieves a pointer to the value of the property | ||
390 | * named 'name' of the node at offset nodeoffset (this will be a | ||
391 | * pointer to within the device blob itself, not a copy of the value). | ||
392 | * If lenp is non-NULL, the length of the property value is also | ||
393 | * returned, in the integer pointed to by lenp. | ||
394 | * | ||
395 | * returns: | ||
396 | * pointer to the property's value | ||
397 | * if lenp is non-NULL, *lenp contains the length of the property | ||
398 | * value (>=0) | ||
399 | * NULL, on error | ||
400 | * if lenp is non-NULL, *lenp contains an error code (<0): | ||
401 | * -FDT_ERR_NOTFOUND, node does not have named property | ||
402 | * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag | ||
403 | * -FDT_ERR_BADMAGIC, | ||
404 | * -FDT_ERR_BADVERSION, | ||
405 | * -FDT_ERR_BADSTATE, | ||
406 | * -FDT_ERR_BADSTRUCTURE, | ||
407 | * -FDT_ERR_TRUNCATED, standard meanings | ||
408 | */ | ||
409 | const void *fdt_getprop(const void *fdt, int nodeoffset, | ||
410 | const char *name, int *lenp); | ||
411 | static inline void *fdt_getprop_w(void *fdt, int nodeoffset, | ||
412 | const char *name, int *lenp) | ||
413 | { | ||
414 | return (void *)(uintptr_t)fdt_getprop(fdt, nodeoffset, name, lenp); | ||
415 | } | ||
416 | |||
417 | /** | ||
418 | * fdt_get_phandle - retrieve the phandle of a given node | ||
419 | * @fdt: pointer to the device tree blob | ||
420 | * @nodeoffset: structure block offset of the node | ||
421 | * | ||
422 | * fdt_get_phandle() retrieves the phandle of the device tree node at | ||
423 | * structure block offset nodeoffset. | ||
424 | * | ||
425 | * returns: | ||
426 | * the phandle of the node at nodeoffset, on success (!= 0, != -1) | ||
427 | * 0, if the node has no phandle, or another error occurs | ||
428 | */ | ||
429 | uint32_t fdt_get_phandle(const void *fdt, int nodeoffset); | ||
430 | |||
431 | /** | ||
432 | * fdt_get_path - determine the full path of a node | ||
433 | * @fdt: pointer to the device tree blob | ||
434 | * @nodeoffset: offset of the node whose path to find | ||
435 | * @buf: character buffer to contain the returned path (will be overwritten) | ||
436 | * @buflen: size of the character buffer at buf | ||
437 | * | ||
438 | * fdt_get_path() computes the full path of the node at offset | ||
439 | * nodeoffset, and records that path in the buffer at buf. | ||
440 | * | ||
441 | * NOTE: This function is expensive, as it must scan the device tree | ||
442 | * structure from the start to nodeoffset. | ||
443 | * | ||
444 | * returns: | ||
445 | * 0, on success | ||
446 | * buf contains the absolute path of the node at | ||
447 | * nodeoffset, as a NUL-terminated string. | ||
448 | * -FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag | ||
449 | * -FDT_ERR_NOSPACE, the path of the given node is longer than (bufsize-1) | ||
450 | * characters and will not fit in the given buffer. | ||
451 | * -FDT_ERR_BADMAGIC, | ||
452 | * -FDT_ERR_BADVERSION, | ||
453 | * -FDT_ERR_BADSTATE, | ||
454 | * -FDT_ERR_BADSTRUCTURE, standard meanings | ||
455 | */ | ||
456 | int fdt_get_path(const void *fdt, int nodeoffset, char *buf, int buflen); | ||
457 | |||
458 | /** | ||
459 | * fdt_supernode_atdepth_offset - find a specific ancestor of a node | ||
460 | * @fdt: pointer to the device tree blob | ||
461 | * @nodeoffset: offset of the node whose parent to find | ||
462 | * @supernodedepth: depth of the ancestor to find | ||
463 | * @nodedepth: pointer to an integer variable (will be overwritten) or NULL | ||
464 | * | ||
465 | * fdt_supernode_atdepth_offset() finds an ancestor of the given node | ||
466 | * at a specific depth from the root (where the root itself has depth | ||
467 | * 0, its immediate subnodes depth 1 and so forth). So | ||
468 | * fdt_supernode_atdepth_offset(fdt, nodeoffset, 0, NULL); | ||
469 | * will always return 0, the offset of the root node. If the node at | ||
470 | * nodeoffset has depth D, then: | ||
471 | * fdt_supernode_atdepth_offset(fdt, nodeoffset, D, NULL); | ||
472 | * will return nodeoffset itself. | ||
473 | * | ||
474 | * NOTE: This function is expensive, as it must scan the device tree | ||
475 | * structure from the start to nodeoffset. | ||
476 | * | ||
477 | * returns: | ||
478 | |||
479 | * structure block offset of the node at node offset's ancestor | ||
480 | * of depth supernodedepth (>=0), on success | ||
481 | * -FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag | ||
482 | * -FDT_ERR_NOTFOUND, supernodedepth was greater than the depth of nodeoffset | ||
483 | * -FDT_ERR_BADMAGIC, | ||
484 | * -FDT_ERR_BADVERSION, | ||
485 | * -FDT_ERR_BADSTATE, | ||
486 | * -FDT_ERR_BADSTRUCTURE, standard meanings | ||
487 | */ | ||
488 | int fdt_supernode_atdepth_offset(const void *fdt, int nodeoffset, | ||
489 | int supernodedepth, int *nodedepth); | ||
490 | |||
491 | /** | ||
492 | * fdt_node_depth - find the depth of a given node | ||
493 | * @fdt: pointer to the device tree blob | ||
494 | * @nodeoffset: offset of the node whose parent to find | ||
495 | * | ||
496 | * fdt_node_depth() finds the depth of a given node. The root node | ||
497 | * has depth 0, its immediate subnodes depth 1 and so forth. | ||
498 | * | ||
499 | * NOTE: This function is expensive, as it must scan the device tree | ||
500 | * structure from the start to nodeoffset. | ||
501 | * | ||
502 | * returns: | ||
503 | * depth of the node at nodeoffset (>=0), on success | ||
504 | * -FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag | ||
505 | * -FDT_ERR_BADMAGIC, | ||
506 | * -FDT_ERR_BADVERSION, | ||
507 | * -FDT_ERR_BADSTATE, | ||
508 | * -FDT_ERR_BADSTRUCTURE, standard meanings | ||
509 | */ | ||
510 | int fdt_node_depth(const void *fdt, int nodeoffset); | ||
511 | |||
512 | /** | ||
513 | * fdt_parent_offset - find the parent of a given node | ||
514 | * @fdt: pointer to the device tree blob | ||
515 | * @nodeoffset: offset of the node whose parent to find | ||
516 | * | ||
517 | * fdt_parent_offset() locates the parent node of a given node (that | ||
518 | * is, it finds the offset of the node which contains the node at | ||
519 | * nodeoffset as a subnode). | ||
520 | * | ||
521 | * NOTE: This function is expensive, as it must scan the device tree | ||
522 | * structure from the start to nodeoffset, *twice*. | ||
523 | * | ||
524 | * returns: | ||
525 | * structure block offset of the parent of the node at nodeoffset | ||
526 | * (>=0), on success | ||
527 | * -FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag | ||
528 | * -FDT_ERR_BADMAGIC, | ||
529 | * -FDT_ERR_BADVERSION, | ||
530 | * -FDT_ERR_BADSTATE, | ||
531 | * -FDT_ERR_BADSTRUCTURE, standard meanings | ||
532 | */ | ||
533 | int fdt_parent_offset(const void *fdt, int nodeoffset); | ||
534 | |||
535 | /** | ||
536 | * fdt_node_offset_by_prop_value - find nodes with a given property value | ||
537 | * @fdt: pointer to the device tree blob | ||
538 | * @startoffset: only find nodes after this offset | ||
539 | * @propname: property name to check | ||
540 | * @propval: property value to search for | ||
541 | * @proplen: length of the value in propval | ||
542 | * | ||
543 | * fdt_node_offset_by_prop_value() returns the offset of the first | ||
544 | * node after startoffset, which has a property named propname whose | ||
545 | * value is of length proplen and has value equal to propval; or if | ||
546 | * startoffset is -1, the very first such node in the tree. | ||
547 | * | ||
548 | * To iterate through all nodes matching the criterion, the following | ||
549 | * idiom can be used: | ||
550 | * offset = fdt_node_offset_by_prop_value(fdt, -1, propname, | ||
551 | * propval, proplen); | ||
552 | * while (offset != -FDT_ERR_NOTFOUND) { | ||
553 | * // other code here | ||
554 | * offset = fdt_node_offset_by_prop_value(fdt, offset, propname, | ||
555 | * propval, proplen); | ||
556 | * } | ||
557 | * | ||
558 | * Note the -1 in the first call to the function, if 0 is used here | ||
559 | * instead, the function will never locate the root node, even if it | ||
560 | * matches the criterion. | ||
561 | * | ||
562 | * returns: | ||
563 | * structure block offset of the located node (>= 0, >startoffset), | ||
564 | * on success | ||
565 | * -FDT_ERR_NOTFOUND, no node matching the criterion exists in the | ||
566 | * tree after startoffset | ||
567 | * -FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag | ||
568 | * -FDT_ERR_BADMAGIC, | ||
569 | * -FDT_ERR_BADVERSION, | ||
570 | * -FDT_ERR_BADSTATE, | ||
571 | * -FDT_ERR_BADSTRUCTURE, standard meanings | ||
572 | */ | ||
573 | int fdt_node_offset_by_prop_value(const void *fdt, int startoffset, | ||
574 | const char *propname, | ||
575 | const void *propval, int proplen); | ||
576 | |||
577 | /** | ||
578 | * fdt_node_offset_by_phandle - find the node with a given phandle | ||
579 | * @fdt: pointer to the device tree blob | ||
580 | * @phandle: phandle value | ||
581 | * | ||
582 | * fdt_node_offset_by_phandle() returns the offset of the node | ||
583 | * which has the given phandle value. If there is more than one node | ||
584 | * in the tree with the given phandle (an invalid tree), results are | ||
585 | * undefined. | ||
586 | * | ||
587 | * returns: | ||
588 | * structure block offset of the located node (>= 0), on success | ||
589 | * -FDT_ERR_NOTFOUND, no node with that phandle exists | ||
590 | * -FDT_ERR_BADPHANDLE, given phandle value was invalid (0 or -1) | ||
591 | * -FDT_ERR_BADMAGIC, | ||
592 | * -FDT_ERR_BADVERSION, | ||
593 | * -FDT_ERR_BADSTATE, | ||
594 | * -FDT_ERR_BADSTRUCTURE, standard meanings | ||
595 | */ | ||
596 | int fdt_node_offset_by_phandle(const void *fdt, uint32_t phandle); | ||
597 | |||
598 | /** | ||
599 | * fdt_node_check_compatible: check a node's compatible property | ||
600 | * @fdt: pointer to the device tree blob | ||
601 | * @nodeoffset: offset of a tree node | ||
602 | * @compatible: string to match against | ||
603 | * | ||
604 | * | ||
605 | * fdt_node_check_compatible() returns 0 if the given node contains a | ||
606 | * 'compatible' property with the given string as one of its elements, | ||
607 | * it returns non-zero otherwise, or on error. | ||
608 | * | ||
609 | * returns: | ||
610 | * 0, if the node has a 'compatible' property listing the given string | ||
611 | * 1, if the node has a 'compatible' property, but it does not list | ||
612 | * the given string | ||
613 | * -FDT_ERR_NOTFOUND, if the given node has no 'compatible' property | ||
614 | * -FDT_ERR_BADOFFSET, if nodeoffset does not refer to a BEGIN_NODE tag | ||
615 | * -FDT_ERR_BADMAGIC, | ||
616 | * -FDT_ERR_BADVERSION, | ||
617 | * -FDT_ERR_BADSTATE, | ||
618 | * -FDT_ERR_BADSTRUCTURE, standard meanings | ||
619 | */ | ||
620 | int fdt_node_check_compatible(const void *fdt, int nodeoffset, | ||
621 | const char *compatible); | ||
622 | |||
623 | /** | ||
624 | * fdt_node_offset_by_compatible - find nodes with a given 'compatible' value | ||
625 | * @fdt: pointer to the device tree blob | ||
626 | * @startoffset: only find nodes after this offset | ||
627 | * @compatible: 'compatible' string to match against | ||
628 | * | ||
629 | * fdt_node_offset_by_compatible() returns the offset of the first | ||
630 | * node after startoffset, which has a 'compatible' property which | ||
631 | * lists the given compatible string; or if startoffset is -1, the | ||
632 | * very first such node in the tree. | ||
633 | * | ||
634 | * To iterate through all nodes matching the criterion, the following | ||
635 | * idiom can be used: | ||
636 | * offset = fdt_node_offset_by_compatible(fdt, -1, compatible); | ||
637 | * while (offset != -FDT_ERR_NOTFOUND) { | ||
638 | * // other code here | ||
639 | * offset = fdt_node_offset_by_compatible(fdt, offset, compatible); | ||
640 | * } | ||
641 | * | ||
642 | * Note the -1 in the first call to the function, if 0 is used here | ||
643 | * instead, the function will never locate the root node, even if it | ||
644 | * matches the criterion. | ||
645 | * | ||
646 | * returns: | ||
647 | * structure block offset of the located node (>= 0, >startoffset), | ||
648 | * on success | ||
649 | * -FDT_ERR_NOTFOUND, no node matching the criterion exists in the | ||
650 | * tree after startoffset | ||
651 | * -FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag | ||
652 | * -FDT_ERR_BADMAGIC, | ||
653 | * -FDT_ERR_BADVERSION, | ||
654 | * -FDT_ERR_BADSTATE, | ||
655 | * -FDT_ERR_BADSTRUCTURE, standard meanings | ||
656 | */ | ||
657 | int fdt_node_offset_by_compatible(const void *fdt, int startoffset, | ||
658 | const char *compatible); | ||
659 | |||
660 | /**********************************************************************/ | ||
661 | /* Write-in-place functions */ | ||
662 | /**********************************************************************/ | ||
663 | |||
664 | /** | ||
665 | * fdt_setprop_inplace - change a property's value, but not its size | ||
666 | * @fdt: pointer to the device tree blob | ||
667 | * @nodeoffset: offset of the node whose property to change | ||
668 | * @name: name of the property to change | ||
669 | * @val: pointer to data to replace the property value with | ||
670 | * @len: length of the property value | ||
671 | * | ||
672 | * fdt_setprop_inplace() replaces the value of a given property with | ||
673 | * the data in val, of length len. This function cannot change the | ||
674 | * size of a property, and so will only work if len is equal to the | ||
675 | * current length of the property. | ||
676 | * | ||
677 | * This function will alter only the bytes in the blob which contain | ||
678 | * the given property value, and will not alter or move any other part | ||
679 | * of the tree. | ||
680 | * | ||
681 | * returns: | ||
682 | * 0, on success | ||
683 | * -FDT_ERR_NOSPACE, if len is not equal to the property's current length | ||
684 | * -FDT_ERR_NOTFOUND, node does not have the named property | ||
685 | * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag | ||
686 | * -FDT_ERR_BADMAGIC, | ||
687 | * -FDT_ERR_BADVERSION, | ||
688 | * -FDT_ERR_BADSTATE, | ||
689 | * -FDT_ERR_BADSTRUCTURE, | ||
690 | * -FDT_ERR_TRUNCATED, standard meanings | ||
691 | */ | ||
692 | int fdt_setprop_inplace(void *fdt, int nodeoffset, const char *name, | ||
693 | const void *val, int len); | ||
694 | |||
695 | /** | ||
696 | * fdt_setprop_inplace_cell - change the value of a single-cell property | ||
697 | * @fdt: pointer to the device tree blob | ||
698 | * @nodeoffset: offset of the node whose property to change | ||
699 | * @name: name of the property to change | ||
700 | * @val: cell (32-bit integer) value to replace the property with | ||
701 | * | ||
702 | * fdt_setprop_inplace_cell() replaces the value of a given property | ||
703 | * with the 32-bit integer cell value in val, converting val to | ||
704 | * big-endian if necessary. This function cannot change the size of a | ||
705 | * property, and so will only work if the property already exists and | ||
706 | * has length 4. | ||
707 | * | ||
708 | * This function will alter only the bytes in the blob which contain | ||
709 | * the given property value, and will not alter or move any other part | ||
710 | * of the tree. | ||
711 | * | ||
712 | * returns: | ||
713 | * 0, on success | ||
714 | * -FDT_ERR_NOSPACE, if the property's length is not equal to 4 | ||
715 | * -FDT_ERR_NOTFOUND, node does not have the named property | ||
716 | * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag | ||
717 | * -FDT_ERR_BADMAGIC, | ||
718 | * -FDT_ERR_BADVERSION, | ||
719 | * -FDT_ERR_BADSTATE, | ||
720 | * -FDT_ERR_BADSTRUCTURE, | ||
721 | * -FDT_ERR_TRUNCATED, standard meanings | ||
722 | */ | ||
723 | static inline int fdt_setprop_inplace_cell(void *fdt, int nodeoffset, | ||
724 | const char *name, uint32_t val) | ||
725 | { | ||
726 | val = cpu_to_fdt32(val); | ||
727 | return fdt_setprop_inplace(fdt, nodeoffset, name, &val, sizeof(val)); | ||
728 | } | ||
729 | |||
730 | /** | ||
731 | * fdt_nop_property - replace a property with nop tags | ||
732 | * @fdt: pointer to the device tree blob | ||
733 | * @nodeoffset: offset of the node whose property to nop | ||
734 | * @name: name of the property to nop | ||
735 | * | ||
736 | * fdt_nop_property() will replace a given property's representation | ||
737 | * in the blob with FDT_NOP tags, effectively removing it from the | ||
738 | * tree. | ||
739 | * | ||
740 | * This function will alter only the bytes in the blob which contain | ||
741 | * the property, and will not alter or move any other part of the | ||
742 | * tree. | ||
743 | * | ||
744 | * returns: | ||
745 | * 0, on success | ||
746 | * -FDT_ERR_NOTFOUND, node does not have the named property | ||
747 | * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag | ||
748 | * -FDT_ERR_BADMAGIC, | ||
749 | * -FDT_ERR_BADVERSION, | ||
750 | * -FDT_ERR_BADSTATE, | ||
751 | * -FDT_ERR_BADSTRUCTURE, | ||
752 | * -FDT_ERR_TRUNCATED, standard meanings | ||
753 | */ | ||
754 | int fdt_nop_property(void *fdt, int nodeoffset, const char *name); | ||
755 | |||
756 | /** | ||
757 | * fdt_nop_node - replace a node (subtree) with nop tags | ||
758 | * @fdt: pointer to the device tree blob | ||
759 | * @nodeoffset: offset of the node to nop | ||
760 | * | ||
761 | * fdt_nop_node() will replace a given node's representation in the | ||
762 | * blob, including all its subnodes, if any, with FDT_NOP tags, | ||
763 | * effectively removing it from the tree. | ||
764 | * | ||
765 | * This function will alter only the bytes in the blob which contain | ||
766 | * the node and its properties and subnodes, and will not alter or | ||
767 | * move any other part of the tree. | ||
768 | * | ||
769 | * returns: | ||
770 | * 0, on success | ||
771 | * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag | ||
772 | * -FDT_ERR_BADMAGIC, | ||
773 | * -FDT_ERR_BADVERSION, | ||
774 | * -FDT_ERR_BADSTATE, | ||
775 | * -FDT_ERR_BADSTRUCTURE, | ||
776 | * -FDT_ERR_TRUNCATED, standard meanings | ||
777 | */ | ||
778 | int fdt_nop_node(void *fdt, int nodeoffset); | ||
779 | |||
780 | /**********************************************************************/ | ||
781 | /* Sequential write functions */ | ||
782 | /**********************************************************************/ | ||
783 | |||
784 | int fdt_create(void *buf, int bufsize); | ||
785 | int fdt_add_reservemap_entry(void *fdt, uint64_t addr, uint64_t size); | ||
786 | int fdt_finish_reservemap(void *fdt); | ||
787 | int fdt_begin_node(void *fdt, const char *name); | ||
788 | int fdt_property(void *fdt, const char *name, const void *val, int len); | ||
789 | static inline int fdt_property_cell(void *fdt, const char *name, uint32_t val) | ||
790 | { | ||
791 | val = cpu_to_fdt32(val); | ||
792 | return fdt_property(fdt, name, &val, sizeof(val)); | ||
793 | } | ||
794 | #define fdt_property_string(fdt, name, str) \ | ||
795 | fdt_property(fdt, name, str, strlen(str)+1) | ||
796 | int fdt_end_node(void *fdt); | ||
797 | int fdt_finish(void *fdt); | ||
798 | |||
799 | /**********************************************************************/ | ||
800 | /* Read-write functions */ | ||
801 | /**********************************************************************/ | ||
802 | |||
803 | int fdt_open_into(const void *fdt, void *buf, int bufsize); | ||
804 | int fdt_pack(void *fdt); | ||
805 | |||
806 | /** | ||
807 | * fdt_add_mem_rsv - add one memory reserve map entry | ||
808 | * @fdt: pointer to the device tree blob | ||
809 | * @address, @size: 64-bit values (native endian) | ||
810 | * | ||
811 | * Adds a reserve map entry to the given blob reserving a region at | ||
812 | * address address of length size. | ||
813 | * | ||
814 | * This function will insert data into the reserve map and will | ||
815 | * therefore change the indexes of some entries in the table. | ||
816 | * | ||
817 | * returns: | ||
818 | * 0, on success | ||
819 | * -FDT_ERR_NOSPACE, there is insufficient free space in the blob to | ||
820 | * contain the new reservation entry | ||
821 | * -FDT_ERR_BADMAGIC, | ||
822 | * -FDT_ERR_BADVERSION, | ||
823 | * -FDT_ERR_BADSTATE, | ||
824 | * -FDT_ERR_BADSTRUCTURE, | ||
825 | * -FDT_ERR_BADLAYOUT, | ||
826 | * -FDT_ERR_TRUNCATED, standard meanings | ||
827 | */ | ||
828 | int fdt_add_mem_rsv(void *fdt, uint64_t address, uint64_t size); | ||
829 | |||
830 | /** | ||
831 | * fdt_del_mem_rsv - remove a memory reserve map entry | ||
832 | * @fdt: pointer to the device tree blob | ||
833 | * @n: entry to remove | ||
834 | * | ||
835 | * fdt_del_mem_rsv() removes the n-th memory reserve map entry from | ||
836 | * the blob. | ||
837 | * | ||
838 | * This function will delete data from the reservation table and will | ||
839 | * therefore change the indexes of some entries in the table. | ||
840 | * | ||
841 | * returns: | ||
842 | * 0, on success | ||
843 | * -FDT_ERR_NOTFOUND, there is no entry of the given index (i.e. there | ||
844 | * are less than n+1 reserve map entries) | ||
845 | * -FDT_ERR_BADMAGIC, | ||
846 | * -FDT_ERR_BADVERSION, | ||
847 | * -FDT_ERR_BADSTATE, | ||
848 | * -FDT_ERR_BADSTRUCTURE, | ||
849 | * -FDT_ERR_BADLAYOUT, | ||
850 | * -FDT_ERR_TRUNCATED, standard meanings | ||
851 | */ | ||
852 | int fdt_del_mem_rsv(void *fdt, int n); | ||
853 | |||
854 | /** | ||
855 | * fdt_set_name - change the name of a given node | ||
856 | * @fdt: pointer to the device tree blob | ||
857 | * @nodeoffset: structure block offset of a node | ||
858 | * @name: name to give the node | ||
859 | * | ||
860 | * fdt_set_name() replaces the name (including unit address, if any) | ||
861 | * of the given node with the given string. NOTE: this function can't | ||
862 | * efficiently check if the new name is unique amongst the given | ||
863 | * node's siblings; results are undefined if this function is invoked | ||
864 | * with a name equal to one of the given node's siblings. | ||
865 | * | ||
866 | * This function may insert or delete data from the blob, and will | ||
867 | * therefore change the offsets of some existing nodes. | ||
868 | * | ||
869 | * returns: | ||
870 | * 0, on success | ||
871 | * -FDT_ERR_NOSPACE, there is insufficient free space in the blob | ||
872 | * to contain the new name | ||
873 | * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag | ||
874 | * -FDT_ERR_BADMAGIC, | ||
875 | * -FDT_ERR_BADVERSION, | ||
876 | * -FDT_ERR_BADSTATE, standard meanings | ||
877 | */ | ||
878 | int fdt_set_name(void *fdt, int nodeoffset, const char *name); | ||
879 | |||
880 | /** | ||
881 | * fdt_setprop - create or change a property | ||
882 | * @fdt: pointer to the device tree blob | ||
883 | * @nodeoffset: offset of the node whose property to change | ||
884 | * @name: name of the property to change | ||
885 | * @val: pointer to data to set the property value to | ||
886 | * @len: length of the property value | ||
887 | * | ||
888 | * fdt_setprop() sets the value of the named property in the given | ||
889 | * node to the given value and length, creating the property if it | ||
890 | * does not already exist. | ||
891 | * | ||
892 | * This function may insert or delete data from the blob, and will | ||
893 | * therefore change the offsets of some existing nodes. | ||
894 | * | ||
895 | * returns: | ||
896 | * 0, on success | ||
897 | * -FDT_ERR_NOSPACE, there is insufficient free space in the blob to | ||
898 | * contain the new property value | ||
899 | * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag | ||
900 | * -FDT_ERR_BADLAYOUT, | ||
901 | * -FDT_ERR_BADMAGIC, | ||
902 | * -FDT_ERR_BADVERSION, | ||
903 | * -FDT_ERR_BADSTATE, | ||
904 | * -FDT_ERR_BADSTRUCTURE, | ||
905 | * -FDT_ERR_BADLAYOUT, | ||
906 | * -FDT_ERR_TRUNCATED, standard meanings | ||
907 | */ | ||
908 | int fdt_setprop(void *fdt, int nodeoffset, const char *name, | ||
909 | const void *val, int len); | ||
910 | |||
911 | /** | ||
912 | * fdt_setprop_cell - set a property to a single cell value | ||
913 | * @fdt: pointer to the device tree blob | ||
914 | * @nodeoffset: offset of the node whose property to change | ||
915 | * @name: name of the property to change | ||
916 | * @val: 32-bit integer value for the property (native endian) | ||
917 | * | ||
918 | * fdt_setprop_cell() sets the value of the named property in the | ||
919 | * given node to the given cell value (converting to big-endian if | ||
920 | * necessary), or creates a new property with that value if it does | ||
921 | * not already exist. | ||
922 | * | ||
923 | * This function may insert or delete data from the blob, and will | ||
924 | * therefore change the offsets of some existing nodes. | ||
925 | * | ||
926 | * returns: | ||
927 | * 0, on success | ||
928 | * -FDT_ERR_NOSPACE, there is insufficient free space in the blob to | ||
929 | * contain the new property value | ||
930 | * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag | ||
931 | * -FDT_ERR_BADLAYOUT, | ||
932 | * -FDT_ERR_BADMAGIC, | ||
933 | * -FDT_ERR_BADVERSION, | ||
934 | * -FDT_ERR_BADSTATE, | ||
935 | * -FDT_ERR_BADSTRUCTURE, | ||
936 | * -FDT_ERR_BADLAYOUT, | ||
937 | * -FDT_ERR_TRUNCATED, standard meanings | ||
938 | */ | ||
939 | static inline int fdt_setprop_cell(void *fdt, int nodeoffset, const char *name, | ||
940 | uint32_t val) | ||
941 | { | ||
942 | val = cpu_to_fdt32(val); | ||
943 | return fdt_setprop(fdt, nodeoffset, name, &val, sizeof(val)); | ||
944 | } | ||
945 | |||
946 | /** | ||
947 | * fdt_setprop_string - set a property to a string value | ||
948 | * @fdt: pointer to the device tree blob | ||
949 | * @nodeoffset: offset of the node whose property to change | ||
950 | * @name: name of the property to change | ||
951 | * @str: string value for the property | ||
952 | * | ||
953 | * fdt_setprop_string() sets the value of the named property in the | ||
954 | * given node to the given string value (using the length of the | ||
955 | * string to determine the new length of the property), or creates a | ||
956 | * new property with that value if it does not already exist. | ||
957 | * | ||
958 | * This function may insert or delete data from the blob, and will | ||
959 | * therefore change the offsets of some existing nodes. | ||
960 | * | ||
961 | * returns: | ||
962 | * 0, on success | ||
963 | * -FDT_ERR_NOSPACE, there is insufficient free space in the blob to | ||
964 | * contain the new property value | ||
965 | * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag | ||
966 | * -FDT_ERR_BADLAYOUT, | ||
967 | * -FDT_ERR_BADMAGIC, | ||
968 | * -FDT_ERR_BADVERSION, | ||
969 | * -FDT_ERR_BADSTATE, | ||
970 | * -FDT_ERR_BADSTRUCTURE, | ||
971 | * -FDT_ERR_BADLAYOUT, | ||
972 | * -FDT_ERR_TRUNCATED, standard meanings | ||
973 | */ | ||
974 | #define fdt_setprop_string(fdt, nodeoffset, name, str) \ | ||
975 | fdt_setprop((fdt), (nodeoffset), (name), (str), strlen(str)+1) | ||
976 | |||
977 | /** | ||
978 | * fdt_delprop - delete a property | ||
979 | * @fdt: pointer to the device tree blob | ||
980 | * @nodeoffset: offset of the node whose property to nop | ||
981 | * @name: name of the property to nop | ||
982 | * | ||
983 | * fdt_del_property() will delete the given property. | ||
984 | * | ||
985 | * This function will delete data from the blob, and will therefore | ||
986 | * change the offsets of some existing nodes. | ||
987 | * | ||
988 | * returns: | ||
989 | * 0, on success | ||
990 | * -FDT_ERR_NOTFOUND, node does not have the named property | ||
991 | * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag | ||
992 | * -FDT_ERR_BADLAYOUT, | ||
993 | * -FDT_ERR_BADMAGIC, | ||
994 | * -FDT_ERR_BADVERSION, | ||
995 | * -FDT_ERR_BADSTATE, | ||
996 | * -FDT_ERR_BADSTRUCTURE, | ||
997 | * -FDT_ERR_TRUNCATED, standard meanings | ||
998 | */ | ||
999 | int fdt_delprop(void *fdt, int nodeoffset, const char *name); | ||
1000 | |||
1001 | /** | ||
1002 | * fdt_add_subnode_namelen - creates a new node based on substring | ||
1003 | * @fdt: pointer to the device tree blob | ||
1004 | * @parentoffset: structure block offset of a node | ||
1005 | * @name: name of the subnode to locate | ||
1006 | * @namelen: number of characters of name to consider | ||
1007 | * | ||
1008 | * Identical to fdt_add_subnode(), but use only the first namelen | ||
1009 | * characters of name as the name of the new node. This is useful for | ||
1010 | * creating subnodes based on a portion of a larger string, such as a | ||
1011 | * full path. | ||
1012 | */ | ||
1013 | int fdt_add_subnode_namelen(void *fdt, int parentoffset, | ||
1014 | const char *name, int namelen); | ||
1015 | |||
1016 | /** | ||
1017 | * fdt_add_subnode - creates a new node | ||
1018 | * @fdt: pointer to the device tree blob | ||
1019 | * @parentoffset: structure block offset of a node | ||
1020 | * @name: name of the subnode to locate | ||
1021 | * | ||
1022 | * fdt_add_subnode() creates a new node as a subnode of the node at | ||
1023 | * structure block offset parentoffset, with the given name (which | ||
1024 | * should include the unit address, if any). | ||
1025 | * | ||
1026 | * This function will insert data into the blob, and will therefore | ||
1027 | * change the offsets of some existing nodes. | ||
1028 | |||
1029 | * returns: | ||
1030 | * structure block offset of the created nodeequested subnode (>=0), on success | ||
1031 | * -FDT_ERR_NOTFOUND, if the requested subnode does not exist | ||
1032 | * -FDT_ERR_BADOFFSET, if parentoffset did not point to an FDT_BEGIN_NODE tag | ||
1033 | * -FDT_ERR_EXISTS, if the node at parentoffset already has a subnode of | ||
1034 | * the given name | ||
1035 | * -FDT_ERR_NOSPACE, if there is insufficient free space in the | ||
1036 | * blob to contain the new node | ||
1037 | * -FDT_ERR_NOSPACE | ||
1038 | * -FDT_ERR_BADLAYOUT | ||
1039 | * -FDT_ERR_BADMAGIC, | ||
1040 | * -FDT_ERR_BADVERSION, | ||
1041 | * -FDT_ERR_BADSTATE, | ||
1042 | * -FDT_ERR_BADSTRUCTURE, | ||
1043 | * -FDT_ERR_TRUNCATED, standard meanings. | ||
1044 | */ | ||
1045 | int fdt_add_subnode(void *fdt, int parentoffset, const char *name); | ||
1046 | |||
1047 | /** | ||
1048 | * fdt_del_node - delete a node (subtree) | ||
1049 | * @fdt: pointer to the device tree blob | ||
1050 | * @nodeoffset: offset of the node to nop | ||
1051 | * | ||
1052 | * fdt_del_node() will remove the given node, including all its | ||
1053 | * subnodes if any, from the blob. | ||
1054 | * | ||
1055 | * This function will delete data from the blob, and will therefore | ||
1056 | * change the offsets of some existing nodes. | ||
1057 | * | ||
1058 | * returns: | ||
1059 | * 0, on success | ||
1060 | * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag | ||
1061 | * -FDT_ERR_BADLAYOUT, | ||
1062 | * -FDT_ERR_BADMAGIC, | ||
1063 | * -FDT_ERR_BADVERSION, | ||
1064 | * -FDT_ERR_BADSTATE, | ||
1065 | * -FDT_ERR_BADSTRUCTURE, | ||
1066 | * -FDT_ERR_TRUNCATED, standard meanings | ||
1067 | */ | ||
1068 | int fdt_del_node(void *fdt, int nodeoffset); | ||
1069 | |||
1070 | /**********************************************************************/ | ||
1071 | /* Debugging / informational functions */ | ||
1072 | /**********************************************************************/ | ||
1073 | |||
1074 | const char *fdt_strerror(int errval); | ||
1075 | |||
1076 | #endif /* _LIBFDT_H */ | ||
diff --git a/arch/powerpc/boot/libfdt/libfdt_internal.h b/arch/powerpc/boot/libfdt/libfdt_internal.h deleted file mode 100644 index 46eb93e4af5c..000000000000 --- a/arch/powerpc/boot/libfdt/libfdt_internal.h +++ /dev/null | |||
@@ -1,95 +0,0 @@ | |||
1 | #ifndef _LIBFDT_INTERNAL_H | ||
2 | #define _LIBFDT_INTERNAL_H | ||
3 | /* | ||
4 | * libfdt - Flat Device Tree manipulation | ||
5 | * Copyright (C) 2006 David Gibson, IBM Corporation. | ||
6 | * | ||
7 | * libfdt is dual licensed: you can use it either under the terms of | ||
8 | * the GPL, or the BSD license, at your option. | ||
9 | * | ||
10 | * a) This library is free software; you can redistribute it and/or | ||
11 | * modify it under the terms of the GNU General Public License as | ||
12 | * published by the Free Software Foundation; either version 2 of the | ||
13 | * License, or (at your option) any later version. | ||
14 | * | ||
15 | * This library is distributed in the hope that it will be useful, | ||
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
18 | * GNU General Public License for more details. | ||
19 | * | ||
20 | * You should have received a copy of the GNU General Public | ||
21 | * License along with this library; if not, write to the Free | ||
22 | * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, | ||
23 | * MA 02110-1301 USA | ||
24 | * | ||
25 | * Alternatively, | ||
26 | * | ||
27 | * b) Redistribution and use in source and binary forms, with or | ||
28 | * without modification, are permitted provided that the following | ||
29 | * conditions are met: | ||
30 | * | ||
31 | * 1. Redistributions of source code must retain the above | ||
32 | * copyright notice, this list of conditions and the following | ||
33 | * disclaimer. | ||
34 | * 2. Redistributions in binary form must reproduce the above | ||
35 | * copyright notice, this list of conditions and the following | ||
36 | * disclaimer in the documentation and/or other materials | ||
37 | * provided with the distribution. | ||
38 | * | ||
39 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND | ||
40 | * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, | ||
41 | * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | ||
42 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | ||
43 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR | ||
44 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | ||
45 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | ||
46 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | ||
47 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | ||
48 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | ||
49 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR | ||
50 | * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, | ||
51 | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
52 | */ | ||
53 | #include <fdt.h> | ||
54 | |||
55 | #define FDT_ALIGN(x, a) (((x) + (a) - 1) & ~((a) - 1)) | ||
56 | #define FDT_TAGALIGN(x) (FDT_ALIGN((x), FDT_TAGSIZE)) | ||
57 | |||
58 | #define FDT_CHECK_HEADER(fdt) \ | ||
59 | { \ | ||
60 | int err; \ | ||
61 | if ((err = fdt_check_header(fdt)) != 0) \ | ||
62 | return err; \ | ||
63 | } | ||
64 | |||
65 | uint32_t _fdt_next_tag(const void *fdt, int startoffset, int *nextoffset); | ||
66 | int _fdt_check_node_offset(const void *fdt, int offset); | ||
67 | const char *_fdt_find_string(const char *strtab, int tabsize, const char *s); | ||
68 | int _fdt_node_end_offset(void *fdt, int nodeoffset); | ||
69 | |||
70 | static inline const void *_fdt_offset_ptr(const void *fdt, int offset) | ||
71 | { | ||
72 | return (const char *)fdt + fdt_off_dt_struct(fdt) + offset; | ||
73 | } | ||
74 | |||
75 | static inline void *_fdt_offset_ptr_w(void *fdt, int offset) | ||
76 | { | ||
77 | return (void *)(uintptr_t)_fdt_offset_ptr(fdt, offset); | ||
78 | } | ||
79 | |||
80 | static inline const struct fdt_reserve_entry *_fdt_mem_rsv(const void *fdt, int n) | ||
81 | { | ||
82 | const struct fdt_reserve_entry *rsv_table = | ||
83 | (const struct fdt_reserve_entry *) | ||
84 | ((const char *)fdt + fdt_off_mem_rsvmap(fdt)); | ||
85 | |||
86 | return rsv_table + n; | ||
87 | } | ||
88 | static inline struct fdt_reserve_entry *_fdt_mem_rsv_w(void *fdt, int n) | ||
89 | { | ||
90 | return (void *)(uintptr_t)_fdt_mem_rsv(fdt, n); | ||
91 | } | ||
92 | |||
93 | #define FDT_SW_MAGIC (~FDT_MAGIC) | ||
94 | |||
95 | #endif /* _LIBFDT_INTERNAL_H */ | ||
diff --git a/arch/powerpc/boot/simpleboot.c b/arch/powerpc/boot/simpleboot.c index c58a0dada992..21cd48074ec8 100644 --- a/arch/powerpc/boot/simpleboot.c +++ b/arch/powerpc/boot/simpleboot.c | |||
@@ -19,7 +19,7 @@ | |||
19 | #include "types.h" | 19 | #include "types.h" |
20 | #include "io.h" | 20 | #include "io.h" |
21 | #include "stdio.h" | 21 | #include "stdio.h" |
22 | #include "libfdt/libfdt.h" | 22 | #include <libfdt.h> |
23 | 23 | ||
24 | BSS_STACK(4*1024); | 24 | BSS_STACK(4*1024); |
25 | 25 | ||
diff --git a/arch/powerpc/include/asm/elf.h b/arch/powerpc/include/asm/elf.h index 087c22f1d368..d6b4a12cdeff 100644 --- a/arch/powerpc/include/asm/elf.h +++ b/arch/powerpc/include/asm/elf.h | |||
@@ -260,6 +260,7 @@ do { \ | |||
260 | #else | 260 | #else |
261 | # define SET_PERSONALITY(ex) \ | 261 | # define SET_PERSONALITY(ex) \ |
262 | set_personality(PER_LINUX | (current->personality & (~PER_MASK))) | 262 | set_personality(PER_LINUX | (current->personality & (~PER_MASK))) |
263 | # define elf_read_implies_exec(ex, exec_stk) (exec_stk != EXSTACK_DISABLE_X) | ||
263 | #endif /* __powerpc64__ */ | 264 | #endif /* __powerpc64__ */ |
264 | 265 | ||
265 | extern int dcache_bsize; | 266 | extern int dcache_bsize; |
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h index 86d2366ab6a1..cbf154387091 100644 --- a/arch/powerpc/include/asm/mmu.h +++ b/arch/powerpc/include/asm/mmu.h | |||
@@ -52,12 +52,6 @@ | |||
52 | */ | 52 | */ |
53 | #define MMU_FTR_NEED_DTLB_SW_LRU ASM_CONST(0x00200000) | 53 | #define MMU_FTR_NEED_DTLB_SW_LRU ASM_CONST(0x00200000) |
54 | 54 | ||
55 | /* This indicates that the processor uses the wrong opcode for tlbilx | ||
56 | * instructions. During the ISA 2.06 development the opcode for tlbilx | ||
57 | * changed and some early implementations used to old opcode | ||
58 | */ | ||
59 | #define MMU_FTR_TLBILX_EARLY_OPCODE ASM_CONST(0x00400000) | ||
60 | |||
61 | #ifndef __ASSEMBLY__ | 55 | #ifndef __ASSEMBLY__ |
62 | #include <asm/cputable.h> | 56 | #include <asm/cputable.h> |
63 | 57 | ||
diff --git a/arch/powerpc/include/asm/of_platform.h b/arch/powerpc/include/asm/of_platform.h index 53b46507ffde..d4aaa3489440 100644 --- a/arch/powerpc/include/asm/of_platform.h +++ b/arch/powerpc/include/asm/of_platform.h | |||
@@ -11,16 +11,6 @@ | |||
11 | * | 11 | * |
12 | */ | 12 | */ |
13 | 13 | ||
14 | /* Platform drivers register/unregister */ | ||
15 | static inline int of_register_platform_driver(struct of_platform_driver *drv) | ||
16 | { | ||
17 | return of_register_driver(drv, &of_platform_bus_type); | ||
18 | } | ||
19 | static inline void of_unregister_platform_driver(struct of_platform_driver *drv) | ||
20 | { | ||
21 | of_unregister_driver(drv); | ||
22 | } | ||
23 | |||
24 | /* Platform devices and busses creation */ | 14 | /* Platform devices and busses creation */ |
25 | extern struct of_device *of_platform_device_create(struct device_node *np, | 15 | extern struct of_device *of_platform_device_create(struct device_node *np, |
26 | const char *bus_id, | 16 | const char *bus_id, |
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h index ef4da37f3c10..640ccbbc0977 100644 --- a/arch/powerpc/include/asm/ppc-opcode.h +++ b/arch/powerpc/include/asm/ppc-opcode.h | |||
@@ -44,7 +44,6 @@ | |||
44 | #define PPC_INST_STSWI 0x7c0005aa | 44 | #define PPC_INST_STSWI 0x7c0005aa |
45 | #define PPC_INST_STSWX 0x7c00052a | 45 | #define PPC_INST_STSWX 0x7c00052a |
46 | #define PPC_INST_TLBILX 0x7c000024 | 46 | #define PPC_INST_TLBILX 0x7c000024 |
47 | #define PPC_INST_TLBILX_EARLY 0x7c000626 | ||
48 | #define PPC_INST_WAIT 0x7c00007c | 47 | #define PPC_INST_WAIT 0x7c00007c |
49 | 48 | ||
50 | /* macros to insert fields into opcodes */ | 49 | /* macros to insert fields into opcodes */ |
@@ -64,18 +63,10 @@ | |||
64 | #define PPC_RFDI stringify_in_c(.long PPC_INST_RFDI) | 63 | #define PPC_RFDI stringify_in_c(.long PPC_INST_RFDI) |
65 | #define PPC_RFMCI stringify_in_c(.long PPC_INST_RFMCI) | 64 | #define PPC_RFMCI stringify_in_c(.long PPC_INST_RFMCI) |
66 | #define PPC_TLBILX(t, a, b) stringify_in_c(.long PPC_INST_TLBILX | \ | 65 | #define PPC_TLBILX(t, a, b) stringify_in_c(.long PPC_INST_TLBILX | \ |
67 | __PPC_T_TLB(t) | \ | 66 | __PPC_T_TLB(t) | __PPC_RA(a) | __PPC_RB(b)) |
68 | __PPC_RA(a) | __PPC_RB(b)) | ||
69 | #define PPC_TLBILX_ALL(a, b) PPC_TLBILX(0, a, b) | 67 | #define PPC_TLBILX_ALL(a, b) PPC_TLBILX(0, a, b) |
70 | #define PPC_TLBILX_PID(a, b) PPC_TLBILX(1, a, b) | 68 | #define PPC_TLBILX_PID(a, b) PPC_TLBILX(1, a, b) |
71 | #define PPC_TLBILX_VA(a, b) PPC_TLBILX(3, a, b) | 69 | #define PPC_TLBILX_VA(a, b) PPC_TLBILX(3, a, b) |
72 | |||
73 | #define PPC_TLBILX_EARLY(t, a, b) stringify_in_c(.long PPC_INST_TLBILX_EARLY | \ | ||
74 | __PPC_T_TLB(t) | \ | ||
75 | __PPC_RA(a) | __PPC_RB(b)) | ||
76 | #define PPC_TLBILX_ALL_EARLY(a, b) PPC_TLBILX_EARLY(0, a, b) | ||
77 | #define PPC_TLBILX_PID_EARLY(a, b) PPC_TLBILX_EARLY(1, a, b) | ||
78 | #define PPC_TLBILX_VA_EARLY(a, b) PPC_TLBILX_EARLY(3, a, b) | ||
79 | #define PPC_WAIT(w) stringify_in_c(.long PPC_INST_WAIT | \ | 70 | #define PPC_WAIT(w) stringify_in_c(.long PPC_INST_WAIT | \ |
80 | __PPC_WC(w)) | 71 | __PPC_WC(w)) |
81 | 72 | ||
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h index f59a66684aed..384d90c9c272 100644 --- a/arch/powerpc/include/asm/ppc_asm.h +++ b/arch/powerpc/include/asm/ppc_asm.h | |||
@@ -4,6 +4,7 @@ | |||
4 | #ifndef _ASM_POWERPC_PPC_ASM_H | 4 | #ifndef _ASM_POWERPC_PPC_ASM_H |
5 | #define _ASM_POWERPC_PPC_ASM_H | 5 | #define _ASM_POWERPC_PPC_ASM_H |
6 | 6 | ||
7 | #include <linux/init.h> | ||
7 | #include <linux/stringify.h> | 8 | #include <linux/stringify.h> |
8 | #include <asm/asm-compat.h> | 9 | #include <asm/asm-compat.h> |
9 | #include <asm/processor.h> | 10 | #include <asm/processor.h> |
@@ -189,7 +190,7 @@ name: \ | |||
189 | GLUE(.,name): | 190 | GLUE(.,name): |
190 | 191 | ||
191 | #define _INIT_GLOBAL(name) \ | 192 | #define _INIT_GLOBAL(name) \ |
192 | .section ".text.init.refok"; \ | 193 | __REF; \ |
193 | .align 2 ; \ | 194 | .align 2 ; \ |
194 | .globl name; \ | 195 | .globl name; \ |
195 | .globl GLUE(.,name); \ | 196 | .globl GLUE(.,name); \ |
@@ -229,7 +230,7 @@ name: \ | |||
229 | GLUE(.,name): | 230 | GLUE(.,name): |
230 | 231 | ||
231 | #define _INIT_STATIC(name) \ | 232 | #define _INIT_STATIC(name) \ |
232 | .section ".text.init.refok"; \ | 233 | __REF; \ |
233 | .align 2 ; \ | 234 | .align 2 ; \ |
234 | .section ".opd","aw"; \ | 235 | .section ".opd","aw"; \ |
235 | name: \ | 236 | name: \ |
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c index 57db50f40289..cd1b687544f3 100644 --- a/arch/powerpc/kernel/cputable.c +++ b/arch/powerpc/kernel/cputable.c | |||
@@ -1766,7 +1766,7 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
1766 | .cpu_features = CPU_FTRS_E500MC, | 1766 | .cpu_features = CPU_FTRS_E500MC, |
1767 | .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, | 1767 | .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, |
1768 | .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | | 1768 | .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | |
1769 | MMU_FTR_USE_TLBILX | MMU_FTR_TLBILX_EARLY_OPCODE, | 1769 | MMU_FTR_USE_TLBILX, |
1770 | .icache_bsize = 64, | 1770 | .icache_bsize = 64, |
1771 | .dcache_bsize = 64, | 1771 | .dcache_bsize = 64, |
1772 | .num_pmcs = 4, | 1772 | .num_pmcs = 4, |
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S index 54e68c11ae15..c01467f952d3 100644 --- a/arch/powerpc/kernel/head_32.S +++ b/arch/powerpc/kernel/head_32.S | |||
@@ -21,6 +21,7 @@ | |||
21 | * | 21 | * |
22 | */ | 22 | */ |
23 | 23 | ||
24 | #include <linux/init.h> | ||
24 | #include <asm/reg.h> | 25 | #include <asm/reg.h> |
25 | #include <asm/page.h> | 26 | #include <asm/page.h> |
26 | #include <asm/mmu.h> | 27 | #include <asm/mmu.h> |
@@ -50,7 +51,7 @@ | |||
50 | mtspr SPRN_DBAT##n##L,RB; \ | 51 | mtspr SPRN_DBAT##n##L,RB; \ |
51 | 1: | 52 | 1: |
52 | 53 | ||
53 | .section .text.head, "ax" | 54 | __HEAD |
54 | .stabs "arch/powerpc/kernel/",N_SO,0,0,0f | 55 | .stabs "arch/powerpc/kernel/",N_SO,0,0,0f |
55 | .stabs "head_32.S",N_SO,0,0,0f | 56 | .stabs "head_32.S",N_SO,0,0,0f |
56 | 0: | 57 | 0: |
diff --git a/arch/powerpc/kernel/head_40x.S b/arch/powerpc/kernel/head_40x.S index 56d8e5d90c5b..0c96911d4299 100644 --- a/arch/powerpc/kernel/head_40x.S +++ b/arch/powerpc/kernel/head_40x.S | |||
@@ -31,6 +31,7 @@ | |||
31 | * | 31 | * |
32 | */ | 32 | */ |
33 | 33 | ||
34 | #include <linux/init.h> | ||
34 | #include <asm/processor.h> | 35 | #include <asm/processor.h> |
35 | #include <asm/page.h> | 36 | #include <asm/page.h> |
36 | #include <asm/mmu.h> | 37 | #include <asm/mmu.h> |
@@ -52,7 +53,7 @@ | |||
52 | * | 53 | * |
53 | * This is all going to change RSN when we add bi_recs....... -- Dan | 54 | * This is all going to change RSN when we add bi_recs....... -- Dan |
54 | */ | 55 | */ |
55 | .section .text.head, "ax" | 56 | __HEAD |
56 | _ENTRY(_stext); | 57 | _ENTRY(_stext); |
57 | _ENTRY(_start); | 58 | _ENTRY(_start); |
58 | 59 | ||
diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S index b56fecc93a16..18d8a1677c4d 100644 --- a/arch/powerpc/kernel/head_44x.S +++ b/arch/powerpc/kernel/head_44x.S | |||
@@ -28,6 +28,7 @@ | |||
28 | * option) any later version. | 28 | * option) any later version. |
29 | */ | 29 | */ |
30 | 30 | ||
31 | #include <linux/init.h> | ||
31 | #include <asm/processor.h> | 32 | #include <asm/processor.h> |
32 | #include <asm/page.h> | 33 | #include <asm/page.h> |
33 | #include <asm/mmu.h> | 34 | #include <asm/mmu.h> |
@@ -50,7 +51,7 @@ | |||
50 | * r7 - End of kernel command line string | 51 | * r7 - End of kernel command line string |
51 | * | 52 | * |
52 | */ | 53 | */ |
53 | .section .text.head, "ax" | 54 | __HEAD |
54 | _ENTRY(_stext); | 55 | _ENTRY(_stext); |
55 | _ENTRY(_start); | 56 | _ENTRY(_start); |
56 | /* | 57 | /* |
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S index 3c9452d4308b..52ff8c53b93c 100644 --- a/arch/powerpc/kernel/head_8xx.S +++ b/arch/powerpc/kernel/head_8xx.S | |||
@@ -19,6 +19,7 @@ | |||
19 | * | 19 | * |
20 | */ | 20 | */ |
21 | 21 | ||
22 | #include <linux/init.h> | ||
22 | #include <asm/processor.h> | 23 | #include <asm/processor.h> |
23 | #include <asm/page.h> | 24 | #include <asm/page.h> |
24 | #include <asm/mmu.h> | 25 | #include <asm/mmu.h> |
@@ -38,7 +39,7 @@ | |||
38 | #else | 39 | #else |
39 | #define DO_8xx_CPU6(val, reg) | 40 | #define DO_8xx_CPU6(val, reg) |
40 | #endif | 41 | #endif |
41 | .section .text.head, "ax" | 42 | __HEAD |
42 | _ENTRY(_stext); | 43 | _ENTRY(_stext); |
43 | _ENTRY(_start); | 44 | _ENTRY(_start); |
44 | 45 | ||
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S index 4c22620d009b..5bdcc06d294c 100644 --- a/arch/powerpc/kernel/head_fsl_booke.S +++ b/arch/powerpc/kernel/head_fsl_booke.S | |||
@@ -30,6 +30,7 @@ | |||
30 | * option) any later version. | 30 | * option) any later version. |
31 | */ | 31 | */ |
32 | 32 | ||
33 | #include <linux/init.h> | ||
33 | #include <linux/threads.h> | 34 | #include <linux/threads.h> |
34 | #include <asm/processor.h> | 35 | #include <asm/processor.h> |
35 | #include <asm/page.h> | 36 | #include <asm/page.h> |
@@ -53,7 +54,7 @@ | |||
53 | * r7 - End of kernel command line string | 54 | * r7 - End of kernel command line string |
54 | * | 55 | * |
55 | */ | 56 | */ |
56 | .section .text.head, "ax" | 57 | __HEAD |
57 | _ENTRY(_stext); | 58 | _ENTRY(_stext); |
58 | _ENTRY(_start); | 59 | _ENTRY(_start); |
59 | /* | 60 | /* |
diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S index b9ef1644a722..a047a6cfca4d 100644 --- a/arch/powerpc/kernel/vmlinux.lds.S +++ b/arch/powerpc/kernel/vmlinux.lds.S | |||
@@ -52,9 +52,10 @@ SECTIONS | |||
52 | /* Text and gots */ | 52 | /* Text and gots */ |
53 | .text : AT(ADDR(.text) - LOAD_OFFSET) { | 53 | .text : AT(ADDR(.text) - LOAD_OFFSET) { |
54 | ALIGN_FUNCTION(); | 54 | ALIGN_FUNCTION(); |
55 | *(.text.head) | 55 | HEAD_TEXT |
56 | _text = .; | 56 | _text = .; |
57 | *(.text .fixup .text.init.refok .exit.text.refok __ftr_alt_*) | 57 | /* careful! __ftr_alt_* sections need to be close to .text */ |
58 | *(.text .fixup __ftr_alt_* .ref.text) | ||
58 | SCHED_TEXT | 59 | SCHED_TEXT |
59 | LOCK_TEXT | 60 | LOCK_TEXT |
60 | KPROBES_TEXT | 61 | KPROBES_TEXT |
diff --git a/arch/powerpc/mm/tlb_nohash_low.S b/arch/powerpc/mm/tlb_nohash_low.S index 45fed3698349..3037911279b1 100644 --- a/arch/powerpc/mm/tlb_nohash_low.S +++ b/arch/powerpc/mm/tlb_nohash_low.S | |||
@@ -138,11 +138,7 @@ BEGIN_MMU_FTR_SECTION | |||
138 | andi. r3,r3,MMUCSR0_TLBFI@l | 138 | andi. r3,r3,MMUCSR0_TLBFI@l |
139 | bne 1b | 139 | bne 1b |
140 | MMU_FTR_SECTION_ELSE | 140 | MMU_FTR_SECTION_ELSE |
141 | BEGIN_MMU_FTR_SECTION_NESTED(96) | 141 | PPC_TLBILX_ALL(0,0) |
142 | PPC_TLBILX_ALL(0,r3) | ||
143 | MMU_FTR_SECTION_ELSE_NESTED(96) | ||
144 | PPC_TLBILX_ALL_EARLY(0,r3) | ||
145 | ALT_MMU_FTR_SECTION_END_NESTED_IFCLR(MMU_FTR_TLBILX_EARLY_OPCODE, 96) | ||
146 | ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_USE_TLBILX) | 142 | ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_USE_TLBILX) |
147 | msync | 143 | msync |
148 | isync | 144 | isync |
@@ -155,11 +151,7 @@ BEGIN_MMU_FTR_SECTION | |||
155 | wrteei 0 | 151 | wrteei 0 |
156 | mfspr r4,SPRN_MAS6 /* save MAS6 */ | 152 | mfspr r4,SPRN_MAS6 /* save MAS6 */ |
157 | mtspr SPRN_MAS6,r3 | 153 | mtspr SPRN_MAS6,r3 |
158 | BEGIN_MMU_FTR_SECTION_NESTED(96) | ||
159 | PPC_TLBILX_PID(0,0) | 154 | PPC_TLBILX_PID(0,0) |
160 | MMU_FTR_SECTION_ELSE_NESTED(96) | ||
161 | PPC_TLBILX_PID_EARLY(0,0) | ||
162 | ALT_MMU_FTR_SECTION_END_NESTED_IFCLR(MMU_FTR_TLBILX_EARLY_OPCODE, 96) | ||
163 | mtspr SPRN_MAS6,r4 /* restore MAS6 */ | 155 | mtspr SPRN_MAS6,r4 /* restore MAS6 */ |
164 | wrtee r10 | 156 | wrtee r10 |
165 | MMU_FTR_SECTION_ELSE | 157 | MMU_FTR_SECTION_ELSE |
@@ -193,16 +185,12 @@ BEGIN_MMU_FTR_SECTION | |||
193 | mtspr SPRN_MAS1,r4 | 185 | mtspr SPRN_MAS1,r4 |
194 | tlbwe | 186 | tlbwe |
195 | MMU_FTR_SECTION_ELSE | 187 | MMU_FTR_SECTION_ELSE |
196 | BEGIN_MMU_FTR_SECTION_NESTED(96) | ||
197 | PPC_TLBILX_VA(0,r3) | 188 | PPC_TLBILX_VA(0,r3) |
198 | MMU_FTR_SECTION_ELSE_NESTED(96) | ||
199 | PPC_TLBILX_VA_EARLY(0,r3) | ||
200 | ALT_MMU_FTR_SECTION_END_NESTED_IFCLR(MMU_FTR_TLBILX_EARLY_OPCODE, 96) | ||
201 | ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_USE_TLBILX) | 189 | ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_USE_TLBILX) |
202 | msync | 190 | msync |
203 | isync | 191 | isync |
204 | 1: wrtee r10 | 192 | 1: wrtee r10 |
205 | blr | 193 | blr |
206 | #elif | 194 | #else |
207 | #error Unsupported processor type ! | 195 | #error Unsupported processor type ! |
208 | #endif | 196 | #endif |
diff --git a/arch/powerpc/platforms/cell/Kconfig b/arch/powerpc/platforms/cell/Kconfig index 40e24c39ad06..50f17bdd3c16 100644 --- a/arch/powerpc/platforms/cell/Kconfig +++ b/arch/powerpc/platforms/cell/Kconfig | |||
@@ -13,7 +13,6 @@ config PPC_CELL_COMMON | |||
13 | config PPC_CELL_NATIVE | 13 | config PPC_CELL_NATIVE |
14 | bool | 14 | bool |
15 | select PPC_CELL_COMMON | 15 | select PPC_CELL_COMMON |
16 | select PPC_OF_PLATFORM_PCI | ||
17 | select MPIC | 16 | select MPIC |
18 | select IBM_NEW_EMAC_EMAC4 | 17 | select IBM_NEW_EMAC_EMAC4 |
19 | select IBM_NEW_EMAC_RGMII | 18 | select IBM_NEW_EMAC_RGMII |
@@ -25,6 +24,8 @@ config PPC_IBM_CELL_BLADE | |||
25 | bool "IBM Cell Blade" | 24 | bool "IBM Cell Blade" |
26 | depends on PPC64 && PPC_BOOK3S | 25 | depends on PPC64 && PPC_BOOK3S |
27 | select PPC_CELL_NATIVE | 26 | select PPC_CELL_NATIVE |
27 | select PPC_OF_PLATFORM_PCI | ||
28 | select PCI | ||
28 | select MMIO_NVRAM | 29 | select MMIO_NVRAM |
29 | select PPC_UDBG_16550 | 30 | select PPC_UDBG_16550 |
30 | select UDBG_RTAS_CONSOLE | 31 | select UDBG_RTAS_CONSOLE |
@@ -33,6 +34,8 @@ config PPC_CELLEB | |||
33 | bool "Toshiba's Cell Reference Set 'Celleb' Architecture" | 34 | bool "Toshiba's Cell Reference Set 'Celleb' Architecture" |
34 | depends on PPC64 && PPC_BOOK3S | 35 | depends on PPC64 && PPC_BOOK3S |
35 | select PPC_CELL_NATIVE | 36 | select PPC_CELL_NATIVE |
37 | select PPC_OF_PLATFORM_PCI | ||
38 | select PCI | ||
36 | select HAS_TXX9_SERIAL | 39 | select HAS_TXX9_SERIAL |
37 | select PPC_UDBG_BEAT | 40 | select PPC_UDBG_BEAT |
38 | select USB_OHCI_BIG_ENDIAN_MMIO | 41 | select USB_OHCI_BIG_ENDIAN_MMIO |
diff --git a/arch/powerpc/platforms/ps3/setup.c b/arch/powerpc/platforms/ps3/setup.c index 66181821322a..1a7b5ae0c83e 100644 --- a/arch/powerpc/platforms/ps3/setup.c +++ b/arch/powerpc/platforms/ps3/setup.c | |||
@@ -45,10 +45,6 @@ | |||
45 | DEFINE_MUTEX(ps3_gpu_mutex); | 45 | DEFINE_MUTEX(ps3_gpu_mutex); |
46 | EXPORT_SYMBOL_GPL(ps3_gpu_mutex); | 46 | EXPORT_SYMBOL_GPL(ps3_gpu_mutex); |
47 | 47 | ||
48 | #if !defined(CONFIG_SMP) | ||
49 | static void smp_send_stop(void) {} | ||
50 | #endif | ||
51 | |||
52 | static union ps3_firmware_version ps3_firmware_version; | 48 | static union ps3_firmware_version ps3_firmware_version; |
53 | 49 | ||
54 | void ps3_get_firmware_version(union ps3_firmware_version *v) | 50 | void ps3_get_firmware_version(union ps3_firmware_version *v) |
diff --git a/arch/s390/kernel/head.S b/arch/s390/kernel/head.S index bba14494ee00..22596d70fc2e 100644 --- a/arch/s390/kernel/head.S +++ b/arch/s390/kernel/head.S | |||
@@ -23,6 +23,7 @@ | |||
23 | * | 23 | * |
24 | */ | 24 | */ |
25 | 25 | ||
26 | #include <linux/init.h> | ||
26 | #include <asm/setup.h> | 27 | #include <asm/setup.h> |
27 | #include <asm/lowcore.h> | 28 | #include <asm/lowcore.h> |
28 | #include <asm/asm-offsets.h> | 29 | #include <asm/asm-offsets.h> |
@@ -35,7 +36,7 @@ | |||
35 | #define ARCH_OFFSET 0 | 36 | #define ARCH_OFFSET 0 |
36 | #endif | 37 | #endif |
37 | 38 | ||
38 | .section ".text.head","ax" | 39 | __HEAD |
39 | #ifndef CONFIG_IPL | 40 | #ifndef CONFIG_IPL |
40 | .org 0 | 41 | .org 0 |
41 | .long 0x00080000,0x80000000+startup # Just a restart PSW | 42 | .long 0x00080000,0x80000000+startup # Just a restart PSW |
diff --git a/arch/s390/kernel/vmlinux.lds.S b/arch/s390/kernel/vmlinux.lds.S index 7a2063eb88f0..89399b8756c2 100644 --- a/arch/s390/kernel/vmlinux.lds.S +++ b/arch/s390/kernel/vmlinux.lds.S | |||
@@ -29,8 +29,8 @@ SECTIONS | |||
29 | . = 0x00000000; | 29 | . = 0x00000000; |
30 | .text : { | 30 | .text : { |
31 | _text = .; /* Text and read-only data */ | 31 | _text = .; /* Text and read-only data */ |
32 | *(.text.head) | 32 | HEAD_TEXT |
33 | TEXT_TEXT | 33 | TEXT_TEXT |
34 | SCHED_TEXT | 34 | SCHED_TEXT |
35 | LOCK_TEXT | 35 | LOCK_TEXT |
36 | KPROBES_TEXT | 36 | KPROBES_TEXT |
diff --git a/arch/sh/configs/sh7785lcr_defconfig b/arch/sh/configs/sh7785lcr_defconfig index 8a42bbef1f50..e4fac2efc055 100644 --- a/arch/sh/configs/sh7785lcr_defconfig +++ b/arch/sh/configs/sh7785lcr_defconfig | |||
@@ -1,10 +1,11 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.29 | 3 | # Linux kernel version: 2.6.30-rc2 |
4 | # Thu Apr 2 19:15:58 2009 | 4 | # Wed Apr 22 19:17:56 2009 |
5 | # | 5 | # |
6 | CONFIG_SUPERH=y | 6 | CONFIG_SUPERH=y |
7 | CONFIG_SUPERH32=y | 7 | CONFIG_SUPERH32=y |
8 | # CONFIG_SUPERH64 is not set | ||
8 | CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig" | 9 | CONFIG_ARCH_DEFCONFIG="arch/sh/configs/shx3_defconfig" |
9 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | 10 | CONFIG_RWSEM_GENERIC_SPINLOCK=y |
10 | CONFIG_GENERIC_BUG=y | 11 | CONFIG_GENERIC_BUG=y |
@@ -79,6 +80,7 @@ CONFIG_SYSCTL_SYSCALL=y | |||
79 | CONFIG_KALLSYMS=y | 80 | CONFIG_KALLSYMS=y |
80 | # CONFIG_KALLSYMS_ALL is not set | 81 | # CONFIG_KALLSYMS_ALL is not set |
81 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 82 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
83 | # CONFIG_STRIP_ASM_SYMS is not set | ||
82 | CONFIG_HOTPLUG=y | 84 | CONFIG_HOTPLUG=y |
83 | CONFIG_PRINTK=y | 85 | CONFIG_PRINTK=y |
84 | CONFIG_BUG=y | 86 | CONFIG_BUG=y |
@@ -98,6 +100,7 @@ CONFIG_SLAB=y | |||
98 | # CONFIG_SLUB is not set | 100 | # CONFIG_SLUB is not set |
99 | # CONFIG_SLOB is not set | 101 | # CONFIG_SLOB is not set |
100 | CONFIG_PROFILING=y | 102 | CONFIG_PROFILING=y |
103 | # CONFIG_MARKERS is not set | ||
101 | # CONFIG_OPROFILE is not set | 104 | # CONFIG_OPROFILE is not set |
102 | CONFIG_HAVE_OPROFILE=y | 105 | CONFIG_HAVE_OPROFILE=y |
103 | # CONFIG_KPROBES is not set | 106 | # CONFIG_KPROBES is not set |
@@ -106,6 +109,8 @@ CONFIG_HAVE_KPROBES=y | |||
106 | CONFIG_HAVE_KRETPROBES=y | 109 | CONFIG_HAVE_KRETPROBES=y |
107 | CONFIG_HAVE_ARCH_TRACEHOOK=y | 110 | CONFIG_HAVE_ARCH_TRACEHOOK=y |
108 | CONFIG_HAVE_CLK=y | 111 | CONFIG_HAVE_CLK=y |
112 | CONFIG_HAVE_DMA_API_DEBUG=y | ||
113 | # CONFIG_SLOW_WORK is not set | ||
109 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | 114 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y |
110 | CONFIG_SLABINFO=y | 115 | CONFIG_SLABINFO=y |
111 | CONFIG_RT_MUTEXES=y | 116 | CONFIG_RT_MUTEXES=y |
@@ -118,7 +123,6 @@ CONFIG_MODULE_UNLOAD=y | |||
118 | # CONFIG_MODULE_SRCVERSION_ALL is not set | 123 | # CONFIG_MODULE_SRCVERSION_ALL is not set |
119 | CONFIG_BLOCK=y | 124 | CONFIG_BLOCK=y |
120 | # CONFIG_LBD is not set | 125 | # CONFIG_LBD is not set |
121 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
122 | # CONFIG_BLK_DEV_BSG is not set | 126 | # CONFIG_BLK_DEV_BSG is not set |
123 | # CONFIG_BLK_DEV_INTEGRITY is not set | 127 | # CONFIG_BLK_DEV_INTEGRITY is not set |
124 | 128 | ||
@@ -166,6 +170,7 @@ CONFIG_CPU_SHX2=y | |||
166 | # CONFIG_CPU_SUBTYPE_SH7760 is not set | 170 | # CONFIG_CPU_SUBTYPE_SH7760 is not set |
167 | # CONFIG_CPU_SUBTYPE_SH4_202 is not set | 171 | # CONFIG_CPU_SUBTYPE_SH4_202 is not set |
168 | # CONFIG_CPU_SUBTYPE_SH7723 is not set | 172 | # CONFIG_CPU_SUBTYPE_SH7723 is not set |
173 | # CONFIG_CPU_SUBTYPE_SH7724 is not set | ||
169 | # CONFIG_CPU_SUBTYPE_SH7763 is not set | 174 | # CONFIG_CPU_SUBTYPE_SH7763 is not set |
170 | # CONFIG_CPU_SUBTYPE_SH7770 is not set | 175 | # CONFIG_CPU_SUBTYPE_SH7770 is not set |
171 | # CONFIG_CPU_SUBTYPE_SH7780 is not set | 176 | # CONFIG_CPU_SUBTYPE_SH7780 is not set |
@@ -175,8 +180,6 @@ CONFIG_CPU_SUBTYPE_SH7785=y | |||
175 | # CONFIG_CPU_SUBTYPE_SH7343 is not set | 180 | # CONFIG_CPU_SUBTYPE_SH7343 is not set |
176 | # CONFIG_CPU_SUBTYPE_SH7722 is not set | 181 | # CONFIG_CPU_SUBTYPE_SH7722 is not set |
177 | # CONFIG_CPU_SUBTYPE_SH7366 is not set | 182 | # CONFIG_CPU_SUBTYPE_SH7366 is not set |
178 | # CONFIG_CPU_SUBTYPE_SH5_101 is not set | ||
179 | # CONFIG_CPU_SUBTYPE_SH5_103 is not set | ||
180 | 183 | ||
181 | # | 184 | # |
182 | # Memory management options | 185 | # Memory management options |
@@ -186,38 +189,31 @@ CONFIG_MMU=y | |||
186 | CONFIG_PAGE_OFFSET=0x80000000 | 189 | CONFIG_PAGE_OFFSET=0x80000000 |
187 | CONFIG_MEMORY_START=0x08000000 | 190 | CONFIG_MEMORY_START=0x08000000 |
188 | CONFIG_MEMORY_SIZE=0x08000000 | 191 | CONFIG_MEMORY_SIZE=0x08000000 |
189 | # CONFIG_29BIT is not set | 192 | CONFIG_29BIT=y |
190 | CONFIG_32BIT=y | 193 | # CONFIG_PMB_ENABLE is not set |
191 | CONFIG_PMB_ENABLE=y | ||
192 | # CONFIG_PMB is not set | ||
193 | CONFIG_PMB_FIXED=y | ||
194 | # CONFIG_X2TLB is not set | 194 | # CONFIG_X2TLB is not set |
195 | CONFIG_VSYSCALL=y | 195 | CONFIG_VSYSCALL=y |
196 | # CONFIG_NUMA is not set | 196 | # CONFIG_NUMA is not set |
197 | CONFIG_ARCH_FLATMEM_ENABLE=y | 197 | CONFIG_ARCH_FLATMEM_ENABLE=y |
198 | CONFIG_ARCH_SPARSEMEM_ENABLE=y | 198 | CONFIG_ARCH_SPARSEMEM_ENABLE=y |
199 | CONFIG_ARCH_SPARSEMEM_DEFAULT=y | 199 | CONFIG_ARCH_SPARSEMEM_DEFAULT=y |
200 | CONFIG_MAX_ACTIVE_REGIONS=2 | 200 | CONFIG_MAX_ACTIVE_REGIONS=1 |
201 | CONFIG_ARCH_POPULATES_NODE_MAP=y | 201 | CONFIG_ARCH_POPULATES_NODE_MAP=y |
202 | CONFIG_ARCH_SELECT_MEMORY_MODEL=y | 202 | CONFIG_ARCH_SELECT_MEMORY_MODEL=y |
203 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y | ||
204 | CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y | ||
205 | CONFIG_PAGE_SIZE_4KB=y | 203 | CONFIG_PAGE_SIZE_4KB=y |
206 | # CONFIG_PAGE_SIZE_8KB is not set | 204 | # CONFIG_PAGE_SIZE_8KB is not set |
207 | # CONFIG_PAGE_SIZE_16KB is not set | 205 | # CONFIG_PAGE_SIZE_16KB is not set |
208 | # CONFIG_PAGE_SIZE_64KB is not set | 206 | # CONFIG_PAGE_SIZE_64KB is not set |
209 | CONFIG_ENTRY_OFFSET=0x00001000 | 207 | CONFIG_ENTRY_OFFSET=0x00001000 |
210 | CONFIG_SELECT_MEMORY_MODEL=y | 208 | CONFIG_SELECT_MEMORY_MODEL=y |
211 | # CONFIG_FLATMEM_MANUAL is not set | 209 | CONFIG_FLATMEM_MANUAL=y |
212 | # CONFIG_DISCONTIGMEM_MANUAL is not set | 210 | # CONFIG_DISCONTIGMEM_MANUAL is not set |
213 | CONFIG_SPARSEMEM_MANUAL=y | 211 | # CONFIG_SPARSEMEM_MANUAL is not set |
214 | CONFIG_SPARSEMEM=y | 212 | CONFIG_FLATMEM=y |
215 | CONFIG_HAVE_MEMORY_PRESENT=y | 213 | CONFIG_FLAT_NODE_MEM_MAP=y |
216 | CONFIG_SPARSEMEM_STATIC=y | 214 | CONFIG_SPARSEMEM_STATIC=y |
217 | # CONFIG_MEMORY_HOTPLUG is not set | ||
218 | CONFIG_PAGEFLAGS_EXTENDED=y | 215 | CONFIG_PAGEFLAGS_EXTENDED=y |
219 | CONFIG_SPLIT_PTLOCK_CPUS=4 | 216 | CONFIG_SPLIT_PTLOCK_CPUS=4 |
220 | CONFIG_MIGRATION=y | ||
221 | # CONFIG_PHYS_ADDR_T_64BIT is not set | 217 | # CONFIG_PHYS_ADDR_T_64BIT is not set |
222 | CONFIG_ZONE_DMA_FLAG=0 | 218 | CONFIG_ZONE_DMA_FLAG=0 |
223 | CONFIG_NR_QUICK=2 | 219 | CONFIG_NR_QUICK=2 |
@@ -249,6 +245,7 @@ CONFIG_CPU_HAS_FPU=y | |||
249 | # | 245 | # |
250 | # CONFIG_SH_HIGHLANDER is not set | 246 | # CONFIG_SH_HIGHLANDER is not set |
251 | CONFIG_SH_SH7785LCR=y | 247 | CONFIG_SH_SH7785LCR=y |
248 | CONFIG_SH_SH7785LCR_29BIT_PHYSMAPS=y | ||
252 | 249 | ||
253 | # | 250 | # |
254 | # Timer and clock configuration | 251 | # Timer and clock configuration |
@@ -672,6 +669,7 @@ CONFIG_NETDEV_1000=y | |||
672 | # CONFIG_E1000E is not set | 669 | # CONFIG_E1000E is not set |
673 | # CONFIG_IP1000 is not set | 670 | # CONFIG_IP1000 is not set |
674 | # CONFIG_IGB is not set | 671 | # CONFIG_IGB is not set |
672 | # CONFIG_IGBVF is not set | ||
675 | # CONFIG_NS83820 is not set | 673 | # CONFIG_NS83820 is not set |
676 | # CONFIG_HAMACHI is not set | 674 | # CONFIG_HAMACHI is not set |
677 | # CONFIG_YELLOWFIN is not set | 675 | # CONFIG_YELLOWFIN is not set |
@@ -1009,15 +1007,17 @@ CONFIG_USB_HID=y | |||
1009 | # | 1007 | # |
1010 | # Special HID drivers | 1008 | # Special HID drivers |
1011 | # | 1009 | # |
1012 | CONFIG_HID_COMPAT=y | ||
1013 | CONFIG_HID_A4TECH=y | 1010 | CONFIG_HID_A4TECH=y |
1014 | CONFIG_HID_APPLE=y | 1011 | CONFIG_HID_APPLE=y |
1015 | CONFIG_HID_BELKIN=y | 1012 | CONFIG_HID_BELKIN=y |
1016 | CONFIG_HID_CHERRY=y | 1013 | CONFIG_HID_CHERRY=y |
1017 | CONFIG_HID_CHICONY=y | 1014 | CONFIG_HID_CHICONY=y |
1018 | CONFIG_HID_CYPRESS=y | 1015 | CONFIG_HID_CYPRESS=y |
1016 | # CONFIG_DRAGONRISE_FF is not set | ||
1019 | CONFIG_HID_EZKEY=y | 1017 | CONFIG_HID_EZKEY=y |
1018 | # CONFIG_HID_KYE is not set | ||
1020 | CONFIG_HID_GYRATION=y | 1019 | CONFIG_HID_GYRATION=y |
1020 | # CONFIG_HID_KENSINGTON is not set | ||
1021 | CONFIG_HID_LOGITECH=y | 1021 | CONFIG_HID_LOGITECH=y |
1022 | # CONFIG_LOGITECH_FF is not set | 1022 | # CONFIG_LOGITECH_FF is not set |
1023 | # CONFIG_LOGIRUMBLEPAD2_FF is not set | 1023 | # CONFIG_LOGIRUMBLEPAD2_FF is not set |
@@ -1218,6 +1218,7 @@ CONFIG_EXT2_FS=y | |||
1218 | # CONFIG_EXT2_FS_XATTR is not set | 1218 | # CONFIG_EXT2_FS_XATTR is not set |
1219 | # CONFIG_EXT2_FS_XIP is not set | 1219 | # CONFIG_EXT2_FS_XIP is not set |
1220 | CONFIG_EXT3_FS=y | 1220 | CONFIG_EXT3_FS=y |
1221 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
1221 | CONFIG_EXT3_FS_XATTR=y | 1222 | CONFIG_EXT3_FS_XATTR=y |
1222 | # CONFIG_EXT3_FS_POSIX_ACL is not set | 1223 | # CONFIG_EXT3_FS_POSIX_ACL is not set |
1223 | # CONFIG_EXT3_FS_SECURITY is not set | 1224 | # CONFIG_EXT3_FS_SECURITY is not set |
@@ -1240,6 +1241,11 @@ CONFIG_INOTIFY_USER=y | |||
1240 | # CONFIG_FUSE_FS is not set | 1241 | # CONFIG_FUSE_FS is not set |
1241 | 1242 | ||
1242 | # | 1243 | # |
1244 | # Caches | ||
1245 | # | ||
1246 | # CONFIG_FSCACHE is not set | ||
1247 | |||
1248 | # | ||
1243 | # CD-ROM/DVD Filesystems | 1249 | # CD-ROM/DVD Filesystems |
1244 | # | 1250 | # |
1245 | # CONFIG_ISO9660_FS is not set | 1251 | # CONFIG_ISO9660_FS is not set |
@@ -1289,6 +1295,7 @@ CONFIG_MINIX_FS=y | |||
1289 | # CONFIG_ROMFS_FS is not set | 1295 | # CONFIG_ROMFS_FS is not set |
1290 | # CONFIG_SYSV_FS is not set | 1296 | # CONFIG_SYSV_FS is not set |
1291 | # CONFIG_UFS_FS is not set | 1297 | # CONFIG_UFS_FS is not set |
1298 | # CONFIG_NILFS2_FS is not set | ||
1292 | CONFIG_NETWORK_FILESYSTEMS=y | 1299 | CONFIG_NETWORK_FILESYSTEMS=y |
1293 | CONFIG_NFS_FS=y | 1300 | CONFIG_NFS_FS=y |
1294 | CONFIG_NFS_V3=y | 1301 | CONFIG_NFS_V3=y |
@@ -1377,6 +1384,9 @@ CONFIG_DEBUG_KERNEL=y | |||
1377 | CONFIG_DETECT_SOFTLOCKUP=y | 1384 | CONFIG_DETECT_SOFTLOCKUP=y |
1378 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | 1385 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set |
1379 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | 1386 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 |
1387 | CONFIG_DETECT_HUNG_TASK=y | ||
1388 | # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set | ||
1389 | CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 | ||
1380 | CONFIG_SCHED_DEBUG=y | 1390 | CONFIG_SCHED_DEBUG=y |
1381 | # CONFIG_SCHEDSTATS is not set | 1391 | # CONFIG_SCHEDSTATS is not set |
1382 | # CONFIG_TIMER_STATS is not set | 1392 | # CONFIG_TIMER_STATS is not set |
@@ -1413,6 +1423,7 @@ CONFIG_SYSCTL_SYSCALL_CHECK=y | |||
1413 | CONFIG_HAVE_FUNCTION_TRACER=y | 1423 | CONFIG_HAVE_FUNCTION_TRACER=y |
1414 | CONFIG_HAVE_DYNAMIC_FTRACE=y | 1424 | CONFIG_HAVE_DYNAMIC_FTRACE=y |
1415 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | 1425 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y |
1426 | CONFIG_TRACING_SUPPORT=y | ||
1416 | 1427 | ||
1417 | # | 1428 | # |
1418 | # Tracers | 1429 | # Tracers |
@@ -1422,9 +1433,14 @@ CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | |||
1422 | # CONFIG_PREEMPT_TRACER is not set | 1433 | # CONFIG_PREEMPT_TRACER is not set |
1423 | # CONFIG_SCHED_TRACER is not set | 1434 | # CONFIG_SCHED_TRACER is not set |
1424 | # CONFIG_CONTEXT_SWITCH_TRACER is not set | 1435 | # CONFIG_CONTEXT_SWITCH_TRACER is not set |
1436 | # CONFIG_EVENT_TRACER is not set | ||
1425 | # CONFIG_BOOT_TRACER is not set | 1437 | # CONFIG_BOOT_TRACER is not set |
1426 | # CONFIG_TRACE_BRANCH_PROFILING is not set | 1438 | # CONFIG_TRACE_BRANCH_PROFILING is not set |
1427 | # CONFIG_STACK_TRACER is not set | 1439 | # CONFIG_STACK_TRACER is not set |
1440 | # CONFIG_KMEMTRACE is not set | ||
1441 | # CONFIG_WORKQUEUE_TRACER is not set | ||
1442 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
1443 | # CONFIG_DMA_API_DEBUG is not set | ||
1428 | # CONFIG_SAMPLES is not set | 1444 | # CONFIG_SAMPLES is not set |
1429 | CONFIG_HAVE_ARCH_KGDB=y | 1445 | CONFIG_HAVE_ARCH_KGDB=y |
1430 | # CONFIG_KGDB is not set | 1446 | # CONFIG_KGDB is not set |
@@ -1542,6 +1558,7 @@ CONFIG_CRYPTO_DES=y | |||
1542 | # | 1558 | # |
1543 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | 1559 | # CONFIG_CRYPTO_ANSI_CPRNG is not set |
1544 | # CONFIG_CRYPTO_HW is not set | 1560 | # CONFIG_CRYPTO_HW is not set |
1561 | # CONFIG_BINARY_PRINTF is not set | ||
1545 | 1562 | ||
1546 | # | 1563 | # |
1547 | # Library routines | 1564 | # Library routines |
diff --git a/arch/sh/include/asm/ptrace.h b/arch/sh/include/asm/ptrace.h index d3f6caa936b0..68e20ff9aa9b 100644 --- a/arch/sh/include/asm/ptrace.h +++ b/arch/sh/include/asm/ptrace.h | |||
@@ -9,7 +9,7 @@ | |||
9 | struct pt_regs { | 9 | struct pt_regs { |
10 | unsigned long long pc; | 10 | unsigned long long pc; |
11 | unsigned long long sr; | 11 | unsigned long long sr; |
12 | unsigned long long syscall_nr; | 12 | long long syscall_nr; |
13 | unsigned long long regs[63]; | 13 | unsigned long long regs[63]; |
14 | unsigned long long tregs[8]; | 14 | unsigned long long tregs[8]; |
15 | unsigned long long pad[2]; | 15 | unsigned long long pad[2]; |
diff --git a/arch/sh/kernel/cpu/sh5/entry.S b/arch/sh/kernel/cpu/sh5/entry.S index e640c63d5811..7e49cb812f8b 100644 --- a/arch/sh/kernel/cpu/sh5/entry.S +++ b/arch/sh/kernel/cpu/sh5/entry.S | |||
@@ -10,6 +10,7 @@ | |||
10 | * for more details. | 10 | * for more details. |
11 | */ | 11 | */ |
12 | #include <linux/errno.h> | 12 | #include <linux/errno.h> |
13 | #include <linux/init.h> | ||
13 | #include <linux/sys.h> | 14 | #include <linux/sys.h> |
14 | #include <cpu/registers.h> | 15 | #include <cpu/registers.h> |
15 | #include <asm/processor.h> | 16 | #include <asm/processor.h> |
@@ -2058,10 +2059,10 @@ asm_uaccess_end: | |||
2058 | 2059 | ||
2059 | 2060 | ||
2060 | /* | 2061 | /* |
2061 | * --- .text.init Section | 2062 | * --- .init.text Section |
2062 | */ | 2063 | */ |
2063 | 2064 | ||
2064 | .section .text.init, "ax" | 2065 | __INIT |
2065 | 2066 | ||
2066 | /* | 2067 | /* |
2067 | * void trap_init (void) | 2068 | * void trap_init (void) |
diff --git a/arch/sh/kernel/head_32.S b/arch/sh/kernel/head_32.S index 788605ff7088..a78be74b8d3e 100644 --- a/arch/sh/kernel/head_32.S +++ b/arch/sh/kernel/head_32.S | |||
@@ -10,6 +10,7 @@ | |||
10 | * | 10 | * |
11 | * Head.S contains the SH exception handlers and startup code. | 11 | * Head.S contains the SH exception handlers and startup code. |
12 | */ | 12 | */ |
13 | #include <linux/init.h> | ||
13 | #include <linux/linkage.h> | 14 | #include <linux/linkage.h> |
14 | #include <asm/thread_info.h> | 15 | #include <asm/thread_info.h> |
15 | 16 | ||
@@ -40,7 +41,7 @@ ENTRY(empty_zero_page) | |||
40 | 1: | 41 | 1: |
41 | .skip PAGE_SIZE - empty_zero_page - 1b | 42 | .skip PAGE_SIZE - empty_zero_page - 1b |
42 | 43 | ||
43 | .section .text.head, "ax" | 44 | __HEAD |
44 | 45 | ||
45 | /* | 46 | /* |
46 | * Condition at the entry of _stext: | 47 | * Condition at the entry of _stext: |
diff --git a/arch/sh/kernel/head_64.S b/arch/sh/kernel/head_64.S index 7ccfb995a398..3ea765844c74 100644 --- a/arch/sh/kernel/head_64.S +++ b/arch/sh/kernel/head_64.S | |||
@@ -8,6 +8,9 @@ | |||
8 | * License. See the file "COPYING" in the main directory of this archive | 8 | * License. See the file "COPYING" in the main directory of this archive |
9 | * for more details. | 9 | * for more details. |
10 | */ | 10 | */ |
11 | |||
12 | #include <linux/init.h> | ||
13 | |||
11 | #include <asm/page.h> | 14 | #include <asm/page.h> |
12 | #include <asm/cache.h> | 15 | #include <asm/cache.h> |
13 | #include <asm/tlb.h> | 16 | #include <asm/tlb.h> |
@@ -110,7 +113,7 @@ empty_bad_pte_table: | |||
110 | fpu_in_use: .quad 0 | 113 | fpu_in_use: .quad 0 |
111 | 114 | ||
112 | 115 | ||
113 | .section .text.head, "ax" | 116 | __HEAD |
114 | .balign L1_CACHE_BYTES | 117 | .balign L1_CACHE_BYTES |
115 | /* | 118 | /* |
116 | * Condition at the entry of __stext: | 119 | * Condition at the entry of __stext: |
diff --git a/arch/sh/kernel/vmlinux_32.lds.S b/arch/sh/kernel/vmlinux_32.lds.S index d0b2a715cd14..dd9b2ee1312d 100644 --- a/arch/sh/kernel/vmlinux_32.lds.S +++ b/arch/sh/kernel/vmlinux_32.lds.S | |||
@@ -31,7 +31,7 @@ SECTIONS | |||
31 | } = 0 | 31 | } = 0 |
32 | 32 | ||
33 | .text : { | 33 | .text : { |
34 | *(.text.head) | 34 | HEAD_TEXT |
35 | TEXT_TEXT | 35 | TEXT_TEXT |
36 | SCHED_TEXT | 36 | SCHED_TEXT |
37 | LOCK_TEXT | 37 | LOCK_TEXT |
diff --git a/arch/sh/kernel/vmlinux_64.lds.S b/arch/sh/kernel/vmlinux_64.lds.S index 33fa46451406..69664460c688 100644 --- a/arch/sh/kernel/vmlinux_64.lds.S +++ b/arch/sh/kernel/vmlinux_64.lds.S | |||
@@ -42,7 +42,7 @@ SECTIONS | |||
42 | } = 0 | 42 | } = 0 |
43 | 43 | ||
44 | .text : C_PHYS(.text) { | 44 | .text : C_PHYS(.text) { |
45 | *(.text.head) | 45 | HEAD_TEXT |
46 | TEXT_TEXT | 46 | TEXT_TEXT |
47 | *(.text64) | 47 | *(.text64) |
48 | *(.text..SHmedia32) | 48 | *(.text..SHmedia32) |
diff --git a/arch/sparc/kernel/head_32.S b/arch/sparc/kernel/head_32.S index f0b4b516304f..6b4d8acc4c83 100644 --- a/arch/sparc/kernel/head_32.S +++ b/arch/sparc/kernel/head_32.S | |||
@@ -72,7 +72,7 @@ sun4e_notsup: | |||
72 | .align 4 | 72 | .align 4 |
73 | 73 | ||
74 | /* The Sparc trap table, bootloader gives us control at _start. */ | 74 | /* The Sparc trap table, bootloader gives us control at _start. */ |
75 | .section .text.head,"ax" | 75 | __HEAD |
76 | .globl start, _stext, _start, __stext | 76 | .globl start, _stext, _start, __stext |
77 | .globl trapbase | 77 | .globl trapbase |
78 | _start: /* danger danger */ | 78 | _start: /* danger danger */ |
@@ -735,7 +735,7 @@ go_to_highmem: | |||
735 | nop | 735 | nop |
736 | 736 | ||
737 | /* The code above should be at beginning and we have to take care about | 737 | /* The code above should be at beginning and we have to take care about |
738 | * short jumps, as branching to .text.init section from .text is usually | 738 | * short jumps, as branching to .init.text section from .text is usually |
739 | * impossible */ | 739 | * impossible */ |
740 | __INIT | 740 | __INIT |
741 | /* Acquire boot time privileged register values, this will help debugging. | 741 | /* Acquire boot time privileged register values, this will help debugging. |
diff --git a/arch/sparc/kernel/head_64.S b/arch/sparc/kernel/head_64.S index 3a1b7bf03cff..91bf4c7f79b9 100644 --- a/arch/sparc/kernel/head_64.S +++ b/arch/sparc/kernel/head_64.S | |||
@@ -467,7 +467,7 @@ jump_to_sun4u_init: | |||
467 | jmpl %g2 + %g0, %g0 | 467 | jmpl %g2 + %g0, %g0 |
468 | nop | 468 | nop |
469 | 469 | ||
470 | .section .text.init.refok | 470 | __REF |
471 | sun4u_init: | 471 | sun4u_init: |
472 | BRANCH_IF_SUN4V(g1, sun4v_init) | 472 | BRANCH_IF_SUN4V(g1, sun4v_init) |
473 | 473 | ||
diff --git a/arch/sparc/kernel/vmlinux.lds.S b/arch/sparc/kernel/vmlinux.lds.S index 76267085b13b..fcbbd000ec08 100644 --- a/arch/sparc/kernel/vmlinux.lds.S +++ b/arch/sparc/kernel/vmlinux.lds.S | |||
@@ -41,7 +41,7 @@ SECTIONS | |||
41 | .text TEXTSTART : | 41 | .text TEXTSTART : |
42 | { | 42 | { |
43 | _text = .; | 43 | _text = .; |
44 | *(.text.head) | 44 | HEAD_TEXT |
45 | TEXT_TEXT | 45 | TEXT_TEXT |
46 | SCHED_TEXT | 46 | SCHED_TEXT |
47 | LOCK_TEXT | 47 | LOCK_TEXT |
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index c9086e6307a5..df9e885eee14 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig | |||
@@ -277,6 +277,7 @@ config SPARSE_IRQ | |||
277 | config NUMA_MIGRATE_IRQ_DESC | 277 | config NUMA_MIGRATE_IRQ_DESC |
278 | bool "Move irq desc when changing irq smp_affinity" | 278 | bool "Move irq desc when changing irq smp_affinity" |
279 | depends on SPARSE_IRQ && NUMA | 279 | depends on SPARSE_IRQ && NUMA |
280 | depends on BROKEN | ||
280 | default n | 281 | default n |
281 | ---help--- | 282 | ---help--- |
282 | This enables moving irq_desc to cpu/node that irq will use handled. | 283 | This enables moving irq_desc to cpu/node that irq will use handled. |
@@ -664,6 +665,7 @@ config MAXSMP | |||
664 | 665 | ||
665 | config NR_CPUS | 666 | config NR_CPUS |
666 | int "Maximum number of CPUs" if SMP && !MAXSMP | 667 | int "Maximum number of CPUs" if SMP && !MAXSMP |
668 | range 2 8 if SMP && X86_32 && !X86_BIGSMP | ||
667 | range 2 512 if SMP && !MAXSMP | 669 | range 2 512 if SMP && !MAXSMP |
668 | default "1" if !SMP | 670 | default "1" if !SMP |
669 | default "4096" if MAXSMP | 671 | default "4096" if MAXSMP |
diff --git a/arch/x86/Makefile b/arch/x86/Makefile index f05d8c91d9e5..8c86b72afdc2 100644 --- a/arch/x86/Makefile +++ b/arch/x86/Makefile | |||
@@ -153,7 +153,7 @@ endif | |||
153 | 153 | ||
154 | boot := arch/x86/boot | 154 | boot := arch/x86/boot |
155 | 155 | ||
156 | BOOT_TARGETS = bzlilo bzdisk fdimage fdimage144 fdimage288 isoimage install | 156 | BOOT_TARGETS = bzlilo bzdisk fdimage fdimage144 fdimage288 isoimage |
157 | 157 | ||
158 | PHONY += bzImage $(BOOT_TARGETS) | 158 | PHONY += bzImage $(BOOT_TARGETS) |
159 | 159 | ||
@@ -171,6 +171,10 @@ bzImage: vmlinux | |||
171 | $(BOOT_TARGETS): vmlinux | 171 | $(BOOT_TARGETS): vmlinux |
172 | $(Q)$(MAKE) $(build)=$(boot) $@ | 172 | $(Q)$(MAKE) $(build)=$(boot) $@ |
173 | 173 | ||
174 | PHONY += install | ||
175 | install: | ||
176 | $(Q)$(MAKE) $(build)=$(boot) $@ | ||
177 | |||
174 | PHONY += vdso_install | 178 | PHONY += vdso_install |
175 | vdso_install: | 179 | vdso_install: |
176 | $(Q)$(MAKE) $(build)=arch/x86/vdso $@ | 180 | $(Q)$(MAKE) $(build)=arch/x86/vdso $@ |
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h index 563933e06a35..4f8c199584e7 100644 --- a/arch/x86/include/asm/mce.h +++ b/arch/x86/include/asm/mce.h | |||
@@ -137,6 +137,7 @@ DECLARE_PER_CPU(mce_banks_t, mce_poll_banks); | |||
137 | enum mcp_flags { | 137 | enum mcp_flags { |
138 | MCP_TIMESTAMP = (1 << 0), /* log time stamp */ | 138 | MCP_TIMESTAMP = (1 << 0), /* log time stamp */ |
139 | MCP_UC = (1 << 1), /* log uncorrected errors */ | 139 | MCP_UC = (1 << 1), /* log uncorrected errors */ |
140 | MCP_DONTLOG = (1 << 2), /* only clear, don't log */ | ||
140 | }; | 141 | }; |
141 | extern void machine_check_poll(enum mcp_flags flags, mce_banks_t *b); | 142 | extern void machine_check_poll(enum mcp_flags flags, mce_banks_t *b); |
142 | 143 | ||
diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h index 892b119dba6f..f44b49abca49 100644 --- a/arch/x86/include/asm/topology.h +++ b/arch/x86/include/asm/topology.h | |||
@@ -200,7 +200,7 @@ static inline void arch_fix_phys_package_id(int num, u32 slot) | |||
200 | } | 200 | } |
201 | 201 | ||
202 | struct pci_bus; | 202 | struct pci_bus; |
203 | void set_pci_bus_resources_arch_default(struct pci_bus *b); | 203 | void x86_pci_root_bus_res_quirks(struct pci_bus *b); |
204 | 204 | ||
205 | #ifdef CONFIG_SMP | 205 | #ifdef CONFIG_SMP |
206 | #define mc_capable() (cpumask_weight(cpu_core_mask(0)) != nr_cpu_ids) | 206 | #define mc_capable() (cpumask_weight(cpu_core_mask(0)) != nr_cpu_ids) |
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c index a2789e42e162..30da617d18e4 100644 --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c | |||
@@ -3670,12 +3670,14 @@ int arch_setup_hpet_msi(unsigned int irq) | |||
3670 | { | 3670 | { |
3671 | int ret; | 3671 | int ret; |
3672 | struct msi_msg msg; | 3672 | struct msi_msg msg; |
3673 | struct irq_desc *desc = irq_to_desc(irq); | ||
3673 | 3674 | ||
3674 | ret = msi_compose_msg(NULL, irq, &msg); | 3675 | ret = msi_compose_msg(NULL, irq, &msg); |
3675 | if (ret < 0) | 3676 | if (ret < 0) |
3676 | return ret; | 3677 | return ret; |
3677 | 3678 | ||
3678 | hpet_msi_write(irq, &msg); | 3679 | hpet_msi_write(irq, &msg); |
3680 | desc->status |= IRQ_MOVE_PCNTXT; | ||
3679 | set_irq_chip_and_handler_name(irq, &hpet_msi_type, handle_edge_irq, | 3681 | set_irq_chip_and_handler_name(irq, &hpet_msi_type, handle_edge_irq, |
3680 | "edge"); | 3682 | "edge"); |
3681 | 3683 | ||
diff --git a/arch/x86/kernel/apic/nmi.c b/arch/x86/kernel/apic/nmi.c index d6bd62407152..ce4fbfa315a1 100644 --- a/arch/x86/kernel/apic/nmi.c +++ b/arch/x86/kernel/apic/nmi.c | |||
@@ -138,7 +138,7 @@ int __init check_nmi_watchdog(void) | |||
138 | if (!prev_nmi_count) | 138 | if (!prev_nmi_count) |
139 | goto error; | 139 | goto error; |
140 | 140 | ||
141 | alloc_cpumask_var(&backtrace_mask, GFP_KERNEL); | 141 | alloc_cpumask_var(&backtrace_mask, GFP_KERNEL|__GFP_ZERO); |
142 | printk(KERN_INFO "Testing NMI watchdog ... "); | 142 | printk(KERN_INFO "Testing NMI watchdog ... "); |
143 | 143 | ||
144 | #ifdef CONFIG_SMP | 144 | #ifdef CONFIG_SMP |
@@ -414,7 +414,8 @@ nmi_watchdog_tick(struct pt_regs *regs, unsigned reason) | |||
414 | touched = 1; | 414 | touched = 1; |
415 | } | 415 | } |
416 | 416 | ||
417 | if (cpumask_test_cpu(cpu, backtrace_mask)) { | 417 | /* We can be called before check_nmi_watchdog, hence NULL check. */ |
418 | if (backtrace_mask != NULL && cpumask_test_cpu(cpu, backtrace_mask)) { | ||
418 | static DEFINE_SPINLOCK(lock); /* Serialise the printks */ | 419 | static DEFINE_SPINLOCK(lock); /* Serialise the printks */ |
419 | 420 | ||
420 | spin_lock(&lock); | 421 | spin_lock(&lock); |
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c index de1a50af807b..2bda69352976 100644 --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <linux/timer.h> | 19 | #include <linux/timer.h> |
20 | #include <linux/cpu.h> | 20 | #include <linux/cpu.h> |
21 | #include <linux/init.h> | 21 | #include <linux/init.h> |
22 | #include <linux/io.h> | ||
22 | 23 | ||
23 | #include <asm/uv/uv_mmrs.h> | 24 | #include <asm/uv/uv_mmrs.h> |
24 | #include <asm/uv/uv_hub.h> | 25 | #include <asm/uv/uv_hub.h> |
@@ -34,6 +35,17 @@ DEFINE_PER_CPU(int, x2apic_extra_bits); | |||
34 | 35 | ||
35 | static enum uv_system_type uv_system_type; | 36 | static enum uv_system_type uv_system_type; |
36 | 37 | ||
38 | static int early_get_nodeid(void) | ||
39 | { | ||
40 | union uvh_node_id_u node_id; | ||
41 | unsigned long *mmr; | ||
42 | |||
43 | mmr = early_ioremap(UV_LOCAL_MMR_BASE | UVH_NODE_ID, sizeof(*mmr)); | ||
44 | node_id.v = *mmr; | ||
45 | early_iounmap(mmr, sizeof(*mmr)); | ||
46 | return node_id.s.node_id; | ||
47 | } | ||
48 | |||
37 | static int uv_acpi_madt_oem_check(char *oem_id, char *oem_table_id) | 49 | static int uv_acpi_madt_oem_check(char *oem_id, char *oem_table_id) |
38 | { | 50 | { |
39 | if (!strcmp(oem_id, "SGI")) { | 51 | if (!strcmp(oem_id, "SGI")) { |
@@ -42,6 +54,8 @@ static int uv_acpi_madt_oem_check(char *oem_id, char *oem_table_id) | |||
42 | else if (!strcmp(oem_table_id, "UVX")) | 54 | else if (!strcmp(oem_table_id, "UVX")) |
43 | uv_system_type = UV_X2APIC; | 55 | uv_system_type = UV_X2APIC; |
44 | else if (!strcmp(oem_table_id, "UVH")) { | 56 | else if (!strcmp(oem_table_id, "UVH")) { |
57 | __get_cpu_var(x2apic_extra_bits) = | ||
58 | early_get_nodeid() << (UV_APIC_PNODE_SHIFT - 1); | ||
45 | uv_system_type = UV_NON_UNIQUE_APIC; | 59 | uv_system_type = UV_NON_UNIQUE_APIC; |
46 | return 1; | 60 | return 1; |
47 | } | 61 | } |
@@ -638,6 +652,7 @@ void __init uv_system_init(void) | |||
638 | if (uv_node_to_blade[nid] >= 0) | 652 | if (uv_node_to_blade[nid] >= 0) |
639 | continue; | 653 | continue; |
640 | paddr = node_start_pfn(nid) << PAGE_SHIFT; | 654 | paddr = node_start_pfn(nid) << PAGE_SHIFT; |
655 | paddr = uv_soc_phys_ram_to_gpa(paddr); | ||
641 | pnode = (paddr >> m_val) & pnode_mask; | 656 | pnode = (paddr >> m_val) & pnode_mask; |
642 | blade = boot_pnode_to_blade(pnode); | 657 | blade = boot_pnode_to_blade(pnode); |
643 | uv_node_to_blade[nid] = blade; | 658 | uv_node_to_blade[nid] = blade; |
diff --git a/arch/x86/kernel/cpu/mcheck/mce_64.c b/arch/x86/kernel/cpu/mcheck/mce_64.c index 863f89568b1a..6fb0b359d2a5 100644 --- a/arch/x86/kernel/cpu/mcheck/mce_64.c +++ b/arch/x86/kernel/cpu/mcheck/mce_64.c | |||
@@ -239,9 +239,10 @@ void machine_check_poll(enum mcp_flags flags, mce_banks_t *b) | |||
239 | * Don't get the IP here because it's unlikely to | 239 | * Don't get the IP here because it's unlikely to |
240 | * have anything to do with the actual error location. | 240 | * have anything to do with the actual error location. |
241 | */ | 241 | */ |
242 | 242 | if (!(flags & MCP_DONTLOG)) { | |
243 | mce_log(&m); | 243 | mce_log(&m); |
244 | add_taint(TAINT_MACHINE_CHECK); | 244 | add_taint(TAINT_MACHINE_CHECK); |
245 | } | ||
245 | 246 | ||
246 | /* | 247 | /* |
247 | * Clear state for this bank. | 248 | * Clear state for this bank. |
@@ -452,13 +453,14 @@ void mce_log_therm_throt_event(__u64 status) | |||
452 | */ | 453 | */ |
453 | 454 | ||
454 | static int check_interval = 5 * 60; /* 5 minutes */ | 455 | static int check_interval = 5 * 60; /* 5 minutes */ |
455 | static int next_interval; /* in jiffies */ | 456 | static DEFINE_PER_CPU(int, next_interval); /* in jiffies */ |
456 | static void mcheck_timer(unsigned long); | 457 | static void mcheck_timer(unsigned long); |
457 | static DEFINE_PER_CPU(struct timer_list, mce_timer); | 458 | static DEFINE_PER_CPU(struct timer_list, mce_timer); |
458 | 459 | ||
459 | static void mcheck_timer(unsigned long data) | 460 | static void mcheck_timer(unsigned long data) |
460 | { | 461 | { |
461 | struct timer_list *t = &per_cpu(mce_timer, data); | 462 | struct timer_list *t = &per_cpu(mce_timer, data); |
463 | int *n; | ||
462 | 464 | ||
463 | WARN_ON(smp_processor_id() != data); | 465 | WARN_ON(smp_processor_id() != data); |
464 | 466 | ||
@@ -470,14 +472,14 @@ static void mcheck_timer(unsigned long data) | |||
470 | * Alert userspace if needed. If we logged an MCE, reduce the | 472 | * Alert userspace if needed. If we logged an MCE, reduce the |
471 | * polling interval, otherwise increase the polling interval. | 473 | * polling interval, otherwise increase the polling interval. |
472 | */ | 474 | */ |
475 | n = &__get_cpu_var(next_interval); | ||
473 | if (mce_notify_user()) { | 476 | if (mce_notify_user()) { |
474 | next_interval = max(next_interval/2, HZ/100); | 477 | *n = max(*n/2, HZ/100); |
475 | } else { | 478 | } else { |
476 | next_interval = min(next_interval * 2, | 479 | *n = min(*n*2, (int)round_jiffies_relative(check_interval*HZ)); |
477 | (int)round_jiffies_relative(check_interval*HZ)); | ||
478 | } | 480 | } |
479 | 481 | ||
480 | t->expires = jiffies + next_interval; | 482 | t->expires = jiffies + *n; |
481 | add_timer(t); | 483 | add_timer(t); |
482 | } | 484 | } |
483 | 485 | ||
@@ -584,7 +586,7 @@ static void mce_init(void *dummy) | |||
584 | * Log the machine checks left over from the previous reset. | 586 | * Log the machine checks left over from the previous reset. |
585 | */ | 587 | */ |
586 | bitmap_fill(all_banks, MAX_NR_BANKS); | 588 | bitmap_fill(all_banks, MAX_NR_BANKS); |
587 | machine_check_poll(MCP_UC, &all_banks); | 589 | machine_check_poll(MCP_UC|(!mce_bootlog ? MCP_DONTLOG : 0), &all_banks); |
588 | 590 | ||
589 | set_in_cr4(X86_CR4_MCE); | 591 | set_in_cr4(X86_CR4_MCE); |
590 | 592 | ||
@@ -632,14 +634,13 @@ static void mce_cpu_features(struct cpuinfo_x86 *c) | |||
632 | static void mce_init_timer(void) | 634 | static void mce_init_timer(void) |
633 | { | 635 | { |
634 | struct timer_list *t = &__get_cpu_var(mce_timer); | 636 | struct timer_list *t = &__get_cpu_var(mce_timer); |
637 | int *n = &__get_cpu_var(next_interval); | ||
635 | 638 | ||
636 | /* data race harmless because everyone sets to the same value */ | 639 | *n = check_interval * HZ; |
637 | if (!next_interval) | 640 | if (!*n) |
638 | next_interval = check_interval * HZ; | ||
639 | if (!next_interval) | ||
640 | return; | 641 | return; |
641 | setup_timer(t, mcheck_timer, smp_processor_id()); | 642 | setup_timer(t, mcheck_timer, smp_processor_id()); |
642 | t->expires = round_jiffies(jiffies + next_interval); | 643 | t->expires = round_jiffies(jiffies + *n); |
643 | add_timer(t); | 644 | add_timer(t); |
644 | } | 645 | } |
645 | 646 | ||
@@ -907,7 +908,6 @@ static void mce_cpu_restart(void *data) | |||
907 | /* Reinit MCEs after user configuration changes */ | 908 | /* Reinit MCEs after user configuration changes */ |
908 | static void mce_restart(void) | 909 | static void mce_restart(void) |
909 | { | 910 | { |
910 | next_interval = check_interval * HZ; | ||
911 | on_each_cpu(mce_cpu_restart, NULL, 1); | 911 | on_each_cpu(mce_cpu_restart, NULL, 1); |
912 | } | 912 | } |
913 | 913 | ||
@@ -1110,7 +1110,8 @@ static int __cpuinit mce_cpu_callback(struct notifier_block *nfb, | |||
1110 | break; | 1110 | break; |
1111 | case CPU_DOWN_FAILED: | 1111 | case CPU_DOWN_FAILED: |
1112 | case CPU_DOWN_FAILED_FROZEN: | 1112 | case CPU_DOWN_FAILED_FROZEN: |
1113 | t->expires = round_jiffies(jiffies + next_interval); | 1113 | t->expires = round_jiffies(jiffies + |
1114 | __get_cpu_var(next_interval)); | ||
1114 | add_timer_on(t, cpu); | 1115 | add_timer_on(t, cpu); |
1115 | smp_call_function_single(cpu, mce_reenable_cpu, &action, 1); | 1116 | smp_call_function_single(cpu, mce_reenable_cpu, &action, 1); |
1116 | break; | 1117 | break; |
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S index a331ec38af9e..38946c6e8433 100644 --- a/arch/x86/kernel/entry_64.S +++ b/arch/x86/kernel/entry_64.S | |||
@@ -1410,7 +1410,10 @@ ENTRY(paranoid_exit) | |||
1410 | paranoid_swapgs: | 1410 | paranoid_swapgs: |
1411 | TRACE_IRQS_IRETQ 0 | 1411 | TRACE_IRQS_IRETQ 0 |
1412 | SWAPGS_UNSAFE_STACK | 1412 | SWAPGS_UNSAFE_STACK |
1413 | RESTORE_ALL 8 | ||
1414 | jmp irq_return | ||
1413 | paranoid_restore: | 1415 | paranoid_restore: |
1416 | TRACE_IRQS_IRETQ 0 | ||
1414 | RESTORE_ALL 8 | 1417 | RESTORE_ALL 8 |
1415 | jmp irq_return | 1418 | jmp irq_return |
1416 | paranoid_userspace: | 1419 | paranoid_userspace: |
diff --git a/arch/x86/kernel/hpet.c b/arch/x86/kernel/hpet.c index 3f0019e0a229..81408b93f887 100644 --- a/arch/x86/kernel/hpet.c +++ b/arch/x86/kernel/hpet.c | |||
@@ -236,6 +236,10 @@ static void hpet_stop_counter(void) | |||
236 | unsigned long cfg = hpet_readl(HPET_CFG); | 236 | unsigned long cfg = hpet_readl(HPET_CFG); |
237 | cfg &= ~HPET_CFG_ENABLE; | 237 | cfg &= ~HPET_CFG_ENABLE; |
238 | hpet_writel(cfg, HPET_CFG); | 238 | hpet_writel(cfg, HPET_CFG); |
239 | } | ||
240 | |||
241 | static void hpet_reset_counter(void) | ||
242 | { | ||
239 | hpet_writel(0, HPET_COUNTER); | 243 | hpet_writel(0, HPET_COUNTER); |
240 | hpet_writel(0, HPET_COUNTER + 4); | 244 | hpet_writel(0, HPET_COUNTER + 4); |
241 | } | 245 | } |
@@ -250,6 +254,7 @@ static void hpet_start_counter(void) | |||
250 | static void hpet_restart_counter(void) | 254 | static void hpet_restart_counter(void) |
251 | { | 255 | { |
252 | hpet_stop_counter(); | 256 | hpet_stop_counter(); |
257 | hpet_reset_counter(); | ||
253 | hpet_start_counter(); | 258 | hpet_start_counter(); |
254 | } | 259 | } |
255 | 260 | ||
@@ -309,7 +314,7 @@ static int hpet_setup_msi_irq(unsigned int irq); | |||
309 | static void hpet_set_mode(enum clock_event_mode mode, | 314 | static void hpet_set_mode(enum clock_event_mode mode, |
310 | struct clock_event_device *evt, int timer) | 315 | struct clock_event_device *evt, int timer) |
311 | { | 316 | { |
312 | unsigned long cfg; | 317 | unsigned long cfg, cmp, now; |
313 | uint64_t delta; | 318 | uint64_t delta; |
314 | 319 | ||
315 | switch (mode) { | 320 | switch (mode) { |
@@ -317,12 +322,23 @@ static void hpet_set_mode(enum clock_event_mode mode, | |||
317 | hpet_stop_counter(); | 322 | hpet_stop_counter(); |
318 | delta = ((uint64_t)(NSEC_PER_SEC/HZ)) * evt->mult; | 323 | delta = ((uint64_t)(NSEC_PER_SEC/HZ)) * evt->mult; |
319 | delta >>= evt->shift; | 324 | delta >>= evt->shift; |
325 | now = hpet_readl(HPET_COUNTER); | ||
326 | cmp = now + (unsigned long) delta; | ||
320 | cfg = hpet_readl(HPET_Tn_CFG(timer)); | 327 | cfg = hpet_readl(HPET_Tn_CFG(timer)); |
321 | /* Make sure we use edge triggered interrupts */ | 328 | /* Make sure we use edge triggered interrupts */ |
322 | cfg &= ~HPET_TN_LEVEL; | 329 | cfg &= ~HPET_TN_LEVEL; |
323 | cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC | | 330 | cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC | |
324 | HPET_TN_SETVAL | HPET_TN_32BIT; | 331 | HPET_TN_SETVAL | HPET_TN_32BIT; |
325 | hpet_writel(cfg, HPET_Tn_CFG(timer)); | 332 | hpet_writel(cfg, HPET_Tn_CFG(timer)); |
333 | hpet_writel(cmp, HPET_Tn_CMP(timer)); | ||
334 | udelay(1); | ||
335 | /* | ||
336 | * HPET on AMD 81xx needs a second write (with HPET_TN_SETVAL | ||
337 | * cleared) to T0_CMP to set the period. The HPET_TN_SETVAL | ||
338 | * bit is automatically cleared after the first write. | ||
339 | * (See AMD-8111 HyperTransport I/O Hub Data Sheet, | ||
340 | * Publication # 24674) | ||
341 | */ | ||
326 | hpet_writel((unsigned long) delta, HPET_Tn_CMP(timer)); | 342 | hpet_writel((unsigned long) delta, HPET_Tn_CMP(timer)); |
327 | hpet_start_counter(); | 343 | hpet_start_counter(); |
328 | hpet_print_config(); | 344 | hpet_print_config(); |
diff --git a/arch/x86/kernel/quirks.c b/arch/x86/kernel/quirks.c index e95022e4f5d5..7563b31b4f03 100644 --- a/arch/x86/kernel/quirks.c +++ b/arch/x86/kernel/quirks.c | |||
@@ -261,8 +261,6 @@ static void old_ich_force_enable_hpet_user(struct pci_dev *dev) | |||
261 | { | 261 | { |
262 | if (hpet_force_user) | 262 | if (hpet_force_user) |
263 | old_ich_force_enable_hpet(dev); | 263 | old_ich_force_enable_hpet(dev); |
264 | else | ||
265 | hpet_print_force_info(); | ||
266 | } | 264 | } |
267 | 265 | ||
268 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_1, | 266 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_1, |
diff --git a/arch/x86/kernel/uv_time.c b/arch/x86/kernel/uv_time.c index 2ffb6c53326e..583f11d5c480 100644 --- a/arch/x86/kernel/uv_time.c +++ b/arch/x86/kernel/uv_time.c | |||
@@ -29,7 +29,7 @@ | |||
29 | 29 | ||
30 | #define RTC_NAME "sgi_rtc" | 30 | #define RTC_NAME "sgi_rtc" |
31 | 31 | ||
32 | static cycle_t uv_read_rtc(void); | 32 | static cycle_t uv_read_rtc(struct clocksource *cs); |
33 | static int uv_rtc_next_event(unsigned long, struct clock_event_device *); | 33 | static int uv_rtc_next_event(unsigned long, struct clock_event_device *); |
34 | static void uv_rtc_timer_setup(enum clock_event_mode, | 34 | static void uv_rtc_timer_setup(enum clock_event_mode, |
35 | struct clock_event_device *); | 35 | struct clock_event_device *); |
@@ -123,7 +123,7 @@ static int uv_setup_intr(int cpu, u64 expires) | |||
123 | /* Initialize comparator value */ | 123 | /* Initialize comparator value */ |
124 | uv_write_global_mmr64(pnode, UVH_INT_CMPB, expires); | 124 | uv_write_global_mmr64(pnode, UVH_INT_CMPB, expires); |
125 | 125 | ||
126 | return (expires < uv_read_rtc() && !uv_intr_pending(pnode)); | 126 | return (expires < uv_read_rtc(NULL) && !uv_intr_pending(pnode)); |
127 | } | 127 | } |
128 | 128 | ||
129 | /* | 129 | /* |
@@ -256,7 +256,7 @@ static int uv_rtc_unset_timer(int cpu) | |||
256 | 256 | ||
257 | spin_lock_irqsave(&head->lock, flags); | 257 | spin_lock_irqsave(&head->lock, flags); |
258 | 258 | ||
259 | if (head->next_cpu == bcpu && uv_read_rtc() >= *t) | 259 | if (head->next_cpu == bcpu && uv_read_rtc(NULL) >= *t) |
260 | rc = 1; | 260 | rc = 1; |
261 | 261 | ||
262 | *t = ULLONG_MAX; | 262 | *t = ULLONG_MAX; |
@@ -278,7 +278,7 @@ static int uv_rtc_unset_timer(int cpu) | |||
278 | /* | 278 | /* |
279 | * Read the RTC. | 279 | * Read the RTC. |
280 | */ | 280 | */ |
281 | static cycle_t uv_read_rtc(void) | 281 | static cycle_t uv_read_rtc(struct clocksource *cs) |
282 | { | 282 | { |
283 | return (cycle_t)uv_read_local_mmr(UVH_RTC); | 283 | return (cycle_t)uv_read_local_mmr(UVH_RTC); |
284 | } | 284 | } |
@@ -291,7 +291,7 @@ static int uv_rtc_next_event(unsigned long delta, | |||
291 | { | 291 | { |
292 | int ced_cpu = cpumask_first(ced->cpumask); | 292 | int ced_cpu = cpumask_first(ced->cpumask); |
293 | 293 | ||
294 | return uv_rtc_set_timer(ced_cpu, delta + uv_read_rtc()); | 294 | return uv_rtc_set_timer(ced_cpu, delta + uv_read_rtc(NULL)); |
295 | } | 295 | } |
296 | 296 | ||
297 | /* | 297 | /* |
diff --git a/arch/x86/kernel/xsave.c b/arch/x86/kernel/xsave.c index 0a5b04aa98f1..c5ee17e8c6d9 100644 --- a/arch/x86/kernel/xsave.c +++ b/arch/x86/kernel/xsave.c | |||
@@ -89,7 +89,7 @@ int save_i387_xstate(void __user *buf) | |||
89 | 89 | ||
90 | if (!used_math()) | 90 | if (!used_math()) |
91 | return 0; | 91 | return 0; |
92 | clear_used_math(); /* trigger finit */ | 92 | |
93 | if (task_thread_info(tsk)->status & TS_USEDFPU) { | 93 | if (task_thread_info(tsk)->status & TS_USEDFPU) { |
94 | /* | 94 | /* |
95 | * Start with clearing the user buffer. This will present a | 95 | * Start with clearing the user buffer. This will present a |
@@ -114,6 +114,8 @@ int save_i387_xstate(void __user *buf) | |||
114 | return -1; | 114 | return -1; |
115 | } | 115 | } |
116 | 116 | ||
117 | clear_used_math(); /* trigger finit */ | ||
118 | |||
117 | if (task_thread_info(tsk)->status & TS_XSAVE) { | 119 | if (task_thread_info(tsk)->status & TS_XSAVE) { |
118 | struct _fpstate __user *fx = buf; | 120 | struct _fpstate __user *fx = buf; |
119 | struct _xstate __user *x = buf; | 121 | struct _xstate __user *x = buf; |
diff --git a/arch/x86/mm/numa_32.c b/arch/x86/mm/numa_32.c index 3daefa04ace5..d2530062fe00 100644 --- a/arch/x86/mm/numa_32.c +++ b/arch/x86/mm/numa_32.c | |||
@@ -257,7 +257,7 @@ void resume_map_numa_kva(pgd_t *pgd_base) | |||
257 | } | 257 | } |
258 | #endif | 258 | #endif |
259 | 259 | ||
260 | static unsigned long calculate_numa_remap_pages(void) | 260 | static __init unsigned long calculate_numa_remap_pages(void) |
261 | { | 261 | { |
262 | int nid; | 262 | int nid; |
263 | unsigned long size, reserve_pages = 0; | 263 | unsigned long size, reserve_pages = 0; |
diff --git a/arch/x86/mm/numa_64.c b/arch/x86/mm/numa_64.c index d73aaa892371..2d05a12029dc 100644 --- a/arch/x86/mm/numa_64.c +++ b/arch/x86/mm/numa_64.c | |||
@@ -188,6 +188,9 @@ void __init setup_node_bootmem(int nodeid, unsigned long start, | |||
188 | const int pgdat_size = roundup(sizeof(pg_data_t), PAGE_SIZE); | 188 | const int pgdat_size = roundup(sizeof(pg_data_t), PAGE_SIZE); |
189 | int nid; | 189 | int nid; |
190 | 190 | ||
191 | if (!end) | ||
192 | return; | ||
193 | |||
191 | start = roundup(start, ZONE_ALIGN); | 194 | start = roundup(start, ZONE_ALIGN); |
192 | 195 | ||
193 | printk(KERN_INFO "Bootmem setup node %d %016lx-%016lx\n", nodeid, | 196 | printk(KERN_INFO "Bootmem setup node %d %016lx-%016lx\n", nodeid, |
diff --git a/arch/x86/mm/srat_64.c b/arch/x86/mm/srat_64.c index c7d272b8574c..33c5fa57e43d 100644 --- a/arch/x86/mm/srat_64.c +++ b/arch/x86/mm/srat_64.c | |||
@@ -28,6 +28,7 @@ int acpi_numa __initdata; | |||
28 | static struct acpi_table_slit *acpi_slit; | 28 | static struct acpi_table_slit *acpi_slit; |
29 | 29 | ||
30 | static nodemask_t nodes_parsed __initdata; | 30 | static nodemask_t nodes_parsed __initdata; |
31 | static nodemask_t cpu_nodes_parsed __initdata; | ||
31 | static struct bootnode nodes[MAX_NUMNODES] __initdata; | 32 | static struct bootnode nodes[MAX_NUMNODES] __initdata; |
32 | static struct bootnode nodes_add[MAX_NUMNODES]; | 33 | static struct bootnode nodes_add[MAX_NUMNODES]; |
33 | static int found_add_area __initdata; | 34 | static int found_add_area __initdata; |
@@ -141,6 +142,7 @@ acpi_numa_x2apic_affinity_init(struct acpi_srat_x2apic_cpu_affinity *pa) | |||
141 | 142 | ||
142 | apic_id = pa->apic_id; | 143 | apic_id = pa->apic_id; |
143 | apicid_to_node[apic_id] = node; | 144 | apicid_to_node[apic_id] = node; |
145 | node_set(node, cpu_nodes_parsed); | ||
144 | acpi_numa = 1; | 146 | acpi_numa = 1; |
145 | printk(KERN_INFO "SRAT: PXM %u -> APIC %u -> Node %u\n", | 147 | printk(KERN_INFO "SRAT: PXM %u -> APIC %u -> Node %u\n", |
146 | pxm, apic_id, node); | 148 | pxm, apic_id, node); |
@@ -174,6 +176,7 @@ acpi_numa_processor_affinity_init(struct acpi_srat_cpu_affinity *pa) | |||
174 | else | 176 | else |
175 | apic_id = pa->apic_id; | 177 | apic_id = pa->apic_id; |
176 | apicid_to_node[apic_id] = node; | 178 | apicid_to_node[apic_id] = node; |
179 | node_set(node, cpu_nodes_parsed); | ||
177 | acpi_numa = 1; | 180 | acpi_numa = 1; |
178 | printk(KERN_INFO "SRAT: PXM %u -> APIC %u -> Node %u\n", | 181 | printk(KERN_INFO "SRAT: PXM %u -> APIC %u -> Node %u\n", |
179 | pxm, apic_id, node); | 182 | pxm, apic_id, node); |
@@ -402,7 +405,8 @@ int __init acpi_scan_nodes(unsigned long start, unsigned long end) | |||
402 | return -1; | 405 | return -1; |
403 | } | 406 | } |
404 | 407 | ||
405 | node_possible_map = nodes_parsed; | 408 | /* Account for nodes with cpus and no memory */ |
409 | nodes_or(node_possible_map, nodes_parsed, cpu_nodes_parsed); | ||
406 | 410 | ||
407 | /* Finally register nodes */ | 411 | /* Finally register nodes */ |
408 | for_each_node_mask(i, node_possible_map) | 412 | for_each_node_mask(i, node_possible_map) |
diff --git a/arch/x86/pci/amd_bus.c b/arch/x86/pci/amd_bus.c index 9bb09823b362..f893d6a6e803 100644 --- a/arch/x86/pci/amd_bus.c +++ b/arch/x86/pci/amd_bus.c | |||
@@ -94,12 +94,16 @@ struct pci_root_info { | |||
94 | static int pci_root_num; | 94 | static int pci_root_num; |
95 | static struct pci_root_info pci_root_info[PCI_ROOT_NR]; | 95 | static struct pci_root_info pci_root_info[PCI_ROOT_NR]; |
96 | 96 | ||
97 | void set_pci_bus_resources_arch_default(struct pci_bus *b) | 97 | void x86_pci_root_bus_res_quirks(struct pci_bus *b) |
98 | { | 98 | { |
99 | int i; | 99 | int i; |
100 | int j; | 100 | int j; |
101 | struct pci_root_info *info; | 101 | struct pci_root_info *info; |
102 | 102 | ||
103 | /* don't go for it if _CRS is used */ | ||
104 | if (pci_probe & PCI_USE__CRS) | ||
105 | return; | ||
106 | |||
103 | /* if only one root bus, don't need to anything */ | 107 | /* if only one root bus, don't need to anything */ |
104 | if (pci_root_num < 2) | 108 | if (pci_root_num < 2) |
105 | return; | 109 | return; |
diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c index 8c362b96b644..2202b6257b82 100644 --- a/arch/x86/pci/common.c +++ b/arch/x86/pci/common.c | |||
@@ -147,10 +147,13 @@ static void __devinit pcibios_fixup_device_resources(struct pci_dev *dev) | |||
147 | * are examined. | 147 | * are examined. |
148 | */ | 148 | */ |
149 | 149 | ||
150 | void __devinit pcibios_fixup_bus(struct pci_bus *b) | 150 | void __devinit pcibios_fixup_bus(struct pci_bus *b) |
151 | { | 151 | { |
152 | struct pci_dev *dev; | 152 | struct pci_dev *dev; |
153 | 153 | ||
154 | /* root bus? */ | ||
155 | if (!b->parent) | ||
156 | x86_pci_root_bus_res_quirks(b); | ||
154 | pci_read_bridge_bases(b); | 157 | pci_read_bridge_bases(b); |
155 | list_for_each_entry(dev, &b->devices, bus_list) | 158 | list_for_each_entry(dev, &b->devices, bus_list) |
156 | pcibios_fixup_device_resources(dev); | 159 | pcibios_fixup_device_resources(dev); |
diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c index f1817f71e009..a85bef20a3b9 100644 --- a/arch/x86/pci/i386.c +++ b/arch/x86/pci/i386.c | |||
@@ -238,6 +238,10 @@ void __init pcibios_resource_survey(void) | |||
238 | */ | 238 | */ |
239 | fs_initcall(pcibios_assign_resources); | 239 | fs_initcall(pcibios_assign_resources); |
240 | 240 | ||
241 | void __weak x86_pci_root_bus_res_quirks(struct pci_bus *b) | ||
242 | { | ||
243 | } | ||
244 | |||
241 | /* | 245 | /* |
242 | * If we set up a device for bus mastering, we need to check the latency | 246 | * If we set up a device for bus mastering, we need to check the latency |
243 | * timer as certain crappy BIOSes forget to set it properly. | 247 | * timer as certain crappy BIOSes forget to set it properly. |
diff --git a/arch/x86/pci/mmconfig-shared.c b/arch/x86/pci/mmconfig-shared.c index 905bb526b133..5fa10bb9604f 100644 --- a/arch/x86/pci/mmconfig-shared.c +++ b/arch/x86/pci/mmconfig-shared.c | |||
@@ -375,7 +375,7 @@ static acpi_status __init check_mcfg_resource(struct acpi_resource *res, | |||
375 | if (!fixmem32) | 375 | if (!fixmem32) |
376 | return AE_OK; | 376 | return AE_OK; |
377 | if ((mcfg_res->start >= fixmem32->address) && | 377 | if ((mcfg_res->start >= fixmem32->address) && |
378 | (mcfg_res->end < (fixmem32->address + | 378 | (mcfg_res->end <= (fixmem32->address + |
379 | fixmem32->address_length))) { | 379 | fixmem32->address_length))) { |
380 | mcfg_res->flags = 1; | 380 | mcfg_res->flags = 1; |
381 | return AE_CTRL_TERMINATE; | 381 | return AE_CTRL_TERMINATE; |
@@ -392,7 +392,7 @@ static acpi_status __init check_mcfg_resource(struct acpi_resource *res, | |||
392 | return AE_OK; | 392 | return AE_OK; |
393 | 393 | ||
394 | if ((mcfg_res->start >= address.minimum) && | 394 | if ((mcfg_res->start >= address.minimum) && |
395 | (mcfg_res->end < (address.minimum + address.address_length))) { | 395 | (mcfg_res->end <= (address.minimum + address.address_length))) { |
396 | mcfg_res->flags = 1; | 396 | mcfg_res->flags = 1; |
397 | return AE_CTRL_TERMINATE; | 397 | return AE_CTRL_TERMINATE; |
398 | } | 398 | } |
@@ -439,7 +439,7 @@ static int __init is_mmconf_reserved(check_reserved_t is_reserved, | |||
439 | u64 old_size = size; | 439 | u64 old_size = size; |
440 | int valid = 0; | 440 | int valid = 0; |
441 | 441 | ||
442 | while (!is_reserved(addr, addr + size - 1, E820_RESERVED)) { | 442 | while (!is_reserved(addr, addr + size, E820_RESERVED)) { |
443 | size >>= 1; | 443 | size >>= 1; |
444 | if (size < (16UL<<20)) | 444 | if (size < (16UL<<20)) |
445 | break; | 445 | break; |
diff --git a/arch/xtensa/kernel/head.S b/arch/xtensa/kernel/head.S index 0817f9db836e..d9ddc1ba761c 100644 --- a/arch/xtensa/kernel/head.S +++ b/arch/xtensa/kernel/head.S | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <asm/page.h> | 19 | #include <asm/page.h> |
20 | #include <asm/cacheasm.h> | 20 | #include <asm/cacheasm.h> |
21 | 21 | ||
22 | #include <linux/init.h> | ||
22 | #include <linux/linkage.h> | 23 | #include <linux/linkage.h> |
23 | 24 | ||
24 | /* | 25 | /* |
@@ -45,7 +46,7 @@ | |||
45 | * instruction. | 46 | * instruction. |
46 | */ | 47 | */ |
47 | 48 | ||
48 | .section .head.text, "ax" | 49 | __HEAD |
49 | .globl _start | 50 | .globl _start |
50 | _start: _j 2f | 51 | _start: _j 2f |
51 | .align 4 | 52 | .align 4 |
diff --git a/arch/xtensa/kernel/vmlinux.lds.S b/arch/xtensa/kernel/vmlinux.lds.S index c1be9a4a740c..5accf51053da 100644 --- a/arch/xtensa/kernel/vmlinux.lds.S +++ b/arch/xtensa/kernel/vmlinux.lds.S | |||
@@ -85,8 +85,8 @@ SECTIONS | |||
85 | 85 | ||
86 | .text : | 86 | .text : |
87 | { | 87 | { |
88 | /* The .head.text section must be the first section! */ | 88 | /* The HEAD_TEXT section must be the first section! */ |
89 | *(.head.text) | 89 | HEAD_TEXT |
90 | *(.literal .text) | 90 | *(.literal .text) |
91 | VMLINUX_SYMBOL(__sched_text_start) = .; | 91 | VMLINUX_SYMBOL(__sched_text_start) = .; |
92 | *(.sched.literal .sched.text) | 92 | *(.sched.literal .sched.text) |