diff options
author | Thiemo Seufer <ths@networkno.de> | 2006-07-05 09:26:38 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2006-07-13 16:26:05 -0400 |
commit | 6e61e85b0980f7b88cd5c4b822386ed00dd7e295 (patch) | |
tree | 8541546073f5ea9131f881196519f28fc047ecb8 /arch | |
parent | fc5d2d279ff820172a698706d33e733d4578bd6c (diff) |
[MIPS] Sibyte: Improve interrupt latency again for sb1250/bcm1480
this patch restores the behaviour of the old (assembly-written)
interrupt handler, the handler is left as soon as a single interrupt
cause is handled.
Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/mips/sibyte/bcm1480/irq.c | 7 | ||||
-rw-r--r-- | arch/mips/sibyte/sb1250/irq.c | 10 |
2 files changed, 9 insertions, 8 deletions
diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c index 2c5afb4c2ef3..cab78fb5a9ac 100644 --- a/arch/mips/sibyte/bcm1480/irq.c +++ b/arch/mips/sibyte/bcm1480/irq.c | |||
@@ -502,22 +502,23 @@ asmlinkage void plat_irq_dispatch(struct pt_regs *regs) | |||
502 | #ifdef CONFIG_SIBYTE_BCM1480_PROF | 502 | #ifdef CONFIG_SIBYTE_BCM1480_PROF |
503 | if (pending & CAUSEF_IP7) /* Cpu performance counter interrupt */ | 503 | if (pending & CAUSEF_IP7) /* Cpu performance counter interrupt */ |
504 | sbprof_cpu_intr(exception_epc(regs)); | 504 | sbprof_cpu_intr(exception_epc(regs)); |
505 | else | ||
505 | #endif | 506 | #endif |
506 | 507 | ||
507 | if (pending & CAUSEF_IP4) | 508 | if (pending & CAUSEF_IP4) |
508 | bcm1480_timer_interrupt(regs); | 509 | bcm1480_timer_interrupt(regs); |
509 | 510 | ||
510 | #ifdef CONFIG_SMP | 511 | #ifdef CONFIG_SMP |
511 | if (pending & CAUSEF_IP3) | 512 | else if (pending & CAUSEF_IP3) |
512 | bcm1480_mailbox_interrupt(regs); | 513 | bcm1480_mailbox_interrupt(regs); |
513 | #endif | 514 | #endif |
514 | 515 | ||
515 | #ifdef CONFIG_KGDB | 516 | #ifdef CONFIG_KGDB |
516 | if (pending & CAUSEF_IP6) | 517 | else if (pending & CAUSEF_IP6) |
517 | bcm1480_kgdb_interrupt(regs); /* KGDB (uart 1) */ | 518 | bcm1480_kgdb_interrupt(regs); /* KGDB (uart 1) */ |
518 | #endif | 519 | #endif |
519 | 520 | ||
520 | if (pending & CAUSEF_IP2) { | 521 | else if (pending & CAUSEF_IP2) { |
521 | unsigned long long mask_h, mask_l; | 522 | unsigned long long mask_h, mask_l; |
522 | unsigned long base; | 523 | unsigned long base; |
523 | 524 | ||
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c index 8d49cb52d192..1de71adec6c6 100644 --- a/arch/mips/sibyte/sb1250/irq.c +++ b/arch/mips/sibyte/sb1250/irq.c | |||
@@ -460,25 +460,25 @@ asmlinkage void plat_irq_dispatch(struct pt_regs *regs) | |||
460 | pending = read_c0_cause(); | 460 | pending = read_c0_cause(); |
461 | 461 | ||
462 | #ifdef CONFIG_SIBYTE_SB1250_PROF | 462 | #ifdef CONFIG_SIBYTE_SB1250_PROF |
463 | if (pending & CAUSEF_IP7) { /* Cpu performance counter interrupt */ | 463 | if (pending & CAUSEF_IP7) /* Cpu performance counter interrupt */ |
464 | sbprof_cpu_intr(exception_epc(regs)); | 464 | sbprof_cpu_intr(exception_epc(regs)); |
465 | } | 465 | else |
466 | #endif | 466 | #endif |
467 | 467 | ||
468 | if (pending & CAUSEF_IP4) | 468 | if (pending & CAUSEF_IP4) |
469 | sb1250_timer_interrupt(regs); | 469 | sb1250_timer_interrupt(regs); |
470 | 470 | ||
471 | #ifdef CONFIG_SMP | 471 | #ifdef CONFIG_SMP |
472 | if (pending & CAUSEF_IP3) | 472 | else if (pending & CAUSEF_IP3) |
473 | sb1250_mailbox_interrupt(regs); | 473 | sb1250_mailbox_interrupt(regs); |
474 | #endif | 474 | #endif |
475 | 475 | ||
476 | #ifdef CONFIG_KGDB | 476 | #ifdef CONFIG_KGDB |
477 | if (pending & CAUSEF_IP6) /* KGDB (uart 1) */ | 477 | else if (pending & CAUSEF_IP6) /* KGDB (uart 1) */ |
478 | sb1250_kgdb_interrupt(regs); | 478 | sb1250_kgdb_interrupt(regs); |
479 | #endif | 479 | #endif |
480 | 480 | ||
481 | if (pending & CAUSEF_IP2) { | 481 | else if (pending & CAUSEF_IP2) { |
482 | unsigned long long mask; | 482 | unsigned long long mask; |
483 | 483 | ||
484 | /* | 484 | /* |