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authorRussell King <rmk+kernel@arm.linux.org.uk>2008-03-26 21:46:42 -0400
committerDan Williams <dan.j.williams@intel.com>2008-03-26 15:33:41 -0400
commit97c46048ce73c27fd2734299f07a8c06c8156a2e (patch)
tree08e0c16de508d43cf423bfebb1348cd71dffc65e /arch
parent27eedbf557f511efbe5651fa2fbfa0e4e8315ab7 (diff)
iop: Program outbound windows using the correct definitions
The outbound translate registers should be programmed with the bus addresses that are defined in the header files, rather than the physical address. Currently it doesn't matter because they're identical, but the headers currently allow them to be different, and not using the right macros here means that people are in for a surprise if they change them. Cc: Lennert Buytenhek <kernel@wantstofly.org> Acked-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/plat-iop/pci.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/plat-iop/pci.c b/arch/arm/plat-iop/pci.c
index ee6deaabf9b5..6ed374fa4087 100644
--- a/arch/arm/plat-iop/pci.c
+++ b/arch/arm/plat-iop/pci.c
@@ -253,11 +253,11 @@ void __init iop3xx_atu_setup(void)
253 *IOP3XX_IATVR2 = PHYS_OFFSET; 253 *IOP3XX_IATVR2 = PHYS_OFFSET;
254 254
255 /* Outbound window 0 */ 255 /* Outbound window 0 */
256 *IOP3XX_OMWTVR0 = IOP3XX_PCI_LOWER_MEM_PA; 256 *IOP3XX_OMWTVR0 = IOP3XX_PCI_LOWER_MEM_BA;
257 *IOP3XX_OUMWTVR0 = 0; 257 *IOP3XX_OUMWTVR0 = 0;
258 258
259 /* Outbound window 1 */ 259 /* Outbound window 1 */
260 *IOP3XX_OMWTVR1 = IOP3XX_PCI_LOWER_MEM_PA + IOP3XX_PCI_MEM_WINDOW_SIZE; 260 *IOP3XX_OMWTVR1 = IOP3XX_PCI_LOWER_MEM_BA + IOP3XX_PCI_MEM_WINDOW_SIZE;
261 *IOP3XX_OUMWTVR1 = 0; 261 *IOP3XX_OUMWTVR1 = 0;
262 262
263 /* BAR 3 ( Disabled ) */ 263 /* BAR 3 ( Disabled ) */
@@ -268,7 +268,7 @@ void __init iop3xx_atu_setup(void)
268 268
269 /* Setup the I/O Bar 269 /* Setup the I/O Bar
270 */ 270 */
271 *IOP3XX_OIOWTVR = IOP3XX_PCI_LOWER_IO_PA;; 271 *IOP3XX_OIOWTVR = IOP3XX_PCI_LOWER_IO_BA;
272 272
273 /* Enable inbound and outbound cycles 273 /* Enable inbound and outbound cycles
274 */ 274 */