diff options
author | Juergen Beisert <j.beisert@pengutronix.de> | 2008-07-05 04:02:55 -0400 |
---|---|---|
committer | Robert Schwebel <r.schwebel@pengutronix.de> | 2008-07-05 04:02:55 -0400 |
commit | aa10abd381b9493a88f6b9e111adc79e33d548fa (patch) | |
tree | 59632a2283057cc671e82cdb32542fa796c3e3fc /arch | |
parent | 259bcaae9a2f28d7e3303b202b64a1fb0a9ab9e4 (diff) |
i.MX2 family: Add GPIO multiplexing support
This patch adds GPIO multiplexing support for the imx1/mxc2
family of procesors.
Signed-off-by: Juergen Beisert <j.beisert@pengutronix.de>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/plat-mxc/Makefile | 2 | ||||
-rw-r--r-- | arch/arm/plat-mxc/iomux-mx1-mx2.c | 156 |
2 files changed, 158 insertions, 0 deletions
diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile index e3cc25c6d46f..db66e9ae8414 100644 --- a/arch/arm/plat-mxc/Makefile +++ b/arch/arm/plat-mxc/Makefile | |||
@@ -4,3 +4,5 @@ | |||
4 | 4 | ||
5 | # Common support | 5 | # Common support |
6 | obj-y := irq.o clock.o gpio.o time.o | 6 | obj-y := irq.o clock.o gpio.o time.o |
7 | |||
8 | obj-$(CONFIG_ARCH_MX2) += iomux-mx1-mx2.o | ||
diff --git a/arch/arm/plat-mxc/iomux-mx1-mx2.c b/arch/arm/plat-mxc/iomux-mx1-mx2.c new file mode 100644 index 000000000000..1985571eb40c --- /dev/null +++ b/arch/arm/plat-mxc/iomux-mx1-mx2.c | |||
@@ -0,0 +1,156 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-mxc/generic.c | ||
3 | * | ||
4 | * author: Sascha Hauer | ||
5 | * Created: april 20th, 2004 | ||
6 | * Copyright: Synertronixx GmbH | ||
7 | * | ||
8 | * Common code for i.MX machines | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License as published by | ||
12 | * the Free Software Foundation; either version 2 of the License, or | ||
13 | * (at your option) any later version. | ||
14 | * | ||
15 | * This program is distributed in the hope that it will be useful, | ||
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
18 | * GNU General Public License for more details. | ||
19 | * | ||
20 | * You should have received a copy of the GNU General Public License | ||
21 | * along with this program; if not, write to the Free Software | ||
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
23 | * | ||
24 | */ | ||
25 | |||
26 | #include <linux/errno.h> | ||
27 | #include <linux/init.h> | ||
28 | #include <linux/kernel.h> | ||
29 | #include <linux/module.h> | ||
30 | #include <linux/string.h> | ||
31 | #include <linux/gpio.h> | ||
32 | |||
33 | #include <asm/hardware.h> | ||
34 | #include <asm/mach/map.h> | ||
35 | #include <asm/arch/iomux-mx1-mx2.h> | ||
36 | |||
37 | void mxc_gpio_mode(int gpio_mode) | ||
38 | { | ||
39 | unsigned int pin = gpio_mode & GPIO_PIN_MASK; | ||
40 | unsigned int port = (gpio_mode & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT; | ||
41 | unsigned int ocr = (gpio_mode & GPIO_OCR_MASK) >> GPIO_OCR_SHIFT; | ||
42 | unsigned int tmp; | ||
43 | |||
44 | /* Pullup enable */ | ||
45 | tmp = __raw_readl(VA_GPIO_BASE + MXC_PUEN(port)); | ||
46 | if (gpio_mode & GPIO_PUEN) | ||
47 | tmp |= (1 << pin); | ||
48 | else | ||
49 | tmp &= ~(1 << pin); | ||
50 | __raw_writel(tmp, VA_GPIO_BASE + MXC_PUEN(port)); | ||
51 | |||
52 | /* Data direction */ | ||
53 | tmp = __raw_readl(VA_GPIO_BASE + MXC_DDIR(port)); | ||
54 | if (gpio_mode & GPIO_OUT) | ||
55 | tmp |= 1 << pin; | ||
56 | else | ||
57 | tmp &= ~(1 << pin); | ||
58 | __raw_writel(tmp, VA_GPIO_BASE + MXC_DDIR(port)); | ||
59 | |||
60 | /* Primary / alternate function */ | ||
61 | tmp = __raw_readl(VA_GPIO_BASE + MXC_GPR(port)); | ||
62 | if (gpio_mode & GPIO_AF) | ||
63 | tmp |= (1 << pin); | ||
64 | else | ||
65 | tmp &= ~(1 << pin); | ||
66 | __raw_writel(tmp, VA_GPIO_BASE + MXC_GPR(port)); | ||
67 | |||
68 | /* use as gpio? */ | ||
69 | tmp = __raw_readl(VA_GPIO_BASE + MXC_GIUS(port)); | ||
70 | if (gpio_mode & (GPIO_PF | GPIO_AF)) | ||
71 | tmp &= ~(1 << pin); | ||
72 | else | ||
73 | tmp |= (1 << pin); | ||
74 | __raw_writel(tmp, VA_GPIO_BASE + MXC_GIUS(port)); | ||
75 | |||
76 | if (pin < 16) { | ||
77 | tmp = __raw_readl(VA_GPIO_BASE + MXC_OCR1(port)); | ||
78 | tmp &= ~(3 << (pin * 2)); | ||
79 | tmp |= (ocr << (pin * 2)); | ||
80 | __raw_writel(tmp, VA_GPIO_BASE + MXC_OCR1(port)); | ||
81 | |||
82 | tmp = __raw_readl(VA_GPIO_BASE + MXC_ICONFA1(port)); | ||
83 | tmp &= ~(3 << (pin * 2)); | ||
84 | tmp |= ((gpio_mode >> GPIO_AOUT_SHIFT) & 3) << (pin * 2); | ||
85 | __raw_writel(tmp, VA_GPIO_BASE + MXC_ICONFA1(port)); | ||
86 | |||
87 | tmp = __raw_readl(VA_GPIO_BASE + MXC_ICONFB1(port)); | ||
88 | tmp &= ~(3 << (pin * 2)); | ||
89 | tmp |= ((gpio_mode >> GPIO_BOUT_SHIFT) & 3) << (pin * 2); | ||
90 | __raw_writel(tmp, VA_GPIO_BASE + MXC_ICONFB1(port)); | ||
91 | } else { | ||
92 | pin -= 16; | ||
93 | |||
94 | tmp = __raw_readl(VA_GPIO_BASE + MXC_OCR2(port)); | ||
95 | tmp &= ~(3 << (pin * 2)); | ||
96 | tmp |= (ocr << (pin * 2)); | ||
97 | __raw_writel(tmp, VA_GPIO_BASE + MXC_OCR2(port)); | ||
98 | |||
99 | tmp = __raw_readl(VA_GPIO_BASE + MXC_ICONFA2(port)); | ||
100 | tmp &= ~(3 << (pin * 2)); | ||
101 | tmp |= ((gpio_mode >> GPIO_AOUT_SHIFT) & 3) << (pin * 2); | ||
102 | __raw_writel(tmp, VA_GPIO_BASE + MXC_ICONFA2(port)); | ||
103 | |||
104 | tmp = __raw_readl(VA_GPIO_BASE + MXC_ICONFB2(port)); | ||
105 | tmp &= ~(3 << (pin * 2)); | ||
106 | tmp |= ((gpio_mode >> GPIO_BOUT_SHIFT) & 3) << (pin * 2); | ||
107 | __raw_writel(tmp, VA_GPIO_BASE + MXC_ICONFB2(port)); | ||
108 | } | ||
109 | } | ||
110 | EXPORT_SYMBOL(mxc_gpio_mode); | ||
111 | |||
112 | int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count, | ||
113 | int alloc_mode, const char *label) | ||
114 | { | ||
115 | const int *p = pin_list; | ||
116 | int i; | ||
117 | unsigned gpio; | ||
118 | unsigned mode; | ||
119 | |||
120 | for (i = 0; i < count; i++) { | ||
121 | gpio = *p & (GPIO_PIN_MASK | GPIO_PORT_MASK); | ||
122 | mode = *p & ~(GPIO_PIN_MASK | GPIO_PORT_MASK); | ||
123 | |||
124 | if (gpio >= (GPIO_PORT_MAX + 1) * 32) | ||
125 | goto setup_error; | ||
126 | |||
127 | if (alloc_mode & MXC_GPIO_ALLOC_MODE_RELEASE) | ||
128 | gpio_free(gpio); | ||
129 | else if (!(alloc_mode & MXC_GPIO_ALLOC_MODE_NO_ALLOC)) | ||
130 | if (gpio_request(gpio, label) | ||
131 | && !(alloc_mode & MXC_GPIO_ALLOC_MODE_TRY_ALLOC)) | ||
132 | goto setup_error; | ||
133 | |||
134 | if (!(alloc_mode & (MXC_GPIO_ALLOC_MODE_ALLOC_ONLY | | ||
135 | MXC_GPIO_ALLOC_MODE_RELEASE))) | ||
136 | mxc_gpio_mode(gpio | mode); | ||
137 | |||
138 | p++; | ||
139 | } | ||
140 | return 0; | ||
141 | |||
142 | setup_error: | ||
143 | if (alloc_mode & (MXC_GPIO_ALLOC_MODE_NO_ALLOC | | ||
144 | MXC_GPIO_ALLOC_MODE_TRY_ALLOC)) | ||
145 | return -EINVAL; | ||
146 | |||
147 | while (p != pin_list) { | ||
148 | p--; | ||
149 | gpio = *p & (GPIO_PIN_MASK | GPIO_PORT_MASK); | ||
150 | gpio_free(gpio); | ||
151 | } | ||
152 | |||
153 | return -EINVAL; | ||
154 | } | ||
155 | EXPORT_SYMBOL(mxc_gpio_setup_multiple_pins); | ||
156 | |||