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authorroot <root@dyn-67.arm.linux.org.uk>2009-03-24 18:04:25 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-03-24 18:04:25 -0400
commit9a38e989b8ce04923f919fc2a8a24eb07fb484e2 (patch)
tree6b99638dc32b99420ada46ca8d1373ad7aa5a208 /arch
parent7d83f8fca517b123cf0136503a9e50974f65ec49 (diff)
parent5fa82eb8ff06cd3ac4d64c6875922ae1dfa003c5 (diff)
Merge branch 'devel' of git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6 into devel
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/Kconfig27
-rw-r--r--arch/arm/Makefile2
-rw-r--r--arch/arm/boot/compressed/head.S12
-rw-r--r--arch/arm/configs/colibri_pxa270_defconfig (renamed from arch/arm/configs/colibri_defconfig)594
-rw-r--r--arch/arm/configs/colibri_pxa300_defconfig1156
-rw-r--r--arch/arm/configs/pxa168_defconfig891
-rw-r--r--arch/arm/configs/pxa910_defconfig891
-rw-r--r--arch/arm/include/asm/cacheflush.h8
-rw-r--r--arch/arm/include/asm/proc-fns.h8
-rw-r--r--arch/arm/kernel/Makefile1
-rw-r--r--arch/arm/mach-mmp/Kconfig47
-rw-r--r--arch/arm/mach-mmp/Makefile15
-rw-r--r--arch/arm/mach-mmp/Makefile.boot1
-rw-r--r--arch/arm/mach-mmp/aspenite.c117
-rw-r--r--arch/arm/mach-mmp/clock.c83
-rw-r--r--arch/arm/mach-mmp/clock.h71
-rw-r--r--arch/arm/mach-mmp/common.c37
-rw-r--r--arch/arm/mach-mmp/common.h13
-rw-r--r--arch/arm/mach-mmp/devices.c69
-rw-r--r--arch/arm/mach-mmp/include/mach/addr-map.h34
-rw-r--r--arch/arm/mach-mmp/include/mach/clkdev.h7
-rw-r--r--arch/arm/mach-mmp/include/mach/cputype.h30
-rw-r--r--arch/arm/mach-mmp/include/mach/debug-macro.S23
-rw-r--r--arch/arm/mach-mmp/include/mach/devices.h37
-rw-r--r--arch/arm/mach-mmp/include/mach/dma.h13
-rw-r--r--arch/arm/mach-mmp/include/mach/entry-macro.S25
-rw-r--r--arch/arm/mach-mmp/include/mach/gpio.h36
-rw-r--r--arch/arm/mach-mmp/include/mach/hardware.h4
-rw-r--r--arch/arm/mach-mmp/include/mach/io.h21
-rw-r--r--arch/arm/mach-mmp/include/mach/irqs.h119
-rw-r--r--arch/arm/mach-mmp/include/mach/memory.h14
-rw-r--r--arch/arm/mach-mmp/include/mach/mfp-pxa168.h258
-rw-r--r--arch/arm/mach-mmp/include/mach/mfp-pxa910.h157
-rw-r--r--arch/arm/mach-mmp/include/mach/mfp.h37
-rw-r--r--arch/arm/mach-mmp/include/mach/pxa168.h23
-rw-r--r--arch/arm/mach-mmp/include/mach/pxa910.h23
-rw-r--r--arch/arm/mach-mmp/include/mach/regs-apbc.h78
-rw-r--r--arch/arm/mach-mmp/include/mach/regs-apmu.h36
-rw-r--r--arch/arm/mach-mmp/include/mach/regs-icu.h31
-rw-r--r--arch/arm/mach-mmp/include/mach/regs-timers.h44
-rw-r--r--arch/arm/mach-mmp/include/mach/system.h21
-rw-r--r--arch/arm/mach-mmp/include/mach/timex.h9
-rw-r--r--arch/arm/mach-mmp/include/mach/uncompress.h41
-rw-r--r--arch/arm/mach-mmp/include/mach/vmalloc.h5
-rw-r--r--arch/arm/mach-mmp/irq.c55
-rw-r--r--arch/arm/mach-mmp/pxa168.c111
-rw-r--r--arch/arm/mach-mmp/pxa910.c158
-rw-r--r--arch/arm/mach-mmp/tavorevb.c109
-rw-r--r--arch/arm/mach-mmp/time.c199
-rw-r--r--arch/arm/mach-mmp/ttc_dkb.c47
-rw-r--r--arch/arm/mach-pxa/Kconfig12
-rw-r--r--arch/arm/mach-pxa/Makefile8
-rw-r--r--arch/arm/mach-pxa/clock.c4
-rw-r--r--arch/arm/mach-pxa/clock.h2
-rw-r--r--arch/arm/mach-pxa/colibri-pxa270.c (renamed from arch/arm/mach-pxa/colibri.c)50
-rw-r--r--arch/arm/mach-pxa/colibri-pxa300.c190
-rw-r--r--arch/arm/mach-pxa/colibri-pxa320.c187
-rw-r--r--arch/arm/mach-pxa/colibri-pxa3xx.c121
-rw-r--r--arch/arm/mach-pxa/e740.c2
-rw-r--r--arch/arm/mach-pxa/e750.c2
-rw-r--r--arch/arm/mach-pxa/e800.c2
-rw-r--r--arch/arm/mach-pxa/include/mach/colibri.h32
-rw-r--r--arch/arm/mach-pxa/include/mach/dma.h83
-rw-r--r--arch/arm/mach-pxa/include/mach/gpio.h32
-rw-r--r--arch/arm/mach-pxa/include/mach/mfp-pxa25x.h1
-rw-r--r--arch/arm/mach-pxa/include/mach/mfp-pxa27x.h1
-rw-r--r--arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/mfp-pxa300.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/mfp-pxa320.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/mfp-pxa3xx.h130
-rw-r--r--arch/arm/mach-pxa/include/mach/mfp-pxa930.h1
-rw-r--r--arch/arm/mach-pxa/mfp-pxa3xx.c189
-rw-r--r--arch/arm/mach-pxa/pxa300.c10
-rw-r--r--arch/arm/mach-pxa/pxa320.c6
-rw-r--r--arch/arm/mach-pxa/pxa930.c6
-rw-r--r--arch/arm/mach-pxa/tosa.c2
-rw-r--r--arch/arm/mm/Kconfig15
-rw-r--r--arch/arm/mm/Makefile1
-rw-r--r--arch/arm/mm/proc-mohawk.S416
-rw-r--r--arch/arm/plat-pxa/Kconfig3
-rw-r--r--arch/arm/plat-pxa/Makefile7
-rw-r--r--arch/arm/plat-pxa/dma.c (renamed from arch/arm/mach-pxa/dma.c)6
-rw-r--r--arch/arm/plat-pxa/gpio.c (renamed from arch/arm/mach-pxa/gpio.c)30
-rw-r--r--arch/arm/plat-pxa/include/plat/dma.h85
-rw-r--r--arch/arm/plat-pxa/include/plat/gpio.h62
-rw-r--r--arch/arm/plat-pxa/include/plat/mfp.h399
-rw-r--r--arch/arm/plat-pxa/mfp.c278
87 files changed, 7553 insertions, 676 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 12abdd43201f..cb4486ad0f72 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -478,12 +478,29 @@ config ARCH_PXA
478 select HAVE_CLK 478 select HAVE_CLK
479 select COMMON_CLKDEV 479 select COMMON_CLKDEV
480 select ARCH_REQUIRE_GPIOLIB 480 select ARCH_REQUIRE_GPIOLIB
481 select HAVE_CLK
482 select COMMON_CLKDEV
481 select GENERIC_TIME 483 select GENERIC_TIME
482 select GENERIC_CLOCKEVENTS 484 select GENERIC_CLOCKEVENTS
483 select TICK_ONESHOT 485 select TICK_ONESHOT
486 select PLAT_PXA
484 help 487 help
485 Support for Intel/Marvell's PXA2xx/PXA3xx processor line. 488 Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
486 489
490config ARCH_MMP
491 bool "Marvell PXA168/910"
492 depends on MMU
493 select GENERIC_GPIO
494 select ARCH_REQUIRE_GPIOLIB
495 select HAVE_CLK
496 select COMMON_CLKDEV
497 select GENERIC_TIME
498 select GENERIC_CLOCKEVENTS
499 select TICK_ONESHOT
500 select PLAT_PXA
501 help
502 Support for Marvell's PXA168/910 processor line.
503
487config ARCH_RPC 504config ARCH_RPC
488 bool "RiscPC" 505 bool "RiscPC"
489 select ARCH_ACORN 506 select ARCH_ACORN
@@ -618,6 +635,9 @@ source "arch/arm/mach-loki/Kconfig"
618source "arch/arm/mach-mv78xx0/Kconfig" 635source "arch/arm/mach-mv78xx0/Kconfig"
619 636
620source "arch/arm/mach-pxa/Kconfig" 637source "arch/arm/mach-pxa/Kconfig"
638source "arch/arm/plat-pxa/Kconfig"
639
640source "arch/arm/mach-mmp/Kconfig"
621 641
622source "arch/arm/mach-sa1100/Kconfig" 642source "arch/arm/mach-sa1100/Kconfig"
623 643
@@ -687,12 +707,15 @@ config PLAT_IOP
687config PLAT_ORION 707config PLAT_ORION
688 bool 708 bool
689 709
710config PLAT_PXA
711 bool
712
690source arch/arm/mm/Kconfig 713source arch/arm/mm/Kconfig
691 714
692config IWMMXT 715config IWMMXT
693 bool "Enable iWMMXt support" 716 bool "Enable iWMMXt support"
694 depends on CPU_XSCALE || CPU_XSC3 717 depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK
695 default y if PXA27x || PXA3xx 718 default y if PXA27x || PXA3xx || ARCH_MMP
696 help 719 help
697 Enable support for iWMMXt context switching at run time if 720 Enable support for iWMMXt context switching at run time if
698 running on a CPU that supports it. 721 running on a CPU that supports it.
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index e7ef876e574b..95186ef17e17 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -109,6 +109,8 @@ ifeq ($(CONFIG_ARCH_SA1100),y)
109 textofs-$(CONFIG_SA1111) := 0x00208000 109 textofs-$(CONFIG_SA1111) := 0x00208000
110endif 110endif
111 machine-$(CONFIG_ARCH_PXA) := pxa 111 machine-$(CONFIG_ARCH_PXA) := pxa
112 machine-$(CONFIG_ARCH_MMP) := mmp
113 plat-$(CONFIG_PLAT_PXA) := pxa
112 machine-$(CONFIG_ARCH_L7200) := l7200 114 machine-$(CONFIG_ARCH_L7200) := l7200
113 machine-$(CONFIG_ARCH_INTEGRATOR) := integrator 115 machine-$(CONFIG_ARCH_INTEGRATOR) := integrator
114 textofs-$(CONFIG_ARCH_CLPS711X) := 0x00028000 116 textofs-$(CONFIG_ARCH_CLPS711X) := 0x00028000
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index d1b678dc120b..d14b827adcd6 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -636,6 +636,18 @@ proc_types:
636 b __armv4_mmu_cache_off 636 b __armv4_mmu_cache_off
637 b __armv4_mmu_cache_flush 637 b __armv4_mmu_cache_flush
638 638
639 .word 0x56158000 @ PXA168
640 .word 0xfffff000
641 b __armv4_mmu_cache_on
642 b __armv4_mmu_cache_off
643 b __armv5tej_mmu_cache_flush
644
645 .word 0x56056930
646 .word 0xff0ffff0 @ PXA935
647 b __armv4_mmu_cache_on
648 b __armv4_mmu_cache_off
649 b __armv4_mmu_cache_flush
650
639 .word 0x56050000 @ Feroceon 651 .word 0x56050000 @ Feroceon
640 .word 0xff0f0000 652 .word 0xff0f0000
641 b __armv4_mmu_cache_on 653 b __armv4_mmu_cache_on
diff --git a/arch/arm/configs/colibri_defconfig b/arch/arm/configs/colibri_pxa270_defconfig
index 744086fff414..4cf3bde1c522 100644
--- a/arch/arm/configs/colibri_defconfig
+++ b/arch/arm/configs/colibri_pxa270_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.24-rc3 3# Linux kernel version: 2.6.29-rc8
4# Mon Dec 3 13:36:09 2007 4# Fri Mar 13 16:18:17 2009
5# 5#
6CONFIG_ARM=y 6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y 7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -12,6 +12,7 @@ CONFIG_MMU=y
12# CONFIG_NO_IOPORT is not set 12# CONFIG_NO_IOPORT is not set
13CONFIG_GENERIC_HARDIRQS=y 13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y 14CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_HAVE_LATENCYTOP_SUPPORT=y
15CONFIG_LOCKDEP_SUPPORT=y 16CONFIG_LOCKDEP_SUPPORT=y
16CONFIG_TRACE_IRQFLAGS_SUPPORT=y 17CONFIG_TRACE_IRQFLAGS_SUPPORT=y
17CONFIG_HARDIRQS_SW_RESEND=y 18CONFIG_HARDIRQS_SW_RESEND=y
@@ -21,8 +22,8 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
21# CONFIG_ARCH_HAS_ILOG2_U64 is not set 22# CONFIG_ARCH_HAS_ILOG2_U64 is not set
22CONFIG_GENERIC_HWEIGHT=y 23CONFIG_GENERIC_HWEIGHT=y
23CONFIG_GENERIC_CALIBRATE_DELAY=y 24CONFIG_GENERIC_CALIBRATE_DELAY=y
24CONFIG_ZONE_DMA=y
25CONFIG_ARCH_MTD_XIP=y 25CONFIG_ARCH_MTD_XIP=y
26CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
26CONFIG_VECTORS_BASE=0xffff0000 27CONFIG_VECTORS_BASE=0xffff0000
27CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 28CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
28 29
@@ -42,22 +43,30 @@ CONFIG_POSIX_MQUEUE=y
42CONFIG_BSD_PROCESS_ACCT=y 43CONFIG_BSD_PROCESS_ACCT=y
43CONFIG_BSD_PROCESS_ACCT_V3=y 44CONFIG_BSD_PROCESS_ACCT_V3=y
44# CONFIG_TASKSTATS is not set 45# CONFIG_TASKSTATS is not set
45# CONFIG_USER_NS is not set
46# CONFIG_PID_NS is not set
47# CONFIG_AUDIT is not set 46# CONFIG_AUDIT is not set
47
48#
49# RCU Subsystem
50#
51CONFIG_CLASSIC_RCU=y
52# CONFIG_TREE_RCU is not set
53# CONFIG_PREEMPT_RCU is not set
54# CONFIG_TREE_RCU_TRACE is not set
55# CONFIG_PREEMPT_RCU_TRACE is not set
48CONFIG_IKCONFIG=y 56CONFIG_IKCONFIG=y
49CONFIG_IKCONFIG_PROC=y 57CONFIG_IKCONFIG_PROC=y
50CONFIG_LOG_BUF_SHIFT=14 58CONFIG_LOG_BUF_SHIFT=14
59# CONFIG_GROUP_SCHED is not set
51# CONFIG_CGROUPS is not set 60# CONFIG_CGROUPS is not set
52CONFIG_FAIR_GROUP_SCHED=y
53CONFIG_FAIR_USER_SCHED=y
54# CONFIG_FAIR_CGROUP_SCHED is not set
55CONFIG_SYSFS_DEPRECATED=y 61CONFIG_SYSFS_DEPRECATED=y
62CONFIG_SYSFS_DEPRECATED_V2=y
56# CONFIG_RELAY is not set 63# CONFIG_RELAY is not set
64# CONFIG_NAMESPACES is not set
57CONFIG_BLK_DEV_INITRD=y 65CONFIG_BLK_DEV_INITRD=y
58CONFIG_INITRAMFS_SOURCE="" 66CONFIG_INITRAMFS_SOURCE=""
59CONFIG_CC_OPTIMIZE_FOR_SIZE=y 67CONFIG_CC_OPTIMIZE_FOR_SIZE=y
60CONFIG_SYSCTL=y 68CONFIG_SYSCTL=y
69CONFIG_ANON_INODES=y
61CONFIG_EMBEDDED=y 70CONFIG_EMBEDDED=y
62CONFIG_UID16=y 71CONFIG_UID16=y
63CONFIG_SYSCTL_SYSCALL=y 72CONFIG_SYSCTL_SYSCALL=y
@@ -70,29 +79,38 @@ CONFIG_BUG=y
70CONFIG_ELF_CORE=y 79CONFIG_ELF_CORE=y
71CONFIG_BASE_FULL=y 80CONFIG_BASE_FULL=y
72CONFIG_FUTEX=y 81CONFIG_FUTEX=y
73CONFIG_ANON_INODES=y
74CONFIG_EPOLL=y 82CONFIG_EPOLL=y
75CONFIG_SIGNALFD=y 83CONFIG_SIGNALFD=y
84CONFIG_TIMERFD=y
76CONFIG_EVENTFD=y 85CONFIG_EVENTFD=y
77CONFIG_SHMEM=y 86CONFIG_SHMEM=y
87CONFIG_AIO=y
78CONFIG_VM_EVENT_COUNTERS=y 88CONFIG_VM_EVENT_COUNTERS=y
89CONFIG_COMPAT_BRK=y
79CONFIG_SLAB=y 90CONFIG_SLAB=y
80# CONFIG_SLUB is not set 91# CONFIG_SLUB is not set
81# CONFIG_SLOB is not set 92# CONFIG_SLOB is not set
93# CONFIG_PROFILING is not set
94CONFIG_HAVE_OPROFILE=y
95# CONFIG_KPROBES is not set
96CONFIG_HAVE_KPROBES=y
97CONFIG_HAVE_KRETPROBES=y
98CONFIG_HAVE_CLK=y
99CONFIG_HAVE_GENERIC_DMA_COHERENT=y
100CONFIG_SLABINFO=y
82CONFIG_RT_MUTEXES=y 101CONFIG_RT_MUTEXES=y
83# CONFIG_TINY_SHMEM is not set
84CONFIG_BASE_SMALL=0 102CONFIG_BASE_SMALL=0
85CONFIG_MODULES=y 103CONFIG_MODULES=y
104# CONFIG_MODULE_FORCE_LOAD is not set
86CONFIG_MODULE_UNLOAD=y 105CONFIG_MODULE_UNLOAD=y
87CONFIG_MODULE_FORCE_UNLOAD=y 106CONFIG_MODULE_FORCE_UNLOAD=y
88CONFIG_MODVERSIONS=y 107CONFIG_MODVERSIONS=y
89CONFIG_MODULE_SRCVERSION_ALL=y 108CONFIG_MODULE_SRCVERSION_ALL=y
90CONFIG_KMOD=y
91CONFIG_BLOCK=y 109CONFIG_BLOCK=y
92CONFIG_LBD=y 110CONFIG_LBD=y
93# CONFIG_BLK_DEV_IO_TRACE is not set 111# CONFIG_BLK_DEV_IO_TRACE is not set
94CONFIG_LSF=y
95# CONFIG_BLK_DEV_BSG is not set 112# CONFIG_BLK_DEV_BSG is not set
113# CONFIG_BLK_DEV_INTEGRITY is not set
96 114
97# 115#
98# IO Schedulers 116# IO Schedulers
@@ -106,6 +124,7 @@ CONFIG_DEFAULT_AS=y
106# CONFIG_DEFAULT_CFQ is not set 124# CONFIG_DEFAULT_CFQ is not set
107# CONFIG_DEFAULT_NOOP is not set 125# CONFIG_DEFAULT_NOOP is not set
108CONFIG_DEFAULT_IOSCHED="anticipatory" 126CONFIG_DEFAULT_IOSCHED="anticipatory"
127CONFIG_FREEZER=y
109 128
110# 129#
111# System Type 130# System Type
@@ -115,9 +134,7 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
115# CONFIG_ARCH_REALVIEW is not set 134# CONFIG_ARCH_REALVIEW is not set
116# CONFIG_ARCH_VERSATILE is not set 135# CONFIG_ARCH_VERSATILE is not set
117# CONFIG_ARCH_AT91 is not set 136# CONFIG_ARCH_AT91 is not set
118# CONFIG_ARCH_CLPS7500 is not set
119# CONFIG_ARCH_CLPS711X is not set 137# CONFIG_ARCH_CLPS711X is not set
120# CONFIG_ARCH_CO285 is not set
121# CONFIG_ARCH_EBSA110 is not set 138# CONFIG_ARCH_EBSA110 is not set
122# CONFIG_ARCH_EP93XX is not set 139# CONFIG_ARCH_EP93XX is not set
123# CONFIG_ARCH_FOOTBRIDGE is not set 140# CONFIG_ARCH_FOOTBRIDGE is not set
@@ -131,41 +148,58 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
131# CONFIG_ARCH_IXP2000 is not set 148# CONFIG_ARCH_IXP2000 is not set
132# CONFIG_ARCH_IXP4XX is not set 149# CONFIG_ARCH_IXP4XX is not set
133# CONFIG_ARCH_L7200 is not set 150# CONFIG_ARCH_L7200 is not set
151# CONFIG_ARCH_KIRKWOOD is not set
134# CONFIG_ARCH_KS8695 is not set 152# CONFIG_ARCH_KS8695 is not set
135# CONFIG_ARCH_NS9XXX is not set 153# CONFIG_ARCH_NS9XXX is not set
154# CONFIG_ARCH_LOKI is not set
155# CONFIG_ARCH_MV78XX0 is not set
136# CONFIG_ARCH_MXC is not set 156# CONFIG_ARCH_MXC is not set
157# CONFIG_ARCH_ORION5X is not set
137# CONFIG_ARCH_PNX4008 is not set 158# CONFIG_ARCH_PNX4008 is not set
138CONFIG_ARCH_PXA=y 159CONFIG_ARCH_PXA=y
139# CONFIG_ARCH_RPC is not set 160# CONFIG_ARCH_RPC is not set
140# CONFIG_ARCH_SA1100 is not set 161# CONFIG_ARCH_SA1100 is not set
141# CONFIG_ARCH_S3C2410 is not set 162# CONFIG_ARCH_S3C2410 is not set
163# CONFIG_ARCH_S3C64XX is not set
142# CONFIG_ARCH_SHARK is not set 164# CONFIG_ARCH_SHARK is not set
143# CONFIG_ARCH_LH7A40X is not set 165# CONFIG_ARCH_LH7A40X is not set
144# CONFIG_ARCH_DAVINCI is not set 166# CONFIG_ARCH_DAVINCI is not set
145# CONFIG_ARCH_OMAP is not set 167# CONFIG_ARCH_OMAP is not set
168# CONFIG_ARCH_MSM is not set
169# CONFIG_ARCH_W90X900 is not set
146 170
147# 171#
148# Intel PXA2xx/PXA3xx Implementations 172# Intel PXA2xx/PXA3xx Implementations
149# 173#
174# CONFIG_ARCH_GUMSTIX is not set
175# CONFIG_MACH_INTELMOTE2 is not set
150# CONFIG_ARCH_LUBBOCK is not set 176# CONFIG_ARCH_LUBBOCK is not set
151# CONFIG_MACH_LOGICPD_PXA270 is not set 177# CONFIG_MACH_LOGICPD_PXA270 is not set
152# CONFIG_MACH_MAINSTONE is not set 178# CONFIG_MACH_MAINSTONE is not set
179# CONFIG_MACH_MP900C is not set
153# CONFIG_ARCH_PXA_IDP is not set 180# CONFIG_ARCH_PXA_IDP is not set
154# CONFIG_PXA_SHARPSL is not set 181# CONFIG_PXA_SHARPSL is not set
155# CONFIG_MACH_TRIZEPS4 is not set 182# CONFIG_ARCH_VIPER is not set
183# CONFIG_ARCH_PXA_ESERIES is not set
184# CONFIG_TRIZEPS_PXA is not set
185# CONFIG_MACH_H5000 is not set
156# CONFIG_MACH_EM_X270 is not set 186# CONFIG_MACH_EM_X270 is not set
157CONFIG_MACH_COLIBRI=y 187CONFIG_MACH_COLIBRI=y
188# CONFIG_MACH_COLIBRI300 is not set
158# CONFIG_MACH_ZYLONITE is not set 189# CONFIG_MACH_ZYLONITE is not set
190# CONFIG_MACH_LITTLETON is not set
191# CONFIG_MACH_RAUMFELD_PROTO is not set
192# CONFIG_MACH_TAVOREVB is not set
193# CONFIG_MACH_SAAR is not set
159# CONFIG_MACH_ARMCORE is not set 194# CONFIG_MACH_ARMCORE is not set
195# CONFIG_MACH_CM_X300 is not set
196# CONFIG_MACH_MAGICIAN is not set
197# CONFIG_MACH_MIOA701 is not set
198# CONFIG_MACH_PCM027 is not set
199# CONFIG_ARCH_PXA_PALM is not set
200# CONFIG_PXA_EZX is not set
160CONFIG_PXA27x=y 201CONFIG_PXA27x=y
161 202# CONFIG_PXA_PWM is not set
162#
163# Boot options
164#
165
166#
167# Power management
168#
169 203
170# 204#
171# Processor Type 205# Processor Type
@@ -174,6 +208,7 @@ CONFIG_CPU_32=y
174CONFIG_CPU_XSCALE=y 208CONFIG_CPU_XSCALE=y
175CONFIG_CPU_32v5=y 209CONFIG_CPU_32v5=y
176CONFIG_CPU_ABRT_EV5T=y 210CONFIG_CPU_ABRT_EV5T=y
211CONFIG_CPU_PABRT_NOIFAR=y
177CONFIG_CPU_CACHE_VIVT=y 212CONFIG_CPU_CACHE_VIVT=y
178CONFIG_CPU_TLB_V4WBI=y 213CONFIG_CPU_TLB_V4WBI=y
179CONFIG_CPU_CP15=y 214CONFIG_CPU_CP15=y
@@ -187,6 +222,7 @@ CONFIG_ARM_THUMB=y
187# CONFIG_OUTER_CACHE is not set 222# CONFIG_OUTER_CACHE is not set
188CONFIG_IWMMXT=y 223CONFIG_IWMMXT=y
189CONFIG_XSCALE_PMU=y 224CONFIG_XSCALE_PMU=y
225CONFIG_COMMON_CLKDEV=y
190 226
191# 227#
192# Bus support 228# Bus support
@@ -198,28 +234,33 @@ CONFIG_XSCALE_PMU=y
198# 234#
199# Kernel Features 235# Kernel Features
200# 236#
201# CONFIG_TICK_ONESHOT is not set 237CONFIG_TICK_ONESHOT=y
202# CONFIG_NO_HZ is not set 238# CONFIG_NO_HZ is not set
203# CONFIG_HIGH_RES_TIMERS is not set 239# CONFIG_HIGH_RES_TIMERS is not set
204CONFIG_GENERIC_CLOCKEVENTS_BUILD=y 240CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
241CONFIG_VMSPLIT_3G=y
242# CONFIG_VMSPLIT_2G is not set
243# CONFIG_VMSPLIT_1G is not set
244CONFIG_PAGE_OFFSET=0xC0000000
205CONFIG_PREEMPT=y 245CONFIG_PREEMPT=y
206CONFIG_HZ=100 246CONFIG_HZ=100
207CONFIG_AEABI=y 247CONFIG_AEABI=y
208CONFIG_OABI_COMPAT=y 248CONFIG_OABI_COMPAT=y
209# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set 249CONFIG_ARCH_FLATMEM_HAS_HOLES=y
250# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
251# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
210CONFIG_SELECT_MEMORY_MODEL=y 252CONFIG_SELECT_MEMORY_MODEL=y
211CONFIG_FLATMEM_MANUAL=y 253CONFIG_FLATMEM_MANUAL=y
212# CONFIG_DISCONTIGMEM_MANUAL is not set 254# CONFIG_DISCONTIGMEM_MANUAL is not set
213# CONFIG_SPARSEMEM_MANUAL is not set 255# CONFIG_SPARSEMEM_MANUAL is not set
214CONFIG_FLATMEM=y 256CONFIG_FLATMEM=y
215CONFIG_FLAT_NODE_MEM_MAP=y 257CONFIG_FLAT_NODE_MEM_MAP=y
216# CONFIG_SPARSEMEM_STATIC is not set 258CONFIG_PAGEFLAGS_EXTENDED=y
217# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
218CONFIG_SPLIT_PTLOCK_CPUS=4096 259CONFIG_SPLIT_PTLOCK_CPUS=4096
219# CONFIG_RESOURCES_64BIT is not set 260# CONFIG_PHYS_ADDR_T_64BIT is not set
220CONFIG_ZONE_DMA_FLAG=1 261CONFIG_ZONE_DMA_FLAG=0
221CONFIG_BOUNCE=y
222CONFIG_VIRT_TO_BUS=y 262CONFIG_VIRT_TO_BUS=y
263CONFIG_UNEVICTABLE_LRU=y
223CONFIG_ALIGNMENT_TRAP=y 264CONFIG_ALIGNMENT_TRAP=y
224 265
225# 266#
@@ -232,6 +273,12 @@ CONFIG_CMDLINE=""
232# CONFIG_KEXEC is not set 273# CONFIG_KEXEC is not set
233 274
234# 275#
276# CPU Power Management
277#
278# CONFIG_CPU_FREQ is not set
279# CONFIG_CPU_IDLE is not set
280
281#
235# Floating point emulation 282# Floating point emulation
236# 283#
237 284
@@ -246,6 +293,8 @@ CONFIG_FPE_NWFPE=y
246# Userspace binary formats 293# Userspace binary formats
247# 294#
248CONFIG_BINFMT_ELF=y 295CONFIG_BINFMT_ELF=y
296# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
297CONFIG_HAVE_AOUT=y
249# CONFIG_BINFMT_AOUT is not set 298# CONFIG_BINFMT_AOUT is not set
250# CONFIG_BINFMT_MISC is not set 299# CONFIG_BINFMT_MISC is not set
251 300
@@ -253,21 +302,18 @@ CONFIG_BINFMT_ELF=y
253# Power management options 302# Power management options
254# 303#
255CONFIG_PM=y 304CONFIG_PM=y
256# CONFIG_PM_LEGACY is not set
257# CONFIG_PM_DEBUG is not set 305# CONFIG_PM_DEBUG is not set
258CONFIG_PM_SLEEP=y 306CONFIG_PM_SLEEP=y
259CONFIG_SUSPEND_UP_POSSIBLE=y
260CONFIG_SUSPEND=y 307CONFIG_SUSPEND=y
308CONFIG_SUSPEND_FREEZER=y
261# CONFIG_APM_EMULATION is not set 309# CONFIG_APM_EMULATION is not set
262 310CONFIG_ARCH_SUSPEND_POSSIBLE=y
263#
264# Networking
265#
266CONFIG_NET=y 311CONFIG_NET=y
267 312
268# 313#
269# Networking options 314# Networking options
270# 315#
316CONFIG_COMPAT_NET_DEV_OPS=y
271CONFIG_PACKET=y 317CONFIG_PACKET=y
272CONFIG_PACKET_MMAP=y 318CONFIG_PACKET_MMAP=y
273CONFIG_UNIX=y 319CONFIG_UNIX=y
@@ -275,6 +321,7 @@ CONFIG_XFRM=y
275CONFIG_XFRM_USER=m 321CONFIG_XFRM_USER=m
276# CONFIG_XFRM_SUB_POLICY is not set 322# CONFIG_XFRM_SUB_POLICY is not set
277# CONFIG_XFRM_MIGRATE is not set 323# CONFIG_XFRM_MIGRATE is not set
324# CONFIG_XFRM_STATISTICS is not set
278CONFIG_NET_KEY=y 325CONFIG_NET_KEY=y
279# CONFIG_NET_KEY_MIGRATE is not set 326# CONFIG_NET_KEY_MIGRATE is not set
280CONFIG_INET=y 327CONFIG_INET=y
@@ -304,26 +351,26 @@ CONFIG_INET_TCP_DIAG=y
304CONFIG_TCP_CONG_CUBIC=y 351CONFIG_TCP_CONG_CUBIC=y
305CONFIG_DEFAULT_TCP_CONG="cubic" 352CONFIG_DEFAULT_TCP_CONG="cubic"
306# CONFIG_TCP_MD5SIG is not set 353# CONFIG_TCP_MD5SIG is not set
307# CONFIG_IP_VS is not set
308# CONFIG_IPV6 is not set 354# CONFIG_IPV6 is not set
309# CONFIG_INET6_XFRM_TUNNEL is not set
310# CONFIG_INET6_TUNNEL is not set
311# CONFIG_NETLABEL is not set 355# CONFIG_NETLABEL is not set
312# CONFIG_NETWORK_SECMARK is not set 356# CONFIG_NETWORK_SECMARK is not set
313CONFIG_NETFILTER=y 357CONFIG_NETFILTER=y
314# CONFIG_NETFILTER_DEBUG is not set 358# CONFIG_NETFILTER_DEBUG is not set
359CONFIG_NETFILTER_ADVANCED=y
315 360
316# 361#
317# Core Netfilter Configuration 362# Core Netfilter Configuration
318# 363#
319# CONFIG_NETFILTER_NETLINK is not set 364# CONFIG_NETFILTER_NETLINK_QUEUE is not set
320# CONFIG_NF_CONNTRACK_ENABLED is not set 365# CONFIG_NETFILTER_NETLINK_LOG is not set
321# CONFIG_NF_CONNTRACK is not set 366# CONFIG_NF_CONNTRACK is not set
322# CONFIG_NETFILTER_XTABLES is not set 367# CONFIG_NETFILTER_XTABLES is not set
368# CONFIG_IP_VS is not set
323 369
324# 370#
325# IP: Netfilter Configuration 371# IP: Netfilter Configuration
326# 372#
373# CONFIG_NF_DEFRAG_IPV4 is not set
327CONFIG_IP_NF_QUEUE=m 374CONFIG_IP_NF_QUEUE=m
328# CONFIG_IP_NF_IPTABLES is not set 375# CONFIG_IP_NF_IPTABLES is not set
329# CONFIG_IP_NF_ARPTABLES is not set 376# CONFIG_IP_NF_ARPTABLES is not set
@@ -332,7 +379,9 @@ CONFIG_IP_NF_QUEUE=m
332# CONFIG_TIPC is not set 379# CONFIG_TIPC is not set
333# CONFIG_ATM is not set 380# CONFIG_ATM is not set
334# CONFIG_BRIDGE is not set 381# CONFIG_BRIDGE is not set
382# CONFIG_NET_DSA is not set
335CONFIG_VLAN_8021Q=m 383CONFIG_VLAN_8021Q=m
384# CONFIG_VLAN_8021Q_GVRP is not set
336# CONFIG_DECNET is not set 385# CONFIG_DECNET is not set
337# CONFIG_LLC2 is not set 386# CONFIG_LLC2 is not set
338# CONFIG_IPX is not set 387# CONFIG_IPX is not set
@@ -342,12 +391,14 @@ CONFIG_VLAN_8021Q=m
342# CONFIG_ECONET is not set 391# CONFIG_ECONET is not set
343# CONFIG_WAN_ROUTER is not set 392# CONFIG_WAN_ROUTER is not set
344# CONFIG_NET_SCHED is not set 393# CONFIG_NET_SCHED is not set
394# CONFIG_DCB is not set
345 395
346# 396#
347# Network testing 397# Network testing
348# 398#
349# CONFIG_NET_PKTGEN is not set 399# CONFIG_NET_PKTGEN is not set
350# CONFIG_HAMRADIO is not set 400# CONFIG_HAMRADIO is not set
401# CONFIG_CAN is not set
351CONFIG_IRDA=m 402CONFIG_IRDA=m
352 403
353# 404#
@@ -382,15 +433,6 @@ CONFIG_IRTTY_SIR=m
382# CONFIG_KS959_DONGLE is not set 433# CONFIG_KS959_DONGLE is not set
383 434
384# 435#
385# Old SIR device drivers
386#
387# CONFIG_IRPORT_SIR is not set
388
389#
390# Old Serial dongle support
391#
392
393#
394# FIR device drivers 436# FIR device drivers
395# 437#
396# CONFIG_USB_IRDA is not set 438# CONFIG_USB_IRDA is not set
@@ -410,7 +452,6 @@ CONFIG_BT_HIDP=m
410# 452#
411# Bluetooth device drivers 453# Bluetooth device drivers
412# 454#
413# CONFIG_BT_HCIUSB is not set
414# CONFIG_BT_HCIBTUSB is not set 455# CONFIG_BT_HCIBTUSB is not set
415# CONFIG_BT_HCIBTSDIO is not set 456# CONFIG_BT_HCIBTSDIO is not set
416# CONFIG_BT_HCIUART is not set 457# CONFIG_BT_HCIUART is not set
@@ -419,21 +460,20 @@ CONFIG_BT_HIDP=m
419# CONFIG_BT_HCIBFUSB is not set 460# CONFIG_BT_HCIBFUSB is not set
420# CONFIG_BT_HCIVHCI is not set 461# CONFIG_BT_HCIVHCI is not set
421# CONFIG_AF_RXRPC is not set 462# CONFIG_AF_RXRPC is not set
422 463# CONFIG_PHONET is not set
423# 464CONFIG_WIRELESS=y
424# Wireless
425#
426CONFIG_CFG80211=y 465CONFIG_CFG80211=y
466# CONFIG_CFG80211_REG_DEBUG is not set
427CONFIG_NL80211=y 467CONFIG_NL80211=y
468CONFIG_WIRELESS_OLD_REGULATORY=y
428CONFIG_WIRELESS_EXT=y 469CONFIG_WIRELESS_EXT=y
470CONFIG_WIRELESS_EXT_SYSFS=y
471CONFIG_LIB80211=y
472CONFIG_LIB80211_CRYPT_WEP=y
473CONFIG_LIB80211_CRYPT_CCMP=y
474CONFIG_LIB80211_CRYPT_TKIP=y
429# CONFIG_MAC80211 is not set 475# CONFIG_MAC80211 is not set
430CONFIG_IEEE80211=y 476# CONFIG_WIMAX is not set
431# CONFIG_IEEE80211_DEBUG is not set
432CONFIG_IEEE80211_CRYPT_WEP=y
433CONFIG_IEEE80211_CRYPT_CCMP=m
434CONFIG_IEEE80211_CRYPT_TKIP=m
435CONFIG_IEEE80211_SOFTMAC=m
436# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set
437# CONFIG_RFKILL is not set 477# CONFIG_RFKILL is not set
438# CONFIG_NET_9P is not set 478# CONFIG_NET_9P is not set
439 479
@@ -448,6 +488,8 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
448CONFIG_STANDALONE=y 488CONFIG_STANDALONE=y
449CONFIG_PREVENT_FIRMWARE_BUILD=y 489CONFIG_PREVENT_FIRMWARE_BUILD=y
450CONFIG_FW_LOADER=y 490CONFIG_FW_LOADER=y
491CONFIG_FIRMWARE_IN_KERNEL=y
492CONFIG_EXTRA_FIRMWARE=""
451# CONFIG_DEBUG_DRIVER is not set 493# CONFIG_DEBUG_DRIVER is not set
452# CONFIG_DEBUG_DEVRES is not set 494# CONFIG_DEBUG_DEVRES is not set
453# CONFIG_SYS_HYPERVISOR is not set 495# CONFIG_SYS_HYPERVISOR is not set
@@ -457,9 +499,11 @@ CONFIG_MTD=y
457# CONFIG_MTD_DEBUG is not set 499# CONFIG_MTD_DEBUG is not set
458CONFIG_MTD_CONCAT=y 500CONFIG_MTD_CONCAT=y
459CONFIG_MTD_PARTITIONS=y 501CONFIG_MTD_PARTITIONS=y
502# CONFIG_MTD_TESTS is not set
460# CONFIG_MTD_REDBOOT_PARTS is not set 503# CONFIG_MTD_REDBOOT_PARTS is not set
461# CONFIG_MTD_CMDLINE_PARTS is not set 504# CONFIG_MTD_CMDLINE_PARTS is not set
462# CONFIG_MTD_AFS_PARTS is not set 505# CONFIG_MTD_AFS_PARTS is not set
506# CONFIG_MTD_AR7_PARTS is not set
463 507
464# 508#
465# User Modules And Translation Layers 509# User Modules And Translation Layers
@@ -510,9 +554,7 @@ CONFIG_MTD_CFI_UTIL=y
510# 554#
511CONFIG_MTD_COMPLEX_MAPPINGS=y 555CONFIG_MTD_COMPLEX_MAPPINGS=y
512CONFIG_MTD_PHYSMAP=y 556CONFIG_MTD_PHYSMAP=y
513CONFIG_MTD_PHYSMAP_START=0x0 557# CONFIG_MTD_PHYSMAP_COMPAT is not set
514CONFIG_MTD_PHYSMAP_LEN=0x0
515CONFIG_MTD_PHYSMAP_BANKWIDTH=2
516CONFIG_MTD_PXA2XX=y 558CONFIG_MTD_PXA2XX=y
517# CONFIG_MTD_ARM_INTEGRATOR is not set 559# CONFIG_MTD_ARM_INTEGRATOR is not set
518# CONFIG_MTD_IMPA7 is not set 560# CONFIG_MTD_IMPA7 is not set
@@ -538,6 +580,7 @@ CONFIG_MTD_NAND=y
538# CONFIG_MTD_NAND_ECC_SMC is not set 580# CONFIG_MTD_NAND_ECC_SMC is not set
539# CONFIG_MTD_NAND_MUSEUM_IDS is not set 581# CONFIG_MTD_NAND_MUSEUM_IDS is not set
540# CONFIG_MTD_NAND_H1900 is not set 582# CONFIG_MTD_NAND_H1900 is not set
583# CONFIG_MTD_NAND_GPIO is not set
541CONFIG_MTD_NAND_IDS=y 584CONFIG_MTD_NAND_IDS=y
542CONFIG_MTD_NAND_DISKONCHIP=y 585CONFIG_MTD_NAND_DISKONCHIP=y
543CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED=y 586CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED=y
@@ -556,6 +599,11 @@ CONFIG_MTD_ONENAND=y
556# CONFIG_MTD_ONENAND_SIM is not set 599# CONFIG_MTD_ONENAND_SIM is not set
557 600
558# 601#
602# LPDDR flash memory drivers
603#
604# CONFIG_MTD_LPDDR is not set
605
606#
559# UBI - Unsorted block images 607# UBI - Unsorted block images
560# 608#
561# CONFIG_MTD_UBI is not set 609# CONFIG_MTD_UBI is not set
@@ -569,36 +617,41 @@ CONFIG_BLK_DEV_NBD=y
569CONFIG_BLK_DEV_RAM=y 617CONFIG_BLK_DEV_RAM=y
570CONFIG_BLK_DEV_RAM_COUNT=8 618CONFIG_BLK_DEV_RAM_COUNT=8
571CONFIG_BLK_DEV_RAM_SIZE=4096 619CONFIG_BLK_DEV_RAM_SIZE=4096
572CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 620# CONFIG_BLK_DEV_XIP is not set
573# CONFIG_CDROM_PKTCDVD is not set 621# CONFIG_CDROM_PKTCDVD is not set
574# CONFIG_ATA_OVER_ETH is not set 622# CONFIG_ATA_OVER_ETH is not set
575CONFIG_MISC_DEVICES=y 623CONFIG_MISC_DEVICES=y
624# CONFIG_ICS932S401 is not set
625# CONFIG_ENCLOSURE_SERVICES is not set
626# CONFIG_ISL29003 is not set
627# CONFIG_C2PORT is not set
628
629#
630# EEPROM support
631#
632# CONFIG_EEPROM_AT24 is not set
633# CONFIG_EEPROM_LEGACY is not set
576# CONFIG_EEPROM_93CX6 is not set 634# CONFIG_EEPROM_93CX6 is not set
635CONFIG_HAVE_IDE=y
577CONFIG_IDE=y 636CONFIG_IDE=y
578CONFIG_IDE_MAX_HWIFS=4
579CONFIG_BLK_DEV_IDE=y
580 637
581# 638#
582# Please see Documentation/ide.txt for help/info on IDE drives 639# Please see Documentation/ide/ide.txt for help/info on IDE drives
583# 640#
584# CONFIG_BLK_DEV_IDE_SATA is not set 641# CONFIG_BLK_DEV_IDE_SATA is not set
585CONFIG_BLK_DEV_IDEDISK=y 642CONFIG_IDE_GD=y
586CONFIG_IDEDISK_MULTI_MODE=y 643CONFIG_IDE_GD_ATA=y
644# CONFIG_IDE_GD_ATAPI is not set
587# CONFIG_BLK_DEV_IDECD is not set 645# CONFIG_BLK_DEV_IDECD is not set
588# CONFIG_BLK_DEV_IDETAPE is not set 646# CONFIG_BLK_DEV_IDETAPE is not set
589# CONFIG_BLK_DEV_IDEFLOPPY is not set
590# CONFIG_IDE_TASK_IOCTL is not set 647# CONFIG_IDE_TASK_IOCTL is not set
591CONFIG_IDE_PROC_FS=y 648CONFIG_IDE_PROC_FS=y
592 649
593# 650#
594# IDE chipset support/bugfixes 651# IDE chipset support/bugfixes
595# 652#
596CONFIG_IDE_GENERIC=y
597# CONFIG_BLK_DEV_PLATFORM is not set 653# CONFIG_BLK_DEV_PLATFORM is not set
598# CONFIG_IDE_ARM is not set
599# CONFIG_BLK_DEV_IDEDMA is not set 654# CONFIG_BLK_DEV_IDEDMA is not set
600CONFIG_IDE_ARCH_OBSOLETE_INIT=y
601# CONFIG_BLK_DEV_HD is not set
602 655
603# 656#
604# SCSI device support 657# SCSI device support
@@ -610,7 +663,6 @@ CONFIG_IDE_ARCH_OBSOLETE_INIT=y
610# CONFIG_ATA is not set 663# CONFIG_ATA is not set
611# CONFIG_MD is not set 664# CONFIG_MD is not set
612CONFIG_NETDEVICES=y 665CONFIG_NETDEVICES=y
613# CONFIG_NETDEVICES_MULTIQUEUE is not set
614# CONFIG_DUMMY is not set 666# CONFIG_DUMMY is not set
615# CONFIG_BONDING is not set 667# CONFIG_BONDING is not set
616# CONFIG_MACVLAN is not set 668# CONFIG_MACVLAN is not set
@@ -631,6 +683,10 @@ CONFIG_PHYLIB=y
631# CONFIG_SMSC_PHY is not set 683# CONFIG_SMSC_PHY is not set
632# CONFIG_BROADCOM_PHY is not set 684# CONFIG_BROADCOM_PHY is not set
633# CONFIG_ICPLUS_PHY is not set 685# CONFIG_ICPLUS_PHY is not set
686# CONFIG_REALTEK_PHY is not set
687# CONFIG_NATIONAL_PHY is not set
688# CONFIG_STE10XP is not set
689# CONFIG_LSI_ET1011C_PHY is not set
634# CONFIG_FIXED_PHY is not set 690# CONFIG_FIXED_PHY is not set
635# CONFIG_MDIO_BITBANG is not set 691# CONFIG_MDIO_BITBANG is not set
636CONFIG_NET_ETHERNET=y 692CONFIG_NET_ETHERNET=y
@@ -638,11 +694,17 @@ CONFIG_MII=y
638# CONFIG_AX88796 is not set 694# CONFIG_AX88796 is not set
639# CONFIG_SMC91X is not set 695# CONFIG_SMC91X is not set
640CONFIG_DM9000=y 696CONFIG_DM9000=y
697CONFIG_DM9000_DEBUGLEVEL=4
698# CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL is not set
641# CONFIG_SMC911X is not set 699# CONFIG_SMC911X is not set
700# CONFIG_SMSC911X is not set
642# CONFIG_IBM_NEW_EMAC_ZMII is not set 701# CONFIG_IBM_NEW_EMAC_ZMII is not set
643# CONFIG_IBM_NEW_EMAC_RGMII is not set 702# CONFIG_IBM_NEW_EMAC_RGMII is not set
644# CONFIG_IBM_NEW_EMAC_TAH is not set 703# CONFIG_IBM_NEW_EMAC_TAH is not set
645# CONFIG_IBM_NEW_EMAC_EMAC4 is not set 704# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
705# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
706# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
707# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
646# CONFIG_B44 is not set 708# CONFIG_B44 is not set
647# CONFIG_NETDEV_1000 is not set 709# CONFIG_NETDEV_1000 is not set
648# CONFIG_NETDEV_10000 is not set 710# CONFIG_NETDEV_10000 is not set
@@ -654,10 +716,15 @@ CONFIG_DM9000=y
654CONFIG_WLAN_80211=y 716CONFIG_WLAN_80211=y
655# CONFIG_LIBERTAS is not set 717# CONFIG_LIBERTAS is not set
656# CONFIG_USB_ZD1201 is not set 718# CONFIG_USB_ZD1201 is not set
719# CONFIG_USB_NET_RNDIS_WLAN is not set
720# CONFIG_IWLWIFI_LEDS is not set
657CONFIG_HOSTAP=y 721CONFIG_HOSTAP=y
658CONFIG_HOSTAP_FIRMWARE=y 722CONFIG_HOSTAP_FIRMWARE=y
659CONFIG_HOSTAP_FIRMWARE_NVRAM=y 723CONFIG_HOSTAP_FIRMWARE_NVRAM=y
660# CONFIG_ZD1211RW is not set 724
725#
726# Enable WiMAX (Networking options) to see the WiMAX drivers
727#
661 728
662# 729#
663# USB Network Adapters 730# USB Network Adapters
@@ -670,7 +737,6 @@ CONFIG_HOSTAP_FIRMWARE_NVRAM=y
670# CONFIG_WAN is not set 737# CONFIG_WAN is not set
671# CONFIG_PPP is not set 738# CONFIG_PPP is not set
672# CONFIG_SLIP is not set 739# CONFIG_SLIP is not set
673# CONFIG_SHAPER is not set
674# CONFIG_NETCONSOLE is not set 740# CONFIG_NETCONSOLE is not set
675# CONFIG_NETPOLL is not set 741# CONFIG_NETPOLL is not set
676# CONFIG_NET_POLL_CONTROLLER is not set 742# CONFIG_NET_POLL_CONTROLLER is not set
@@ -710,6 +776,7 @@ CONFIG_INPUT_MOUSE=y
710# CONFIG_MOUSE_PS2 is not set 776# CONFIG_MOUSE_PS2 is not set
711CONFIG_MOUSE_SERIAL=m 777CONFIG_MOUSE_SERIAL=m
712# CONFIG_MOUSE_APPLETOUCH is not set 778# CONFIG_MOUSE_APPLETOUCH is not set
779# CONFIG_MOUSE_BCM5974 is not set
713# CONFIG_MOUSE_VSXXXAA is not set 780# CONFIG_MOUSE_VSXXXAA is not set
714# CONFIG_MOUSE_GPIO is not set 781# CONFIG_MOUSE_GPIO is not set
715# CONFIG_INPUT_JOYSTICK is not set 782# CONFIG_INPUT_JOYSTICK is not set
@@ -718,20 +785,25 @@ CONFIG_INPUT_TOUCHSCREEN=y
718# CONFIG_TOUCHSCREEN_FUJITSU is not set 785# CONFIG_TOUCHSCREEN_FUJITSU is not set
719# CONFIG_TOUCHSCREEN_GUNZE is not set 786# CONFIG_TOUCHSCREEN_GUNZE is not set
720# CONFIG_TOUCHSCREEN_ELO is not set 787# CONFIG_TOUCHSCREEN_ELO is not set
788# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
721# CONFIG_TOUCHSCREEN_MTOUCH is not set 789# CONFIG_TOUCHSCREEN_MTOUCH is not set
790# CONFIG_TOUCHSCREEN_INEXIO is not set
722# CONFIG_TOUCHSCREEN_MK712 is not set 791# CONFIG_TOUCHSCREEN_MK712 is not set
723# CONFIG_TOUCHSCREEN_PENMOUNT is not set 792# CONFIG_TOUCHSCREEN_PENMOUNT is not set
724# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set 793# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
725# CONFIG_TOUCHSCREEN_TOUCHWIN is not set 794# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
726CONFIG_TOUCHSCREEN_UCB1400=y
727# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set 795# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
796# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
797# CONFIG_TOUCHSCREEN_TSC2007 is not set
728CONFIG_INPUT_MISC=y 798CONFIG_INPUT_MISC=y
729# CONFIG_INPUT_ATI_REMOTE is not set 799# CONFIG_INPUT_ATI_REMOTE is not set
730# CONFIG_INPUT_ATI_REMOTE2 is not set 800# CONFIG_INPUT_ATI_REMOTE2 is not set
731# CONFIG_INPUT_KEYSPAN_REMOTE is not set 801# CONFIG_INPUT_KEYSPAN_REMOTE is not set
732# CONFIG_INPUT_POWERMATE is not set 802# CONFIG_INPUT_POWERMATE is not set
733# CONFIG_INPUT_YEALINK is not set 803# CONFIG_INPUT_YEALINK is not set
804# CONFIG_INPUT_CM109 is not set
734CONFIG_INPUT_UINPUT=m 805CONFIG_INPUT_UINPUT=m
806# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
735 807
736# 808#
737# Hardware I/O ports 809# Hardware I/O ports
@@ -746,9 +818,11 @@ CONFIG_SERIO_LIBPS2=y
746# Character devices 818# Character devices
747# 819#
748CONFIG_VT=y 820CONFIG_VT=y
821CONFIG_CONSOLE_TRANSLATIONS=y
749CONFIG_VT_CONSOLE=y 822CONFIG_VT_CONSOLE=y
750CONFIG_HW_CONSOLE=y 823CONFIG_HW_CONSOLE=y
751# CONFIG_VT_HW_CONSOLE_BINDING is not set 824# CONFIG_VT_HW_CONSOLE_BINDING is not set
825CONFIG_DEVKMEM=y
752# CONFIG_SERIAL_NONSTANDARD is not set 826# CONFIG_SERIAL_NONSTANDARD is not set
753 827
754# 828#
@@ -764,45 +838,50 @@ CONFIG_SERIAL_PXA_CONSOLE=y
764CONFIG_SERIAL_CORE=y 838CONFIG_SERIAL_CORE=y
765CONFIG_SERIAL_CORE_CONSOLE=y 839CONFIG_SERIAL_CORE_CONSOLE=y
766CONFIG_UNIX98_PTYS=y 840CONFIG_UNIX98_PTYS=y
841# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
767CONFIG_LEGACY_PTYS=y 842CONFIG_LEGACY_PTYS=y
768CONFIG_LEGACY_PTY_COUNT=256 843CONFIG_LEGACY_PTY_COUNT=256
769# CONFIG_IPMI_HANDLER is not set 844# CONFIG_IPMI_HANDLER is not set
770CONFIG_HW_RANDOM=y 845CONFIG_HW_RANDOM=y
771# CONFIG_NVRAM is not set
772# CONFIG_R3964 is not set 846# CONFIG_R3964 is not set
773# CONFIG_RAW_DRIVER is not set 847# CONFIG_RAW_DRIVER is not set
774# CONFIG_TCG_TPM is not set 848# CONFIG_TCG_TPM is not set
775CONFIG_I2C=y 849CONFIG_I2C=y
776CONFIG_I2C_BOARDINFO=y 850CONFIG_I2C_BOARDINFO=y
777CONFIG_I2C_CHARDEV=y 851CONFIG_I2C_CHARDEV=y
852CONFIG_I2C_HELPER_AUTO=y
778 853
779# 854#
780# I2C Algorithms 855# I2C Hardware Bus support
781# 856#
782# CONFIG_I2C_ALGOBIT is not set
783# CONFIG_I2C_ALGOPCF is not set
784# CONFIG_I2C_ALGOPCA is not set
785 857
786# 858#
787# I2C Hardware Bus support 859# I2C system bus drivers (mostly embedded / system-on-chip)
788# 860#
789# CONFIG_I2C_GPIO is not set 861# CONFIG_I2C_GPIO is not set
790# CONFIG_I2C_PXA is not set
791# CONFIG_I2C_OCORES is not set 862# CONFIG_I2C_OCORES is not set
792# CONFIG_I2C_PARPORT_LIGHT is not set 863# CONFIG_I2C_PXA is not set
793# CONFIG_I2C_SIMTEC is not set 864# CONFIG_I2C_SIMTEC is not set
865
866#
867# External I2C/SMBus adapter drivers
868#
869# CONFIG_I2C_PARPORT_LIGHT is not set
794# CONFIG_I2C_TAOS_EVM is not set 870# CONFIG_I2C_TAOS_EVM is not set
795# CONFIG_I2C_STUB is not set
796# CONFIG_I2C_TINY_USB is not set 871# CONFIG_I2C_TINY_USB is not set
797 872
798# 873#
874# Other I2C/SMBus bus drivers
875#
876# CONFIG_I2C_PCA_PLATFORM is not set
877# CONFIG_I2C_STUB is not set
878
879#
799# Miscellaneous I2C Chip support 880# Miscellaneous I2C Chip support
800# 881#
801# CONFIG_SENSORS_DS1337 is not set
802# CONFIG_SENSORS_DS1374 is not set
803# CONFIG_DS1682 is not set 882# CONFIG_DS1682 is not set
804# CONFIG_EEPROM_LEGACY is not set
805# CONFIG_SENSORS_PCF8574 is not set 883# CONFIG_SENSORS_PCF8574 is not set
884# CONFIG_PCF8575 is not set
806# CONFIG_SENSORS_PCA9539 is not set 885# CONFIG_SENSORS_PCA9539 is not set
807# CONFIG_SENSORS_PCF8591 is not set 886# CONFIG_SENSORS_PCF8591 is not set
808# CONFIG_SENSORS_MAX6875 is not set 887# CONFIG_SENSORS_MAX6875 is not set
@@ -811,16 +890,35 @@ CONFIG_I2C_CHARDEV=y
811# CONFIG_I2C_DEBUG_ALGO is not set 890# CONFIG_I2C_DEBUG_ALGO is not set
812# CONFIG_I2C_DEBUG_BUS is not set 891# CONFIG_I2C_DEBUG_BUS is not set
813# CONFIG_I2C_DEBUG_CHIP is not set 892# CONFIG_I2C_DEBUG_CHIP is not set
893# CONFIG_SPI is not set
894CONFIG_ARCH_REQUIRE_GPIOLIB=y
895CONFIG_GPIOLIB=y
896# CONFIG_DEBUG_GPIO is not set
897# CONFIG_GPIO_SYSFS is not set
814 898
815# 899#
816# SPI support 900# Memory mapped GPIO expanders:
901#
902
903#
904# I2C GPIO expanders:
905#
906# CONFIG_GPIO_MAX732X is not set
907# CONFIG_GPIO_PCA953X is not set
908# CONFIG_GPIO_PCF857X is not set
909
910#
911# PCI GPIO expanders:
912#
913
914#
915# SPI GPIO expanders:
817# 916#
818# CONFIG_SPI is not set
819# CONFIG_SPI_MASTER is not set
820# CONFIG_W1 is not set 917# CONFIG_W1 is not set
821# CONFIG_POWER_SUPPLY is not set 918# CONFIG_POWER_SUPPLY is not set
822CONFIG_HWMON=y 919CONFIG_HWMON=y
823# CONFIG_HWMON_VID is not set 920# CONFIG_HWMON_VID is not set
921# CONFIG_SENSORS_AD7414 is not set
824# CONFIG_SENSORS_AD7418 is not set 922# CONFIG_SENSORS_AD7418 is not set
825# CONFIG_SENSORS_ADM1021 is not set 923# CONFIG_SENSORS_ADM1021 is not set
826# CONFIG_SENSORS_ADM1025 is not set 924# CONFIG_SENSORS_ADM1025 is not set
@@ -828,7 +926,10 @@ CONFIG_HWMON=y
828# CONFIG_SENSORS_ADM1029 is not set 926# CONFIG_SENSORS_ADM1029 is not set
829# CONFIG_SENSORS_ADM1031 is not set 927# CONFIG_SENSORS_ADM1031 is not set
830# CONFIG_SENSORS_ADM9240 is not set 928# CONFIG_SENSORS_ADM9240 is not set
929# CONFIG_SENSORS_ADT7462 is not set
831# CONFIG_SENSORS_ADT7470 is not set 930# CONFIG_SENSORS_ADT7470 is not set
931# CONFIG_SENSORS_ADT7473 is not set
932# CONFIG_SENSORS_ADT7475 is not set
832# CONFIG_SENSORS_ATXP1 is not set 933# CONFIG_SENSORS_ATXP1 is not set
833# CONFIG_SENSORS_DS1621 is not set 934# CONFIG_SENSORS_DS1621 is not set
834# CONFIG_SENSORS_F71805F is not set 935# CONFIG_SENSORS_F71805F is not set
@@ -848,6 +949,7 @@ CONFIG_HWMON=y
848# CONFIG_SENSORS_LM90 is not set 949# CONFIG_SENSORS_LM90 is not set
849# CONFIG_SENSORS_LM92 is not set 950# CONFIG_SENSORS_LM92 is not set
850# CONFIG_SENSORS_LM93 is not set 951# CONFIG_SENSORS_LM93 is not set
952# CONFIG_SENSORS_LTC4245 is not set
851# CONFIG_SENSORS_MAX1619 is not set 953# CONFIG_SENSORS_MAX1619 is not set
852# CONFIG_SENSORS_MAX6650 is not set 954# CONFIG_SENSORS_MAX6650 is not set
853# CONFIG_SENSORS_PC87360 is not set 955# CONFIG_SENSORS_PC87360 is not set
@@ -856,6 +958,7 @@ CONFIG_HWMON=y
856# CONFIG_SENSORS_SMSC47M1 is not set 958# CONFIG_SENSORS_SMSC47M1 is not set
857# CONFIG_SENSORS_SMSC47M192 is not set 959# CONFIG_SENSORS_SMSC47M192 is not set
858# CONFIG_SENSORS_SMSC47B397 is not set 960# CONFIG_SENSORS_SMSC47B397 is not set
961# CONFIG_SENSORS_ADS7828 is not set
859# CONFIG_SENSORS_THMC50 is not set 962# CONFIG_SENSORS_THMC50 is not set
860# CONFIG_SENSORS_VT1211 is not set 963# CONFIG_SENSORS_VT1211 is not set
861# CONFIG_SENSORS_W83781D is not set 964# CONFIG_SENSORS_W83781D is not set
@@ -863,9 +966,12 @@ CONFIG_HWMON=y
863# CONFIG_SENSORS_W83792D is not set 966# CONFIG_SENSORS_W83792D is not set
864# CONFIG_SENSORS_W83793 is not set 967# CONFIG_SENSORS_W83793 is not set
865# CONFIG_SENSORS_W83L785TS is not set 968# CONFIG_SENSORS_W83L785TS is not set
969# CONFIG_SENSORS_W83L786NG is not set
866# CONFIG_SENSORS_W83627HF is not set 970# CONFIG_SENSORS_W83627HF is not set
867# CONFIG_SENSORS_W83627EHF is not set 971# CONFIG_SENSORS_W83627EHF is not set
868# CONFIG_HWMON_DEBUG_CHIP is not set 972# CONFIG_HWMON_DEBUG_CHIP is not set
973# CONFIG_THERMAL is not set
974# CONFIG_THERMAL_HWMON is not set
869CONFIG_WATCHDOG=y 975CONFIG_WATCHDOG=y
870# CONFIG_WATCHDOG_NOWAYOUT is not set 976# CONFIG_WATCHDOG_NOWAYOUT is not set
871 977
@@ -879,23 +985,46 @@ CONFIG_WATCHDOG=y
879# USB-based Watchdog Cards 985# USB-based Watchdog Cards
880# 986#
881# CONFIG_USBPCWATCHDOG is not set 987# CONFIG_USBPCWATCHDOG is not set
988CONFIG_SSB_POSSIBLE=y
882 989
883# 990#
884# Sonics Silicon Backplane 991# Sonics Silicon Backplane
885# 992#
886CONFIG_SSB_POSSIBLE=y
887# CONFIG_SSB is not set 993# CONFIG_SSB is not set
888 994
889# 995#
890# Multifunction device drivers 996# Multifunction device drivers
891# 997#
998# CONFIG_MFD_CORE is not set
892# CONFIG_MFD_SM501 is not set 999# CONFIG_MFD_SM501 is not set
1000# CONFIG_MFD_ASIC3 is not set
1001# CONFIG_HTC_EGPIO is not set
1002# CONFIG_HTC_PASIC3 is not set
1003# CONFIG_TPS65010 is not set
1004# CONFIG_TWL4030_CORE is not set
1005# CONFIG_MFD_TMIO is not set
1006# CONFIG_MFD_T7L66XB is not set
1007# CONFIG_MFD_TC6387XB is not set
1008# CONFIG_MFD_TC6393XB is not set
1009# CONFIG_PMIC_DA903X is not set
1010# CONFIG_MFD_WM8400 is not set
1011# CONFIG_MFD_WM8350_I2C is not set
1012# CONFIG_MFD_PCF50633 is not set
893 1013
894# 1014#
895# Multimedia devices 1015# Multimedia devices
896# 1016#
1017
1018#
1019# Multimedia core support
1020#
897# CONFIG_VIDEO_DEV is not set 1021# CONFIG_VIDEO_DEV is not set
898# CONFIG_DVB_CORE is not set 1022# CONFIG_DVB_CORE is not set
1023# CONFIG_VIDEO_MEDIA is not set
1024
1025#
1026# Multimedia drivers
1027#
899CONFIG_DAB=y 1028CONFIG_DAB=y
900# CONFIG_USB_DABUSB is not set 1029# CONFIG_USB_DABUSB is not set
901 1030
@@ -907,6 +1036,7 @@ CONFIG_DAB=y
907CONFIG_FB=y 1036CONFIG_FB=y
908CONFIG_FIRMWARE_EDID=y 1037CONFIG_FIRMWARE_EDID=y
909# CONFIG_FB_DDC is not set 1038# CONFIG_FB_DDC is not set
1039# CONFIG_FB_BOOT_VESA_SUPPORT is not set
910CONFIG_FB_CFB_FILLRECT=y 1040CONFIG_FB_CFB_FILLRECT=y
911CONFIG_FB_CFB_COPYAREA=y 1041CONFIG_FB_CFB_COPYAREA=y
912CONFIG_FB_CFB_IMAGEBLIT=y 1042CONFIG_FB_CFB_IMAGEBLIT=y
@@ -914,8 +1044,8 @@ CONFIG_FB_CFB_IMAGEBLIT=y
914# CONFIG_FB_SYS_FILLRECT is not set 1044# CONFIG_FB_SYS_FILLRECT is not set
915# CONFIG_FB_SYS_COPYAREA is not set 1045# CONFIG_FB_SYS_COPYAREA is not set
916# CONFIG_FB_SYS_IMAGEBLIT is not set 1046# CONFIG_FB_SYS_IMAGEBLIT is not set
1047# CONFIG_FB_FOREIGN_ENDIAN is not set
917# CONFIG_FB_SYS_FOPS is not set 1048# CONFIG_FB_SYS_FOPS is not set
918CONFIG_FB_DEFERRED_IO=y
919# CONFIG_FB_SVGALIB is not set 1049# CONFIG_FB_SVGALIB is not set
920# CONFIG_FB_MACMODES is not set 1050# CONFIG_FB_MACMODES is not set
921# CONFIG_FB_BACKLIGHT is not set 1051# CONFIG_FB_BACKLIGHT is not set
@@ -928,13 +1058,20 @@ CONFIG_FB_DEFERRED_IO=y
928# CONFIG_FB_UVESA is not set 1058# CONFIG_FB_UVESA is not set
929# CONFIG_FB_S1D13XXX is not set 1059# CONFIG_FB_S1D13XXX is not set
930CONFIG_FB_PXA=y 1060CONFIG_FB_PXA=y
1061# CONFIG_FB_PXA_OVERLAY is not set
1062# CONFIG_FB_PXA_SMARTPANEL is not set
931# CONFIG_FB_PXA_PARAMETERS is not set 1063# CONFIG_FB_PXA_PARAMETERS is not set
932# CONFIG_FB_MBX is not set 1064# CONFIG_FB_MBX is not set
1065# CONFIG_FB_W100 is not set
933# CONFIG_FB_VIRTUAL is not set 1066# CONFIG_FB_VIRTUAL is not set
1067# CONFIG_FB_METRONOME is not set
1068# CONFIG_FB_MB862XX is not set
934CONFIG_BACKLIGHT_LCD_SUPPORT=y 1069CONFIG_BACKLIGHT_LCD_SUPPORT=y
935CONFIG_LCD_CLASS_DEVICE=y 1070CONFIG_LCD_CLASS_DEVICE=y
1071# CONFIG_LCD_ILI9320 is not set
1072# CONFIG_LCD_PLATFORM is not set
936CONFIG_BACKLIGHT_CLASS_DEVICE=y 1073CONFIG_BACKLIGHT_CLASS_DEVICE=y
937# CONFIG_BACKLIGHT_CORGI is not set 1074CONFIG_BACKLIGHT_GENERIC=y
938 1075
939# 1076#
940# Display device support 1077# Display device support
@@ -964,12 +1101,7 @@ CONFIG_LOGO=y
964CONFIG_LOGO_LINUX_MONO=y 1101CONFIG_LOGO_LINUX_MONO=y
965CONFIG_LOGO_LINUX_VGA16=y 1102CONFIG_LOGO_LINUX_VGA16=y
966CONFIG_LOGO_LINUX_CLUT224=y 1103CONFIG_LOGO_LINUX_CLUT224=y
967
968#
969# Sound
970#
971# CONFIG_SOUND is not set 1104# CONFIG_SOUND is not set
972CONFIG_AC97_BUS=y
973CONFIG_HID_SUPPORT=y 1105CONFIG_HID_SUPPORT=y
974CONFIG_HID=y 1106CONFIG_HID=y
975# CONFIG_HID_DEBUG is not set 1107# CONFIG_HID_DEBUG is not set
@@ -979,18 +1111,26 @@ CONFIG_HID=y
979# USB Input Devices 1111# USB Input Devices
980# 1112#
981# CONFIG_USB_HID is not set 1113# CONFIG_USB_HID is not set
1114# CONFIG_HID_PID is not set
982 1115
983# 1116#
984# USB HID Boot Protocol drivers 1117# USB HID Boot Protocol drivers
985# 1118#
986# CONFIG_USB_KBD is not set 1119# CONFIG_USB_KBD is not set
987# CONFIG_USB_MOUSE is not set 1120# CONFIG_USB_MOUSE is not set
1121
1122#
1123# Special HID drivers
1124#
1125CONFIG_HID_COMPAT=y
1126# CONFIG_HID_APPLE is not set
988CONFIG_USB_SUPPORT=y 1127CONFIG_USB_SUPPORT=y
989CONFIG_USB_ARCH_HAS_HCD=y 1128CONFIG_USB_ARCH_HAS_HCD=y
990CONFIG_USB_ARCH_HAS_OHCI=y 1129CONFIG_USB_ARCH_HAS_OHCI=y
991# CONFIG_USB_ARCH_HAS_EHCI is not set 1130# CONFIG_USB_ARCH_HAS_EHCI is not set
992CONFIG_USB=y 1131CONFIG_USB=y
993# CONFIG_USB_DEBUG is not set 1132# CONFIG_USB_DEBUG is not set
1133# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
994 1134
995# 1135#
996# Miscellaneous USB options 1136# Miscellaneous USB options
@@ -999,29 +1139,40 @@ CONFIG_USB_DEVICEFS=y
999# CONFIG_USB_DEVICE_CLASS is not set 1139# CONFIG_USB_DEVICE_CLASS is not set
1000# CONFIG_USB_DYNAMIC_MINORS is not set 1140# CONFIG_USB_DYNAMIC_MINORS is not set
1001# CONFIG_USB_SUSPEND is not set 1141# CONFIG_USB_SUSPEND is not set
1002# CONFIG_USB_PERSIST is not set
1003# CONFIG_USB_OTG is not set 1142# CONFIG_USB_OTG is not set
1143# CONFIG_USB_OTG_WHITELIST is not set
1144# CONFIG_USB_OTG_BLACKLIST_HUB is not set
1145# CONFIG_USB_MON is not set
1146# CONFIG_USB_WUSB is not set
1147# CONFIG_USB_WUSB_CBAF is not set
1004 1148
1005# 1149#
1006# USB Host Controller Drivers 1150# USB Host Controller Drivers
1007# 1151#
1152# CONFIG_USB_C67X00_HCD is not set
1153# CONFIG_USB_OXU210HP_HCD is not set
1008# CONFIG_USB_ISP116X_HCD is not set 1154# CONFIG_USB_ISP116X_HCD is not set
1009# CONFIG_USB_OHCI_HCD is not set 1155# CONFIG_USB_OHCI_HCD is not set
1010# CONFIG_USB_SL811_HCD is not set 1156# CONFIG_USB_SL811_HCD is not set
1011# CONFIG_USB_R8A66597_HCD is not set 1157# CONFIG_USB_R8A66597_HCD is not set
1158# CONFIG_USB_HWA_HCD is not set
1159# CONFIG_USB_MUSB_HDRC is not set
1160# CONFIG_USB_GADGET_MUSB_HDRC is not set
1012 1161
1013# 1162#
1014# USB Device Class drivers 1163# USB Device Class drivers
1015# 1164#
1016# CONFIG_USB_ACM is not set 1165# CONFIG_USB_ACM is not set
1017# CONFIG_USB_PRINTER is not set 1166# CONFIG_USB_PRINTER is not set
1167# CONFIG_USB_WDM is not set
1168# CONFIG_USB_TMC is not set
1018 1169
1019# 1170#
1020# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 1171# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
1021# 1172#
1022 1173
1023# 1174#
1024# may also be needed; see USB_STORAGE Help for more information 1175# see USB_STORAGE Help for more information
1025# 1176#
1026# CONFIG_USB_LIBUSUAL is not set 1177# CONFIG_USB_LIBUSUAL is not set
1027 1178
@@ -1029,19 +1180,14 @@ CONFIG_USB_DEVICEFS=y
1029# USB Imaging devices 1180# USB Imaging devices
1030# 1181#
1031# CONFIG_USB_MDC800 is not set 1182# CONFIG_USB_MDC800 is not set
1032# CONFIG_USB_MON is not set
1033 1183
1034# 1184#
1035# USB port drivers 1185# USB port drivers
1036# 1186#
1037
1038#
1039# USB Serial Converter support
1040#
1041CONFIG_USB_SERIAL=m 1187CONFIG_USB_SERIAL=m
1188# CONFIG_USB_EZUSB is not set
1042# CONFIG_USB_SERIAL_GENERIC is not set 1189# CONFIG_USB_SERIAL_GENERIC is not set
1043# CONFIG_USB_SERIAL_AIRCABLE is not set 1190# CONFIG_USB_SERIAL_AIRCABLE is not set
1044# CONFIG_USB_SERIAL_AIRPRIME is not set
1045# CONFIG_USB_SERIAL_ARK3116 is not set 1191# CONFIG_USB_SERIAL_ARK3116 is not set
1046# CONFIG_USB_SERIAL_BELKIN is not set 1192# CONFIG_USB_SERIAL_BELKIN is not set
1047# CONFIG_USB_SERIAL_CH341 is not set 1193# CONFIG_USB_SERIAL_CH341 is not set
@@ -1059,6 +1205,7 @@ CONFIG_USB_SERIAL=m
1059# CONFIG_USB_SERIAL_EDGEPORT_TI is not set 1205# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
1060# CONFIG_USB_SERIAL_GARMIN is not set 1206# CONFIG_USB_SERIAL_GARMIN is not set
1061# CONFIG_USB_SERIAL_IPW is not set 1207# CONFIG_USB_SERIAL_IPW is not set
1208# CONFIG_USB_SERIAL_IUU is not set
1062# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set 1209# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
1063# CONFIG_USB_SERIAL_KEYSPAN is not set 1210# CONFIG_USB_SERIAL_KEYSPAN is not set
1064# CONFIG_USB_SERIAL_KLSI is not set 1211# CONFIG_USB_SERIAL_KLSI is not set
@@ -1066,17 +1213,21 @@ CONFIG_USB_SERIAL=m
1066# CONFIG_USB_SERIAL_MCT_U232 is not set 1213# CONFIG_USB_SERIAL_MCT_U232 is not set
1067# CONFIG_USB_SERIAL_MOS7720 is not set 1214# CONFIG_USB_SERIAL_MOS7720 is not set
1068# CONFIG_USB_SERIAL_MOS7840 is not set 1215# CONFIG_USB_SERIAL_MOS7840 is not set
1216# CONFIG_USB_SERIAL_MOTOROLA is not set
1069# CONFIG_USB_SERIAL_NAVMAN is not set 1217# CONFIG_USB_SERIAL_NAVMAN is not set
1070# CONFIG_USB_SERIAL_PL2303 is not set 1218# CONFIG_USB_SERIAL_PL2303 is not set
1071# CONFIG_USB_SERIAL_OTI6858 is not set 1219# CONFIG_USB_SERIAL_OTI6858 is not set
1220# CONFIG_USB_SERIAL_SPCP8X5 is not set
1072# CONFIG_USB_SERIAL_HP4X is not set 1221# CONFIG_USB_SERIAL_HP4X is not set
1073# CONFIG_USB_SERIAL_SAFE is not set 1222# CONFIG_USB_SERIAL_SAFE is not set
1223# CONFIG_USB_SERIAL_SIEMENS_MPI is not set
1074# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set 1224# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
1075# CONFIG_USB_SERIAL_TI is not set 1225# CONFIG_USB_SERIAL_TI is not set
1076# CONFIG_USB_SERIAL_CYBERJACK is not set 1226# CONFIG_USB_SERIAL_CYBERJACK is not set
1077# CONFIG_USB_SERIAL_XIRCOM is not set 1227# CONFIG_USB_SERIAL_XIRCOM is not set
1078# CONFIG_USB_SERIAL_OPTION is not set 1228# CONFIG_USB_SERIAL_OPTION is not set
1079# CONFIG_USB_SERIAL_OMNINET is not set 1229# CONFIG_USB_SERIAL_OMNINET is not set
1230# CONFIG_USB_SERIAL_OPTICON is not set
1080# CONFIG_USB_SERIAL_DEBUG is not set 1231# CONFIG_USB_SERIAL_DEBUG is not set
1081 1232
1082# 1233#
@@ -1085,7 +1236,7 @@ CONFIG_USB_SERIAL=m
1085# CONFIG_USB_EMI62 is not set 1236# CONFIG_USB_EMI62 is not set
1086# CONFIG_USB_EMI26 is not set 1237# CONFIG_USB_EMI26 is not set
1087# CONFIG_USB_ADUTUX is not set 1238# CONFIG_USB_ADUTUX is not set
1088# CONFIG_USB_AUERSWALD is not set 1239# CONFIG_USB_SEVSEG is not set
1089# CONFIG_USB_RIO500 is not set 1240# CONFIG_USB_RIO500 is not set
1090# CONFIG_USB_LEGOTOWER is not set 1241# CONFIG_USB_LEGOTOWER is not set
1091# CONFIG_USB_LCD is not set 1242# CONFIG_USB_LCD is not set
@@ -1101,30 +1252,29 @@ CONFIG_USB_SERIAL=m
1101# CONFIG_USB_TRANCEVIBRATOR is not set 1252# CONFIG_USB_TRANCEVIBRATOR is not set
1102# CONFIG_USB_IOWARRIOR is not set 1253# CONFIG_USB_IOWARRIOR is not set
1103# CONFIG_USB_TEST is not set 1254# CONFIG_USB_TEST is not set
1104 1255# CONFIG_USB_ISIGHTFW is not set
1105# 1256# CONFIG_USB_VST is not set
1106# USB DSL modem support
1107#
1108
1109#
1110# USB Gadget Support
1111#
1112CONFIG_USB_GADGET=m 1257CONFIG_USB_GADGET=m
1113# CONFIG_USB_GADGET_DEBUG is not set 1258# CONFIG_USB_GADGET_DEBUG is not set
1114# CONFIG_USB_GADGET_DEBUG_FILES is not set 1259# CONFIG_USB_GADGET_DEBUG_FILES is not set
1115# CONFIG_USB_GADGET_DEBUG_FS is not set 1260# CONFIG_USB_GADGET_DEBUG_FS is not set
1261CONFIG_USB_GADGET_VBUS_DRAW=2
1116CONFIG_USB_GADGET_SELECTED=y 1262CONFIG_USB_GADGET_SELECTED=y
1117# CONFIG_USB_GADGET_AMD5536UDC is not set 1263# CONFIG_USB_GADGET_AT91 is not set
1118# CONFIG_USB_GADGET_ATMEL_USBA is not set 1264# CONFIG_USB_GADGET_ATMEL_USBA is not set
1119# CONFIG_USB_GADGET_FSL_USB2 is not set 1265# CONFIG_USB_GADGET_FSL_USB2 is not set
1120# CONFIG_USB_GADGET_NET2280 is not set
1121# CONFIG_USB_GADGET_PXA2XX is not set
1122# CONFIG_USB_GADGET_M66592 is not set
1123# CONFIG_USB_GADGET_GOKU is not set
1124# CONFIG_USB_GADGET_LH7A40X is not set 1266# CONFIG_USB_GADGET_LH7A40X is not set
1125# CONFIG_USB_GADGET_OMAP is not set 1267# CONFIG_USB_GADGET_OMAP is not set
1268# CONFIG_USB_GADGET_PXA25X is not set
1269# CONFIG_USB_GADGET_PXA27X is not set
1126# CONFIG_USB_GADGET_S3C2410 is not set 1270# CONFIG_USB_GADGET_S3C2410 is not set
1127# CONFIG_USB_GADGET_AT91 is not set 1271# CONFIG_USB_GADGET_IMX is not set
1272# CONFIG_USB_GADGET_M66592 is not set
1273# CONFIG_USB_GADGET_AMD5536UDC is not set
1274# CONFIG_USB_GADGET_FSL_QE is not set
1275# CONFIG_USB_GADGET_CI13XXX is not set
1276# CONFIG_USB_GADGET_NET2280 is not set
1277# CONFIG_USB_GADGET_GOKU is not set
1128CONFIG_USB_GADGET_DUMMY_HCD=y 1278CONFIG_USB_GADGET_DUMMY_HCD=y
1129CONFIG_USB_DUMMY_HCD=m 1279CONFIG_USB_DUMMY_HCD=m
1130CONFIG_USB_GADGET_DUALSPEED=y 1280CONFIG_USB_GADGET_DUALSPEED=y
@@ -1134,21 +1284,32 @@ CONFIG_USB_GADGET_DUALSPEED=y
1134# CONFIG_USB_FILE_STORAGE is not set 1284# CONFIG_USB_FILE_STORAGE is not set
1135# CONFIG_USB_G_SERIAL is not set 1285# CONFIG_USB_G_SERIAL is not set
1136# CONFIG_USB_MIDI_GADGET is not set 1286# CONFIG_USB_MIDI_GADGET is not set
1287# CONFIG_USB_G_PRINTER is not set
1288# CONFIG_USB_CDC_COMPOSITE is not set
1289
1290#
1291# OTG and related infrastructure
1292#
1293# CONFIG_USB_GPIO_VBUS is not set
1137CONFIG_MMC=y 1294CONFIG_MMC=y
1138# CONFIG_MMC_DEBUG is not set 1295# CONFIG_MMC_DEBUG is not set
1139# CONFIG_MMC_UNSAFE_RESUME is not set 1296# CONFIG_MMC_UNSAFE_RESUME is not set
1140 1297
1141# 1298#
1142# MMC/SD Card Drivers 1299# MMC/SD/SDIO Card Drivers
1143# 1300#
1144CONFIG_MMC_BLOCK=y 1301CONFIG_MMC_BLOCK=y
1145CONFIG_MMC_BLOCK_BOUNCE=y 1302CONFIG_MMC_BLOCK_BOUNCE=y
1146# CONFIG_SDIO_UART is not set 1303# CONFIG_SDIO_UART is not set
1304# CONFIG_MMC_TEST is not set
1147 1305
1148# 1306#
1149# MMC/SD Host Controller Drivers 1307# MMC/SD/SDIO Host Controller Drivers
1150# 1308#
1151# CONFIG_MMC_PXA is not set 1309# CONFIG_MMC_PXA is not set
1310# CONFIG_MMC_SDHCI is not set
1311# CONFIG_MEMSTICK is not set
1312# CONFIG_ACCESSIBILITY is not set
1152CONFIG_NEW_LEDS=y 1313CONFIG_NEW_LEDS=y
1153# CONFIG_LEDS_CLASS is not set 1314# CONFIG_LEDS_CLASS is not set
1154 1315
@@ -1163,6 +1324,8 @@ CONFIG_LEDS_TRIGGERS=y
1163CONFIG_LEDS_TRIGGER_TIMER=y 1324CONFIG_LEDS_TRIGGER_TIMER=y
1164# CONFIG_LEDS_TRIGGER_IDE_DISK is not set 1325# CONFIG_LEDS_TRIGGER_IDE_DISK is not set
1165CONFIG_LEDS_TRIGGER_HEARTBEAT=y 1326CONFIG_LEDS_TRIGGER_HEARTBEAT=y
1327# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
1328# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
1166CONFIG_RTC_LIB=y 1329CONFIG_RTC_LIB=y
1167CONFIG_RTC_CLASS=y 1330CONFIG_RTC_CLASS=y
1168# CONFIG_RTC_HCTOSYS is not set 1331# CONFIG_RTC_HCTOSYS is not set
@@ -1190,6 +1353,9 @@ CONFIG_RTC_INTF_DEV=y
1190# CONFIG_RTC_DRV_PCF8563 is not set 1353# CONFIG_RTC_DRV_PCF8563 is not set
1191CONFIG_RTC_DRV_PCF8583=m 1354CONFIG_RTC_DRV_PCF8583=m
1192# CONFIG_RTC_DRV_M41T80 is not set 1355# CONFIG_RTC_DRV_M41T80 is not set
1356# CONFIG_RTC_DRV_S35390A is not set
1357# CONFIG_RTC_DRV_FM3130 is not set
1358# CONFIG_RTC_DRV_RX8581 is not set
1193 1359
1194# 1360#
1195# SPI RTC drivers 1361# SPI RTC drivers
@@ -1199,36 +1365,45 @@ CONFIG_RTC_DRV_PCF8583=m
1199# Platform RTC drivers 1365# Platform RTC drivers
1200# 1366#
1201# CONFIG_RTC_DRV_CMOS is not set 1367# CONFIG_RTC_DRV_CMOS is not set
1368# CONFIG_RTC_DRV_DS1286 is not set
1369# CONFIG_RTC_DRV_DS1511 is not set
1202# CONFIG_RTC_DRV_DS1553 is not set 1370# CONFIG_RTC_DRV_DS1553 is not set
1203# CONFIG_RTC_DRV_STK17TA8 is not set
1204# CONFIG_RTC_DRV_DS1742 is not set 1371# CONFIG_RTC_DRV_DS1742 is not set
1372# CONFIG_RTC_DRV_STK17TA8 is not set
1205# CONFIG_RTC_DRV_M48T86 is not set 1373# CONFIG_RTC_DRV_M48T86 is not set
1374# CONFIG_RTC_DRV_M48T35 is not set
1206# CONFIG_RTC_DRV_M48T59 is not set 1375# CONFIG_RTC_DRV_M48T59 is not set
1376# CONFIG_RTC_DRV_BQ4802 is not set
1207# CONFIG_RTC_DRV_V3020 is not set 1377# CONFIG_RTC_DRV_V3020 is not set
1208 1378
1209# 1379#
1210# on-CPU RTC drivers 1380# on-CPU RTC drivers
1211# 1381#
1212# CONFIG_RTC_DRV_SA1100 is not set 1382# CONFIG_RTC_DRV_SA1100 is not set
1383# CONFIG_RTC_DRV_PXA is not set
1384# CONFIG_DMADEVICES is not set
1385# CONFIG_REGULATOR is not set
1386# CONFIG_UIO is not set
1387# CONFIG_STAGING is not set
1213 1388
1214# 1389#
1215# File systems 1390# File systems
1216# 1391#
1217# CONFIG_EXT2_FS is not set 1392# CONFIG_EXT2_FS is not set
1218# CONFIG_EXT3_FS is not set 1393# CONFIG_EXT3_FS is not set
1219# CONFIG_EXT4DEV_FS is not set 1394# CONFIG_EXT4_FS is not set
1220# CONFIG_REISERFS_FS is not set 1395# CONFIG_REISERFS_FS is not set
1221# CONFIG_JFS_FS is not set 1396# CONFIG_JFS_FS is not set
1222CONFIG_FS_POSIX_ACL=y 1397CONFIG_FS_POSIX_ACL=y
1398CONFIG_FILE_LOCKING=y
1223# CONFIG_XFS_FS is not set 1399# CONFIG_XFS_FS is not set
1224# CONFIG_GFS2_FS is not set 1400# CONFIG_GFS2_FS is not set
1225# CONFIG_OCFS2_FS is not set 1401# CONFIG_OCFS2_FS is not set
1226# CONFIG_MINIX_FS is not set 1402# CONFIG_BTRFS_FS is not set
1227# CONFIG_ROMFS_FS is not set 1403CONFIG_DNOTIFY=y
1228CONFIG_INOTIFY=y 1404CONFIG_INOTIFY=y
1229CONFIG_INOTIFY_USER=y 1405CONFIG_INOTIFY_USER=y
1230# CONFIG_QUOTA is not set 1406# CONFIG_QUOTA is not set
1231CONFIG_DNOTIFY=y
1232# CONFIG_AUTOFS_FS is not set 1407# CONFIG_AUTOFS_FS is not set
1233CONFIG_AUTOFS4_FS=y 1408CONFIG_AUTOFS4_FS=y
1234# CONFIG_FUSE_FS is not set 1409# CONFIG_FUSE_FS is not set
@@ -1254,15 +1429,13 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-15"
1254# 1429#
1255CONFIG_PROC_FS=y 1430CONFIG_PROC_FS=y
1256CONFIG_PROC_SYSCTL=y 1431CONFIG_PROC_SYSCTL=y
1432CONFIG_PROC_PAGE_MONITOR=y
1257CONFIG_SYSFS=y 1433CONFIG_SYSFS=y
1258CONFIG_TMPFS=y 1434CONFIG_TMPFS=y
1259# CONFIG_TMPFS_POSIX_ACL is not set 1435# CONFIG_TMPFS_POSIX_ACL is not set
1260# CONFIG_HUGETLB_PAGE is not set 1436# CONFIG_HUGETLB_PAGE is not set
1261CONFIG_CONFIGFS_FS=y 1437CONFIG_CONFIGFS_FS=y
1262 1438CONFIG_MISC_FILESYSTEMS=y
1263#
1264# Miscellaneous filesystems
1265#
1266# CONFIG_ADFS_FS is not set 1439# CONFIG_ADFS_FS is not set
1267# CONFIG_AFFS_FS is not set 1440# CONFIG_AFFS_FS is not set
1268# CONFIG_ECRYPT_FS is not set 1441# CONFIG_ECRYPT_FS is not set
@@ -1283,9 +1456,13 @@ CONFIG_JFFS2_ZLIB=y
1283CONFIG_JFFS2_RTIME=y 1456CONFIG_JFFS2_RTIME=y
1284# CONFIG_JFFS2_RUBIN is not set 1457# CONFIG_JFFS2_RUBIN is not set
1285# CONFIG_CRAMFS is not set 1458# CONFIG_CRAMFS is not set
1459# CONFIG_SQUASHFS is not set
1286# CONFIG_VXFS_FS is not set 1460# CONFIG_VXFS_FS is not set
1461# CONFIG_MINIX_FS is not set
1462# CONFIG_OMFS_FS is not set
1287# CONFIG_HPFS_FS is not set 1463# CONFIG_HPFS_FS is not set
1288# CONFIG_QNX4FS_FS is not set 1464# CONFIG_QNX4FS_FS is not set
1465# CONFIG_ROMFS_FS is not set
1289# CONFIG_SYSV_FS is not set 1466# CONFIG_SYSV_FS is not set
1290# CONFIG_UFS_FS is not set 1467# CONFIG_UFS_FS is not set
1291CONFIG_NETWORK_FILESYSTEMS=y 1468CONFIG_NETWORK_FILESYSTEMS=y
@@ -1293,20 +1470,18 @@ CONFIG_NFS_FS=y
1293CONFIG_NFS_V3=y 1470CONFIG_NFS_V3=y
1294# CONFIG_NFS_V3_ACL is not set 1471# CONFIG_NFS_V3_ACL is not set
1295CONFIG_NFS_V4=y 1472CONFIG_NFS_V4=y
1296# CONFIG_NFS_DIRECTIO is not set 1473CONFIG_ROOT_NFS=y
1297CONFIG_NFSD=y 1474CONFIG_NFSD=y
1298CONFIG_NFSD_V3=y 1475CONFIG_NFSD_V3=y
1299# CONFIG_NFSD_V3_ACL is not set 1476# CONFIG_NFSD_V3_ACL is not set
1300CONFIG_NFSD_V4=y 1477CONFIG_NFSD_V4=y
1301CONFIG_NFSD_TCP=y
1302CONFIG_ROOT_NFS=y
1303CONFIG_LOCKD=y 1478CONFIG_LOCKD=y
1304CONFIG_LOCKD_V4=y 1479CONFIG_LOCKD_V4=y
1305CONFIG_EXPORTFS=y 1480CONFIG_EXPORTFS=y
1306CONFIG_NFS_COMMON=y 1481CONFIG_NFS_COMMON=y
1307CONFIG_SUNRPC=y 1482CONFIG_SUNRPC=y
1308CONFIG_SUNRPC_GSS=y 1483CONFIG_SUNRPC_GSS=y
1309# CONFIG_SUNRPC_BIND34 is not set 1484# CONFIG_SUNRPC_REGISTER_V4 is not set
1310CONFIG_RPCSEC_GSS_KRB5=y 1485CONFIG_RPCSEC_GSS_KRB5=y
1311# CONFIG_RPCSEC_GSS_SPKM3 is not set 1486# CONFIG_RPCSEC_GSS_SPKM3 is not set
1312# CONFIG_SMB_FS is not set 1487# CONFIG_SMB_FS is not set
@@ -1361,9 +1536,6 @@ CONFIG_NLS_ISO8859_15=m
1361# CONFIG_NLS_KOI8_U is not set 1536# CONFIG_NLS_KOI8_U is not set
1362CONFIG_NLS_UTF8=m 1537CONFIG_NLS_UTF8=m
1363# CONFIG_DLM is not set 1538# CONFIG_DLM is not set
1364CONFIG_INSTRUMENTATION=y
1365# CONFIG_PROFILING is not set
1366# CONFIG_MARKERS is not set
1367 1539
1368# 1540#
1369# Kernel hacking 1541# Kernel hacking
@@ -1371,6 +1543,7 @@ CONFIG_INSTRUMENTATION=y
1371CONFIG_PRINTK_TIME=y 1543CONFIG_PRINTK_TIME=y
1372CONFIG_ENABLE_WARN_DEPRECATED=y 1544CONFIG_ENABLE_WARN_DEPRECATED=y
1373CONFIG_ENABLE_MUST_CHECK=y 1545CONFIG_ENABLE_MUST_CHECK=y
1546CONFIG_FRAME_WARN=1024
1374CONFIG_MAGIC_SYSRQ=y 1547CONFIG_MAGIC_SYSRQ=y
1375# CONFIG_UNUSED_SYMBOLS is not set 1548# CONFIG_UNUSED_SYMBOLS is not set
1376CONFIG_DEBUG_FS=y 1549CONFIG_DEBUG_FS=y
@@ -1378,9 +1551,12 @@ CONFIG_DEBUG_FS=y
1378CONFIG_DEBUG_KERNEL=y 1551CONFIG_DEBUG_KERNEL=y
1379# CONFIG_DEBUG_SHIRQ is not set 1552# CONFIG_DEBUG_SHIRQ is not set
1380CONFIG_DETECT_SOFTLOCKUP=y 1553CONFIG_DETECT_SOFTLOCKUP=y
1554# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
1555CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
1381CONFIG_SCHED_DEBUG=y 1556CONFIG_SCHED_DEBUG=y
1382# CONFIG_SCHEDSTATS is not set 1557# CONFIG_SCHEDSTATS is not set
1383# CONFIG_TIMER_STATS is not set 1558# CONFIG_TIMER_STATS is not set
1559# CONFIG_DEBUG_OBJECTS is not set
1384# CONFIG_DEBUG_SLAB is not set 1560# CONFIG_DEBUG_SLAB is not set
1385CONFIG_DEBUG_PREEMPT=y 1561CONFIG_DEBUG_PREEMPT=y
1386# CONFIG_DEBUG_RT_MUTEXES is not set 1562# CONFIG_DEBUG_RT_MUTEXES is not set
@@ -1396,16 +1572,40 @@ CONFIG_DEBUG_PREEMPT=y
1396CONFIG_DEBUG_BUGVERBOSE=y 1572CONFIG_DEBUG_BUGVERBOSE=y
1397CONFIG_DEBUG_INFO=y 1573CONFIG_DEBUG_INFO=y
1398# CONFIG_DEBUG_VM is not set 1574# CONFIG_DEBUG_VM is not set
1575# CONFIG_DEBUG_WRITECOUNT is not set
1576# CONFIG_DEBUG_MEMORY_INIT is not set
1399# CONFIG_DEBUG_LIST is not set 1577# CONFIG_DEBUG_LIST is not set
1400# CONFIG_DEBUG_SG is not set 1578# CONFIG_DEBUG_SG is not set
1579# CONFIG_DEBUG_NOTIFIERS is not set
1401CONFIG_FRAME_POINTER=y 1580CONFIG_FRAME_POINTER=y
1402CONFIG_FORCED_INLINING=y
1403# CONFIG_BOOT_PRINTK_DELAY is not set 1581# CONFIG_BOOT_PRINTK_DELAY is not set
1404# CONFIG_RCU_TORTURE_TEST is not set 1582# CONFIG_RCU_TORTURE_TEST is not set
1583# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1584# CONFIG_BACKTRACE_SELF_TEST is not set
1585# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1405# CONFIG_FAULT_INJECTION is not set 1586# CONFIG_FAULT_INJECTION is not set
1587# CONFIG_LATENCYTOP is not set
1588# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1589CONFIG_HAVE_FUNCTION_TRACER=y
1590
1591#
1592# Tracers
1593#
1594# CONFIG_FUNCTION_TRACER is not set
1595# CONFIG_IRQSOFF_TRACER is not set
1596# CONFIG_PREEMPT_TRACER is not set
1597# CONFIG_SCHED_TRACER is not set
1598# CONFIG_CONTEXT_SWITCH_TRACER is not set
1599# CONFIG_BOOT_TRACER is not set
1600# CONFIG_TRACE_BRANCH_PROFILING is not set
1601# CONFIG_STACK_TRACER is not set
1602# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
1406# CONFIG_SAMPLES is not set 1603# CONFIG_SAMPLES is not set
1604CONFIG_HAVE_ARCH_KGDB=y
1605# CONFIG_KGDB is not set
1407CONFIG_DEBUG_USER=y 1606CONFIG_DEBUG_USER=y
1408CONFIG_DEBUG_ERRORS=y 1607CONFIG_DEBUG_ERRORS=y
1608# CONFIG_DEBUG_STACK_USAGE is not set
1409CONFIG_DEBUG_LL=y 1609CONFIG_DEBUG_LL=y
1410# CONFIG_DEBUG_ICEDCC is not set 1610# CONFIG_DEBUG_ICEDCC is not set
1411 1611
@@ -1415,58 +1615,114 @@ CONFIG_DEBUG_LL=y
1415CONFIG_KEYS=y 1615CONFIG_KEYS=y
1416CONFIG_KEYS_DEBUG_PROC_KEYS=y 1616CONFIG_KEYS_DEBUG_PROC_KEYS=y
1417CONFIG_SECURITY=y 1617CONFIG_SECURITY=y
1618# CONFIG_SECURITYFS is not set
1418# CONFIG_SECURITY_NETWORK is not set 1619# CONFIG_SECURITY_NETWORK is not set
1419CONFIG_SECURITY_CAPABILITIES=y 1620# CONFIG_SECURITY_PATH is not set
1420# CONFIG_SECURITY_FILE_CAPABILITIES is not set 1621# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1421# CONFIG_SECURITY_ROOTPLUG is not set 1622# CONFIG_SECURITY_ROOTPLUG is not set
1623CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0
1422CONFIG_CRYPTO=y 1624CONFIG_CRYPTO=y
1625
1626#
1627# Crypto core or helper
1628#
1629# CONFIG_CRYPTO_FIPS is not set
1423CONFIG_CRYPTO_ALGAPI=y 1630CONFIG_CRYPTO_ALGAPI=y
1631CONFIG_CRYPTO_ALGAPI2=y
1632CONFIG_CRYPTO_AEAD2=y
1424CONFIG_CRYPTO_BLKCIPHER=y 1633CONFIG_CRYPTO_BLKCIPHER=y
1634CONFIG_CRYPTO_BLKCIPHER2=y
1635CONFIG_CRYPTO_HASH=y
1636CONFIG_CRYPTO_HASH2=y
1637CONFIG_CRYPTO_RNG2=y
1425CONFIG_CRYPTO_MANAGER=y 1638CONFIG_CRYPTO_MANAGER=y
1639CONFIG_CRYPTO_MANAGER2=y
1640# CONFIG_CRYPTO_GF128MUL is not set
1641# CONFIG_CRYPTO_NULL is not set
1642# CONFIG_CRYPTO_CRYPTD is not set
1643# CONFIG_CRYPTO_AUTHENC is not set
1644# CONFIG_CRYPTO_TEST is not set
1645
1646#
1647# Authenticated Encryption with Associated Data
1648#
1649# CONFIG_CRYPTO_CCM is not set
1650# CONFIG_CRYPTO_GCM is not set
1651# CONFIG_CRYPTO_SEQIV is not set
1652
1653#
1654# Block modes
1655#
1656CONFIG_CRYPTO_CBC=y
1657# CONFIG_CRYPTO_CTR is not set
1658# CONFIG_CRYPTO_CTS is not set
1659CONFIG_CRYPTO_ECB=y
1660# CONFIG_CRYPTO_LRW is not set
1661CONFIG_CRYPTO_PCBC=m
1662# CONFIG_CRYPTO_XTS is not set
1663
1664#
1665# Hash modes
1666#
1426# CONFIG_CRYPTO_HMAC is not set 1667# CONFIG_CRYPTO_HMAC is not set
1427# CONFIG_CRYPTO_XCBC is not set 1668# CONFIG_CRYPTO_XCBC is not set
1428# CONFIG_CRYPTO_NULL is not set 1669
1670#
1671# Digest
1672#
1673CONFIG_CRYPTO_CRC32C=y
1429# CONFIG_CRYPTO_MD4 is not set 1674# CONFIG_CRYPTO_MD4 is not set
1430CONFIG_CRYPTO_MD5=y 1675CONFIG_CRYPTO_MD5=y
1676CONFIG_CRYPTO_MICHAEL_MIC=y
1677# CONFIG_CRYPTO_RMD128 is not set
1678# CONFIG_CRYPTO_RMD160 is not set
1679# CONFIG_CRYPTO_RMD256 is not set
1680# CONFIG_CRYPTO_RMD320 is not set
1431CONFIG_CRYPTO_SHA1=m 1681CONFIG_CRYPTO_SHA1=m
1432CONFIG_CRYPTO_SHA256=m 1682CONFIG_CRYPTO_SHA256=m
1433CONFIG_CRYPTO_SHA512=m 1683CONFIG_CRYPTO_SHA512=m
1434# CONFIG_CRYPTO_WP512 is not set
1435# CONFIG_CRYPTO_TGR192 is not set 1684# CONFIG_CRYPTO_TGR192 is not set
1436# CONFIG_CRYPTO_GF128MUL is not set 1685# CONFIG_CRYPTO_WP512 is not set
1437CONFIG_CRYPTO_ECB=y 1686
1438CONFIG_CRYPTO_CBC=y 1687#
1439CONFIG_CRYPTO_PCBC=m 1688# Ciphers
1440# CONFIG_CRYPTO_LRW is not set 1689#
1441# CONFIG_CRYPTO_XTS is not set 1690CONFIG_CRYPTO_AES=y
1442# CONFIG_CRYPTO_CRYPTD is not set 1691# CONFIG_CRYPTO_ANUBIS is not set
1443CONFIG_CRYPTO_DES=y 1692CONFIG_CRYPTO_ARC4=y
1444# CONFIG_CRYPTO_FCRYPT is not set
1445# CONFIG_CRYPTO_BLOWFISH is not set 1693# CONFIG_CRYPTO_BLOWFISH is not set
1446# CONFIG_CRYPTO_TWOFISH is not set 1694# CONFIG_CRYPTO_CAMELLIA is not set
1447# CONFIG_CRYPTO_SERPENT is not set
1448CONFIG_CRYPTO_AES=m
1449# CONFIG_CRYPTO_CAST5 is not set 1695# CONFIG_CRYPTO_CAST5 is not set
1450# CONFIG_CRYPTO_CAST6 is not set 1696# CONFIG_CRYPTO_CAST6 is not set
1451# CONFIG_CRYPTO_TEA is not set 1697CONFIG_CRYPTO_DES=y
1452CONFIG_CRYPTO_ARC4=y 1698# CONFIG_CRYPTO_FCRYPT is not set
1453# CONFIG_CRYPTO_KHAZAD is not set 1699# CONFIG_CRYPTO_KHAZAD is not set
1454# CONFIG_CRYPTO_ANUBIS is not set 1700# CONFIG_CRYPTO_SALSA20 is not set
1455# CONFIG_CRYPTO_SEED is not set 1701# CONFIG_CRYPTO_SEED is not set
1702# CONFIG_CRYPTO_SERPENT is not set
1703# CONFIG_CRYPTO_TEA is not set
1704# CONFIG_CRYPTO_TWOFISH is not set
1705
1706#
1707# Compression
1708#
1456CONFIG_CRYPTO_DEFLATE=m 1709CONFIG_CRYPTO_DEFLATE=m
1457CONFIG_CRYPTO_MICHAEL_MIC=m 1710# CONFIG_CRYPTO_LZO is not set
1458CONFIG_CRYPTO_CRC32C=y 1711
1459# CONFIG_CRYPTO_CAMELLIA is not set 1712#
1460# CONFIG_CRYPTO_TEST is not set 1713# Random Number Generation
1461# CONFIG_CRYPTO_AUTHENC is not set 1714#
1715# CONFIG_CRYPTO_ANSI_CPRNG is not set
1462CONFIG_CRYPTO_HW=y 1716CONFIG_CRYPTO_HW=y
1463 1717
1464# 1718#
1465# Library routines 1719# Library routines
1466# 1720#
1467CONFIG_BITREVERSE=y 1721CONFIG_BITREVERSE=y
1722CONFIG_GENERIC_FIND_LAST_BIT=y
1468CONFIG_CRC_CCITT=y 1723CONFIG_CRC_CCITT=y
1469CONFIG_CRC16=y 1724CONFIG_CRC16=y
1725# CONFIG_CRC_T10DIF is not set
1470# CONFIG_CRC_ITU_T is not set 1726# CONFIG_CRC_ITU_T is not set
1471CONFIG_CRC32=y 1727CONFIG_CRC32=y
1472# CONFIG_CRC7 is not set 1728# CONFIG_CRC7 is not set
diff --git a/arch/arm/configs/colibri_pxa300_defconfig b/arch/arm/configs/colibri_pxa300_defconfig
new file mode 100644
index 000000000000..4774a36fa740
--- /dev/null
+++ b/arch/arm/configs/colibri_pxa300_defconfig
@@ -0,0 +1,1156 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.29-rc8
4# Fri Mar 13 16:13:20 2009
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y
11CONFIG_MMU=y
12# CONFIG_NO_IOPORT is not set
13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_HAVE_LATENCYTOP_SUPPORT=y
16CONFIG_LOCKDEP_SUPPORT=y
17CONFIG_TRACE_IRQFLAGS_SUPPORT=y
18CONFIG_HARDIRQS_SW_RESEND=y
19CONFIG_GENERIC_IRQ_PROBE=y
20CONFIG_RWSEM_GENERIC_SPINLOCK=y
21# CONFIG_ARCH_HAS_ILOG2_U32 is not set
22# CONFIG_ARCH_HAS_ILOG2_U64 is not set
23CONFIG_GENERIC_HWEIGHT=y
24CONFIG_GENERIC_CALIBRATE_DELAY=y
25CONFIG_ARCH_MTD_XIP=y
26CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
27CONFIG_VECTORS_BASE=0xffff0000
28CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
29
30#
31# General setup
32#
33CONFIG_EXPERIMENTAL=y
34CONFIG_BROKEN_ON_SMP=y
35CONFIG_INIT_ENV_ARG_LIMIT=32
36CONFIG_LOCALVERSION=""
37CONFIG_LOCALVERSION_AUTO=y
38CONFIG_SWAP=y
39# CONFIG_SYSVIPC is not set
40# CONFIG_POSIX_MQUEUE is not set
41# CONFIG_BSD_PROCESS_ACCT is not set
42# CONFIG_TASKSTATS is not set
43# CONFIG_AUDIT is not set
44
45#
46# RCU Subsystem
47#
48CONFIG_CLASSIC_RCU=y
49# CONFIG_TREE_RCU is not set
50# CONFIG_PREEMPT_RCU is not set
51# CONFIG_TREE_RCU_TRACE is not set
52# CONFIG_PREEMPT_RCU_TRACE is not set
53# CONFIG_IKCONFIG is not set
54CONFIG_LOG_BUF_SHIFT=17
55# CONFIG_GROUP_SCHED is not set
56# CONFIG_CGROUPS is not set
57# CONFIG_SYSFS_DEPRECATED_V2 is not set
58# CONFIG_RELAY is not set
59CONFIG_NAMESPACES=y
60# CONFIG_UTS_NS is not set
61# CONFIG_USER_NS is not set
62# CONFIG_PID_NS is not set
63# CONFIG_NET_NS is not set
64# CONFIG_BLK_DEV_INITRD is not set
65CONFIG_CC_OPTIMIZE_FOR_SIZE=y
66CONFIG_SYSCTL=y
67CONFIG_ANON_INODES=y
68# CONFIG_EMBEDDED is not set
69CONFIG_UID16=y
70CONFIG_SYSCTL_SYSCALL=y
71CONFIG_KALLSYMS=y
72# CONFIG_KALLSYMS_ALL is not set
73# CONFIG_KALLSYMS_EXTRA_PASS is not set
74CONFIG_HOTPLUG=y
75CONFIG_PRINTK=y
76CONFIG_BUG=y
77CONFIG_ELF_CORE=y
78CONFIG_BASE_FULL=y
79CONFIG_FUTEX=y
80CONFIG_EPOLL=y
81CONFIG_SIGNALFD=y
82CONFIG_TIMERFD=y
83CONFIG_EVENTFD=y
84CONFIG_SHMEM=y
85CONFIG_AIO=y
86CONFIG_VM_EVENT_COUNTERS=y
87CONFIG_SLUB_DEBUG=y
88CONFIG_COMPAT_BRK=y
89# CONFIG_SLAB is not set
90CONFIG_SLUB=y
91# CONFIG_SLOB is not set
92# CONFIG_PROFILING is not set
93CONFIG_HAVE_OPROFILE=y
94# CONFIG_KPROBES is not set
95CONFIG_HAVE_KPROBES=y
96CONFIG_HAVE_KRETPROBES=y
97CONFIG_HAVE_CLK=y
98CONFIG_HAVE_GENERIC_DMA_COHERENT=y
99CONFIG_SLABINFO=y
100CONFIG_RT_MUTEXES=y
101CONFIG_BASE_SMALL=0
102CONFIG_MODULES=y
103# CONFIG_MODULE_FORCE_LOAD is not set
104CONFIG_MODULE_UNLOAD=y
105# CONFIG_MODULE_FORCE_UNLOAD is not set
106# CONFIG_MODVERSIONS is not set
107# CONFIG_MODULE_SRCVERSION_ALL is not set
108CONFIG_BLOCK=y
109# CONFIG_LBD is not set
110# CONFIG_BLK_DEV_IO_TRACE is not set
111# CONFIG_BLK_DEV_BSG is not set
112# CONFIG_BLK_DEV_INTEGRITY is not set
113
114#
115# IO Schedulers
116#
117CONFIG_IOSCHED_NOOP=y
118CONFIG_IOSCHED_AS=y
119CONFIG_IOSCHED_DEADLINE=y
120CONFIG_IOSCHED_CFQ=y
121# CONFIG_DEFAULT_AS is not set
122# CONFIG_DEFAULT_DEADLINE is not set
123CONFIG_DEFAULT_CFQ=y
124# CONFIG_DEFAULT_NOOP is not set
125CONFIG_DEFAULT_IOSCHED="cfq"
126# CONFIG_FREEZER is not set
127
128#
129# System Type
130#
131# CONFIG_ARCH_AAEC2000 is not set
132# CONFIG_ARCH_INTEGRATOR is not set
133# CONFIG_ARCH_REALVIEW is not set
134# CONFIG_ARCH_VERSATILE is not set
135# CONFIG_ARCH_AT91 is not set
136# CONFIG_ARCH_CLPS711X is not set
137# CONFIG_ARCH_EBSA110 is not set
138# CONFIG_ARCH_EP93XX is not set
139# CONFIG_ARCH_FOOTBRIDGE is not set
140# CONFIG_ARCH_NETX is not set
141# CONFIG_ARCH_H720X is not set
142# CONFIG_ARCH_IMX is not set
143# CONFIG_ARCH_IOP13XX is not set
144# CONFIG_ARCH_IOP32X is not set
145# CONFIG_ARCH_IOP33X is not set
146# CONFIG_ARCH_IXP23XX is not set
147# CONFIG_ARCH_IXP2000 is not set
148# CONFIG_ARCH_IXP4XX is not set
149# CONFIG_ARCH_L7200 is not set
150# CONFIG_ARCH_KIRKWOOD is not set
151# CONFIG_ARCH_KS8695 is not set
152# CONFIG_ARCH_NS9XXX is not set
153# CONFIG_ARCH_LOKI is not set
154# CONFIG_ARCH_MV78XX0 is not set
155# CONFIG_ARCH_MXC is not set
156# CONFIG_ARCH_ORION5X is not set
157# CONFIG_ARCH_PNX4008 is not set
158CONFIG_ARCH_PXA=y
159# CONFIG_ARCH_RPC is not set
160# CONFIG_ARCH_SA1100 is not set
161# CONFIG_ARCH_S3C2410 is not set
162# CONFIG_ARCH_S3C64XX is not set
163# CONFIG_ARCH_SHARK is not set
164# CONFIG_ARCH_LH7A40X is not set
165# CONFIG_ARCH_DAVINCI is not set
166# CONFIG_ARCH_OMAP is not set
167# CONFIG_ARCH_MSM is not set
168# CONFIG_ARCH_W90X900 is not set
169
170#
171# Intel PXA2xx/PXA3xx Implementations
172#
173
174#
175# Supported PXA3xx Processor Variants
176#
177CONFIG_CPU_PXA300=y
178# CONFIG_CPU_PXA310 is not set
179# CONFIG_CPU_PXA320 is not set
180# CONFIG_CPU_PXA930 is not set
181# CONFIG_CPU_PXA935 is not set
182# CONFIG_ARCH_GUMSTIX is not set
183# CONFIG_MACH_INTELMOTE2 is not set
184# CONFIG_ARCH_LUBBOCK is not set
185# CONFIG_MACH_LOGICPD_PXA270 is not set
186# CONFIG_MACH_MAINSTONE is not set
187# CONFIG_MACH_MP900C is not set
188# CONFIG_ARCH_PXA_IDP is not set
189# CONFIG_PXA_SHARPSL is not set
190# CONFIG_ARCH_VIPER is not set
191# CONFIG_ARCH_PXA_ESERIES is not set
192# CONFIG_TRIZEPS_PXA is not set
193# CONFIG_MACH_H5000 is not set
194# CONFIG_MACH_EM_X270 is not set
195# CONFIG_MACH_COLIBRI is not set
196CONFIG_MACH_COLIBRI300=y
197# CONFIG_MACH_ZYLONITE is not set
198# CONFIG_MACH_LITTLETON is not set
199# CONFIG_MACH_RAUMFELD_PROTO is not set
200# CONFIG_MACH_TAVOREVB is not set
201# CONFIG_MACH_SAAR is not set
202# CONFIG_MACH_ARMCORE is not set
203# CONFIG_MACH_CM_X300 is not set
204# CONFIG_MACH_MAGICIAN is not set
205# CONFIG_MACH_MIOA701 is not set
206# CONFIG_MACH_PCM027 is not set
207# CONFIG_ARCH_PXA_PALM is not set
208# CONFIG_PXA_EZX is not set
209CONFIG_PXA3xx=y
210# CONFIG_PXA_PWM is not set
211
212#
213# Processor Type
214#
215CONFIG_CPU_32=y
216CONFIG_CPU_XSC3=y
217CONFIG_CPU_32v5=y
218CONFIG_CPU_ABRT_EV5T=y
219CONFIG_CPU_PABRT_NOIFAR=y
220CONFIG_CPU_CACHE_VIVT=y
221CONFIG_CPU_TLB_V4WBI=y
222CONFIG_CPU_CP15=y
223CONFIG_CPU_CP15_MMU=y
224CONFIG_IO_36=y
225
226#
227# Processor Features
228#
229CONFIG_ARM_THUMB=y
230# CONFIG_CPU_DCACHE_DISABLE is not set
231# CONFIG_CPU_BPREDICT_DISABLE is not set
232CONFIG_OUTER_CACHE=y
233CONFIG_CACHE_XSC3L2=y
234CONFIG_IWMMXT=y
235CONFIG_COMMON_CLKDEV=y
236
237#
238# Bus support
239#
240# CONFIG_PCI_SYSCALL is not set
241# CONFIG_ARCH_SUPPORTS_MSI is not set
242# CONFIG_PCCARD is not set
243
244#
245# Kernel Features
246#
247CONFIG_TICK_ONESHOT=y
248# CONFIG_NO_HZ is not set
249# CONFIG_HIGH_RES_TIMERS is not set
250CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
251CONFIG_VMSPLIT_3G=y
252# CONFIG_VMSPLIT_2G is not set
253# CONFIG_VMSPLIT_1G is not set
254CONFIG_PAGE_OFFSET=0xC0000000
255# CONFIG_PREEMPT is not set
256CONFIG_HZ=100
257CONFIG_AEABI=y
258CONFIG_OABI_COMPAT=y
259CONFIG_ARCH_FLATMEM_HAS_HOLES=y
260# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
261# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
262CONFIG_SELECT_MEMORY_MODEL=y
263CONFIG_FLATMEM_MANUAL=y
264# CONFIG_DISCONTIGMEM_MANUAL is not set
265# CONFIG_SPARSEMEM_MANUAL is not set
266CONFIG_FLATMEM=y
267CONFIG_FLAT_NODE_MEM_MAP=y
268CONFIG_PAGEFLAGS_EXTENDED=y
269CONFIG_SPLIT_PTLOCK_CPUS=4096
270# CONFIG_PHYS_ADDR_T_64BIT is not set
271CONFIG_ZONE_DMA_FLAG=0
272CONFIG_VIRT_TO_BUS=y
273CONFIG_UNEVICTABLE_LRU=y
274CONFIG_ALIGNMENT_TRAP=y
275
276#
277# Boot options
278#
279CONFIG_ZBOOT_ROM_TEXT=0
280CONFIG_ZBOOT_ROM_BSS=0
281CONFIG_CMDLINE="console=ttyS0,115200 rw"
282# CONFIG_XIP_KERNEL is not set
283# CONFIG_KEXEC is not set
284
285#
286# CPU Power Management
287#
288# CONFIG_CPU_FREQ is not set
289CONFIG_CPU_IDLE=y
290CONFIG_CPU_IDLE_GOV_LADDER=y
291
292#
293# Floating point emulation
294#
295
296#
297# At least one emulation must be selected
298#
299CONFIG_FPE_NWFPE=y
300# CONFIG_FPE_NWFPE_XP is not set
301# CONFIG_FPE_FASTFPE is not set
302
303#
304# Userspace binary formats
305#
306CONFIG_BINFMT_ELF=y
307# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
308CONFIG_HAVE_AOUT=y
309# CONFIG_BINFMT_AOUT is not set
310# CONFIG_BINFMT_MISC is not set
311
312#
313# Power management options
314#
315# CONFIG_PM is not set
316CONFIG_ARCH_SUSPEND_POSSIBLE=y
317CONFIG_NET=y
318
319#
320# Networking options
321#
322CONFIG_COMPAT_NET_DEV_OPS=y
323# CONFIG_PACKET is not set
324CONFIG_UNIX=y
325CONFIG_XFRM=y
326# CONFIG_XFRM_USER is not set
327# CONFIG_XFRM_SUB_POLICY is not set
328# CONFIG_XFRM_MIGRATE is not set
329# CONFIG_XFRM_STATISTICS is not set
330# CONFIG_NET_KEY is not set
331CONFIG_INET=y
332CONFIG_IP_MULTICAST=y
333# CONFIG_IP_ADVANCED_ROUTER is not set
334CONFIG_IP_FIB_HASH=y
335CONFIG_IP_PNP=y
336# CONFIG_IP_PNP_DHCP is not set
337# CONFIG_IP_PNP_BOOTP is not set
338# CONFIG_IP_PNP_RARP is not set
339# CONFIG_NET_IPIP is not set
340# CONFIG_NET_IPGRE is not set
341# CONFIG_IP_MROUTE is not set
342# CONFIG_ARPD is not set
343CONFIG_SYN_COOKIES=y
344# CONFIG_INET_AH is not set
345# CONFIG_INET_ESP is not set
346# CONFIG_INET_IPCOMP is not set
347# CONFIG_INET_XFRM_TUNNEL is not set
348CONFIG_INET_TUNNEL=y
349CONFIG_INET_XFRM_MODE_TRANSPORT=y
350CONFIG_INET_XFRM_MODE_TUNNEL=y
351CONFIG_INET_XFRM_MODE_BEET=y
352# CONFIG_INET_LRO is not set
353CONFIG_INET_DIAG=y
354CONFIG_INET_TCP_DIAG=y
355# CONFIG_TCP_CONG_ADVANCED is not set
356CONFIG_TCP_CONG_CUBIC=y
357CONFIG_DEFAULT_TCP_CONG="cubic"
358# CONFIG_TCP_MD5SIG is not set
359CONFIG_IPV6=y
360# CONFIG_IPV6_PRIVACY is not set
361# CONFIG_IPV6_ROUTER_PREF is not set
362# CONFIG_IPV6_OPTIMISTIC_DAD is not set
363# CONFIG_INET6_AH is not set
364# CONFIG_INET6_ESP is not set
365# CONFIG_INET6_IPCOMP is not set
366# CONFIG_IPV6_MIP6 is not set
367# CONFIG_INET6_XFRM_TUNNEL is not set
368# CONFIG_INET6_TUNNEL is not set
369CONFIG_INET6_XFRM_MODE_TRANSPORT=y
370CONFIG_INET6_XFRM_MODE_TUNNEL=y
371CONFIG_INET6_XFRM_MODE_BEET=y
372# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
373CONFIG_IPV6_SIT=y
374CONFIG_IPV6_NDISC_NODETYPE=y
375# CONFIG_IPV6_TUNNEL is not set
376# CONFIG_IPV6_MULTIPLE_TABLES is not set
377# CONFIG_IPV6_MROUTE is not set
378# CONFIG_NETWORK_SECMARK is not set
379# CONFIG_NETFILTER is not set
380# CONFIG_IP_DCCP is not set
381# CONFIG_IP_SCTP is not set
382# CONFIG_TIPC is not set
383# CONFIG_ATM is not set
384# CONFIG_BRIDGE is not set
385# CONFIG_NET_DSA is not set
386# CONFIG_VLAN_8021Q is not set
387# CONFIG_DECNET is not set
388# CONFIG_LLC2 is not set
389# CONFIG_IPX is not set
390# CONFIG_ATALK is not set
391# CONFIG_X25 is not set
392# CONFIG_LAPB is not set
393# CONFIG_ECONET is not set
394# CONFIG_WAN_ROUTER is not set
395# CONFIG_NET_SCHED is not set
396# CONFIG_DCB is not set
397
398#
399# Network testing
400#
401# CONFIG_NET_PKTGEN is not set
402# CONFIG_HAMRADIO is not set
403# CONFIG_CAN is not set
404# CONFIG_IRDA is not set
405# CONFIG_BT is not set
406# CONFIG_AF_RXRPC is not set
407# CONFIG_PHONET is not set
408# CONFIG_WIRELESS is not set
409# CONFIG_WIMAX is not set
410# CONFIG_RFKILL is not set
411# CONFIG_NET_9P is not set
412
413#
414# Device Drivers
415#
416
417#
418# Generic Driver Options
419#
420CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
421CONFIG_STANDALONE=y
422CONFIG_PREVENT_FIRMWARE_BUILD=y
423CONFIG_FW_LOADER=y
424CONFIG_FIRMWARE_IN_KERNEL=y
425CONFIG_EXTRA_FIRMWARE=""
426# CONFIG_DEBUG_DRIVER is not set
427# CONFIG_DEBUG_DEVRES is not set
428# CONFIG_SYS_HYPERVISOR is not set
429# CONFIG_CONNECTOR is not set
430# CONFIG_MTD is not set
431# CONFIG_PARPORT is not set
432CONFIG_BLK_DEV=y
433# CONFIG_BLK_DEV_COW_COMMON is not set
434# CONFIG_BLK_DEV_LOOP is not set
435# CONFIG_BLK_DEV_NBD is not set
436# CONFIG_BLK_DEV_UB is not set
437# CONFIG_BLK_DEV_RAM is not set
438# CONFIG_CDROM_PKTCDVD is not set
439# CONFIG_ATA_OVER_ETH is not set
440# CONFIG_MISC_DEVICES is not set
441CONFIG_HAVE_IDE=y
442# CONFIG_IDE is not set
443
444#
445# SCSI device support
446#
447# CONFIG_RAID_ATTRS is not set
448CONFIG_SCSI=y
449CONFIG_SCSI_DMA=y
450# CONFIG_SCSI_TGT is not set
451# CONFIG_SCSI_NETLINK is not set
452CONFIG_SCSI_PROC_FS=y
453
454#
455# SCSI support type (disk, tape, CD-ROM)
456#
457CONFIG_BLK_DEV_SD=y
458# CONFIG_CHR_DEV_ST is not set
459# CONFIG_CHR_DEV_OSST is not set
460# CONFIG_BLK_DEV_SR is not set
461CONFIG_CHR_DEV_SG=y
462# CONFIG_CHR_DEV_SCH is not set
463
464#
465# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
466#
467# CONFIG_SCSI_MULTI_LUN is not set
468# CONFIG_SCSI_CONSTANTS is not set
469# CONFIG_SCSI_LOGGING is not set
470# CONFIG_SCSI_SCAN_ASYNC is not set
471CONFIG_SCSI_WAIT_SCAN=m
472
473#
474# SCSI Transports
475#
476# CONFIG_SCSI_SPI_ATTRS is not set
477# CONFIG_SCSI_FC_ATTRS is not set
478# CONFIG_SCSI_ISCSI_ATTRS is not set
479# CONFIG_SCSI_SAS_LIBSAS is not set
480# CONFIG_SCSI_SRP_ATTRS is not set
481CONFIG_SCSI_LOWLEVEL=y
482# CONFIG_ISCSI_TCP is not set
483# CONFIG_LIBFC is not set
484# CONFIG_SCSI_DEBUG is not set
485# CONFIG_SCSI_DH is not set
486# CONFIG_ATA is not set
487# CONFIG_MD is not set
488CONFIG_NETDEVICES=y
489# CONFIG_DUMMY is not set
490# CONFIG_BONDING is not set
491# CONFIG_MACVLAN is not set
492# CONFIG_EQUALIZER is not set
493# CONFIG_TUN is not set
494# CONFIG_VETH is not set
495# CONFIG_PHYLIB is not set
496CONFIG_NET_ETHERNET=y
497CONFIG_MII=y
498CONFIG_AX88796=y
499# CONFIG_AX88796_93CX6 is not set
500# CONFIG_SMC91X is not set
501# CONFIG_DM9000 is not set
502# CONFIG_SMC911X is not set
503# CONFIG_SMSC911X is not set
504# CONFIG_IBM_NEW_EMAC_ZMII is not set
505# CONFIG_IBM_NEW_EMAC_RGMII is not set
506# CONFIG_IBM_NEW_EMAC_TAH is not set
507# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
508# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
509# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
510# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
511# CONFIG_B44 is not set
512# CONFIG_NETDEV_1000 is not set
513# CONFIG_NETDEV_10000 is not set
514
515#
516# Wireless LAN
517#
518# CONFIG_WLAN_PRE80211 is not set
519# CONFIG_WLAN_80211 is not set
520# CONFIG_IWLWIFI_LEDS is not set
521
522#
523# Enable WiMAX (Networking options) to see the WiMAX drivers
524#
525
526#
527# USB Network Adapters
528#
529# CONFIG_USB_CATC is not set
530# CONFIG_USB_KAWETH is not set
531# CONFIG_USB_PEGASUS is not set
532# CONFIG_USB_RTL8150 is not set
533# CONFIG_USB_USBNET is not set
534# CONFIG_WAN is not set
535# CONFIG_PPP is not set
536# CONFIG_SLIP is not set
537# CONFIG_NETCONSOLE is not set
538# CONFIG_NETPOLL is not set
539# CONFIG_NET_POLL_CONTROLLER is not set
540# CONFIG_ISDN is not set
541
542#
543# Input device support
544#
545CONFIG_INPUT=y
546# CONFIG_INPUT_FF_MEMLESS is not set
547# CONFIG_INPUT_POLLDEV is not set
548
549#
550# Userland interfaces
551#
552CONFIG_INPUT_MOUSEDEV=y
553CONFIG_INPUT_MOUSEDEV_PSAUX=y
554CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
555CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
556# CONFIG_INPUT_JOYDEV is not set
557CONFIG_INPUT_EVDEV=y
558# CONFIG_INPUT_EVBUG is not set
559
560#
561# Input Device Drivers
562#
563# CONFIG_INPUT_KEYBOARD is not set
564# CONFIG_INPUT_MOUSE is not set
565# CONFIG_INPUT_JOYSTICK is not set
566# CONFIG_INPUT_TABLET is not set
567# CONFIG_INPUT_TOUCHSCREEN is not set
568CONFIG_INPUT_MISC=y
569# CONFIG_INPUT_ATI_REMOTE is not set
570# CONFIG_INPUT_ATI_REMOTE2 is not set
571# CONFIG_INPUT_KEYSPAN_REMOTE is not set
572# CONFIG_INPUT_POWERMATE is not set
573# CONFIG_INPUT_YEALINK is not set
574# CONFIG_INPUT_CM109 is not set
575# CONFIG_INPUT_UINPUT is not set
576CONFIG_INPUT_GPIO_ROTARY_ENCODER=y
577
578#
579# Hardware I/O ports
580#
581CONFIG_SERIO=y
582CONFIG_SERIO_SERPORT=y
583# CONFIG_SERIO_RAW is not set
584# CONFIG_GAMEPORT is not set
585
586#
587# Character devices
588#
589CONFIG_VT=y
590CONFIG_CONSOLE_TRANSLATIONS=y
591CONFIG_VT_CONSOLE=y
592CONFIG_HW_CONSOLE=y
593# CONFIG_VT_HW_CONSOLE_BINDING is not set
594CONFIG_DEVKMEM=y
595# CONFIG_SERIAL_NONSTANDARD is not set
596
597#
598# Serial drivers
599#
600# CONFIG_SERIAL_8250 is not set
601
602#
603# Non-8250 serial port support
604#
605CONFIG_SERIAL_PXA=y
606CONFIG_SERIAL_PXA_CONSOLE=y
607CONFIG_SERIAL_CORE=y
608CONFIG_SERIAL_CORE_CONSOLE=y
609CONFIG_UNIX98_PTYS=y
610# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
611CONFIG_LEGACY_PTYS=y
612CONFIG_LEGACY_PTY_COUNT=256
613# CONFIG_IPMI_HANDLER is not set
614CONFIG_HW_RANDOM=y
615# CONFIG_R3964 is not set
616# CONFIG_RAW_DRIVER is not set
617# CONFIG_TCG_TPM is not set
618# CONFIG_I2C is not set
619# CONFIG_SPI is not set
620CONFIG_ARCH_REQUIRE_GPIOLIB=y
621CONFIG_GPIOLIB=y
622CONFIG_DEBUG_GPIO=y
623# CONFIG_GPIO_SYSFS is not set
624
625#
626# Memory mapped GPIO expanders:
627#
628
629#
630# I2C GPIO expanders:
631#
632
633#
634# PCI GPIO expanders:
635#
636
637#
638# SPI GPIO expanders:
639#
640# CONFIG_W1 is not set
641# CONFIG_POWER_SUPPLY is not set
642# CONFIG_HWMON is not set
643# CONFIG_THERMAL is not set
644# CONFIG_THERMAL_HWMON is not set
645# CONFIG_WATCHDOG is not set
646CONFIG_SSB_POSSIBLE=y
647
648#
649# Sonics Silicon Backplane
650#
651# CONFIG_SSB is not set
652
653#
654# Multifunction device drivers
655#
656# CONFIG_MFD_CORE is not set
657# CONFIG_MFD_SM501 is not set
658# CONFIG_MFD_ASIC3 is not set
659# CONFIG_HTC_EGPIO is not set
660# CONFIG_HTC_PASIC3 is not set
661# CONFIG_MFD_TMIO is not set
662# CONFIG_MFD_T7L66XB is not set
663# CONFIG_MFD_TC6387XB is not set
664# CONFIG_MFD_TC6393XB is not set
665
666#
667# Multimedia devices
668#
669
670#
671# Multimedia core support
672#
673# CONFIG_VIDEO_DEV is not set
674# CONFIG_DVB_CORE is not set
675# CONFIG_VIDEO_MEDIA is not set
676
677#
678# Multimedia drivers
679#
680# CONFIG_DAB is not set
681
682#
683# Graphics support
684#
685# CONFIG_VGASTATE is not set
686# CONFIG_VIDEO_OUTPUT_CONTROL is not set
687CONFIG_FB=y
688# CONFIG_FIRMWARE_EDID is not set
689# CONFIG_FB_DDC is not set
690# CONFIG_FB_BOOT_VESA_SUPPORT is not set
691CONFIG_FB_CFB_FILLRECT=y
692CONFIG_FB_CFB_COPYAREA=y
693CONFIG_FB_CFB_IMAGEBLIT=y
694# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
695# CONFIG_FB_SYS_FILLRECT is not set
696# CONFIG_FB_SYS_COPYAREA is not set
697# CONFIG_FB_SYS_IMAGEBLIT is not set
698# CONFIG_FB_FOREIGN_ENDIAN is not set
699# CONFIG_FB_SYS_FOPS is not set
700# CONFIG_FB_SVGALIB is not set
701# CONFIG_FB_MACMODES is not set
702# CONFIG_FB_BACKLIGHT is not set
703# CONFIG_FB_MODE_HELPERS is not set
704# CONFIG_FB_TILEBLITTING is not set
705
706#
707# Frame buffer hardware drivers
708#
709# CONFIG_FB_S1D13XXX is not set
710CONFIG_FB_PXA=y
711# CONFIG_FB_PXA_OVERLAY is not set
712# CONFIG_FB_PXA_SMARTPANEL is not set
713# CONFIG_FB_PXA_PARAMETERS is not set
714# CONFIG_FB_MBX is not set
715# CONFIG_FB_W100 is not set
716# CONFIG_FB_VIRTUAL is not set
717# CONFIG_FB_METRONOME is not set
718# CONFIG_FB_MB862XX is not set
719CONFIG_BACKLIGHT_LCD_SUPPORT=y
720# CONFIG_LCD_CLASS_DEVICE is not set
721CONFIG_BACKLIGHT_CLASS_DEVICE=y
722# CONFIG_BACKLIGHT_GENERIC is not set
723
724#
725# Display device support
726#
727# CONFIG_DISPLAY_SUPPORT is not set
728
729#
730# Console display driver support
731#
732# CONFIG_VGA_CONSOLE is not set
733CONFIG_DUMMY_CONSOLE=y
734CONFIG_FRAMEBUFFER_CONSOLE=y
735# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
736# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
737# CONFIG_FONTS is not set
738CONFIG_FONT_8x8=y
739CONFIG_FONT_8x16=y
740CONFIG_LOGO=y
741CONFIG_LOGO_LINUX_MONO=y
742CONFIG_LOGO_LINUX_VGA16=y
743CONFIG_LOGO_LINUX_CLUT224=y
744# CONFIG_SOUND is not set
745# CONFIG_HID_SUPPORT is not set
746CONFIG_USB_SUPPORT=y
747CONFIG_USB_ARCH_HAS_HCD=y
748CONFIG_USB_ARCH_HAS_OHCI=y
749# CONFIG_USB_ARCH_HAS_EHCI is not set
750CONFIG_USB=y
751CONFIG_USB_DEBUG=y
752CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
753
754#
755# Miscellaneous USB options
756#
757CONFIG_USB_DEVICEFS=y
758CONFIG_USB_DEVICE_CLASS=y
759# CONFIG_USB_DYNAMIC_MINORS is not set
760# CONFIG_USB_OTG is not set
761CONFIG_USB_MON=y
762# CONFIG_USB_WUSB is not set
763# CONFIG_USB_WUSB_CBAF is not set
764
765#
766# USB Host Controller Drivers
767#
768# CONFIG_USB_C67X00_HCD is not set
769# CONFIG_USB_OXU210HP_HCD is not set
770# CONFIG_USB_ISP116X_HCD is not set
771# CONFIG_USB_OHCI_HCD is not set
772# CONFIG_USB_SL811_HCD is not set
773# CONFIG_USB_R8A66597_HCD is not set
774# CONFIG_USB_HWA_HCD is not set
775# CONFIG_USB_MUSB_HDRC is not set
776
777#
778# USB Device Class drivers
779#
780# CONFIG_USB_ACM is not set
781# CONFIG_USB_PRINTER is not set
782# CONFIG_USB_WDM is not set
783# CONFIG_USB_TMC is not set
784
785#
786# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
787#
788
789#
790# see USB_STORAGE Help for more information
791#
792CONFIG_USB_STORAGE=y
793# CONFIG_USB_STORAGE_DEBUG is not set
794# CONFIG_USB_STORAGE_DATAFAB is not set
795# CONFIG_USB_STORAGE_FREECOM is not set
796# CONFIG_USB_STORAGE_ISD200 is not set
797# CONFIG_USB_STORAGE_USBAT is not set
798# CONFIG_USB_STORAGE_SDDR09 is not set
799# CONFIG_USB_STORAGE_SDDR55 is not set
800# CONFIG_USB_STORAGE_JUMPSHOT is not set
801# CONFIG_USB_STORAGE_ALAUDA is not set
802# CONFIG_USB_STORAGE_ONETOUCH is not set
803# CONFIG_USB_STORAGE_KARMA is not set
804# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
805# CONFIG_USB_LIBUSUAL is not set
806
807#
808# USB Imaging devices
809#
810# CONFIG_USB_MDC800 is not set
811# CONFIG_USB_MICROTEK is not set
812
813#
814# USB port drivers
815#
816# CONFIG_USB_SERIAL is not set
817
818#
819# USB Miscellaneous drivers
820#
821# CONFIG_USB_EMI62 is not set
822# CONFIG_USB_EMI26 is not set
823# CONFIG_USB_ADUTUX is not set
824# CONFIG_USB_SEVSEG is not set
825# CONFIG_USB_RIO500 is not set
826# CONFIG_USB_LEGOTOWER is not set
827# CONFIG_USB_LCD is not set
828# CONFIG_USB_BERRY_CHARGE is not set
829# CONFIG_USB_LED is not set
830# CONFIG_USB_CYPRESS_CY7C63 is not set
831# CONFIG_USB_CYTHERM is not set
832# CONFIG_USB_PHIDGET is not set
833# CONFIG_USB_IDMOUSE is not set
834# CONFIG_USB_FTDI_ELAN is not set
835# CONFIG_USB_APPLEDISPLAY is not set
836# CONFIG_USB_LD is not set
837# CONFIG_USB_TRANCEVIBRATOR is not set
838# CONFIG_USB_IOWARRIOR is not set
839# CONFIG_USB_TEST is not set
840# CONFIG_USB_ISIGHTFW is not set
841# CONFIG_USB_VST is not set
842# CONFIG_USB_GADGET is not set
843
844#
845# OTG and related infrastructure
846#
847# CONFIG_USB_GPIO_VBUS is not set
848CONFIG_MMC=y
849# CONFIG_MMC_DEBUG is not set
850# CONFIG_MMC_UNSAFE_RESUME is not set
851
852#
853# MMC/SD/SDIO Card Drivers
854#
855CONFIG_MMC_BLOCK=y
856# CONFIG_MMC_BLOCK_BOUNCE is not set
857# CONFIG_SDIO_UART is not set
858# CONFIG_MMC_TEST is not set
859
860#
861# MMC/SD/SDIO Host Controller Drivers
862#
863CONFIG_MMC_PXA=y
864# CONFIG_MMC_SDHCI is not set
865# CONFIG_MEMSTICK is not set
866# CONFIG_ACCESSIBILITY is not set
867# CONFIG_NEW_LEDS is not set
868CONFIG_RTC_LIB=y
869# CONFIG_RTC_CLASS is not set
870# CONFIG_DMADEVICES is not set
871# CONFIG_REGULATOR is not set
872# CONFIG_UIO is not set
873# CONFIG_STAGING is not set
874
875#
876# File systems
877#
878# CONFIG_EXT2_FS is not set
879CONFIG_EXT3_FS=y
880CONFIG_EXT3_FS_XATTR=y
881# CONFIG_EXT3_FS_POSIX_ACL is not set
882# CONFIG_EXT3_FS_SECURITY is not set
883# CONFIG_EXT4_FS is not set
884CONFIG_JBD=y
885CONFIG_FS_MBCACHE=y
886# CONFIG_REISERFS_FS is not set
887# CONFIG_JFS_FS is not set
888# CONFIG_FS_POSIX_ACL is not set
889CONFIG_FILE_LOCKING=y
890# CONFIG_XFS_FS is not set
891# CONFIG_OCFS2_FS is not set
892# CONFIG_BTRFS_FS is not set
893CONFIG_DNOTIFY=y
894CONFIG_INOTIFY=y
895CONFIG_INOTIFY_USER=y
896# CONFIG_QUOTA is not set
897# CONFIG_AUTOFS_FS is not set
898# CONFIG_AUTOFS4_FS is not set
899# CONFIG_FUSE_FS is not set
900
901#
902# CD-ROM/DVD Filesystems
903#
904# CONFIG_ISO9660_FS is not set
905# CONFIG_UDF_FS is not set
906
907#
908# DOS/FAT/NT Filesystems
909#
910# CONFIG_MSDOS_FS is not set
911# CONFIG_VFAT_FS is not set
912# CONFIG_NTFS_FS is not set
913
914#
915# Pseudo filesystems
916#
917CONFIG_PROC_FS=y
918CONFIG_PROC_SYSCTL=y
919CONFIG_PROC_PAGE_MONITOR=y
920CONFIG_SYSFS=y
921# CONFIG_TMPFS is not set
922# CONFIG_HUGETLB_PAGE is not set
923# CONFIG_CONFIGFS_FS is not set
924CONFIG_MISC_FILESYSTEMS=y
925# CONFIG_ADFS_FS is not set
926# CONFIG_AFFS_FS is not set
927# CONFIG_HFS_FS is not set
928# CONFIG_HFSPLUS_FS is not set
929# CONFIG_BEFS_FS is not set
930# CONFIG_BFS_FS is not set
931# CONFIG_EFS_FS is not set
932# CONFIG_CRAMFS is not set
933# CONFIG_SQUASHFS is not set
934# CONFIG_VXFS_FS is not set
935# CONFIG_MINIX_FS is not set
936# CONFIG_OMFS_FS is not set
937# CONFIG_HPFS_FS is not set
938# CONFIG_QNX4FS_FS is not set
939# CONFIG_ROMFS_FS is not set
940# CONFIG_SYSV_FS is not set
941# CONFIG_UFS_FS is not set
942CONFIG_NETWORK_FILESYSTEMS=y
943CONFIG_NFS_FS=y
944CONFIG_NFS_V3=y
945# CONFIG_NFS_V3_ACL is not set
946# CONFIG_NFS_V4 is not set
947CONFIG_ROOT_NFS=y
948# CONFIG_NFSD is not set
949CONFIG_LOCKD=y
950CONFIG_LOCKD_V4=y
951CONFIG_NFS_COMMON=y
952CONFIG_SUNRPC=y
953# CONFIG_SUNRPC_REGISTER_V4 is not set
954# CONFIG_RPCSEC_GSS_KRB5 is not set
955# CONFIG_RPCSEC_GSS_SPKM3 is not set
956# CONFIG_SMB_FS is not set
957# CONFIG_CIFS is not set
958# CONFIG_NCP_FS is not set
959# CONFIG_CODA_FS is not set
960# CONFIG_AFS_FS is not set
961
962#
963# Partition Types
964#
965# CONFIG_PARTITION_ADVANCED is not set
966CONFIG_MSDOS_PARTITION=y
967# CONFIG_NLS is not set
968# CONFIG_DLM is not set
969
970#
971# Kernel hacking
972#
973CONFIG_PRINTK_TIME=y
974CONFIG_ENABLE_WARN_DEPRECATED=y
975CONFIG_ENABLE_MUST_CHECK=y
976CONFIG_FRAME_WARN=1024
977# CONFIG_MAGIC_SYSRQ is not set
978# CONFIG_UNUSED_SYMBOLS is not set
979# CONFIG_DEBUG_FS is not set
980# CONFIG_HEADERS_CHECK is not set
981CONFIG_DEBUG_KERNEL=y
982# CONFIG_DEBUG_SHIRQ is not set
983CONFIG_DETECT_SOFTLOCKUP=y
984# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
985CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
986CONFIG_SCHED_DEBUG=y
987# CONFIG_SCHEDSTATS is not set
988# CONFIG_TIMER_STATS is not set
989# CONFIG_DEBUG_OBJECTS is not set
990# CONFIG_SLUB_DEBUG_ON is not set
991# CONFIG_SLUB_STATS is not set
992# CONFIG_DEBUG_RT_MUTEXES is not set
993# CONFIG_RT_MUTEX_TESTER is not set
994# CONFIG_DEBUG_SPINLOCK is not set
995# CONFIG_DEBUG_MUTEXES is not set
996# CONFIG_DEBUG_LOCK_ALLOC is not set
997# CONFIG_PROVE_LOCKING is not set
998# CONFIG_LOCK_STAT is not set
999# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1000# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1001# CONFIG_DEBUG_KOBJECT is not set
1002CONFIG_DEBUG_BUGVERBOSE=y
1003CONFIG_DEBUG_INFO=y
1004# CONFIG_DEBUG_VM is not set
1005# CONFIG_DEBUG_WRITECOUNT is not set
1006CONFIG_DEBUG_MEMORY_INIT=y
1007# CONFIG_DEBUG_LIST is not set
1008# CONFIG_DEBUG_SG is not set
1009# CONFIG_DEBUG_NOTIFIERS is not set
1010CONFIG_FRAME_POINTER=y
1011# CONFIG_BOOT_PRINTK_DELAY is not set
1012# CONFIG_RCU_TORTURE_TEST is not set
1013# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1014# CONFIG_BACKTRACE_SELF_TEST is not set
1015# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
1016# CONFIG_FAULT_INJECTION is not set
1017# CONFIG_LATENCYTOP is not set
1018# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1019CONFIG_HAVE_FUNCTION_TRACER=y
1020
1021#
1022# Tracers
1023#
1024# CONFIG_FUNCTION_TRACER is not set
1025# CONFIG_IRQSOFF_TRACER is not set
1026# CONFIG_SCHED_TRACER is not set
1027# CONFIG_CONTEXT_SWITCH_TRACER is not set
1028# CONFIG_BOOT_TRACER is not set
1029# CONFIG_TRACE_BRANCH_PROFILING is not set
1030# CONFIG_STACK_TRACER is not set
1031# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
1032# CONFIG_SAMPLES is not set
1033CONFIG_HAVE_ARCH_KGDB=y
1034# CONFIG_KGDB is not set
1035CONFIG_DEBUG_USER=y
1036CONFIG_DEBUG_ERRORS=y
1037# CONFIG_DEBUG_STACK_USAGE is not set
1038CONFIG_DEBUG_LL=y
1039# CONFIG_DEBUG_ICEDCC is not set
1040
1041#
1042# Security options
1043#
1044# CONFIG_KEYS is not set
1045# CONFIG_SECURITY is not set
1046# CONFIG_SECURITYFS is not set
1047# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1048CONFIG_CRYPTO=y
1049
1050#
1051# Crypto core or helper
1052#
1053# CONFIG_CRYPTO_FIPS is not set
1054CONFIG_CRYPTO_ALGAPI=y
1055CONFIG_CRYPTO_ALGAPI2=y
1056CONFIG_CRYPTO_AEAD2=y
1057CONFIG_CRYPTO_BLKCIPHER=y
1058CONFIG_CRYPTO_BLKCIPHER2=y
1059CONFIG_CRYPTO_HASH2=y
1060CONFIG_CRYPTO_RNG2=y
1061CONFIG_CRYPTO_MANAGER=y
1062CONFIG_CRYPTO_MANAGER2=y
1063# CONFIG_CRYPTO_GF128MUL is not set
1064# CONFIG_CRYPTO_NULL is not set
1065# CONFIG_CRYPTO_CRYPTD is not set
1066# CONFIG_CRYPTO_AUTHENC is not set
1067# CONFIG_CRYPTO_TEST is not set
1068
1069#
1070# Authenticated Encryption with Associated Data
1071#
1072# CONFIG_CRYPTO_CCM is not set
1073# CONFIG_CRYPTO_GCM is not set
1074# CONFIG_CRYPTO_SEQIV is not set
1075
1076#
1077# Block modes
1078#
1079# CONFIG_CRYPTO_CBC is not set
1080# CONFIG_CRYPTO_CTR is not set
1081# CONFIG_CRYPTO_CTS is not set
1082CONFIG_CRYPTO_ECB=y
1083# CONFIG_CRYPTO_LRW is not set
1084# CONFIG_CRYPTO_PCBC is not set
1085# CONFIG_CRYPTO_XTS is not set
1086
1087#
1088# Hash modes
1089#
1090# CONFIG_CRYPTO_HMAC is not set
1091# CONFIG_CRYPTO_XCBC is not set
1092
1093#
1094# Digest
1095#
1096# CONFIG_CRYPTO_CRC32C is not set
1097# CONFIG_CRYPTO_MD4 is not set
1098# CONFIG_CRYPTO_MD5 is not set
1099# CONFIG_CRYPTO_MICHAEL_MIC is not set
1100# CONFIG_CRYPTO_RMD128 is not set
1101# CONFIG_CRYPTO_RMD160 is not set
1102# CONFIG_CRYPTO_RMD256 is not set
1103# CONFIG_CRYPTO_RMD320 is not set
1104# CONFIG_CRYPTO_SHA1 is not set
1105# CONFIG_CRYPTO_SHA256 is not set
1106# CONFIG_CRYPTO_SHA512 is not set
1107# CONFIG_CRYPTO_TGR192 is not set
1108# CONFIG_CRYPTO_WP512 is not set
1109
1110#
1111# Ciphers
1112#
1113CONFIG_CRYPTO_AES=y
1114# CONFIG_CRYPTO_ANUBIS is not set
1115CONFIG_CRYPTO_ARC4=y
1116# CONFIG_CRYPTO_BLOWFISH is not set
1117# CONFIG_CRYPTO_CAMELLIA is not set
1118# CONFIG_CRYPTO_CAST5 is not set
1119# CONFIG_CRYPTO_CAST6 is not set
1120# CONFIG_CRYPTO_DES is not set
1121# CONFIG_CRYPTO_FCRYPT is not set
1122# CONFIG_CRYPTO_KHAZAD is not set
1123# CONFIG_CRYPTO_SALSA20 is not set
1124# CONFIG_CRYPTO_SEED is not set
1125# CONFIG_CRYPTO_SERPENT is not set
1126# CONFIG_CRYPTO_TEA is not set
1127# CONFIG_CRYPTO_TWOFISH is not set
1128
1129#
1130# Compression
1131#
1132# CONFIG_CRYPTO_DEFLATE is not set
1133# CONFIG_CRYPTO_LZO is not set
1134
1135#
1136# Random Number Generation
1137#
1138# CONFIG_CRYPTO_ANSI_CPRNG is not set
1139CONFIG_CRYPTO_HW=y
1140
1141#
1142# Library routines
1143#
1144CONFIG_BITREVERSE=y
1145CONFIG_GENERIC_FIND_LAST_BIT=y
1146# CONFIG_CRC_CCITT is not set
1147# CONFIG_CRC16 is not set
1148# CONFIG_CRC_T10DIF is not set
1149# CONFIG_CRC_ITU_T is not set
1150CONFIG_CRC32=y
1151# CONFIG_CRC7 is not set
1152# CONFIG_LIBCRC32C is not set
1153CONFIG_PLIST=y
1154CONFIG_HAS_IOMEM=y
1155CONFIG_HAS_IOPORT=y
1156CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/pxa168_defconfig b/arch/arm/configs/pxa168_defconfig
new file mode 100644
index 000000000000..db5faeaec96c
--- /dev/null
+++ b/arch/arm/configs/pxa168_defconfig
@@ -0,0 +1,891 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.29-rc3
4# Fri Mar 20 13:43:13 2009
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y
11CONFIG_MMU=y
12# CONFIG_NO_IOPORT is not set
13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_HAVE_LATENCYTOP_SUPPORT=y
16CONFIG_LOCKDEP_SUPPORT=y
17CONFIG_TRACE_IRQFLAGS_SUPPORT=y
18CONFIG_HARDIRQS_SW_RESEND=y
19CONFIG_GENERIC_IRQ_PROBE=y
20CONFIG_RWSEM_GENERIC_SPINLOCK=y
21# CONFIG_ARCH_HAS_ILOG2_U32 is not set
22# CONFIG_ARCH_HAS_ILOG2_U64 is not set
23CONFIG_GENERIC_HWEIGHT=y
24CONFIG_GENERIC_CALIBRATE_DELAY=y
25CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
26CONFIG_VECTORS_BASE=0xffff0000
27CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
28
29#
30# General setup
31#
32CONFIG_EXPERIMENTAL=y
33CONFIG_BROKEN_ON_SMP=y
34CONFIG_LOCK_KERNEL=y
35CONFIG_INIT_ENV_ARG_LIMIT=32
36CONFIG_LOCALVERSION=""
37CONFIG_LOCALVERSION_AUTO=y
38CONFIG_SWAP=y
39CONFIG_SYSVIPC=y
40CONFIG_SYSVIPC_SYSCTL=y
41# CONFIG_POSIX_MQUEUE is not set
42# CONFIG_BSD_PROCESS_ACCT is not set
43# CONFIG_TASKSTATS is not set
44# CONFIG_AUDIT is not set
45
46#
47# RCU Subsystem
48#
49CONFIG_CLASSIC_RCU=y
50# CONFIG_TREE_RCU is not set
51# CONFIG_PREEMPT_RCU is not set
52# CONFIG_TREE_RCU_TRACE is not set
53# CONFIG_PREEMPT_RCU_TRACE is not set
54# CONFIG_IKCONFIG is not set
55CONFIG_LOG_BUF_SHIFT=14
56# CONFIG_GROUP_SCHED is not set
57# CONFIG_CGROUPS is not set
58CONFIG_SYSFS_DEPRECATED=y
59CONFIG_SYSFS_DEPRECATED_V2=y
60# CONFIG_RELAY is not set
61CONFIG_NAMESPACES=y
62# CONFIG_UTS_NS is not set
63# CONFIG_IPC_NS is not set
64# CONFIG_USER_NS is not set
65# CONFIG_PID_NS is not set
66# CONFIG_NET_NS is not set
67CONFIG_BLK_DEV_INITRD=y
68CONFIG_INITRAMFS_SOURCE=""
69CONFIG_CC_OPTIMIZE_FOR_SIZE=y
70CONFIG_SYSCTL=y
71# CONFIG_EMBEDDED is not set
72CONFIG_UID16=y
73CONFIG_SYSCTL_SYSCALL=y
74CONFIG_KALLSYMS=y
75# CONFIG_KALLSYMS_ALL is not set
76# CONFIG_KALLSYMS_EXTRA_PASS is not set
77CONFIG_HOTPLUG=y
78CONFIG_PRINTK=y
79CONFIG_BUG=y
80CONFIG_ELF_CORE=y
81CONFIG_COMPAT_BRK=y
82CONFIG_BASE_FULL=y
83CONFIG_FUTEX=y
84CONFIG_ANON_INODES=y
85CONFIG_EPOLL=y
86CONFIG_SIGNALFD=y
87CONFIG_TIMERFD=y
88CONFIG_EVENTFD=y
89CONFIG_SHMEM=y
90CONFIG_AIO=y
91CONFIG_VM_EVENT_COUNTERS=y
92CONFIG_SLAB=y
93# CONFIG_SLUB is not set
94# CONFIG_SLOB is not set
95# CONFIG_PROFILING is not set
96CONFIG_HAVE_OPROFILE=y
97# CONFIG_KPROBES is not set
98CONFIG_HAVE_KPROBES=y
99CONFIG_HAVE_KRETPROBES=y
100CONFIG_HAVE_CLK=y
101CONFIG_HAVE_GENERIC_DMA_COHERENT=y
102CONFIG_SLABINFO=y
103CONFIG_RT_MUTEXES=y
104CONFIG_BASE_SMALL=0
105CONFIG_MODULES=y
106# CONFIG_MODULE_FORCE_LOAD is not set
107CONFIG_MODULE_UNLOAD=y
108CONFIG_MODULE_FORCE_UNLOAD=y
109# CONFIG_MODVERSIONS is not set
110# CONFIG_MODULE_SRCVERSION_ALL is not set
111CONFIG_BLOCK=y
112# CONFIG_LBD is not set
113# CONFIG_BLK_DEV_IO_TRACE is not set
114# CONFIG_BLK_DEV_BSG is not set
115# CONFIG_BLK_DEV_INTEGRITY is not set
116
117#
118# IO Schedulers
119#
120CONFIG_IOSCHED_NOOP=y
121CONFIG_IOSCHED_AS=y
122CONFIG_IOSCHED_DEADLINE=y
123CONFIG_IOSCHED_CFQ=y
124# CONFIG_DEFAULT_AS is not set
125# CONFIG_DEFAULT_DEADLINE is not set
126CONFIG_DEFAULT_CFQ=y
127# CONFIG_DEFAULT_NOOP is not set
128CONFIG_DEFAULT_IOSCHED="cfq"
129# CONFIG_FREEZER is not set
130
131#
132# System Type
133#
134# CONFIG_ARCH_AAEC2000 is not set
135# CONFIG_ARCH_INTEGRATOR is not set
136# CONFIG_ARCH_REALVIEW is not set
137# CONFIG_ARCH_VERSATILE is not set
138# CONFIG_ARCH_AT91 is not set
139# CONFIG_ARCH_CLPS711X is not set
140# CONFIG_ARCH_EBSA110 is not set
141# CONFIG_ARCH_EP93XX is not set
142# CONFIG_ARCH_FOOTBRIDGE is not set
143# CONFIG_ARCH_NETX is not set
144# CONFIG_ARCH_H720X is not set
145# CONFIG_ARCH_IMX is not set
146# CONFIG_ARCH_IOP13XX is not set
147# CONFIG_ARCH_IOP32X is not set
148# CONFIG_ARCH_IOP33X is not set
149# CONFIG_ARCH_IXP23XX is not set
150# CONFIG_ARCH_IXP2000 is not set
151# CONFIG_ARCH_IXP4XX is not set
152# CONFIG_ARCH_L7200 is not set
153# CONFIG_ARCH_KIRKWOOD is not set
154# CONFIG_ARCH_KS8695 is not set
155# CONFIG_ARCH_NS9XXX is not set
156# CONFIG_ARCH_LOKI is not set
157# CONFIG_ARCH_MV78XX0 is not set
158# CONFIG_ARCH_MXC is not set
159# CONFIG_ARCH_ORION5X is not set
160# CONFIG_ARCH_PNX4008 is not set
161# CONFIG_ARCH_PXA is not set
162CONFIG_ARCH_MMP=y
163# CONFIG_ARCH_RPC is not set
164# CONFIG_ARCH_SA1100 is not set
165# CONFIG_ARCH_S3C2410 is not set
166# CONFIG_ARCH_S3C64XX is not set
167# CONFIG_ARCH_SHARK is not set
168# CONFIG_ARCH_LH7A40X is not set
169# CONFIG_ARCH_DAVINCI is not set
170# CONFIG_ARCH_OMAP is not set
171# CONFIG_ARCH_MSM is not set
172# CONFIG_ARCH_W90X900 is not set
173# CONFIG_MACH_TAVOREVB is not set
174
175#
176# Marvell PXA168/910 Implmentations
177#
178CONFIG_MACH_ASPENITE=y
179CONFIG_MACH_ZYLONITE2=y
180# CONFIG_MACH_TTC_DKB is not set
181CONFIG_CPU_PXA168=y
182CONFIG_PLAT_PXA=y
183
184#
185# Processor Type
186#
187CONFIG_CPU_32=y
188CONFIG_CPU_MOHAWK=y
189CONFIG_CPU_32v5=y
190CONFIG_CPU_ABRT_EV5T=y
191CONFIG_CPU_PABRT_NOIFAR=y
192CONFIG_CPU_CACHE_VIVT=y
193CONFIG_CPU_COPY_V4WB=y
194CONFIG_CPU_TLB_V4WBI=y
195CONFIG_CPU_CP15=y
196CONFIG_CPU_CP15_MMU=y
197
198#
199# Processor Features
200#
201CONFIG_ARM_THUMB=y
202# CONFIG_CPU_ICACHE_DISABLE is not set
203# CONFIG_CPU_DCACHE_DISABLE is not set
204# CONFIG_CPU_BPREDICT_DISABLE is not set
205# CONFIG_OUTER_CACHE is not set
206CONFIG_IWMMXT=y
207CONFIG_COMMON_CLKDEV=y
208
209#
210# Bus support
211#
212# CONFIG_PCI_SYSCALL is not set
213# CONFIG_ARCH_SUPPORTS_MSI is not set
214# CONFIG_PCCARD is not set
215
216#
217# Kernel Features
218#
219CONFIG_TICK_ONESHOT=y
220CONFIG_NO_HZ=y
221CONFIG_HIGH_RES_TIMERS=y
222CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
223CONFIG_VMSPLIT_3G=y
224# CONFIG_VMSPLIT_2G is not set
225# CONFIG_VMSPLIT_1G is not set
226CONFIG_PAGE_OFFSET=0xC0000000
227CONFIG_PREEMPT=y
228CONFIG_HZ=100
229CONFIG_AEABI=y
230CONFIG_OABI_COMPAT=y
231CONFIG_ARCH_FLATMEM_HAS_HOLES=y
232# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
233# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
234CONFIG_SELECT_MEMORY_MODEL=y
235CONFIG_FLATMEM_MANUAL=y
236# CONFIG_DISCONTIGMEM_MANUAL is not set
237# CONFIG_SPARSEMEM_MANUAL is not set
238CONFIG_FLATMEM=y
239CONFIG_FLAT_NODE_MEM_MAP=y
240CONFIG_PAGEFLAGS_EXTENDED=y
241CONFIG_SPLIT_PTLOCK_CPUS=4096
242# CONFIG_PHYS_ADDR_T_64BIT is not set
243CONFIG_ZONE_DMA_FLAG=0
244CONFIG_VIRT_TO_BUS=y
245CONFIG_UNEVICTABLE_LRU=y
246CONFIG_ALIGNMENT_TRAP=y
247
248#
249# Boot options
250#
251CONFIG_ZBOOT_ROM_TEXT=0x0
252CONFIG_ZBOOT_ROM_BSS=0x0
253CONFIG_CMDLINE="root=/dev/nfs rootfstype=nfs nfsroot=192.168.2.100:/nfsroot/ ip=192.168.2.101:192.168.2.100::255.255.255.0::eth0:on console=ttyS0,115200 mem=128M"
254# CONFIG_XIP_KERNEL is not set
255# CONFIG_KEXEC is not set
256
257#
258# CPU Power Management
259#
260# CONFIG_CPU_IDLE is not set
261
262#
263# Floating point emulation
264#
265
266#
267# At least one emulation must be selected
268#
269CONFIG_FPE_NWFPE=y
270# CONFIG_FPE_NWFPE_XP is not set
271# CONFIG_FPE_FASTFPE is not set
272
273#
274# Userspace binary formats
275#
276CONFIG_BINFMT_ELF=y
277# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
278CONFIG_HAVE_AOUT=y
279# CONFIG_BINFMT_AOUT is not set
280# CONFIG_BINFMT_MISC is not set
281
282#
283# Power management options
284#
285# CONFIG_PM is not set
286CONFIG_ARCH_SUSPEND_POSSIBLE=y
287CONFIG_NET=y
288
289#
290# Networking options
291#
292CONFIG_COMPAT_NET_DEV_OPS=y
293CONFIG_PACKET=y
294# CONFIG_PACKET_MMAP is not set
295CONFIG_UNIX=y
296CONFIG_XFRM=y
297# CONFIG_XFRM_USER is not set
298# CONFIG_XFRM_SUB_POLICY is not set
299# CONFIG_XFRM_MIGRATE is not set
300# CONFIG_XFRM_STATISTICS is not set
301# CONFIG_NET_KEY is not set
302CONFIG_INET=y
303# CONFIG_IP_MULTICAST is not set
304# CONFIG_IP_ADVANCED_ROUTER is not set
305CONFIG_IP_FIB_HASH=y
306CONFIG_IP_PNP=y
307# CONFIG_IP_PNP_DHCP is not set
308# CONFIG_IP_PNP_BOOTP is not set
309# CONFIG_IP_PNP_RARP is not set
310# CONFIG_NET_IPIP is not set
311# CONFIG_NET_IPGRE is not set
312# CONFIG_ARPD is not set
313# CONFIG_SYN_COOKIES is not set
314# CONFIG_INET_AH is not set
315# CONFIG_INET_ESP is not set
316# CONFIG_INET_IPCOMP is not set
317# CONFIG_INET_XFRM_TUNNEL is not set
318# CONFIG_INET_TUNNEL is not set
319CONFIG_INET_XFRM_MODE_TRANSPORT=y
320CONFIG_INET_XFRM_MODE_TUNNEL=y
321CONFIG_INET_XFRM_MODE_BEET=y
322# CONFIG_INET_LRO is not set
323CONFIG_INET_DIAG=y
324CONFIG_INET_TCP_DIAG=y
325# CONFIG_TCP_CONG_ADVANCED is not set
326CONFIG_TCP_CONG_CUBIC=y
327CONFIG_DEFAULT_TCP_CONG="cubic"
328# CONFIG_TCP_MD5SIG is not set
329# CONFIG_IPV6 is not set
330# CONFIG_NETWORK_SECMARK is not set
331# CONFIG_NETFILTER is not set
332# CONFIG_IP_DCCP is not set
333# CONFIG_IP_SCTP is not set
334# CONFIG_TIPC is not set
335# CONFIG_ATM is not set
336# CONFIG_BRIDGE is not set
337# CONFIG_NET_DSA is not set
338# CONFIG_VLAN_8021Q is not set
339# CONFIG_DECNET is not set
340# CONFIG_LLC2 is not set
341# CONFIG_IPX is not set
342# CONFIG_ATALK is not set
343# CONFIG_X25 is not set
344# CONFIG_LAPB is not set
345# CONFIG_ECONET is not set
346# CONFIG_WAN_ROUTER is not set
347# CONFIG_NET_SCHED is not set
348# CONFIG_DCB is not set
349
350#
351# Network testing
352#
353# CONFIG_NET_PKTGEN is not set
354# CONFIG_HAMRADIO is not set
355# CONFIG_CAN is not set
356# CONFIG_IRDA is not set
357# CONFIG_BT is not set
358# CONFIG_AF_RXRPC is not set
359# CONFIG_PHONET is not set
360CONFIG_WIRELESS=y
361# CONFIG_CFG80211 is not set
362CONFIG_WIRELESS_OLD_REGULATORY=y
363# CONFIG_WIRELESS_EXT is not set
364# CONFIG_LIB80211 is not set
365# CONFIG_MAC80211 is not set
366# CONFIG_WIMAX is not set
367# CONFIG_RFKILL is not set
368# CONFIG_NET_9P is not set
369
370#
371# Device Drivers
372#
373
374#
375# Generic Driver Options
376#
377CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
378# CONFIG_STANDALONE is not set
379# CONFIG_PREVENT_FIRMWARE_BUILD is not set
380CONFIG_FW_LOADER=y
381CONFIG_FIRMWARE_IN_KERNEL=y
382CONFIG_EXTRA_FIRMWARE=""
383# CONFIG_DEBUG_DRIVER is not set
384# CONFIG_DEBUG_DEVRES is not set
385# CONFIG_SYS_HYPERVISOR is not set
386# CONFIG_CONNECTOR is not set
387# CONFIG_MTD is not set
388# CONFIG_PARPORT is not set
389# CONFIG_BLK_DEV is not set
390# CONFIG_MISC_DEVICES is not set
391CONFIG_HAVE_IDE=y
392# CONFIG_IDE is not set
393
394#
395# SCSI device support
396#
397# CONFIG_RAID_ATTRS is not set
398# CONFIG_SCSI is not set
399# CONFIG_SCSI_DMA is not set
400# CONFIG_SCSI_NETLINK is not set
401# CONFIG_ATA is not set
402# CONFIG_MD is not set
403CONFIG_NETDEVICES=y
404# CONFIG_DUMMY is not set
405# CONFIG_BONDING is not set
406# CONFIG_MACVLAN is not set
407# CONFIG_EQUALIZER is not set
408# CONFIG_TUN is not set
409# CONFIG_VETH is not set
410# CONFIG_PHYLIB is not set
411CONFIG_NET_ETHERNET=y
412CONFIG_MII=y
413# CONFIG_AX88796 is not set
414CONFIG_SMC91X=y
415# CONFIG_DM9000 is not set
416# CONFIG_SMC911X is not set
417# CONFIG_SMSC911X is not set
418# CONFIG_IBM_NEW_EMAC_ZMII is not set
419# CONFIG_IBM_NEW_EMAC_RGMII is not set
420# CONFIG_IBM_NEW_EMAC_TAH is not set
421# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
422# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
423# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
424# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
425# CONFIG_B44 is not set
426# CONFIG_NETDEV_1000 is not set
427# CONFIG_NETDEV_10000 is not set
428
429#
430# Wireless LAN
431#
432# CONFIG_WLAN_PRE80211 is not set
433# CONFIG_WLAN_80211 is not set
434# CONFIG_IWLWIFI_LEDS is not set
435
436#
437# Enable WiMAX (Networking options) to see the WiMAX drivers
438#
439# CONFIG_WAN is not set
440# CONFIG_PPP is not set
441# CONFIG_SLIP is not set
442# CONFIG_NETCONSOLE is not set
443# CONFIG_NETPOLL is not set
444# CONFIG_NET_POLL_CONTROLLER is not set
445# CONFIG_ISDN is not set
446
447#
448# Input device support
449#
450CONFIG_INPUT=y
451# CONFIG_INPUT_FF_MEMLESS is not set
452# CONFIG_INPUT_POLLDEV is not set
453
454#
455# Userland interfaces
456#
457CONFIG_INPUT_MOUSEDEV=y
458# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
459CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
460CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
461# CONFIG_INPUT_JOYDEV is not set
462# CONFIG_INPUT_EVDEV is not set
463# CONFIG_INPUT_EVBUG is not set
464
465#
466# Input Device Drivers
467#
468# CONFIG_INPUT_KEYBOARD is not set
469# CONFIG_INPUT_MOUSE is not set
470# CONFIG_INPUT_JOYSTICK is not set
471# CONFIG_INPUT_TABLET is not set
472# CONFIG_INPUT_TOUCHSCREEN is not set
473# CONFIG_INPUT_MISC is not set
474
475#
476# Hardware I/O ports
477#
478# CONFIG_SERIO is not set
479# CONFIG_GAMEPORT is not set
480
481#
482# Character devices
483#
484CONFIG_VT=y
485CONFIG_CONSOLE_TRANSLATIONS=y
486CONFIG_VT_CONSOLE=y
487CONFIG_HW_CONSOLE=y
488# CONFIG_VT_HW_CONSOLE_BINDING is not set
489CONFIG_DEVKMEM=y
490# CONFIG_SERIAL_NONSTANDARD is not set
491
492#
493# Serial drivers
494#
495# CONFIG_SERIAL_8250 is not set
496
497#
498# Non-8250 serial port support
499#
500CONFIG_SERIAL_PXA=y
501CONFIG_SERIAL_PXA_CONSOLE=y
502CONFIG_SERIAL_CORE=y
503CONFIG_SERIAL_CORE_CONSOLE=y
504CONFIG_UNIX98_PTYS=y
505# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
506# CONFIG_LEGACY_PTYS is not set
507# CONFIG_IPMI_HANDLER is not set
508# CONFIG_HW_RANDOM is not set
509# CONFIG_R3964 is not set
510# CONFIG_RAW_DRIVER is not set
511# CONFIG_TCG_TPM is not set
512# CONFIG_I2C is not set
513# CONFIG_SPI is not set
514CONFIG_ARCH_REQUIRE_GPIOLIB=y
515CONFIG_GPIOLIB=y
516# CONFIG_DEBUG_GPIO is not set
517# CONFIG_GPIO_SYSFS is not set
518
519#
520# Memory mapped GPIO expanders:
521#
522
523#
524# I2C GPIO expanders:
525#
526
527#
528# PCI GPIO expanders:
529#
530
531#
532# SPI GPIO expanders:
533#
534# CONFIG_W1 is not set
535# CONFIG_POWER_SUPPLY is not set
536# CONFIG_HWMON is not set
537# CONFIG_THERMAL is not set
538# CONFIG_THERMAL_HWMON is not set
539# CONFIG_WATCHDOG is not set
540CONFIG_SSB_POSSIBLE=y
541
542#
543# Sonics Silicon Backplane
544#
545# CONFIG_SSB is not set
546
547#
548# Multifunction device drivers
549#
550# CONFIG_MFD_CORE is not set
551# CONFIG_MFD_SM501 is not set
552# CONFIG_MFD_ASIC3 is not set
553# CONFIG_HTC_EGPIO is not set
554# CONFIG_HTC_PASIC3 is not set
555# CONFIG_MFD_TMIO is not set
556# CONFIG_MFD_T7L66XB is not set
557# CONFIG_MFD_TC6387XB is not set
558# CONFIG_MFD_TC6393XB is not set
559
560#
561# Multimedia devices
562#
563
564#
565# Multimedia core support
566#
567# CONFIG_VIDEO_DEV is not set
568# CONFIG_DVB_CORE is not set
569# CONFIG_VIDEO_MEDIA is not set
570
571#
572# Multimedia drivers
573#
574# CONFIG_DAB is not set
575
576#
577# Graphics support
578#
579# CONFIG_VGASTATE is not set
580# CONFIG_VIDEO_OUTPUT_CONTROL is not set
581# CONFIG_FB is not set
582# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
583
584#
585# Display device support
586#
587# CONFIG_DISPLAY_SUPPORT is not set
588
589#
590# Console display driver support
591#
592# CONFIG_VGA_CONSOLE is not set
593CONFIG_DUMMY_CONSOLE=y
594# CONFIG_SOUND is not set
595# CONFIG_HID_SUPPORT is not set
596# CONFIG_USB_SUPPORT is not set
597# CONFIG_MMC is not set
598# CONFIG_MEMSTICK is not set
599# CONFIG_ACCESSIBILITY is not set
600# CONFIG_NEW_LEDS is not set
601CONFIG_RTC_LIB=y
602# CONFIG_RTC_CLASS is not set
603# CONFIG_DMADEVICES is not set
604# CONFIG_REGULATOR is not set
605# CONFIG_UIO is not set
606# CONFIG_STAGING is not set
607
608#
609# File systems
610#
611# CONFIG_EXT2_FS is not set
612# CONFIG_EXT3_FS is not set
613# CONFIG_EXT4_FS is not set
614# CONFIG_REISERFS_FS is not set
615# CONFIG_JFS_FS is not set
616CONFIG_FS_POSIX_ACL=y
617CONFIG_FILE_LOCKING=y
618# CONFIG_XFS_FS is not set
619# CONFIG_OCFS2_FS is not set
620# CONFIG_BTRFS_FS is not set
621CONFIG_DNOTIFY=y
622CONFIG_INOTIFY=y
623CONFIG_INOTIFY_USER=y
624# CONFIG_QUOTA is not set
625# CONFIG_AUTOFS_FS is not set
626# CONFIG_AUTOFS4_FS is not set
627# CONFIG_FUSE_FS is not set
628CONFIG_GENERIC_ACL=y
629
630#
631# CD-ROM/DVD Filesystems
632#
633# CONFIG_ISO9660_FS is not set
634# CONFIG_UDF_FS is not set
635
636#
637# DOS/FAT/NT Filesystems
638#
639# CONFIG_MSDOS_FS is not set
640# CONFIG_VFAT_FS is not set
641# CONFIG_NTFS_FS is not set
642
643#
644# Pseudo filesystems
645#
646CONFIG_PROC_FS=y
647CONFIG_PROC_SYSCTL=y
648CONFIG_PROC_PAGE_MONITOR=y
649CONFIG_SYSFS=y
650CONFIG_TMPFS=y
651CONFIG_TMPFS_POSIX_ACL=y
652# CONFIG_HUGETLB_PAGE is not set
653# CONFIG_CONFIGFS_FS is not set
654CONFIG_MISC_FILESYSTEMS=y
655# CONFIG_ADFS_FS is not set
656# CONFIG_AFFS_FS is not set
657# CONFIG_HFS_FS is not set
658# CONFIG_HFSPLUS_FS is not set
659# CONFIG_BEFS_FS is not set
660# CONFIG_BFS_FS is not set
661# CONFIG_EFS_FS is not set
662CONFIG_CRAMFS=y
663# CONFIG_SQUASHFS is not set
664# CONFIG_VXFS_FS is not set
665# CONFIG_MINIX_FS is not set
666# CONFIG_OMFS_FS is not set
667# CONFIG_HPFS_FS is not set
668# CONFIG_QNX4FS_FS is not set
669# CONFIG_ROMFS_FS is not set
670# CONFIG_SYSV_FS is not set
671# CONFIG_UFS_FS is not set
672CONFIG_NETWORK_FILESYSTEMS=y
673CONFIG_NFS_FS=y
674CONFIG_NFS_V3=y
675CONFIG_NFS_V3_ACL=y
676CONFIG_NFS_V4=y
677CONFIG_ROOT_NFS=y
678# CONFIG_NFSD is not set
679CONFIG_LOCKD=y
680CONFIG_LOCKD_V4=y
681CONFIG_NFS_ACL_SUPPORT=y
682CONFIG_NFS_COMMON=y
683CONFIG_SUNRPC=y
684CONFIG_SUNRPC_GSS=y
685# CONFIG_SUNRPC_REGISTER_V4 is not set
686CONFIG_RPCSEC_GSS_KRB5=y
687# CONFIG_RPCSEC_GSS_SPKM3 is not set
688# CONFIG_SMB_FS is not set
689# CONFIG_CIFS is not set
690# CONFIG_NCP_FS is not set
691# CONFIG_CODA_FS is not set
692# CONFIG_AFS_FS is not set
693
694#
695# Partition Types
696#
697# CONFIG_PARTITION_ADVANCED is not set
698CONFIG_MSDOS_PARTITION=y
699# CONFIG_NLS is not set
700# CONFIG_DLM is not set
701
702#
703# Kernel hacking
704#
705CONFIG_PRINTK_TIME=y
706CONFIG_ENABLE_WARN_DEPRECATED=y
707CONFIG_ENABLE_MUST_CHECK=y
708CONFIG_FRAME_WARN=1024
709CONFIG_MAGIC_SYSRQ=y
710# CONFIG_UNUSED_SYMBOLS is not set
711# CONFIG_DEBUG_FS is not set
712# CONFIG_HEADERS_CHECK is not set
713CONFIG_DEBUG_KERNEL=y
714# CONFIG_DEBUG_SHIRQ is not set
715CONFIG_DETECT_SOFTLOCKUP=y
716# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
717CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
718CONFIG_SCHED_DEBUG=y
719# CONFIG_SCHEDSTATS is not set
720# CONFIG_TIMER_STATS is not set
721# CONFIG_DEBUG_OBJECTS is not set
722# CONFIG_DEBUG_SLAB is not set
723# CONFIG_DEBUG_PREEMPT is not set
724# CONFIG_DEBUG_RT_MUTEXES is not set
725# CONFIG_RT_MUTEX_TESTER is not set
726# CONFIG_DEBUG_SPINLOCK is not set
727# CONFIG_DEBUG_MUTEXES is not set
728# CONFIG_DEBUG_LOCK_ALLOC is not set
729# CONFIG_PROVE_LOCKING is not set
730# CONFIG_LOCK_STAT is not set
731# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
732# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
733# CONFIG_DEBUG_KOBJECT is not set
734CONFIG_DEBUG_BUGVERBOSE=y
735CONFIG_DEBUG_INFO=y
736# CONFIG_DEBUG_VM is not set
737# CONFIG_DEBUG_WRITECOUNT is not set
738CONFIG_DEBUG_MEMORY_INIT=y
739# CONFIG_DEBUG_LIST is not set
740# CONFIG_DEBUG_SG is not set
741# CONFIG_DEBUG_NOTIFIERS is not set
742# CONFIG_BOOT_PRINTK_DELAY is not set
743# CONFIG_RCU_TORTURE_TEST is not set
744# CONFIG_RCU_CPU_STALL_DETECTOR is not set
745# CONFIG_BACKTRACE_SELF_TEST is not set
746# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
747# CONFIG_FAULT_INJECTION is not set
748# CONFIG_LATENCYTOP is not set
749# CONFIG_SYSCTL_SYSCALL_CHECK is not set
750CONFIG_HAVE_FUNCTION_TRACER=y
751
752#
753# Tracers
754#
755# CONFIG_FUNCTION_TRACER is not set
756# CONFIG_IRQSOFF_TRACER is not set
757# CONFIG_PREEMPT_TRACER is not set
758# CONFIG_SCHED_TRACER is not set
759# CONFIG_CONTEXT_SWITCH_TRACER is not set
760# CONFIG_BOOT_TRACER is not set
761# CONFIG_TRACE_BRANCH_PROFILING is not set
762# CONFIG_STACK_TRACER is not set
763# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
764# CONFIG_SAMPLES is not set
765CONFIG_HAVE_ARCH_KGDB=y
766# CONFIG_KGDB is not set
767CONFIG_ARM_UNWIND=y
768CONFIG_DEBUG_USER=y
769CONFIG_DEBUG_ERRORS=y
770# CONFIG_DEBUG_STACK_USAGE is not set
771CONFIG_DEBUG_LL=y
772# CONFIG_DEBUG_ICEDCC is not set
773
774#
775# Security options
776#
777# CONFIG_KEYS is not set
778# CONFIG_SECURITY is not set
779# CONFIG_SECURITYFS is not set
780# CONFIG_SECURITY_FILE_CAPABILITIES is not set
781CONFIG_CRYPTO=y
782
783#
784# Crypto core or helper
785#
786# CONFIG_CRYPTO_FIPS is not set
787CONFIG_CRYPTO_ALGAPI=y
788CONFIG_CRYPTO_ALGAPI2=y
789CONFIG_CRYPTO_AEAD2=y
790CONFIG_CRYPTO_BLKCIPHER=y
791CONFIG_CRYPTO_BLKCIPHER2=y
792CONFIG_CRYPTO_HASH=y
793CONFIG_CRYPTO_HASH2=y
794CONFIG_CRYPTO_RNG2=y
795CONFIG_CRYPTO_MANAGER=y
796CONFIG_CRYPTO_MANAGER2=y
797# CONFIG_CRYPTO_GF128MUL is not set
798# CONFIG_CRYPTO_NULL is not set
799# CONFIG_CRYPTO_CRYPTD is not set
800# CONFIG_CRYPTO_AUTHENC is not set
801# CONFIG_CRYPTO_TEST is not set
802
803#
804# Authenticated Encryption with Associated Data
805#
806# CONFIG_CRYPTO_CCM is not set
807# CONFIG_CRYPTO_GCM is not set
808# CONFIG_CRYPTO_SEQIV is not set
809
810#
811# Block modes
812#
813CONFIG_CRYPTO_CBC=y
814# CONFIG_CRYPTO_CTR is not set
815# CONFIG_CRYPTO_CTS is not set
816# CONFIG_CRYPTO_ECB is not set
817# CONFIG_CRYPTO_LRW is not set
818# CONFIG_CRYPTO_PCBC is not set
819# CONFIG_CRYPTO_XTS is not set
820
821#
822# Hash modes
823#
824# CONFIG_CRYPTO_HMAC is not set
825# CONFIG_CRYPTO_XCBC is not set
826
827#
828# Digest
829#
830# CONFIG_CRYPTO_CRC32C is not set
831# CONFIG_CRYPTO_MD4 is not set
832CONFIG_CRYPTO_MD5=y
833# CONFIG_CRYPTO_MICHAEL_MIC is not set
834# CONFIG_CRYPTO_RMD128 is not set
835# CONFIG_CRYPTO_RMD160 is not set
836# CONFIG_CRYPTO_RMD256 is not set
837# CONFIG_CRYPTO_RMD320 is not set
838# CONFIG_CRYPTO_SHA1 is not set
839# CONFIG_CRYPTO_SHA256 is not set
840# CONFIG_CRYPTO_SHA512 is not set
841# CONFIG_CRYPTO_TGR192 is not set
842# CONFIG_CRYPTO_WP512 is not set
843
844#
845# Ciphers
846#
847# CONFIG_CRYPTO_AES is not set
848# CONFIG_CRYPTO_ANUBIS is not set
849# CONFIG_CRYPTO_ARC4 is not set
850# CONFIG_CRYPTO_BLOWFISH is not set
851# CONFIG_CRYPTO_CAMELLIA is not set
852# CONFIG_CRYPTO_CAST5 is not set
853# CONFIG_CRYPTO_CAST6 is not set
854CONFIG_CRYPTO_DES=y
855# CONFIG_CRYPTO_FCRYPT is not set
856# CONFIG_CRYPTO_KHAZAD is not set
857# CONFIG_CRYPTO_SALSA20 is not set
858# CONFIG_CRYPTO_SEED is not set
859# CONFIG_CRYPTO_SERPENT is not set
860# CONFIG_CRYPTO_TEA is not set
861# CONFIG_CRYPTO_TWOFISH is not set
862
863#
864# Compression
865#
866# CONFIG_CRYPTO_DEFLATE is not set
867# CONFIG_CRYPTO_LZO is not set
868
869#
870# Random Number Generation
871#
872# CONFIG_CRYPTO_ANSI_CPRNG is not set
873CONFIG_CRYPTO_HW=y
874
875#
876# Library routines
877#
878CONFIG_BITREVERSE=y
879CONFIG_GENERIC_FIND_LAST_BIT=y
880CONFIG_CRC_CCITT=y
881# CONFIG_CRC16 is not set
882# CONFIG_CRC_T10DIF is not set
883# CONFIG_CRC_ITU_T is not set
884CONFIG_CRC32=y
885# CONFIG_CRC7 is not set
886# CONFIG_LIBCRC32C is not set
887CONFIG_ZLIB_INFLATE=y
888CONFIG_PLIST=y
889CONFIG_HAS_IOMEM=y
890CONFIG_HAS_IOPORT=y
891CONFIG_HAS_DMA=y
diff --git a/arch/arm/configs/pxa910_defconfig b/arch/arm/configs/pxa910_defconfig
new file mode 100644
index 000000000000..8c7e299f1d66
--- /dev/null
+++ b/arch/arm/configs/pxa910_defconfig
@@ -0,0 +1,891 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.29-rc3
4# Fri Mar 20 13:45:12 2009
5#
6CONFIG_ARM=y
7CONFIG_SYS_SUPPORTS_APM_EMULATION=y
8CONFIG_GENERIC_GPIO=y
9CONFIG_GENERIC_TIME=y
10CONFIG_GENERIC_CLOCKEVENTS=y
11CONFIG_MMU=y
12# CONFIG_NO_IOPORT is not set
13CONFIG_GENERIC_HARDIRQS=y
14CONFIG_STACKTRACE_SUPPORT=y
15CONFIG_HAVE_LATENCYTOP_SUPPORT=y
16CONFIG_LOCKDEP_SUPPORT=y
17CONFIG_TRACE_IRQFLAGS_SUPPORT=y
18CONFIG_HARDIRQS_SW_RESEND=y
19CONFIG_GENERIC_IRQ_PROBE=y
20CONFIG_RWSEM_GENERIC_SPINLOCK=y
21# CONFIG_ARCH_HAS_ILOG2_U32 is not set
22# CONFIG_ARCH_HAS_ILOG2_U64 is not set
23CONFIG_GENERIC_HWEIGHT=y
24CONFIG_GENERIC_CALIBRATE_DELAY=y
25CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
26CONFIG_VECTORS_BASE=0xffff0000
27CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
28
29#
30# General setup
31#
32CONFIG_EXPERIMENTAL=y
33CONFIG_BROKEN_ON_SMP=y
34CONFIG_LOCK_KERNEL=y
35CONFIG_INIT_ENV_ARG_LIMIT=32
36CONFIG_LOCALVERSION=""
37CONFIG_LOCALVERSION_AUTO=y
38CONFIG_SWAP=y
39CONFIG_SYSVIPC=y
40CONFIG_SYSVIPC_SYSCTL=y
41# CONFIG_POSIX_MQUEUE is not set
42# CONFIG_BSD_PROCESS_ACCT is not set
43# CONFIG_TASKSTATS is not set
44# CONFIG_AUDIT is not set
45
46#
47# RCU Subsystem
48#
49CONFIG_CLASSIC_RCU=y
50# CONFIG_TREE_RCU is not set
51# CONFIG_PREEMPT_RCU is not set
52# CONFIG_TREE_RCU_TRACE is not set
53# CONFIG_PREEMPT_RCU_TRACE is not set
54# CONFIG_IKCONFIG is not set
55CONFIG_LOG_BUF_SHIFT=14
56# CONFIG_GROUP_SCHED is not set
57# CONFIG_CGROUPS is not set
58CONFIG_SYSFS_DEPRECATED=y
59CONFIG_SYSFS_DEPRECATED_V2=y
60# CONFIG_RELAY is not set
61CONFIG_NAMESPACES=y
62# CONFIG_UTS_NS is not set
63# CONFIG_IPC_NS is not set
64# CONFIG_USER_NS is not set
65# CONFIG_PID_NS is not set
66# CONFIG_NET_NS is not set
67CONFIG_BLK_DEV_INITRD=y
68CONFIG_INITRAMFS_SOURCE=""
69CONFIG_CC_OPTIMIZE_FOR_SIZE=y
70CONFIG_SYSCTL=y
71# CONFIG_EMBEDDED is not set
72CONFIG_UID16=y
73CONFIG_SYSCTL_SYSCALL=y
74CONFIG_KALLSYMS=y
75# CONFIG_KALLSYMS_ALL is not set
76# CONFIG_KALLSYMS_EXTRA_PASS is not set
77CONFIG_HOTPLUG=y
78CONFIG_PRINTK=y
79CONFIG_BUG=y
80CONFIG_ELF_CORE=y
81CONFIG_COMPAT_BRK=y
82CONFIG_BASE_FULL=y
83CONFIG_FUTEX=y
84CONFIG_ANON_INODES=y
85CONFIG_EPOLL=y
86CONFIG_SIGNALFD=y
87CONFIG_TIMERFD=y
88CONFIG_EVENTFD=y
89CONFIG_SHMEM=y
90CONFIG_AIO=y
91CONFIG_VM_EVENT_COUNTERS=y
92CONFIG_SLAB=y
93# CONFIG_SLUB is not set
94# CONFIG_SLOB is not set
95# CONFIG_PROFILING is not set
96CONFIG_HAVE_OPROFILE=y
97# CONFIG_KPROBES is not set
98CONFIG_HAVE_KPROBES=y
99CONFIG_HAVE_KRETPROBES=y
100CONFIG_HAVE_CLK=y
101CONFIG_HAVE_GENERIC_DMA_COHERENT=y
102CONFIG_SLABINFO=y
103CONFIG_RT_MUTEXES=y
104CONFIG_BASE_SMALL=0
105CONFIG_MODULES=y
106# CONFIG_MODULE_FORCE_LOAD is not set
107CONFIG_MODULE_UNLOAD=y
108CONFIG_MODULE_FORCE_UNLOAD=y
109# CONFIG_MODVERSIONS is not set
110# CONFIG_MODULE_SRCVERSION_ALL is not set
111CONFIG_BLOCK=y
112# CONFIG_LBD is not set
113# CONFIG_BLK_DEV_IO_TRACE is not set
114# CONFIG_BLK_DEV_BSG is not set
115# CONFIG_BLK_DEV_INTEGRITY is not set
116
117#
118# IO Schedulers
119#
120CONFIG_IOSCHED_NOOP=y
121CONFIG_IOSCHED_AS=y
122CONFIG_IOSCHED_DEADLINE=y
123CONFIG_IOSCHED_CFQ=y
124# CONFIG_DEFAULT_AS is not set
125# CONFIG_DEFAULT_DEADLINE is not set
126CONFIG_DEFAULT_CFQ=y
127# CONFIG_DEFAULT_NOOP is not set
128CONFIG_DEFAULT_IOSCHED="cfq"
129# CONFIG_FREEZER is not set
130
131#
132# System Type
133#
134# CONFIG_ARCH_AAEC2000 is not set
135# CONFIG_ARCH_INTEGRATOR is not set
136# CONFIG_ARCH_REALVIEW is not set
137# CONFIG_ARCH_VERSATILE is not set
138# CONFIG_ARCH_AT91 is not set
139# CONFIG_ARCH_CLPS711X is not set
140# CONFIG_ARCH_EBSA110 is not set
141# CONFIG_ARCH_EP93XX is not set
142# CONFIG_ARCH_FOOTBRIDGE is not set
143# CONFIG_ARCH_NETX is not set
144# CONFIG_ARCH_H720X is not set
145# CONFIG_ARCH_IMX is not set
146# CONFIG_ARCH_IOP13XX is not set
147# CONFIG_ARCH_IOP32X is not set
148# CONFIG_ARCH_IOP33X is not set
149# CONFIG_ARCH_IXP23XX is not set
150# CONFIG_ARCH_IXP2000 is not set
151# CONFIG_ARCH_IXP4XX is not set
152# CONFIG_ARCH_L7200 is not set
153# CONFIG_ARCH_KIRKWOOD is not set
154# CONFIG_ARCH_KS8695 is not set
155# CONFIG_ARCH_NS9XXX is not set
156# CONFIG_ARCH_LOKI is not set
157# CONFIG_ARCH_MV78XX0 is not set
158# CONFIG_ARCH_MXC is not set
159# CONFIG_ARCH_ORION5X is not set
160# CONFIG_ARCH_PNX4008 is not set
161# CONFIG_ARCH_PXA is not set
162CONFIG_ARCH_MMP=y
163# CONFIG_ARCH_RPC is not set
164# CONFIG_ARCH_SA1100 is not set
165# CONFIG_ARCH_S3C2410 is not set
166# CONFIG_ARCH_S3C64XX is not set
167# CONFIG_ARCH_SHARK is not set
168# CONFIG_ARCH_LH7A40X is not set
169# CONFIG_ARCH_DAVINCI is not set
170# CONFIG_ARCH_OMAP is not set
171# CONFIG_ARCH_MSM is not set
172# CONFIG_ARCH_W90X900 is not set
173CONFIG_MACH_TAVOREVB=y
174
175#
176# Marvell PXA168/910 Implmentations
177#
178# CONFIG_MACH_ASPENITE is not set
179# CONFIG_MACH_ZYLONITE2 is not set
180CONFIG_MACH_TTC_DKB=y
181CONFIG_CPU_PXA910=y
182CONFIG_PLAT_PXA=y
183
184#
185# Processor Type
186#
187CONFIG_CPU_32=y
188CONFIG_CPU_MOHAWK=y
189CONFIG_CPU_32v5=y
190CONFIG_CPU_ABRT_EV5T=y
191CONFIG_CPU_PABRT_NOIFAR=y
192CONFIG_CPU_CACHE_VIVT=y
193CONFIG_CPU_COPY_V4WB=y
194CONFIG_CPU_TLB_V4WBI=y
195CONFIG_CPU_CP15=y
196CONFIG_CPU_CP15_MMU=y
197
198#
199# Processor Features
200#
201CONFIG_ARM_THUMB=y
202# CONFIG_CPU_ICACHE_DISABLE is not set
203# CONFIG_CPU_DCACHE_DISABLE is not set
204# CONFIG_CPU_BPREDICT_DISABLE is not set
205# CONFIG_OUTER_CACHE is not set
206CONFIG_IWMMXT=y
207CONFIG_COMMON_CLKDEV=y
208
209#
210# Bus support
211#
212# CONFIG_PCI_SYSCALL is not set
213# CONFIG_ARCH_SUPPORTS_MSI is not set
214# CONFIG_PCCARD is not set
215
216#
217# Kernel Features
218#
219CONFIG_TICK_ONESHOT=y
220CONFIG_NO_HZ=y
221CONFIG_HIGH_RES_TIMERS=y
222CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
223CONFIG_VMSPLIT_3G=y
224# CONFIG_VMSPLIT_2G is not set
225# CONFIG_VMSPLIT_1G is not set
226CONFIG_PAGE_OFFSET=0xC0000000
227CONFIG_PREEMPT=y
228CONFIG_HZ=100
229CONFIG_AEABI=y
230CONFIG_OABI_COMPAT=y
231CONFIG_ARCH_FLATMEM_HAS_HOLES=y
232# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
233# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
234CONFIG_SELECT_MEMORY_MODEL=y
235CONFIG_FLATMEM_MANUAL=y
236# CONFIG_DISCONTIGMEM_MANUAL is not set
237# CONFIG_SPARSEMEM_MANUAL is not set
238CONFIG_FLATMEM=y
239CONFIG_FLAT_NODE_MEM_MAP=y
240CONFIG_PAGEFLAGS_EXTENDED=y
241CONFIG_SPLIT_PTLOCK_CPUS=4096
242# CONFIG_PHYS_ADDR_T_64BIT is not set
243CONFIG_ZONE_DMA_FLAG=0
244CONFIG_VIRT_TO_BUS=y
245CONFIG_UNEVICTABLE_LRU=y
246CONFIG_ALIGNMENT_TRAP=y
247
248#
249# Boot options
250#
251CONFIG_ZBOOT_ROM_TEXT=0x0
252CONFIG_ZBOOT_ROM_BSS=0x0
253CONFIG_CMDLINE="root=/dev/nfs rootfstype=nfs nfsroot=192.168.2.100:/nfsroot/ ip=192.168.2.101:192.168.2.100::255.255.255.0::eth0:on console=ttyS0,115200 mem=128M"
254# CONFIG_XIP_KERNEL is not set
255# CONFIG_KEXEC is not set
256
257#
258# CPU Power Management
259#
260# CONFIG_CPU_IDLE is not set
261
262#
263# Floating point emulation
264#
265
266#
267# At least one emulation must be selected
268#
269CONFIG_FPE_NWFPE=y
270# CONFIG_FPE_NWFPE_XP is not set
271# CONFIG_FPE_FASTFPE is not set
272
273#
274# Userspace binary formats
275#
276CONFIG_BINFMT_ELF=y
277# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
278CONFIG_HAVE_AOUT=y
279# CONFIG_BINFMT_AOUT is not set
280# CONFIG_BINFMT_MISC is not set
281
282#
283# Power management options
284#
285# CONFIG_PM is not set
286CONFIG_ARCH_SUSPEND_POSSIBLE=y
287CONFIG_NET=y
288
289#
290# Networking options
291#
292CONFIG_COMPAT_NET_DEV_OPS=y
293CONFIG_PACKET=y
294# CONFIG_PACKET_MMAP is not set
295CONFIG_UNIX=y
296CONFIG_XFRM=y
297# CONFIG_XFRM_USER is not set
298# CONFIG_XFRM_SUB_POLICY is not set
299# CONFIG_XFRM_MIGRATE is not set
300# CONFIG_XFRM_STATISTICS is not set
301# CONFIG_NET_KEY is not set
302CONFIG_INET=y
303# CONFIG_IP_MULTICAST is not set
304# CONFIG_IP_ADVANCED_ROUTER is not set
305CONFIG_IP_FIB_HASH=y
306CONFIG_IP_PNP=y
307# CONFIG_IP_PNP_DHCP is not set
308# CONFIG_IP_PNP_BOOTP is not set
309# CONFIG_IP_PNP_RARP is not set
310# CONFIG_NET_IPIP is not set
311# CONFIG_NET_IPGRE is not set
312# CONFIG_ARPD is not set
313# CONFIG_SYN_COOKIES is not set
314# CONFIG_INET_AH is not set
315# CONFIG_INET_ESP is not set
316# CONFIG_INET_IPCOMP is not set
317# CONFIG_INET_XFRM_TUNNEL is not set
318# CONFIG_INET_TUNNEL is not set
319CONFIG_INET_XFRM_MODE_TRANSPORT=y
320CONFIG_INET_XFRM_MODE_TUNNEL=y
321CONFIG_INET_XFRM_MODE_BEET=y
322# CONFIG_INET_LRO is not set
323CONFIG_INET_DIAG=y
324CONFIG_INET_TCP_DIAG=y
325# CONFIG_TCP_CONG_ADVANCED is not set
326CONFIG_TCP_CONG_CUBIC=y
327CONFIG_DEFAULT_TCP_CONG="cubic"
328# CONFIG_TCP_MD5SIG is not set
329# CONFIG_IPV6 is not set
330# CONFIG_NETWORK_SECMARK is not set
331# CONFIG_NETFILTER is not set
332# CONFIG_IP_DCCP is not set
333# CONFIG_IP_SCTP is not set
334# CONFIG_TIPC is not set
335# CONFIG_ATM is not set
336# CONFIG_BRIDGE is not set
337# CONFIG_NET_DSA is not set
338# CONFIG_VLAN_8021Q is not set
339# CONFIG_DECNET is not set
340# CONFIG_LLC2 is not set
341# CONFIG_IPX is not set
342# CONFIG_ATALK is not set
343# CONFIG_X25 is not set
344# CONFIG_LAPB is not set
345# CONFIG_ECONET is not set
346# CONFIG_WAN_ROUTER is not set
347# CONFIG_NET_SCHED is not set
348# CONFIG_DCB is not set
349
350#
351# Network testing
352#
353# CONFIG_NET_PKTGEN is not set
354# CONFIG_HAMRADIO is not set
355# CONFIG_CAN is not set
356# CONFIG_IRDA is not set
357# CONFIG_BT is not set
358# CONFIG_AF_RXRPC is not set
359# CONFIG_PHONET is not set
360CONFIG_WIRELESS=y
361# CONFIG_CFG80211 is not set
362CONFIG_WIRELESS_OLD_REGULATORY=y
363# CONFIG_WIRELESS_EXT is not set
364# CONFIG_LIB80211 is not set
365# CONFIG_MAC80211 is not set
366# CONFIG_WIMAX is not set
367# CONFIG_RFKILL is not set
368# CONFIG_NET_9P is not set
369
370#
371# Device Drivers
372#
373
374#
375# Generic Driver Options
376#
377CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
378# CONFIG_STANDALONE is not set
379# CONFIG_PREVENT_FIRMWARE_BUILD is not set
380CONFIG_FW_LOADER=y
381CONFIG_FIRMWARE_IN_KERNEL=y
382CONFIG_EXTRA_FIRMWARE=""
383# CONFIG_DEBUG_DRIVER is not set
384# CONFIG_DEBUG_DEVRES is not set
385# CONFIG_SYS_HYPERVISOR is not set
386# CONFIG_CONNECTOR is not set
387# CONFIG_MTD is not set
388# CONFIG_PARPORT is not set
389# CONFIG_BLK_DEV is not set
390# CONFIG_MISC_DEVICES is not set
391CONFIG_HAVE_IDE=y
392# CONFIG_IDE is not set
393
394#
395# SCSI device support
396#
397# CONFIG_RAID_ATTRS is not set
398# CONFIG_SCSI is not set
399# CONFIG_SCSI_DMA is not set
400# CONFIG_SCSI_NETLINK is not set
401# CONFIG_ATA is not set
402# CONFIG_MD is not set
403CONFIG_NETDEVICES=y
404# CONFIG_DUMMY is not set
405# CONFIG_BONDING is not set
406# CONFIG_MACVLAN is not set
407# CONFIG_EQUALIZER is not set
408# CONFIG_TUN is not set
409# CONFIG_VETH is not set
410# CONFIG_PHYLIB is not set
411CONFIG_NET_ETHERNET=y
412CONFIG_MII=y
413# CONFIG_AX88796 is not set
414CONFIG_SMC91X=y
415# CONFIG_DM9000 is not set
416# CONFIG_SMC911X is not set
417# CONFIG_SMSC911X is not set
418# CONFIG_IBM_NEW_EMAC_ZMII is not set
419# CONFIG_IBM_NEW_EMAC_RGMII is not set
420# CONFIG_IBM_NEW_EMAC_TAH is not set
421# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
422# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
423# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
424# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
425# CONFIG_B44 is not set
426# CONFIG_NETDEV_1000 is not set
427# CONFIG_NETDEV_10000 is not set
428
429#
430# Wireless LAN
431#
432# CONFIG_WLAN_PRE80211 is not set
433# CONFIG_WLAN_80211 is not set
434# CONFIG_IWLWIFI_LEDS is not set
435
436#
437# Enable WiMAX (Networking options) to see the WiMAX drivers
438#
439# CONFIG_WAN is not set
440# CONFIG_PPP is not set
441# CONFIG_SLIP is not set
442# CONFIG_NETCONSOLE is not set
443# CONFIG_NETPOLL is not set
444# CONFIG_NET_POLL_CONTROLLER is not set
445# CONFIG_ISDN is not set
446
447#
448# Input device support
449#
450CONFIG_INPUT=y
451# CONFIG_INPUT_FF_MEMLESS is not set
452# CONFIG_INPUT_POLLDEV is not set
453
454#
455# Userland interfaces
456#
457CONFIG_INPUT_MOUSEDEV=y
458# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
459CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
460CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
461# CONFIG_INPUT_JOYDEV is not set
462# CONFIG_INPUT_EVDEV is not set
463# CONFIG_INPUT_EVBUG is not set
464
465#
466# Input Device Drivers
467#
468# CONFIG_INPUT_KEYBOARD is not set
469# CONFIG_INPUT_MOUSE is not set
470# CONFIG_INPUT_JOYSTICK is not set
471# CONFIG_INPUT_TABLET is not set
472# CONFIG_INPUT_TOUCHSCREEN is not set
473# CONFIG_INPUT_MISC is not set
474
475#
476# Hardware I/O ports
477#
478# CONFIG_SERIO is not set
479# CONFIG_GAMEPORT is not set
480
481#
482# Character devices
483#
484CONFIG_VT=y
485CONFIG_CONSOLE_TRANSLATIONS=y
486CONFIG_VT_CONSOLE=y
487CONFIG_HW_CONSOLE=y
488# CONFIG_VT_HW_CONSOLE_BINDING is not set
489CONFIG_DEVKMEM=y
490# CONFIG_SERIAL_NONSTANDARD is not set
491
492#
493# Serial drivers
494#
495# CONFIG_SERIAL_8250 is not set
496
497#
498# Non-8250 serial port support
499#
500CONFIG_SERIAL_PXA=y
501CONFIG_SERIAL_PXA_CONSOLE=y
502CONFIG_SERIAL_CORE=y
503CONFIG_SERIAL_CORE_CONSOLE=y
504CONFIG_UNIX98_PTYS=y
505# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
506# CONFIG_LEGACY_PTYS is not set
507# CONFIG_IPMI_HANDLER is not set
508# CONFIG_HW_RANDOM is not set
509# CONFIG_R3964 is not set
510# CONFIG_RAW_DRIVER is not set
511# CONFIG_TCG_TPM is not set
512# CONFIG_I2C is not set
513# CONFIG_SPI is not set
514CONFIG_ARCH_REQUIRE_GPIOLIB=y
515CONFIG_GPIOLIB=y
516# CONFIG_DEBUG_GPIO is not set
517# CONFIG_GPIO_SYSFS is not set
518
519#
520# Memory mapped GPIO expanders:
521#
522
523#
524# I2C GPIO expanders:
525#
526
527#
528# PCI GPIO expanders:
529#
530
531#
532# SPI GPIO expanders:
533#
534# CONFIG_W1 is not set
535# CONFIG_POWER_SUPPLY is not set
536# CONFIG_HWMON is not set
537# CONFIG_THERMAL is not set
538# CONFIG_THERMAL_HWMON is not set
539# CONFIG_WATCHDOG is not set
540CONFIG_SSB_POSSIBLE=y
541
542#
543# Sonics Silicon Backplane
544#
545# CONFIG_SSB is not set
546
547#
548# Multifunction device drivers
549#
550# CONFIG_MFD_CORE is not set
551# CONFIG_MFD_SM501 is not set
552# CONFIG_MFD_ASIC3 is not set
553# CONFIG_HTC_EGPIO is not set
554# CONFIG_HTC_PASIC3 is not set
555# CONFIG_MFD_TMIO is not set
556# CONFIG_MFD_T7L66XB is not set
557# CONFIG_MFD_TC6387XB is not set
558# CONFIG_MFD_TC6393XB is not set
559
560#
561# Multimedia devices
562#
563
564#
565# Multimedia core support
566#
567# CONFIG_VIDEO_DEV is not set
568# CONFIG_DVB_CORE is not set
569# CONFIG_VIDEO_MEDIA is not set
570
571#
572# Multimedia drivers
573#
574# CONFIG_DAB is not set
575
576#
577# Graphics support
578#
579# CONFIG_VGASTATE is not set
580# CONFIG_VIDEO_OUTPUT_CONTROL is not set
581# CONFIG_FB is not set
582# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
583
584#
585# Display device support
586#
587# CONFIG_DISPLAY_SUPPORT is not set
588
589#
590# Console display driver support
591#
592# CONFIG_VGA_CONSOLE is not set
593CONFIG_DUMMY_CONSOLE=y
594# CONFIG_SOUND is not set
595# CONFIG_HID_SUPPORT is not set
596# CONFIG_USB_SUPPORT is not set
597# CONFIG_MMC is not set
598# CONFIG_MEMSTICK is not set
599# CONFIG_ACCESSIBILITY is not set
600# CONFIG_NEW_LEDS is not set
601CONFIG_RTC_LIB=y
602# CONFIG_RTC_CLASS is not set
603# CONFIG_DMADEVICES is not set
604# CONFIG_REGULATOR is not set
605# CONFIG_UIO is not set
606# CONFIG_STAGING is not set
607
608#
609# File systems
610#
611# CONFIG_EXT2_FS is not set
612# CONFIG_EXT3_FS is not set
613# CONFIG_EXT4_FS is not set
614# CONFIG_REISERFS_FS is not set
615# CONFIG_JFS_FS is not set
616CONFIG_FS_POSIX_ACL=y
617CONFIG_FILE_LOCKING=y
618# CONFIG_XFS_FS is not set
619# CONFIG_OCFS2_FS is not set
620# CONFIG_BTRFS_FS is not set
621CONFIG_DNOTIFY=y
622CONFIG_INOTIFY=y
623CONFIG_INOTIFY_USER=y
624# CONFIG_QUOTA is not set
625# CONFIG_AUTOFS_FS is not set
626# CONFIG_AUTOFS4_FS is not set
627# CONFIG_FUSE_FS is not set
628CONFIG_GENERIC_ACL=y
629
630#
631# CD-ROM/DVD Filesystems
632#
633# CONFIG_ISO9660_FS is not set
634# CONFIG_UDF_FS is not set
635
636#
637# DOS/FAT/NT Filesystems
638#
639# CONFIG_MSDOS_FS is not set
640# CONFIG_VFAT_FS is not set
641# CONFIG_NTFS_FS is not set
642
643#
644# Pseudo filesystems
645#
646CONFIG_PROC_FS=y
647CONFIG_PROC_SYSCTL=y
648CONFIG_PROC_PAGE_MONITOR=y
649CONFIG_SYSFS=y
650CONFIG_TMPFS=y
651CONFIG_TMPFS_POSIX_ACL=y
652# CONFIG_HUGETLB_PAGE is not set
653# CONFIG_CONFIGFS_FS is not set
654CONFIG_MISC_FILESYSTEMS=y
655# CONFIG_ADFS_FS is not set
656# CONFIG_AFFS_FS is not set
657# CONFIG_HFS_FS is not set
658# CONFIG_HFSPLUS_FS is not set
659# CONFIG_BEFS_FS is not set
660# CONFIG_BFS_FS is not set
661# CONFIG_EFS_FS is not set
662CONFIG_CRAMFS=y
663# CONFIG_SQUASHFS is not set
664# CONFIG_VXFS_FS is not set
665# CONFIG_MINIX_FS is not set
666# CONFIG_OMFS_FS is not set
667# CONFIG_HPFS_FS is not set
668# CONFIG_QNX4FS_FS is not set
669# CONFIG_ROMFS_FS is not set
670# CONFIG_SYSV_FS is not set
671# CONFIG_UFS_FS is not set
672CONFIG_NETWORK_FILESYSTEMS=y
673CONFIG_NFS_FS=y
674CONFIG_NFS_V3=y
675CONFIG_NFS_V3_ACL=y
676CONFIG_NFS_V4=y
677CONFIG_ROOT_NFS=y
678# CONFIG_NFSD is not set
679CONFIG_LOCKD=y
680CONFIG_LOCKD_V4=y
681CONFIG_NFS_ACL_SUPPORT=y
682CONFIG_NFS_COMMON=y
683CONFIG_SUNRPC=y
684CONFIG_SUNRPC_GSS=y
685# CONFIG_SUNRPC_REGISTER_V4 is not set
686CONFIG_RPCSEC_GSS_KRB5=y
687# CONFIG_RPCSEC_GSS_SPKM3 is not set
688# CONFIG_SMB_FS is not set
689# CONFIG_CIFS is not set
690# CONFIG_NCP_FS is not set
691# CONFIG_CODA_FS is not set
692# CONFIG_AFS_FS is not set
693
694#
695# Partition Types
696#
697# CONFIG_PARTITION_ADVANCED is not set
698CONFIG_MSDOS_PARTITION=y
699# CONFIG_NLS is not set
700# CONFIG_DLM is not set
701
702#
703# Kernel hacking
704#
705CONFIG_PRINTK_TIME=y
706CONFIG_ENABLE_WARN_DEPRECATED=y
707CONFIG_ENABLE_MUST_CHECK=y
708CONFIG_FRAME_WARN=1024
709CONFIG_MAGIC_SYSRQ=y
710# CONFIG_UNUSED_SYMBOLS is not set
711# CONFIG_DEBUG_FS is not set
712# CONFIG_HEADERS_CHECK is not set
713CONFIG_DEBUG_KERNEL=y
714# CONFIG_DEBUG_SHIRQ is not set
715CONFIG_DETECT_SOFTLOCKUP=y
716# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
717CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
718CONFIG_SCHED_DEBUG=y
719# CONFIG_SCHEDSTATS is not set
720# CONFIG_TIMER_STATS is not set
721# CONFIG_DEBUG_OBJECTS is not set
722# CONFIG_DEBUG_SLAB is not set
723# CONFIG_DEBUG_PREEMPT is not set
724# CONFIG_DEBUG_RT_MUTEXES is not set
725# CONFIG_RT_MUTEX_TESTER is not set
726# CONFIG_DEBUG_SPINLOCK is not set
727# CONFIG_DEBUG_MUTEXES is not set
728# CONFIG_DEBUG_LOCK_ALLOC is not set
729# CONFIG_PROVE_LOCKING is not set
730# CONFIG_LOCK_STAT is not set
731# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
732# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
733# CONFIG_DEBUG_KOBJECT is not set
734CONFIG_DEBUG_BUGVERBOSE=y
735CONFIG_DEBUG_INFO=y
736# CONFIG_DEBUG_VM is not set
737# CONFIG_DEBUG_WRITECOUNT is not set
738CONFIG_DEBUG_MEMORY_INIT=y
739# CONFIG_DEBUG_LIST is not set
740# CONFIG_DEBUG_SG is not set
741# CONFIG_DEBUG_NOTIFIERS is not set
742# CONFIG_BOOT_PRINTK_DELAY is not set
743# CONFIG_RCU_TORTURE_TEST is not set
744# CONFIG_RCU_CPU_STALL_DETECTOR is not set
745# CONFIG_BACKTRACE_SELF_TEST is not set
746# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
747# CONFIG_FAULT_INJECTION is not set
748# CONFIG_LATENCYTOP is not set
749# CONFIG_SYSCTL_SYSCALL_CHECK is not set
750CONFIG_HAVE_FUNCTION_TRACER=y
751
752#
753# Tracers
754#
755# CONFIG_FUNCTION_TRACER is not set
756# CONFIG_IRQSOFF_TRACER is not set
757# CONFIG_PREEMPT_TRACER is not set
758# CONFIG_SCHED_TRACER is not set
759# CONFIG_CONTEXT_SWITCH_TRACER is not set
760# CONFIG_BOOT_TRACER is not set
761# CONFIG_TRACE_BRANCH_PROFILING is not set
762# CONFIG_STACK_TRACER is not set
763# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
764# CONFIG_SAMPLES is not set
765CONFIG_HAVE_ARCH_KGDB=y
766# CONFIG_KGDB is not set
767CONFIG_ARM_UNWIND=y
768CONFIG_DEBUG_USER=y
769CONFIG_DEBUG_ERRORS=y
770# CONFIG_DEBUG_STACK_USAGE is not set
771CONFIG_DEBUG_LL=y
772# CONFIG_DEBUG_ICEDCC is not set
773
774#
775# Security options
776#
777# CONFIG_KEYS is not set
778# CONFIG_SECURITY is not set
779# CONFIG_SECURITYFS is not set
780# CONFIG_SECURITY_FILE_CAPABILITIES is not set
781CONFIG_CRYPTO=y
782
783#
784# Crypto core or helper
785#
786# CONFIG_CRYPTO_FIPS is not set
787CONFIG_CRYPTO_ALGAPI=y
788CONFIG_CRYPTO_ALGAPI2=y
789CONFIG_CRYPTO_AEAD2=y
790CONFIG_CRYPTO_BLKCIPHER=y
791CONFIG_CRYPTO_BLKCIPHER2=y
792CONFIG_CRYPTO_HASH=y
793CONFIG_CRYPTO_HASH2=y
794CONFIG_CRYPTO_RNG2=y
795CONFIG_CRYPTO_MANAGER=y
796CONFIG_CRYPTO_MANAGER2=y
797# CONFIG_CRYPTO_GF128MUL is not set
798# CONFIG_CRYPTO_NULL is not set
799# CONFIG_CRYPTO_CRYPTD is not set
800# CONFIG_CRYPTO_AUTHENC is not set
801# CONFIG_CRYPTO_TEST is not set
802
803#
804# Authenticated Encryption with Associated Data
805#
806# CONFIG_CRYPTO_CCM is not set
807# CONFIG_CRYPTO_GCM is not set
808# CONFIG_CRYPTO_SEQIV is not set
809
810#
811# Block modes
812#
813CONFIG_CRYPTO_CBC=y
814# CONFIG_CRYPTO_CTR is not set
815# CONFIG_CRYPTO_CTS is not set
816# CONFIG_CRYPTO_ECB is not set
817# CONFIG_CRYPTO_LRW is not set
818# CONFIG_CRYPTO_PCBC is not set
819# CONFIG_CRYPTO_XTS is not set
820
821#
822# Hash modes
823#
824# CONFIG_CRYPTO_HMAC is not set
825# CONFIG_CRYPTO_XCBC is not set
826
827#
828# Digest
829#
830# CONFIG_CRYPTO_CRC32C is not set
831# CONFIG_CRYPTO_MD4 is not set
832CONFIG_CRYPTO_MD5=y
833# CONFIG_CRYPTO_MICHAEL_MIC is not set
834# CONFIG_CRYPTO_RMD128 is not set
835# CONFIG_CRYPTO_RMD160 is not set
836# CONFIG_CRYPTO_RMD256 is not set
837# CONFIG_CRYPTO_RMD320 is not set
838# CONFIG_CRYPTO_SHA1 is not set
839# CONFIG_CRYPTO_SHA256 is not set
840# CONFIG_CRYPTO_SHA512 is not set
841# CONFIG_CRYPTO_TGR192 is not set
842# CONFIG_CRYPTO_WP512 is not set
843
844#
845# Ciphers
846#
847# CONFIG_CRYPTO_AES is not set
848# CONFIG_CRYPTO_ANUBIS is not set
849# CONFIG_CRYPTO_ARC4 is not set
850# CONFIG_CRYPTO_BLOWFISH is not set
851# CONFIG_CRYPTO_CAMELLIA is not set
852# CONFIG_CRYPTO_CAST5 is not set
853# CONFIG_CRYPTO_CAST6 is not set
854CONFIG_CRYPTO_DES=y
855# CONFIG_CRYPTO_FCRYPT is not set
856# CONFIG_CRYPTO_KHAZAD is not set
857# CONFIG_CRYPTO_SALSA20 is not set
858# CONFIG_CRYPTO_SEED is not set
859# CONFIG_CRYPTO_SERPENT is not set
860# CONFIG_CRYPTO_TEA is not set
861# CONFIG_CRYPTO_TWOFISH is not set
862
863#
864# Compression
865#
866# CONFIG_CRYPTO_DEFLATE is not set
867# CONFIG_CRYPTO_LZO is not set
868
869#
870# Random Number Generation
871#
872# CONFIG_CRYPTO_ANSI_CPRNG is not set
873CONFIG_CRYPTO_HW=y
874
875#
876# Library routines
877#
878CONFIG_BITREVERSE=y
879CONFIG_GENERIC_FIND_LAST_BIT=y
880CONFIG_CRC_CCITT=y
881# CONFIG_CRC16 is not set
882# CONFIG_CRC_T10DIF is not set
883# CONFIG_CRC_ITU_T is not set
884CONFIG_CRC32=y
885# CONFIG_CRC7 is not set
886# CONFIG_LIBCRC32C is not set
887CONFIG_ZLIB_INFLATE=y
888CONFIG_PLIST=y
889CONFIG_HAS_IOMEM=y
890CONFIG_HAS_IOPORT=y
891CONFIG_HAS_DMA=y
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h
index 6cbd8fdc9f1f..bfb0cb9aaa97 100644
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -94,6 +94,14 @@
94# endif 94# endif
95#endif 95#endif
96 96
97#if defined(CONFIG_CPU_MOHAWK)
98# ifdef _CACHE
99# define MULTI_CACHE 1
100# else
101# define _CACHE mohawk
102# endif
103#endif
104
97#if defined(CONFIG_CPU_FEROCEON) 105#if defined(CONFIG_CPU_FEROCEON)
98# define MULTI_CACHE 1 106# define MULTI_CACHE 1
99#endif 107#endif
diff --git a/arch/arm/include/asm/proc-fns.h b/arch/arm/include/asm/proc-fns.h
index db80203b68e0..c6250311550b 100644
--- a/arch/arm/include/asm/proc-fns.h
+++ b/arch/arm/include/asm/proc-fns.h
@@ -185,6 +185,14 @@
185# define CPU_NAME cpu_xsc3 185# define CPU_NAME cpu_xsc3
186# endif 186# endif
187# endif 187# endif
188# ifdef CONFIG_CPU_MOHAWK
189# ifdef CPU_NAME
190# undef MULTI_CPU
191# define MULTI_CPU
192# else
193# define CPU_NAME cpu_mohawk
194# endif
195# endif
188# ifdef CONFIG_CPU_FEROCEON 196# ifdef CONFIG_CPU_FEROCEON
189# ifdef CPU_NAME 197# ifdef CPU_NAME
190# undef MULTI_CPU 198# undef MULTI_CPU
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile
index ca60d335e8fa..11a5197a221f 100644
--- a/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@ -36,6 +36,7 @@ AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312
36 36
37obj-$(CONFIG_CPU_XSCALE) += xscale-cp0.o 37obj-$(CONFIG_CPU_XSCALE) += xscale-cp0.o
38obj-$(CONFIG_CPU_XSC3) += xscale-cp0.o 38obj-$(CONFIG_CPU_XSC3) += xscale-cp0.o
39obj-$(CONFIG_CPU_MOHAWK) += xscale-cp0.o
39obj-$(CONFIG_IWMMXT) += iwmmxt.o 40obj-$(CONFIG_IWMMXT) += iwmmxt.o
40AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt 41AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt
41 42
diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig
new file mode 100644
index 000000000000..c6a564fc4a7c
--- /dev/null
+++ b/arch/arm/mach-mmp/Kconfig
@@ -0,0 +1,47 @@
1if ARCH_MMP
2
3menu "Marvell PXA168/910 Implmentations"
4
5config MACH_ASPENITE
6 bool "Marvell's PXA168 Aspenite Development Board"
7 select CPU_PXA168
8 help
9 Say 'Y' here if you want to support the Marvell PXA168-based
10 Aspenite Development Board.
11
12config MACH_ZYLONITE2
13 bool "Marvell's PXA168 Zylonite2 Development Board"
14 select CPU_PXA168
15 help
16 Say 'Y' here if you want to support the Marvell PXA168-based
17 Zylonite2 Development Board.
18
19config MACH_TAVOREVB
20 bool "Marvell's PXA910 TavorEVB Development Board"
21 select CPU_PXA910
22 help
23 Say 'Y' here if you want to support the Marvell PXA910-based
24 TavorEVB Development Board.
25
26config MACH_TTC_DKB
27 bool "Marvell's PXA910 TavorEVB Development Board"
28 select CPU_PXA910
29 help
30 Say 'Y' here if you want to support the Marvell PXA910-based
31 TTC_DKB Development Board.
32
33endmenu
34
35config CPU_PXA168
36 bool
37 select CPU_MOHAWK
38 help
39 Select code specific to PXA168
40
41config CPU_PXA910
42 bool
43 select CPU_MOHAWK
44 help
45 Select code specific to PXA910
46
47endif
diff --git a/arch/arm/mach-mmp/Makefile b/arch/arm/mach-mmp/Makefile
new file mode 100644
index 000000000000..6883e6584883
--- /dev/null
+++ b/arch/arm/mach-mmp/Makefile
@@ -0,0 +1,15 @@
1#
2# Makefile for Marvell's PXA168 processors line
3#
4
5obj-y += common.o clock.o devices.o irq.o time.o
6
7# SoC support
8obj-$(CONFIG_CPU_PXA168) += pxa168.o
9obj-$(CONFIG_CPU_PXA910) += pxa910.o
10
11# board support
12obj-$(CONFIG_MACH_ASPENITE) += aspenite.o
13obj-$(CONFIG_MACH_ZYLONITE2) += aspenite.o
14obj-$(CONFIG_MACH_TAVOREVB) += tavorevb.o
15obj-$(CONFIG_MACH_TTC_DKB) += ttc_dkb.o
diff --git a/arch/arm/mach-mmp/Makefile.boot b/arch/arm/mach-mmp/Makefile.boot
new file mode 100644
index 000000000000..574a4aa8321a
--- /dev/null
+++ b/arch/arm/mach-mmp/Makefile.boot
@@ -0,0 +1 @@
zreladdr-y := 0x00008000
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
new file mode 100644
index 000000000000..4562452d4074
--- /dev/null
+++ b/arch/arm/mach-mmp/aspenite.c
@@ -0,0 +1,117 @@
1/*
2 * linux/arch/arm/mach-mmp/aspenite.c
3 *
4 * Support for the Marvell PXA168-based Aspenite and Zylonite2
5 * Development Platform.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * publishhed by the Free Software Foundation.
10 */
11
12#include <linux/init.h>
13#include <linux/kernel.h>
14#include <linux/platform_device.h>
15#include <linux/smc91x.h>
16
17#include <asm/mach-types.h>
18#include <asm/mach/arch.h>
19#include <mach/addr-map.h>
20#include <mach/mfp-pxa168.h>
21#include <mach/pxa168.h>
22#include <mach/gpio.h>
23
24#include "common.h"
25
26static unsigned long common_pin_config[] __initdata = {
27 /* Data Flash Interface */
28 GPIO0_DFI_D15,
29 GPIO1_DFI_D14,
30 GPIO2_DFI_D13,
31 GPIO3_DFI_D12,
32 GPIO4_DFI_D11,
33 GPIO5_DFI_D10,
34 GPIO6_DFI_D9,
35 GPIO7_DFI_D8,
36 GPIO8_DFI_D7,
37 GPIO9_DFI_D6,
38 GPIO10_DFI_D5,
39 GPIO11_DFI_D4,
40 GPIO12_DFI_D3,
41 GPIO13_DFI_D2,
42 GPIO14_DFI_D1,
43 GPIO15_DFI_D0,
44
45 /* Static Memory Controller */
46 GPIO18_SMC_nCS0,
47 GPIO34_SMC_nCS1,
48 GPIO23_SMC_nLUA,
49 GPIO25_SMC_nLLA,
50 GPIO28_SMC_RDY,
51 GPIO29_SMC_SCLK,
52 GPIO35_SMC_BE1,
53 GPIO36_SMC_BE2,
54 GPIO27_GPIO, /* Ethernet IRQ */
55
56 /* UART1 */
57 GPIO107_UART1_RXD,
58 GPIO108_UART1_TXD,
59};
60
61static struct smc91x_platdata smc91x_info = {
62 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
63};
64
65static struct resource smc91x_resources[] = {
66 [0] = {
67 .start = SMC_CS1_PHYS_BASE + 0x300,
68 .end = SMC_CS1_PHYS_BASE + 0xfffff,
69 .flags = IORESOURCE_MEM,
70 },
71 [1] = {
72 .start = gpio_to_irq(27),
73 .end = gpio_to_irq(27),
74 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
75 }
76};
77
78static struct platform_device smc91x_device = {
79 .name = "smc91x",
80 .id = 0,
81 .dev = {
82 .platform_data = &smc91x_info,
83 },
84 .num_resources = ARRAY_SIZE(smc91x_resources),
85 .resource = smc91x_resources,
86};
87
88static void __init common_init(void)
89{
90 mfp_config(ARRAY_AND_SIZE(common_pin_config));
91
92 /* on-chip devices */
93 pxa168_add_uart(1);
94
95 /* off-chip devices */
96 platform_device_register(&smc91x_device);
97}
98
99MACHINE_START(ASPENITE, "PXA168-based Aspenite Development Platform")
100 .phys_io = APB_PHYS_BASE,
101 .boot_params = 0x00000100,
102 .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc,
103 .map_io = pxa_map_io,
104 .init_irq = pxa168_init_irq,
105 .timer = &pxa168_timer,
106 .init_machine = common_init,
107MACHINE_END
108
109MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform")
110 .phys_io = APB_PHYS_BASE,
111 .boot_params = 0x00000100,
112 .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc,
113 .map_io = pxa_map_io,
114 .init_irq = pxa168_init_irq,
115 .timer = &pxa168_timer,
116 .init_machine = common_init,
117MACHINE_END
diff --git a/arch/arm/mach-mmp/clock.c b/arch/arm/mach-mmp/clock.c
new file mode 100644
index 000000000000..2d9cc5a7122f
--- /dev/null
+++ b/arch/arm/mach-mmp/clock.c
@@ -0,0 +1,83 @@
1/*
2 * linux/arch/arm/mach-mmp/clock.c
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#include <linux/module.h>
10#include <linux/kernel.h>
11#include <linux/list.h>
12#include <linux/spinlock.h>
13#include <linux/clk.h>
14#include <linux/io.h>
15
16#include <mach/regs-apbc.h>
17#include "clock.h"
18
19static void apbc_clk_enable(struct clk *clk)
20{
21 uint32_t clk_rst;
22
23 clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(clk->fnclksel);
24 __raw_writel(clk_rst, clk->clk_rst);
25}
26
27static void apbc_clk_disable(struct clk *clk)
28{
29 __raw_writel(0, clk->clk_rst);
30}
31
32struct clkops apbc_clk_ops = {
33 .enable = apbc_clk_enable,
34 .disable = apbc_clk_disable,
35};
36
37static DEFINE_SPINLOCK(clocks_lock);
38
39int clk_enable(struct clk *clk)
40{
41 unsigned long flags;
42
43 spin_lock_irqsave(&clocks_lock, flags);
44 if (clk->enabled++ == 0)
45 clk->ops->enable(clk);
46 spin_unlock_irqrestore(&clocks_lock, flags);
47 return 0;
48}
49EXPORT_SYMBOL(clk_enable);
50
51void clk_disable(struct clk *clk)
52{
53 unsigned long flags;
54
55 WARN_ON(clk->enabled == 0);
56
57 spin_lock_irqsave(&clocks_lock, flags);
58 if (--clk->enabled == 0)
59 clk->ops->disable(clk);
60 spin_unlock_irqrestore(&clocks_lock, flags);
61}
62EXPORT_SYMBOL(clk_disable);
63
64unsigned long clk_get_rate(struct clk *clk)
65{
66 unsigned long rate;
67
68 if (clk->ops->getrate)
69 rate = clk->ops->getrate(clk);
70 else
71 rate = clk->rate;
72
73 return rate;
74}
75EXPORT_SYMBOL(clk_get_rate);
76
77void clks_register(struct clk_lookup *clks, size_t num)
78{
79 int i;
80
81 for (i = 0; i < num; i++)
82 clkdev_add(&clks[i]);
83}
diff --git a/arch/arm/mach-mmp/clock.h b/arch/arm/mach-mmp/clock.h
new file mode 100644
index 000000000000..ed967e78e6a8
--- /dev/null
+++ b/arch/arm/mach-mmp/clock.h
@@ -0,0 +1,71 @@
1/*
2 * linux/arch/arm/mach-mmp/clock.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#include <asm/clkdev.h>
10
11struct clkops {
12 void (*enable)(struct clk *);
13 void (*disable)(struct clk *);
14 unsigned long (*getrate)(struct clk *);
15};
16
17struct clk {
18 const struct clkops *ops;
19
20 void __iomem *clk_rst; /* clock reset control register */
21 int fnclksel; /* functional clock select (APBC) */
22 uint32_t enable_val; /* value for clock enable (APMU) */
23 unsigned long rate;
24 int enabled;
25};
26
27extern struct clkops apbc_clk_ops;
28
29#define APBC_CLK(_name, _reg, _fnclksel, _rate) \
30struct clk clk_##_name = { \
31 .clk_rst = (void __iomem *)APBC_##_reg, \
32 .fnclksel = _fnclksel, \
33 .rate = _rate, \
34 .ops = &apbc_clk_ops, \
35}
36
37#define APBC_CLK_OPS(_name, _reg, _fnclksel, _rate, _ops) \
38struct clk clk_##_name = { \
39 .clk_rst = (void __iomem *)APBC_##_reg, \
40 .fnclksel = _fnclksel, \
41 .rate = _rate, \
42 .ops = _ops, \
43}
44
45#define APMU_CLK(_name, _reg, _eval, _rate) \
46struct clk clk_##_name = { \
47 .clk_rst = (void __iomem *)APMU_##_reg, \
48 .enable_val = _eval, \
49 .rate = _rate, \
50 .ops = &apmu_clk_ops, \
51}
52
53#define APMU_CLK_OPS(_name, _reg, _eval, _rate, _ops) \
54struct clk clk_##_name = { \
55 .clk_rst = (void __iomem *)APMU_##_reg, \
56 .enable_val = _eval, \
57 .rate = _rate, \
58 .ops = _ops, \
59}
60
61#define INIT_CLKREG(_clk, _devname, _conname) \
62 { \
63 .clk = _clk, \
64 .dev_id = _devname, \
65 .con_id = _conname, \
66 }
67
68extern struct clk clk_pxa168_gpio;
69extern struct clk clk_pxa168_timers;
70
71extern void clks_register(struct clk_lookup *, size_t);
diff --git a/arch/arm/mach-mmp/common.c b/arch/arm/mach-mmp/common.c
new file mode 100644
index 000000000000..e1e66c18b446
--- /dev/null
+++ b/arch/arm/mach-mmp/common.c
@@ -0,0 +1,37 @@
1/*
2 * linux/arch/arm/mach-mmp/common.c
3 *
4 * Code common to PXA168 processor lines
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/init.h>
12#include <linux/kernel.h>
13
14#include <asm/page.h>
15#include <asm/mach/map.h>
16#include <mach/addr-map.h>
17
18#include "common.h"
19
20static struct map_desc standard_io_desc[] __initdata = {
21 {
22 .pfn = __phys_to_pfn(APB_PHYS_BASE),
23 .virtual = APB_VIRT_BASE,
24 .length = APB_PHYS_SIZE,
25 .type = MT_DEVICE,
26 }, {
27 .pfn = __phys_to_pfn(AXI_PHYS_BASE),
28 .virtual = AXI_VIRT_BASE,
29 .length = AXI_PHYS_SIZE,
30 .type = MT_DEVICE,
31 },
32};
33
34void __init pxa_map_io(void)
35{
36 iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
37}
diff --git a/arch/arm/mach-mmp/common.h b/arch/arm/mach-mmp/common.h
new file mode 100644
index 000000000000..c33fbbc49417
--- /dev/null
+++ b/arch/arm/mach-mmp/common.h
@@ -0,0 +1,13 @@
1#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x)
2
3struct sys_timer;
4
5extern void timer_init(int irq);
6
7extern struct sys_timer pxa168_timer;
8extern struct sys_timer pxa910_timer;
9extern void __init pxa168_init_irq(void);
10extern void __init pxa910_init_irq(void);
11
12extern void __init icu_init_irq(void);
13extern void __init pxa_map_io(void);
diff --git a/arch/arm/mach-mmp/devices.c b/arch/arm/mach-mmp/devices.c
new file mode 100644
index 000000000000..191d9dea8731
--- /dev/null
+++ b/arch/arm/mach-mmp/devices.c
@@ -0,0 +1,69 @@
1/*
2 * linux/arch/arm/mach-mmp/devices.c
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#include <linux/init.h>
10#include <linux/platform_device.h>
11#include <linux/dma-mapping.h>
12
13#include <asm/irq.h>
14#include <mach/devices.h>
15
16int __init pxa_register_device(struct pxa_device_desc *desc,
17 void *data, size_t size)
18{
19 struct platform_device *pdev;
20 struct resource res[2 + MAX_RESOURCE_DMA];
21 int i, ret = 0, nres = 0;
22
23 pdev = platform_device_alloc(desc->drv_name, desc->id);
24 if (pdev == NULL)
25 return -ENOMEM;
26
27 pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
28
29 memset(res, 0, sizeof(res));
30
31 if (desc->start != -1ul && desc->size > 0) {
32 res[nres].start = desc->start;
33 res[nres].end = desc->start + desc->size - 1;
34 res[nres].flags = IORESOURCE_MEM;
35 nres++;
36 }
37
38 if (desc->irq != NO_IRQ) {
39 res[nres].start = desc->irq;
40 res[nres].end = desc->irq;
41 res[nres].flags = IORESOURCE_IRQ;
42 nres++;
43 }
44
45 for (i = 0; i < MAX_RESOURCE_DMA; i++, nres++) {
46 if (desc->dma[i] == 0)
47 break;
48
49 res[nres].start = desc->dma[i];
50 res[nres].end = desc->dma[i];
51 res[nres].flags = IORESOURCE_DMA;
52 }
53
54 ret = platform_device_add_resources(pdev, res, nres);
55 if (ret) {
56 platform_device_put(pdev);
57 return ret;
58 }
59
60 if (data && size) {
61 ret = platform_device_add_data(pdev, data, size);
62 if (ret) {
63 platform_device_put(pdev);
64 return ret;
65 }
66 }
67
68 return platform_device_add(pdev);
69}
diff --git a/arch/arm/mach-mmp/include/mach/addr-map.h b/arch/arm/mach-mmp/include/mach/addr-map.h
new file mode 100644
index 000000000000..3254089a644d
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/addr-map.h
@@ -0,0 +1,34 @@
1/*
2 * linux/arch/arm/mach-mmp/include/mach/addr-map.h
3 *
4 * Common address map definitions
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_MACH_ADDR_MAP_H
12#define __ASM_MACH_ADDR_MAP_H
13
14/* APB - Application Subsystem Peripheral Bus
15 *
16 * NOTE: the DMA controller registers are actually on the AXI fabric #1
17 * slave port to AHB/APB bridge, due to its close relationship to those
18 * peripherals on APB, let's count it into the ABP mapping area.
19 */
20#define APB_PHYS_BASE 0xd4000000
21#define APB_VIRT_BASE 0xfe000000
22#define APB_PHYS_SIZE 0x00200000
23
24#define AXI_PHYS_BASE 0xd4200000
25#define AXI_VIRT_BASE 0xfe200000
26#define AXI_PHYS_SIZE 0x00200000
27
28/* Static Memory Controller - Chip Select 0 and 1 */
29#define SMC_CS0_PHYS_BASE 0x80000000
30#define SMC_CS0_PHYS_SIZE 0x10000000
31#define SMC_CS1_PHYS_BASE 0x90000000
32#define SMC_CS1_PHYS_SIZE 0x10000000
33
34#endif /* __ASM_MACH_ADDR_MAP_H */
diff --git a/arch/arm/mach-mmp/include/mach/clkdev.h b/arch/arm/mach-mmp/include/mach/clkdev.h
new file mode 100644
index 000000000000..2fb354e54e0d
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/clkdev.h
@@ -0,0 +1,7 @@
1#ifndef __ASM_MACH_CLKDEV_H
2#define __ASM_MACH_CLKDEV_H
3
4#define __clk_get(clk) ({ 1; })
5#define __clk_put(clk) do { } while (0)
6
7#endif /* __ASM_MACH_CLKDEV_H */
diff --git a/arch/arm/mach-mmp/include/mach/cputype.h b/arch/arm/mach-mmp/include/mach/cputype.h
new file mode 100644
index 000000000000..25e797b09083
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/cputype.h
@@ -0,0 +1,30 @@
1#ifndef __ASM_MACH_CPUTYPE_H
2#define __ASM_MACH_CPUTYPE_H
3
4#include <asm/cputype.h>
5
6/*
7 * CPU Stepping OLD_ID CPU_ID CHIP_ID
8 *
9 * PXA168 A0 0x41159263 0x56158400 0x00A0A333
10 * PXA910 Y0 0x41159262 0x56158000 0x00F0C910
11 */
12
13#ifdef CONFIG_CPU_PXA168
14# define __cpu_is_pxa168(id) \
15 ({ unsigned int _id = ((id) >> 8) & 0xff; _id == 0x84; })
16#else
17# define __cpu_is_pxa168(id) (0)
18#endif
19
20#ifdef CONFIG_CPU_PXA910
21# define __cpu_is_pxa910(id) \
22 ({ unsigned int _id = ((id) >> 8) & 0xff; _id == 0x80; })
23#else
24# define __cpu_is_pxa910(id) (0)
25#endif
26
27#define cpu_is_pxa168() ({ __cpu_is_pxa168(read_cpuid_id()); })
28#define cpu_is_pxa910() ({ __cpu_is_pxa910(read_cpuid_id()); })
29
30#endif /* __ASM_MACH_CPUTYPE_H */
diff --git a/arch/arm/mach-mmp/include/mach/debug-macro.S b/arch/arm/mach-mmp/include/mach/debug-macro.S
new file mode 100644
index 000000000000..a850f87de51d
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/debug-macro.S
@@ -0,0 +1,23 @@
1/* arch/arm/mach-mmp/include/mach/debug-macro.S
2 *
3 * Debugging macro include header
4 *
5 * Copied from arch/arm/mach-pxa/include/mach/debug.S
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <mach/addr-map.h>
13
14 .macro addruart,rx
15 mrc p15, 0, \rx, c1, c0
16 tst \rx, #1 @ MMU enabled?
17 ldreq \rx, =APB_PHYS_BASE @ physical
18 ldrne \rx, =APB_VIRT_BASE @ virtual
19 orr \rx, \rx, #0x00017000
20 .endm
21
22#define UART_SHIFT 2
23#include <asm/hardware/debug-8250.S>
diff --git a/arch/arm/mach-mmp/include/mach/devices.h b/arch/arm/mach-mmp/include/mach/devices.h
new file mode 100644
index 000000000000..24585397217e
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/devices.h
@@ -0,0 +1,37 @@
1#include <linux/types.h>
2
3#define MAX_RESOURCE_DMA 2
4
5/* structure for describing the on-chip devices */
6struct pxa_device_desc {
7 const char *dev_name;
8 const char *drv_name;
9 int id;
10 int irq;
11 unsigned long start;
12 unsigned long size;
13 int dma[MAX_RESOURCE_DMA];
14};
15
16#define PXA168_DEVICE(_name, _drv, _id, _irq, _start, _size, _dma...) \
17struct pxa_device_desc pxa168_device_##_name __initdata = { \
18 .dev_name = "pxa168-" #_name, \
19 .drv_name = _drv, \
20 .id = _id, \
21 .irq = IRQ_PXA168_##_irq, \
22 .start = _start, \
23 .size = _size, \
24 .dma = { _dma }, \
25};
26
27#define PXA910_DEVICE(_name, _drv, _id, _irq, _start, _size, _dma...) \
28struct pxa_device_desc pxa910_device_##_name __initdata = { \
29 .dev_name = "pxa910-" #_name, \
30 .drv_name = _drv, \
31 .id = _id, \
32 .irq = IRQ_PXA910_##_irq, \
33 .start = _start, \
34 .size = _size, \
35 .dma = { _dma }, \
36};
37extern int pxa_register_device(struct pxa_device_desc *, void *, size_t);
diff --git a/arch/arm/mach-mmp/include/mach/dma.h b/arch/arm/mach-mmp/include/mach/dma.h
new file mode 100644
index 000000000000..1d6914544da4
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/dma.h
@@ -0,0 +1,13 @@
1/*
2 * linux/arch/arm/mach-mmp/include/mach/dma.h
3 */
4
5#ifndef __ASM_MACH_DMA_H
6#define __ASM_MACH_DMA_H
7
8#include <mach/addr-map.h>
9
10#define DMAC_REGS_VIRT (APB_VIRT_BASE + 0x00000)
11
12#include <plat/dma.h>
13#endif /* __ASM_MACH_DMA_H */
diff --git a/arch/arm/mach-mmp/include/mach/entry-macro.S b/arch/arm/mach-mmp/include/mach/entry-macro.S
new file mode 100644
index 000000000000..6d3cd35478b5
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/entry-macro.S
@@ -0,0 +1,25 @@
1/*
2 * linux/arch/arm/mach-mmp/include/mach/entry-macro.S
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#include <mach/regs-icu.h>
10
11 .macro disable_fiq
12 .endm
13
14 .macro arch_ret_to_user, tmp1, tmp2
15 .endm
16
17 .macro get_irqnr_preamble, base, tmp
18 ldr \base, =ICU_AP_IRQ_SEL_INT_NUM
19 .endm
20
21 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
22 ldr \tmp, [\base, #0]
23 and \irqnr, \tmp, #0x3f
24 tst \tmp, #(1 << 6)
25 .endm
diff --git a/arch/arm/mach-mmp/include/mach/gpio.h b/arch/arm/mach-mmp/include/mach/gpio.h
new file mode 100644
index 000000000000..ab26d13295c4
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/gpio.h
@@ -0,0 +1,36 @@
1#ifndef __ASM_MACH_GPIO_H
2#define __ASM_MACH_GPIO_H
3
4#include <mach/addr-map.h>
5#include <mach/irqs.h>
6#include <asm-generic/gpio.h>
7
8#define GPIO_REGS_VIRT (APB_VIRT_BASE + 0x19000)
9
10#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
11#define GPIO_REG(x) (*((volatile u32 *)(GPIO_REGS_VIRT + (x))))
12
13#define NR_BUILTIN_GPIO (128)
14
15#define gpio_to_bank(gpio) ((gpio) >> 5)
16#define gpio_to_irq(gpio) (IRQ_GPIO_START + (gpio))
17#define irq_to_gpio(irq) ((irq) - IRQ_GPIO_START)
18
19
20#define __gpio_is_inverted(gpio) (0)
21#define __gpio_is_occupied(gpio) (0)
22
23/* NOTE: these macros are defined here to make optimization of
24 * gpio_{get,set}_value() to work when 'gpio' is a constant.
25 * Usage of these macros otherwise is no longer recommended,
26 * use generic GPIO API whenever possible.
27 */
28#define GPIO_bit(gpio) (1 << ((gpio) & 0x1f))
29
30#define GPLR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x00)
31#define GPDR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x0c)
32#define GPSR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x18)
33#define GPCR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x24)
34
35#include <plat/gpio.h>
36#endif /* __ASM_MACH_GPIO_H */
diff --git a/arch/arm/mach-mmp/include/mach/hardware.h b/arch/arm/mach-mmp/include/mach/hardware.h
new file mode 100644
index 000000000000..99264a5ce5e4
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/hardware.h
@@ -0,0 +1,4 @@
1#ifndef __ASM_MACH_HARDWARE_H
2#define __ASM_MACH_HARDWARE_H
3
4#endif /* __ASM_MACH_HARDWARE_H */
diff --git a/arch/arm/mach-mmp/include/mach/io.h b/arch/arm/mach-mmp/include/mach/io.h
new file mode 100644
index 000000000000..e7adf3d012c1
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/io.h
@@ -0,0 +1,21 @@
1/*
2 * linux/arch/arm/mach-mmp/include/mach/io.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#ifndef __ASM_MACH_IO_H
10#define __ASM_MACH_IO_H
11
12#define IO_SPACE_LIMIT 0xffffffff
13
14/*
15 * We don't actually have real ISA nor PCI buses, but there is so many
16 * drivers out there that might just work if we fake them...
17 */
18#define __io(a) __typesafe_io(a)
19#define __mem_pci(a) (a)
20
21#endif /* __ASM_MACH_IO_H */
diff --git a/arch/arm/mach-mmp/include/mach/irqs.h b/arch/arm/mach-mmp/include/mach/irqs.h
new file mode 100644
index 000000000000..e83e45ebf7a4
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/irqs.h
@@ -0,0 +1,119 @@
1#ifndef __ASM_MACH_IRQS_H
2#define __ASM_MACH_IRQS_H
3
4/*
5 * Interrupt numbers for PXA168
6 */
7#define IRQ_PXA168_NONE (-1)
8#define IRQ_PXA168_SSP3 0
9#define IRQ_PXA168_SSP2 1
10#define IRQ_PXA168_SSP1 2
11#define IRQ_PXA168_SSP0 3
12#define IRQ_PXA168_PMIC_INT 4
13#define IRQ_PXA168_RTC_INT 5
14#define IRQ_PXA168_RTC_ALARM 6
15#define IRQ_PXA168_TWSI0 7
16#define IRQ_PXA168_GPU 8
17#define IRQ_PXA168_KEYPAD 9
18#define IRQ_PXA168_ONEWIRE 12
19#define IRQ_PXA168_TIMER1 13
20#define IRQ_PXA168_TIMER2 14
21#define IRQ_PXA168_TIMER3 15
22#define IRQ_PXA168_CMU 16
23#define IRQ_PXA168_SSP4 17
24#define IRQ_PXA168_MSP_WAKEUP 19
25#define IRQ_PXA168_CF_WAKEUP 20
26#define IRQ_PXA168_XD_WAKEUP 21
27#define IRQ_PXA168_MFU 22
28#define IRQ_PXA168_MSP 23
29#define IRQ_PXA168_CF 24
30#define IRQ_PXA168_XD 25
31#define IRQ_PXA168_DDR_INT 26
32#define IRQ_PXA168_UART1 27
33#define IRQ_PXA168_UART2 28
34#define IRQ_PXA168_WDT 35
35#define IRQ_PXA168_FRQ_CHANGE 38
36#define IRQ_PXA168_SDH1 39
37#define IRQ_PXA168_SDH2 40
38#define IRQ_PXA168_LCD 41
39#define IRQ_PXA168_CI 42
40#define IRQ_PXA168_USB1 44
41#define IRQ_PXA168_NAND 45
42#define IRQ_PXA168_HIFI_DMA 46
43#define IRQ_PXA168_DMA_INT0 47
44#define IRQ_PXA168_DMA_INT1 48
45#define IRQ_PXA168_GPIOX 49
46#define IRQ_PXA168_USB2 51
47#define IRQ_PXA168_AC97 57
48#define IRQ_PXA168_TWSI1 58
49#define IRQ_PXA168_PMU 60
50#define IRQ_PXA168_SM_INT 63
51
52/*
53 * Interrupt numbers for PXA910
54 */
55#define IRQ_PXA910_AIRQ 0
56#define IRQ_PXA910_SSP3 1
57#define IRQ_PXA910_SSP2 2
58#define IRQ_PXA910_SSP1 3
59#define IRQ_PXA910_PMIC_INT 4
60#define IRQ_PXA910_RTC_INT 5
61#define IRQ_PXA910_RTC_ALARM 6
62#define IRQ_PXA910_TWSI0 7
63#define IRQ_PXA910_GPU 8
64#define IRQ_PXA910_KEYPAD 9
65#define IRQ_PXA910_ROTARY 10
66#define IRQ_PXA910_TRACKBALL 11
67#define IRQ_PXA910_ONEWIRE 12
68#define IRQ_PXA910_AP1_TIMER1 13
69#define IRQ_PXA910_AP1_TIMER2 14
70#define IRQ_PXA910_AP1_TIMER3 15
71#define IRQ_PXA910_IPC_AP0 16
72#define IRQ_PXA910_IPC_AP1 17
73#define IRQ_PXA910_IPC_AP2 18
74#define IRQ_PXA910_IPC_AP3 19
75#define IRQ_PXA910_IPC_AP4 20
76#define IRQ_PXA910_IPC_CP0 21
77#define IRQ_PXA910_IPC_CP1 22
78#define IRQ_PXA910_IPC_CP2 23
79#define IRQ_PXA910_IPC_CP3 24
80#define IRQ_PXA910_IPC_CP4 25
81#define IRQ_PXA910_L2_DDR 26
82#define IRQ_PXA910_UART2 27
83#define IRQ_PXA910_UART3 28
84#define IRQ_PXA910_AP2_TIMER1 29
85#define IRQ_PXA910_AP2_TIMER2 30
86#define IRQ_PXA910_CP2_TIMER1 31
87#define IRQ_PXA910_CP2_TIMER2 32
88#define IRQ_PXA910_CP2_TIMER3 33
89#define IRQ_PXA910_GSSP 34
90#define IRQ_PXA910_CP2_WDT 35
91#define IRQ_PXA910_MAIN_PMU 36
92#define IRQ_PXA910_CP_FREQ_CHG 37
93#define IRQ_PXA910_AP_FREQ_CHG 38
94#define IRQ_PXA910_MMC 39
95#define IRQ_PXA910_AEU 40
96#define IRQ_PXA910_LCD 41
97#define IRQ_PXA910_CCIC 42
98#define IRQ_PXA910_IRE 43
99#define IRQ_PXA910_USB1 44
100#define IRQ_PXA910_NAND 45
101#define IRQ_PXA910_HIFI_DMA 46
102#define IRQ_PXA910_DMA_INT0 47
103#define IRQ_PXA910_DMA_INT1 48
104#define IRQ_PXA910_AP_GPIO 49
105#define IRQ_PXA910_AP2_TIMER3 50
106#define IRQ_PXA910_USB2 51
107#define IRQ_PXA910_TWSI1 54
108#define IRQ_PXA910_CP_GPIO 55
109#define IRQ_PXA910_UART1 59 /* Slow UART */
110#define IRQ_PXA910_AP_PMU 60
111#define IRQ_PXA910_SM_INT 63 /* from PinMux */
112
113#define IRQ_GPIO_START 64
114#define IRQ_GPIO_NUM 128
115#define IRQ_GPIO(x) (IRQ_GPIO_START + (x))
116
117#define NR_IRQS (IRQ_GPIO_START + IRQ_GPIO_NUM)
118
119#endif /* __ASM_MACH_IRQS_H */
diff --git a/arch/arm/mach-mmp/include/mach/memory.h b/arch/arm/mach-mmp/include/mach/memory.h
new file mode 100644
index 000000000000..bdb21d70714c
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/memory.h
@@ -0,0 +1,14 @@
1/*
2 * linux/arch/arm/mach-mmp/include/mach/memory.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#ifndef __ASM_MACH_MEMORY_H
10#define __ASM_MACH_MEMORY_H
11
12#define PHYS_OFFSET UL(0x00000000)
13
14#endif /* __ASM_MACH_MEMORY_H */
diff --git a/arch/arm/mach-mmp/include/mach/mfp-pxa168.h b/arch/arm/mach-mmp/include/mach/mfp-pxa168.h
new file mode 100644
index 000000000000..d0bdb6e3682b
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/mfp-pxa168.h
@@ -0,0 +1,258 @@
1#ifndef __ASM_MACH_MFP_PXA168_H
2#define __ASM_MACH_MFP_PXA168_H
3
4#include <mach/mfp.h>
5
6/* GPIO */
7#define GPIO0_GPIO MFP_CFG(GPIO0, AF5)
8#define GPIO1_GPIO MFP_CFG(GPIO1, AF5)
9#define GPIO2_GPIO MFP_CFG(GPIO2, AF5)
10#define GPIO3_GPIO MFP_CFG(GPIO3, AF5)
11#define GPIO4_GPIO MFP_CFG(GPIO4, AF5)
12#define GPIO5_GPIO MFP_CFG(GPIO5, AF5)
13#define GPIO6_GPIO MFP_CFG(GPIO6, AF5)
14#define GPIO7_GPIO MFP_CFG(GPIO7, AF5)
15#define GPIO8_GPIO MFP_CFG(GPIO8, AF5)
16#define GPIO9_GPIO MFP_CFG(GPIO9, AF5)
17#define GPIO10_GPIO MFP_CFG(GPIO10, AF5)
18#define GPIO11_GPIO MFP_CFG(GPIO11, AF5)
19#define GPIO12_GPIO MFP_CFG(GPIO12, AF5)
20#define GPIO13_GPIO MFP_CFG(GPIO13, AF5)
21#define GPIO14_GPIO MFP_CFG(GPIO14, AF5)
22#define GPIO15_GPIO MFP_CFG(GPIO15, AF5)
23#define GPIO16_GPIO MFP_CFG(GPIO16, AF0)
24#define GPIO17_GPIO MFP_CFG(GPIO17, AF5)
25#define GPIO18_GPIO MFP_CFG(GPIO18, AF0)
26#define GPIO19_GPIO MFP_CFG(GPIO19, AF5)
27#define GPIO20_GPIO MFP_CFG(GPIO20, AF0)
28#define GPIO21_GPIO MFP_CFG(GPIO21, AF5)
29#define GPIO22_GPIO MFP_CFG(GPIO22, AF5)
30#define GPIO23_GPIO MFP_CFG(GPIO23, AF5)
31#define GPIO24_GPIO MFP_CFG(GPIO24, AF5)
32#define GPIO25_GPIO MFP_CFG(GPIO25, AF5)
33#define GPIO26_GPIO MFP_CFG(GPIO26, AF0)
34#define GPIO27_GPIO MFP_CFG(GPIO27, AF5)
35#define GPIO28_GPIO MFP_CFG(GPIO28, AF5)
36#define GPIO29_GPIO MFP_CFG(GPIO29, AF5)
37#define GPIO30_GPIO MFP_CFG(GPIO30, AF5)
38#define GPIO31_GPIO MFP_CFG(GPIO31, AF5)
39#define GPIO32_GPIO MFP_CFG(GPIO32, AF5)
40#define GPIO33_GPIO MFP_CFG(GPIO33, AF5)
41#define GPIO34_GPIO MFP_CFG(GPIO34, AF0)
42#define GPIO35_GPIO MFP_CFG(GPIO35, AF0)
43#define GPIO36_GPIO MFP_CFG(GPIO36, AF0)
44#define GPIO37_GPIO MFP_CFG(GPIO37, AF0)
45#define GPIO38_GPIO MFP_CFG(GPIO38, AF0)
46#define GPIO39_GPIO MFP_CFG(GPIO39, AF0)
47#define GPIO40_GPIO MFP_CFG(GPIO40, AF0)
48#define GPIO41_GPIO MFP_CFG(GPIO41, AF0)
49#define GPIO42_GPIO MFP_CFG(GPIO42, AF0)
50#define GPIO43_GPIO MFP_CFG(GPIO43, AF0)
51#define GPIO44_GPIO MFP_CFG(GPIO44, AF0)
52#define GPIO45_GPIO MFP_CFG(GPIO45, AF0)
53#define GPIO46_GPIO MFP_CFG(GPIO46, AF0)
54#define GPIO47_GPIO MFP_CFG(GPIO47, AF0)
55#define GPIO48_GPIO MFP_CFG(GPIO48, AF0)
56#define GPIO49_GPIO MFP_CFG(GPIO49, AF0)
57#define GPIO50_GPIO MFP_CFG(GPIO50, AF0)
58#define GPIO51_GPIO MFP_CFG(GPIO51, AF0)
59#define GPIO52_GPIO MFP_CFG(GPIO52, AF0)
60#define GPIO53_GPIO MFP_CFG(GPIO53, AF0)
61#define GPIO54_GPIO MFP_CFG(GPIO54, AF0)
62#define GPIO55_GPIO MFP_CFG(GPIO55, AF0)
63#define GPIO56_GPIO MFP_CFG(GPIO56, AF0)
64#define GPIO57_GPIO MFP_CFG(GPIO57, AF0)
65#define GPIO58_GPIO MFP_CFG(GPIO58, AF0)
66#define GPIO59_GPIO MFP_CFG(GPIO59, AF0)
67#define GPIO60_GPIO MFP_CFG(GPIO60, AF0)
68#define GPIO61_GPIO MFP_CFG(GPIO61, AF0)
69#define GPIO62_GPIO MFP_CFG(GPIO62, AF0)
70#define GPIO63_GPIO MFP_CFG(GPIO63, AF0)
71#define GPIO64_GPIO MFP_CFG(GPIO64, AF0)
72#define GPIO65_GPIO MFP_CFG(GPIO65, AF0)
73#define GPIO66_GPIO MFP_CFG(GPIO66, AF0)
74#define GPIO67_GPIO MFP_CFG(GPIO67, AF0)
75#define GPIO68_GPIO MFP_CFG(GPIO68, AF0)
76#define GPIO69_GPIO MFP_CFG(GPIO69, AF0)
77#define GPIO70_GPIO MFP_CFG(GPIO70, AF0)
78#define GPIO71_GPIO MFP_CFG(GPIO71, AF0)
79#define GPIO72_GPIO MFP_CFG(GPIO72, AF0)
80#define GPIO73_GPIO MFP_CFG(GPIO73, AF0)
81#define GPIO74_GPIO MFP_CFG(GPIO74, AF0)
82#define GPIO75_GPIO MFP_CFG(GPIO75, AF0)
83#define GPIO76_GPIO MFP_CFG(GPIO76, AF0)
84#define GPIO77_GPIO MFP_CFG(GPIO77, AF0)
85#define GPIO78_GPIO MFP_CFG(GPIO78, AF0)
86#define GPIO79_GPIO MFP_CFG(GPIO79, AF0)
87#define GPIO80_GPIO MFP_CFG(GPIO80, AF0)
88#define GPIO81_GPIO MFP_CFG(GPIO81, AF0)
89#define GPIO82_GPIO MFP_CFG(GPIO82, AF0)
90#define GPIO83_GPIO MFP_CFG(GPIO83, AF0)
91#define GPIO84_GPIO MFP_CFG(GPIO84, AF0)
92#define GPIO85_GPIO MFP_CFG(GPIO85, AF0)
93#define GPIO86_GPIO MFP_CFG(GPIO86, AF0)
94#define GPIO87_GPIO MFP_CFG(GPIO87, AF0)
95#define GPIO88_GPIO MFP_CFG(GPIO88, AF0)
96#define GPIO89_GPIO MFP_CFG(GPIO89, AF0)
97#define GPIO90_GPIO MFP_CFG(GPIO90, AF0)
98#define GPIO91_GPIO MFP_CFG(GPIO91, AF0)
99#define GPIO92_GPIO MFP_CFG(GPIO92, AF0)
100#define GPIO93_GPIO MFP_CFG(GPIO93, AF0)
101#define GPIO94_GPIO MFP_CFG(GPIO94, AF0)
102#define GPIO95_GPIO MFP_CFG(GPIO95, AF0)
103#define GPIO96_GPIO MFP_CFG(GPIO96, AF0)
104#define GPIO97_GPIO MFP_CFG(GPIO97, AF0)
105#define GPIO98_GPIO MFP_CFG(GPIO98, AF0)
106#define GPIO99_GPIO MFP_CFG(GPIO99, AF0)
107#define GPIO100_GPIO MFP_CFG(GPIO100, AF0)
108#define GPIO101_GPIO MFP_CFG(GPIO101, AF0)
109#define GPIO102_GPIO MFP_CFG(GPIO102, AF0)
110#define GPIO103_GPIO MFP_CFG(GPIO103, AF0)
111#define GPIO104_GPIO MFP_CFG(GPIO104, AF0)
112#define GPIO105_GPIO MFP_CFG(GPIO105, AF0)
113#define GPIO106_GPIO MFP_CFG(GPIO106, AF0)
114#define GPIO107_GPIO MFP_CFG(GPIO107, AF0)
115#define GPIO108_GPIO MFP_CFG(GPIO108, AF0)
116#define GPIO109_GPIO MFP_CFG(GPIO109, AF0)
117#define GPIO110_GPIO MFP_CFG(GPIO110, AF0)
118#define GPIO111_GPIO MFP_CFG(GPIO111, AF0)
119#define GPIO112_GPIO MFP_CFG(GPIO112, AF0)
120#define GPIO113_GPIO MFP_CFG(GPIO113, AF0)
121#define GPIO114_GPIO MFP_CFG(GPIO114, AF0)
122#define GPIO115_GPIO MFP_CFG(GPIO115, AF0)
123#define GPIO116_GPIO MFP_CFG(GPIO116, AF0)
124#define GPIO117_GPIO MFP_CFG(GPIO117, AF0)
125#define GPIO118_GPIO MFP_CFG(GPIO118, AF0)
126#define GPIO119_GPIO MFP_CFG(GPIO119, AF0)
127#define GPIO120_GPIO MFP_CFG(GPIO120, AF0)
128#define GPIO121_GPIO MFP_CFG(GPIO121, AF0)
129#define GPIO122_GPIO MFP_CFG(GPIO122, AF0)
130
131/* DFI */
132#define GPIO0_DFI_D15 MFP_CFG(GPIO0, AF0)
133#define GPIO1_DFI_D14 MFP_CFG(GPIO1, AF0)
134#define GPIO2_DFI_D13 MFP_CFG(GPIO2, AF0)
135#define GPIO3_DFI_D12 MFP_CFG(GPIO3, AF0)
136#define GPIO4_DFI_D11 MFP_CFG(GPIO4, AF0)
137#define GPIO5_DFI_D10 MFP_CFG(GPIO5, AF0)
138#define GPIO6_DFI_D9 MFP_CFG(GPIO6, AF0)
139#define GPIO7_DFI_D8 MFP_CFG(GPIO7, AF0)
140#define GPIO8_DFI_D7 MFP_CFG(GPIO8, AF0)
141#define GPIO9_DFI_D6 MFP_CFG(GPIO9, AF0)
142#define GPIO10_DFI_D5 MFP_CFG(GPIO10, AF0)
143#define GPIO11_DFI_D4 MFP_CFG(GPIO11, AF0)
144#define GPIO12_DFI_D3 MFP_CFG(GPIO12, AF0)
145#define GPIO13_DFI_D2 MFP_CFG(GPIO13, AF0)
146#define GPIO14_DFI_D1 MFP_CFG(GPIO14, AF0)
147#define GPIO15_DFI_D0 MFP_CFG(GPIO15, AF0)
148
149#define GPIO30_DFI_ADDR0 MFP_CFG(GPIO30, AF0)
150#define GPIO31_DFI_ADDR1 MFP_CFG(GPIO31, AF0)
151#define GPIO32_DFI_ADDR2 MFP_CFG(GPIO32, AF0)
152#define GPIO33_DFI_ADDR3 MFP_CFG(GPIO33, AF0)
153
154/* NAND */
155#define GPIO16_ND_nCS0 MFP_CFG(GPIO16, AF1)
156#define GPIO17_ND_nWE MFP_CFG(GPIO17, AF0)
157#define GPIO21_ND_ALE MFP_CFG(GPIO21, AF0)
158#define GPIO22_ND_CLE MFP_CFG(GPIO22, AF0)
159#define GPIO24_ND_nRE MFP_CFG(GPIO24, AF0)
160#define GPIO26_ND_RnB1 MFP_CFG(GPIO26, AF1)
161#define GPIO27_ND_RnB2 MFP_CFG(GPIO27, AF1)
162
163/* Static Memory Controller */
164#define GPIO18_SMC_nCS0 MFP_CFG(GPIO18, AF3)
165#define GPIO18_SMC_nCS1 MFP_CFG(GPIO18, AF2)
166#define GPIO16_SMC_nCS0 MFP_CFG(GPIO16, AF2)
167#define GPIO16_SMC_nCS1 MFP_CFG(GPIO16, AF3)
168#define GPIO19_SMC_nCS0 MFP_CFG(GPIO19, AF0)
169#define GPIO20_SMC_nCS1 MFP_CFG(GPIO20, AF2)
170#define GPIO23_SMC_nLUA MFP_CFG(GPIO23, AF0)
171#define GPIO25_SMC_nLLA MFP_CFG(GPIO25, AF0)
172#define GPIO27_SMC_IRQ MFP_CFG(GPIO27, AF0)
173#define GPIO28_SMC_RDY MFP_CFG(GPIO28, AF0)
174#define GPIO29_SMC_SCLK MFP_CFG(GPIO29, AF0)
175#define GPIO34_SMC_nCS1 MFP_CFG(GPIO34, AF2)
176#define GPIO35_SMC_BE1 MFP_CFG(GPIO35, AF2)
177#define GPIO36_SMC_BE2 MFP_CFG(GPIO36, AF2)
178
179/* Compact Flash */
180#define GPIO19_CF_nCE1 MFP_CFG(GPIO19, AF3)
181#define GPIO20_CF_nCE2 MFP_CFG(GPIO20, AF3)
182#define GPIO23_CF_nALE MFP_CFG(GPIO23, AF3)
183#define GPIO25_CF_nRESET MFP_CFG(GPIO25, AF3)
184#define GPIO28_CF_RDY MFP_CFG(GPIO28, AF3)
185#define GPIO29_CF_STSCH MFP_CFG(GPIO29, AF3)
186#define GPIO30_CF_nREG MFP_CFG(GPIO30, AF3)
187#define GPIO31_CF_nIOIS16 MFP_CFG(GPIO31, AF3)
188#define GPIO32_CF_nCD1 MFP_CFG(GPIO32, AF3)
189#define GPIO33_CF_nCD2 MFP_CFG(GPIO33, AF3)
190
191/* UART1 */
192#define GPIO107_UART1_TXD MFP_CFG_DRV(GPIO107, AF1, FAST)
193#define GPIO107_UART1_RXD MFP_CFG_DRV(GPIO107, AF2, FAST)
194#define GPIO108_UART1_RXD MFP_CFG_DRV(GPIO108, AF1, FAST)
195#define GPIO108_UART1_TXD MFP_CFG_DRV(GPIO108, AF2, FAST)
196#define GPIO109_UART1_CTS MFP_CFG(GPIO109, AF1)
197#define GPIO109_UART1_RTS MFP_CFG(GPIO109, AF2)
198#define GPIO110_UART1_RTS MFP_CFG(GPIO110, AF1)
199#define GPIO110_UART1_CTS MFP_CFG(GPIO110, AF2)
200#define GPIO111_UART1_RI MFP_CFG(GPIO111, AF1)
201#define GPIO111_UART1_DSR MFP_CFG(GPIO111, AF2)
202#define GPIO112_UART1_DTR MFP_CFG(GPIO111, AF1)
203#define GPIO112_UART1_DCD MFP_CFG(GPIO112, AF2)
204
205/* MMC1 */
206#define GPIO37_MMC1_DAT7 MFP_CFG(GPIO37, AF1)
207#define GPIO38_MMC1_DAT6 MFP_CFG(GPIO38, AF1)
208#define GPIO54_MMC1_DAT5 MFP_CFG(GPIO54, AF1)
209#define GPIO48_MMC1_DAT4 MFP_CFG(GPIO48, AF1)
210#define GPIO51_MMC1_DAT3 MFP_CFG(GPIO51, AF1)
211#define GPIO52_MMC1_DAT2 MFP_CFG(GPIO52, AF1)
212#define GPIO40_MMC1_DAT1 MFP_CFG(GPIO40, AF1)
213#define GPIO41_MMC1_DAT0 MFP_CFG(GPIO41, AF1)
214#define GPIO49_MMC1_CMD MFP_CFG(GPIO49, AF1)
215#define GPIO43_MMC1_CLK MFP_CFG(GPIO43, AF1)
216#define GPIO53_MMC1_CD MFP_CFG(GPIO53, AF1)
217#define GPIO46_MMC1_WP MFP_CFG(GPIO46, AF1)
218
219/* LCD */
220#define GPIO84_LCD_CS MFP_CFG(GPIO84, AF1)
221#define GPIO60_LCD_DD0 MFP_CFG(GPIO60, AF1)
222#define GPIO61_LCD_DD1 MFP_CFG(GPIO61, AF1)
223#define GPIO70_LCD_DD10 MFP_CFG(GPIO70, AF1)
224#define GPIO71_LCD_DD11 MFP_CFG(GPIO71, AF1)
225#define GPIO72_LCD_DD12 MFP_CFG(GPIO72, AF1)
226#define GPIO73_LCD_DD13 MFP_CFG(GPIO73, AF1)
227#define GPIO74_LCD_DD14 MFP_CFG(GPIO74, AF1)
228#define GPIO75_LCD_DD15 MFP_CFG(GPIO75, AF1)
229#define GPIO76_LCD_DD16 MFP_CFG(GPIO76, AF1)
230#define GPIO77_LCD_DD17 MFP_CFG(GPIO77, AF1)
231#define GPIO78_LCD_DD18 MFP_CFG(GPIO78, AF1)
232#define GPIO79_LCD_DD19 MFP_CFG(GPIO79, AF1)
233#define GPIO62_LCD_DD2 MFP_CFG(GPIO62, AF1)
234#define GPIO80_LCD_DD20 MFP_CFG(GPIO80, AF1)
235#define GPIO81_LCD_DD21 MFP_CFG(GPIO81, AF1)
236#define GPIO82_LCD_DD22 MFP_CFG(GPIO82, AF1)
237#define GPIO83_LCD_DD23 MFP_CFG(GPIO83, AF1)
238#define GPIO63_LCD_DD3 MFP_CFG(GPIO63, AF1)
239#define GPIO64_LCD_DD4 MFP_CFG(GPIO64, AF1)
240#define GPIO65_LCD_DD5 MFP_CFG(GPIO65, AF1)
241#define GPIO66_LCD_DD6 MFP_CFG(GPIO66, AF1)
242#define GPIO67_LCD_DD7 MFP_CFG(GPIO67, AF1)
243#define GPIO68_LCD_DD8 MFP_CFG(GPIO68, AF1)
244#define GPIO69_LCD_DD9 MFP_CFG(GPIO69, AF1)
245#define GPIO59_LCD_DENA_BIAS MFP_CFG(GPIO59, AF1)
246#define GPIO56_LCD_FCLK_RD MFP_CFG(GPIO56, AF1)
247#define GPIO57_LCD_LCLK_A0 MFP_CFG(GPIO57, AF1)
248#define GPIO58_LCD_PCLK_WR MFP_CFG(GPIO58, AF1)
249#define GPIO85_LCD_VSYNC MFP_CFG(GPIO85, AF1)
250
251/* I2S */
252#define GPIO113_I2S_MCLK MFP_CFG(GPIO113,AF6)
253#define GPIO114_I2S_FRM MFP_CFG(GPIO114,AF1)
254#define GPIO115_I2S_BCLK MFP_CFG(GPIO115,AF1)
255#define GPIO116_I2S_RXD MFP_CFG(GPIO116,AF2)
256#define GPIO117_I2S_TXD MFP_CFG(GPIO117,AF2)
257
258#endif /* __ASM_MACH_MFP_PXA168_H */
diff --git a/arch/arm/mach-mmp/include/mach/mfp-pxa910.h b/arch/arm/mach-mmp/include/mach/mfp-pxa910.h
new file mode 100644
index 000000000000..48a1cbc7c56b
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/mfp-pxa910.h
@@ -0,0 +1,157 @@
1#ifndef __ASM_MACH_MFP_PXA910_H
2#define __ASM_MACH_MFP_PXA910_H
3
4#include <mach/mfp.h>
5
6/* UART2 */
7#define GPIO47_UART2_RXD MFP_CFG(GPIO47, AF6)
8#define GPIO48_UART2_TXD MFP_CFG(GPIO48, AF6)
9
10/* UART3 */
11#define GPIO31_UART3_RXD MFP_CFG(GPIO31, AF4)
12#define GPIO32_UART3_TXD MFP_CFG(GPIO32, AF4)
13
14/*IRDA*/
15#define GPIO51_IRDA_SHDN MFP_CFG(GPIO51, AF0)
16
17/* SMC */
18#define SM_nCS0_nCS0 MFP_CFG(SM_nCS0, AF0)
19#define SM_ADV_SM_ADV MFP_CFG(SM_ADV, AF0)
20#define SM_SCLK_SM_SCLK MFP_CFG(SM_SCLK, AF0)
21#define SM_SCLK_SM_SCLK MFP_CFG(SM_SCLK, AF0)
22#define SM_BE0_SM_BE0 MFP_CFG(SM_BE0, AF1)
23#define SM_BE1_SM_BE1 MFP_CFG(SM_BE1, AF1)
24
25/* I2C */
26#define GPIO53_CI2C_SCL MFP_CFG(GPIO53, AF2)
27#define GPIO54_CI2C_SDA MFP_CFG(GPIO54, AF2)
28
29/* SSP1 (I2S) */
30#define GPIO24_SSP1_SDATA_IN MFP_CFG_DRV(GPIO24, AF1, MEDIUM)
31#define GPIO21_SSP1_BITCLK MFP_CFG_DRV(GPIO21, AF1, MEDIUM)
32#define GPIO20_SSP1_SYSCLK MFP_CFG_DRV(GPIO20, AF1, MEDIUM)
33#define GPIO22_SSP1_SYNC MFP_CFG_DRV(GPIO22, AF1, MEDIUM)
34#define GPIO23_SSP1_DATA_OUT MFP_CFG_DRV(GPIO23, AF1, MEDIUM)
35#define GPIO124_MN_CLK_OUT MFP_CFG_DRV(GPIO124, AF1, MEDIUM)
36#define GPIO123_CLK_REQ MFP_CFG_DRV(GPIO123, AF0, MEDIUM)
37
38/* DFI */
39#define DF_IO0_ND_IO0 MFP_CFG(DF_IO0, AF0)
40#define DF_IO1_ND_IO1 MFP_CFG(DF_IO1, AF0)
41#define DF_IO2_ND_IO2 MFP_CFG(DF_IO2, AF0)
42#define DF_IO3_ND_IO3 MFP_CFG(DF_IO3, AF0)
43#define DF_IO4_ND_IO4 MFP_CFG(DF_IO4, AF0)
44#define DF_IO5_ND_IO5 MFP_CFG(DF_IO5, AF0)
45#define DF_IO6_ND_IO6 MFP_CFG(DF_IO6, AF0)
46#define DF_IO7_ND_IO7 MFP_CFG(DF_IO7, AF0)
47#define DF_IO8_ND_IO8 MFP_CFG(DF_IO8, AF0)
48#define DF_IO9_ND_IO9 MFP_CFG(DF_IO9, AF0)
49#define DF_IO10_ND_IO10 MFP_CFG(DF_IO10, AF0)
50#define DF_IO11_ND_IO11 MFP_CFG(DF_IO11, AF0)
51#define DF_IO12_ND_IO12 MFP_CFG(DF_IO12, AF0)
52#define DF_IO13_ND_IO13 MFP_CFG(DF_IO13, AF0)
53#define DF_IO14_ND_IO14 MFP_CFG(DF_IO14, AF0)
54#define DF_IO15_ND_IO15 MFP_CFG(DF_IO15, AF0)
55#define DF_nCS0_SM_nCS2_nCS0 MFP_CFG(DF_nCS0_SM_nCS2, AF0)
56#define DF_ALE_SM_WEn_ND_ALE MFP_CFG(DF_ALE_SM_WEn, AF1)
57#define DF_CLE_SM_OEn_ND_CLE MFP_CFG(DF_CLE_SM_OEn, AF0)
58#define DF_WEn_DF_WEn MFP_CFG(DF_WEn, AF1)
59#define DF_REn_DF_REn MFP_CFG(DF_REn, AF1)
60#define DF_RDY0_DF_RDY0 MFP_CFG(DF_RDY0, AF0)
61
62/*keypad*/
63#define GPIO00_KP_MKIN0 MFP_CFG(GPIO0, AF1)
64#define GPIO01_KP_MKOUT0 MFP_CFG(GPIO1, AF1)
65#define GPIO02_KP_MKIN1 MFP_CFG(GPIO2, AF1)
66#define GPIO03_KP_MKOUT1 MFP_CFG(GPIO3, AF1)
67#define GPIO04_KP_MKIN2 MFP_CFG(GPIO4, AF1)
68#define GPIO05_KP_MKOUT2 MFP_CFG(GPIO5, AF1)
69#define GPIO06_KP_MKIN3 MFP_CFG(GPIO6, AF1)
70#define GPIO07_KP_MKOUT3 MFP_CFG(GPIO7, AF1)
71#define GPIO08_KP_MKIN4 MFP_CFG(GPIO8, AF1)
72#define GPIO09_KP_MKOUT4 MFP_CFG(GPIO9, AF1)
73#define GPIO10_KP_MKIN5 MFP_CFG(GPIO10, AF1)
74#define GPIO11_KP_MKOUT5 MFP_CFG(GPIO11, AF1)
75#define GPIO12_KP_MKIN6 MFP_CFG(GPIO12, AF1)
76#define GPIO13_KP_MKOUT6 MFP_CFG(GPIO13, AF1)
77#define GPIO14_KP_MKIN7 MFP_CFG(GPIO14, AF1)
78#define GPIO15_KP_MKOUT7 MFP_CFG(GPIO15, AF1)
79#define GPIO16_KP_DKIN0 MFP_CFG(GPIO16, AF1)
80#define GPIO17_KP_DKIN1 MFP_CFG(GPIO17, AF1)
81#define GPIO18_KP_DKIN2 MFP_CFG(GPIO18, AF1)
82#define GPIO19_KP_DKIN3 MFP_CFG(GPIO19, AF1)
83
84/* LCD */
85#define GPIO81_LCD_FCLK MFP_CFG(GPIO81, AF1)
86#define GPIO82_LCD_LCLK MFP_CFG(GPIO82, AF1)
87#define GPIO83_LCD_PCLK MFP_CFG(GPIO83, AF1)
88#define GPIO84_LCD_DENA MFP_CFG(GPIO84, AF1)
89#define GPIO85_LCD_DD0 MFP_CFG(GPIO85, AF1)
90#define GPIO86_LCD_DD1 MFP_CFG(GPIO86, AF1)
91#define GPIO87_LCD_DD2 MFP_CFG(GPIO87, AF1)
92#define GPIO88_LCD_DD3 MFP_CFG(GPIO88, AF1)
93#define GPIO89_LCD_DD4 MFP_CFG(GPIO89, AF1)
94#define GPIO90_LCD_DD5 MFP_CFG(GPIO90, AF1)
95#define GPIO91_LCD_DD6 MFP_CFG(GPIO91, AF1)
96#define GPIO92_LCD_DD7 MFP_CFG(GPIO92, AF1)
97#define GPIO93_LCD_DD8 MFP_CFG(GPIO93, AF1)
98#define GPIO94_LCD_DD9 MFP_CFG(GPIO94, AF1)
99#define GPIO95_LCD_DD10 MFP_CFG(GPIO95, AF1)
100#define GPIO96_LCD_DD11 MFP_CFG(GPIO96, AF1)
101#define GPIO97_LCD_DD12 MFP_CFG(GPIO97, AF1)
102#define GPIO98_LCD_DD13 MFP_CFG(GPIO98, AF1)
103#define GPIO100_LCD_DD14 MFP_CFG(GPIO100, AF1)
104#define GPIO101_LCD_DD15 MFP_CFG(GPIO101, AF1)
105#define GPIO102_LCD_DD16 MFP_CFG(GPIO102, AF1)
106#define GPIO103_LCD_DD17 MFP_CFG(GPIO103, AF1)
107#define GPIO104_LCD_DD18 MFP_CFG(GPIO104, AF1)
108#define GPIO105_LCD_DD19 MFP_CFG(GPIO105, AF1)
109#define GPIO106_LCD_DD20 MFP_CFG(GPIO106, AF1)
110#define GPIO107_LCD_DD21 MFP_CFG(GPIO107, AF1)
111#define GPIO108_LCD_DD22 MFP_CFG(GPIO108, AF1)
112#define GPIO109_LCD_DD23 MFP_CFG(GPIO109, AF1)
113
114#define GPIO104_LCD_SPIDOUT MFP_CFG(GPIO104, AF3)
115#define GPIO105_LCD_SPIDIN MFP_CFG(GPIO105, AF3)
116#define GPIO107_LCD_CS1 MFP_CFG(GPIO107, AF3)
117#define GPIO108_LCD_DCLK MFP_CFG(GPIO108, AF3)
118
119#define GPIO106_LCD_RESET MFP_CFG(GPIO106, AF0)
120
121/*smart panel*/
122#define GPIO82_LCD_A0 MFP_CFG(GPIO82, AF0)
123#define GPIO83_LCD_WR MFP_CFG(GPIO83, AF0)
124#define GPIO103_LCD_CS MFP_CFG(GPIO103, AF0)
125
126/*1wire*/
127#define GPIO106_1WIRE MFP_CFG(GPIO106, AF3)
128
129/*CCIC*/
130#define GPIO67_CCIC_IN7 MFP_CFG_DRV(GPIO67, AF1, MEDIUM)
131#define GPIO68_CCIC_IN6 MFP_CFG_DRV(GPIO68, AF1, MEDIUM)
132#define GPIO69_CCIC_IN5 MFP_CFG_DRV(GPIO69, AF1, MEDIUM)
133#define GPIO70_CCIC_IN4 MFP_CFG_DRV(GPIO70, AF1, MEDIUM)
134#define GPIO71_CCIC_IN3 MFP_CFG_DRV(GPIO71, AF1, MEDIUM)
135#define GPIO72_CCIC_IN2 MFP_CFG_DRV(GPIO72, AF1, MEDIUM)
136#define GPIO73_CCIC_IN1 MFP_CFG_DRV(GPIO73, AF1, MEDIUM)
137#define GPIO74_CCIC_IN0 MFP_CFG_DRV(GPIO74, AF1, MEDIUM)
138#define GPIO75_CAM_HSYNC MFP_CFG_DRV(GPIO75, AF1, MEDIUM)
139#define GPIO76_CAM_VSYNC MFP_CFG_DRV(GPIO76, AF1, MEDIUM)
140#define GPIO77_CAM_MCLK MFP_CFG_DRV(GPIO77, AF1, MEDIUM)
141#define GPIO78_CAM_PCLK MFP_CFG_DRV(GPIO78, AF1, MEDIUM)
142
143/* MMC1 */
144#define MMC1_DAT7_MMC1_DAT7 MFP_CFG_DRV(MMC1_DAT7, AF0, MEDIUM)
145#define MMC1_DAT6_MMC1_DAT6 MFP_CFG_DRV(MMC1_DAT6, AF0, MEDIUM)
146#define MMC1_DAT5_MMC1_DAT5 MFP_CFG_DRV(MMC1_DAT5, AF0, MEDIUM)
147#define MMC1_DAT4_MMC1_DAT4 MFP_CFG_DRV(MMC1_DAT4, AF0, MEDIUM)
148#define MMC1_DAT3_MMC1_DAT3 MFP_CFG_DRV(MMC1_DAT3, AF0, MEDIUM)
149#define MMC1_DAT2_MMC1_DAT2 MFP_CFG_DRV(MMC1_DAT2, AF0, MEDIUM)
150#define MMC1_DAT1_MMC1_DAT1 MFP_CFG_DRV(MMC1_DAT1, AF0, MEDIUM)
151#define MMC1_DAT0_MMC1_DAT0 MFP_CFG_DRV(MMC1_DAT0, AF0, MEDIUM)
152#define MMC1_CMD_MMC1_CMD MFP_CFG_DRV(MMC1_CMD, AF0, MEDIUM)
153#define MMC1_CLK_MMC1_CLK MFP_CFG_DRV(MMC1_CLK, AF0, MEDIUM)
154#define MMC1_CD_MMC1_CD MFP_CFG_DRV(MMC1_CD, AF0, MEDIUM)
155#define MMC1_WP_MMC1_WP MFP_CFG_DRV(MMC1_WP, AF0, MEDIUM)
156
157#endif /* __ASM_MACH MFP_PXA910_H */
diff --git a/arch/arm/mach-mmp/include/mach/mfp.h b/arch/arm/mach-mmp/include/mach/mfp.h
new file mode 100644
index 000000000000..277ea4cd0f9f
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/mfp.h
@@ -0,0 +1,37 @@
1#ifndef __ASM_MACH_MFP_H
2#define __ASM_MACH_MFP_H
3
4#include <plat/mfp.h>
5
6/*
7 * NOTE: the MFPR register bit definitions on PXA168 processor lines are a
8 * bit different from those on PXA3xx. Bit [7:10] are now reserved, which
9 * were SLEEP_OE_N, SLEEP_DATA, SLEEP_SEL and the LSB of DRIVE bits.
10 *
11 * To cope with this difference and re-use the pxa3xx mfp code as much as
12 * possible, we make the following compromise:
13 *
14 * 1. SLEEP_OE_N will always be programmed to '1' (by MFP_LPM_FLOAT)
15 * 2. DRIVE strength definitions redefined to include the reserved bit10
16 * 3. Override MFP_CFG() and MFP_CFG_DRV()
17 * 4. Drop the use of MFP_CFG_LPM() and MFP_CFG_X()
18 */
19
20#define MFP_DRIVE_VERY_SLOW (0x0 << 13)
21#define MFP_DRIVE_SLOW (0x2 << 13)
22#define MFP_DRIVE_MEDIUM (0x4 << 13)
23#define MFP_DRIVE_FAST (0x8 << 13)
24
25#undef MFP_CFG
26#undef MFP_CFG_DRV
27#undef MFP_CFG_LPM
28#undef MFP_CFG_X
29#undef MFP_CFG_DEFAULT
30
31#define MFP_CFG(pin, af) \
32 (MFP_LPM_FLOAT | MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DRIVE_MEDIUM)
33
34#define MFP_CFG_DRV(pin, af, drv) \
35 (MFP_LPM_FLOAT | MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_DRIVE_##drv)
36
37#endif /* __ASM_MACH_MFP_H */
diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h
new file mode 100644
index 000000000000..ef0a8a2076e9
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/pxa168.h
@@ -0,0 +1,23 @@
1#ifndef __ASM_MACH_PXA168_H
2#define __ASM_MACH_PXA168_H
3
4#include <mach/devices.h>
5
6extern struct pxa_device_desc pxa168_device_uart1;
7extern struct pxa_device_desc pxa168_device_uart2;
8
9static inline int pxa168_add_uart(int id)
10{
11 struct pxa_device_desc *d = NULL;
12
13 switch (id) {
14 case 1: d = &pxa168_device_uart1; break;
15 case 2: d = &pxa168_device_uart2; break;
16 }
17
18 if (d == NULL)
19 return -EINVAL;
20
21 return pxa_register_device(d, NULL, 0);
22}
23#endif /* __ASM_MACH_PXA168_H */
diff --git a/arch/arm/mach-mmp/include/mach/pxa910.h b/arch/arm/mach-mmp/include/mach/pxa910.h
new file mode 100644
index 000000000000..b7aeaf574c36
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/pxa910.h
@@ -0,0 +1,23 @@
1#ifndef __ASM_MACH_PXA910_H
2#define __ASM_MACH_PXA910_H
3
4#include <mach/devices.h>
5
6extern struct pxa_device_desc pxa910_device_uart1;
7extern struct pxa_device_desc pxa910_device_uart2;
8
9static inline int pxa910_add_uart(int id)
10{
11 struct pxa_device_desc *d = NULL;
12
13 switch (id) {
14 case 1: d = &pxa910_device_uart1; break;
15 case 2: d = &pxa910_device_uart2; break;
16 }
17
18 if (d == NULL)
19 return -EINVAL;
20
21 return pxa_register_device(d, NULL, 0);
22}
23#endif /* __ASM_MACH_PXA910_H */
diff --git a/arch/arm/mach-mmp/include/mach/regs-apbc.h b/arch/arm/mach-mmp/include/mach/regs-apbc.h
new file mode 100644
index 000000000000..c6b8c9dc2026
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/regs-apbc.h
@@ -0,0 +1,78 @@
1/*
2 * linux/arch/arm/mach-mmp/include/mach/regs-apbc.h
3 *
4 * Application Peripheral Bus Clock Unit
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_MACH_REGS_APBC_H
12#define __ASM_MACH_REGS_APBC_H
13
14#include <mach/addr-map.h>
15
16#define APBC_VIRT_BASE (APB_VIRT_BASE + 0x015000)
17#define APBC_REG(x) (APBC_VIRT_BASE + (x))
18
19/*
20 * APB clock register offsets for PXA168
21 */
22#define APBC_PXA168_UART1 APBC_REG(0x000)
23#define APBC_PXA168_UART2 APBC_REG(0x004)
24#define APBC_PXA168_GPIO APBC_REG(0x008)
25#define APBC_PXA168_PWM0 APBC_REG(0x00c)
26#define APBC_PXA168_PWM1 APBC_REG(0x010)
27#define APBC_PXA168_SSP1 APBC_REG(0x01c)
28#define APBC_PXA168_SSP2 APBC_REG(0x020)
29#define APBC_PXA168_RTC APBC_REG(0x028)
30#define APBC_PXA168_TWSI0 APBC_REG(0x02c)
31#define APBC_PXA168_KPC APBC_REG(0x030)
32#define APBC_PXA168_TIMERS APBC_REG(0x034)
33#define APBC_PXA168_AIB APBC_REG(0x03c)
34#define APBC_PXA168_SW_JTAG APBC_REG(0x040)
35#define APBC_PXA168_ONEWIRE APBC_REG(0x048)
36#define APBC_PXA168_SSP3 APBC_REG(0x04c)
37#define APBC_PXA168_ASFAR APBC_REG(0x050)
38#define APBC_PXA168_ASSAR APBC_REG(0x054)
39#define APBC_PXA168_SSP4 APBC_REG(0x058)
40#define APBC_PXA168_SSP5 APBC_REG(0x05c)
41#define APBC_PXA168_TWSI1 APBC_REG(0x06c)
42#define APBC_PXA168_UART3 APBC_REG(0x070)
43#define APBC_PXA168_AC97 APBC_REG(0x084)
44
45/*
46 * APB Clock register offsets for PXA910
47 */
48#define APBC_PXA910_UART0 APBC_REG(0x000)
49#define APBC_PXA910_UART1 APBC_REG(0x004)
50#define APBC_PXA910_GPIO APBC_REG(0x008)
51#define APBC_PXA910_PWM0 APBC_REG(0x00c)
52#define APBC_PXA910_PWM1 APBC_REG(0x010)
53#define APBC_PXA910_PWM2 APBC_REG(0x014)
54#define APBC_PXA910_PWM3 APBC_REG(0x018)
55#define APBC_PXA910_SSP1 APBC_REG(0x01c)
56#define APBC_PXA910_SSP2 APBC_REG(0x020)
57#define APBC_PXA910_IPC APBC_REG(0x024)
58#define APBC_PXA910_TWSI0 APBC_REG(0x02c)
59#define APBC_PXA910_KPC APBC_REG(0x030)
60#define APBC_PXA910_TIMERS APBC_REG(0x034)
61#define APBC_PXA910_TBROT APBC_REG(0x038)
62#define APBC_PXA910_AIB APBC_REG(0x03c)
63#define APBC_PXA910_SW_JTAG APBC_REG(0x040)
64#define APBC_PXA910_TIMERS1 APBC_REG(0x044)
65#define APBC_PXA910_ONEWIRE APBC_REG(0x048)
66#define APBC_PXA910_SSP3 APBC_REG(0x04c)
67#define APBC_PXA910_ASFAR APBC_REG(0x050)
68#define APBC_PXA910_ASSAR APBC_REG(0x054)
69
70/* Common APB clock register bit definitions */
71#define APBC_APBCLK (1 << 0) /* APB Bus Clock Enable */
72#define APBC_FNCLK (1 << 1) /* Functional Clock Enable */
73#define APBC_RST (1 << 2) /* Reset Generation */
74
75/* Functional Clock Selection Mask */
76#define APBC_FNCLKSEL(x) (((x) & 0xf) << 4)
77
78#endif /* __ASM_MACH_REGS_APBC_H */
diff --git a/arch/arm/mach-mmp/include/mach/regs-apmu.h b/arch/arm/mach-mmp/include/mach/regs-apmu.h
new file mode 100644
index 000000000000..919030514120
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/regs-apmu.h
@@ -0,0 +1,36 @@
1/*
2 * linux/arch/arm/mach-mmp/include/mach/regs-apmu.h
3 *
4 * Application Subsystem Power Management Unit
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_MACH_REGS_APMU_H
12#define __ASM_MACH_REGS_APMU_H
13
14#include <mach/addr-map.h>
15
16#define APMU_VIRT_BASE (AXI_VIRT_BASE + 0x82800)
17#define APMU_REG(x) (APMU_VIRT_BASE + (x))
18
19/* Clock Reset Control */
20#define APMU_IRE APMU_REG(0x048)
21#define APMU_LCD APMU_REG(0x04c)
22#define APMU_CCIC APMU_REG(0x050)
23#define APMU_SDH0 APMU_REG(0x054)
24#define APMU_SDH1 APMU_REG(0x058)
25#define APMU_USB APMU_REG(0x05c)
26#define APMU_NAND APMU_REG(0x060)
27#define APMU_DMA APMU_REG(0x064)
28#define APMU_GEU APMU_REG(0x068)
29#define APMU_BUS APMU_REG(0x06c)
30
31#define APMU_FNCLK_EN (1 << 4)
32#define APMU_AXICLK_EN (1 << 3)
33#define APMU_FNRST_DIS (1 << 1)
34#define APMU_AXIRST_DIS (1 << 0)
35
36#endif /* __ASM_MACH_REGS_APMU_H */
diff --git a/arch/arm/mach-mmp/include/mach/regs-icu.h b/arch/arm/mach-mmp/include/mach/regs-icu.h
new file mode 100644
index 000000000000..e5f08723e0cc
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/regs-icu.h
@@ -0,0 +1,31 @@
1/*
2 * linux/arch/arm/mach-mmp/include/mach/regs-icu.h
3 *
4 * Interrupt Control Unit
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_MACH_ICU_H
12#define __ASM_MACH_ICU_H
13
14#include <mach/addr-map.h>
15
16#define ICU_VIRT_BASE (AXI_VIRT_BASE + 0x82000)
17#define ICU_REG(x) (ICU_VIRT_BASE + (x))
18
19#define ICU_INT_CONF(n) ICU_REG((n) << 2)
20#define ICU_INT_CONF_AP_INT (1 << 6)
21#define ICU_INT_CONF_CP_INT (1 << 5)
22#define ICU_INT_CONF_IRQ (1 << 4)
23#define ICU_INT_CONF_MASK (0xf)
24
25#define ICU_AP_FIQ_SEL_INT_NUM ICU_REG(0x108) /* AP FIQ Selected Interrupt */
26#define ICU_AP_IRQ_SEL_INT_NUM ICU_REG(0x10C) /* AP IRQ Selected Interrupt */
27#define ICU_AP_GBL_IRQ_MSK ICU_REG(0x114) /* AP Global Interrupt Mask */
28#define ICU_INT_STATUS_0 ICU_REG(0x128) /* Interrupt Stuats 0 */
29#define ICU_INT_STATUS_1 ICU_REG(0x12C) /* Interrupt Status 1 */
30
31#endif /* __ASM_MACH_ICU_H */
diff --git a/arch/arm/mach-mmp/include/mach/regs-timers.h b/arch/arm/mach-mmp/include/mach/regs-timers.h
new file mode 100644
index 000000000000..45589fec9fc7
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/regs-timers.h
@@ -0,0 +1,44 @@
1/*
2 * linux/arch/arm/mach-mmp/include/mach/regs-timers.h
3 *
4 * Timers Module
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_MACH_REGS_TIMERS_H
12#define __ASM_MACH_REGS_TIMERS_H
13
14#include <mach/addr-map.h>
15
16#define TIMERS1_VIRT_BASE (APB_VIRT_BASE + 0x14000)
17#define TIMERS2_VIRT_BASE (APB_VIRT_BASE + 0x16000)
18
19#define TMR_CCR (0x0000)
20#define TMR_TN_MM(n, m) (0x0004 + ((n) << 3) + (((n) + (m)) << 2))
21#define TMR_CR(n) (0x0028 + ((n) << 2))
22#define TMR_SR(n) (0x0034 + ((n) << 2))
23#define TMR_IER(n) (0x0040 + ((n) << 2))
24#define TMR_PLVR(n) (0x004c + ((n) << 2))
25#define TMR_PLCR(n) (0x0058 + ((n) << 2))
26#define TMR_WMER (0x0064)
27#define TMR_WMR (0x0068)
28#define TMR_WVR (0x006c)
29#define TMR_WSR (0x0070)
30#define TMR_ICR(n) (0x0074 + ((n) << 2))
31#define TMR_WICR (0x0080)
32#define TMR_CER (0x0084)
33#define TMR_CMR (0x0088)
34#define TMR_ILR(n) (0x008c + ((n) << 2))
35#define TMR_WCR (0x0098)
36#define TMR_WFAR (0x009c)
37#define TMR_WSAR (0x00A0)
38#define TMR_CVWR(n) (0x00A4 + ((n) << 2))
39
40#define TMR_CCR_CS_0(x) (((x) & 0x3) << 0)
41#define TMR_CCR_CS_1(x) (((x) & 0x7) << 2)
42#define TMR_CCR_CS_2(x) (((x) & 0x3) << 5)
43
44#endif /* __ASM_MACH_REGS_TIMERS_H */
diff --git a/arch/arm/mach-mmp/include/mach/system.h b/arch/arm/mach-mmp/include/mach/system.h
new file mode 100644
index 000000000000..001edfefec19
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/system.h
@@ -0,0 +1,21 @@
1/*
2 * linux/arch/arm/mach-mmp/include/mach/system.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#ifndef __ASM_MACH_SYSTEM_H
10#define __ASM_MACH_SYSTEM_H
11
12static inline void arch_idle(void)
13{
14 cpu_do_idle();
15}
16
17static inline void arch_reset(char mode)
18{
19 cpu_reset(0);
20}
21#endif /* __ASM_MACH_SYSTEM_H */
diff --git a/arch/arm/mach-mmp/include/mach/timex.h b/arch/arm/mach-mmp/include/mach/timex.h
new file mode 100644
index 000000000000..6cebbd0ca8f4
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/timex.h
@@ -0,0 +1,9 @@
1/*
2 * linux/arch/arm/mach-mmp/include/mach/timex.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#define CLOCK_TICK_RATE 3250000
diff --git a/arch/arm/mach-mmp/include/mach/uncompress.h b/arch/arm/mach-mmp/include/mach/uncompress.h
new file mode 100644
index 000000000000..c93d5fa5865c
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/uncompress.h
@@ -0,0 +1,41 @@
1/*
2 * arch/arm/mach-mmp/include/mach/uncompress.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#include <linux/serial_reg.h>
10#include <mach/addr-map.h>
11
12#define UART1_BASE (APB_PHYS_BASE + 0x36000)
13#define UART2_BASE (APB_PHYS_BASE + 0x17000)
14#define UART3_BASE (APB_PHYS_BASE + 0x18000)
15
16static inline void putc(char c)
17{
18 volatile unsigned long *UART = (unsigned long *)UART2_BASE;
19
20 /* UART enabled? */
21 if (!(UART[UART_IER] & UART_IER_UUE))
22 return;
23
24 while (!(UART[UART_LSR] & UART_LSR_THRE))
25 barrier();
26
27 UART[UART_TX] = c;
28}
29
30/*
31 * This does not append a newline
32 */
33static inline void flush(void)
34{
35}
36
37/*
38 * nothing to do
39 */
40#define arch_decomp_setup()
41#define arch_decomp_wdog()
diff --git a/arch/arm/mach-mmp/include/mach/vmalloc.h b/arch/arm/mach-mmp/include/mach/vmalloc.h
new file mode 100644
index 000000000000..b60ccaf9fee7
--- /dev/null
+++ b/arch/arm/mach-mmp/include/mach/vmalloc.h
@@ -0,0 +1,5 @@
1/*
2 * linux/arch/arm/mach-mmp/include/mach/vmalloc.h
3 */
4
5#define VMALLOC_END 0xfe000000
diff --git a/arch/arm/mach-mmp/irq.c b/arch/arm/mach-mmp/irq.c
new file mode 100644
index 000000000000..52ff2f065eba
--- /dev/null
+++ b/arch/arm/mach-mmp/irq.c
@@ -0,0 +1,55 @@
1/*
2 * linux/arch/arm/mach-mmp/irq.c
3 *
4 * Generic IRQ handling, GPIO IRQ demultiplexing, etc.
5 *
6 * Author: Bin Yang <bin.yang@marvell.com>
7 * Created: Sep 30, 2008
8 * Copyright: Marvell International Ltd.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/init.h>
16#include <linux/irq.h>
17#include <linux/io.h>
18
19#include <mach/regs-icu.h>
20
21#include "common.h"
22
23#define IRQ_ROUTE_TO_AP (ICU_INT_CONF_AP_INT | ICU_INT_CONF_IRQ)
24
25#define PRIORITY_DEFAULT 0x1
26#define PRIORITY_NONE 0x0 /* means IRQ disabled */
27
28static void icu_mask_irq(unsigned int irq)
29{
30 __raw_writel(PRIORITY_NONE, ICU_INT_CONF(irq));
31}
32
33static void icu_unmask_irq(unsigned int irq)
34{
35 __raw_writel(IRQ_ROUTE_TO_AP | PRIORITY_DEFAULT, ICU_INT_CONF(irq));
36}
37
38static struct irq_chip icu_irq_chip = {
39 .name = "icu_irq",
40 .ack = icu_mask_irq,
41 .mask = icu_mask_irq,
42 .unmask = icu_unmask_irq,
43};
44
45void __init icu_init_irq(void)
46{
47 int irq;
48
49 for (irq = 0; irq < 64; irq++) {
50 icu_mask_irq(irq);
51 set_irq_chip(irq, &icu_irq_chip);
52 set_irq_handler(irq, handle_level_irq);
53 set_irq_flags(irq, IRQF_VALID);
54 }
55}
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
new file mode 100644
index 000000000000..ae924468658c
--- /dev/null
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -0,0 +1,111 @@
1/*
2 * linux/arch/arm/mach-mmp/pxa168.c
3 *
4 * Code specific to PXA168
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/module.h>
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/list.h>
15#include <linux/io.h>
16#include <linux/clk.h>
17
18#include <asm/mach/time.h>
19#include <mach/addr-map.h>
20#include <mach/cputype.h>
21#include <mach/regs-apbc.h>
22#include <mach/irqs.h>
23#include <mach/gpio.h>
24#include <mach/dma.h>
25#include <mach/devices.h>
26#include <mach/mfp.h>
27
28#include "common.h"
29#include "clock.h"
30
31#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
32
33static struct mfp_addr_map pxa168_mfp_addr_map[] __initdata =
34{
35 MFP_ADDR_X(GPIO0, GPIO36, 0x04c),
36 MFP_ADDR_X(GPIO37, GPIO55, 0x000),
37 MFP_ADDR_X(GPIO56, GPIO123, 0x0e0),
38 MFP_ADDR_X(GPIO124, GPIO127, 0x0f4),
39
40 MFP_ADDR_END,
41};
42
43#define APMASK(i) (GPIO_REGS_VIRT + BANK_OFF(i) + 0x09c)
44
45static void __init pxa168_init_gpio(void)
46{
47 int i;
48
49 /* enable GPIO clock */
50 __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_PXA168_GPIO);
51
52 /* unmask GPIO edge detection for all 4 banks - APMASKx */
53 for (i = 0; i < 4; i++)
54 __raw_writel(0xffffffff, APMASK(i));
55
56 pxa_init_gpio(IRQ_PXA168_GPIOX, 0, 127, NULL);
57}
58
59void __init pxa168_init_irq(void)
60{
61 icu_init_irq();
62 pxa168_init_gpio();
63}
64
65/* APB peripheral clocks */
66static APBC_CLK(uart1, PXA168_UART1, 1, 14745600);
67static APBC_CLK(uart2, PXA168_UART2, 1, 14745600);
68
69/* device and clock bindings */
70static struct clk_lookup pxa168_clkregs[] = {
71 INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
72 INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL),
73};
74
75static int __init pxa168_init(void)
76{
77 if (cpu_is_pxa168()) {
78 mfp_init_base(MFPR_VIRT_BASE);
79 mfp_init_addr(pxa168_mfp_addr_map);
80 pxa_init_dma(IRQ_PXA168_DMA_INT0, 32);
81 clks_register(ARRAY_AND_SIZE(pxa168_clkregs));
82 }
83
84 return 0;
85}
86postcore_initcall(pxa168_init);
87
88/* system timer - clock enabled, 3.25MHz */
89#define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3))
90
91static void __init pxa168_timer_init(void)
92{
93 /* this is early, we have to initialize the CCU registers by
94 * ourselves instead of using clk_* API. Clock rate is defined
95 * by APBC_TIMERS_CLK_RST (3.25MHz) and enabled free-running
96 */
97 __raw_writel(APBC_APBCLK | APBC_RST, APBC_PXA168_TIMERS);
98
99 /* 3.25MHz, bus/functional clock enabled, release reset */
100 __raw_writel(TIMER_CLK_RST, APBC_PXA168_TIMERS);
101
102 timer_init(IRQ_PXA168_TIMER1);
103}
104
105struct sys_timer pxa168_timer = {
106 .init = pxa168_timer_init,
107};
108
109/* on-chip devices */
110PXA168_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4017000, 0x30, 21, 22);
111PXA168_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4018000, 0x30, 23, 24);
diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c
new file mode 100644
index 000000000000..453f8f7758bf
--- /dev/null
+++ b/arch/arm/mach-mmp/pxa910.c
@@ -0,0 +1,158 @@
1/*
2 * linux/arch/arm/mach-mmp/pxa910.c
3 *
4 * Code specific to PXA910
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/module.h>
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/list.h>
15#include <linux/io.h>
16
17#include <asm/mach/time.h>
18#include <mach/addr-map.h>
19#include <mach/regs-apbc.h>
20#include <mach/regs-apmu.h>
21#include <mach/cputype.h>
22#include <mach/irqs.h>
23#include <mach/gpio.h>
24#include <mach/dma.h>
25#include <mach/mfp.h>
26#include <mach/devices.h>
27
28#include "common.h"
29#include "clock.h"
30
31#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
32
33static struct mfp_addr_map pxa910_mfp_addr_map[] __initdata =
34{
35 MFP_ADDR_X(GPIO0, GPIO54, 0xdc),
36 MFP_ADDR_X(GPIO67, GPIO98, 0x1b8),
37 MFP_ADDR_X(GPIO100, GPIO109, 0x238),
38
39 MFP_ADDR(GPIO123, 0xcc),
40 MFP_ADDR(GPIO124, 0xd0),
41
42 MFP_ADDR(DF_IO0, 0x40),
43 MFP_ADDR(DF_IO1, 0x3c),
44 MFP_ADDR(DF_IO2, 0x38),
45 MFP_ADDR(DF_IO3, 0x34),
46 MFP_ADDR(DF_IO4, 0x30),
47 MFP_ADDR(DF_IO5, 0x2c),
48 MFP_ADDR(DF_IO6, 0x28),
49 MFP_ADDR(DF_IO7, 0x24),
50 MFP_ADDR(DF_IO8, 0x20),
51 MFP_ADDR(DF_IO9, 0x1c),
52 MFP_ADDR(DF_IO10, 0x18),
53 MFP_ADDR(DF_IO11, 0x14),
54 MFP_ADDR(DF_IO12, 0x10),
55 MFP_ADDR(DF_IO13, 0xc),
56 MFP_ADDR(DF_IO14, 0x8),
57 MFP_ADDR(DF_IO15, 0x4),
58
59 MFP_ADDR(DF_nCS0_SM_nCS2, 0x44),
60 MFP_ADDR(DF_nCS1_SM_nCS3, 0x48),
61 MFP_ADDR(SM_nCS0, 0x4c),
62 MFP_ADDR(SM_nCS1, 0x50),
63 MFP_ADDR(DF_WEn, 0x54),
64 MFP_ADDR(DF_REn, 0x58),
65 MFP_ADDR(DF_CLE_SM_OEn, 0x5c),
66 MFP_ADDR(DF_ALE_SM_WEn, 0x60),
67 MFP_ADDR(SM_SCLK, 0x64),
68 MFP_ADDR(DF_RDY0, 0x68),
69 MFP_ADDR(SM_BE0, 0x6c),
70 MFP_ADDR(SM_BE1, 0x70),
71 MFP_ADDR(SM_ADV, 0x74),
72 MFP_ADDR(DF_RDY1, 0x78),
73 MFP_ADDR(SM_ADVMUX, 0x7c),
74 MFP_ADDR(SM_RDY, 0x80),
75
76 MFP_ADDR_X(MMC1_DAT7, MMC1_WP, 0x84),
77
78 MFP_ADDR_END,
79};
80
81#define APMASK(i) (GPIO_REGS_VIRT + BANK_OFF(i) + 0x09c)
82
83static void __init pxa910_init_gpio(void)
84{
85 int i;
86
87 /* enable GPIO clock */
88 __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_PXA910_GPIO);
89
90 /* unmask GPIO edge detection for all 4 banks - APMASKx */
91 for (i = 0; i < 4; i++)
92 __raw_writel(0xffffffff, APMASK(i));
93
94 pxa_init_gpio(IRQ_PXA910_AP_GPIO, 0, 127, NULL);
95}
96
97void __init pxa910_init_irq(void)
98{
99 icu_init_irq();
100 pxa910_init_gpio();
101}
102
103/* APB peripheral clocks */
104static APBC_CLK(uart1, PXA910_UART0, 1, 14745600);
105static APBC_CLK(uart2, PXA910_UART1, 1, 14745600);
106
107/* device and clock bindings */
108static struct clk_lookup pxa910_clkregs[] = {
109 INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
110 INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL),
111};
112
113static int __init pxa910_init(void)
114{
115 if (cpu_is_pxa910()) {
116 mfp_init_base(MFPR_VIRT_BASE);
117 mfp_init_addr(pxa910_mfp_addr_map);
118 pxa_init_dma(IRQ_PXA910_DMA_INT0, 32);
119 clks_register(ARRAY_AND_SIZE(pxa910_clkregs));
120 }
121
122 return 0;
123}
124postcore_initcall(pxa910_init);
125
126/* system timer - clock enabled, 3.25MHz */
127#define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3))
128
129static void __init pxa910_timer_init(void)
130{
131 /* reset and configure */
132 __raw_writel(APBC_APBCLK | APBC_RST, APBC_PXA910_TIMERS);
133 __raw_writel(TIMER_CLK_RST, APBC_PXA910_TIMERS);
134
135 timer_init(IRQ_PXA910_AP1_TIMER1);
136}
137
138struct sys_timer pxa910_timer = {
139 .init = pxa910_timer_init,
140};
141
142/* on-chip devices */
143
144/* NOTE: there are totally 3 UARTs on PXA910:
145 *
146 * UART1 - Slow UART (can be used both by AP and CP)
147 * UART2/3 - Fast UART
148 *
149 * To be backward compatible with the legacy FFUART/BTUART/STUART sequence,
150 * they are re-ordered as:
151 *
152 * pxa910_device_uart1 - UART2 as FFUART
153 * pxa910_device_uart2 - UART3 as BTUART
154 *
155 * UART1 is not used by AP for the moment.
156 */
157PXA910_DEVICE(uart1, "pxa2xx-uart", 0, UART2, 0xd4017000, 0x30, 21, 22);
158PXA910_DEVICE(uart2, "pxa2xx-uart", 1, UART3, 0xd4018000, 0x30, 23, 24);
diff --git a/arch/arm/mach-mmp/tavorevb.c b/arch/arm/mach-mmp/tavorevb.c
new file mode 100644
index 000000000000..0e0c9220eaba
--- /dev/null
+++ b/arch/arm/mach-mmp/tavorevb.c
@@ -0,0 +1,109 @@
1/*
2 * linux/arch/arm/mach-mmp/tavorevb.c
3 *
4 * Support for the Marvell PXA910-based TavorEVB Development Platform.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * publishhed by the Free Software Foundation.
9 */
10
11#include <linux/init.h>
12#include <linux/kernel.h>
13#include <linux/platform_device.h>
14#include <linux/smc91x.h>
15
16#include <asm/mach-types.h>
17#include <asm/mach/arch.h>
18#include <mach/addr-map.h>
19#include <mach/mfp-pxa910.h>
20#include <mach/pxa910.h>
21#include <mach/gpio.h>
22
23#include "common.h"
24
25static unsigned long tavorevb_pin_config[] __initdata = {
26 /* UART2 */
27 GPIO47_UART2_RXD,
28 GPIO48_UART2_TXD,
29
30 /* SMC */
31 SM_nCS0_nCS0,
32 SM_ADV_SM_ADV,
33 SM_SCLK_SM_SCLK,
34 SM_SCLK_SM_SCLK,
35 SM_BE0_SM_BE0,
36 SM_BE1_SM_BE1,
37
38 /* DFI */
39 DF_IO0_ND_IO0,
40 DF_IO1_ND_IO1,
41 DF_IO2_ND_IO2,
42 DF_IO3_ND_IO3,
43 DF_IO4_ND_IO4,
44 DF_IO5_ND_IO5,
45 DF_IO6_ND_IO6,
46 DF_IO7_ND_IO7,
47 DF_IO8_ND_IO8,
48 DF_IO9_ND_IO9,
49 DF_IO10_ND_IO10,
50 DF_IO11_ND_IO11,
51 DF_IO12_ND_IO12,
52 DF_IO13_ND_IO13,
53 DF_IO14_ND_IO14,
54 DF_IO15_ND_IO15,
55 DF_nCS0_SM_nCS2_nCS0,
56 DF_ALE_SM_WEn_ND_ALE,
57 DF_CLE_SM_OEn_ND_CLE,
58 DF_WEn_DF_WEn,
59 DF_REn_DF_REn,
60 DF_RDY0_DF_RDY0,
61};
62
63static struct smc91x_platdata tavorevb_smc91x_info = {
64 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
65};
66
67static struct resource smc91x_resources[] = {
68 [0] = {
69 .start = SMC_CS1_PHYS_BASE + 0x300,
70 .end = SMC_CS1_PHYS_BASE + 0xfffff,
71 .flags = IORESOURCE_MEM,
72 },
73 [1] = {
74 .start = gpio_to_irq(80),
75 .end = gpio_to_irq(80),
76 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
77 }
78};
79
80static struct platform_device smc91x_device = {
81 .name = "smc91x",
82 .id = 0,
83 .dev = {
84 .platform_data = &tavorevb_smc91x_info,
85 },
86 .num_resources = ARRAY_SIZE(smc91x_resources),
87 .resource = smc91x_resources,
88};
89
90static void __init tavorevb_init(void)
91{
92 mfp_config(ARRAY_AND_SIZE(tavorevb_pin_config));
93
94 /* on-chip devices */
95 pxa910_add_uart(1);
96
97 /* off-chip devices */
98 platform_device_register(&smc91x_device);
99}
100
101MACHINE_START(TAVOREVB, "PXA910 Evaluation Board (aka TavorEVB)")
102 .phys_io = APB_PHYS_BASE,
103 .boot_params = 0x00000100,
104 .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc,
105 .map_io = pxa_map_io,
106 .init_irq = pxa910_init_irq,
107 .timer = &pxa910_timer,
108 .init_machine = tavorevb_init,
109MACHINE_END
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c
new file mode 100644
index 000000000000..b03a6eda7419
--- /dev/null
+++ b/arch/arm/mach-mmp/time.c
@@ -0,0 +1,199 @@
1/*
2 * linux/arch/arm/mach-mmp/time.c
3 *
4 * Support for clocksource and clockevents
5 *
6 * Copyright (C) 2008 Marvell International Ltd.
7 * All rights reserved.
8 *
9 * 2008-04-11: Jason Chagas <Jason.chagas@marvell.com>
10 * 2008-10-08: Bin Yang <bin.yang@marvell.com>
11 *
12 * The timers module actually includes three timers, each timer with upto
13 * three match comparators. Timer #0 is used here in free-running mode as
14 * the clock source, and match comparator #1 used as clock event device.
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License version 2 as
18 * published by the Free Software Foundation.
19 */
20
21#include <linux/init.h>
22#include <linux/kernel.h>
23#include <linux/interrupt.h>
24#include <linux/clockchips.h>
25
26#include <linux/io.h>
27#include <linux/irq.h>
28#include <linux/sched.h>
29#include <linux/cnt32_to_63.h>
30
31#include <mach/addr-map.h>
32#include <mach/regs-timers.h>
33#include <mach/irqs.h>
34
35#include "clock.h"
36
37#define TIMERS_VIRT_BASE TIMERS1_VIRT_BASE
38
39#define MAX_DELTA (0xfffffffe)
40#define MIN_DELTA (16)
41
42#define TCR2NS_SCALE_FACTOR 10
43
44static unsigned long tcr2ns_scale;
45
46static void __init set_tcr2ns_scale(unsigned long tcr_rate)
47{
48 unsigned long long v = 1000000000ULL << TCR2NS_SCALE_FACTOR;
49 do_div(v, tcr_rate);
50 tcr2ns_scale = v;
51 /*
52 * We want an even value to automatically clear the top bit
53 * returned by cnt32_to_63() without an additional run time
54 * instruction. So if the LSB is 1 then round it up.
55 */
56 if (tcr2ns_scale & 1)
57 tcr2ns_scale++;
58}
59
60/*
61 * FIXME: the timer needs some delay to stablize the counter capture
62 */
63static inline uint32_t timer_read(void)
64{
65 int delay = 100;
66
67 __raw_writel(1, TIMERS_VIRT_BASE + TMR_CVWR(0));
68
69 while (delay--)
70 cpu_relax();
71
72 return __raw_readl(TIMERS_VIRT_BASE + TMR_CVWR(0));
73}
74
75unsigned long long sched_clock(void)
76{
77 unsigned long long v = cnt32_to_63(timer_read());
78 return (v * tcr2ns_scale) >> TCR2NS_SCALE_FACTOR;
79}
80
81static irqreturn_t timer_interrupt(int irq, void *dev_id)
82{
83 struct clock_event_device *c = dev_id;
84
85 /* disable and clear pending interrupt status */
86 __raw_writel(0x0, TIMERS_VIRT_BASE + TMR_IER(0));
87 __raw_writel(0x1, TIMERS_VIRT_BASE + TMR_ICR(0));
88 c->event_handler(c);
89 return IRQ_HANDLED;
90}
91
92static int timer_set_next_event(unsigned long delta,
93 struct clock_event_device *dev)
94{
95 unsigned long flags, next;
96
97 local_irq_save(flags);
98
99 /* clear pending interrupt status and enable */
100 __raw_writel(0x01, TIMERS_VIRT_BASE + TMR_ICR(0));
101 __raw_writel(0x01, TIMERS_VIRT_BASE + TMR_IER(0));
102
103 next = timer_read() + delta;
104 __raw_writel(next, TIMERS_VIRT_BASE + TMR_TN_MM(0, 0));
105
106 local_irq_restore(flags);
107 return 0;
108}
109
110static void timer_set_mode(enum clock_event_mode mode,
111 struct clock_event_device *dev)
112{
113 unsigned long flags;
114
115 local_irq_save(flags);
116 switch (mode) {
117 case CLOCK_EVT_MODE_ONESHOT:
118 case CLOCK_EVT_MODE_UNUSED:
119 case CLOCK_EVT_MODE_SHUTDOWN:
120 /* disable the matching interrupt */
121 __raw_writel(0x00, TIMERS_VIRT_BASE + TMR_IER(0));
122 break;
123 case CLOCK_EVT_MODE_RESUME:
124 case CLOCK_EVT_MODE_PERIODIC:
125 break;
126 }
127 local_irq_restore(flags);
128}
129
130static struct clock_event_device ckevt = {
131 .name = "clockevent",
132 .features = CLOCK_EVT_FEAT_ONESHOT,
133 .shift = 32,
134 .rating = 200,
135 .set_next_event = timer_set_next_event,
136 .set_mode = timer_set_mode,
137};
138
139static cycle_t clksrc_read(void)
140{
141 return timer_read();
142}
143
144static struct clocksource cksrc = {
145 .name = "clocksource",
146 .shift = 20,
147 .rating = 200,
148 .read = clksrc_read,
149 .mask = CLOCKSOURCE_MASK(32),
150 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
151};
152
153static void __init timer_config(void)
154{
155 uint32_t ccr = __raw_readl(TIMERS_VIRT_BASE + TMR_CCR);
156 uint32_t cer = __raw_readl(TIMERS_VIRT_BASE + TMR_CER);
157 uint32_t cmr = __raw_readl(TIMERS_VIRT_BASE + TMR_CMR);
158
159 __raw_writel(cer & ~0x1, TIMERS_VIRT_BASE + TMR_CER); /* disable */
160
161 ccr &= TMR_CCR_CS_0(0x3);
162 __raw_writel(ccr, TIMERS_VIRT_BASE + TMR_CCR);
163
164 /* free-running mode */
165 __raw_writel(cmr | 0x01, TIMERS_VIRT_BASE + TMR_CMR);
166
167 __raw_writel(0x0, TIMERS_VIRT_BASE + TMR_PLCR(0)); /* free-running */
168 __raw_writel(0x7, TIMERS_VIRT_BASE + TMR_ICR(0)); /* clear status */
169 __raw_writel(0x0, TIMERS_VIRT_BASE + TMR_IER(0));
170
171 /* enable timer counter */
172 __raw_writel(cer | 0x01, TIMERS_VIRT_BASE + TMR_CER);
173}
174
175static struct irqaction timer_irq = {
176 .name = "timer",
177 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
178 .handler = timer_interrupt,
179 .dev_id = &ckevt,
180};
181
182void __init timer_init(int irq)
183{
184 timer_config();
185
186 set_tcr2ns_scale(CLOCK_TICK_RATE);
187
188 ckevt.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, ckevt.shift);
189 ckevt.max_delta_ns = clockevent_delta2ns(MAX_DELTA, &ckevt);
190 ckevt.min_delta_ns = clockevent_delta2ns(MIN_DELTA, &ckevt);
191 ckevt.cpumask = cpumask_of(0);
192
193 cksrc.mult = clocksource_hz2mult(CLOCK_TICK_RATE, cksrc.shift);
194
195 setup_irq(irq, &timer_irq);
196
197 clocksource_register(&cksrc);
198 clockevents_register_device(&ckevt);
199}
diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c
new file mode 100644
index 000000000000..08cfef6c92a2
--- /dev/null
+++ b/arch/arm/mach-mmp/ttc_dkb.c
@@ -0,0 +1,47 @@
1/*
2 * linux/arch/arm/mach-mmp/ttc_dkb.c
3 *
4 * Support for the Marvell PXA910-based TTC_DKB Development Platform.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * publishhed by the Free Software Foundation.
9 */
10
11#include <linux/init.h>
12#include <linux/kernel.h>
13#include <linux/platform_device.h>
14
15#include <asm/mach-types.h>
16#include <asm/mach/arch.h>
17#include <mach/addr-map.h>
18#include <mach/mfp-pxa910.h>
19#include <mach/pxa910.h>
20
21#include "common.h"
22
23#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x)
24
25static unsigned long ttc_dkb_pin_config[] __initdata = {
26 /* UART2 */
27 GPIO47_UART2_RXD,
28 GPIO48_UART2_TXD,
29};
30
31static void __init ttc_dkb_init(void)
32{
33 mfp_config(ARRAY_AND_SIZE(ttc_dkb_pin_config));
34
35 /* on-chip devices */
36 pxa910_add_uart(1);
37}
38
39MACHINE_START(TTC_DKB, "PXA910-based TTC_DKB Development Platform")
40 .phys_io = APB_PHYS_BASE,
41 .boot_params = 0x00000100,
42 .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc,
43 .map_io = pxa_map_io,
44 .init_irq = pxa910_init_irq,
45 .timer = &pxa910_timer,
46 .init_machine = ttc_dkb_init,
47MACHINE_END
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig
index d13282d773aa..96a2006cb597 100644
--- a/arch/arm/mach-pxa/Kconfig
+++ b/arch/arm/mach-pxa/Kconfig
@@ -262,9 +262,19 @@ config MACH_EXEDA
262 select PXA27x 262 select PXA27x
263 263
264config MACH_COLIBRI 264config MACH_COLIBRI
265 bool "Toradex Colibri PX27x" 265 bool "Toradex Colibri PXA270"
266 select PXA27x 266 select PXA27x
267 267
268config MACH_COLIBRI300
269 bool "Toradex Colibri PXA300/310"
270 select PXA3xx
271 select CPU_PXA300
272
273config MACH_COLIBRI320
274 bool "Toradex Colibri PXA320"
275 select PXA3xx
276 select CPU_PXA320
277
268config MACH_ZYLONITE 278config MACH_ZYLONITE
269 bool "PXA3xx Development Platform (aka Zylonite)" 279 bool "PXA3xx Development Platform (aka Zylonite)"
270 select PXA3xx 280 select PXA3xx
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile
index 8da8e63d048b..c80e1bac4945 100644
--- a/arch/arm/mach-pxa/Makefile
+++ b/arch/arm/mach-pxa/Makefile
@@ -3,8 +3,8 @@
3# 3#
4 4
5# Common support (must be linked before board specific support) 5# Common support (must be linked before board specific support)
6obj-y += clock.o devices.o generic.o irq.o dma.o \ 6obj-y += clock.o devices.o generic.o irq.o \
7 time.o gpio.o reset.o 7 time.o reset.o
8obj-$(CONFIG_PM) += pm.o sleep.o standby.o 8obj-$(CONFIG_PM) += pm.o sleep.o standby.o
9 9
10ifeq ($(CONFIG_CPU_FREQ),y) 10ifeq ($(CONFIG_CPU_FREQ),y)
@@ -35,7 +35,9 @@ obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o
35obj-$(CONFIG_MACH_MP900C) += mp900.o 35obj-$(CONFIG_MACH_MP900C) += mp900.o
36obj-$(CONFIG_ARCH_PXA_IDP) += idp.o 36obj-$(CONFIG_ARCH_PXA_IDP) += idp.o
37obj-$(CONFIG_MACH_TRIZEPS4) += trizeps4.o 37obj-$(CONFIG_MACH_TRIZEPS4) += trizeps4.o
38obj-$(CONFIG_MACH_COLIBRI) += colibri.o 38obj-$(CONFIG_MACH_COLIBRI) += colibri-pxa270.o
39obj-$(CONFIG_MACH_COLIBRI300) += colibri-pxa3xx.o colibri-pxa300.o
40obj-$(CONFIG_MACH_COLIBRI320) += colibri-pxa3xx.o colibri-pxa320.o
39obj-$(CONFIG_MACH_H5000) += h5000.o 41obj-$(CONFIG_MACH_H5000) += h5000.o
40obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o sharpsl_pm.o corgi_pm.o 42obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o sharpsl_pm.o corgi_pm.o
41obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o sharpsl_pm.o spitz_pm.o 43obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o sharpsl_pm.o spitz_pm.o
diff --git a/arch/arm/mach-pxa/clock.c b/arch/arm/mach-pxa/clock.c
index 40b774084514..db52d2c4791d 100644
--- a/arch/arm/mach-pxa/clock.c
+++ b/arch/arm/mach-pxa/clock.c
@@ -87,7 +87,7 @@ void clks_register(struct clk_lookup *clks, size_t num)
87 clkdev_add(&clks[i]); 87 clkdev_add(&clks[i]);
88} 88}
89 89
90int clk_add_alias(char *alias, struct device *alias_dev, char *id, 90int clk_add_alias(const char *alias, const char *alias_dev_name, char *id,
91 struct device *dev) 91 struct device *dev)
92{ 92{
93 struct clk *r = clk_get(dev, id); 93 struct clk *r = clk_get(dev, id);
@@ -96,7 +96,7 @@ int clk_add_alias(char *alias, struct device *alias_dev, char *id,
96 if (!r) 96 if (!r)
97 return -ENODEV; 97 return -ENODEV;
98 98
99 l = clkdev_alloc(r, alias, alias_dev ? dev_name(alias_dev) : NULL); 99 l = clkdev_alloc(r, alias, alias_dev_name);
100 clk_put(r); 100 clk_put(r);
101 if (!l) 101 if (!l)
102 return -ENODEV; 102 return -ENODEV;
diff --git a/arch/arm/mach-pxa/clock.h b/arch/arm/mach-pxa/clock.h
index 4e9c613c6767..5599bceff738 100644
--- a/arch/arm/mach-pxa/clock.h
+++ b/arch/arm/mach-pxa/clock.h
@@ -69,6 +69,6 @@ extern void clk_pxa3xx_cken_disable(struct clk *);
69#endif 69#endif
70 70
71void clks_register(struct clk_lookup *clks, size_t num); 71void clks_register(struct clk_lookup *clks, size_t num);
72int clk_add_alias(char *alias, struct device *alias_dev, char *id, 72int clk_add_alias(const char *alias, const char *alias_name, char *id,
73 struct device *dev); 73 struct device *dev);
74 74
diff --git a/arch/arm/mach-pxa/colibri.c b/arch/arm/mach-pxa/colibri-pxa270.c
index 26493ae2889e..01bcfaae75bc 100644
--- a/arch/arm/mach-pxa/colibri.c
+++ b/arch/arm/mach-pxa/colibri-pxa270.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * linux/arch/arm/mach-pxa/colibri.c 2 * linux/arch/arm/mach-pxa/colibri-pxa270.c
3 * 3 *
4 * Support for Toradex PXA27x based Colibri module 4 * Support for Toradex PXA270 based Colibri module
5 * Daniel Mack <daniel@caiaq.de> 5 * Daniel Mack <daniel@caiaq.de>
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
@@ -20,6 +20,7 @@
20#include <linux/mtd/mtd.h> 20#include <linux/mtd/mtd.h>
21#include <linux/mtd/partitions.h> 21#include <linux/mtd/partitions.h>
22#include <linux/mtd/physmap.h> 22#include <linux/mtd/physmap.h>
23#include <linux/gpio.h>
23#include <asm/mach-types.h> 24#include <asm/mach-types.h>
24#include <mach/hardware.h> 25#include <mach/hardware.h>
25#include <asm/irq.h> 26#include <asm/irq.h>
@@ -35,13 +36,16 @@
35#include "generic.h" 36#include "generic.h"
36#include "devices.h" 37#include "devices.h"
37 38
38static unsigned long colibri_pin_config[] __initdata = { 39/*
40 * GPIO configuration
41 */
42static mfp_cfg_t colibri_pxa270_pin_config[] __initdata = {
39 GPIO78_nCS_2, /* Ethernet CS */ 43 GPIO78_nCS_2, /* Ethernet CS */
40 GPIO114_GPIO, /* Ethernet IRQ */ 44 GPIO114_GPIO, /* Ethernet IRQ */
41}; 45};
42 46
43/* 47/*
44 * Flash 48 * NOR flash
45 */ 49 */
46static struct mtd_partition colibri_partitions[] = { 50static struct mtd_partition colibri_partitions[] = {
47 { 51 {
@@ -70,39 +74,40 @@ static struct physmap_flash_data colibri_flash_data[] = {
70 } 74 }
71}; 75};
72 76
73static struct resource flash_resource = { 77static struct resource colibri_pxa270_flash_resource = {
74 .start = PXA_CS0_PHYS, 78 .start = PXA_CS0_PHYS,
75 .end = PXA_CS0_PHYS + SZ_32M - 1, 79 .end = PXA_CS0_PHYS + SZ_32M - 1,
76 .flags = IORESOURCE_MEM, 80 .flags = IORESOURCE_MEM,
77}; 81};
78 82
79static struct platform_device flash_device = { 83static struct platform_device colibri_pxa270_flash_device = {
80 .name = "physmap-flash", 84 .name = "physmap-flash",
81 .id = 0, 85 .id = 0,
82 .dev = { 86 .dev = {
83 .platform_data = colibri_flash_data, 87 .platform_data = colibri_flash_data,
84 }, 88 },
85 .resource = &flash_resource, 89 .resource = &colibri_pxa270_flash_resource,
86 .num_resources = 1, 90 .num_resources = 1,
87}; 91};
88 92
89/* 93/*
90 * DM9000 Ethernet 94 * DM9000 Ethernet
91 */ 95 */
96#if defined(CONFIG_DM9000)
92static struct resource dm9000_resources[] = { 97static struct resource dm9000_resources[] = {
93 [0] = { 98 [0] = {
94 .start = COLIBRI_ETH_PHYS, 99 .start = COLIBRI_PXA270_ETH_PHYS,
95 .end = COLIBRI_ETH_PHYS + 3, 100 .end = COLIBRI_PXA270_ETH_PHYS + 3,
96 .flags = IORESOURCE_MEM, 101 .flags = IORESOURCE_MEM,
97 }, 102 },
98 [1] = { 103 [1] = {
99 .start = COLIBRI_ETH_PHYS + 4, 104 .start = COLIBRI_PXA270_ETH_PHYS + 4,
100 .end = COLIBRI_ETH_PHYS + 4 + 500, 105 .end = COLIBRI_PXA270_ETH_PHYS + 4 + 500,
101 .flags = IORESOURCE_MEM, 106 .flags = IORESOURCE_MEM,
102 }, 107 },
103 [2] = { 108 [2] = {
104 .start = COLIBRI_ETH_IRQ, 109 .start = COLIBRI_PXA270_ETH_IRQ,
105 .end = COLIBRI_ETH_IRQ, 110 .end = COLIBRI_PXA270_ETH_IRQ,
106 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING, 111 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING,
107 }, 112 },
108}; 113};
@@ -113,25 +118,28 @@ static struct platform_device dm9000_device = {
113 .num_resources = ARRAY_SIZE(dm9000_resources), 118 .num_resources = ARRAY_SIZE(dm9000_resources),
114 .resource = dm9000_resources, 119 .resource = dm9000_resources,
115}; 120};
121#endif /* CONFIG_DM9000 */
116 122
117static struct platform_device *colibri_devices[] __initdata = { 123static struct platform_device *colibri_pxa270_devices[] __initdata = {
118 &flash_device, 124 &colibri_pxa270_flash_device,
125#if defined(CONFIG_DM9000)
119 &dm9000_device, 126 &dm9000_device,
127#endif
120}; 128};
121 129
122static void __init colibri_init(void) 130static void __init colibri_pxa270_init(void)
123{ 131{
124 pxa2xx_mfp_config(ARRAY_AND_SIZE(colibri_pin_config)); 132 pxa2xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa270_pin_config));
125 133 platform_add_devices(ARRAY_AND_SIZE(colibri_pxa270_devices));
126 platform_add_devices(colibri_devices, ARRAY_SIZE(colibri_devices));
127} 134}
128 135
129MACHINE_START(COLIBRI, "Toradex Colibri PXA27x") 136MACHINE_START(COLIBRI, "Toradex Colibri PXA270")
130 .phys_io = 0x40000000, 137 .phys_io = 0x40000000,
131 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, 138 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
132 .boot_params = COLIBRI_SDRAM_BASE + 0x100, 139 .boot_params = COLIBRI_SDRAM_BASE + 0x100,
133 .init_machine = colibri_init, 140 .init_machine = colibri_pxa270_init,
134 .map_io = pxa_map_io, 141 .map_io = pxa_map_io,
135 .init_irq = pxa27x_init_irq, 142 .init_irq = pxa27x_init_irq,
136 .timer = &pxa_timer, 143 .timer = &pxa_timer,
137MACHINE_END 144MACHINE_END
145
diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c
new file mode 100644
index 000000000000..169ab552c21a
--- /dev/null
+++ b/arch/arm/mach-pxa/colibri-pxa300.c
@@ -0,0 +1,190 @@
1/*
2 * arch/arm/mach-pxa/colibri-pxa300.c
3 *
4 * Support for Toradex PXA300/310 based Colibri module
5 *
6 * Daniel Mack <daniel@caiaq.de>
7 * Matthias Meier <matthias.j.meier@gmx.net>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/init.h>
15#include <linux/kernel.h>
16#include <linux/platform_device.h>
17#include <linux/gpio.h>
18#include <net/ax88796.h>
19
20#include <asm/mach-types.h>
21#include <asm/sizes.h>
22#include <asm/mach/arch.h>
23#include <asm/mach/irq.h>
24
25#include <mach/pxa300.h>
26#include <mach/colibri.h>
27#include <mach/ohci.h>
28#include <mach/pxafb.h>
29
30#include "generic.h"
31#include "devices.h"
32
33#if defined(CONFIG_AX88796)
34#define COLIBRI_ETH_IRQ_GPIO mfp_to_gpio(GPIO26_GPIO)
35/*
36 * Asix AX88796 Ethernet
37 */
38static struct ax_plat_data colibri_asix_platdata = {
39 .flags = AXFLG_MAC_FROMDEV,
40 .wordlength = 2
41};
42
43static struct resource colibri_asix_resource[] = {
44 [0] = {
45 .start = PXA3xx_CS2_PHYS,
46 .end = PXA3xx_CS2_PHYS + (0x20 * 2) - 1,
47 .flags = IORESOURCE_MEM,
48 },
49 [1] = {
50 .start = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO),
51 .end = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO),
52 .flags = IORESOURCE_IRQ
53 }
54};
55
56static struct platform_device asix_device = {
57 .name = "ax88796",
58 .id = 0,
59 .num_resources = ARRAY_SIZE(colibri_asix_resource),
60 .resource = colibri_asix_resource,
61 .dev = {
62 .platform_data = &colibri_asix_platdata
63 }
64};
65
66static mfp_cfg_t colibri_pxa300_eth_pin_config[] __initdata = {
67 GPIO1_nCS2, /* AX88796 chip select */
68 GPIO26_GPIO | MFP_PULL_HIGH /* AX88796 IRQ */
69};
70
71static void __init colibri_pxa300_init_eth(void)
72{
73 pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa300_eth_pin_config));
74 set_irq_type(gpio_to_irq(COLIBRI_ETH_IRQ_GPIO), IRQ_TYPE_EDGE_FALLING);
75 platform_device_register(&asix_device);
76}
77#else
78static inline void __init colibri_pxa300_init_eth(void) {}
79#endif /* CONFIG_AX88796 */
80
81#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
82static mfp_cfg_t colibri_pxa300_usb_pin_config[] __initdata = {
83 GPIO0_2_USBH_PEN,
84 GPIO1_2_USBH_PWR,
85};
86
87static struct pxaohci_platform_data colibri_pxa300_ohci_info = {
88 .port_mode = PMM_GLOBAL_MODE,
89 .flags = ENABLE_PORT1 | POWER_CONTROL_LOW | POWER_SENSE_LOW,
90};
91
92void __init colibri_pxa300_init_ohci(void)
93{
94 pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa300_usb_pin_config));
95 pxa_set_ohci_info(&colibri_pxa300_ohci_info);
96}
97#else
98static inline void colibri_pxa300_init_ohci(void) {}
99#endif /* CONFIG_USB_OHCI_HCD || CONFIG_USB_OHCI_HCD_MODULE */
100
101static mfp_cfg_t colibri_pxa300_mmc_pin_config[] __initdata = {
102 GPIO7_MMC1_CLK,
103 GPIO14_MMC1_CMD,
104 GPIO3_MMC1_DAT0,
105 GPIO4_MMC1_DAT1,
106 GPIO5_MMC1_DAT2,
107 GPIO6_MMC1_DAT3,
108};
109
110#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
111static mfp_cfg_t colibri_pxa300_lcd_pin_config[] __initdata = {
112 GPIO54_LCD_LDD_0,
113 GPIO55_LCD_LDD_1,
114 GPIO56_LCD_LDD_2,
115 GPIO57_LCD_LDD_3,
116 GPIO58_LCD_LDD_4,
117 GPIO59_LCD_LDD_5,
118 GPIO60_LCD_LDD_6,
119 GPIO61_LCD_LDD_7,
120 GPIO62_LCD_LDD_8,
121 GPIO63_LCD_LDD_9,
122 GPIO64_LCD_LDD_10,
123 GPIO65_LCD_LDD_11,
124 GPIO66_LCD_LDD_12,
125 GPIO67_LCD_LDD_13,
126 GPIO68_LCD_LDD_14,
127 GPIO69_LCD_LDD_15,
128 GPIO70_LCD_LDD_16,
129 GPIO71_LCD_LDD_17,
130 GPIO62_LCD_CS_N,
131 GPIO72_LCD_FCLK,
132 GPIO73_LCD_LCLK,
133 GPIO74_LCD_PCLK,
134 GPIO75_LCD_BIAS,
135 GPIO76_LCD_VSYNC,
136};
137
138static void __init colibri_pxa300_init_lcd(void)
139{
140 pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa300_lcd_pin_config));
141}
142
143#else
144static inline void colibri_pxa300_init_lcd(void) {}
145#endif /* CONFIG_FB_PXA || CONFIG_FB_PXA_MODULE */
146
147#if defined(SND_AC97_CODEC) || defined(SND_AC97_CODEC_MODULE)
148static mfp_cfg_t colibri_pxa310_ac97_pin_config[] __initdata = {
149 GPIO24_AC97_SYSCLK,
150 GPIO23_AC97_nACRESET,
151 GPIO25_AC97_SDATA_IN_0,
152 GPIO27_AC97_SDATA_OUT,
153 GPIO28_AC97_SYNC,
154 GPIO29_AC97_BITCLK
155};
156
157static inline void __init colibri_pxa310_init_ac97(void)
158{
159 /* no AC97 codec on Colibri PXA300 */
160 if (!cpu_is_pxa310())
161 return;
162
163 pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa310_ac97_pin_config));
164 pxa_set_ac97_info(NULL);
165}
166#else
167static inline void colibri_pxa310_init_ac97(void) {}
168#endif
169
170void __init colibri_pxa300_init(void)
171{
172 colibri_pxa300_init_eth();
173 colibri_pxa300_init_ohci();
174 colibri_pxa300_init_lcd();
175 colibri_pxa3xx_init_lcd(mfp_to_gpio(GPIO49_GPIO));
176 colibri_pxa310_init_ac97();
177 colibri_pxa3xx_init_mmc(ARRAY_AND_SIZE(colibri_pxa300_mmc_pin_config),
178 mfp_to_gpio(MFP_PIN_GPIO13));
179}
180
181MACHINE_START(COLIBRI300, "Toradex Colibri PXA300")
182 .phys_io = 0x40000000,
183 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
184 .boot_params = COLIBRI_SDRAM_BASE + 0x100,
185 .init_machine = colibri_pxa300_init,
186 .map_io = pxa_map_io,
187 .init_irq = pxa3xx_init_irq,
188 .timer = &pxa_timer,
189MACHINE_END
190
diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c
new file mode 100644
index 000000000000..573a9a1dd529
--- /dev/null
+++ b/arch/arm/mach-pxa/colibri-pxa320.c
@@ -0,0 +1,187 @@
1/*
2 * arch/arm/mach-pxa/colibri-pxa320.c
3 *
4 * Support for Toradex PXA320/310 based Colibri module
5 *
6 * Daniel Mack <daniel@caiaq.de>
7 * Matthias Meier <matthias.j.meier@gmx.net>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/init.h>
15#include <linux/kernel.h>
16#include <linux/platform_device.h>
17#include <linux/gpio.h>
18#include <net/ax88796.h>
19
20#include <asm/mach-types.h>
21#include <asm/sizes.h>
22#include <asm/mach/arch.h>
23#include <asm/mach/irq.h>
24
25#include <mach/pxa3xx-regs.h>
26#include <mach/mfp-pxa320.h>
27#include <mach/colibri.h>
28#include <mach/pxafb.h>
29#include <mach/ohci.h>
30
31#include "generic.h"
32#include "devices.h"
33
34#if defined(CONFIG_AX88796)
35#define COLIBRI_ETH_IRQ_GPIO mfp_to_gpio(GPIO36_GPIO)
36
37/*
38 * Asix AX88796 Ethernet
39 */
40static struct ax_plat_data colibri_asix_platdata = {
41 .flags = AXFLG_MAC_FROMDEV,
42 .wordlength = 2
43};
44
45static struct resource colibri_asix_resource[] = {
46 [0] = {
47 .start = PXA3xx_CS2_PHYS,
48 .end = PXA3xx_CS2_PHYS + (0x20 * 2) - 1,
49 .flags = IORESOURCE_MEM,
50 },
51 [1] = {
52 .start = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO),
53 .end = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO),
54 .flags = IORESOURCE_IRQ
55 }
56};
57
58static struct platform_device asix_device = {
59 .name = "ax88796",
60 .id = 0,
61 .num_resources = ARRAY_SIZE(colibri_asix_resource),
62 .resource = colibri_asix_resource,
63 .dev = {
64 .platform_data = &colibri_asix_platdata
65 }
66};
67
68static mfp_cfg_t colibri_pxa320_eth_pin_config[] __initdata = {
69 GPIO3_nCS2, /* AX88796 chip select */
70 GPIO36_GPIO | MFP_PULL_HIGH /* AX88796 IRQ */
71};
72
73static void __init colibri_pxa320_init_eth(void)
74{
75 pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa320_eth_pin_config));
76 set_irq_type(gpio_to_irq(COLIBRI_ETH_IRQ_GPIO), IRQ_TYPE_EDGE_FALLING);
77 platform_device_register(&asix_device);
78}
79#else
80static inline void __init colibri_pxa320_init_eth(void) {}
81#endif /* CONFIG_AX88796 */
82
83#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
84static mfp_cfg_t colibri_pxa320_usb_pin_config[] __initdata = {
85 GPIO2_2_USBH_PEN,
86 GPIO3_2_USBH_PWR,
87};
88
89static struct pxaohci_platform_data colibri_pxa320_ohci_info = {
90 .port_mode = PMM_GLOBAL_MODE,
91 .flags = ENABLE_PORT1 | POWER_CONTROL_LOW | POWER_SENSE_LOW,
92};
93
94void __init colibri_pxa320_init_ohci(void)
95{
96 pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa320_usb_pin_config));
97 pxa_set_ohci_info(&colibri_pxa320_ohci_info);
98}
99#else
100static inline void colibri_pxa320_init_ohci(void) {}
101#endif /* CONFIG_USB_OHCI_HCD || CONFIG_USB_OHCI_HCD_MODULE */
102
103static mfp_cfg_t colibri_pxa320_mmc_pin_config[] __initdata = {
104 GPIO22_MMC1_CLK,
105 GPIO23_MMC1_CMD,
106 GPIO18_MMC1_DAT0,
107 GPIO19_MMC1_DAT1,
108 GPIO20_MMC1_DAT2,
109 GPIO21_MMC1_DAT3
110};
111
112#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
113static mfp_cfg_t colibri_pxa320_lcd_pin_config[] __initdata = {
114 GPIO6_2_LCD_LDD_0,
115 GPIO7_2_LCD_LDD_1,
116 GPIO8_2_LCD_LDD_2,
117 GPIO9_2_LCD_LDD_3,
118 GPIO10_2_LCD_LDD_4,
119 GPIO11_2_LCD_LDD_5,
120 GPIO12_2_LCD_LDD_6,
121 GPIO13_2_LCD_LDD_7,
122 GPIO63_LCD_LDD_8,
123 GPIO64_LCD_LDD_9,
124 GPIO65_LCD_LDD_10,
125 GPIO66_LCD_LDD_11,
126 GPIO67_LCD_LDD_12,
127 GPIO68_LCD_LDD_13,
128 GPIO69_LCD_LDD_14,
129 GPIO70_LCD_LDD_15,
130 GPIO71_LCD_LDD_16,
131 GPIO72_LCD_LDD_17,
132 GPIO73_LCD_CS_N,
133 GPIO74_LCD_VSYNC,
134 GPIO14_2_LCD_FCLK,
135 GPIO15_2_LCD_LCLK,
136 GPIO16_2_LCD_PCLK,
137 GPIO17_2_LCD_BIAS,
138};
139
140static void __init colibri_pxa320_init_lcd(void)
141{
142 pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa320_lcd_pin_config));
143}
144#else
145static inline void colibri_pxa320_init_lcd(void) {}
146#endif
147
148#if defined(SND_AC97_CODEC) || defined(SND_AC97_CODEC_MODULE)
149static mfp_cfg_t colibri_pxa320_ac97_pin_config[] __initdata = {
150 GPIO34_AC97_SYSCLK,
151 GPIO35_AC97_SDATA_IN_0,
152 GPIO37_AC97_SDATA_OUT,
153 GPIO38_AC97_SYNC,
154 GPIO39_AC97_BITCLK,
155 GPIO40_AC97_nACRESET
156};
157
158static inline void __init colibri_pxa320_init_ac97(void)
159{
160 pxa3xx_mfp_config(ARRAY_AND_SIZE(colibri_pxa320_ac97_pin_config));
161 pxa_set_ac97_info(NULL);
162}
163#else
164static inline void colibri_pxa320_init_ac97(void) {}
165#endif
166
167void __init colibri_pxa320_init(void)
168{
169 colibri_pxa320_init_eth();
170 colibri_pxa320_init_ohci();
171 colibri_pxa320_init_lcd();
172 colibri_pxa3xx_init_lcd(mfp_to_gpio(GPIO39_GPIO));
173 colibri_pxa320_init_ac97();
174 colibri_pxa3xx_init_mmc(ARRAY_AND_SIZE(colibri_pxa320_mmc_pin_config),
175 mfp_to_gpio(MFP_PIN_GPIO28));
176}
177
178MACHINE_START(COLIBRI320, "Toradex Colibri PXA320")
179 .phys_io = 0x40000000,
180 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
181 .boot_params = COLIBRI_SDRAM_BASE + 0x100,
182 .init_machine = colibri_pxa320_init,
183 .map_io = pxa_map_io,
184 .init_irq = pxa3xx_init_irq,
185 .timer = &pxa_timer,
186MACHINE_END
187
diff --git a/arch/arm/mach-pxa/colibri-pxa3xx.c b/arch/arm/mach-pxa/colibri-pxa3xx.c
new file mode 100644
index 000000000000..12d0afc54aa5
--- /dev/null
+++ b/arch/arm/mach-pxa/colibri-pxa3xx.c
@@ -0,0 +1,121 @@
1/*
2 * arch/arm/mach-pxa/colibri-pxa3xx.c
3 *
4 * Common functions for all Toradex PXA3xx modules
5 *
6 * Daniel Mack <daniel@caiaq.de>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/init.h>
14#include <linux/kernel.h>
15#include <linux/platform_device.h>
16#include <linux/gpio.h>
17#include <asm/mach-types.h>
18#include <mach/hardware.h>
19#include <asm/sizes.h>
20#include <asm/mach/arch.h>
21#include <asm/mach/irq.h>
22#include <mach/pxa3xx-regs.h>
23#include <mach/mfp-pxa300.h>
24#include <mach/colibri.h>
25#include <mach/mmc.h>
26#include <mach/pxafb.h>
27
28#include "generic.h"
29#include "devices.h"
30
31#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
32static int mmc_detect_pin;
33
34static int colibri_pxa3xx_mci_init(struct device *dev,
35 irq_handler_t colibri_mmc_detect_int,
36 void *data)
37{
38 int ret;
39
40 ret = gpio_request(mmc_detect_pin, "mmc card detect");
41 if (ret)
42 return ret;
43
44 gpio_direction_input(mmc_detect_pin);
45 ret = request_irq(gpio_to_irq(mmc_detect_pin), colibri_mmc_detect_int,
46 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
47 "MMC card detect", data);
48 if (ret) {
49 gpio_free(mmc_detect_pin);
50 return ret;
51 }
52
53 return 0;
54}
55
56static void colibri_pxa3xx_mci_exit(struct device *dev, void *data)
57{
58 free_irq(mmc_detect_pin, data);
59 gpio_free(gpio_to_irq(mmc_detect_pin));
60}
61
62static struct pxamci_platform_data colibri_pxa3xx_mci_platform_data = {
63 .detect_delay = 20,
64 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
65 .init = colibri_pxa3xx_mci_init,
66 .exit = colibri_pxa3xx_mci_exit,
67};
68
69void __init colibri_pxa3xx_init_mmc(mfp_cfg_t *pins, int len, int detect_pin)
70{
71 pxa3xx_mfp_config(pins, len);
72 mmc_detect_pin = detect_pin;
73 pxa_set_mci_info(&colibri_pxa3xx_mci_platform_data);
74}
75#endif /* CONFIG_MMC_PXA || CONFIG_MMC_PXA_MODULE */
76
77#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
78static int lcd_bl_pin;
79
80/*
81 * LCD panel (Sharp LQ043T3DX02)
82 */
83static void colibri_lcd_backlight(int on)
84{
85 gpio_set_value(lcd_bl_pin, !!on);
86}
87
88static struct pxafb_mode_info sharp_lq43_mode = {
89 .pixclock = 101936,
90 .xres = 480,
91 .yres = 272,
92 .bpp = 32,
93 .depth = 18,
94 .hsync_len = 41,
95 .left_margin = 2,
96 .right_margin = 2,
97 .vsync_len = 10,
98 .upper_margin = 2,
99 .lower_margin = 2,
100 .sync = 0,
101 .cmap_greyscale = 0,
102};
103
104static struct pxafb_mach_info sharp_lq43_info = {
105 .modes = &sharp_lq43_mode,
106 .num_modes = 1,
107 .cmap_inverse = 0,
108 .cmap_static = 0,
109 .lcd_conn = LCD_COLOR_TFT_18BPP,
110 .pxafb_backlight_power = colibri_lcd_backlight,
111};
112
113void __init colibri_pxa3xx_init_lcd(int bl_pin)
114{
115 lcd_bl_pin = bl_pin;
116 gpio_request(bl_pin, "lcd backlight");
117 gpio_direction_output(bl_pin, 0);
118 set_pxa_fb_info(&sharp_lq43_info);
119}
120#endif
121
diff --git a/arch/arm/mach-pxa/e740.c b/arch/arm/mach-pxa/e740.c
index e0c3aaf1ecb3..54af7ed1397e 100644
--- a/arch/arm/mach-pxa/e740.c
+++ b/arch/arm/mach-pxa/e740.c
@@ -187,7 +187,7 @@ static void __init e740_init(void)
187{ 187{
188 pxa2xx_mfp_config(ARRAY_AND_SIZE(e740_pin_config)); 188 pxa2xx_mfp_config(ARRAY_AND_SIZE(e740_pin_config));
189 eseries_register_clks(); 189 eseries_register_clks();
190 clk_add_alias("CLK_CK48M", &e740_t7l66xb_device.dev, 190 clk_add_alias("CLK_CK48M", e740_t7l66xb_device.name,
191 "UDCCLK", &pxa25x_device_udc.dev), 191 "UDCCLK", &pxa25x_device_udc.dev),
192 eseries_get_tmio_gpios(); 192 eseries_get_tmio_gpios();
193 platform_add_devices(devices, ARRAY_SIZE(devices)); 193 platform_add_devices(devices, ARRAY_SIZE(devices));
diff --git a/arch/arm/mach-pxa/e750.c b/arch/arm/mach-pxa/e750.c
index 84b050f1a996..16ae72150b1b 100644
--- a/arch/arm/mach-pxa/e750.c
+++ b/arch/arm/mach-pxa/e750.c
@@ -188,7 +188,7 @@ static struct platform_device *devices[] __initdata = {
188static void __init e750_init(void) 188static void __init e750_init(void)
189{ 189{
190 pxa2xx_mfp_config(ARRAY_AND_SIZE(e750_pin_config)); 190 pxa2xx_mfp_config(ARRAY_AND_SIZE(e750_pin_config));
191 clk_add_alias("CLK_CK3P6MI", &e750_tc6393xb_device.dev, 191 clk_add_alias("CLK_CK3P6MI", e750_tc6393xb_device.name,
192 "GPIO11_CLK", NULL), 192 "GPIO11_CLK", NULL),
193 eseries_get_tmio_gpios(); 193 eseries_get_tmio_gpios();
194 platform_add_devices(devices, ARRAY_SIZE(devices)); 194 platform_add_devices(devices, ARRAY_SIZE(devices));
diff --git a/arch/arm/mach-pxa/e800.c b/arch/arm/mach-pxa/e800.c
index f8924f6ca544..74ab09812a72 100644
--- a/arch/arm/mach-pxa/e800.c
+++ b/arch/arm/mach-pxa/e800.c
@@ -194,7 +194,7 @@ static struct platform_device *devices[] __initdata = {
194 194
195static void __init e800_init(void) 195static void __init e800_init(void)
196{ 196{
197 clk_add_alias("CLK_CK3P6MI", &e800_tc6393xb_device.dev, 197 clk_add_alias("CLK_CK3P6MI", e800_tc6393xb_device.name,
198 "GPIO11_CLK", NULL), 198 "GPIO11_CLK", NULL),
199 eseries_get_tmio_gpios(); 199 eseries_get_tmio_gpios();
200 platform_add_devices(devices, ARRAY_SIZE(devices)); 200 platform_add_devices(devices, ARRAY_SIZE(devices));
diff --git a/arch/arm/mach-pxa/include/mach/colibri.h b/arch/arm/mach-pxa/include/mach/colibri.h
index 2ae373fb5675..3f2a01d6a03c 100644
--- a/arch/arm/mach-pxa/include/mach/colibri.h
+++ b/arch/arm/mach-pxa/include/mach/colibri.h
@@ -1,19 +1,31 @@
1#ifndef _COLIBRI_H_ 1#ifndef _COLIBRI_H_
2#define _COLIBRI_H_ 2#define _COLIBRI_H_
3/*
4 * common settings for all modules
5 */
6
7#if defined(CONFIG_MMC_PXA) || defined(CONFIG_MMC_PXA_MODULE)
8extern void colibri_pxa3xx_init_mmc(mfp_cfg_t *pins, int len, int detect_pin);
9#else
10static inline void colibri_pxa3xx_init_mmc(mfp_cfg_t *, int, int) {}
11#endif
12
13#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
14extern void colibri_pxa3xx_init_lcd(int bl_pin);
15#else
16static inline void colibri_pxa3xx_init_lcd(int) {}
17#endif
3 18
4/* physical memory regions */ 19/* physical memory regions */
5#define COLIBRI_FLASH_PHYS (PXA_CS0_PHYS) /* Flash region */
6#define COLIBRI_ETH_PHYS (PXA_CS2_PHYS) /* Ethernet DM9000 region */
7#define COLIBRI_SDRAM_BASE 0xa0000000 /* SDRAM region */ 20#define COLIBRI_SDRAM_BASE 0xa0000000 /* SDRAM region */
8 21
9/* virtual memory regions */ 22/* definitions for Colibri PXA270 */
10#define COLIBRI_DISK_VIRT 0xF0000000 /* Disk On Chip region */
11 23
12/* size of flash */ 24#define COLIBRI_PXA270_FLASH_PHYS (PXA_CS0_PHYS) /* Flash region */
13#define COLIBRI_FLASH_SIZE 0x02000000 /* Flash size 32 MB */ 25#define COLIBRI_PXA270_ETH_PHYS (PXA_CS2_PHYS) /* Ethernet */
14 26#define COLIBRI_PXA270_ETH_IRQ_GPIO 114
15/* Ethernet Controller Davicom DM9000 */ 27#define COLIBRI_PXA270_ETH_IRQ \
16#define GPIO_DM9000 114 28 gpio_to_irq(mfp_to_gpio(COLIBRI_PXA270_ETH_IRQ_GPIO))
17#define COLIBRI_ETH_IRQ IRQ_GPIO(GPIO_DM9000)
18 29
19#endif /* _COLIBRI_H_ */ 30#endif /* _COLIBRI_H_ */
31
diff --git a/arch/arm/mach-pxa/include/mach/dma.h b/arch/arm/mach-pxa/include/mach/dma.h
index b0812f59d3f8..5bd55894a48d 100644
--- a/arch/arm/mach-pxa/include/mach/dma.h
+++ b/arch/arm/mach-pxa/include/mach/dma.h
@@ -16,87 +16,6 @@
16 16
17/* DMA Controller Registers Definitions */ 17/* DMA Controller Registers Definitions */
18#define DMAC_REGS_VIRT io_p2v(0x40000000) 18#define DMAC_REGS_VIRT io_p2v(0x40000000)
19#define DMAC_REG(x) (*((volatile u32 *)(DMAC_REGS_VIRT + (x))))
20
21#define DCSR(n) DMAC_REG((n) << 2)
22#define DALGN DMAC_REG(0x00a0) /* DMA Alignment Register */
23#define DINT DMAC_REG(0x00f0) /* DMA Interrupt Register */
24#define DDADR(n) DMAC_REG(0x0200 + ((n) << 4))
25#define DSADR(n) DMAC_REG(0x0204 + ((n) << 4))
26#define DTADR(n) DMAC_REG(0x0208 + ((n) << 4))
27#define DCMD(n) DMAC_REG(0x020c + ((n) << 4))
28#define DRCMR(n) DMAC_REG((((n) < 64) ? 0x0100 : 0x1100) + \
29 (((n) & 0x3f) << 2))
30
31#define DCSR_RUN (1 << 31) /* Run Bit (read / write) */
32#define DCSR_NODESC (1 << 30) /* No-Descriptor Fetch (read / write) */
33#define DCSR_STOPIRQEN (1 << 29) /* Stop Interrupt Enable (read / write) */
34#define DCSR_REQPEND (1 << 8) /* Request Pending (read-only) */
35#define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */
36#define DCSR_ENDINTR (1 << 2) /* End Interrupt (read / write) */
37#define DCSR_STARTINTR (1 << 1) /* Start Interrupt (read / write) */
38#define DCSR_BUSERR (1 << 0) /* Bus Error Interrupt (read / write) */
39
40#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
41#define DCSR_EORIRQEN (1 << 28) /* End of Receive Interrupt Enable (R/W) */
42#define DCSR_EORJMPEN (1 << 27) /* Jump to next descriptor on EOR */
43#define DCSR_EORSTOPEN (1 << 26) /* STOP on an EOR */
44#define DCSR_SETCMPST (1 << 25) /* Set Descriptor Compare Status */
45#define DCSR_CLRCMPST (1 << 24) /* Clear Descriptor Compare Status */
46#define DCSR_CMPST (1 << 10) /* The Descriptor Compare Status */
47#define DCSR_EORINTR (1 << 9) /* The end of Receive */
48#endif
49
50#define DRCMR_MAPVLD (1 << 7) /* Map Valid (read / write) */
51#define DRCMR_CHLNUM 0x1f /* mask for Channel Number (read / write) */
52
53#define DDADR_DESCADDR 0xfffffff0 /* Address of next descriptor (mask) */
54#define DDADR_STOP (1 << 0) /* Stop (read / write) */
55
56#define DCMD_INCSRCADDR (1 << 31) /* Source Address Increment Setting. */
57#define DCMD_INCTRGADDR (1 << 30) /* Target Address Increment Setting. */
58#define DCMD_FLOWSRC (1 << 29) /* Flow Control by the source. */
59#define DCMD_FLOWTRG (1 << 28) /* Flow Control by the target. */
60#define DCMD_STARTIRQEN (1 << 22) /* Start Interrupt Enable */
61#define DCMD_ENDIRQEN (1 << 21) /* End Interrupt Enable */
62#define DCMD_ENDIAN (1 << 18) /* Device Endian-ness. */
63#define DCMD_BURST8 (1 << 16) /* 8 byte burst */
64#define DCMD_BURST16 (2 << 16) /* 16 byte burst */
65#define DCMD_BURST32 (3 << 16) /* 32 byte burst */
66#define DCMD_WIDTH1 (1 << 14) /* 1 byte width */
67#define DCMD_WIDTH2 (2 << 14) /* 2 byte width (HalfWord) */
68#define DCMD_WIDTH4 (3 << 14) /* 4 byte width (Word) */
69#define DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */
70
71/*
72 * Descriptor structure for PXA's DMA engine
73 * Note: this structure must always be aligned to a 16-byte boundary.
74 */
75
76typedef struct pxa_dma_desc {
77 volatile u32 ddadr; /* Points to the next descriptor + flags */
78 volatile u32 dsadr; /* DSADR value for the current transfer */
79 volatile u32 dtadr; /* DTADR value for the current transfer */
80 volatile u32 dcmd; /* DCMD value for the current transfer */
81} pxa_dma_desc;
82
83typedef enum {
84 DMA_PRIO_HIGH = 0,
85 DMA_PRIO_MEDIUM = 1,
86 DMA_PRIO_LOW = 2
87} pxa_dma_prio;
88
89/*
90 * DMA registration
91 */
92
93int __init pxa_init_dma(int irq, int num_ch);
94
95int pxa_request_dma (char *name,
96 pxa_dma_prio prio,
97 void (*irq_handler)(int, void *),
98 void *data);
99
100void pxa_free_dma (int dma_ch);
101 19
20#include <plat/dma.h>
102#endif /* _ASM_ARCH_DMA_H */ 21#endif /* _ASM_ARCH_DMA_H */
diff --git a/arch/arm/mach-pxa/include/mach/gpio.h b/arch/arm/mach-pxa/include/mach/gpio.h
index c72c89a2285e..b024a8b37439 100644
--- a/arch/arm/mach-pxa/include/mach/gpio.h
+++ b/arch/arm/mach-pxa/include/mach/gpio.h
@@ -99,40 +99,12 @@
99#define GAFR(x) GPIO_REG(0x54 + (((x) & 0x70) >> 2)) 99#define GAFR(x) GPIO_REG(0x54 + (((x) & 0x70) >> 2))
100 100
101 101
102/* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85).
103 * Those cases currently cause holes in the GPIO number space, the
104 * actual number of the last GPIO is recorded by 'pxa_last_gpio'.
105 */
106extern int pxa_last_gpio;
107
108#define NR_BUILTIN_GPIO 128 102#define NR_BUILTIN_GPIO 128
109 103
110static inline int gpio_get_value(unsigned gpio)
111{
112 if (__builtin_constant_p(gpio) && (gpio < NR_BUILTIN_GPIO))
113 return GPLR(gpio) & GPIO_bit(gpio);
114 else
115 return __gpio_get_value(gpio);
116}
117
118static inline void gpio_set_value(unsigned gpio, int value)
119{
120 if (__builtin_constant_p(gpio) && (gpio < NR_BUILTIN_GPIO)) {
121 if (value)
122 GPSR(gpio) = GPIO_bit(gpio);
123 else
124 GPCR(gpio) = GPIO_bit(gpio);
125 } else {
126 __gpio_set_value(gpio, value);
127 }
128}
129
130#define gpio_cansleep __gpio_cansleep
131#define gpio_to_bank(gpio) ((gpio) >> 5) 104#define gpio_to_bank(gpio) ((gpio) >> 5)
132#define gpio_to_irq(gpio) IRQ_GPIO(gpio) 105#define gpio_to_irq(gpio) IRQ_GPIO(gpio)
133#define irq_to_gpio(irq) IRQ_TO_GPIO(irq) 106#define irq_to_gpio(irq) IRQ_TO_GPIO(irq)
134 107
135
136#ifdef CONFIG_CPU_PXA26x 108#ifdef CONFIG_CPU_PXA26x
137/* GPIO86/87/88/89 on PXA26x have their direction bits in GPDR2 inverted, 109/* GPIO86/87/88/89 on PXA26x have their direction bits in GPDR2 inverted,
138 * as well as their Alternate Function value being '1' for GPIO in GAFRx. 110 * as well as their Alternate Function value being '1' for GPIO in GAFRx.
@@ -165,7 +137,5 @@ static inline int __gpio_is_occupied(unsigned gpio)
165 return GPDR(gpio) & GPIO_bit(gpio); 137 return GPDR(gpio) & GPIO_bit(gpio);
166} 138}
167 139
168typedef int (*set_wake_t)(unsigned int irq, unsigned int on); 140#include <plat/gpio.h>
169
170extern void pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn);
171#endif 141#endif
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h b/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h
index a72869b73ee3..b13dc0269a6d 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa25x.h
@@ -1,7 +1,6 @@
1#ifndef __ASM_ARCH_MFP_PXA25X_H 1#ifndef __ASM_ARCH_MFP_PXA25X_H
2#define __ASM_ARCH_MFP_PXA25X_H 2#define __ASM_ARCH_MFP_PXA25X_H
3 3
4#include <mach/mfp.h>
5#include <mach/mfp-pxa2xx.h> 4#include <mach/mfp-pxa2xx.h>
6 5
7/* GPIO */ 6/* GPIO */
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h b/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h
index da4f85a4f990..6543c05f47ed 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa27x.h
@@ -8,7 +8,6 @@
8 * specific controller, and this should work in most cases. 8 * specific controller, and this should work in most cases.
9 */ 9 */
10 10
11#include <mach/mfp.h>
12#include <mach/mfp-pxa2xx.h> 11#include <mach/mfp-pxa2xx.h>
13 12
14/* Note: GPIO3/GPIO4 will be driven by Power I2C when PCFR/PI2C_EN 13/* Note: GPIO3/GPIO4 will be driven by Power I2C when PCFR/PI2C_EN
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h b/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h
index 3e9211591e20..658b28ed129b 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa2xx.h
@@ -1,7 +1,7 @@
1#ifndef __ASM_ARCH_MFP_PXA2XX_H 1#ifndef __ASM_ARCH_MFP_PXA2XX_H
2#define __ASM_ARCH_MFP_PXA2XX_H 2#define __ASM_ARCH_MFP_PXA2XX_H
3 3
4#include <mach/mfp.h> 4#include <plat/mfp.h>
5 5
6/* 6/*
7 * the following MFP_xxx bit definitions in mfp.h are re-used for pxa2xx: 7 * the following MFP_xxx bit definitions in mfp.h are re-used for pxa2xx:
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa300.h b/arch/arm/mach-pxa/include/mach/mfp-pxa300.h
index bc1fb33a6e70..ae8441192ef0 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa300.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa300.h
@@ -15,7 +15,6 @@
15#ifndef __ASM_ARCH_MFP_PXA300_H 15#ifndef __ASM_ARCH_MFP_PXA300_H
16#define __ASM_ARCH_MFP_PXA300_H 16#define __ASM_ARCH_MFP_PXA300_H
17 17
18#include <mach/mfp.h>
19#include <mach/mfp-pxa3xx.h> 18#include <mach/mfp-pxa3xx.h>
20 19
21/* GPIO */ 20/* GPIO */
@@ -41,6 +40,7 @@
41#endif 40#endif
42 41
43/* Chip Select */ 42/* Chip Select */
43#define GPIO1_nCS2 MFP_CFG(GPIO1, AF1)
44#define GPIO2_nCS3 MFP_CFG(GPIO2, AF1) 44#define GPIO2_nCS3 MFP_CFG(GPIO2, AF1)
45 45
46/* AC97 */ 46/* AC97 */
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa320.h b/arch/arm/mach-pxa/include/mach/mfp-pxa320.h
index 67f8385ea548..07897e61d05a 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa320.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa320.h
@@ -15,7 +15,6 @@
15#ifndef __ASM_ARCH_MFP_PXA320_H 15#ifndef __ASM_ARCH_MFP_PXA320_H
16#define __ASM_ARCH_MFP_PXA320_H 16#define __ASM_ARCH_MFP_PXA320_H
17 17
18#include <mach/mfp.h>
19#include <mach/mfp-pxa3xx.h> 18#include <mach/mfp-pxa3xx.h>
20 19
21/* GPIO */ 20/* GPIO */
@@ -38,6 +37,7 @@
38#define GPIO17_2_GPIO MFP_CFG(GPIO17_2, AF0) 37#define GPIO17_2_GPIO MFP_CFG(GPIO17_2, AF0)
39 38
40/* Chip Select */ 39/* Chip Select */
40#define GPIO3_nCS2 MFP_CFG(GPIO3, AF1)
41#define GPIO4_nCS3 MFP_CFG(GPIO4, AF1) 41#define GPIO4_nCS3 MFP_CFG(GPIO4, AF1)
42 42
43/* AC97 */ 43/* AC97 */
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa3xx.h b/arch/arm/mach-pxa/include/mach/mfp-pxa3xx.h
index 1f6b35c015d0..d375195d982b 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa3xx.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa3xx.h
@@ -1,68 +1,9 @@
1#ifndef __ASM_ARCH_MFP_PXA3XX_H 1#ifndef __ASM_ARCH_MFP_PXA3XX_H
2#define __ASM_ARCH_MFP_PXA3XX_H 2#define __ASM_ARCH_MFP_PXA3XX_H
3 3
4#define MFPR_BASE (0x40e10000) 4#include <plat/mfp.h>
5#define MFPR_SIZE (PAGE_SIZE)
6
7/* MFPR register bit definitions */
8#define MFPR_PULL_SEL (0x1 << 15)
9#define MFPR_PULLUP_EN (0x1 << 14)
10#define MFPR_PULLDOWN_EN (0x1 << 13)
11#define MFPR_SLEEP_SEL (0x1 << 9)
12#define MFPR_SLEEP_OE_N (0x1 << 7)
13#define MFPR_EDGE_CLEAR (0x1 << 6)
14#define MFPR_EDGE_FALL_EN (0x1 << 5)
15#define MFPR_EDGE_RISE_EN (0x1 << 4)
16
17#define MFPR_SLEEP_DATA(x) ((x) << 8)
18#define MFPR_DRIVE(x) (((x) & 0x7) << 10)
19#define MFPR_AF_SEL(x) (((x) & 0x7) << 0)
20 5
21#define MFPR_EDGE_NONE (0) 6#define MFPR_BASE (0x40e10000)
22#define MFPR_EDGE_RISE (MFPR_EDGE_RISE_EN)
23#define MFPR_EDGE_FALL (MFPR_EDGE_FALL_EN)
24#define MFPR_EDGE_BOTH (MFPR_EDGE_RISE | MFPR_EDGE_FALL)
25
26/*
27 * Table that determines the low power modes outputs, with actual settings
28 * used in parentheses for don't-care values. Except for the float output,
29 * the configured driven and pulled levels match, so if there is a need for
30 * non-LPM pulled output, the same configuration could probably be used.
31 *
32 * Output value sleep_oe_n sleep_data pullup_en pulldown_en pull_sel
33 * (bit 7) (bit 8) (bit 14) (bit 13) (bit 15)
34 *
35 * Input 0 X(0) X(0) X(0) 0
36 * Drive 0 0 0 0 X(1) 0
37 * Drive 1 0 1 X(1) 0 0
38 * Pull hi (1) 1 X(1) 1 0 0
39 * Pull lo (0) 1 X(0) 0 1 0
40 * Z (float) 1 X(0) 0 0 0
41 */
42#define MFPR_LPM_INPUT (0)
43#define MFPR_LPM_DRIVE_LOW (MFPR_SLEEP_DATA(0) | MFPR_PULLDOWN_EN)
44#define MFPR_LPM_DRIVE_HIGH (MFPR_SLEEP_DATA(1) | MFPR_PULLUP_EN)
45#define MFPR_LPM_PULL_LOW (MFPR_LPM_DRIVE_LOW | MFPR_SLEEP_OE_N)
46#define MFPR_LPM_PULL_HIGH (MFPR_LPM_DRIVE_HIGH | MFPR_SLEEP_OE_N)
47#define MFPR_LPM_FLOAT (MFPR_SLEEP_OE_N)
48#define MFPR_LPM_MASK (0xe080)
49
50/*
51 * The pullup and pulldown state of the MFP pin at run mode is by default
52 * determined by the selected alternate function. In case that some buggy
53 * devices need to override this default behavior, the definitions below
54 * indicates the setting of corresponding MFPR bits
55 *
56 * Definition pull_sel pullup_en pulldown_en
57 * MFPR_PULL_NONE 0 0 0
58 * MFPR_PULL_LOW 1 0 1
59 * MFPR_PULL_HIGH 1 1 0
60 * MFPR_PULL_BOTH 1 1 1
61 */
62#define MFPR_PULL_NONE (0)
63#define MFPR_PULL_LOW (MFPR_PULL_SEL | MFPR_PULLDOWN_EN)
64#define MFPR_PULL_BOTH (MFPR_PULL_LOW | MFPR_PULLUP_EN)
65#define MFPR_PULL_HIGH (MFPR_PULL_SEL | MFPR_PULLUP_EN)
66 7
67/* PXA3xx common MFP configurations - processor specific ones defined 8/* PXA3xx common MFP configurations - processor specific ones defined
68 * in mfp-pxa300.h and mfp-pxa320.h 9 * in mfp-pxa300.h and mfp-pxa320.h
@@ -197,56 +138,21 @@
197#define GPIO5_2_GPIO MFP_CFG(GPIO5_2, AF0) 138#define GPIO5_2_GPIO MFP_CFG(GPIO5_2, AF0)
198#define GPIO6_2_GPIO MFP_CFG(GPIO6_2, AF0) 139#define GPIO6_2_GPIO MFP_CFG(GPIO6_2, AF0)
199 140
200/* 141/* NOTE: usage of these two functions is not recommended,
201 * each MFP pin will have a MFPR register, since the offset of the 142 * use pxa3xx_mfp_config() instead.
202 * register varies between processors, the processor specific code
203 * should initialize the pin offsets by pxa3xx_mfp_init_addr()
204 *
205 * pxa3xx_mfp_init_addr - accepts a table of "pxa3xx_mfp_addr_map"
206 * structure, which represents a range of MFP pins from "start" to
207 * "end", with the offset begining at "offset", to define a single
208 * pin, let "end" = -1
209 *
210 * use
211 *
212 * MFP_ADDR_X() to define a range of pins
213 * MFP_ADDR() to define a single pin
214 * MFP_ADDR_END to signal the end of pin offset definitions
215 */
216struct pxa3xx_mfp_addr_map {
217 unsigned int start;
218 unsigned int end;
219 unsigned long offset;
220};
221
222#define MFP_ADDR_X(start, end, offset) \
223 { MFP_PIN_##start, MFP_PIN_##end, offset }
224
225#define MFP_ADDR(pin, offset) \
226 { MFP_PIN_##pin, -1, offset }
227
228#define MFP_ADDR_END { MFP_PIN_INVALID, 0 }
229
230/*
231 * pxa3xx_mfp_read()/pxa3xx_mfp_write() - for direct read/write access
232 * to the MFPR register
233 */
234unsigned long pxa3xx_mfp_read(int mfp);
235void pxa3xx_mfp_write(int mfp, unsigned long mfpr_val);
236
237/*
238 * pxa3xx_mfp_config - configure the MFPR registers
239 *
240 * used by board specific initialization code
241 */
242void pxa3xx_mfp_config(unsigned long *mfp_cfgs, int num);
243
244/*
245 * pxa3xx_mfp_init_addr() - initialize the mapping between mfp pin
246 * index and MFPR register offset
247 *
248 * used by processor specific code
249 */ 143 */
250void __init pxa3xx_mfp_init_addr(struct pxa3xx_mfp_addr_map *); 144static inline unsigned long pxa3xx_mfp_read(int mfp)
251void __init pxa3xx_init_mfp(void); 145{
146 return mfp_read(mfp);
147}
148
149static inline void pxa3xx_mfp_write(int mfp, unsigned long val)
150{
151 mfp_write(mfp, val);
152}
153
154static inline void pxa3xx_mfp_config(unsigned long *mfp_cfg, int num)
155{
156 mfp_config(mfp_cfg, num);
157}
252#endif /* __ASM_ARCH_MFP_PXA3XX_H */ 158#endif /* __ASM_ARCH_MFP_PXA3XX_H */
diff --git a/arch/arm/mach-pxa/include/mach/mfp-pxa930.h b/arch/arm/mach-pxa/include/mach/mfp-pxa930.h
index fa73f56a1372..0d119d3b9221 100644
--- a/arch/arm/mach-pxa/include/mach/mfp-pxa930.h
+++ b/arch/arm/mach-pxa/include/mach/mfp-pxa930.h
@@ -13,7 +13,6 @@
13#ifndef __ASM_ARCH_MFP_PXA9xx_H 13#ifndef __ASM_ARCH_MFP_PXA9xx_H
14#define __ASM_ARCH_MFP_PXA9xx_H 14#define __ASM_ARCH_MFP_PXA9xx_H
15 15
16#include <mach/mfp.h>
17#include <mach/mfp-pxa3xx.h> 16#include <mach/mfp-pxa3xx.h>
18 17
19/* GPIO */ 18/* GPIO */
diff --git a/arch/arm/mach-pxa/mfp-pxa3xx.c b/arch/arm/mach-pxa/mfp-pxa3xx.c
index eb197a6e8e94..7a270eecd480 100644
--- a/arch/arm/mach-pxa/mfp-pxa3xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa3xx.c
@@ -20,183 +20,9 @@
20#include <linux/sysdev.h> 20#include <linux/sysdev.h>
21 21
22#include <mach/hardware.h> 22#include <mach/hardware.h>
23#include <mach/mfp.h>
24#include <mach/mfp-pxa3xx.h> 23#include <mach/mfp-pxa3xx.h>
25#include <mach/pxa3xx-regs.h> 24#include <mach/pxa3xx-regs.h>
26 25
27/* mfp_spin_lock is used to ensure that MFP register configuration
28 * (most likely a read-modify-write operation) is atomic, and that
29 * mfp_table[] is consistent
30 */
31static DEFINE_SPINLOCK(mfp_spin_lock);
32
33static void __iomem *mfpr_mmio_base = (void __iomem *)&__REG(MFPR_BASE);
34
35struct pxa3xx_mfp_pin {
36 unsigned long config; /* -1 for not configured */
37 unsigned long mfpr_off; /* MFPRxx Register offset */
38 unsigned long mfpr_run; /* Run-Mode Register Value */
39 unsigned long mfpr_lpm; /* Low Power Mode Register Value */
40};
41
42static struct pxa3xx_mfp_pin mfp_table[MFP_PIN_MAX];
43
44/* mapping of MFP_LPM_* definitions to MFPR_LPM_* register bits */
45static const unsigned long mfpr_lpm[] = {
46 MFPR_LPM_INPUT,
47 MFPR_LPM_DRIVE_LOW,
48 MFPR_LPM_DRIVE_HIGH,
49 MFPR_LPM_PULL_LOW,
50 MFPR_LPM_PULL_HIGH,
51 MFPR_LPM_FLOAT,
52};
53
54/* mapping of MFP_PULL_* definitions to MFPR_PULL_* register bits */
55static const unsigned long mfpr_pull[] = {
56 MFPR_PULL_NONE,
57 MFPR_PULL_LOW,
58 MFPR_PULL_HIGH,
59 MFPR_PULL_BOTH,
60};
61
62/* mapping of MFP_LPM_EDGE_* definitions to MFPR_EDGE_* register bits */
63static const unsigned long mfpr_edge[] = {
64 MFPR_EDGE_NONE,
65 MFPR_EDGE_RISE,
66 MFPR_EDGE_FALL,
67 MFPR_EDGE_BOTH,
68};
69
70#define mfpr_readl(off) \
71 __raw_readl(mfpr_mmio_base + (off))
72
73#define mfpr_writel(off, val) \
74 __raw_writel(val, mfpr_mmio_base + (off))
75
76#define mfp_configured(p) ((p)->config != -1)
77
78/*
79 * perform a read-back of any MFPR register to make sure the
80 * previous writings are finished
81 */
82#define mfpr_sync() (void)__raw_readl(mfpr_mmio_base + 0)
83
84static inline void __mfp_config_run(struct pxa3xx_mfp_pin *p)
85{
86 if (mfp_configured(p))
87 mfpr_writel(p->mfpr_off, p->mfpr_run);
88}
89
90static inline void __mfp_config_lpm(struct pxa3xx_mfp_pin *p)
91{
92 if (mfp_configured(p)) {
93 unsigned long mfpr_clr = (p->mfpr_run & ~MFPR_EDGE_BOTH) | MFPR_EDGE_CLEAR;
94 if (mfpr_clr != p->mfpr_run)
95 mfpr_writel(p->mfpr_off, mfpr_clr);
96 if (p->mfpr_lpm != mfpr_clr)
97 mfpr_writel(p->mfpr_off, p->mfpr_lpm);
98 }
99}
100
101void pxa3xx_mfp_config(unsigned long *mfp_cfgs, int num)
102{
103 unsigned long flags;
104 int i;
105
106 spin_lock_irqsave(&mfp_spin_lock, flags);
107
108 for (i = 0; i < num; i++, mfp_cfgs++) {
109 unsigned long tmp, c = *mfp_cfgs;
110 struct pxa3xx_mfp_pin *p;
111 int pin, af, drv, lpm, edge, pull;
112
113 pin = MFP_PIN(c);
114 BUG_ON(pin >= MFP_PIN_MAX);
115 p = &mfp_table[pin];
116
117 af = MFP_AF(c);
118 drv = MFP_DS(c);
119 lpm = MFP_LPM_STATE(c);
120 edge = MFP_LPM_EDGE(c);
121 pull = MFP_PULL(c);
122
123 /* run-mode pull settings will conflict with MFPR bits of
124 * low power mode state, calculate mfpr_run and mfpr_lpm
125 * individually if pull != MFP_PULL_NONE
126 */
127 tmp = MFPR_AF_SEL(af) | MFPR_DRIVE(drv);
128
129 if (likely(pull == MFP_PULL_NONE)) {
130 p->mfpr_run = tmp | mfpr_lpm[lpm] | mfpr_edge[edge];
131 p->mfpr_lpm = p->mfpr_run;
132 } else {
133 p->mfpr_lpm = tmp | mfpr_lpm[lpm] | mfpr_edge[edge];
134 p->mfpr_run = tmp | mfpr_pull[pull];
135 }
136
137 p->config = c; __mfp_config_run(p);
138 }
139
140 mfpr_sync();
141 spin_unlock_irqrestore(&mfp_spin_lock, flags);
142}
143
144unsigned long pxa3xx_mfp_read(int mfp)
145{
146 unsigned long val, flags;
147
148 BUG_ON(mfp >= MFP_PIN_MAX);
149
150 spin_lock_irqsave(&mfp_spin_lock, flags);
151 val = mfpr_readl(mfp_table[mfp].mfpr_off);
152 spin_unlock_irqrestore(&mfp_spin_lock, flags);
153
154 return val;
155}
156
157void pxa3xx_mfp_write(int mfp, unsigned long val)
158{
159 unsigned long flags;
160
161 BUG_ON(mfp >= MFP_PIN_MAX);
162
163 spin_lock_irqsave(&mfp_spin_lock, flags);
164 mfpr_writel(mfp_table[mfp].mfpr_off, val);
165 mfpr_sync();
166 spin_unlock_irqrestore(&mfp_spin_lock, flags);
167}
168
169void __init pxa3xx_mfp_init_addr(struct pxa3xx_mfp_addr_map *map)
170{
171 struct pxa3xx_mfp_addr_map *p;
172 unsigned long offset, flags;
173 int i;
174
175 spin_lock_irqsave(&mfp_spin_lock, flags);
176
177 for (p = map; p->start != MFP_PIN_INVALID; p++) {
178 offset = p->offset;
179 i = p->start;
180
181 do {
182 mfp_table[i].mfpr_off = offset;
183 mfp_table[i].mfpr_run = 0;
184 mfp_table[i].mfpr_lpm = 0;
185 offset += 4; i++;
186 } while ((i <= p->end) && (p->end != -1));
187 }
188
189 spin_unlock_irqrestore(&mfp_spin_lock, flags);
190}
191
192void __init pxa3xx_init_mfp(void)
193{
194 int i;
195
196 for (i = 0; i < ARRAY_SIZE(mfp_table); i++)
197 mfp_table[i].config = -1;
198}
199
200#ifdef CONFIG_PM 26#ifdef CONFIG_PM
201/* 27/*
202 * Configure the MFPs appropriately for suspend/resume. 28 * Configure the MFPs appropriately for suspend/resume.
@@ -207,23 +33,13 @@ void __init pxa3xx_init_mfp(void)
207 */ 33 */
208static int pxa3xx_mfp_suspend(struct sys_device *d, pm_message_t state) 34static int pxa3xx_mfp_suspend(struct sys_device *d, pm_message_t state)
209{ 35{
210 int pin; 36 mfp_config_lpm();
211
212 for (pin = 0; pin < ARRAY_SIZE(mfp_table); pin++) {
213 struct pxa3xx_mfp_pin *p = &mfp_table[pin];
214 __mfp_config_lpm(p);
215 }
216 return 0; 37 return 0;
217} 38}
218 39
219static int pxa3xx_mfp_resume(struct sys_device *d) 40static int pxa3xx_mfp_resume(struct sys_device *d)
220{ 41{
221 int pin; 42 mfp_config_run();
222
223 for (pin = 0; pin < ARRAY_SIZE(mfp_table); pin++) {
224 struct pxa3xx_mfp_pin *p = &mfp_table[pin];
225 __mfp_config_run(p);
226 }
227 43
228 /* clear RDH bit when MFP settings are restored 44 /* clear RDH bit when MFP settings are restored
229 * 45 *
@@ -231,7 +47,6 @@ static int pxa3xx_mfp_resume(struct sys_device *d)
231 * preserve them here in case they will be referenced later 47 * preserve them here in case they will be referenced later
232 */ 48 */
233 ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S); 49 ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S);
234
235 return 0; 50 return 0;
236} 51}
237#else 52#else
diff --git a/arch/arm/mach-pxa/pxa300.c b/arch/arm/mach-pxa/pxa300.c
index 37bb12d13ca2..4ba6d21f851c 100644
--- a/arch/arm/mach-pxa/pxa300.c
+++ b/arch/arm/mach-pxa/pxa300.c
@@ -23,7 +23,7 @@
23#include "devices.h" 23#include "devices.h"
24#include "clock.h" 24#include "clock.h"
25 25
26static struct pxa3xx_mfp_addr_map pxa300_mfp_addr_map[] __initdata = { 26static struct mfp_addr_map pxa300_mfp_addr_map[] __initdata = {
27 27
28 MFP_ADDR_X(GPIO0, GPIO2, 0x00b4), 28 MFP_ADDR_X(GPIO0, GPIO2, 0x00b4),
29 MFP_ADDR_X(GPIO3, GPIO26, 0x027c), 29 MFP_ADDR_X(GPIO3, GPIO26, 0x027c),
@@ -72,7 +72,7 @@ static struct pxa3xx_mfp_addr_map pxa300_mfp_addr_map[] __initdata = {
72}; 72};
73 73
74/* override pxa300 MFP register addresses */ 74/* override pxa300 MFP register addresses */
75static struct pxa3xx_mfp_addr_map pxa310_mfp_addr_map[] __initdata = { 75static struct mfp_addr_map pxa310_mfp_addr_map[] __initdata = {
76 MFP_ADDR_X(GPIO30, GPIO98, 0x0418), 76 MFP_ADDR_X(GPIO30, GPIO98, 0x0418),
77 MFP_ADDR_X(GPIO7_2, GPIO12_2, 0x052C), 77 MFP_ADDR_X(GPIO7_2, GPIO12_2, 0x052C),
78 78
@@ -98,13 +98,13 @@ static struct clk_lookup pxa310_clkregs[] = {
98static int __init pxa300_init(void) 98static int __init pxa300_init(void)
99{ 99{
100 if (cpu_is_pxa300() || cpu_is_pxa310()) { 100 if (cpu_is_pxa300() || cpu_is_pxa310()) {
101 pxa3xx_init_mfp(); 101 mfp_init_base(io_p2v(MFPR_BASE));
102 pxa3xx_mfp_init_addr(pxa300_mfp_addr_map); 102 mfp_init_addr(pxa300_mfp_addr_map);
103 clks_register(ARRAY_AND_SIZE(common_clkregs)); 103 clks_register(ARRAY_AND_SIZE(common_clkregs));
104 } 104 }
105 105
106 if (cpu_is_pxa310()) { 106 if (cpu_is_pxa310()) {
107 pxa3xx_mfp_init_addr(pxa310_mfp_addr_map); 107 mfp_init_addr(pxa310_mfp_addr_map);
108 clks_register(ARRAY_AND_SIZE(pxa310_clkregs)); 108 clks_register(ARRAY_AND_SIZE(pxa310_clkregs));
109 } 109 }
110 110
diff --git a/arch/arm/mach-pxa/pxa320.c b/arch/arm/mach-pxa/pxa320.c
index e708f4e0ecaf..8b3d97efadab 100644
--- a/arch/arm/mach-pxa/pxa320.c
+++ b/arch/arm/mach-pxa/pxa320.c
@@ -23,7 +23,7 @@
23#include "devices.h" 23#include "devices.h"
24#include "clock.h" 24#include "clock.h"
25 25
26static struct pxa3xx_mfp_addr_map pxa320_mfp_addr_map[] __initdata = { 26static struct mfp_addr_map pxa320_mfp_addr_map[] __initdata = {
27 27
28 MFP_ADDR_X(GPIO0, GPIO4, 0x0124), 28 MFP_ADDR_X(GPIO0, GPIO4, 0x0124),
29 MFP_ADDR_X(GPIO5, GPIO9, 0x028C), 29 MFP_ADDR_X(GPIO5, GPIO9, 0x028C),
@@ -86,8 +86,8 @@ static struct clk_lookup pxa320_clkregs[] = {
86static int __init pxa320_init(void) 86static int __init pxa320_init(void)
87{ 87{
88 if (cpu_is_pxa320()) { 88 if (cpu_is_pxa320()) {
89 pxa3xx_init_mfp(); 89 mfp_init_base(io_p2v(MFPR_BASE));
90 pxa3xx_mfp_init_addr(pxa320_mfp_addr_map); 90 mfp_init_addr(pxa320_mfp_addr_map);
91 clks_register(ARRAY_AND_SIZE(pxa320_clkregs)); 91 clks_register(ARRAY_AND_SIZE(pxa320_clkregs));
92 } 92 }
93 93
diff --git a/arch/arm/mach-pxa/pxa930.c b/arch/arm/mach-pxa/pxa930.c
index f15dfa55f27f..71131742fffd 100644
--- a/arch/arm/mach-pxa/pxa930.c
+++ b/arch/arm/mach-pxa/pxa930.c
@@ -18,7 +18,7 @@
18 18
19#include <mach/pxa930.h> 19#include <mach/pxa930.h>
20 20
21static struct pxa3xx_mfp_addr_map pxa930_mfp_addr_map[] __initdata = { 21static struct mfp_addr_map pxa930_mfp_addr_map[] __initdata = {
22 22
23 MFP_ADDR(GPIO0, 0x02e0), 23 MFP_ADDR(GPIO0, 0x02e0),
24 MFP_ADDR(GPIO1, 0x02dc), 24 MFP_ADDR(GPIO1, 0x02dc),
@@ -179,8 +179,8 @@ static struct pxa3xx_mfp_addr_map pxa930_mfp_addr_map[] __initdata = {
179static int __init pxa930_init(void) 179static int __init pxa930_init(void)
180{ 180{
181 if (cpu_is_pxa930()) { 181 if (cpu_is_pxa930()) {
182 pxa3xx_init_mfp(); 182 mfp_init_base(io_p2v(MFPR_BASE));
183 pxa3xx_mfp_init_addr(pxa930_mfp_addr_map); 183 mfp_init_addr(pxa930_mfp_addr_map);
184 } 184 }
185 185
186 return 0; 186 return 0;
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index 4f6f5024884e..6e8ade6ae339 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -919,7 +919,7 @@ static void __init tosa_init(void)
919 pxa2xx_set_spi_info(2, &pxa_ssp_master_info); 919 pxa2xx_set_spi_info(2, &pxa_ssp_master_info);
920 spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info)); 920 spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
921 921
922 clk_add_alias("CLK_CK3P6MI", &tc6393xb_device.dev, "GPIO11_CLK", NULL); 922 clk_add_alias("CLK_CK3P6MI", tc6393xb_device.name, "GPIO11_CLK", NULL);
923 923
924 platform_add_devices(devices, ARRAY_SIZE(devices)); 924 platform_add_devices(devices, ARRAY_SIZE(devices));
925} 925}
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 0d8581f11211..a6230f7a24c8 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -340,6 +340,17 @@ config CPU_XSC3
340 select CPU_TLB_V4WBI if MMU 340 select CPU_TLB_V4WBI if MMU
341 select IO_36 341 select IO_36
342 342
343# Marvell PJ1 (Mohawk)
344config CPU_MOHAWK
345 bool
346 select CPU_32v5
347 select CPU_ABRT_EV5T
348 select CPU_PABRT_NOIFAR
349 select CPU_CACHE_VIVT
350 select CPU_CP15_MMU
351 select CPU_TLB_V4WBI if MMU
352 select CPU_COPY_V4WB if MMU
353
343# Feroceon 354# Feroceon
344config CPU_FEROCEON 355config CPU_FEROCEON
345 bool 356 bool
@@ -569,7 +580,7 @@ comment "Processor Features"
569 580
570config ARM_THUMB 581config ARM_THUMB
571 bool "Support Thumb user binaries" 582 bool "Support Thumb user binaries"
572 depends on CPU_ARM720T || CPU_ARM740T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM940T || CPU_ARM946E || CPU_ARM1020 || CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || CPU_XSCALE || CPU_XSC3 || CPU_V6 || CPU_V7 || CPU_FEROCEON 583 depends on CPU_ARM720T || CPU_ARM740T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM940T || CPU_ARM946E || CPU_ARM1020 || CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_V6 || CPU_V7 || CPU_FEROCEON
573 default y 584 default y
574 help 585 help
575 Say Y if you want to include kernel support for running user space 586 Say Y if you want to include kernel support for running user space
@@ -653,7 +664,7 @@ config CPU_CACHE_ROUND_ROBIN
653 664
654config CPU_BPREDICT_DISABLE 665config CPU_BPREDICT_DISABLE
655 bool "Disable branch prediction" 666 bool "Disable branch prediction"
656 depends on CPU_ARM1020 || CPU_V6 || CPU_XSC3 || CPU_V7 667 depends on CPU_ARM1020 || CPU_V6 || CPU_MOHAWK || CPU_XSC3 || CPU_V7
657 help 668 help
658 Say Y here to disable branch prediction. If unsure, say N. 669 Say Y here to disable branch prediction. If unsure, say N.
659 670
diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile
index 480f78a3611a..64149d9e55a5 100644
--- a/arch/arm/mm/Makefile
+++ b/arch/arm/mm/Makefile
@@ -70,6 +70,7 @@ obj-$(CONFIG_CPU_SA110) += proc-sa110.o
70obj-$(CONFIG_CPU_SA1100) += proc-sa1100.o 70obj-$(CONFIG_CPU_SA1100) += proc-sa1100.o
71obj-$(CONFIG_CPU_XSCALE) += proc-xscale.o 71obj-$(CONFIG_CPU_XSCALE) += proc-xscale.o
72obj-$(CONFIG_CPU_XSC3) += proc-xsc3.o 72obj-$(CONFIG_CPU_XSC3) += proc-xsc3.o
73obj-$(CONFIG_CPU_MOHAWK) += proc-mohawk.o
73obj-$(CONFIG_CPU_FEROCEON) += proc-feroceon.o 74obj-$(CONFIG_CPU_FEROCEON) += proc-feroceon.o
74obj-$(CONFIG_CPU_V6) += proc-v6.o 75obj-$(CONFIG_CPU_V6) += proc-v6.o
75obj-$(CONFIG_CPU_V7) += proc-v7.o 76obj-$(CONFIG_CPU_V7) += proc-v7.o
diff --git a/arch/arm/mm/proc-mohawk.S b/arch/arm/mm/proc-mohawk.S
new file mode 100644
index 000000000000..540f5078496b
--- /dev/null
+++ b/arch/arm/mm/proc-mohawk.S
@@ -0,0 +1,416 @@
1/*
2 * linux/arch/arm/mm/proc-mohawk.S: MMU functions for Marvell PJ1 core
3 *
4 * PJ1 (codename Mohawk) is a hybrid of the xscale3 and Marvell's own core.
5 *
6 * Heavily based on proc-arm926.S and proc-xsc3.S
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#include <linux/linkage.h>
24#include <linux/init.h>
25#include <asm/assembler.h>
26#include <asm/hwcap.h>
27#include <asm/pgtable-hwdef.h>
28#include <asm/pgtable.h>
29#include <asm/page.h>
30#include <asm/ptrace.h>
31#include "proc-macros.S"
32
33/*
34 * This is the maximum size of an area which will be flushed. If the
35 * area is larger than this, then we flush the whole cache.
36 */
37#define CACHE_DLIMIT 32768
38
39/*
40 * The cache line size of the L1 D cache.
41 */
42#define CACHE_DLINESIZE 32
43
44/*
45 * cpu_mohawk_proc_init()
46 */
47ENTRY(cpu_mohawk_proc_init)
48 mov pc, lr
49
50/*
51 * cpu_mohawk_proc_fin()
52 */
53ENTRY(cpu_mohawk_proc_fin)
54 stmfd sp!, {lr}
55 mov ip, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
56 msr cpsr_c, ip
57 bl mohawk_flush_kern_cache_all
58 mrc p15, 0, r0, c1, c0, 0 @ ctrl register
59 bic r0, r0, #0x1800 @ ...iz...........
60 bic r0, r0, #0x0006 @ .............ca.
61 mcr p15, 0, r0, c1, c0, 0 @ disable caches
62 ldmfd sp!, {pc}
63
64/*
65 * cpu_mohawk_reset(loc)
66 *
67 * Perform a soft reset of the system. Put the CPU into the
68 * same state as it would be if it had been reset, and branch
69 * to what would be the reset vector.
70 *
71 * loc: location to jump to for soft reset
72 *
73 * (same as arm926)
74 */
75 .align 5
76ENTRY(cpu_mohawk_reset)
77 mov ip, #0
78 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
79 mcr p15, 0, ip, c7, c10, 4 @ drain WB
80 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
81 mrc p15, 0, ip, c1, c0, 0 @ ctrl register
82 bic ip, ip, #0x0007 @ .............cam
83 bic ip, ip, #0x1100 @ ...i...s........
84 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
85 mov pc, r0
86
87/*
88 * cpu_mohawk_do_idle()
89 *
90 * Called with IRQs disabled
91 */
92 .align 5
93ENTRY(cpu_mohawk_do_idle)
94 mov r0, #0
95 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
96 mcr p15, 0, r0, c7, c0, 4 @ wait for interrupt
97 mov pc, lr
98
99/*
100 * flush_user_cache_all()
101 *
102 * Clean and invalidate all cache entries in a particular
103 * address space.
104 */
105ENTRY(mohawk_flush_user_cache_all)
106 /* FALLTHROUGH */
107
108/*
109 * flush_kern_cache_all()
110 *
111 * Clean and invalidate the entire cache.
112 */
113ENTRY(mohawk_flush_kern_cache_all)
114 mov r2, #VM_EXEC
115 mov ip, #0
116__flush_whole_cache:
117 mcr p15, 0, ip, c7, c14, 0 @ clean & invalidate all D cache
118 tst r2, #VM_EXEC
119 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
120 mcrne p15, 0, ip, c7, c10, 0 @ drain write buffer
121 mov pc, lr
122
123/*
124 * flush_user_cache_range(start, end, flags)
125 *
126 * Clean and invalidate a range of cache entries in the
127 * specified address range.
128 *
129 * - start - start address (inclusive)
130 * - end - end address (exclusive)
131 * - flags - vm_flags describing address space
132 *
133 * (same as arm926)
134 */
135ENTRY(mohawk_flush_user_cache_range)
136 mov ip, #0
137 sub r3, r1, r0 @ calculate total size
138 cmp r3, #CACHE_DLIMIT
139 bgt __flush_whole_cache
1401: tst r2, #VM_EXEC
141 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D entry
142 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
143 add r0, r0, #CACHE_DLINESIZE
144 mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D entry
145 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
146 add r0, r0, #CACHE_DLINESIZE
147 cmp r0, r1
148 blo 1b
149 tst r2, #VM_EXEC
150 mcrne p15, 0, ip, c7, c10, 4 @ drain WB
151 mov pc, lr
152
153/*
154 * coherent_kern_range(start, end)
155 *
156 * Ensure coherency between the Icache and the Dcache in the
157 * region described by start, end. If you have non-snooping
158 * Harvard caches, you need to implement this function.
159 *
160 * - start - virtual start address
161 * - end - virtual end address
162 */
163ENTRY(mohawk_coherent_kern_range)
164 /* FALLTHROUGH */
165
166/*
167 * coherent_user_range(start, end)
168 *
169 * Ensure coherency between the Icache and the Dcache in the
170 * region described by start, end. If you have non-snooping
171 * Harvard caches, you need to implement this function.
172 *
173 * - start - virtual start address
174 * - end - virtual end address
175 *
176 * (same as arm926)
177 */
178ENTRY(mohawk_coherent_user_range)
179 bic r0, r0, #CACHE_DLINESIZE - 1
1801: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
181 mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry
182 add r0, r0, #CACHE_DLINESIZE
183 cmp r0, r1
184 blo 1b
185 mcr p15, 0, r0, c7, c10, 4 @ drain WB
186 mov pc, lr
187
188/*
189 * flush_kern_dcache_page(void *page)
190 *
191 * Ensure no D cache aliasing occurs, either with itself or
192 * the I cache
193 *
194 * - addr - page aligned address
195 */
196ENTRY(mohawk_flush_kern_dcache_page)
197 add r1, r0, #PAGE_SZ
1981: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
199 add r0, r0, #CACHE_DLINESIZE
200 cmp r0, r1
201 blo 1b
202 mov r0, #0
203 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
204 mcr p15, 0, r0, c7, c10, 4 @ drain WB
205 mov pc, lr
206
207/*
208 * dma_inv_range(start, end)
209 *
210 * Invalidate (discard) the specified virtual address range.
211 * May not write back any entries. If 'start' or 'end'
212 * are not cache line aligned, those lines must be written
213 * back.
214 *
215 * - start - virtual start address
216 * - end - virtual end address
217 *
218 * (same as v4wb)
219 */
220ENTRY(mohawk_dma_inv_range)
221 tst r0, #CACHE_DLINESIZE - 1
222 mcrne p15, 0, r0, c7, c10, 1 @ clean D entry
223 tst r1, #CACHE_DLINESIZE - 1
224 mcrne p15, 0, r1, c7, c10, 1 @ clean D entry
225 bic r0, r0, #CACHE_DLINESIZE - 1
2261: mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry
227 add r0, r0, #CACHE_DLINESIZE
228 cmp r0, r1
229 blo 1b
230 mcr p15, 0, r0, c7, c10, 4 @ drain WB
231 mov pc, lr
232
233/*
234 * dma_clean_range(start, end)
235 *
236 * Clean the specified virtual address range.
237 *
238 * - start - virtual start address
239 * - end - virtual end address
240 *
241 * (same as v4wb)
242 */
243ENTRY(mohawk_dma_clean_range)
244 bic r0, r0, #CACHE_DLINESIZE - 1
2451: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
246 add r0, r0, #CACHE_DLINESIZE
247 cmp r0, r1
248 blo 1b
249 mcr p15, 0, r0, c7, c10, 4 @ drain WB
250 mov pc, lr
251
252/*
253 * dma_flush_range(start, end)
254 *
255 * Clean and invalidate the specified virtual address range.
256 *
257 * - start - virtual start address
258 * - end - virtual end address
259 */
260ENTRY(mohawk_dma_flush_range)
261 bic r0, r0, #CACHE_DLINESIZE - 1
2621:
263 mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
264 add r0, r0, #CACHE_DLINESIZE
265 cmp r0, r1
266 blo 1b
267 mcr p15, 0, r0, c7, c10, 4 @ drain WB
268 mov pc, lr
269
270ENTRY(mohawk_cache_fns)
271 .long mohawk_flush_kern_cache_all
272 .long mohawk_flush_user_cache_all
273 .long mohawk_flush_user_cache_range
274 .long mohawk_coherent_kern_range
275 .long mohawk_coherent_user_range
276 .long mohawk_flush_kern_dcache_page
277 .long mohawk_dma_inv_range
278 .long mohawk_dma_clean_range
279 .long mohawk_dma_flush_range
280
281ENTRY(cpu_mohawk_dcache_clean_area)
2821: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
283 add r0, r0, #CACHE_DLINESIZE
284 subs r1, r1, #CACHE_DLINESIZE
285 bhi 1b
286 mcr p15, 0, r0, c7, c10, 4 @ drain WB
287 mov pc, lr
288
289/*
290 * cpu_mohawk_switch_mm(pgd)
291 *
292 * Set the translation base pointer to be as described by pgd.
293 *
294 * pgd: new page tables
295 */
296 .align 5
297ENTRY(cpu_mohawk_switch_mm)
298 mov ip, #0
299 mcr p15, 0, ip, c7, c14, 0 @ clean & invalidate all D cache
300 mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache
301 mcr p15, 0, ip, c7, c10, 4 @ drain WB
302 orr r0, r0, #0x18 @ cache the page table in L2
303 mcr p15, 0, r0, c2, c0, 0 @ load page table pointer
304 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
305 mov pc, lr
306
307/*
308 * cpu_mohawk_set_pte_ext(ptep, pte, ext)
309 *
310 * Set a PTE and flush it out
311 */
312 .align 5
313ENTRY(cpu_mohawk_set_pte_ext)
314 armv3_set_pte_ext
315 mov r0, r0
316 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
317 mcr p15, 0, r0, c7, c10, 4 @ drain WB
318 mov pc, lr
319
320 __INIT
321
322 .type __mohawk_setup, #function
323__mohawk_setup:
324 mov r0, #0
325 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches
326 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
327 mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs
328 orr r4, r4, #0x18 @ cache the page table in L2
329 mcr p15, 0, r4, c2, c0, 0 @ load page table pointer
330
331 mov r0, #0 @ don't allow CP access
332 mcr p15, 0, r0, c15, c1, 0 @ write CP access register
333
334 adr r5, mohawk_crval
335 ldmia r5, {r5, r6}
336 mrc p15, 0, r0, c1, c0 @ get control register
337 bic r0, r0, r5
338 orr r0, r0, r6
339 mov pc, lr
340
341 .size __mohawk_setup, . - __mohawk_setup
342
343 /*
344 * R
345 * .RVI ZFRS BLDP WCAM
346 * .011 1001 ..00 0101
347 *
348 */
349 .type mohawk_crval, #object
350mohawk_crval:
351 crval clear=0x00007f3f, mmuset=0x00003905, ucset=0x00001134
352
353 __INITDATA
354
355/*
356 * Purpose : Function pointers used to access above functions - all calls
357 * come through these
358 */
359 .type mohawk_processor_functions, #object
360mohawk_processor_functions:
361 .word v5t_early_abort
362 .word pabort_noifar
363 .word cpu_mohawk_proc_init
364 .word cpu_mohawk_proc_fin
365 .word cpu_mohawk_reset
366 .word cpu_mohawk_do_idle
367 .word cpu_mohawk_dcache_clean_area
368 .word cpu_mohawk_switch_mm
369 .word cpu_mohawk_set_pte_ext
370 .size mohawk_processor_functions, . - mohawk_processor_functions
371
372 .section ".rodata"
373
374 .type cpu_arch_name, #object
375cpu_arch_name:
376 .asciz "armv5te"
377 .size cpu_arch_name, . - cpu_arch_name
378
379 .type cpu_elf_name, #object
380cpu_elf_name:
381 .asciz "v5"
382 .size cpu_elf_name, . - cpu_elf_name
383
384 .type cpu_mohawk_name, #object
385cpu_mohawk_name:
386 .asciz "Marvell 88SV331x"
387 .size cpu_mohawk_name, . - cpu_mohawk_name
388
389 .align
390
391 .section ".proc.info.init", #alloc, #execinstr
392
393 .type __88sv331x_proc_info,#object
394__88sv331x_proc_info:
395 .long 0x56158000 @ Marvell 88SV331x (MOHAWK)
396 .long 0xfffff000
397 .long PMD_TYPE_SECT | \
398 PMD_SECT_BUFFERABLE | \
399 PMD_SECT_CACHEABLE | \
400 PMD_BIT4 | \
401 PMD_SECT_AP_WRITE | \
402 PMD_SECT_AP_READ
403 .long PMD_TYPE_SECT | \
404 PMD_BIT4 | \
405 PMD_SECT_AP_WRITE | \
406 PMD_SECT_AP_READ
407 b __mohawk_setup
408 .long cpu_arch_name
409 .long cpu_elf_name
410 .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP
411 .long cpu_mohawk_name
412 .long mohawk_processor_functions
413 .long v4wbi_tlb_fns
414 .long v4wb_user_fns
415 .long mohawk_cache_fns
416 .size __88sv331x_proc_info, . - __88sv331x_proc_info
diff --git a/arch/arm/plat-pxa/Kconfig b/arch/arm/plat-pxa/Kconfig
new file mode 100644
index 000000000000..b158e98038ed
--- /dev/null
+++ b/arch/arm/plat-pxa/Kconfig
@@ -0,0 +1,3 @@
1if PLAT_PXA
2
3endif
diff --git a/arch/arm/plat-pxa/Makefile b/arch/arm/plat-pxa/Makefile
new file mode 100644
index 000000000000..4be37235f57b
--- /dev/null
+++ b/arch/arm/plat-pxa/Makefile
@@ -0,0 +1,7 @@
1#
2# Makefile for code common across different PXA processor families
3#
4
5obj-y := dma.o mfp.o
6
7obj-$(CONFIG_GENERIC_GPIO) += gpio.o
diff --git a/arch/arm/mach-pxa/dma.c b/arch/arm/plat-pxa/dma.c
index 01217e01f7d2..70aeee407f7d 100644
--- a/arch/arm/mach-pxa/dma.c
+++ b/arch/arm/plat-pxa/dma.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-pxa/dma.c 2 * linux/arch/arm/plat-pxa/dma.c
3 * 3 *
4 * PXA DMA registration and IRQ dispatching 4 * PXA DMA registration and IRQ dispatching
5 * 5 *
@@ -34,8 +34,8 @@ static struct dma_channel *dma_channels;
34static int num_dma_channels; 34static int num_dma_channels;
35 35
36int pxa_request_dma (char *name, pxa_dma_prio prio, 36int pxa_request_dma (char *name, pxa_dma_prio prio,
37 void (*irq_handler)(int, void *), 37 void (*irq_handler)(int, void *),
38 void *data) 38 void *data)
39{ 39{
40 unsigned long flags; 40 unsigned long flags;
41 int i, found = 0; 41 int i, found = 0;
diff --git a/arch/arm/mach-pxa/gpio.c b/arch/arm/plat-pxa/gpio.c
index 7c2267036bf1..af819bf21b63 100644
--- a/arch/arm/mach-pxa/gpio.c
+++ b/arch/arm/plat-pxa/gpio.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * linux/arch/arm/mach-pxa/gpio.c 2 * linux/arch/arm/plat-pxa/gpio.c
3 * 3 *
4 * Generic PXA GPIO handling 4 * Generic PXA GPIO handling
5 * 5 *
@@ -22,34 +22,6 @@
22 22
23int pxa_last_gpio; 23int pxa_last_gpio;
24 24
25/*
26 * We handle the GPIOs by banks, each bank covers up to 32 GPIOs with
27 * one set of registers. The register offsets are organized below:
28 *
29 * GPLR GPDR GPSR GPCR GRER GFER GEDR
30 * BANK 0 - 0x0000 0x000C 0x0018 0x0024 0x0030 0x003C 0x0048
31 * BANK 1 - 0x0004 0x0010 0x001C 0x0028 0x0034 0x0040 0x004C
32 * BANK 2 - 0x0008 0x0014 0x0020 0x002C 0x0038 0x0044 0x0050
33 *
34 * BANK 3 - 0x0100 0x010C 0x0118 0x0124 0x0130 0x013C 0x0148
35 * BANK 4 - 0x0104 0x0110 0x011C 0x0128 0x0134 0x0140 0x014C
36 * BANK 5 - 0x0108 0x0114 0x0120 0x012C 0x0138 0x0144 0x0150
37 *
38 * NOTE:
39 * BANK 3 is only available on PXA27x and later processors.
40 * BANK 4 and 5 are only available on PXA935
41 */
42
43#define GPIO_BANK(n) (GPIO_REGS_VIRT + BANK_OFF(n))
44
45#define GPLR_OFFSET 0x00
46#define GPDR_OFFSET 0x0C
47#define GPSR_OFFSET 0x18
48#define GPCR_OFFSET 0x24
49#define GRER_OFFSET 0x30
50#define GFER_OFFSET 0x3C
51#define GEDR_OFFSET 0x48
52
53struct pxa_gpio_chip { 25struct pxa_gpio_chip {
54 struct gpio_chip chip; 26 struct gpio_chip chip;
55 void __iomem *regbase; 27 void __iomem *regbase;
diff --git a/arch/arm/plat-pxa/include/plat/dma.h b/arch/arm/plat-pxa/include/plat/dma.h
new file mode 100644
index 000000000000..a7b91dc06852
--- /dev/null
+++ b/arch/arm/plat-pxa/include/plat/dma.h
@@ -0,0 +1,85 @@
1#ifndef __PLAT_DMA_H
2#define __PLAT_DMA_H
3
4#define DMAC_REG(x) (*((volatile u32 *)(DMAC_REGS_VIRT + (x))))
5
6#define DCSR(n) DMAC_REG((n) << 2)
7#define DALGN DMAC_REG(0x00a0) /* DMA Alignment Register */
8#define DINT DMAC_REG(0x00f0) /* DMA Interrupt Register */
9#define DDADR(n) DMAC_REG(0x0200 + ((n) << 4))
10#define DSADR(n) DMAC_REG(0x0204 + ((n) << 4))
11#define DTADR(n) DMAC_REG(0x0208 + ((n) << 4))
12#define DCMD(n) DMAC_REG(0x020c + ((n) << 4))
13#define DRCMR(n) DMAC_REG((((n) < 64) ? 0x0100 : 0x1100) + \
14 (((n) & 0x3f) << 2))
15
16#define DCSR_RUN (1 << 31) /* Run Bit (read / write) */
17#define DCSR_NODESC (1 << 30) /* No-Descriptor Fetch (read / write) */
18#define DCSR_STOPIRQEN (1 << 29) /* Stop Interrupt Enable (read / write) */
19#define DCSR_REQPEND (1 << 8) /* Request Pending (read-only) */
20#define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */
21#define DCSR_ENDINTR (1 << 2) /* End Interrupt (read / write) */
22#define DCSR_STARTINTR (1 << 1) /* Start Interrupt (read / write) */
23#define DCSR_BUSERR (1 << 0) /* Bus Error Interrupt (read / write) */
24
25#define DCSR_EORIRQEN (1 << 28) /* End of Receive Interrupt Enable (R/W) */
26#define DCSR_EORJMPEN (1 << 27) /* Jump to next descriptor on EOR */
27#define DCSR_EORSTOPEN (1 << 26) /* STOP on an EOR */
28#define DCSR_SETCMPST (1 << 25) /* Set Descriptor Compare Status */
29#define DCSR_CLRCMPST (1 << 24) /* Clear Descriptor Compare Status */
30#define DCSR_CMPST (1 << 10) /* The Descriptor Compare Status */
31#define DCSR_EORINTR (1 << 9) /* The end of Receive */
32
33#define DRCMR_MAPVLD (1 << 7) /* Map Valid (read / write) */
34#define DRCMR_CHLNUM 0x1f /* mask for Channel Number (read / write) */
35
36#define DDADR_DESCADDR 0xfffffff0 /* Address of next descriptor (mask) */
37#define DDADR_STOP (1 << 0) /* Stop (read / write) */
38
39#define DCMD_INCSRCADDR (1 << 31) /* Source Address Increment Setting. */
40#define DCMD_INCTRGADDR (1 << 30) /* Target Address Increment Setting. */
41#define DCMD_FLOWSRC (1 << 29) /* Flow Control by the source. */
42#define DCMD_FLOWTRG (1 << 28) /* Flow Control by the target. */
43#define DCMD_STARTIRQEN (1 << 22) /* Start Interrupt Enable */
44#define DCMD_ENDIRQEN (1 << 21) /* End Interrupt Enable */
45#define DCMD_ENDIAN (1 << 18) /* Device Endian-ness. */
46#define DCMD_BURST8 (1 << 16) /* 8 byte burst */
47#define DCMD_BURST16 (2 << 16) /* 16 byte burst */
48#define DCMD_BURST32 (3 << 16) /* 32 byte burst */
49#define DCMD_WIDTH1 (1 << 14) /* 1 byte width */
50#define DCMD_WIDTH2 (2 << 14) /* 2 byte width (HalfWord) */
51#define DCMD_WIDTH4 (3 << 14) /* 4 byte width (Word) */
52#define DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */
53
54/*
55 * Descriptor structure for PXA's DMA engine
56 * Note: this structure must always be aligned to a 16-byte boundary.
57 */
58
59typedef struct pxa_dma_desc {
60 volatile u32 ddadr; /* Points to the next descriptor + flags */
61 volatile u32 dsadr; /* DSADR value for the current transfer */
62 volatile u32 dtadr; /* DTADR value for the current transfer */
63 volatile u32 dcmd; /* DCMD value for the current transfer */
64} pxa_dma_desc;
65
66typedef enum {
67 DMA_PRIO_HIGH = 0,
68 DMA_PRIO_MEDIUM = 1,
69 DMA_PRIO_LOW = 2
70} pxa_dma_prio;
71
72/*
73 * DMA registration
74 */
75
76int __init pxa_init_dma(int irq, int num_ch);
77
78int pxa_request_dma (char *name,
79 pxa_dma_prio prio,
80 void (*irq_handler)(int, void *),
81 void *data);
82
83void pxa_free_dma (int dma_ch);
84
85#endif /* __PLAT_DMA_H */
diff --git a/arch/arm/plat-pxa/include/plat/gpio.h b/arch/arm/plat-pxa/include/plat/gpio.h
new file mode 100644
index 000000000000..44248cb926a5
--- /dev/null
+++ b/arch/arm/plat-pxa/include/plat/gpio.h
@@ -0,0 +1,62 @@
1#ifndef __PLAT_GPIO_H
2#define __PLAT_GPIO_H
3
4/*
5 * We handle the GPIOs by banks, each bank covers up to 32 GPIOs with
6 * one set of registers. The register offsets are organized below:
7 *
8 * GPLR GPDR GPSR GPCR GRER GFER GEDR
9 * BANK 0 - 0x0000 0x000C 0x0018 0x0024 0x0030 0x003C 0x0048
10 * BANK 1 - 0x0004 0x0010 0x001C 0x0028 0x0034 0x0040 0x004C
11 * BANK 2 - 0x0008 0x0014 0x0020 0x002C 0x0038 0x0044 0x0050
12 *
13 * BANK 3 - 0x0100 0x010C 0x0118 0x0124 0x0130 0x013C 0x0148
14 * BANK 4 - 0x0104 0x0110 0x011C 0x0128 0x0134 0x0140 0x014C
15 * BANK 5 - 0x0108 0x0114 0x0120 0x012C 0x0138 0x0144 0x0150
16 *
17 * NOTE:
18 * BANK 3 is only available on PXA27x and later processors.
19 * BANK 4 and 5 are only available on PXA935
20 */
21
22#define GPIO_BANK(n) (GPIO_REGS_VIRT + BANK_OFF(n))
23
24#define GPLR_OFFSET 0x00
25#define GPDR_OFFSET 0x0C
26#define GPSR_OFFSET 0x18
27#define GPCR_OFFSET 0x24
28#define GRER_OFFSET 0x30
29#define GFER_OFFSET 0x3C
30#define GEDR_OFFSET 0x48
31
32static inline int gpio_get_value(unsigned gpio)
33{
34 if (__builtin_constant_p(gpio) && (gpio < NR_BUILTIN_GPIO))
35 return GPLR(gpio) & GPIO_bit(gpio);
36 else
37 return __gpio_get_value(gpio);
38}
39
40static inline void gpio_set_value(unsigned gpio, int value)
41{
42 if (__builtin_constant_p(gpio) && (gpio < NR_BUILTIN_GPIO)) {
43 if (value)
44 GPSR(gpio) = GPIO_bit(gpio);
45 else
46 GPCR(gpio) = GPIO_bit(gpio);
47 } else
48 __gpio_set_value(gpio, value);
49}
50
51#define gpio_cansleep __gpio_cansleep
52
53/* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85).
54 * Those cases currently cause holes in the GPIO number space, the
55 * actual number of the last GPIO is recorded by 'pxa_last_gpio'.
56 */
57extern int pxa_last_gpio;
58
59typedef int (*set_wake_t)(unsigned int irq, unsigned int on);
60
61extern void pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn);
62#endif /* __PLAT_GPIO_H */
diff --git a/arch/arm/plat-pxa/include/plat/mfp.h b/arch/arm/plat-pxa/include/plat/mfp.h
new file mode 100644
index 000000000000..64019464c8db
--- /dev/null
+++ b/arch/arm/plat-pxa/include/plat/mfp.h
@@ -0,0 +1,399 @@
1/*
2 * arch/arm/plat-pxa/include/plat/mfp.h
3 *
4 * Common Multi-Function Pin Definitions
5 *
6 * Copyright (C) 2007 Marvell International Ltd.
7 *
8 * 2007-8-21: eric miao <eric.miao@marvell.com>
9 * initial version
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#ifndef __ASM_PLAT_MFP_H
17#define __ASM_PLAT_MFP_H
18
19#define mfp_to_gpio(m) ((m) % 128)
20
21/* list of all the configurable MFP pins */
22enum {
23 MFP_PIN_INVALID = -1,
24
25 MFP_PIN_GPIO0 = 0,
26 MFP_PIN_GPIO1,
27 MFP_PIN_GPIO2,
28 MFP_PIN_GPIO3,
29 MFP_PIN_GPIO4,
30 MFP_PIN_GPIO5,
31 MFP_PIN_GPIO6,
32 MFP_PIN_GPIO7,
33 MFP_PIN_GPIO8,
34 MFP_PIN_GPIO9,
35 MFP_PIN_GPIO10,
36 MFP_PIN_GPIO11,
37 MFP_PIN_GPIO12,
38 MFP_PIN_GPIO13,
39 MFP_PIN_GPIO14,
40 MFP_PIN_GPIO15,
41 MFP_PIN_GPIO16,
42 MFP_PIN_GPIO17,
43 MFP_PIN_GPIO18,
44 MFP_PIN_GPIO19,
45 MFP_PIN_GPIO20,
46 MFP_PIN_GPIO21,
47 MFP_PIN_GPIO22,
48 MFP_PIN_GPIO23,
49 MFP_PIN_GPIO24,
50 MFP_PIN_GPIO25,
51 MFP_PIN_GPIO26,
52 MFP_PIN_GPIO27,
53 MFP_PIN_GPIO28,
54 MFP_PIN_GPIO29,
55 MFP_PIN_GPIO30,
56 MFP_PIN_GPIO31,
57 MFP_PIN_GPIO32,
58 MFP_PIN_GPIO33,
59 MFP_PIN_GPIO34,
60 MFP_PIN_GPIO35,
61 MFP_PIN_GPIO36,
62 MFP_PIN_GPIO37,
63 MFP_PIN_GPIO38,
64 MFP_PIN_GPIO39,
65 MFP_PIN_GPIO40,
66 MFP_PIN_GPIO41,
67 MFP_PIN_GPIO42,
68 MFP_PIN_GPIO43,
69 MFP_PIN_GPIO44,
70 MFP_PIN_GPIO45,
71 MFP_PIN_GPIO46,
72 MFP_PIN_GPIO47,
73 MFP_PIN_GPIO48,
74 MFP_PIN_GPIO49,
75 MFP_PIN_GPIO50,
76 MFP_PIN_GPIO51,
77 MFP_PIN_GPIO52,
78 MFP_PIN_GPIO53,
79 MFP_PIN_GPIO54,
80 MFP_PIN_GPIO55,
81 MFP_PIN_GPIO56,
82 MFP_PIN_GPIO57,
83 MFP_PIN_GPIO58,
84 MFP_PIN_GPIO59,
85 MFP_PIN_GPIO60,
86 MFP_PIN_GPIO61,
87 MFP_PIN_GPIO62,
88 MFP_PIN_GPIO63,
89 MFP_PIN_GPIO64,
90 MFP_PIN_GPIO65,
91 MFP_PIN_GPIO66,
92 MFP_PIN_GPIO67,
93 MFP_PIN_GPIO68,
94 MFP_PIN_GPIO69,
95 MFP_PIN_GPIO70,
96 MFP_PIN_GPIO71,
97 MFP_PIN_GPIO72,
98 MFP_PIN_GPIO73,
99 MFP_PIN_GPIO74,
100 MFP_PIN_GPIO75,
101 MFP_PIN_GPIO76,
102 MFP_PIN_GPIO77,
103 MFP_PIN_GPIO78,
104 MFP_PIN_GPIO79,
105 MFP_PIN_GPIO80,
106 MFP_PIN_GPIO81,
107 MFP_PIN_GPIO82,
108 MFP_PIN_GPIO83,
109 MFP_PIN_GPIO84,
110 MFP_PIN_GPIO85,
111 MFP_PIN_GPIO86,
112 MFP_PIN_GPIO87,
113 MFP_PIN_GPIO88,
114 MFP_PIN_GPIO89,
115 MFP_PIN_GPIO90,
116 MFP_PIN_GPIO91,
117 MFP_PIN_GPIO92,
118 MFP_PIN_GPIO93,
119 MFP_PIN_GPIO94,
120 MFP_PIN_GPIO95,
121 MFP_PIN_GPIO96,
122 MFP_PIN_GPIO97,
123 MFP_PIN_GPIO98,
124 MFP_PIN_GPIO99,
125 MFP_PIN_GPIO100,
126 MFP_PIN_GPIO101,
127 MFP_PIN_GPIO102,
128 MFP_PIN_GPIO103,
129 MFP_PIN_GPIO104,
130 MFP_PIN_GPIO105,
131 MFP_PIN_GPIO106,
132 MFP_PIN_GPIO107,
133 MFP_PIN_GPIO108,
134 MFP_PIN_GPIO109,
135 MFP_PIN_GPIO110,
136 MFP_PIN_GPIO111,
137 MFP_PIN_GPIO112,
138 MFP_PIN_GPIO113,
139 MFP_PIN_GPIO114,
140 MFP_PIN_GPIO115,
141 MFP_PIN_GPIO116,
142 MFP_PIN_GPIO117,
143 MFP_PIN_GPIO118,
144 MFP_PIN_GPIO119,
145 MFP_PIN_GPIO120,
146 MFP_PIN_GPIO121,
147 MFP_PIN_GPIO122,
148 MFP_PIN_GPIO123,
149 MFP_PIN_GPIO124,
150 MFP_PIN_GPIO125,
151 MFP_PIN_GPIO126,
152 MFP_PIN_GPIO127,
153 MFP_PIN_GPIO0_2,
154 MFP_PIN_GPIO1_2,
155 MFP_PIN_GPIO2_2,
156 MFP_PIN_GPIO3_2,
157 MFP_PIN_GPIO4_2,
158 MFP_PIN_GPIO5_2,
159 MFP_PIN_GPIO6_2,
160 MFP_PIN_GPIO7_2,
161 MFP_PIN_GPIO8_2,
162 MFP_PIN_GPIO9_2,
163 MFP_PIN_GPIO10_2,
164 MFP_PIN_GPIO11_2,
165 MFP_PIN_GPIO12_2,
166 MFP_PIN_GPIO13_2,
167 MFP_PIN_GPIO14_2,
168 MFP_PIN_GPIO15_2,
169 MFP_PIN_GPIO16_2,
170 MFP_PIN_GPIO17_2,
171
172 MFP_PIN_ULPI_STP,
173 MFP_PIN_ULPI_NXT,
174 MFP_PIN_ULPI_DIR,
175
176 MFP_PIN_nXCVREN,
177 MFP_PIN_DF_CLE_nOE,
178 MFP_PIN_DF_nADV1_ALE,
179 MFP_PIN_DF_SCLK_E,
180 MFP_PIN_DF_SCLK_S,
181 MFP_PIN_nBE0,
182 MFP_PIN_nBE1,
183 MFP_PIN_DF_nADV2_ALE,
184 MFP_PIN_DF_INT_RnB,
185 MFP_PIN_DF_nCS0,
186 MFP_PIN_DF_nCS1,
187 MFP_PIN_nLUA,
188 MFP_PIN_nLLA,
189 MFP_PIN_DF_nWE,
190 MFP_PIN_DF_ALE_nWE,
191 MFP_PIN_DF_nRE_nOE,
192 MFP_PIN_DF_ADDR0,
193 MFP_PIN_DF_ADDR1,
194 MFP_PIN_DF_ADDR2,
195 MFP_PIN_DF_ADDR3,
196 MFP_PIN_DF_IO0,
197 MFP_PIN_DF_IO1,
198 MFP_PIN_DF_IO2,
199 MFP_PIN_DF_IO3,
200 MFP_PIN_DF_IO4,
201 MFP_PIN_DF_IO5,
202 MFP_PIN_DF_IO6,
203 MFP_PIN_DF_IO7,
204 MFP_PIN_DF_IO8,
205 MFP_PIN_DF_IO9,
206 MFP_PIN_DF_IO10,
207 MFP_PIN_DF_IO11,
208 MFP_PIN_DF_IO12,
209 MFP_PIN_DF_IO13,
210 MFP_PIN_DF_IO14,
211 MFP_PIN_DF_IO15,
212 MFP_PIN_DF_nCS0_SM_nCS2,
213 MFP_PIN_DF_nCS1_SM_nCS3,
214 MFP_PIN_SM_nCS0,
215 MFP_PIN_SM_nCS1,
216 MFP_PIN_DF_WEn,
217 MFP_PIN_DF_REn,
218 MFP_PIN_DF_CLE_SM_OEn,
219 MFP_PIN_DF_ALE_SM_WEn,
220 MFP_PIN_DF_RDY0,
221 MFP_PIN_DF_RDY1,
222
223 MFP_PIN_SM_SCLK,
224 MFP_PIN_SM_BE0,
225 MFP_PIN_SM_BE1,
226 MFP_PIN_SM_ADV,
227 MFP_PIN_SM_ADVMUX,
228 MFP_PIN_SM_RDY,
229
230 MFP_PIN_MMC1_DAT7,
231 MFP_PIN_MMC1_DAT6,
232 MFP_PIN_MMC1_DAT5,
233 MFP_PIN_MMC1_DAT4,
234 MFP_PIN_MMC1_DAT3,
235 MFP_PIN_MMC1_DAT2,
236 MFP_PIN_MMC1_DAT1,
237 MFP_PIN_MMC1_DAT0,
238 MFP_PIN_MMC1_CMD,
239 MFP_PIN_MMC1_CLK,
240 MFP_PIN_MMC1_CD,
241 MFP_PIN_MMC1_WP,
242
243 /* additional pins on PXA930 */
244 MFP_PIN_GSIM_UIO,
245 MFP_PIN_GSIM_UCLK,
246 MFP_PIN_GSIM_UDET,
247 MFP_PIN_GSIM_nURST,
248 MFP_PIN_PMIC_INT,
249 MFP_PIN_RDY,
250
251 MFP_PIN_MAX,
252};
253
254/*
255 * a possible MFP configuration is represented by a 32-bit integer
256 *
257 * bit 0.. 9 - MFP Pin Number (1024 Pins Maximum)
258 * bit 10..12 - Alternate Function Selection
259 * bit 13..15 - Drive Strength
260 * bit 16..18 - Low Power Mode State
261 * bit 19..20 - Low Power Mode Edge Detection
262 * bit 21..22 - Run Mode Pull State
263 *
264 * to facilitate the definition, the following macros are provided
265 *
266 * MFP_CFG_DEFAULT - default MFP configuration value, with
267 * alternate function = 0,
268 * drive strength = fast 3mA (MFP_DS03X)
269 * low power mode = default
270 * edge detection = none
271 *
272 * MFP_CFG - default MFPR value with alternate function
273 * MFP_CFG_DRV - default MFPR value with alternate function and
274 * pin drive strength
275 * MFP_CFG_LPM - default MFPR value with alternate function and
276 * low power mode
277 * MFP_CFG_X - default MFPR value with alternate function,
278 * pin drive strength and low power mode
279 */
280
281typedef unsigned long mfp_cfg_t;
282
283#define MFP_PIN(x) ((x) & 0x3ff)
284
285#define MFP_AF0 (0x0 << 10)
286#define MFP_AF1 (0x1 << 10)
287#define MFP_AF2 (0x2 << 10)
288#define MFP_AF3 (0x3 << 10)
289#define MFP_AF4 (0x4 << 10)
290#define MFP_AF5 (0x5 << 10)
291#define MFP_AF6 (0x6 << 10)
292#define MFP_AF7 (0x7 << 10)
293#define MFP_AF_MASK (0x7 << 10)
294#define MFP_AF(x) (((x) >> 10) & 0x7)
295
296#define MFP_DS01X (0x0 << 13)
297#define MFP_DS02X (0x1 << 13)
298#define MFP_DS03X (0x2 << 13)
299#define MFP_DS04X (0x3 << 13)
300#define MFP_DS06X (0x4 << 13)
301#define MFP_DS08X (0x5 << 13)
302#define MFP_DS10X (0x6 << 13)
303#define MFP_DS13X (0x7 << 13)
304#define MFP_DS_MASK (0x7 << 13)
305#define MFP_DS(x) (((x) >> 13) & 0x7)
306
307#define MFP_LPM_DEFAULT (0x0 << 16)
308#define MFP_LPM_DRIVE_LOW (0x1 << 16)
309#define MFP_LPM_DRIVE_HIGH (0x2 << 16)
310#define MFP_LPM_PULL_LOW (0x3 << 16)
311#define MFP_LPM_PULL_HIGH (0x4 << 16)
312#define MFP_LPM_FLOAT (0x5 << 16)
313#define MFP_LPM_INPUT (0x6 << 16)
314#define MFP_LPM_STATE_MASK (0x7 << 16)
315#define MFP_LPM_STATE(x) (((x) >> 16) & 0x7)
316
317#define MFP_LPM_EDGE_NONE (0x0 << 19)
318#define MFP_LPM_EDGE_RISE (0x1 << 19)
319#define MFP_LPM_EDGE_FALL (0x2 << 19)
320#define MFP_LPM_EDGE_BOTH (0x3 << 19)
321#define MFP_LPM_EDGE_MASK (0x3 << 19)
322#define MFP_LPM_EDGE(x) (((x) >> 19) & 0x3)
323
324#define MFP_PULL_NONE (0x0 << 21)
325#define MFP_PULL_LOW (0x1 << 21)
326#define MFP_PULL_HIGH (0x2 << 21)
327#define MFP_PULL_BOTH (0x3 << 21)
328#define MFP_PULL_MASK (0x3 << 21)
329#define MFP_PULL(x) (((x) >> 21) & 0x3)
330
331#define MFP_CFG_DEFAULT (MFP_AF0 | MFP_DS03X | MFP_LPM_DEFAULT |\
332 MFP_LPM_EDGE_NONE | MFP_PULL_NONE)
333
334#define MFP_CFG(pin, af) \
335 ((MFP_CFG_DEFAULT & ~MFP_AF_MASK) |\
336 (MFP_PIN(MFP_PIN_##pin) | MFP_##af))
337
338#define MFP_CFG_DRV(pin, af, drv) \
339 ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DS_MASK)) |\
340 (MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_##drv))
341
342#define MFP_CFG_LPM(pin, af, lpm) \
343 ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_LPM_STATE_MASK)) |\
344 (MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_LPM_##lpm))
345
346#define MFP_CFG_X(pin, af, drv, lpm) \
347 ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DS_MASK | MFP_LPM_STATE_MASK)) |\
348 (MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_##drv | MFP_LPM_##lpm))
349
350#if defined(CONFIG_PXA3xx) || defined(CONFIG_ARCH_MMP)
351/*
352 * each MFP pin will have a MFPR register, since the offset of the
353 * register varies between processors, the processor specific code
354 * should initialize the pin offsets by mfp_init()
355 *
356 * mfp_init_base() - accepts a virtual base for all MFPR registers and
357 * initialize the MFP table to a default state
358 *
359 * mfp_init_addr() - accepts a table of "mfp_addr_map" structure, which
360 * represents a range of MFP pins from "start" to "end", with the offset
361 * begining at "offset", to define a single pin, let "end" = -1.
362 *
363 * use
364 *
365 * MFP_ADDR_X() to define a range of pins
366 * MFP_ADDR() to define a single pin
367 * MFP_ADDR_END to signal the end of pin offset definitions
368 */
369struct mfp_addr_map {
370 unsigned int start;
371 unsigned int end;
372 unsigned long offset;
373};
374
375#define MFP_ADDR_X(start, end, offset) \
376 { MFP_PIN_##start, MFP_PIN_##end, offset }
377
378#define MFP_ADDR(pin, offset) \
379 { MFP_PIN_##pin, -1, offset }
380
381#define MFP_ADDR_END { MFP_PIN_INVALID, 0 }
382
383void __init mfp_init_base(unsigned long mfpr_base);
384void __init mfp_init_addr(struct mfp_addr_map *map);
385
386/*
387 * mfp_{read, write}() - for direct read/write access to the MFPR register
388 * mfp_config() - for configuring a group of MFPR registers
389 * mfp_config_lpm() - configuring all low power MFPR registers for suspend
390 * mfp_config_run() - configuring all run time MFPR registers after resume
391 */
392unsigned long mfp_read(int mfp);
393void mfp_write(int mfp, unsigned long mfpr_val);
394void mfp_config(unsigned long *mfp_cfgs, int num);
395void mfp_config_run(void);
396void mfp_config_lpm(void);
397#endif /* CONFIG_PXA3xx || CONFIG_ARCH_MMP */
398
399#endif /* __ASM_PLAT_MFP_H */
diff --git a/arch/arm/plat-pxa/mfp.c b/arch/arm/plat-pxa/mfp.c
new file mode 100644
index 000000000000..e716c622a17c
--- /dev/null
+++ b/arch/arm/plat-pxa/mfp.c
@@ -0,0 +1,278 @@
1/*
2 * linux/arch/arm/plat-pxa/mfp.c
3 *
4 * Multi-Function Pin Support
5 *
6 * Copyright (C) 2007 Marvell Internation Ltd.
7 *
8 * 2007-08-21: eric miao <eric.miao@marvell.com>
9 * initial version
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/module.h>
17#include <linux/kernel.h>
18#include <linux/init.h>
19#include <linux/io.h>
20#include <linux/sysdev.h>
21
22#include <plat/mfp.h>
23
24#define MFPR_SIZE (PAGE_SIZE)
25
26/* MFPR register bit definitions */
27#define MFPR_PULL_SEL (0x1 << 15)
28#define MFPR_PULLUP_EN (0x1 << 14)
29#define MFPR_PULLDOWN_EN (0x1 << 13)
30#define MFPR_SLEEP_SEL (0x1 << 9)
31#define MFPR_SLEEP_OE_N (0x1 << 7)
32#define MFPR_EDGE_CLEAR (0x1 << 6)
33#define MFPR_EDGE_FALL_EN (0x1 << 5)
34#define MFPR_EDGE_RISE_EN (0x1 << 4)
35
36#define MFPR_SLEEP_DATA(x) ((x) << 8)
37#define MFPR_DRIVE(x) (((x) & 0x7) << 10)
38#define MFPR_AF_SEL(x) (((x) & 0x7) << 0)
39
40#define MFPR_EDGE_NONE (0)
41#define MFPR_EDGE_RISE (MFPR_EDGE_RISE_EN)
42#define MFPR_EDGE_FALL (MFPR_EDGE_FALL_EN)
43#define MFPR_EDGE_BOTH (MFPR_EDGE_RISE | MFPR_EDGE_FALL)
44
45/*
46 * Table that determines the low power modes outputs, with actual settings
47 * used in parentheses for don't-care values. Except for the float output,
48 * the configured driven and pulled levels match, so if there is a need for
49 * non-LPM pulled output, the same configuration could probably be used.
50 *
51 * Output value sleep_oe_n sleep_data pullup_en pulldown_en pull_sel
52 * (bit 7) (bit 8) (bit 14) (bit 13) (bit 15)
53 *
54 * Input 0 X(0) X(0) X(0) 0
55 * Drive 0 0 0 0 X(1) 0
56 * Drive 1 0 1 X(1) 0 0
57 * Pull hi (1) 1 X(1) 1 0 0
58 * Pull lo (0) 1 X(0) 0 1 0
59 * Z (float) 1 X(0) 0 0 0
60 */
61#define MFPR_LPM_INPUT (0)
62#define MFPR_LPM_DRIVE_LOW (MFPR_SLEEP_DATA(0) | MFPR_PULLDOWN_EN)
63#define MFPR_LPM_DRIVE_HIGH (MFPR_SLEEP_DATA(1) | MFPR_PULLUP_EN)
64#define MFPR_LPM_PULL_LOW (MFPR_LPM_DRIVE_LOW | MFPR_SLEEP_OE_N)
65#define MFPR_LPM_PULL_HIGH (MFPR_LPM_DRIVE_HIGH | MFPR_SLEEP_OE_N)
66#define MFPR_LPM_FLOAT (MFPR_SLEEP_OE_N)
67#define MFPR_LPM_MASK (0xe080)
68
69/*
70 * The pullup and pulldown state of the MFP pin at run mode is by default
71 * determined by the selected alternate function. In case that some buggy
72 * devices need to override this default behavior, the definitions below
73 * indicates the setting of corresponding MFPR bits
74 *
75 * Definition pull_sel pullup_en pulldown_en
76 * MFPR_PULL_NONE 0 0 0
77 * MFPR_PULL_LOW 1 0 1
78 * MFPR_PULL_HIGH 1 1 0
79 * MFPR_PULL_BOTH 1 1 1
80 */
81#define MFPR_PULL_NONE (0)
82#define MFPR_PULL_LOW (MFPR_PULL_SEL | MFPR_PULLDOWN_EN)
83#define MFPR_PULL_BOTH (MFPR_PULL_LOW | MFPR_PULLUP_EN)
84#define MFPR_PULL_HIGH (MFPR_PULL_SEL | MFPR_PULLUP_EN)
85
86/* mfp_spin_lock is used to ensure that MFP register configuration
87 * (most likely a read-modify-write operation) is atomic, and that
88 * mfp_table[] is consistent
89 */
90static DEFINE_SPINLOCK(mfp_spin_lock);
91
92static void __iomem *mfpr_mmio_base;
93
94struct mfp_pin {
95 unsigned long config; /* -1 for not configured */
96 unsigned long mfpr_off; /* MFPRxx Register offset */
97 unsigned long mfpr_run; /* Run-Mode Register Value */
98 unsigned long mfpr_lpm; /* Low Power Mode Register Value */
99};
100
101static struct mfp_pin mfp_table[MFP_PIN_MAX];
102
103/* mapping of MFP_LPM_* definitions to MFPR_LPM_* register bits */
104static const unsigned long mfpr_lpm[] = {
105 MFPR_LPM_INPUT,
106 MFPR_LPM_DRIVE_LOW,
107 MFPR_LPM_DRIVE_HIGH,
108 MFPR_LPM_PULL_LOW,
109 MFPR_LPM_PULL_HIGH,
110 MFPR_LPM_FLOAT,
111};
112
113/* mapping of MFP_PULL_* definitions to MFPR_PULL_* register bits */
114static const unsigned long mfpr_pull[] = {
115 MFPR_PULL_NONE,
116 MFPR_PULL_LOW,
117 MFPR_PULL_HIGH,
118 MFPR_PULL_BOTH,
119};
120
121/* mapping of MFP_LPM_EDGE_* definitions to MFPR_EDGE_* register bits */
122static const unsigned long mfpr_edge[] = {
123 MFPR_EDGE_NONE,
124 MFPR_EDGE_RISE,
125 MFPR_EDGE_FALL,
126 MFPR_EDGE_BOTH,
127};
128
129#define mfpr_readl(off) \
130 __raw_readl(mfpr_mmio_base + (off))
131
132#define mfpr_writel(off, val) \
133 __raw_writel(val, mfpr_mmio_base + (off))
134
135#define mfp_configured(p) ((p)->config != -1)
136
137/*
138 * perform a read-back of any MFPR register to make sure the
139 * previous writings are finished
140 */
141#define mfpr_sync() (void)__raw_readl(mfpr_mmio_base + 0)
142
143static inline void __mfp_config_run(struct mfp_pin *p)
144{
145 if (mfp_configured(p))
146 mfpr_writel(p->mfpr_off, p->mfpr_run);
147}
148
149static inline void __mfp_config_lpm(struct mfp_pin *p)
150{
151 if (mfp_configured(p)) {
152 unsigned long mfpr_clr = (p->mfpr_run & ~MFPR_EDGE_BOTH) | MFPR_EDGE_CLEAR;
153 if (mfpr_clr != p->mfpr_run)
154 mfpr_writel(p->mfpr_off, mfpr_clr);
155 if (p->mfpr_lpm != mfpr_clr)
156 mfpr_writel(p->mfpr_off, p->mfpr_lpm);
157 }
158}
159
160void mfp_config(unsigned long *mfp_cfgs, int num)
161{
162 unsigned long flags;
163 int i;
164
165 spin_lock_irqsave(&mfp_spin_lock, flags);
166
167 for (i = 0; i < num; i++, mfp_cfgs++) {
168 unsigned long tmp, c = *mfp_cfgs;
169 struct mfp_pin *p;
170 int pin, af, drv, lpm, edge, pull;
171
172 pin = MFP_PIN(c);
173 BUG_ON(pin >= MFP_PIN_MAX);
174 p = &mfp_table[pin];
175
176 af = MFP_AF(c);
177 drv = MFP_DS(c);
178 lpm = MFP_LPM_STATE(c);
179 edge = MFP_LPM_EDGE(c);
180 pull = MFP_PULL(c);
181
182 /* run-mode pull settings will conflict with MFPR bits of
183 * low power mode state, calculate mfpr_run and mfpr_lpm
184 * individually if pull != MFP_PULL_NONE
185 */
186 tmp = MFPR_AF_SEL(af) | MFPR_DRIVE(drv);
187
188 if (likely(pull == MFP_PULL_NONE)) {
189 p->mfpr_run = tmp | mfpr_lpm[lpm] | mfpr_edge[edge];
190 p->mfpr_lpm = p->mfpr_run;
191 } else {
192 p->mfpr_lpm = tmp | mfpr_lpm[lpm] | mfpr_edge[edge];
193 p->mfpr_run = tmp | mfpr_pull[pull];
194 }
195
196 p->config = c; __mfp_config_run(p);
197 }
198
199 mfpr_sync();
200 spin_unlock_irqrestore(&mfp_spin_lock, flags);
201}
202
203unsigned long mfp_read(int mfp)
204{
205 unsigned long val, flags;
206
207 BUG_ON(mfp >= MFP_PIN_MAX);
208
209 spin_lock_irqsave(&mfp_spin_lock, flags);
210 val = mfpr_readl(mfp_table[mfp].mfpr_off);
211 spin_unlock_irqrestore(&mfp_spin_lock, flags);
212
213 return val;
214}
215
216void mfp_write(int mfp, unsigned long val)
217{
218 unsigned long flags;
219
220 BUG_ON(mfp >= MFP_PIN_MAX);
221
222 spin_lock_irqsave(&mfp_spin_lock, flags);
223 mfpr_writel(mfp_table[mfp].mfpr_off, val);
224 mfpr_sync();
225 spin_unlock_irqrestore(&mfp_spin_lock, flags);
226}
227
228void __init mfp_init_base(unsigned long mfpr_base)
229{
230 int i;
231
232 /* initialize the table with default - unconfigured */
233 for (i = 0; i < ARRAY_SIZE(mfp_table); i++)
234 mfp_table[i].config = -1;
235
236 mfpr_mmio_base = (void __iomem *)mfpr_base;
237}
238
239void __init mfp_init_addr(struct mfp_addr_map *map)
240{
241 struct mfp_addr_map *p;
242 unsigned long offset, flags;
243 int i;
244
245 spin_lock_irqsave(&mfp_spin_lock, flags);
246
247 for (p = map; p->start != MFP_PIN_INVALID; p++) {
248 offset = p->offset;
249 i = p->start;
250
251 do {
252 mfp_table[i].mfpr_off = offset;
253 mfp_table[i].mfpr_run = 0;
254 mfp_table[i].mfpr_lpm = 0;
255 offset += 4; i++;
256 } while ((i <= p->end) && (p->end != -1));
257 }
258
259 spin_unlock_irqrestore(&mfp_spin_lock, flags);
260}
261
262void mfp_config_lpm(void)
263{
264 struct mfp_pin *p = &mfp_table[0];
265 int pin;
266
267 for (pin = 0; pin < ARRAY_SIZE(mfp_table); pin++, p++)
268 __mfp_config_lpm(p);
269}
270
271void mfp_config_run(void)
272{
273 struct mfp_pin *p = &mfp_table[0];
274 int pin;
275
276 for (pin = 0; pin < ARRAY_SIZE(mfp_table); pin++, p++)
277 __mfp_config_run(p);
278}
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