Fix misspellings of "system", "controller", "interrupt" and "necessary".

Fix the various misspellings of "system", controller", "interrupt" and
"[un]necessary".

Signed-off-by: Robert P. J. Day <rpjday@mindspring.com>
Signed-off-by: Adrian Bunk <bunk@kernel.org>

14 files changed, 14 insertions, 14 deletions

diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c
index ba4a1bb3ee40..aa2d365c93fb 100644
--- a/arch/arm/mach-at91/gpio.c
+++ b/arch/arm/mach-at91/gpio.c
@@ -439,7 +439,7 @@ void __init at91_gpio_irq_setup(void)
                 for (i = 0; i < 32; i++, pin++) {
                         /*
                          * Can use the "simple" and not "edge" handler since it's
-                         * shorter, and the AIC handles interupts sanely.
+                         * shorter, and the AIC handles interrupts sanely.
                          */
                         set_irq_chip(pin, &gpio_irqchip);
                         set_irq_handler(pin, handle_simple_irq);
diff --git a/arch/arm/mach-s3c2410/clock.c b/arch/arm/mach-s3c2410/clock.c
index cab9d6265e9e..2bfaa6102025 100644
--- a/arch/arm/mach-s3c2410/clock.c
+++ b/arch/arm/mach-s3c2410/clock.c
@@ -238,7 +238,7 @@ int __init s3c2410_baseclk_add(void)
         }
 
         /* We must be careful disabling the clocks we are not intending to
-         * be using at boot time, as subsytems such as the LCD which do
+         * be using at boot time, as subsystems such as the LCD which do
          * their own DMA requests to the bus can cause the system to lockup
          * if they where in the middle of requesting bus access.
          *
diff --git a/arch/arm/mach-s3c2412/clock.c b/arch/arm/mach-s3c2412/clock.c
index 8543dd6df391..458993601897 100644
--- a/arch/arm/mach-s3c2412/clock.c
+++ b/arch/arm/mach-s3c2412/clock.c
@@ -689,7 +689,7 @@ int __init s3c2412_baseclk_add(void)
         }
 
         /* We must be careful disabling the clocks we are not intending to
-         * be using at boot time, as subsytems such as the LCD which do
+         * be using at boot time, as subsystems such as the LCD which do
          * their own DMA requests to the bus can cause the system to lockup
          * if they where in the middle of requesting bus access.
          *
diff --git a/arch/arm/mach-s3c2443/clock.c b/arch/arm/mach-s3c2443/clock.c
index 58402948c47c..b42f956738d0 100644
--- a/arch/arm/mach-s3c2443/clock.c
+++ b/arch/arm/mach-s3c2443/clock.c
@@ -1005,7 +1005,7 @@ void __init s3c2443_init_clocks(int xtal)
         }
 
         /* We must be careful disabling the clocks we are not intending to
-         * be using at boot time, as subsytems such as the LCD which do
+         * be using at boot time, as subsystems such as the LCD which do
          * their own DMA requests to the bus can cause the system to lockup
          * if they where in the middle of requesting bus access.
          *
diff --git a/arch/cris/arch-v10/drivers/pcf8563.c b/arch/cris/arch-v10/drivers/pcf8563.c
index 1de0026bb94e..c263b8232dbc 100644
--- a/arch/cris/arch-v10/drivers/pcf8563.c
+++ b/arch/cris/arch-v10/drivers/pcf8563.c
@@ -4,7 +4,7 @@
  * From Phillips' datasheet:
  *
  * The PCF8563 is a CMOS real-time clock/calendar optimized for low power
- * consumption. A programmable clock output, interupt output and voltage
+ * consumption. A programmable clock output, interrupt output and voltage
  * low detector are also provided. All address and data are transferred
  * serially via two-line bidirectional I2C-bus. Maximum bus speed is
  * 400 kbits/s. The built-in word address register is incremented
diff --git a/arch/cris/arch-v32/drivers/pcf8563.c b/arch/cris/arch-v32/drivers/pcf8563.c
index da479a14f836..6dbd700d3d66 100644
--- a/arch/cris/arch-v32/drivers/pcf8563.c
+++ b/arch/cris/arch-v32/drivers/pcf8563.c
@@ -4,7 +4,7 @@
  * From Phillips' datasheet:
  *
  * The PCF8563 is a CMOS real-time clock/calendar optimized for low power
- * consumption. A programmable clock output, interupt output and voltage
+ * consumption. A programmable clock output, interrupt output and voltage
  * low detector are also provided. All address and data are transferred
  * serially via two-line bidirectional I2C-bus. Maximum bus speed is
  * 400 kbits/s. The built-in word address register is incremented
diff --git a/arch/h8300/kernel/irq.c b/arch/h8300/kernel/irq.c
index 43d21e93f41f..8dec4dd57b4e 100644
--- a/arch/h8300/kernel/irq.c
+++ b/arch/h8300/kernel/irq.c
@@ -68,7 +68,7 @@ static void h8300_shutdown_irq(unsigned int irq)
 }
 
 /*
- * h8300 interrupt controler implementation
+ * h8300 interrupt controller implementation
  */
 struct irq_chip h8300irq_chip = {
         .name           = "H8300-INTC",
diff --git a/arch/m68knommu/platform/5307/pit.c b/arch/m68knommu/platform/5307/pit.c
index e53c446d10e4..f18352fa35a6 100644
--- a/arch/m68knommu/platform/5307/pit.c
+++ b/arch/m68knommu/platform/5307/pit.c
@@ -83,7 +83,7 @@ unsigned long coldfire_pit_offset(void)
 
         /*
          * If we are still in the first half of the upcount and a
-         * timer interupt is pending, then add on a ticks worth of time.
+         * timer interrupt is pending, then add on a ticks worth of time.
          */
         offset = ((pmr - pcntr) * (1000000 / HZ)) / pmr;
         if ((offset < (1000000 / HZ / 2)) && (*ipr & MCFPIT_IMR_IBIT))
diff --git a/arch/mips/kernel/module.c b/arch/mips/kernel/module.c
index cb0801437b66..e7ed0ac48537 100644
--- a/arch/mips/kernel/module.c
+++ b/arch/mips/kernel/module.c
@@ -381,7 +381,7 @@ const struct exception_table_entry *search_module_dbetables(unsigned long addr)
         return e;
 }
 
-/* Put in dbe list if neccessary. */
+/* Put in dbe list if necessary. */
 int module_finalize(const Elf_Ehdr *hdr,
                     const Elf_Shdr *sechdrs,
                     struct module *me)
diff --git a/arch/mips/pci/pci-excite.c b/arch/mips/pci/pci-excite.c
index 3c86c77cb74f..8a56876afcc6 100644
--- a/arch/mips/pci/pci-excite.c
+++ b/arch/mips/pci/pci-excite.c
@@ -131,7 +131,7 @@ static int __init basler_excite_pci_setup(void)
                 ocd_writel(0x00000000, bar + 0x100);
         }
 
-        /* Finally, enable the PCI interupt */
+        /* Finally, enable the PCI interrupt */
 #if USB_IRQ > 7
         set_c0_intcontrol(1 << USB_IRQ);
 #else
diff --git a/arch/mips/sni/pcimt.c b/arch/mips/sni/pcimt.c
index 39bb15f1f2a6..4df070f2ff5d 100644
--- a/arch/mips/sni/pcimt.c
+++ b/arch/mips/sni/pcimt.c
@@ -246,7 +246,7 @@ static void pcimt_hwint1(void)
                 /*
                  * Note: ASIC PCI's builtin interrupt achknowledge feature is
                  * broken.  Using it may result in loss of some or all i8259
-                 * interupts, so don't use PCIMT_INT_ACKNOWLEDGE ...
+                 * interrupts, so don't use PCIMT_INT_ACKNOWLEDGE ...
                  */
                 irq = i8259_irq();
                 if (unlikely(irq < 0))
diff --git a/arch/powerpc/platforms/celleb/scc_uhc.c b/arch/powerpc/platforms/celleb/scc_uhc.c
index a7c548bde2e3..b59c38a06e3e 100644
--- a/arch/powerpc/platforms/celleb/scc_uhc.c
+++ b/arch/powerpc/platforms/celleb/scc_uhc.c
@@ -36,7 +36,7 @@ static inline int uhc_clkctrl_ready(u32 val)
 }
 
 /*
- * UHC(usb host controler) enable function.
+ * UHC(usb host controller) enable function.
  * affect to both of OHCI and EHCI core module.
  */
 static void enable_scc_uhc(struct pci_dev *dev)
diff --git a/arch/sh64/kernel/pci_sh5.c b/arch/sh64/kernel/pci_sh5.c
index 388bb711f1b0..b4d9534d2b0e 100644
--- a/arch/sh64/kernel/pci_sh5.c
+++ b/arch/sh64/kernel/pci_sh5.c
@@ -480,7 +480,7 @@ static int __init pcibios_init(void)
                 return -EINVAL;
         }
 
-        /* The pci subsytem needs to know where memory is and how much
+        /* The pci subsystem needs to know where memory is and how much
          * of it there is. I've simply made these globals. A better mechanism
          * is probably needed.
          */
diff --git a/arch/x86/kernel/suspend_64.c b/arch/x86/kernel/suspend_64.c
index f8fafe527ff1..76274eeae9a9 100644
--- a/arch/x86/kernel/suspend_64.c
+++ b/arch/x86/kernel/suspend_64.c
@@ -123,7 +123,7 @@ void fix_processor_context(void)
         int cpu = smp_processor_id();
         struct tss_struct *t = &per_cpu(init_tss, cpu);
 
-        set_tss_desc(cpu,t);    /* This just modifies memory; should not be neccessary. But... This is neccessary, because 386 hardware has concept of busy TSS or some similar stupidity. */
+        set_tss_desc(cpu,t);    /* This just modifies memory; should not be necessary. But... This is necessary, because 386 hardware has concept of busy TSS or some similar stupidity. */
 
         cpu_gdt(cpu)[GDT_ENTRY_TSS].type = 9;