diff options
author | Dave Jones <davej@redhat.com> | 2006-09-05 17:20:21 -0400 |
---|---|---|
committer | Dave Jones <davej@redhat.com> | 2006-09-05 17:20:21 -0400 |
commit | 115b384cf87249d76adb0b21aca11ee22128927d (patch) | |
tree | f39a2a54863e9d82d1196906f92c82ab5991c6af /arch | |
parent | 8eb7925f93af75e66a240d148efdec212f95bcb7 (diff) | |
parent | c336923b668fdcf0312efbec3b44895d713f4d81 (diff) |
Merge ../linus
Diffstat (limited to 'arch')
246 files changed, 6297 insertions, 2529 deletions
diff --git a/arch/alpha/kernel/err_ev7.c b/arch/alpha/kernel/err_ev7.c index bf52ba691957..fed6b3d1b803 100644 --- a/arch/alpha/kernel/err_ev7.c +++ b/arch/alpha/kernel/err_ev7.c | |||
@@ -274,16 +274,14 @@ ev7_process_pal_subpacket(struct el_subpacket *header) | |||
274 | struct el_subpacket_handler ev7_pal_subpacket_handler = | 274 | struct el_subpacket_handler ev7_pal_subpacket_handler = |
275 | SUBPACKET_HANDLER_INIT(EL_CLASS__PAL, ev7_process_pal_subpacket); | 275 | SUBPACKET_HANDLER_INIT(EL_CLASS__PAL, ev7_process_pal_subpacket); |
276 | 276 | ||
277 | void | 277 | void |
278 | ev7_register_error_handlers(void) | 278 | ev7_register_error_handlers(void) |
279 | { | 279 | { |
280 | int i; | 280 | int i; |
281 | 281 | ||
282 | for(i = 0; | 282 | for (i = 0; i < ARRAY_SIZE(el_ev7_pal_annotations); i++) |
283 | i<sizeof(el_ev7_pal_annotations)/sizeof(el_ev7_pal_annotations[1]); | ||
284 | i++) { | ||
285 | cdl_register_subpacket_annotation(&el_ev7_pal_annotations[i]); | 283 | cdl_register_subpacket_annotation(&el_ev7_pal_annotations[i]); |
286 | } | 284 | |
287 | cdl_register_subpacket_handler(&ev7_pal_subpacket_handler); | 285 | cdl_register_subpacket_handler(&ev7_pal_subpacket_handler); |
288 | } | 286 | } |
289 | 287 | ||
diff --git a/arch/alpha/kernel/osf_sys.c b/arch/alpha/kernel/osf_sys.c index e15dcf4f3dcd..73c7622b5297 100644 --- a/arch/alpha/kernel/osf_sys.c +++ b/arch/alpha/kernel/osf_sys.c | |||
@@ -623,12 +623,12 @@ osf_sysinfo(int command, char __user *buf, long count) | |||
623 | long len, err = -EINVAL; | 623 | long len, err = -EINVAL; |
624 | 624 | ||
625 | offset = command-1; | 625 | offset = command-1; |
626 | if (offset >= sizeof(sysinfo_table)/sizeof(char *)) { | 626 | if (offset >= ARRAY_SIZE(sysinfo_table)) { |
627 | /* Digital UNIX has a few unpublished interfaces here */ | 627 | /* Digital UNIX has a few unpublished interfaces here */ |
628 | printk("sysinfo(%d)", command); | 628 | printk("sysinfo(%d)", command); |
629 | goto out; | 629 | goto out; |
630 | } | 630 | } |
631 | 631 | ||
632 | down_read(&uts_sem); | 632 | down_read(&uts_sem); |
633 | res = sysinfo_table[offset]; | 633 | res = sysinfo_table[offset]; |
634 | len = strlen(res)+1; | 634 | len = strlen(res)+1; |
diff --git a/arch/alpha/kernel/setup.c b/arch/alpha/kernel/setup.c index 2cb9c4380113..fd4a8fa0c93d 100644 --- a/arch/alpha/kernel/setup.c +++ b/arch/alpha/kernel/setup.c | |||
@@ -114,8 +114,6 @@ struct alpha_machine_vector alpha_mv; | |||
114 | int alpha_using_srm; | 114 | int alpha_using_srm; |
115 | #endif | 115 | #endif |
116 | 116 | ||
117 | #define N(a) (sizeof(a)/sizeof(a[0])) | ||
118 | |||
119 | static struct alpha_machine_vector *get_sysvec(unsigned long, unsigned long, | 117 | static struct alpha_machine_vector *get_sysvec(unsigned long, unsigned long, |
120 | unsigned long); | 118 | unsigned long); |
121 | static struct alpha_machine_vector *get_sysvec_byname(const char *); | 119 | static struct alpha_machine_vector *get_sysvec_byname(const char *); |
@@ -240,7 +238,7 @@ reserve_std_resources(void) | |||
240 | standard_io_resources[0].start = RTC_PORT(0); | 238 | standard_io_resources[0].start = RTC_PORT(0); |
241 | standard_io_resources[0].end = RTC_PORT(0) + 0x10; | 239 | standard_io_resources[0].end = RTC_PORT(0) + 0x10; |
242 | 240 | ||
243 | for (i = 0; i < N(standard_io_resources); ++i) | 241 | for (i = 0; i < ARRAY_SIZE(standard_io_resources); ++i) |
244 | request_resource(io, standard_io_resources+i); | 242 | request_resource(io, standard_io_resources+i); |
245 | } | 243 | } |
246 | 244 | ||
@@ -918,13 +916,13 @@ get_sysvec(unsigned long type, unsigned long variation, unsigned long cpu) | |||
918 | 916 | ||
919 | /* Search the system tables first... */ | 917 | /* Search the system tables first... */ |
920 | vec = NULL; | 918 | vec = NULL; |
921 | if (type < N(systype_vecs)) { | 919 | if (type < ARRAY_SIZE(systype_vecs)) { |
922 | vec = systype_vecs[type]; | 920 | vec = systype_vecs[type]; |
923 | } else if ((type > ST_API_BIAS) && | 921 | } else if ((type > ST_API_BIAS) && |
924 | (type - ST_API_BIAS) < N(api_vecs)) { | 922 | (type - ST_API_BIAS) < ARRAY_SIZE(api_vecs)) { |
925 | vec = api_vecs[type - ST_API_BIAS]; | 923 | vec = api_vecs[type - ST_API_BIAS]; |
926 | } else if ((type > ST_UNOFFICIAL_BIAS) && | 924 | } else if ((type > ST_UNOFFICIAL_BIAS) && |
927 | (type - ST_UNOFFICIAL_BIAS) < N(unofficial_vecs)) { | 925 | (type - ST_UNOFFICIAL_BIAS) < ARRAY_SIZE(unofficial_vecs)) { |
928 | vec = unofficial_vecs[type - ST_UNOFFICIAL_BIAS]; | 926 | vec = unofficial_vecs[type - ST_UNOFFICIAL_BIAS]; |
929 | } | 927 | } |
930 | 928 | ||
@@ -938,11 +936,11 @@ get_sysvec(unsigned long type, unsigned long variation, unsigned long cpu) | |||
938 | 936 | ||
939 | switch (type) { | 937 | switch (type) { |
940 | case ST_DEC_ALCOR: | 938 | case ST_DEC_ALCOR: |
941 | if (member < N(alcor_indices)) | 939 | if (member < ARRAY_SIZE(alcor_indices)) |
942 | vec = alcor_vecs[alcor_indices[member]]; | 940 | vec = alcor_vecs[alcor_indices[member]]; |
943 | break; | 941 | break; |
944 | case ST_DEC_EB164: | 942 | case ST_DEC_EB164: |
945 | if (member < N(eb164_indices)) | 943 | if (member < ARRAY_SIZE(eb164_indices)) |
946 | vec = eb164_vecs[eb164_indices[member]]; | 944 | vec = eb164_vecs[eb164_indices[member]]; |
947 | /* PC164 may show as EB164 variation with EV56 CPU, | 945 | /* PC164 may show as EB164 variation with EV56 CPU, |
948 | but, since no true EB164 had anything but EV5... */ | 946 | but, since no true EB164 had anything but EV5... */ |
@@ -950,24 +948,24 @@ get_sysvec(unsigned long type, unsigned long variation, unsigned long cpu) | |||
950 | vec = &pc164_mv; | 948 | vec = &pc164_mv; |
951 | break; | 949 | break; |
952 | case ST_DEC_EB64P: | 950 | case ST_DEC_EB64P: |
953 | if (member < N(eb64p_indices)) | 951 | if (member < ARRAY_SIZE(eb64p_indices)) |
954 | vec = eb64p_vecs[eb64p_indices[member]]; | 952 | vec = eb64p_vecs[eb64p_indices[member]]; |
955 | break; | 953 | break; |
956 | case ST_DEC_EB66: | 954 | case ST_DEC_EB66: |
957 | if (member < N(eb66_indices)) | 955 | if (member < ARRAY_SIZE(eb66_indices)) |
958 | vec = eb66_vecs[eb66_indices[member]]; | 956 | vec = eb66_vecs[eb66_indices[member]]; |
959 | break; | 957 | break; |
960 | case ST_DEC_MARVEL: | 958 | case ST_DEC_MARVEL: |
961 | if (member < N(marvel_indices)) | 959 | if (member < ARRAY_SIZE(marvel_indices)) |
962 | vec = marvel_vecs[marvel_indices[member]]; | 960 | vec = marvel_vecs[marvel_indices[member]]; |
963 | break; | 961 | break; |
964 | case ST_DEC_TITAN: | 962 | case ST_DEC_TITAN: |
965 | vec = titan_vecs[0]; /* default */ | 963 | vec = titan_vecs[0]; /* default */ |
966 | if (member < N(titan_indices)) | 964 | if (member < ARRAY_SIZE(titan_indices)) |
967 | vec = titan_vecs[titan_indices[member]]; | 965 | vec = titan_vecs[titan_indices[member]]; |
968 | break; | 966 | break; |
969 | case ST_DEC_TSUNAMI: | 967 | case ST_DEC_TSUNAMI: |
970 | if (member < N(tsunami_indices)) | 968 | if (member < ARRAY_SIZE(tsunami_indices)) |
971 | vec = tsunami_vecs[tsunami_indices[member]]; | 969 | vec = tsunami_vecs[tsunami_indices[member]]; |
972 | break; | 970 | break; |
973 | case ST_DEC_1000: | 971 | case ST_DEC_1000: |
@@ -1039,7 +1037,7 @@ get_sysvec_byname(const char *name) | |||
1039 | 1037 | ||
1040 | size_t i; | 1038 | size_t i; |
1041 | 1039 | ||
1042 | for (i = 0; i < N(all_vecs); ++i) { | 1040 | for (i = 0; i < ARRAY_SIZE(all_vecs); ++i) { |
1043 | struct alpha_machine_vector *mv = all_vecs[i]; | 1041 | struct alpha_machine_vector *mv = all_vecs[i]; |
1044 | if (strcasecmp(mv->vector_name, name) == 0) | 1042 | if (strcasecmp(mv->vector_name, name) == 0) |
1045 | return mv; | 1043 | return mv; |
@@ -1055,13 +1053,13 @@ get_sysnames(unsigned long type, unsigned long variation, unsigned long cpu, | |||
1055 | 1053 | ||
1056 | /* If not in the tables, make it UNKNOWN, | 1054 | /* If not in the tables, make it UNKNOWN, |
1057 | else set type name to family */ | 1055 | else set type name to family */ |
1058 | if (type < N(systype_names)) { | 1056 | if (type < ARRAY_SIZE(systype_names)) { |
1059 | *type_name = systype_names[type]; | 1057 | *type_name = systype_names[type]; |
1060 | } else if ((type > ST_API_BIAS) && | 1058 | } else if ((type > ST_API_BIAS) && |
1061 | (type - ST_API_BIAS) < N(api_names)) { | 1059 | (type - ST_API_BIAS) < ARRAY_SIZE(api_names)) { |
1062 | *type_name = api_names[type - ST_API_BIAS]; | 1060 | *type_name = api_names[type - ST_API_BIAS]; |
1063 | } else if ((type > ST_UNOFFICIAL_BIAS) && | 1061 | } else if ((type > ST_UNOFFICIAL_BIAS) && |
1064 | (type - ST_UNOFFICIAL_BIAS) < N(unofficial_names)) { | 1062 | (type - ST_UNOFFICIAL_BIAS) < ARRAY_SIZE(unofficial_names)) { |
1065 | *type_name = unofficial_names[type - ST_UNOFFICIAL_BIAS]; | 1063 | *type_name = unofficial_names[type - ST_UNOFFICIAL_BIAS]; |
1066 | } else { | 1064 | } else { |
1067 | *type_name = sys_unknown; | 1065 | *type_name = sys_unknown; |
@@ -1083,7 +1081,7 @@ get_sysnames(unsigned long type, unsigned long variation, unsigned long cpu, | |||
1083 | default: /* default to variation "0" for now */ | 1081 | default: /* default to variation "0" for now */ |
1084 | break; | 1082 | break; |
1085 | case ST_DEC_EB164: | 1083 | case ST_DEC_EB164: |
1086 | if (member < N(eb164_indices)) | 1084 | if (member < ARRAY_SIZE(eb164_indices)) |
1087 | *variation_name = eb164_names[eb164_indices[member]]; | 1085 | *variation_name = eb164_names[eb164_indices[member]]; |
1088 | /* PC164 may show as EB164 variation, but with EV56 CPU, | 1086 | /* PC164 may show as EB164 variation, but with EV56 CPU, |
1089 | so, since no true EB164 had anything but EV5... */ | 1087 | so, since no true EB164 had anything but EV5... */ |
@@ -1091,32 +1089,32 @@ get_sysnames(unsigned long type, unsigned long variation, unsigned long cpu, | |||
1091 | *variation_name = eb164_names[1]; /* make it PC164 */ | 1089 | *variation_name = eb164_names[1]; /* make it PC164 */ |
1092 | break; | 1090 | break; |
1093 | case ST_DEC_ALCOR: | 1091 | case ST_DEC_ALCOR: |
1094 | if (member < N(alcor_indices)) | 1092 | if (member < ARRAY_SIZE(alcor_indices)) |
1095 | *variation_name = alcor_names[alcor_indices[member]]; | 1093 | *variation_name = alcor_names[alcor_indices[member]]; |
1096 | break; | 1094 | break; |
1097 | case ST_DEC_EB64P: | 1095 | case ST_DEC_EB64P: |
1098 | if (member < N(eb64p_indices)) | 1096 | if (member < ARRAY_SIZE(eb64p_indices)) |
1099 | *variation_name = eb64p_names[eb64p_indices[member]]; | 1097 | *variation_name = eb64p_names[eb64p_indices[member]]; |
1100 | break; | 1098 | break; |
1101 | case ST_DEC_EB66: | 1099 | case ST_DEC_EB66: |
1102 | if (member < N(eb66_indices)) | 1100 | if (member < ARRAY_SIZE(eb66_indices)) |
1103 | *variation_name = eb66_names[eb66_indices[member]]; | 1101 | *variation_name = eb66_names[eb66_indices[member]]; |
1104 | break; | 1102 | break; |
1105 | case ST_DEC_MARVEL: | 1103 | case ST_DEC_MARVEL: |
1106 | if (member < N(marvel_indices)) | 1104 | if (member < ARRAY_SIZE(marvel_indices)) |
1107 | *variation_name = marvel_names[marvel_indices[member]]; | 1105 | *variation_name = marvel_names[marvel_indices[member]]; |
1108 | break; | 1106 | break; |
1109 | case ST_DEC_RAWHIDE: | 1107 | case ST_DEC_RAWHIDE: |
1110 | if (member < N(rawhide_indices)) | 1108 | if (member < ARRAY_SIZE(rawhide_indices)) |
1111 | *variation_name = rawhide_names[rawhide_indices[member]]; | 1109 | *variation_name = rawhide_names[rawhide_indices[member]]; |
1112 | break; | 1110 | break; |
1113 | case ST_DEC_TITAN: | 1111 | case ST_DEC_TITAN: |
1114 | *variation_name = titan_names[0]; /* default */ | 1112 | *variation_name = titan_names[0]; /* default */ |
1115 | if (member < N(titan_indices)) | 1113 | if (member < ARRAY_SIZE(titan_indices)) |
1116 | *variation_name = titan_names[titan_indices[member]]; | 1114 | *variation_name = titan_names[titan_indices[member]]; |
1117 | break; | 1115 | break; |
1118 | case ST_DEC_TSUNAMI: | 1116 | case ST_DEC_TSUNAMI: |
1119 | if (member < N(tsunami_indices)) | 1117 | if (member < ARRAY_SIZE(tsunami_indices)) |
1120 | *variation_name = tsunami_names[tsunami_indices[member]]; | 1118 | *variation_name = tsunami_names[tsunami_indices[member]]; |
1121 | break; | 1119 | break; |
1122 | } | 1120 | } |
@@ -1211,7 +1209,7 @@ show_cpuinfo(struct seq_file *f, void *slot) | |||
1211 | 1209 | ||
1212 | cpu_index = (unsigned) (cpu->type - 1); | 1210 | cpu_index = (unsigned) (cpu->type - 1); |
1213 | cpu_name = "Unknown"; | 1211 | cpu_name = "Unknown"; |
1214 | if (cpu_index < N(cpu_names)) | 1212 | if (cpu_index < ARRAY_SIZE(cpu_names)) |
1215 | cpu_name = cpu_names[cpu_index]; | 1213 | cpu_name = cpu_names[cpu_index]; |
1216 | 1214 | ||
1217 | get_sysnames(hwrpb->sys_type, hwrpb->sys_variation, | 1215 | get_sysnames(hwrpb->sys_type, hwrpb->sys_variation, |
diff --git a/arch/alpha/kernel/sys_ruffian.c b/arch/alpha/kernel/sys_ruffian.c index 78c30decf3ff..5b99cf3cd69c 100644 --- a/arch/alpha/kernel/sys_ruffian.c +++ b/arch/alpha/kernel/sys_ruffian.c | |||
@@ -182,16 +182,16 @@ static unsigned long __init | |||
182 | ruffian_get_bank_size(unsigned long offset) | 182 | ruffian_get_bank_size(unsigned long offset) |
183 | { | 183 | { |
184 | unsigned long bank_addr, bank, ret = 0; | 184 | unsigned long bank_addr, bank, ret = 0; |
185 | 185 | ||
186 | /* Valid offsets are: 0x800, 0x840 and 0x880 | 186 | /* Valid offsets are: 0x800, 0x840 and 0x880 |
187 | since Ruffian only uses three banks. */ | 187 | since Ruffian only uses three banks. */ |
188 | bank_addr = (unsigned long)PYXIS_MCR + offset; | 188 | bank_addr = (unsigned long)PYXIS_MCR + offset; |
189 | bank = *(vulp)bank_addr; | 189 | bank = *(vulp)bank_addr; |
190 | 190 | ||
191 | /* Check BANK_ENABLE */ | 191 | /* Check BANK_ENABLE */ |
192 | if (bank & 0x01) { | 192 | if (bank & 0x01) { |
193 | static unsigned long size[] __initdata = { | 193 | static unsigned long size[] __initdata = { |
194 | 0x40000000UL, /* 0x00, 1G */ | 194 | 0x40000000UL, /* 0x00, 1G */ |
195 | 0x20000000UL, /* 0x02, 512M */ | 195 | 0x20000000UL, /* 0x02, 512M */ |
196 | 0x10000000UL, /* 0x04, 256M */ | 196 | 0x10000000UL, /* 0x04, 256M */ |
197 | 0x08000000UL, /* 0x06, 128M */ | 197 | 0x08000000UL, /* 0x06, 128M */ |
@@ -203,7 +203,7 @@ ruffian_get_bank_size(unsigned long offset) | |||
203 | }; | 203 | }; |
204 | 204 | ||
205 | bank = (bank & 0x1e) >> 1; | 205 | bank = (bank & 0x1e) >> 1; |
206 | if (bank < sizeof(size)/sizeof(*size)) | 206 | if (bank < ARRAY_SIZE(size)) |
207 | ret = size[bank]; | 207 | ret = size[bank]; |
208 | } | 208 | } |
209 | 209 | ||
diff --git a/arch/alpha/kernel/time.c b/arch/alpha/kernel/time.c index 50eccde2dcd8..b191cc759737 100644 --- a/arch/alpha/kernel/time.c +++ b/arch/alpha/kernel/time.c | |||
@@ -233,7 +233,7 @@ validate_cc_value(unsigned long cc) | |||
233 | index = cpu->type & 0xffffffff; | 233 | index = cpu->type & 0xffffffff; |
234 | 234 | ||
235 | /* If index out of bounds, no way to validate. */ | 235 | /* If index out of bounds, no way to validate. */ |
236 | if (index >= sizeof(cpu_hz)/sizeof(cpu_hz[0])) | 236 | if (index >= ARRAY_SIZE(cpu_hz)) |
237 | return cc; | 237 | return cc; |
238 | 238 | ||
239 | /* If index contains no data, no way to validate. */ | 239 | /* If index contains no data, no way to validate. */ |
diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 3345c6d0fd1e..92873cdee31f 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile | |||
@@ -47,7 +47,8 @@ comma = , | |||
47 | # testing for a specific architecture or later rather impossible. | 47 | # testing for a specific architecture or later rather impossible. |
48 | arch-$(CONFIG_CPU_32v6) :=-D__LINUX_ARM_ARCH__=6 $(call cc-option,-march=armv6,-march=armv5t -Wa$(comma)-march=armv6) | 48 | arch-$(CONFIG_CPU_32v6) :=-D__LINUX_ARM_ARCH__=6 $(call cc-option,-march=armv6,-march=armv5t -Wa$(comma)-march=armv6) |
49 | arch-$(CONFIG_CPU_32v6K) :=-D__LINUX_ARM_ARCH__=6 $(call cc-option,-march=armv6k,-march=armv5t -Wa$(comma)-march=armv6k) | 49 | arch-$(CONFIG_CPU_32v6K) :=-D__LINUX_ARM_ARCH__=6 $(call cc-option,-march=armv6k,-march=armv5t -Wa$(comma)-march=armv6k) |
50 | arch-$(CONFIG_CPU_32v5) :=-D__LINUX_ARM_ARCH__=5 $(call cc-option,-march=armv5te,-march=armv4) | 50 | arch-$(CONFIG_CPU_32v5) :=-D__LINUX_ARM_ARCH__=5 $(call cc-option,-march=armv5te,-march=armv4t) |
51 | arch-$(CONFIG_CPU_32v4T) :=-D__LINUX_ARM_ARCH__=4 -march=armv4t | ||
51 | arch-$(CONFIG_CPU_32v4) :=-D__LINUX_ARM_ARCH__=4 -march=armv4 | 52 | arch-$(CONFIG_CPU_32v4) :=-D__LINUX_ARM_ARCH__=4 -march=armv4 |
52 | arch-$(CONFIG_CPU_32v3) :=-D__LINUX_ARM_ARCH__=3 -march=armv3 | 53 | arch-$(CONFIG_CPU_32v3) :=-D__LINUX_ARM_ARCH__=3 -march=armv3 |
53 | 54 | ||
diff --git a/arch/arm/common/dmabounce.c b/arch/arm/common/dmabounce.c index 5b7c26395b44..028bdc9228fb 100644 --- a/arch/arm/common/dmabounce.c +++ b/arch/arm/common/dmabounce.c | |||
@@ -179,17 +179,19 @@ alloc_safe_buffer(struct dmabounce_device_info *device_info, void *ptr, | |||
179 | static inline struct safe_buffer * | 179 | static inline struct safe_buffer * |
180 | find_safe_buffer(struct dmabounce_device_info *device_info, dma_addr_t safe_dma_addr) | 180 | find_safe_buffer(struct dmabounce_device_info *device_info, dma_addr_t safe_dma_addr) |
181 | { | 181 | { |
182 | struct safe_buffer *b = NULL; | 182 | struct safe_buffer *b, *rb = NULL; |
183 | unsigned long flags; | 183 | unsigned long flags; |
184 | 184 | ||
185 | read_lock_irqsave(&device_info->lock, flags); | 185 | read_lock_irqsave(&device_info->lock, flags); |
186 | 186 | ||
187 | list_for_each_entry(b, &device_info->safe_buffers, node) | 187 | list_for_each_entry(b, &device_info->safe_buffers, node) |
188 | if (b->safe_dma_addr == safe_dma_addr) | 188 | if (b->safe_dma_addr == safe_dma_addr) { |
189 | rb = b; | ||
189 | break; | 190 | break; |
191 | } | ||
190 | 192 | ||
191 | read_unlock_irqrestore(&device_info->lock, flags); | 193 | read_unlock_irqrestore(&device_info->lock, flags); |
192 | return b; | 194 | return rb; |
193 | } | 195 | } |
194 | 196 | ||
195 | static inline void | 197 | static inline void |
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index f3c1ebfdd0aa..f3e020f2227f 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c | |||
@@ -95,7 +95,8 @@ static void gic_set_cpu(unsigned int irq, cpumask_t mask_val) | |||
95 | } | 95 | } |
96 | #endif | 96 | #endif |
97 | 97 | ||
98 | static struct irqchip gic_chip = { | 98 | static struct irq_chip gic_chip = { |
99 | .name = "GIC", | ||
99 | .ack = gic_ack_irq, | 100 | .ack = gic_ack_irq, |
100 | .mask = gic_mask_irq, | 101 | .mask = gic_mask_irq, |
101 | .unmask = gic_unmask_irq, | 102 | .unmask = gic_unmask_irq, |
diff --git a/arch/arm/common/locomo.c b/arch/arm/common/locomo.c index 04de83f4f008..4e0dcaef6eb2 100644 --- a/arch/arm/common/locomo.c +++ b/arch/arm/common/locomo.c | |||
@@ -204,7 +204,8 @@ static void locomo_unmask_irq(unsigned int irq) | |||
204 | locomo_writel(r, mapbase + LOCOMO_ICR); | 204 | locomo_writel(r, mapbase + LOCOMO_ICR); |
205 | } | 205 | } |
206 | 206 | ||
207 | static struct irqchip locomo_chip = { | 207 | static struct irq_chip locomo_chip = { |
208 | .name = "LOCOMO", | ||
208 | .ack = locomo_ack_irq, | 209 | .ack = locomo_ack_irq, |
209 | .mask = locomo_mask_irq, | 210 | .mask = locomo_mask_irq, |
210 | .unmask = locomo_unmask_irq, | 211 | .unmask = locomo_unmask_irq, |
@@ -249,7 +250,8 @@ static void locomo_key_unmask_irq(unsigned int irq) | |||
249 | locomo_writel(r, mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC); | 250 | locomo_writel(r, mapbase + LOCOMO_KEYBOARD + LOCOMO_KIC); |
250 | } | 251 | } |
251 | 252 | ||
252 | static struct irqchip locomo_key_chip = { | 253 | static struct irq_chip locomo_key_chip = { |
254 | .name = "LOCOMO-key", | ||
253 | .ack = locomo_key_ack_irq, | 255 | .ack = locomo_key_ack_irq, |
254 | .mask = locomo_key_mask_irq, | 256 | .mask = locomo_key_mask_irq, |
255 | .unmask = locomo_key_unmask_irq, | 257 | .unmask = locomo_key_unmask_irq, |
@@ -312,7 +314,8 @@ static void locomo_gpio_unmask_irq(unsigned int irq) | |||
312 | locomo_writel(r, mapbase + LOCOMO_GIE); | 314 | locomo_writel(r, mapbase + LOCOMO_GIE); |
313 | } | 315 | } |
314 | 316 | ||
315 | static struct irqchip locomo_gpio_chip = { | 317 | static struct irq_chip locomo_gpio_chip = { |
318 | .name = "LOCOMO-gpio", | ||
316 | .ack = locomo_gpio_ack_irq, | 319 | .ack = locomo_gpio_ack_irq, |
317 | .mask = locomo_gpio_mask_irq, | 320 | .mask = locomo_gpio_mask_irq, |
318 | .unmask = locomo_gpio_unmask_irq, | 321 | .unmask = locomo_gpio_unmask_irq, |
@@ -357,7 +360,8 @@ static void locomo_lt_unmask_irq(unsigned int irq) | |||
357 | locomo_writel(r, mapbase + LOCOMO_LTINT); | 360 | locomo_writel(r, mapbase + LOCOMO_LTINT); |
358 | } | 361 | } |
359 | 362 | ||
360 | static struct irqchip locomo_lt_chip = { | 363 | static struct irq_chip locomo_lt_chip = { |
364 | .name = "LOCOMO-lt", | ||
361 | .ack = locomo_lt_ack_irq, | 365 | .ack = locomo_lt_ack_irq, |
362 | .mask = locomo_lt_mask_irq, | 366 | .mask = locomo_lt_mask_irq, |
363 | .unmask = locomo_lt_unmask_irq, | 367 | .unmask = locomo_lt_unmask_irq, |
@@ -418,7 +422,8 @@ static void locomo_spi_unmask_irq(unsigned int irq) | |||
418 | locomo_writel(r, mapbase + LOCOMO_SPIIE); | 422 | locomo_writel(r, mapbase + LOCOMO_SPIIE); |
419 | } | 423 | } |
420 | 424 | ||
421 | static struct irqchip locomo_spi_chip = { | 425 | static struct irq_chip locomo_spi_chip = { |
426 | .name = "LOCOMO-spi", | ||
422 | .ack = locomo_spi_ack_irq, | 427 | .ack = locomo_spi_ack_irq, |
423 | .mask = locomo_spi_mask_irq, | 428 | .mask = locomo_spi_mask_irq, |
424 | .unmask = locomo_spi_unmask_irq, | 429 | .unmask = locomo_spi_unmask_irq, |
diff --git a/arch/arm/common/rtctime.c b/arch/arm/common/rtctime.c index 35c9a64ac14c..4e5445cfb0ea 100644 --- a/arch/arm/common/rtctime.c +++ b/arch/arm/common/rtctime.c | |||
@@ -68,6 +68,7 @@ void rtc_next_alarm_time(struct rtc_time *next, struct rtc_time *now, struct rtc | |||
68 | rtc_time_to_tm(next_time, next); | 68 | rtc_time_to_tm(next_time, next); |
69 | } | 69 | } |
70 | } | 70 | } |
71 | EXPORT_SYMBOL(rtc_next_alarm_time); | ||
71 | 72 | ||
72 | static inline int rtc_arm_read_time(struct rtc_ops *ops, struct rtc_time *tm) | 73 | static inline int rtc_arm_read_time(struct rtc_ops *ops, struct rtc_time *tm) |
73 | { | 74 | { |
diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c index 1cdb26a47e1f..29818bd3248f 100644 --- a/arch/arm/common/sa1111.c +++ b/arch/arm/common/sa1111.c | |||
@@ -272,7 +272,8 @@ static int sa1111_wake_lowirq(unsigned int irq, unsigned int on) | |||
272 | return 0; | 272 | return 0; |
273 | } | 273 | } |
274 | 274 | ||
275 | static struct irqchip sa1111_low_chip = { | 275 | static struct irq_chip sa1111_low_chip = { |
276 | .name = "SA1111-l", | ||
276 | .ack = sa1111_ack_irq, | 277 | .ack = sa1111_ack_irq, |
277 | .mask = sa1111_mask_lowirq, | 278 | .mask = sa1111_mask_lowirq, |
278 | .unmask = sa1111_unmask_lowirq, | 279 | .unmask = sa1111_unmask_lowirq, |
@@ -368,7 +369,8 @@ static int sa1111_wake_highirq(unsigned int irq, unsigned int on) | |||
368 | return 0; | 369 | return 0; |
369 | } | 370 | } |
370 | 371 | ||
371 | static struct irqchip sa1111_high_chip = { | 372 | static struct irq_chip sa1111_high_chip = { |
373 | .name = "SA1111-h", | ||
372 | .ack = sa1111_ack_irq, | 374 | .ack = sa1111_ack_irq, |
373 | .mask = sa1111_mask_highirq, | 375 | .mask = sa1111_mask_highirq, |
374 | .unmask = sa1111_unmask_highirq, | 376 | .unmask = sa1111_unmask_highirq, |
@@ -616,7 +618,7 @@ __sa1111_probe(struct device *me, struct resource *mem, int irq) | |||
616 | { | 618 | { |
617 | struct sa1111 *sachip; | 619 | struct sa1111 *sachip; |
618 | unsigned long id; | 620 | unsigned long id; |
619 | unsigned int has_devs, val; | 621 | unsigned int has_devs; |
620 | int i, ret = -ENODEV; | 622 | int i, ret = -ENODEV; |
621 | 623 | ||
622 | sachip = kzalloc(sizeof(struct sa1111), GFP_KERNEL); | 624 | sachip = kzalloc(sizeof(struct sa1111), GFP_KERNEL); |
@@ -667,6 +669,9 @@ __sa1111_probe(struct device *me, struct resource *mem, int irq) | |||
667 | sa1111_wake(sachip); | 669 | sa1111_wake(sachip); |
668 | 670 | ||
669 | #ifdef CONFIG_ARCH_SA1100 | 671 | #ifdef CONFIG_ARCH_SA1100 |
672 | { | ||
673 | unsigned int val; | ||
674 | |||
670 | /* | 675 | /* |
671 | * The SDRAM configuration of the SA1110 and the SA1111 must | 676 | * The SDRAM configuration of the SA1110 and the SA1111 must |
672 | * match. This is very important to ensure that SA1111 accesses | 677 | * match. This is very important to ensure that SA1111 accesses |
@@ -690,6 +695,7 @@ __sa1111_probe(struct device *me, struct resource *mem, int irq) | |||
690 | * Enable the SA1110 memory bus request and grant signals. | 695 | * Enable the SA1110 memory bus request and grant signals. |
691 | */ | 696 | */ |
692 | sa1110_mb_enable(); | 697 | sa1110_mb_enable(); |
698 | } | ||
693 | #endif | 699 | #endif |
694 | 700 | ||
695 | /* | 701 | /* |
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c index a19bc4a6196d..43d278134521 100644 --- a/arch/arm/common/vic.c +++ b/arch/arm/common/vic.c | |||
@@ -39,7 +39,8 @@ static void vic_unmask_irq(unsigned int irq) | |||
39 | writel(1 << irq, base + VIC_INT_ENABLE); | 39 | writel(1 << irq, base + VIC_INT_ENABLE); |
40 | } | 40 | } |
41 | 41 | ||
42 | static struct irqchip vic_chip = { | 42 | static struct irq_chip vic_chip = { |
43 | .name = "VIC", | ||
43 | .ack = vic_mask_irq, | 44 | .ack = vic_mask_irq, |
44 | .mask = vic_mask_irq, | 45 | .mask = vic_mask_irq, |
45 | .unmask = vic_unmask_irq, | 46 | .unmask = vic_unmask_irq, |
diff --git a/arch/arm/configs/csb337_defconfig b/arch/arm/configs/csb337_defconfig index 3594155a8137..cf3fa5cb26e4 100644 --- a/arch/arm/configs/csb337_defconfig +++ b/arch/arm/configs/csb337_defconfig | |||
@@ -621,9 +621,8 @@ CONFIG_AT91_WATCHDOG=y | |||
621 | # USB-based Watchdog Cards | 621 | # USB-based Watchdog Cards |
622 | # | 622 | # |
623 | # CONFIG_USBPCWATCHDOG is not set | 623 | # CONFIG_USBPCWATCHDOG is not set |
624 | # CONFIG_HW_RANDOM is not set | ||
624 | # CONFIG_NVRAM is not set | 625 | # CONFIG_NVRAM is not set |
625 | CONFIG_RTC=y | ||
626 | # CONFIG_AT91_RTC is not set | ||
627 | # CONFIG_DTLK is not set | 626 | # CONFIG_DTLK is not set |
628 | # CONFIG_R3964 is not set | 627 | # CONFIG_R3964 is not set |
629 | 628 | ||
@@ -956,10 +955,42 @@ CONFIG_USB_AT91=y | |||
956 | CONFIG_MMC=y | 955 | CONFIG_MMC=y |
957 | # CONFIG_MMC_DEBUG is not set | 956 | # CONFIG_MMC_DEBUG is not set |
958 | CONFIG_MMC_BLOCK=y | 957 | CONFIG_MMC_BLOCK=y |
959 | # CONFIG_MMC_WBSD is not set | ||
960 | CONFIG_MMC_AT91RM9200=y | 958 | CONFIG_MMC_AT91RM9200=y |
961 | 959 | ||
962 | # | 960 | # |
961 | # Real Time Clock | ||
962 | # | ||
963 | CONFIG_RTC_LIB=y | ||
964 | CONFIG_RTC_CLASS=y | ||
965 | CONFIG_RTC_HCTOSYS=y | ||
966 | CONFIG_RTC_HCTOSYS_DEVICE="rtc1" | ||
967 | |||
968 | # | ||
969 | # RTC interfaces | ||
970 | # | ||
971 | # CONFIG_RTC_INTF_SYSFS is not set | ||
972 | CONFIG_RTC_INTF_PROC=y | ||
973 | CONFIG_RTC_INTF_DEV=y | ||
974 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
975 | |||
976 | # | ||
977 | # RTC drivers | ||
978 | # | ||
979 | # CONFIG_RTC_DRV_X1205 is not set | ||
980 | CONFIG_RTC_DRV_DS1307=y | ||
981 | # CONFIG_RTC_DRV_DS1553 is not set | ||
982 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
983 | # CONFIG_RTC_DRV_DS1672 is not set | ||
984 | # CONFIG_RTC_DRV_DS1742 is not set | ||
985 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
986 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
987 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
988 | # CONFIG_RTC_DRV_M48T86 is not set | ||
989 | CONFIG_RTC_DRV_AT91=y | ||
990 | # CONFIG_RTC_DRV_TEST is not set | ||
991 | # CONFIG_RTC_DRV_V3020 is not set | ||
992 | |||
993 | # | ||
963 | # File systems | 994 | # File systems |
964 | # | 995 | # |
965 | CONFIG_EXT2_FS=y | 996 | CONFIG_EXT2_FS=y |
diff --git a/arch/arm/configs/ep93xx_defconfig b/arch/arm/configs/ep93xx_defconfig index c0de6fcd488a..2948b4589a8b 100644 --- a/arch/arm/configs/ep93xx_defconfig +++ b/arch/arm/configs/ep93xx_defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.18-rc1 | 3 | # Linux kernel version: 2.6.18-rc1-git9 |
4 | # Sun Jul 9 15:21:30 2006 | 4 | # Sat Jul 15 15:08:10 2006 |
5 | # | 5 | # |
6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
7 | CONFIG_MMU=y | 7 | CONFIG_MMU=y |
@@ -30,6 +30,7 @@ CONFIG_SWAP=y | |||
30 | CONFIG_SYSVIPC=y | 30 | CONFIG_SYSVIPC=y |
31 | # CONFIG_POSIX_MQUEUE is not set | 31 | # CONFIG_POSIX_MQUEUE is not set |
32 | # CONFIG_BSD_PROCESS_ACCT is not set | 32 | # CONFIG_BSD_PROCESS_ACCT is not set |
33 | # CONFIG_TASKSTATS is not set | ||
33 | CONFIG_SYSCTL=y | 34 | CONFIG_SYSCTL=y |
34 | # CONFIG_AUDIT is not set | 35 | # CONFIG_AUDIT is not set |
35 | CONFIG_IKCONFIG=y | 36 | CONFIG_IKCONFIG=y |
@@ -749,7 +750,7 @@ CONFIG_VIDEO_V4L2=y | |||
749 | # USB support | 750 | # USB support |
750 | # | 751 | # |
751 | CONFIG_USB_ARCH_HAS_HCD=y | 752 | CONFIG_USB_ARCH_HAS_HCD=y |
752 | # CONFIG_USB_ARCH_HAS_OHCI is not set | 753 | CONFIG_USB_ARCH_HAS_OHCI=y |
753 | # CONFIG_USB_ARCH_HAS_EHCI is not set | 754 | # CONFIG_USB_ARCH_HAS_EHCI is not set |
754 | CONFIG_USB=y | 755 | CONFIG_USB=y |
755 | CONFIG_USB_DEBUG=y | 756 | CONFIG_USB_DEBUG=y |
@@ -766,6 +767,9 @@ CONFIG_USB_DYNAMIC_MINORS=y | |||
766 | # USB Host Controller Drivers | 767 | # USB Host Controller Drivers |
767 | # | 768 | # |
768 | # CONFIG_USB_ISP116X_HCD is not set | 769 | # CONFIG_USB_ISP116X_HCD is not set |
770 | CONFIG_USB_OHCI_HCD=y | ||
771 | # CONFIG_USB_OHCI_BIG_ENDIAN is not set | ||
772 | CONFIG_USB_OHCI_LITTLE_ENDIAN=y | ||
769 | # CONFIG_USB_SL811_HCD is not set | 773 | # CONFIG_USB_SL811_HCD is not set |
770 | 774 | ||
771 | # | 775 | # |
@@ -855,6 +859,7 @@ CONFIG_USB_SERIAL_CONSOLE=y | |||
855 | CONFIG_USB_SERIAL_PL2303=y | 859 | CONFIG_USB_SERIAL_PL2303=y |
856 | # CONFIG_USB_SERIAL_HP4X is not set | 860 | # CONFIG_USB_SERIAL_HP4X is not set |
857 | # CONFIG_USB_SERIAL_SAFE is not set | 861 | # CONFIG_USB_SERIAL_SAFE is not set |
862 | # CONFIG_USB_SERIAL_SIERRAWIRELESS is not set | ||
858 | # CONFIG_USB_SERIAL_TI is not set | 863 | # CONFIG_USB_SERIAL_TI is not set |
859 | # CONFIG_USB_SERIAL_CYBERJACK is not set | 864 | # CONFIG_USB_SERIAL_CYBERJACK is not set |
860 | # CONFIG_USB_SERIAL_XIRCOM is not set | 865 | # CONFIG_USB_SERIAL_XIRCOM is not set |
@@ -871,7 +876,7 @@ CONFIG_USB_SERIAL_PL2303=y | |||
871 | # CONFIG_USB_LEGOTOWER is not set | 876 | # CONFIG_USB_LEGOTOWER is not set |
872 | # CONFIG_USB_LCD is not set | 877 | # CONFIG_USB_LCD is not set |
873 | # CONFIG_USB_LED is not set | 878 | # CONFIG_USB_LED is not set |
874 | # CONFIG_USB_CY7C63 is not set | 879 | # CONFIG_USB_CYPRESS_CY7C63 is not set |
875 | # CONFIG_USB_CYTHERM is not set | 880 | # CONFIG_USB_CYTHERM is not set |
876 | # CONFIG_USB_PHIDGETKIT is not set | 881 | # CONFIG_USB_PHIDGETKIT is not set |
877 | # CONFIG_USB_PHIDGETSERVO is not set | 882 | # CONFIG_USB_PHIDGETSERVO is not set |
@@ -916,6 +921,7 @@ CONFIG_RTC_INTF_DEV=y | |||
916 | # CONFIG_RTC_DRV_X1205 is not set | 921 | # CONFIG_RTC_DRV_X1205 is not set |
917 | # CONFIG_RTC_DRV_DS1307 is not set | 922 | # CONFIG_RTC_DRV_DS1307 is not set |
918 | # CONFIG_RTC_DRV_DS1553 is not set | 923 | # CONFIG_RTC_DRV_DS1553 is not set |
924 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
919 | # CONFIG_RTC_DRV_DS1672 is not set | 925 | # CONFIG_RTC_DRV_DS1672 is not set |
920 | # CONFIG_RTC_DRV_DS1742 is not set | 926 | # CONFIG_RTC_DRV_DS1742 is not set |
921 | # CONFIG_RTC_DRV_PCF8563 is not set | 927 | # CONFIG_RTC_DRV_PCF8563 is not set |
@@ -1023,7 +1029,6 @@ CONFIG_SUNRPC=y | |||
1023 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | 1029 | # CONFIG_RPCSEC_GSS_SPKM3 is not set |
1024 | # CONFIG_SMB_FS is not set | 1030 | # CONFIG_SMB_FS is not set |
1025 | # CONFIG_CIFS is not set | 1031 | # CONFIG_CIFS is not set |
1026 | # CONFIG_CIFS_DEBUG2 is not set | ||
1027 | # CONFIG_NCP_FS is not set | 1032 | # CONFIG_NCP_FS is not set |
1028 | # CONFIG_CODA_FS is not set | 1033 | # CONFIG_CODA_FS is not set |
1029 | # CONFIG_AFS_FS is not set | 1034 | # CONFIG_AFS_FS is not set |
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index f0c0cdb1c183..1320a0efca73 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile | |||
@@ -13,12 +13,11 @@ obj-y := compat.o entry-armv.o entry-common.o irq.o \ | |||
13 | obj-$(CONFIG_APM) += apm.o | 13 | obj-$(CONFIG_APM) += apm.o |
14 | obj-$(CONFIG_ISA_DMA_API) += dma.o | 14 | obj-$(CONFIG_ISA_DMA_API) += dma.o |
15 | obj-$(CONFIG_ARCH_ACORN) += ecard.o | 15 | obj-$(CONFIG_ARCH_ACORN) += ecard.o |
16 | obj-$(CONFIG_FOOTBRIDGE) += isa.o | ||
17 | obj-$(CONFIG_FIQ) += fiq.o | 16 | obj-$(CONFIG_FIQ) += fiq.o |
18 | obj-$(CONFIG_MODULES) += armksyms.o module.o | 17 | obj-$(CONFIG_MODULES) += armksyms.o module.o |
19 | obj-$(CONFIG_ARTHUR) += arthur.o | 18 | obj-$(CONFIG_ARTHUR) += arthur.o |
20 | obj-$(CONFIG_ISA_DMA) += dma-isa.o | 19 | obj-$(CONFIG_ISA_DMA) += dma-isa.o |
21 | obj-$(CONFIG_PCI) += bios32.o | 20 | obj-$(CONFIG_PCI) += bios32.o isa.o |
22 | obj-$(CONFIG_SMP) += smp.o | 21 | obj-$(CONFIG_SMP) += smp.o |
23 | obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o | 22 | obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o |
24 | 23 | ||
diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c index b9a74a741d00..eca248d9eba4 100644 --- a/arch/arm/kernel/ecard.c +++ b/arch/arm/kernel/ecard.c | |||
@@ -470,7 +470,8 @@ static void ecard_irq_mask(unsigned int irqnr) | |||
470 | } | 470 | } |
471 | } | 471 | } |
472 | 472 | ||
473 | static struct irqchip ecard_chip = { | 473 | static struct irq_chip ecard_chip = { |
474 | .name = "ECARD", | ||
474 | .ack = ecard_irq_mask, | 475 | .ack = ecard_irq_mask, |
475 | .mask = ecard_irq_mask, | 476 | .mask = ecard_irq_mask, |
476 | .unmask = ecard_irq_unmask, | 477 | .unmask = ecard_irq_unmask, |
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index 7ea5f01dfc7b..de4e33137901 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S | |||
@@ -634,6 +634,14 @@ ENTRY(__switch_to) | |||
634 | * purpose. | 634 | * purpose. |
635 | */ | 635 | */ |
636 | 636 | ||
637 | .macro usr_ret, reg | ||
638 | #ifdef CONFIG_ARM_THUMB | ||
639 | bx \reg | ||
640 | #else | ||
641 | mov pc, \reg | ||
642 | #endif | ||
643 | .endm | ||
644 | |||
637 | .align 5 | 645 | .align 5 |
638 | .globl __kuser_helper_start | 646 | .globl __kuser_helper_start |
639 | __kuser_helper_start: | 647 | __kuser_helper_start: |
@@ -675,7 +683,7 @@ __kuser_memory_barrier: @ 0xffff0fa0 | |||
675 | #if __LINUX_ARM_ARCH__ >= 6 && defined(CONFIG_SMP) | 683 | #if __LINUX_ARM_ARCH__ >= 6 && defined(CONFIG_SMP) |
676 | mcr p15, 0, r0, c7, c10, 5 @ dmb | 684 | mcr p15, 0, r0, c7, c10, 5 @ dmb |
677 | #endif | 685 | #endif |
678 | mov pc, lr | 686 | usr_ret lr |
679 | 687 | ||
680 | .align 5 | 688 | .align 5 |
681 | 689 | ||
@@ -778,7 +786,7 @@ __kuser_cmpxchg: @ 0xffff0fc0 | |||
778 | mov r0, #-1 | 786 | mov r0, #-1 |
779 | adds r0, r0, #0 | 787 | adds r0, r0, #0 |
780 | #endif | 788 | #endif |
781 | mov pc, lr | 789 | usr_ret lr |
782 | 790 | ||
783 | #else | 791 | #else |
784 | 792 | ||
@@ -792,7 +800,7 @@ __kuser_cmpxchg: @ 0xffff0fc0 | |||
792 | #ifdef CONFIG_SMP | 800 | #ifdef CONFIG_SMP |
793 | mcr p15, 0, r0, c7, c10, 5 @ dmb | 801 | mcr p15, 0, r0, c7, c10, 5 @ dmb |
794 | #endif | 802 | #endif |
795 | mov pc, lr | 803 | usr_ret lr |
796 | 804 | ||
797 | #endif | 805 | #endif |
798 | 806 | ||
@@ -834,16 +842,11 @@ __kuser_cmpxchg: @ 0xffff0fc0 | |||
834 | __kuser_get_tls: @ 0xffff0fe0 | 842 | __kuser_get_tls: @ 0xffff0fe0 |
835 | 843 | ||
836 | #if !defined(CONFIG_HAS_TLS_REG) && !defined(CONFIG_TLS_REG_EMUL) | 844 | #if !defined(CONFIG_HAS_TLS_REG) && !defined(CONFIG_TLS_REG_EMUL) |
837 | |||
838 | ldr r0, [pc, #(16 - 8)] @ TLS stored at 0xffff0ff0 | 845 | ldr r0, [pc, #(16 - 8)] @ TLS stored at 0xffff0ff0 |
839 | mov pc, lr | ||
840 | |||
841 | #else | 846 | #else |
842 | |||
843 | mrc p15, 0, r0, c13, c0, 3 @ read TLS register | 847 | mrc p15, 0, r0, c13, c0, 3 @ read TLS register |
844 | mov pc, lr | ||
845 | |||
846 | #endif | 848 | #endif |
849 | usr_ret lr | ||
847 | 850 | ||
848 | .rep 5 | 851 | .rep 5 |
849 | .word 0 @ pad up to __kuser_helper_version | 852 | .word 0 @ pad up to __kuser_helper_version |
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index 2242f5f7cb7d..5365d4e5949e 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S | |||
@@ -114,18 +114,18 @@ ENTRY(secondary_startup) | |||
114 | * Use the page tables supplied from __cpu_up. | 114 | * Use the page tables supplied from __cpu_up. |
115 | */ | 115 | */ |
116 | adr r4, __secondary_data | 116 | adr r4, __secondary_data |
117 | ldmia r4, {r5, r6, r13} @ address to jump to after | 117 | ldmia r4, {r5, r7, r13} @ address to jump to after |
118 | sub r4, r4, r5 @ mmu has been enabled | 118 | sub r4, r4, r5 @ mmu has been enabled |
119 | ldr r4, [r6, r4] @ get secondary_data.pgdir | 119 | ldr r4, [r7, r4] @ get secondary_data.pgdir |
120 | adr lr, __enable_mmu @ return address | 120 | adr lr, __enable_mmu @ return address |
121 | add pc, r10, #12 @ initialise processor | 121 | add pc, r10, #PROCINFO_INITFUNC @ initialise processor |
122 | @ (return control reg) | 122 | @ (return control reg) |
123 | 123 | ||
124 | /* | 124 | /* |
125 | * r6 = &secondary_data | 125 | * r6 = &secondary_data |
126 | */ | 126 | */ |
127 | ENTRY(__secondary_switched) | 127 | ENTRY(__secondary_switched) |
128 | ldr sp, [r6, #4] @ get secondary_data.stack | 128 | ldr sp, [r7, #4] @ get secondary_data.stack |
129 | mov fp, #0 | 129 | mov fp, #0 |
130 | b secondary_start_kernel | 130 | b secondary_start_kernel |
131 | 131 | ||
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c index 626feeec0ade..2e1bf830fe11 100644 --- a/arch/arm/kernel/irq.c +++ b/arch/arm/kernel/irq.c | |||
@@ -77,6 +77,7 @@ int show_interrupts(struct seq_file *p, void *v) | |||
77 | seq_printf(p, "%3d: ", i); | 77 | seq_printf(p, "%3d: ", i); |
78 | for_each_present_cpu(cpu) | 78 | for_each_present_cpu(cpu) |
79 | seq_printf(p, "%10u ", kstat_cpu(cpu).irqs[i]); | 79 | seq_printf(p, "%10u ", kstat_cpu(cpu).irqs[i]); |
80 | seq_printf(p, " %10s", irq_desc[i].chip->name ? : "-"); | ||
80 | seq_printf(p, " %s", action->name); | 81 | seq_printf(p, " %s", action->name); |
81 | for (action = action->next; action; action = action->next) | 82 | for (action = action->next; action; action = action->next) |
82 | seq_printf(p, ", %s", action->name); | 83 | seq_printf(p, ", %s", action->name); |
diff --git a/arch/arm/kernel/isa.c b/arch/arm/kernel/isa.c index 685c3e591a7e..54bbd9fe255c 100644 --- a/arch/arm/kernel/isa.c +++ b/arch/arm/kernel/isa.c | |||
@@ -3,21 +3,14 @@ | |||
3 | * | 3 | * |
4 | * Copyright (C) 1999 Phil Blundell | 4 | * Copyright (C) 1999 Phil Blundell |
5 | * | 5 | * |
6 | * ISA shared memory and I/O port support | ||
7 | */ | ||
8 | |||
9 | /* | ||
10 | * This program is free software; you can redistribute it and/or | 6 | * This program is free software; you can redistribute it and/or |
11 | * modify it under the terms of the GNU General Public License | 7 | * modify it under the terms of the GNU General Public License |
12 | * as published by the Free Software Foundation; either version | 8 | * as published by the Free Software Foundation; either version |
13 | * 2 of the License, or (at your option) any later version. | 9 | * 2 of the License, or (at your option) any later version. |
10 | * | ||
11 | * ISA shared memory and I/O port support, and is required to support | ||
12 | * iopl, inb, outb and friends in userspace via glibc emulation. | ||
14 | */ | 13 | */ |
15 | |||
16 | /* | ||
17 | * Nothing about this is actually ARM specific. One day we could move | ||
18 | * it into kernel/resource.c or some place like that. | ||
19 | */ | ||
20 | |||
21 | #include <linux/stddef.h> | 14 | #include <linux/stddef.h> |
22 | #include <linux/types.h> | 15 | #include <linux/types.h> |
23 | #include <linux/fs.h> | 16 | #include <linux/fs.h> |
@@ -27,21 +20,49 @@ | |||
27 | static unsigned int isa_membase, isa_portbase, isa_portshift; | 20 | static unsigned int isa_membase, isa_portbase, isa_portshift; |
28 | 21 | ||
29 | static ctl_table ctl_isa_vars[4] = { | 22 | static ctl_table ctl_isa_vars[4] = { |
30 | {BUS_ISA_MEM_BASE, "membase", &isa_membase, | 23 | { |
31 | sizeof(isa_membase), 0444, NULL, &proc_dointvec}, | 24 | .ctl_name = BUS_ISA_MEM_BASE, |
32 | {BUS_ISA_PORT_BASE, "portbase", &isa_portbase, | 25 | .procname = "membase", |
33 | sizeof(isa_portbase), 0444, NULL, &proc_dointvec}, | 26 | .data = &isa_membase, |
34 | {BUS_ISA_PORT_SHIFT, "portshift", &isa_portshift, | 27 | .maxlen = sizeof(isa_membase), |
35 | sizeof(isa_portshift), 0444, NULL, &proc_dointvec}, | 28 | .mode = 0444, |
36 | {0} | 29 | .proc_handler = &proc_dointvec, |
30 | }, { | ||
31 | .ctl_name = BUS_ISA_PORT_BASE, | ||
32 | .procname = "portbase", | ||
33 | .data = &isa_portbase, | ||
34 | .maxlen = sizeof(isa_portbase), | ||
35 | .mode = 0444, | ||
36 | .proc_handler = &proc_dointvec, | ||
37 | }, { | ||
38 | .ctl_name = BUS_ISA_PORT_SHIFT, | ||
39 | .procname = "portshift", | ||
40 | .data = &isa_portshift, | ||
41 | .maxlen = sizeof(isa_portshift), | ||
42 | .mode = 0444, | ||
43 | .proc_handler = &proc_dointvec, | ||
44 | }, {0} | ||
37 | }; | 45 | }; |
38 | 46 | ||
39 | static struct ctl_table_header *isa_sysctl_header; | 47 | static struct ctl_table_header *isa_sysctl_header; |
40 | 48 | ||
41 | static ctl_table ctl_isa[2] = {{CTL_BUS_ISA, "isa", NULL, 0, 0555, ctl_isa_vars}, | 49 | static ctl_table ctl_isa[2] = { |
42 | {0}}; | 50 | { |
43 | static ctl_table ctl_bus[2] = {{CTL_BUS, "bus", NULL, 0, 0555, ctl_isa}, | 51 | .ctl_name = CTL_BUS_ISA, |
44 | {0}}; | 52 | .procname = "isa", |
53 | .mode = 0555, | ||
54 | .child = ctl_isa_vars, | ||
55 | }, {0} | ||
56 | }; | ||
57 | |||
58 | static ctl_table ctl_bus[2] = { | ||
59 | { | ||
60 | .ctl_name = CTL_BUS, | ||
61 | .procname = "bus", | ||
62 | .mode = 0555, | ||
63 | .child = ctl_isa, | ||
64 | }, {0} | ||
65 | }; | ||
45 | 66 | ||
46 | void __init | 67 | void __init |
47 | register_isa_ports(unsigned int membase, unsigned int portbase, unsigned int portshift) | 68 | register_isa_ports(unsigned int membase, unsigned int portbase, unsigned int portshift) |
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index 35a052fc177a..aeeed806f991 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c | |||
@@ -232,11 +232,8 @@ NORET_TYPE void die(const char *str, struct pt_regs *regs, int err) | |||
232 | bust_spinlocks(0); | 232 | bust_spinlocks(0); |
233 | spin_unlock_irq(&die_lock); | 233 | spin_unlock_irq(&die_lock); |
234 | 234 | ||
235 | if (panic_on_oops) { | 235 | if (panic_on_oops) |
236 | printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n"); | ||
237 | ssleep(5); | ||
238 | panic("Fatal exception"); | 236 | panic("Fatal exception"); |
239 | } | ||
240 | 237 | ||
241 | do_exit(SIGSEGV); | 238 | do_exit(SIGSEGV); |
242 | } | 239 | } |
diff --git a/arch/arm/mach-at91rm9200/gpio.c b/arch/arm/mach-at91rm9200/gpio.c index 5783c282ae7b..cec199fd6721 100644 --- a/arch/arm/mach-at91rm9200/gpio.c +++ b/arch/arm/mach-at91rm9200/gpio.c | |||
@@ -327,7 +327,8 @@ static int gpio_irq_type(unsigned pin, unsigned type) | |||
327 | return (type == IRQT_BOTHEDGE) ? 0 : -EINVAL; | 327 | return (type == IRQT_BOTHEDGE) ? 0 : -EINVAL; |
328 | } | 328 | } |
329 | 329 | ||
330 | static struct irqchip gpio_irqchip = { | 330 | static struct irq_chip gpio_irqchip = { |
331 | .name = "GPIO", | ||
331 | .mask = gpio_irq_mask, | 332 | .mask = gpio_irq_mask, |
332 | .unmask = gpio_irq_unmask, | 333 | .unmask = gpio_irq_unmask, |
333 | .set_type = gpio_irq_type, | 334 | .set_type = gpio_irq_type, |
diff --git a/arch/arm/mach-at91rm9200/irq.c b/arch/arm/mach-at91rm9200/irq.c index 9b0911320417..c3a5e777f9f8 100644 --- a/arch/arm/mach-at91rm9200/irq.c +++ b/arch/arm/mach-at91rm9200/irq.c | |||
@@ -114,7 +114,8 @@ void at91_irq_resume(void) | |||
114 | #define at91_aic_set_wake NULL | 114 | #define at91_aic_set_wake NULL |
115 | #endif | 115 | #endif |
116 | 116 | ||
117 | static struct irqchip at91_aic_chip = { | 117 | static struct irq_chip at91_aic_chip = { |
118 | .name = "AIC", | ||
118 | .ack = at91_aic_mask_irq, | 119 | .ack = at91_aic_mask_irq, |
119 | .mask = at91_aic_mask_irq, | 120 | .mask = at91_aic_mask_irq, |
120 | .unmask = at91_aic_unmask_irq, | 121 | .unmask = at91_aic_unmask_irq, |
diff --git a/arch/arm/mach-footbridge/cats-hw.c b/arch/arm/mach-footbridge/cats-hw.c index 5b64d5c5b967..ef6ccc8993e9 100644 --- a/arch/arm/mach-footbridge/cats-hw.c +++ b/arch/arm/mach-footbridge/cats-hw.c | |||
@@ -8,7 +8,7 @@ | |||
8 | #include <linux/ioport.h> | 8 | #include <linux/ioport.h> |
9 | #include <linux/kernel.h> | 9 | #include <linux/kernel.h> |
10 | #include <linux/init.h> | 10 | #include <linux/init.h> |
11 | #include <linux/tty.h> | 11 | #include <linux/screen_info.h> |
12 | 12 | ||
13 | #include <asm/hardware/dec21285.h> | 13 | #include <asm/hardware/dec21285.h> |
14 | #include <asm/io.h> | 14 | #include <asm/io.h> |
diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c index 607ed1f5b3f8..823e25d4547e 100644 --- a/arch/arm/mach-footbridge/dc21285.c +++ b/arch/arm/mach-footbridge/dc21285.c | |||
@@ -35,7 +35,6 @@ | |||
35 | 35 | ||
36 | extern int setup_arm_irq(int, struct irqaction *); | 36 | extern int setup_arm_irq(int, struct irqaction *); |
37 | extern void pcibios_report_status(u_int status_mask, int warn); | 37 | extern void pcibios_report_status(u_int status_mask, int warn); |
38 | extern void register_isa_ports(unsigned int, unsigned int, unsigned int); | ||
39 | 38 | ||
40 | static unsigned long | 39 | static unsigned long |
41 | dc21285_base_address(struct pci_bus *bus, unsigned int devfn) | 40 | dc21285_base_address(struct pci_bus *bus, unsigned int devfn) |
diff --git a/arch/arm/mach-imx/irq.c b/arch/arm/mach-imx/irq.c index a5de5f1da9f2..2688bd82c2a2 100644 --- a/arch/arm/mach-imx/irq.c +++ b/arch/arm/mach-imx/irq.c | |||
@@ -204,13 +204,15 @@ imx_gpiod_demux_handler(unsigned int irq_unused, struct irqdesc *desc, | |||
204 | imx_gpio_handler(mask, irq, desc, regs); | 204 | imx_gpio_handler(mask, irq, desc, regs); |
205 | } | 205 | } |
206 | 206 | ||
207 | static struct irqchip imx_internal_chip = { | 207 | static struct irq_chip imx_internal_chip = { |
208 | .name = "MPU", | ||
208 | .ack = imx_mask_irq, | 209 | .ack = imx_mask_irq, |
209 | .mask = imx_mask_irq, | 210 | .mask = imx_mask_irq, |
210 | .unmask = imx_unmask_irq, | 211 | .unmask = imx_unmask_irq, |
211 | }; | 212 | }; |
212 | 213 | ||
213 | static struct irqchip imx_gpio_chip = { | 214 | static struct irq_chip imx_gpio_chip = { |
215 | .name = "GPIO", | ||
214 | .ack = imx_gpio_ack_irq, | 216 | .ack = imx_gpio_ack_irq, |
215 | .mask = imx_gpio_mask_irq, | 217 | .mask = imx_gpio_mask_irq, |
216 | .unmask = imx_gpio_unmask_irq, | 218 | .unmask = imx_gpio_unmask_irq, |
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c index 6d65c96ebfd2..191c57a3b997 100644 --- a/arch/arm/mach-integrator/integrator_ap.c +++ b/arch/arm/mach-integrator/integrator_ap.c | |||
@@ -161,7 +161,8 @@ static void sc_unmask_irq(unsigned int irq) | |||
161 | writel(1 << irq, VA_IC_BASE + IRQ_ENABLE_SET); | 161 | writel(1 << irq, VA_IC_BASE + IRQ_ENABLE_SET); |
162 | } | 162 | } |
163 | 163 | ||
164 | static struct irqchip sc_chip = { | 164 | static struct irq_chip sc_chip = { |
165 | .name = "SC", | ||
165 | .ack = sc_mask_irq, | 166 | .ack = sc_mask_irq, |
166 | .mask = sc_mask_irq, | 167 | .mask = sc_mask_irq, |
167 | .unmask = sc_unmask_irq, | 168 | .unmask = sc_unmask_irq, |
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c index 9f55f5ae1044..678b6ba2b463 100644 --- a/arch/arm/mach-integrator/integrator_cp.c +++ b/arch/arm/mach-integrator/integrator_cp.c | |||
@@ -156,7 +156,8 @@ static void cic_unmask_irq(unsigned int irq) | |||
156 | cic_writel(1 << irq, INTCP_VA_CIC_BASE + IRQ_ENABLE_SET); | 156 | cic_writel(1 << irq, INTCP_VA_CIC_BASE + IRQ_ENABLE_SET); |
157 | } | 157 | } |
158 | 158 | ||
159 | static struct irqchip cic_chip = { | 159 | static struct irq_chip cic_chip = { |
160 | .name = "CIC", | ||
160 | .ack = cic_mask_irq, | 161 | .ack = cic_mask_irq, |
161 | .mask = cic_mask_irq, | 162 | .mask = cic_mask_irq, |
162 | .unmask = cic_unmask_irq, | 163 | .unmask = cic_unmask_irq, |
@@ -174,7 +175,8 @@ static void pic_unmask_irq(unsigned int irq) | |||
174 | pic_writel(1 << irq, INTCP_VA_PIC_BASE + IRQ_ENABLE_SET); | 175 | pic_writel(1 << irq, INTCP_VA_PIC_BASE + IRQ_ENABLE_SET); |
175 | } | 176 | } |
176 | 177 | ||
177 | static struct irqchip pic_chip = { | 178 | static struct irq_chip pic_chip = { |
179 | .name = "PIC", | ||
178 | .ack = pic_mask_irq, | 180 | .ack = pic_mask_irq, |
179 | .mask = pic_mask_irq, | 181 | .mask = pic_mask_irq, |
180 | .unmask = pic_unmask_irq, | 182 | .unmask = pic_unmask_irq, |
@@ -192,7 +194,8 @@ static void sic_unmask_irq(unsigned int irq) | |||
192 | sic_writel(1 << irq, INTCP_VA_SIC_BASE + IRQ_ENABLE_SET); | 194 | sic_writel(1 << irq, INTCP_VA_SIC_BASE + IRQ_ENABLE_SET); |
193 | } | 195 | } |
194 | 196 | ||
195 | static struct irqchip sic_chip = { | 197 | static struct irq_chip sic_chip = { |
198 | .name = "SIC", | ||
196 | .ack = sic_mask_irq, | 199 | .ack = sic_mask_irq, |
197 | .mask = sic_mask_irq, | 200 | .mask = sic_mask_irq, |
198 | .unmask = sic_unmask_irq, | 201 | .unmask = sic_unmask_irq, |
diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c index f9043592e299..4418f6d7572d 100644 --- a/arch/arm/mach-integrator/pci_v3.c +++ b/arch/arm/mach-integrator/pci_v3.c | |||
@@ -600,4 +600,6 @@ void __init pci_v3_postinit(void) | |||
600 | printk(KERN_ERR "PCI: unable to grab local bus timeout " | 600 | printk(KERN_ERR "PCI: unable to grab local bus timeout " |
601 | "interrupt: %d\n", ret); | 601 | "interrupt: %d\n", ret); |
602 | #endif | 602 | #endif |
603 | |||
604 | register_isa_ports(PHYS_PCI_MEM_BASE, PHYS_PCI_IO_BASE, 0); | ||
603 | } | 605 | } |
diff --git a/arch/arm/mach-iop3xx/iop321-irq.c b/arch/arm/mach-iop3xx/iop321-irq.c index d42aae6aef03..88ac333472c8 100644 --- a/arch/arm/mach-iop3xx/iop321-irq.c +++ b/arch/arm/mach-iop3xx/iop321-irq.c | |||
@@ -52,7 +52,8 @@ iop321_irq_unmask (unsigned int irq) | |||
52 | intctl_write(iop321_mask); | 52 | intctl_write(iop321_mask); |
53 | } | 53 | } |
54 | 54 | ||
55 | struct irqchip ext_chip = { | 55 | struct irq_chip ext_chip = { |
56 | .name = "IOP", | ||
56 | .ack = iop321_irq_mask, | 57 | .ack = iop321_irq_mask, |
57 | .mask = iop321_irq_mask, | 58 | .mask = iop321_irq_mask, |
58 | .unmask = iop321_irq_unmask, | 59 | .unmask = iop321_irq_unmask, |
diff --git a/arch/arm/mach-iop3xx/iop331-irq.c b/arch/arm/mach-iop3xx/iop331-irq.c index f4d4321737a4..cab11722ced2 100644 --- a/arch/arm/mach-iop3xx/iop331-irq.c +++ b/arch/arm/mach-iop3xx/iop331-irq.c | |||
@@ -77,13 +77,15 @@ iop331_irq_unmask2(unsigned int irq) | |||
77 | intctl_write1(iop331_mask1); | 77 | intctl_write1(iop331_mask1); |
78 | } | 78 | } |
79 | 79 | ||
80 | struct irqchip iop331_irqchip1 = { | 80 | struct irq_chip iop331_irqchip1 = { |
81 | .name = "IOP-1", | ||
81 | .ack = iop331_irq_mask1, | 82 | .ack = iop331_irq_mask1, |
82 | .mask = iop331_irq_mask1, | 83 | .mask = iop331_irq_mask1, |
83 | .unmask = iop331_irq_unmask1, | 84 | .unmask = iop331_irq_unmask1, |
84 | }; | 85 | }; |
85 | 86 | ||
86 | struct irqchip iop331_irqchip2 = { | 87 | struct irq_chip iop331_irqchip2 = { |
88 | .name = "IOP-2", | ||
87 | .ack = iop331_irq_mask2, | 89 | .ack = iop331_irq_mask2, |
88 | .mask = iop331_irq_mask2, | 90 | .mask = iop331_irq_mask2, |
89 | .unmask = iop331_irq_unmask2, | 91 | .unmask = iop331_irq_unmask2, |
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c index 2d40fe1145f0..9562177b5fe1 100644 --- a/arch/arm/mach-ixp4xx/common-pci.c +++ b/arch/arm/mach-ixp4xx/common-pci.c | |||
@@ -532,8 +532,6 @@ pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask) | |||
532 | return -EIO; | 532 | return -EIO; |
533 | } | 533 | } |
534 | 534 | ||
535 | EXPORT_SYMBOL(pci_set_dma_mask); | ||
536 | EXPORT_SYMBOL(pci_set_consistent_dma_mask); | ||
537 | EXPORT_SYMBOL(ixp4xx_pci_read); | 535 | EXPORT_SYMBOL(ixp4xx_pci_read); |
538 | EXPORT_SYMBOL(ixp4xx_pci_write); | 536 | EXPORT_SYMBOL(ixp4xx_pci_write); |
539 | 537 | ||
diff --git a/arch/arm/mach-ixp4xx/gtwx5715-setup.c b/arch/arm/mach-ixp4xx/gtwx5715-setup.c index 654e2eed81fb..30f1300e0e21 100644 --- a/arch/arm/mach-ixp4xx/gtwx5715-setup.c +++ b/arch/arm/mach-ixp4xx/gtwx5715-setup.c | |||
@@ -107,9 +107,9 @@ static struct flash_platform_data gtwx5715_flash_data = { | |||
107 | .width = 2, | 107 | .width = 2, |
108 | }; | 108 | }; |
109 | 109 | ||
110 | static struct gtw5715_flash_resource = { | 110 | static struct resource gtwx5715_flash_resource = { |
111 | .flags = IORESOURCE_MEM, | 111 | .flags = IORESOURCE_MEM, |
112 | } | 112 | }; |
113 | 113 | ||
114 | static struct platform_device gtwx5715_flash = { | 114 | static struct platform_device gtwx5715_flash = { |
115 | .name = "IXP4XX-Flash", | 115 | .name = "IXP4XX-Flash", |
@@ -130,9 +130,6 @@ static void __init gtwx5715_init(void) | |||
130 | { | 130 | { |
131 | ixp4xx_sys_init(); | 131 | ixp4xx_sys_init(); |
132 | 132 | ||
133 | if (!flash_resource) | ||
134 | printk(KERN_ERR "Could not allocate flash resource\n"); | ||
135 | |||
136 | gtwx5715_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); | 133 | gtwx5715_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); |
137 | gtwx5715_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_8M - 1; | 134 | gtwx5715_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_8M - 1; |
138 | 135 | ||
diff --git a/arch/arm/mach-lh7a40x/arch-kev7a400.c b/arch/arm/mach-lh7a40x/arch-kev7a400.c index 2cccc27c62e4..4f2ab48800a5 100644 --- a/arch/arm/mach-lh7a40x/arch-kev7a400.c +++ b/arch/arm/mach-lh7a40x/arch-kev7a400.c | |||
@@ -63,7 +63,8 @@ static void kev7a400_unmask_cpld_irq (u32 irq) | |||
63 | CPLD_WR_PB_INT_MASK = CPLD_IRQ_mask; | 63 | CPLD_WR_PB_INT_MASK = CPLD_IRQ_mask; |
64 | } | 64 | } |
65 | 65 | ||
66 | static struct irqchip kev7a400_cpld_chip = { | 66 | static struct irq_chip kev7a400_cpld_chip = { |
67 | .name = "CPLD", | ||
67 | .ack = kev7a400_ack_cpld_irq, | 68 | .ack = kev7a400_ack_cpld_irq, |
68 | .mask = kev7a400_mask_cpld_irq, | 69 | .mask = kev7a400_mask_cpld_irq, |
69 | .unmask = kev7a400_unmask_cpld_irq, | 70 | .unmask = kev7a400_unmask_cpld_irq, |
diff --git a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c index 35c3606a2079..a6910114b24c 100644 --- a/arch/arm/mach-lh7a40x/arch-lpd7a40x.c +++ b/arch/arm/mach-lh7a40x/arch-lpd7a40x.c | |||
@@ -200,7 +200,8 @@ static void lh7a40x_unmask_cpld_irq (u32 irq) | |||
200 | } | 200 | } |
201 | } | 201 | } |
202 | 202 | ||
203 | static struct irqchip lpd7a40x_cpld_chip = { | 203 | static struct irq_chip lpd7a40x_cpld_chip = { |
204 | .name = "CPLD", | ||
204 | .ack = lh7a40x_ack_cpld_irq, | 205 | .ack = lh7a40x_ack_cpld_irq, |
205 | .mask = lh7a40x_mask_cpld_irq, | 206 | .mask = lh7a40x_mask_cpld_irq, |
206 | .unmask = lh7a40x_unmask_cpld_irq, | 207 | .unmask = lh7a40x_unmask_cpld_irq, |
diff --git a/arch/arm/mach-lh7a40x/irq-kev7a400.c b/arch/arm/mach-lh7a40x/irq-kev7a400.c index 8535764d89ca..f9b3fe9174a5 100644 --- a/arch/arm/mach-lh7a40x/irq-kev7a400.c +++ b/arch/arm/mach-lh7a40x/irq-kev7a400.c | |||
@@ -43,7 +43,8 @@ lh7a400_unmask_cpld_irq (u32 irq) | |||
43 | } | 43 | } |
44 | 44 | ||
45 | static struct | 45 | static struct |
46 | irqchip lh7a400_cpld_chip = { | 46 | irq_chip lh7a400_cpld_chip = { |
47 | .name = "CPLD", | ||
47 | .ack = lh7a400_ack_cpld_irq, | 48 | .ack = lh7a400_ack_cpld_irq, |
48 | .mask = lh7a400_mask_cpld_irq, | 49 | .mask = lh7a400_mask_cpld_irq, |
49 | .unmask = lh7a400_unmask_cpld_irq, | 50 | .unmask = lh7a400_unmask_cpld_irq, |
diff --git a/arch/arm/mach-lh7a40x/irq-lh7a400.c b/arch/arm/mach-lh7a40x/irq-lh7a400.c index f9fdefef6d6f..091b2dc58d25 100644 --- a/arch/arm/mach-lh7a40x/irq-lh7a400.c +++ b/arch/arm/mach-lh7a40x/irq-lh7a400.c | |||
@@ -38,13 +38,15 @@ static void lh7a400_ack_gpio_irq (u32 irq) | |||
38 | INTC_INTENC = (1 << irq); | 38 | INTC_INTENC = (1 << irq); |
39 | } | 39 | } |
40 | 40 | ||
41 | static struct irqchip lh7a400_internal_chip = { | 41 | static struct irq_chip lh7a400_internal_chip = { |
42 | .name = "MPU", | ||
42 | .ack = lh7a400_mask_irq, /* Level triggering -> mask is ack */ | 43 | .ack = lh7a400_mask_irq, /* Level triggering -> mask is ack */ |
43 | .mask = lh7a400_mask_irq, | 44 | .mask = lh7a400_mask_irq, |
44 | .unmask = lh7a400_unmask_irq, | 45 | .unmask = lh7a400_unmask_irq, |
45 | }; | 46 | }; |
46 | 47 | ||
47 | static struct irqchip lh7a400_gpio_chip = { | 48 | static struct irq_chip lh7a400_gpio_chip = { |
49 | .name = "GPIO", | ||
48 | .ack = lh7a400_ack_gpio_irq, | 50 | .ack = lh7a400_ack_gpio_irq, |
49 | .mask = lh7a400_mask_irq, | 51 | .mask = lh7a400_mask_irq, |
50 | .unmask = lh7a400_unmask_irq, | 52 | .unmask = lh7a400_unmask_irq, |
diff --git a/arch/arm/mach-lh7a40x/irq-lh7a404.c b/arch/arm/mach-lh7a40x/irq-lh7a404.c index 2685a81454d2..7059b983724f 100644 --- a/arch/arm/mach-lh7a40x/irq-lh7a404.c +++ b/arch/arm/mach-lh7a40x/irq-lh7a404.c | |||
@@ -76,25 +76,29 @@ static void lh7a404_vic2_ack_gpio_irq (u32 irq) | |||
76 | VIC2_INTENCLR = (1 << irq); | 76 | VIC2_INTENCLR = (1 << irq); |
77 | } | 77 | } |
78 | 78 | ||
79 | static struct irqchip lh7a404_vic1_chip = { | 79 | static struct irq_chip lh7a404_vic1_chip = { |
80 | .name = "VIC1", | ||
80 | .ack = lh7a404_vic1_mask_irq, /* Because level-triggered */ | 81 | .ack = lh7a404_vic1_mask_irq, /* Because level-triggered */ |
81 | .mask = lh7a404_vic1_mask_irq, | 82 | .mask = lh7a404_vic1_mask_irq, |
82 | .unmask = lh7a404_vic1_unmask_irq, | 83 | .unmask = lh7a404_vic1_unmask_irq, |
83 | }; | 84 | }; |
84 | 85 | ||
85 | static struct irqchip lh7a404_vic2_chip = { | 86 | static struct irq_chip lh7a404_vic2_chip = { |
87 | .name = "VIC2", | ||
86 | .ack = lh7a404_vic2_mask_irq, /* Because level-triggered */ | 88 | .ack = lh7a404_vic2_mask_irq, /* Because level-triggered */ |
87 | .mask = lh7a404_vic2_mask_irq, | 89 | .mask = lh7a404_vic2_mask_irq, |
88 | .unmask = lh7a404_vic2_unmask_irq, | 90 | .unmask = lh7a404_vic2_unmask_irq, |
89 | }; | 91 | }; |
90 | 92 | ||
91 | static struct irqchip lh7a404_gpio_vic1_chip = { | 93 | static struct irq_chip lh7a404_gpio_vic1_chip = { |
94 | .name = "GPIO-VIC1", | ||
92 | .ack = lh7a404_vic1_ack_gpio_irq, | 95 | .ack = lh7a404_vic1_ack_gpio_irq, |
93 | .mask = lh7a404_vic1_mask_irq, | 96 | .mask = lh7a404_vic1_mask_irq, |
94 | .unmask = lh7a404_vic1_unmask_irq, | 97 | .unmask = lh7a404_vic1_unmask_irq, |
95 | }; | 98 | }; |
96 | 99 | ||
97 | static struct irqchip lh7a404_gpio_vic2_chip = { | 100 | static struct irq_chip lh7a404_gpio_vic2_chip = { |
101 | .name = "GPIO-VIC2", | ||
98 | .ack = lh7a404_vic2_ack_gpio_irq, | 102 | .ack = lh7a404_vic2_ack_gpio_irq, |
99 | .mask = lh7a404_vic2_mask_irq, | 103 | .mask = lh7a404_vic2_mask_irq, |
100 | .unmask = lh7a404_vic2_unmask_irq, | 104 | .unmask = lh7a404_vic2_unmask_irq, |
diff --git a/arch/arm/mach-lh7a40x/irq-lpd7a40x.c b/arch/arm/mach-lh7a40x/irq-lpd7a40x.c index dcb4e17b9419..d6055dde6468 100644 --- a/arch/arm/mach-lh7a40x/irq-lpd7a40x.c +++ b/arch/arm/mach-lh7a40x/irq-lpd7a40x.c | |||
@@ -50,7 +50,8 @@ static void lh7a40x_unmask_cpld_irq (u32 irq) | |||
50 | } | 50 | } |
51 | } | 51 | } |
52 | 52 | ||
53 | static struct irqchip lh7a40x_cpld_chip = { | 53 | static struct irq_chip lh7a40x_cpld_chip = { |
54 | .name = "CPLD", | ||
54 | .ack = lh7a40x_ack_cpld_irq, | 55 | .ack = lh7a40x_ack_cpld_irq, |
55 | .mask = lh7a40x_mask_cpld_irq, | 56 | .mask = lh7a40x_mask_cpld_irq, |
56 | .unmask = lh7a40x_unmask_cpld_irq, | 57 | .unmask = lh7a40x_unmask_cpld_irq, |
diff --git a/arch/arm/mach-omap1/fpga.c b/arch/arm/mach-omap1/fpga.c index 34eb79ee6e61..efe9bfc6e55f 100644 --- a/arch/arm/mach-omap1/fpga.c +++ b/arch/arm/mach-omap1/fpga.c | |||
@@ -106,14 +106,16 @@ void innovator_fpga_IRQ_demux(unsigned int irq, struct irqdesc *desc, | |||
106 | } | 106 | } |
107 | } | 107 | } |
108 | 108 | ||
109 | static struct irqchip omap_fpga_irq_ack = { | 109 | static struct irq_chip omap_fpga_irq_ack = { |
110 | .name = "FPGA-ack", | ||
110 | .ack = fpga_mask_ack_irq, | 111 | .ack = fpga_mask_ack_irq, |
111 | .mask = fpga_mask_irq, | 112 | .mask = fpga_mask_irq, |
112 | .unmask = fpga_unmask_irq, | 113 | .unmask = fpga_unmask_irq, |
113 | }; | 114 | }; |
114 | 115 | ||
115 | 116 | ||
116 | static struct irqchip omap_fpga_irq = { | 117 | static struct irq_chip omap_fpga_irq = { |
118 | .name = "FPGA", | ||
117 | .ack = fpga_ack_irq, | 119 | .ack = fpga_ack_irq, |
118 | .mask = fpga_mask_irq, | 120 | .mask = fpga_mask_irq, |
119 | .unmask = fpga_unmask_irq, | 121 | .unmask = fpga_unmask_irq, |
diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c index 9e039845b50e..3ea140bb9eba 100644 --- a/arch/arm/mach-omap1/irq.c +++ b/arch/arm/mach-omap1/irq.c | |||
@@ -168,7 +168,8 @@ static struct omap_irq_bank omap1610_irq_banks[] = { | |||
168 | }; | 168 | }; |
169 | #endif | 169 | #endif |
170 | 170 | ||
171 | static struct irqchip omap_irq_chip = { | 171 | static struct irq_chip omap_irq_chip = { |
172 | .name = "MPU", | ||
172 | .ack = omap_mask_ack_irq, | 173 | .ack = omap_mask_ack_irq, |
173 | .mask = omap_mask_irq, | 174 | .mask = omap_mask_irq, |
174 | .unmask = omap_unmask_irq, | 175 | .unmask = omap_unmask_irq, |
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c index 3eed6a737bf8..dfc3b35cc1ff 100644 --- a/arch/arm/mach-omap2/irq.c +++ b/arch/arm/mach-omap2/irq.c | |||
@@ -94,7 +94,8 @@ static void omap_mask_ack_irq(unsigned int irq) | |||
94 | omap_ack_irq(irq); | 94 | omap_ack_irq(irq); |
95 | } | 95 | } |
96 | 96 | ||
97 | static struct irqchip omap_irq_chip = { | 97 | static struct irq_chip omap_irq_chip = { |
98 | .name = "INTC", | ||
98 | .ack = omap_mask_ack_irq, | 99 | .ack = omap_mask_ack_irq, |
99 | .mask = omap_mask_irq, | 100 | .mask = omap_mask_irq, |
100 | .unmask = omap_unmask_irq, | 101 | .unmask = omap_unmask_irq, |
diff --git a/arch/arm/mach-pxa/corgi_ssp.c b/arch/arm/mach-pxa/corgi_ssp.c index f9421318cb7a..ff6b4ee037f5 100644 --- a/arch/arm/mach-pxa/corgi_ssp.c +++ b/arch/arm/mach-pxa/corgi_ssp.c | |||
@@ -47,14 +47,15 @@ static struct corgissp_machinfo *ssp_machinfo; | |||
47 | */ | 47 | */ |
48 | unsigned long corgi_ssp_ads7846_putget(ulong data) | 48 | unsigned long corgi_ssp_ads7846_putget(ulong data) |
49 | { | 49 | { |
50 | unsigned long ret,flag; | 50 | unsigned long flag; |
51 | u32 ret = 0; | ||
51 | 52 | ||
52 | spin_lock_irqsave(&corgi_ssp_lock, flag); | 53 | spin_lock_irqsave(&corgi_ssp_lock, flag); |
53 | if (ssp_machinfo->cs_ads7846 >= 0) | 54 | if (ssp_machinfo->cs_ads7846 >= 0) |
54 | GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); | 55 | GPCR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); |
55 | 56 | ||
56 | ssp_write_word(&corgi_ssp_dev,data); | 57 | ssp_write_word(&corgi_ssp_dev,data); |
57 | ret = ssp_read_word(&corgi_ssp_dev); | 58 | ssp_read_word(&corgi_ssp_dev, &ret); |
58 | 59 | ||
59 | if (ssp_machinfo->cs_ads7846 >= 0) | 60 | if (ssp_machinfo->cs_ads7846 >= 0) |
60 | GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); | 61 | GPSR(ssp_machinfo->cs_ads7846) = GPIO_bit(ssp_machinfo->cs_ads7846); |
@@ -88,7 +89,9 @@ void corgi_ssp_ads7846_put(ulong data) | |||
88 | 89 | ||
89 | unsigned long corgi_ssp_ads7846_get(void) | 90 | unsigned long corgi_ssp_ads7846_get(void) |
90 | { | 91 | { |
91 | return ssp_read_word(&corgi_ssp_dev); | 92 | u32 ret = 0; |
93 | ssp_read_word(&corgi_ssp_dev, &ret); | ||
94 | return ret; | ||
92 | } | 95 | } |
93 | 96 | ||
94 | EXPORT_SYMBOL(corgi_ssp_ads7846_putget); | 97 | EXPORT_SYMBOL(corgi_ssp_ads7846_putget); |
@@ -104,6 +107,7 @@ EXPORT_SYMBOL(corgi_ssp_ads7846_get); | |||
104 | unsigned long corgi_ssp_dac_put(ulong data) | 107 | unsigned long corgi_ssp_dac_put(ulong data) |
105 | { | 108 | { |
106 | unsigned long flag, sscr1 = SSCR1_SPH; | 109 | unsigned long flag, sscr1 = SSCR1_SPH; |
110 | u32 tmp; | ||
107 | 111 | ||
108 | spin_lock_irqsave(&corgi_ssp_lock, flag); | 112 | spin_lock_irqsave(&corgi_ssp_lock, flag); |
109 | 113 | ||
@@ -118,7 +122,7 @@ unsigned long corgi_ssp_dac_put(ulong data) | |||
118 | GPCR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); | 122 | GPCR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); |
119 | ssp_write_word(&corgi_ssp_dev,data); | 123 | ssp_write_word(&corgi_ssp_dev,data); |
120 | /* Read null data back from device to prevent SSP overflow */ | 124 | /* Read null data back from device to prevent SSP overflow */ |
121 | ssp_read_word(&corgi_ssp_dev); | 125 | ssp_read_word(&corgi_ssp_dev, &tmp); |
122 | if (ssp_machinfo->cs_lcdcon >= 0) | 126 | if (ssp_machinfo->cs_lcdcon >= 0) |
123 | GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); | 127 | GPSR(ssp_machinfo->cs_lcdcon) = GPIO_bit(ssp_machinfo->cs_lcdcon); |
124 | 128 | ||
@@ -150,7 +154,7 @@ EXPORT_SYMBOL(corgi_ssp_blduty_set); | |||
150 | int corgi_ssp_max1111_get(ulong data) | 154 | int corgi_ssp_max1111_get(ulong data) |
151 | { | 155 | { |
152 | unsigned long flag; | 156 | unsigned long flag; |
153 | int voltage,voltage1,voltage2; | 157 | long voltage = 0, voltage1 = 0, voltage2 = 0; |
154 | 158 | ||
155 | spin_lock_irqsave(&corgi_ssp_lock, flag); | 159 | spin_lock_irqsave(&corgi_ssp_lock, flag); |
156 | if (ssp_machinfo->cs_max1111 >= 0) | 160 | if (ssp_machinfo->cs_max1111 >= 0) |
@@ -163,15 +167,15 @@ int corgi_ssp_max1111_get(ulong data) | |||
163 | 167 | ||
164 | /* TB1/RB1 */ | 168 | /* TB1/RB1 */ |
165 | ssp_write_word(&corgi_ssp_dev,data); | 169 | ssp_write_word(&corgi_ssp_dev,data); |
166 | ssp_read_word(&corgi_ssp_dev); /* null read */ | 170 | ssp_read_word(&corgi_ssp_dev, (u32*)&voltage1); /* null read */ |
167 | 171 | ||
168 | /* TB12/RB2 */ | 172 | /* TB12/RB2 */ |
169 | ssp_write_word(&corgi_ssp_dev,0); | 173 | ssp_write_word(&corgi_ssp_dev,0); |
170 | voltage1=ssp_read_word(&corgi_ssp_dev); | 174 | ssp_read_word(&corgi_ssp_dev, (u32*)&voltage1); |
171 | 175 | ||
172 | /* TB13/RB3*/ | 176 | /* TB13/RB3*/ |
173 | ssp_write_word(&corgi_ssp_dev,0); | 177 | ssp_write_word(&corgi_ssp_dev,0); |
174 | voltage2=ssp_read_word(&corgi_ssp_dev); | 178 | ssp_read_word(&corgi_ssp_dev, (u32*)&voltage2); |
175 | 179 | ||
176 | ssp_disable(&corgi_ssp_dev); | 180 | ssp_disable(&corgi_ssp_dev); |
177 | ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846)); | 181 | ssp_config(&corgi_ssp_dev, (SSCR0_National | (SSCR0_DSS & 0x0b )), 0, 0, SSCR0_SerClkDiv(ssp_machinfo->clk_ads7846)); |
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c index d9635ff4b10c..12141e2a50cc 100644 --- a/arch/arm/mach-pxa/irq.c +++ b/arch/arm/mach-pxa/irq.c | |||
@@ -39,7 +39,8 @@ static void pxa_unmask_low_irq(unsigned int irq) | |||
39 | ICMR |= (1 << (irq + PXA_IRQ_SKIP)); | 39 | ICMR |= (1 << (irq + PXA_IRQ_SKIP)); |
40 | } | 40 | } |
41 | 41 | ||
42 | static struct irqchip pxa_internal_chip_low = { | 42 | static struct irq_chip pxa_internal_chip_low = { |
43 | .name = "SC", | ||
43 | .ack = pxa_mask_low_irq, | 44 | .ack = pxa_mask_low_irq, |
44 | .mask = pxa_mask_low_irq, | 45 | .mask = pxa_mask_low_irq, |
45 | .unmask = pxa_unmask_low_irq, | 46 | .unmask = pxa_unmask_low_irq, |
@@ -61,7 +62,8 @@ static void pxa_unmask_high_irq(unsigned int irq) | |||
61 | ICMR2 |= (1 << (irq - 32 + PXA_IRQ_SKIP)); | 62 | ICMR2 |= (1 << (irq - 32 + PXA_IRQ_SKIP)); |
62 | } | 63 | } |
63 | 64 | ||
64 | static struct irqchip pxa_internal_chip_high = { | 65 | static struct irq_chip pxa_internal_chip_high = { |
66 | .name = "SC-hi", | ||
65 | .ack = pxa_mask_high_irq, | 67 | .ack = pxa_mask_high_irq, |
66 | .mask = pxa_mask_high_irq, | 68 | .mask = pxa_mask_high_irq, |
67 | .unmask = pxa_unmask_high_irq, | 69 | .unmask = pxa_unmask_high_irq, |
@@ -129,7 +131,8 @@ static void pxa_ack_low_gpio(unsigned int irq) | |||
129 | GEDR0 = (1 << (irq - IRQ_GPIO0)); | 131 | GEDR0 = (1 << (irq - IRQ_GPIO0)); |
130 | } | 132 | } |
131 | 133 | ||
132 | static struct irqchip pxa_low_gpio_chip = { | 134 | static struct irq_chip pxa_low_gpio_chip = { |
135 | .name = "GPIO-l", | ||
133 | .ack = pxa_ack_low_gpio, | 136 | .ack = pxa_ack_low_gpio, |
134 | .mask = pxa_mask_low_irq, | 137 | .mask = pxa_mask_low_irq, |
135 | .unmask = pxa_unmask_low_irq, | 138 | .unmask = pxa_unmask_low_irq, |
@@ -237,7 +240,8 @@ static void pxa_unmask_muxed_gpio(unsigned int irq) | |||
237 | GFER(gpio) = GPIO_IRQ_falling_edge[idx] & GPIO_IRQ_mask[idx]; | 240 | GFER(gpio) = GPIO_IRQ_falling_edge[idx] & GPIO_IRQ_mask[idx]; |
238 | } | 241 | } |
239 | 242 | ||
240 | static struct irqchip pxa_muxed_gpio_chip = { | 243 | static struct irq_chip pxa_muxed_gpio_chip = { |
244 | .name = "GPIO", | ||
241 | .ack = pxa_ack_muxed_gpio, | 245 | .ack = pxa_ack_muxed_gpio, |
242 | .mask = pxa_mask_muxed_gpio, | 246 | .mask = pxa_mask_muxed_gpio, |
243 | .unmask = pxa_unmask_muxed_gpio, | 247 | .unmask = pxa_unmask_muxed_gpio, |
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c index 1a5f5c21481e..12479ae26db2 100644 --- a/arch/arm/mach-pxa/lpd270.c +++ b/arch/arm/mach-pxa/lpd270.c | |||
@@ -68,7 +68,8 @@ static void lpd270_unmask_irq(unsigned int irq) | |||
68 | __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK); | 68 | __raw_writew(lpd270_irq_enabled, LPD270_INT_MASK); |
69 | } | 69 | } |
70 | 70 | ||
71 | static struct irqchip lpd270_irq_chip = { | 71 | static struct irq_chip lpd270_irq_chip = { |
72 | .name = "CPLD", | ||
72 | .ack = lpd270_mask_irq, | 73 | .ack = lpd270_mask_irq, |
73 | .mask = lpd270_mask_irq, | 74 | .mask = lpd270_mask_irq, |
74 | .unmask = lpd270_unmask_irq, | 75 | .unmask = lpd270_unmask_irq, |
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c index 6a9a669d60de..83ff5cee64d9 100644 --- a/arch/arm/mach-pxa/lubbock.c +++ b/arch/arm/mach-pxa/lubbock.c | |||
@@ -78,7 +78,8 @@ static void lubbock_unmask_irq(unsigned int irq) | |||
78 | LUB_IRQ_MASK_EN = (lubbock_irq_enabled |= (1 << lubbock_irq)); | 78 | LUB_IRQ_MASK_EN = (lubbock_irq_enabled |= (1 << lubbock_irq)); |
79 | } | 79 | } |
80 | 80 | ||
81 | static struct irqchip lubbock_irq_chip = { | 81 | static struct irq_chip lubbock_irq_chip = { |
82 | .name = "FPGA", | ||
82 | .ack = lubbock_mask_irq, | 83 | .ack = lubbock_mask_irq, |
83 | .mask = lubbock_mask_irq, | 84 | .mask = lubbock_mask_irq, |
84 | .unmask = lubbock_unmask_irq, | 85 | .unmask = lubbock_unmask_irq, |
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c index 21ddf3de2f6e..a7e9b96f258a 100644 --- a/arch/arm/mach-pxa/mainstone.c +++ b/arch/arm/mach-pxa/mainstone.c | |||
@@ -64,7 +64,8 @@ static void mainstone_unmask_irq(unsigned int irq) | |||
64 | MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq)); | 64 | MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq)); |
65 | } | 65 | } |
66 | 66 | ||
67 | static struct irqchip mainstone_irq_chip = { | 67 | static struct irq_chip mainstone_irq_chip = { |
68 | .name = "FPGA", | ||
68 | .ack = mainstone_mask_irq, | 69 | .ack = mainstone_mask_irq, |
69 | .mask = mainstone_mask_irq, | 70 | .mask = mainstone_mask_irq, |
70 | .unmask = mainstone_unmask_irq, | 71 | .unmask = mainstone_unmask_irq, |
diff --git a/arch/arm/mach-pxa/ssp.c b/arch/arm/mach-pxa/ssp.c index 93096befd017..1fddfeaa630d 100644 --- a/arch/arm/mach-pxa/ssp.c +++ b/arch/arm/mach-pxa/ssp.c | |||
@@ -40,6 +40,8 @@ | |||
40 | 40 | ||
41 | #define PXA_SSP_PORTS 3 | 41 | #define PXA_SSP_PORTS 3 |
42 | 42 | ||
43 | #define TIMEOUT 100000 | ||
44 | |||
43 | struct ssp_info_ { | 45 | struct ssp_info_ { |
44 | int irq; | 46 | int irq; |
45 | u32 clock; | 47 | u32 clock; |
@@ -92,13 +94,18 @@ static irqreturn_t ssp_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |||
92 | * The caller is expected to perform the necessary locking. | 94 | * The caller is expected to perform the necessary locking. |
93 | * | 95 | * |
94 | * Returns: | 96 | * Returns: |
95 | * %-ETIMEDOUT timeout occurred (for future) | 97 | * %-ETIMEDOUT timeout occurred |
96 | * 0 success | 98 | * 0 success |
97 | */ | 99 | */ |
98 | int ssp_write_word(struct ssp_dev *dev, u32 data) | 100 | int ssp_write_word(struct ssp_dev *dev, u32 data) |
99 | { | 101 | { |
100 | while (!(SSSR_P(dev->port) & SSSR_TNF)) | 102 | int timeout = TIMEOUT; |
103 | |||
104 | while (!(SSSR_P(dev->port) & SSSR_TNF)) { | ||
105 | if (!--timeout) | ||
106 | return -ETIMEDOUT; | ||
101 | cpu_relax(); | 107 | cpu_relax(); |
108 | } | ||
102 | 109 | ||
103 | SSDR_P(dev->port) = data; | 110 | SSDR_P(dev->port) = data; |
104 | 111 | ||
@@ -117,15 +124,21 @@ int ssp_write_word(struct ssp_dev *dev, u32 data) | |||
117 | * The caller is expected to perform the necessary locking. | 124 | * The caller is expected to perform the necessary locking. |
118 | * | 125 | * |
119 | * Returns: | 126 | * Returns: |
120 | * %-ETIMEDOUT timeout occurred (for future) | 127 | * %-ETIMEDOUT timeout occurred |
121 | * 32-bit data success | 128 | * 32-bit data success |
122 | */ | 129 | */ |
123 | int ssp_read_word(struct ssp_dev *dev) | 130 | int ssp_read_word(struct ssp_dev *dev, u32 *data) |
124 | { | 131 | { |
125 | while (!(SSSR_P(dev->port) & SSSR_RNE)) | 132 | int timeout = TIMEOUT; |
133 | |||
134 | while (!(SSSR_P(dev->port) & SSSR_RNE)) { | ||
135 | if (!--timeout) | ||
136 | return -ETIMEDOUT; | ||
126 | cpu_relax(); | 137 | cpu_relax(); |
138 | } | ||
127 | 139 | ||
128 | return SSDR_P(dev->port); | 140 | *data = SSDR_P(dev->port); |
141 | return 0; | ||
129 | } | 142 | } |
130 | 143 | ||
131 | /** | 144 | /** |
@@ -136,13 +149,21 @@ int ssp_read_word(struct ssp_dev *dev) | |||
136 | * | 149 | * |
137 | * The caller is expected to perform the necessary locking. | 150 | * The caller is expected to perform the necessary locking. |
138 | */ | 151 | */ |
139 | void ssp_flush(struct ssp_dev *dev) | 152 | int ssp_flush(struct ssp_dev *dev) |
140 | { | 153 | { |
154 | int timeout = TIMEOUT * 2; | ||
155 | |||
141 | do { | 156 | do { |
142 | while (SSSR_P(dev->port) & SSSR_RNE) { | 157 | while (SSSR_P(dev->port) & SSSR_RNE) { |
158 | if (!--timeout) | ||
159 | return -ETIMEDOUT; | ||
143 | (void) SSDR_P(dev->port); | 160 | (void) SSDR_P(dev->port); |
144 | } | 161 | } |
162 | if (!--timeout) | ||
163 | return -ETIMEDOUT; | ||
145 | } while (SSSR_P(dev->port) & SSSR_BSY); | 164 | } while (SSSR_P(dev->port) & SSSR_BSY); |
165 | |||
166 | return 0; | ||
146 | } | 167 | } |
147 | 168 | ||
148 | /** | 169 | /** |
diff --git a/arch/arm/mach-s3c2410/Makefile b/arch/arm/mach-s3c2410/Makefile index 0c7938645df6..273e05f2b8de 100644 --- a/arch/arm/mach-s3c2410/Makefile +++ b/arch/arm/mach-s3c2410/Makefile | |||
@@ -10,45 +10,47 @@ obj-m := | |||
10 | obj-n := | 10 | obj-n := |
11 | obj- := | 11 | obj- := |
12 | 12 | ||
13 | # DMA | ||
14 | obj-$(CONFIG_S3C2410_DMA) += dma.o | ||
15 | |||
13 | # S3C2400 support files | 16 | # S3C2400 support files |
14 | obj-$(CONFIG_CPU_S3C2400) += s3c2400-gpio.o | 17 | obj-$(CONFIG_CPU_S3C2400) += s3c2400-gpio.o |
15 | 18 | ||
16 | # S3C2410 support files | 19 | # S3C2410 support files |
17 | 20 | ||
18 | obj-$(CONFIG_CPU_S3C2410) += s3c2410.o | 21 | obj-$(CONFIG_CPU_S3C2410) += s3c2410.o |
19 | obj-$(CONFIG_CPU_S3C2410) += s3c2410-gpio.o | 22 | obj-$(CONFIG_CPU_S3C2410) += s3c2410-gpio.o |
20 | obj-$(CONFIG_S3C2410_DMA) += dma.o | ||
21 | 23 | ||
22 | # Power Management support | 24 | # Power Management support |
23 | 25 | ||
24 | obj-$(CONFIG_PM) += pm.o sleep.o | 26 | obj-$(CONFIG_PM) += pm.o sleep.o |
25 | obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o | 27 | obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o |
26 | 28 | ||
27 | # S3C2412 support | 29 | # S3C2412 support |
28 | obj-$(CONFIG_CPU_S3C2412) += s3c2412.o | 30 | obj-$(CONFIG_CPU_S3C2412) += s3c2412.o |
29 | obj-$(CONFIG_CPU_S3C2412) += s3c2412-clock.o | 31 | obj-$(CONFIG_CPU_S3C2412) += s3c2412-clock.o |
30 | 32 | ||
31 | # | 33 | # |
32 | # S3C244X support | 34 | # S3C244X support |
33 | 35 | ||
34 | obj-$(CONFIG_CPU_S3C244X) += s3c244x.o | 36 | obj-$(CONFIG_CPU_S3C244X) += s3c244x.o |
35 | obj-$(CONFIG_CPU_S3C244X) += s3c244x-irq.o | 37 | obj-$(CONFIG_CPU_S3C244X) += s3c244x-irq.o |
36 | 38 | ||
37 | # Clock control | 39 | # Clock control |
38 | 40 | ||
39 | obj-$(CONFIG_S3C2410_CLOCK) += s3c2410-clock.o | 41 | obj-$(CONFIG_S3C2410_CLOCK) += s3c2410-clock.o |
40 | 42 | ||
41 | # S3C2440 support | 43 | # S3C2440 support |
42 | 44 | ||
43 | obj-$(CONFIG_CPU_S3C2440) += s3c2440.o s3c2440-dsc.o | 45 | obj-$(CONFIG_CPU_S3C2440) += s3c2440.o s3c2440-dsc.o |
44 | obj-$(CONFIG_CPU_S3C2440) += s3c2440-irq.o | 46 | obj-$(CONFIG_CPU_S3C2440) += s3c2440-irq.o |
45 | obj-$(CONFIG_CPU_S3C2440) += s3c2440-clock.o | 47 | obj-$(CONFIG_CPU_S3C2440) += s3c2440-clock.o |
46 | obj-$(CONFIG_CPU_S3C2440) += s3c2410-gpio.o | 48 | obj-$(CONFIG_CPU_S3C2440) += s3c2410-gpio.o |
47 | 49 | ||
48 | # S3C2442 support | 50 | # S3C2442 support |
49 | 51 | ||
50 | obj-$(CONFIG_CPU_S3C2442) += s3c2442.o | 52 | obj-$(CONFIG_CPU_S3C2442) += s3c2442.o |
51 | obj-$(CONFIG_CPU_S3C2442) += s3c2442-clock.o | 53 | obj-$(CONFIG_CPU_S3C2442) += s3c2442-clock.o |
52 | 54 | ||
53 | # bast extras | 55 | # bast extras |
54 | 56 | ||
diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c index 094cc52745c5..cc92a7b2db88 100644 --- a/arch/arm/mach-s3c2410/dma.c +++ b/arch/arm/mach-s3c2410/dma.c | |||
@@ -60,7 +60,7 @@ static void __iomem *dma_base; | |||
60 | static kmem_cache_t *dma_kmem; | 60 | static kmem_cache_t *dma_kmem; |
61 | 61 | ||
62 | /* dma channel state information */ | 62 | /* dma channel state information */ |
63 | s3c2410_dma_chan_t s3c2410_chans[S3C2410_DMA_CHANNELS]; | 63 | struct s3c2410_dma_chan s3c2410_chans[S3C2410_DMA_CHANNELS]; |
64 | 64 | ||
65 | /* debugging functions */ | 65 | /* debugging functions */ |
66 | 66 | ||
@@ -74,7 +74,7 @@ s3c2410_dma_chan_t s3c2410_chans[S3C2410_DMA_CHANNELS]; | |||
74 | #define dma_wrreg(chan, reg, val) writel((val), (chan)->regs + (reg)) | 74 | #define dma_wrreg(chan, reg, val) writel((val), (chan)->regs + (reg)) |
75 | #else | 75 | #else |
76 | static inline void | 76 | static inline void |
77 | dma_wrreg(s3c2410_dma_chan_t *chan, int reg, unsigned long val) | 77 | dma_wrreg(struct s3c2410_dma_chan *chan, int reg, unsigned long val) |
78 | { | 78 | { |
79 | pr_debug("writing %08x to register %08x\n",(unsigned int)val,reg); | 79 | pr_debug("writing %08x to register %08x\n",(unsigned int)val,reg); |
80 | writel(val, dma_regaddr(chan, reg)); | 80 | writel(val, dma_regaddr(chan, reg)); |
@@ -102,7 +102,7 @@ struct s3c2410_dma_regstate { | |||
102 | */ | 102 | */ |
103 | 103 | ||
104 | static void | 104 | static void |
105 | dmadbg_capture(s3c2410_dma_chan_t *chan, struct s3c2410_dma_regstate *regs) | 105 | dmadbg_capture(struct s3c2410_dma_chan *chan, struct s3c2410_dma_regstate *regs) |
106 | { | 106 | { |
107 | regs->dcsrc = dma_rdreg(chan, S3C2410_DMA_DCSRC); | 107 | regs->dcsrc = dma_rdreg(chan, S3C2410_DMA_DCSRC); |
108 | regs->disrc = dma_rdreg(chan, S3C2410_DMA_DISRC); | 108 | regs->disrc = dma_rdreg(chan, S3C2410_DMA_DISRC); |
@@ -112,7 +112,7 @@ dmadbg_capture(s3c2410_dma_chan_t *chan, struct s3c2410_dma_regstate *regs) | |||
112 | } | 112 | } |
113 | 113 | ||
114 | static void | 114 | static void |
115 | dmadbg_showregs(const char *fname, int line, s3c2410_dma_chan_t *chan, | 115 | dmadbg_dumpregs(const char *fname, int line, struct s3c2410_dma_chan *chan, |
116 | struct s3c2410_dma_regstate *regs) | 116 | struct s3c2410_dma_regstate *regs) |
117 | { | 117 | { |
118 | printk(KERN_DEBUG "dma%d: %s:%d: DCSRC=%08lx, DISRC=%08lx, DSTAT=%08lx DMT=%02lx, DCON=%08lx\n", | 118 | printk(KERN_DEBUG "dma%d: %s:%d: DCSRC=%08lx, DISRC=%08lx, DSTAT=%08lx DMT=%02lx, DCON=%08lx\n", |
@@ -122,7 +122,7 @@ dmadbg_showregs(const char *fname, int line, s3c2410_dma_chan_t *chan, | |||
122 | } | 122 | } |
123 | 123 | ||
124 | static void | 124 | static void |
125 | dmadbg_showchan(const char *fname, int line, s3c2410_dma_chan_t *chan) | 125 | dmadbg_showchan(const char *fname, int line, struct s3c2410_dma_chan *chan) |
126 | { | 126 | { |
127 | struct s3c2410_dma_regstate state; | 127 | struct s3c2410_dma_regstate state; |
128 | 128 | ||
@@ -132,7 +132,16 @@ dmadbg_showchan(const char *fname, int line, s3c2410_dma_chan_t *chan) | |||
132 | chan->number, fname, line, chan->load_state, | 132 | chan->number, fname, line, chan->load_state, |
133 | chan->curr, chan->next, chan->end); | 133 | chan->curr, chan->next, chan->end); |
134 | 134 | ||
135 | dmadbg_showregs(fname, line, chan, &state); | 135 | dmadbg_dumpregs(fname, line, chan, &state); |
136 | } | ||
137 | |||
138 | static void | ||
139 | dmadbg_showregs(const char *fname, int line, struct s3c2410_dma_chan *chan) | ||
140 | { | ||
141 | struct s3c2410_dma_regstate state; | ||
142 | |||
143 | dmadbg_capture(chan, &state); | ||
144 | dmadbg_dumpregs(fname, line, chan, &state); | ||
136 | } | 145 | } |
137 | 146 | ||
138 | #define dbg_showregs(chan) dmadbg_showregs(__FUNCTION__, __LINE__, (chan)) | 147 | #define dbg_showregs(chan) dmadbg_showregs(__FUNCTION__, __LINE__, (chan)) |
@@ -155,7 +164,7 @@ dmadbg_showchan(const char *fname, int line, s3c2410_dma_chan_t *chan) | |||
155 | */ | 164 | */ |
156 | 165 | ||
157 | static void | 166 | static void |
158 | s3c2410_dma_stats_timeout(s3c2410_dma_stats_t *stats, int val) | 167 | s3c2410_dma_stats_timeout(struct s3c2410_dma_stats *stats, int val) |
159 | { | 168 | { |
160 | if (stats == NULL) | 169 | if (stats == NULL) |
161 | return; | 170 | return; |
@@ -174,7 +183,7 @@ s3c2410_dma_stats_timeout(s3c2410_dma_stats_t *stats, int val) | |||
174 | */ | 183 | */ |
175 | 184 | ||
176 | static int | 185 | static int |
177 | s3c2410_dma_waitforload(s3c2410_dma_chan_t *chan, int line) | 186 | s3c2410_dma_waitforload(struct s3c2410_dma_chan *chan, int line) |
178 | { | 187 | { |
179 | int timeout = chan->load_timeout; | 188 | int timeout = chan->load_timeout; |
180 | int took; | 189 | int took; |
@@ -221,8 +230,8 @@ s3c2410_dma_waitforload(s3c2410_dma_chan_t *chan, int line) | |||
221 | */ | 230 | */ |
222 | 231 | ||
223 | static inline int | 232 | static inline int |
224 | s3c2410_dma_loadbuffer(s3c2410_dma_chan_t *chan, | 233 | s3c2410_dma_loadbuffer(struct s3c2410_dma_chan *chan, |
225 | s3c2410_dma_buf_t *buf) | 234 | struct s3c2410_dma_buf *buf) |
226 | { | 235 | { |
227 | unsigned long reload; | 236 | unsigned long reload; |
228 | 237 | ||
@@ -253,10 +262,14 @@ s3c2410_dma_loadbuffer(s3c2410_dma_chan_t *chan, | |||
253 | buf->next); | 262 | buf->next); |
254 | reload = (buf->next == NULL) ? S3C2410_DCON_NORELOAD : 0; | 263 | reload = (buf->next == NULL) ? S3C2410_DCON_NORELOAD : 0; |
255 | } else { | 264 | } else { |
256 | pr_debug("load_state is %d => autoreload\n", chan->load_state); | 265 | //pr_debug("load_state is %d => autoreload\n", chan->load_state); |
257 | reload = S3C2410_DCON_AUTORELOAD; | 266 | reload = S3C2410_DCON_AUTORELOAD; |
258 | } | 267 | } |
259 | 268 | ||
269 | if ((buf->data & 0xf0000000) != 0x30000000) { | ||
270 | dmawarn("dmaload: buffer is %p\n", (void *)buf->data); | ||
271 | } | ||
272 | |||
260 | writel(buf->data, chan->addr_reg); | 273 | writel(buf->data, chan->addr_reg); |
261 | 274 | ||
262 | dma_wrreg(chan, S3C2410_DMA_DCON, | 275 | dma_wrreg(chan, S3C2410_DMA_DCON, |
@@ -291,7 +304,7 @@ s3c2410_dma_loadbuffer(s3c2410_dma_chan_t *chan, | |||
291 | */ | 304 | */ |
292 | 305 | ||
293 | static void | 306 | static void |
294 | s3c2410_dma_call_op(s3c2410_dma_chan_t *chan, s3c2410_chan_op_t op) | 307 | s3c2410_dma_call_op(struct s3c2410_dma_chan *chan, enum s3c2410_chan_op op) |
295 | { | 308 | { |
296 | if (chan->op_fn != NULL) { | 309 | if (chan->op_fn != NULL) { |
297 | (chan->op_fn)(chan, op); | 310 | (chan->op_fn)(chan, op); |
@@ -305,8 +318,8 @@ s3c2410_dma_call_op(s3c2410_dma_chan_t *chan, s3c2410_chan_op_t op) | |||
305 | */ | 318 | */ |
306 | 319 | ||
307 | static inline void | 320 | static inline void |
308 | s3c2410_dma_buffdone(s3c2410_dma_chan_t *chan, s3c2410_dma_buf_t *buf, | 321 | s3c2410_dma_buffdone(struct s3c2410_dma_chan *chan, struct s3c2410_dma_buf *buf, |
309 | s3c2410_dma_buffresult_t result) | 322 | enum s3c2410_dma_buffresult result) |
310 | { | 323 | { |
311 | pr_debug("callback_fn=%p, buf=%p, id=%p, size=%d, result=%d\n", | 324 | pr_debug("callback_fn=%p, buf=%p, id=%p, size=%d, result=%d\n", |
312 | chan->callback_fn, buf, buf->id, buf->size, result); | 325 | chan->callback_fn, buf, buf->id, buf->size, result); |
@@ -321,7 +334,7 @@ s3c2410_dma_buffdone(s3c2410_dma_chan_t *chan, s3c2410_dma_buf_t *buf, | |||
321 | * start a dma channel going | 334 | * start a dma channel going |
322 | */ | 335 | */ |
323 | 336 | ||
324 | static int s3c2410_dma_start(s3c2410_dma_chan_t *chan) | 337 | static int s3c2410_dma_start(struct s3c2410_dma_chan *chan) |
325 | { | 338 | { |
326 | unsigned long tmp; | 339 | unsigned long tmp; |
327 | unsigned long flags; | 340 | unsigned long flags; |
@@ -370,7 +383,7 @@ static int s3c2410_dma_start(s3c2410_dma_chan_t *chan) | |||
370 | tmp |= S3C2410_DMASKTRIG_ON; | 383 | tmp |= S3C2410_DMASKTRIG_ON; |
371 | dma_wrreg(chan, S3C2410_DMA_DMASKTRIG, tmp); | 384 | dma_wrreg(chan, S3C2410_DMA_DMASKTRIG, tmp); |
372 | 385 | ||
373 | pr_debug("wrote %08lx to DMASKTRIG\n", tmp); | 386 | pr_debug("dma%d: %08lx to DMASKTRIG\n", chan->number, tmp); |
374 | 387 | ||
375 | #if 0 | 388 | #if 0 |
376 | /* the dma buffer loads should take care of clearing the AUTO | 389 | /* the dma buffer loads should take care of clearing the AUTO |
@@ -384,7 +397,30 @@ static int s3c2410_dma_start(s3c2410_dma_chan_t *chan) | |||
384 | 397 | ||
385 | dbg_showchan(chan); | 398 | dbg_showchan(chan); |
386 | 399 | ||
400 | /* if we've only loaded one buffer onto the channel, then chec | ||
401 | * to see if we have another, and if so, try and load it so when | ||
402 | * the first buffer is finished, the new one will be loaded onto | ||
403 | * the channel */ | ||
404 | |||
405 | if (chan->next != NULL) { | ||
406 | if (chan->load_state == S3C2410_DMALOAD_1LOADED) { | ||
407 | |||
408 | if (s3c2410_dma_waitforload(chan, __LINE__) == 0) { | ||
409 | pr_debug("%s: buff not yet loaded, no more todo\n", | ||
410 | __FUNCTION__); | ||
411 | } else { | ||
412 | chan->load_state = S3C2410_DMALOAD_1RUNNING; | ||
413 | s3c2410_dma_loadbuffer(chan, chan->next); | ||
414 | } | ||
415 | |||
416 | } else if (chan->load_state == S3C2410_DMALOAD_1RUNNING) { | ||
417 | s3c2410_dma_loadbuffer(chan, chan->next); | ||
418 | } | ||
419 | } | ||
420 | |||
421 | |||
387 | local_irq_restore(flags); | 422 | local_irq_restore(flags); |
423 | |||
388 | return 0; | 424 | return 0; |
389 | } | 425 | } |
390 | 426 | ||
@@ -394,7 +430,7 @@ static int s3c2410_dma_start(s3c2410_dma_chan_t *chan) | |||
394 | */ | 430 | */ |
395 | 431 | ||
396 | static int | 432 | static int |
397 | s3c2410_dma_canload(s3c2410_dma_chan_t *chan) | 433 | s3c2410_dma_canload(struct s3c2410_dma_chan *chan) |
398 | { | 434 | { |
399 | if (chan->load_state == S3C2410_DMALOAD_NONE || | 435 | if (chan->load_state == S3C2410_DMALOAD_NONE || |
400 | chan->load_state == S3C2410_DMALOAD_1RUNNING) | 436 | chan->load_state == S3C2410_DMALOAD_1RUNNING) |
@@ -424,8 +460,8 @@ s3c2410_dma_canload(s3c2410_dma_chan_t *chan) | |||
424 | int s3c2410_dma_enqueue(unsigned int channel, void *id, | 460 | int s3c2410_dma_enqueue(unsigned int channel, void *id, |
425 | dma_addr_t data, int size) | 461 | dma_addr_t data, int size) |
426 | { | 462 | { |
427 | s3c2410_dma_chan_t *chan = &s3c2410_chans[channel]; | 463 | struct s3c2410_dma_chan *chan = &s3c2410_chans[channel]; |
428 | s3c2410_dma_buf_t *buf; | 464 | struct s3c2410_dma_buf *buf; |
429 | unsigned long flags; | 465 | unsigned long flags; |
430 | 466 | ||
431 | check_channel(channel); | 467 | check_channel(channel); |
@@ -436,12 +472,11 @@ int s3c2410_dma_enqueue(unsigned int channel, void *id, | |||
436 | buf = kmem_cache_alloc(dma_kmem, GFP_ATOMIC); | 472 | buf = kmem_cache_alloc(dma_kmem, GFP_ATOMIC); |
437 | if (buf == NULL) { | 473 | if (buf == NULL) { |
438 | pr_debug("%s: out of memory (%ld alloc)\n", | 474 | pr_debug("%s: out of memory (%ld alloc)\n", |
439 | __FUNCTION__, sizeof(*buf)); | 475 | __FUNCTION__, (long)sizeof(*buf)); |
440 | return -ENOMEM; | 476 | return -ENOMEM; |
441 | } | 477 | } |
442 | 478 | ||
443 | pr_debug("%s: new buffer %p\n", __FUNCTION__, buf); | 479 | //pr_debug("%s: new buffer %p\n", __FUNCTION__, buf); |
444 | |||
445 | //dbg_showchan(chan); | 480 | //dbg_showchan(chan); |
446 | 481 | ||
447 | buf->next = NULL; | 482 | buf->next = NULL; |
@@ -505,7 +540,7 @@ int s3c2410_dma_enqueue(unsigned int channel, void *id, | |||
505 | EXPORT_SYMBOL(s3c2410_dma_enqueue); | 540 | EXPORT_SYMBOL(s3c2410_dma_enqueue); |
506 | 541 | ||
507 | static inline void | 542 | static inline void |
508 | s3c2410_dma_freebuf(s3c2410_dma_buf_t *buf) | 543 | s3c2410_dma_freebuf(struct s3c2410_dma_buf *buf) |
509 | { | 544 | { |
510 | int magicok = (buf->magic == BUF_MAGIC); | 545 | int magicok = (buf->magic == BUF_MAGIC); |
511 | 546 | ||
@@ -525,7 +560,7 @@ s3c2410_dma_freebuf(s3c2410_dma_buf_t *buf) | |||
525 | */ | 560 | */ |
526 | 561 | ||
527 | static inline void | 562 | static inline void |
528 | s3c2410_dma_lastxfer(s3c2410_dma_chan_t *chan) | 563 | s3c2410_dma_lastxfer(struct s3c2410_dma_chan *chan) |
529 | { | 564 | { |
530 | pr_debug("dma%d: s3c2410_dma_lastxfer: load_state %d\n", | 565 | pr_debug("dma%d: s3c2410_dma_lastxfer: load_state %d\n", |
531 | chan->number, chan->load_state); | 566 | chan->number, chan->load_state); |
@@ -537,14 +572,20 @@ s3c2410_dma_lastxfer(s3c2410_dma_chan_t *chan) | |||
537 | case S3C2410_DMALOAD_1LOADED: | 572 | case S3C2410_DMALOAD_1LOADED: |
538 | if (s3c2410_dma_waitforload(chan, __LINE__) == 0) { | 573 | if (s3c2410_dma_waitforload(chan, __LINE__) == 0) { |
539 | /* flag error? */ | 574 | /* flag error? */ |
540 | printk(KERN_ERR "dma%d: timeout waiting for load\n", | 575 | printk(KERN_ERR "dma%d: timeout waiting for load (%s)\n", |
541 | chan->number); | 576 | chan->number, __FUNCTION__); |
542 | return; | 577 | return; |
543 | } | 578 | } |
544 | break; | 579 | break; |
545 | 580 | ||
581 | case S3C2410_DMALOAD_1LOADED_1RUNNING: | ||
582 | /* I belive in this case we do not have anything to do | ||
583 | * until the next buffer comes along, and we turn off the | ||
584 | * reload */ | ||
585 | return; | ||
586 | |||
546 | default: | 587 | default: |
547 | pr_debug("dma%d: lastxfer: unhandled load_state %d with no next", | 588 | pr_debug("dma%d: lastxfer: unhandled load_state %d with no next\n", |
548 | chan->number, chan->load_state); | 589 | chan->number, chan->load_state); |
549 | return; | 590 | return; |
550 | 591 | ||
@@ -560,8 +601,8 @@ s3c2410_dma_lastxfer(s3c2410_dma_chan_t *chan) | |||
560 | static irqreturn_t | 601 | static irqreturn_t |
561 | s3c2410_dma_irq(int irq, void *devpw, struct pt_regs *regs) | 602 | s3c2410_dma_irq(int irq, void *devpw, struct pt_regs *regs) |
562 | { | 603 | { |
563 | s3c2410_dma_chan_t *chan = (s3c2410_dma_chan_t *)devpw; | 604 | struct s3c2410_dma_chan *chan = (struct s3c2410_dma_chan *)devpw; |
564 | s3c2410_dma_buf_t *buf; | 605 | struct s3c2410_dma_buf *buf; |
565 | 606 | ||
566 | buf = chan->curr; | 607 | buf = chan->curr; |
567 | 608 | ||
@@ -629,7 +670,14 @@ s3c2410_dma_irq(int irq, void *devpw, struct pt_regs *regs) | |||
629 | } else { | 670 | } else { |
630 | } | 671 | } |
631 | 672 | ||
632 | if (chan->next != NULL) { | 673 | /* only reload if the channel is still running... our buffer done |
674 | * routine may have altered the state by requesting the dma channel | ||
675 | * to stop or shutdown... */ | ||
676 | |||
677 | /* todo: check that when the channel is shut-down from inside this | ||
678 | * function, we cope with unsetting reload, etc */ | ||
679 | |||
680 | if (chan->next != NULL && chan->state != S3C2410_DMA_IDLE) { | ||
633 | unsigned long flags; | 681 | unsigned long flags; |
634 | 682 | ||
635 | switch (chan->load_state) { | 683 | switch (chan->load_state) { |
@@ -644,8 +692,8 @@ s3c2410_dma_irq(int irq, void *devpw, struct pt_regs *regs) | |||
644 | case S3C2410_DMALOAD_1LOADED: | 692 | case S3C2410_DMALOAD_1LOADED: |
645 | if (s3c2410_dma_waitforload(chan, __LINE__) == 0) { | 693 | if (s3c2410_dma_waitforload(chan, __LINE__) == 0) { |
646 | /* flag error? */ | 694 | /* flag error? */ |
647 | printk(KERN_ERR "dma%d: timeout waiting for load\n", | 695 | printk(KERN_ERR "dma%d: timeout waiting for load (%s)\n", |
648 | chan->number); | 696 | chan->number, __FUNCTION__); |
649 | return IRQ_HANDLED; | 697 | return IRQ_HANDLED; |
650 | } | 698 | } |
651 | 699 | ||
@@ -678,17 +726,15 @@ s3c2410_dma_irq(int irq, void *devpw, struct pt_regs *regs) | |||
678 | return IRQ_HANDLED; | 726 | return IRQ_HANDLED; |
679 | } | 727 | } |
680 | 728 | ||
681 | |||
682 | |||
683 | /* s3c2410_request_dma | 729 | /* s3c2410_request_dma |
684 | * | 730 | * |
685 | * get control of an dma channel | 731 | * get control of an dma channel |
686 | */ | 732 | */ |
687 | 733 | ||
688 | int s3c2410_dma_request(unsigned int channel, s3c2410_dma_client_t *client, | 734 | int s3c2410_dma_request(unsigned int channel, struct s3c2410_dma_client *client, |
689 | void *dev) | 735 | void *dev) |
690 | { | 736 | { |
691 | s3c2410_dma_chan_t *chan = &s3c2410_chans[channel]; | 737 | struct s3c2410_dma_chan *chan = &s3c2410_chans[channel]; |
692 | unsigned long flags; | 738 | unsigned long flags; |
693 | int err; | 739 | int err; |
694 | 740 | ||
@@ -718,11 +764,17 @@ int s3c2410_dma_request(unsigned int channel, s3c2410_dma_client_t *client, | |||
718 | pr_debug("dma%d: %s : requesting irq %d\n", | 764 | pr_debug("dma%d: %s : requesting irq %d\n", |
719 | channel, __FUNCTION__, chan->irq); | 765 | channel, __FUNCTION__, chan->irq); |
720 | 766 | ||
767 | chan->irq_claimed = 1; | ||
768 | local_irq_restore(flags); | ||
769 | |||
721 | err = request_irq(chan->irq, s3c2410_dma_irq, IRQF_DISABLED, | 770 | err = request_irq(chan->irq, s3c2410_dma_irq, IRQF_DISABLED, |
722 | client->name, (void *)chan); | 771 | client->name, (void *)chan); |
723 | 772 | ||
773 | local_irq_save(flags); | ||
774 | |||
724 | if (err) { | 775 | if (err) { |
725 | chan->in_use = 0; | 776 | chan->in_use = 0; |
777 | chan->irq_claimed = 0; | ||
726 | local_irq_restore(flags); | 778 | local_irq_restore(flags); |
727 | 779 | ||
728 | printk(KERN_ERR "%s: cannot get IRQ %d for DMA %d\n", | 780 | printk(KERN_ERR "%s: cannot get IRQ %d for DMA %d\n", |
@@ -730,7 +782,6 @@ int s3c2410_dma_request(unsigned int channel, s3c2410_dma_client_t *client, | |||
730 | return err; | 782 | return err; |
731 | } | 783 | } |
732 | 784 | ||
733 | chan->irq_claimed = 1; | ||
734 | chan->irq_enabled = 1; | 785 | chan->irq_enabled = 1; |
735 | } | 786 | } |
736 | 787 | ||
@@ -756,9 +807,9 @@ EXPORT_SYMBOL(s3c2410_dma_request); | |||
756 | * allowed to go through. | 807 | * allowed to go through. |
757 | */ | 808 | */ |
758 | 809 | ||
759 | int s3c2410_dma_free(dmach_t channel, s3c2410_dma_client_t *client) | 810 | int s3c2410_dma_free(dmach_t channel, struct s3c2410_dma_client *client) |
760 | { | 811 | { |
761 | s3c2410_dma_chan_t *chan = &s3c2410_chans[channel]; | 812 | struct s3c2410_dma_chan *chan = &s3c2410_chans[channel]; |
762 | unsigned long flags; | 813 | unsigned long flags; |
763 | 814 | ||
764 | check_channel(channel); | 815 | check_channel(channel); |
@@ -795,7 +846,7 @@ int s3c2410_dma_free(dmach_t channel, s3c2410_dma_client_t *client) | |||
795 | 846 | ||
796 | EXPORT_SYMBOL(s3c2410_dma_free); | 847 | EXPORT_SYMBOL(s3c2410_dma_free); |
797 | 848 | ||
798 | static int s3c2410_dma_dostop(s3c2410_dma_chan_t *chan) | 849 | static int s3c2410_dma_dostop(struct s3c2410_dma_chan *chan) |
799 | { | 850 | { |
800 | unsigned long tmp; | 851 | unsigned long tmp; |
801 | unsigned long flags; | 852 | unsigned long flags; |
@@ -810,6 +861,7 @@ static int s3c2410_dma_dostop(s3c2410_dma_chan_t *chan) | |||
810 | 861 | ||
811 | tmp = dma_rdreg(chan, S3C2410_DMA_DMASKTRIG); | 862 | tmp = dma_rdreg(chan, S3C2410_DMA_DMASKTRIG); |
812 | tmp |= S3C2410_DMASKTRIG_STOP; | 863 | tmp |= S3C2410_DMASKTRIG_STOP; |
864 | //tmp &= ~S3C2410_DMASKTRIG_ON; | ||
813 | dma_wrreg(chan, S3C2410_DMA_DMASKTRIG, tmp); | 865 | dma_wrreg(chan, S3C2410_DMA_DMASKTRIG, tmp); |
814 | 866 | ||
815 | #if 0 | 867 | #if 0 |
@@ -819,6 +871,7 @@ static int s3c2410_dma_dostop(s3c2410_dma_chan_t *chan) | |||
819 | dma_wrreg(chan, S3C2410_DMA_DCON, tmp); | 871 | dma_wrreg(chan, S3C2410_DMA_DCON, tmp); |
820 | #endif | 872 | #endif |
821 | 873 | ||
874 | /* should stop do this, or should we wait for flush? */ | ||
822 | chan->state = S3C2410_DMA_IDLE; | 875 | chan->state = S3C2410_DMA_IDLE; |
823 | chan->load_state = S3C2410_DMALOAD_NONE; | 876 | chan->load_state = S3C2410_DMALOAD_NONE; |
824 | 877 | ||
@@ -827,17 +880,35 @@ static int s3c2410_dma_dostop(s3c2410_dma_chan_t *chan) | |||
827 | return 0; | 880 | return 0; |
828 | } | 881 | } |
829 | 882 | ||
883 | void s3c2410_dma_waitforstop(struct s3c2410_dma_chan *chan) | ||
884 | { | ||
885 | unsigned long tmp; | ||
886 | unsigned int timeout = 0x10000; | ||
887 | |||
888 | while (timeout-- > 0) { | ||
889 | tmp = dma_rdreg(chan, S3C2410_DMA_DMASKTRIG); | ||
890 | |||
891 | if (!(tmp & S3C2410_DMASKTRIG_ON)) | ||
892 | return; | ||
893 | } | ||
894 | |||
895 | pr_debug("dma%d: failed to stop?\n", chan->number); | ||
896 | } | ||
897 | |||
898 | |||
830 | /* s3c2410_dma_flush | 899 | /* s3c2410_dma_flush |
831 | * | 900 | * |
832 | * stop the channel, and remove all current and pending transfers | 901 | * stop the channel, and remove all current and pending transfers |
833 | */ | 902 | */ |
834 | 903 | ||
835 | static int s3c2410_dma_flush(s3c2410_dma_chan_t *chan) | 904 | static int s3c2410_dma_flush(struct s3c2410_dma_chan *chan) |
836 | { | 905 | { |
837 | s3c2410_dma_buf_t *buf, *next; | 906 | struct s3c2410_dma_buf *buf, *next; |
838 | unsigned long flags; | 907 | unsigned long flags; |
839 | 908 | ||
840 | pr_debug("%s:\n", __FUNCTION__); | 909 | pr_debug("%s: chan %p (%d)\n", __FUNCTION__, chan, chan->number); |
910 | |||
911 | dbg_showchan(chan); | ||
841 | 912 | ||
842 | local_irq_save(flags); | 913 | local_irq_save(flags); |
843 | 914 | ||
@@ -864,16 +935,69 @@ static int s3c2410_dma_flush(s3c2410_dma_chan_t *chan) | |||
864 | } | 935 | } |
865 | } | 936 | } |
866 | 937 | ||
938 | dbg_showregs(chan); | ||
939 | |||
940 | s3c2410_dma_waitforstop(chan); | ||
941 | |||
942 | #if 0 | ||
943 | /* should also clear interrupts, according to WinCE BSP */ | ||
944 | { | ||
945 | unsigned long tmp; | ||
946 | |||
947 | tmp = dma_rdreg(chan, S3C2410_DMA_DCON); | ||
948 | tmp |= S3C2410_DCON_NORELOAD; | ||
949 | dma_wrreg(chan, S3C2410_DMA_DCON, tmp); | ||
950 | } | ||
951 | #endif | ||
952 | |||
953 | dbg_showregs(chan); | ||
954 | |||
867 | local_irq_restore(flags); | 955 | local_irq_restore(flags); |
868 | 956 | ||
869 | return 0; | 957 | return 0; |
870 | } | 958 | } |
871 | 959 | ||
960 | int | ||
961 | s3c2410_dma_started(struct s3c2410_dma_chan *chan) | ||
962 | { | ||
963 | unsigned long flags; | ||
964 | |||
965 | local_irq_save(flags); | ||
966 | |||
967 | dbg_showchan(chan); | ||
968 | |||
969 | /* if we've only loaded one buffer onto the channel, then chec | ||
970 | * to see if we have another, and if so, try and load it so when | ||
971 | * the first buffer is finished, the new one will be loaded onto | ||
972 | * the channel */ | ||
973 | |||
974 | if (chan->next != NULL) { | ||
975 | if (chan->load_state == S3C2410_DMALOAD_1LOADED) { | ||
976 | |||
977 | if (s3c2410_dma_waitforload(chan, __LINE__) == 0) { | ||
978 | pr_debug("%s: buff not yet loaded, no more todo\n", | ||
979 | __FUNCTION__); | ||
980 | } else { | ||
981 | chan->load_state = S3C2410_DMALOAD_1RUNNING; | ||
982 | s3c2410_dma_loadbuffer(chan, chan->next); | ||
983 | } | ||
984 | |||
985 | } else if (chan->load_state == S3C2410_DMALOAD_1RUNNING) { | ||
986 | s3c2410_dma_loadbuffer(chan, chan->next); | ||
987 | } | ||
988 | } | ||
989 | |||
990 | |||
991 | local_irq_restore(flags); | ||
992 | |||
993 | return 0; | ||
994 | |||
995 | } | ||
872 | 996 | ||
873 | int | 997 | int |
874 | s3c2410_dma_ctrl(dmach_t channel, s3c2410_chan_op_t op) | 998 | s3c2410_dma_ctrl(dmach_t channel, enum s3c2410_chan_op op) |
875 | { | 999 | { |
876 | s3c2410_dma_chan_t *chan = &s3c2410_chans[channel]; | 1000 | struct s3c2410_dma_chan *chan = &s3c2410_chans[channel]; |
877 | 1001 | ||
878 | check_channel(channel); | 1002 | check_channel(channel); |
879 | 1003 | ||
@@ -885,14 +1009,15 @@ s3c2410_dma_ctrl(dmach_t channel, s3c2410_chan_op_t op) | |||
885 | return s3c2410_dma_dostop(chan); | 1009 | return s3c2410_dma_dostop(chan); |
886 | 1010 | ||
887 | case S3C2410_DMAOP_PAUSE: | 1011 | case S3C2410_DMAOP_PAUSE: |
888 | return -ENOENT; | ||
889 | |||
890 | case S3C2410_DMAOP_RESUME: | 1012 | case S3C2410_DMAOP_RESUME: |
891 | return -ENOENT; | 1013 | return -ENOENT; |
892 | 1014 | ||
893 | case S3C2410_DMAOP_FLUSH: | 1015 | case S3C2410_DMAOP_FLUSH: |
894 | return s3c2410_dma_flush(chan); | 1016 | return s3c2410_dma_flush(chan); |
895 | 1017 | ||
1018 | case S3C2410_DMAOP_STARTED: | ||
1019 | return s3c2410_dma_started(chan); | ||
1020 | |||
896 | case S3C2410_DMAOP_TIMEOUT: | 1021 | case S3C2410_DMAOP_TIMEOUT: |
897 | return 0; | 1022 | return 0; |
898 | 1023 | ||
@@ -921,7 +1046,7 @@ int s3c2410_dma_config(dmach_t channel, | |||
921 | int xferunit, | 1046 | int xferunit, |
922 | int dcon) | 1047 | int dcon) |
923 | { | 1048 | { |
924 | s3c2410_dma_chan_t *chan = &s3c2410_chans[channel]; | 1049 | struct s3c2410_dma_chan *chan = &s3c2410_chans[channel]; |
925 | 1050 | ||
926 | pr_debug("%s: chan=%d, xfer_unit=%d, dcon=%08x\n", | 1051 | pr_debug("%s: chan=%d, xfer_unit=%d, dcon=%08x\n", |
927 | __FUNCTION__, channel, xferunit, dcon); | 1052 | __FUNCTION__, channel, xferunit, dcon); |
@@ -961,7 +1086,7 @@ EXPORT_SYMBOL(s3c2410_dma_config); | |||
961 | 1086 | ||
962 | int s3c2410_dma_setflags(dmach_t channel, unsigned int flags) | 1087 | int s3c2410_dma_setflags(dmach_t channel, unsigned int flags) |
963 | { | 1088 | { |
964 | s3c2410_dma_chan_t *chan = &s3c2410_chans[channel]; | 1089 | struct s3c2410_dma_chan *chan = &s3c2410_chans[channel]; |
965 | 1090 | ||
966 | check_channel(channel); | 1091 | check_channel(channel); |
967 | 1092 | ||
@@ -981,7 +1106,7 @@ EXPORT_SYMBOL(s3c2410_dma_setflags); | |||
981 | 1106 | ||
982 | int s3c2410_dma_set_opfn(dmach_t channel, s3c2410_dma_opfn_t rtn) | 1107 | int s3c2410_dma_set_opfn(dmach_t channel, s3c2410_dma_opfn_t rtn) |
983 | { | 1108 | { |
984 | s3c2410_dma_chan_t *chan = &s3c2410_chans[channel]; | 1109 | struct s3c2410_dma_chan *chan = &s3c2410_chans[channel]; |
985 | 1110 | ||
986 | check_channel(channel); | 1111 | check_channel(channel); |
987 | 1112 | ||
@@ -996,7 +1121,7 @@ EXPORT_SYMBOL(s3c2410_dma_set_opfn); | |||
996 | 1121 | ||
997 | int s3c2410_dma_set_buffdone_fn(dmach_t channel, s3c2410_dma_cbfn_t rtn) | 1122 | int s3c2410_dma_set_buffdone_fn(dmach_t channel, s3c2410_dma_cbfn_t rtn) |
998 | { | 1123 | { |
999 | s3c2410_dma_chan_t *chan = &s3c2410_chans[channel]; | 1124 | struct s3c2410_dma_chan *chan = &s3c2410_chans[channel]; |
1000 | 1125 | ||
1001 | check_channel(channel); | 1126 | check_channel(channel); |
1002 | 1127 | ||
@@ -1024,11 +1149,11 @@ EXPORT_SYMBOL(s3c2410_dma_set_buffdone_fn); | |||
1024 | */ | 1149 | */ |
1025 | 1150 | ||
1026 | int s3c2410_dma_devconfig(int channel, | 1151 | int s3c2410_dma_devconfig(int channel, |
1027 | s3c2410_dmasrc_t source, | 1152 | enum s3c2410_dmasrc source, |
1028 | int hwcfg, | 1153 | int hwcfg, |
1029 | unsigned long devaddr) | 1154 | unsigned long devaddr) |
1030 | { | 1155 | { |
1031 | s3c2410_dma_chan_t *chan = &s3c2410_chans[channel]; | 1156 | struct s3c2410_dma_chan *chan = &s3c2410_chans[channel]; |
1032 | 1157 | ||
1033 | check_channel(channel); | 1158 | check_channel(channel); |
1034 | 1159 | ||
@@ -1075,7 +1200,7 @@ EXPORT_SYMBOL(s3c2410_dma_devconfig); | |||
1075 | 1200 | ||
1076 | int s3c2410_dma_getposition(dmach_t channel, dma_addr_t *src, dma_addr_t *dst) | 1201 | int s3c2410_dma_getposition(dmach_t channel, dma_addr_t *src, dma_addr_t *dst) |
1077 | { | 1202 | { |
1078 | s3c2410_dma_chan_t *chan = &s3c2410_chans[channel]; | 1203 | struct s3c2410_dma_chan *chan = &s3c2410_chans[channel]; |
1079 | 1204 | ||
1080 | check_channel(channel); | 1205 | check_channel(channel); |
1081 | 1206 | ||
@@ -1097,7 +1222,7 @@ EXPORT_SYMBOL(s3c2410_dma_getposition); | |||
1097 | 1222 | ||
1098 | static int s3c2410_dma_suspend(struct sys_device *dev, pm_message_t state) | 1223 | static int s3c2410_dma_suspend(struct sys_device *dev, pm_message_t state) |
1099 | { | 1224 | { |
1100 | s3c2410_dma_chan_t *cp = container_of(dev, s3c2410_dma_chan_t, dev); | 1225 | struct s3c2410_dma_chan *cp = container_of(dev, struct s3c2410_dma_chan, dev); |
1101 | 1226 | ||
1102 | printk(KERN_DEBUG "suspending dma channel %d\n", cp->number); | 1227 | printk(KERN_DEBUG "suspending dma channel %d\n", cp->number); |
1103 | 1228 | ||
@@ -1137,7 +1262,7 @@ static struct sysdev_class dma_sysclass = { | |||
1137 | 1262 | ||
1138 | static void s3c2410_dma_cache_ctor(void *p, kmem_cache_t *c, unsigned long f) | 1263 | static void s3c2410_dma_cache_ctor(void *p, kmem_cache_t *c, unsigned long f) |
1139 | { | 1264 | { |
1140 | memset(p, 0, sizeof(s3c2410_dma_buf_t)); | 1265 | memset(p, 0, sizeof(struct s3c2410_dma_buf)); |
1141 | } | 1266 | } |
1142 | 1267 | ||
1143 | 1268 | ||
@@ -1145,7 +1270,7 @@ static void s3c2410_dma_cache_ctor(void *p, kmem_cache_t *c, unsigned long f) | |||
1145 | 1270 | ||
1146 | static int __init s3c2410_init_dma(void) | 1271 | static int __init s3c2410_init_dma(void) |
1147 | { | 1272 | { |
1148 | s3c2410_dma_chan_t *cp; | 1273 | struct s3c2410_dma_chan *cp; |
1149 | int channel; | 1274 | int channel; |
1150 | int ret; | 1275 | int ret; |
1151 | 1276 | ||
@@ -1163,7 +1288,7 @@ static int __init s3c2410_init_dma(void) | |||
1163 | goto err; | 1288 | goto err; |
1164 | } | 1289 | } |
1165 | 1290 | ||
1166 | dma_kmem = kmem_cache_create("dma_desc", sizeof(s3c2410_dma_buf_t), 0, | 1291 | dma_kmem = kmem_cache_create("dma_desc", sizeof(struct s3c2410_dma_buf), 0, |
1167 | SLAB_HWCACHE_ALIGN, | 1292 | SLAB_HWCACHE_ALIGN, |
1168 | s3c2410_dma_cache_ctor, NULL); | 1293 | s3c2410_dma_cache_ctor, NULL); |
1169 | 1294 | ||
@@ -1176,7 +1301,7 @@ static int __init s3c2410_init_dma(void) | |||
1176 | for (channel = 0; channel < S3C2410_DMA_CHANNELS; channel++) { | 1301 | for (channel = 0; channel < S3C2410_DMA_CHANNELS; channel++) { |
1177 | cp = &s3c2410_chans[channel]; | 1302 | cp = &s3c2410_chans[channel]; |
1178 | 1303 | ||
1179 | memset(cp, 0, sizeof(s3c2410_dma_chan_t)); | 1304 | memset(cp, 0, sizeof(struct s3c2410_dma_chan)); |
1180 | 1305 | ||
1181 | /* dma channel irqs are in order.. */ | 1306 | /* dma channel irqs are in order.. */ |
1182 | cp->number = channel; | 1307 | cp->number = channel; |
diff --git a/arch/arm/mach-s3c2410/mach-anubis.c b/arch/arm/mach-s3c2410/mach-anubis.c index 4a92d6f92d6b..60641d452db3 100644 --- a/arch/arm/mach-s3c2410/mach-anubis.c +++ b/arch/arm/mach-s3c2410/mach-anubis.c | |||
@@ -60,11 +60,12 @@ static struct map_desc anubis_iodesc[] __initdata = { | |||
60 | .virtual = (u32)S3C24XX_VA_ISA_BYTE, | 60 | .virtual = (u32)S3C24XX_VA_ISA_BYTE, |
61 | .pfn = __phys_to_pfn(0x0), | 61 | .pfn = __phys_to_pfn(0x0), |
62 | .length = SZ_4M, | 62 | .length = SZ_4M, |
63 | .type = MT_DEVICE | 63 | .type = MT_DEVICE, |
64 | }, { | 64 | }, { |
65 | .virtual = (u32)S3C24XX_VA_ISA_WORD, | 65 | .virtual = (u32)S3C24XX_VA_ISA_WORD, |
66 | .pfn = __phys_to_pfn(0x0), | 66 | .pfn = __phys_to_pfn(0x0), |
67 | .length = SZ_4M, MT_DEVICE | 67 | .length = SZ_4M, |
68 | .type = MT_DEVICE, | ||
68 | }, | 69 | }, |
69 | 70 | ||
70 | /* we could possibly compress the next set down into a set of smaller tables | 71 | /* we could possibly compress the next set down into a set of smaller tables |
@@ -78,36 +79,12 @@ static struct map_desc anubis_iodesc[] __initdata = { | |||
78 | .virtual = (u32)ANUBIS_VA_CTRL1, | 79 | .virtual = (u32)ANUBIS_VA_CTRL1, |
79 | .pfn = __phys_to_pfn(ANUBIS_PA_CTRL1), | 80 | .pfn = __phys_to_pfn(ANUBIS_PA_CTRL1), |
80 | .length = SZ_4K, | 81 | .length = SZ_4K, |
81 | .type = MT_DEVICE | 82 | .type = MT_DEVICE, |
82 | }, { | 83 | }, { |
83 | .virtual = (u32)ANUBIS_VA_CTRL2, | 84 | .virtual = (u32)ANUBIS_VA_CTRL2, |
84 | .pfn = __phys_to_pfn(ANUBIS_PA_CTRL2), | 85 | .pfn = __phys_to_pfn(ANUBIS_PA_CTRL2), |
85 | .length = SZ_4K, | 86 | .length = SZ_4K, |
86 | .type =MT_DEVICE | 87 | .type = MT_DEVICE, |
87 | }, | ||
88 | |||
89 | /* IDE drives */ | ||
90 | |||
91 | { | ||
92 | .virtual = (u32)ANUBIS_IDEPRI, | ||
93 | .pfn = __phys_to_pfn(S3C2410_CS3), | ||
94 | .length = SZ_1M, | ||
95 | .type = MT_DEVICE | ||
96 | }, { | ||
97 | .virtual = (u32)ANUBIS_IDEPRIAUX, | ||
98 | .pfn = __phys_to_pfn(S3C2410_CS3+(1<<26)), | ||
99 | .length = SZ_1M, | ||
100 | .type = MT_DEVICE | ||
101 | }, { | ||
102 | .virtual = (u32)ANUBIS_IDESEC, | ||
103 | .pfn = __phys_to_pfn(S3C2410_CS4), | ||
104 | .length = SZ_1M, | ||
105 | .type = MT_DEVICE | ||
106 | }, { | ||
107 | .virtual = (u32)ANUBIS_IDESECAUX, | ||
108 | .pfn = __phys_to_pfn(S3C2410_CS4+(1<<26)), | ||
109 | .length = SZ_1M, | ||
110 | .type = MT_DEVICE | ||
111 | }, | 88 | }, |
112 | }; | 89 | }; |
113 | 90 | ||
@@ -126,7 +103,7 @@ static struct s3c24xx_uart_clksrc anubis_serial_clocks[] = { | |||
126 | .name = "pclk", | 103 | .name = "pclk", |
127 | .divisor = 1, | 104 | .divisor = 1, |
128 | .min_baud = 0, | 105 | .min_baud = 0, |
129 | .max_baud = 0. | 106 | .max_baud = 0, |
130 | } | 107 | } |
131 | }; | 108 | }; |
132 | 109 | ||
@@ -139,7 +116,7 @@ static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = { | |||
139 | .ulcon = ULCON, | 116 | .ulcon = ULCON, |
140 | .ufcon = UFCON, | 117 | .ufcon = UFCON, |
141 | .clocks = anubis_serial_clocks, | 118 | .clocks = anubis_serial_clocks, |
142 | .clocks_size = ARRAY_SIZE(anubis_serial_clocks) | 119 | .clocks_size = ARRAY_SIZE(anubis_serial_clocks), |
143 | }, | 120 | }, |
144 | [1] = { | 121 | [1] = { |
145 | .hwport = 2, | 122 | .hwport = 2, |
@@ -148,7 +125,7 @@ static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = { | |||
148 | .ulcon = ULCON, | 125 | .ulcon = ULCON, |
149 | .ufcon = UFCON, | 126 | .ufcon = UFCON, |
150 | .clocks = anubis_serial_clocks, | 127 | .clocks = anubis_serial_clocks, |
151 | .clocks_size = ARRAY_SIZE(anubis_serial_clocks) | 128 | .clocks_size = ARRAY_SIZE(anubis_serial_clocks), |
152 | }, | 129 | }, |
153 | }; | 130 | }; |
154 | 131 | ||
@@ -162,7 +139,7 @@ static struct mtd_partition anubis_default_nand_part[] = { | |||
162 | [0] = { | 139 | [0] = { |
163 | .name = "Boot Agent", | 140 | .name = "Boot Agent", |
164 | .size = SZ_16K, | 141 | .size = SZ_16K, |
165 | .offset = 0 | 142 | .offset = 0, |
166 | }, | 143 | }, |
167 | [1] = { | 144 | [1] = { |
168 | .name = "/boot", | 145 | .name = "/boot", |
@@ -194,21 +171,21 @@ static struct s3c2410_nand_set anubis_nand_sets[] = { | |||
194 | .nr_chips = 1, | 171 | .nr_chips = 1, |
195 | .nr_map = external_map, | 172 | .nr_map = external_map, |
196 | .nr_partitions = ARRAY_SIZE(anubis_default_nand_part), | 173 | .nr_partitions = ARRAY_SIZE(anubis_default_nand_part), |
197 | .partitions = anubis_default_nand_part | 174 | .partitions = anubis_default_nand_part, |
198 | }, | 175 | }, |
199 | [0] = { | 176 | [0] = { |
200 | .name = "chip0", | 177 | .name = "chip0", |
201 | .nr_chips = 1, | 178 | .nr_chips = 1, |
202 | .nr_map = chip0_map, | 179 | .nr_map = chip0_map, |
203 | .nr_partitions = ARRAY_SIZE(anubis_default_nand_part), | 180 | .nr_partitions = ARRAY_SIZE(anubis_default_nand_part), |
204 | .partitions = anubis_default_nand_part | 181 | .partitions = anubis_default_nand_part, |
205 | }, | 182 | }, |
206 | [2] = { | 183 | [2] = { |
207 | .name = "chip1", | 184 | .name = "chip1", |
208 | .nr_chips = 1, | 185 | .nr_chips = 1, |
209 | .nr_map = chip1_map, | 186 | .nr_map = chip1_map, |
210 | .nr_partitions = ARRAY_SIZE(anubis_default_nand_part), | 187 | .nr_partitions = ARRAY_SIZE(anubis_default_nand_part), |
211 | .partitions = anubis_default_nand_part | 188 | .partitions = anubis_default_nand_part, |
212 | }, | 189 | }, |
213 | }; | 190 | }; |
214 | 191 | ||
@@ -313,7 +290,7 @@ static struct s3c24xx_board anubis_board __initdata = { | |||
313 | .devices = anubis_devices, | 290 | .devices = anubis_devices, |
314 | .devices_count = ARRAY_SIZE(anubis_devices), | 291 | .devices_count = ARRAY_SIZE(anubis_devices), |
315 | .clocks = anubis_clocks, | 292 | .clocks = anubis_clocks, |
316 | .clocks_count = ARRAY_SIZE(anubis_clocks) | 293 | .clocks_count = ARRAY_SIZE(anubis_clocks), |
317 | }; | 294 | }; |
318 | 295 | ||
319 | static void __init anubis_map_io(void) | 296 | static void __init anubis_map_io(void) |
diff --git a/arch/arm/mach-s3c2410/mach-osiris.c b/arch/arm/mach-s3c2410/mach-osiris.c index 858fd03c6bc5..e193ba69e652 100644 --- a/arch/arm/mach-s3c2410/mach-osiris.c +++ b/arch/arm/mach-s3c2410/mach-osiris.c | |||
@@ -67,12 +67,12 @@ static struct map_desc osiris_iodesc[] __initdata = { | |||
67 | .virtual = (u32)OSIRIS_VA_CTRL1, | 67 | .virtual = (u32)OSIRIS_VA_CTRL1, |
68 | .pfn = __phys_to_pfn(OSIRIS_PA_CTRL1), | 68 | .pfn = __phys_to_pfn(OSIRIS_PA_CTRL1), |
69 | .length = SZ_16K, | 69 | .length = SZ_16K, |
70 | .type = MT_DEVICE | 70 | .type = MT_DEVICE, |
71 | }, { | 71 | }, { |
72 | .virtual = (u32)OSIRIS_VA_CTRL2, | 72 | .virtual = (u32)OSIRIS_VA_CTRL2, |
73 | .pfn = __phys_to_pfn(OSIRIS_PA_CTRL2), | 73 | .pfn = __phys_to_pfn(OSIRIS_PA_CTRL2), |
74 | .length = SZ_16K, | 74 | .length = SZ_16K, |
75 | .type = MT_DEVICE | 75 | .type = MT_DEVICE, |
76 | }, | 76 | }, |
77 | }; | 77 | }; |
78 | 78 | ||
@@ -91,7 +91,7 @@ static struct s3c24xx_uart_clksrc osiris_serial_clocks[] = { | |||
91 | .name = "pclk", | 91 | .name = "pclk", |
92 | .divisor = 1, | 92 | .divisor = 1, |
93 | .min_baud = 0, | 93 | .min_baud = 0, |
94 | .max_baud = 0. | 94 | .max_baud = 0, |
95 | } | 95 | } |
96 | }; | 96 | }; |
97 | 97 | ||
@@ -103,7 +103,7 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = { | |||
103 | .ulcon = ULCON, | 103 | .ulcon = ULCON, |
104 | .ufcon = UFCON, | 104 | .ufcon = UFCON, |
105 | .clocks = osiris_serial_clocks, | 105 | .clocks = osiris_serial_clocks, |
106 | .clocks_size = ARRAY_SIZE(osiris_serial_clocks) | 106 | .clocks_size = ARRAY_SIZE(osiris_serial_clocks), |
107 | }, | 107 | }, |
108 | [1] = { | 108 | [1] = { |
109 | .hwport = 1, | 109 | .hwport = 1, |
@@ -112,7 +112,7 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = { | |||
112 | .ulcon = ULCON, | 112 | .ulcon = ULCON, |
113 | .ufcon = UFCON, | 113 | .ufcon = UFCON, |
114 | .clocks = osiris_serial_clocks, | 114 | .clocks = osiris_serial_clocks, |
115 | .clocks_size = ARRAY_SIZE(osiris_serial_clocks) | 115 | .clocks_size = ARRAY_SIZE(osiris_serial_clocks), |
116 | }, | 116 | }, |
117 | }; | 117 | }; |
118 | 118 | ||
@@ -126,7 +126,7 @@ static struct mtd_partition osiris_default_nand_part[] = { | |||
126 | [0] = { | 126 | [0] = { |
127 | .name = "Boot Agent", | 127 | .name = "Boot Agent", |
128 | .size = SZ_16K, | 128 | .size = SZ_16K, |
129 | .offset = 0 | 129 | .offset = 0, |
130 | }, | 130 | }, |
131 | [1] = { | 131 | [1] = { |
132 | .name = "/boot", | 132 | .name = "/boot", |
@@ -158,21 +158,21 @@ static struct s3c2410_nand_set osiris_nand_sets[] = { | |||
158 | .nr_chips = 1, | 158 | .nr_chips = 1, |
159 | .nr_map = external_map, | 159 | .nr_map = external_map, |
160 | .nr_partitions = ARRAY_SIZE(osiris_default_nand_part), | 160 | .nr_partitions = ARRAY_SIZE(osiris_default_nand_part), |
161 | .partitions = osiris_default_nand_part | 161 | .partitions = osiris_default_nand_part, |
162 | }, | 162 | }, |
163 | [0] = { | 163 | [0] = { |
164 | .name = "chip0", | 164 | .name = "chip0", |
165 | .nr_chips = 1, | 165 | .nr_chips = 1, |
166 | .nr_map = chip0_map, | 166 | .nr_map = chip0_map, |
167 | .nr_partitions = ARRAY_SIZE(osiris_default_nand_part), | 167 | .nr_partitions = ARRAY_SIZE(osiris_default_nand_part), |
168 | .partitions = osiris_default_nand_part | 168 | .partitions = osiris_default_nand_part, |
169 | }, | 169 | }, |
170 | [2] = { | 170 | [2] = { |
171 | .name = "chip1", | 171 | .name = "chip1", |
172 | .nr_chips = 1, | 172 | .nr_chips = 1, |
173 | .nr_map = chip1_map, | 173 | .nr_map = chip1_map, |
174 | .nr_partitions = ARRAY_SIZE(osiris_default_nand_part), | 174 | .nr_partitions = ARRAY_SIZE(osiris_default_nand_part), |
175 | .partitions = osiris_default_nand_part | 175 | .partitions = osiris_default_nand_part, |
176 | }, | 176 | }, |
177 | }; | 177 | }; |
178 | 178 | ||
@@ -245,7 +245,7 @@ static struct s3c24xx_board osiris_board __initdata = { | |||
245 | .devices = osiris_devices, | 245 | .devices = osiris_devices, |
246 | .devices_count = ARRAY_SIZE(osiris_devices), | 246 | .devices_count = ARRAY_SIZE(osiris_devices), |
247 | .clocks = osiris_clocks, | 247 | .clocks = osiris_clocks, |
248 | .clocks_count = ARRAY_SIZE(osiris_clocks) | 248 | .clocks_count = ARRAY_SIZE(osiris_clocks), |
249 | }; | 249 | }; |
250 | 250 | ||
251 | static void __init osiris_map_io(void) | 251 | static void __init osiris_map_io(void) |
diff --git a/arch/arm/mach-sa1100/irq.c b/arch/arm/mach-sa1100/irq.c index 2891b8ca86dd..b55b90a2e8fe 100644 --- a/arch/arm/mach-sa1100/irq.c +++ b/arch/arm/mach-sa1100/irq.c | |||
@@ -95,7 +95,8 @@ static int sa1100_low_gpio_wake(unsigned int irq, unsigned int on) | |||
95 | return 0; | 95 | return 0; |
96 | } | 96 | } |
97 | 97 | ||
98 | static struct irqchip sa1100_low_gpio_chip = { | 98 | static struct irq_chip sa1100_low_gpio_chip = { |
99 | .name = "GPIO-l", | ||
99 | .ack = sa1100_low_gpio_ack, | 100 | .ack = sa1100_low_gpio_ack, |
100 | .mask = sa1100_low_gpio_mask, | 101 | .mask = sa1100_low_gpio_mask, |
101 | .unmask = sa1100_low_gpio_unmask, | 102 | .unmask = sa1100_low_gpio_unmask, |
@@ -178,7 +179,8 @@ static int sa1100_high_gpio_wake(unsigned int irq, unsigned int on) | |||
178 | return 0; | 179 | return 0; |
179 | } | 180 | } |
180 | 181 | ||
181 | static struct irqchip sa1100_high_gpio_chip = { | 182 | static struct irq_chip sa1100_high_gpio_chip = { |
183 | .name = "GPIO-h", | ||
182 | .ack = sa1100_high_gpio_ack, | 184 | .ack = sa1100_high_gpio_ack, |
183 | .mask = sa1100_high_gpio_mask, | 185 | .mask = sa1100_high_gpio_mask, |
184 | .unmask = sa1100_high_gpio_unmask, | 186 | .unmask = sa1100_high_gpio_unmask, |
@@ -215,7 +217,8 @@ static int sa1100_set_wake(unsigned int irq, unsigned int on) | |||
215 | return -EINVAL; | 217 | return -EINVAL; |
216 | } | 218 | } |
217 | 219 | ||
218 | static struct irqchip sa1100_normal_chip = { | 220 | static struct irq_chip sa1100_normal_chip = { |
221 | .name = "SC", | ||
219 | .ack = sa1100_mask_irq, | 222 | .ack = sa1100_mask_irq, |
220 | .mask = sa1100_mask_irq, | 223 | .mask = sa1100_mask_irq, |
221 | .unmask = sa1100_unmask_irq, | 224 | .unmask = sa1100_unmask_irq, |
diff --git a/arch/arm/mach-sa1100/ssp.c b/arch/arm/mach-sa1100/ssp.c index 1604dadf27fc..5eba5fbbb561 100644 --- a/arch/arm/mach-sa1100/ssp.c +++ b/arch/arm/mach-sa1100/ssp.c | |||
@@ -23,6 +23,8 @@ | |||
23 | #include <asm/hardware.h> | 23 | #include <asm/hardware.h> |
24 | #include <asm/hardware/ssp.h> | 24 | #include <asm/hardware/ssp.h> |
25 | 25 | ||
26 | #define TIMEOUT 100000 | ||
27 | |||
26 | static irqreturn_t ssp_interrupt(int irq, void *dev_id, struct pt_regs *regs) | 28 | static irqreturn_t ssp_interrupt(int irq, void *dev_id, struct pt_regs *regs) |
27 | { | 29 | { |
28 | unsigned int status = Ser4SSSR; | 30 | unsigned int status = Ser4SSSR; |
@@ -47,18 +49,27 @@ static irqreturn_t ssp_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |||
47 | * The caller is expected to perform the necessary locking. | 49 | * The caller is expected to perform the necessary locking. |
48 | * | 50 | * |
49 | * Returns: | 51 | * Returns: |
50 | * %-ETIMEDOUT timeout occurred (for future) | 52 | * %-ETIMEDOUT timeout occurred |
51 | * 0 success | 53 | * 0 success |
52 | */ | 54 | */ |
53 | int ssp_write_word(u16 data) | 55 | int ssp_write_word(u16 data) |
54 | { | 56 | { |
55 | while (!(Ser4SSSR & SSSR_TNF)) | 57 | int timeout = TIMEOUT; |
58 | |||
59 | while (!(Ser4SSSR & SSSR_TNF)) { | ||
60 | if (!--timeout) | ||
61 | return -ETIMEDOUT; | ||
56 | cpu_relax(); | 62 | cpu_relax(); |
63 | } | ||
57 | 64 | ||
58 | Ser4SSDR = data; | 65 | Ser4SSDR = data; |
59 | 66 | ||
60 | while (!(Ser4SSSR & SSSR_BSY)) | 67 | timeout = TIMEOUT; |
68 | while (!(Ser4SSSR & SSSR_BSY)) { | ||
69 | if (!--timeout) | ||
70 | return -ETIMEDOUT; | ||
61 | cpu_relax(); | 71 | cpu_relax(); |
72 | } | ||
62 | 73 | ||
63 | return 0; | 74 | return 0; |
64 | } | 75 | } |
@@ -75,15 +86,22 @@ int ssp_write_word(u16 data) | |||
75 | * The caller is expected to perform the necessary locking. | 86 | * The caller is expected to perform the necessary locking. |
76 | * | 87 | * |
77 | * Returns: | 88 | * Returns: |
78 | * %-ETIMEDOUT timeout occurred (for future) | 89 | * %-ETIMEDOUT timeout occurred |
79 | * 16-bit data success | 90 | * 16-bit data success |
80 | */ | 91 | */ |
81 | int ssp_read_word(void) | 92 | int ssp_read_word(u16 *data) |
82 | { | 93 | { |
83 | while (!(Ser4SSSR & SSSR_RNE)) | 94 | int timeout = TIMEOUT; |
95 | |||
96 | while (!(Ser4SSSR & SSSR_RNE)) { | ||
97 | if (!--timeout) | ||
98 | return -ETIMEDOUT; | ||
84 | cpu_relax(); | 99 | cpu_relax(); |
100 | } | ||
101 | |||
102 | *data = (u16)Ser4SSDR; | ||
85 | 103 | ||
86 | return Ser4SSDR; | 104 | return 0; |
87 | } | 105 | } |
88 | 106 | ||
89 | /** | 107 | /** |
@@ -93,14 +111,26 @@ int ssp_read_word(void) | |||
93 | * is empty. | 111 | * is empty. |
94 | * | 112 | * |
95 | * The caller is expected to perform the necessary locking. | 113 | * The caller is expected to perform the necessary locking. |
114 | * | ||
115 | * Returns: | ||
116 | * %-ETIMEDOUT timeout occurred | ||
117 | * 0 success | ||
96 | */ | 118 | */ |
97 | void ssp_flush(void) | 119 | int ssp_flush(void) |
98 | { | 120 | { |
121 | int timeout = TIMEOUT * 2; | ||
122 | |||
99 | do { | 123 | do { |
100 | while (Ser4SSSR & SSSR_RNE) { | 124 | while (Ser4SSSR & SSSR_RNE) { |
125 | if (!--timeout) | ||
126 | return -ETIMEDOUT; | ||
101 | (void) Ser4SSDR; | 127 | (void) Ser4SSDR; |
102 | } | 128 | } |
129 | if (!--timeout) | ||
130 | return -ETIMEDOUT; | ||
103 | } while (Ser4SSSR & SSSR_BSY); | 131 | } while (Ser4SSSR & SSSR_BSY); |
132 | |||
133 | return 0; | ||
104 | } | 134 | } |
105 | 135 | ||
106 | /** | 136 | /** |
diff --git a/arch/arm/mach-shark/irq.c b/arch/arm/mach-shark/irq.c index 6cb67bd3dfd3..b227052296cf 100644 --- a/arch/arm/mach-shark/irq.c +++ b/arch/arm/mach-shark/irq.c | |||
@@ -69,7 +69,8 @@ static irqreturn_t bogus_int(int irq, void *dev_id, struct pt_regs *regs) | |||
69 | 69 | ||
70 | static struct irqaction cascade; | 70 | static struct irqaction cascade; |
71 | 71 | ||
72 | static struct irqchip fb_chip = { | 72 | static struct irq_chip fb_chip = { |
73 | .name = "XT-PIC", | ||
73 | .ack = shark_ack_8259A_irq, | 74 | .ack = shark_ack_8259A_irq, |
74 | .mask = shark_disable_8259A_irq, | 75 | .mask = shark_disable_8259A_irq, |
75 | .unmask = shark_enable_8259A_irq, | 76 | .unmask = shark_enable_8259A_irq, |
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c index 864377176015..f2bbef07b1e4 100644 --- a/arch/arm/mach-versatile/core.c +++ b/arch/arm/mach-versatile/core.c | |||
@@ -69,7 +69,8 @@ static void sic_unmask_irq(unsigned int irq) | |||
69 | writel(1 << irq, VA_SIC_BASE + SIC_IRQ_ENABLE_SET); | 69 | writel(1 << irq, VA_SIC_BASE + SIC_IRQ_ENABLE_SET); |
70 | } | 70 | } |
71 | 71 | ||
72 | static struct irqchip sic_chip = { | 72 | static struct irq_chip sic_chip = { |
73 | .name = "SIC", | ||
73 | .ack = sic_mask_irq, | 74 | .ack = sic_mask_irq, |
74 | .mask = sic_mask_irq, | 75 | .mask = sic_mask_irq, |
75 | .unmask = sic_unmask_irq, | 76 | .unmask = sic_unmask_irq, |
@@ -284,7 +285,7 @@ static struct flash_platform_data versatile_flash_data = { | |||
284 | 285 | ||
285 | static struct resource versatile_flash_resource = { | 286 | static struct resource versatile_flash_resource = { |
286 | .start = VERSATILE_FLASH_BASE, | 287 | .start = VERSATILE_FLASH_BASE, |
287 | .end = VERSATILE_FLASH_BASE + VERSATILE_FLASH_SIZE, | 288 | .end = VERSATILE_FLASH_BASE + VERSATILE_FLASH_SIZE - 1, |
288 | .flags = IORESOURCE_MEM, | 289 | .flags = IORESOURCE_MEM, |
289 | }; | 290 | }; |
290 | 291 | ||
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 5f80f184cd32..b4f220dd5eb8 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig | |||
@@ -46,7 +46,7 @@ config CPU_ARM710 | |||
46 | config CPU_ARM720T | 46 | config CPU_ARM720T |
47 | bool "Support ARM720T processor" if !ARCH_CLPS711X && !ARCH_L7200 && !ARCH_CDB89712 && ARCH_INTEGRATOR | 47 | bool "Support ARM720T processor" if !ARCH_CLPS711X && !ARCH_L7200 && !ARCH_CDB89712 && ARCH_INTEGRATOR |
48 | default y if ARCH_CLPS711X || ARCH_L7200 || ARCH_CDB89712 || ARCH_H720X | 48 | default y if ARCH_CLPS711X || ARCH_L7200 || ARCH_CDB89712 || ARCH_H720X |
49 | select CPU_32v4 | 49 | select CPU_32v4T |
50 | select CPU_ABRT_LV4T | 50 | select CPU_ABRT_LV4T |
51 | select CPU_CACHE_V4 | 51 | select CPU_CACHE_V4 |
52 | select CPU_CACHE_VIVT | 52 | select CPU_CACHE_VIVT |
@@ -64,7 +64,7 @@ config CPU_ARM920T | |||
64 | bool "Support ARM920T processor" | 64 | bool "Support ARM920T processor" |
65 | depends on ARCH_EP93XX || ARCH_INTEGRATOR || CPU_S3C2410 || CPU_S3C2440 || CPU_S3C2442 || ARCH_IMX || ARCH_AAEC2000 || ARCH_AT91RM9200 | 65 | depends on ARCH_EP93XX || ARCH_INTEGRATOR || CPU_S3C2410 || CPU_S3C2440 || CPU_S3C2442 || ARCH_IMX || ARCH_AAEC2000 || ARCH_AT91RM9200 |
66 | default y if CPU_S3C2410 || CPU_S3C2440 || CPU_S3C2442 || ARCH_AT91RM9200 | 66 | default y if CPU_S3C2410 || CPU_S3C2440 || CPU_S3C2442 || ARCH_AT91RM9200 |
67 | select CPU_32v4 | 67 | select CPU_32v4T |
68 | select CPU_ABRT_EV4T | 68 | select CPU_ABRT_EV4T |
69 | select CPU_CACHE_V4WT | 69 | select CPU_CACHE_V4WT |
70 | select CPU_CACHE_VIVT | 70 | select CPU_CACHE_VIVT |
@@ -85,7 +85,7 @@ config CPU_ARM922T | |||
85 | bool "Support ARM922T processor" if ARCH_INTEGRATOR | 85 | bool "Support ARM922T processor" if ARCH_INTEGRATOR |
86 | depends on ARCH_LH7A40X || ARCH_INTEGRATOR | 86 | depends on ARCH_LH7A40X || ARCH_INTEGRATOR |
87 | default y if ARCH_LH7A40X | 87 | default y if ARCH_LH7A40X |
88 | select CPU_32v4 | 88 | select CPU_32v4T |
89 | select CPU_ABRT_EV4T | 89 | select CPU_ABRT_EV4T |
90 | select CPU_CACHE_V4WT | 90 | select CPU_CACHE_V4WT |
91 | select CPU_CACHE_VIVT | 91 | select CPU_CACHE_VIVT |
@@ -104,7 +104,7 @@ config CPU_ARM925T | |||
104 | bool "Support ARM925T processor" if ARCH_OMAP1 | 104 | bool "Support ARM925T processor" if ARCH_OMAP1 |
105 | depends on ARCH_OMAP15XX | 105 | depends on ARCH_OMAP15XX |
106 | default y if ARCH_OMAP15XX | 106 | default y if ARCH_OMAP15XX |
107 | select CPU_32v4 | 107 | select CPU_32v4T |
108 | select CPU_ABRT_EV4T | 108 | select CPU_ABRT_EV4T |
109 | select CPU_CACHE_V4WT | 109 | select CPU_CACHE_V4WT |
110 | select CPU_CACHE_VIVT | 110 | select CPU_CACHE_VIVT |
@@ -285,6 +285,11 @@ config CPU_32v4 | |||
285 | select TLS_REG_EMUL if SMP || !MMU | 285 | select TLS_REG_EMUL if SMP || !MMU |
286 | select NEEDS_SYSCALL_FOR_CMPXCHG if SMP | 286 | select NEEDS_SYSCALL_FOR_CMPXCHG if SMP |
287 | 287 | ||
288 | config CPU_32v4T | ||
289 | bool | ||
290 | select TLS_REG_EMUL if SMP || !MMU | ||
291 | select NEEDS_SYSCALL_FOR_CMPXCHG if SMP | ||
292 | |||
288 | config CPU_32v5 | 293 | config CPU_32v5 |
289 | bool | 294 | bool |
290 | select TLS_REG_EMUL if SMP || !MMU | 295 | select TLS_REG_EMUL if SMP || !MMU |
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c index b103e56806bd..d438ce41cdd5 100644 --- a/arch/arm/mm/flush.c +++ b/arch/arm/mm/flush.c | |||
@@ -87,6 +87,32 @@ void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsig | |||
87 | if (cache_is_vipt_aliasing()) | 87 | if (cache_is_vipt_aliasing()) |
88 | flush_pfn_alias(pfn, user_addr); | 88 | flush_pfn_alias(pfn, user_addr); |
89 | } | 89 | } |
90 | |||
91 | void flush_ptrace_access(struct vm_area_struct *vma, struct page *page, | ||
92 | unsigned long uaddr, void *kaddr, | ||
93 | unsigned long len, int write) | ||
94 | { | ||
95 | if (cache_is_vivt()) { | ||
96 | if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask)) { | ||
97 | unsigned long addr = (unsigned long)kaddr; | ||
98 | __cpuc_coherent_kern_range(addr, addr + len); | ||
99 | } | ||
100 | return; | ||
101 | } | ||
102 | |||
103 | if (cache_is_vipt_aliasing()) { | ||
104 | flush_pfn_alias(page_to_pfn(page), uaddr); | ||
105 | return; | ||
106 | } | ||
107 | |||
108 | /* VIPT non-aliasing cache */ | ||
109 | if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask) && | ||
110 | vma->vm_flags | VM_EXEC) { | ||
111 | unsigned long addr = (unsigned long)kaddr; | ||
112 | /* only flushing the kernel mapping on non-aliasing VIPT */ | ||
113 | __cpuc_coherent_kern_range(addr, addr + len); | ||
114 | } | ||
115 | } | ||
90 | #else | 116 | #else |
91 | #define flush_pfn_alias(pfn,vaddr) do { } while (0) | 117 | #define flush_pfn_alias(pfn,vaddr) do { } while (0) |
92 | #endif | 118 | #endif |
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c index dba7dddfe57d..88a999df0ab3 100644 --- a/arch/arm/mm/ioremap.c +++ b/arch/arm/mm/ioremap.c | |||
@@ -363,7 +363,9 @@ EXPORT_SYMBOL(__ioremap); | |||
363 | 363 | ||
364 | void __iounmap(void __iomem *addr) | 364 | void __iounmap(void __iomem *addr) |
365 | { | 365 | { |
366 | #ifndef CONFIG_SMP | ||
366 | struct vm_struct **p, *tmp; | 367 | struct vm_struct **p, *tmp; |
368 | #endif | ||
367 | unsigned int section_mapping = 0; | 369 | unsigned int section_mapping = 0; |
368 | 370 | ||
369 | addr = (void __iomem *)(PAGE_MASK & (unsigned long)addr); | 371 | addr = (void __iomem *)(PAGE_MASK & (unsigned long)addr); |
diff --git a/arch/arm/mm/proc-syms.c b/arch/arm/mm/proc-syms.c index 6c5f0fe578a5..ab143557e688 100644 --- a/arch/arm/mm/proc-syms.c +++ b/arch/arm/mm/proc-syms.c | |||
@@ -13,6 +13,7 @@ | |||
13 | #include <asm/cacheflush.h> | 13 | #include <asm/cacheflush.h> |
14 | #include <asm/proc-fns.h> | 14 | #include <asm/proc-fns.h> |
15 | #include <asm/tlbflush.h> | 15 | #include <asm/tlbflush.h> |
16 | #include <asm/page.h> | ||
16 | 17 | ||
17 | #ifndef MULTI_CPU | 18 | #ifndef MULTI_CPU |
18 | EXPORT_SYMBOL(cpu_dcache_clean_area); | 19 | EXPORT_SYMBOL(cpu_dcache_clean_area); |
@@ -30,6 +31,13 @@ EXPORT_SYMBOL(__cpuc_coherent_kern_range); | |||
30 | EXPORT_SYMBOL(cpu_cache); | 31 | EXPORT_SYMBOL(cpu_cache); |
31 | #endif | 32 | #endif |
32 | 33 | ||
34 | #ifndef MULTI_USER | ||
35 | EXPORT_SYMBOL(__cpu_clear_user_page); | ||
36 | EXPORT_SYMBOL(__cpu_copy_user_page); | ||
37 | #else | ||
38 | EXPORT_SYMBOL(cpu_user); | ||
39 | #endif | ||
40 | |||
33 | /* | 41 | /* |
34 | * No module should need to touch the TLB (and currently | 42 | * No module should need to touch the TLB (and currently |
35 | * no modules do. We export this for "loadkernel" support | 43 | * no modules do. We export this for "loadkernel" support |
diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S index 521538671f4c..561bff73a036 100644 --- a/arch/arm/mm/proc-xscale.S +++ b/arch/arm/mm/proc-xscale.S | |||
@@ -536,6 +536,11 @@ cpu_80200_name: | |||
536 | .asciz "XScale-80200" | 536 | .asciz "XScale-80200" |
537 | .size cpu_80200_name, . - cpu_80200_name | 537 | .size cpu_80200_name, . - cpu_80200_name |
538 | 538 | ||
539 | .type cpu_80219_name, #object | ||
540 | cpu_80219_name: | ||
541 | .asciz "XScale-80219" | ||
542 | .size cpu_80219_name, . - cpu_80219_name | ||
543 | |||
539 | .type cpu_8032x_name, #object | 544 | .type cpu_8032x_name, #object |
540 | cpu_8032x_name: | 545 | cpu_8032x_name: |
541 | .asciz "XScale-IOP8032x Family" | 546 | .asciz "XScale-IOP8032x Family" |
@@ -613,10 +618,33 @@ __80200_proc_info: | |||
613 | .long xscale_cache_fns | 618 | .long xscale_cache_fns |
614 | .size __80200_proc_info, . - __80200_proc_info | 619 | .size __80200_proc_info, . - __80200_proc_info |
615 | 620 | ||
621 | .type __80219_proc_info,#object | ||
622 | __80219_proc_info: | ||
623 | .long 0x69052e20 | ||
624 | .long 0xffffffe0 | ||
625 | .long PMD_TYPE_SECT | \ | ||
626 | PMD_SECT_BUFFERABLE | \ | ||
627 | PMD_SECT_CACHEABLE | \ | ||
628 | PMD_SECT_AP_WRITE | \ | ||
629 | PMD_SECT_AP_READ | ||
630 | .long PMD_TYPE_SECT | \ | ||
631 | PMD_SECT_AP_WRITE | \ | ||
632 | PMD_SECT_AP_READ | ||
633 | b __xscale_setup | ||
634 | .long cpu_arch_name | ||
635 | .long cpu_elf_name | ||
636 | .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP | ||
637 | .long cpu_80219_name | ||
638 | .long xscale_processor_functions | ||
639 | .long v4wbi_tlb_fns | ||
640 | .long xscale_mc_user_fns | ||
641 | .long xscale_cache_fns | ||
642 | .size __80219_proc_info, . - __80219_proc_info | ||
643 | |||
616 | .type __8032x_proc_info,#object | 644 | .type __8032x_proc_info,#object |
617 | __8032x_proc_info: | 645 | __8032x_proc_info: |
618 | .long 0x69052420 | 646 | .long 0x69052420 |
619 | .long 0xfffff5e0 @ mask should accomodate IOP80219 also | 647 | .long 0xffffffe0 |
620 | .long PMD_TYPE_SECT | \ | 648 | .long PMD_TYPE_SECT | \ |
621 | PMD_SECT_BUFFERABLE | \ | 649 | PMD_SECT_BUFFERABLE | \ |
622 | PMD_SECT_CACHEABLE | \ | 650 | PMD_SECT_CACHEABLE | \ |
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index fec7970e564d..cd7f973fb286 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c | |||
@@ -944,7 +944,8 @@ static void mpuio_unmask_irq(unsigned int irq) | |||
944 | _set_gpio_irqenable(bank, gpio, 1); | 944 | _set_gpio_irqenable(bank, gpio, 1); |
945 | } | 945 | } |
946 | 946 | ||
947 | static struct irqchip gpio_irq_chip = { | 947 | static struct irq_chip gpio_irq_chip = { |
948 | .name = "GPIO", | ||
948 | .ack = gpio_ack_irq, | 949 | .ack = gpio_ack_irq, |
949 | .mask = gpio_mask_irq, | 950 | .mask = gpio_mask_irq, |
950 | .unmask = gpio_unmask_irq, | 951 | .unmask = gpio_unmask_irq, |
@@ -952,10 +953,11 @@ static struct irqchip gpio_irq_chip = { | |||
952 | .set_wake = gpio_wake_enable, | 953 | .set_wake = gpio_wake_enable, |
953 | }; | 954 | }; |
954 | 955 | ||
955 | static struct irqchip mpuio_irq_chip = { | 956 | static struct irq_chip mpuio_irq_chip = { |
957 | .name = "MPUIO", | ||
956 | .ack = mpuio_ack_irq, | 958 | .ack = mpuio_ack_irq, |
957 | .mask = mpuio_mask_irq, | 959 | .mask = mpuio_mask_irq, |
958 | .unmask = mpuio_unmask_irq | 960 | .unmask = mpuio_unmask_irq |
959 | }; | 961 | }; |
960 | 962 | ||
961 | static int initialized; | 963 | static int initialized; |
diff --git a/arch/arm/vfp/vfp.h b/arch/arm/vfp/vfp.h index 4b97950984e9..96fdf30f6a3b 100644 --- a/arch/arm/vfp/vfp.h +++ b/arch/arm/vfp/vfp.h | |||
@@ -156,7 +156,7 @@ struct vfp_single { | |||
156 | }; | 156 | }; |
157 | 157 | ||
158 | extern s32 vfp_get_float(unsigned int reg); | 158 | extern s32 vfp_get_float(unsigned int reg); |
159 | extern void vfp_put_float(unsigned int reg, s32 val); | 159 | extern void vfp_put_float(s32 val, unsigned int reg); |
160 | 160 | ||
161 | /* | 161 | /* |
162 | * VFP_SINGLE_MANTISSA_BITS - number of bits in the mantissa | 162 | * VFP_SINGLE_MANTISSA_BITS - number of bits in the mantissa |
@@ -267,7 +267,7 @@ struct vfp_double { | |||
267 | */ | 267 | */ |
268 | #define VFP_REG_ZERO 16 | 268 | #define VFP_REG_ZERO 16 |
269 | extern u64 vfp_get_double(unsigned int reg); | 269 | extern u64 vfp_get_double(unsigned int reg); |
270 | extern void vfp_put_double(unsigned int reg, u64 val); | 270 | extern void vfp_put_double(u64 val, unsigned int reg); |
271 | 271 | ||
272 | #define VFP_DOUBLE_MANTISSA_BITS (52) | 272 | #define VFP_DOUBLE_MANTISSA_BITS (52) |
273 | #define VFP_DOUBLE_EXPONENT_BITS (11) | 273 | #define VFP_DOUBLE_EXPONENT_BITS (11) |
@@ -341,15 +341,17 @@ static inline int vfp_double_type(struct vfp_double *s) | |||
341 | 341 | ||
342 | u32 vfp_double_normaliseround(int dd, struct vfp_double *vd, u32 fpscr, u32 exceptions, const char *func); | 342 | u32 vfp_double_normaliseround(int dd, struct vfp_double *vd, u32 fpscr, u32 exceptions, const char *func); |
343 | 343 | ||
344 | /* | ||
345 | * System registers | ||
346 | */ | ||
347 | extern u32 vfp_get_sys(unsigned int reg); | ||
348 | extern void vfp_put_sys(unsigned int reg, u32 val); | ||
349 | |||
350 | u32 vfp_estimate_sqrt_significand(u32 exponent, u32 significand); | 344 | u32 vfp_estimate_sqrt_significand(u32 exponent, u32 significand); |
351 | 345 | ||
352 | /* | 346 | /* |
353 | * A special flag to tell the normalisation code not to normalise. | 347 | * A special flag to tell the normalisation code not to normalise. |
354 | */ | 348 | */ |
355 | #define VFP_NAN_FLAG 0x100 | 349 | #define VFP_NAN_FLAG 0x100 |
350 | |||
351 | /* | ||
352 | * A bit pattern used to indicate the initial (unset) value of the | ||
353 | * exception mask, in case nothing handles an instruction. This | ||
354 | * doesn't include the NAN flag, which get masked out before | ||
355 | * we check for an error. | ||
356 | */ | ||
357 | #define VFP_EXCEPTION_ERROR ((u32)-1 & ~VFP_NAN_FLAG) | ||
diff --git a/arch/arm/vfp/vfpdouble.c b/arch/arm/vfp/vfpdouble.c index 009038c8113e..add48e36c2dc 100644 --- a/arch/arm/vfp/vfpdouble.c +++ b/arch/arm/vfp/vfpdouble.c | |||
@@ -195,7 +195,7 @@ u32 vfp_double_normaliseround(int dd, struct vfp_double *vd, u32 fpscr, u32 exce | |||
195 | s64 d = vfp_double_pack(vd); | 195 | s64 d = vfp_double_pack(vd); |
196 | pr_debug("VFP: %s: d(d%d)=%016llx exceptions=%08x\n", func, | 196 | pr_debug("VFP: %s: d(d%d)=%016llx exceptions=%08x\n", func, |
197 | dd, d, exceptions); | 197 | dd, d, exceptions); |
198 | vfp_put_double(dd, d); | 198 | vfp_put_double(d, dd); |
199 | } | 199 | } |
200 | return exceptions; | 200 | return exceptions; |
201 | } | 201 | } |
@@ -250,19 +250,19 @@ vfp_propagate_nan(struct vfp_double *vdd, struct vfp_double *vdn, | |||
250 | */ | 250 | */ |
251 | static u32 vfp_double_fabs(int dd, int unused, int dm, u32 fpscr) | 251 | static u32 vfp_double_fabs(int dd, int unused, int dm, u32 fpscr) |
252 | { | 252 | { |
253 | vfp_put_double(dd, vfp_double_packed_abs(vfp_get_double(dm))); | 253 | vfp_put_double(vfp_double_packed_abs(vfp_get_double(dm)), dd); |
254 | return 0; | 254 | return 0; |
255 | } | 255 | } |
256 | 256 | ||
257 | static u32 vfp_double_fcpy(int dd, int unused, int dm, u32 fpscr) | 257 | static u32 vfp_double_fcpy(int dd, int unused, int dm, u32 fpscr) |
258 | { | 258 | { |
259 | vfp_put_double(dd, vfp_get_double(dm)); | 259 | vfp_put_double(vfp_get_double(dm), dd); |
260 | return 0; | 260 | return 0; |
261 | } | 261 | } |
262 | 262 | ||
263 | static u32 vfp_double_fneg(int dd, int unused, int dm, u32 fpscr) | 263 | static u32 vfp_double_fneg(int dd, int unused, int dm, u32 fpscr) |
264 | { | 264 | { |
265 | vfp_put_double(dd, vfp_double_packed_negate(vfp_get_double(dm))); | 265 | vfp_put_double(vfp_double_packed_negate(vfp_get_double(dm)), dd); |
266 | return 0; | 266 | return 0; |
267 | } | 267 | } |
268 | 268 | ||
@@ -287,7 +287,7 @@ static u32 vfp_double_fsqrt(int dd, int unused, int dm, u32 fpscr) | |||
287 | vdp = &vfp_double_default_qnan; | 287 | vdp = &vfp_double_default_qnan; |
288 | ret = FPSCR_IOC; | 288 | ret = FPSCR_IOC; |
289 | } | 289 | } |
290 | vfp_put_double(dd, vfp_double_pack(vdp)); | 290 | vfp_put_double(vfp_double_pack(vdp), dd); |
291 | return ret; | 291 | return ret; |
292 | } | 292 | } |
293 | 293 | ||
@@ -465,7 +465,7 @@ static u32 vfp_double_fcvts(int sd, int unused, int dm, u32 fpscr) | |||
465 | */ | 465 | */ |
466 | if (tm & (VFP_INFINITY|VFP_NAN)) { | 466 | if (tm & (VFP_INFINITY|VFP_NAN)) { |
467 | vsd.exponent = 255; | 467 | vsd.exponent = 255; |
468 | if (tm & VFP_NAN) | 468 | if (tm == VFP_QNAN) |
469 | vsd.significand |= VFP_SINGLE_SIGNIFICAND_QNAN; | 469 | vsd.significand |= VFP_SINGLE_SIGNIFICAND_QNAN; |
470 | goto pack_nan; | 470 | goto pack_nan; |
471 | } else if (tm & VFP_ZERO) | 471 | } else if (tm & VFP_ZERO) |
@@ -476,7 +476,7 @@ static u32 vfp_double_fcvts(int sd, int unused, int dm, u32 fpscr) | |||
476 | return vfp_single_normaliseround(sd, &vsd, fpscr, exceptions, "fcvts"); | 476 | return vfp_single_normaliseround(sd, &vsd, fpscr, exceptions, "fcvts"); |
477 | 477 | ||
478 | pack_nan: | 478 | pack_nan: |
479 | vfp_put_float(sd, vfp_single_pack(&vsd)); | 479 | vfp_put_float(vfp_single_pack(&vsd), sd); |
480 | return exceptions; | 480 | return exceptions; |
481 | } | 481 | } |
482 | 482 | ||
@@ -573,7 +573,7 @@ static u32 vfp_double_ftoui(int sd, int unused, int dm, u32 fpscr) | |||
573 | 573 | ||
574 | pr_debug("VFP: ftoui: d(s%d)=%08x exceptions=%08x\n", sd, d, exceptions); | 574 | pr_debug("VFP: ftoui: d(s%d)=%08x exceptions=%08x\n", sd, d, exceptions); |
575 | 575 | ||
576 | vfp_put_float(sd, d); | 576 | vfp_put_float(d, sd); |
577 | 577 | ||
578 | return exceptions; | 578 | return exceptions; |
579 | } | 579 | } |
@@ -648,7 +648,7 @@ static u32 vfp_double_ftosi(int sd, int unused, int dm, u32 fpscr) | |||
648 | 648 | ||
649 | pr_debug("VFP: ftosi: d(s%d)=%08x exceptions=%08x\n", sd, d, exceptions); | 649 | pr_debug("VFP: ftosi: d(s%d)=%08x exceptions=%08x\n", sd, d, exceptions); |
650 | 650 | ||
651 | vfp_put_float(sd, (s32)d); | 651 | vfp_put_float((s32)d, sd); |
652 | 652 | ||
653 | return exceptions; | 653 | return exceptions; |
654 | } | 654 | } |
@@ -1084,7 +1084,7 @@ static u32 vfp_double_fdiv(int dd, int dn, int dm, u32 fpscr) | |||
1084 | vdn_nan: | 1084 | vdn_nan: |
1085 | exceptions = vfp_propagate_nan(&vdd, &vdn, &vdm, fpscr); | 1085 | exceptions = vfp_propagate_nan(&vdd, &vdn, &vdm, fpscr); |
1086 | pack: | 1086 | pack: |
1087 | vfp_put_double(dd, vfp_double_pack(&vdd)); | 1087 | vfp_put_double(vfp_double_pack(&vdd), dd); |
1088 | return exceptions; | 1088 | return exceptions; |
1089 | 1089 | ||
1090 | vdm_nan: | 1090 | vdm_nan: |
@@ -1104,7 +1104,7 @@ static u32 vfp_double_fdiv(int dd, int dn, int dm, u32 fpscr) | |||
1104 | goto pack; | 1104 | goto pack; |
1105 | 1105 | ||
1106 | invalid: | 1106 | invalid: |
1107 | vfp_put_double(dd, vfp_double_pack(&vfp_double_default_qnan)); | 1107 | vfp_put_double(vfp_double_pack(&vfp_double_default_qnan), dd); |
1108 | return FPSCR_IOC; | 1108 | return FPSCR_IOC; |
1109 | } | 1109 | } |
1110 | 1110 | ||
@@ -1127,7 +1127,7 @@ u32 vfp_double_cpdo(u32 inst, u32 fpscr) | |||
1127 | { | 1127 | { |
1128 | u32 op = inst & FOP_MASK; | 1128 | u32 op = inst & FOP_MASK; |
1129 | u32 exceptions = 0; | 1129 | u32 exceptions = 0; |
1130 | unsigned int dd = vfp_get_dd(inst); | 1130 | unsigned int dest; |
1131 | unsigned int dn = vfp_get_dn(inst); | 1131 | unsigned int dn = vfp_get_dn(inst); |
1132 | unsigned int dm = vfp_get_dm(inst); | 1132 | unsigned int dm = vfp_get_dm(inst); |
1133 | unsigned int vecitr, veclen, vecstride; | 1133 | unsigned int vecitr, veclen, vecstride; |
@@ -1137,10 +1137,20 @@ u32 vfp_double_cpdo(u32 inst, u32 fpscr) | |||
1137 | vecstride = (1 + ((fpscr & FPSCR_STRIDE_MASK) == FPSCR_STRIDE_MASK)) * 2; | 1137 | vecstride = (1 + ((fpscr & FPSCR_STRIDE_MASK) == FPSCR_STRIDE_MASK)) * 2; |
1138 | 1138 | ||
1139 | /* | 1139 | /* |
1140 | * fcvtds takes an sN register number as destination, not dN. | ||
1141 | * It also always operates on scalars. | ||
1142 | */ | ||
1143 | if ((inst & FEXT_MASK) == FEXT_FCVT) { | ||
1144 | veclen = 0; | ||
1145 | dest = vfp_get_sd(inst); | ||
1146 | } else | ||
1147 | dest = vfp_get_dd(inst); | ||
1148 | |||
1149 | /* | ||
1140 | * If destination bank is zero, vector length is always '1'. | 1150 | * If destination bank is zero, vector length is always '1'. |
1141 | * ARM DDI0100F C5.1.3, C5.3.2. | 1151 | * ARM DDI0100F C5.1.3, C5.3.2. |
1142 | */ | 1152 | */ |
1143 | if (FREG_BANK(dd) == 0) | 1153 | if (FREG_BANK(dest) == 0) |
1144 | veclen = 0; | 1154 | veclen = 0; |
1145 | 1155 | ||
1146 | pr_debug("VFP: vecstride=%u veclen=%u\n", vecstride, | 1156 | pr_debug("VFP: vecstride=%u veclen=%u\n", vecstride, |
@@ -1153,16 +1163,20 @@ u32 vfp_double_cpdo(u32 inst, u32 fpscr) | |||
1153 | for (vecitr = 0; vecitr <= veclen; vecitr += 1 << FPSCR_LENGTH_BIT) { | 1163 | for (vecitr = 0; vecitr <= veclen; vecitr += 1 << FPSCR_LENGTH_BIT) { |
1154 | u32 except; | 1164 | u32 except; |
1155 | 1165 | ||
1156 | if (op == FOP_EXT) | 1166 | if (op == FOP_EXT && (inst & FEXT_MASK) == FEXT_FCVT) |
1167 | pr_debug("VFP: itr%d (s%u) = op[%u] (d%u)\n", | ||
1168 | vecitr >> FPSCR_LENGTH_BIT, | ||
1169 | dest, dn, dm); | ||
1170 | else if (op == FOP_EXT) | ||
1157 | pr_debug("VFP: itr%d (d%u) = op[%u] (d%u)\n", | 1171 | pr_debug("VFP: itr%d (d%u) = op[%u] (d%u)\n", |
1158 | vecitr >> FPSCR_LENGTH_BIT, | 1172 | vecitr >> FPSCR_LENGTH_BIT, |
1159 | dd, dn, dm); | 1173 | dest, dn, dm); |
1160 | else | 1174 | else |
1161 | pr_debug("VFP: itr%d (d%u) = (d%u) op[%u] (d%u)\n", | 1175 | pr_debug("VFP: itr%d (d%u) = (d%u) op[%u] (d%u)\n", |
1162 | vecitr >> FPSCR_LENGTH_BIT, | 1176 | vecitr >> FPSCR_LENGTH_BIT, |
1163 | dd, dn, FOP_TO_IDX(op), dm); | 1177 | dest, dn, FOP_TO_IDX(op), dm); |
1164 | 1178 | ||
1165 | except = fop(dd, dn, dm, fpscr); | 1179 | except = fop(dest, dn, dm, fpscr); |
1166 | pr_debug("VFP: itr%d: exceptions=%08x\n", | 1180 | pr_debug("VFP: itr%d: exceptions=%08x\n", |
1167 | vecitr >> FPSCR_LENGTH_BIT, except); | 1181 | vecitr >> FPSCR_LENGTH_BIT, except); |
1168 | 1182 | ||
@@ -1180,7 +1194,7 @@ u32 vfp_double_cpdo(u32 inst, u32 fpscr) | |||
1180 | * we encounter an exception. We continue. | 1194 | * we encounter an exception. We continue. |
1181 | */ | 1195 | */ |
1182 | 1196 | ||
1183 | dd = FREG_BANK(dd) + ((FREG_IDX(dd) + vecstride) & 6); | 1197 | dest = FREG_BANK(dest) + ((FREG_IDX(dest) + vecstride) & 6); |
1184 | dn = FREG_BANK(dn) + ((FREG_IDX(dn) + vecstride) & 6); | 1198 | dn = FREG_BANK(dn) + ((FREG_IDX(dn) + vecstride) & 6); |
1185 | if (FREG_BANK(dm) != 0) | 1199 | if (FREG_BANK(dm) != 0) |
1186 | dm = FREG_BANK(dm) + ((FREG_IDX(dm) + vecstride) & 6); | 1200 | dm = FREG_BANK(dm) + ((FREG_IDX(dm) + vecstride) & 6); |
diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S index eb683cd77163..e51e6679c402 100644 --- a/arch/arm/vfp/vfphw.S +++ b/arch/arm/vfp/vfphw.S | |||
@@ -178,12 +178,12 @@ vfp_get_float: | |||
178 | 178 | ||
179 | .globl vfp_put_float | 179 | .globl vfp_put_float |
180 | vfp_put_float: | 180 | vfp_put_float: |
181 | add pc, pc, r0, lsl #3 | 181 | add pc, pc, r1, lsl #3 |
182 | mov r0, r0 | 182 | mov r0, r0 |
183 | .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 | 183 | .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 |
184 | mcr p10, 0, r1, c\dr, c0, 0 @ fmsr r0, s0 | 184 | mcr p10, 0, r0, c\dr, c0, 0 @ fmsr r0, s0 |
185 | mov pc, lr | 185 | mov pc, lr |
186 | mcr p10, 0, r1, c\dr, c0, 4 @ fmsr r0, s1 | 186 | mcr p10, 0, r0, c\dr, c0, 4 @ fmsr r0, s1 |
187 | mov pc, lr | 187 | mov pc, lr |
188 | .endr | 188 | .endr |
189 | 189 | ||
@@ -203,9 +203,9 @@ vfp_get_double: | |||
203 | 203 | ||
204 | .globl vfp_put_double | 204 | .globl vfp_put_double |
205 | vfp_put_double: | 205 | vfp_put_double: |
206 | add pc, pc, r0, lsl #3 | 206 | add pc, pc, r2, lsl #3 |
207 | mov r0, r0 | 207 | mov r0, r0 |
208 | .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 | 208 | .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 |
209 | fmdrr d\dr, r1, r2 | 209 | fmdrr d\dr, r0, r1 |
210 | mov pc, lr | 210 | mov pc, lr |
211 | .endr | 211 | .endr |
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c index 9d265d5e748c..4178f6cc3d37 100644 --- a/arch/arm/vfp/vfpmodule.c +++ b/arch/arm/vfp/vfpmodule.c | |||
@@ -131,7 +131,7 @@ static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_ | |||
131 | 131 | ||
132 | pr_debug("VFP: raising exceptions %08x\n", exceptions); | 132 | pr_debug("VFP: raising exceptions %08x\n", exceptions); |
133 | 133 | ||
134 | if (exceptions == (u32)-1) { | 134 | if (exceptions == VFP_EXCEPTION_ERROR) { |
135 | vfp_panic("unhandled bounce"); | 135 | vfp_panic("unhandled bounce"); |
136 | vfp_raise_sigfpe(0, regs); | 136 | vfp_raise_sigfpe(0, regs); |
137 | return; | 137 | return; |
@@ -170,7 +170,7 @@ static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_ | |||
170 | */ | 170 | */ |
171 | static u32 vfp_emulate_instruction(u32 inst, u32 fpscr, struct pt_regs *regs) | 171 | static u32 vfp_emulate_instruction(u32 inst, u32 fpscr, struct pt_regs *regs) |
172 | { | 172 | { |
173 | u32 exceptions = (u32)-1; | 173 | u32 exceptions = VFP_EXCEPTION_ERROR; |
174 | 174 | ||
175 | pr_debug("VFP: emulate: INST=0x%08x SCR=0x%08x\n", inst, fpscr); | 175 | pr_debug("VFP: emulate: INST=0x%08x SCR=0x%08x\n", inst, fpscr); |
176 | 176 | ||
diff --git a/arch/arm/vfp/vfpsingle.c b/arch/arm/vfp/vfpsingle.c index dae2c2f46052..8f6c179cafbe 100644 --- a/arch/arm/vfp/vfpsingle.c +++ b/arch/arm/vfp/vfpsingle.c | |||
@@ -200,7 +200,7 @@ u32 vfp_single_normaliseround(int sd, struct vfp_single *vs, u32 fpscr, u32 exce | |||
200 | s32 d = vfp_single_pack(vs); | 200 | s32 d = vfp_single_pack(vs); |
201 | pr_debug("VFP: %s: d(s%d)=%08x exceptions=%08x\n", func, | 201 | pr_debug("VFP: %s: d(s%d)=%08x exceptions=%08x\n", func, |
202 | sd, d, exceptions); | 202 | sd, d, exceptions); |
203 | vfp_put_float(sd, d); | 203 | vfp_put_float(d, sd); |
204 | } | 204 | } |
205 | 205 | ||
206 | return exceptions; | 206 | return exceptions; |
@@ -257,19 +257,19 @@ vfp_propagate_nan(struct vfp_single *vsd, struct vfp_single *vsn, | |||
257 | */ | 257 | */ |
258 | static u32 vfp_single_fabs(int sd, int unused, s32 m, u32 fpscr) | 258 | static u32 vfp_single_fabs(int sd, int unused, s32 m, u32 fpscr) |
259 | { | 259 | { |
260 | vfp_put_float(sd, vfp_single_packed_abs(m)); | 260 | vfp_put_float(vfp_single_packed_abs(m), sd); |
261 | return 0; | 261 | return 0; |
262 | } | 262 | } |
263 | 263 | ||
264 | static u32 vfp_single_fcpy(int sd, int unused, s32 m, u32 fpscr) | 264 | static u32 vfp_single_fcpy(int sd, int unused, s32 m, u32 fpscr) |
265 | { | 265 | { |
266 | vfp_put_float(sd, m); | 266 | vfp_put_float(m, sd); |
267 | return 0; | 267 | return 0; |
268 | } | 268 | } |
269 | 269 | ||
270 | static u32 vfp_single_fneg(int sd, int unused, s32 m, u32 fpscr) | 270 | static u32 vfp_single_fneg(int sd, int unused, s32 m, u32 fpscr) |
271 | { | 271 | { |
272 | vfp_put_float(sd, vfp_single_packed_negate(m)); | 272 | vfp_put_float(vfp_single_packed_negate(m), sd); |
273 | return 0; | 273 | return 0; |
274 | } | 274 | } |
275 | 275 | ||
@@ -333,7 +333,7 @@ static u32 vfp_single_fsqrt(int sd, int unused, s32 m, u32 fpscr) | |||
333 | vsp = &vfp_single_default_qnan; | 333 | vsp = &vfp_single_default_qnan; |
334 | ret = FPSCR_IOC; | 334 | ret = FPSCR_IOC; |
335 | } | 335 | } |
336 | vfp_put_float(sd, vfp_single_pack(vsp)); | 336 | vfp_put_float(vfp_single_pack(vsp), sd); |
337 | return ret; | 337 | return ret; |
338 | } | 338 | } |
339 | 339 | ||
@@ -506,7 +506,7 @@ static u32 vfp_single_fcvtd(int dd, int unused, s32 m, u32 fpscr) | |||
506 | */ | 506 | */ |
507 | if (tm & (VFP_INFINITY|VFP_NAN)) { | 507 | if (tm & (VFP_INFINITY|VFP_NAN)) { |
508 | vdd.exponent = 2047; | 508 | vdd.exponent = 2047; |
509 | if (tm & VFP_NAN) | 509 | if (tm == VFP_QNAN) |
510 | vdd.significand |= VFP_DOUBLE_SIGNIFICAND_QNAN; | 510 | vdd.significand |= VFP_DOUBLE_SIGNIFICAND_QNAN; |
511 | goto pack_nan; | 511 | goto pack_nan; |
512 | } else if (tm & VFP_ZERO) | 512 | } else if (tm & VFP_ZERO) |
@@ -514,14 +514,10 @@ static u32 vfp_single_fcvtd(int dd, int unused, s32 m, u32 fpscr) | |||
514 | else | 514 | else |
515 | vdd.exponent = vsm.exponent + (1023 - 127); | 515 | vdd.exponent = vsm.exponent + (1023 - 127); |
516 | 516 | ||
517 | /* | ||
518 | * Technically, if bit 0 of dd is set, this is an invalid | ||
519 | * instruction. However, we ignore this for efficiency. | ||
520 | */ | ||
521 | return vfp_double_normaliseround(dd, &vdd, fpscr, exceptions, "fcvtd"); | 517 | return vfp_double_normaliseround(dd, &vdd, fpscr, exceptions, "fcvtd"); |
522 | 518 | ||
523 | pack_nan: | 519 | pack_nan: |
524 | vfp_put_double(dd, vfp_double_pack(&vdd)); | 520 | vfp_put_double(vfp_double_pack(&vdd), dd); |
525 | return exceptions; | 521 | return exceptions; |
526 | } | 522 | } |
527 | 523 | ||
@@ -617,7 +613,7 @@ static u32 vfp_single_ftoui(int sd, int unused, s32 m, u32 fpscr) | |||
617 | 613 | ||
618 | pr_debug("VFP: ftoui: d(s%d)=%08x exceptions=%08x\n", sd, d, exceptions); | 614 | pr_debug("VFP: ftoui: d(s%d)=%08x exceptions=%08x\n", sd, d, exceptions); |
619 | 615 | ||
620 | vfp_put_float(sd, d); | 616 | vfp_put_float(d, sd); |
621 | 617 | ||
622 | return exceptions; | 618 | return exceptions; |
623 | } | 619 | } |
@@ -696,7 +692,7 @@ static u32 vfp_single_ftosi(int sd, int unused, s32 m, u32 fpscr) | |||
696 | 692 | ||
697 | pr_debug("VFP: ftosi: d(s%d)=%08x exceptions=%08x\n", sd, d, exceptions); | 693 | pr_debug("VFP: ftosi: d(s%d)=%08x exceptions=%08x\n", sd, d, exceptions); |
698 | 694 | ||
699 | vfp_put_float(sd, (s32)d); | 695 | vfp_put_float((s32)d, sd); |
700 | 696 | ||
701 | return exceptions; | 697 | return exceptions; |
702 | } | 698 | } |
@@ -1131,7 +1127,7 @@ static u32 vfp_single_fdiv(int sd, int sn, s32 m, u32 fpscr) | |||
1131 | vsn_nan: | 1127 | vsn_nan: |
1132 | exceptions = vfp_propagate_nan(&vsd, &vsn, &vsm, fpscr); | 1128 | exceptions = vfp_propagate_nan(&vsd, &vsn, &vsm, fpscr); |
1133 | pack: | 1129 | pack: |
1134 | vfp_put_float(sd, vfp_single_pack(&vsd)); | 1130 | vfp_put_float(vfp_single_pack(&vsd), sd); |
1135 | return exceptions; | 1131 | return exceptions; |
1136 | 1132 | ||
1137 | vsm_nan: | 1133 | vsm_nan: |
@@ -1151,7 +1147,7 @@ static u32 vfp_single_fdiv(int sd, int sn, s32 m, u32 fpscr) | |||
1151 | goto pack; | 1147 | goto pack; |
1152 | 1148 | ||
1153 | invalid: | 1149 | invalid: |
1154 | vfp_put_float(sd, vfp_single_pack(&vfp_single_default_qnan)); | 1150 | vfp_put_float(vfp_single_pack(&vfp_single_default_qnan), sd); |
1155 | return FPSCR_IOC; | 1151 | return FPSCR_IOC; |
1156 | } | 1152 | } |
1157 | 1153 | ||
@@ -1174,7 +1170,7 @@ u32 vfp_single_cpdo(u32 inst, u32 fpscr) | |||
1174 | { | 1170 | { |
1175 | u32 op = inst & FOP_MASK; | 1171 | u32 op = inst & FOP_MASK; |
1176 | u32 exceptions = 0; | 1172 | u32 exceptions = 0; |
1177 | unsigned int sd = vfp_get_sd(inst); | 1173 | unsigned int dest; |
1178 | unsigned int sn = vfp_get_sn(inst); | 1174 | unsigned int sn = vfp_get_sn(inst); |
1179 | unsigned int sm = vfp_get_sm(inst); | 1175 | unsigned int sm = vfp_get_sm(inst); |
1180 | unsigned int vecitr, veclen, vecstride; | 1176 | unsigned int vecitr, veclen, vecstride; |
@@ -1184,10 +1180,22 @@ u32 vfp_single_cpdo(u32 inst, u32 fpscr) | |||
1184 | vecstride = 1 + ((fpscr & FPSCR_STRIDE_MASK) == FPSCR_STRIDE_MASK); | 1180 | vecstride = 1 + ((fpscr & FPSCR_STRIDE_MASK) == FPSCR_STRIDE_MASK); |
1185 | 1181 | ||
1186 | /* | 1182 | /* |
1183 | * fcvtsd takes a dN register number as destination, not sN. | ||
1184 | * Technically, if bit 0 of dd is set, this is an invalid | ||
1185 | * instruction. However, we ignore this for efficiency. | ||
1186 | * It also only operates on scalars. | ||
1187 | */ | ||
1188 | if ((inst & FEXT_MASK) == FEXT_FCVT) { | ||
1189 | veclen = 0; | ||
1190 | dest = vfp_get_dd(inst); | ||
1191 | } else | ||
1192 | dest = vfp_get_sd(inst); | ||
1193 | |||
1194 | /* | ||
1187 | * If destination bank is zero, vector length is always '1'. | 1195 | * If destination bank is zero, vector length is always '1'. |
1188 | * ARM DDI0100F C5.1.3, C5.3.2. | 1196 | * ARM DDI0100F C5.1.3, C5.3.2. |
1189 | */ | 1197 | */ |
1190 | if (FREG_BANK(sd) == 0) | 1198 | if (FREG_BANK(dest) == 0) |
1191 | veclen = 0; | 1199 | veclen = 0; |
1192 | 1200 | ||
1193 | pr_debug("VFP: vecstride=%u veclen=%u\n", vecstride, | 1201 | pr_debug("VFP: vecstride=%u veclen=%u\n", vecstride, |
@@ -1201,15 +1209,18 @@ u32 vfp_single_cpdo(u32 inst, u32 fpscr) | |||
1201 | s32 m = vfp_get_float(sm); | 1209 | s32 m = vfp_get_float(sm); |
1202 | u32 except; | 1210 | u32 except; |
1203 | 1211 | ||
1204 | if (op == FOP_EXT) | 1212 | if (op == FOP_EXT && (inst & FEXT_MASK) == FEXT_FCVT) |
1213 | pr_debug("VFP: itr%d (d%u) = op[%u] (s%u=%08x)\n", | ||
1214 | vecitr >> FPSCR_LENGTH_BIT, dest, sn, sm, m); | ||
1215 | else if (op == FOP_EXT) | ||
1205 | pr_debug("VFP: itr%d (s%u) = op[%u] (s%u=%08x)\n", | 1216 | pr_debug("VFP: itr%d (s%u) = op[%u] (s%u=%08x)\n", |
1206 | vecitr >> FPSCR_LENGTH_BIT, sd, sn, sm, m); | 1217 | vecitr >> FPSCR_LENGTH_BIT, dest, sn, sm, m); |
1207 | else | 1218 | else |
1208 | pr_debug("VFP: itr%d (s%u) = (s%u) op[%u] (s%u=%08x)\n", | 1219 | pr_debug("VFP: itr%d (s%u) = (s%u) op[%u] (s%u=%08x)\n", |
1209 | vecitr >> FPSCR_LENGTH_BIT, sd, sn, | 1220 | vecitr >> FPSCR_LENGTH_BIT, dest, sn, |
1210 | FOP_TO_IDX(op), sm, m); | 1221 | FOP_TO_IDX(op), sm, m); |
1211 | 1222 | ||
1212 | except = fop(sd, sn, m, fpscr); | 1223 | except = fop(dest, sn, m, fpscr); |
1213 | pr_debug("VFP: itr%d: exceptions=%08x\n", | 1224 | pr_debug("VFP: itr%d: exceptions=%08x\n", |
1214 | vecitr >> FPSCR_LENGTH_BIT, except); | 1225 | vecitr >> FPSCR_LENGTH_BIT, except); |
1215 | 1226 | ||
@@ -1227,7 +1238,7 @@ u32 vfp_single_cpdo(u32 inst, u32 fpscr) | |||
1227 | * we encounter an exception. We continue. | 1238 | * we encounter an exception. We continue. |
1228 | */ | 1239 | */ |
1229 | 1240 | ||
1230 | sd = FREG_BANK(sd) + ((FREG_IDX(sd) + vecstride) & 7); | 1241 | dest = FREG_BANK(dest) + ((FREG_IDX(dest) + vecstride) & 7); |
1231 | sn = FREG_BANK(sn) + ((FREG_IDX(sn) + vecstride) & 7); | 1242 | sn = FREG_BANK(sn) + ((FREG_IDX(sn) + vecstride) & 7); |
1232 | if (FREG_BANK(sm) != 0) | 1243 | if (FREG_BANK(sm) != 0) |
1233 | sm = FREG_BANK(sm) + ((FREG_IDX(sm) + vecstride) & 7); | 1244 | sm = FREG_BANK(sm) + ((FREG_IDX(sm) + vecstride) & 7); |
diff --git a/arch/i386/Kconfig b/arch/i386/Kconfig index daa75ce4b777..b2751eadbc56 100644 --- a/arch/i386/Kconfig +++ b/arch/i386/Kconfig | |||
@@ -142,6 +142,7 @@ config X86_SUMMIT | |||
142 | In particular, it is needed for the x440. | 142 | In particular, it is needed for the x440. |
143 | 143 | ||
144 | If you don't have one of these computers, you should say N here. | 144 | If you don't have one of these computers, you should say N here. |
145 | If you want to build a NUMA kernel, you must select ACPI. | ||
145 | 146 | ||
146 | config X86_BIGSMP | 147 | config X86_BIGSMP |
147 | bool "Support for other sub-arch SMP systems with more than 8 CPUs" | 148 | bool "Support for other sub-arch SMP systems with more than 8 CPUs" |
@@ -169,6 +170,7 @@ config X86_GENERICARCH | |||
169 | help | 170 | help |
170 | This option compiles in the Summit, bigsmp, ES7000, default subarchitectures. | 171 | This option compiles in the Summit, bigsmp, ES7000, default subarchitectures. |
171 | It is intended for a generic binary kernel. | 172 | It is intended for a generic binary kernel. |
173 | If you want a NUMA kernel, select ACPI. We need SRAT for NUMA. | ||
172 | 174 | ||
173 | config X86_ES7000 | 175 | config X86_ES7000 |
174 | bool "Support for Unisys ES7000 IA32 series" | 176 | bool "Support for Unisys ES7000 IA32 series" |
@@ -542,7 +544,7 @@ config X86_PAE | |||
542 | # Common NUMA Features | 544 | # Common NUMA Features |
543 | config NUMA | 545 | config NUMA |
544 | bool "Numa Memory Allocation and Scheduler Support" | 546 | bool "Numa Memory Allocation and Scheduler Support" |
545 | depends on SMP && HIGHMEM64G && (X86_NUMAQ || X86_GENERICARCH || (X86_SUMMIT && ACPI)) | 547 | depends on SMP && HIGHMEM64G && (X86_NUMAQ || (X86_SUMMIT || X86_GENERICARCH) && ACPI) |
546 | default n if X86_PC | 548 | default n if X86_PC |
547 | default y if (X86_NUMAQ || X86_SUMMIT) | 549 | default y if (X86_NUMAQ || X86_SUMMIT) |
548 | 550 | ||
@@ -672,7 +674,7 @@ config MTRR | |||
672 | See <file:Documentation/mtrr.txt> for more information. | 674 | See <file:Documentation/mtrr.txt> for more information. |
673 | 675 | ||
674 | config EFI | 676 | config EFI |
675 | bool "Boot from EFI support (EXPERIMENTAL)" | 677 | bool "Boot from EFI support" |
676 | depends on ACPI | 678 | depends on ACPI |
677 | default n | 679 | default n |
678 | ---help--- | 680 | ---help--- |
diff --git a/arch/i386/kernel/Makefile b/arch/i386/kernel/Makefile index 1b452a1665c4..ab98fc21a541 100644 --- a/arch/i386/kernel/Makefile +++ b/arch/i386/kernel/Makefile | |||
@@ -59,7 +59,8 @@ quiet_cmd_syscall = SYSCALL $@ | |||
59 | 59 | ||
60 | export CPPFLAGS_vsyscall.lds += -P -C -U$(ARCH) | 60 | export CPPFLAGS_vsyscall.lds += -P -C -U$(ARCH) |
61 | 61 | ||
62 | vsyscall-flags = -shared -s -Wl,-soname=linux-gate.so.1 | 62 | vsyscall-flags = -shared -s -Wl,-soname=linux-gate.so.1 \ |
63 | $(call ld-option, -Wl$(comma)--hash-style=sysv) | ||
63 | SYSCFLAGS_vsyscall-sysenter.so = $(vsyscall-flags) | 64 | SYSCFLAGS_vsyscall-sysenter.so = $(vsyscall-flags) |
64 | SYSCFLAGS_vsyscall-int80.so = $(vsyscall-flags) | 65 | SYSCFLAGS_vsyscall-int80.so = $(vsyscall-flags) |
65 | 66 | ||
diff --git a/arch/i386/kernel/acpi/boot.c b/arch/i386/kernel/acpi/boot.c index 0db6387025ca..ee003bc0e8b1 100644 --- a/arch/i386/kernel/acpi/boot.c +++ b/arch/i386/kernel/acpi/boot.c | |||
@@ -59,7 +59,7 @@ static inline int gsi_irq_sharing(int gsi) { return gsi; } | |||
59 | 59 | ||
60 | #define BAD_MADT_ENTRY(entry, end) ( \ | 60 | #define BAD_MADT_ENTRY(entry, end) ( \ |
61 | (!entry) || (unsigned long)entry + sizeof(*entry) > end || \ | 61 | (!entry) || (unsigned long)entry + sizeof(*entry) > end || \ |
62 | ((acpi_table_entry_header *)entry)->length != sizeof(*entry)) | 62 | ((acpi_table_entry_header *)entry)->length < sizeof(*entry)) |
63 | 63 | ||
64 | #define PREFIX "ACPI: " | 64 | #define PREFIX "ACPI: " |
65 | 65 | ||
diff --git a/arch/i386/kernel/acpi/wakeup.S b/arch/i386/kernel/acpi/wakeup.S index 9f408eee4e6f..b781b38131c0 100644 --- a/arch/i386/kernel/acpi/wakeup.S +++ b/arch/i386/kernel/acpi/wakeup.S | |||
@@ -292,7 +292,10 @@ ENTRY(do_suspend_lowlevel) | |||
292 | pushl $3 | 292 | pushl $3 |
293 | call acpi_enter_sleep_state | 293 | call acpi_enter_sleep_state |
294 | addl $4, %esp | 294 | addl $4, %esp |
295 | ret | 295 | |
296 | # In case of S3 failure, we'll emerge here. Jump | ||
297 | # to ret_point to recover | ||
298 | jmp ret_point | ||
296 | .p2align 4,,7 | 299 | .p2align 4,,7 |
297 | ret_point: | 300 | ret_point: |
298 | call restore_registers | 301 | call restore_registers |
diff --git a/arch/i386/kernel/cpu/cpufreq/Kconfig b/arch/i386/kernel/cpu/cpufreq/Kconfig index e44a4c6a4fe5..ccc1edff5c97 100644 --- a/arch/i386/kernel/cpu/cpufreq/Kconfig +++ b/arch/i386/kernel/cpu/cpufreq/Kconfig | |||
@@ -96,6 +96,7 @@ config X86_POWERNOW_K8_ACPI | |||
96 | 96 | ||
97 | config X86_GX_SUSPMOD | 97 | config X86_GX_SUSPMOD |
98 | tristate "Cyrix MediaGX/NatSemi Geode Suspend Modulation" | 98 | tristate "Cyrix MediaGX/NatSemi Geode Suspend Modulation" |
99 | depends on PCI | ||
99 | help | 100 | help |
100 | This add the CPUFreq driver for NatSemi Geode processors which | 101 | This add the CPUFreq driver for NatSemi Geode processors which |
101 | support suspend modulation. | 102 | support suspend modulation. |
@@ -202,7 +203,7 @@ config X86_LONGRUN | |||
202 | config X86_LONGHAUL | 203 | config X86_LONGHAUL |
203 | tristate "VIA Cyrix III Longhaul" | 204 | tristate "VIA Cyrix III Longhaul" |
204 | select CPU_FREQ_TABLE | 205 | select CPU_FREQ_TABLE |
205 | depends on BROKEN | 206 | depends on ACPI_PROCESSOR |
206 | help | 207 | help |
207 | This adds the CPUFreq driver for VIA Samuel/CyrixIII, | 208 | This adds the CPUFreq driver for VIA Samuel/CyrixIII, |
208 | VIA Cyrix Samuel/C3, VIA Cyrix Ezra and VIA Cyrix Ezra-T | 209 | VIA Cyrix Samuel/C3, VIA Cyrix Ezra and VIA Cyrix Ezra-T |
diff --git a/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c b/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c index 567b39bea07e..e6ea00edcb54 100644 --- a/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c +++ b/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c | |||
@@ -384,8 +384,7 @@ static int acpi_cpufreq_early_init_acpi(void) | |||
384 | } | 384 | } |
385 | 385 | ||
386 | /* Do initialization in ACPI core */ | 386 | /* Do initialization in ACPI core */ |
387 | acpi_processor_preregister_performance(acpi_perf_data); | 387 | return acpi_processor_preregister_performance(acpi_perf_data); |
388 | return 0; | ||
389 | } | 388 | } |
390 | 389 | ||
391 | static int | 390 | static int |
@@ -568,16 +567,11 @@ static struct cpufreq_driver acpi_cpufreq_driver = { | |||
568 | static int __init | 567 | static int __init |
569 | acpi_cpufreq_init (void) | 568 | acpi_cpufreq_init (void) |
570 | { | 569 | { |
571 | int result = 0; | ||
572 | |||
573 | dprintk("acpi_cpufreq_init\n"); | 570 | dprintk("acpi_cpufreq_init\n"); |
574 | 571 | ||
575 | result = acpi_cpufreq_early_init_acpi(); | 572 | acpi_cpufreq_early_init_acpi(); |
576 | 573 | ||
577 | if (!result) | 574 | return cpufreq_register_driver(&acpi_cpufreq_driver); |
578 | result = cpufreq_register_driver(&acpi_cpufreq_driver); | ||
579 | |||
580 | return (result); | ||
581 | } | 575 | } |
582 | 576 | ||
583 | 577 | ||
diff --git a/arch/i386/kernel/cpu/cpufreq/longhaul.c b/arch/i386/kernel/cpu/cpufreq/longhaul.c index 146f607e9c44..4f2c3aeef724 100644 --- a/arch/i386/kernel/cpu/cpufreq/longhaul.c +++ b/arch/i386/kernel/cpu/cpufreq/longhaul.c | |||
@@ -29,11 +29,13 @@ | |||
29 | #include <linux/cpufreq.h> | 29 | #include <linux/cpufreq.h> |
30 | #include <linux/slab.h> | 30 | #include <linux/slab.h> |
31 | #include <linux/string.h> | 31 | #include <linux/string.h> |
32 | #include <linux/pci.h> | ||
33 | 32 | ||
34 | #include <asm/msr.h> | 33 | #include <asm/msr.h> |
35 | #include <asm/timex.h> | 34 | #include <asm/timex.h> |
36 | #include <asm/io.h> | 35 | #include <asm/io.h> |
36 | #include <asm/acpi.h> | ||
37 | #include <linux/acpi.h> | ||
38 | #include <acpi/processor.h> | ||
37 | 39 | ||
38 | #include "longhaul.h" | 40 | #include "longhaul.h" |
39 | 41 | ||
@@ -56,6 +58,8 @@ static int minvid, maxvid; | |||
56 | static unsigned int minmult, maxmult; | 58 | static unsigned int minmult, maxmult; |
57 | static int can_scale_voltage; | 59 | static int can_scale_voltage; |
58 | static int vrmrev; | 60 | static int vrmrev; |
61 | static struct acpi_processor *pr = NULL; | ||
62 | static struct acpi_processor_cx *cx = NULL; | ||
59 | 63 | ||
60 | /* Module parameters */ | 64 | /* Module parameters */ |
61 | static int dont_scale_voltage; | 65 | static int dont_scale_voltage; |
@@ -118,84 +122,65 @@ static int longhaul_get_cpu_mult(void) | |||
118 | return eblcr_table[invalue]; | 122 | return eblcr_table[invalue]; |
119 | } | 123 | } |
120 | 124 | ||
125 | /* For processor with BCR2 MSR */ | ||
121 | 126 | ||
122 | static void do_powersaver(union msr_longhaul *longhaul, | 127 | static void do_longhaul1(int cx_address, unsigned int clock_ratio_index) |
123 | unsigned int clock_ratio_index) | ||
124 | { | 128 | { |
125 | struct pci_dev *dev; | 129 | union msr_bcr2 bcr2; |
126 | unsigned long flags; | 130 | u32 t; |
127 | unsigned int tmp_mask; | ||
128 | int version; | ||
129 | int i; | ||
130 | u16 pci_cmd; | ||
131 | u16 cmd_state[64]; | ||
132 | 131 | ||
133 | switch (cpu_model) { | 132 | rdmsrl(MSR_VIA_BCR2, bcr2.val); |
134 | case CPU_EZRA_T: | 133 | /* Enable software clock multiplier */ |
135 | version = 3; | 134 | bcr2.bits.ESOFTBF = 1; |
136 | break; | 135 | bcr2.bits.CLOCKMUL = clock_ratio_index; |
137 | case CPU_NEHEMIAH: | ||
138 | version = 0xf; | ||
139 | break; | ||
140 | default: | ||
141 | return; | ||
142 | } | ||
143 | 136 | ||
144 | rdmsrl(MSR_VIA_LONGHAUL, longhaul->val); | 137 | /* Sync to timer tick */ |
145 | longhaul->bits.SoftBusRatio = clock_ratio_index & 0xf; | 138 | safe_halt(); |
146 | longhaul->bits.SoftBusRatio4 = (clock_ratio_index & 0x10) >> 4; | 139 | ACPI_FLUSH_CPU_CACHE(); |
147 | longhaul->bits.EnableSoftBusRatio = 1; | 140 | /* Change frequency on next halt or sleep */ |
148 | longhaul->bits.RevisionKey = 0; | 141 | wrmsrl(MSR_VIA_BCR2, bcr2.val); |
142 | /* Invoke C3 */ | ||
143 | inb(cx_address); | ||
144 | /* Dummy op - must do something useless after P_LVL3 read */ | ||
145 | t = inl(acpi_fadt.xpm_tmr_blk.address); | ||
146 | |||
147 | /* Disable software clock multiplier */ | ||
148 | local_irq_disable(); | ||
149 | rdmsrl(MSR_VIA_BCR2, bcr2.val); | ||
150 | bcr2.bits.ESOFTBF = 0; | ||
151 | wrmsrl(MSR_VIA_BCR2, bcr2.val); | ||
152 | } | ||
149 | 153 | ||
150 | preempt_disable(); | 154 | /* For processor with Longhaul MSR */ |
151 | local_irq_save(flags); | ||
152 | 155 | ||
153 | /* | 156 | static void do_powersaver(int cx_address, unsigned int clock_ratio_index) |
154 | * get current pci bus master state for all devices | 157 | { |
155 | * and clear bus master bit | 158 | union msr_longhaul longhaul; |
156 | */ | 159 | u32 t; |
157 | dev = NULL; | ||
158 | i = 0; | ||
159 | do { | ||
160 | dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev); | ||
161 | if (dev != NULL) { | ||
162 | pci_read_config_word(dev, PCI_COMMAND, &pci_cmd); | ||
163 | cmd_state[i++] = pci_cmd; | ||
164 | pci_cmd &= ~PCI_COMMAND_MASTER; | ||
165 | pci_write_config_word(dev, PCI_COMMAND, pci_cmd); | ||
166 | } | ||
167 | } while (dev != NULL); | ||
168 | 160 | ||
169 | tmp_mask=inb(0x21); /* works on C3. save mask. */ | 161 | rdmsrl(MSR_VIA_LONGHAUL, longhaul.val); |
170 | outb(0xFE,0x21); /* TMR0 only */ | 162 | longhaul.bits.RevisionKey = longhaul.bits.RevisionID; |
171 | outb(0xFF,0x80); /* delay */ | 163 | longhaul.bits.SoftBusRatio = clock_ratio_index & 0xf; |
164 | longhaul.bits.SoftBusRatio4 = (clock_ratio_index & 0x10) >> 4; | ||
165 | longhaul.bits.EnableSoftBusRatio = 1; | ||
172 | 166 | ||
167 | /* Sync to timer tick */ | ||
173 | safe_halt(); | 168 | safe_halt(); |
174 | wrmsrl(MSR_VIA_LONGHAUL, longhaul->val); | 169 | ACPI_FLUSH_CPU_CACHE(); |
175 | halt(); | 170 | /* Change frequency on next halt or sleep */ |
176 | 171 | wrmsrl(MSR_VIA_LONGHAUL, longhaul.val); | |
172 | /* Invoke C3 */ | ||
173 | inb(cx_address); | ||
174 | /* Dummy op - must do something useless after P_LVL3 read */ | ||
175 | t = inl(acpi_fadt.xpm_tmr_blk.address); | ||
176 | |||
177 | /* Disable bus ratio bit */ | ||
177 | local_irq_disable(); | 178 | local_irq_disable(); |
178 | 179 | longhaul.bits.RevisionKey = longhaul.bits.RevisionID; | |
179 | outb(tmp_mask,0x21); /* restore mask */ | 180 | longhaul.bits.EnableSoftBusRatio = 0; |
180 | 181 | longhaul.bits.EnableSoftBSEL = 0; | |
181 | /* restore pci bus master state for all devices */ | 182 | longhaul.bits.EnableSoftVID = 0; |
182 | dev = NULL; | 183 | wrmsrl(MSR_VIA_LONGHAUL, longhaul.val); |
183 | i = 0; | ||
184 | do { | ||
185 | dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev); | ||
186 | if (dev != NULL) { | ||
187 | pci_cmd = cmd_state[i++]; | ||
188 | pci_write_config_byte(dev, PCI_COMMAND, pci_cmd); | ||
189 | } | ||
190 | } while (dev != NULL); | ||
191 | local_irq_restore(flags); | ||
192 | preempt_enable(); | ||
193 | |||
194 | /* disable bus ratio bit */ | ||
195 | rdmsrl(MSR_VIA_LONGHAUL, longhaul->val); | ||
196 | longhaul->bits.EnableSoftBusRatio = 0; | ||
197 | longhaul->bits.RevisionKey = version; | ||
198 | wrmsrl(MSR_VIA_LONGHAUL, longhaul->val); | ||
199 | } | 184 | } |
200 | 185 | ||
201 | /** | 186 | /** |
@@ -209,9 +194,9 @@ static void longhaul_setstate(unsigned int clock_ratio_index) | |||
209 | { | 194 | { |
210 | int speed, mult; | 195 | int speed, mult; |
211 | struct cpufreq_freqs freqs; | 196 | struct cpufreq_freqs freqs; |
212 | union msr_longhaul longhaul; | ||
213 | union msr_bcr2 bcr2; | ||
214 | static unsigned int old_ratio=-1; | 197 | static unsigned int old_ratio=-1; |
198 | unsigned long flags; | ||
199 | unsigned int pic1_mask, pic2_mask; | ||
215 | 200 | ||
216 | if (old_ratio == clock_ratio_index) | 201 | if (old_ratio == clock_ratio_index) |
217 | return; | 202 | return; |
@@ -234,6 +219,20 @@ static void longhaul_setstate(unsigned int clock_ratio_index) | |||
234 | dprintk ("Setting to FSB:%dMHz Mult:%d.%dx (%s)\n", | 219 | dprintk ("Setting to FSB:%dMHz Mult:%d.%dx (%s)\n", |
235 | fsb, mult/10, mult%10, print_speed(speed/1000)); | 220 | fsb, mult/10, mult%10, print_speed(speed/1000)); |
236 | 221 | ||
222 | preempt_disable(); | ||
223 | local_irq_save(flags); | ||
224 | |||
225 | pic2_mask = inb(0xA1); | ||
226 | pic1_mask = inb(0x21); /* works on C3. save mask. */ | ||
227 | outb(0xFF,0xA1); /* Overkill */ | ||
228 | outb(0xFE,0x21); /* TMR0 only */ | ||
229 | |||
230 | /* Disable bus master arbitration */ | ||
231 | if (pr->flags.bm_check) { | ||
232 | acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1, | ||
233 | ACPI_MTX_DO_NOT_LOCK); | ||
234 | } | ||
235 | |||
237 | switch (longhaul_version) { | 236 | switch (longhaul_version) { |
238 | 237 | ||
239 | /* | 238 | /* |
@@ -245,20 +244,7 @@ static void longhaul_setstate(unsigned int clock_ratio_index) | |||
245 | */ | 244 | */ |
246 | case TYPE_LONGHAUL_V1: | 245 | case TYPE_LONGHAUL_V1: |
247 | case TYPE_LONGHAUL_V2: | 246 | case TYPE_LONGHAUL_V2: |
248 | rdmsrl (MSR_VIA_BCR2, bcr2.val); | 247 | do_longhaul1(cx->address, clock_ratio_index); |
249 | /* Enable software clock multiplier */ | ||
250 | bcr2.bits.ESOFTBF = 1; | ||
251 | bcr2.bits.CLOCKMUL = clock_ratio_index; | ||
252 | local_irq_disable(); | ||
253 | wrmsrl (MSR_VIA_BCR2, bcr2.val); | ||
254 | safe_halt(); | ||
255 | |||
256 | /* Disable software clock multiplier */ | ||
257 | rdmsrl (MSR_VIA_BCR2, bcr2.val); | ||
258 | bcr2.bits.ESOFTBF = 0; | ||
259 | local_irq_disable(); | ||
260 | wrmsrl (MSR_VIA_BCR2, bcr2.val); | ||
261 | local_irq_enable(); | ||
262 | break; | 248 | break; |
263 | 249 | ||
264 | /* | 250 | /* |
@@ -273,10 +259,22 @@ static void longhaul_setstate(unsigned int clock_ratio_index) | |||
273 | * to work in practice. | 259 | * to work in practice. |
274 | */ | 260 | */ |
275 | case TYPE_POWERSAVER: | 261 | case TYPE_POWERSAVER: |
276 | do_powersaver(&longhaul, clock_ratio_index); | 262 | do_powersaver(cx->address, clock_ratio_index); |
277 | break; | 263 | break; |
278 | } | 264 | } |
279 | 265 | ||
266 | /* Enable bus master arbitration */ | ||
267 | if (pr->flags.bm_check) { | ||
268 | acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0, | ||
269 | ACPI_MTX_DO_NOT_LOCK); | ||
270 | } | ||
271 | |||
272 | outb(pic2_mask,0xA1); /* restore mask */ | ||
273 | outb(pic1_mask,0x21); | ||
274 | |||
275 | local_irq_restore(flags); | ||
276 | preempt_enable(); | ||
277 | |||
280 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | 278 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); |
281 | } | 279 | } |
282 | 280 | ||
@@ -324,9 +322,11 @@ static int guess_fsb(void) | |||
324 | static int __init longhaul_get_ranges(void) | 322 | static int __init longhaul_get_ranges(void) |
325 | { | 323 | { |
326 | unsigned long invalue; | 324 | unsigned long invalue; |
327 | unsigned int multipliers[32]= { | 325 | unsigned int ezra_t_multipliers[32]= { |
328 | 50,30,40,100,55,35,45,95,90,70,80,60,120,75,85,65, | 326 | 90, 30, 40, 100, 55, 35, 45, 95, |
329 | -1,110,120,-1,135,115,125,105,130,150,160,140,-1,155,-1,145 }; | 327 | 50, 70, 80, 60, 120, 75, 85, 65, |
328 | -1, 110, 120, -1, 135, 115, 125, 105, | ||
329 | 130, 150, 160, 140, -1, 155, -1, 145 }; | ||
330 | unsigned int j, k = 0; | 330 | unsigned int j, k = 0; |
331 | union msr_longhaul longhaul; | 331 | union msr_longhaul longhaul; |
332 | unsigned long lo, hi; | 332 | unsigned long lo, hi; |
@@ -355,13 +355,13 @@ static int __init longhaul_get_ranges(void) | |||
355 | invalue = longhaul.bits.MaxMHzBR; | 355 | invalue = longhaul.bits.MaxMHzBR; |
356 | if (longhaul.bits.MaxMHzBR4) | 356 | if (longhaul.bits.MaxMHzBR4) |
357 | invalue += 16; | 357 | invalue += 16; |
358 | maxmult=multipliers[invalue]; | 358 | maxmult=ezra_t_multipliers[invalue]; |
359 | 359 | ||
360 | invalue = longhaul.bits.MinMHzBR; | 360 | invalue = longhaul.bits.MinMHzBR; |
361 | if (longhaul.bits.MinMHzBR4 == 1) | 361 | if (longhaul.bits.MinMHzBR4 == 1) |
362 | minmult = 30; | 362 | minmult = 30; |
363 | else | 363 | else |
364 | minmult = multipliers[invalue]; | 364 | minmult = ezra_t_multipliers[invalue]; |
365 | fsb = eblcr_fsb_table_v2[longhaul.bits.MaxMHzFSB]; | 365 | fsb = eblcr_fsb_table_v2[longhaul.bits.MaxMHzFSB]; |
366 | break; | 366 | break; |
367 | } | 367 | } |
@@ -527,6 +527,18 @@ static unsigned int longhaul_get(unsigned int cpu) | |||
527 | return calc_speed(longhaul_get_cpu_mult()); | 527 | return calc_speed(longhaul_get_cpu_mult()); |
528 | } | 528 | } |
529 | 529 | ||
530 | static acpi_status longhaul_walk_callback(acpi_handle obj_handle, | ||
531 | u32 nesting_level, | ||
532 | void *context, void **return_value) | ||
533 | { | ||
534 | struct acpi_device *d; | ||
535 | |||
536 | if ( acpi_bus_get_device(obj_handle, &d) ) { | ||
537 | return 0; | ||
538 | } | ||
539 | *return_value = (void *)acpi_driver_data(d); | ||
540 | return 1; | ||
541 | } | ||
530 | 542 | ||
531 | static int __init longhaul_cpu_init(struct cpufreq_policy *policy) | 543 | static int __init longhaul_cpu_init(struct cpufreq_policy *policy) |
532 | { | 544 | { |
@@ -534,6 +546,15 @@ static int __init longhaul_cpu_init(struct cpufreq_policy *policy) | |||
534 | char *cpuname=NULL; | 546 | char *cpuname=NULL; |
535 | int ret; | 547 | int ret; |
536 | 548 | ||
549 | /* Check ACPI support for C3 state */ | ||
550 | acpi_walk_namespace(ACPI_TYPE_PROCESSOR, ACPI_ROOT_OBJECT, ACPI_UINT32_MAX, | ||
551 | &longhaul_walk_callback, NULL, (void *)&pr); | ||
552 | if (pr == NULL) goto err_acpi; | ||
553 | |||
554 | cx = &pr->power.states[ACPI_STATE_C3]; | ||
555 | if (cx->address == 0 || cx->latency > 1000) goto err_acpi; | ||
556 | |||
557 | /* Now check what we have on this motherboard */ | ||
537 | switch (c->x86_model) { | 558 | switch (c->x86_model) { |
538 | case 6: | 559 | case 6: |
539 | cpu_model = CPU_SAMUEL; | 560 | cpu_model = CPU_SAMUEL; |
@@ -634,6 +655,10 @@ static int __init longhaul_cpu_init(struct cpufreq_policy *policy) | |||
634 | cpufreq_frequency_table_get_attr(longhaul_table, policy->cpu); | 655 | cpufreq_frequency_table_get_attr(longhaul_table, policy->cpu); |
635 | 656 | ||
636 | return 0; | 657 | return 0; |
658 | |||
659 | err_acpi: | ||
660 | printk(KERN_ERR PFX "No ACPI support for CPU frequency changes.\n"); | ||
661 | return -ENODEV; | ||
637 | } | 662 | } |
638 | 663 | ||
639 | static int __devexit longhaul_cpu_exit(struct cpufreq_policy *policy) | 664 | static int __devexit longhaul_cpu_exit(struct cpufreq_policy *policy) |
@@ -666,6 +691,18 @@ static int __init longhaul_init(void) | |||
666 | if (c->x86_vendor != X86_VENDOR_CENTAUR || c->x86 != 6) | 691 | if (c->x86_vendor != X86_VENDOR_CENTAUR || c->x86 != 6) |
667 | return -ENODEV; | 692 | return -ENODEV; |
668 | 693 | ||
694 | #ifdef CONFIG_SMP | ||
695 | if (num_online_cpus() > 1) { | ||
696 | return -ENODEV; | ||
697 | printk(KERN_ERR PFX "More than 1 CPU detected, longhaul disabled.\n"); | ||
698 | } | ||
699 | #endif | ||
700 | #ifdef CONFIG_X86_IO_APIC | ||
701 | if (cpu_has_apic) { | ||
702 | printk(KERN_ERR PFX "APIC detected. Longhaul is currently broken in this configuration.\n"); | ||
703 | return -ENODEV; | ||
704 | } | ||
705 | #endif | ||
669 | switch (c->x86_model) { | 706 | switch (c->x86_model) { |
670 | case 6 ... 9: | 707 | case 6 ... 9: |
671 | return cpufreq_register_driver(&longhaul_driver); | 708 | return cpufreq_register_driver(&longhaul_driver); |
@@ -699,6 +736,6 @@ MODULE_AUTHOR ("Dave Jones <davej@codemonkey.org.uk>"); | |||
699 | MODULE_DESCRIPTION ("Longhaul driver for VIA Cyrix processors."); | 736 | MODULE_DESCRIPTION ("Longhaul driver for VIA Cyrix processors."); |
700 | MODULE_LICENSE ("GPL"); | 737 | MODULE_LICENSE ("GPL"); |
701 | 738 | ||
702 | module_init(longhaul_init); | 739 | late_initcall(longhaul_init); |
703 | module_exit(longhaul_exit); | 740 | module_exit(longhaul_exit); |
704 | 741 | ||
diff --git a/arch/i386/kernel/cpu/intel_cacheinfo.c b/arch/i386/kernel/cpu/intel_cacheinfo.c index e9f0b928b0a9..5c43be47587f 100644 --- a/arch/i386/kernel/cpu/intel_cacheinfo.c +++ b/arch/i386/kernel/cpu/intel_cacheinfo.c | |||
@@ -759,7 +759,7 @@ static int __cpuinit cache_sysfs_init(void) | |||
759 | if (num_cache_leaves == 0) | 759 | if (num_cache_leaves == 0) |
760 | return 0; | 760 | return 0; |
761 | 761 | ||
762 | register_cpu_notifier(&cacheinfo_cpu_notifier); | 762 | register_hotcpu_notifier(&cacheinfo_cpu_notifier); |
763 | 763 | ||
764 | for_each_online_cpu(i) { | 764 | for_each_online_cpu(i) { |
765 | cacheinfo_cpu_callback(&cacheinfo_cpu_notifier, CPU_ONLINE, | 765 | cacheinfo_cpu_callback(&cacheinfo_cpu_notifier, CPU_ONLINE, |
diff --git a/arch/i386/kernel/cpu/mcheck/mce.h b/arch/i386/kernel/cpu/mcheck/mce.h index dc2416dfef15..84fd4cf7d0fb 100644 --- a/arch/i386/kernel/cpu/mcheck/mce.h +++ b/arch/i386/kernel/cpu/mcheck/mce.h | |||
@@ -9,6 +9,6 @@ void winchip_mcheck_init(struct cpuinfo_x86 *c); | |||
9 | /* Call the installed machine check handler for this CPU setup. */ | 9 | /* Call the installed machine check handler for this CPU setup. */ |
10 | extern fastcall void (*machine_check_vector)(struct pt_regs *, long error_code); | 10 | extern fastcall void (*machine_check_vector)(struct pt_regs *, long error_code); |
11 | 11 | ||
12 | extern int mce_disabled __initdata; | 12 | extern int mce_disabled; |
13 | extern int nr_mce_banks; | 13 | extern int nr_mce_banks; |
14 | 14 | ||
diff --git a/arch/i386/kernel/entry.S b/arch/i386/kernel/entry.S index d9a260f2efb4..37a7d2eaf4a0 100644 --- a/arch/i386/kernel/entry.S +++ b/arch/i386/kernel/entry.S | |||
@@ -204,7 +204,7 @@ VM_MASK = 0x00020000 | |||
204 | ENTRY(ret_from_fork) | 204 | ENTRY(ret_from_fork) |
205 | CFI_STARTPROC | 205 | CFI_STARTPROC |
206 | pushl %eax | 206 | pushl %eax |
207 | CFI_ADJUST_CFA_OFFSET -4 | 207 | CFI_ADJUST_CFA_OFFSET 4 |
208 | call schedule_tail | 208 | call schedule_tail |
209 | GET_THREAD_INFO(%ebp) | 209 | GET_THREAD_INFO(%ebp) |
210 | popl %eax | 210 | popl %eax |
diff --git a/arch/i386/kernel/head.S b/arch/i386/kernel/head.S index eb79aa2fa8bb..a6b8bd89aa27 100644 --- a/arch/i386/kernel/head.S +++ b/arch/i386/kernel/head.S | |||
@@ -317,20 +317,14 @@ is386: movl $2,%ecx # set MP | |||
317 | movl %eax,%gs | 317 | movl %eax,%gs |
318 | lldt %ax | 318 | lldt %ax |
319 | cld # gcc2 wants the direction flag cleared at all times | 319 | cld # gcc2 wants the direction flag cleared at all times |
320 | pushl %eax # fake return address | ||
320 | #ifdef CONFIG_SMP | 321 | #ifdef CONFIG_SMP |
321 | movb ready, %cl | 322 | movb ready, %cl |
322 | movb $1, ready | 323 | movb $1, ready |
323 | cmpb $0,%cl | 324 | cmpb $0,%cl # the first CPU calls start_kernel |
324 | je 1f # the first CPU calls start_kernel | 325 | jne initialize_secondary # all other CPUs call initialize_secondary |
325 | # all other CPUs call initialize_secondary | ||
326 | call initialize_secondary | ||
327 | jmp L6 | ||
328 | 1: | ||
329 | #endif /* CONFIG_SMP */ | 326 | #endif /* CONFIG_SMP */ |
330 | call start_kernel | 327 | jmp start_kernel |
331 | L6: | ||
332 | jmp L6 # main should never return here, but | ||
333 | # just in case, we know what happens. | ||
334 | 328 | ||
335 | /* | 329 | /* |
336 | * We depend on ET to be correct. This checks for 287/387. | 330 | * We depend on ET to be correct. This checks for 287/387. |
diff --git a/arch/i386/kernel/hpet.c b/arch/i386/kernel/hpet.c index c6737c35815d..17647a530b2f 100644 --- a/arch/i386/kernel/hpet.c +++ b/arch/i386/kernel/hpet.c | |||
@@ -35,7 +35,7 @@ static int __init init_hpet_clocksource(void) | |||
35 | void __iomem* hpet_base; | 35 | void __iomem* hpet_base; |
36 | u64 tmp; | 36 | u64 tmp; |
37 | 37 | ||
38 | if (!hpet_address) | 38 | if (!is_hpet_enabled()) |
39 | return -ENODEV; | 39 | return -ENODEV; |
40 | 40 | ||
41 | /* calculate the hpet address: */ | 41 | /* calculate the hpet address: */ |
diff --git a/arch/i386/kernel/irq.c b/arch/i386/kernel/irq.c index 6cb529f60dcc..5fe547cd8f9f 100644 --- a/arch/i386/kernel/irq.c +++ b/arch/i386/kernel/irq.c | |||
@@ -82,10 +82,6 @@ fastcall unsigned int do_IRQ(struct pt_regs *regs) | |||
82 | } | 82 | } |
83 | #endif | 83 | #endif |
84 | 84 | ||
85 | if (!irq_desc[irq].handle_irq) { | ||
86 | __do_IRQ(irq, regs); | ||
87 | goto out_exit; | ||
88 | } | ||
89 | #ifdef CONFIG_4KSTACKS | 85 | #ifdef CONFIG_4KSTACKS |
90 | 86 | ||
91 | curctx = (union irq_ctx *) current_thread_info(); | 87 | curctx = (union irq_ctx *) current_thread_info(); |
@@ -125,7 +121,6 @@ fastcall unsigned int do_IRQ(struct pt_regs *regs) | |||
125 | #endif | 121 | #endif |
126 | __do_IRQ(irq, regs); | 122 | __do_IRQ(irq, regs); |
127 | 123 | ||
128 | out_exit: | ||
129 | irq_exit(); | 124 | irq_exit(); |
130 | 125 | ||
131 | return 1; | 126 | return 1; |
diff --git a/arch/i386/kernel/kprobes.c b/arch/i386/kernel/kprobes.c index de2e16e561c0..afe6505ca0b3 100644 --- a/arch/i386/kernel/kprobes.c +++ b/arch/i386/kernel/kprobes.c | |||
@@ -256,11 +256,6 @@ static int __kprobes kprobe_handler(struct pt_regs *regs) | |||
256 | int ret = 0; | 256 | int ret = 0; |
257 | kprobe_opcode_t *addr; | 257 | kprobe_opcode_t *addr; |
258 | struct kprobe_ctlblk *kcb; | 258 | struct kprobe_ctlblk *kcb; |
259 | #ifdef CONFIG_PREEMPT | ||
260 | unsigned pre_preempt_count = preempt_count(); | ||
261 | #else | ||
262 | unsigned pre_preempt_count = 1; | ||
263 | #endif | ||
264 | 259 | ||
265 | addr = (kprobe_opcode_t *)(regs->eip - sizeof(kprobe_opcode_t)); | 260 | addr = (kprobe_opcode_t *)(regs->eip - sizeof(kprobe_opcode_t)); |
266 | 261 | ||
@@ -338,13 +333,15 @@ static int __kprobes kprobe_handler(struct pt_regs *regs) | |||
338 | return 1; | 333 | return 1; |
339 | 334 | ||
340 | ss_probe: | 335 | ss_probe: |
341 | if (pre_preempt_count && p->ainsn.boostable == 1 && !p->post_handler){ | 336 | #ifndef CONFIG_PREEMPT |
337 | if (p->ainsn.boostable == 1 && !p->post_handler){ | ||
342 | /* Boost up -- we can execute copied instructions directly */ | 338 | /* Boost up -- we can execute copied instructions directly */ |
343 | reset_current_kprobe(); | 339 | reset_current_kprobe(); |
344 | regs->eip = (unsigned long)p->ainsn.insn; | 340 | regs->eip = (unsigned long)p->ainsn.insn; |
345 | preempt_enable_no_resched(); | 341 | preempt_enable_no_resched(); |
346 | return 1; | 342 | return 1; |
347 | } | 343 | } |
344 | #endif | ||
348 | prepare_singlestep(p, regs); | 345 | prepare_singlestep(p, regs); |
349 | kcb->kprobe_status = KPROBE_HIT_SS; | 346 | kcb->kprobe_status = KPROBE_HIT_SS; |
350 | return 1; | 347 | return 1; |
diff --git a/arch/i386/kernel/machine_kexec.c b/arch/i386/kernel/machine_kexec.c index 511abe52a94e..6b1ae6ba76f0 100644 --- a/arch/i386/kernel/machine_kexec.c +++ b/arch/i386/kernel/machine_kexec.c | |||
@@ -189,14 +189,11 @@ NORET_TYPE void machine_kexec(struct kimage *image) | |||
189 | memcpy((void *)reboot_code_buffer, relocate_new_kernel, | 189 | memcpy((void *)reboot_code_buffer, relocate_new_kernel, |
190 | relocate_new_kernel_size); | 190 | relocate_new_kernel_size); |
191 | 191 | ||
192 | /* The segment registers are funny things, they are | 192 | /* The segment registers are funny things, they have both a |
193 | * automatically loaded from a table, in memory wherever you | 193 | * visible and an invisible part. Whenever the visible part is |
194 | * set them to a specific selector, but this table is never | 194 | * set to a specific selector, the invisible part is loaded |
195 | * accessed again you set the segment to a different selector. | 195 | * with from a table in memory. At no other time is the |
196 | * | 196 | * descriptor table in memory accessed. |
197 | * The more common model is are caches where the behide | ||
198 | * the scenes work is done, but is also dropped at arbitrary | ||
199 | * times. | ||
200 | * | 197 | * |
201 | * I take advantage of this here by force loading the | 198 | * I take advantage of this here by force loading the |
202 | * segments, before I zap the gdt with an invalid value. | 199 | * segments, before I zap the gdt with an invalid value. |
diff --git a/arch/i386/kernel/nmi.c b/arch/i386/kernel/nmi.c index 2dd928a84645..acb351478e42 100644 --- a/arch/i386/kernel/nmi.c +++ b/arch/i386/kernel/nmi.c | |||
@@ -575,6 +575,7 @@ void touch_nmi_watchdog (void) | |||
575 | */ | 575 | */ |
576 | touch_softlockup_watchdog(); | 576 | touch_softlockup_watchdog(); |
577 | } | 577 | } |
578 | EXPORT_SYMBOL(touch_nmi_watchdog); | ||
578 | 579 | ||
579 | extern void die_nmi(struct pt_regs *, const char *msg); | 580 | extern void die_nmi(struct pt_regs *, const char *msg); |
580 | 581 | ||
diff --git a/arch/i386/kernel/process.c b/arch/i386/kernel/process.c index 923bb292f47f..8657c739656a 100644 --- a/arch/i386/kernel/process.c +++ b/arch/i386/kernel/process.c | |||
@@ -690,8 +690,8 @@ struct task_struct fastcall * __switch_to(struct task_struct *prev_p, struct tas | |||
690 | /* | 690 | /* |
691 | * Now maybe handle debug registers and/or IO bitmaps | 691 | * Now maybe handle debug registers and/or IO bitmaps |
692 | */ | 692 | */ |
693 | if (unlikely((task_thread_info(next_p)->flags & _TIF_WORK_CTXSW)) | 693 | if (unlikely((task_thread_info(next_p)->flags & _TIF_WORK_CTXSW) |
694 | || test_tsk_thread_flag(prev_p, TIF_IO_BITMAP)) | 694 | || test_tsk_thread_flag(prev_p, TIF_IO_BITMAP))) |
695 | __switch_to_xtra(next_p, tss); | 695 | __switch_to_xtra(next_p, tss); |
696 | 696 | ||
697 | disable_tsc(prev_p, next_p); | 697 | disable_tsc(prev_p, next_p); |
diff --git a/arch/i386/kernel/setup.c b/arch/i386/kernel/setup.c index f1682206d304..345ffb7d904d 100644 --- a/arch/i386/kernel/setup.c +++ b/arch/i386/kernel/setup.c | |||
@@ -956,38 +956,6 @@ efi_memory_present_wrapper(unsigned long start, unsigned long end, void *arg) | |||
956 | return 0; | 956 | return 0; |
957 | } | 957 | } |
958 | 958 | ||
959 | /* | ||
960 | * This function checks if the entire range <start,end> is mapped with type. | ||
961 | * | ||
962 | * Note: this function only works correct if the e820 table is sorted and | ||
963 | * not-overlapping, which is the case | ||
964 | */ | ||
965 | int __init | ||
966 | e820_all_mapped(unsigned long s, unsigned long e, unsigned type) | ||
967 | { | ||
968 | u64 start = s; | ||
969 | u64 end = e; | ||
970 | int i; | ||
971 | for (i = 0; i < e820.nr_map; i++) { | ||
972 | struct e820entry *ei = &e820.map[i]; | ||
973 | if (type && ei->type != type) | ||
974 | continue; | ||
975 | /* is the region (part) in overlap with the current region ?*/ | ||
976 | if (ei->addr >= end || ei->addr + ei->size <= start) | ||
977 | continue; | ||
978 | /* if the region is at the beginning of <start,end> we move | ||
979 | * start to the end of the region since it's ok until there | ||
980 | */ | ||
981 | if (ei->addr <= start) | ||
982 | start = ei->addr + ei->size; | ||
983 | /* if start is now at or beyond end, we're done, full | ||
984 | * coverage */ | ||
985 | if (start >= end) | ||
986 | return 1; /* we're done */ | ||
987 | } | ||
988 | return 0; | ||
989 | } | ||
990 | |||
991 | /* | 959 | /* |
992 | * Find the highest page frame number we have available | 960 | * Find the highest page frame number we have available |
993 | */ | 961 | */ |
diff --git a/arch/i386/kernel/smpboot.c b/arch/i386/kernel/smpboot.c index 6f5fea05f1d7..f948419c888a 100644 --- a/arch/i386/kernel/smpboot.c +++ b/arch/i386/kernel/smpboot.c | |||
@@ -212,14 +212,20 @@ valid_k7: | |||
212 | * then we print a warning if not, and always resync. | 212 | * then we print a warning if not, and always resync. |
213 | */ | 213 | */ |
214 | 214 | ||
215 | static atomic_t tsc_start_flag = ATOMIC_INIT(0); | 215 | static struct { |
216 | static atomic_t tsc_count_start = ATOMIC_INIT(0); | 216 | atomic_t start_flag; |
217 | static atomic_t tsc_count_stop = ATOMIC_INIT(0); | 217 | atomic_t count_start; |
218 | static unsigned long long tsc_values[NR_CPUS]; | 218 | atomic_t count_stop; |
219 | unsigned long long values[NR_CPUS]; | ||
220 | } tsc __initdata = { | ||
221 | .start_flag = ATOMIC_INIT(0), | ||
222 | .count_start = ATOMIC_INIT(0), | ||
223 | .count_stop = ATOMIC_INIT(0), | ||
224 | }; | ||
219 | 225 | ||
220 | #define NR_LOOPS 5 | 226 | #define NR_LOOPS 5 |
221 | 227 | ||
222 | static void __init synchronize_tsc_bp (void) | 228 | static void __init synchronize_tsc_bp(void) |
223 | { | 229 | { |
224 | int i; | 230 | int i; |
225 | unsigned long long t0; | 231 | unsigned long long t0; |
@@ -233,7 +239,7 @@ static void __init synchronize_tsc_bp (void) | |||
233 | /* convert from kcyc/sec to cyc/usec */ | 239 | /* convert from kcyc/sec to cyc/usec */ |
234 | one_usec = cpu_khz / 1000; | 240 | one_usec = cpu_khz / 1000; |
235 | 241 | ||
236 | atomic_set(&tsc_start_flag, 1); | 242 | atomic_set(&tsc.start_flag, 1); |
237 | wmb(); | 243 | wmb(); |
238 | 244 | ||
239 | /* | 245 | /* |
@@ -250,16 +256,16 @@ static void __init synchronize_tsc_bp (void) | |||
250 | /* | 256 | /* |
251 | * all APs synchronize but they loop on '== num_cpus' | 257 | * all APs synchronize but they loop on '== num_cpus' |
252 | */ | 258 | */ |
253 | while (atomic_read(&tsc_count_start) != num_booting_cpus()-1) | 259 | while (atomic_read(&tsc.count_start) != num_booting_cpus()-1) |
254 | cpu_relax(); | 260 | cpu_relax(); |
255 | atomic_set(&tsc_count_stop, 0); | 261 | atomic_set(&tsc.count_stop, 0); |
256 | wmb(); | 262 | wmb(); |
257 | /* | 263 | /* |
258 | * this lets the APs save their current TSC: | 264 | * this lets the APs save their current TSC: |
259 | */ | 265 | */ |
260 | atomic_inc(&tsc_count_start); | 266 | atomic_inc(&tsc.count_start); |
261 | 267 | ||
262 | rdtscll(tsc_values[smp_processor_id()]); | 268 | rdtscll(tsc.values[smp_processor_id()]); |
263 | /* | 269 | /* |
264 | * We clear the TSC in the last loop: | 270 | * We clear the TSC in the last loop: |
265 | */ | 271 | */ |
@@ -269,56 +275,54 @@ static void __init synchronize_tsc_bp (void) | |||
269 | /* | 275 | /* |
270 | * Wait for all APs to leave the synchronization point: | 276 | * Wait for all APs to leave the synchronization point: |
271 | */ | 277 | */ |
272 | while (atomic_read(&tsc_count_stop) != num_booting_cpus()-1) | 278 | while (atomic_read(&tsc.count_stop) != num_booting_cpus()-1) |
273 | cpu_relax(); | 279 | cpu_relax(); |
274 | atomic_set(&tsc_count_start, 0); | 280 | atomic_set(&tsc.count_start, 0); |
275 | wmb(); | 281 | wmb(); |
276 | atomic_inc(&tsc_count_stop); | 282 | atomic_inc(&tsc.count_stop); |
277 | } | 283 | } |
278 | 284 | ||
279 | sum = 0; | 285 | sum = 0; |
280 | for (i = 0; i < NR_CPUS; i++) { | 286 | for (i = 0; i < NR_CPUS; i++) { |
281 | if (cpu_isset(i, cpu_callout_map)) { | 287 | if (cpu_isset(i, cpu_callout_map)) { |
282 | t0 = tsc_values[i]; | 288 | t0 = tsc.values[i]; |
283 | sum += t0; | 289 | sum += t0; |
284 | } | 290 | } |
285 | } | 291 | } |
286 | avg = sum; | 292 | avg = sum; |
287 | do_div(avg, num_booting_cpus()); | 293 | do_div(avg, num_booting_cpus()); |
288 | 294 | ||
289 | sum = 0; | ||
290 | for (i = 0; i < NR_CPUS; i++) { | 295 | for (i = 0; i < NR_CPUS; i++) { |
291 | if (!cpu_isset(i, cpu_callout_map)) | 296 | if (!cpu_isset(i, cpu_callout_map)) |
292 | continue; | 297 | continue; |
293 | delta = tsc_values[i] - avg; | 298 | delta = tsc.values[i] - avg; |
294 | if (delta < 0) | 299 | if (delta < 0) |
295 | delta = -delta; | 300 | delta = -delta; |
296 | /* | 301 | /* |
297 | * We report bigger than 2 microseconds clock differences. | 302 | * We report bigger than 2 microseconds clock differences. |
298 | */ | 303 | */ |
299 | if (delta > 2*one_usec) { | 304 | if (delta > 2*one_usec) { |
300 | long realdelta; | 305 | long long realdelta; |
306 | |||
301 | if (!buggy) { | 307 | if (!buggy) { |
302 | buggy = 1; | 308 | buggy = 1; |
303 | printk("\n"); | 309 | printk("\n"); |
304 | } | 310 | } |
305 | realdelta = delta; | 311 | realdelta = delta; |
306 | do_div(realdelta, one_usec); | 312 | do_div(realdelta, one_usec); |
307 | if (tsc_values[i] < avg) | 313 | if (tsc.values[i] < avg) |
308 | realdelta = -realdelta; | 314 | realdelta = -realdelta; |
309 | 315 | ||
310 | if (realdelta > 0) | 316 | if (realdelta) |
311 | printk(KERN_INFO "CPU#%d had %ld usecs TSC " | 317 | printk(KERN_INFO "CPU#%d had %Ld usecs TSC " |
312 | "skew, fixed it up.\n", i, realdelta); | 318 | "skew, fixed it up.\n", i, realdelta); |
313 | } | 319 | } |
314 | |||
315 | sum += delta; | ||
316 | } | 320 | } |
317 | if (!buggy) | 321 | if (!buggy) |
318 | printk("passed.\n"); | 322 | printk("passed.\n"); |
319 | } | 323 | } |
320 | 324 | ||
321 | static void __init synchronize_tsc_ap (void) | 325 | static void __init synchronize_tsc_ap(void) |
322 | { | 326 | { |
323 | int i; | 327 | int i; |
324 | 328 | ||
@@ -327,20 +331,20 @@ static void __init synchronize_tsc_ap (void) | |||
327 | * this gets called, so we first wait for the BP to | 331 | * this gets called, so we first wait for the BP to |
328 | * finish SMP initialization: | 332 | * finish SMP initialization: |
329 | */ | 333 | */ |
330 | while (!atomic_read(&tsc_start_flag)) | 334 | while (!atomic_read(&tsc.start_flag)) |
331 | cpu_relax(); | 335 | cpu_relax(); |
332 | 336 | ||
333 | for (i = 0; i < NR_LOOPS; i++) { | 337 | for (i = 0; i < NR_LOOPS; i++) { |
334 | atomic_inc(&tsc_count_start); | 338 | atomic_inc(&tsc.count_start); |
335 | while (atomic_read(&tsc_count_start) != num_booting_cpus()) | 339 | while (atomic_read(&tsc.count_start) != num_booting_cpus()) |
336 | cpu_relax(); | 340 | cpu_relax(); |
337 | 341 | ||
338 | rdtscll(tsc_values[smp_processor_id()]); | 342 | rdtscll(tsc.values[smp_processor_id()]); |
339 | if (i == NR_LOOPS-1) | 343 | if (i == NR_LOOPS-1) |
340 | write_tsc(0, 0); | 344 | write_tsc(0, 0); |
341 | 345 | ||
342 | atomic_inc(&tsc_count_stop); | 346 | atomic_inc(&tsc.count_stop); |
343 | while (atomic_read(&tsc_count_stop) != num_booting_cpus()) | 347 | while (atomic_read(&tsc.count_stop) != num_booting_cpus()) |
344 | cpu_relax(); | 348 | cpu_relax(); |
345 | } | 349 | } |
346 | } | 350 | } |
diff --git a/arch/i386/kernel/time.c b/arch/i386/kernel/time.c index 8705c0f05788..edd00f6cee37 100644 --- a/arch/i386/kernel/time.c +++ b/arch/i386/kernel/time.c | |||
@@ -135,7 +135,7 @@ unsigned long profile_pc(struct pt_regs *regs) | |||
135 | { | 135 | { |
136 | unsigned long pc = instruction_pointer(regs); | 136 | unsigned long pc = instruction_pointer(regs); |
137 | 137 | ||
138 | if (in_lock_functions(pc)) | 138 | if (!user_mode_vm(regs) && in_lock_functions(pc)) |
139 | return *(unsigned long *)(regs->ebp + 4); | 139 | return *(unsigned long *)(regs->ebp + 4); |
140 | 140 | ||
141 | return pc; | 141 | return pc; |
diff --git a/arch/i386/kernel/traps.c b/arch/i386/kernel/traps.c index 313ac1f7dc5a..7e9edafffd8a 100644 --- a/arch/i386/kernel/traps.c +++ b/arch/i386/kernel/traps.c | |||
@@ -92,7 +92,11 @@ asmlinkage void spurious_interrupt_bug(void); | |||
92 | asmlinkage void machine_check(void); | 92 | asmlinkage void machine_check(void); |
93 | 93 | ||
94 | static int kstack_depth_to_print = 24; | 94 | static int kstack_depth_to_print = 24; |
95 | #ifdef CONFIG_STACK_UNWIND | ||
95 | static int call_trace = 1; | 96 | static int call_trace = 1; |
97 | #else | ||
98 | #define call_trace (-1) | ||
99 | #endif | ||
96 | ATOMIC_NOTIFIER_HEAD(i386die_chain); | 100 | ATOMIC_NOTIFIER_HEAD(i386die_chain); |
97 | 101 | ||
98 | int register_die_notifier(struct notifier_block *nb) | 102 | int register_die_notifier(struct notifier_block *nb) |
@@ -188,10 +192,20 @@ static void show_trace_log_lvl(struct task_struct *task, struct pt_regs *regs, | |||
188 | unw_ret = show_trace_unwind(&info, log_lvl); | 192 | unw_ret = show_trace_unwind(&info, log_lvl); |
189 | } | 193 | } |
190 | if (unw_ret > 0) { | 194 | if (unw_ret > 0) { |
191 | if (call_trace > 0) | 195 | if (call_trace == 1 && !arch_unw_user_mode(&info)) { |
196 | print_symbol("DWARF2 unwinder stuck at %s\n", | ||
197 | UNW_PC(&info)); | ||
198 | if (UNW_SP(&info) >= PAGE_OFFSET) { | ||
199 | printk("Leftover inexact backtrace:\n"); | ||
200 | stack = (void *)UNW_SP(&info); | ||
201 | } else | ||
202 | printk("Full inexact backtrace again:\n"); | ||
203 | } else if (call_trace >= 1) | ||
192 | return; | 204 | return; |
193 | printk("%sLegacy call trace:\n", log_lvl); | 205 | else |
194 | } | 206 | printk("Full inexact backtrace again:\n"); |
207 | } else | ||
208 | printk("Inexact backtrace:\n"); | ||
195 | } | 209 | } |
196 | 210 | ||
197 | if (task == current) { | 211 | if (task == current) { |
@@ -442,11 +456,9 @@ void die(const char * str, struct pt_regs * regs, long err) | |||
442 | if (in_interrupt()) | 456 | if (in_interrupt()) |
443 | panic("Fatal exception in interrupt"); | 457 | panic("Fatal exception in interrupt"); |
444 | 458 | ||
445 | if (panic_on_oops) { | 459 | if (panic_on_oops) |
446 | printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n"); | ||
447 | ssleep(5); | ||
448 | panic("Fatal exception"); | 460 | panic("Fatal exception"); |
449 | } | 461 | |
450 | oops_exit(); | 462 | oops_exit(); |
451 | do_exit(SIGSEGV); | 463 | do_exit(SIGSEGV); |
452 | } | 464 | } |
@@ -1232,14 +1244,18 @@ static int __init kstack_setup(char *s) | |||
1232 | } | 1244 | } |
1233 | __setup("kstack=", kstack_setup); | 1245 | __setup("kstack=", kstack_setup); |
1234 | 1246 | ||
1247 | #ifdef CONFIG_STACK_UNWIND | ||
1235 | static int __init call_trace_setup(char *s) | 1248 | static int __init call_trace_setup(char *s) |
1236 | { | 1249 | { |
1237 | if (strcmp(s, "old") == 0) | 1250 | if (strcmp(s, "old") == 0) |
1238 | call_trace = -1; | 1251 | call_trace = -1; |
1239 | else if (strcmp(s, "both") == 0) | 1252 | else if (strcmp(s, "both") == 0) |
1240 | call_trace = 0; | 1253 | call_trace = 0; |
1241 | else if (strcmp(s, "new") == 0) | 1254 | else if (strcmp(s, "newfallback") == 0) |
1242 | call_trace = 1; | 1255 | call_trace = 1; |
1256 | else if (strcmp(s, "new") == 2) | ||
1257 | call_trace = 2; | ||
1243 | return 1; | 1258 | return 1; |
1244 | } | 1259 | } |
1245 | __setup("call_trace=", call_trace_setup); | 1260 | __setup("call_trace=", call_trace_setup); |
1261 | #endif | ||
diff --git a/arch/i386/kernel/vsyscall.lds.S b/arch/i386/kernel/vsyscall.lds.S index e26975fc68b6..f66cd11adb72 100644 --- a/arch/i386/kernel/vsyscall.lds.S +++ b/arch/i386/kernel/vsyscall.lds.S | |||
@@ -10,6 +10,7 @@ SECTIONS | |||
10 | . = VDSO_PRELINK + SIZEOF_HEADERS; | 10 | . = VDSO_PRELINK + SIZEOF_HEADERS; |
11 | 11 | ||
12 | .hash : { *(.hash) } :text | 12 | .hash : { *(.hash) } :text |
13 | .gnu.hash : { *(.gnu.hash) } | ||
13 | .dynsym : { *(.dynsym) } | 14 | .dynsym : { *(.dynsym) } |
14 | .dynstr : { *(.dynstr) } | 15 | .dynstr : { *(.dynstr) } |
15 | .gnu.version : { *(.gnu.version) } | 16 | .gnu.version : { *(.gnu.version) } |
diff --git a/arch/i386/pci/common.c b/arch/i386/pci/common.c index 0a362e3aeac5..1220dd828ce3 100644 --- a/arch/i386/pci/common.c +++ b/arch/i386/pci/common.c | |||
@@ -237,6 +237,11 @@ char * __devinit pcibios_setup(char *str) | |||
237 | pci_probe &= ~PCI_PROBE_MMCONF; | 237 | pci_probe &= ~PCI_PROBE_MMCONF; |
238 | return NULL; | 238 | return NULL; |
239 | } | 239 | } |
240 | /* override DMI blacklist */ | ||
241 | else if (!strcmp(str, "mmconf")) { | ||
242 | pci_probe |= PCI_PROBE_MMCONF_FORCE; | ||
243 | return NULL; | ||
244 | } | ||
240 | #endif | 245 | #endif |
241 | else if (!strcmp(str, "noacpi")) { | 246 | else if (!strcmp(str, "noacpi")) { |
242 | acpi_noirq_set(); | 247 | acpi_noirq_set(); |
diff --git a/arch/i386/pci/init.c b/arch/i386/pci/init.c index c7650a7e0b07..51087a9d9172 100644 --- a/arch/i386/pci/init.c +++ b/arch/i386/pci/init.c | |||
@@ -14,8 +14,12 @@ static __init int pci_access_init(void) | |||
14 | #ifdef CONFIG_PCI_BIOS | 14 | #ifdef CONFIG_PCI_BIOS |
15 | pci_pcbios_init(); | 15 | pci_pcbios_init(); |
16 | #endif | 16 | #endif |
17 | if (raw_pci_ops) | 17 | /* |
18 | return 0; | 18 | * don't check for raw_pci_ops here because we want pcbios as last |
19 | * fallback, yet it's needed to run first to set pcibios_last_bus | ||
20 | * in case legacy PCI probing is used. otherwise detecting peer busses | ||
21 | * fails. | ||
22 | */ | ||
19 | #ifdef CONFIG_PCI_DIRECT | 23 | #ifdef CONFIG_PCI_DIRECT |
20 | pci_direct_init(); | 24 | pci_direct_init(); |
21 | #endif | 25 | #endif |
diff --git a/arch/i386/pci/mmconfig.c b/arch/i386/pci/mmconfig.c index e545b0992c48..ef5a2faa7d82 100644 --- a/arch/i386/pci/mmconfig.c +++ b/arch/i386/pci/mmconfig.c | |||
@@ -12,6 +12,7 @@ | |||
12 | #include <linux/pci.h> | 12 | #include <linux/pci.h> |
13 | #include <linux/init.h> | 13 | #include <linux/init.h> |
14 | #include <linux/acpi.h> | 14 | #include <linux/acpi.h> |
15 | #include <linux/dmi.h> | ||
15 | #include <asm/e820.h> | 16 | #include <asm/e820.h> |
16 | #include "pci.h" | 17 | #include "pci.h" |
17 | 18 | ||
@@ -178,7 +179,7 @@ static __init void unreachable_devices(void) | |||
178 | pci_exp_set_dev_base(addr, k, PCI_DEVFN(i, 0)); | 179 | pci_exp_set_dev_base(addr, k, PCI_DEVFN(i, 0)); |
179 | if (addr == 0 || | 180 | if (addr == 0 || |
180 | readl((u32 __iomem *)mmcfg_virt_addr) != val1) { | 181 | readl((u32 __iomem *)mmcfg_virt_addr) != val1) { |
181 | set_bit(i, fallback_slots); | 182 | set_bit(i + 32*k, fallback_slots); |
182 | printk(KERN_NOTICE | 183 | printk(KERN_NOTICE |
183 | "PCI: No mmconfig possible on %x:%x\n", k, i); | 184 | "PCI: No mmconfig possible on %x:%x\n", k, i); |
184 | } | 185 | } |
@@ -187,9 +188,31 @@ static __init void unreachable_devices(void) | |||
187 | } | 188 | } |
188 | } | 189 | } |
189 | 190 | ||
191 | static int disable_mcfg(struct dmi_system_id *d) | ||
192 | { | ||
193 | printk("PCI: %s detected. Disabling MCFG.\n", d->ident); | ||
194 | pci_probe &= ~PCI_PROBE_MMCONF; | ||
195 | return 0; | ||
196 | } | ||
197 | |||
198 | static struct dmi_system_id __initdata dmi_bad_mcfg[] = { | ||
199 | /* Has broken MCFG table that makes the system hang when used */ | ||
200 | { | ||
201 | .callback = disable_mcfg, | ||
202 | .ident = "Intel D3C5105 SDV", | ||
203 | .matches = { | ||
204 | DMI_MATCH(DMI_BIOS_VENDOR, "Intel"), | ||
205 | DMI_MATCH(DMI_BOARD_NAME, "D26928"), | ||
206 | }, | ||
207 | }, | ||
208 | {} | ||
209 | }; | ||
210 | |||
190 | void __init pci_mmcfg_init(void) | 211 | void __init pci_mmcfg_init(void) |
191 | { | 212 | { |
192 | if ((pci_probe & PCI_PROBE_MMCONF) == 0) | 213 | dmi_check_system(dmi_bad_mcfg); |
214 | |||
215 | if ((pci_probe & (PCI_PROBE_MMCONF_FORCE|PCI_PROBE_MMCONF)) == 0) | ||
193 | return; | 216 | return; |
194 | 217 | ||
195 | acpi_table_parse(ACPI_MCFG, acpi_parse_mcfg); | 218 | acpi_table_parse(ACPI_MCFG, acpi_parse_mcfg); |
@@ -198,15 +221,6 @@ void __init pci_mmcfg_init(void) | |||
198 | (pci_mmcfg_config[0].base_address == 0)) | 221 | (pci_mmcfg_config[0].base_address == 0)) |
199 | return; | 222 | return; |
200 | 223 | ||
201 | if (!e820_all_mapped(pci_mmcfg_config[0].base_address, | ||
202 | pci_mmcfg_config[0].base_address + MMCONFIG_APER_MIN, | ||
203 | E820_RESERVED)) { | ||
204 | printk(KERN_ERR "PCI: BIOS Bug: MCFG area at %x is not E820-reserved\n", | ||
205 | pci_mmcfg_config[0].base_address); | ||
206 | printk(KERN_ERR "PCI: Not using MMCONFIG.\n"); | ||
207 | return; | ||
208 | } | ||
209 | |||
210 | printk(KERN_INFO "PCI: Using MMCONFIG\n"); | 224 | printk(KERN_INFO "PCI: Using MMCONFIG\n"); |
211 | raw_pci_ops = &pci_mmcfg; | 225 | raw_pci_ops = &pci_mmcfg; |
212 | pci_probe = (pci_probe & ~PCI_PROBE_MASK) | PCI_PROBE_MMCONF; | 226 | pci_probe = (pci_probe & ~PCI_PROBE_MASK) | PCI_PROBE_MMCONF; |
diff --git a/arch/i386/pci/pci.h b/arch/i386/pci/pci.h index bf4e79335388..49a849b3a241 100644 --- a/arch/i386/pci/pci.h +++ b/arch/i386/pci/pci.h | |||
@@ -16,7 +16,8 @@ | |||
16 | #define PCI_PROBE_CONF1 0x0002 | 16 | #define PCI_PROBE_CONF1 0x0002 |
17 | #define PCI_PROBE_CONF2 0x0004 | 17 | #define PCI_PROBE_CONF2 0x0004 |
18 | #define PCI_PROBE_MMCONF 0x0008 | 18 | #define PCI_PROBE_MMCONF 0x0008 |
19 | #define PCI_PROBE_MASK 0x000f | 19 | #define PCI_PROBE_MMCONF_FORCE 0x0010 |
20 | #define PCI_PROBE_MASK 0x00ff | ||
20 | 21 | ||
21 | #define PCI_NO_SORT 0x0100 | 22 | #define PCI_NO_SORT 0x0100 |
22 | #define PCI_BIOS_SORT 0x0200 | 23 | #define PCI_BIOS_SORT 0x0200 |
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig index 47de9ee6bcd6..674de8943478 100644 --- a/arch/ia64/Kconfig +++ b/arch/ia64/Kconfig | |||
@@ -258,7 +258,7 @@ config NR_CPUS | |||
258 | int "Maximum number of CPUs (2-1024)" | 258 | int "Maximum number of CPUs (2-1024)" |
259 | range 2 1024 | 259 | range 2 1024 |
260 | depends on SMP | 260 | depends on SMP |
261 | default "64" | 261 | default "1024" |
262 | help | 262 | help |
263 | You should set this to the number of CPUs in your system, but | 263 | You should set this to the number of CPUs in your system, but |
264 | keep in mind that a kernel compiled for, e.g., 2 CPUs will boot but | 264 | keep in mind that a kernel compiled for, e.g., 2 CPUs will boot but |
@@ -354,7 +354,7 @@ config NUMA | |||
354 | config NODES_SHIFT | 354 | config NODES_SHIFT |
355 | int "Max num nodes shift(3-10)" | 355 | int "Max num nodes shift(3-10)" |
356 | range 3 10 | 356 | range 3 10 |
357 | default "8" | 357 | default "10" |
358 | depends on NEED_MULTIPLE_NODES | 358 | depends on NEED_MULTIPLE_NODES |
359 | help | 359 | help |
360 | This option specifies the maximum number of nodes in your SSI system. | 360 | This option specifies the maximum number of nodes in your SSI system. |
diff --git a/arch/ia64/configs/sn2_defconfig b/arch/ia64/configs/sn2_defconfig index 9ea35398e10d..0f14a82b856e 100644 --- a/arch/ia64/configs/sn2_defconfig +++ b/arch/ia64/configs/sn2_defconfig | |||
@@ -363,7 +363,7 @@ CONFIG_BLK_DEV_IDECD=y | |||
363 | # | 363 | # |
364 | CONFIG_IDE_GENERIC=y | 364 | CONFIG_IDE_GENERIC=y |
365 | CONFIG_BLK_DEV_IDEPCI=y | 365 | CONFIG_BLK_DEV_IDEPCI=y |
366 | # CONFIG_IDEPCI_SHARE_IRQ is not set | 366 | CONFIG_IDEPCI_SHARE_IRQ=y |
367 | # CONFIG_BLK_DEV_OFFBOARD is not set | 367 | # CONFIG_BLK_DEV_OFFBOARD is not set |
368 | # CONFIG_BLK_DEV_GENERIC is not set | 368 | # CONFIG_BLK_DEV_GENERIC is not set |
369 | # CONFIG_BLK_DEV_OPTI621 is not set | 369 | # CONFIG_BLK_DEV_OPTI621 is not set |
diff --git a/arch/ia64/defconfig b/arch/ia64/defconfig index 6cba55da572a..9001b3fbaa32 100644 --- a/arch/ia64/defconfig +++ b/arch/ia64/defconfig | |||
@@ -366,7 +366,7 @@ CONFIG_BLK_DEV_IDESCSI=m | |||
366 | # CONFIG_IDE_GENERIC is not set | 366 | # CONFIG_IDE_GENERIC is not set |
367 | # CONFIG_BLK_DEV_IDEPNP is not set | 367 | # CONFIG_BLK_DEV_IDEPNP is not set |
368 | CONFIG_BLK_DEV_IDEPCI=y | 368 | CONFIG_BLK_DEV_IDEPCI=y |
369 | # CONFIG_IDEPCI_SHARE_IRQ is not set | 369 | CONFIG_IDEPCI_SHARE_IRQ=y |
370 | # CONFIG_BLK_DEV_OFFBOARD is not set | 370 | # CONFIG_BLK_DEV_OFFBOARD is not set |
371 | CONFIG_BLK_DEV_GENERIC=y | 371 | CONFIG_BLK_DEV_GENERIC=y |
372 | # CONFIG_BLK_DEV_OPTI621 is not set | 372 | # CONFIG_BLK_DEV_OPTI621 is not set |
diff --git a/arch/ia64/hp/sim/simscsi.c b/arch/ia64/hp/sim/simscsi.c index a3fe97531134..8f0a16a79a67 100644 --- a/arch/ia64/hp/sim/simscsi.c +++ b/arch/ia64/hp/sim/simscsi.c | |||
@@ -151,7 +151,7 @@ static void | |||
151 | simscsi_sg_readwrite (struct scsi_cmnd *sc, int mode, unsigned long offset) | 151 | simscsi_sg_readwrite (struct scsi_cmnd *sc, int mode, unsigned long offset) |
152 | { | 152 | { |
153 | int list_len = sc->use_sg; | 153 | int list_len = sc->use_sg; |
154 | struct scatterlist *sl = (struct scatterlist *)sc->buffer; | 154 | struct scatterlist *sl = (struct scatterlist *)sc->request_buffer; |
155 | struct disk_stat stat; | 155 | struct disk_stat stat; |
156 | struct disk_req req; | 156 | struct disk_req req; |
157 | 157 | ||
@@ -244,7 +244,8 @@ static void simscsi_fillresult(struct scsi_cmnd *sc, char *buf, unsigned len) | |||
244 | 244 | ||
245 | if (scatterlen == 0) | 245 | if (scatterlen == 0) |
246 | memcpy(sc->request_buffer, buf, len); | 246 | memcpy(sc->request_buffer, buf, len); |
247 | else for (slp = (struct scatterlist *)sc->buffer; scatterlen-- > 0 && len > 0; slp++) { | 247 | else for (slp = (struct scatterlist *)sc->request_buffer; |
248 | scatterlen-- > 0 && len > 0; slp++) { | ||
248 | unsigned thislen = min(len, slp->length); | 249 | unsigned thislen = min(len, slp->length); |
249 | 250 | ||
250 | memcpy(page_address(slp->page) + slp->offset, buf, thislen); | 251 | memcpy(page_address(slp->page) + slp->offset, buf, thislen); |
diff --git a/arch/ia64/kernel/Makefile b/arch/ia64/kernel/Makefile index 0e4553f320bf..ad8215a3c586 100644 --- a/arch/ia64/kernel/Makefile +++ b/arch/ia64/kernel/Makefile | |||
@@ -45,7 +45,8 @@ CPPFLAGS_gate.lds := -P -C -U$(ARCH) | |||
45 | quiet_cmd_gate = GATE $@ | 45 | quiet_cmd_gate = GATE $@ |
46 | cmd_gate = $(CC) -nostdlib $(GATECFLAGS_$(@F)) -Wl,-T,$(filter-out FORCE,$^) -o $@ | 46 | cmd_gate = $(CC) -nostdlib $(GATECFLAGS_$(@F)) -Wl,-T,$(filter-out FORCE,$^) -o $@ |
47 | 47 | ||
48 | GATECFLAGS_gate.so = -shared -s -Wl,-soname=linux-gate.so.1 | 48 | GATECFLAGS_gate.so = -shared -s -Wl,-soname=linux-gate.so.1 \ |
49 | $(call ld-option, -Wl$(comma)--hash-style=sysv) | ||
49 | $(obj)/gate.so: $(obj)/gate.lds $(obj)/gate.o FORCE | 50 | $(obj)/gate.so: $(obj)/gate.lds $(obj)/gate.o FORCE |
50 | $(call if_changed,gate) | 51 | $(call if_changed,gate) |
51 | 52 | ||
diff --git a/arch/ia64/kernel/acpi.c b/arch/ia64/kernel/acpi.c index 99761b81db44..0176556aeecc 100644 --- a/arch/ia64/kernel/acpi.c +++ b/arch/ia64/kernel/acpi.c | |||
@@ -55,7 +55,7 @@ | |||
55 | 55 | ||
56 | #define BAD_MADT_ENTRY(entry, end) ( \ | 56 | #define BAD_MADT_ENTRY(entry, end) ( \ |
57 | (!entry) || (unsigned long)entry + sizeof(*entry) > end || \ | 57 | (!entry) || (unsigned long)entry + sizeof(*entry) > end || \ |
58 | ((acpi_table_entry_header *)entry)->length != sizeof(*entry)) | 58 | ((acpi_table_entry_header *)entry)->length < sizeof(*entry)) |
59 | 59 | ||
60 | #define PREFIX "ACPI: " | 60 | #define PREFIX "ACPI: " |
61 | 61 | ||
diff --git a/arch/ia64/kernel/efi.c b/arch/ia64/kernel/efi.c index e4bfa9dafbce..bb8770a177b5 100644 --- a/arch/ia64/kernel/efi.c +++ b/arch/ia64/kernel/efi.c | |||
@@ -632,7 +632,7 @@ kern_memory_descriptor (unsigned long phys_addr) | |||
632 | if (phys_addr - md->start < (md->num_pages << EFI_PAGE_SHIFT)) | 632 | if (phys_addr - md->start < (md->num_pages << EFI_PAGE_SHIFT)) |
633 | return md; | 633 | return md; |
634 | } | 634 | } |
635 | return 0; | 635 | return NULL; |
636 | } | 636 | } |
637 | 637 | ||
638 | static efi_memory_desc_t * | 638 | static efi_memory_desc_t * |
@@ -652,7 +652,7 @@ efi_memory_descriptor (unsigned long phys_addr) | |||
652 | if (phys_addr - md->phys_addr < (md->num_pages << EFI_PAGE_SHIFT)) | 652 | if (phys_addr - md->phys_addr < (md->num_pages << EFI_PAGE_SHIFT)) |
653 | return md; | 653 | return md; |
654 | } | 654 | } |
655 | return 0; | 655 | return NULL; |
656 | } | 656 | } |
657 | 657 | ||
658 | u32 | 658 | u32 |
@@ -923,7 +923,7 @@ find_memmap_space (void) | |||
923 | void | 923 | void |
924 | efi_memmap_init(unsigned long *s, unsigned long *e) | 924 | efi_memmap_init(unsigned long *s, unsigned long *e) |
925 | { | 925 | { |
926 | struct kern_memdesc *k, *prev = 0; | 926 | struct kern_memdesc *k, *prev = NULL; |
927 | u64 contig_low=0, contig_high=0; | 927 | u64 contig_low=0, contig_high=0; |
928 | u64 as, ae, lim; | 928 | u64 as, ae, lim; |
929 | void *efi_map_start, *efi_map_end, *p, *q; | 929 | void *efi_map_start, *efi_map_end, *p, *q; |
diff --git a/arch/ia64/kernel/gate.lds.S b/arch/ia64/kernel/gate.lds.S index cc35cddfd4cf..6d198339bf85 100644 --- a/arch/ia64/kernel/gate.lds.S +++ b/arch/ia64/kernel/gate.lds.S | |||
@@ -12,6 +12,7 @@ SECTIONS | |||
12 | . = GATE_ADDR + SIZEOF_HEADERS; | 12 | . = GATE_ADDR + SIZEOF_HEADERS; |
13 | 13 | ||
14 | .hash : { *(.hash) } :readable | 14 | .hash : { *(.hash) } :readable |
15 | .gnu.hash : { *(.gnu.hash) } | ||
15 | .dynsym : { *(.dynsym) } | 16 | .dynsym : { *(.dynsym) } |
16 | .dynstr : { *(.dynstr) } | 17 | .dynstr : { *(.dynstr) } |
17 | .gnu.version : { *(.gnu.version) } | 18 | .gnu.version : { *(.gnu.version) } |
diff --git a/arch/ia64/kernel/head.S b/arch/ia64/kernel/head.S index 561b8f1d3bc7..29236f0c62b5 100644 --- a/arch/ia64/kernel/head.S +++ b/arch/ia64/kernel/head.S | |||
@@ -853,7 +853,6 @@ END(__ia64_init_fpu) | |||
853 | */ | 853 | */ |
854 | GLOBAL_ENTRY(ia64_switch_mode_phys) | 854 | GLOBAL_ENTRY(ia64_switch_mode_phys) |
855 | { | 855 | { |
856 | alloc r2=ar.pfs,0,0,0,0 | ||
857 | rsm psr.i | psr.ic // disable interrupts and interrupt collection | 856 | rsm psr.i | psr.ic // disable interrupts and interrupt collection |
858 | mov r15=ip | 857 | mov r15=ip |
859 | } | 858 | } |
@@ -902,7 +901,6 @@ END(ia64_switch_mode_phys) | |||
902 | */ | 901 | */ |
903 | GLOBAL_ENTRY(ia64_switch_mode_virt) | 902 | GLOBAL_ENTRY(ia64_switch_mode_virt) |
904 | { | 903 | { |
905 | alloc r2=ar.pfs,0,0,0,0 | ||
906 | rsm psr.i | psr.ic // disable interrupts and interrupt collection | 904 | rsm psr.i | psr.ic // disable interrupts and interrupt collection |
907 | mov r15=ip | 905 | mov r15=ip |
908 | } | 906 | } |
diff --git a/arch/ia64/kernel/ia64_ksyms.c b/arch/ia64/kernel/ia64_ksyms.c index b7cf651ceb14..3ead20fb6f4b 100644 --- a/arch/ia64/kernel/ia64_ksyms.c +++ b/arch/ia64/kernel/ia64_ksyms.c | |||
@@ -62,7 +62,7 @@ EXPORT_SYMBOL(__udivdi3); | |||
62 | EXPORT_SYMBOL(__moddi3); | 62 | EXPORT_SYMBOL(__moddi3); |
63 | EXPORT_SYMBOL(__umoddi3); | 63 | EXPORT_SYMBOL(__umoddi3); |
64 | 64 | ||
65 | #if defined(CONFIG_MD_RAID5) || defined(CONFIG_MD_RAID5_MODULE) | 65 | #if defined(CONFIG_MD_RAID456) || defined(CONFIG_MD_RAID456_MODULE) |
66 | extern void xor_ia64_2(void); | 66 | extern void xor_ia64_2(void); |
67 | extern void xor_ia64_3(void); | 67 | extern void xor_ia64_3(void); |
68 | extern void xor_ia64_4(void); | 68 | extern void xor_ia64_4(void); |
diff --git a/arch/ia64/kernel/kprobes.c b/arch/ia64/kernel/kprobes.c index 00d9c83b8020..781960f80b6f 100644 --- a/arch/ia64/kernel/kprobes.c +++ b/arch/ia64/kernel/kprobes.c | |||
@@ -448,11 +448,20 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p) | |||
448 | return 0; | 448 | return 0; |
449 | } | 449 | } |
450 | 450 | ||
451 | void __kprobes flush_insn_slot(struct kprobe *p) | ||
452 | { | ||
453 | unsigned long arm_addr; | ||
454 | |||
455 | arm_addr = ((unsigned long)&p->opcode.bundle) & ~0xFULL; | ||
456 | flush_icache_range(arm_addr, arm_addr + sizeof(bundle_t)); | ||
457 | } | ||
458 | |||
451 | void __kprobes arch_arm_kprobe(struct kprobe *p) | 459 | void __kprobes arch_arm_kprobe(struct kprobe *p) |
452 | { | 460 | { |
453 | unsigned long addr = (unsigned long)p->addr; | 461 | unsigned long addr = (unsigned long)p->addr; |
454 | unsigned long arm_addr = addr & ~0xFULL; | 462 | unsigned long arm_addr = addr & ~0xFULL; |
455 | 463 | ||
464 | flush_insn_slot(p); | ||
456 | memcpy((char *)arm_addr, &p->ainsn.insn.bundle, sizeof(bundle_t)); | 465 | memcpy((char *)arm_addr, &p->ainsn.insn.bundle, sizeof(bundle_t)); |
457 | flush_icache_range(arm_addr, arm_addr + sizeof(bundle_t)); | 466 | flush_icache_range(arm_addr, arm_addr + sizeof(bundle_t)); |
458 | } | 467 | } |
diff --git a/arch/ia64/kernel/pal.S b/arch/ia64/kernel/pal.S index 5018c7f2e7a8..ebaf1e685f5e 100644 --- a/arch/ia64/kernel/pal.S +++ b/arch/ia64/kernel/pal.S | |||
@@ -217,12 +217,7 @@ GLOBAL_ENTRY(ia64_pal_call_phys_stacked) | |||
217 | .body | 217 | .body |
218 | ;; | 218 | ;; |
219 | ld8 loc2 = [loc2] // loc2 <- entry point | 219 | ld8 loc2 = [loc2] // loc2 <- entry point |
220 | mov out0 = in0 // first argument | 220 | mov loc3 = psr // save psr |
221 | mov out1 = in1 // copy arg2 | ||
222 | mov out2 = in2 // copy arg3 | ||
223 | mov out3 = in3 // copy arg3 | ||
224 | ;; | ||
225 | mov loc3 = psr // save psr | ||
226 | ;; | 221 | ;; |
227 | mov loc4=ar.rsc // save RSE configuration | 222 | mov loc4=ar.rsc // save RSE configuration |
228 | dep.z loc2=loc2,0,61 // convert pal entry point to physical | 223 | dep.z loc2=loc2,0,61 // convert pal entry point to physical |
@@ -236,18 +231,23 @@ GLOBAL_ENTRY(ia64_pal_call_phys_stacked) | |||
236 | ;; | 231 | ;; |
237 | andcm r16=loc3,r16 // removes bits to clear from psr | 232 | andcm r16=loc3,r16 // removes bits to clear from psr |
238 | br.call.sptk.many rp=ia64_switch_mode_phys | 233 | br.call.sptk.many rp=ia64_switch_mode_phys |
239 | .ret6: | 234 | |
235 | mov out0 = in0 // first argument | ||
236 | mov out1 = in1 // copy arg2 | ||
237 | mov out2 = in2 // copy arg3 | ||
238 | mov out3 = in3 // copy arg3 | ||
240 | mov loc5 = r19 | 239 | mov loc5 = r19 |
241 | mov loc6 = r20 | 240 | mov loc6 = r20 |
241 | |||
242 | br.call.sptk.many rp=b7 // now make the call | 242 | br.call.sptk.many rp=b7 // now make the call |
243 | .ret7: | 243 | |
244 | mov ar.rsc=0 // put RSE in enforced lazy, LE mode | 244 | mov ar.rsc=0 // put RSE in enforced lazy, LE mode |
245 | mov r16=loc3 // r16= original psr | 245 | mov r16=loc3 // r16= original psr |
246 | mov r19=loc5 | 246 | mov r19=loc5 |
247 | mov r20=loc6 | 247 | mov r20=loc6 |
248 | br.call.sptk.many rp=ia64_switch_mode_virt // return to virtual mode | 248 | br.call.sptk.many rp=ia64_switch_mode_virt // return to virtual mode |
249 | 249 | ||
250 | .ret8: mov psr.l = loc3 // restore init PSR | 250 | mov psr.l = loc3 // restore init PSR |
251 | mov ar.pfs = loc1 | 251 | mov ar.pfs = loc1 |
252 | mov rp = loc0 | 252 | mov rp = loc0 |
253 | ;; | 253 | ;; |
diff --git a/arch/ia64/kernel/palinfo.c b/arch/ia64/kernel/palinfo.c index 3f5bac59209a..0b546e2b36ac 100644 --- a/arch/ia64/kernel/palinfo.c +++ b/arch/ia64/kernel/palinfo.c | |||
@@ -566,29 +566,23 @@ version_info(char *page) | |||
566 | pal_version_u_t min_ver, cur_ver; | 566 | pal_version_u_t min_ver, cur_ver; |
567 | char *p = page; | 567 | char *p = page; |
568 | 568 | ||
569 | /* The PAL_VERSION call is advertised as being able to support | 569 | if (ia64_pal_version(&min_ver, &cur_ver) != 0) |
570 | * both physical and virtual mode calls. This seems to be a documentation | 570 | return 0; |
571 | * bug rather than firmware bug. In fact, it does only support physical mode. | ||
572 | * So now the code reflects this fact and the pal_version() has been updated | ||
573 | * accordingly. | ||
574 | */ | ||
575 | if (ia64_pal_version(&min_ver, &cur_ver) != 0) return 0; | ||
576 | 571 | ||
577 | p += sprintf(p, | 572 | p += sprintf(p, |
578 | "PAL_vendor : 0x%02x (min=0x%02x)\n" | 573 | "PAL_vendor : 0x%02x (min=0x%02x)\n" |
579 | "PAL_A : %x.%x.%x (min=%x.%x.%x)\n" | 574 | "PAL_A : %02x.%02x (min=%02x.%02x)\n" |
580 | "PAL_B : %x.%x.%x (min=%x.%x.%x)\n", | 575 | "PAL_B : %02x.%02x (min=%02x.%02x)\n", |
581 | cur_ver.pal_version_s.pv_pal_vendor, min_ver.pal_version_s.pv_pal_vendor, | 576 | cur_ver.pal_version_s.pv_pal_vendor, |
582 | 577 | min_ver.pal_version_s.pv_pal_vendor, | |
583 | cur_ver.pal_version_s.pv_pal_a_model>>4, | 578 | cur_ver.pal_version_s.pv_pal_a_model, |
584 | cur_ver.pal_version_s.pv_pal_a_model&0xf, cur_ver.pal_version_s.pv_pal_a_rev, | 579 | cur_ver.pal_version_s.pv_pal_a_rev, |
585 | min_ver.pal_version_s.pv_pal_a_model>>4, | 580 | min_ver.pal_version_s.pv_pal_a_model, |
586 | min_ver.pal_version_s.pv_pal_a_model&0xf, min_ver.pal_version_s.pv_pal_a_rev, | 581 | min_ver.pal_version_s.pv_pal_a_rev, |
587 | 582 | cur_ver.pal_version_s.pv_pal_b_model, | |
588 | cur_ver.pal_version_s.pv_pal_b_model>>4, | 583 | cur_ver.pal_version_s.pv_pal_b_rev, |
589 | cur_ver.pal_version_s.pv_pal_b_model&0xf, cur_ver.pal_version_s.pv_pal_b_rev, | 584 | min_ver.pal_version_s.pv_pal_b_model, |
590 | min_ver.pal_version_s.pv_pal_b_model>>4, | 585 | min_ver.pal_version_s.pv_pal_b_rev); |
591 | min_ver.pal_version_s.pv_pal_b_model&0xf, min_ver.pal_version_s.pv_pal_b_rev); | ||
592 | return p - page; | 586 | return p - page; |
593 | } | 587 | } |
594 | 588 | ||
@@ -958,9 +952,9 @@ remove_palinfo_proc_entries(unsigned int hcpu) | |||
958 | } | 952 | } |
959 | } | 953 | } |
960 | 954 | ||
961 | static int __cpuinit palinfo_cpu_callback(struct notifier_block *nfb, | 955 | #ifdef CONFIG_HOTPLUG_CPU |
962 | unsigned long action, | 956 | static int palinfo_cpu_callback(struct notifier_block *nfb, |
963 | void *hcpu) | 957 | unsigned long action, void *hcpu) |
964 | { | 958 | { |
965 | unsigned int hotcpu = (unsigned long)hcpu; | 959 | unsigned int hotcpu = (unsigned long)hcpu; |
966 | 960 | ||
@@ -968,20 +962,19 @@ static int __cpuinit palinfo_cpu_callback(struct notifier_block *nfb, | |||
968 | case CPU_ONLINE: | 962 | case CPU_ONLINE: |
969 | create_palinfo_proc_entries(hotcpu); | 963 | create_palinfo_proc_entries(hotcpu); |
970 | break; | 964 | break; |
971 | #ifdef CONFIG_HOTPLUG_CPU | ||
972 | case CPU_DEAD: | 965 | case CPU_DEAD: |
973 | remove_palinfo_proc_entries(hotcpu); | 966 | remove_palinfo_proc_entries(hotcpu); |
974 | break; | 967 | break; |
975 | #endif | ||
976 | } | 968 | } |
977 | return NOTIFY_OK; | 969 | return NOTIFY_OK; |
978 | } | 970 | } |
979 | 971 | ||
980 | static struct notifier_block __cpuinitdata palinfo_cpu_notifier = | 972 | static struct notifier_block palinfo_cpu_notifier = |
981 | { | 973 | { |
982 | .notifier_call = palinfo_cpu_callback, | 974 | .notifier_call = palinfo_cpu_callback, |
983 | .priority = 0, | 975 | .priority = 0, |
984 | }; | 976 | }; |
977 | #endif | ||
985 | 978 | ||
986 | static int __init | 979 | static int __init |
987 | palinfo_init(void) | 980 | palinfo_init(void) |
@@ -1020,7 +1013,7 @@ palinfo_exit(void) | |||
1020 | /* | 1013 | /* |
1021 | * Unregister from cpu notifier callbacks | 1014 | * Unregister from cpu notifier callbacks |
1022 | */ | 1015 | */ |
1023 | unregister_cpu_notifier(&palinfo_cpu_notifier); | 1016 | unregister_hotcpu_notifier(&palinfo_cpu_notifier); |
1024 | } | 1017 | } |
1025 | 1018 | ||
1026 | module_init(palinfo_init); | 1019 | module_init(palinfo_init); |
diff --git a/arch/ia64/kernel/topology.c b/arch/ia64/kernel/topology.c index b146f1cfad31..f648c610b10c 100644 --- a/arch/ia64/kernel/topology.c +++ b/arch/ia64/kernel/topology.c | |||
@@ -67,10 +67,8 @@ static int __init topology_init(void) | |||
67 | #endif | 67 | #endif |
68 | 68 | ||
69 | sysfs_cpus = kzalloc(sizeof(struct ia64_cpu) * NR_CPUS, GFP_KERNEL); | 69 | sysfs_cpus = kzalloc(sizeof(struct ia64_cpu) * NR_CPUS, GFP_KERNEL); |
70 | if (!sysfs_cpus) { | 70 | if (!sysfs_cpus) |
71 | err = -ENOMEM; | 71 | panic("kzalloc in topology_init failed - NR_CPUS too big?"); |
72 | goto out; | ||
73 | } | ||
74 | 72 | ||
75 | for_each_present_cpu(i) { | 73 | for_each_present_cpu(i) { |
76 | if((err = arch_register_cpu(i))) | 74 | if((err = arch_register_cpu(i))) |
@@ -435,7 +433,7 @@ static int __cpuinit cache_sysfs_init(void) | |||
435 | (void *)(long)i); | 433 | (void *)(long)i); |
436 | } | 434 | } |
437 | 435 | ||
438 | register_cpu_notifier(&cache_cpu_notifier); | 436 | register_hotcpu_notifier(&cache_cpu_notifier); |
439 | 437 | ||
440 | return 0; | 438 | return 0; |
441 | } | 439 | } |
diff --git a/arch/ia64/kernel/traps.c b/arch/ia64/kernel/traps.c index e7bbb0f40aa2..fffa9e0826bc 100644 --- a/arch/ia64/kernel/traps.c +++ b/arch/ia64/kernel/traps.c | |||
@@ -117,11 +117,8 @@ die (const char *str, struct pt_regs *regs, long err) | |||
117 | die.lock_owner = -1; | 117 | die.lock_owner = -1; |
118 | spin_unlock_irq(&die.lock); | 118 | spin_unlock_irq(&die.lock); |
119 | 119 | ||
120 | if (panic_on_oops) { | 120 | if (panic_on_oops) |
121 | printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n"); | ||
122 | ssleep(5); | ||
123 | panic("Fatal exception"); | 121 | panic("Fatal exception"); |
124 | } | ||
125 | 122 | ||
126 | do_exit(SIGSEGV); | 123 | do_exit(SIGSEGV); |
127 | } | 124 | } |
diff --git a/arch/ia64/kernel/uncached.c b/arch/ia64/kernel/uncached.c index 5f03b9e524dd..4c73a6763669 100644 --- a/arch/ia64/kernel/uncached.c +++ b/arch/ia64/kernel/uncached.c | |||
@@ -32,32 +32,38 @@ | |||
32 | 32 | ||
33 | extern void __init efi_memmap_walk_uc(efi_freemem_callback_t, void *); | 33 | extern void __init efi_memmap_walk_uc(efi_freemem_callback_t, void *); |
34 | 34 | ||
35 | #define MAX_UNCACHED_GRANULES 5 | 35 | struct uncached_pool { |
36 | static int allocated_granules; | 36 | struct gen_pool *pool; |
37 | struct mutex add_chunk_mutex; /* serialize adding a converted chunk */ | ||
38 | int nchunks_added; /* #of converted chunks added to pool */ | ||
39 | atomic_t status; /* smp called function's return status*/ | ||
40 | }; | ||
41 | |||
42 | #define MAX_CONVERTED_CHUNKS_PER_NODE 2 | ||
37 | 43 | ||
38 | struct gen_pool *uncached_pool[MAX_NUMNODES]; | 44 | struct uncached_pool uncached_pools[MAX_NUMNODES]; |
39 | 45 | ||
40 | 46 | ||
41 | static void uncached_ipi_visibility(void *data) | 47 | static void uncached_ipi_visibility(void *data) |
42 | { | 48 | { |
43 | int status; | 49 | int status; |
50 | struct uncached_pool *uc_pool = (struct uncached_pool *)data; | ||
44 | 51 | ||
45 | status = ia64_pal_prefetch_visibility(PAL_VISIBILITY_PHYSICAL); | 52 | status = ia64_pal_prefetch_visibility(PAL_VISIBILITY_PHYSICAL); |
46 | if ((status != PAL_VISIBILITY_OK) && | 53 | if ((status != PAL_VISIBILITY_OK) && |
47 | (status != PAL_VISIBILITY_OK_REMOTE_NEEDED)) | 54 | (status != PAL_VISIBILITY_OK_REMOTE_NEEDED)) |
48 | printk(KERN_DEBUG "pal_prefetch_visibility() returns %i on " | 55 | atomic_inc(&uc_pool->status); |
49 | "CPU %i\n", status, raw_smp_processor_id()); | ||
50 | } | 56 | } |
51 | 57 | ||
52 | 58 | ||
53 | static void uncached_ipi_mc_drain(void *data) | 59 | static void uncached_ipi_mc_drain(void *data) |
54 | { | 60 | { |
55 | int status; | 61 | int status; |
62 | struct uncached_pool *uc_pool = (struct uncached_pool *)data; | ||
56 | 63 | ||
57 | status = ia64_pal_mc_drain(); | 64 | status = ia64_pal_mc_drain(); |
58 | if (status) | 65 | if (status != PAL_STATUS_SUCCESS) |
59 | printk(KERN_WARNING "ia64_pal_mc_drain() failed with %i on " | 66 | atomic_inc(&uc_pool->status); |
60 | "CPU %i\n", status, raw_smp_processor_id()); | ||
61 | } | 67 | } |
62 | 68 | ||
63 | 69 | ||
@@ -70,21 +76,34 @@ static void uncached_ipi_mc_drain(void *data) | |||
70 | * This is accomplished by first allocating a granule of cached memory pages | 76 | * This is accomplished by first allocating a granule of cached memory pages |
71 | * and then converting them to uncached memory pages. | 77 | * and then converting them to uncached memory pages. |
72 | */ | 78 | */ |
73 | static int uncached_add_chunk(struct gen_pool *pool, int nid) | 79 | static int uncached_add_chunk(struct uncached_pool *uc_pool, int nid) |
74 | { | 80 | { |
75 | struct page *page; | 81 | struct page *page; |
76 | int status, i; | 82 | int status, i, nchunks_added = uc_pool->nchunks_added; |
77 | unsigned long c_addr, uc_addr; | 83 | unsigned long c_addr, uc_addr; |
78 | 84 | ||
79 | if (allocated_granules >= MAX_UNCACHED_GRANULES) | 85 | if (mutex_lock_interruptible(&uc_pool->add_chunk_mutex) != 0) |
86 | return -1; /* interrupted by a signal */ | ||
87 | |||
88 | if (uc_pool->nchunks_added > nchunks_added) { | ||
89 | /* someone added a new chunk while we were waiting */ | ||
90 | mutex_unlock(&uc_pool->add_chunk_mutex); | ||
91 | return 0; | ||
92 | } | ||
93 | |||
94 | if (uc_pool->nchunks_added >= MAX_CONVERTED_CHUNKS_PER_NODE) { | ||
95 | mutex_unlock(&uc_pool->add_chunk_mutex); | ||
80 | return -1; | 96 | return -1; |
97 | } | ||
81 | 98 | ||
82 | /* attempt to allocate a granule's worth of cached memory pages */ | 99 | /* attempt to allocate a granule's worth of cached memory pages */ |
83 | 100 | ||
84 | page = alloc_pages_node(nid, GFP_KERNEL | __GFP_ZERO, | 101 | page = alloc_pages_node(nid, GFP_KERNEL | __GFP_ZERO, |
85 | IA64_GRANULE_SHIFT-PAGE_SHIFT); | 102 | IA64_GRANULE_SHIFT-PAGE_SHIFT); |
86 | if (!page) | 103 | if (!page) { |
104 | mutex_unlock(&uc_pool->add_chunk_mutex); | ||
87 | return -1; | 105 | return -1; |
106 | } | ||
88 | 107 | ||
89 | /* convert the memory pages from cached to uncached */ | 108 | /* convert the memory pages from cached to uncached */ |
90 | 109 | ||
@@ -102,11 +121,14 @@ static int uncached_add_chunk(struct gen_pool *pool, int nid) | |||
102 | flush_tlb_kernel_range(uc_addr, uc_adddr + IA64_GRANULE_SIZE); | 121 | flush_tlb_kernel_range(uc_addr, uc_adddr + IA64_GRANULE_SIZE); |
103 | 122 | ||
104 | status = ia64_pal_prefetch_visibility(PAL_VISIBILITY_PHYSICAL); | 123 | status = ia64_pal_prefetch_visibility(PAL_VISIBILITY_PHYSICAL); |
105 | if (!status) { | 124 | if (status == PAL_VISIBILITY_OK_REMOTE_NEEDED) { |
106 | status = smp_call_function(uncached_ipi_visibility, NULL, 0, 1); | 125 | atomic_set(&uc_pool->status, 0); |
107 | if (status) | 126 | status = smp_call_function(uncached_ipi_visibility, uc_pool, |
127 | 0, 1); | ||
128 | if (status || atomic_read(&uc_pool->status)) | ||
108 | goto failed; | 129 | goto failed; |
109 | } | 130 | } else if (status != PAL_VISIBILITY_OK) |
131 | goto failed; | ||
110 | 132 | ||
111 | preempt_disable(); | 133 | preempt_disable(); |
112 | 134 | ||
@@ -120,20 +142,24 @@ static int uncached_add_chunk(struct gen_pool *pool, int nid) | |||
120 | 142 | ||
121 | preempt_enable(); | 143 | preempt_enable(); |
122 | 144 | ||
123 | ia64_pal_mc_drain(); | 145 | status = ia64_pal_mc_drain(); |
124 | status = smp_call_function(uncached_ipi_mc_drain, NULL, 0, 1); | 146 | if (status != PAL_STATUS_SUCCESS) |
125 | if (status) | 147 | goto failed; |
148 | atomic_set(&uc_pool->status, 0); | ||
149 | status = smp_call_function(uncached_ipi_mc_drain, uc_pool, 0, 1); | ||
150 | if (status || atomic_read(&uc_pool->status)) | ||
126 | goto failed; | 151 | goto failed; |
127 | 152 | ||
128 | /* | 153 | /* |
129 | * The chunk of memory pages has been converted to uncached so now we | 154 | * The chunk of memory pages has been converted to uncached so now we |
130 | * can add it to the pool. | 155 | * can add it to the pool. |
131 | */ | 156 | */ |
132 | status = gen_pool_add(pool, uc_addr, IA64_GRANULE_SIZE, nid); | 157 | status = gen_pool_add(uc_pool->pool, uc_addr, IA64_GRANULE_SIZE, nid); |
133 | if (status) | 158 | if (status) |
134 | goto failed; | 159 | goto failed; |
135 | 160 | ||
136 | allocated_granules++; | 161 | uc_pool->nchunks_added++; |
162 | mutex_unlock(&uc_pool->add_chunk_mutex); | ||
137 | return 0; | 163 | return 0; |
138 | 164 | ||
139 | /* failed to convert or add the chunk so give it back to the kernel */ | 165 | /* failed to convert or add the chunk so give it back to the kernel */ |
@@ -142,6 +168,7 @@ failed: | |||
142 | ClearPageUncached(&page[i]); | 168 | ClearPageUncached(&page[i]); |
143 | 169 | ||
144 | free_pages(c_addr, IA64_GRANULE_SHIFT-PAGE_SHIFT); | 170 | free_pages(c_addr, IA64_GRANULE_SHIFT-PAGE_SHIFT); |
171 | mutex_unlock(&uc_pool->add_chunk_mutex); | ||
145 | return -1; | 172 | return -1; |
146 | } | 173 | } |
147 | 174 | ||
@@ -158,7 +185,7 @@ failed: | |||
158 | unsigned long uncached_alloc_page(int starting_nid) | 185 | unsigned long uncached_alloc_page(int starting_nid) |
159 | { | 186 | { |
160 | unsigned long uc_addr; | 187 | unsigned long uc_addr; |
161 | struct gen_pool *pool; | 188 | struct uncached_pool *uc_pool; |
162 | int nid; | 189 | int nid; |
163 | 190 | ||
164 | if (unlikely(starting_nid >= MAX_NUMNODES)) | 191 | if (unlikely(starting_nid >= MAX_NUMNODES)) |
@@ -171,14 +198,14 @@ unsigned long uncached_alloc_page(int starting_nid) | |||
171 | do { | 198 | do { |
172 | if (!node_online(nid)) | 199 | if (!node_online(nid)) |
173 | continue; | 200 | continue; |
174 | pool = uncached_pool[nid]; | 201 | uc_pool = &uncached_pools[nid]; |
175 | if (pool == NULL) | 202 | if (uc_pool->pool == NULL) |
176 | continue; | 203 | continue; |
177 | do { | 204 | do { |
178 | uc_addr = gen_pool_alloc(pool, PAGE_SIZE); | 205 | uc_addr = gen_pool_alloc(uc_pool->pool, PAGE_SIZE); |
179 | if (uc_addr != 0) | 206 | if (uc_addr != 0) |
180 | return uc_addr; | 207 | return uc_addr; |
181 | } while (uncached_add_chunk(pool, nid) == 0); | 208 | } while (uncached_add_chunk(uc_pool, nid) == 0); |
182 | 209 | ||
183 | } while ((nid = (nid + 1) % MAX_NUMNODES) != starting_nid); | 210 | } while ((nid = (nid + 1) % MAX_NUMNODES) != starting_nid); |
184 | 211 | ||
@@ -197,7 +224,7 @@ EXPORT_SYMBOL(uncached_alloc_page); | |||
197 | void uncached_free_page(unsigned long uc_addr) | 224 | void uncached_free_page(unsigned long uc_addr) |
198 | { | 225 | { |
199 | int nid = paddr_to_nid(uc_addr - __IA64_UNCACHED_OFFSET); | 226 | int nid = paddr_to_nid(uc_addr - __IA64_UNCACHED_OFFSET); |
200 | struct gen_pool *pool = uncached_pool[nid]; | 227 | struct gen_pool *pool = uncached_pools[nid].pool; |
201 | 228 | ||
202 | if (unlikely(pool == NULL)) | 229 | if (unlikely(pool == NULL)) |
203 | return; | 230 | return; |
@@ -224,7 +251,7 @@ static int __init uncached_build_memmap(unsigned long uc_start, | |||
224 | unsigned long uc_end, void *arg) | 251 | unsigned long uc_end, void *arg) |
225 | { | 252 | { |
226 | int nid = paddr_to_nid(uc_start - __IA64_UNCACHED_OFFSET); | 253 | int nid = paddr_to_nid(uc_start - __IA64_UNCACHED_OFFSET); |
227 | struct gen_pool *pool = uncached_pool[nid]; | 254 | struct gen_pool *pool = uncached_pools[nid].pool; |
228 | size_t size = uc_end - uc_start; | 255 | size_t size = uc_end - uc_start; |
229 | 256 | ||
230 | touch_softlockup_watchdog(); | 257 | touch_softlockup_watchdog(); |
@@ -242,7 +269,8 @@ static int __init uncached_init(void) | |||
242 | int nid; | 269 | int nid; |
243 | 270 | ||
244 | for_each_online_node(nid) { | 271 | for_each_online_node(nid) { |
245 | uncached_pool[nid] = gen_pool_create(PAGE_SHIFT, nid); | 272 | uncached_pools[nid].pool = gen_pool_create(PAGE_SHIFT, nid); |
273 | mutex_init(&uncached_pools[nid].add_chunk_mutex); | ||
246 | } | 274 | } |
247 | 275 | ||
248 | efi_memmap_walk_uc(uncached_build_memmap, NULL); | 276 | efi_memmap_walk_uc(uncached_build_memmap, NULL); |
diff --git a/arch/ia64/lib/Makefile b/arch/ia64/lib/Makefile index d8536a2c22a9..38fa6e49e791 100644 --- a/arch/ia64/lib/Makefile +++ b/arch/ia64/lib/Makefile | |||
@@ -14,7 +14,7 @@ lib-y := __divsi3.o __udivsi3.o __modsi3.o __umodsi3.o \ | |||
14 | lib-$(CONFIG_ITANIUM) += copy_page.o copy_user.o memcpy.o | 14 | lib-$(CONFIG_ITANIUM) += copy_page.o copy_user.o memcpy.o |
15 | lib-$(CONFIG_MCKINLEY) += copy_page_mck.o memcpy_mck.o | 15 | lib-$(CONFIG_MCKINLEY) += copy_page_mck.o memcpy_mck.o |
16 | lib-$(CONFIG_PERFMON) += carta_random.o | 16 | lib-$(CONFIG_PERFMON) += carta_random.o |
17 | lib-$(CONFIG_MD_RAID5) += xor.o | 17 | lib-$(CONFIG_MD_RAID456) += xor.o |
18 | 18 | ||
19 | AFLAGS___divdi3.o = | 19 | AFLAGS___divdi3.o = |
20 | AFLAGS___udivdi3.o = -DUNSIGNED | 20 | AFLAGS___udivdi3.o = -DUNSIGNED |
diff --git a/arch/ia64/mm/contig.c b/arch/ia64/mm/contig.c index 2a88cdd6d924..e004143ba86b 100644 --- a/arch/ia64/mm/contig.c +++ b/arch/ia64/mm/contig.c | |||
@@ -27,6 +27,7 @@ | |||
27 | 27 | ||
28 | #ifdef CONFIG_VIRTUAL_MEM_MAP | 28 | #ifdef CONFIG_VIRTUAL_MEM_MAP |
29 | static unsigned long num_dma_physpages; | 29 | static unsigned long num_dma_physpages; |
30 | static unsigned long max_gap; | ||
30 | #endif | 31 | #endif |
31 | 32 | ||
32 | /** | 33 | /** |
@@ -45,9 +46,15 @@ show_mem (void) | |||
45 | 46 | ||
46 | printk("Free swap: %6ldkB\n", nr_swap_pages<<(PAGE_SHIFT-10)); | 47 | printk("Free swap: %6ldkB\n", nr_swap_pages<<(PAGE_SHIFT-10)); |
47 | i = max_mapnr; | 48 | i = max_mapnr; |
48 | while (i-- > 0) { | 49 | for (i = 0; i < max_mapnr; i++) { |
49 | if (!pfn_valid(i)) | 50 | if (!pfn_valid(i)) { |
51 | #ifdef CONFIG_VIRTUAL_MEM_MAP | ||
52 | if (max_gap < LARGE_GAP) | ||
53 | continue; | ||
54 | i = vmemmap_find_next_valid_pfn(0, i) - 1; | ||
55 | #endif | ||
50 | continue; | 56 | continue; |
57 | } | ||
51 | total++; | 58 | total++; |
52 | if (PageReserved(mem_map+i)) | 59 | if (PageReserved(mem_map+i)) |
53 | reserved++; | 60 | reserved++; |
@@ -234,7 +241,6 @@ paging_init (void) | |||
234 | unsigned long zones_size[MAX_NR_ZONES]; | 241 | unsigned long zones_size[MAX_NR_ZONES]; |
235 | #ifdef CONFIG_VIRTUAL_MEM_MAP | 242 | #ifdef CONFIG_VIRTUAL_MEM_MAP |
236 | unsigned long zholes_size[MAX_NR_ZONES]; | 243 | unsigned long zholes_size[MAX_NR_ZONES]; |
237 | unsigned long max_gap; | ||
238 | #endif | 244 | #endif |
239 | 245 | ||
240 | /* initialize mem_map[] */ | 246 | /* initialize mem_map[] */ |
@@ -266,7 +272,6 @@ paging_init (void) | |||
266 | } | 272 | } |
267 | } | 273 | } |
268 | 274 | ||
269 | max_gap = 0; | ||
270 | efi_memmap_walk(find_largest_hole, (u64 *)&max_gap); | 275 | efi_memmap_walk(find_largest_hole, (u64 *)&max_gap); |
271 | if (max_gap < LARGE_GAP) { | 276 | if (max_gap < LARGE_GAP) { |
272 | vmem_map = (struct page *) 0; | 277 | vmem_map = (struct page *) 0; |
@@ -277,7 +282,8 @@ paging_init (void) | |||
277 | 282 | ||
278 | /* allocate virtual_mem_map */ | 283 | /* allocate virtual_mem_map */ |
279 | 284 | ||
280 | map_size = PAGE_ALIGN(max_low_pfn * sizeof(struct page)); | 285 | map_size = PAGE_ALIGN(ALIGN(max_low_pfn, MAX_ORDER_NR_PAGES) * |
286 | sizeof(struct page)); | ||
281 | vmalloc_end -= map_size; | 287 | vmalloc_end -= map_size; |
282 | vmem_map = (struct page *) vmalloc_end; | 288 | vmem_map = (struct page *) vmalloc_end; |
283 | efi_memmap_walk(create_mem_map_page_table, NULL); | 289 | efi_memmap_walk(create_mem_map_page_table, NULL); |
diff --git a/arch/ia64/mm/discontig.c b/arch/ia64/mm/discontig.c index 99bd9e30db96..d260bffa01ab 100644 --- a/arch/ia64/mm/discontig.c +++ b/arch/ia64/mm/discontig.c | |||
@@ -534,68 +534,6 @@ void __cpuinit *per_cpu_init(void) | |||
534 | } | 534 | } |
535 | #endif /* CONFIG_SMP */ | 535 | #endif /* CONFIG_SMP */ |
536 | 536 | ||
537 | #ifdef CONFIG_VIRTUAL_MEM_MAP | ||
538 | static inline int find_next_valid_pfn_for_pgdat(pg_data_t *pgdat, int i) | ||
539 | { | ||
540 | unsigned long end_address, hole_next_pfn; | ||
541 | unsigned long stop_address; | ||
542 | |||
543 | end_address = (unsigned long) &vmem_map[pgdat->node_start_pfn + i]; | ||
544 | end_address = PAGE_ALIGN(end_address); | ||
545 | |||
546 | stop_address = (unsigned long) &vmem_map[ | ||
547 | pgdat->node_start_pfn + pgdat->node_spanned_pages]; | ||
548 | |||
549 | do { | ||
550 | pgd_t *pgd; | ||
551 | pud_t *pud; | ||
552 | pmd_t *pmd; | ||
553 | pte_t *pte; | ||
554 | |||
555 | pgd = pgd_offset_k(end_address); | ||
556 | if (pgd_none(*pgd)) { | ||
557 | end_address += PGDIR_SIZE; | ||
558 | continue; | ||
559 | } | ||
560 | |||
561 | pud = pud_offset(pgd, end_address); | ||
562 | if (pud_none(*pud)) { | ||
563 | end_address += PUD_SIZE; | ||
564 | continue; | ||
565 | } | ||
566 | |||
567 | pmd = pmd_offset(pud, end_address); | ||
568 | if (pmd_none(*pmd)) { | ||
569 | end_address += PMD_SIZE; | ||
570 | continue; | ||
571 | } | ||
572 | |||
573 | pte = pte_offset_kernel(pmd, end_address); | ||
574 | retry_pte: | ||
575 | if (pte_none(*pte)) { | ||
576 | end_address += PAGE_SIZE; | ||
577 | pte++; | ||
578 | if ((end_address < stop_address) && | ||
579 | (end_address != ALIGN(end_address, 1UL << PMD_SHIFT))) | ||
580 | goto retry_pte; | ||
581 | continue; | ||
582 | } | ||
583 | /* Found next valid vmem_map page */ | ||
584 | break; | ||
585 | } while (end_address < stop_address); | ||
586 | |||
587 | end_address = min(end_address, stop_address); | ||
588 | end_address = end_address - (unsigned long) vmem_map + sizeof(struct page) - 1; | ||
589 | hole_next_pfn = end_address / sizeof(struct page); | ||
590 | return hole_next_pfn - pgdat->node_start_pfn; | ||
591 | } | ||
592 | #else | ||
593 | static inline int find_next_valid_pfn_for_pgdat(pg_data_t *pgdat, int i) | ||
594 | { | ||
595 | return i + 1; | ||
596 | } | ||
597 | #endif | ||
598 | |||
599 | /** | 537 | /** |
600 | * show_mem - give short summary of memory stats | 538 | * show_mem - give short summary of memory stats |
601 | * | 539 | * |
@@ -625,7 +563,8 @@ void show_mem(void) | |||
625 | if (pfn_valid(pgdat->node_start_pfn + i)) | 563 | if (pfn_valid(pgdat->node_start_pfn + i)) |
626 | page = pfn_to_page(pgdat->node_start_pfn + i); | 564 | page = pfn_to_page(pgdat->node_start_pfn + i); |
627 | else { | 565 | else { |
628 | i = find_next_valid_pfn_for_pgdat(pgdat, i) - 1; | 566 | i = vmemmap_find_next_valid_pfn(pgdat->node_id, |
567 | i) - 1; | ||
629 | continue; | 568 | continue; |
630 | } | 569 | } |
631 | if (PageReserved(page)) | 570 | if (PageReserved(page)) |
@@ -751,7 +690,8 @@ void __init paging_init(void) | |||
751 | efi_memmap_walk(filter_rsvd_memory, count_node_pages); | 690 | efi_memmap_walk(filter_rsvd_memory, count_node_pages); |
752 | 691 | ||
753 | #ifdef CONFIG_VIRTUAL_MEM_MAP | 692 | #ifdef CONFIG_VIRTUAL_MEM_MAP |
754 | vmalloc_end -= PAGE_ALIGN(max_low_pfn * sizeof(struct page)); | 693 | vmalloc_end -= PAGE_ALIGN(ALIGN(max_low_pfn, MAX_ORDER_NR_PAGES) * |
694 | sizeof(struct page)); | ||
755 | vmem_map = (struct page *) vmalloc_end; | 695 | vmem_map = (struct page *) vmalloc_end; |
756 | efi_memmap_walk(create_mem_map_page_table, NULL); | 696 | efi_memmap_walk(create_mem_map_page_table, NULL); |
757 | printk("Virtual mem_map starts at 0x%p\n", vmem_map); | 697 | printk("Virtual mem_map starts at 0x%p\n", vmem_map); |
diff --git a/arch/ia64/mm/init.c b/arch/ia64/mm/init.c index 2f50c064513c..30617ccb4f7e 100644 --- a/arch/ia64/mm/init.c +++ b/arch/ia64/mm/init.c | |||
@@ -415,6 +415,61 @@ ia64_mmu_init (void *my_cpu_data) | |||
415 | } | 415 | } |
416 | 416 | ||
417 | #ifdef CONFIG_VIRTUAL_MEM_MAP | 417 | #ifdef CONFIG_VIRTUAL_MEM_MAP |
418 | int vmemmap_find_next_valid_pfn(int node, int i) | ||
419 | { | ||
420 | unsigned long end_address, hole_next_pfn; | ||
421 | unsigned long stop_address; | ||
422 | pg_data_t *pgdat = NODE_DATA(node); | ||
423 | |||
424 | end_address = (unsigned long) &vmem_map[pgdat->node_start_pfn + i]; | ||
425 | end_address = PAGE_ALIGN(end_address); | ||
426 | |||
427 | stop_address = (unsigned long) &vmem_map[ | ||
428 | pgdat->node_start_pfn + pgdat->node_spanned_pages]; | ||
429 | |||
430 | do { | ||
431 | pgd_t *pgd; | ||
432 | pud_t *pud; | ||
433 | pmd_t *pmd; | ||
434 | pte_t *pte; | ||
435 | |||
436 | pgd = pgd_offset_k(end_address); | ||
437 | if (pgd_none(*pgd)) { | ||
438 | end_address += PGDIR_SIZE; | ||
439 | continue; | ||
440 | } | ||
441 | |||
442 | pud = pud_offset(pgd, end_address); | ||
443 | if (pud_none(*pud)) { | ||
444 | end_address += PUD_SIZE; | ||
445 | continue; | ||
446 | } | ||
447 | |||
448 | pmd = pmd_offset(pud, end_address); | ||
449 | if (pmd_none(*pmd)) { | ||
450 | end_address += PMD_SIZE; | ||
451 | continue; | ||
452 | } | ||
453 | |||
454 | pte = pte_offset_kernel(pmd, end_address); | ||
455 | retry_pte: | ||
456 | if (pte_none(*pte)) { | ||
457 | end_address += PAGE_SIZE; | ||
458 | pte++; | ||
459 | if ((end_address < stop_address) && | ||
460 | (end_address != ALIGN(end_address, 1UL << PMD_SHIFT))) | ||
461 | goto retry_pte; | ||
462 | continue; | ||
463 | } | ||
464 | /* Found next valid vmem_map page */ | ||
465 | break; | ||
466 | } while (end_address < stop_address); | ||
467 | |||
468 | end_address = min(end_address, stop_address); | ||
469 | end_address = end_address - (unsigned long) vmem_map + sizeof(struct page) - 1; | ||
470 | hole_next_pfn = end_address / sizeof(struct page); | ||
471 | return hole_next_pfn - pgdat->node_start_pfn; | ||
472 | } | ||
418 | 473 | ||
419 | int __init | 474 | int __init |
420 | create_mem_map_page_table (u64 start, u64 end, void *arg) | 475 | create_mem_map_page_table (u64 start, u64 end, void *arg) |
diff --git a/arch/ia64/mm/ioremap.c b/arch/ia64/mm/ioremap.c index 07bd02b6c372..4280c074d64e 100644 --- a/arch/ia64/mm/ioremap.c +++ b/arch/ia64/mm/ioremap.c | |||
@@ -32,7 +32,7 @@ ioremap (unsigned long offset, unsigned long size) | |||
32 | */ | 32 | */ |
33 | attr = kern_mem_attribute(offset, size); | 33 | attr = kern_mem_attribute(offset, size); |
34 | if (attr & EFI_MEMORY_WB) | 34 | if (attr & EFI_MEMORY_WB) |
35 | return phys_to_virt(offset); | 35 | return (void __iomem *) phys_to_virt(offset); |
36 | else if (attr & EFI_MEMORY_UC) | 36 | else if (attr & EFI_MEMORY_UC) |
37 | return __ioremap(offset, size); | 37 | return __ioremap(offset, size); |
38 | 38 | ||
@@ -43,7 +43,7 @@ ioremap (unsigned long offset, unsigned long size) | |||
43 | gran_base = GRANULEROUNDDOWN(offset); | 43 | gran_base = GRANULEROUNDDOWN(offset); |
44 | gran_size = GRANULEROUNDUP(offset + size) - gran_base; | 44 | gran_size = GRANULEROUNDUP(offset + size) - gran_base; |
45 | if (efi_mem_attribute(gran_base, gran_size) & EFI_MEMORY_WB) | 45 | if (efi_mem_attribute(gran_base, gran_size) & EFI_MEMORY_WB) |
46 | return phys_to_virt(offset); | 46 | return (void __iomem *) phys_to_virt(offset); |
47 | 47 | ||
48 | return __ioremap(offset, size); | 48 | return __ioremap(offset, size); |
49 | } | 49 | } |
@@ -53,7 +53,7 @@ void __iomem * | |||
53 | ioremap_nocache (unsigned long offset, unsigned long size) | 53 | ioremap_nocache (unsigned long offset, unsigned long size) |
54 | { | 54 | { |
55 | if (kern_mem_attribute(offset, size) & EFI_MEMORY_WB) | 55 | if (kern_mem_attribute(offset, size) & EFI_MEMORY_WB) |
56 | return 0; | 56 | return NULL; |
57 | 57 | ||
58 | return __ioremap(offset, size); | 58 | return __ioremap(offset, size); |
59 | } | 59 | } |
diff --git a/arch/ia64/sn/kernel/xpc_channel.c b/arch/ia64/sn/kernel/xpc_channel.c index c2f69f7942af..1f3540826e68 100644 --- a/arch/ia64/sn/kernel/xpc_channel.c +++ b/arch/ia64/sn/kernel/xpc_channel.c | |||
@@ -279,8 +279,8 @@ xpc_pull_remote_cachelines(struct xpc_partition *part, void *dst, | |||
279 | return part->reason; | 279 | return part->reason; |
280 | } | 280 | } |
281 | 281 | ||
282 | bte_ret = xp_bte_copy((u64) src, (u64) ia64_tpa((u64) dst), | 282 | bte_ret = xp_bte_copy((u64) src, (u64) dst, (u64) cnt, |
283 | (u64) cnt, (BTE_NORMAL | BTE_WACQUIRE), NULL); | 283 | (BTE_NORMAL | BTE_WACQUIRE), NULL); |
284 | if (bte_ret == BTE_SUCCESS) { | 284 | if (bte_ret == BTE_SUCCESS) { |
285 | return xpcSuccess; | 285 | return xpcSuccess; |
286 | } | 286 | } |
diff --git a/arch/ia64/sn/kernel/xpc_main.c b/arch/ia64/sn/kernel/xpc_main.c index 99b123a6421a..4d026f9dd98b 100644 --- a/arch/ia64/sn/kernel/xpc_main.c +++ b/arch/ia64/sn/kernel/xpc_main.c | |||
@@ -480,7 +480,7 @@ xpc_activating(void *__partid) | |||
480 | partid_t partid = (u64) __partid; | 480 | partid_t partid = (u64) __partid; |
481 | struct xpc_partition *part = &xpc_partitions[partid]; | 481 | struct xpc_partition *part = &xpc_partitions[partid]; |
482 | unsigned long irq_flags; | 482 | unsigned long irq_flags; |
483 | struct sched_param param = { sched_priority: MAX_RT_PRIO - 1 }; | 483 | struct sched_param param = { .sched_priority = MAX_RT_PRIO - 1 }; |
484 | int ret; | 484 | int ret; |
485 | 485 | ||
486 | 486 | ||
@@ -1052,6 +1052,8 @@ xpc_do_exit(enum xpc_retval reason) | |||
1052 | if (xpc_sysctl) { | 1052 | if (xpc_sysctl) { |
1053 | unregister_sysctl_table(xpc_sysctl); | 1053 | unregister_sysctl_table(xpc_sysctl); |
1054 | } | 1054 | } |
1055 | |||
1056 | kfree(xpc_remote_copy_buffer_base); | ||
1055 | } | 1057 | } |
1056 | 1058 | ||
1057 | 1059 | ||
@@ -1212,24 +1214,20 @@ xpc_init(void) | |||
1212 | partid_t partid; | 1214 | partid_t partid; |
1213 | struct xpc_partition *part; | 1215 | struct xpc_partition *part; |
1214 | pid_t pid; | 1216 | pid_t pid; |
1217 | size_t buf_size; | ||
1215 | 1218 | ||
1216 | 1219 | ||
1217 | if (!ia64_platform_is("sn2")) { | 1220 | if (!ia64_platform_is("sn2")) { |
1218 | return -ENODEV; | 1221 | return -ENODEV; |
1219 | } | 1222 | } |
1220 | 1223 | ||
1221 | /* | 1224 | |
1222 | * xpc_remote_copy_buffer is used as a temporary buffer for bte_copy'ng | 1225 | buf_size = max(XPC_RP_VARS_SIZE, |
1223 | * various portions of a partition's reserved page. Its size is based | 1226 | XPC_RP_HEADER_SIZE + XP_NASID_MASK_BYTES); |
1224 | * on the size of the reserved page header and part_nasids mask. So we | 1227 | xpc_remote_copy_buffer = xpc_kmalloc_cacheline_aligned(buf_size, |
1225 | * need to ensure that the other items will fit as well. | 1228 | GFP_KERNEL, &xpc_remote_copy_buffer_base); |
1226 | */ | 1229 | if (xpc_remote_copy_buffer == NULL) |
1227 | if (XPC_RP_VARS_SIZE > XPC_RP_HEADER_SIZE + XP_NASID_MASK_BYTES) { | 1230 | return -ENOMEM; |
1228 | dev_err(xpc_part, "xpc_remote_copy_buffer is not big enough\n"); | ||
1229 | return -EPERM; | ||
1230 | } | ||
1231 | DBUG_ON((u64) xpc_remote_copy_buffer != | ||
1232 | L1_CACHE_ALIGN((u64) xpc_remote_copy_buffer)); | ||
1233 | 1231 | ||
1234 | snprintf(xpc_part->bus_id, BUS_ID_SIZE, "part"); | 1232 | snprintf(xpc_part->bus_id, BUS_ID_SIZE, "part"); |
1235 | snprintf(xpc_chan->bus_id, BUS_ID_SIZE, "chan"); | 1233 | snprintf(xpc_chan->bus_id, BUS_ID_SIZE, "chan"); |
@@ -1293,6 +1291,8 @@ xpc_init(void) | |||
1293 | if (xpc_sysctl) { | 1291 | if (xpc_sysctl) { |
1294 | unregister_sysctl_table(xpc_sysctl); | 1292 | unregister_sysctl_table(xpc_sysctl); |
1295 | } | 1293 | } |
1294 | |||
1295 | kfree(xpc_remote_copy_buffer_base); | ||
1296 | return -EBUSY; | 1296 | return -EBUSY; |
1297 | } | 1297 | } |
1298 | 1298 | ||
@@ -1311,6 +1311,8 @@ xpc_init(void) | |||
1311 | if (xpc_sysctl) { | 1311 | if (xpc_sysctl) { |
1312 | unregister_sysctl_table(xpc_sysctl); | 1312 | unregister_sysctl_table(xpc_sysctl); |
1313 | } | 1313 | } |
1314 | |||
1315 | kfree(xpc_remote_copy_buffer_base); | ||
1314 | return -EBUSY; | 1316 | return -EBUSY; |
1315 | } | 1317 | } |
1316 | 1318 | ||
@@ -1362,6 +1364,8 @@ xpc_init(void) | |||
1362 | if (xpc_sysctl) { | 1364 | if (xpc_sysctl) { |
1363 | unregister_sysctl_table(xpc_sysctl); | 1365 | unregister_sysctl_table(xpc_sysctl); |
1364 | } | 1366 | } |
1367 | |||
1368 | kfree(xpc_remote_copy_buffer_base); | ||
1365 | return -EBUSY; | 1369 | return -EBUSY; |
1366 | } | 1370 | } |
1367 | 1371 | ||
diff --git a/arch/ia64/sn/kernel/xpc_partition.c b/arch/ia64/sn/kernel/xpc_partition.c index 2a89cfce4954..57c723f5cba4 100644 --- a/arch/ia64/sn/kernel/xpc_partition.c +++ b/arch/ia64/sn/kernel/xpc_partition.c | |||
@@ -71,19 +71,15 @@ struct xpc_partition xpc_partitions[XP_MAX_PARTITIONS + 1]; | |||
71 | * Generic buffer used to store a local copy of portions of a remote | 71 | * Generic buffer used to store a local copy of portions of a remote |
72 | * partition's reserved page (either its header and part_nasids mask, | 72 | * partition's reserved page (either its header and part_nasids mask, |
73 | * or its vars). | 73 | * or its vars). |
74 | * | ||
75 | * xpc_discovery runs only once and is a seperate thread that is | ||
76 | * very likely going to be processing in parallel with receiving | ||
77 | * interrupts. | ||
78 | */ | 74 | */ |
79 | char ____cacheline_aligned xpc_remote_copy_buffer[XPC_RP_HEADER_SIZE + | 75 | char *xpc_remote_copy_buffer; |
80 | XP_NASID_MASK_BYTES]; | 76 | void *xpc_remote_copy_buffer_base; |
81 | 77 | ||
82 | 78 | ||
83 | /* | 79 | /* |
84 | * Guarantee that the kmalloc'd memory is cacheline aligned. | 80 | * Guarantee that the kmalloc'd memory is cacheline aligned. |
85 | */ | 81 | */ |
86 | static void * | 82 | void * |
87 | xpc_kmalloc_cacheline_aligned(size_t size, gfp_t flags, void **base) | 83 | xpc_kmalloc_cacheline_aligned(size_t size, gfp_t flags, void **base) |
88 | { | 84 | { |
89 | /* see if kmalloc will give us cachline aligned memory by default */ | 85 | /* see if kmalloc will give us cachline aligned memory by default */ |
@@ -148,7 +144,7 @@ xpc_get_rsvd_page_pa(int nasid) | |||
148 | } | 144 | } |
149 | } | 145 | } |
150 | 146 | ||
151 | bte_res = xp_bte_copy(rp_pa, ia64_tpa(buf), buf_len, | 147 | bte_res = xp_bte_copy(rp_pa, buf, buf_len, |
152 | (BTE_NOTIFY | BTE_WACQUIRE), NULL); | 148 | (BTE_NOTIFY | BTE_WACQUIRE), NULL); |
153 | if (bte_res != BTE_SUCCESS) { | 149 | if (bte_res != BTE_SUCCESS) { |
154 | dev_dbg(xpc_part, "xp_bte_copy failed %i\n", bte_res); | 150 | dev_dbg(xpc_part, "xp_bte_copy failed %i\n", bte_res); |
@@ -447,7 +443,7 @@ xpc_check_remote_hb(void) | |||
447 | 443 | ||
448 | /* pull the remote_hb cache line */ | 444 | /* pull the remote_hb cache line */ |
449 | bres = xp_bte_copy(part->remote_vars_pa, | 445 | bres = xp_bte_copy(part->remote_vars_pa, |
450 | ia64_tpa((u64) remote_vars), | 446 | (u64) remote_vars, |
451 | XPC_RP_VARS_SIZE, | 447 | XPC_RP_VARS_SIZE, |
452 | (BTE_NOTIFY | BTE_WACQUIRE), NULL); | 448 | (BTE_NOTIFY | BTE_WACQUIRE), NULL); |
453 | if (bres != BTE_SUCCESS) { | 449 | if (bres != BTE_SUCCESS) { |
@@ -498,8 +494,7 @@ xpc_get_remote_rp(int nasid, u64 *discovered_nasids, | |||
498 | 494 | ||
499 | 495 | ||
500 | /* pull over the reserved page header and part_nasids mask */ | 496 | /* pull over the reserved page header and part_nasids mask */ |
501 | 497 | bres = xp_bte_copy(*remote_rp_pa, (u64) remote_rp, | |
502 | bres = xp_bte_copy(*remote_rp_pa, ia64_tpa((u64) remote_rp), | ||
503 | XPC_RP_HEADER_SIZE + xp_nasid_mask_bytes, | 498 | XPC_RP_HEADER_SIZE + xp_nasid_mask_bytes, |
504 | (BTE_NOTIFY | BTE_WACQUIRE), NULL); | 499 | (BTE_NOTIFY | BTE_WACQUIRE), NULL); |
505 | if (bres != BTE_SUCCESS) { | 500 | if (bres != BTE_SUCCESS) { |
@@ -554,11 +549,8 @@ xpc_get_remote_vars(u64 remote_vars_pa, struct xpc_vars *remote_vars) | |||
554 | return xpcVarsNotSet; | 549 | return xpcVarsNotSet; |
555 | } | 550 | } |
556 | 551 | ||
557 | |||
558 | /* pull over the cross partition variables */ | 552 | /* pull over the cross partition variables */ |
559 | 553 | bres = xp_bte_copy(remote_vars_pa, (u64) remote_vars, XPC_RP_VARS_SIZE, | |
560 | bres = xp_bte_copy(remote_vars_pa, ia64_tpa((u64) remote_vars), | ||
561 | XPC_RP_VARS_SIZE, | ||
562 | (BTE_NOTIFY | BTE_WACQUIRE), NULL); | 554 | (BTE_NOTIFY | BTE_WACQUIRE), NULL); |
563 | if (bres != BTE_SUCCESS) { | 555 | if (bres != BTE_SUCCESS) { |
564 | return xpc_map_bte_errors(bres); | 556 | return xpc_map_bte_errors(bres); |
@@ -1239,7 +1231,7 @@ xpc_initiate_partid_to_nasids(partid_t partid, void *nasid_mask) | |||
1239 | 1231 | ||
1240 | part_nasid_pa = (u64) XPC_RP_PART_NASIDS(part->remote_rp_pa); | 1232 | part_nasid_pa = (u64) XPC_RP_PART_NASIDS(part->remote_rp_pa); |
1241 | 1233 | ||
1242 | bte_res = xp_bte_copy(part_nasid_pa, ia64_tpa((u64) nasid_mask), | 1234 | bte_res = xp_bte_copy(part_nasid_pa, (u64) nasid_mask, |
1243 | xp_nasid_mask_bytes, (BTE_NOTIFY | BTE_WACQUIRE), NULL); | 1235 | xp_nasid_mask_bytes, (BTE_NOTIFY | BTE_WACQUIRE), NULL); |
1244 | 1236 | ||
1245 | return xpc_map_bte_errors(bte_res); | 1237 | return xpc_map_bte_errors(bte_res); |
diff --git a/arch/ia64/sn/pci/tioce_provider.c b/arch/ia64/sn/pci/tioce_provider.c index 17cd34284886..af7171adcd2c 100644 --- a/arch/ia64/sn/pci/tioce_provider.c +++ b/arch/ia64/sn/pci/tioce_provider.c | |||
@@ -74,7 +74,7 @@ tioce_mmr_war_pre(struct tioce_kernel *kern, void *mmr_addr) | |||
74 | else | 74 | else |
75 | mmr_war_offset = 0x158; | 75 | mmr_war_offset = 0x158; |
76 | 76 | ||
77 | readq_relaxed((void *)(mmr_base + mmr_war_offset)); | 77 | readq_relaxed((void __iomem *)(mmr_base + mmr_war_offset)); |
78 | } | 78 | } |
79 | } | 79 | } |
80 | 80 | ||
@@ -92,8 +92,8 @@ tioce_mmr_war_post(struct tioce_kernel *kern, void *mmr_addr) | |||
92 | 92 | ||
93 | if (mmr_offset < 0x45000) { | 93 | if (mmr_offset < 0x45000) { |
94 | if (mmr_offset == 0x100) | 94 | if (mmr_offset == 0x100) |
95 | readq_relaxed((void *)(mmr_base + 0x38)); | 95 | readq_relaxed((void __iomem *)(mmr_base + 0x38)); |
96 | readq_relaxed((void *)(mmr_base + 0xb050)); | 96 | readq_relaxed((void __iomem *)(mmr_base + 0xb050)); |
97 | } | 97 | } |
98 | } | 98 | } |
99 | 99 | ||
diff --git a/arch/parisc/kernel/vmlinux.lds.S b/arch/parisc/kernel/vmlinux.lds.S index 9989495a51dd..b3677fc8eef5 100644 --- a/arch/parisc/kernel/vmlinux.lds.S +++ b/arch/parisc/kernel/vmlinux.lds.S | |||
@@ -204,6 +204,7 @@ SECTIONS | |||
204 | *(.dynstr) | 204 | *(.dynstr) |
205 | *(.dynamic) | 205 | *(.dynamic) |
206 | *(.hash) | 206 | *(.hash) |
207 | *(.gnu.hash) | ||
207 | #endif | 208 | #endif |
208 | } | 209 | } |
209 | 210 | ||
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 2643dbc3f289..4d4b6fb156e1 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig | |||
@@ -354,6 +354,7 @@ endchoice | |||
354 | config PPC_PSERIES | 354 | config PPC_PSERIES |
355 | depends on PPC_MULTIPLATFORM && PPC64 | 355 | depends on PPC_MULTIPLATFORM && PPC64 |
356 | bool "IBM pSeries & new (POWER5-based) iSeries" | 356 | bool "IBM pSeries & new (POWER5-based) iSeries" |
357 | select MPIC | ||
357 | select PPC_I8259 | 358 | select PPC_I8259 |
358 | select PPC_RTAS | 359 | select PPC_RTAS |
359 | select RTAS_ERROR_LOGGING | 360 | select RTAS_ERROR_LOGGING |
@@ -363,6 +364,7 @@ config PPC_PSERIES | |||
363 | config PPC_CHRP | 364 | config PPC_CHRP |
364 | bool "Common Hardware Reference Platform (CHRP) based machines" | 365 | bool "Common Hardware Reference Platform (CHRP) based machines" |
365 | depends on PPC_MULTIPLATFORM && PPC32 | 366 | depends on PPC_MULTIPLATFORM && PPC32 |
367 | select MPIC | ||
366 | select PPC_I8259 | 368 | select PPC_I8259 |
367 | select PPC_INDIRECT_PCI | 369 | select PPC_INDIRECT_PCI |
368 | select PPC_RTAS | 370 | select PPC_RTAS |
@@ -373,6 +375,7 @@ config PPC_CHRP | |||
373 | config PPC_PMAC | 375 | config PPC_PMAC |
374 | bool "Apple PowerMac based machines" | 376 | bool "Apple PowerMac based machines" |
375 | depends on PPC_MULTIPLATFORM | 377 | depends on PPC_MULTIPLATFORM |
378 | select MPIC | ||
376 | select PPC_INDIRECT_PCI if PPC32 | 379 | select PPC_INDIRECT_PCI if PPC32 |
377 | select PPC_MPC106 if PPC32 | 380 | select PPC_MPC106 if PPC32 |
378 | default y | 381 | default y |
@@ -380,6 +383,7 @@ config PPC_PMAC | |||
380 | config PPC_PMAC64 | 383 | config PPC_PMAC64 |
381 | bool | 384 | bool |
382 | depends on PPC_PMAC && POWER4 | 385 | depends on PPC_PMAC && POWER4 |
386 | select MPIC | ||
383 | select U3_DART | 387 | select U3_DART |
384 | select MPIC_BROKEN_U3 | 388 | select MPIC_BROKEN_U3 |
385 | select GENERIC_TBSYNC | 389 | select GENERIC_TBSYNC |
@@ -389,6 +393,7 @@ config PPC_PMAC64 | |||
389 | config PPC_PREP | 393 | config PPC_PREP |
390 | bool "PowerPC Reference Platform (PReP) based machines" | 394 | bool "PowerPC Reference Platform (PReP) based machines" |
391 | depends on PPC_MULTIPLATFORM && PPC32 && BROKEN | 395 | depends on PPC_MULTIPLATFORM && PPC32 && BROKEN |
396 | select MPIC | ||
392 | select PPC_I8259 | 397 | select PPC_I8259 |
393 | select PPC_INDIRECT_PCI | 398 | select PPC_INDIRECT_PCI |
394 | select PPC_UDBG_16550 | 399 | select PPC_UDBG_16550 |
@@ -397,6 +402,7 @@ config PPC_PREP | |||
397 | config PPC_MAPLE | 402 | config PPC_MAPLE |
398 | depends on PPC_MULTIPLATFORM && PPC64 | 403 | depends on PPC_MULTIPLATFORM && PPC64 |
399 | bool "Maple 970FX Evaluation Board" | 404 | bool "Maple 970FX Evaluation Board" |
405 | select MPIC | ||
400 | select U3_DART | 406 | select U3_DART |
401 | select MPIC_BROKEN_U3 | 407 | select MPIC_BROKEN_U3 |
402 | select GENERIC_TBSYNC | 408 | select GENERIC_TBSYNC |
@@ -439,12 +445,6 @@ config U3_DART | |||
439 | depends on PPC_MULTIPLATFORM && PPC64 | 445 | depends on PPC_MULTIPLATFORM && PPC64 |
440 | default n | 446 | default n |
441 | 447 | ||
442 | config MPIC | ||
443 | depends on PPC_PSERIES || PPC_PMAC || PPC_MAPLE || PPC_CHRP \ | ||
444 | || MPC7448HPC2 | ||
445 | bool | ||
446 | default y | ||
447 | |||
448 | config PPC_RTAS | 448 | config PPC_RTAS |
449 | bool | 449 | bool |
450 | default n | 450 | default n |
@@ -504,7 +504,7 @@ config CPU_FREQ_PMAC | |||
504 | 504 | ||
505 | config CPU_FREQ_PMAC64 | 505 | config CPU_FREQ_PMAC64 |
506 | bool "Support for some Apple G5s" | 506 | bool "Support for some Apple G5s" |
507 | depends on CPU_FREQ && PMAC_SMU && PPC64 | 507 | depends on CPU_FREQ && PPC64 |
508 | select CPU_FREQ_TABLE | 508 | select CPU_FREQ_TABLE |
509 | help | 509 | help |
510 | This adds support for frequency switching on Apple iMac G5, | 510 | This adds support for frequency switching on Apple iMac G5, |
@@ -812,6 +812,14 @@ config GENERIC_ISA_DMA | |||
812 | depends on PPC64 || POWER4 || 6xx && !CPM2 | 812 | depends on PPC64 || POWER4 || 6xx && !CPM2 |
813 | default y | 813 | default y |
814 | 814 | ||
815 | config MPIC | ||
816 | bool | ||
817 | default n | ||
818 | |||
819 | config MPIC_WEIRD | ||
820 | bool | ||
821 | default n | ||
822 | |||
815 | config PPC_I8259 | 823 | config PPC_I8259 |
816 | bool | 824 | bool |
817 | default n | 825 | default n |
@@ -836,9 +844,10 @@ config MCA | |||
836 | bool | 844 | bool |
837 | 845 | ||
838 | config PCI | 846 | config PCI |
839 | bool "PCI support" if 40x || CPM2 || PPC_83xx || PPC_85xx || PPC_MPC52xx || (EMBEDDED && PPC_ISERIES) \ | 847 | bool "PCI support" if 40x || CPM2 || PPC_83xx || PPC_85xx || PPC_86xx \ |
840 | || MPC7448HPC2 | 848 | || PPC_MPC52xx || (EMBEDDED && PPC_ISERIES) || MPC7448HPC2 |
841 | default y if !40x && !CPM2 && !8xx && !APUS && !PPC_83xx && !PPC_85xx && !PPC_86xx | 849 | default y if !40x && !CPM2 && !8xx && !APUS && !PPC_83xx \ |
850 | && !PPC_85xx && !PPC_86xx | ||
842 | default PCI_PERMEDIA if !4xx && !CPM2 && !8xx && APUS | 851 | default PCI_PERMEDIA if !4xx && !CPM2 && !8xx && APUS |
843 | default PCI_QSPAN if !4xx && !CPM2 && 8xx | 852 | default PCI_QSPAN if !4xx && !CPM2 && 8xx |
844 | help | 853 | help |
diff --git a/arch/powerpc/boot/dts/mpc7448hpc2.dts b/arch/powerpc/boot/dts/mpc7448hpc2.dts new file mode 100644 index 000000000000..d7b985e6bd2f --- /dev/null +++ b/arch/powerpc/boot/dts/mpc7448hpc2.dts | |||
@@ -0,0 +1,190 @@ | |||
1 | /* | ||
2 | * MPC7448HPC2 (Taiga) board Device Tree Source | ||
3 | * | ||
4 | * Copyright 2006 Freescale Semiconductor Inc. | ||
5 | * 2006 Roy Zang <Roy Zang at freescale.com>. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License as published by the | ||
9 | * Free Software Foundation; either version 2 of the License, or (at your | ||
10 | * option) any later version. | ||
11 | */ | ||
12 | |||
13 | |||
14 | / { | ||
15 | model = "mpc7448hpc2"; | ||
16 | compatible = "mpc74xx"; | ||
17 | #address-cells = <1>; | ||
18 | #size-cells = <1>; | ||
19 | linux,phandle = <100>; | ||
20 | |||
21 | cpus { | ||
22 | #cpus = <1>; | ||
23 | #address-cells = <1>; | ||
24 | #size-cells =<0>; | ||
25 | linux,phandle = <200>; | ||
26 | |||
27 | PowerPC,7448@0 { | ||
28 | device_type = "cpu"; | ||
29 | reg = <0>; | ||
30 | d-cache-line-size = <20>; // 32 bytes | ||
31 | i-cache-line-size = <20>; // 32 bytes | ||
32 | d-cache-size = <8000>; // L1, 32K bytes | ||
33 | i-cache-size = <8000>; // L1, 32K bytes | ||
34 | timebase-frequency = <0>; // 33 MHz, from uboot | ||
35 | clock-frequency = <0>; // From U-Boot | ||
36 | bus-frequency = <0>; // From U-Boot | ||
37 | 32-bit; | ||
38 | linux,phandle = <201>; | ||
39 | linux,boot-cpu; | ||
40 | }; | ||
41 | }; | ||
42 | |||
43 | memory { | ||
44 | device_type = "memory"; | ||
45 | linux,phandle = <300>; | ||
46 | reg = <00000000 20000000 // DDR2 512M at 0 | ||
47 | >; | ||
48 | }; | ||
49 | |||
50 | tsi108@c0000000 { | ||
51 | #address-cells = <1>; | ||
52 | #size-cells = <1>; | ||
53 | #interrupt-cells = <2>; | ||
54 | device_type = "tsi-bridge"; | ||
55 | ranges = <00000000 c0000000 00010000>; | ||
56 | reg = <c0000000 00010000>; | ||
57 | bus-frequency = <0>; | ||
58 | |||
59 | i2c@7000 { | ||
60 | interrupt-parent = <7400>; | ||
61 | interrupts = <E 0>; | ||
62 | reg = <7000 400>; | ||
63 | device_type = "i2c"; | ||
64 | compatible = "tsi-i2c"; | ||
65 | }; | ||
66 | |||
67 | mdio@6000 { | ||
68 | device_type = "mdio"; | ||
69 | compatible = "tsi-ethernet"; | ||
70 | |||
71 | ethernet-phy@6000 { | ||
72 | linux,phandle = <6000>; | ||
73 | interrupt-parent = <7400>; | ||
74 | interrupts = <2 1>; | ||
75 | reg = <6000 50>; | ||
76 | phy-id = <8>; | ||
77 | device_type = "ethernet-phy"; | ||
78 | }; | ||
79 | |||
80 | ethernet-phy@6400 { | ||
81 | linux,phandle = <6400>; | ||
82 | interrupt-parent = <7400>; | ||
83 | interrupts = <2 1>; | ||
84 | reg = <6000 50>; | ||
85 | phy-id = <9>; | ||
86 | device_type = "ethernet-phy"; | ||
87 | }; | ||
88 | |||
89 | }; | ||
90 | |||
91 | ethernet@6200 { | ||
92 | #size-cells = <0>; | ||
93 | device_type = "network"; | ||
94 | model = "TSI-ETH"; | ||
95 | compatible = "tsi-ethernet"; | ||
96 | reg = <6000 200>; | ||
97 | address = [ 00 06 D2 00 00 01 ]; | ||
98 | interrupts = <10 2>; | ||
99 | interrupt-parent = <7400>; | ||
100 | phy-handle = <6000>; | ||
101 | }; | ||
102 | |||
103 | ethernet@6600 { | ||
104 | #address-cells = <1>; | ||
105 | #size-cells = <0>; | ||
106 | device_type = "network"; | ||
107 | model = "TSI-ETH"; | ||
108 | compatible = "tsi-ethernet"; | ||
109 | reg = <6400 200>; | ||
110 | address = [ 00 06 D2 00 00 02 ]; | ||
111 | interrupts = <11 2>; | ||
112 | interrupt-parent = <7400>; | ||
113 | phy-handle = <6400>; | ||
114 | }; | ||
115 | |||
116 | serial@7808 { | ||
117 | device_type = "serial"; | ||
118 | compatible = "ns16550"; | ||
119 | reg = <7808 200>; | ||
120 | clock-frequency = <3f6b5a00>; | ||
121 | interrupts = <c 0>; | ||
122 | interrupt-parent = <7400>; | ||
123 | }; | ||
124 | |||
125 | serial@7c08 { | ||
126 | device_type = "serial"; | ||
127 | compatible = "ns16550"; | ||
128 | reg = <7c08 200>; | ||
129 | clock-frequency = <3f6b5a00>; | ||
130 | interrupts = <d 0>; | ||
131 | interrupt-parent = <7400>; | ||
132 | }; | ||
133 | |||
134 | pic@7400 { | ||
135 | linux,phandle = <7400>; | ||
136 | clock-frequency = <0>; | ||
137 | interrupt-controller; | ||
138 | #address-cells = <0>; | ||
139 | #interrupt-cells = <2>; | ||
140 | reg = <7400 400>; | ||
141 | built-in; | ||
142 | compatible = "chrp,open-pic"; | ||
143 | device_type = "open-pic"; | ||
144 | big-endian; | ||
145 | }; | ||
146 | pci@1000 { | ||
147 | compatible = "tsi10x"; | ||
148 | device_type = "pci"; | ||
149 | linux,phandle = <1000>; | ||
150 | #interrupt-cells = <1>; | ||
151 | #size-cells = <2>; | ||
152 | #address-cells = <3>; | ||
153 | reg = <1000 1000>; | ||
154 | bus-range = <0 0>; | ||
155 | ranges = <02000000 0 e0000000 e0000000 0 1A000000 | ||
156 | 01000000 0 00000000 fa000000 0 00010000>; | ||
157 | clock-frequency = <7f28154>; | ||
158 | interrupt-parent = <7400>; | ||
159 | interrupts = <17 2>; | ||
160 | interrupt-map-mask = <f800 0 0 7>; | ||
161 | interrupt-map = < | ||
162 | |||
163 | /* IDSEL 0x11 */ | ||
164 | 0800 0 0 1 7400 24 0 | ||
165 | 0800 0 0 2 7400 25 0 | ||
166 | 0800 0 0 3 7400 26 0 | ||
167 | 0800 0 0 4 7400 27 0 | ||
168 | |||
169 | /* IDSEL 0x12 */ | ||
170 | 1000 0 0 1 7400 25 0 | ||
171 | 1000 0 0 2 7400 26 0 | ||
172 | 1000 0 0 3 7400 27 0 | ||
173 | 1000 0 0 4 7400 24 0 | ||
174 | |||
175 | /* IDSEL 0x13 */ | ||
176 | 1800 0 0 1 7400 26 0 | ||
177 | 1800 0 0 2 7400 27 0 | ||
178 | 1800 0 0 3 7400 24 0 | ||
179 | 1800 0 0 4 7400 25 0 | ||
180 | |||
181 | /* IDSEL 0x14 */ | ||
182 | 2000 0 0 1 7400 27 0 | ||
183 | 2000 0 0 2 7400 24 0 | ||
184 | 2000 0 0 3 7400 25 0 | ||
185 | 2000 0 0 4 7400 26 0 | ||
186 | >; | ||
187 | }; | ||
188 | }; | ||
189 | |||
190 | }; | ||
diff --git a/arch/powerpc/boot/dts/mpc8349emds.dts b/arch/powerpc/boot/dts/mpc8349emds.dts new file mode 100644 index 000000000000..12f5dbf3055f --- /dev/null +++ b/arch/powerpc/boot/dts/mpc8349emds.dts | |||
@@ -0,0 +1,328 @@ | |||
1 | /* | ||
2 | * MPC8349E MDS Device Tree Source | ||
3 | * | ||
4 | * Copyright 2005, 2006 Freescale Semiconductor Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | */ | ||
11 | |||
12 | / { | ||
13 | model = "MPC8349EMDS"; | ||
14 | compatible = "MPC834xMDS"; | ||
15 | #address-cells = <1>; | ||
16 | #size-cells = <1>; | ||
17 | |||
18 | cpus { | ||
19 | #cpus = <1>; | ||
20 | #address-cells = <1>; | ||
21 | #size-cells = <0>; | ||
22 | |||
23 | PowerPC,8349@0 { | ||
24 | device_type = "cpu"; | ||
25 | reg = <0>; | ||
26 | d-cache-line-size = <20>; // 32 bytes | ||
27 | i-cache-line-size = <20>; // 32 bytes | ||
28 | d-cache-size = <8000>; // L1, 32K | ||
29 | i-cache-size = <8000>; // L1, 32K | ||
30 | timebase-frequency = <0>; // from bootloader | ||
31 | bus-frequency = <0>; // from bootloader | ||
32 | clock-frequency = <0>; // from bootloader | ||
33 | 32-bit; | ||
34 | }; | ||
35 | }; | ||
36 | |||
37 | memory { | ||
38 | device_type = "memory"; | ||
39 | reg = <00000000 10000000>; // 256MB at 0 | ||
40 | }; | ||
41 | |||
42 | soc8349@e0000000 { | ||
43 | #address-cells = <1>; | ||
44 | #size-cells = <1>; | ||
45 | #interrupt-cells = <2>; | ||
46 | device_type = "soc"; | ||
47 | ranges = <0 e0000000 00100000>; | ||
48 | reg = <e0000000 00000200>; | ||
49 | bus-frequency = <0>; | ||
50 | |||
51 | wdt@200 { | ||
52 | device_type = "watchdog"; | ||
53 | compatible = "mpc83xx_wdt"; | ||
54 | reg = <200 100>; | ||
55 | }; | ||
56 | |||
57 | i2c@3000 { | ||
58 | device_type = "i2c"; | ||
59 | compatible = "fsl-i2c"; | ||
60 | reg = <3000 100>; | ||
61 | interrupts = <e 8>; | ||
62 | interrupt-parent = <700>; | ||
63 | dfsrr; | ||
64 | }; | ||
65 | |||
66 | i2c@3100 { | ||
67 | device_type = "i2c"; | ||
68 | compatible = "fsl-i2c"; | ||
69 | reg = <3100 100>; | ||
70 | interrupts = <f 8>; | ||
71 | interrupt-parent = <700>; | ||
72 | dfsrr; | ||
73 | }; | ||
74 | |||
75 | spi@7000 { | ||
76 | device_type = "spi"; | ||
77 | compatible = "mpc83xx_spi"; | ||
78 | reg = <7000 1000>; | ||
79 | interrupts = <10 8>; | ||
80 | interrupt-parent = <700>; | ||
81 | mode = <0>; | ||
82 | }; | ||
83 | |||
84 | /* phy type (ULPI or SERIAL) are only types supportted for MPH */ | ||
85 | /* port = 0 or 1 */ | ||
86 | usb@22000 { | ||
87 | device_type = "usb"; | ||
88 | compatible = "fsl-usb2-mph"; | ||
89 | reg = <22000 1000>; | ||
90 | #address-cells = <1>; | ||
91 | #size-cells = <0>; | ||
92 | interrupt-parent = <700>; | ||
93 | interrupts = <27 2>; | ||
94 | phy_type = "ulpi"; | ||
95 | port1; | ||
96 | }; | ||
97 | /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ | ||
98 | usb@23000 { | ||
99 | device_type = "usb"; | ||
100 | compatible = "fsl-usb2-dr"; | ||
101 | reg = <23000 1000>; | ||
102 | #address-cells = <1>; | ||
103 | #size-cells = <0>; | ||
104 | interrupt-parent = <700>; | ||
105 | interrupts = <26 2>; | ||
106 | phy_type = "ulpi"; | ||
107 | }; | ||
108 | |||
109 | mdio@24520 { | ||
110 | device_type = "mdio"; | ||
111 | compatible = "gianfar"; | ||
112 | reg = <24520 20>; | ||
113 | #address-cells = <1>; | ||
114 | #size-cells = <0>; | ||
115 | linux,phandle = <24520>; | ||
116 | ethernet-phy@0 { | ||
117 | linux,phandle = <2452000>; | ||
118 | interrupt-parent = <700>; | ||
119 | interrupts = <11 2>; | ||
120 | reg = <0>; | ||
121 | device_type = "ethernet-phy"; | ||
122 | }; | ||
123 | ethernet-phy@1 { | ||
124 | linux,phandle = <2452001>; | ||
125 | interrupt-parent = <700>; | ||
126 | interrupts = <12 2>; | ||
127 | reg = <1>; | ||
128 | device_type = "ethernet-phy"; | ||
129 | }; | ||
130 | }; | ||
131 | |||
132 | ethernet@24000 { | ||
133 | device_type = "network"; | ||
134 | model = "TSEC"; | ||
135 | compatible = "gianfar"; | ||
136 | reg = <24000 1000>; | ||
137 | address = [ 00 00 00 00 00 00 ]; | ||
138 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
139 | interrupts = <20 8 21 8 22 8>; | ||
140 | interrupt-parent = <700>; | ||
141 | phy-handle = <2452000>; | ||
142 | }; | ||
143 | |||
144 | ethernet@25000 { | ||
145 | #address-cells = <1>; | ||
146 | #size-cells = <0>; | ||
147 | device_type = "network"; | ||
148 | model = "TSEC"; | ||
149 | compatible = "gianfar"; | ||
150 | reg = <25000 1000>; | ||
151 | address = [ 00 00 00 00 00 00 ]; | ||
152 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
153 | interrupts = <23 8 24 8 25 8>; | ||
154 | interrupt-parent = <700>; | ||
155 | phy-handle = <2452001>; | ||
156 | }; | ||
157 | |||
158 | serial@4500 { | ||
159 | device_type = "serial"; | ||
160 | compatible = "ns16550"; | ||
161 | reg = <4500 100>; | ||
162 | clock-frequency = <0>; | ||
163 | interrupts = <9 8>; | ||
164 | interrupt-parent = <700>; | ||
165 | }; | ||
166 | |||
167 | serial@4600 { | ||
168 | device_type = "serial"; | ||
169 | compatible = "ns16550"; | ||
170 | reg = <4600 100>; | ||
171 | clock-frequency = <0>; | ||
172 | interrupts = <a 8>; | ||
173 | interrupt-parent = <700>; | ||
174 | }; | ||
175 | |||
176 | pci@8500 { | ||
177 | interrupt-map-mask = <f800 0 0 7>; | ||
178 | interrupt-map = < | ||
179 | |||
180 | /* IDSEL 0x11 */ | ||
181 | 8800 0 0 1 700 14 8 | ||
182 | 8800 0 0 2 700 15 8 | ||
183 | 8800 0 0 3 700 16 8 | ||
184 | 8800 0 0 4 700 17 8 | ||
185 | |||
186 | /* IDSEL 0x12 */ | ||
187 | 9000 0 0 1 700 16 8 | ||
188 | 9000 0 0 2 700 17 8 | ||
189 | 9000 0 0 3 700 14 8 | ||
190 | 9000 0 0 4 700 15 8 | ||
191 | |||
192 | /* IDSEL 0x13 */ | ||
193 | 9800 0 0 1 700 17 8 | ||
194 | 9800 0 0 2 700 14 8 | ||
195 | 9800 0 0 3 700 15 8 | ||
196 | 9800 0 0 4 700 16 8 | ||
197 | |||
198 | /* IDSEL 0x15 */ | ||
199 | a800 0 0 1 700 14 8 | ||
200 | a800 0 0 2 700 15 8 | ||
201 | a800 0 0 3 700 16 8 | ||
202 | a800 0 0 4 700 17 8 | ||
203 | |||
204 | /* IDSEL 0x16 */ | ||
205 | b000 0 0 1 700 17 8 | ||
206 | b000 0 0 2 700 14 8 | ||
207 | b000 0 0 3 700 15 8 | ||
208 | b000 0 0 4 700 16 8 | ||
209 | |||
210 | /* IDSEL 0x17 */ | ||
211 | b800 0 0 1 700 16 8 | ||
212 | b800 0 0 2 700 17 8 | ||
213 | b800 0 0 3 700 14 8 | ||
214 | b800 0 0 4 700 15 8 | ||
215 | |||
216 | /* IDSEL 0x18 */ | ||
217 | b000 0 0 1 700 15 8 | ||
218 | b000 0 0 2 700 16 8 | ||
219 | b000 0 0 3 700 17 8 | ||
220 | b000 0 0 4 700 14 8>; | ||
221 | interrupt-parent = <700>; | ||
222 | interrupts = <42 8>; | ||
223 | bus-range = <0 0>; | ||
224 | ranges = <02000000 0 a0000000 a0000000 0 10000000 | ||
225 | 42000000 0 80000000 80000000 0 10000000 | ||
226 | 01000000 0 00000000 e2000000 0 00100000>; | ||
227 | clock-frequency = <3f940aa>; | ||
228 | #interrupt-cells = <1>; | ||
229 | #size-cells = <2>; | ||
230 | #address-cells = <3>; | ||
231 | reg = <8500 100>; | ||
232 | compatible = "83xx"; | ||
233 | device_type = "pci"; | ||
234 | }; | ||
235 | |||
236 | pci@8600 { | ||
237 | interrupt-map-mask = <f800 0 0 7>; | ||
238 | interrupt-map = < | ||
239 | |||
240 | /* IDSEL 0x11 */ | ||
241 | 8800 0 0 1 700 14 8 | ||
242 | 8800 0 0 2 700 15 8 | ||
243 | 8800 0 0 3 700 16 8 | ||
244 | 8800 0 0 4 700 17 8 | ||
245 | |||
246 | /* IDSEL 0x12 */ | ||
247 | 9000 0 0 1 700 16 8 | ||
248 | 9000 0 0 2 700 17 8 | ||
249 | 9000 0 0 3 700 14 8 | ||
250 | 9000 0 0 4 700 15 8 | ||
251 | |||
252 | /* IDSEL 0x13 */ | ||
253 | 9800 0 0 1 700 17 8 | ||
254 | 9800 0 0 2 700 14 8 | ||
255 | 9800 0 0 3 700 15 8 | ||
256 | 9800 0 0 4 700 16 8 | ||
257 | |||
258 | /* IDSEL 0x15 */ | ||
259 | a800 0 0 1 700 14 8 | ||
260 | a800 0 0 2 700 15 8 | ||
261 | a800 0 0 3 700 16 8 | ||
262 | a800 0 0 4 700 17 8 | ||
263 | |||
264 | /* IDSEL 0x16 */ | ||
265 | b000 0 0 1 700 17 8 | ||
266 | b000 0 0 2 700 14 8 | ||
267 | b000 0 0 3 700 15 8 | ||
268 | b000 0 0 4 700 16 8 | ||
269 | |||
270 | /* IDSEL 0x17 */ | ||
271 | b800 0 0 1 700 16 8 | ||
272 | b800 0 0 2 700 17 8 | ||
273 | b800 0 0 3 700 14 8 | ||
274 | b800 0 0 4 700 15 8 | ||
275 | |||
276 | /* IDSEL 0x18 */ | ||
277 | b000 0 0 1 700 15 8 | ||
278 | b000 0 0 2 700 16 8 | ||
279 | b000 0 0 3 700 17 8 | ||
280 | b000 0 0 4 700 14 8>; | ||
281 | interrupt-parent = <700>; | ||
282 | interrupts = <42 8>; | ||
283 | bus-range = <0 0>; | ||
284 | ranges = <02000000 0 b0000000 b0000000 0 10000000 | ||
285 | 42000000 0 90000000 90000000 0 10000000 | ||
286 | 01000000 0 00000000 e2100000 0 00100000>; | ||
287 | clock-frequency = <3f940aa>; | ||
288 | #interrupt-cells = <1>; | ||
289 | #size-cells = <2>; | ||
290 | #address-cells = <3>; | ||
291 | reg = <8600 100>; | ||
292 | compatible = "83xx"; | ||
293 | device_type = "pci"; | ||
294 | }; | ||
295 | |||
296 | /* May need to remove if on a part without crypto engine */ | ||
297 | crypto@30000 { | ||
298 | device_type = "crypto"; | ||
299 | model = "SEC2"; | ||
300 | compatible = "talitos"; | ||
301 | reg = <30000 10000>; | ||
302 | interrupts = <b 8>; | ||
303 | interrupt-parent = <700>; | ||
304 | num-channels = <4>; | ||
305 | channel-fifo-len = <18>; | ||
306 | exec-units-mask = <0000007e>; | ||
307 | /* desc mask is for rev2.0, | ||
308 | * we need runtime fixup for >2.0 */ | ||
309 | descriptor-types-mask = <01010ebf>; | ||
310 | }; | ||
311 | |||
312 | /* IPIC | ||
313 | * interrupts cell = <intr #, sense> | ||
314 | * sense values match linux IORESOURCE_IRQ_* defines: | ||
315 | * sense == 8: Level, low assertion | ||
316 | * sense == 2: Edge, high-to-low change | ||
317 | */ | ||
318 | pic@700 { | ||
319 | linux,phandle = <700>; | ||
320 | interrupt-controller; | ||
321 | #address-cells = <0>; | ||
322 | #interrupt-cells = <2>; | ||
323 | reg = <700 100>; | ||
324 | built-in; | ||
325 | device_type = "ipic"; | ||
326 | }; | ||
327 | }; | ||
328 | }; | ||
diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts new file mode 100644 index 000000000000..5f41c1f7a5f3 --- /dev/null +++ b/arch/powerpc/boot/dts/mpc8540ads.dts | |||
@@ -0,0 +1,257 @@ | |||
1 | /* | ||
2 | * MPC8540 ADS Device Tree Source | ||
3 | * | ||
4 | * Copyright 2006 Freescale Semiconductor Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | */ | ||
11 | |||
12 | |||
13 | / { | ||
14 | model = "MPC8540ADS"; | ||
15 | compatible = "MPC85xxADS"; | ||
16 | #address-cells = <1>; | ||
17 | #size-cells = <1>; | ||
18 | linux,phandle = <100>; | ||
19 | |||
20 | cpus { | ||
21 | #cpus = <1>; | ||
22 | #address-cells = <1>; | ||
23 | #size-cells = <0>; | ||
24 | linux,phandle = <200>; | ||
25 | |||
26 | PowerPC,8540@0 { | ||
27 | device_type = "cpu"; | ||
28 | reg = <0>; | ||
29 | d-cache-line-size = <20>; // 32 bytes | ||
30 | i-cache-line-size = <20>; // 32 bytes | ||
31 | d-cache-size = <8000>; // L1, 32K | ||
32 | i-cache-size = <8000>; // L1, 32K | ||
33 | timebase-frequency = <0>; // 33 MHz, from uboot | ||
34 | bus-frequency = <0>; // 166 MHz | ||
35 | clock-frequency = <0>; // 825 MHz, from uboot | ||
36 | 32-bit; | ||
37 | linux,phandle = <201>; | ||
38 | }; | ||
39 | }; | ||
40 | |||
41 | memory { | ||
42 | device_type = "memory"; | ||
43 | linux,phandle = <300>; | ||
44 | reg = <00000000 08000000>; // 128M at 0x0 | ||
45 | }; | ||
46 | |||
47 | soc8540@e0000000 { | ||
48 | #address-cells = <1>; | ||
49 | #size-cells = <1>; | ||
50 | #interrupt-cells = <2>; | ||
51 | device_type = "soc"; | ||
52 | ranges = <0 e0000000 00100000>; | ||
53 | reg = <e0000000 00100000>; // CCSRBAR 1M | ||
54 | bus-frequency = <0>; | ||
55 | |||
56 | i2c@3000 { | ||
57 | device_type = "i2c"; | ||
58 | compatible = "fsl-i2c"; | ||
59 | reg = <3000 100>; | ||
60 | interrupts = <1b 2>; | ||
61 | interrupt-parent = <40000>; | ||
62 | dfsrr; | ||
63 | }; | ||
64 | |||
65 | mdio@24520 { | ||
66 | #address-cells = <1>; | ||
67 | #size-cells = <0>; | ||
68 | device_type = "mdio"; | ||
69 | compatible = "gianfar"; | ||
70 | reg = <24520 20>; | ||
71 | linux,phandle = <24520>; | ||
72 | ethernet-phy@0 { | ||
73 | linux,phandle = <2452000>; | ||
74 | interrupt-parent = <40000>; | ||
75 | interrupts = <35 1>; | ||
76 | reg = <0>; | ||
77 | device_type = "ethernet-phy"; | ||
78 | }; | ||
79 | ethernet-phy@1 { | ||
80 | linux,phandle = <2452001>; | ||
81 | interrupt-parent = <40000>; | ||
82 | interrupts = <35 1>; | ||
83 | reg = <1>; | ||
84 | device_type = "ethernet-phy"; | ||
85 | }; | ||
86 | ethernet-phy@3 { | ||
87 | linux,phandle = <2452003>; | ||
88 | interrupt-parent = <40000>; | ||
89 | interrupts = <37 1>; | ||
90 | reg = <3>; | ||
91 | device_type = "ethernet-phy"; | ||
92 | }; | ||
93 | }; | ||
94 | |||
95 | ethernet@24000 { | ||
96 | #address-cells = <1>; | ||
97 | #size-cells = <0>; | ||
98 | device_type = "network"; | ||
99 | model = "TSEC"; | ||
100 | compatible = "gianfar"; | ||
101 | reg = <24000 1000>; | ||
102 | address = [ 00 E0 0C 00 73 00 ]; | ||
103 | local-mac-address = [ 00 E0 0C 00 73 00 ]; | ||
104 | interrupts = <d 2 e 2 12 2>; | ||
105 | interrupt-parent = <40000>; | ||
106 | phy-handle = <2452000>; | ||
107 | }; | ||
108 | |||
109 | ethernet@25000 { | ||
110 | #address-cells = <1>; | ||
111 | #size-cells = <0>; | ||
112 | device_type = "network"; | ||
113 | model = "TSEC"; | ||
114 | compatible = "gianfar"; | ||
115 | reg = <25000 1000>; | ||
116 | address = [ 00 E0 0C 00 73 01 ]; | ||
117 | local-mac-address = [ 00 E0 0C 00 73 01 ]; | ||
118 | interrupts = <13 2 14 2 18 2>; | ||
119 | interrupt-parent = <40000>; | ||
120 | phy-handle = <2452001>; | ||
121 | }; | ||
122 | |||
123 | ethernet@26000 { | ||
124 | #address-cells = <1>; | ||
125 | #size-cells = <0>; | ||
126 | device_type = "network"; | ||
127 | model = "FEC"; | ||
128 | compatible = "gianfar"; | ||
129 | reg = <26000 1000>; | ||
130 | address = [ 00 E0 0C 00 73 02 ]; | ||
131 | local-mac-address = [ 00 E0 0C 00 73 02 ]; | ||
132 | interrupts = <19 2>; | ||
133 | interrupt-parent = <40000>; | ||
134 | phy-handle = <2452003>; | ||
135 | }; | ||
136 | |||
137 | serial@4500 { | ||
138 | device_type = "serial"; | ||
139 | compatible = "ns16550"; | ||
140 | reg = <4500 100>; // reg base, size | ||
141 | clock-frequency = <0>; // should we fill in in uboot? | ||
142 | interrupts = <1a 2>; | ||
143 | interrupt-parent = <40000>; | ||
144 | }; | ||
145 | |||
146 | serial@4600 { | ||
147 | device_type = "serial"; | ||
148 | compatible = "ns16550"; | ||
149 | reg = <4600 100>; // reg base, size | ||
150 | clock-frequency = <0>; // should we fill in in uboot? | ||
151 | interrupts = <1a 2>; | ||
152 | interrupt-parent = <40000>; | ||
153 | }; | ||
154 | pci@8000 { | ||
155 | linux,phandle = <8000>; | ||
156 | interrupt-map-mask = <f800 0 0 7>; | ||
157 | interrupt-map = < | ||
158 | |||
159 | /* IDSEL 0x02 */ | ||
160 | 1000 0 0 1 40000 31 1 | ||
161 | 1000 0 0 2 40000 32 1 | ||
162 | 1000 0 0 3 40000 33 1 | ||
163 | 1000 0 0 4 40000 34 1 | ||
164 | |||
165 | /* IDSEL 0x03 */ | ||
166 | 1800 0 0 1 40000 34 1 | ||
167 | 1800 0 0 2 40000 31 1 | ||
168 | 1800 0 0 3 40000 32 1 | ||
169 | 1800 0 0 4 40000 33 1 | ||
170 | |||
171 | /* IDSEL 0x04 */ | ||
172 | 2000 0 0 1 40000 33 1 | ||
173 | 2000 0 0 2 40000 34 1 | ||
174 | 2000 0 0 3 40000 31 1 | ||
175 | 2000 0 0 4 40000 32 1 | ||
176 | |||
177 | /* IDSEL 0x05 */ | ||
178 | 2800 0 0 1 40000 32 1 | ||
179 | 2800 0 0 2 40000 33 1 | ||
180 | 2800 0 0 3 40000 34 1 | ||
181 | 2800 0 0 4 40000 31 1 | ||
182 | |||
183 | /* IDSEL 0x0c */ | ||
184 | 6000 0 0 1 40000 31 1 | ||
185 | 6000 0 0 2 40000 32 1 | ||
186 | 6000 0 0 3 40000 33 1 | ||
187 | 6000 0 0 4 40000 34 1 | ||
188 | |||
189 | /* IDSEL 0x0d */ | ||
190 | 6800 0 0 1 40000 34 1 | ||
191 | 6800 0 0 2 40000 31 1 | ||
192 | 6800 0 0 3 40000 32 1 | ||
193 | 6800 0 0 4 40000 33 1 | ||
194 | |||
195 | /* IDSEL 0x0e */ | ||
196 | 7000 0 0 1 40000 33 1 | ||
197 | 7000 0 0 2 40000 34 1 | ||
198 | 7000 0 0 3 40000 31 1 | ||
199 | 7000 0 0 4 40000 32 1 | ||
200 | |||
201 | /* IDSEL 0x0f */ | ||
202 | 7800 0 0 1 40000 32 1 | ||
203 | 7800 0 0 2 40000 33 1 | ||
204 | 7800 0 0 3 40000 34 1 | ||
205 | 7800 0 0 4 40000 31 1 | ||
206 | |||
207 | /* IDSEL 0x12 */ | ||
208 | 9000 0 0 1 40000 31 1 | ||
209 | 9000 0 0 2 40000 32 1 | ||
210 | 9000 0 0 3 40000 33 1 | ||
211 | 9000 0 0 4 40000 34 1 | ||
212 | |||
213 | /* IDSEL 0x13 */ | ||
214 | 9800 0 0 1 40000 34 1 | ||
215 | 9800 0 0 2 40000 31 1 | ||
216 | 9800 0 0 3 40000 32 1 | ||
217 | 9800 0 0 4 40000 33 1 | ||
218 | |||
219 | /* IDSEL 0x14 */ | ||
220 | a000 0 0 1 40000 33 1 | ||
221 | a000 0 0 2 40000 34 1 | ||
222 | a000 0 0 3 40000 31 1 | ||
223 | a000 0 0 4 40000 32 1 | ||
224 | |||
225 | /* IDSEL 0x15 */ | ||
226 | a800 0 0 1 40000 32 1 | ||
227 | a800 0 0 2 40000 33 1 | ||
228 | a800 0 0 3 40000 34 1 | ||
229 | a800 0 0 4 40000 31 1>; | ||
230 | interrupt-parent = <40000>; | ||
231 | interrupts = <08 2>; | ||
232 | bus-range = <0 0>; | ||
233 | ranges = <02000000 0 80000000 80000000 0 20000000 | ||
234 | 01000000 0 00000000 e2000000 0 00100000>; | ||
235 | clock-frequency = <3f940aa>; | ||
236 | #interrupt-cells = <1>; | ||
237 | #size-cells = <2>; | ||
238 | #address-cells = <3>; | ||
239 | reg = <8000 1000>; | ||
240 | compatible = "85xx"; | ||
241 | device_type = "pci"; | ||
242 | }; | ||
243 | |||
244 | pic@40000 { | ||
245 | linux,phandle = <40000>; | ||
246 | clock-frequency = <0>; | ||
247 | interrupt-controller; | ||
248 | #address-cells = <0>; | ||
249 | #interrupt-cells = <2>; | ||
250 | reg = <40000 40000>; | ||
251 | built-in; | ||
252 | compatible = "chrp,open-pic"; | ||
253 | device_type = "open-pic"; | ||
254 | big-endian; | ||
255 | }; | ||
256 | }; | ||
257 | }; | ||
diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts new file mode 100644 index 000000000000..7be0bc659e1c --- /dev/null +++ b/arch/powerpc/boot/dts/mpc8541cds.dts | |||
@@ -0,0 +1,244 @@ | |||
1 | /* | ||
2 | * MPC8541 CDS Device Tree Source | ||
3 | * | ||
4 | * Copyright 2006 Freescale Semiconductor Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | */ | ||
11 | |||
12 | |||
13 | / { | ||
14 | model = "MPC8541CDS"; | ||
15 | compatible = "MPC85xxCDS"; | ||
16 | #address-cells = <1>; | ||
17 | #size-cells = <1>; | ||
18 | linux,phandle = <100>; | ||
19 | |||
20 | cpus { | ||
21 | #cpus = <1>; | ||
22 | #address-cells = <1>; | ||
23 | #size-cells = <0>; | ||
24 | linux,phandle = <200>; | ||
25 | |||
26 | PowerPC,8541@0 { | ||
27 | device_type = "cpu"; | ||
28 | reg = <0>; | ||
29 | d-cache-line-size = <20>; // 32 bytes | ||
30 | i-cache-line-size = <20>; // 32 bytes | ||
31 | d-cache-size = <8000>; // L1, 32K | ||
32 | i-cache-size = <8000>; // L1, 32K | ||
33 | timebase-frequency = <0>; // 33 MHz, from uboot | ||
34 | bus-frequency = <0>; // 166 MHz | ||
35 | clock-frequency = <0>; // 825 MHz, from uboot | ||
36 | 32-bit; | ||
37 | linux,phandle = <201>; | ||
38 | }; | ||
39 | }; | ||
40 | |||
41 | memory { | ||
42 | device_type = "memory"; | ||
43 | linux,phandle = <300>; | ||
44 | reg = <00000000 08000000>; // 128M at 0x0 | ||
45 | }; | ||
46 | |||
47 | soc8541@e0000000 { | ||
48 | #address-cells = <1>; | ||
49 | #size-cells = <1>; | ||
50 | #interrupt-cells = <2>; | ||
51 | device_type = "soc"; | ||
52 | ranges = <0 e0000000 00100000>; | ||
53 | reg = <e0000000 00100000>; // CCSRBAR 1M | ||
54 | bus-frequency = <0>; | ||
55 | |||
56 | i2c@3000 { | ||
57 | device_type = "i2c"; | ||
58 | compatible = "fsl-i2c"; | ||
59 | reg = <3000 100>; | ||
60 | interrupts = <1b 2>; | ||
61 | interrupt-parent = <40000>; | ||
62 | dfsrr; | ||
63 | }; | ||
64 | |||
65 | mdio@24520 { | ||
66 | #address-cells = <1>; | ||
67 | #size-cells = <0>; | ||
68 | device_type = "mdio"; | ||
69 | compatible = "gianfar"; | ||
70 | reg = <24520 20>; | ||
71 | linux,phandle = <24520>; | ||
72 | ethernet-phy@0 { | ||
73 | linux,phandle = <2452000>; | ||
74 | interrupt-parent = <40000>; | ||
75 | interrupts = <35 0>; | ||
76 | reg = <0>; | ||
77 | device_type = "ethernet-phy"; | ||
78 | }; | ||
79 | ethernet-phy@1 { | ||
80 | linux,phandle = <2452001>; | ||
81 | interrupt-parent = <40000>; | ||
82 | interrupts = <35 0>; | ||
83 | reg = <1>; | ||
84 | device_type = "ethernet-phy"; | ||
85 | }; | ||
86 | }; | ||
87 | |||
88 | ethernet@24000 { | ||
89 | #address-cells = <1>; | ||
90 | #size-cells = <0>; | ||
91 | device_type = "network"; | ||
92 | model = "TSEC"; | ||
93 | compatible = "gianfar"; | ||
94 | reg = <24000 1000>; | ||
95 | local-mac-address = [ 00 E0 0C 00 73 00 ]; | ||
96 | interrupts = <d 2 e 2 12 2>; | ||
97 | interrupt-parent = <40000>; | ||
98 | phy-handle = <2452000>; | ||
99 | }; | ||
100 | |||
101 | ethernet@25000 { | ||
102 | #address-cells = <1>; | ||
103 | #size-cells = <0>; | ||
104 | device_type = "network"; | ||
105 | model = "TSEC"; | ||
106 | compatible = "gianfar"; | ||
107 | reg = <25000 1000>; | ||
108 | local-mac-address = [ 00 E0 0C 00 73 01 ]; | ||
109 | interrupts = <13 2 14 2 18 2>; | ||
110 | interrupt-parent = <40000>; | ||
111 | phy-handle = <2452001>; | ||
112 | }; | ||
113 | |||
114 | serial@4500 { | ||
115 | device_type = "serial"; | ||
116 | compatible = "ns16550"; | ||
117 | reg = <4500 100>; // reg base, size | ||
118 | clock-frequency = <0>; // should we fill in in uboot? | ||
119 | interrupts = <1a 2>; | ||
120 | interrupt-parent = <40000>; | ||
121 | }; | ||
122 | |||
123 | serial@4600 { | ||
124 | device_type = "serial"; | ||
125 | compatible = "ns16550"; | ||
126 | reg = <4600 100>; // reg base, size | ||
127 | clock-frequency = <0>; // should we fill in in uboot? | ||
128 | interrupts = <1a 2>; | ||
129 | interrupt-parent = <40000>; | ||
130 | }; | ||
131 | |||
132 | pci@8000 { | ||
133 | linux,phandle = <8000>; | ||
134 | interrupt-map-mask = <1f800 0 0 7>; | ||
135 | interrupt-map = < | ||
136 | |||
137 | /* IDSEL 0x10 */ | ||
138 | 08000 0 0 1 40000 30 1 | ||
139 | 08000 0 0 2 40000 31 1 | ||
140 | 08000 0 0 3 40000 32 1 | ||
141 | 08000 0 0 4 40000 33 1 | ||
142 | |||
143 | /* IDSEL 0x11 */ | ||
144 | 08800 0 0 1 40000 30 1 | ||
145 | 08800 0 0 2 40000 31 1 | ||
146 | 08800 0 0 3 40000 32 1 | ||
147 | 08800 0 0 4 40000 33 1 | ||
148 | |||
149 | /* IDSEL 0x12 (Slot 1) */ | ||
150 | 09000 0 0 1 40000 30 1 | ||
151 | 09000 0 0 2 40000 31 1 | ||
152 | 09000 0 0 3 40000 32 1 | ||
153 | 09000 0 0 4 40000 33 1 | ||
154 | |||
155 | /* IDSEL 0x13 (Slot 2) */ | ||
156 | 09800 0 0 1 40000 31 1 | ||
157 | 09800 0 0 2 40000 32 1 | ||
158 | 09800 0 0 3 40000 33 1 | ||
159 | 09800 0 0 4 40000 30 1 | ||
160 | |||
161 | /* IDSEL 0x14 (Slot 3) */ | ||
162 | 0a000 0 0 1 40000 32 1 | ||
163 | 0a000 0 0 2 40000 33 1 | ||
164 | 0a000 0 0 3 40000 30 1 | ||
165 | 0a000 0 0 4 40000 31 1 | ||
166 | |||
167 | /* IDSEL 0x15 (Slot 4) */ | ||
168 | 0a800 0 0 1 40000 33 1 | ||
169 | 0a800 0 0 2 40000 30 1 | ||
170 | 0a800 0 0 3 40000 31 1 | ||
171 | 0a800 0 0 4 40000 32 1 | ||
172 | |||
173 | /* Bus 1 (Tundra Bridge) */ | ||
174 | /* IDSEL 0x12 (ISA bridge) */ | ||
175 | 19000 0 0 1 40000 30 1 | ||
176 | 19000 0 0 2 40000 31 1 | ||
177 | 19000 0 0 3 40000 32 1 | ||
178 | 19000 0 0 4 40000 33 1>; | ||
179 | interrupt-parent = <40000>; | ||
180 | interrupts = <08 2>; | ||
181 | bus-range = <0 0>; | ||
182 | ranges = <02000000 0 80000000 80000000 0 20000000 | ||
183 | 01000000 0 00000000 e2000000 0 00100000>; | ||
184 | clock-frequency = <3f940aa>; | ||
185 | #interrupt-cells = <1>; | ||
186 | #size-cells = <2>; | ||
187 | #address-cells = <3>; | ||
188 | reg = <8000 1000>; | ||
189 | compatible = "85xx"; | ||
190 | device_type = "pci"; | ||
191 | |||
192 | i8259@19000 { | ||
193 | clock-frequency = <0>; | ||
194 | interrupt-controller; | ||
195 | device_type = "interrupt-controller"; | ||
196 | reg = <19000 0 0 0 1>; | ||
197 | #address-cells = <0>; | ||
198 | #interrupt-cells = <2>; | ||
199 | built-in; | ||
200 | compatible = "chrp,iic"; | ||
201 | big-endian; | ||
202 | interrupts = <1>; | ||
203 | interrupt-parent = <8000>; | ||
204 | }; | ||
205 | }; | ||
206 | |||
207 | pci@9000 { | ||
208 | linux,phandle = <9000>; | ||
209 | interrupt-map-mask = <f800 0 0 7>; | ||
210 | interrupt-map = < | ||
211 | |||
212 | /* IDSEL 0x15 */ | ||
213 | a800 0 0 1 40000 3b 1 | ||
214 | a800 0 0 2 40000 3b 1 | ||
215 | a800 0 0 3 40000 3b 1 | ||
216 | a800 0 0 4 40000 3b 1>; | ||
217 | interrupt-parent = <40000>; | ||
218 | interrupts = <09 2>; | ||
219 | bus-range = <0 0>; | ||
220 | ranges = <02000000 0 a0000000 a0000000 0 20000000 | ||
221 | 01000000 0 00000000 e3000000 0 00100000>; | ||
222 | clock-frequency = <3f940aa>; | ||
223 | #interrupt-cells = <1>; | ||
224 | #size-cells = <2>; | ||
225 | #address-cells = <3>; | ||
226 | reg = <9000 1000>; | ||
227 | compatible = "85xx"; | ||
228 | device_type = "pci"; | ||
229 | }; | ||
230 | |||
231 | pic@40000 { | ||
232 | linux,phandle = <40000>; | ||
233 | clock-frequency = <0>; | ||
234 | interrupt-controller; | ||
235 | #address-cells = <0>; | ||
236 | #interrupt-cells = <2>; | ||
237 | reg = <40000 40000>; | ||
238 | built-in; | ||
239 | compatible = "chrp,open-pic"; | ||
240 | device_type = "open-pic"; | ||
241 | big-endian; | ||
242 | }; | ||
243 | }; | ||
244 | }; | ||
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts new file mode 100644 index 000000000000..893d7957c174 --- /dev/null +++ b/arch/powerpc/boot/dts/mpc8548cds.dts | |||
@@ -0,0 +1,287 @@ | |||
1 | /* | ||
2 | * MPC8555 CDS Device Tree Source | ||
3 | * | ||
4 | * Copyright 2006 Freescale Semiconductor Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | */ | ||
11 | |||
12 | |||
13 | / { | ||
14 | model = "MPC8548CDS"; | ||
15 | compatible = "MPC85xxCDS"; | ||
16 | #address-cells = <1>; | ||
17 | #size-cells = <1>; | ||
18 | linux,phandle = <100>; | ||
19 | |||
20 | cpus { | ||
21 | #cpus = <1>; | ||
22 | #address-cells = <1>; | ||
23 | #size-cells = <0>; | ||
24 | linux,phandle = <200>; | ||
25 | |||
26 | PowerPC,8548@0 { | ||
27 | device_type = "cpu"; | ||
28 | reg = <0>; | ||
29 | d-cache-line-size = <20>; // 32 bytes | ||
30 | i-cache-line-size = <20>; // 32 bytes | ||
31 | d-cache-size = <8000>; // L1, 32K | ||
32 | i-cache-size = <8000>; // L1, 32K | ||
33 | timebase-frequency = <0>; // 33 MHz, from uboot | ||
34 | bus-frequency = <0>; // 166 MHz | ||
35 | clock-frequency = <0>; // 825 MHz, from uboot | ||
36 | 32-bit; | ||
37 | linux,phandle = <201>; | ||
38 | }; | ||
39 | }; | ||
40 | |||
41 | memory { | ||
42 | device_type = "memory"; | ||
43 | linux,phandle = <300>; | ||
44 | reg = <00000000 08000000>; // 128M at 0x0 | ||
45 | }; | ||
46 | |||
47 | soc8548@e0000000 { | ||
48 | #address-cells = <1>; | ||
49 | #size-cells = <1>; | ||
50 | #interrupt-cells = <2>; | ||
51 | device_type = "soc"; | ||
52 | ranges = <0 e0000000 00100000>; | ||
53 | reg = <e0000000 00100000>; // CCSRBAR 1M | ||
54 | bus-frequency = <0>; | ||
55 | |||
56 | i2c@3000 { | ||
57 | device_type = "i2c"; | ||
58 | compatible = "fsl-i2c"; | ||
59 | reg = <3000 100>; | ||
60 | interrupts = <1b 2>; | ||
61 | interrupt-parent = <40000>; | ||
62 | dfsrr; | ||
63 | }; | ||
64 | |||
65 | mdio@24520 { | ||
66 | #address-cells = <1>; | ||
67 | #size-cells = <0>; | ||
68 | device_type = "mdio"; | ||
69 | compatible = "gianfar"; | ||
70 | reg = <24520 20>; | ||
71 | linux,phandle = <24520>; | ||
72 | ethernet-phy@0 { | ||
73 | linux,phandle = <2452000>; | ||
74 | interrupt-parent = <40000>; | ||
75 | interrupts = <35 0>; | ||
76 | reg = <0>; | ||
77 | device_type = "ethernet-phy"; | ||
78 | }; | ||
79 | ethernet-phy@1 { | ||
80 | linux,phandle = <2452001>; | ||
81 | interrupt-parent = <40000>; | ||
82 | interrupts = <35 0>; | ||
83 | reg = <1>; | ||
84 | device_type = "ethernet-phy"; | ||
85 | }; | ||
86 | |||
87 | ethernet-phy@2 { | ||
88 | linux,phandle = <2452002>; | ||
89 | interrupt-parent = <40000>; | ||
90 | interrupts = <35 0>; | ||
91 | reg = <2>; | ||
92 | device_type = "ethernet-phy"; | ||
93 | }; | ||
94 | ethernet-phy@3 { | ||
95 | linux,phandle = <2452003>; | ||
96 | interrupt-parent = <40000>; | ||
97 | interrupts = <35 0>; | ||
98 | reg = <3>; | ||
99 | device_type = "ethernet-phy"; | ||
100 | }; | ||
101 | }; | ||
102 | |||
103 | ethernet@24000 { | ||
104 | #address-cells = <1>; | ||
105 | #size-cells = <0>; | ||
106 | device_type = "network"; | ||
107 | model = "eTSEC"; | ||
108 | compatible = "gianfar"; | ||
109 | reg = <24000 1000>; | ||
110 | local-mac-address = [ 00 E0 0C 00 73 00 ]; | ||
111 | interrupts = <d 2 e 2 12 2>; | ||
112 | interrupt-parent = <40000>; | ||
113 | phy-handle = <2452000>; | ||
114 | }; | ||
115 | |||
116 | ethernet@25000 { | ||
117 | #address-cells = <1>; | ||
118 | #size-cells = <0>; | ||
119 | device_type = "network"; | ||
120 | model = "eTSEC"; | ||
121 | compatible = "gianfar"; | ||
122 | reg = <25000 1000>; | ||
123 | local-mac-address = [ 00 E0 0C 00 73 01 ]; | ||
124 | interrupts = <13 2 14 2 18 2>; | ||
125 | interrupt-parent = <40000>; | ||
126 | phy-handle = <2452001>; | ||
127 | }; | ||
128 | |||
129 | ethernet@26000 { | ||
130 | #address-cells = <1>; | ||
131 | #size-cells = <0>; | ||
132 | device_type = "network"; | ||
133 | model = "eTSEC"; | ||
134 | compatible = "gianfar"; | ||
135 | reg = <26000 1000>; | ||
136 | local-mac-address = [ 00 E0 0C 00 73 02 ]; | ||
137 | interrupts = <f 2 10 2 11 2>; | ||
138 | interrupt-parent = <40000>; | ||
139 | phy-handle = <2452001>; | ||
140 | }; | ||
141 | |||
142 | /* eTSEC 4 is currently broken | ||
143 | ethernet@27000 { | ||
144 | #address-cells = <1>; | ||
145 | #size-cells = <0>; | ||
146 | device_type = "network"; | ||
147 | model = "eTSEC"; | ||
148 | compatible = "gianfar"; | ||
149 | reg = <27000 1000>; | ||
150 | local-mac-address = [ 00 E0 0C 00 73 03 ]; | ||
151 | interrupts = <15 2 16 2 17 2>; | ||
152 | interrupt-parent = <40000>; | ||
153 | phy-handle = <2452001>; | ||
154 | }; | ||
155 | */ | ||
156 | |||
157 | serial@4500 { | ||
158 | device_type = "serial"; | ||
159 | compatible = "ns16550"; | ||
160 | reg = <4500 100>; // reg base, size | ||
161 | clock-frequency = <0>; // should we fill in in uboot? | ||
162 | interrupts = <1a 2>; | ||
163 | interrupt-parent = <40000>; | ||
164 | }; | ||
165 | |||
166 | serial@4600 { | ||
167 | device_type = "serial"; | ||
168 | compatible = "ns16550"; | ||
169 | reg = <4600 100>; // reg base, size | ||
170 | clock-frequency = <0>; // should we fill in in uboot? | ||
171 | interrupts = <1a 2>; | ||
172 | interrupt-parent = <40000>; | ||
173 | }; | ||
174 | |||
175 | pci@8000 { | ||
176 | linux,phandle = <8000>; | ||
177 | interrupt-map-mask = <1f800 0 0 7>; | ||
178 | interrupt-map = < | ||
179 | |||
180 | /* IDSEL 0x10 */ | ||
181 | 08000 0 0 1 40000 30 1 | ||
182 | 08000 0 0 2 40000 31 1 | ||
183 | 08000 0 0 3 40000 32 1 | ||
184 | 08000 0 0 4 40000 33 1 | ||
185 | |||
186 | /* IDSEL 0x11 */ | ||
187 | 08800 0 0 1 40000 30 1 | ||
188 | 08800 0 0 2 40000 31 1 | ||
189 | 08800 0 0 3 40000 32 1 | ||
190 | 08800 0 0 4 40000 33 1 | ||
191 | |||
192 | /* IDSEL 0x12 (Slot 1) */ | ||
193 | 09000 0 0 1 40000 30 1 | ||
194 | 09000 0 0 2 40000 31 1 | ||
195 | 09000 0 0 3 40000 32 1 | ||
196 | 09000 0 0 4 40000 33 1 | ||
197 | |||
198 | /* IDSEL 0x13 (Slot 2) */ | ||
199 | 09800 0 0 1 40000 31 1 | ||
200 | 09800 0 0 2 40000 32 1 | ||
201 | 09800 0 0 3 40000 33 1 | ||
202 | 09800 0 0 4 40000 30 1 | ||
203 | |||
204 | /* IDSEL 0x14 (Slot 3) */ | ||
205 | 0a000 0 0 1 40000 32 1 | ||
206 | 0a000 0 0 2 40000 33 1 | ||
207 | 0a000 0 0 3 40000 30 1 | ||
208 | 0a000 0 0 4 40000 31 1 | ||
209 | |||
210 | /* IDSEL 0x15 (Slot 4) */ | ||
211 | 0a800 0 0 1 40000 33 1 | ||
212 | 0a800 0 0 2 40000 30 1 | ||
213 | 0a800 0 0 3 40000 31 1 | ||
214 | 0a800 0 0 4 40000 32 1 | ||
215 | |||
216 | /* Bus 1 (Tundra Bridge) */ | ||
217 | /* IDSEL 0x12 (ISA bridge) */ | ||
218 | 19000 0 0 1 40000 30 1 | ||
219 | 19000 0 0 2 40000 31 1 | ||
220 | 19000 0 0 3 40000 32 1 | ||
221 | 19000 0 0 4 40000 33 1>; | ||
222 | interrupt-parent = <40000>; | ||
223 | interrupts = <08 2>; | ||
224 | bus-range = <0 0>; | ||
225 | ranges = <02000000 0 80000000 80000000 0 20000000 | ||
226 | 01000000 0 00000000 e2000000 0 00100000>; | ||
227 | clock-frequency = <3f940aa>; | ||
228 | #interrupt-cells = <1>; | ||
229 | #size-cells = <2>; | ||
230 | #address-cells = <3>; | ||
231 | reg = <8000 1000>; | ||
232 | compatible = "85xx"; | ||
233 | device_type = "pci"; | ||
234 | |||
235 | i8259@19000 { | ||
236 | clock-frequency = <0>; | ||
237 | interrupt-controller; | ||
238 | device_type = "interrupt-controller"; | ||
239 | reg = <19000 0 0 0 1>; | ||
240 | #address-cells = <0>; | ||
241 | #interrupt-cells = <2>; | ||
242 | built-in; | ||
243 | compatible = "chrp,iic"; | ||
244 | big-endian; | ||
245 | interrupts = <1>; | ||
246 | interrupt-parent = <8000>; | ||
247 | }; | ||
248 | }; | ||
249 | |||
250 | pci@9000 { | ||
251 | linux,phandle = <9000>; | ||
252 | interrupt-map-mask = <f800 0 0 7>; | ||
253 | interrupt-map = < | ||
254 | |||
255 | /* IDSEL 0x15 */ | ||
256 | a800 0 0 1 40000 3b 1 | ||
257 | a800 0 0 2 40000 3b 1 | ||
258 | a800 0 0 3 40000 3b 1 | ||
259 | a800 0 0 4 40000 3b 1>; | ||
260 | interrupt-parent = <40000>; | ||
261 | interrupts = <09 2>; | ||
262 | bus-range = <0 0>; | ||
263 | ranges = <02000000 0 a0000000 a0000000 0 20000000 | ||
264 | 01000000 0 00000000 e3000000 0 00100000>; | ||
265 | clock-frequency = <3f940aa>; | ||
266 | #interrupt-cells = <1>; | ||
267 | #size-cells = <2>; | ||
268 | #address-cells = <3>; | ||
269 | reg = <9000 1000>; | ||
270 | compatible = "85xx"; | ||
271 | device_type = "pci"; | ||
272 | }; | ||
273 | |||
274 | pic@40000 { | ||
275 | linux,phandle = <40000>; | ||
276 | clock-frequency = <0>; | ||
277 | interrupt-controller; | ||
278 | #address-cells = <0>; | ||
279 | #interrupt-cells = <2>; | ||
280 | reg = <40000 40000>; | ||
281 | built-in; | ||
282 | compatible = "chrp,open-pic"; | ||
283 | device_type = "open-pic"; | ||
284 | big-endian; | ||
285 | }; | ||
286 | }; | ||
287 | }; | ||
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts new file mode 100644 index 000000000000..118f5a887651 --- /dev/null +++ b/arch/powerpc/boot/dts/mpc8555cds.dts | |||
@@ -0,0 +1,244 @@ | |||
1 | /* | ||
2 | * MPC8555 CDS Device Tree Source | ||
3 | * | ||
4 | * Copyright 2006 Freescale Semiconductor Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | */ | ||
11 | |||
12 | |||
13 | / { | ||
14 | model = "MPC8555CDS"; | ||
15 | compatible = "MPC85xxCDS"; | ||
16 | #address-cells = <1>; | ||
17 | #size-cells = <1>; | ||
18 | linux,phandle = <100>; | ||
19 | |||
20 | cpus { | ||
21 | #cpus = <1>; | ||
22 | #address-cells = <1>; | ||
23 | #size-cells = <0>; | ||
24 | linux,phandle = <200>; | ||
25 | |||
26 | PowerPC,8555@0 { | ||
27 | device_type = "cpu"; | ||
28 | reg = <0>; | ||
29 | d-cache-line-size = <20>; // 32 bytes | ||
30 | i-cache-line-size = <20>; // 32 bytes | ||
31 | d-cache-size = <8000>; // L1, 32K | ||
32 | i-cache-size = <8000>; // L1, 32K | ||
33 | timebase-frequency = <0>; // 33 MHz, from uboot | ||
34 | bus-frequency = <0>; // 166 MHz | ||
35 | clock-frequency = <0>; // 825 MHz, from uboot | ||
36 | 32-bit; | ||
37 | linux,phandle = <201>; | ||
38 | }; | ||
39 | }; | ||
40 | |||
41 | memory { | ||
42 | device_type = "memory"; | ||
43 | linux,phandle = <300>; | ||
44 | reg = <00000000 08000000>; // 128M at 0x0 | ||
45 | }; | ||
46 | |||
47 | soc8555@e0000000 { | ||
48 | #address-cells = <1>; | ||
49 | #size-cells = <1>; | ||
50 | #interrupt-cells = <2>; | ||
51 | device_type = "soc"; | ||
52 | ranges = <0 e0000000 00100000>; | ||
53 | reg = <e0000000 00100000>; // CCSRBAR 1M | ||
54 | bus-frequency = <0>; | ||
55 | |||
56 | i2c@3000 { | ||
57 | device_type = "i2c"; | ||
58 | compatible = "fsl-i2c"; | ||
59 | reg = <3000 100>; | ||
60 | interrupts = <1b 2>; | ||
61 | interrupt-parent = <40000>; | ||
62 | dfsrr; | ||
63 | }; | ||
64 | |||
65 | mdio@24520 { | ||
66 | #address-cells = <1>; | ||
67 | #size-cells = <0>; | ||
68 | device_type = "mdio"; | ||
69 | compatible = "gianfar"; | ||
70 | reg = <24520 20>; | ||
71 | linux,phandle = <24520>; | ||
72 | ethernet-phy@0 { | ||
73 | linux,phandle = <2452000>; | ||
74 | interrupt-parent = <40000>; | ||
75 | interrupts = <35 0>; | ||
76 | reg = <0>; | ||
77 | device_type = "ethernet-phy"; | ||
78 | }; | ||
79 | ethernet-phy@1 { | ||
80 | linux,phandle = <2452001>; | ||
81 | interrupt-parent = <40000>; | ||
82 | interrupts = <35 0>; | ||
83 | reg = <1>; | ||
84 | device_type = "ethernet-phy"; | ||
85 | }; | ||
86 | }; | ||
87 | |||
88 | ethernet@24000 { | ||
89 | #address-cells = <1>; | ||
90 | #size-cells = <0>; | ||
91 | device_type = "network"; | ||
92 | model = "TSEC"; | ||
93 | compatible = "gianfar"; | ||
94 | reg = <24000 1000>; | ||
95 | local-mac-address = [ 00 E0 0C 00 73 00 ]; | ||
96 | interrupts = <0d 2 0e 2 12 2>; | ||
97 | interrupt-parent = <40000>; | ||
98 | phy-handle = <2452000>; | ||
99 | }; | ||
100 | |||
101 | ethernet@25000 { | ||
102 | #address-cells = <1>; | ||
103 | #size-cells = <0>; | ||
104 | device_type = "network"; | ||
105 | model = "TSEC"; | ||
106 | compatible = "gianfar"; | ||
107 | reg = <25000 1000>; | ||
108 | local-mac-address = [ 00 E0 0C 00 73 01 ]; | ||
109 | interrupts = <13 2 14 2 18 2>; | ||
110 | interrupt-parent = <40000>; | ||
111 | phy-handle = <2452001>; | ||
112 | }; | ||
113 | |||
114 | serial@4500 { | ||
115 | device_type = "serial"; | ||
116 | compatible = "ns16550"; | ||
117 | reg = <4500 100>; // reg base, size | ||
118 | clock-frequency = <0>; // should we fill in in uboot? | ||
119 | interrupts = <1a 2>; | ||
120 | interrupt-parent = <40000>; | ||
121 | }; | ||
122 | |||
123 | serial@4600 { | ||
124 | device_type = "serial"; | ||
125 | compatible = "ns16550"; | ||
126 | reg = <4600 100>; // reg base, size | ||
127 | clock-frequency = <0>; // should we fill in in uboot? | ||
128 | interrupts = <1a 2>; | ||
129 | interrupt-parent = <40000>; | ||
130 | }; | ||
131 | |||
132 | pci@8000 { | ||
133 | linux,phandle = <8000>; | ||
134 | interrupt-map-mask = <1f800 0 0 7>; | ||
135 | interrupt-map = < | ||
136 | |||
137 | /* IDSEL 0x10 */ | ||
138 | 08000 0 0 1 40000 30 1 | ||
139 | 08000 0 0 2 40000 31 1 | ||
140 | 08000 0 0 3 40000 32 1 | ||
141 | 08000 0 0 4 40000 33 1 | ||
142 | |||
143 | /* IDSEL 0x11 */ | ||
144 | 08800 0 0 1 40000 30 1 | ||
145 | 08800 0 0 2 40000 31 1 | ||
146 | 08800 0 0 3 40000 32 1 | ||
147 | 08800 0 0 4 40000 33 1 | ||
148 | |||
149 | /* IDSEL 0x12 (Slot 1) */ | ||
150 | 09000 0 0 1 40000 30 1 | ||
151 | 09000 0 0 2 40000 31 1 | ||
152 | 09000 0 0 3 40000 32 1 | ||
153 | 09000 0 0 4 40000 33 1 | ||
154 | |||
155 | /* IDSEL 0x13 (Slot 2) */ | ||
156 | 09800 0 0 1 40000 31 1 | ||
157 | 09800 0 0 2 40000 32 1 | ||
158 | 09800 0 0 3 40000 33 1 | ||
159 | 09800 0 0 4 40000 30 1 | ||
160 | |||
161 | /* IDSEL 0x14 (Slot 3) */ | ||
162 | 0a000 0 0 1 40000 32 1 | ||
163 | 0a000 0 0 2 40000 33 1 | ||
164 | 0a000 0 0 3 40000 30 1 | ||
165 | 0a000 0 0 4 40000 31 1 | ||
166 | |||
167 | /* IDSEL 0x15 (Slot 4) */ | ||
168 | 0a800 0 0 1 40000 33 1 | ||
169 | 0a800 0 0 2 40000 30 1 | ||
170 | 0a800 0 0 3 40000 31 1 | ||
171 | 0a800 0 0 4 40000 32 1 | ||
172 | |||
173 | /* Bus 1 (Tundra Bridge) */ | ||
174 | /* IDSEL 0x12 (ISA bridge) */ | ||
175 | 19000 0 0 1 40000 30 1 | ||
176 | 19000 0 0 2 40000 31 1 | ||
177 | 19000 0 0 3 40000 32 1 | ||
178 | 19000 0 0 4 40000 33 1>; | ||
179 | interrupt-parent = <40000>; | ||
180 | interrupts = <08 2>; | ||
181 | bus-range = <0 0>; | ||
182 | ranges = <02000000 0 80000000 80000000 0 20000000 | ||
183 | 01000000 0 00000000 e2000000 0 00100000>; | ||
184 | clock-frequency = <3f940aa>; | ||
185 | #interrupt-cells = <1>; | ||
186 | #size-cells = <2>; | ||
187 | #address-cells = <3>; | ||
188 | reg = <8000 1000>; | ||
189 | compatible = "85xx"; | ||
190 | device_type = "pci"; | ||
191 | |||
192 | i8259@19000 { | ||
193 | clock-frequency = <0>; | ||
194 | interrupt-controller; | ||
195 | device_type = "interrupt-controller"; | ||
196 | reg = <19000 0 0 0 1>; | ||
197 | #address-cells = <0>; | ||
198 | #interrupt-cells = <2>; | ||
199 | built-in; | ||
200 | compatible = "chrp,iic"; | ||
201 | big-endian; | ||
202 | interrupts = <1>; | ||
203 | interrupt-parent = <8000>; | ||
204 | }; | ||
205 | }; | ||
206 | |||
207 | pci@9000 { | ||
208 | linux,phandle = <9000>; | ||
209 | interrupt-map-mask = <f800 0 0 7>; | ||
210 | interrupt-map = < | ||
211 | |||
212 | /* IDSEL 0x15 */ | ||
213 | a800 0 0 1 40000 3b 1 | ||
214 | a800 0 0 2 40000 3b 1 | ||
215 | a800 0 0 3 40000 3b 1 | ||
216 | a800 0 0 4 40000 3b 1>; | ||
217 | interrupt-parent = <40000>; | ||
218 | interrupts = <09 2>; | ||
219 | bus-range = <0 0>; | ||
220 | ranges = <02000000 0 a0000000 a0000000 0 20000000 | ||
221 | 01000000 0 00000000 e3000000 0 00100000>; | ||
222 | clock-frequency = <3f940aa>; | ||
223 | #interrupt-cells = <1>; | ||
224 | #size-cells = <2>; | ||
225 | #address-cells = <3>; | ||
226 | reg = <9000 1000>; | ||
227 | compatible = "85xx"; | ||
228 | device_type = "pci"; | ||
229 | }; | ||
230 | |||
231 | pic@40000 { | ||
232 | linux,phandle = <40000>; | ||
233 | clock-frequency = <0>; | ||
234 | interrupt-controller; | ||
235 | #address-cells = <0>; | ||
236 | #interrupt-cells = <2>; | ||
237 | reg = <40000 40000>; | ||
238 | built-in; | ||
239 | compatible = "chrp,open-pic"; | ||
240 | device_type = "open-pic"; | ||
241 | big-endian; | ||
242 | }; | ||
243 | }; | ||
244 | }; | ||
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts new file mode 100644 index 000000000000..f0c7731743ea --- /dev/null +++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts | |||
@@ -0,0 +1,339 @@ | |||
1 | /* | ||
2 | * MPC8641 HPCN Device Tree Source | ||
3 | * | ||
4 | * Copyright 2006 Freescale Semiconductor Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | */ | ||
11 | |||
12 | |||
13 | / { | ||
14 | model = "MPC8641HPCN"; | ||
15 | compatible = "mpc86xx"; | ||
16 | #address-cells = <1>; | ||
17 | #size-cells = <1>; | ||
18 | |||
19 | cpus { | ||
20 | #cpus = <2>; | ||
21 | #address-cells = <1>; | ||
22 | #size-cells = <0>; | ||
23 | |||
24 | PowerPC,8641@0 { | ||
25 | device_type = "cpu"; | ||
26 | reg = <0>; | ||
27 | d-cache-line-size = <20>; // 32 bytes | ||
28 | i-cache-line-size = <20>; // 32 bytes | ||
29 | d-cache-size = <8000>; // L1, 32K | ||
30 | i-cache-size = <8000>; // L1, 32K | ||
31 | timebase-frequency = <0>; // 33 MHz, from uboot | ||
32 | bus-frequency = <0>; // From uboot | ||
33 | clock-frequency = <0>; // From uboot | ||
34 | 32-bit; | ||
35 | linux,boot-cpu; | ||
36 | }; | ||
37 | PowerPC,8641@1 { | ||
38 | device_type = "cpu"; | ||
39 | reg = <1>; | ||
40 | d-cache-line-size = <20>; // 32 bytes | ||
41 | i-cache-line-size = <20>; // 32 bytes | ||
42 | d-cache-size = <8000>; // L1, 32K | ||
43 | i-cache-size = <8000>; // L1, 32K | ||
44 | timebase-frequency = <0>; // 33 MHz, from uboot | ||
45 | bus-frequency = <0>; // From uboot | ||
46 | clock-frequency = <0>; // From uboot | ||
47 | 32-bit; | ||
48 | }; | ||
49 | }; | ||
50 | |||
51 | memory { | ||
52 | device_type = "memory"; | ||
53 | reg = <00000000 40000000>; // 1G at 0x0 | ||
54 | }; | ||
55 | |||
56 | soc8641@f8000000 { | ||
57 | #address-cells = <1>; | ||
58 | #size-cells = <1>; | ||
59 | #interrupt-cells = <2>; | ||
60 | device_type = "soc"; | ||
61 | ranges = <0 f8000000 00100000>; | ||
62 | reg = <f8000000 00100000>; // CCSRBAR 1M | ||
63 | bus-frequency = <0>; | ||
64 | |||
65 | i2c@3000 { | ||
66 | device_type = "i2c"; | ||
67 | compatible = "fsl-i2c"; | ||
68 | reg = <3000 100>; | ||
69 | interrupts = <2b 2>; | ||
70 | interrupt-parent = <40000>; | ||
71 | dfsrr; | ||
72 | }; | ||
73 | |||
74 | i2c@3100 { | ||
75 | device_type = "i2c"; | ||
76 | compatible = "fsl-i2c"; | ||
77 | reg = <3100 100>; | ||
78 | interrupts = <2b 2>; | ||
79 | interrupt-parent = <40000>; | ||
80 | dfsrr; | ||
81 | }; | ||
82 | |||
83 | mdio@24520 { | ||
84 | #address-cells = <1>; | ||
85 | #size-cells = <0>; | ||
86 | device_type = "mdio"; | ||
87 | compatible = "gianfar"; | ||
88 | reg = <24520 20>; | ||
89 | linux,phandle = <24520>; | ||
90 | ethernet-phy@0 { | ||
91 | linux,phandle = <2452000>; | ||
92 | interrupt-parent = <40000>; | ||
93 | interrupts = <4a 1>; | ||
94 | reg = <0>; | ||
95 | device_type = "ethernet-phy"; | ||
96 | }; | ||
97 | ethernet-phy@1 { | ||
98 | linux,phandle = <2452001>; | ||
99 | interrupt-parent = <40000>; | ||
100 | interrupts = <4a 1>; | ||
101 | reg = <1>; | ||
102 | device_type = "ethernet-phy"; | ||
103 | }; | ||
104 | ethernet-phy@2 { | ||
105 | linux,phandle = <2452002>; | ||
106 | interrupt-parent = <40000>; | ||
107 | interrupts = <4a 1>; | ||
108 | reg = <2>; | ||
109 | device_type = "ethernet-phy"; | ||
110 | }; | ||
111 | ethernet-phy@3 { | ||
112 | linux,phandle = <2452003>; | ||
113 | interrupt-parent = <40000>; | ||
114 | interrupts = <4a 1>; | ||
115 | reg = <3>; | ||
116 | device_type = "ethernet-phy"; | ||
117 | }; | ||
118 | }; | ||
119 | |||
120 | ethernet@24000 { | ||
121 | #address-cells = <1>; | ||
122 | #size-cells = <0>; | ||
123 | device_type = "network"; | ||
124 | model = "TSEC"; | ||
125 | compatible = "gianfar"; | ||
126 | reg = <24000 1000>; | ||
127 | mac-address = [ 00 E0 0C 00 73 00 ]; | ||
128 | interrupts = <1d 2 1e 2 22 2>; | ||
129 | interrupt-parent = <40000>; | ||
130 | phy-handle = <2452000>; | ||
131 | }; | ||
132 | |||
133 | ethernet@25000 { | ||
134 | #address-cells = <1>; | ||
135 | #size-cells = <0>; | ||
136 | device_type = "network"; | ||
137 | model = "TSEC"; | ||
138 | compatible = "gianfar"; | ||
139 | reg = <25000 1000>; | ||
140 | mac-address = [ 00 E0 0C 00 73 01 ]; | ||
141 | interrupts = <23 2 24 2 28 2>; | ||
142 | interrupt-parent = <40000>; | ||
143 | phy-handle = <2452001>; | ||
144 | }; | ||
145 | |||
146 | ethernet@26000 { | ||
147 | #address-cells = <1>; | ||
148 | #size-cells = <0>; | ||
149 | device_type = "network"; | ||
150 | model = "TSEC"; | ||
151 | compatible = "gianfar"; | ||
152 | reg = <26000 1000>; | ||
153 | mac-address = [ 00 E0 0C 00 02 FD ]; | ||
154 | interrupts = <1F 2 20 2 21 2>; | ||
155 | interrupt-parent = <40000>; | ||
156 | phy-handle = <2452002>; | ||
157 | }; | ||
158 | |||
159 | ethernet@27000 { | ||
160 | #address-cells = <1>; | ||
161 | #size-cells = <0>; | ||
162 | device_type = "network"; | ||
163 | model = "TSEC"; | ||
164 | compatible = "gianfar"; | ||
165 | reg = <27000 1000>; | ||
166 | mac-address = [ 00 E0 0C 00 03 FD ]; | ||
167 | interrupts = <25 2 26 2 27 2>; | ||
168 | interrupt-parent = <40000>; | ||
169 | phy-handle = <2452003>; | ||
170 | }; | ||
171 | serial@4500 { | ||
172 | device_type = "serial"; | ||
173 | compatible = "ns16550"; | ||
174 | reg = <4500 100>; | ||
175 | clock-frequency = <0>; | ||
176 | interrupts = <2a 2>; | ||
177 | interrupt-parent = <40000>; | ||
178 | }; | ||
179 | |||
180 | serial@4600 { | ||
181 | device_type = "serial"; | ||
182 | compatible = "ns16550"; | ||
183 | reg = <4600 100>; | ||
184 | clock-frequency = <0>; | ||
185 | interrupts = <1c 2>; | ||
186 | interrupt-parent = <40000>; | ||
187 | }; | ||
188 | |||
189 | pci@8000 { | ||
190 | compatible = "86xx"; | ||
191 | device_type = "pci"; | ||
192 | #interrupt-cells = <1>; | ||
193 | #size-cells = <2>; | ||
194 | #address-cells = <3>; | ||
195 | reg = <8000 1000>; | ||
196 | bus-range = <0 fe>; | ||
197 | ranges = <02000000 0 80000000 80000000 0 20000000 | ||
198 | 01000000 0 00000000 e2000000 0 00100000>; | ||
199 | clock-frequency = <1fca055>; | ||
200 | interrupt-parent = <40000>; | ||
201 | interrupts = <18 2>; | ||
202 | interrupt-map-mask = <f800 0 0 7>; | ||
203 | interrupt-map = < | ||
204 | /* IDSEL 0x11 */ | ||
205 | 8800 0 0 1 4d0 3 2 | ||
206 | 8800 0 0 2 4d0 4 2 | ||
207 | 8800 0 0 3 4d0 5 2 | ||
208 | 8800 0 0 4 4d0 6 2 | ||
209 | |||
210 | /* IDSEL 0x12 */ | ||
211 | 9000 0 0 1 4d0 4 2 | ||
212 | 9000 0 0 2 4d0 5 2 | ||
213 | 9000 0 0 3 4d0 6 2 | ||
214 | 9000 0 0 4 4d0 3 2 | ||
215 | |||
216 | /* IDSEL 0x13 */ | ||
217 | 9800 0 0 1 4d0 0 0 | ||
218 | 9800 0 0 2 4d0 0 0 | ||
219 | 9800 0 0 3 4d0 0 0 | ||
220 | 9800 0 0 4 4d0 0 0 | ||
221 | |||
222 | /* IDSEL 0x14 */ | ||
223 | a000 0 0 1 4d0 0 0 | ||
224 | a000 0 0 2 4d0 0 0 | ||
225 | a000 0 0 3 4d0 0 0 | ||
226 | a000 0 0 4 4d0 0 0 | ||
227 | |||
228 | /* IDSEL 0x15 */ | ||
229 | a800 0 0 1 4d0 0 0 | ||
230 | a800 0 0 2 4d0 0 0 | ||
231 | a800 0 0 3 4d0 0 0 | ||
232 | a800 0 0 4 4d0 0 0 | ||
233 | |||
234 | /* IDSEL 0x16 */ | ||
235 | b000 0 0 1 4d0 0 0 | ||
236 | b000 0 0 2 4d0 0 0 | ||
237 | b000 0 0 3 4d0 0 0 | ||
238 | b000 0 0 4 4d0 0 0 | ||
239 | |||
240 | /* IDSEL 0x17 */ | ||
241 | b800 0 0 1 4d0 0 0 | ||
242 | b800 0 0 2 4d0 0 0 | ||
243 | b800 0 0 3 4d0 0 0 | ||
244 | b800 0 0 4 4d0 0 0 | ||
245 | |||
246 | /* IDSEL 0x18 */ | ||
247 | c000 0 0 1 4d0 0 0 | ||
248 | c000 0 0 2 4d0 0 0 | ||
249 | c000 0 0 3 4d0 0 0 | ||
250 | c000 0 0 4 4d0 0 0 | ||
251 | |||
252 | /* IDSEL 0x19 */ | ||
253 | c800 0 0 1 4d0 0 0 | ||
254 | c800 0 0 2 4d0 0 0 | ||
255 | c800 0 0 3 4d0 0 0 | ||
256 | c800 0 0 4 4d0 0 0 | ||
257 | |||
258 | /* IDSEL 0x1a */ | ||
259 | d000 0 0 1 4d0 6 2 | ||
260 | d000 0 0 2 4d0 3 2 | ||
261 | d000 0 0 3 4d0 4 2 | ||
262 | d000 0 0 4 4d0 5 2 | ||
263 | |||
264 | |||
265 | /* IDSEL 0x1b */ | ||
266 | d800 0 0 1 4d0 5 2 | ||
267 | d800 0 0 2 4d0 0 0 | ||
268 | d800 0 0 3 4d0 0 0 | ||
269 | d800 0 0 4 4d0 0 0 | ||
270 | |||
271 | /* IDSEL 0x1c */ | ||
272 | e000 0 0 1 4d0 9 2 | ||
273 | e000 0 0 2 4d0 a 2 | ||
274 | e000 0 0 3 4d0 c 2 | ||
275 | e000 0 0 4 4d0 7 2 | ||
276 | |||
277 | /* IDSEL 0x1d */ | ||
278 | e800 0 0 1 4d0 9 2 | ||
279 | e800 0 0 2 4d0 a 2 | ||
280 | e800 0 0 3 4d0 b 2 | ||
281 | e800 0 0 4 4d0 0 0 | ||
282 | |||
283 | /* IDSEL 0x1e */ | ||
284 | f000 0 0 1 4d0 c 2 | ||
285 | f000 0 0 2 4d0 0 0 | ||
286 | f000 0 0 3 4d0 0 0 | ||
287 | f000 0 0 4 4d0 0 0 | ||
288 | |||
289 | /* IDSEL 0x1f */ | ||
290 | f800 0 0 1 4d0 6 2 | ||
291 | f800 0 0 2 4d0 0 0 | ||
292 | f800 0 0 3 4d0 0 0 | ||
293 | f800 0 0 4 4d0 0 0 | ||
294 | >; | ||
295 | i8259@4d0 { | ||
296 | linux,phandle = <4d0>; | ||
297 | clock-frequency = <0>; | ||
298 | interrupt-controller; | ||
299 | device_type = "interrupt-controller"; | ||
300 | #address-cells = <0>; | ||
301 | #interrupt-cells = <2>; | ||
302 | built-in; | ||
303 | compatible = "chrp,iic"; | ||
304 | big-endian; | ||
305 | interrupts = <49 2>; | ||
306 | interrupt-parent = <40000>; | ||
307 | }; | ||
308 | |||
309 | }; | ||
310 | pic@40000 { | ||
311 | linux,phandle = <40000>; | ||
312 | clock-frequency = <0>; | ||
313 | interrupt-controller; | ||
314 | #address-cells = <0>; | ||
315 | #interrupt-cells = <2>; | ||
316 | reg = <40000 40000>; | ||
317 | built-in; | ||
318 | compatible = "chrp,open-pic"; | ||
319 | device_type = "open-pic"; | ||
320 | big-endian; | ||
321 | interrupts = < | ||
322 | 10 2 11 2 12 2 13 2 | ||
323 | 14 2 15 2 16 2 17 2 | ||
324 | 18 2 19 2 1a 2 1b 2 | ||
325 | 1c 2 1d 2 1e 2 1f 2 | ||
326 | 20 2 21 2 22 2 23 2 | ||
327 | 24 2 25 2 26 2 27 2 | ||
328 | 28 2 29 2 2a 2 2b 2 | ||
329 | 2c 2 2d 2 2e 2 2f 2 | ||
330 | 30 2 31 2 32 2 33 2 | ||
331 | 34 2 35 2 36 2 37 2 | ||
332 | 38 2 39 2 2a 2 3b 2 | ||
333 | 3c 2 3d 2 3e 2 3f 2 | ||
334 | 48 1 49 2 4a 1 | ||
335 | >; | ||
336 | interrupt-parent = <40000>; | ||
337 | }; | ||
338 | }; | ||
339 | }; | ||
diff --git a/arch/powerpc/configs/g5_defconfig b/arch/powerpc/configs/g5_defconfig index a45627547d03..8c6bd17c6929 100644 --- a/arch/powerpc/configs/g5_defconfig +++ b/arch/powerpc/configs/g5_defconfig | |||
@@ -1,16 +1,18 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.17-rc1 | 3 | # Linux kernel version: 2.6.18-rc3 |
4 | # Wed Apr 19 13:24:37 2006 | 4 | # Tue Aug 8 09:12:29 2006 |
5 | # | 5 | # |
6 | CONFIG_PPC64=y | 6 | CONFIG_PPC64=y |
7 | CONFIG_64BIT=y | 7 | CONFIG_64BIT=y |
8 | CONFIG_PPC_MERGE=y | 8 | CONFIG_PPC_MERGE=y |
9 | CONFIG_MMU=y | 9 | CONFIG_MMU=y |
10 | CONFIG_GENERIC_HARDIRQS=y | 10 | CONFIG_GENERIC_HARDIRQS=y |
11 | CONFIG_IRQ_PER_CPU=y | ||
11 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y | 12 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y |
12 | CONFIG_GENERIC_HWEIGHT=y | 13 | CONFIG_GENERIC_HWEIGHT=y |
13 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 14 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
15 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
14 | CONFIG_PPC=y | 16 | CONFIG_PPC=y |
15 | CONFIG_EARLY_PRINTK=y | 17 | CONFIG_EARLY_PRINTK=y |
16 | CONFIG_COMPAT=y | 18 | CONFIG_COMPAT=y |
@@ -33,6 +35,7 @@ CONFIG_PPC_STD_MMU=y | |||
33 | CONFIG_VIRT_CPU_ACCOUNTING=y | 35 | CONFIG_VIRT_CPU_ACCOUNTING=y |
34 | CONFIG_SMP=y | 36 | CONFIG_SMP=y |
35 | CONFIG_NR_CPUS=4 | 37 | CONFIG_NR_CPUS=4 |
38 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
36 | 39 | ||
37 | # | 40 | # |
38 | # Code maturity level options | 41 | # Code maturity level options |
@@ -50,6 +53,7 @@ CONFIG_SWAP=y | |||
50 | CONFIG_SYSVIPC=y | 53 | CONFIG_SYSVIPC=y |
51 | CONFIG_POSIX_MQUEUE=y | 54 | CONFIG_POSIX_MQUEUE=y |
52 | # CONFIG_BSD_PROCESS_ACCT is not set | 55 | # CONFIG_BSD_PROCESS_ACCT is not set |
56 | # CONFIG_TASKSTATS is not set | ||
53 | CONFIG_SYSCTL=y | 57 | CONFIG_SYSCTL=y |
54 | # CONFIG_AUDIT is not set | 58 | # CONFIG_AUDIT is not set |
55 | CONFIG_IKCONFIG=y | 59 | CONFIG_IKCONFIG=y |
@@ -67,10 +71,12 @@ CONFIG_PRINTK=y | |||
67 | CONFIG_BUG=y | 71 | CONFIG_BUG=y |
68 | CONFIG_ELF_CORE=y | 72 | CONFIG_ELF_CORE=y |
69 | CONFIG_BASE_FULL=y | 73 | CONFIG_BASE_FULL=y |
74 | CONFIG_RT_MUTEXES=y | ||
70 | CONFIG_FUTEX=y | 75 | CONFIG_FUTEX=y |
71 | CONFIG_EPOLL=y | 76 | CONFIG_EPOLL=y |
72 | CONFIG_SHMEM=y | 77 | CONFIG_SHMEM=y |
73 | CONFIG_SLAB=y | 78 | CONFIG_SLAB=y |
79 | CONFIG_VM_EVENT_COUNTERS=y | ||
74 | # CONFIG_TINY_SHMEM is not set | 80 | # CONFIG_TINY_SHMEM is not set |
75 | CONFIG_BASE_SMALL=0 | 81 | CONFIG_BASE_SMALL=0 |
76 | # CONFIG_SLOB is not set | 82 | # CONFIG_SLOB is not set |
@@ -116,12 +122,16 @@ CONFIG_PPC_PMAC=y | |||
116 | CONFIG_PPC_PMAC64=y | 122 | CONFIG_PPC_PMAC64=y |
117 | # CONFIG_PPC_MAPLE is not set | 123 | # CONFIG_PPC_MAPLE is not set |
118 | # CONFIG_PPC_CELL is not set | 124 | # CONFIG_PPC_CELL is not set |
125 | # CONFIG_PPC_CELL_NATIVE is not set | ||
126 | # CONFIG_PPC_IBM_CELL_BLADE is not set | ||
127 | # CONFIG_UDBG_RTAS_CONSOLE is not set | ||
119 | CONFIG_U3_DART=y | 128 | CONFIG_U3_DART=y |
120 | CONFIG_MPIC=y | 129 | CONFIG_MPIC=y |
121 | # CONFIG_PPC_RTAS is not set | 130 | # CONFIG_PPC_RTAS is not set |
122 | # CONFIG_MMIO_NVRAM is not set | 131 | # CONFIG_MMIO_NVRAM is not set |
123 | CONFIG_MPIC_BROKEN_U3=y | 132 | CONFIG_MPIC_BROKEN_U3=y |
124 | # CONFIG_PPC_MPC106 is not set | 133 | # CONFIG_PPC_MPC106 is not set |
134 | CONFIG_PPC_970_NAP=y | ||
125 | CONFIG_CPU_FREQ=y | 135 | CONFIG_CPU_FREQ=y |
126 | CONFIG_CPU_FREQ_TABLE=y | 136 | CONFIG_CPU_FREQ_TABLE=y |
127 | # CONFIG_CPU_FREQ_DEBUG is not set | 137 | # CONFIG_CPU_FREQ_DEBUG is not set |
@@ -153,6 +163,7 @@ CONFIG_BINFMT_ELF=y | |||
153 | CONFIG_FORCE_MAX_ZONEORDER=13 | 163 | CONFIG_FORCE_MAX_ZONEORDER=13 |
154 | CONFIG_IOMMU_VMERGE=y | 164 | CONFIG_IOMMU_VMERGE=y |
155 | # CONFIG_HOTPLUG_CPU is not set | 165 | # CONFIG_HOTPLUG_CPU is not set |
166 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y | ||
156 | CONFIG_KEXEC=y | 167 | CONFIG_KEXEC=y |
157 | # CONFIG_CRASH_DUMP is not set | 168 | # CONFIG_CRASH_DUMP is not set |
158 | CONFIG_IRQ_ALL_CPUS=y | 169 | CONFIG_IRQ_ALL_CPUS=y |
@@ -168,6 +179,7 @@ CONFIG_FLATMEM=y | |||
168 | CONFIG_FLAT_NODE_MEM_MAP=y | 179 | CONFIG_FLAT_NODE_MEM_MAP=y |
169 | # CONFIG_SPARSEMEM_STATIC is not set | 180 | # CONFIG_SPARSEMEM_STATIC is not set |
170 | CONFIG_SPLIT_PTLOCK_CPUS=4 | 181 | CONFIG_SPLIT_PTLOCK_CPUS=4 |
182 | CONFIG_RESOURCES_64BIT=y | ||
171 | # CONFIG_PPC_64K_PAGES is not set | 183 | # CONFIG_PPC_64K_PAGES is not set |
172 | # CONFIG_SCHED_SMT is not set | 184 | # CONFIG_SCHED_SMT is not set |
173 | CONFIG_PROC_DEVICETREE=y | 185 | CONFIG_PROC_DEVICETREE=y |
@@ -184,6 +196,7 @@ CONFIG_GENERIC_ISA_DMA=y | |||
184 | # CONFIG_PPC_INDIRECT_PCI is not set | 196 | # CONFIG_PPC_INDIRECT_PCI is not set |
185 | CONFIG_PCI=y | 197 | CONFIG_PCI=y |
186 | CONFIG_PCI_DOMAINS=y | 198 | CONFIG_PCI_DOMAINS=y |
199 | # CONFIG_PCIEPORTBUS is not set | ||
187 | # CONFIG_PCI_DEBUG is not set | 200 | # CONFIG_PCI_DEBUG is not set |
188 | 201 | ||
189 | # | 202 | # |
@@ -227,6 +240,8 @@ CONFIG_INET_ESP=m | |||
227 | CONFIG_INET_IPCOMP=m | 240 | CONFIG_INET_IPCOMP=m |
228 | CONFIG_INET_XFRM_TUNNEL=m | 241 | CONFIG_INET_XFRM_TUNNEL=m |
229 | CONFIG_INET_TUNNEL=y | 242 | CONFIG_INET_TUNNEL=y |
243 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
244 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
230 | CONFIG_INET_DIAG=y | 245 | CONFIG_INET_DIAG=y |
231 | CONFIG_INET_TCP_DIAG=y | 246 | CONFIG_INET_TCP_DIAG=y |
232 | # CONFIG_TCP_CONG_ADVANCED is not set | 247 | # CONFIG_TCP_CONG_ADVANCED is not set |
@@ -239,6 +254,7 @@ CONFIG_TCP_CONG_BIC=y | |||
239 | # CONFIG_IPV6 is not set | 254 | # CONFIG_IPV6 is not set |
240 | # CONFIG_INET6_XFRM_TUNNEL is not set | 255 | # CONFIG_INET6_XFRM_TUNNEL is not set |
241 | # CONFIG_INET6_TUNNEL is not set | 256 | # CONFIG_INET6_TUNNEL is not set |
257 | # CONFIG_NETWORK_SECMARK is not set | ||
242 | CONFIG_NETFILTER=y | 258 | CONFIG_NETFILTER=y |
243 | # CONFIG_NETFILTER_DEBUG is not set | 259 | # CONFIG_NETFILTER_DEBUG is not set |
244 | 260 | ||
@@ -263,6 +279,7 @@ CONFIG_IP_NF_TFTP=m | |||
263 | CONFIG_IP_NF_AMANDA=m | 279 | CONFIG_IP_NF_AMANDA=m |
264 | # CONFIG_IP_NF_PPTP is not set | 280 | # CONFIG_IP_NF_PPTP is not set |
265 | # CONFIG_IP_NF_H323 is not set | 281 | # CONFIG_IP_NF_H323 is not set |
282 | # CONFIG_IP_NF_SIP is not set | ||
266 | CONFIG_IP_NF_QUEUE=m | 283 | CONFIG_IP_NF_QUEUE=m |
267 | 284 | ||
268 | # | 285 | # |
@@ -318,6 +335,7 @@ CONFIG_STANDALONE=y | |||
318 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 335 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
319 | CONFIG_FW_LOADER=y | 336 | CONFIG_FW_LOADER=y |
320 | # CONFIG_DEBUG_DRIVER is not set | 337 | # CONFIG_DEBUG_DRIVER is not set |
338 | # CONFIG_SYS_HYPERVISOR is not set | ||
321 | 339 | ||
322 | # | 340 | # |
323 | # Connector - unified userspace <-> kernelspace linker | 341 | # Connector - unified userspace <-> kernelspace linker |
@@ -355,6 +373,7 @@ CONFIG_BLK_DEV_NBD=m | |||
355 | CONFIG_BLK_DEV_RAM=y | 373 | CONFIG_BLK_DEV_RAM=y |
356 | CONFIG_BLK_DEV_RAM_COUNT=16 | 374 | CONFIG_BLK_DEV_RAM_COUNT=16 |
357 | CONFIG_BLK_DEV_RAM_SIZE=65536 | 375 | CONFIG_BLK_DEV_RAM_SIZE=65536 |
376 | CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 | ||
358 | CONFIG_BLK_DEV_INITRD=y | 377 | CONFIG_BLK_DEV_INITRD=y |
359 | CONFIG_CDROM_PKTCDVD=m | 378 | CONFIG_CDROM_PKTCDVD=m |
360 | CONFIG_CDROM_PKTCDVD_BUFFERS=8 | 379 | CONFIG_CDROM_PKTCDVD_BUFFERS=8 |
@@ -417,7 +436,6 @@ CONFIG_IDEDMA_PCI_AUTO=y | |||
417 | CONFIG_BLK_DEV_IDE_PMAC=y | 436 | CONFIG_BLK_DEV_IDE_PMAC=y |
418 | CONFIG_BLK_DEV_IDE_PMAC_ATA100FIRST=y | 437 | CONFIG_BLK_DEV_IDE_PMAC_ATA100FIRST=y |
419 | CONFIG_BLK_DEV_IDEDMA_PMAC=y | 438 | CONFIG_BLK_DEV_IDEDMA_PMAC=y |
420 | # CONFIG_BLK_DEV_IDE_PMAC_BLINK is not set | ||
421 | # CONFIG_IDE_ARM is not set | 439 | # CONFIG_IDE_ARM is not set |
422 | CONFIG_BLK_DEV_IDEDMA=y | 440 | CONFIG_BLK_DEV_IDEDMA=y |
423 | # CONFIG_IDEDMA_IVB is not set | 441 | # CONFIG_IDEDMA_IVB is not set |
@@ -478,6 +496,7 @@ CONFIG_SCSI_SATA_SVW=y | |||
478 | # CONFIG_SCSI_SATA_MV is not set | 496 | # CONFIG_SCSI_SATA_MV is not set |
479 | # CONFIG_SCSI_SATA_NV is not set | 497 | # CONFIG_SCSI_SATA_NV is not set |
480 | # CONFIG_SCSI_PDC_ADMA is not set | 498 | # CONFIG_SCSI_PDC_ADMA is not set |
499 | # CONFIG_SCSI_HPTIOP is not set | ||
481 | # CONFIG_SCSI_SATA_QSTOR is not set | 500 | # CONFIG_SCSI_SATA_QSTOR is not set |
482 | # CONFIG_SCSI_SATA_PROMISE is not set | 501 | # CONFIG_SCSI_SATA_PROMISE is not set |
483 | # CONFIG_SCSI_SATA_SX4 is not set | 502 | # CONFIG_SCSI_SATA_SX4 is not set |
@@ -497,7 +516,6 @@ CONFIG_SCSI_SATA_SVW=y | |||
497 | # CONFIG_SCSI_INIA100 is not set | 516 | # CONFIG_SCSI_INIA100 is not set |
498 | # CONFIG_SCSI_SYM53C8XX_2 is not set | 517 | # CONFIG_SCSI_SYM53C8XX_2 is not set |
499 | # CONFIG_SCSI_IPR is not set | 518 | # CONFIG_SCSI_IPR is not set |
500 | # CONFIG_SCSI_QLOGIC_FC is not set | ||
501 | # CONFIG_SCSI_QLOGIC_1280 is not set | 519 | # CONFIG_SCSI_QLOGIC_1280 is not set |
502 | # CONFIG_SCSI_QLA_FC is not set | 520 | # CONFIG_SCSI_QLA_FC is not set |
503 | # CONFIG_SCSI_LPFC is not set | 521 | # CONFIG_SCSI_LPFC is not set |
@@ -514,9 +532,7 @@ CONFIG_MD_LINEAR=y | |||
514 | CONFIG_MD_RAID0=y | 532 | CONFIG_MD_RAID0=y |
515 | CONFIG_MD_RAID1=y | 533 | CONFIG_MD_RAID1=y |
516 | CONFIG_MD_RAID10=m | 534 | CONFIG_MD_RAID10=m |
517 | CONFIG_MD_RAID5=y | 535 | # CONFIG_MD_RAID456 is not set |
518 | # CONFIG_MD_RAID5_RESHAPE is not set | ||
519 | CONFIG_MD_RAID6=m | ||
520 | CONFIG_MD_MULTIPATH=m | 536 | CONFIG_MD_MULTIPATH=m |
521 | CONFIG_MD_FAULTY=m | 537 | CONFIG_MD_FAULTY=m |
522 | CONFIG_BLK_DEV_DM=y | 538 | CONFIG_BLK_DEV_DM=y |
@@ -559,7 +575,6 @@ CONFIG_IEEE1394_OHCI1394=y | |||
559 | # | 575 | # |
560 | CONFIG_IEEE1394_VIDEO1394=m | 576 | CONFIG_IEEE1394_VIDEO1394=m |
561 | CONFIG_IEEE1394_SBP2=m | 577 | CONFIG_IEEE1394_SBP2=m |
562 | # CONFIG_IEEE1394_SBP2_PHYS_DMA is not set | ||
563 | CONFIG_IEEE1394_ETH1394=m | 578 | CONFIG_IEEE1394_ETH1394=m |
564 | CONFIG_IEEE1394_DV1394=m | 579 | CONFIG_IEEE1394_DV1394=m |
565 | CONFIG_IEEE1394_RAWIO=y | 580 | CONFIG_IEEE1394_RAWIO=y |
@@ -573,6 +588,7 @@ CONFIG_IEEE1394_RAWIO=y | |||
573 | # Macintosh device drivers | 588 | # Macintosh device drivers |
574 | # | 589 | # |
575 | CONFIG_ADB_PMU=y | 590 | CONFIG_ADB_PMU=y |
591 | # CONFIG_ADB_PMU_LED is not set | ||
576 | CONFIG_PMAC_SMU=y | 592 | CONFIG_PMAC_SMU=y |
577 | CONFIG_THERM_PM72=y | 593 | CONFIG_THERM_PM72=y |
578 | CONFIG_WINDFARM=y | 594 | CONFIG_WINDFARM=y |
@@ -643,6 +659,7 @@ CONFIG_TIGON3=y | |||
643 | # CONFIG_CHELSIO_T1 is not set | 659 | # CONFIG_CHELSIO_T1 is not set |
644 | # CONFIG_IXGB is not set | 660 | # CONFIG_IXGB is not set |
645 | # CONFIG_S2IO is not set | 661 | # CONFIG_S2IO is not set |
662 | # CONFIG_MYRI10GE is not set | ||
646 | 663 | ||
647 | # | 664 | # |
648 | # Token Ring devices | 665 | # Token Ring devices |
@@ -739,6 +756,7 @@ CONFIG_SERIO=y | |||
739 | CONFIG_VT=y | 756 | CONFIG_VT=y |
740 | CONFIG_VT_CONSOLE=y | 757 | CONFIG_VT_CONSOLE=y |
741 | CONFIG_HW_CONSOLE=y | 758 | CONFIG_HW_CONSOLE=y |
759 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
742 | # CONFIG_SERIAL_NONSTANDARD is not set | 760 | # CONFIG_SERIAL_NONSTANDARD is not set |
743 | 761 | ||
744 | # | 762 | # |
@@ -754,6 +772,7 @@ CONFIG_HW_CONSOLE=y | |||
754 | CONFIG_UNIX98_PTYS=y | 772 | CONFIG_UNIX98_PTYS=y |
755 | CONFIG_LEGACY_PTYS=y | 773 | CONFIG_LEGACY_PTYS=y |
756 | CONFIG_LEGACY_PTY_COUNT=256 | 774 | CONFIG_LEGACY_PTY_COUNT=256 |
775 | # CONFIG_BRIQ_PANEL is not set | ||
757 | 776 | ||
758 | # | 777 | # |
759 | # IPMI | 778 | # IPMI |
@@ -764,6 +783,7 @@ CONFIG_LEGACY_PTY_COUNT=256 | |||
764 | # Watchdog Cards | 783 | # Watchdog Cards |
765 | # | 784 | # |
766 | # CONFIG_WATCHDOG is not set | 785 | # CONFIG_WATCHDOG is not set |
786 | # CONFIG_HW_RANDOM is not set | ||
767 | CONFIG_GEN_RTC=y | 787 | CONFIG_GEN_RTC=y |
768 | # CONFIG_GEN_RTC_X is not set | 788 | # CONFIG_GEN_RTC_X is not set |
769 | # CONFIG_DTLK is not set | 789 | # CONFIG_DTLK is not set |
@@ -774,6 +794,7 @@ CONFIG_GEN_RTC=y | |||
774 | # Ftape, the floppy tape device driver | 794 | # Ftape, the floppy tape device driver |
775 | # | 795 | # |
776 | CONFIG_AGP=m | 796 | CONFIG_AGP=m |
797 | # CONFIG_AGP_SIS is not set | ||
777 | # CONFIG_AGP_VIA is not set | 798 | # CONFIG_AGP_VIA is not set |
778 | CONFIG_AGP_UNINORTH=m | 799 | CONFIG_AGP_UNINORTH=m |
779 | # CONFIG_DRM is not set | 800 | # CONFIG_DRM is not set |
@@ -813,6 +834,7 @@ CONFIG_I2C_ALGOBIT=y | |||
813 | # CONFIG_I2C_PIIX4 is not set | 834 | # CONFIG_I2C_PIIX4 is not set |
814 | CONFIG_I2C_POWERMAC=y | 835 | CONFIG_I2C_POWERMAC=y |
815 | # CONFIG_I2C_NFORCE2 is not set | 836 | # CONFIG_I2C_NFORCE2 is not set |
837 | # CONFIG_I2C_OCORES is not set | ||
816 | # CONFIG_I2C_PARPORT_LIGHT is not set | 838 | # CONFIG_I2C_PARPORT_LIGHT is not set |
817 | # CONFIG_I2C_PROSAVAGE is not set | 839 | # CONFIG_I2C_PROSAVAGE is not set |
818 | # CONFIG_I2C_SAVAGE4 is not set | 840 | # CONFIG_I2C_SAVAGE4 is not set |
@@ -849,7 +871,6 @@ CONFIG_I2C_POWERMAC=y | |||
849 | # | 871 | # |
850 | # Dallas's 1-wire bus | 872 | # Dallas's 1-wire bus |
851 | # | 873 | # |
852 | # CONFIG_W1 is not set | ||
853 | 874 | ||
854 | # | 875 | # |
855 | # Hardware Monitoring support | 876 | # Hardware Monitoring support |
@@ -865,6 +886,7 @@ CONFIG_I2C_POWERMAC=y | |||
865 | # Multimedia devices | 886 | # Multimedia devices |
866 | # | 887 | # |
867 | # CONFIG_VIDEO_DEV is not set | 888 | # CONFIG_VIDEO_DEV is not set |
889 | CONFIG_VIDEO_V4L2=y | ||
868 | 890 | ||
869 | # | 891 | # |
870 | # Digital Video Broadcasting Devices | 892 | # Digital Video Broadcasting Devices |
@@ -875,22 +897,19 @@ CONFIG_I2C_POWERMAC=y | |||
875 | # | 897 | # |
876 | # Graphics support | 898 | # Graphics support |
877 | # | 899 | # |
900 | CONFIG_FIRMWARE_EDID=y | ||
878 | CONFIG_FB=y | 901 | CONFIG_FB=y |
879 | CONFIG_FB_CFB_FILLRECT=y | 902 | CONFIG_FB_CFB_FILLRECT=y |
880 | CONFIG_FB_CFB_COPYAREA=y | 903 | CONFIG_FB_CFB_COPYAREA=y |
881 | CONFIG_FB_CFB_IMAGEBLIT=y | 904 | CONFIG_FB_CFB_IMAGEBLIT=y |
882 | CONFIG_FB_MACMODES=y | 905 | CONFIG_FB_MACMODES=y |
883 | CONFIG_FB_FIRMWARE_EDID=y | 906 | # CONFIG_FB_BACKLIGHT is not set |
884 | CONFIG_FB_MODE_HELPERS=y | 907 | CONFIG_FB_MODE_HELPERS=y |
885 | CONFIG_FB_TILEBLITTING=y | 908 | CONFIG_FB_TILEBLITTING=y |
886 | # CONFIG_FB_CIRRUS is not set | 909 | # CONFIG_FB_CIRRUS is not set |
887 | # CONFIG_FB_PM2 is not set | 910 | # CONFIG_FB_PM2 is not set |
888 | # CONFIG_FB_CYBER2000 is not set | 911 | # CONFIG_FB_CYBER2000 is not set |
889 | CONFIG_FB_OF=y | 912 | CONFIG_FB_OF=y |
890 | # CONFIG_FB_CONTROL is not set | ||
891 | # CONFIG_FB_PLATINUM is not set | ||
892 | # CONFIG_FB_VALKYRIE is not set | ||
893 | # CONFIG_FB_CT65550 is not set | ||
894 | # CONFIG_FB_ASILIANT is not set | 913 | # CONFIG_FB_ASILIANT is not set |
895 | # CONFIG_FB_IMSTT is not set | 914 | # CONFIG_FB_IMSTT is not set |
896 | # CONFIG_FB_VGA16 is not set | 915 | # CONFIG_FB_VGA16 is not set |
@@ -990,6 +1009,18 @@ CONFIG_SND_VERBOSE_PROCFS=y | |||
990 | # CONFIG_SND_CMIPCI is not set | 1009 | # CONFIG_SND_CMIPCI is not set |
991 | # CONFIG_SND_CS4281 is not set | 1010 | # CONFIG_SND_CS4281 is not set |
992 | # CONFIG_SND_CS46XX is not set | 1011 | # CONFIG_SND_CS46XX is not set |
1012 | # CONFIG_SND_DARLA20 is not set | ||
1013 | # CONFIG_SND_GINA20 is not set | ||
1014 | # CONFIG_SND_LAYLA20 is not set | ||
1015 | # CONFIG_SND_DARLA24 is not set | ||
1016 | # CONFIG_SND_GINA24 is not set | ||
1017 | # CONFIG_SND_LAYLA24 is not set | ||
1018 | # CONFIG_SND_MONA is not set | ||
1019 | # CONFIG_SND_MIA is not set | ||
1020 | # CONFIG_SND_ECHO3G is not set | ||
1021 | # CONFIG_SND_INDIGO is not set | ||
1022 | # CONFIG_SND_INDIGOIO is not set | ||
1023 | # CONFIG_SND_INDIGODJ is not set | ||
993 | # CONFIG_SND_EMU10K1 is not set | 1024 | # CONFIG_SND_EMU10K1 is not set |
994 | # CONFIG_SND_EMU10K1X is not set | 1025 | # CONFIG_SND_EMU10K1X is not set |
995 | # CONFIG_SND_ENS1370 is not set | 1026 | # CONFIG_SND_ENS1370 is not set |
@@ -1027,6 +1058,17 @@ CONFIG_SND_POWERMAC=m | |||
1027 | CONFIG_SND_POWERMAC_AUTO_DRC=y | 1058 | CONFIG_SND_POWERMAC_AUTO_DRC=y |
1028 | 1059 | ||
1029 | # | 1060 | # |
1061 | # Apple Onboard Audio driver | ||
1062 | # | ||
1063 | CONFIG_SND_AOA=m | ||
1064 | CONFIG_SND_AOA_FABRIC_LAYOUT=m | ||
1065 | CONFIG_SND_AOA_ONYX=m | ||
1066 | CONFIG_SND_AOA_TAS=m | ||
1067 | CONFIG_SND_AOA_TOONIE=m | ||
1068 | CONFIG_SND_AOA_SOUNDBUS=m | ||
1069 | CONFIG_SND_AOA_SOUNDBUS_I2S=m | ||
1070 | |||
1071 | # | ||
1030 | # USB devices | 1072 | # USB devices |
1031 | # | 1073 | # |
1032 | CONFIG_SND_USB_AUDIO=m | 1074 | CONFIG_SND_USB_AUDIO=m |
@@ -1060,6 +1102,7 @@ CONFIG_USB_DEVICEFS=y | |||
1060 | CONFIG_USB_EHCI_HCD=y | 1102 | CONFIG_USB_EHCI_HCD=y |
1061 | # CONFIG_USB_EHCI_SPLIT_ISO is not set | 1103 | # CONFIG_USB_EHCI_SPLIT_ISO is not set |
1062 | # CONFIG_USB_EHCI_ROOT_HUB_TT is not set | 1104 | # CONFIG_USB_EHCI_ROOT_HUB_TT is not set |
1105 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set | ||
1063 | # CONFIG_USB_ISP116X_HCD is not set | 1106 | # CONFIG_USB_ISP116X_HCD is not set |
1064 | CONFIG_USB_OHCI_HCD=y | 1107 | CONFIG_USB_OHCI_HCD=y |
1065 | # CONFIG_USB_OHCI_BIG_ENDIAN is not set | 1108 | # CONFIG_USB_OHCI_BIG_ENDIAN is not set |
@@ -1110,9 +1153,7 @@ CONFIG_USB_HIDDEV=y | |||
1110 | # CONFIG_USB_ACECAD is not set | 1153 | # CONFIG_USB_ACECAD is not set |
1111 | # CONFIG_USB_KBTAB is not set | 1154 | # CONFIG_USB_KBTAB is not set |
1112 | # CONFIG_USB_POWERMATE is not set | 1155 | # CONFIG_USB_POWERMATE is not set |
1113 | # CONFIG_USB_MTOUCH is not set | 1156 | # CONFIG_USB_TOUCHSCREEN is not set |
1114 | # CONFIG_USB_ITMTOUCH is not set | ||
1115 | # CONFIG_USB_EGALAX is not set | ||
1116 | # CONFIG_USB_YEALINK is not set | 1157 | # CONFIG_USB_YEALINK is not set |
1117 | # CONFIG_USB_XPAD is not set | 1158 | # CONFIG_USB_XPAD is not set |
1118 | # CONFIG_USB_ATI_REMOTE is not set | 1159 | # CONFIG_USB_ATI_REMOTE is not set |
@@ -1155,6 +1196,7 @@ CONFIG_USB_SERIAL=m | |||
1155 | CONFIG_USB_SERIAL_GENERIC=y | 1196 | CONFIG_USB_SERIAL_GENERIC=y |
1156 | # CONFIG_USB_SERIAL_AIRPRIME is not set | 1197 | # CONFIG_USB_SERIAL_AIRPRIME is not set |
1157 | # CONFIG_USB_SERIAL_ANYDATA is not set | 1198 | # CONFIG_USB_SERIAL_ANYDATA is not set |
1199 | # CONFIG_USB_SERIAL_ARK3116 is not set | ||
1158 | CONFIG_USB_SERIAL_BELKIN=m | 1200 | CONFIG_USB_SERIAL_BELKIN=m |
1159 | # CONFIG_USB_SERIAL_WHITEHEAT is not set | 1201 | # CONFIG_USB_SERIAL_WHITEHEAT is not set |
1160 | CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m | 1202 | CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m |
@@ -1162,6 +1204,7 @@ CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m | |||
1162 | CONFIG_USB_SERIAL_CYPRESS_M8=m | 1204 | CONFIG_USB_SERIAL_CYPRESS_M8=m |
1163 | CONFIG_USB_SERIAL_EMPEG=m | 1205 | CONFIG_USB_SERIAL_EMPEG=m |
1164 | CONFIG_USB_SERIAL_FTDI_SIO=m | 1206 | CONFIG_USB_SERIAL_FTDI_SIO=m |
1207 | # CONFIG_USB_SERIAL_FUNSOFT is not set | ||
1165 | CONFIG_USB_SERIAL_VISOR=m | 1208 | CONFIG_USB_SERIAL_VISOR=m |
1166 | CONFIG_USB_SERIAL_IPAQ=m | 1209 | CONFIG_USB_SERIAL_IPAQ=m |
1167 | CONFIG_USB_SERIAL_IR=m | 1210 | CONFIG_USB_SERIAL_IR=m |
@@ -1191,9 +1234,11 @@ CONFIG_USB_SERIAL_PL2303=m | |||
1191 | # CONFIG_USB_SERIAL_HP4X is not set | 1234 | # CONFIG_USB_SERIAL_HP4X is not set |
1192 | CONFIG_USB_SERIAL_SAFE=m | 1235 | CONFIG_USB_SERIAL_SAFE=m |
1193 | CONFIG_USB_SERIAL_SAFE_PADDED=y | 1236 | CONFIG_USB_SERIAL_SAFE_PADDED=y |
1237 | # CONFIG_USB_SERIAL_SIERRAWIRELESS is not set | ||
1194 | CONFIG_USB_SERIAL_TI=m | 1238 | CONFIG_USB_SERIAL_TI=m |
1195 | CONFIG_USB_SERIAL_CYBERJACK=m | 1239 | CONFIG_USB_SERIAL_CYBERJACK=m |
1196 | CONFIG_USB_SERIAL_XIRCOM=m | 1240 | CONFIG_USB_SERIAL_XIRCOM=m |
1241 | # CONFIG_USB_SERIAL_OPTION is not set | ||
1197 | CONFIG_USB_SERIAL_OMNINET=m | 1242 | CONFIG_USB_SERIAL_OMNINET=m |
1198 | CONFIG_USB_EZUSB=y | 1243 | CONFIG_USB_EZUSB=y |
1199 | 1244 | ||
@@ -1207,10 +1252,12 @@ CONFIG_USB_EZUSB=y | |||
1207 | # CONFIG_USB_LEGOTOWER is not set | 1252 | # CONFIG_USB_LEGOTOWER is not set |
1208 | # CONFIG_USB_LCD is not set | 1253 | # CONFIG_USB_LCD is not set |
1209 | # CONFIG_USB_LED is not set | 1254 | # CONFIG_USB_LED is not set |
1255 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
1210 | # CONFIG_USB_CYTHERM is not set | 1256 | # CONFIG_USB_CYTHERM is not set |
1211 | # CONFIG_USB_PHIDGETKIT is not set | 1257 | # CONFIG_USB_PHIDGETKIT is not set |
1212 | # CONFIG_USB_PHIDGETSERVO is not set | 1258 | # CONFIG_USB_PHIDGETSERVO is not set |
1213 | # CONFIG_USB_IDMOUSE is not set | 1259 | # CONFIG_USB_IDMOUSE is not set |
1260 | CONFIG_USB_APPLEDISPLAY=m | ||
1214 | # CONFIG_USB_SISUSBVGA is not set | 1261 | # CONFIG_USB_SISUSBVGA is not set |
1215 | # CONFIG_USB_LD is not set | 1262 | # CONFIG_USB_LD is not set |
1216 | # CONFIG_USB_TEST is not set | 1263 | # CONFIG_USB_TEST is not set |
@@ -1235,6 +1282,14 @@ CONFIG_USB_EZUSB=y | |||
1235 | # CONFIG_NEW_LEDS is not set | 1282 | # CONFIG_NEW_LEDS is not set |
1236 | 1283 | ||
1237 | # | 1284 | # |
1285 | # LED drivers | ||
1286 | # | ||
1287 | |||
1288 | # | ||
1289 | # LED Triggers | ||
1290 | # | ||
1291 | |||
1292 | # | ||
1238 | # InfiniBand support | 1293 | # InfiniBand support |
1239 | # | 1294 | # |
1240 | # CONFIG_INFINIBAND is not set | 1295 | # CONFIG_INFINIBAND is not set |
@@ -1249,6 +1304,19 @@ CONFIG_USB_EZUSB=y | |||
1249 | # CONFIG_RTC_CLASS is not set | 1304 | # CONFIG_RTC_CLASS is not set |
1250 | 1305 | ||
1251 | # | 1306 | # |
1307 | # DMA Engine support | ||
1308 | # | ||
1309 | # CONFIG_DMA_ENGINE is not set | ||
1310 | |||
1311 | # | ||
1312 | # DMA Clients | ||
1313 | # | ||
1314 | |||
1315 | # | ||
1316 | # DMA Devices | ||
1317 | # | ||
1318 | |||
1319 | # | ||
1252 | # File systems | 1320 | # File systems |
1253 | # | 1321 | # |
1254 | CONFIG_EXT2_FS=y | 1322 | CONFIG_EXT2_FS=y |
@@ -1273,7 +1341,6 @@ CONFIG_REISERFS_FS_SECURITY=y | |||
1273 | # CONFIG_JFS_FS is not set | 1341 | # CONFIG_JFS_FS is not set |
1274 | CONFIG_FS_POSIX_ACL=y | 1342 | CONFIG_FS_POSIX_ACL=y |
1275 | CONFIG_XFS_FS=m | 1343 | CONFIG_XFS_FS=m |
1276 | CONFIG_XFS_EXPORT=y | ||
1277 | # CONFIG_XFS_QUOTA is not set | 1344 | # CONFIG_XFS_QUOTA is not set |
1278 | CONFIG_XFS_SECURITY=y | 1345 | CONFIG_XFS_SECURITY=y |
1279 | CONFIG_XFS_POSIX_ACL=y | 1346 | CONFIG_XFS_POSIX_ACL=y |
@@ -1282,6 +1349,7 @@ CONFIG_XFS_POSIX_ACL=y | |||
1282 | # CONFIG_MINIX_FS is not set | 1349 | # CONFIG_MINIX_FS is not set |
1283 | # CONFIG_ROMFS_FS is not set | 1350 | # CONFIG_ROMFS_FS is not set |
1284 | CONFIG_INOTIFY=y | 1351 | CONFIG_INOTIFY=y |
1352 | CONFIG_INOTIFY_USER=y | ||
1285 | # CONFIG_QUOTA is not set | 1353 | # CONFIG_QUOTA is not set |
1286 | CONFIG_DNOTIFY=y | 1354 | CONFIG_DNOTIFY=y |
1287 | CONFIG_AUTOFS_FS=m | 1355 | CONFIG_AUTOFS_FS=m |
@@ -1363,7 +1431,9 @@ CONFIG_RPCSEC_GSS_KRB5=y | |||
1363 | # CONFIG_SMB_FS is not set | 1431 | # CONFIG_SMB_FS is not set |
1364 | CONFIG_CIFS=m | 1432 | CONFIG_CIFS=m |
1365 | # CONFIG_CIFS_STATS is not set | 1433 | # CONFIG_CIFS_STATS is not set |
1434 | # CONFIG_CIFS_WEAK_PW_HASH is not set | ||
1366 | # CONFIG_CIFS_XATTR is not set | 1435 | # CONFIG_CIFS_XATTR is not set |
1436 | # CONFIG_CIFS_DEBUG2 is not set | ||
1367 | # CONFIG_CIFS_EXPERIMENTAL is not set | 1437 | # CONFIG_CIFS_EXPERIMENTAL is not set |
1368 | # CONFIG_NCP_FS is not set | 1438 | # CONFIG_NCP_FS is not set |
1369 | # CONFIG_CODA_FS is not set | 1439 | # CONFIG_CODA_FS is not set |
@@ -1444,6 +1514,9 @@ CONFIG_CRC32=y | |||
1444 | CONFIG_LIBCRC32C=m | 1514 | CONFIG_LIBCRC32C=m |
1445 | CONFIG_ZLIB_INFLATE=y | 1515 | CONFIG_ZLIB_INFLATE=y |
1446 | CONFIG_ZLIB_DEFLATE=m | 1516 | CONFIG_ZLIB_DEFLATE=m |
1517 | CONFIG_TEXTSEARCH=y | ||
1518 | CONFIG_TEXTSEARCH_KMP=m | ||
1519 | CONFIG_PLIST=y | ||
1447 | 1520 | ||
1448 | # | 1521 | # |
1449 | # Instrumentation Support | 1522 | # Instrumentation Support |
@@ -1457,14 +1530,19 @@ CONFIG_OPROFILE=y | |||
1457 | # | 1530 | # |
1458 | # CONFIG_PRINTK_TIME is not set | 1531 | # CONFIG_PRINTK_TIME is not set |
1459 | CONFIG_MAGIC_SYSRQ=y | 1532 | CONFIG_MAGIC_SYSRQ=y |
1533 | # CONFIG_UNUSED_SYMBOLS is not set | ||
1460 | CONFIG_DEBUG_KERNEL=y | 1534 | CONFIG_DEBUG_KERNEL=y |
1461 | CONFIG_LOG_BUF_SHIFT=17 | 1535 | CONFIG_LOG_BUF_SHIFT=17 |
1462 | CONFIG_DETECT_SOFTLOCKUP=y | 1536 | CONFIG_DETECT_SOFTLOCKUP=y |
1463 | # CONFIG_SCHEDSTATS is not set | 1537 | # CONFIG_SCHEDSTATS is not set |
1464 | # CONFIG_DEBUG_SLAB is not set | 1538 | # CONFIG_DEBUG_SLAB is not set |
1465 | CONFIG_DEBUG_MUTEXES=y | 1539 | # CONFIG_DEBUG_RT_MUTEXES is not set |
1540 | # CONFIG_RT_MUTEX_TESTER is not set | ||
1466 | # CONFIG_DEBUG_SPINLOCK is not set | 1541 | # CONFIG_DEBUG_SPINLOCK is not set |
1542 | CONFIG_DEBUG_MUTEXES=y | ||
1543 | # CONFIG_DEBUG_RWSEMS is not set | ||
1467 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | 1544 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set |
1545 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
1468 | # CONFIG_DEBUG_KOBJECT is not set | 1546 | # CONFIG_DEBUG_KOBJECT is not set |
1469 | # CONFIG_DEBUG_INFO is not set | 1547 | # CONFIG_DEBUG_INFO is not set |
1470 | CONFIG_DEBUG_FS=y | 1548 | CONFIG_DEBUG_FS=y |
@@ -1476,11 +1554,7 @@ CONFIG_FORCED_INLINING=y | |||
1476 | # CONFIG_DEBUGGER is not set | 1554 | # CONFIG_DEBUGGER is not set |
1477 | CONFIG_IRQSTACKS=y | 1555 | CONFIG_IRQSTACKS=y |
1478 | CONFIG_BOOTX_TEXT=y | 1556 | CONFIG_BOOTX_TEXT=y |
1479 | # CONFIG_PPC_EARLY_DEBUG_LPAR is not set | 1557 | # CONFIG_PPC_EARLY_DEBUG is not set |
1480 | # CONFIG_PPC_EARLY_DEBUG_G5 is not set | ||
1481 | # CONFIG_PPC_EARLY_DEBUG_RTAS is not set | ||
1482 | # CONFIG_PPC_EARLY_DEBUG_MAPLE is not set | ||
1483 | # CONFIG_PPC_EARLY_DEBUG_ISERIES is not set | ||
1484 | 1558 | ||
1485 | # | 1559 | # |
1486 | # Security options | 1560 | # Security options |
diff --git a/arch/powerpc/configs/iseries_defconfig b/arch/powerpc/configs/iseries_defconfig index a95e455a1944..72ed95b3ead6 100644 --- a/arch/powerpc/configs/iseries_defconfig +++ b/arch/powerpc/configs/iseries_defconfig | |||
@@ -1,16 +1,18 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.17-rc1 | 3 | # Linux kernel version: 2.6.18-rc3 |
4 | # Wed Apr 19 11:46:44 2006 | 4 | # Tue Aug 8 09:15:46 2006 |
5 | # | 5 | # |
6 | CONFIG_PPC64=y | 6 | CONFIG_PPC64=y |
7 | CONFIG_64BIT=y | 7 | CONFIG_64BIT=y |
8 | CONFIG_PPC_MERGE=y | 8 | CONFIG_PPC_MERGE=y |
9 | CONFIG_MMU=y | 9 | CONFIG_MMU=y |
10 | CONFIG_GENERIC_HARDIRQS=y | 10 | CONFIG_GENERIC_HARDIRQS=y |
11 | CONFIG_IRQ_PER_CPU=y | ||
11 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y | 12 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y |
12 | CONFIG_GENERIC_HWEIGHT=y | 13 | CONFIG_GENERIC_HWEIGHT=y |
13 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 14 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
15 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
14 | CONFIG_PPC=y | 16 | CONFIG_PPC=y |
15 | CONFIG_EARLY_PRINTK=y | 17 | CONFIG_EARLY_PRINTK=y |
16 | CONFIG_COMPAT=y | 18 | CONFIG_COMPAT=y |
@@ -34,6 +36,7 @@ CONFIG_PPC_STD_MMU=y | |||
34 | CONFIG_VIRT_CPU_ACCOUNTING=y | 36 | CONFIG_VIRT_CPU_ACCOUNTING=y |
35 | CONFIG_SMP=y | 37 | CONFIG_SMP=y |
36 | CONFIG_NR_CPUS=32 | 38 | CONFIG_NR_CPUS=32 |
39 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
37 | 40 | ||
38 | # | 41 | # |
39 | # Code maturity level options | 42 | # Code maturity level options |
@@ -51,6 +54,7 @@ CONFIG_SWAP=y | |||
51 | CONFIG_SYSVIPC=y | 54 | CONFIG_SYSVIPC=y |
52 | CONFIG_POSIX_MQUEUE=y | 55 | CONFIG_POSIX_MQUEUE=y |
53 | # CONFIG_BSD_PROCESS_ACCT is not set | 56 | # CONFIG_BSD_PROCESS_ACCT is not set |
57 | # CONFIG_TASKSTATS is not set | ||
54 | CONFIG_SYSCTL=y | 58 | CONFIG_SYSCTL=y |
55 | CONFIG_AUDIT=y | 59 | CONFIG_AUDIT=y |
56 | CONFIG_AUDITSYSCALL=y | 60 | CONFIG_AUDITSYSCALL=y |
@@ -69,10 +73,12 @@ CONFIG_PRINTK=y | |||
69 | CONFIG_BUG=y | 73 | CONFIG_BUG=y |
70 | CONFIG_ELF_CORE=y | 74 | CONFIG_ELF_CORE=y |
71 | CONFIG_BASE_FULL=y | 75 | CONFIG_BASE_FULL=y |
76 | CONFIG_RT_MUTEXES=y | ||
72 | CONFIG_FUTEX=y | 77 | CONFIG_FUTEX=y |
73 | CONFIG_EPOLL=y | 78 | CONFIG_EPOLL=y |
74 | CONFIG_SHMEM=y | 79 | CONFIG_SHMEM=y |
75 | CONFIG_SLAB=y | 80 | CONFIG_SLAB=y |
81 | CONFIG_VM_EVENT_COUNTERS=y | ||
76 | # CONFIG_TINY_SHMEM is not set | 82 | # CONFIG_TINY_SHMEM is not set |
77 | CONFIG_BASE_SMALL=0 | 83 | CONFIG_BASE_SMALL=0 |
78 | # CONFIG_SLOB is not set | 84 | # CONFIG_SLOB is not set |
@@ -113,10 +119,14 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" | |||
113 | CONFIG_PPC_ISERIES=y | 119 | CONFIG_PPC_ISERIES=y |
114 | # CONFIG_EMBEDDED6xx is not set | 120 | # CONFIG_EMBEDDED6xx is not set |
115 | # CONFIG_APUS is not set | 121 | # CONFIG_APUS is not set |
122 | # CONFIG_PPC_CELL is not set | ||
123 | # CONFIG_PPC_CELL_NATIVE is not set | ||
124 | # CONFIG_UDBG_RTAS_CONSOLE is not set | ||
116 | # CONFIG_PPC_RTAS is not set | 125 | # CONFIG_PPC_RTAS is not set |
117 | # CONFIG_MMIO_NVRAM is not set | 126 | # CONFIG_MMIO_NVRAM is not set |
118 | CONFIG_IBMVIO=y | 127 | CONFIG_IBMVIO=y |
119 | # CONFIG_PPC_MPC106 is not set | 128 | # CONFIG_PPC_MPC106 is not set |
129 | # CONFIG_PPC_970_NAP is not set | ||
120 | # CONFIG_CPU_FREQ is not set | 130 | # CONFIG_CPU_FREQ is not set |
121 | # CONFIG_WANT_EARLY_SERIAL is not set | 131 | # CONFIG_WANT_EARLY_SERIAL is not set |
122 | 132 | ||
@@ -135,6 +145,7 @@ CONFIG_BINFMT_ELF=y | |||
135 | # CONFIG_BINFMT_MISC is not set | 145 | # CONFIG_BINFMT_MISC is not set |
136 | CONFIG_FORCE_MAX_ZONEORDER=13 | 146 | CONFIG_FORCE_MAX_ZONEORDER=13 |
137 | CONFIG_IOMMU_VMERGE=y | 147 | CONFIG_IOMMU_VMERGE=y |
148 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y | ||
138 | CONFIG_IRQ_ALL_CPUS=y | 149 | CONFIG_IRQ_ALL_CPUS=y |
139 | CONFIG_LPARCFG=y | 150 | CONFIG_LPARCFG=y |
140 | # CONFIG_NUMA is not set | 151 | # CONFIG_NUMA is not set |
@@ -149,6 +160,7 @@ CONFIG_FLATMEM=y | |||
149 | CONFIG_FLAT_NODE_MEM_MAP=y | 160 | CONFIG_FLAT_NODE_MEM_MAP=y |
150 | # CONFIG_SPARSEMEM_STATIC is not set | 161 | # CONFIG_SPARSEMEM_STATIC is not set |
151 | CONFIG_SPLIT_PTLOCK_CPUS=4 | 162 | CONFIG_SPLIT_PTLOCK_CPUS=4 |
163 | CONFIG_RESOURCES_64BIT=y | ||
152 | # CONFIG_PPC_64K_PAGES is not set | 164 | # CONFIG_PPC_64K_PAGES is not set |
153 | # CONFIG_SCHED_SMT is not set | 165 | # CONFIG_SCHED_SMT is not set |
154 | CONFIG_PROC_DEVICETREE=y | 166 | CONFIG_PROC_DEVICETREE=y |
@@ -164,6 +176,7 @@ CONFIG_GENERIC_ISA_DMA=y | |||
164 | # CONFIG_PPC_INDIRECT_PCI is not set | 176 | # CONFIG_PPC_INDIRECT_PCI is not set |
165 | CONFIG_PCI=y | 177 | CONFIG_PCI=y |
166 | CONFIG_PCI_DOMAINS=y | 178 | CONFIG_PCI_DOMAINS=y |
179 | # CONFIG_PCIEPORTBUS is not set | ||
167 | # CONFIG_PCI_DEBUG is not set | 180 | # CONFIG_PCI_DEBUG is not set |
168 | 181 | ||
169 | # | 182 | # |
@@ -207,6 +220,8 @@ CONFIG_INET_ESP=m | |||
207 | CONFIG_INET_IPCOMP=m | 220 | CONFIG_INET_IPCOMP=m |
208 | CONFIG_INET_XFRM_TUNNEL=m | 221 | CONFIG_INET_XFRM_TUNNEL=m |
209 | CONFIG_INET_TUNNEL=y | 222 | CONFIG_INET_TUNNEL=y |
223 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
224 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
210 | CONFIG_INET_DIAG=y | 225 | CONFIG_INET_DIAG=y |
211 | CONFIG_INET_TCP_DIAG=y | 226 | CONFIG_INET_TCP_DIAG=y |
212 | # CONFIG_TCP_CONG_ADVANCED is not set | 227 | # CONFIG_TCP_CONG_ADVANCED is not set |
@@ -219,6 +234,7 @@ CONFIG_TCP_CONG_BIC=y | |||
219 | # CONFIG_IPV6 is not set | 234 | # CONFIG_IPV6 is not set |
220 | # CONFIG_INET6_XFRM_TUNNEL is not set | 235 | # CONFIG_INET6_XFRM_TUNNEL is not set |
221 | # CONFIG_INET6_TUNNEL is not set | 236 | # CONFIG_INET6_TUNNEL is not set |
237 | # CONFIG_NETWORK_SECMARK is not set | ||
222 | CONFIG_NETFILTER=y | 238 | CONFIG_NETFILTER=y |
223 | # CONFIG_NETFILTER_DEBUG is not set | 239 | # CONFIG_NETFILTER_DEBUG is not set |
224 | 240 | ||
@@ -246,9 +262,11 @@ CONFIG_NETFILTER_XT_MATCH_MARK=m | |||
246 | # CONFIG_NETFILTER_XT_MATCH_POLICY is not set | 262 | # CONFIG_NETFILTER_XT_MATCH_POLICY is not set |
247 | # CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set | 263 | # CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set |
248 | CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m | 264 | CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m |
265 | # CONFIG_NETFILTER_XT_MATCH_QUOTA is not set | ||
249 | CONFIG_NETFILTER_XT_MATCH_REALM=m | 266 | CONFIG_NETFILTER_XT_MATCH_REALM=m |
250 | CONFIG_NETFILTER_XT_MATCH_SCTP=m | 267 | CONFIG_NETFILTER_XT_MATCH_SCTP=m |
251 | CONFIG_NETFILTER_XT_MATCH_STATE=m | 268 | CONFIG_NETFILTER_XT_MATCH_STATE=m |
269 | # CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set | ||
252 | CONFIG_NETFILTER_XT_MATCH_STRING=m | 270 | CONFIG_NETFILTER_XT_MATCH_STRING=m |
253 | CONFIG_NETFILTER_XT_MATCH_TCPMSS=m | 271 | CONFIG_NETFILTER_XT_MATCH_TCPMSS=m |
254 | 272 | ||
@@ -267,6 +285,7 @@ CONFIG_IP_NF_TFTP=m | |||
267 | CONFIG_IP_NF_AMANDA=m | 285 | CONFIG_IP_NF_AMANDA=m |
268 | # CONFIG_IP_NF_PPTP is not set | 286 | # CONFIG_IP_NF_PPTP is not set |
269 | # CONFIG_IP_NF_H323 is not set | 287 | # CONFIG_IP_NF_H323 is not set |
288 | # CONFIG_IP_NF_SIP is not set | ||
270 | CONFIG_IP_NF_QUEUE=m | 289 | CONFIG_IP_NF_QUEUE=m |
271 | CONFIG_IP_NF_IPTABLES=m | 290 | CONFIG_IP_NF_IPTABLES=m |
272 | CONFIG_IP_NF_MATCH_IPRANGE=m | 291 | CONFIG_IP_NF_MATCH_IPRANGE=m |
@@ -360,6 +379,7 @@ CONFIG_STANDALONE=y | |||
360 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 379 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
361 | CONFIG_FW_LOADER=m | 380 | CONFIG_FW_LOADER=m |
362 | # CONFIG_DEBUG_DRIVER is not set | 381 | # CONFIG_DEBUG_DRIVER is not set |
382 | # CONFIG_SYS_HYPERVISOR is not set | ||
363 | 383 | ||
364 | # | 384 | # |
365 | # Connector - unified userspace <-> kernelspace linker | 385 | # Connector - unified userspace <-> kernelspace linker |
@@ -396,6 +416,7 @@ CONFIG_BLK_DEV_NBD=m | |||
396 | CONFIG_BLK_DEV_RAM=y | 416 | CONFIG_BLK_DEV_RAM=y |
397 | CONFIG_BLK_DEV_RAM_COUNT=16 | 417 | CONFIG_BLK_DEV_RAM_COUNT=16 |
398 | CONFIG_BLK_DEV_RAM_SIZE=65536 | 418 | CONFIG_BLK_DEV_RAM_SIZE=65536 |
419 | CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 | ||
399 | CONFIG_BLK_DEV_INITRD=y | 420 | CONFIG_BLK_DEV_INITRD=y |
400 | # CONFIG_CDROM_PKTCDVD is not set | 421 | # CONFIG_CDROM_PKTCDVD is not set |
401 | # CONFIG_ATA_OVER_ETH is not set | 422 | # CONFIG_ATA_OVER_ETH is not set |
@@ -453,6 +474,7 @@ CONFIG_SCSI_FC_ATTRS=y | |||
453 | # CONFIG_MEGARAID_LEGACY is not set | 474 | # CONFIG_MEGARAID_LEGACY is not set |
454 | # CONFIG_MEGARAID_SAS is not set | 475 | # CONFIG_MEGARAID_SAS is not set |
455 | # CONFIG_SCSI_SATA is not set | 476 | # CONFIG_SCSI_SATA is not set |
477 | # CONFIG_SCSI_HPTIOP is not set | ||
456 | # CONFIG_SCSI_BUSLOGIC is not set | 478 | # CONFIG_SCSI_BUSLOGIC is not set |
457 | # CONFIG_SCSI_DMX3191D is not set | 479 | # CONFIG_SCSI_DMX3191D is not set |
458 | # CONFIG_SCSI_EATA is not set | 480 | # CONFIG_SCSI_EATA is not set |
@@ -464,7 +486,6 @@ CONFIG_SCSI_IBMVSCSI=m | |||
464 | # CONFIG_SCSI_INIA100 is not set | 486 | # CONFIG_SCSI_INIA100 is not set |
465 | # CONFIG_SCSI_SYM53C8XX_2 is not set | 487 | # CONFIG_SCSI_SYM53C8XX_2 is not set |
466 | # CONFIG_SCSI_IPR is not set | 488 | # CONFIG_SCSI_IPR is not set |
467 | # CONFIG_SCSI_QLOGIC_FC is not set | ||
468 | # CONFIG_SCSI_QLOGIC_1280 is not set | 489 | # CONFIG_SCSI_QLOGIC_1280 is not set |
469 | # CONFIG_SCSI_QLA_FC is not set | 490 | # CONFIG_SCSI_QLA_FC is not set |
470 | # CONFIG_SCSI_LPFC is not set | 491 | # CONFIG_SCSI_LPFC is not set |
@@ -481,9 +502,7 @@ CONFIG_MD_LINEAR=y | |||
481 | CONFIG_MD_RAID0=y | 502 | CONFIG_MD_RAID0=y |
482 | CONFIG_MD_RAID1=y | 503 | CONFIG_MD_RAID1=y |
483 | CONFIG_MD_RAID10=m | 504 | CONFIG_MD_RAID10=m |
484 | CONFIG_MD_RAID5=y | 505 | # CONFIG_MD_RAID456 is not set |
485 | # CONFIG_MD_RAID5_RESHAPE is not set | ||
486 | CONFIG_MD_RAID6=m | ||
487 | CONFIG_MD_MULTIPATH=m | 506 | CONFIG_MD_MULTIPATH=m |
488 | CONFIG_MD_FAULTY=m | 507 | CONFIG_MD_FAULTY=m |
489 | CONFIG_BLK_DEV_DM=y | 508 | CONFIG_BLK_DEV_DM=y |
@@ -596,6 +615,7 @@ CONFIG_E1000=m | |||
596 | # CONFIG_CHELSIO_T1 is not set | 615 | # CONFIG_CHELSIO_T1 is not set |
597 | # CONFIG_IXGB is not set | 616 | # CONFIG_IXGB is not set |
598 | # CONFIG_S2IO is not set | 617 | # CONFIG_S2IO is not set |
618 | # CONFIG_MYRI10GE is not set | ||
599 | 619 | ||
600 | # | 620 | # |
601 | # Token Ring devices | 621 | # Token Ring devices |
@@ -696,6 +716,7 @@ CONFIG_SERIAL_ICOM=m | |||
696 | CONFIG_UNIX98_PTYS=y | 716 | CONFIG_UNIX98_PTYS=y |
697 | CONFIG_LEGACY_PTYS=y | 717 | CONFIG_LEGACY_PTYS=y |
698 | CONFIG_LEGACY_PTY_COUNT=256 | 718 | CONFIG_LEGACY_PTY_COUNT=256 |
719 | # CONFIG_BRIQ_PANEL is not set | ||
699 | 720 | ||
700 | # | 721 | # |
701 | # IPMI | 722 | # IPMI |
@@ -706,6 +727,7 @@ CONFIG_LEGACY_PTY_COUNT=256 | |||
706 | # Watchdog Cards | 727 | # Watchdog Cards |
707 | # | 728 | # |
708 | # CONFIG_WATCHDOG is not set | 729 | # CONFIG_WATCHDOG is not set |
730 | # CONFIG_HW_RANDOM is not set | ||
709 | CONFIG_GEN_RTC=y | 731 | CONFIG_GEN_RTC=y |
710 | # CONFIG_GEN_RTC_X is not set | 732 | # CONFIG_GEN_RTC_X is not set |
711 | # CONFIG_DTLK is not set | 733 | # CONFIG_DTLK is not set |
@@ -741,7 +763,6 @@ CONFIG_MAX_RAW_DEVS=256 | |||
741 | # | 763 | # |
742 | # Dallas's 1-wire bus | 764 | # Dallas's 1-wire bus |
743 | # | 765 | # |
744 | # CONFIG_W1 is not set | ||
745 | 766 | ||
746 | # | 767 | # |
747 | # Hardware Monitoring support | 768 | # Hardware Monitoring support |
@@ -757,6 +778,7 @@ CONFIG_MAX_RAW_DEVS=256 | |||
757 | # Multimedia devices | 778 | # Multimedia devices |
758 | # | 779 | # |
759 | # CONFIG_VIDEO_DEV is not set | 780 | # CONFIG_VIDEO_DEV is not set |
781 | CONFIG_VIDEO_V4L2=y | ||
760 | 782 | ||
761 | # | 783 | # |
762 | # Digital Video Broadcasting Devices | 784 | # Digital Video Broadcasting Devices |
@@ -766,7 +788,9 @@ CONFIG_MAX_RAW_DEVS=256 | |||
766 | # | 788 | # |
767 | # Graphics support | 789 | # Graphics support |
768 | # | 790 | # |
791 | CONFIG_FIRMWARE_EDID=y | ||
769 | # CONFIG_FB is not set | 792 | # CONFIG_FB is not set |
793 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
770 | 794 | ||
771 | # | 795 | # |
772 | # Sound | 796 | # Sound |
@@ -801,6 +825,14 @@ CONFIG_USB_ARCH_HAS_EHCI=y | |||
801 | # CONFIG_NEW_LEDS is not set | 825 | # CONFIG_NEW_LEDS is not set |
802 | 826 | ||
803 | # | 827 | # |
828 | # LED drivers | ||
829 | # | ||
830 | |||
831 | # | ||
832 | # LED Triggers | ||
833 | # | ||
834 | |||
835 | # | ||
804 | # InfiniBand support | 836 | # InfiniBand support |
805 | # | 837 | # |
806 | # CONFIG_INFINIBAND is not set | 838 | # CONFIG_INFINIBAND is not set |
@@ -815,6 +847,19 @@ CONFIG_USB_ARCH_HAS_EHCI=y | |||
815 | # CONFIG_RTC_CLASS is not set | 847 | # CONFIG_RTC_CLASS is not set |
816 | 848 | ||
817 | # | 849 | # |
850 | # DMA Engine support | ||
851 | # | ||
852 | # CONFIG_DMA_ENGINE is not set | ||
853 | |||
854 | # | ||
855 | # DMA Clients | ||
856 | # | ||
857 | |||
858 | # | ||
859 | # DMA Devices | ||
860 | # | ||
861 | |||
862 | # | ||
818 | # File systems | 863 | # File systems |
819 | # | 864 | # |
820 | CONFIG_EXT2_FS=y | 865 | CONFIG_EXT2_FS=y |
@@ -843,7 +888,6 @@ CONFIG_JFS_SECURITY=y | |||
843 | # CONFIG_JFS_STATISTICS is not set | 888 | # CONFIG_JFS_STATISTICS is not set |
844 | CONFIG_FS_POSIX_ACL=y | 889 | CONFIG_FS_POSIX_ACL=y |
845 | CONFIG_XFS_FS=m | 890 | CONFIG_XFS_FS=m |
846 | CONFIG_XFS_EXPORT=y | ||
847 | # CONFIG_XFS_QUOTA is not set | 891 | # CONFIG_XFS_QUOTA is not set |
848 | CONFIG_XFS_SECURITY=y | 892 | CONFIG_XFS_SECURITY=y |
849 | CONFIG_XFS_POSIX_ACL=y | 893 | CONFIG_XFS_POSIX_ACL=y |
@@ -852,6 +896,7 @@ CONFIG_XFS_POSIX_ACL=y | |||
852 | # CONFIG_MINIX_FS is not set | 896 | # CONFIG_MINIX_FS is not set |
853 | # CONFIG_ROMFS_FS is not set | 897 | # CONFIG_ROMFS_FS is not set |
854 | CONFIG_INOTIFY=y | 898 | CONFIG_INOTIFY=y |
899 | CONFIG_INOTIFY_USER=y | ||
855 | # CONFIG_QUOTA is not set | 900 | # CONFIG_QUOTA is not set |
856 | CONFIG_DNOTIFY=y | 901 | CONFIG_DNOTIFY=y |
857 | CONFIG_AUTOFS_FS=m | 902 | CONFIG_AUTOFS_FS=m |
@@ -933,8 +978,10 @@ CONFIG_RPCSEC_GSS_SPKM3=m | |||
933 | # CONFIG_SMB_FS is not set | 978 | # CONFIG_SMB_FS is not set |
934 | CONFIG_CIFS=m | 979 | CONFIG_CIFS=m |
935 | # CONFIG_CIFS_STATS is not set | 980 | # CONFIG_CIFS_STATS is not set |
981 | # CONFIG_CIFS_WEAK_PW_HASH is not set | ||
936 | CONFIG_CIFS_XATTR=y | 982 | CONFIG_CIFS_XATTR=y |
937 | CONFIG_CIFS_POSIX=y | 983 | CONFIG_CIFS_POSIX=y |
984 | # CONFIG_CIFS_DEBUG2 is not set | ||
938 | # CONFIG_CIFS_EXPERIMENTAL is not set | 985 | # CONFIG_CIFS_EXPERIMENTAL is not set |
939 | # CONFIG_NCP_FS is not set | 986 | # CONFIG_NCP_FS is not set |
940 | # CONFIG_CODA_FS is not set | 987 | # CONFIG_CODA_FS is not set |
@@ -1013,10 +1060,12 @@ CONFIG_TEXTSEARCH=y | |||
1013 | CONFIG_TEXTSEARCH_KMP=m | 1060 | CONFIG_TEXTSEARCH_KMP=m |
1014 | CONFIG_TEXTSEARCH_BM=m | 1061 | CONFIG_TEXTSEARCH_BM=m |
1015 | CONFIG_TEXTSEARCH_FSM=m | 1062 | CONFIG_TEXTSEARCH_FSM=m |
1063 | CONFIG_PLIST=y | ||
1016 | 1064 | ||
1017 | # | 1065 | # |
1018 | # Instrumentation Support | 1066 | # Instrumentation Support |
1019 | # | 1067 | # |
1068 | # CONFIG_PROFILING is not set | ||
1020 | # CONFIG_KPROBES is not set | 1069 | # CONFIG_KPROBES is not set |
1021 | 1070 | ||
1022 | # | 1071 | # |
@@ -1024,14 +1073,19 @@ CONFIG_TEXTSEARCH_FSM=m | |||
1024 | # | 1073 | # |
1025 | # CONFIG_PRINTK_TIME is not set | 1074 | # CONFIG_PRINTK_TIME is not set |
1026 | CONFIG_MAGIC_SYSRQ=y | 1075 | CONFIG_MAGIC_SYSRQ=y |
1076 | # CONFIG_UNUSED_SYMBOLS is not set | ||
1027 | CONFIG_DEBUG_KERNEL=y | 1077 | CONFIG_DEBUG_KERNEL=y |
1028 | CONFIG_LOG_BUF_SHIFT=17 | 1078 | CONFIG_LOG_BUF_SHIFT=17 |
1029 | CONFIG_DETECT_SOFTLOCKUP=y | 1079 | CONFIG_DETECT_SOFTLOCKUP=y |
1030 | # CONFIG_SCHEDSTATS is not set | 1080 | # CONFIG_SCHEDSTATS is not set |
1031 | # CONFIG_DEBUG_SLAB is not set | 1081 | # CONFIG_DEBUG_SLAB is not set |
1032 | # CONFIG_DEBUG_MUTEXES is not set | 1082 | # CONFIG_DEBUG_RT_MUTEXES is not set |
1083 | # CONFIG_RT_MUTEX_TESTER is not set | ||
1033 | # CONFIG_DEBUG_SPINLOCK is not set | 1084 | # CONFIG_DEBUG_SPINLOCK is not set |
1085 | # CONFIG_DEBUG_MUTEXES is not set | ||
1086 | # CONFIG_DEBUG_RWSEMS is not set | ||
1034 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | 1087 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set |
1088 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
1035 | # CONFIG_DEBUG_KOBJECT is not set | 1089 | # CONFIG_DEBUG_KOBJECT is not set |
1036 | # CONFIG_DEBUG_INFO is not set | 1090 | # CONFIG_DEBUG_INFO is not set |
1037 | CONFIG_DEBUG_FS=y | 1091 | CONFIG_DEBUG_FS=y |
@@ -1042,11 +1096,7 @@ CONFIG_DEBUG_STACKOVERFLOW=y | |||
1042 | CONFIG_DEBUG_STACK_USAGE=y | 1096 | CONFIG_DEBUG_STACK_USAGE=y |
1043 | # CONFIG_DEBUGGER is not set | 1097 | # CONFIG_DEBUGGER is not set |
1044 | CONFIG_IRQSTACKS=y | 1098 | CONFIG_IRQSTACKS=y |
1045 | # CONFIG_PPC_EARLY_DEBUG_LPAR is not set | 1099 | # CONFIG_PPC_EARLY_DEBUG is not set |
1046 | # CONFIG_PPC_EARLY_DEBUG_G5 is not set | ||
1047 | # CONFIG_PPC_EARLY_DEBUG_RTAS is not set | ||
1048 | # CONFIG_PPC_EARLY_DEBUG_MAPLE is not set | ||
1049 | # CONFIG_PPC_EARLY_DEBUG_ISERIES is not set | ||
1050 | 1100 | ||
1051 | # | 1101 | # |
1052 | # Security options | 1102 | # Security options |
diff --git a/arch/powerpc/configs/mpc834x_sys_defconfig b/arch/powerpc/configs/mpc834x_mds_defconfig index 5078b0441d61..5078b0441d61 100644 --- a/arch/powerpc/configs/mpc834x_sys_defconfig +++ b/arch/powerpc/configs/mpc834x_mds_defconfig | |||
diff --git a/arch/powerpc/configs/pmac32_defconfig b/arch/powerpc/configs/pmac32_defconfig index addc79381c3b..3545af9896af 100644 --- a/arch/powerpc/configs/pmac32_defconfig +++ b/arch/powerpc/configs/pmac32_defconfig | |||
@@ -1,16 +1,18 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.17-rc5 | 3 | # Linux kernel version: 2.6.17 |
4 | # Mon May 29 14:47:49 2006 | 4 | # Mon Jul 3 14:20:49 2006 |
5 | # | 5 | # |
6 | # CONFIG_PPC64 is not set | 6 | # CONFIG_PPC64 is not set |
7 | CONFIG_PPC32=y | 7 | CONFIG_PPC32=y |
8 | CONFIG_PPC_MERGE=y | 8 | CONFIG_PPC_MERGE=y |
9 | CONFIG_MMU=y | 9 | CONFIG_MMU=y |
10 | CONFIG_GENERIC_HARDIRQS=y | 10 | CONFIG_GENERIC_HARDIRQS=y |
11 | CONFIG_IRQ_PER_CPU=y | ||
11 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y | 12 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y |
12 | CONFIG_GENERIC_HWEIGHT=y | 13 | CONFIG_GENERIC_HWEIGHT=y |
13 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 14 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
15 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
14 | CONFIG_PPC=y | 16 | CONFIG_PPC=y |
15 | CONFIG_EARLY_PRINTK=y | 17 | CONFIG_EARLY_PRINTK=y |
16 | CONFIG_GENERIC_NVRAM=y | 18 | CONFIG_GENERIC_NVRAM=y |
@@ -29,6 +31,7 @@ CONFIG_CLASSIC32=y | |||
29 | # CONFIG_PPC_82xx is not set | 31 | # CONFIG_PPC_82xx is not set |
30 | # CONFIG_PPC_83xx is not set | 32 | # CONFIG_PPC_83xx is not set |
31 | # CONFIG_PPC_85xx is not set | 33 | # CONFIG_PPC_85xx is not set |
34 | # CONFIG_PPC_86xx is not set | ||
32 | # CONFIG_40x is not set | 35 | # CONFIG_40x is not set |
33 | # CONFIG_44x is not set | 36 | # CONFIG_44x is not set |
34 | # CONFIG_8xx is not set | 37 | # CONFIG_8xx is not set |
@@ -39,6 +42,7 @@ CONFIG_ALTIVEC=y | |||
39 | CONFIG_PPC_STD_MMU=y | 42 | CONFIG_PPC_STD_MMU=y |
40 | CONFIG_PPC_STD_MMU_32=y | 43 | CONFIG_PPC_STD_MMU_32=y |
41 | # CONFIG_SMP is not set | 44 | # CONFIG_SMP is not set |
45 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
42 | 46 | ||
43 | # | 47 | # |
44 | # Code maturity level options | 48 | # Code maturity level options |
@@ -72,10 +76,12 @@ CONFIG_PRINTK=y | |||
72 | CONFIG_BUG=y | 76 | CONFIG_BUG=y |
73 | CONFIG_ELF_CORE=y | 77 | CONFIG_ELF_CORE=y |
74 | CONFIG_BASE_FULL=y | 78 | CONFIG_BASE_FULL=y |
79 | CONFIG_RT_MUTEXES=y | ||
75 | CONFIG_FUTEX=y | 80 | CONFIG_FUTEX=y |
76 | CONFIG_EPOLL=y | 81 | CONFIG_EPOLL=y |
77 | CONFIG_SHMEM=y | 82 | CONFIG_SHMEM=y |
78 | CONFIG_SLAB=y | 83 | CONFIG_SLAB=y |
84 | CONFIG_VM_EVENT_COUNTERS=y | ||
79 | # CONFIG_TINY_SHMEM is not set | 85 | # CONFIG_TINY_SHMEM is not set |
80 | CONFIG_BASE_SMALL=0 | 86 | CONFIG_BASE_SMALL=0 |
81 | # CONFIG_SLOB is not set | 87 | # CONFIG_SLOB is not set |
@@ -119,6 +125,9 @@ CONFIG_PPC_MULTIPLATFORM=y | |||
119 | # CONFIG_APUS is not set | 125 | # CONFIG_APUS is not set |
120 | # CONFIG_PPC_CHRP is not set | 126 | # CONFIG_PPC_CHRP is not set |
121 | CONFIG_PPC_PMAC=y | 127 | CONFIG_PPC_PMAC=y |
128 | # CONFIG_PPC_CELL is not set | ||
129 | # CONFIG_PPC_CELL_NATIVE is not set | ||
130 | # CONFIG_UDBG_RTAS_CONSOLE is not set | ||
122 | CONFIG_MPIC=y | 131 | CONFIG_MPIC=y |
123 | # CONFIG_PPC_RTAS is not set | 132 | # CONFIG_PPC_RTAS is not set |
124 | # CONFIG_MMIO_NVRAM is not set | 133 | # CONFIG_MMIO_NVRAM is not set |
@@ -154,6 +163,7 @@ CONFIG_PREEMPT_NONE=y | |||
154 | # CONFIG_PREEMPT is not set | 163 | # CONFIG_PREEMPT is not set |
155 | CONFIG_BINFMT_ELF=y | 164 | CONFIG_BINFMT_ELF=y |
156 | CONFIG_BINFMT_MISC=m | 165 | CONFIG_BINFMT_MISC=m |
166 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y | ||
157 | # CONFIG_KEXEC is not set | 167 | # CONFIG_KEXEC is not set |
158 | CONFIG_ARCH_FLATMEM_ENABLE=y | 168 | CONFIG_ARCH_FLATMEM_ENABLE=y |
159 | CONFIG_SELECT_MEMORY_MODEL=y | 169 | CONFIG_SELECT_MEMORY_MODEL=y |
@@ -164,6 +174,7 @@ CONFIG_FLATMEM=y | |||
164 | CONFIG_FLAT_NODE_MEM_MAP=y | 174 | CONFIG_FLAT_NODE_MEM_MAP=y |
165 | # CONFIG_SPARSEMEM_STATIC is not set | 175 | # CONFIG_SPARSEMEM_STATIC is not set |
166 | CONFIG_SPLIT_PTLOCK_CPUS=4 | 176 | CONFIG_SPLIT_PTLOCK_CPUS=4 |
177 | # CONFIG_RESOURCES_64BIT is not set | ||
167 | CONFIG_PROC_DEVICETREE=y | 178 | CONFIG_PROC_DEVICETREE=y |
168 | # CONFIG_CMDLINE_BOOL is not set | 179 | # CONFIG_CMDLINE_BOOL is not set |
169 | CONFIG_PM=y | 180 | CONFIG_PM=y |
@@ -182,6 +193,7 @@ CONFIG_GENERIC_ISA_DMA=y | |||
182 | CONFIG_PPC_INDIRECT_PCI=y | 193 | CONFIG_PPC_INDIRECT_PCI=y |
183 | CONFIG_PCI=y | 194 | CONFIG_PCI=y |
184 | CONFIG_PCI_DOMAINS=y | 195 | CONFIG_PCI_DOMAINS=y |
196 | # CONFIG_PCIEPORTBUS is not set | ||
185 | # CONFIG_PCI_DEBUG is not set | 197 | # CONFIG_PCI_DEBUG is not set |
186 | 198 | ||
187 | # | 199 | # |
@@ -256,6 +268,8 @@ CONFIG_INET_ESP=y | |||
256 | # CONFIG_INET_IPCOMP is not set | 268 | # CONFIG_INET_IPCOMP is not set |
257 | # CONFIG_INET_XFRM_TUNNEL is not set | 269 | # CONFIG_INET_XFRM_TUNNEL is not set |
258 | # CONFIG_INET_TUNNEL is not set | 270 | # CONFIG_INET_TUNNEL is not set |
271 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
272 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
259 | CONFIG_INET_DIAG=y | 273 | CONFIG_INET_DIAG=y |
260 | CONFIG_INET_TCP_DIAG=y | 274 | CONFIG_INET_TCP_DIAG=y |
261 | # CONFIG_TCP_CONG_ADVANCED is not set | 275 | # CONFIG_TCP_CONG_ADVANCED is not set |
@@ -268,6 +282,7 @@ CONFIG_TCP_CONG_BIC=y | |||
268 | # CONFIG_IPV6 is not set | 282 | # CONFIG_IPV6 is not set |
269 | # CONFIG_INET6_XFRM_TUNNEL is not set | 283 | # CONFIG_INET6_XFRM_TUNNEL is not set |
270 | # CONFIG_INET6_TUNNEL is not set | 284 | # CONFIG_INET6_TUNNEL is not set |
285 | # CONFIG_NETWORK_SECMARK is not set | ||
271 | CONFIG_NETFILTER=y | 286 | CONFIG_NETFILTER=y |
272 | # CONFIG_NETFILTER_DEBUG is not set | 287 | # CONFIG_NETFILTER_DEBUG is not set |
273 | 288 | ||
@@ -292,9 +307,11 @@ CONFIG_NETFILTER_XT_MATCH_MARK=m | |||
292 | CONFIG_NETFILTER_XT_MATCH_POLICY=m | 307 | CONFIG_NETFILTER_XT_MATCH_POLICY=m |
293 | CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m | 308 | CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m |
294 | CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m | 309 | CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m |
310 | # CONFIG_NETFILTER_XT_MATCH_QUOTA is not set | ||
295 | CONFIG_NETFILTER_XT_MATCH_REALM=m | 311 | CONFIG_NETFILTER_XT_MATCH_REALM=m |
296 | CONFIG_NETFILTER_XT_MATCH_SCTP=m | 312 | CONFIG_NETFILTER_XT_MATCH_SCTP=m |
297 | CONFIG_NETFILTER_XT_MATCH_STATE=m | 313 | CONFIG_NETFILTER_XT_MATCH_STATE=m |
314 | # CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set | ||
298 | CONFIG_NETFILTER_XT_MATCH_STRING=m | 315 | CONFIG_NETFILTER_XT_MATCH_STRING=m |
299 | CONFIG_NETFILTER_XT_MATCH_TCPMSS=m | 316 | CONFIG_NETFILTER_XT_MATCH_TCPMSS=m |
300 | 317 | ||
@@ -313,6 +330,7 @@ CONFIG_IP_NF_TFTP=m | |||
313 | CONFIG_IP_NF_AMANDA=m | 330 | CONFIG_IP_NF_AMANDA=m |
314 | CONFIG_IP_NF_PPTP=m | 331 | CONFIG_IP_NF_PPTP=m |
315 | CONFIG_IP_NF_H323=m | 332 | CONFIG_IP_NF_H323=m |
333 | # CONFIG_IP_NF_SIP is not set | ||
316 | # CONFIG_IP_NF_QUEUE is not set | 334 | # CONFIG_IP_NF_QUEUE is not set |
317 | CONFIG_IP_NF_IPTABLES=m | 335 | CONFIG_IP_NF_IPTABLES=m |
318 | CONFIG_IP_NF_MATCH_IPRANGE=m | 336 | CONFIG_IP_NF_MATCH_IPRANGE=m |
@@ -457,6 +475,7 @@ CONFIG_IRTTY_SIR=m | |||
457 | # CONFIG_ALI_FIR is not set | 475 | # CONFIG_ALI_FIR is not set |
458 | # CONFIG_VLSI_FIR is not set | 476 | # CONFIG_VLSI_FIR is not set |
459 | # CONFIG_VIA_FIR is not set | 477 | # CONFIG_VIA_FIR is not set |
478 | # CONFIG_MCS_FIR is not set | ||
460 | CONFIG_BT=m | 479 | CONFIG_BT=m |
461 | CONFIG_BT_L2CAP=m | 480 | CONFIG_BT_L2CAP=m |
462 | CONFIG_BT_SCO=m | 481 | CONFIG_BT_SCO=m |
@@ -500,6 +519,7 @@ CONFIG_WIRELESS_EXT=y | |||
500 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 519 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
501 | CONFIG_FW_LOADER=y | 520 | CONFIG_FW_LOADER=y |
502 | # CONFIG_DEBUG_DRIVER is not set | 521 | # CONFIG_DEBUG_DRIVER is not set |
522 | # CONFIG_SYS_HYPERVISOR is not set | ||
503 | 523 | ||
504 | # | 524 | # |
505 | # Connector - unified userspace <-> kernelspace linker | 525 | # Connector - unified userspace <-> kernelspace linker |
@@ -600,7 +620,6 @@ CONFIG_BLK_DEV_PDC202XX_NEW=y | |||
600 | CONFIG_BLK_DEV_IDE_PMAC=y | 620 | CONFIG_BLK_DEV_IDE_PMAC=y |
601 | CONFIG_BLK_DEV_IDE_PMAC_ATA100FIRST=y | 621 | CONFIG_BLK_DEV_IDE_PMAC_ATA100FIRST=y |
602 | CONFIG_BLK_DEV_IDEDMA_PMAC=y | 622 | CONFIG_BLK_DEV_IDEDMA_PMAC=y |
603 | CONFIG_BLK_DEV_IDE_PMAC_BLINK=y | ||
604 | # CONFIG_IDE_ARM is not set | 623 | # CONFIG_IDE_ARM is not set |
605 | CONFIG_BLK_DEV_IDEDMA=y | 624 | CONFIG_BLK_DEV_IDEDMA=y |
606 | # CONFIG_IDEDMA_IVB is not set | 625 | # CONFIG_IDEDMA_IVB is not set |
@@ -661,6 +680,7 @@ CONFIG_SCSI_AIC7XXX_OLD=m | |||
661 | # CONFIG_MEGARAID_LEGACY is not set | 680 | # CONFIG_MEGARAID_LEGACY is not set |
662 | # CONFIG_MEGARAID_SAS is not set | 681 | # CONFIG_MEGARAID_SAS is not set |
663 | # CONFIG_SCSI_SATA is not set | 682 | # CONFIG_SCSI_SATA is not set |
683 | # CONFIG_SCSI_HPTIOP is not set | ||
664 | # CONFIG_SCSI_BUSLOGIC is not set | 684 | # CONFIG_SCSI_BUSLOGIC is not set |
665 | # CONFIG_SCSI_DMX3191D is not set | 685 | # CONFIG_SCSI_DMX3191D is not set |
666 | # CONFIG_SCSI_EATA is not set | 686 | # CONFIG_SCSI_EATA is not set |
@@ -705,9 +725,7 @@ CONFIG_MD_LINEAR=m | |||
705 | CONFIG_MD_RAID0=m | 725 | CONFIG_MD_RAID0=m |
706 | CONFIG_MD_RAID1=m | 726 | CONFIG_MD_RAID1=m |
707 | CONFIG_MD_RAID10=m | 727 | CONFIG_MD_RAID10=m |
708 | CONFIG_MD_RAID5=m | 728 | # CONFIG_MD_RAID456 is not set |
709 | CONFIG_MD_RAID5_RESHAPE=y | ||
710 | CONFIG_MD_RAID6=m | ||
711 | CONFIG_MD_MULTIPATH=m | 729 | CONFIG_MD_MULTIPATH=m |
712 | CONFIG_MD_FAULTY=m | 730 | CONFIG_MD_FAULTY=m |
713 | CONFIG_BLK_DEV_DM=m | 731 | CONFIG_BLK_DEV_DM=m |
@@ -750,7 +768,6 @@ CONFIG_IEEE1394_OHCI1394=m | |||
750 | # | 768 | # |
751 | CONFIG_IEEE1394_VIDEO1394=m | 769 | CONFIG_IEEE1394_VIDEO1394=m |
752 | CONFIG_IEEE1394_SBP2=m | 770 | CONFIG_IEEE1394_SBP2=m |
753 | # CONFIG_IEEE1394_SBP2_PHYS_DMA is not set | ||
754 | # CONFIG_IEEE1394_ETH1394 is not set | 771 | # CONFIG_IEEE1394_ETH1394 is not set |
755 | CONFIG_IEEE1394_DV1394=m | 772 | CONFIG_IEEE1394_DV1394=m |
756 | CONFIG_IEEE1394_RAWIO=m | 773 | CONFIG_IEEE1394_RAWIO=m |
@@ -766,9 +783,12 @@ CONFIG_IEEE1394_RAWIO=m | |||
766 | CONFIG_ADB=y | 783 | CONFIG_ADB=y |
767 | CONFIG_ADB_CUDA=y | 784 | CONFIG_ADB_CUDA=y |
768 | CONFIG_ADB_PMU=y | 785 | CONFIG_ADB_PMU=y |
786 | CONFIG_ADB_PMU_LED=y | ||
787 | CONFIG_ADB_PMU_LED_IDE=y | ||
769 | CONFIG_PMAC_APM_EMU=m | 788 | CONFIG_PMAC_APM_EMU=m |
770 | CONFIG_PMAC_MEDIABAY=y | 789 | CONFIG_PMAC_MEDIABAY=y |
771 | CONFIG_PMAC_BACKLIGHT=y | 790 | CONFIG_PMAC_BACKLIGHT=y |
791 | CONFIG_PMAC_BACKLIGHT_LEGACY=y | ||
772 | CONFIG_INPUT_ADBHID=y | 792 | CONFIG_INPUT_ADBHID=y |
773 | CONFIG_MAC_EMUMOUSEBTN=y | 793 | CONFIG_MAC_EMUMOUSEBTN=y |
774 | CONFIG_THERM_WINDTUNNEL=m | 794 | CONFIG_THERM_WINDTUNNEL=m |
@@ -858,6 +878,7 @@ CONFIG_PCNET32=y | |||
858 | # CONFIG_CHELSIO_T1 is not set | 878 | # CONFIG_CHELSIO_T1 is not set |
859 | # CONFIG_IXGB is not set | 879 | # CONFIG_IXGB is not set |
860 | # CONFIG_S2IO is not set | 880 | # CONFIG_S2IO is not set |
881 | # CONFIG_MYRI10GE is not set | ||
861 | 882 | ||
862 | # | 883 | # |
863 | # Token Ring devices | 884 | # Token Ring devices |
@@ -908,6 +929,7 @@ CONFIG_APPLE_AIRPORT=m | |||
908 | # Prism GT/Duette 802.11(a/b/g) PCI/Cardbus support | 929 | # Prism GT/Duette 802.11(a/b/g) PCI/Cardbus support |
909 | # | 930 | # |
910 | CONFIG_PRISM54=m | 931 | CONFIG_PRISM54=m |
932 | # CONFIG_USB_ZD1201 is not set | ||
911 | # CONFIG_HOSTAP is not set | 933 | # CONFIG_HOSTAP is not set |
912 | CONFIG_NET_WIRELESS=y | 934 | CONFIG_NET_WIRELESS=y |
913 | 935 | ||
@@ -998,6 +1020,7 @@ CONFIG_SERIO=y | |||
998 | CONFIG_VT=y | 1020 | CONFIG_VT=y |
999 | CONFIG_VT_CONSOLE=y | 1021 | CONFIG_VT_CONSOLE=y |
1000 | CONFIG_HW_CONSOLE=y | 1022 | CONFIG_HW_CONSOLE=y |
1023 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
1001 | # CONFIG_SERIAL_NONSTANDARD is not set | 1024 | # CONFIG_SERIAL_NONSTANDARD is not set |
1002 | 1025 | ||
1003 | # | 1026 | # |
@@ -1029,6 +1052,7 @@ CONFIG_LEGACY_PTY_COUNT=256 | |||
1029 | # Watchdog Cards | 1052 | # Watchdog Cards |
1030 | # | 1053 | # |
1031 | # CONFIG_WATCHDOG is not set | 1054 | # CONFIG_WATCHDOG is not set |
1055 | # CONFIG_HW_RANDOM is not set | ||
1032 | CONFIG_NVRAM=y | 1056 | CONFIG_NVRAM=y |
1033 | CONFIG_GEN_RTC=y | 1057 | CONFIG_GEN_RTC=y |
1034 | # CONFIG_GEN_RTC_X is not set | 1058 | # CONFIG_GEN_RTC_X is not set |
@@ -1040,6 +1064,7 @@ CONFIG_GEN_RTC=y | |||
1040 | # Ftape, the floppy tape device driver | 1064 | # Ftape, the floppy tape device driver |
1041 | # | 1065 | # |
1042 | CONFIG_AGP=m | 1066 | CONFIG_AGP=m |
1067 | # CONFIG_AGP_SIS is not set | ||
1043 | # CONFIG_AGP_VIA is not set | 1068 | # CONFIG_AGP_VIA is not set |
1044 | CONFIG_AGP_UNINORTH=m | 1069 | CONFIG_AGP_UNINORTH=m |
1045 | CONFIG_DRM=m | 1070 | CONFIG_DRM=m |
@@ -1092,6 +1117,7 @@ CONFIG_I2C_ALGOBIT=y | |||
1092 | CONFIG_I2C_POWERMAC=y | 1117 | CONFIG_I2C_POWERMAC=y |
1093 | # CONFIG_I2C_MPC is not set | 1118 | # CONFIG_I2C_MPC is not set |
1094 | # CONFIG_I2C_NFORCE2 is not set | 1119 | # CONFIG_I2C_NFORCE2 is not set |
1120 | # CONFIG_I2C_OCORES is not set | ||
1095 | # CONFIG_I2C_PARPORT_LIGHT is not set | 1121 | # CONFIG_I2C_PARPORT_LIGHT is not set |
1096 | # CONFIG_I2C_PROSAVAGE is not set | 1122 | # CONFIG_I2C_PROSAVAGE is not set |
1097 | # CONFIG_I2C_SAVAGE4 is not set | 1123 | # CONFIG_I2C_SAVAGE4 is not set |
@@ -1156,12 +1182,13 @@ CONFIG_VIDEO_V4L2=y | |||
1156 | # | 1182 | # |
1157 | # Graphics support | 1183 | # Graphics support |
1158 | # | 1184 | # |
1185 | # CONFIG_FIRMWARE_EDID is not set | ||
1159 | CONFIG_FB=y | 1186 | CONFIG_FB=y |
1160 | CONFIG_FB_CFB_FILLRECT=y | 1187 | CONFIG_FB_CFB_FILLRECT=y |
1161 | CONFIG_FB_CFB_COPYAREA=y | 1188 | CONFIG_FB_CFB_COPYAREA=y |
1162 | CONFIG_FB_CFB_IMAGEBLIT=y | 1189 | CONFIG_FB_CFB_IMAGEBLIT=y |
1163 | CONFIG_FB_MACMODES=y | 1190 | CONFIG_FB_MACMODES=y |
1164 | CONFIG_FB_FIRMWARE_EDID=y | 1191 | CONFIG_FB_BACKLIGHT=y |
1165 | CONFIG_FB_MODE_HELPERS=y | 1192 | CONFIG_FB_MODE_HELPERS=y |
1166 | CONFIG_FB_TILEBLITTING=y | 1193 | CONFIG_FB_TILEBLITTING=y |
1167 | # CONFIG_FB_CIRRUS is not set | 1194 | # CONFIG_FB_CIRRUS is not set |
@@ -1178,6 +1205,7 @@ CONFIG_FB_IMSTT=y | |||
1178 | # CONFIG_FB_S1D13XXX is not set | 1205 | # CONFIG_FB_S1D13XXX is not set |
1179 | CONFIG_FB_NVIDIA=y | 1206 | CONFIG_FB_NVIDIA=y |
1180 | CONFIG_FB_NVIDIA_I2C=y | 1207 | CONFIG_FB_NVIDIA_I2C=y |
1208 | CONFIG_FB_NVIDIA_BACKLIGHT=y | ||
1181 | # CONFIG_FB_RIVA is not set | 1209 | # CONFIG_FB_RIVA is not set |
1182 | CONFIG_FB_MATROX=y | 1210 | CONFIG_FB_MATROX=y |
1183 | CONFIG_FB_MATROX_MILLENIUM=y | 1211 | CONFIG_FB_MATROX_MILLENIUM=y |
@@ -1187,12 +1215,15 @@ CONFIG_FB_MATROX_MYSTIQUE=y | |||
1187 | # CONFIG_FB_MATROX_MULTIHEAD is not set | 1215 | # CONFIG_FB_MATROX_MULTIHEAD is not set |
1188 | CONFIG_FB_RADEON=y | 1216 | CONFIG_FB_RADEON=y |
1189 | CONFIG_FB_RADEON_I2C=y | 1217 | CONFIG_FB_RADEON_I2C=y |
1218 | CONFIG_FB_RADEON_BACKLIGHT=y | ||
1190 | # CONFIG_FB_RADEON_DEBUG is not set | 1219 | # CONFIG_FB_RADEON_DEBUG is not set |
1191 | CONFIG_FB_ATY128=y | 1220 | CONFIG_FB_ATY128=y |
1221 | CONFIG_FB_ATY128_BACKLIGHT=y | ||
1192 | CONFIG_FB_ATY=y | 1222 | CONFIG_FB_ATY=y |
1193 | CONFIG_FB_ATY_CT=y | 1223 | CONFIG_FB_ATY_CT=y |
1194 | # CONFIG_FB_ATY_GENERIC_LCD is not set | 1224 | # CONFIG_FB_ATY_GENERIC_LCD is not set |
1195 | CONFIG_FB_ATY_GX=y | 1225 | CONFIG_FB_ATY_GX=y |
1226 | CONFIG_FB_ATY_BACKLIGHT=y | ||
1196 | # CONFIG_FB_SAVAGE is not set | 1227 | # CONFIG_FB_SAVAGE is not set |
1197 | # CONFIG_FB_SIS is not set | 1228 | # CONFIG_FB_SIS is not set |
1198 | # CONFIG_FB_NEOMAGIC is not set | 1229 | # CONFIG_FB_NEOMAGIC is not set |
@@ -1221,7 +1252,11 @@ CONFIG_LOGO=y | |||
1221 | CONFIG_LOGO_LINUX_MONO=y | 1252 | CONFIG_LOGO_LINUX_MONO=y |
1222 | CONFIG_LOGO_LINUX_VGA16=y | 1253 | CONFIG_LOGO_LINUX_VGA16=y |
1223 | CONFIG_LOGO_LINUX_CLUT224=y | 1254 | CONFIG_LOGO_LINUX_CLUT224=y |
1224 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | 1255 | CONFIG_BACKLIGHT_LCD_SUPPORT=y |
1256 | CONFIG_BACKLIGHT_CLASS_DEVICE=y | ||
1257 | CONFIG_BACKLIGHT_DEVICE=y | ||
1258 | CONFIG_LCD_CLASS_DEVICE=m | ||
1259 | CONFIG_LCD_DEVICE=y | ||
1225 | 1260 | ||
1226 | # | 1261 | # |
1227 | # Sound | 1262 | # Sound |
@@ -1278,6 +1313,18 @@ CONFIG_SND_DUMMY=m | |||
1278 | # CONFIG_SND_CMIPCI is not set | 1313 | # CONFIG_SND_CMIPCI is not set |
1279 | # CONFIG_SND_CS4281 is not set | 1314 | # CONFIG_SND_CS4281 is not set |
1280 | # CONFIG_SND_CS46XX is not set | 1315 | # CONFIG_SND_CS46XX is not set |
1316 | # CONFIG_SND_DARLA20 is not set | ||
1317 | # CONFIG_SND_GINA20 is not set | ||
1318 | # CONFIG_SND_LAYLA20 is not set | ||
1319 | # CONFIG_SND_DARLA24 is not set | ||
1320 | # CONFIG_SND_GINA24 is not set | ||
1321 | # CONFIG_SND_LAYLA24 is not set | ||
1322 | # CONFIG_SND_MONA is not set | ||
1323 | # CONFIG_SND_MIA is not set | ||
1324 | # CONFIG_SND_ECHO3G is not set | ||
1325 | # CONFIG_SND_INDIGO is not set | ||
1326 | # CONFIG_SND_INDIGOIO is not set | ||
1327 | # CONFIG_SND_INDIGODJ is not set | ||
1281 | # CONFIG_SND_EMU10K1 is not set | 1328 | # CONFIG_SND_EMU10K1 is not set |
1282 | # CONFIG_SND_EMU10K1X is not set | 1329 | # CONFIG_SND_EMU10K1X is not set |
1283 | # CONFIG_SND_ENS1370 is not set | 1330 | # CONFIG_SND_ENS1370 is not set |
@@ -1315,6 +1362,17 @@ CONFIG_SND_POWERMAC=m | |||
1315 | CONFIG_SND_POWERMAC_AUTO_DRC=y | 1362 | CONFIG_SND_POWERMAC_AUTO_DRC=y |
1316 | 1363 | ||
1317 | # | 1364 | # |
1365 | # Apple Onboard Audio driver | ||
1366 | # | ||
1367 | CONFIG_SND_AOA=m | ||
1368 | CONFIG_SND_AOA_FABRIC_LAYOUT=m | ||
1369 | CONFIG_SND_AOA_ONYX=m | ||
1370 | CONFIG_SND_AOA_TAS=m | ||
1371 | CONFIG_SND_AOA_TOONIE=m | ||
1372 | CONFIG_SND_AOA_SOUNDBUS=m | ||
1373 | CONFIG_SND_AOA_SOUNDBUS_I2S=m | ||
1374 | |||
1375 | # | ||
1318 | # USB devices | 1376 | # USB devices |
1319 | # | 1377 | # |
1320 | CONFIG_SND_USB_AUDIO=m | 1378 | CONFIG_SND_USB_AUDIO=m |
@@ -1355,6 +1413,7 @@ CONFIG_USB_DYNAMIC_MINORS=y | |||
1355 | CONFIG_USB_EHCI_HCD=m | 1413 | CONFIG_USB_EHCI_HCD=m |
1356 | CONFIG_USB_EHCI_SPLIT_ISO=y | 1414 | CONFIG_USB_EHCI_SPLIT_ISO=y |
1357 | CONFIG_USB_EHCI_ROOT_HUB_TT=y | 1415 | CONFIG_USB_EHCI_ROOT_HUB_TT=y |
1416 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set | ||
1358 | # CONFIG_USB_ISP116X_HCD is not set | 1417 | # CONFIG_USB_ISP116X_HCD is not set |
1359 | CONFIG_USB_OHCI_HCD=y | 1418 | CONFIG_USB_OHCI_HCD=y |
1360 | # CONFIG_USB_OHCI_BIG_ENDIAN is not set | 1419 | # CONFIG_USB_OHCI_BIG_ENDIAN is not set |
@@ -1431,7 +1490,6 @@ CONFIG_USB_NET_NET1080=m | |||
1431 | # CONFIG_USB_NET_RNDIS_HOST is not set | 1490 | # CONFIG_USB_NET_RNDIS_HOST is not set |
1432 | # CONFIG_USB_NET_CDC_SUBSET is not set | 1491 | # CONFIG_USB_NET_CDC_SUBSET is not set |
1433 | CONFIG_USB_NET_ZAURUS=m | 1492 | CONFIG_USB_NET_ZAURUS=m |
1434 | # CONFIG_USB_ZD1201 is not set | ||
1435 | CONFIG_USB_MON=y | 1493 | CONFIG_USB_MON=y |
1436 | 1494 | ||
1437 | # | 1495 | # |
@@ -1499,10 +1557,12 @@ CONFIG_USB_EZUSB=y | |||
1499 | # CONFIG_USB_LEGOTOWER is not set | 1557 | # CONFIG_USB_LEGOTOWER is not set |
1500 | # CONFIG_USB_LCD is not set | 1558 | # CONFIG_USB_LCD is not set |
1501 | # CONFIG_USB_LED is not set | 1559 | # CONFIG_USB_LED is not set |
1560 | # CONFIG_USB_CY7C63 is not set | ||
1502 | # CONFIG_USB_CYTHERM is not set | 1561 | # CONFIG_USB_CYTHERM is not set |
1503 | # CONFIG_USB_PHIDGETKIT is not set | 1562 | # CONFIG_USB_PHIDGETKIT is not set |
1504 | # CONFIG_USB_PHIDGETSERVO is not set | 1563 | # CONFIG_USB_PHIDGETSERVO is not set |
1505 | # CONFIG_USB_IDMOUSE is not set | 1564 | # CONFIG_USB_IDMOUSE is not set |
1565 | CONFIG_USB_APPLEDISPLAY=m | ||
1506 | # CONFIG_USB_SISUSBVGA is not set | 1566 | # CONFIG_USB_SISUSBVGA is not set |
1507 | # CONFIG_USB_LD is not set | 1567 | # CONFIG_USB_LD is not set |
1508 | # CONFIG_USB_TEST is not set | 1568 | # CONFIG_USB_TEST is not set |
@@ -1524,7 +1584,8 @@ CONFIG_USB_EZUSB=y | |||
1524 | # | 1584 | # |
1525 | # LED devices | 1585 | # LED devices |
1526 | # | 1586 | # |
1527 | # CONFIG_NEW_LEDS is not set | 1587 | CONFIG_NEW_LEDS=y |
1588 | CONFIG_LEDS_CLASS=y | ||
1528 | 1589 | ||
1529 | # | 1590 | # |
1530 | # LED drivers | 1591 | # LED drivers |
@@ -1533,6 +1594,10 @@ CONFIG_USB_EZUSB=y | |||
1533 | # | 1594 | # |
1534 | # LED Triggers | 1595 | # LED Triggers |
1535 | # | 1596 | # |
1597 | CONFIG_LEDS_TRIGGERS=y | ||
1598 | # CONFIG_LEDS_TRIGGER_TIMER is not set | ||
1599 | CONFIG_LEDS_TRIGGER_IDE_DISK=y | ||
1600 | # CONFIG_LEDS_TRIGGER_HEARTBEAT is not set | ||
1536 | 1601 | ||
1537 | # | 1602 | # |
1538 | # InfiniBand support | 1603 | # InfiniBand support |
@@ -1549,6 +1614,19 @@ CONFIG_USB_EZUSB=y | |||
1549 | # CONFIG_RTC_CLASS is not set | 1614 | # CONFIG_RTC_CLASS is not set |
1550 | 1615 | ||
1551 | # | 1616 | # |
1617 | # DMA Engine support | ||
1618 | # | ||
1619 | # CONFIG_DMA_ENGINE is not set | ||
1620 | |||
1621 | # | ||
1622 | # DMA Clients | ||
1623 | # | ||
1624 | |||
1625 | # | ||
1626 | # DMA Devices | ||
1627 | # | ||
1628 | |||
1629 | # | ||
1552 | # File systems | 1630 | # File systems |
1553 | # | 1631 | # |
1554 | CONFIG_EXT2_FS=y | 1632 | CONFIG_EXT2_FS=y |
@@ -1569,6 +1647,7 @@ CONFIG_FS_POSIX_ACL=y | |||
1569 | # CONFIG_MINIX_FS is not set | 1647 | # CONFIG_MINIX_FS is not set |
1570 | # CONFIG_ROMFS_FS is not set | 1648 | # CONFIG_ROMFS_FS is not set |
1571 | CONFIG_INOTIFY=y | 1649 | CONFIG_INOTIFY=y |
1650 | CONFIG_INOTIFY_USER=y | ||
1572 | # CONFIG_QUOTA is not set | 1651 | # CONFIG_QUOTA is not set |
1573 | CONFIG_DNOTIFY=y | 1652 | CONFIG_DNOTIFY=y |
1574 | # CONFIG_AUTOFS_FS is not set | 1653 | # CONFIG_AUTOFS_FS is not set |
@@ -1649,6 +1728,7 @@ CONFIG_RPCSEC_GSS_KRB5=y | |||
1649 | CONFIG_SMB_FS=m | 1728 | CONFIG_SMB_FS=m |
1650 | # CONFIG_SMB_NLS_DEFAULT is not set | 1729 | # CONFIG_SMB_NLS_DEFAULT is not set |
1651 | # CONFIG_CIFS is not set | 1730 | # CONFIG_CIFS is not set |
1731 | # CONFIG_CIFS_DEBUG2 is not set | ||
1652 | # CONFIG_NCP_FS is not set | 1732 | # CONFIG_NCP_FS is not set |
1653 | # CONFIG_CODA_FS is not set | 1733 | # CONFIG_CODA_FS is not set |
1654 | # CONFIG_AFS_FS is not set | 1734 | # CONFIG_AFS_FS is not set |
@@ -1732,6 +1812,7 @@ CONFIG_TEXTSEARCH=y | |||
1732 | CONFIG_TEXTSEARCH_KMP=m | 1812 | CONFIG_TEXTSEARCH_KMP=m |
1733 | CONFIG_TEXTSEARCH_BM=m | 1813 | CONFIG_TEXTSEARCH_BM=m |
1734 | CONFIG_TEXTSEARCH_FSM=m | 1814 | CONFIG_TEXTSEARCH_FSM=m |
1815 | CONFIG_PLIST=y | ||
1735 | 1816 | ||
1736 | # | 1817 | # |
1737 | # Instrumentation Support | 1818 | # Instrumentation Support |
@@ -1744,12 +1825,15 @@ CONFIG_OPROFILE=y | |||
1744 | # | 1825 | # |
1745 | # CONFIG_PRINTK_TIME is not set | 1826 | # CONFIG_PRINTK_TIME is not set |
1746 | # CONFIG_MAGIC_SYSRQ is not set | 1827 | # CONFIG_MAGIC_SYSRQ is not set |
1828 | # CONFIG_UNUSED_SYMBOLS is not set | ||
1747 | CONFIG_DEBUG_KERNEL=y | 1829 | CONFIG_DEBUG_KERNEL=y |
1748 | CONFIG_LOG_BUF_SHIFT=14 | 1830 | CONFIG_LOG_BUF_SHIFT=14 |
1749 | CONFIG_DETECT_SOFTLOCKUP=y | 1831 | CONFIG_DETECT_SOFTLOCKUP=y |
1750 | # CONFIG_SCHEDSTATS is not set | 1832 | # CONFIG_SCHEDSTATS is not set |
1751 | # CONFIG_DEBUG_SLAB is not set | 1833 | # CONFIG_DEBUG_SLAB is not set |
1752 | # CONFIG_DEBUG_MUTEXES is not set | 1834 | # CONFIG_DEBUG_MUTEXES is not set |
1835 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
1836 | # CONFIG_RT_MUTEX_TESTER is not set | ||
1753 | # CONFIG_DEBUG_SPINLOCK is not set | 1837 | # CONFIG_DEBUG_SPINLOCK is not set |
1754 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | 1838 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set |
1755 | # CONFIG_DEBUG_KOBJECT is not set | 1839 | # CONFIG_DEBUG_KOBJECT is not set |
@@ -1763,11 +1847,7 @@ CONFIG_XMON=y | |||
1763 | CONFIG_XMON_DEFAULT=y | 1847 | CONFIG_XMON_DEFAULT=y |
1764 | # CONFIG_BDI_SWITCH is not set | 1848 | # CONFIG_BDI_SWITCH is not set |
1765 | CONFIG_BOOTX_TEXT=y | 1849 | CONFIG_BOOTX_TEXT=y |
1766 | # CONFIG_PPC_EARLY_DEBUG_LPAR is not set | 1850 | # CONFIG_PPC_EARLY_DEBUG is not set |
1767 | # CONFIG_PPC_EARLY_DEBUG_G5 is not set | ||
1768 | # CONFIG_PPC_EARLY_DEBUG_RTAS is not set | ||
1769 | # CONFIG_PPC_EARLY_DEBUG_MAPLE is not set | ||
1770 | # CONFIG_PPC_EARLY_DEBUG_ISERIES is not set | ||
1771 | 1851 | ||
1772 | # | 1852 | # |
1773 | # Security options | 1853 | # Security options |
diff --git a/arch/powerpc/configs/pseries_defconfig b/arch/powerpc/configs/pseries_defconfig index 31708ad4574e..c18e8600d78f 100644 --- a/arch/powerpc/configs/pseries_defconfig +++ b/arch/powerpc/configs/pseries_defconfig | |||
@@ -1,13 +1,14 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.17-rc4 | 3 | # Linux kernel version: 2.6.18-rc3 |
4 | # Sun May 28 07:26:56 2006 | 4 | # Tue Aug 8 09:14:48 2006 |
5 | # | 5 | # |
6 | CONFIG_PPC64=y | 6 | CONFIG_PPC64=y |
7 | CONFIG_64BIT=y | 7 | CONFIG_64BIT=y |
8 | CONFIG_PPC_MERGE=y | 8 | CONFIG_PPC_MERGE=y |
9 | CONFIG_MMU=y | 9 | CONFIG_MMU=y |
10 | CONFIG_GENERIC_HARDIRQS=y | 10 | CONFIG_GENERIC_HARDIRQS=y |
11 | CONFIG_IRQ_PER_CPU=y | ||
11 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y | 12 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y |
12 | CONFIG_GENERIC_HWEIGHT=y | 13 | CONFIG_GENERIC_HWEIGHT=y |
13 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 14 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
@@ -35,6 +36,7 @@ CONFIG_PPC_STD_MMU=y | |||
35 | CONFIG_VIRT_CPU_ACCOUNTING=y | 36 | CONFIG_VIRT_CPU_ACCOUNTING=y |
36 | CONFIG_SMP=y | 37 | CONFIG_SMP=y |
37 | CONFIG_NR_CPUS=128 | 38 | CONFIG_NR_CPUS=128 |
39 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
38 | 40 | ||
39 | # | 41 | # |
40 | # Code maturity level options | 42 | # Code maturity level options |
@@ -52,6 +54,7 @@ CONFIG_SWAP=y | |||
52 | CONFIG_SYSVIPC=y | 54 | CONFIG_SYSVIPC=y |
53 | CONFIG_POSIX_MQUEUE=y | 55 | CONFIG_POSIX_MQUEUE=y |
54 | # CONFIG_BSD_PROCESS_ACCT is not set | 56 | # CONFIG_BSD_PROCESS_ACCT is not set |
57 | # CONFIG_TASKSTATS is not set | ||
55 | CONFIG_SYSCTL=y | 58 | CONFIG_SYSCTL=y |
56 | CONFIG_AUDIT=y | 59 | CONFIG_AUDIT=y |
57 | CONFIG_AUDITSYSCALL=y | 60 | CONFIG_AUDITSYSCALL=y |
@@ -70,10 +73,12 @@ CONFIG_PRINTK=y | |||
70 | CONFIG_BUG=y | 73 | CONFIG_BUG=y |
71 | CONFIG_ELF_CORE=y | 74 | CONFIG_ELF_CORE=y |
72 | CONFIG_BASE_FULL=y | 75 | CONFIG_BASE_FULL=y |
76 | CONFIG_RT_MUTEXES=y | ||
73 | CONFIG_FUTEX=y | 77 | CONFIG_FUTEX=y |
74 | CONFIG_EPOLL=y | 78 | CONFIG_EPOLL=y |
75 | CONFIG_SHMEM=y | 79 | CONFIG_SHMEM=y |
76 | CONFIG_SLAB=y | 80 | CONFIG_SLAB=y |
81 | CONFIG_VM_EVENT_COUNTERS=y | ||
77 | # CONFIG_TINY_SHMEM is not set | 82 | # CONFIG_TINY_SHMEM is not set |
78 | CONFIG_BASE_SMALL=0 | 83 | CONFIG_BASE_SMALL=0 |
79 | # CONFIG_SLOB is not set | 84 | # CONFIG_SLOB is not set |
@@ -118,6 +123,9 @@ CONFIG_PPC_PSERIES=y | |||
118 | # CONFIG_PPC_PMAC is not set | 123 | # CONFIG_PPC_PMAC is not set |
119 | # CONFIG_PPC_MAPLE is not set | 124 | # CONFIG_PPC_MAPLE is not set |
120 | # CONFIG_PPC_CELL is not set | 125 | # CONFIG_PPC_CELL is not set |
126 | # CONFIG_PPC_CELL_NATIVE is not set | ||
127 | # CONFIG_PPC_IBM_CELL_BLADE is not set | ||
128 | # CONFIG_UDBG_RTAS_CONSOLE is not set | ||
121 | CONFIG_XICS=y | 129 | CONFIG_XICS=y |
122 | # CONFIG_U3_DART is not set | 130 | # CONFIG_U3_DART is not set |
123 | CONFIG_MPIC=y | 131 | CONFIG_MPIC=y |
@@ -149,6 +157,7 @@ CONFIG_BINFMT_MISC=m | |||
149 | CONFIG_FORCE_MAX_ZONEORDER=13 | 157 | CONFIG_FORCE_MAX_ZONEORDER=13 |
150 | CONFIG_IOMMU_VMERGE=y | 158 | CONFIG_IOMMU_VMERGE=y |
151 | CONFIG_HOTPLUG_CPU=y | 159 | CONFIG_HOTPLUG_CPU=y |
160 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y | ||
152 | CONFIG_KEXEC=y | 161 | CONFIG_KEXEC=y |
153 | # CONFIG_CRASH_DUMP is not set | 162 | # CONFIG_CRASH_DUMP is not set |
154 | CONFIG_IRQ_ALL_CPUS=y | 163 | CONFIG_IRQ_ALL_CPUS=y |
@@ -173,6 +182,7 @@ CONFIG_SPARSEMEM_EXTREME=y | |||
173 | # CONFIG_MEMORY_HOTPLUG is not set | 182 | # CONFIG_MEMORY_HOTPLUG is not set |
174 | CONFIG_SPLIT_PTLOCK_CPUS=4 | 183 | CONFIG_SPLIT_PTLOCK_CPUS=4 |
175 | CONFIG_MIGRATION=y | 184 | CONFIG_MIGRATION=y |
185 | CONFIG_RESOURCES_64BIT=y | ||
176 | CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID=y | 186 | CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID=y |
177 | # CONFIG_PPC_64K_PAGES is not set | 187 | # CONFIG_PPC_64K_PAGES is not set |
178 | CONFIG_SCHED_SMT=y | 188 | CONFIG_SCHED_SMT=y |
@@ -190,6 +200,7 @@ CONFIG_PPC_I8259=y | |||
190 | # CONFIG_PPC_INDIRECT_PCI is not set | 200 | # CONFIG_PPC_INDIRECT_PCI is not set |
191 | CONFIG_PCI=y | 201 | CONFIG_PCI=y |
192 | CONFIG_PCI_DOMAINS=y | 202 | CONFIG_PCI_DOMAINS=y |
203 | # CONFIG_PCIEPORTBUS is not set | ||
193 | # CONFIG_PCI_DEBUG is not set | 204 | # CONFIG_PCI_DEBUG is not set |
194 | 205 | ||
195 | # | 206 | # |
@@ -238,6 +249,8 @@ CONFIG_INET_ESP=m | |||
238 | CONFIG_INET_IPCOMP=m | 249 | CONFIG_INET_IPCOMP=m |
239 | CONFIG_INET_XFRM_TUNNEL=m | 250 | CONFIG_INET_XFRM_TUNNEL=m |
240 | CONFIG_INET_TUNNEL=y | 251 | CONFIG_INET_TUNNEL=y |
252 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
253 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
241 | CONFIG_INET_DIAG=y | 254 | CONFIG_INET_DIAG=y |
242 | CONFIG_INET_TCP_DIAG=y | 255 | CONFIG_INET_TCP_DIAG=y |
243 | # CONFIG_TCP_CONG_ADVANCED is not set | 256 | # CONFIG_TCP_CONG_ADVANCED is not set |
@@ -250,6 +263,7 @@ CONFIG_TCP_CONG_BIC=y | |||
250 | # CONFIG_IPV6 is not set | 263 | # CONFIG_IPV6 is not set |
251 | # CONFIG_INET6_XFRM_TUNNEL is not set | 264 | # CONFIG_INET6_XFRM_TUNNEL is not set |
252 | # CONFIG_INET6_TUNNEL is not set | 265 | # CONFIG_INET6_TUNNEL is not set |
266 | # CONFIG_NETWORK_SECMARK is not set | ||
253 | CONFIG_NETFILTER=y | 267 | CONFIG_NETFILTER=y |
254 | # CONFIG_NETFILTER_DEBUG is not set | 268 | # CONFIG_NETFILTER_DEBUG is not set |
255 | 269 | ||
@@ -277,6 +291,7 @@ CONFIG_IP_NF_TFTP=m | |||
277 | CONFIG_IP_NF_AMANDA=m | 291 | CONFIG_IP_NF_AMANDA=m |
278 | # CONFIG_IP_NF_PPTP is not set | 292 | # CONFIG_IP_NF_PPTP is not set |
279 | # CONFIG_IP_NF_H323 is not set | 293 | # CONFIG_IP_NF_H323 is not set |
294 | # CONFIG_IP_NF_SIP is not set | ||
280 | CONFIG_IP_NF_QUEUE=m | 295 | CONFIG_IP_NF_QUEUE=m |
281 | 296 | ||
282 | # | 297 | # |
@@ -316,6 +331,7 @@ CONFIG_LLC=y | |||
316 | # Network testing | 331 | # Network testing |
317 | # | 332 | # |
318 | # CONFIG_NET_PKTGEN is not set | 333 | # CONFIG_NET_PKTGEN is not set |
334 | # CONFIG_NET_TCPPROBE is not set | ||
319 | # CONFIG_HAMRADIO is not set | 335 | # CONFIG_HAMRADIO is not set |
320 | # CONFIG_IRDA is not set | 336 | # CONFIG_IRDA is not set |
321 | # CONFIG_BT is not set | 337 | # CONFIG_BT is not set |
@@ -332,6 +348,7 @@ CONFIG_STANDALONE=y | |||
332 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 348 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
333 | CONFIG_FW_LOADER=y | 349 | CONFIG_FW_LOADER=y |
334 | # CONFIG_DEBUG_DRIVER is not set | 350 | # CONFIG_DEBUG_DRIVER is not set |
351 | # CONFIG_SYS_HYPERVISOR is not set | ||
335 | 352 | ||
336 | # | 353 | # |
337 | # Connector - unified userspace <-> kernelspace linker | 354 | # Connector - unified userspace <-> kernelspace linker |
@@ -352,6 +369,7 @@ CONFIG_PARPORT_PC=m | |||
352 | # CONFIG_PARPORT_PC_FIFO is not set | 369 | # CONFIG_PARPORT_PC_FIFO is not set |
353 | # CONFIG_PARPORT_PC_SUPERIO is not set | 370 | # CONFIG_PARPORT_PC_SUPERIO is not set |
354 | # CONFIG_PARPORT_GSC is not set | 371 | # CONFIG_PARPORT_GSC is not set |
372 | # CONFIG_PARPORT_AX88796 is not set | ||
355 | # CONFIG_PARPORT_1284 is not set | 373 | # CONFIG_PARPORT_1284 is not set |
356 | 374 | ||
357 | # | 375 | # |
@@ -376,6 +394,7 @@ CONFIG_BLK_DEV_NBD=m | |||
376 | CONFIG_BLK_DEV_RAM=y | 394 | CONFIG_BLK_DEV_RAM=y |
377 | CONFIG_BLK_DEV_RAM_COUNT=16 | 395 | CONFIG_BLK_DEV_RAM_COUNT=16 |
378 | CONFIG_BLK_DEV_RAM_SIZE=65536 | 396 | CONFIG_BLK_DEV_RAM_SIZE=65536 |
397 | CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 | ||
379 | CONFIG_BLK_DEV_INITRD=y | 398 | CONFIG_BLK_DEV_INITRD=y |
380 | # CONFIG_CDROM_PKTCDVD is not set | 399 | # CONFIG_CDROM_PKTCDVD is not set |
381 | # CONFIG_ATA_OVER_ETH is not set | 400 | # CONFIG_ATA_OVER_ETH is not set |
@@ -487,6 +506,7 @@ CONFIG_SCSI_SAS_ATTRS=m | |||
487 | # CONFIG_MEGARAID_LEGACY is not set | 506 | # CONFIG_MEGARAID_LEGACY is not set |
488 | # CONFIG_MEGARAID_SAS is not set | 507 | # CONFIG_MEGARAID_SAS is not set |
489 | # CONFIG_SCSI_SATA is not set | 508 | # CONFIG_SCSI_SATA is not set |
509 | # CONFIG_SCSI_HPTIOP is not set | ||
490 | # CONFIG_SCSI_BUSLOGIC is not set | 510 | # CONFIG_SCSI_BUSLOGIC is not set |
491 | # CONFIG_SCSI_DMX3191D is not set | 511 | # CONFIG_SCSI_DMX3191D is not set |
492 | # CONFIG_SCSI_EATA is not set | 512 | # CONFIG_SCSI_EATA is not set |
@@ -508,12 +528,6 @@ CONFIG_SCSI_IPR_TRACE=y | |||
508 | CONFIG_SCSI_IPR_DUMP=y | 528 | CONFIG_SCSI_IPR_DUMP=y |
509 | # CONFIG_SCSI_QLOGIC_1280 is not set | 529 | # CONFIG_SCSI_QLOGIC_1280 is not set |
510 | CONFIG_SCSI_QLA_FC=m | 530 | CONFIG_SCSI_QLA_FC=m |
511 | CONFIG_SCSI_QLA2XXX_EMBEDDED_FIRMWARE=y | ||
512 | CONFIG_SCSI_QLA21XX=m | ||
513 | CONFIG_SCSI_QLA22XX=m | ||
514 | CONFIG_SCSI_QLA2300=m | ||
515 | CONFIG_SCSI_QLA2322=m | ||
516 | CONFIG_SCSI_QLA24XX=m | ||
517 | CONFIG_SCSI_LPFC=m | 531 | CONFIG_SCSI_LPFC=m |
518 | # CONFIG_SCSI_DC395x is not set | 532 | # CONFIG_SCSI_DC395x is not set |
519 | # CONFIG_SCSI_DC390T is not set | 533 | # CONFIG_SCSI_DC390T is not set |
@@ -528,9 +542,7 @@ CONFIG_MD_LINEAR=y | |||
528 | CONFIG_MD_RAID0=y | 542 | CONFIG_MD_RAID0=y |
529 | CONFIG_MD_RAID1=y | 543 | CONFIG_MD_RAID1=y |
530 | CONFIG_MD_RAID10=m | 544 | CONFIG_MD_RAID10=m |
531 | CONFIG_MD_RAID5=y | 545 | # CONFIG_MD_RAID456 is not set |
532 | CONFIG_MD_RAID5_RESHAPE=y | ||
533 | CONFIG_MD_RAID6=m | ||
534 | CONFIG_MD_MULTIPATH=m | 546 | CONFIG_MD_MULTIPATH=m |
535 | CONFIG_MD_FAULTY=m | 547 | CONFIG_MD_FAULTY=m |
536 | CONFIG_BLK_DEV_DM=y | 548 | CONFIG_BLK_DEV_DM=y |
@@ -651,6 +663,7 @@ CONFIG_IXGB=m | |||
651 | # CONFIG_IXGB_NAPI is not set | 663 | # CONFIG_IXGB_NAPI is not set |
652 | CONFIG_S2IO=m | 664 | CONFIG_S2IO=m |
653 | # CONFIG_S2IO_NAPI is not set | 665 | # CONFIG_S2IO_NAPI is not set |
666 | # CONFIG_MYRI10GE is not set | ||
654 | 667 | ||
655 | # | 668 | # |
656 | # Token Ring devices | 669 | # Token Ring devices |
@@ -754,6 +767,7 @@ CONFIG_SERIO_LIBPS2=y | |||
754 | CONFIG_VT=y | 767 | CONFIG_VT=y |
755 | CONFIG_VT_CONSOLE=y | 768 | CONFIG_VT_CONSOLE=y |
756 | CONFIG_HW_CONSOLE=y | 769 | CONFIG_HW_CONSOLE=y |
770 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
757 | # CONFIG_SERIAL_NONSTANDARD is not set | 771 | # CONFIG_SERIAL_NONSTANDARD is not set |
758 | 772 | ||
759 | # | 773 | # |
@@ -776,6 +790,7 @@ CONFIG_SERIAL_JSM=m | |||
776 | CONFIG_UNIX98_PTYS=y | 790 | CONFIG_UNIX98_PTYS=y |
777 | CONFIG_LEGACY_PTYS=y | 791 | CONFIG_LEGACY_PTYS=y |
778 | CONFIG_LEGACY_PTY_COUNT=256 | 792 | CONFIG_LEGACY_PTY_COUNT=256 |
793 | # CONFIG_BRIQ_PANEL is not set | ||
779 | # CONFIG_PRINTER is not set | 794 | # CONFIG_PRINTER is not set |
780 | # CONFIG_PPDEV is not set | 795 | # CONFIG_PPDEV is not set |
781 | # CONFIG_TIPAR is not set | 796 | # CONFIG_TIPAR is not set |
@@ -793,6 +808,7 @@ CONFIG_HVCS=m | |||
793 | # Watchdog Cards | 808 | # Watchdog Cards |
794 | # | 809 | # |
795 | # CONFIG_WATCHDOG is not set | 810 | # CONFIG_WATCHDOG is not set |
811 | # CONFIG_HW_RANDOM is not set | ||
796 | CONFIG_GEN_RTC=y | 812 | CONFIG_GEN_RTC=y |
797 | # CONFIG_GEN_RTC_X is not set | 813 | # CONFIG_GEN_RTC_X is not set |
798 | # CONFIG_DTLK is not set | 814 | # CONFIG_DTLK is not set |
@@ -839,6 +855,7 @@ CONFIG_I2C_ALGOBIT=y | |||
839 | # CONFIG_I2C_I810 is not set | 855 | # CONFIG_I2C_I810 is not set |
840 | # CONFIG_I2C_PIIX4 is not set | 856 | # CONFIG_I2C_PIIX4 is not set |
841 | # CONFIG_I2C_NFORCE2 is not set | 857 | # CONFIG_I2C_NFORCE2 is not set |
858 | # CONFIG_I2C_OCORES is not set | ||
842 | # CONFIG_I2C_PARPORT is not set | 859 | # CONFIG_I2C_PARPORT is not set |
843 | # CONFIG_I2C_PARPORT_LIGHT is not set | 860 | # CONFIG_I2C_PARPORT_LIGHT is not set |
844 | # CONFIG_I2C_PROSAVAGE is not set | 861 | # CONFIG_I2C_PROSAVAGE is not set |
@@ -876,7 +893,6 @@ CONFIG_I2C_ALGOBIT=y | |||
876 | # | 893 | # |
877 | # Dallas's 1-wire bus | 894 | # Dallas's 1-wire bus |
878 | # | 895 | # |
879 | # CONFIG_W1 is not set | ||
880 | 896 | ||
881 | # | 897 | # |
882 | # Hardware Monitoring support | 898 | # Hardware Monitoring support |
@@ -892,6 +908,7 @@ CONFIG_I2C_ALGOBIT=y | |||
892 | # Multimedia devices | 908 | # Multimedia devices |
893 | # | 909 | # |
894 | # CONFIG_VIDEO_DEV is not set | 910 | # CONFIG_VIDEO_DEV is not set |
911 | CONFIG_VIDEO_V4L2=y | ||
895 | 912 | ||
896 | # | 913 | # |
897 | # Digital Video Broadcasting Devices | 914 | # Digital Video Broadcasting Devices |
@@ -902,19 +919,19 @@ CONFIG_I2C_ALGOBIT=y | |||
902 | # | 919 | # |
903 | # Graphics support | 920 | # Graphics support |
904 | # | 921 | # |
922 | CONFIG_FIRMWARE_EDID=y | ||
905 | CONFIG_FB=y | 923 | CONFIG_FB=y |
906 | CONFIG_FB_CFB_FILLRECT=y | 924 | CONFIG_FB_CFB_FILLRECT=y |
907 | CONFIG_FB_CFB_COPYAREA=y | 925 | CONFIG_FB_CFB_COPYAREA=y |
908 | CONFIG_FB_CFB_IMAGEBLIT=y | 926 | CONFIG_FB_CFB_IMAGEBLIT=y |
909 | CONFIG_FB_MACMODES=y | 927 | CONFIG_FB_MACMODES=y |
910 | CONFIG_FB_FIRMWARE_EDID=y | 928 | # CONFIG_FB_BACKLIGHT is not set |
911 | CONFIG_FB_MODE_HELPERS=y | 929 | CONFIG_FB_MODE_HELPERS=y |
912 | CONFIG_FB_TILEBLITTING=y | 930 | CONFIG_FB_TILEBLITTING=y |
913 | # CONFIG_FB_CIRRUS is not set | 931 | # CONFIG_FB_CIRRUS is not set |
914 | # CONFIG_FB_PM2 is not set | 932 | # CONFIG_FB_PM2 is not set |
915 | # CONFIG_FB_CYBER2000 is not set | 933 | # CONFIG_FB_CYBER2000 is not set |
916 | CONFIG_FB_OF=y | 934 | CONFIG_FB_OF=y |
917 | # CONFIG_FB_CT65550 is not set | ||
918 | # CONFIG_FB_ASILIANT is not set | 935 | # CONFIG_FB_ASILIANT is not set |
919 | # CONFIG_FB_IMSTT is not set | 936 | # CONFIG_FB_IMSTT is not set |
920 | # CONFIG_FB_VGA16 is not set | 937 | # CONFIG_FB_VGA16 is not set |
@@ -993,6 +1010,7 @@ CONFIG_USB_DEVICEFS=y | |||
993 | CONFIG_USB_EHCI_HCD=y | 1010 | CONFIG_USB_EHCI_HCD=y |
994 | # CONFIG_USB_EHCI_SPLIT_ISO is not set | 1011 | # CONFIG_USB_EHCI_SPLIT_ISO is not set |
995 | # CONFIG_USB_EHCI_ROOT_HUB_TT is not set | 1012 | # CONFIG_USB_EHCI_ROOT_HUB_TT is not set |
1013 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set | ||
996 | # CONFIG_USB_ISP116X_HCD is not set | 1014 | # CONFIG_USB_ISP116X_HCD is not set |
997 | CONFIG_USB_OHCI_HCD=y | 1015 | CONFIG_USB_OHCI_HCD=y |
998 | # CONFIG_USB_OHCI_BIG_ENDIAN is not set | 1016 | # CONFIG_USB_OHCI_BIG_ENDIAN is not set |
@@ -1083,10 +1101,12 @@ CONFIG_USB_MON=y | |||
1083 | # CONFIG_USB_LEGOTOWER is not set | 1101 | # CONFIG_USB_LEGOTOWER is not set |
1084 | # CONFIG_USB_LCD is not set | 1102 | # CONFIG_USB_LCD is not set |
1085 | # CONFIG_USB_LED is not set | 1103 | # CONFIG_USB_LED is not set |
1104 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
1086 | # CONFIG_USB_CYTHERM is not set | 1105 | # CONFIG_USB_CYTHERM is not set |
1087 | # CONFIG_USB_PHIDGETKIT is not set | 1106 | # CONFIG_USB_PHIDGETKIT is not set |
1088 | # CONFIG_USB_PHIDGETSERVO is not set | 1107 | # CONFIG_USB_PHIDGETSERVO is not set |
1089 | # CONFIG_USB_IDMOUSE is not set | 1108 | # CONFIG_USB_IDMOUSE is not set |
1109 | # CONFIG_USB_APPLEDISPLAY is not set | ||
1090 | # CONFIG_USB_SISUSBVGA is not set | 1110 | # CONFIG_USB_SISUSBVGA is not set |
1091 | # CONFIG_USB_LD is not set | 1111 | # CONFIG_USB_LD is not set |
1092 | # CONFIG_USB_TEST is not set | 1112 | # CONFIG_USB_TEST is not set |
@@ -1124,12 +1144,14 @@ CONFIG_USB_MON=y | |||
1124 | CONFIG_INFINIBAND=m | 1144 | CONFIG_INFINIBAND=m |
1125 | CONFIG_INFINIBAND_USER_MAD=m | 1145 | CONFIG_INFINIBAND_USER_MAD=m |
1126 | CONFIG_INFINIBAND_USER_ACCESS=m | 1146 | CONFIG_INFINIBAND_USER_ACCESS=m |
1147 | CONFIG_INFINIBAND_ADDR_TRANS=y | ||
1127 | CONFIG_INFINIBAND_MTHCA=m | 1148 | CONFIG_INFINIBAND_MTHCA=m |
1128 | CONFIG_INFINIBAND_MTHCA_DEBUG=y | 1149 | CONFIG_INFINIBAND_MTHCA_DEBUG=y |
1129 | CONFIG_INFINIBAND_IPOIB=m | 1150 | CONFIG_INFINIBAND_IPOIB=m |
1130 | CONFIG_INFINIBAND_IPOIB_DEBUG=y | 1151 | CONFIG_INFINIBAND_IPOIB_DEBUG=y |
1131 | # CONFIG_INFINIBAND_IPOIB_DEBUG_DATA is not set | 1152 | # CONFIG_INFINIBAND_IPOIB_DEBUG_DATA is not set |
1132 | CONFIG_INFINIBAND_SRP=m | 1153 | CONFIG_INFINIBAND_SRP=m |
1154 | # CONFIG_INFINIBAND_ISER is not set | ||
1133 | 1155 | ||
1134 | # | 1156 | # |
1135 | # EDAC - error detection and reporting (RAS) (EXPERIMENTAL) | 1157 | # EDAC - error detection and reporting (RAS) (EXPERIMENTAL) |
@@ -1141,6 +1163,19 @@ CONFIG_INFINIBAND_SRP=m | |||
1141 | # CONFIG_RTC_CLASS is not set | 1163 | # CONFIG_RTC_CLASS is not set |
1142 | 1164 | ||
1143 | # | 1165 | # |
1166 | # DMA Engine support | ||
1167 | # | ||
1168 | # CONFIG_DMA_ENGINE is not set | ||
1169 | |||
1170 | # | ||
1171 | # DMA Clients | ||
1172 | # | ||
1173 | |||
1174 | # | ||
1175 | # DMA Devices | ||
1176 | # | ||
1177 | |||
1178 | # | ||
1144 | # File systems | 1179 | # File systems |
1145 | # | 1180 | # |
1146 | CONFIG_EXT2_FS=y | 1181 | CONFIG_EXT2_FS=y |
@@ -1169,15 +1204,16 @@ CONFIG_JFS_SECURITY=y | |||
1169 | # CONFIG_JFS_STATISTICS is not set | 1204 | # CONFIG_JFS_STATISTICS is not set |
1170 | CONFIG_FS_POSIX_ACL=y | 1205 | CONFIG_FS_POSIX_ACL=y |
1171 | CONFIG_XFS_FS=m | 1206 | CONFIG_XFS_FS=m |
1172 | CONFIG_XFS_EXPORT=y | ||
1173 | # CONFIG_XFS_QUOTA is not set | 1207 | # CONFIG_XFS_QUOTA is not set |
1174 | CONFIG_XFS_SECURITY=y | 1208 | CONFIG_XFS_SECURITY=y |
1175 | CONFIG_XFS_POSIX_ACL=y | 1209 | CONFIG_XFS_POSIX_ACL=y |
1176 | # CONFIG_XFS_RT is not set | 1210 | # CONFIG_XFS_RT is not set |
1177 | CONFIG_OCFS2_FS=m | 1211 | CONFIG_OCFS2_FS=m |
1212 | CONFIG_OCFS2_DEBUG_MASKLOG=y | ||
1178 | # CONFIG_MINIX_FS is not set | 1213 | # CONFIG_MINIX_FS is not set |
1179 | # CONFIG_ROMFS_FS is not set | 1214 | # CONFIG_ROMFS_FS is not set |
1180 | CONFIG_INOTIFY=y | 1215 | CONFIG_INOTIFY=y |
1216 | CONFIG_INOTIFY_USER=y | ||
1181 | # CONFIG_QUOTA is not set | 1217 | # CONFIG_QUOTA is not set |
1182 | CONFIG_DNOTIFY=y | 1218 | CONFIG_DNOTIFY=y |
1183 | # CONFIG_AUTOFS_FS is not set | 1219 | # CONFIG_AUTOFS_FS is not set |
@@ -1259,8 +1295,10 @@ CONFIG_RPCSEC_GSS_SPKM3=m | |||
1259 | # CONFIG_SMB_FS is not set | 1295 | # CONFIG_SMB_FS is not set |
1260 | CONFIG_CIFS=m | 1296 | CONFIG_CIFS=m |
1261 | # CONFIG_CIFS_STATS is not set | 1297 | # CONFIG_CIFS_STATS is not set |
1298 | # CONFIG_CIFS_WEAK_PW_HASH is not set | ||
1262 | CONFIG_CIFS_XATTR=y | 1299 | CONFIG_CIFS_XATTR=y |
1263 | CONFIG_CIFS_POSIX=y | 1300 | CONFIG_CIFS_POSIX=y |
1301 | # CONFIG_CIFS_DEBUG2 is not set | ||
1264 | # CONFIG_CIFS_EXPERIMENTAL is not set | 1302 | # CONFIG_CIFS_EXPERIMENTAL is not set |
1265 | # CONFIG_NCP_FS is not set | 1303 | # CONFIG_NCP_FS is not set |
1266 | # CONFIG_CODA_FS is not set | 1304 | # CONFIG_CODA_FS is not set |
@@ -1326,6 +1364,9 @@ CONFIG_CRC32=y | |||
1326 | CONFIG_LIBCRC32C=m | 1364 | CONFIG_LIBCRC32C=m |
1327 | CONFIG_ZLIB_INFLATE=y | 1365 | CONFIG_ZLIB_INFLATE=y |
1328 | CONFIG_ZLIB_DEFLATE=m | 1366 | CONFIG_ZLIB_DEFLATE=m |
1367 | CONFIG_TEXTSEARCH=y | ||
1368 | CONFIG_TEXTSEARCH_KMP=m | ||
1369 | CONFIG_PLIST=y | ||
1329 | 1370 | ||
1330 | # | 1371 | # |
1331 | # Instrumentation Support | 1372 | # Instrumentation Support |
@@ -1339,14 +1380,19 @@ CONFIG_KPROBES=y | |||
1339 | # | 1380 | # |
1340 | # CONFIG_PRINTK_TIME is not set | 1381 | # CONFIG_PRINTK_TIME is not set |
1341 | CONFIG_MAGIC_SYSRQ=y | 1382 | CONFIG_MAGIC_SYSRQ=y |
1383 | # CONFIG_UNUSED_SYMBOLS is not set | ||
1342 | CONFIG_DEBUG_KERNEL=y | 1384 | CONFIG_DEBUG_KERNEL=y |
1343 | CONFIG_LOG_BUF_SHIFT=17 | 1385 | CONFIG_LOG_BUF_SHIFT=17 |
1344 | CONFIG_DETECT_SOFTLOCKUP=y | 1386 | CONFIG_DETECT_SOFTLOCKUP=y |
1345 | # CONFIG_SCHEDSTATS is not set | 1387 | # CONFIG_SCHEDSTATS is not set |
1346 | # CONFIG_DEBUG_SLAB is not set | 1388 | # CONFIG_DEBUG_SLAB is not set |
1347 | # CONFIG_DEBUG_MUTEXES is not set | 1389 | # CONFIG_DEBUG_RT_MUTEXES is not set |
1390 | # CONFIG_RT_MUTEX_TESTER is not set | ||
1348 | # CONFIG_DEBUG_SPINLOCK is not set | 1391 | # CONFIG_DEBUG_SPINLOCK is not set |
1392 | # CONFIG_DEBUG_MUTEXES is not set | ||
1393 | # CONFIG_DEBUG_RWSEMS is not set | ||
1349 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | 1394 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set |
1395 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
1350 | # CONFIG_DEBUG_KOBJECT is not set | 1396 | # CONFIG_DEBUG_KOBJECT is not set |
1351 | # CONFIG_DEBUG_INFO is not set | 1397 | # CONFIG_DEBUG_INFO is not set |
1352 | CONFIG_DEBUG_FS=y | 1398 | CONFIG_DEBUG_FS=y |
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile index 814f242aeb8c..956c2e5564b7 100644 --- a/arch/powerpc/kernel/Makefile +++ b/arch/powerpc/kernel/Makefile | |||
@@ -67,9 +67,9 @@ pci64-$(CONFIG_PPC64) += pci_64.o pci_dn.o pci_iommu.o \ | |||
67 | pci_direct_iommu.o iomap.o | 67 | pci_direct_iommu.o iomap.o |
68 | pci32-$(CONFIG_PPC32) := pci_32.o | 68 | pci32-$(CONFIG_PPC32) := pci_32.o |
69 | obj-$(CONFIG_PCI) += $(pci64-y) $(pci32-y) | 69 | obj-$(CONFIG_PCI) += $(pci64-y) $(pci32-y) |
70 | kexec-$(CONFIG_PPC64) := machine_kexec_64.o crash.o | 70 | kexec-$(CONFIG_PPC64) := machine_kexec_64.o |
71 | kexec-$(CONFIG_PPC32) := machine_kexec_32.o | 71 | kexec-$(CONFIG_PPC32) := machine_kexec_32.o |
72 | obj-$(CONFIG_KEXEC) += machine_kexec.o $(kexec-y) | 72 | obj-$(CONFIG_KEXEC) += machine_kexec.o crash.o $(kexec-y) |
73 | 73 | ||
74 | ifeq ($(CONFIG_PPC_ISERIES),y) | 74 | ifeq ($(CONFIG_PPC_ISERIES),y) |
75 | $(obj)/head_64.o: $(obj)/lparmap.s | 75 | $(obj)/head_64.o: $(obj)/lparmap.s |
diff --git a/arch/powerpc/kernel/cpu_setup_power4.S b/arch/powerpc/kernel/cpu_setup_power4.S index f69af2c5d7b3..76e97aa71c45 100644 --- a/arch/powerpc/kernel/cpu_setup_power4.S +++ b/arch/powerpc/kernel/cpu_setup_power4.S | |||
@@ -76,6 +76,8 @@ _GLOBAL(__setup_cpu_ppc970) | |||
76 | mfspr r0,SPRN_HID0 | 76 | mfspr r0,SPRN_HID0 |
77 | li r11,5 /* clear DOZE and SLEEP */ | 77 | li r11,5 /* clear DOZE and SLEEP */ |
78 | rldimi r0,r11,52,8 /* set NAP and DPM */ | 78 | rldimi r0,r11,52,8 /* set NAP and DPM */ |
79 | li r11,0 | ||
80 | rldimi r0,r11,32,31 /* clear EN_ATTN */ | ||
79 | mtspr SPRN_HID0,r0 | 81 | mtspr SPRN_HID0,r0 |
80 | mfspr r0,SPRN_HID0 | 82 | mfspr r0,SPRN_HID0 |
81 | mfspr r0,SPRN_HID0 | 83 | mfspr r0,SPRN_HID0 |
diff --git a/arch/powerpc/kernel/crash.c b/arch/powerpc/kernel/crash.c index 358cecdc6aef..f04c18e08b8b 100644 --- a/arch/powerpc/kernel/crash.c +++ b/arch/powerpc/kernel/crash.c | |||
@@ -44,6 +44,7 @@ | |||
44 | /* This keeps a track of which one is crashing cpu. */ | 44 | /* This keeps a track of which one is crashing cpu. */ |
45 | int crashing_cpu = -1; | 45 | int crashing_cpu = -1; |
46 | static cpumask_t cpus_in_crash = CPU_MASK_NONE; | 46 | static cpumask_t cpus_in_crash = CPU_MASK_NONE; |
47 | cpumask_t cpus_in_sr = CPU_MASK_NONE; | ||
47 | 48 | ||
48 | static u32 *append_elf_note(u32 *buf, char *name, unsigned type, void *data, | 49 | static u32 *append_elf_note(u32 *buf, char *name, unsigned type, void *data, |
49 | size_t data_len) | 50 | size_t data_len) |
@@ -139,7 +140,13 @@ void crash_ipi_callback(struct pt_regs *regs) | |||
139 | 140 | ||
140 | if (ppc_md.kexec_cpu_down) | 141 | if (ppc_md.kexec_cpu_down) |
141 | ppc_md.kexec_cpu_down(1, 1); | 142 | ppc_md.kexec_cpu_down(1, 1); |
143 | |||
144 | #ifdef CONFIG_PPC64 | ||
142 | kexec_smp_wait(); | 145 | kexec_smp_wait(); |
146 | #else | ||
147 | for (;;); /* FIXME */ | ||
148 | #endif | ||
149 | |||
143 | /* NOTREACHED */ | 150 | /* NOTREACHED */ |
144 | } | 151 | } |
145 | 152 | ||
@@ -255,7 +262,11 @@ static void crash_kexec_prepare_cpus(int cpu) | |||
255 | * | 262 | * |
256 | * do this if kexec in setup.c ? | 263 | * do this if kexec in setup.c ? |
257 | */ | 264 | */ |
265 | #ifdef CONFIG_PPC64 | ||
258 | smp_release_cpus(); | 266 | smp_release_cpus(); |
267 | #else | ||
268 | /* FIXME */ | ||
269 | #endif | ||
259 | } | 270 | } |
260 | 271 | ||
261 | void crash_kexec_secondary(struct pt_regs *regs) | 272 | void crash_kexec_secondary(struct pt_regs *regs) |
diff --git a/arch/powerpc/kernel/fpu.S b/arch/powerpc/kernel/fpu.S index 7e2c9fe44ac1..821e152e093c 100644 --- a/arch/powerpc/kernel/fpu.S +++ b/arch/powerpc/kernel/fpu.S | |||
@@ -2,6 +2,11 @@ | |||
2 | * FPU support code, moved here from head.S so that it can be used | 2 | * FPU support code, moved here from head.S so that it can be used |
3 | * by chips which use other head-whatever.S files. | 3 | * by chips which use other head-whatever.S files. |
4 | * | 4 | * |
5 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | ||
6 | * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu> | ||
7 | * Copyright (C) 1996 Paul Mackerras. | ||
8 | * Copyright (C) 1997 Dan Malek (dmalek@jlc.net). | ||
9 | * | ||
5 | * This program is free software; you can redistribute it and/or | 10 | * This program is free software; you can redistribute it and/or |
6 | * modify it under the terms of the GNU General Public License | 11 | * modify it under the terms of the GNU General Public License |
7 | * as published by the Free Software Foundation; either version | 12 | * as published by the Free Software Foundation; either version |
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S index e16eb2a33173..6ff3cf506088 100644 --- a/arch/powerpc/kernel/head_64.S +++ b/arch/powerpc/kernel/head_64.S | |||
@@ -191,6 +191,37 @@ exception_marker: | |||
191 | ori reg,reg,(label)@l; /* virt addr of handler ... */ | 191 | ori reg,reg,(label)@l; /* virt addr of handler ... */ |
192 | #endif | 192 | #endif |
193 | 193 | ||
194 | /* | ||
195 | * Equal to EXCEPTION_PROLOG_PSERIES, except that it forces 64bit mode. | ||
196 | * The firmware calls the registered system_reset_fwnmi and | ||
197 | * machine_check_fwnmi handlers in 32bit mode if the cpu happens to run | ||
198 | * a 32bit application at the time of the event. | ||
199 | * This firmware bug is present on POWER4 and JS20. | ||
200 | */ | ||
201 | #define EXCEPTION_PROLOG_PSERIES_FORCE_64BIT(area, label) \ | ||
202 | mfspr r13,SPRN_SPRG3; /* get paca address into r13 */ \ | ||
203 | std r9,area+EX_R9(r13); /* save r9 - r12 */ \ | ||
204 | std r10,area+EX_R10(r13); \ | ||
205 | std r11,area+EX_R11(r13); \ | ||
206 | std r12,area+EX_R12(r13); \ | ||
207 | mfspr r9,SPRN_SPRG1; \ | ||
208 | std r9,area+EX_R13(r13); \ | ||
209 | mfcr r9; \ | ||
210 | clrrdi r12,r13,32; /* get high part of &label */ \ | ||
211 | mfmsr r10; \ | ||
212 | /* force 64bit mode */ \ | ||
213 | li r11,5; /* MSR_SF_LG|MSR_ISF_LG */ \ | ||
214 | rldimi r10,r11,61,0; /* insert into top 3 bits */ \ | ||
215 | /* done 64bit mode */ \ | ||
216 | mfspr r11,SPRN_SRR0; /* save SRR0 */ \ | ||
217 | LOAD_HANDLER(r12,label) \ | ||
218 | ori r10,r10,MSR_IR|MSR_DR|MSR_RI; \ | ||
219 | mtspr SPRN_SRR0,r12; \ | ||
220 | mfspr r12,SPRN_SRR1; /* and SRR1 */ \ | ||
221 | mtspr SPRN_SRR1,r10; \ | ||
222 | rfid; \ | ||
223 | b . /* prevent speculative execution */ | ||
224 | |||
194 | #define EXCEPTION_PROLOG_PSERIES(area, label) \ | 225 | #define EXCEPTION_PROLOG_PSERIES(area, label) \ |
195 | mfspr r13,SPRN_SPRG3; /* get paca address into r13 */ \ | 226 | mfspr r13,SPRN_SPRG3; /* get paca address into r13 */ \ |
196 | std r9,area+EX_R9(r13); /* save r9 - r12 */ \ | 227 | std r9,area+EX_R9(r13); /* save r9 - r12 */ \ |
@@ -604,14 +635,14 @@ slb_miss_user_pseries: | |||
604 | system_reset_fwnmi: | 635 | system_reset_fwnmi: |
605 | HMT_MEDIUM | 636 | HMT_MEDIUM |
606 | mtspr SPRN_SPRG1,r13 /* save r13 */ | 637 | mtspr SPRN_SPRG1,r13 /* save r13 */ |
607 | EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common) | 638 | EXCEPTION_PROLOG_PSERIES_FORCE_64BIT(PACA_EXGEN, system_reset_common) |
608 | 639 | ||
609 | .globl machine_check_fwnmi | 640 | .globl machine_check_fwnmi |
610 | .align 7 | 641 | .align 7 |
611 | machine_check_fwnmi: | 642 | machine_check_fwnmi: |
612 | HMT_MEDIUM | 643 | HMT_MEDIUM |
613 | mtspr SPRN_SPRG1,r13 /* save r13 */ | 644 | mtspr SPRN_SPRG1,r13 /* save r13 */ |
614 | EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common) | 645 | EXCEPTION_PROLOG_PSERIES_FORCE_64BIT(PACA_EXMC, machine_check_common) |
615 | 646 | ||
616 | #ifdef CONFIG_PPC_ISERIES | 647 | #ifdef CONFIG_PPC_ISERIES |
617 | /*** ISeries-LPAR interrupt handlers ***/ | 648 | /*** ISeries-LPAR interrupt handlers ***/ |
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c index 01bdae35cb55..12c5971d6565 100644 --- a/arch/powerpc/kernel/irq.c +++ b/arch/powerpc/kernel/irq.c | |||
@@ -322,7 +322,8 @@ EXPORT_SYMBOL(do_softirq); | |||
322 | 322 | ||
323 | static LIST_HEAD(irq_hosts); | 323 | static LIST_HEAD(irq_hosts); |
324 | static spinlock_t irq_big_lock = SPIN_LOCK_UNLOCKED; | 324 | static spinlock_t irq_big_lock = SPIN_LOCK_UNLOCKED; |
325 | 325 | static DEFINE_PER_CPU(unsigned int, irq_radix_reader); | |
326 | static unsigned int irq_radix_writer; | ||
326 | struct irq_map_entry irq_map[NR_IRQS]; | 327 | struct irq_map_entry irq_map[NR_IRQS]; |
327 | static unsigned int irq_virq_count = NR_IRQS; | 328 | static unsigned int irq_virq_count = NR_IRQS; |
328 | static struct irq_host *irq_default_host; | 329 | static struct irq_host *irq_default_host; |
@@ -455,6 +456,58 @@ void irq_set_virq_count(unsigned int count) | |||
455 | irq_virq_count = count; | 456 | irq_virq_count = count; |
456 | } | 457 | } |
457 | 458 | ||
459 | /* radix tree not lockless safe ! we use a brlock-type mecanism | ||
460 | * for now, until we can use a lockless radix tree | ||
461 | */ | ||
462 | static void irq_radix_wrlock(unsigned long *flags) | ||
463 | { | ||
464 | unsigned int cpu, ok; | ||
465 | |||
466 | spin_lock_irqsave(&irq_big_lock, *flags); | ||
467 | irq_radix_writer = 1; | ||
468 | smp_mb(); | ||
469 | do { | ||
470 | barrier(); | ||
471 | ok = 1; | ||
472 | for_each_possible_cpu(cpu) { | ||
473 | if (per_cpu(irq_radix_reader, cpu)) { | ||
474 | ok = 0; | ||
475 | break; | ||
476 | } | ||
477 | } | ||
478 | if (!ok) | ||
479 | cpu_relax(); | ||
480 | } while(!ok); | ||
481 | } | ||
482 | |||
483 | static void irq_radix_wrunlock(unsigned long flags) | ||
484 | { | ||
485 | smp_wmb(); | ||
486 | irq_radix_writer = 0; | ||
487 | spin_unlock_irqrestore(&irq_big_lock, flags); | ||
488 | } | ||
489 | |||
490 | static void irq_radix_rdlock(unsigned long *flags) | ||
491 | { | ||
492 | local_irq_save(*flags); | ||
493 | __get_cpu_var(irq_radix_reader) = 1; | ||
494 | smp_mb(); | ||
495 | if (likely(irq_radix_writer == 0)) | ||
496 | return; | ||
497 | __get_cpu_var(irq_radix_reader) = 0; | ||
498 | smp_wmb(); | ||
499 | spin_lock(&irq_big_lock); | ||
500 | __get_cpu_var(irq_radix_reader) = 1; | ||
501 | spin_unlock(&irq_big_lock); | ||
502 | } | ||
503 | |||
504 | static void irq_radix_rdunlock(unsigned long flags) | ||
505 | { | ||
506 | __get_cpu_var(irq_radix_reader) = 0; | ||
507 | local_irq_restore(flags); | ||
508 | } | ||
509 | |||
510 | |||
458 | unsigned int irq_create_mapping(struct irq_host *host, | 511 | unsigned int irq_create_mapping(struct irq_host *host, |
459 | irq_hw_number_t hwirq) | 512 | irq_hw_number_t hwirq) |
460 | { | 513 | { |
@@ -604,13 +657,9 @@ void irq_dispose_mapping(unsigned int virq) | |||
604 | /* Check if radix tree allocated yet */ | 657 | /* Check if radix tree allocated yet */ |
605 | if (host->revmap_data.tree.gfp_mask == 0) | 658 | if (host->revmap_data.tree.gfp_mask == 0) |
606 | break; | 659 | break; |
607 | /* XXX radix tree not safe ! remove lock whem it becomes safe | 660 | irq_radix_wrlock(&flags); |
608 | * and use some RCU sync to make sure everything is ok before we | ||
609 | * can re-use that map entry | ||
610 | */ | ||
611 | spin_lock_irqsave(&irq_big_lock, flags); | ||
612 | radix_tree_delete(&host->revmap_data.tree, hwirq); | 661 | radix_tree_delete(&host->revmap_data.tree, hwirq); |
613 | spin_unlock_irqrestore(&irq_big_lock, flags); | 662 | irq_radix_wrunlock(flags); |
614 | break; | 663 | break; |
615 | } | 664 | } |
616 | 665 | ||
@@ -677,25 +726,24 @@ unsigned int irq_radix_revmap(struct irq_host *host, | |||
677 | if (tree->gfp_mask == 0) | 726 | if (tree->gfp_mask == 0) |
678 | return irq_find_mapping(host, hwirq); | 727 | return irq_find_mapping(host, hwirq); |
679 | 728 | ||
680 | /* XXX Current radix trees are NOT SMP safe !!! Remove that lock | ||
681 | * when that is fixed (when Nick's patch gets in | ||
682 | */ | ||
683 | spin_lock_irqsave(&irq_big_lock, flags); | ||
684 | |||
685 | /* Now try to resolve */ | 729 | /* Now try to resolve */ |
730 | irq_radix_rdlock(&flags); | ||
686 | ptr = radix_tree_lookup(tree, hwirq); | 731 | ptr = radix_tree_lookup(tree, hwirq); |
732 | irq_radix_rdunlock(flags); | ||
733 | |||
687 | /* Found it, return */ | 734 | /* Found it, return */ |
688 | if (ptr) { | 735 | if (ptr) { |
689 | virq = ptr - irq_map; | 736 | virq = ptr - irq_map; |
690 | goto bail; | 737 | return virq; |
691 | } | 738 | } |
692 | 739 | ||
693 | /* If not there, try to insert it */ | 740 | /* If not there, try to insert it */ |
694 | virq = irq_find_mapping(host, hwirq); | 741 | virq = irq_find_mapping(host, hwirq); |
695 | if (virq != NO_IRQ) | 742 | if (virq != NO_IRQ) { |
696 | radix_tree_insert(tree, virq, &irq_map[virq]); | 743 | irq_radix_wrlock(&flags); |
697 | bail: | 744 | radix_tree_insert(tree, hwirq, &irq_map[virq]); |
698 | spin_unlock_irqrestore(&irq_big_lock, flags); | 745 | irq_radix_wrunlock(flags); |
746 | } | ||
699 | return virq; | 747 | return virq; |
700 | } | 748 | } |
701 | 749 | ||
@@ -806,12 +854,12 @@ static int irq_late_init(void) | |||
806 | struct irq_host *h; | 854 | struct irq_host *h; |
807 | unsigned long flags; | 855 | unsigned long flags; |
808 | 856 | ||
809 | spin_lock_irqsave(&irq_big_lock, flags); | 857 | irq_radix_wrlock(&flags); |
810 | list_for_each_entry(h, &irq_hosts, link) { | 858 | list_for_each_entry(h, &irq_hosts, link) { |
811 | if (h->revmap_type == IRQ_HOST_MAP_TREE) | 859 | if (h->revmap_type == IRQ_HOST_MAP_TREE) |
812 | INIT_RADIX_TREE(&h->revmap_data.tree, GFP_ATOMIC); | 860 | INIT_RADIX_TREE(&h->revmap_data.tree, GFP_ATOMIC); |
813 | } | 861 | } |
814 | spin_unlock_irqrestore(&irq_big_lock, flags); | 862 | irq_radix_wrunlock(flags); |
815 | 863 | ||
816 | return 0; | 864 | return 0; |
817 | } | 865 | } |
diff --git a/arch/powerpc/kernel/kprobes.c b/arch/powerpc/kernel/kprobes.c index 9f0898c89759..cd65c367b8b6 100644 --- a/arch/powerpc/kernel/kprobes.c +++ b/arch/powerpc/kernel/kprobes.c | |||
@@ -61,6 +61,8 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p) | |||
61 | if (!ret) { | 61 | if (!ret) { |
62 | memcpy(p->ainsn.insn, p->addr, MAX_INSN_SIZE * sizeof(kprobe_opcode_t)); | 62 | memcpy(p->ainsn.insn, p->addr, MAX_INSN_SIZE * sizeof(kprobe_opcode_t)); |
63 | p->opcode = *p->addr; | 63 | p->opcode = *p->addr; |
64 | flush_icache_range((unsigned long)p->ainsn.insn, | ||
65 | (unsigned long)p->ainsn.insn + sizeof(kprobe_opcode_t)); | ||
64 | } | 66 | } |
65 | 67 | ||
66 | return ret; | 68 | return ret; |
diff --git a/arch/powerpc/kernel/legacy_serial.c b/arch/powerpc/kernel/legacy_serial.c index 7e98e778b52f..40a39291861f 100644 --- a/arch/powerpc/kernel/legacy_serial.c +++ b/arch/powerpc/kernel/legacy_serial.c | |||
@@ -112,9 +112,10 @@ static int __init add_legacy_port(struct device_node *np, int want_index, | |||
112 | static int __init add_legacy_soc_port(struct device_node *np, | 112 | static int __init add_legacy_soc_port(struct device_node *np, |
113 | struct device_node *soc_dev) | 113 | struct device_node *soc_dev) |
114 | { | 114 | { |
115 | phys_addr_t addr; | 115 | u64 addr; |
116 | u32 *addrp; | 116 | u32 *addrp; |
117 | upf_t flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_SHARE_IRQ; | 117 | upf_t flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_SHARE_IRQ; |
118 | struct device_node *tsi = of_get_parent(np); | ||
118 | 119 | ||
119 | /* We only support ports that have a clock frequency properly | 120 | /* We only support ports that have a clock frequency properly |
120 | * encoded in the device-tree. | 121 | * encoded in the device-tree. |
@@ -134,7 +135,10 @@ static int __init add_legacy_soc_port(struct device_node *np, | |||
134 | /* Add port, irq will be dealt with later. We passed a translated | 135 | /* Add port, irq will be dealt with later. We passed a translated |
135 | * IO port value. It will be fixed up later along with the irq | 136 | * IO port value. It will be fixed up later along with the irq |
136 | */ | 137 | */ |
137 | return add_legacy_port(np, -1, UPIO_MEM, addr, addr, NO_IRQ, flags, 0); | 138 | if (tsi && !strcmp(tsi->type, "tsi-bridge")) |
139 | return add_legacy_port(np, -1, UPIO_TSI, addr, addr, NO_IRQ, flags, 0); | ||
140 | else | ||
141 | return add_legacy_port(np, -1, UPIO_MEM, addr, addr, NO_IRQ, flags, 0); | ||
138 | } | 142 | } |
139 | 143 | ||
140 | static int __init add_legacy_isa_port(struct device_node *np, | 144 | static int __init add_legacy_isa_port(struct device_node *np, |
@@ -143,7 +147,7 @@ static int __init add_legacy_isa_port(struct device_node *np, | |||
143 | u32 *reg; | 147 | u32 *reg; |
144 | char *typep; | 148 | char *typep; |
145 | int index = -1; | 149 | int index = -1; |
146 | phys_addr_t taddr; | 150 | u64 taddr; |
147 | 151 | ||
148 | DBG(" -> add_legacy_isa_port(%s)\n", np->full_name); | 152 | DBG(" -> add_legacy_isa_port(%s)\n", np->full_name); |
149 | 153 | ||
@@ -165,10 +169,13 @@ static int __init add_legacy_isa_port(struct device_node *np, | |||
165 | if (typep && *typep == 'S') | 169 | if (typep && *typep == 'S') |
166 | index = simple_strtol(typep+1, NULL, 0) - 1; | 170 | index = simple_strtol(typep+1, NULL, 0) - 1; |
167 | 171 | ||
168 | /* Translate ISA address */ | 172 | /* Translate ISA address. If it fails, we still register the port |
173 | * with no translated address so that it can be picked up as an IO | ||
174 | * port later by the serial driver | ||
175 | */ | ||
169 | taddr = of_translate_address(np, reg); | 176 | taddr = of_translate_address(np, reg); |
170 | if (taddr == OF_BAD_ADDR) | 177 | if (taddr == OF_BAD_ADDR) |
171 | return -1; | 178 | taddr = 0; |
172 | 179 | ||
173 | /* Add port, irq will be dealt with later */ | 180 | /* Add port, irq will be dealt with later */ |
174 | return add_legacy_port(np, index, UPIO_PORT, reg[1], taddr, | 181 | return add_legacy_port(np, index, UPIO_PORT, reg[1], taddr, |
@@ -180,7 +187,7 @@ static int __init add_legacy_isa_port(struct device_node *np, | |||
180 | static int __init add_legacy_pci_port(struct device_node *np, | 187 | static int __init add_legacy_pci_port(struct device_node *np, |
181 | struct device_node *pci_dev) | 188 | struct device_node *pci_dev) |
182 | { | 189 | { |
183 | phys_addr_t addr, base; | 190 | u64 addr, base; |
184 | u32 *addrp; | 191 | u32 *addrp; |
185 | unsigned int flags; | 192 | unsigned int flags; |
186 | int iotype, index = -1, lindex = 0; | 193 | int iotype, index = -1, lindex = 0; |
@@ -461,7 +468,7 @@ static int __init serial_dev_init(void) | |||
461 | fixup_port_irq(i, np, port); | 468 | fixup_port_irq(i, np, port); |
462 | if (port->iotype == UPIO_PORT) | 469 | if (port->iotype == UPIO_PORT) |
463 | fixup_port_pio(i, np, port); | 470 | fixup_port_pio(i, np, port); |
464 | if (port->iotype == UPIO_MEM) | 471 | if ((port->iotype == UPIO_MEM) || (port->iotype == UPIO_TSI)) |
465 | fixup_port_mmio(i, np, port); | 472 | fixup_port_mmio(i, np, port); |
466 | } | 473 | } |
467 | 474 | ||
diff --git a/arch/powerpc/kernel/machine_kexec.c b/arch/powerpc/kernel/machine_kexec.c index a81ca1b841ec..e60a0c544d63 100644 --- a/arch/powerpc/kernel/machine_kexec.c +++ b/arch/powerpc/kernel/machine_kexec.c | |||
@@ -13,6 +13,7 @@ | |||
13 | #include <linux/reboot.h> | 13 | #include <linux/reboot.h> |
14 | #include <linux/threads.h> | 14 | #include <linux/threads.h> |
15 | #include <asm/machdep.h> | 15 | #include <asm/machdep.h> |
16 | #include <asm/lmb.h> | ||
16 | 17 | ||
17 | void machine_crash_shutdown(struct pt_regs *regs) | 18 | void machine_crash_shutdown(struct pt_regs *regs) |
18 | { | 19 | { |
@@ -59,3 +60,58 @@ NORET_TYPE void machine_kexec(struct kimage *image) | |||
59 | } | 60 | } |
60 | for(;;); | 61 | for(;;); |
61 | } | 62 | } |
63 | |||
64 | static int __init early_parse_crashk(char *p) | ||
65 | { | ||
66 | unsigned long size; | ||
67 | |||
68 | if (!p) | ||
69 | return 1; | ||
70 | |||
71 | size = memparse(p, &p); | ||
72 | |||
73 | if (*p == '@') | ||
74 | crashk_res.start = memparse(p + 1, &p); | ||
75 | else | ||
76 | crashk_res.start = KDUMP_KERNELBASE; | ||
77 | |||
78 | crashk_res.end = crashk_res.start + size - 1; | ||
79 | |||
80 | return 0; | ||
81 | } | ||
82 | early_param("crashkernel", early_parse_crashk); | ||
83 | |||
84 | void __init reserve_crashkernel(void) | ||
85 | { | ||
86 | unsigned long size; | ||
87 | |||
88 | if (crashk_res.start == 0) | ||
89 | return; | ||
90 | |||
91 | /* We might have got these values via the command line or the | ||
92 | * device tree, either way sanitise them now. */ | ||
93 | |||
94 | size = crashk_res.end - crashk_res.start + 1; | ||
95 | |||
96 | if (crashk_res.start != KDUMP_KERNELBASE) | ||
97 | printk("Crash kernel location must be 0x%x\n", | ||
98 | KDUMP_KERNELBASE); | ||
99 | |||
100 | crashk_res.start = KDUMP_KERNELBASE; | ||
101 | size = PAGE_ALIGN(size); | ||
102 | crashk_res.end = crashk_res.start + size - 1; | ||
103 | |||
104 | /* Crash kernel trumps memory limit */ | ||
105 | if (memory_limit && memory_limit <= crashk_res.end) { | ||
106 | memory_limit = crashk_res.end + 1; | ||
107 | printk("Adjusted memory limit for crashkernel, now 0x%lx\n", | ||
108 | memory_limit); | ||
109 | } | ||
110 | |||
111 | lmb_reserve(crashk_res.start, size); | ||
112 | } | ||
113 | |||
114 | int overlaps_crashkernel(unsigned long start, unsigned long size) | ||
115 | { | ||
116 | return (start + size) > crashk_res.start && start <= crashk_res.end; | ||
117 | } | ||
diff --git a/arch/powerpc/kernel/machine_kexec_64.c b/arch/powerpc/kernel/machine_kexec_64.c index b438d45a068c..be58985c7681 100644 --- a/arch/powerpc/kernel/machine_kexec_64.c +++ b/arch/powerpc/kernel/machine_kexec_64.c | |||
@@ -10,7 +10,6 @@ | |||
10 | */ | 10 | */ |
11 | 11 | ||
12 | 12 | ||
13 | #include <linux/cpumask.h> | ||
14 | #include <linux/kexec.h> | 13 | #include <linux/kexec.h> |
15 | #include <linux/smp.h> | 14 | #include <linux/smp.h> |
16 | #include <linux/thread_info.h> | 15 | #include <linux/thread_info.h> |
@@ -21,7 +20,6 @@ | |||
21 | #include <asm/machdep.h> | 20 | #include <asm/machdep.h> |
22 | #include <asm/cacheflush.h> | 21 | #include <asm/cacheflush.h> |
23 | #include <asm/paca.h> | 22 | #include <asm/paca.h> |
24 | #include <asm/lmb.h> | ||
25 | #include <asm/mmu.h> | 23 | #include <asm/mmu.h> |
26 | #include <asm/sections.h> /* _end */ | 24 | #include <asm/sections.h> /* _end */ |
27 | #include <asm/prom.h> | 25 | #include <asm/prom.h> |
@@ -385,58 +383,3 @@ static int __init kexec_setup(void) | |||
385 | return 0; | 383 | return 0; |
386 | } | 384 | } |
387 | __initcall(kexec_setup); | 385 | __initcall(kexec_setup); |
388 | |||
389 | static int __init early_parse_crashk(char *p) | ||
390 | { | ||
391 | unsigned long size; | ||
392 | |||
393 | if (!p) | ||
394 | return 1; | ||
395 | |||
396 | size = memparse(p, &p); | ||
397 | |||
398 | if (*p == '@') | ||
399 | crashk_res.start = memparse(p + 1, &p); | ||
400 | else | ||
401 | crashk_res.start = KDUMP_KERNELBASE; | ||
402 | |||
403 | crashk_res.end = crashk_res.start + size - 1; | ||
404 | |||
405 | return 0; | ||
406 | } | ||
407 | early_param("crashkernel", early_parse_crashk); | ||
408 | |||
409 | void __init reserve_crashkernel(void) | ||
410 | { | ||
411 | unsigned long size; | ||
412 | |||
413 | if (crashk_res.start == 0) | ||
414 | return; | ||
415 | |||
416 | /* We might have got these values via the command line or the | ||
417 | * device tree, either way sanitise them now. */ | ||
418 | |||
419 | size = crashk_res.end - crashk_res.start + 1; | ||
420 | |||
421 | if (crashk_res.start != KDUMP_KERNELBASE) | ||
422 | printk("Crash kernel location must be 0x%x\n", | ||
423 | KDUMP_KERNELBASE); | ||
424 | |||
425 | crashk_res.start = KDUMP_KERNELBASE; | ||
426 | size = PAGE_ALIGN(size); | ||
427 | crashk_res.end = crashk_res.start + size - 1; | ||
428 | |||
429 | /* Crash kernel trumps memory limit */ | ||
430 | if (memory_limit && memory_limit <= crashk_res.end) { | ||
431 | memory_limit = crashk_res.end + 1; | ||
432 | printk("Adjusted memory limit for crashkernel, now 0x%lx\n", | ||
433 | memory_limit); | ||
434 | } | ||
435 | |||
436 | lmb_reserve(crashk_res.start, size); | ||
437 | } | ||
438 | |||
439 | int overlaps_crashkernel(unsigned long start, unsigned long size) | ||
440 | { | ||
441 | return (start + size) > crashk_res.start && start <= crashk_res.end; | ||
442 | } | ||
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S index bfb407fc1aa1..e3ed21cd3d94 100644 --- a/arch/powerpc/kernel/misc_64.S +++ b/arch/powerpc/kernel/misc_64.S | |||
@@ -687,7 +687,7 @@ _GLOBAL(kexec_sequence) | |||
687 | /* clear out hardware hash page table and tlb */ | 687 | /* clear out hardware hash page table and tlb */ |
688 | ld r5,0(r27) /* deref function descriptor */ | 688 | ld r5,0(r27) /* deref function descriptor */ |
689 | mtctr r5 | 689 | mtctr r5 |
690 | bctrl /* ppc_md.hash_clear_all(void); */ | 690 | bctrl /* ppc_md.hpte_clear_all(void); */ |
691 | 691 | ||
692 | /* | 692 | /* |
693 | * kexec image calling is: | 693 | * kexec image calling is: |
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c index 2fce7738e9e2..138134c8c17d 100644 --- a/arch/powerpc/kernel/pci_64.c +++ b/arch/powerpc/kernel/pci_64.c | |||
@@ -1289,6 +1289,9 @@ int pci_read_irq_line(struct pci_dev *pci_dev) | |||
1289 | 1289 | ||
1290 | DBG("Try to map irq for %s...\n", pci_name(pci_dev)); | 1290 | DBG("Try to map irq for %s...\n", pci_name(pci_dev)); |
1291 | 1291 | ||
1292 | #ifdef DEBUG | ||
1293 | memset(&oirq, 0xff, sizeof(oirq)); | ||
1294 | #endif | ||
1292 | /* Try to get a mapping from the device-tree */ | 1295 | /* Try to get a mapping from the device-tree */ |
1293 | if (of_irq_map_pci(pci_dev, &oirq)) { | 1296 | if (of_irq_map_pci(pci_dev, &oirq)) { |
1294 | u8 line, pin; | 1297 | u8 line, pin; |
@@ -1314,8 +1317,9 @@ int pci_read_irq_line(struct pci_dev *pci_dev) | |||
1314 | if (virq != NO_IRQ) | 1317 | if (virq != NO_IRQ) |
1315 | set_irq_type(virq, IRQ_TYPE_LEVEL_LOW); | 1318 | set_irq_type(virq, IRQ_TYPE_LEVEL_LOW); |
1316 | } else { | 1319 | } else { |
1317 | DBG(" -> got one, spec %d cells (0x%08x...) on %s\n", | 1320 | DBG(" -> got one, spec %d cells (0x%08x 0x%08x...) on %s\n", |
1318 | oirq.size, oirq.specifier[0], oirq.controller->full_name); | 1321 | oirq.size, oirq.specifier[0], oirq.specifier[1], |
1322 | oirq.controller->full_name); | ||
1319 | 1323 | ||
1320 | virq = irq_create_of_mapping(oirq.controller, oirq.specifier, | 1324 | virq = irq_create_of_mapping(oirq.controller, oirq.specifier, |
1321 | oirq.size); | 1325 | oirq.size); |
@@ -1324,6 +1328,9 @@ int pci_read_irq_line(struct pci_dev *pci_dev) | |||
1324 | DBG(" -> failed to map !\n"); | 1328 | DBG(" -> failed to map !\n"); |
1325 | return -1; | 1329 | return -1; |
1326 | } | 1330 | } |
1331 | |||
1332 | DBG(" -> mapped to linux irq %d\n", virq); | ||
1333 | |||
1327 | pci_dev->irq = virq; | 1334 | pci_dev->irq = virq; |
1328 | pci_write_config_byte(pci_dev, PCI_INTERRUPT_LINE, virq); | 1335 | pci_write_config_byte(pci_dev, PCI_INTERRUPT_LINE, virq); |
1329 | 1336 | ||
diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c index f6a05f090b25..39d3bfcabcd2 100644 --- a/arch/powerpc/kernel/ppc_ksyms.c +++ b/arch/powerpc/kernel/ppc_ksyms.c | |||
@@ -126,10 +126,6 @@ EXPORT_SYMBOL(pci_bus_mem_base_phys); | |||
126 | EXPORT_SYMBOL(pci_bus_to_hose); | 126 | EXPORT_SYMBOL(pci_bus_to_hose); |
127 | #endif /* CONFIG_PCI */ | 127 | #endif /* CONFIG_PCI */ |
128 | 128 | ||
129 | #ifdef CONFIG_NOT_COHERENT_CACHE | ||
130 | EXPORT_SYMBOL(flush_dcache_all); | ||
131 | #endif | ||
132 | |||
133 | EXPORT_SYMBOL(start_thread); | 129 | EXPORT_SYMBOL(start_thread); |
134 | EXPORT_SYMBOL(kernel_thread); | 130 | EXPORT_SYMBOL(kernel_thread); |
135 | 131 | ||
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c index ebd501a59abd..4394e545f9f7 100644 --- a/arch/powerpc/kernel/prom_init.c +++ b/arch/powerpc/kernel/prom_init.c | |||
@@ -557,7 +557,9 @@ unsigned long prom_memparse(const char *ptr, const char **retptr) | |||
557 | static void __init early_cmdline_parse(void) | 557 | static void __init early_cmdline_parse(void) |
558 | { | 558 | { |
559 | struct prom_t *_prom = &RELOC(prom); | 559 | struct prom_t *_prom = &RELOC(prom); |
560 | #ifdef CONFIG_PPC64 | ||
560 | const char *opt; | 561 | const char *opt; |
562 | #endif | ||
561 | char *p; | 563 | char *p; |
562 | int l = 0; | 564 | int l = 0; |
563 | 565 | ||
@@ -644,13 +646,13 @@ static unsigned char ibm_architecture_vec[] = { | |||
644 | 5 - 1, /* 5 option vectors */ | 646 | 5 - 1, /* 5 option vectors */ |
645 | 647 | ||
646 | /* option vector 1: processor architectures supported */ | 648 | /* option vector 1: processor architectures supported */ |
647 | 3 - 1, /* length */ | 649 | 3 - 2, /* length */ |
648 | 0, /* don't ignore, don't halt */ | 650 | 0, /* don't ignore, don't halt */ |
649 | OV1_PPC_2_00 | OV1_PPC_2_01 | OV1_PPC_2_02 | OV1_PPC_2_03 | | 651 | OV1_PPC_2_00 | OV1_PPC_2_01 | OV1_PPC_2_02 | OV1_PPC_2_03 | |
650 | OV1_PPC_2_04 | OV1_PPC_2_05, | 652 | OV1_PPC_2_04 | OV1_PPC_2_05, |
651 | 653 | ||
652 | /* option vector 2: Open Firmware options supported */ | 654 | /* option vector 2: Open Firmware options supported */ |
653 | 34 - 1, /* length */ | 655 | 34 - 2, /* length */ |
654 | OV2_REAL_MODE, | 656 | OV2_REAL_MODE, |
655 | 0, 0, | 657 | 0, 0, |
656 | W(0xffffffff), /* real_base */ | 658 | W(0xffffffff), /* real_base */ |
@@ -664,16 +666,16 @@ static unsigned char ibm_architecture_vec[] = { | |||
664 | 48, /* max log_2(hash table size) */ | 666 | 48, /* max log_2(hash table size) */ |
665 | 667 | ||
666 | /* option vector 3: processor options supported */ | 668 | /* option vector 3: processor options supported */ |
667 | 3 - 1, /* length */ | 669 | 3 - 2, /* length */ |
668 | 0, /* don't ignore, don't halt */ | 670 | 0, /* don't ignore, don't halt */ |
669 | OV3_FP | OV3_VMX, | 671 | OV3_FP | OV3_VMX, |
670 | 672 | ||
671 | /* option vector 4: IBM PAPR implementation */ | 673 | /* option vector 4: IBM PAPR implementation */ |
672 | 2 - 1, /* length */ | 674 | 2 - 2, /* length */ |
673 | 0, /* don't halt */ | 675 | 0, /* don't halt */ |
674 | 676 | ||
675 | /* option vector 5: PAPR/OF options */ | 677 | /* option vector 5: PAPR/OF options */ |
676 | 3 - 1, /* length */ | 678 | 3 - 2, /* length */ |
677 | 0, /* don't ignore, don't halt */ | 679 | 0, /* don't ignore, don't halt */ |
678 | OV5_LPAR | OV5_SPLPAR | OV5_LARGE_PAGES, | 680 | OV5_LPAR | OV5_SPLPAR | OV5_LARGE_PAGES, |
679 | }; | 681 | }; |
@@ -2030,6 +2032,39 @@ static void __init fixup_device_tree_maple(void) | |||
2030 | #define fixup_device_tree_maple() | 2032 | #define fixup_device_tree_maple() |
2031 | #endif | 2033 | #endif |
2032 | 2034 | ||
2035 | #ifdef CONFIG_PPC_CHRP | ||
2036 | /* Pegasos lacks the "ranges" property in the isa node */ | ||
2037 | static void __init fixup_device_tree_chrp(void) | ||
2038 | { | ||
2039 | phandle isa; | ||
2040 | u32 isa_ranges[6]; | ||
2041 | char *name; | ||
2042 | int rc; | ||
2043 | |||
2044 | name = "/pci@80000000/isa@c"; | ||
2045 | isa = call_prom("finddevice", 1, 1, ADDR(name)); | ||
2046 | if (!PHANDLE_VALID(isa)) | ||
2047 | return; | ||
2048 | |||
2049 | rc = prom_getproplen(isa, "ranges"); | ||
2050 | if (rc != 0 && rc != PROM_ERROR) | ||
2051 | return; | ||
2052 | |||
2053 | prom_printf("Fixing up missing ISA range on Pegasos...\n"); | ||
2054 | |||
2055 | isa_ranges[0] = 0x1; | ||
2056 | isa_ranges[1] = 0x0; | ||
2057 | isa_ranges[2] = 0x01006000; | ||
2058 | isa_ranges[3] = 0x0; | ||
2059 | isa_ranges[4] = 0x0; | ||
2060 | isa_ranges[5] = 0x00010000; | ||
2061 | prom_setprop(isa, name, "ranges", | ||
2062 | isa_ranges, sizeof(isa_ranges)); | ||
2063 | } | ||
2064 | #else | ||
2065 | #define fixup_device_tree_chrp() | ||
2066 | #endif | ||
2067 | |||
2033 | #if defined(CONFIG_PPC64) && defined(CONFIG_PPC_PMAC) | 2068 | #if defined(CONFIG_PPC64) && defined(CONFIG_PPC_PMAC) |
2034 | static void __init fixup_device_tree_pmac(void) | 2069 | static void __init fixup_device_tree_pmac(void) |
2035 | { | 2070 | { |
@@ -2077,6 +2112,7 @@ static void __init fixup_device_tree_pmac(void) | |||
2077 | static void __init fixup_device_tree(void) | 2112 | static void __init fixup_device_tree(void) |
2078 | { | 2113 | { |
2079 | fixup_device_tree_maple(); | 2114 | fixup_device_tree_maple(); |
2115 | fixup_device_tree_chrp(); | ||
2080 | fixup_device_tree_pmac(); | 2116 | fixup_device_tree_pmac(); |
2081 | } | 2117 | } |
2082 | 2118 | ||
diff --git a/arch/powerpc/kernel/prom_parse.c b/arch/powerpc/kernel/prom_parse.c index 6a7e997c401d..a10825a5dfe6 100644 --- a/arch/powerpc/kernel/prom_parse.c +++ b/arch/powerpc/kernel/prom_parse.c | |||
@@ -598,11 +598,6 @@ static struct device_node *of_irq_find_parent(struct device_node *child) | |||
598 | return p; | 598 | return p; |
599 | } | 599 | } |
600 | 600 | ||
601 | static u8 of_irq_pci_swizzle(u8 slot, u8 pin) | ||
602 | { | ||
603 | return (((pin - 1) + slot) % 4) + 1; | ||
604 | } | ||
605 | |||
606 | /* This doesn't need to be called if you don't have any special workaround | 601 | /* This doesn't need to be called if you don't have any special workaround |
607 | * flags to pass | 602 | * flags to pass |
608 | */ | 603 | */ |
@@ -644,14 +639,17 @@ void of_irq_map_init(unsigned int flags) | |||
644 | 639 | ||
645 | } | 640 | } |
646 | 641 | ||
647 | int of_irq_map_raw(struct device_node *parent, u32 *intspec, u32 *addr, | 642 | int of_irq_map_raw(struct device_node *parent, u32 *intspec, u32 ointsize, |
648 | struct of_irq *out_irq) | 643 | u32 *addr, struct of_irq *out_irq) |
649 | { | 644 | { |
650 | struct device_node *ipar, *tnode, *old = NULL, *newpar = NULL; | 645 | struct device_node *ipar, *tnode, *old = NULL, *newpar = NULL; |
651 | u32 *tmp, *imap, *imask; | 646 | u32 *tmp, *imap, *imask; |
652 | u32 intsize = 1, addrsize, newintsize = 0, newaddrsize = 0; | 647 | u32 intsize = 1, addrsize, newintsize = 0, newaddrsize = 0; |
653 | int imaplen, match, i; | 648 | int imaplen, match, i; |
654 | 649 | ||
650 | DBG("of_irq_map_raw: par=%s,intspec=[0x%08x 0x%08x...],ointsize=%d\n", | ||
651 | parent->full_name, intspec[0], intspec[1], ointsize); | ||
652 | |||
655 | ipar = of_node_get(parent); | 653 | ipar = of_node_get(parent); |
656 | 654 | ||
657 | /* First get the #interrupt-cells property of the current cursor | 655 | /* First get the #interrupt-cells property of the current cursor |
@@ -675,6 +673,9 @@ int of_irq_map_raw(struct device_node *parent, u32 *intspec, u32 *addr, | |||
675 | 673 | ||
676 | DBG("of_irq_map_raw: ipar=%s, size=%d\n", ipar->full_name, intsize); | 674 | DBG("of_irq_map_raw: ipar=%s, size=%d\n", ipar->full_name, intsize); |
677 | 675 | ||
676 | if (ointsize != intsize) | ||
677 | return -EINVAL; | ||
678 | |||
678 | /* Look for this #address-cells. We have to implement the old linux | 679 | /* Look for this #address-cells. We have to implement the old linux |
679 | * trick of looking for the parent here as some device-trees rely on it | 680 | * trick of looking for the parent here as some device-trees rely on it |
680 | */ | 681 | */ |
@@ -880,17 +881,26 @@ int of_irq_map_one(struct device_node *device, int index, struct of_irq *out_irq | |||
880 | } | 881 | } |
881 | intsize = *tmp; | 882 | intsize = *tmp; |
882 | 883 | ||
884 | DBG(" intsize=%d intlen=%d\n", intsize, intlen); | ||
885 | |||
883 | /* Check index */ | 886 | /* Check index */ |
884 | if ((index + 1) * intsize > intlen) | 887 | if ((index + 1) * intsize > intlen) |
885 | return -EINVAL; | 888 | return -EINVAL; |
886 | 889 | ||
887 | /* Get new specifier and map it */ | 890 | /* Get new specifier and map it */ |
888 | res = of_irq_map_raw(p, intspec + index * intsize, addr, out_irq); | 891 | res = of_irq_map_raw(p, intspec + index * intsize, intsize, |
892 | addr, out_irq); | ||
889 | of_node_put(p); | 893 | of_node_put(p); |
890 | return res; | 894 | return res; |
891 | } | 895 | } |
892 | EXPORT_SYMBOL_GPL(of_irq_map_one); | 896 | EXPORT_SYMBOL_GPL(of_irq_map_one); |
893 | 897 | ||
898 | #ifdef CONFIG_PCI | ||
899 | static u8 of_irq_pci_swizzle(u8 slot, u8 pin) | ||
900 | { | ||
901 | return (((pin - 1) + slot) % 4) + 1; | ||
902 | } | ||
903 | |||
894 | int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq) | 904 | int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq) |
895 | { | 905 | { |
896 | struct device_node *dn, *ppnode; | 906 | struct device_node *dn, *ppnode; |
@@ -964,7 +974,7 @@ int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq) | |||
964 | laddr[0] = (pdev->bus->number << 16) | 974 | laddr[0] = (pdev->bus->number << 16) |
965 | | (pdev->devfn << 8); | 975 | | (pdev->devfn << 8); |
966 | laddr[1] = laddr[2] = 0; | 976 | laddr[1] = laddr[2] = 0; |
967 | return of_irq_map_raw(ppnode, &lspec, laddr, out_irq); | 977 | return of_irq_map_raw(ppnode, &lspec, 1, laddr, out_irq); |
968 | } | 978 | } |
969 | EXPORT_SYMBOL_GPL(of_irq_map_pci); | 979 | EXPORT_SYMBOL_GPL(of_irq_map_pci); |
970 | 980 | #endif /* CONFIG_PCI */ | |
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c index 4a4cb5598402..77f1e06d208d 100644 --- a/arch/powerpc/kernel/rtas.c +++ b/arch/powerpc/kernel/rtas.c | |||
@@ -569,6 +569,27 @@ int rtas_set_indicator(int indicator, int index, int new_value) | |||
569 | } | 569 | } |
570 | EXPORT_SYMBOL(rtas_set_indicator); | 570 | EXPORT_SYMBOL(rtas_set_indicator); |
571 | 571 | ||
572 | /* | ||
573 | * Ignoring RTAS extended delay | ||
574 | */ | ||
575 | int rtas_set_indicator_fast(int indicator, int index, int new_value) | ||
576 | { | ||
577 | int rc; | ||
578 | int token = rtas_token("set-indicator"); | ||
579 | |||
580 | if (token == RTAS_UNKNOWN_SERVICE) | ||
581 | return -ENOENT; | ||
582 | |||
583 | rc = rtas_call(token, 3, 1, NULL, indicator, index, new_value); | ||
584 | |||
585 | WARN_ON(rc == -2 || (rc >= 9900 && rc <= 9905)); | ||
586 | |||
587 | if (rc < 0) | ||
588 | return rtas_error_rc(rc); | ||
589 | |||
590 | return rc; | ||
591 | } | ||
592 | |||
572 | void rtas_restart(char *cmd) | 593 | void rtas_restart(char *cmd) |
573 | { | 594 | { |
574 | if (rtas_flash_term_hook) | 595 | if (rtas_flash_term_hook) |
diff --git a/arch/powerpc/kernel/smp-tbsync.c b/arch/powerpc/kernel/smp-tbsync.c index f19e2e0e61e7..de59c6c31a5b 100644 --- a/arch/powerpc/kernel/smp-tbsync.c +++ b/arch/powerpc/kernel/smp-tbsync.c | |||
@@ -45,8 +45,9 @@ void __devinit smp_generic_take_timebase(void) | |||
45 | { | 45 | { |
46 | int cmd; | 46 | int cmd; |
47 | u64 tb; | 47 | u64 tb; |
48 | unsigned long flags; | ||
48 | 49 | ||
49 | local_irq_disable(); | 50 | local_irq_save(flags); |
50 | while (!running) | 51 | while (!running) |
51 | barrier(); | 52 | barrier(); |
52 | rmb(); | 53 | rmb(); |
@@ -70,7 +71,7 @@ void __devinit smp_generic_take_timebase(void) | |||
70 | set_tb(tb >> 32, tb & 0xfffffffful); | 71 | set_tb(tb >> 32, tb & 0xfffffffful); |
71 | enter_contest(tbsync->mark, -1); | 72 | enter_contest(tbsync->mark, -1); |
72 | } | 73 | } |
73 | local_irq_enable(); | 74 | local_irq_restore(flags); |
74 | } | 75 | } |
75 | 76 | ||
76 | static int __devinit start_contest(int cmd, long offset, int num) | 77 | static int __devinit start_contest(int cmd, long offset, int num) |
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c index 46c56cfd1b2f..6a9bc9ce54e0 100644 --- a/arch/powerpc/kernel/smp.c +++ b/arch/powerpc/kernel/smp.c | |||
@@ -144,13 +144,15 @@ void smp_message_recv(int msg, struct pt_regs *regs) | |||
144 | 144 | ||
145 | void smp_send_reschedule(int cpu) | 145 | void smp_send_reschedule(int cpu) |
146 | { | 146 | { |
147 | smp_ops->message_pass(cpu, PPC_MSG_RESCHEDULE); | 147 | if (likely(smp_ops)) |
148 | smp_ops->message_pass(cpu, PPC_MSG_RESCHEDULE); | ||
148 | } | 149 | } |
149 | 150 | ||
150 | #ifdef CONFIG_DEBUGGER | 151 | #ifdef CONFIG_DEBUGGER |
151 | void smp_send_debugger_break(int cpu) | 152 | void smp_send_debugger_break(int cpu) |
152 | { | 153 | { |
153 | smp_ops->message_pass(cpu, PPC_MSG_DEBUGGER_BREAK); | 154 | if (likely(smp_ops)) |
155 | smp_ops->message_pass(cpu, PPC_MSG_DEBUGGER_BREAK); | ||
154 | } | 156 | } |
155 | #endif | 157 | #endif |
156 | 158 | ||
@@ -158,7 +160,7 @@ void smp_send_debugger_break(int cpu) | |||
158 | void crash_send_ipi(void (*crash_ipi_callback)(struct pt_regs *)) | 160 | void crash_send_ipi(void (*crash_ipi_callback)(struct pt_regs *)) |
159 | { | 161 | { |
160 | crash_ipi_function_ptr = crash_ipi_callback; | 162 | crash_ipi_function_ptr = crash_ipi_callback; |
161 | if (crash_ipi_callback) { | 163 | if (crash_ipi_callback && smp_ops) { |
162 | mb(); | 164 | mb(); |
163 | smp_ops->message_pass(MSG_ALL_BUT_SELF, PPC_MSG_DEBUGGER_BREAK); | 165 | smp_ops->message_pass(MSG_ALL_BUT_SELF, PPC_MSG_DEBUGGER_BREAK); |
164 | } | 166 | } |
@@ -220,6 +222,9 @@ int smp_call_function (void (*func) (void *info), void *info, int nonatomic, | |||
220 | /* Can deadlock when called with interrupts disabled */ | 222 | /* Can deadlock when called with interrupts disabled */ |
221 | WARN_ON(irqs_disabled()); | 223 | WARN_ON(irqs_disabled()); |
222 | 224 | ||
225 | if (unlikely(smp_ops == NULL)) | ||
226 | return -1; | ||
227 | |||
223 | data.func = func; | 228 | data.func = func; |
224 | data.info = info; | 229 | data.info = info; |
225 | atomic_set(&data.started, 0); | 230 | atomic_set(&data.started, 0); |
@@ -357,7 +362,10 @@ void __init smp_prepare_cpus(unsigned int max_cpus) | |||
357 | smp_store_cpu_info(boot_cpuid); | 362 | smp_store_cpu_info(boot_cpuid); |
358 | cpu_callin_map[boot_cpuid] = 1; | 363 | cpu_callin_map[boot_cpuid] = 1; |
359 | 364 | ||
360 | max_cpus = smp_ops->probe(); | 365 | if (smp_ops) |
366 | max_cpus = smp_ops->probe(); | ||
367 | else | ||
368 | max_cpus = 1; | ||
361 | 369 | ||
362 | smp_space_timers(max_cpus); | 370 | smp_space_timers(max_cpus); |
363 | 371 | ||
@@ -453,7 +461,7 @@ void generic_mach_cpu_die(void) | |||
453 | 461 | ||
454 | static int __devinit cpu_enable(unsigned int cpu) | 462 | static int __devinit cpu_enable(unsigned int cpu) |
455 | { | 463 | { |
456 | if (smp_ops->cpu_enable) | 464 | if (smp_ops && smp_ops->cpu_enable) |
457 | return smp_ops->cpu_enable(cpu); | 465 | return smp_ops->cpu_enable(cpu); |
458 | 466 | ||
459 | return -ENOSYS; | 467 | return -ENOSYS; |
@@ -467,7 +475,8 @@ int __devinit __cpu_up(unsigned int cpu) | |||
467 | if (!cpu_enable(cpu)) | 475 | if (!cpu_enable(cpu)) |
468 | return 0; | 476 | return 0; |
469 | 477 | ||
470 | if (smp_ops->cpu_bootable && !smp_ops->cpu_bootable(cpu)) | 478 | if (smp_ops == NULL || |
479 | (smp_ops->cpu_bootable && !smp_ops->cpu_bootable(cpu))) | ||
471 | return -EINVAL; | 480 | return -EINVAL; |
472 | 481 | ||
473 | /* Make sure callin-map entry is 0 (can be leftover a CPU | 482 | /* Make sure callin-map entry is 0 (can be leftover a CPU |
@@ -568,7 +577,8 @@ void __init smp_cpus_done(unsigned int max_cpus) | |||
568 | old_mask = current->cpus_allowed; | 577 | old_mask = current->cpus_allowed; |
569 | set_cpus_allowed(current, cpumask_of_cpu(boot_cpuid)); | 578 | set_cpus_allowed(current, cpumask_of_cpu(boot_cpuid)); |
570 | 579 | ||
571 | smp_ops->setup_cpu(boot_cpuid); | 580 | if (smp_ops) |
581 | smp_ops->setup_cpu(boot_cpuid); | ||
572 | 582 | ||
573 | set_cpus_allowed(current, old_mask); | 583 | set_cpus_allowed(current, old_mask); |
574 | 584 | ||
diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c index 010435095550..fec228cd0163 100644 --- a/arch/powerpc/kernel/sysfs.c +++ b/arch/powerpc/kernel/sysfs.c | |||
@@ -278,7 +278,7 @@ static void unregister_cpu_online(unsigned int cpu) | |||
278 | } | 278 | } |
279 | #endif /* CONFIG_HOTPLUG_CPU */ | 279 | #endif /* CONFIG_HOTPLUG_CPU */ |
280 | 280 | ||
281 | static int __devinit sysfs_cpu_notify(struct notifier_block *self, | 281 | static int __cpuinit sysfs_cpu_notify(struct notifier_block *self, |
282 | unsigned long action, void *hcpu) | 282 | unsigned long action, void *hcpu) |
283 | { | 283 | { |
284 | unsigned int cpu = (unsigned int)(long)hcpu; | 284 | unsigned int cpu = (unsigned int)(long)hcpu; |
@@ -296,7 +296,7 @@ static int __devinit sysfs_cpu_notify(struct notifier_block *self, | |||
296 | return NOTIFY_OK; | 296 | return NOTIFY_OK; |
297 | } | 297 | } |
298 | 298 | ||
299 | static struct notifier_block __devinitdata sysfs_cpu_nb = { | 299 | static struct notifier_block __cpuinitdata sysfs_cpu_nb = { |
300 | .notifier_call = sysfs_cpu_notify, | 300 | .notifier_call = sysfs_cpu_notify, |
301 | }; | 301 | }; |
302 | 302 | ||
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c index 774c0a3c5019..a124499e65d9 100644 --- a/arch/powerpc/kernel/time.c +++ b/arch/powerpc/kernel/time.c | |||
@@ -125,15 +125,8 @@ static long timezone_offset; | |||
125 | unsigned long ppc_proc_freq; | 125 | unsigned long ppc_proc_freq; |
126 | unsigned long ppc_tb_freq; | 126 | unsigned long ppc_tb_freq; |
127 | 127 | ||
128 | u64 tb_last_jiffy __cacheline_aligned_in_smp; | 128 | static u64 tb_last_jiffy __cacheline_aligned_in_smp; |
129 | unsigned long tb_last_stamp; | 129 | static DEFINE_PER_CPU(u64, last_jiffy); |
130 | |||
131 | /* | ||
132 | * Note that on ppc32 this only stores the bottom 32 bits of | ||
133 | * the timebase value, but that's enough to tell when a jiffy | ||
134 | * has passed. | ||
135 | */ | ||
136 | DEFINE_PER_CPU(unsigned long, last_jiffy); | ||
137 | 130 | ||
138 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING | 131 | #ifdef CONFIG_VIRT_CPU_ACCOUNTING |
139 | /* | 132 | /* |
@@ -417,7 +410,7 @@ static __inline__ void timer_check_rtc(void) | |||
417 | /* | 410 | /* |
418 | * This version of gettimeofday has microsecond resolution. | 411 | * This version of gettimeofday has microsecond resolution. |
419 | */ | 412 | */ |
420 | static inline void __do_gettimeofday(struct timeval *tv, u64 tb_val) | 413 | static inline void __do_gettimeofday(struct timeval *tv) |
421 | { | 414 | { |
422 | unsigned long sec, usec; | 415 | unsigned long sec, usec; |
423 | u64 tb_ticks, xsec; | 416 | u64 tb_ticks, xsec; |
@@ -431,7 +424,12 @@ static inline void __do_gettimeofday(struct timeval *tv, u64 tb_val) | |||
431 | * without a divide (and in fact, without a multiply) | 424 | * without a divide (and in fact, without a multiply) |
432 | */ | 425 | */ |
433 | temp_varp = do_gtod.varp; | 426 | temp_varp = do_gtod.varp; |
434 | tb_ticks = tb_val - temp_varp->tb_orig_stamp; | 427 | |
428 | /* Sampling the time base must be done after loading | ||
429 | * do_gtod.varp in order to avoid racing with update_gtod. | ||
430 | */ | ||
431 | data_barrier(temp_varp); | ||
432 | tb_ticks = get_tb() - temp_varp->tb_orig_stamp; | ||
435 | temp_tb_to_xs = temp_varp->tb_to_xs; | 433 | temp_tb_to_xs = temp_varp->tb_to_xs; |
436 | temp_stamp_xsec = temp_varp->stamp_xsec; | 434 | temp_stamp_xsec = temp_varp->stamp_xsec; |
437 | xsec = temp_stamp_xsec + mulhdu(tb_ticks, temp_tb_to_xs); | 435 | xsec = temp_stamp_xsec + mulhdu(tb_ticks, temp_tb_to_xs); |
@@ -453,7 +451,7 @@ void do_gettimeofday(struct timeval *tv) | |||
453 | do { | 451 | do { |
454 | seq = read_seqbegin_irqsave(&xtime_lock, flags); | 452 | seq = read_seqbegin_irqsave(&xtime_lock, flags); |
455 | sec = xtime.tv_sec; | 453 | sec = xtime.tv_sec; |
456 | nsec = xtime.tv_nsec + tb_ticks_since(tb_last_stamp); | 454 | nsec = xtime.tv_nsec + tb_ticks_since(tb_last_jiffy); |
457 | } while (read_seqretry_irqrestore(&xtime_lock, seq, flags)); | 455 | } while (read_seqretry_irqrestore(&xtime_lock, seq, flags)); |
458 | usec = nsec / 1000; | 456 | usec = nsec / 1000; |
459 | while (usec >= 1000000) { | 457 | while (usec >= 1000000) { |
@@ -464,7 +462,7 @@ void do_gettimeofday(struct timeval *tv) | |||
464 | tv->tv_usec = usec; | 462 | tv->tv_usec = usec; |
465 | return; | 463 | return; |
466 | } | 464 | } |
467 | __do_gettimeofday(tv, get_tb()); | 465 | __do_gettimeofday(tv); |
468 | } | 466 | } |
469 | 467 | ||
470 | EXPORT_SYMBOL(do_gettimeofday); | 468 | EXPORT_SYMBOL(do_gettimeofday); |
@@ -650,6 +648,7 @@ void timer_interrupt(struct pt_regs * regs) | |||
650 | int next_dec; | 648 | int next_dec; |
651 | int cpu = smp_processor_id(); | 649 | int cpu = smp_processor_id(); |
652 | unsigned long ticks; | 650 | unsigned long ticks; |
651 | u64 tb_next_jiffy; | ||
653 | 652 | ||
654 | #ifdef CONFIG_PPC32 | 653 | #ifdef CONFIG_PPC32 |
655 | if (atomic_read(&ppc_n_lost_interrupts) != 0) | 654 | if (atomic_read(&ppc_n_lost_interrupts) != 0) |
@@ -691,11 +690,13 @@ void timer_interrupt(struct pt_regs * regs) | |||
691 | continue; | 690 | continue; |
692 | 691 | ||
693 | write_seqlock(&xtime_lock); | 692 | write_seqlock(&xtime_lock); |
694 | tb_last_jiffy += tb_ticks_per_jiffy; | 693 | tb_next_jiffy = tb_last_jiffy + tb_ticks_per_jiffy; |
695 | tb_last_stamp = per_cpu(last_jiffy, cpu); | 694 | if (per_cpu(last_jiffy, cpu) >= tb_next_jiffy) { |
696 | do_timer(regs); | 695 | tb_last_jiffy = tb_next_jiffy; |
697 | timer_recalc_offset(tb_last_jiffy); | 696 | do_timer(regs); |
698 | timer_check_rtc(); | 697 | timer_recalc_offset(tb_last_jiffy); |
698 | timer_check_rtc(); | ||
699 | } | ||
699 | write_sequnlock(&xtime_lock); | 700 | write_sequnlock(&xtime_lock); |
700 | } | 701 | } |
701 | 702 | ||
@@ -740,7 +741,7 @@ void __init smp_space_timers(unsigned int max_cpus) | |||
740 | int i; | 741 | int i; |
741 | unsigned long half = tb_ticks_per_jiffy / 2; | 742 | unsigned long half = tb_ticks_per_jiffy / 2; |
742 | unsigned long offset = tb_ticks_per_jiffy / max_cpus; | 743 | unsigned long offset = tb_ticks_per_jiffy / max_cpus; |
743 | unsigned long previous_tb = per_cpu(last_jiffy, boot_cpuid); | 744 | u64 previous_tb = per_cpu(last_jiffy, boot_cpuid); |
744 | 745 | ||
745 | /* make sure tb > per_cpu(last_jiffy, cpu) for all cpus always */ | 746 | /* make sure tb > per_cpu(last_jiffy, cpu) for all cpus always */ |
746 | previous_tb -= tb_ticks_per_jiffy; | 747 | previous_tb -= tb_ticks_per_jiffy; |
@@ -821,7 +822,7 @@ int do_settimeofday(struct timespec *tv) | |||
821 | * and therefore the (jiffies - wall_jiffies) computation | 822 | * and therefore the (jiffies - wall_jiffies) computation |
822 | * has been removed. | 823 | * has been removed. |
823 | */ | 824 | */ |
824 | tb_delta = tb_ticks_since(tb_last_stamp); | 825 | tb_delta = tb_ticks_since(tb_last_jiffy); |
825 | tb_delta = mulhdu(tb_delta, do_gtod.varp->tb_to_xs); /* in xsec */ | 826 | tb_delta = mulhdu(tb_delta, do_gtod.varp->tb_to_xs); /* in xsec */ |
826 | new_nsec -= SCALE_XSEC(tb_delta, 1000000000); | 827 | new_nsec -= SCALE_XSEC(tb_delta, 1000000000); |
827 | 828 | ||
@@ -941,8 +942,7 @@ void __init time_init(void) | |||
941 | if (__USE_RTC()) { | 942 | if (__USE_RTC()) { |
942 | /* 601 processor: dec counts down by 128 every 128ns */ | 943 | /* 601 processor: dec counts down by 128 every 128ns */ |
943 | ppc_tb_freq = 1000000000; | 944 | ppc_tb_freq = 1000000000; |
944 | tb_last_stamp = get_rtcl(); | 945 | tb_last_jiffy = get_rtcl(); |
945 | tb_last_jiffy = tb_last_stamp; | ||
946 | } else { | 946 | } else { |
947 | /* Normal PowerPC with timebase register */ | 947 | /* Normal PowerPC with timebase register */ |
948 | ppc_md.calibrate_decr(); | 948 | ppc_md.calibrate_decr(); |
@@ -950,7 +950,7 @@ void __init time_init(void) | |||
950 | ppc_tb_freq / 1000000, ppc_tb_freq % 1000000); | 950 | ppc_tb_freq / 1000000, ppc_tb_freq % 1000000); |
951 | printk(KERN_DEBUG "time_init: processor frequency = %lu.%.6lu MHz\n", | 951 | printk(KERN_DEBUG "time_init: processor frequency = %lu.%.6lu MHz\n", |
952 | ppc_proc_freq / 1000000, ppc_proc_freq % 1000000); | 952 | ppc_proc_freq / 1000000, ppc_proc_freq % 1000000); |
953 | tb_last_stamp = tb_last_jiffy = get_tb(); | 953 | tb_last_jiffy = get_tb(); |
954 | } | 954 | } |
955 | 955 | ||
956 | tb_ticks_per_jiffy = ppc_tb_freq / HZ; | 956 | tb_ticks_per_jiffy = ppc_tb_freq / HZ; |
@@ -1027,7 +1027,7 @@ void __init time_init(void) | |||
1027 | do_gtod.varp = &do_gtod.vars[0]; | 1027 | do_gtod.varp = &do_gtod.vars[0]; |
1028 | do_gtod.var_idx = 0; | 1028 | do_gtod.var_idx = 0; |
1029 | do_gtod.varp->tb_orig_stamp = tb_last_jiffy; | 1029 | do_gtod.varp->tb_orig_stamp = tb_last_jiffy; |
1030 | __get_cpu_var(last_jiffy) = tb_last_stamp; | 1030 | __get_cpu_var(last_jiffy) = tb_last_jiffy; |
1031 | do_gtod.varp->stamp_xsec = (u64) xtime.tv_sec * XSEC_PER_SEC; | 1031 | do_gtod.varp->stamp_xsec = (u64) xtime.tv_sec * XSEC_PER_SEC; |
1032 | do_gtod.tb_ticks_per_sec = tb_ticks_per_sec; | 1032 | do_gtod.tb_ticks_per_sec = tb_ticks_per_sec; |
1033 | do_gtod.varp->tb_to_xs = tb_to_xs; | 1033 | do_gtod.varp->tb_to_xs = tb_to_xs; |
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c index 3c668078e524..9b352bd0a460 100644 --- a/arch/powerpc/kernel/traps.c +++ b/arch/powerpc/kernel/traps.c | |||
@@ -55,9 +55,6 @@ | |||
55 | 55 | ||
56 | #ifdef CONFIG_PPC64 /* XXX */ | 56 | #ifdef CONFIG_PPC64 /* XXX */ |
57 | #define _IO_BASE pci_io_base | 57 | #define _IO_BASE pci_io_base |
58 | #ifdef CONFIG_KEXEC | ||
59 | cpumask_t cpus_in_sr = CPU_MASK_NONE; | ||
60 | #endif | ||
61 | #endif | 58 | #endif |
62 | 59 | ||
63 | #ifdef CONFIG_DEBUGGER | 60 | #ifdef CONFIG_DEBUGGER |
@@ -150,13 +147,9 @@ int die(const char *str, struct pt_regs *regs, long err) | |||
150 | if (in_interrupt()) | 147 | if (in_interrupt()) |
151 | panic("Fatal exception in interrupt"); | 148 | panic("Fatal exception in interrupt"); |
152 | 149 | ||
153 | if (panic_on_oops) { | 150 | if (panic_on_oops) |
154 | #ifdef CONFIG_PPC64 | ||
155 | printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n"); | ||
156 | ssleep(5); | ||
157 | #endif | ||
158 | panic("Fatal exception"); | 151 | panic("Fatal exception"); |
159 | } | 152 | |
160 | do_exit(err); | 153 | do_exit(err); |
161 | 154 | ||
162 | return 0; | 155 | return 0; |
@@ -215,6 +208,19 @@ void system_reset_exception(struct pt_regs *regs) | |||
215 | 208 | ||
216 | die("System Reset", regs, SIGABRT); | 209 | die("System Reset", regs, SIGABRT); |
217 | 210 | ||
211 | /* | ||
212 | * Some CPUs when released from the debugger will execute this path. | ||
213 | * These CPUs entered the debugger via a soft-reset. If the CPU was | ||
214 | * hung before entering the debugger it will return to the hung | ||
215 | * state when exiting this function. This causes a problem in | ||
216 | * kdump since the hung CPU(s) will not respond to the IPI sent | ||
217 | * from kdump. To prevent the problem we call crash_kexec_secondary() | ||
218 | * here. If a kdump had not been initiated or we exit the debugger | ||
219 | * with the "exit and recover" command (x) crash_kexec_secondary() | ||
220 | * will return after 5ms and the CPU returns to its previous state. | ||
221 | */ | ||
222 | crash_kexec_secondary(regs); | ||
223 | |||
218 | /* Must die if the interrupt is not recoverable */ | 224 | /* Must die if the interrupt is not recoverable */ |
219 | if (!(regs->msr & MSR_RI)) | 225 | if (!(regs->msr & MSR_RI)) |
220 | panic("Unrecoverable System Reset"); | 226 | panic("Unrecoverable System Reset"); |
@@ -579,14 +585,14 @@ static void parse_fpe(struct pt_regs *regs) | |||
579 | #define INST_MFSPR_PVR_MASK 0xfc1fffff | 585 | #define INST_MFSPR_PVR_MASK 0xfc1fffff |
580 | 586 | ||
581 | #define INST_DCBA 0x7c0005ec | 587 | #define INST_DCBA 0x7c0005ec |
582 | #define INST_DCBA_MASK 0x7c0007fe | 588 | #define INST_DCBA_MASK 0xfc0007fe |
583 | 589 | ||
584 | #define INST_MCRXR 0x7c000400 | 590 | #define INST_MCRXR 0x7c000400 |
585 | #define INST_MCRXR_MASK 0x7c0007fe | 591 | #define INST_MCRXR_MASK 0xfc0007fe |
586 | 592 | ||
587 | #define INST_STRING 0x7c00042a | 593 | #define INST_STRING 0x7c00042a |
588 | #define INST_STRING_MASK 0x7c0007fe | 594 | #define INST_STRING_MASK 0xfc0007fe |
589 | #define INST_STRING_GEN_MASK 0x7c00067e | 595 | #define INST_STRING_GEN_MASK 0xfc00067e |
590 | #define INST_LSWI 0x7c0004aa | 596 | #define INST_LSWI 0x7c0004aa |
591 | #define INST_LSWX 0x7c00042a | 597 | #define INST_LSWX 0x7c00042a |
592 | #define INST_STSWI 0x7c0005aa | 598 | #define INST_STSWI 0x7c0005aa |
diff --git a/arch/powerpc/kernel/udbg_16550.c b/arch/powerpc/kernel/udbg_16550.c index 0835b4841dea..2d17f2b8eda7 100644 --- a/arch/powerpc/kernel/udbg_16550.c +++ b/arch/powerpc/kernel/udbg_16550.c | |||
@@ -81,10 +81,14 @@ static int udbg_550_getc(void) | |||
81 | void udbg_init_uart(void __iomem *comport, unsigned int speed, | 81 | void udbg_init_uart(void __iomem *comport, unsigned int speed, |
82 | unsigned int clock) | 82 | unsigned int clock) |
83 | { | 83 | { |
84 | unsigned int dll, base_bauds = clock / 16; | 84 | unsigned int dll, base_bauds; |
85 | 85 | ||
86 | if (clock == 0) | ||
87 | clock = 1843200; | ||
86 | if (speed == 0) | 88 | if (speed == 0) |
87 | speed = 9600; | 89 | speed = 9600; |
90 | |||
91 | base_bauds = clock / 16; | ||
88 | dll = base_bauds / speed; | 92 | dll = base_bauds / speed; |
89 | 93 | ||
90 | if (comport) { | 94 | if (comport) { |
diff --git a/arch/powerpc/kernel/vdso32/Makefile b/arch/powerpc/kernel/vdso32/Makefile index 8a3bed5f143a..3726358faae8 100644 --- a/arch/powerpc/kernel/vdso32/Makefile +++ b/arch/powerpc/kernel/vdso32/Makefile | |||
@@ -14,7 +14,8 @@ obj-vdso32 := $(addprefix $(obj)/, $(obj-vdso32)) | |||
14 | 14 | ||
15 | 15 | ||
16 | EXTRA_CFLAGS := -shared -s -fno-common -fno-builtin | 16 | EXTRA_CFLAGS := -shared -s -fno-common -fno-builtin |
17 | EXTRA_CFLAGS += -nostdlib -Wl,-soname=linux-vdso32.so.1 | 17 | EXTRA_CFLAGS += -nostdlib -Wl,-soname=linux-vdso32.so.1 \ |
18 | $(call ld-option, -Wl$(comma)--hash-style=sysv) | ||
18 | EXTRA_AFLAGS := -D__VDSO32__ -s | 19 | EXTRA_AFLAGS := -D__VDSO32__ -s |
19 | 20 | ||
20 | obj-y += vdso32_wrapper.o | 21 | obj-y += vdso32_wrapper.o |
diff --git a/arch/powerpc/kernel/vdso32/vdso32.lds.S b/arch/powerpc/kernel/vdso32/vdso32.lds.S index f4bad720cb0a..6187af2d54c3 100644 --- a/arch/powerpc/kernel/vdso32/vdso32.lds.S +++ b/arch/powerpc/kernel/vdso32/vdso32.lds.S | |||
@@ -14,6 +14,7 @@ SECTIONS | |||
14 | { | 14 | { |
15 | . = VDSO32_LBASE + SIZEOF_HEADERS; | 15 | . = VDSO32_LBASE + SIZEOF_HEADERS; |
16 | .hash : { *(.hash) } :text | 16 | .hash : { *(.hash) } :text |
17 | .gnu.hash : { *(.gnu.hash) } | ||
17 | .dynsym : { *(.dynsym) } | 18 | .dynsym : { *(.dynsym) } |
18 | .dynstr : { *(.dynstr) } | 19 | .dynstr : { *(.dynstr) } |
19 | .gnu.version : { *(.gnu.version) } | 20 | .gnu.version : { *(.gnu.version) } |
diff --git a/arch/powerpc/kernel/vdso64/Makefile b/arch/powerpc/kernel/vdso64/Makefile index ab39988452cc..43af9b2a6f3b 100644 --- a/arch/powerpc/kernel/vdso64/Makefile +++ b/arch/powerpc/kernel/vdso64/Makefile | |||
@@ -8,7 +8,8 @@ targets := $(obj-vdso64) vdso64.so | |||
8 | obj-vdso64 := $(addprefix $(obj)/, $(obj-vdso64)) | 8 | obj-vdso64 := $(addprefix $(obj)/, $(obj-vdso64)) |
9 | 9 | ||
10 | EXTRA_CFLAGS := -shared -s -fno-common -fno-builtin | 10 | EXTRA_CFLAGS := -shared -s -fno-common -fno-builtin |
11 | EXTRA_CFLAGS += -nostdlib -Wl,-soname=linux-vdso64.so.1 | 11 | EXTRA_CFLAGS += -nostdlib -Wl,-soname=linux-vdso64.so.1 \ |
12 | $(call ld-option, -Wl$(comma)--hash-style=sysv) | ||
12 | EXTRA_AFLAGS := -D__VDSO64__ -s | 13 | EXTRA_AFLAGS := -D__VDSO64__ -s |
13 | 14 | ||
14 | obj-y += vdso64_wrapper.o | 15 | obj-y += vdso64_wrapper.o |
diff --git a/arch/powerpc/kernel/vdso64/vdso64.lds.S b/arch/powerpc/kernel/vdso64/vdso64.lds.S index 4bdf224464ab..4a2b6dc0960c 100644 --- a/arch/powerpc/kernel/vdso64/vdso64.lds.S +++ b/arch/powerpc/kernel/vdso64/vdso64.lds.S | |||
@@ -12,6 +12,7 @@ SECTIONS | |||
12 | { | 12 | { |
13 | . = VDSO64_LBASE + SIZEOF_HEADERS; | 13 | . = VDSO64_LBASE + SIZEOF_HEADERS; |
14 | .hash : { *(.hash) } :text | 14 | .hash : { *(.hash) } :text |
15 | .gnu.hash : { *(.gnu.hash) } | ||
15 | .dynsym : { *(.dynsym) } | 16 | .dynsym : { *(.dynsym) } |
16 | .dynstr : { *(.dynstr) } | 17 | .dynstr : { *(.dynstr) } |
17 | .gnu.version : { *(.gnu.version) } | 18 | .gnu.version : { *(.gnu.version) } |
diff --git a/arch/powerpc/lib/memcpy_64.S b/arch/powerpc/lib/memcpy_64.S index fd66acfd3e3e..7173ba98f427 100644 --- a/arch/powerpc/lib/memcpy_64.S +++ b/arch/powerpc/lib/memcpy_64.S | |||
@@ -11,6 +11,7 @@ | |||
11 | 11 | ||
12 | .align 7 | 12 | .align 7 |
13 | _GLOBAL(memcpy) | 13 | _GLOBAL(memcpy) |
14 | std r3,48(r1) /* save destination pointer for return value */ | ||
14 | mtcrf 0x01,r5 | 15 | mtcrf 0x01,r5 |
15 | cmpldi cr1,r5,16 | 16 | cmpldi cr1,r5,16 |
16 | neg r6,r3 # LS 3 bits = # bytes to 8-byte dest bdry | 17 | neg r6,r3 # LS 3 bits = # bytes to 8-byte dest bdry |
@@ -38,7 +39,7 @@ _GLOBAL(memcpy) | |||
38 | stdu r9,16(r3) | 39 | stdu r9,16(r3) |
39 | bdnz 1b | 40 | bdnz 1b |
40 | 3: std r8,8(r3) | 41 | 3: std r8,8(r3) |
41 | beqlr | 42 | beq 3f |
42 | addi r3,r3,16 | 43 | addi r3,r3,16 |
43 | ld r9,8(r4) | 44 | ld r9,8(r4) |
44 | .Ldo_tail: | 45 | .Ldo_tail: |
@@ -53,7 +54,8 @@ _GLOBAL(memcpy) | |||
53 | 2: bf cr7*4+3,3f | 54 | 2: bf cr7*4+3,3f |
54 | rotldi r9,r9,8 | 55 | rotldi r9,r9,8 |
55 | stb r9,0(r3) | 56 | stb r9,0(r3) |
56 | 3: blr | 57 | 3: ld r3,48(r1) /* return dest pointer */ |
58 | blr | ||
57 | 59 | ||
58 | .Lsrc_unaligned: | 60 | .Lsrc_unaligned: |
59 | srdi r6,r5,3 | 61 | srdi r6,r5,3 |
@@ -115,7 +117,7 @@ _GLOBAL(memcpy) | |||
115 | 5: srd r12,r9,r11 | 117 | 5: srd r12,r9,r11 |
116 | or r12,r8,r12 | 118 | or r12,r8,r12 |
117 | std r12,24(r3) | 119 | std r12,24(r3) |
118 | beqlr | 120 | beq 4f |
119 | cmpwi cr1,r5,8 | 121 | cmpwi cr1,r5,8 |
120 | addi r3,r3,32 | 122 | addi r3,r3,32 |
121 | sld r9,r9,r10 | 123 | sld r9,r9,r10 |
@@ -167,4 +169,5 @@ _GLOBAL(memcpy) | |||
167 | 3: bf cr7*4+3,4f | 169 | 3: bf cr7*4+3,4f |
168 | lbz r0,0(r4) | 170 | lbz r0,0(r4) |
169 | stb r0,0(r3) | 171 | stb r0,0(r3) |
170 | 4: blr | 172 | 4: ld r3,48(r1) /* return dest pointer */ |
173 | blr | ||
diff --git a/arch/powerpc/mm/44x_mmu.c b/arch/powerpc/mm/44x_mmu.c index 376829ed2211..0a0a0487b334 100644 --- a/arch/powerpc/mm/44x_mmu.c +++ b/arch/powerpc/mm/44x_mmu.c | |||
@@ -103,7 +103,7 @@ unsigned long __init mmu_mapin_ram(void) | |||
103 | 103 | ||
104 | /* Determine number of entries necessary to cover lowmem */ | 104 | /* Determine number of entries necessary to cover lowmem */ |
105 | pinned_tlbs = (unsigned int) | 105 | pinned_tlbs = (unsigned int) |
106 | (_ALIGN(total_lowmem, PPC44x_PIN_SIZE) >> PPC44x_PIN_SHIFT); | 106 | (_ALIGN(total_lowmem, PPC_PIN_SIZE) >> PPC44x_PIN_SHIFT); |
107 | 107 | ||
108 | /* Write upper watermark to save location */ | 108 | /* Write upper watermark to save location */ |
109 | tlb_44x_hwater = PPC44x_LOW_SLOT - pinned_tlbs; | 109 | tlb_44x_hwater = PPC44x_LOW_SLOT - pinned_tlbs; |
@@ -111,7 +111,7 @@ unsigned long __init mmu_mapin_ram(void) | |||
111 | /* If necessary, set additional pinned TLBs */ | 111 | /* If necessary, set additional pinned TLBs */ |
112 | if (pinned_tlbs > 1) | 112 | if (pinned_tlbs > 1) |
113 | for (i = (PPC44x_LOW_SLOT-(pinned_tlbs-1)); i < PPC44x_LOW_SLOT; i++) { | 113 | for (i = (PPC44x_LOW_SLOT-(pinned_tlbs-1)); i < PPC44x_LOW_SLOT; i++) { |
114 | unsigned int phys_addr = (PPC44x_LOW_SLOT-i) * PPC44x_PIN_SIZE; | 114 | unsigned int phys_addr = (PPC44x_LOW_SLOT-i) * PPC_PIN_SIZE; |
115 | ppc44x_pin_tlb(i, phys_addr+PAGE_OFFSET, phys_addr); | 115 | ppc44x_pin_tlb(i, phys_addr+PAGE_OFFSET, phys_addr); |
116 | } | 116 | } |
117 | 117 | ||
diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c index 266b8b2ceac9..5615acc29527 100644 --- a/arch/powerpc/mm/hugetlbpage.c +++ b/arch/powerpc/mm/hugetlbpage.c | |||
@@ -153,7 +153,7 @@ static void free_hugepte_range(struct mmu_gather *tlb, hugepd_t *hpdp) | |||
153 | hpdp->pd = 0; | 153 | hpdp->pd = 0; |
154 | tlb->need_flush = 1; | 154 | tlb->need_flush = 1; |
155 | pgtable_free_tlb(tlb, pgtable_free_cache(hugepte, HUGEPTE_CACHE_NUM, | 155 | pgtable_free_tlb(tlb, pgtable_free_cache(hugepte, HUGEPTE_CACHE_NUM, |
156 | HUGEPTE_TABLE_SIZE-1)); | 156 | PGF_CACHENUM_MASK)); |
157 | } | 157 | } |
158 | 158 | ||
159 | #ifdef CONFIG_PPC_64K_PAGES | 159 | #ifdef CONFIG_PPC_64K_PAGES |
diff --git a/arch/powerpc/mm/lmb.c b/arch/powerpc/mm/lmb.c index 4b17a7359924..716a2906a24d 100644 --- a/arch/powerpc/mm/lmb.c +++ b/arch/powerpc/mm/lmb.c | |||
@@ -320,7 +320,8 @@ void __init lmb_enforce_memory_limit(unsigned long memory_limit) | |||
320 | break; | 320 | break; |
321 | } | 321 | } |
322 | 322 | ||
323 | lmb.rmo_size = lmb.memory.region[0].size; | 323 | if (lmb.memory.region[0].size < lmb.rmo_size) |
324 | lmb.rmo_size = lmb.memory.region[0].size; | ||
324 | 325 | ||
325 | /* And truncate any reserves above the limit also. */ | 326 | /* And truncate any reserves above the limit also. */ |
326 | for (i = 0; i < lmb.reserved.cnt; i++) { | 327 | for (i = 0; i < lmb.reserved.cnt; i++) { |
diff --git a/arch/powerpc/platforms/83xx/mpc834x_itx.c b/arch/powerpc/platforms/83xx/mpc834x_itx.c index b46305645d38..cf3967a66fb5 100644 --- a/arch/powerpc/platforms/83xx/mpc834x_itx.c +++ b/arch/powerpc/platforms/83xx/mpc834x_itx.c | |||
@@ -46,26 +46,6 @@ unsigned long isa_io_base = 0; | |||
46 | unsigned long isa_mem_base = 0; | 46 | unsigned long isa_mem_base = 0; |
47 | #endif | 47 | #endif |
48 | 48 | ||
49 | #ifdef CONFIG_PCI | ||
50 | static int | ||
51 | mpc83xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) | ||
52 | { | ||
53 | static char pci_irq_table[][4] = | ||
54 | /* | ||
55 | * PCI IDSEL/INTPIN->INTLINE | ||
56 | * A B C D | ||
57 | */ | ||
58 | { | ||
59 | {PIRQB, PIRQC, PIRQD, PIRQA}, /* idsel 0x0e */ | ||
60 | {PIRQA, PIRQB, PIRQC, PIRQD}, /* idsel 0x0f */ | ||
61 | {PIRQC, PIRQD, PIRQA, PIRQB}, /* idsel 0x10 */ | ||
62 | }; | ||
63 | |||
64 | const long min_idsel = 0x0e, max_idsel = 0x10, irqs_per_slot = 4; | ||
65 | return PCI_IRQ_TABLE_LOOKUP; | ||
66 | } | ||
67 | #endif /* CONFIG_PCI */ | ||
68 | |||
69 | /* ************************************************************************ | 49 | /* ************************************************************************ |
70 | * | 50 | * |
71 | * Setup the architecture | 51 | * Setup the architecture |
@@ -92,8 +72,6 @@ static void __init mpc834x_itx_setup_arch(void) | |||
92 | for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) | 72 | for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) |
93 | add_bridge(np); | 73 | add_bridge(np); |
94 | 74 | ||
95 | ppc_md.pci_swizzle = common_swizzle; | ||
96 | ppc_md.pci_map_irq = mpc83xx_map_irq; | ||
97 | ppc_md.pci_exclude_device = mpc83xx_exclude_device; | 75 | ppc_md.pci_exclude_device = mpc83xx_exclude_device; |
98 | #endif | 76 | #endif |
99 | 77 | ||
@@ -106,25 +84,13 @@ static void __init mpc834x_itx_setup_arch(void) | |||
106 | 84 | ||
107 | void __init mpc834x_itx_init_IRQ(void) | 85 | void __init mpc834x_itx_init_IRQ(void) |
108 | { | 86 | { |
109 | u8 senses[8] = { | 87 | struct device_node *np; |
110 | 0, /* EXT 0 */ | 88 | |
111 | IRQ_SENSE_LEVEL, /* EXT 1 */ | 89 | np = of_find_node_by_type(NULL, "ipic"); |
112 | IRQ_SENSE_LEVEL, /* EXT 2 */ | 90 | if (!np) |
113 | 0, /* EXT 3 */ | 91 | return; |
114 | #ifdef CONFIG_PCI | ||
115 | IRQ_SENSE_LEVEL, /* EXT 4 */ | ||
116 | IRQ_SENSE_LEVEL, /* EXT 5 */ | ||
117 | IRQ_SENSE_LEVEL, /* EXT 6 */ | ||
118 | IRQ_SENSE_LEVEL, /* EXT 7 */ | ||
119 | #else | ||
120 | 0, /* EXT 4 */ | ||
121 | 0, /* EXT 5 */ | ||
122 | 0, /* EXT 6 */ | ||
123 | 0, /* EXT 7 */ | ||
124 | #endif | ||
125 | }; | ||
126 | 92 | ||
127 | ipic_init(get_immrbase() + 0x00700, 0, 0, senses, 8); | 93 | ipic_init(np, 0); |
128 | 94 | ||
129 | /* Initialize the default interrupt mapping priorities, | 95 | /* Initialize the default interrupt mapping priorities, |
130 | * in case the boot rom changed something on us. | 96 | * in case the boot rom changed something on us. |
@@ -153,4 +119,7 @@ define_machine(mpc834x_itx) { | |||
153 | .time_init = mpc83xx_time_init, | 119 | .time_init = mpc83xx_time_init, |
154 | .calibrate_decr = generic_calibrate_decr, | 120 | .calibrate_decr = generic_calibrate_decr, |
155 | .progress = udbg_progress, | 121 | .progress = udbg_progress, |
122 | #ifdef CONFIG_PCI | ||
123 | .pcibios_fixup = mpc83xx_pcibios_fixup, | ||
124 | #endif | ||
156 | }; | 125 | }; |
diff --git a/arch/powerpc/platforms/83xx/mpc834x_sys.c b/arch/powerpc/platforms/83xx/mpc834x_sys.c index 3e1c16eb4a63..32df239d1c48 100644 --- a/arch/powerpc/platforms/83xx/mpc834x_sys.c +++ b/arch/powerpc/platforms/83xx/mpc834x_sys.c | |||
@@ -43,33 +43,6 @@ unsigned long isa_io_base = 0; | |||
43 | unsigned long isa_mem_base = 0; | 43 | unsigned long isa_mem_base = 0; |
44 | #endif | 44 | #endif |
45 | 45 | ||
46 | #ifdef CONFIG_PCI | ||
47 | static int | ||
48 | mpc83xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) | ||
49 | { | ||
50 | static char pci_irq_table[][4] = | ||
51 | /* | ||
52 | * PCI IDSEL/INTPIN->INTLINE | ||
53 | * A B C D | ||
54 | */ | ||
55 | { | ||
56 | {PIRQA, PIRQB, PIRQC, PIRQD}, /* idsel 0x11 */ | ||
57 | {PIRQC, PIRQD, PIRQA, PIRQB}, /* idsel 0x12 */ | ||
58 | {PIRQD, PIRQA, PIRQB, PIRQC}, /* idsel 0x13 */ | ||
59 | {0, 0, 0, 0}, | ||
60 | {PIRQA, PIRQB, PIRQC, PIRQD}, /* idsel 0x15 */ | ||
61 | {PIRQD, PIRQA, PIRQB, PIRQC}, /* idsel 0x16 */ | ||
62 | {PIRQC, PIRQD, PIRQA, PIRQB}, /* idsel 0x17 */ | ||
63 | {PIRQB, PIRQC, PIRQD, PIRQA}, /* idsel 0x18 */ | ||
64 | {0, 0, 0, 0}, /* idsel 0x19 */ | ||
65 | {0, 0, 0, 0}, /* idsel 0x20 */ | ||
66 | }; | ||
67 | |||
68 | const long min_idsel = 0x11, max_idsel = 0x20, irqs_per_slot = 4; | ||
69 | return PCI_IRQ_TABLE_LOOKUP; | ||
70 | } | ||
71 | #endif /* CONFIG_PCI */ | ||
72 | |||
73 | /* ************************************************************************ | 46 | /* ************************************************************************ |
74 | * | 47 | * |
75 | * Setup the architecture | 48 | * Setup the architecture |
@@ -96,8 +69,6 @@ static void __init mpc834x_sys_setup_arch(void) | |||
96 | for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) | 69 | for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) |
97 | add_bridge(np); | 70 | add_bridge(np); |
98 | 71 | ||
99 | ppc_md.pci_swizzle = common_swizzle; | ||
100 | ppc_md.pci_map_irq = mpc83xx_map_irq; | ||
101 | ppc_md.pci_exclude_device = mpc83xx_exclude_device; | 72 | ppc_md.pci_exclude_device = mpc83xx_exclude_device; |
102 | #endif | 73 | #endif |
103 | 74 | ||
@@ -110,25 +81,13 @@ static void __init mpc834x_sys_setup_arch(void) | |||
110 | 81 | ||
111 | void __init mpc834x_sys_init_IRQ(void) | 82 | void __init mpc834x_sys_init_IRQ(void) |
112 | { | 83 | { |
113 | u8 senses[8] = { | 84 | struct device_node *np; |
114 | 0, /* EXT 0 */ | 85 | |
115 | IRQ_SENSE_LEVEL, /* EXT 1 */ | 86 | np = of_find_node_by_type(NULL, "ipic"); |
116 | IRQ_SENSE_LEVEL, /* EXT 2 */ | 87 | if (!np) |
117 | 0, /* EXT 3 */ | 88 | return; |
118 | #ifdef CONFIG_PCI | ||
119 | IRQ_SENSE_LEVEL, /* EXT 4 */ | ||
120 | IRQ_SENSE_LEVEL, /* EXT 5 */ | ||
121 | IRQ_SENSE_LEVEL, /* EXT 6 */ | ||
122 | IRQ_SENSE_LEVEL, /* EXT 7 */ | ||
123 | #else | ||
124 | 0, /* EXT 4 */ | ||
125 | 0, /* EXT 5 */ | ||
126 | 0, /* EXT 6 */ | ||
127 | 0, /* EXT 7 */ | ||
128 | #endif | ||
129 | }; | ||
130 | 89 | ||
131 | ipic_init(get_immrbase() + 0x00700, 0, 0, senses, 8); | 90 | ipic_init(np, 0); |
132 | 91 | ||
133 | /* Initialize the default interrupt mapping priorities, | 92 | /* Initialize the default interrupt mapping priorities, |
134 | * in case the boot rom changed something on us. | 93 | * in case the boot rom changed something on us. |
@@ -178,4 +137,7 @@ define_machine(mpc834x_sys) { | |||
178 | .time_init = mpc83xx_time_init, | 137 | .time_init = mpc83xx_time_init, |
179 | .calibrate_decr = generic_calibrate_decr, | 138 | .calibrate_decr = generic_calibrate_decr, |
180 | .progress = udbg_progress, | 139 | .progress = udbg_progress, |
140 | #ifdef CONFIG_PCI | ||
141 | .pcibios_fixup = mpc83xx_pcibios_fixup, | ||
142 | #endif | ||
181 | }; | 143 | }; |
diff --git a/arch/powerpc/platforms/83xx/mpc83xx.h b/arch/powerpc/platforms/83xx/mpc83xx.h index 01cae106912b..2c82bca9bfbb 100644 --- a/arch/powerpc/platforms/83xx/mpc83xx.h +++ b/arch/powerpc/platforms/83xx/mpc83xx.h | |||
@@ -11,6 +11,7 @@ | |||
11 | 11 | ||
12 | extern int add_bridge(struct device_node *dev); | 12 | extern int add_bridge(struct device_node *dev); |
13 | extern int mpc83xx_exclude_device(u_char bus, u_char devfn); | 13 | extern int mpc83xx_exclude_device(u_char bus, u_char devfn); |
14 | extern void mpc83xx_pcibios_fixup(void); | ||
14 | extern void mpc83xx_restart(char *cmd); | 15 | extern void mpc83xx_restart(char *cmd); |
15 | extern long mpc83xx_time_init(void); | 16 | extern long mpc83xx_time_init(void); |
16 | 17 | ||
diff --git a/arch/powerpc/platforms/83xx/pci.c b/arch/powerpc/platforms/83xx/pci.c index 3b5e563c279f..5d84a9ccd103 100644 --- a/arch/powerpc/platforms/83xx/pci.c +++ b/arch/powerpc/platforms/83xx/pci.c | |||
@@ -45,6 +45,15 @@ int mpc83xx_exclude_device(u_char bus, u_char devfn) | |||
45 | return PCIBIOS_SUCCESSFUL; | 45 | return PCIBIOS_SUCCESSFUL; |
46 | } | 46 | } |
47 | 47 | ||
48 | void __init mpc83xx_pcibios_fixup(void) | ||
49 | { | ||
50 | struct pci_dev *dev = NULL; | ||
51 | |||
52 | /* map all the PCI irqs */ | ||
53 | for_each_pci_dev(dev) | ||
54 | pci_read_irq_line(dev); | ||
55 | } | ||
56 | |||
48 | int __init add_bridge(struct device_node *dev) | 57 | int __init add_bridge(struct device_node *dev) |
49 | { | 58 | { |
50 | int len; | 59 | int len; |
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig index 454fc53289ab..c3268d9877e4 100644 --- a/arch/powerpc/platforms/85xx/Kconfig +++ b/arch/powerpc/platforms/85xx/Kconfig | |||
@@ -14,7 +14,6 @@ config MPC8540_ADS | |||
14 | config MPC85xx_CDS | 14 | config MPC85xx_CDS |
15 | bool "Freescale MPC85xx CDS" | 15 | bool "Freescale MPC85xx CDS" |
16 | select DEFAULT_UIMAGE | 16 | select DEFAULT_UIMAGE |
17 | select PPC_I8259 if PCI | ||
18 | help | 17 | help |
19 | This option enables support for the MPC85xx CDS board | 18 | This option enables support for the MPC85xx CDS board |
20 | 19 | ||
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c index 06a497676c99..9d2acfbbeccd 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c | |||
@@ -37,79 +37,7 @@ unsigned long isa_io_base = 0; | |||
37 | unsigned long isa_mem_base = 0; | 37 | unsigned long isa_mem_base = 0; |
38 | #endif | 38 | #endif |
39 | 39 | ||
40 | /* | ||
41 | * Internal interrupts are all Level Sensitive, and Positive Polarity | ||
42 | * | ||
43 | * Note: Likely, this table and the following function should be | ||
44 | * obtained and derived from the OF Device Tree. | ||
45 | */ | ||
46 | static u_char mpc85xx_ads_openpic_initsenses[] __initdata = { | ||
47 | MPC85XX_INTERNAL_IRQ_SENSES, | ||
48 | 0x0, /* External 0: */ | ||
49 | #if defined(CONFIG_PCI) | ||
50 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 1: PCI slot 0 */ | ||
51 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 2: PCI slot 1 */ | ||
52 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 3: PCI slot 2 */ | ||
53 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 4: PCI slot 3 */ | ||
54 | #else | ||
55 | 0x0, /* External 1: */ | ||
56 | 0x0, /* External 2: */ | ||
57 | 0x0, /* External 3: */ | ||
58 | 0x0, /* External 4: */ | ||
59 | #endif | ||
60 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 5: PHY */ | ||
61 | 0x0, /* External 6: */ | ||
62 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 7: PHY */ | ||
63 | 0x0, /* External 8: */ | ||
64 | 0x0, /* External 9: */ | ||
65 | 0x0, /* External 10: */ | ||
66 | 0x0, /* External 11: */ | ||
67 | }; | ||
68 | |||
69 | #ifdef CONFIG_PCI | 40 | #ifdef CONFIG_PCI |
70 | /* | ||
71 | * interrupt routing | ||
72 | */ | ||
73 | |||
74 | int | ||
75 | mpc85xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) | ||
76 | { | ||
77 | static char pci_irq_table[][4] = | ||
78 | /* | ||
79 | * This is little evil, but works around the fact | ||
80 | * that revA boards have IDSEL starting at 18 | ||
81 | * and others boards (older) start at 12 | ||
82 | * | ||
83 | * PCI IDSEL/INTPIN->INTLINE | ||
84 | * A B C D | ||
85 | */ | ||
86 | { | ||
87 | {PIRQA, PIRQB, PIRQC, PIRQD}, /* IDSEL 2 */ | ||
88 | {PIRQD, PIRQA, PIRQB, PIRQC}, | ||
89 | {PIRQC, PIRQD, PIRQA, PIRQB}, | ||
90 | {PIRQB, PIRQC, PIRQD, PIRQA}, /* IDSEL 5 */ | ||
91 | {0, 0, 0, 0}, /* -- */ | ||
92 | {0, 0, 0, 0}, /* -- */ | ||
93 | {0, 0, 0, 0}, /* -- */ | ||
94 | {0, 0, 0, 0}, /* -- */ | ||
95 | {0, 0, 0, 0}, /* -- */ | ||
96 | {0, 0, 0, 0}, /* -- */ | ||
97 | {PIRQA, PIRQB, PIRQC, PIRQD}, /* IDSEL 12 */ | ||
98 | {PIRQD, PIRQA, PIRQB, PIRQC}, | ||
99 | {PIRQC, PIRQD, PIRQA, PIRQB}, | ||
100 | {PIRQB, PIRQC, PIRQD, PIRQA}, /* IDSEL 15 */ | ||
101 | {0, 0, 0, 0}, /* -- */ | ||
102 | {0, 0, 0, 0}, /* -- */ | ||
103 | {PIRQA, PIRQB, PIRQC, PIRQD}, /* IDSEL 18 */ | ||
104 | {PIRQD, PIRQA, PIRQB, PIRQC}, | ||
105 | {PIRQC, PIRQD, PIRQA, PIRQB}, | ||
106 | {PIRQB, PIRQC, PIRQD, PIRQA}, /* IDSEL 21 */ | ||
107 | }; | ||
108 | |||
109 | const long min_idsel = 2, max_idsel = 21, irqs_per_slot = 4; | ||
110 | return PCI_IRQ_TABLE_LOOKUP; | ||
111 | } | ||
112 | |||
113 | int | 41 | int |
114 | mpc85xx_exclude_device(u_char bus, u_char devfn) | 42 | mpc85xx_exclude_device(u_char bus, u_char devfn) |
115 | { | 43 | { |
@@ -119,44 +47,63 @@ mpc85xx_exclude_device(u_char bus, u_char devfn) | |||
119 | return PCIBIOS_SUCCESSFUL; | 47 | return PCIBIOS_SUCCESSFUL; |
120 | } | 48 | } |
121 | 49 | ||
50 | void __init | ||
51 | mpc85xx_pcibios_fixup(void) | ||
52 | { | ||
53 | struct pci_dev *dev = NULL; | ||
54 | |||
55 | for_each_pci_dev(dev) | ||
56 | pci_read_irq_line(dev); | ||
57 | } | ||
122 | #endif /* CONFIG_PCI */ | 58 | #endif /* CONFIG_PCI */ |
123 | 59 | ||
124 | 60 | ||
125 | void __init mpc85xx_ads_pic_init(void) | 61 | void __init mpc85xx_ads_pic_init(void) |
126 | { | 62 | { |
127 | struct mpic *mpic1; | 63 | struct mpic *mpic; |
128 | phys_addr_t OpenPIC_PAddr; | 64 | struct resource r; |
129 | 65 | struct device_node *np = NULL; | |
130 | /* Determine the Physical Address of the OpenPIC regs */ | 66 | |
131 | OpenPIC_PAddr = get_immrbase() + MPC85xx_OPENPIC_OFFSET; | 67 | np = of_find_node_by_type(np, "open-pic"); |
132 | 68 | ||
133 | mpic1 = mpic_alloc(OpenPIC_PAddr, | 69 | if (np == NULL) { |
134 | MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, | 70 | printk(KERN_ERR "Could not find open-pic node\n"); |
135 | 4, MPC85xx_OPENPIC_IRQ_OFFSET, 0, 250, | 71 | return; |
136 | mpc85xx_ads_openpic_initsenses, | 72 | } |
137 | sizeof(mpc85xx_ads_openpic_initsenses), | 73 | |
138 | " OpenPIC "); | 74 | if(of_address_to_resource(np, 0, &r)) { |
139 | BUG_ON(mpic1 == NULL); | 75 | printk(KERN_ERR "Could not map mpic register space\n"); |
140 | mpic_assign_isu(mpic1, 0, OpenPIC_PAddr + 0x10200); | 76 | of_node_put(np); |
141 | mpic_assign_isu(mpic1, 1, OpenPIC_PAddr + 0x10280); | 77 | return; |
142 | mpic_assign_isu(mpic1, 2, OpenPIC_PAddr + 0x10300); | 78 | } |
143 | mpic_assign_isu(mpic1, 3, OpenPIC_PAddr + 0x10380); | 79 | |
144 | mpic_assign_isu(mpic1, 4, OpenPIC_PAddr + 0x10400); | 80 | mpic = mpic_alloc(np, r.start, |
145 | mpic_assign_isu(mpic1, 5, OpenPIC_PAddr + 0x10480); | 81 | MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, |
146 | mpic_assign_isu(mpic1, 6, OpenPIC_PAddr + 0x10500); | 82 | 4, 0, " OpenPIC "); |
147 | mpic_assign_isu(mpic1, 7, OpenPIC_PAddr + 0x10580); | 83 | BUG_ON(mpic == NULL); |
148 | 84 | of_node_put(np); | |
149 | /* dummy mappings to get to 48 */ | 85 | |
150 | mpic_assign_isu(mpic1, 8, OpenPIC_PAddr + 0x10600); | 86 | mpic_assign_isu(mpic, 0, r.start + 0x10200); |
151 | mpic_assign_isu(mpic1, 9, OpenPIC_PAddr + 0x10680); | 87 | mpic_assign_isu(mpic, 1, r.start + 0x10280); |
152 | mpic_assign_isu(mpic1, 10, OpenPIC_PAddr + 0x10700); | 88 | mpic_assign_isu(mpic, 2, r.start + 0x10300); |
153 | mpic_assign_isu(mpic1, 11, OpenPIC_PAddr + 0x10780); | 89 | mpic_assign_isu(mpic, 3, r.start + 0x10380); |
154 | 90 | mpic_assign_isu(mpic, 4, r.start + 0x10400); | |
155 | /* External ints */ | 91 | mpic_assign_isu(mpic, 5, r.start + 0x10480); |
156 | mpic_assign_isu(mpic1, 12, OpenPIC_PAddr + 0x10000); | 92 | mpic_assign_isu(mpic, 6, r.start + 0x10500); |
157 | mpic_assign_isu(mpic1, 13, OpenPIC_PAddr + 0x10080); | 93 | mpic_assign_isu(mpic, 7, r.start + 0x10580); |
158 | mpic_assign_isu(mpic1, 14, OpenPIC_PAddr + 0x10100); | 94 | |
159 | mpic_init(mpic1); | 95 | /* Unused on this platform (leave room for 8548) */ |
96 | mpic_assign_isu(mpic, 8, r.start + 0x10600); | ||
97 | mpic_assign_isu(mpic, 9, r.start + 0x10680); | ||
98 | mpic_assign_isu(mpic, 10, r.start + 0x10700); | ||
99 | mpic_assign_isu(mpic, 11, r.start + 0x10780); | ||
100 | |||
101 | /* External Interrupts */ | ||
102 | mpic_assign_isu(mpic, 12, r.start + 0x10000); | ||
103 | mpic_assign_isu(mpic, 13, r.start + 0x10080); | ||
104 | mpic_assign_isu(mpic, 14, r.start + 0x10100); | ||
105 | |||
106 | mpic_init(mpic); | ||
160 | } | 107 | } |
161 | 108 | ||
162 | /* | 109 | /* |
@@ -165,7 +112,9 @@ void __init mpc85xx_ads_pic_init(void) | |||
165 | static void __init mpc85xx_ads_setup_arch(void) | 112 | static void __init mpc85xx_ads_setup_arch(void) |
166 | { | 113 | { |
167 | struct device_node *cpu; | 114 | struct device_node *cpu; |
115 | #ifdef CONFIG_PCI | ||
168 | struct device_node *np; | 116 | struct device_node *np; |
117 | #endif | ||
169 | 118 | ||
170 | if (ppc_md.progress) | 119 | if (ppc_md.progress) |
171 | ppc_md.progress("mpc85xx_ads_setup_arch()", 0); | 120 | ppc_md.progress("mpc85xx_ads_setup_arch()", 0); |
@@ -186,8 +135,7 @@ static void __init mpc85xx_ads_setup_arch(void) | |||
186 | for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) | 135 | for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) |
187 | add_bridge(np); | 136 | add_bridge(np); |
188 | 137 | ||
189 | ppc_md.pci_swizzle = common_swizzle; | 138 | ppc_md.pcibios_fixup = mpc85xx_pcibios_fixup; |
190 | ppc_md.pci_map_irq = mpc85xx_map_irq; | ||
191 | ppc_md.pci_exclude_device = mpc85xx_exclude_device; | 139 | ppc_md.pci_exclude_device = mpc85xx_exclude_device; |
192 | #endif | 140 | #endif |
193 | 141 | ||
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c index 18e6e11f7020..1d357d32a29f 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c | |||
@@ -57,94 +57,8 @@ unsigned long isa_mem_base = 0; | |||
57 | static int cds_pci_slot = 2; | 57 | static int cds_pci_slot = 2; |
58 | static volatile u8 *cadmus; | 58 | static volatile u8 *cadmus; |
59 | 59 | ||
60 | /* | ||
61 | * Internal interrupts are all Level Sensitive, and Positive Polarity | ||
62 | * | ||
63 | * Note: Likely, this table and the following function should be | ||
64 | * obtained and derived from the OF Device Tree. | ||
65 | */ | ||
66 | static u_char mpc85xx_cds_openpic_initsenses[] __initdata = { | ||
67 | MPC85XX_INTERNAL_IRQ_SENSES, | ||
68 | #if defined(CONFIG_PCI) | ||
69 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Ext 0: PCI slot 0 */ | ||
70 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 1: PCI slot 1 */ | ||
71 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 2: PCI slot 2 */ | ||
72 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 3: PCI slot 3 */ | ||
73 | #else | ||
74 | 0x0, /* External 0: */ | ||
75 | 0x0, /* External 1: */ | ||
76 | 0x0, /* External 2: */ | ||
77 | 0x0, /* External 3: */ | ||
78 | #endif | ||
79 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 5: PHY */ | ||
80 | 0x0, /* External 6: */ | ||
81 | 0x0, /* External 7: */ | ||
82 | 0x0, /* External 8: */ | ||
83 | 0x0, /* External 9: */ | ||
84 | 0x0, /* External 10: */ | ||
85 | #ifdef CONFIG_PCI | ||
86 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 11: PCI2 slot 0 */ | ||
87 | #else | ||
88 | 0x0, /* External 11: */ | ||
89 | #endif | ||
90 | }; | ||
91 | |||
92 | 60 | ||
93 | #ifdef CONFIG_PCI | 61 | #ifdef CONFIG_PCI |
94 | /* | ||
95 | * interrupt routing | ||
96 | */ | ||
97 | int | ||
98 | mpc85xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) | ||
99 | { | ||
100 | struct pci_controller *hose = pci_bus_to_hose(dev->bus->number); | ||
101 | |||
102 | if (!hose->index) | ||
103 | { | ||
104 | /* Handle PCI1 interrupts */ | ||
105 | char pci_irq_table[][4] = | ||
106 | /* | ||
107 | * PCI IDSEL/INTPIN->INTLINE | ||
108 | * A B C D | ||
109 | */ | ||
110 | |||
111 | /* Note IRQ assignment for slots is based on which slot the elysium is | ||
112 | * in -- in this setup elysium is in slot #2 (this PIRQA as first | ||
113 | * interrupt on slot */ | ||
114 | { | ||
115 | { 0, 1, 2, 3 }, /* 16 - PMC */ | ||
116 | { 0, 1, 2, 3 }, /* 17 P2P (Tsi320) */ | ||
117 | { 0, 1, 2, 3 }, /* 18 - Slot 1 */ | ||
118 | { 1, 2, 3, 0 }, /* 19 - Slot 2 */ | ||
119 | { 2, 3, 0, 1 }, /* 20 - Slot 3 */ | ||
120 | { 3, 0, 1, 2 }, /* 21 - Slot 4 */ | ||
121 | }; | ||
122 | |||
123 | const long min_idsel = 16, max_idsel = 21, irqs_per_slot = 4; | ||
124 | int i, j; | ||
125 | |||
126 | for (i = 0; i < 6; i++) | ||
127 | for (j = 0; j < 4; j++) | ||
128 | pci_irq_table[i][j] = | ||
129 | ((pci_irq_table[i][j] + 5 - | ||
130 | cds_pci_slot) & 0x3) + PIRQ0A; | ||
131 | |||
132 | return PCI_IRQ_TABLE_LOOKUP; | ||
133 | } else { | ||
134 | /* Handle PCI2 interrupts (if we have one) */ | ||
135 | char pci_irq_table[][4] = | ||
136 | { | ||
137 | /* | ||
138 | * We only have one slot and one interrupt | ||
139 | * going to PIRQA - PIRQD */ | ||
140 | { PIRQ1A, PIRQ1A, PIRQ1A, PIRQ1A }, /* 21 - slot 0 */ | ||
141 | }; | ||
142 | |||
143 | const long min_idsel = 21, max_idsel = 21, irqs_per_slot = 4; | ||
144 | |||
145 | return PCI_IRQ_TABLE_LOOKUP; | ||
146 | } | ||
147 | } | ||
148 | 62 | ||
149 | #define ARCADIA_HOST_BRIDGE_IDSEL 17 | 63 | #define ARCADIA_HOST_BRIDGE_IDSEL 17 |
150 | #define ARCADIA_2ND_BRIDGE_IDSEL 3 | 64 | #define ARCADIA_2ND_BRIDGE_IDSEL 3 |
@@ -210,50 +124,104 @@ mpc85xx_cds_pcibios_fixup(void) | |||
210 | pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 11); | 124 | pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 11); |
211 | pci_dev_put(dev); | 125 | pci_dev_put(dev); |
212 | } | 126 | } |
127 | |||
128 | /* Now map all the PCI irqs */ | ||
129 | dev = NULL; | ||
130 | for_each_pci_dev(dev) | ||
131 | pci_read_irq_line(dev); | ||
132 | } | ||
133 | |||
134 | #ifdef CONFIG_PPC_I8259 | ||
135 | #warning The i8259 PIC support is currently broken | ||
136 | static void mpc85xx_8259_cascade(unsigned int irq, struct | ||
137 | irq_desc *desc, struct pt_regs *regs) | ||
138 | { | ||
139 | unsigned int cascade_irq = i8259_irq(regs); | ||
140 | |||
141 | if (cascade_irq != NO_IRQ) | ||
142 | generic_handle_irq(cascade_irq, regs); | ||
143 | |||
144 | desc->chip->eoi(irq); | ||
213 | } | 145 | } |
146 | #endif /* PPC_I8259 */ | ||
214 | #endif /* CONFIG_PCI */ | 147 | #endif /* CONFIG_PCI */ |
215 | 148 | ||
216 | void __init mpc85xx_cds_pic_init(void) | 149 | void __init mpc85xx_cds_pic_init(void) |
217 | { | 150 | { |
218 | struct mpic *mpic1; | 151 | struct mpic *mpic; |
219 | phys_addr_t OpenPIC_PAddr; | 152 | struct resource r; |
153 | struct device_node *np = NULL; | ||
154 | struct device_node *cascade_node = NULL; | ||
155 | int cascade_irq; | ||
220 | 156 | ||
221 | /* Determine the Physical Address of the OpenPIC regs */ | 157 | np = of_find_node_by_type(np, "open-pic"); |
222 | OpenPIC_PAddr = get_immrbase() + MPC85xx_OPENPIC_OFFSET; | 158 | |
159 | if (np == NULL) { | ||
160 | printk(KERN_ERR "Could not find open-pic node\n"); | ||
161 | return; | ||
162 | } | ||
223 | 163 | ||
224 | mpic1 = mpic_alloc(OpenPIC_PAddr, | 164 | if (of_address_to_resource(np, 0, &r)) { |
165 | printk(KERN_ERR "Failed to map mpic register space\n"); | ||
166 | of_node_put(np); | ||
167 | return; | ||
168 | } | ||
169 | |||
170 | mpic = mpic_alloc(np, r.start, | ||
225 | MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, | 171 | MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, |
226 | 4, MPC85xx_OPENPIC_IRQ_OFFSET, 0, 250, | 172 | 4, 0, " OpenPIC "); |
227 | mpc85xx_cds_openpic_initsenses, | 173 | BUG_ON(mpic == NULL); |
228 | sizeof(mpc85xx_cds_openpic_initsenses), " OpenPIC "); | 174 | |
229 | BUG_ON(mpic1 == NULL); | 175 | /* Return the mpic node */ |
230 | mpic_assign_isu(mpic1, 0, OpenPIC_PAddr + 0x10200); | 176 | of_node_put(np); |
231 | mpic_assign_isu(mpic1, 1, OpenPIC_PAddr + 0x10280); | 177 | |
232 | mpic_assign_isu(mpic1, 2, OpenPIC_PAddr + 0x10300); | 178 | mpic_assign_isu(mpic, 0, r.start + 0x10200); |
233 | mpic_assign_isu(mpic1, 3, OpenPIC_PAddr + 0x10380); | 179 | mpic_assign_isu(mpic, 1, r.start + 0x10280); |
234 | mpic_assign_isu(mpic1, 4, OpenPIC_PAddr + 0x10400); | 180 | mpic_assign_isu(mpic, 2, r.start + 0x10300); |
235 | mpic_assign_isu(mpic1, 5, OpenPIC_PAddr + 0x10480); | 181 | mpic_assign_isu(mpic, 3, r.start + 0x10380); |
236 | mpic_assign_isu(mpic1, 6, OpenPIC_PAddr + 0x10500); | 182 | mpic_assign_isu(mpic, 4, r.start + 0x10400); |
237 | mpic_assign_isu(mpic1, 7, OpenPIC_PAddr + 0x10580); | 183 | mpic_assign_isu(mpic, 5, r.start + 0x10480); |
238 | 184 | mpic_assign_isu(mpic, 6, r.start + 0x10500); | |
239 | /* dummy mappings to get to 48 */ | 185 | mpic_assign_isu(mpic, 7, r.start + 0x10580); |
240 | mpic_assign_isu(mpic1, 8, OpenPIC_PAddr + 0x10600); | 186 | |
241 | mpic_assign_isu(mpic1, 9, OpenPIC_PAddr + 0x10680); | 187 | /* Used only for 8548 so far, but no harm in |
242 | mpic_assign_isu(mpic1, 10, OpenPIC_PAddr + 0x10700); | 188 | * allocating them for everyone */ |
243 | mpic_assign_isu(mpic1, 11, OpenPIC_PAddr + 0x10780); | 189 | mpic_assign_isu(mpic, 8, r.start + 0x10600); |
244 | 190 | mpic_assign_isu(mpic, 9, r.start + 0x10680); | |
245 | /* External ints */ | 191 | mpic_assign_isu(mpic, 10, r.start + 0x10700); |
246 | mpic_assign_isu(mpic1, 12, OpenPIC_PAddr + 0x10000); | 192 | mpic_assign_isu(mpic, 11, r.start + 0x10780); |
247 | mpic_assign_isu(mpic1, 13, OpenPIC_PAddr + 0x10080); | 193 | |
248 | mpic_assign_isu(mpic1, 14, OpenPIC_PAddr + 0x10100); | 194 | /* External Interrupts */ |
249 | 195 | mpic_assign_isu(mpic, 12, r.start + 0x10000); | |
250 | mpic_init(mpic1); | 196 | mpic_assign_isu(mpic, 13, r.start + 0x10080); |
197 | mpic_assign_isu(mpic, 14, r.start + 0x10100); | ||
198 | |||
199 | mpic_init(mpic); | ||
200 | |||
201 | #ifdef CONFIG_PPC_I8259 | ||
202 | /* Initialize the i8259 controller */ | ||
203 | for_each_node_by_type(np, "interrupt-controller") | ||
204 | if (device_is_compatible(np, "chrp,iic")) { | ||
205 | cascade_node = np; | ||
206 | break; | ||
207 | } | ||
208 | |||
209 | if (cascade_node == NULL) { | ||
210 | printk(KERN_DEBUG "Could not find i8259 PIC\n"); | ||
211 | return; | ||
212 | } | ||
251 | 213 | ||
252 | #ifdef CONFIG_PCI | 214 | cascade_irq = irq_of_parse_and_map(cascade_node, 0); |
253 | mpic_setup_cascade(PIRQ0A, i8259_irq_cascade, NULL); | 215 | if (cascade_irq == NO_IRQ) { |
216 | printk(KERN_ERR "Failed to map cascade interrupt\n"); | ||
217 | return; | ||
218 | } | ||
254 | 219 | ||
255 | i8259_init(0,0); | 220 | i8259_init(cascade_node, 0); |
256 | #endif | 221 | of_node_put(cascade_node); |
222 | |||
223 | set_irq_chained_handler(cascade_irq, mpc85xx_8259_cascade); | ||
224 | #endif /* CONFIG_PPC_I8259 */ | ||
257 | } | 225 | } |
258 | 226 | ||
259 | 227 | ||
@@ -298,8 +266,6 @@ mpc85xx_cds_setup_arch(void) | |||
298 | add_bridge(np); | 266 | add_bridge(np); |
299 | 267 | ||
300 | ppc_md.pcibios_fixup = mpc85xx_cds_pcibios_fixup; | 268 | ppc_md.pcibios_fixup = mpc85xx_cds_pcibios_fixup; |
301 | ppc_md.pci_swizzle = common_swizzle; | ||
302 | ppc_md.pci_map_irq = mpc85xx_map_irq; | ||
303 | ppc_md.pci_exclude_device = mpc85xx_exclude_device; | 269 | ppc_md.pci_exclude_device = mpc85xx_exclude_device; |
304 | #endif | 270 | #endif |
305 | 271 | ||
diff --git a/arch/powerpc/platforms/86xx/mpc8641_hpcn.h b/arch/powerpc/platforms/86xx/mpc8641_hpcn.h index 5d2bcf78cef7..41e554c4af94 100644 --- a/arch/powerpc/platforms/86xx/mpc8641_hpcn.h +++ b/arch/powerpc/platforms/86xx/mpc8641_hpcn.h | |||
@@ -16,38 +16,6 @@ | |||
16 | 16 | ||
17 | #include <linux/init.h> | 17 | #include <linux/init.h> |
18 | 18 | ||
19 | /* PCI interrupt controller */ | ||
20 | #define PIRQA 3 | ||
21 | #define PIRQB 4 | ||
22 | #define PIRQC 5 | ||
23 | #define PIRQD 6 | ||
24 | #define PIRQ7 7 | ||
25 | #define PIRQE 9 | ||
26 | #define PIRQF 10 | ||
27 | #define PIRQG 11 | ||
28 | #define PIRQH 12 | ||
29 | |||
30 | /* PCI-Express memory map */ | ||
31 | #define MPC86XX_PCIE_LOWER_IO 0x00000000 | ||
32 | #define MPC86XX_PCIE_UPPER_IO 0x00ffffff | ||
33 | |||
34 | #define MPC86XX_PCIE_LOWER_MEM 0x80000000 | ||
35 | #define MPC86XX_PCIE_UPPER_MEM 0x9fffffff | ||
36 | |||
37 | #define MPC86XX_PCIE_IO_BASE 0xe2000000 | ||
38 | #define MPC86XX_PCIE_MEM_OFFSET 0x00000000 | ||
39 | |||
40 | #define MPC86XX_PCIE_IO_SIZE 0x01000000 | ||
41 | |||
42 | #define PCIE1_CFG_ADDR_OFFSET (0x8000) | ||
43 | #define PCIE1_CFG_DATA_OFFSET (0x8004) | ||
44 | |||
45 | #define PCIE2_CFG_ADDR_OFFSET (0x9000) | ||
46 | #define PCIE2_CFG_DATA_OFFSET (0x9004) | ||
47 | |||
48 | #define MPC86xx_PCIE_OFFSET PCIE1_CFG_ADDR_OFFSET | ||
49 | #define MPC86xx_PCIE_SIZE (0x1000) | ||
50 | |||
51 | #define MPC86XX_RSTCR_OFFSET (0xe00b0) /* Reset Control Register */ | 19 | #define MPC86XX_RSTCR_OFFSET (0xe00b0) /* Reset Control Register */ |
52 | 20 | ||
53 | #endif /* __MPC8641_HPCN_H__ */ | 21 | #endif /* __MPC8641_HPCN_H__ */ |
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c index ebae73eb0063..0b1b52168bb7 100644 --- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c +++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | |||
@@ -37,6 +37,14 @@ | |||
37 | #include "mpc86xx.h" | 37 | #include "mpc86xx.h" |
38 | #include "mpc8641_hpcn.h" | 38 | #include "mpc8641_hpcn.h" |
39 | 39 | ||
40 | #undef DEBUG | ||
41 | |||
42 | #ifdef DEBUG | ||
43 | #define DBG(fmt...) do { printk(KERN_ERR fmt); } while(0) | ||
44 | #else | ||
45 | #define DBG(fmt...) do { } while(0) | ||
46 | #endif | ||
47 | |||
40 | #ifndef CONFIG_PCI | 48 | #ifndef CONFIG_PCI |
41 | unsigned long isa_io_base = 0; | 49 | unsigned long isa_io_base = 0; |
42 | unsigned long isa_mem_base = 0; | 50 | unsigned long isa_mem_base = 0; |
@@ -44,205 +52,219 @@ unsigned long pci_dram_offset = 0; | |||
44 | #endif | 52 | #endif |
45 | 53 | ||
46 | 54 | ||
47 | /* | 55 | #ifdef CONFIG_PCI |
48 | * Internal interrupts are all Level Sensitive, and Positive Polarity | 56 | static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc, |
49 | */ | 57 | struct pt_regs *regs) |
50 | 58 | { | |
51 | static u_char mpc86xx_hpcn_openpic_initsenses[] __initdata = { | 59 | unsigned int cascade_irq = i8259_irq(regs); |
52 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 0: Reserved */ | 60 | if (cascade_irq != NO_IRQ) |
53 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 1: MCM */ | 61 | generic_handle_irq(cascade_irq, regs); |
54 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 2: DDR DRAM */ | 62 | desc->chip->eoi(irq); |
55 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 3: LBIU */ | 63 | } |
56 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 4: DMA 0 */ | 64 | #endif /* CONFIG_PCI */ |
57 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 5: DMA 1 */ | ||
58 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 6: DMA 2 */ | ||
59 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 7: DMA 3 */ | ||
60 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 8: PCIE1 */ | ||
61 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 9: PCIE2 */ | ||
62 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 10: Reserved */ | ||
63 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 11: Reserved */ | ||
64 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 12: DUART2 */ | ||
65 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 13: TSEC 1 Transmit */ | ||
66 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 14: TSEC 1 Receive */ | ||
67 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 15: TSEC 3 transmit */ | ||
68 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 16: TSEC 3 receive */ | ||
69 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 17: TSEC 3 error */ | ||
70 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 18: TSEC 1 Receive/Transmit Error */ | ||
71 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 19: TSEC 2 Transmit */ | ||
72 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 20: TSEC 2 Receive */ | ||
73 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 21: TSEC 4 transmit */ | ||
74 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 22: TSEC 4 receive */ | ||
75 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 23: TSEC 4 error */ | ||
76 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 24: TSEC 2 Receive/Transmit Error */ | ||
77 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 25: Unused */ | ||
78 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 26: DUART1 */ | ||
79 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 27: I2C */ | ||
80 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 28: Performance Monitor */ | ||
81 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 29: Unused */ | ||
82 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 30: Unused */ | ||
83 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 31: Unused */ | ||
84 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 32: SRIO error/write-port unit */ | ||
85 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 33: SRIO outbound doorbell */ | ||
86 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 34: SRIO inbound doorbell */ | ||
87 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 35: Unused */ | ||
88 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 36: Unused */ | ||
89 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 37: SRIO outbound message unit 1 */ | ||
90 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 38: SRIO inbound message unit 1 */ | ||
91 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 39: SRIO outbound message unit 2 */ | ||
92 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 40: SRIO inbound message unit 2 */ | ||
93 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 41: Unused */ | ||
94 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 42: Unused */ | ||
95 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 43: Unused */ | ||
96 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 44: Unused */ | ||
97 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 45: Unused */ | ||
98 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 46: Unused */ | ||
99 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 47: Unused */ | ||
100 | 0x0, /* External 0: */ | ||
101 | 0x0, /* External 1: */ | ||
102 | 0x0, /* External 2: */ | ||
103 | 0x0, /* External 3: */ | ||
104 | 0x0, /* External 4: */ | ||
105 | 0x0, /* External 5: */ | ||
106 | 0x0, /* External 6: */ | ||
107 | 0x0, /* External 7: */ | ||
108 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 8: Pixis FPGA */ | ||
109 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* External 9: ULI 8259 INTR Cascade */ | ||
110 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 10: Quad ETH PHY */ | ||
111 | 0x0, /* External 11: */ | ||
112 | 0x0, | ||
113 | 0x0, | ||
114 | 0x0, | ||
115 | 0x0, | ||
116 | }; | ||
117 | |||
118 | 65 | ||
119 | void __init | 66 | void __init |
120 | mpc86xx_hpcn_init_irq(void) | 67 | mpc86xx_hpcn_init_irq(void) |
121 | { | 68 | { |
122 | struct mpic *mpic1; | 69 | struct mpic *mpic1; |
123 | phys_addr_t openpic_paddr; | 70 | struct device_node *np; |
71 | struct resource res; | ||
72 | #ifdef CONFIG_PCI | ||
73 | struct device_node *cascade_node = NULL; | ||
74 | int cascade_irq; | ||
75 | #endif | ||
124 | 76 | ||
125 | /* Determine the Physical Address of the OpenPIC regs */ | 77 | /* Determine PIC address. */ |
126 | openpic_paddr = get_immrbase() + MPC86xx_OPENPIC_OFFSET; | 78 | np = of_find_node_by_type(NULL, "open-pic"); |
79 | if (np == NULL) | ||
80 | return; | ||
81 | of_address_to_resource(np, 0, &res); | ||
127 | 82 | ||
128 | /* Alloc mpic structure and per isu has 16 INT entries. */ | 83 | /* Alloc mpic structure and per isu has 16 INT entries. */ |
129 | mpic1 = mpic_alloc(openpic_paddr, | 84 | mpic1 = mpic_alloc(np, res.start, |
130 | MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, | 85 | MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, |
131 | 16, MPC86xx_OPENPIC_IRQ_OFFSET, 0, 250, | 86 | 16, NR_IRQS - 4, |
132 | mpc86xx_hpcn_openpic_initsenses, | ||
133 | sizeof(mpc86xx_hpcn_openpic_initsenses), | ||
134 | " MPIC "); | 87 | " MPIC "); |
135 | BUG_ON(mpic1 == NULL); | 88 | BUG_ON(mpic1 == NULL); |
136 | 89 | ||
90 | mpic_assign_isu(mpic1, 0, res.start + 0x10000); | ||
91 | |||
137 | /* 48 Internal Interrupts */ | 92 | /* 48 Internal Interrupts */ |
138 | mpic_assign_isu(mpic1, 0, openpic_paddr + 0x10200); | 93 | mpic_assign_isu(mpic1, 1, res.start + 0x10200); |
139 | mpic_assign_isu(mpic1, 1, openpic_paddr + 0x10400); | 94 | mpic_assign_isu(mpic1, 2, res.start + 0x10400); |
140 | mpic_assign_isu(mpic1, 2, openpic_paddr + 0x10600); | 95 | mpic_assign_isu(mpic1, 3, res.start + 0x10600); |
141 | 96 | ||
142 | /* 16 External interrupts */ | 97 | /* 16 External interrupts |
143 | mpic_assign_isu(mpic1, 3, openpic_paddr + 0x10000); | 98 | * Moving them from [0 - 15] to [64 - 79] |
99 | */ | ||
100 | mpic_assign_isu(mpic1, 4, res.start + 0x10000); | ||
144 | 101 | ||
145 | mpic_init(mpic1); | 102 | mpic_init(mpic1); |
146 | 103 | ||
147 | #ifdef CONFIG_PCI | 104 | #ifdef CONFIG_PCI |
148 | mpic_setup_cascade(MPC86xx_IRQ_EXT9, i8259_irq_cascade, NULL); | 105 | /* Initialize i8259 controller */ |
149 | i8259_init(0, I8259_OFFSET); | 106 | for_each_node_by_type(np, "interrupt-controller") |
150 | #endif | 107 | if (device_is_compatible(np, "chrp,iic")) { |
151 | } | 108 | cascade_node = np; |
109 | break; | ||
110 | } | ||
111 | if (cascade_node == NULL) { | ||
112 | printk(KERN_DEBUG "mpc86xxhpcn: no ISA interrupt controller\n"); | ||
113 | return; | ||
114 | } | ||
152 | 115 | ||
116 | cascade_irq = irq_of_parse_and_map(cascade_node, 0); | ||
117 | if (cascade_irq == NO_IRQ) { | ||
118 | printk(KERN_ERR "mpc86xxhpcn: failed to map cascade interrupt"); | ||
119 | return; | ||
120 | } | ||
121 | DBG("mpc86xxhpcn: cascade mapped to irq %d\n", cascade_irq); | ||
153 | 122 | ||
123 | i8259_init(cascade_node, 0); | ||
124 | set_irq_chained_handler(cascade_irq, mpc86xx_8259_cascade); | ||
125 | #endif | ||
126 | } | ||
154 | 127 | ||
155 | #ifdef CONFIG_PCI | 128 | #ifdef CONFIG_PCI |
156 | /* | ||
157 | * interrupt routing | ||
158 | */ | ||
159 | 129 | ||
160 | int | 130 | enum pirq{PIRQA = 8, PIRQB, PIRQC, PIRQD, PIRQE, PIRQF, PIRQG, PIRQH}; |
161 | mpc86xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) | 131 | const unsigned char uli1575_irq_route_table[16] = { |
132 | 0, /* 0: Reserved */ | ||
133 | 0x8, /* 1: 0b1000 */ | ||
134 | 0, /* 2: Reserved */ | ||
135 | 0x2, /* 3: 0b0010 */ | ||
136 | 0x4, /* 4: 0b0100 */ | ||
137 | 0x5, /* 5: 0b0101 */ | ||
138 | 0x7, /* 6: 0b0111 */ | ||
139 | 0x6, /* 7: 0b0110 */ | ||
140 | 0, /* 8: Reserved */ | ||
141 | 0x1, /* 9: 0b0001 */ | ||
142 | 0x3, /* 10: 0b0011 */ | ||
143 | 0x9, /* 11: 0b1001 */ | ||
144 | 0xb, /* 12: 0b1011 */ | ||
145 | 0, /* 13: Reserved */ | ||
146 | 0xd, /* 14, 0b1101 */ | ||
147 | 0xf, /* 15, 0b1111 */ | ||
148 | }; | ||
149 | |||
150 | static int __devinit | ||
151 | get_pci_irq_from_of(struct pci_controller *hose, int slot, int pin) | ||
162 | { | 152 | { |
163 | static char pci_irq_table[][4] = { | 153 | struct of_irq oirq; |
164 | /* | 154 | u32 laddr[3]; |
165 | * PCI IDSEL/INTPIN->INTLINE | 155 | struct device_node *hosenode = hose ? hose->arch_data : NULL; |
166 | * A B C D | 156 | |
167 | */ | 157 | if (!hosenode) return -EINVAL; |
168 | {PIRQA, PIRQB, PIRQC, PIRQD}, /* IDSEL 17 -- PCI Slot 1 */ | 158 | |
169 | {PIRQB, PIRQC, PIRQD, PIRQA}, /* IDSEL 18 -- PCI Slot 2 */ | 159 | laddr[0] = (hose->first_busno << 16) | (PCI_DEVFN(slot, 0) << 8); |
170 | {0, 0, 0, 0}, /* IDSEL 19 */ | 160 | laddr[1] = laddr[2] = 0; |
171 | {0, 0, 0, 0}, /* IDSEL 20 */ | 161 | of_irq_map_raw(hosenode, &pin, laddr, &oirq); |
172 | {0, 0, 0, 0}, /* IDSEL 21 */ | 162 | DBG("mpc86xx_hpcn: pci irq addr %x, slot %d, pin %d, irq %d\n", |
173 | {0, 0, 0, 0}, /* IDSEL 22 */ | 163 | laddr[0], slot, pin, oirq.specifier[0]); |
174 | {0, 0, 0, 0}, /* IDSEL 23 */ | 164 | return oirq.specifier[0]; |
175 | {0, 0, 0, 0}, /* IDSEL 24 */ | ||
176 | {0, 0, 0, 0}, /* IDSEL 25 */ | ||
177 | {PIRQD, PIRQA, PIRQB, PIRQC}, /* IDSEL 26 -- PCI Bridge*/ | ||
178 | {PIRQC, 0, 0, 0}, /* IDSEL 27 -- LAN */ | ||
179 | {PIRQE, PIRQF, PIRQH, PIRQ7}, /* IDSEL 28 -- USB 1.1 */ | ||
180 | {PIRQE, PIRQF, PIRQG, 0}, /* IDSEL 29 -- Audio & Modem */ | ||
181 | {PIRQH, 0, 0, 0}, /* IDSEL 30 -- LPC & PMU*/ | ||
182 | {PIRQD, 0, 0, 0}, /* IDSEL 31 -- ATA */ | ||
183 | }; | ||
184 | |||
185 | const long min_idsel = 17, max_idsel = 31, irqs_per_slot = 4; | ||
186 | return PCI_IRQ_TABLE_LOOKUP + I8259_OFFSET; | ||
187 | } | 165 | } |
188 | 166 | ||
189 | static void __devinit quirk_ali1575(struct pci_dev *dev) | 167 | static void __devinit quirk_uli1575(struct pci_dev *dev) |
190 | { | 168 | { |
191 | unsigned short temp; | 169 | unsigned short temp; |
170 | struct pci_controller *hose = pci_bus_to_host(dev->bus); | ||
171 | unsigned char irq2pin[16]; | ||
172 | unsigned long pirq_map_word = 0; | ||
173 | u32 irq; | ||
174 | int i; | ||
175 | |||
176 | /* | ||
177 | * ULI1575 interrupts route setup | ||
178 | */ | ||
179 | memset(irq2pin, 0, 16); /* Initialize default value 0 */ | ||
180 | |||
181 | /* | ||
182 | * PIRQA -> PIRQD mapping read from OF-tree | ||
183 | * | ||
184 | * interrupts for PCI slot0 -- PIRQA / PIRQB / PIRQC / PIRQD | ||
185 | * PCI slot1 -- PIRQB / PIRQC / PIRQD / PIRQA | ||
186 | */ | ||
187 | for (i = 0; i < 4; i++){ | ||
188 | irq = get_pci_irq_from_of(hose, 17, i + 1); | ||
189 | if (irq > 0 && irq < 16) | ||
190 | irq2pin[irq] = PIRQA + i; | ||
191 | else | ||
192 | printk(KERN_WARNING "ULI1575 device" | ||
193 | "(slot %d, pin %d) irq %d is invalid.\n", | ||
194 | 17, i, irq); | ||
195 | } | ||
192 | 196 | ||
193 | /* | 197 | /* |
194 | * ALI1575 interrupts route table setup: | 198 | * PIRQE -> PIRQF mapping set manually |
195 | * | 199 | * |
196 | * IRQ pin IRQ# | 200 | * IRQ pin IRQ# |
197 | * PIRQA ---- 3 | ||
198 | * PIRQB ---- 4 | ||
199 | * PIRQC ---- 5 | ||
200 | * PIRQD ---- 6 | ||
201 | * PIRQE ---- 9 | 201 | * PIRQE ---- 9 |
202 | * PIRQF ---- 10 | 202 | * PIRQF ---- 10 |
203 | * PIRQG ---- 11 | 203 | * PIRQG ---- 11 |
204 | * PIRQH ---- 12 | 204 | * PIRQH ---- 12 |
205 | * | ||
206 | * interrupts for PCI slot0 -- PIRQA / PIRQB / PIRQC / PIRQD | ||
207 | * PCI slot1 -- PIRQB / PIRQC / PIRQD / PIRQA | ||
208 | */ | 205 | */ |
209 | pci_write_config_dword(dev, 0x48, 0xb9317542); | 206 | for (i = 0; i < 4; i++) irq2pin[i + 9] = PIRQE + i; |
207 | |||
208 | /* Set IRQ-PIRQ Mapping to ULI1575 */ | ||
209 | for (i = 0; i < 16; i++) | ||
210 | if (irq2pin[i]) | ||
211 | pirq_map_word |= (uli1575_irq_route_table[i] & 0xf) | ||
212 | << ((irq2pin[i] - PIRQA) * 4); | ||
213 | |||
214 | /* ULI1575 IRQ mapping conf register default value is 0xb9317542 */ | ||
215 | DBG("Setup ULI1575 IRQ mapping configuration register value = 0x%x\n", | ||
216 | pirq_map_word); | ||
217 | pci_write_config_dword(dev, 0x48, pirq_map_word); | ||
218 | |||
219 | #define ULI1575_SET_DEV_IRQ(slot, pin, reg) \ | ||
220 | do { \ | ||
221 | int irq; \ | ||
222 | irq = get_pci_irq_from_of(hose, slot, pin); \ | ||
223 | if (irq > 0 && irq < 16) \ | ||
224 | pci_write_config_byte(dev, reg, irq2pin[irq]); \ | ||
225 | else \ | ||
226 | printk(KERN_WARNING "ULI1575 device" \ | ||
227 | "(slot %d, pin %d) irq %d is invalid.\n", \ | ||
228 | slot, pin, irq); \ | ||
229 | } while(0) | ||
210 | 230 | ||
211 | /* USB 1.1 OHCI controller 1, interrupt: PIRQE */ | 231 | /* USB 1.1 OHCI controller 1, slot 28, pin 1 */ |
212 | pci_write_config_byte(dev, 0x86, 0x0c); | 232 | ULI1575_SET_DEV_IRQ(28, 1, 0x86); |
213 | 233 | ||
214 | /* USB 1.1 OHCI controller 2, interrupt: PIRQF */ | 234 | /* USB 1.1 OHCI controller 2, slot 28, pin 2 */ |
215 | pci_write_config_byte(dev, 0x87, 0x0d); | 235 | ULI1575_SET_DEV_IRQ(28, 2, 0x87); |
216 | 236 | ||
217 | /* USB 1.1 OHCI controller 3, interrupt: PIRQH */ | 237 | /* USB 1.1 OHCI controller 3, slot 28, pin 3 */ |
218 | pci_write_config_byte(dev, 0x88, 0x0f); | 238 | ULI1575_SET_DEV_IRQ(28, 3, 0x88); |
219 | 239 | ||
220 | /* USB 2.0 controller, interrupt: PIRQ7 */ | 240 | /* USB 2.0 controller, slot 28, pin 4 */ |
221 | pci_write_config_byte(dev, 0x74, 0x06); | 241 | irq = get_pci_irq_from_of(hose, 28, 4); |
242 | if (irq >= 0 && irq <=15) | ||
243 | pci_write_config_dword(dev, 0x74, uli1575_irq_route_table[irq]); | ||
222 | 244 | ||
223 | /* Audio controller, interrupt: PIRQE */ | 245 | /* Audio controller, slot 29, pin 1 */ |
224 | pci_write_config_byte(dev, 0x8a, 0x0c); | 246 | ULI1575_SET_DEV_IRQ(29, 1, 0x8a); |
225 | 247 | ||
226 | /* Modem controller, interrupt: PIRQF */ | 248 | /* Modem controller, slot 29, pin 2 */ |
227 | pci_write_config_byte(dev, 0x8b, 0x0d); | 249 | ULI1575_SET_DEV_IRQ(29, 2, 0x8b); |
228 | 250 | ||
229 | /* HD audio controller, interrupt: PIRQG */ | 251 | /* HD audio controller, slot 29, pin 3 */ |
230 | pci_write_config_byte(dev, 0x8c, 0x0e); | 252 | ULI1575_SET_DEV_IRQ(29, 3, 0x8c); |
231 | 253 | ||
232 | /* Serial ATA interrupt: PIRQD */ | 254 | /* SMB interrupt: slot 30, pin 1 */ |
233 | pci_write_config_byte(dev, 0x8d, 0x0b); | 255 | ULI1575_SET_DEV_IRQ(30, 1, 0x8e); |
234 | 256 | ||
235 | /* SMB interrupt: PIRQH */ | 257 | /* PMU ACPI SCI interrupt: slot 30, pin 2 */ |
236 | pci_write_config_byte(dev, 0x8e, 0x0f); | 258 | ULI1575_SET_DEV_IRQ(30, 2, 0x8f); |
237 | 259 | ||
238 | /* PMU ACPI SCI interrupt: PIRQH */ | 260 | /* Serial ATA interrupt: slot 31, pin 1 */ |
239 | pci_write_config_byte(dev, 0x8f, 0x0f); | 261 | ULI1575_SET_DEV_IRQ(31, 1, 0x8d); |
240 | 262 | ||
241 | /* Primary PATA IDE IRQ: 14 | 263 | /* Primary PATA IDE IRQ: 14 |
242 | * Secondary PATA IDE IRQ: 15 | 264 | * Secondary PATA IDE IRQ: 15 |
243 | */ | 265 | */ |
244 | pci_write_config_byte(dev, 0x44, 0x3d); | 266 | pci_write_config_byte(dev, 0x44, 0x30 | uli1575_irq_route_table[14]); |
245 | pci_write_config_byte(dev, 0x75, 0x0f); | 267 | pci_write_config_byte(dev, 0x75, uli1575_irq_route_table[15]); |
246 | 268 | ||
247 | /* Set IRQ14 and IRQ15 to legacy IRQs */ | 269 | /* Set IRQ14 and IRQ15 to legacy IRQs */ |
248 | pci_read_config_word(dev, 0x46, &temp); | 270 | pci_read_config_word(dev, 0x46, &temp); |
@@ -264,6 +286,8 @@ static void __devinit quirk_ali1575(struct pci_dev *dev) | |||
264 | */ | 286 | */ |
265 | outb(0xfa, 0x4d0); | 287 | outb(0xfa, 0x4d0); |
266 | outb(0x1e, 0x4d1); | 288 | outb(0x1e, 0x4d1); |
289 | |||
290 | #undef ULI1575_SET_DEV_IRQ | ||
267 | } | 291 | } |
268 | 292 | ||
269 | static void __devinit quirk_uli5288(struct pci_dev *dev) | 293 | static void __devinit quirk_uli5288(struct pci_dev *dev) |
@@ -306,7 +330,7 @@ static void __devinit early_uli5249(struct pci_dev *dev) | |||
306 | dev->class |= 0x1; | 330 | dev->class |= 0x1; |
307 | } | 331 | } |
308 | 332 | ||
309 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575, quirk_ali1575); | 333 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575, quirk_uli1575); |
310 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5288, quirk_uli5288); | 334 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5288, quirk_uli5288); |
311 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229, quirk_uli5229); | 335 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229, quirk_uli5229); |
312 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AL, 0x5249, early_uli5249); | 336 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AL, 0x5249, early_uli5249); |
@@ -337,8 +361,6 @@ mpc86xx_hpcn_setup_arch(void) | |||
337 | for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) | 361 | for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) |
338 | add_bridge(np); | 362 | add_bridge(np); |
339 | 363 | ||
340 | ppc_md.pci_swizzle = common_swizzle; | ||
341 | ppc_md.pci_map_irq = mpc86xx_map_irq; | ||
342 | ppc_md.pci_exclude_device = mpc86xx_exclude_device; | 364 | ppc_md.pci_exclude_device = mpc86xx_exclude_device; |
343 | #endif | 365 | #endif |
344 | 366 | ||
@@ -377,6 +399,15 @@ mpc86xx_hpcn_show_cpuinfo(struct seq_file *m) | |||
377 | } | 399 | } |
378 | 400 | ||
379 | 401 | ||
402 | void __init mpc86xx_hpcn_pcibios_fixup(void) | ||
403 | { | ||
404 | struct pci_dev *dev = NULL; | ||
405 | |||
406 | for_each_pci_dev(dev) | ||
407 | pci_read_irq_line(dev); | ||
408 | } | ||
409 | |||
410 | |||
380 | /* | 411 | /* |
381 | * Called very early, device-tree isn't unflattened | 412 | * Called very early, device-tree isn't unflattened |
382 | */ | 413 | */ |
@@ -431,6 +462,7 @@ define_machine(mpc86xx_hpcn) { | |||
431 | .setup_arch = mpc86xx_hpcn_setup_arch, | 462 | .setup_arch = mpc86xx_hpcn_setup_arch, |
432 | .init_IRQ = mpc86xx_hpcn_init_irq, | 463 | .init_IRQ = mpc86xx_hpcn_init_irq, |
433 | .show_cpuinfo = mpc86xx_hpcn_show_cpuinfo, | 464 | .show_cpuinfo = mpc86xx_hpcn_show_cpuinfo, |
465 | .pcibios_fixup = mpc86xx_hpcn_pcibios_fixup, | ||
434 | .get_irq = mpic_get_irq, | 466 | .get_irq = mpic_get_irq, |
435 | .restart = mpc86xx_restart, | 467 | .restart = mpc86xx_restart, |
436 | .time_init = mpc86xx_time_init, | 468 | .time_init = mpc86xx_time_init, |
diff --git a/arch/powerpc/platforms/86xx/pci.c b/arch/powerpc/platforms/86xx/pci.c index bc5139043112..a8c8f0a44055 100644 --- a/arch/powerpc/platforms/86xx/pci.c +++ b/arch/powerpc/platforms/86xx/pci.c | |||
@@ -188,7 +188,8 @@ int __init add_bridge(struct device_node *dev) | |||
188 | 188 | ||
189 | printk(KERN_INFO "Found MPC86xx PCIE host bridge at 0x%08lx. " | 189 | printk(KERN_INFO "Found MPC86xx PCIE host bridge at 0x%08lx. " |
190 | "Firmware bus number: %d->%d\n", | 190 | "Firmware bus number: %d->%d\n", |
191 | rsrc.start, hose->first_busno, hose->last_busno); | 191 | (unsigned long) rsrc.start, |
192 | hose->first_busno, hose->last_busno); | ||
192 | 193 | ||
193 | DBG(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n", | 194 | DBG(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n", |
194 | hose, hose->cfg_addr, hose->cfg_data); | 195 | hose, hose->cfg_addr, hose->cfg_data); |
diff --git a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c index 538e337d63e2..9c08ff322290 100644 --- a/arch/powerpc/platforms/chrp/setup.c +++ b/arch/powerpc/platforms/chrp/setup.c | |||
@@ -291,10 +291,6 @@ void __init chrp_setup_arch(void) | |||
291 | 291 | ||
292 | pci_create_OF_bus_map(); | 292 | pci_create_OF_bus_map(); |
293 | 293 | ||
294 | #ifdef CONFIG_SMP | ||
295 | smp_ops = &chrp_smp_ops; | ||
296 | #endif /* CONFIG_SMP */ | ||
297 | |||
298 | /* | 294 | /* |
299 | * Print the banner, then scroll down so boot progress | 295 | * Print the banner, then scroll down so boot progress |
300 | * can be printed. -- Cort | 296 | * can be printed. -- Cort |
@@ -479,6 +475,14 @@ void __init chrp_init_IRQ(void) | |||
479 | chrp_find_openpic(); | 475 | chrp_find_openpic(); |
480 | chrp_find_8259(); | 476 | chrp_find_8259(); |
481 | 477 | ||
478 | #ifdef CONFIG_SMP | ||
479 | /* Pegasos has no MPIC, those ops would make it crash. It might be an | ||
480 | * option to move setting them to after we probe the PIC though | ||
481 | */ | ||
482 | if (chrp_mpic != NULL) | ||
483 | smp_ops = &chrp_smp_ops; | ||
484 | #endif /* CONFIG_SMP */ | ||
485 | |||
482 | if (_chrp_type == _CHRP_Pegasos) | 486 | if (_chrp_type == _CHRP_Pegasos) |
483 | ppc_md.get_irq = i8259_irq; | 487 | ppc_md.get_irq = i8259_irq; |
484 | 488 | ||
diff --git a/arch/powerpc/platforms/embedded6xx/Kconfig b/arch/powerpc/platforms/embedded6xx/Kconfig index ba07a9a7c039..234a861870a8 100644 --- a/arch/powerpc/platforms/embedded6xx/Kconfig +++ b/arch/powerpc/platforms/embedded6xx/Kconfig | |||
@@ -80,6 +80,7 @@ config MPC7448HPC2 | |||
80 | select DEFAULT_UIMAGE | 80 | select DEFAULT_UIMAGE |
81 | select PPC_UDBG_16550 | 81 | select PPC_UDBG_16550 |
82 | select MPIC | 82 | select MPIC |
83 | select MPIC_WEIRD | ||
83 | help | 84 | help |
84 | Select MPC7448HPC2 if configuring for Freescale MPC7448HPC2 (Taiga) | 85 | Select MPC7448HPC2 if configuring for Freescale MPC7448HPC2 (Taiga) |
85 | platform | 86 | platform |
diff --git a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c index d7a4fc7ca238..5d393eb94935 100644 --- a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c +++ b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * mpc7448_hpc2.c | 2 | * mpc7448_hpc2.c |
3 | * | 3 | * |
4 | * Board setup routines for the Freescale Taiga platform | 4 | * Board setup routines for the Freescale mpc7448hpc2(taiga) platform |
5 | * | 5 | * |
6 | * Author: Jacob Pan | 6 | * Author: Jacob Pan |
7 | * jacob.pan@freescale.com | 7 | * jacob.pan@freescale.com |
@@ -12,10 +12,10 @@ | |||
12 | * | 12 | * |
13 | * Copyright 2004-2006 Freescale Semiconductor, Inc. | 13 | * Copyright 2004-2006 Freescale Semiconductor, Inc. |
14 | * | 14 | * |
15 | * This file is licensed under | 15 | * This program is free software; you can redistribute it and/or |
16 | * the terms of the GNU General Public License version 2. This program | 16 | * modify it under the terms of the GNU General Public License |
17 | * is licensed "as is" without any warranty of any kind, whether express | 17 | * as published by the Free Software Foundation; either version |
18 | * or implied. | 18 | * 2 of the License, or (at your option) any later version. |
19 | */ | 19 | */ |
20 | 20 | ||
21 | #include <linux/config.h> | 21 | #include <linux/config.h> |
@@ -62,43 +62,8 @@ pci_dram_offset = MPC7448_HPC2_PCI_MEM_OFFSET; | |||
62 | extern int tsi108_setup_pci(struct device_node *dev); | 62 | extern int tsi108_setup_pci(struct device_node *dev); |
63 | extern void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val); | 63 | extern void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val); |
64 | extern void tsi108_pci_int_init(void); | 64 | extern void tsi108_pci_int_init(void); |
65 | extern int tsi108_irq_cascade(struct pt_regs *regs, void *unused); | 65 | extern void tsi108_irq_cascade(unsigned int irq, struct irq_desc *desc, |
66 | 66 | struct pt_regs *regs); | |
67 | /* | ||
68 | * Define all of the IRQ senses and polarities. Taken from the | ||
69 | * mpc7448hpc manual. | ||
70 | * Note: Likely, this table and the following function should be | ||
71 | * obtained and derived from the OF Device Tree. | ||
72 | */ | ||
73 | |||
74 | static u_char mpc7448_hpc2_pic_initsenses[] __initdata = { | ||
75 | /* External on-board sources */ | ||
76 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[0] XINT0 from FPGA */ | ||
77 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[1] XINT1 from FPGA */ | ||
78 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[2] PHY_INT from both GIGE */ | ||
79 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* INT[3] RESERVED */ | ||
80 | /* Internal Tsi108/109 interrupt sources */ | ||
81 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */ | ||
82 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */ | ||
83 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */ | ||
84 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */ | ||
85 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA0 */ | ||
86 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA1 */ | ||
87 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA2 */ | ||
88 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* DMA3 */ | ||
89 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* UART0 */ | ||
90 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* UART1 */ | ||
91 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* I2C */ | ||
92 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* GPIO */ | ||
93 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* GIGE0 */ | ||
94 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* GIGE1 */ | ||
95 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */ | ||
96 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* HLP */ | ||
97 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* SDC */ | ||
98 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Processor IF */ | ||
99 | (IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE), /* Reserved IRQ */ | ||
100 | (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* PCI/X block */ | ||
101 | }; | ||
102 | 67 | ||
103 | int mpc7448_hpc2_exclude_device(u_char bus, u_char devfn) | 68 | int mpc7448_hpc2_exclude_device(u_char bus, u_char devfn) |
104 | { | 69 | { |
@@ -229,6 +194,8 @@ static void __init mpc7448_hpc2_init_IRQ(void) | |||
229 | { | 194 | { |
230 | struct mpic *mpic; | 195 | struct mpic *mpic; |
231 | phys_addr_t mpic_paddr = 0; | 196 | phys_addr_t mpic_paddr = 0; |
197 | unsigned int cascade_pci_irq; | ||
198 | struct device_node *tsi_pci; | ||
232 | struct device_node *tsi_pic; | 199 | struct device_node *tsi_pic; |
233 | 200 | ||
234 | tsi_pic = of_find_node_by_type(NULL, "open-pic"); | 201 | tsi_pic = of_find_node_by_type(NULL, "open-pic"); |
@@ -246,24 +213,31 @@ static void __init mpc7448_hpc2_init_IRQ(void) | |||
246 | DBG("%s: tsi108pic phys_addr = 0x%x\n", __FUNCTION__, | 213 | DBG("%s: tsi108pic phys_addr = 0x%x\n", __FUNCTION__, |
247 | (u32) mpic_paddr); | 214 | (u32) mpic_paddr); |
248 | 215 | ||
249 | mpic = mpic_alloc(mpic_paddr, | 216 | mpic = mpic_alloc(tsi_pic, mpic_paddr, |
250 | MPIC_PRIMARY | MPIC_BIG_ENDIAN | MPIC_WANTS_RESET | | 217 | MPIC_PRIMARY | MPIC_BIG_ENDIAN | MPIC_WANTS_RESET | |
251 | MPIC_SPV_EOI | MPIC_MOD_ID(MPIC_ID_TSI108), | 218 | MPIC_SPV_EOI | MPIC_NO_PTHROU_DIS | MPIC_REGSET_TSI108, |
252 | 0, /* num_sources used */ | 219 | 0, /* num_sources used */ |
253 | TSI108_IRQ_BASE, | ||
254 | 0, /* num_sources used */ | 220 | 0, /* num_sources used */ |
255 | NR_IRQS - 4 /* XXXX */, | 221 | "Tsi108_PIC"); |
256 | mpc7448_hpc2_pic_initsenses, | ||
257 | sizeof(mpc7448_hpc2_pic_initsenses), "Tsi108_PIC"); | ||
258 | 222 | ||
259 | BUG_ON(mpic == NULL); /* XXXX */ | 223 | BUG_ON(mpic == NULL); /* XXXX */ |
260 | |||
261 | mpic_init(mpic); | 224 | mpic_init(mpic); |
262 | mpic_setup_cascade(IRQ_TSI108_PCI, tsi108_irq_cascade, mpic); | 225 | |
226 | tsi_pci = of_find_node_by_type(NULL, "pci"); | ||
227 | if (tsi_pci == 0) { | ||
228 | printk("%s: No tsi108 pci node found !\n", __FUNCTION__); | ||
229 | return; | ||
230 | } | ||
231 | |||
232 | cascade_pci_irq = irq_of_parse_and_map(tsi_pci, 0); | ||
233 | set_irq_data(cascade_pci_irq, mpic); | ||
234 | set_irq_chained_handler(cascade_pci_irq, tsi108_irq_cascade); | ||
235 | |||
263 | tsi108_pci_int_init(); | 236 | tsi108_pci_int_init(); |
264 | 237 | ||
265 | /* Configure MPIC outputs to CPU0 */ | 238 | /* Configure MPIC outputs to CPU0 */ |
266 | tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0); | 239 | tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0); |
240 | of_node_put(tsi_pic); | ||
267 | } | 241 | } |
268 | 242 | ||
269 | void mpc7448_hpc2_show_cpuinfo(struct seq_file *m) | 243 | void mpc7448_hpc2_show_cpuinfo(struct seq_file *m) |
@@ -320,6 +294,7 @@ static int mpc7448_machine_check_exception(struct pt_regs *regs) | |||
320 | return 0; | 294 | return 0; |
321 | 295 | ||
322 | } | 296 | } |
297 | |||
323 | define_machine(mpc7448_hpc2){ | 298 | define_machine(mpc7448_hpc2){ |
324 | .name = "MPC7448 HPC2", | 299 | .name = "MPC7448 HPC2", |
325 | .probe = mpc7448_hpc2_probe, | 300 | .probe = mpc7448_hpc2_probe, |
diff --git a/arch/powerpc/platforms/maple/setup.c b/arch/powerpc/platforms/maple/setup.c index cb528c9de4c3..57567dfb9819 100644 --- a/arch/powerpc/platforms/maple/setup.c +++ b/arch/powerpc/platforms/maple/setup.c | |||
@@ -221,10 +221,17 @@ static void __init maple_init_IRQ(void) | |||
221 | * in Maple device-tree where the type of the controller is | 221 | * in Maple device-tree where the type of the controller is |
222 | * open-pic and not interrupt-controller | 222 | * open-pic and not interrupt-controller |
223 | */ | 223 | */ |
224 | for_each_node_by_type(np, "open-pic") { | 224 | |
225 | mpic_node = np; | 225 | for_each_node_by_type(np, "interrupt-controller") |
226 | break; | 226 | if (device_is_compatible(np, "open-pic")) { |
227 | } | 227 | mpic_node = np; |
228 | break; | ||
229 | } | ||
230 | if (mpic_node == NULL) | ||
231 | for_each_node_by_type(np, "open-pic") { | ||
232 | mpic_node = np; | ||
233 | break; | ||
234 | } | ||
228 | if (mpic_node == NULL) { | 235 | if (mpic_node == NULL) { |
229 | printk(KERN_ERR | 236 | printk(KERN_ERR |
230 | "Failed to locate the MPIC interrupt controller\n"); | 237 | "Failed to locate the MPIC interrupt controller\n"); |
@@ -252,6 +259,8 @@ static void __init maple_init_IRQ(void) | |||
252 | 259 | ||
253 | /* XXX Maple specific bits */ | 260 | /* XXX Maple specific bits */ |
254 | flags |= MPIC_BROKEN_U3 | MPIC_WANTS_RESET; | 261 | flags |= MPIC_BROKEN_U3 | MPIC_WANTS_RESET; |
262 | /* All U3/U4 are big-endian, older SLOF firmware doesn't encode this */ | ||
263 | flags |= MPIC_BIG_ENDIAN; | ||
255 | 264 | ||
256 | /* Setup the openpic driver. More device-tree junks, we hard code no | 265 | /* Setup the openpic driver. More device-tree junks, we hard code no |
257 | * ISUs for now. I'll have to revisit some stuffs with the folks doing | 266 | * ISUs for now. I'll have to revisit some stuffs with the folks doing |
diff --git a/arch/powerpc/platforms/powermac/backlight.c b/arch/powerpc/platforms/powermac/backlight.c index 74eed6b74cd6..d66415491055 100644 --- a/arch/powerpc/platforms/powermac/backlight.c +++ b/arch/powerpc/platforms/powermac/backlight.c | |||
@@ -10,19 +10,32 @@ | |||
10 | #include <linux/kernel.h> | 10 | #include <linux/kernel.h> |
11 | #include <linux/fb.h> | 11 | #include <linux/fb.h> |
12 | #include <linux/backlight.h> | 12 | #include <linux/backlight.h> |
13 | #include <linux/adb.h> | ||
14 | #include <linux/pmu.h> | ||
15 | #include <asm/atomic.h> | ||
13 | #include <asm/prom.h> | 16 | #include <asm/prom.h> |
14 | #include <asm/backlight.h> | 17 | #include <asm/backlight.h> |
15 | 18 | ||
16 | #define OLD_BACKLIGHT_MAX 15 | 19 | #define OLD_BACKLIGHT_MAX 15 |
17 | 20 | ||
18 | static void pmac_backlight_key_worker(void *data); | 21 | static void pmac_backlight_key_worker(void *data); |
22 | static void pmac_backlight_set_legacy_worker(void *data); | ||
23 | |||
19 | static DECLARE_WORK(pmac_backlight_key_work, pmac_backlight_key_worker, NULL); | 24 | static DECLARE_WORK(pmac_backlight_key_work, pmac_backlight_key_worker, NULL); |
25 | static DECLARE_WORK(pmac_backlight_set_legacy_work, pmac_backlight_set_legacy_worker, NULL); | ||
20 | 26 | ||
21 | /* Although this variable is used in interrupt context, it makes no sense to | 27 | /* Although these variables are used in interrupt context, it makes no sense to |
22 | * protect it. No user is able to produce enough key events per second and | 28 | * protect them. No user is able to produce enough key events per second and |
23 | * notice the errors that might happen. | 29 | * notice the errors that might happen. |
24 | */ | 30 | */ |
25 | static int pmac_backlight_key_queued; | 31 | static int pmac_backlight_key_queued; |
32 | static int pmac_backlight_set_legacy_queued; | ||
33 | |||
34 | /* The via-pmu code allows the backlight to be grabbed, in which case the | ||
35 | * in-kernel control of the brightness needs to be disabled. This should | ||
36 | * only be used by really old PowerBooks. | ||
37 | */ | ||
38 | static atomic_t kernel_backlight_disabled = ATOMIC_INIT(0); | ||
26 | 39 | ||
27 | /* Protect the pmac_backlight variable */ | 40 | /* Protect the pmac_backlight variable */ |
28 | DEFINE_MUTEX(pmac_backlight_mutex); | 41 | DEFINE_MUTEX(pmac_backlight_mutex); |
@@ -82,6 +95,9 @@ int pmac_backlight_curve_lookup(struct fb_info *info, int value) | |||
82 | 95 | ||
83 | static void pmac_backlight_key_worker(void *data) | 96 | static void pmac_backlight_key_worker(void *data) |
84 | { | 97 | { |
98 | if (atomic_read(&kernel_backlight_disabled)) | ||
99 | return; | ||
100 | |||
85 | mutex_lock(&pmac_backlight_mutex); | 101 | mutex_lock(&pmac_backlight_mutex); |
86 | if (pmac_backlight) { | 102 | if (pmac_backlight) { |
87 | struct backlight_properties *props; | 103 | struct backlight_properties *props; |
@@ -107,8 +123,12 @@ static void pmac_backlight_key_worker(void *data) | |||
107 | mutex_unlock(&pmac_backlight_mutex); | 123 | mutex_unlock(&pmac_backlight_mutex); |
108 | } | 124 | } |
109 | 125 | ||
126 | /* This function is called in interrupt context */ | ||
110 | void pmac_backlight_key(int direction) | 127 | void pmac_backlight_key(int direction) |
111 | { | 128 | { |
129 | if (atomic_read(&kernel_backlight_disabled)) | ||
130 | return; | ||
131 | |||
112 | /* we can receive multiple interrupts here, but the scheduled work | 132 | /* we can receive multiple interrupts here, but the scheduled work |
113 | * will run only once, with the last value | 133 | * will run only once, with the last value |
114 | */ | 134 | */ |
@@ -116,7 +136,7 @@ void pmac_backlight_key(int direction) | |||
116 | schedule_work(&pmac_backlight_key_work); | 136 | schedule_work(&pmac_backlight_key_work); |
117 | } | 137 | } |
118 | 138 | ||
119 | int pmac_backlight_set_legacy_brightness(int brightness) | 139 | static int __pmac_backlight_set_legacy_brightness(int brightness) |
120 | { | 140 | { |
121 | int error = -ENXIO; | 141 | int error = -ENXIO; |
122 | 142 | ||
@@ -145,6 +165,28 @@ int pmac_backlight_set_legacy_brightness(int brightness) | |||
145 | return error; | 165 | return error; |
146 | } | 166 | } |
147 | 167 | ||
168 | static void pmac_backlight_set_legacy_worker(void *data) | ||
169 | { | ||
170 | if (atomic_read(&kernel_backlight_disabled)) | ||
171 | return; | ||
172 | |||
173 | __pmac_backlight_set_legacy_brightness(pmac_backlight_set_legacy_queued); | ||
174 | } | ||
175 | |||
176 | /* This function is called in interrupt context */ | ||
177 | void pmac_backlight_set_legacy_brightness_pmu(int brightness) { | ||
178 | if (atomic_read(&kernel_backlight_disabled)) | ||
179 | return; | ||
180 | |||
181 | pmac_backlight_set_legacy_queued = brightness; | ||
182 | schedule_work(&pmac_backlight_set_legacy_work); | ||
183 | } | ||
184 | |||
185 | int pmac_backlight_set_legacy_brightness(int brightness) | ||
186 | { | ||
187 | return __pmac_backlight_set_legacy_brightness(brightness); | ||
188 | } | ||
189 | |||
148 | int pmac_backlight_get_legacy_brightness() | 190 | int pmac_backlight_get_legacy_brightness() |
149 | { | 191 | { |
150 | int result = -ENXIO; | 192 | int result = -ENXIO; |
@@ -167,6 +209,16 @@ int pmac_backlight_get_legacy_brightness() | |||
167 | return result; | 209 | return result; |
168 | } | 210 | } |
169 | 211 | ||
212 | void pmac_backlight_disable() | ||
213 | { | ||
214 | atomic_inc(&kernel_backlight_disabled); | ||
215 | } | ||
216 | |||
217 | void pmac_backlight_enable() | ||
218 | { | ||
219 | atomic_dec(&kernel_backlight_disabled); | ||
220 | } | ||
221 | |||
170 | EXPORT_SYMBOL_GPL(pmac_backlight); | 222 | EXPORT_SYMBOL_GPL(pmac_backlight); |
171 | EXPORT_SYMBOL_GPL(pmac_backlight_mutex); | 223 | EXPORT_SYMBOL_GPL(pmac_backlight_mutex); |
172 | EXPORT_SYMBOL_GPL(pmac_has_backlight_type); | 224 | EXPORT_SYMBOL_GPL(pmac_has_backlight_type); |
diff --git a/arch/powerpc/platforms/powermac/bootx_init.c b/arch/powerpc/platforms/powermac/bootx_init.c index 871b002c9f90..9d73d0234c5d 100644 --- a/arch/powerpc/platforms/powermac/bootx_init.c +++ b/arch/powerpc/platforms/powermac/bootx_init.c | |||
@@ -181,13 +181,18 @@ static void __init bootx_add_chosen_props(unsigned long base, | |||
181 | } | 181 | } |
182 | 182 | ||
183 | static void __init bootx_add_display_props(unsigned long base, | 183 | static void __init bootx_add_display_props(unsigned long base, |
184 | unsigned long *mem_end) | 184 | unsigned long *mem_end, |
185 | int has_real_node) | ||
185 | { | 186 | { |
186 | boot_infos_t *bi = bootx_info; | 187 | boot_infos_t *bi = bootx_info; |
187 | u32 tmp; | 188 | u32 tmp; |
188 | 189 | ||
189 | bootx_dt_add_prop("linux,boot-display", NULL, 0, mem_end); | 190 | if (has_real_node) { |
190 | bootx_dt_add_prop("linux,opened", NULL, 0, mem_end); | 191 | bootx_dt_add_prop("linux,boot-display", NULL, 0, mem_end); |
192 | bootx_dt_add_prop("linux,opened", NULL, 0, mem_end); | ||
193 | } else | ||
194 | bootx_dt_add_prop("linux,bootx-noscreen", NULL, 0, mem_end); | ||
195 | |||
191 | tmp = bi->dispDeviceDepth; | 196 | tmp = bi->dispDeviceDepth; |
192 | bootx_dt_add_prop("linux,bootx-depth", &tmp, 4, mem_end); | 197 | bootx_dt_add_prop("linux,bootx-depth", &tmp, 4, mem_end); |
193 | tmp = bi->dispDeviceRect[2] - bi->dispDeviceRect[0]; | 198 | tmp = bi->dispDeviceRect[2] - bi->dispDeviceRect[0]; |
@@ -241,11 +246,6 @@ static void __init bootx_scan_dt_build_strings(unsigned long base, | |||
241 | DBG(" detected display ! adding properties names !\n"); | 246 | DBG(" detected display ! adding properties names !\n"); |
242 | bootx_dt_add_string("linux,boot-display", mem_end); | 247 | bootx_dt_add_string("linux,boot-display", mem_end); |
243 | bootx_dt_add_string("linux,opened", mem_end); | 248 | bootx_dt_add_string("linux,opened", mem_end); |
244 | bootx_dt_add_string("linux,bootx-depth", mem_end); | ||
245 | bootx_dt_add_string("linux,bootx-width", mem_end); | ||
246 | bootx_dt_add_string("linux,bootx-height", mem_end); | ||
247 | bootx_dt_add_string("linux,bootx-linebytes", mem_end); | ||
248 | bootx_dt_add_string("linux,bootx-addr", mem_end); | ||
249 | strncpy(bootx_disp_path, namep, 255); | 249 | strncpy(bootx_disp_path, namep, 255); |
250 | } | 250 | } |
251 | 251 | ||
@@ -329,10 +329,13 @@ static void __init bootx_scan_dt_build_struct(unsigned long base, | |||
329 | ppp = &pp->next; | 329 | ppp = &pp->next; |
330 | } | 330 | } |
331 | 331 | ||
332 | if (node == bootx_node_chosen) | 332 | if (node == bootx_node_chosen) { |
333 | bootx_add_chosen_props(base, mem_end); | 333 | bootx_add_chosen_props(base, mem_end); |
334 | if (node == bootx_info->dispDeviceRegEntryOffset) | 334 | if (bootx_info->dispDeviceRegEntryOffset == 0) |
335 | bootx_add_display_props(base, mem_end); | 335 | bootx_add_display_props(base, mem_end, 0); |
336 | } | ||
337 | else if (node == bootx_info->dispDeviceRegEntryOffset) | ||
338 | bootx_add_display_props(base, mem_end, 1); | ||
336 | 339 | ||
337 | /* do all our children */ | 340 | /* do all our children */ |
338 | cpp = &np->child; | 341 | cpp = &np->child; |
@@ -374,6 +377,14 @@ static unsigned long __init bootx_flatten_dt(unsigned long start) | |||
374 | mem_end += 4; | 377 | mem_end += 4; |
375 | bootx_dt_strend = mem_end; | 378 | bootx_dt_strend = mem_end; |
376 | bootx_scan_dt_build_strings(base, 4, &mem_end); | 379 | bootx_scan_dt_build_strings(base, 4, &mem_end); |
380 | /* Add some strings */ | ||
381 | bootx_dt_add_string("linux,bootx-noscreen", &mem_end); | ||
382 | bootx_dt_add_string("linux,bootx-depth", &mem_end); | ||
383 | bootx_dt_add_string("linux,bootx-width", &mem_end); | ||
384 | bootx_dt_add_string("linux,bootx-height", &mem_end); | ||
385 | bootx_dt_add_string("linux,bootx-linebytes", &mem_end); | ||
386 | bootx_dt_add_string("linux,bootx-addr", &mem_end); | ||
387 | /* Wrap up strings */ | ||
377 | hdr->off_dt_strings = bootx_dt_strbase - mem_start; | 388 | hdr->off_dt_strings = bootx_dt_strbase - mem_start; |
378 | hdr->dt_strings_size = bootx_dt_strend - bootx_dt_strbase; | 389 | hdr->dt_strings_size = bootx_dt_strend - bootx_dt_strbase; |
379 | 390 | ||
@@ -400,8 +411,15 @@ static unsigned long __init bootx_flatten_dt(unsigned long start) | |||
400 | DBG("End of boot params: %x\n", mem_end); | 411 | DBG("End of boot params: %x\n", mem_end); |
401 | rsvmap[0] = mem_start; | 412 | rsvmap[0] = mem_start; |
402 | rsvmap[1] = mem_end; | 413 | rsvmap[1] = mem_end; |
403 | rsvmap[2] = 0; | 414 | if (bootx_info->ramDisk) { |
404 | rsvmap[3] = 0; | 415 | rsvmap[2] = ((unsigned long)bootx_info) + bootx_info->ramDisk; |
416 | rsvmap[3] = rsvmap[2] + bootx_info->ramDiskSize; | ||
417 | rsvmap[4] = 0; | ||
418 | rsvmap[5] = 0; | ||
419 | } else { | ||
420 | rsvmap[2] = 0; | ||
421 | rsvmap[3] = 0; | ||
422 | } | ||
405 | 423 | ||
406 | return (unsigned long)hdr; | 424 | return (unsigned long)hdr; |
407 | } | 425 | } |
@@ -471,6 +489,7 @@ void __init bootx_init(unsigned long r3, unsigned long r4) | |||
471 | if (bi->dispDeviceDepth == 16) | 489 | if (bi->dispDeviceDepth == 16) |
472 | bi->dispDeviceDepth = 15; | 490 | bi->dispDeviceDepth = 15; |
473 | 491 | ||
492 | |||
474 | #ifdef CONFIG_BOOTX_TEXT | 493 | #ifdef CONFIG_BOOTX_TEXT |
475 | ptr = (unsigned long)bi->logicalDisplayBase; | 494 | ptr = (unsigned long)bi->logicalDisplayBase; |
476 | ptr += bi->dispDeviceRect[1] * bi->dispDeviceRowBytes; | 495 | ptr += bi->dispDeviceRect[1] * bi->dispDeviceRowBytes; |
@@ -508,6 +527,7 @@ void __init bootx_init(unsigned long r3, unsigned long r4) | |||
508 | #ifdef CONFIG_BOOTX_TEXT | 527 | #ifdef CONFIG_BOOTX_TEXT |
509 | btext_welcome(bi); | 528 | btext_welcome(bi); |
510 | #endif | 529 | #endif |
530 | |||
511 | /* New BootX enters kernel with MMU off, i/os are not allowed | 531 | /* New BootX enters kernel with MMU off, i/os are not allowed |
512 | * here. This hack will have been done by the boostrap anyway. | 532 | * here. This hack will have been done by the boostrap anyway. |
513 | */ | 533 | */ |
@@ -530,12 +550,12 @@ void __init bootx_init(unsigned long r3, unsigned long r4) | |||
530 | */ | 550 | */ |
531 | if (bi->version < 5) { | 551 | if (bi->version < 5) { |
532 | space = bi->deviceTreeOffset + bi->deviceTreeSize; | 552 | space = bi->deviceTreeOffset + bi->deviceTreeSize; |
533 | if (bi->ramDisk) | 553 | if (bi->ramDisk >= space) |
534 | space = bi->ramDisk + bi->ramDiskSize; | 554 | space = bi->ramDisk + bi->ramDiskSize; |
535 | } else | 555 | } else |
536 | space = bi->totalParamsSize; | 556 | space = bi->totalParamsSize; |
537 | 557 | ||
538 | bootx_printf("Total space used by parameters & ramdisk: %x \n", space); | 558 | bootx_printf("Total space used by parameters & ramdisk: 0x%x \n", space); |
539 | 559 | ||
540 | /* New BootX will have flushed all TLBs and enters kernel with | 560 | /* New BootX will have flushed all TLBs and enters kernel with |
541 | * MMU switched OFF, so this should not be useful anymore. | 561 | * MMU switched OFF, so this should not be useful anymore. |
diff --git a/arch/powerpc/platforms/powermac/cpufreq_64.c b/arch/powerpc/platforms/powermac/cpufreq_64.c index f08a14516139..7b1156ea5341 100644 --- a/arch/powerpc/platforms/powermac/cpufreq_64.c +++ b/arch/powerpc/platforms/powermac/cpufreq_64.c | |||
@@ -10,6 +10,8 @@ | |||
10 | * that is iMac G5 and latest single CPU desktop. | 10 | * that is iMac G5 and latest single CPU desktop. |
11 | */ | 11 | */ |
12 | 12 | ||
13 | #undef DEBUG | ||
14 | |||
13 | #include <linux/module.h> | 15 | #include <linux/module.h> |
14 | #include <linux/types.h> | 16 | #include <linux/types.h> |
15 | #include <linux/errno.h> | 17 | #include <linux/errno.h> |
@@ -30,13 +32,7 @@ | |||
30 | #include <asm/smu.h> | 32 | #include <asm/smu.h> |
31 | #include <asm/pmac_pfunc.h> | 33 | #include <asm/pmac_pfunc.h> |
32 | 34 | ||
33 | #undef DEBUG | 35 | #define DBG(fmt...) pr_debug(fmt) |
34 | |||
35 | #ifdef DEBUG | ||
36 | #define DBG(fmt...) printk(fmt) | ||
37 | #else | ||
38 | #define DBG(fmt...) | ||
39 | #endif | ||
40 | 36 | ||
41 | /* see 970FX user manual */ | 37 | /* see 970FX user manual */ |
42 | 38 | ||
@@ -82,8 +78,6 @@ static struct freq_attr* g5_cpu_freqs_attr[] = { | |||
82 | /* Power mode data is an array of the 32 bits PCR values to use for | 78 | /* Power mode data is an array of the 32 bits PCR values to use for |
83 | * the various frequencies, retrieved from the device-tree | 79 | * the various frequencies, retrieved from the device-tree |
84 | */ | 80 | */ |
85 | static u32 *g5_pmode_data; | ||
86 | static int g5_pmode_max; | ||
87 | static int g5_pmode_cur; | 81 | static int g5_pmode_cur; |
88 | 82 | ||
89 | static void (*g5_switch_volt)(int speed_mode); | 83 | static void (*g5_switch_volt)(int speed_mode); |
@@ -93,6 +87,11 @@ static int (*g5_query_freq)(void); | |||
93 | static DEFINE_MUTEX(g5_switch_mutex); | 87 | static DEFINE_MUTEX(g5_switch_mutex); |
94 | 88 | ||
95 | 89 | ||
90 | #ifdef CONFIG_PMAC_SMU | ||
91 | |||
92 | static u32 *g5_pmode_data; | ||
93 | static int g5_pmode_max; | ||
94 | |||
96 | static struct smu_sdbp_fvt *g5_fvt_table; /* table of op. points */ | 95 | static struct smu_sdbp_fvt *g5_fvt_table; /* table of op. points */ |
97 | static int g5_fvt_count; /* number of op. points */ | 96 | static int g5_fvt_count; /* number of op. points */ |
98 | static int g5_fvt_cur; /* current op. point */ | 97 | static int g5_fvt_cur; /* current op. point */ |
@@ -210,6 +209,16 @@ static int g5_scom_query_freq(void) | |||
210 | } | 209 | } |
211 | 210 | ||
212 | /* | 211 | /* |
212 | * Fake voltage switching for platforms with missing support | ||
213 | */ | ||
214 | |||
215 | static void g5_dummy_switch_volt(int speed_mode) | ||
216 | { | ||
217 | } | ||
218 | |||
219 | #endif /* CONFIG_PMAC_SMU */ | ||
220 | |||
221 | /* | ||
213 | * Platform function based voltage switching for PowerMac7,2 & 7,3 | 222 | * Platform function based voltage switching for PowerMac7,2 & 7,3 |
214 | */ | 223 | */ |
215 | 224 | ||
@@ -248,6 +257,9 @@ static int g5_pfunc_switch_freq(int speed_mode) | |||
248 | struct pmf_args args; | 257 | struct pmf_args args; |
249 | u32 done = 0; | 258 | u32 done = 0; |
250 | unsigned long timeout; | 259 | unsigned long timeout; |
260 | int rc; | ||
261 | |||
262 | DBG("g5_pfunc_switch_freq(%d)\n", speed_mode); | ||
251 | 263 | ||
252 | /* If frequency is going up, first ramp up the voltage */ | 264 | /* If frequency is going up, first ramp up the voltage */ |
253 | if (speed_mode < g5_pmode_cur) | 265 | if (speed_mode < g5_pmode_cur) |
@@ -255,9 +267,12 @@ static int g5_pfunc_switch_freq(int speed_mode) | |||
255 | 267 | ||
256 | /* Do it */ | 268 | /* Do it */ |
257 | if (speed_mode == CPUFREQ_HIGH) | 269 | if (speed_mode == CPUFREQ_HIGH) |
258 | pmf_call_one(pfunc_cpu_setfreq_high, NULL); | 270 | rc = pmf_call_one(pfunc_cpu_setfreq_high, NULL); |
259 | else | 271 | else |
260 | pmf_call_one(pfunc_cpu_setfreq_low, NULL); | 272 | rc = pmf_call_one(pfunc_cpu_setfreq_low, NULL); |
273 | |||
274 | if (rc) | ||
275 | printk(KERN_WARNING "cpufreq: pfunc switch error %d\n", rc); | ||
261 | 276 | ||
262 | /* It's an irq GPIO so we should be able to just block here, | 277 | /* It's an irq GPIO so we should be able to just block here, |
263 | * I'll do that later after I've properly tested the IRQ code for | 278 | * I'll do that later after I've properly tested the IRQ code for |
@@ -296,13 +311,6 @@ static int g5_pfunc_query_freq(void) | |||
296 | return val ? CPUFREQ_HIGH : CPUFREQ_LOW; | 311 | return val ? CPUFREQ_HIGH : CPUFREQ_LOW; |
297 | } | 312 | } |
298 | 313 | ||
299 | /* | ||
300 | * Fake voltage switching for platforms with missing support | ||
301 | */ | ||
302 | |||
303 | static void g5_dummy_switch_volt(int speed_mode) | ||
304 | { | ||
305 | } | ||
306 | 314 | ||
307 | /* | 315 | /* |
308 | * Common interface to the cpufreq core | 316 | * Common interface to the cpufreq core |
@@ -375,6 +383,8 @@ static struct cpufreq_driver g5_cpufreq_driver = { | |||
375 | }; | 383 | }; |
376 | 384 | ||
377 | 385 | ||
386 | #ifdef CONFIG_PMAC_SMU | ||
387 | |||
378 | static int __init g5_neo2_cpufreq_init(struct device_node *cpus) | 388 | static int __init g5_neo2_cpufreq_init(struct device_node *cpus) |
379 | { | 389 | { |
380 | struct device_node *cpunode; | 390 | struct device_node *cpunode; |
@@ -525,6 +535,9 @@ static int __init g5_neo2_cpufreq_init(struct device_node *cpus) | |||
525 | return rc; | 535 | return rc; |
526 | } | 536 | } |
527 | 537 | ||
538 | #endif /* CONFIG_PMAC_SMU */ | ||
539 | |||
540 | |||
528 | static int __init g5_pm72_cpufreq_init(struct device_node *cpus) | 541 | static int __init g5_pm72_cpufreq_init(struct device_node *cpus) |
529 | { | 542 | { |
530 | struct device_node *cpuid = NULL, *hwclock = NULL, *cpunode = NULL; | 543 | struct device_node *cpuid = NULL, *hwclock = NULL, *cpunode = NULL; |
@@ -533,6 +546,9 @@ static int __init g5_pm72_cpufreq_init(struct device_node *cpus) | |||
533 | u64 max_freq, min_freq, ih, il; | 546 | u64 max_freq, min_freq, ih, il; |
534 | int has_volt = 1, rc = 0; | 547 | int has_volt = 1, rc = 0; |
535 | 548 | ||
549 | DBG("cpufreq: Initializing for PowerMac7,2, PowerMac7,3 and" | ||
550 | " RackMac3,1...\n"); | ||
551 | |||
536 | /* Get first CPU node */ | 552 | /* Get first CPU node */ |
537 | for (cpunode = NULL; | 553 | for (cpunode = NULL; |
538 | (cpunode = of_get_next_child(cpus, cpunode)) != NULL;) { | 554 | (cpunode = of_get_next_child(cpus, cpunode)) != NULL;) { |
@@ -636,6 +652,15 @@ static int __init g5_pm72_cpufreq_init(struct device_node *cpus) | |||
636 | */ | 652 | */ |
637 | ih = *((u32 *)(eeprom + 0x10)); | 653 | ih = *((u32 *)(eeprom + 0x10)); |
638 | il = *((u32 *)(eeprom + 0x20)); | 654 | il = *((u32 *)(eeprom + 0x20)); |
655 | |||
656 | /* Check for machines with no useful settings */ | ||
657 | if (il == ih) { | ||
658 | printk(KERN_WARNING "cpufreq: No low frequency mode available" | ||
659 | " on this model !\n"); | ||
660 | rc = -ENODEV; | ||
661 | goto bail; | ||
662 | } | ||
663 | |||
639 | min_freq = 0; | 664 | min_freq = 0; |
640 | if (ih != 0 && il != 0) | 665 | if (ih != 0 && il != 0) |
641 | min_freq = (max_freq * il) / ih; | 666 | min_freq = (max_freq * il) / ih; |
@@ -643,7 +668,7 @@ static int __init g5_pm72_cpufreq_init(struct device_node *cpus) | |||
643 | /* Sanity check */ | 668 | /* Sanity check */ |
644 | if (min_freq >= max_freq || min_freq < 1000) { | 669 | if (min_freq >= max_freq || min_freq < 1000) { |
645 | printk(KERN_ERR "cpufreq: Can't calculate low frequency !\n"); | 670 | printk(KERN_ERR "cpufreq: Can't calculate low frequency !\n"); |
646 | rc = -ENODEV; | 671 | rc = -ENXIO; |
647 | goto bail; | 672 | goto bail; |
648 | } | 673 | } |
649 | g5_cpu_freqs[0].frequency = max_freq; | 674 | g5_cpu_freqs[0].frequency = max_freq; |
@@ -690,16 +715,10 @@ static int __init g5_pm72_cpufreq_init(struct device_node *cpus) | |||
690 | return rc; | 715 | return rc; |
691 | } | 716 | } |
692 | 717 | ||
693 | static int __init g5_rm31_cpufreq_init(struct device_node *cpus) | ||
694 | { | ||
695 | /* NYI */ | ||
696 | return 0; | ||
697 | } | ||
698 | |||
699 | static int __init g5_cpufreq_init(void) | 718 | static int __init g5_cpufreq_init(void) |
700 | { | 719 | { |
701 | struct device_node *cpus; | 720 | struct device_node *cpus; |
702 | int rc; | 721 | int rc = 0; |
703 | 722 | ||
704 | cpus = of_find_node_by_path("/cpus"); | 723 | cpus = of_find_node_by_path("/cpus"); |
705 | if (cpus == NULL) { | 724 | if (cpus == NULL) { |
@@ -708,12 +727,13 @@ static int __init g5_cpufreq_init(void) | |||
708 | } | 727 | } |
709 | 728 | ||
710 | if (machine_is_compatible("PowerMac7,2") || | 729 | if (machine_is_compatible("PowerMac7,2") || |
711 | machine_is_compatible("PowerMac7,3")) | 730 | machine_is_compatible("PowerMac7,3") || |
731 | machine_is_compatible("RackMac3,1")) | ||
712 | rc = g5_pm72_cpufreq_init(cpus); | 732 | rc = g5_pm72_cpufreq_init(cpus); |
713 | else if (machine_is_compatible("RackMac3,1")) | 733 | #ifdef CONFIG_PMAC_SMU |
714 | rc = g5_rm31_cpufreq_init(cpus); | ||
715 | else | 734 | else |
716 | rc = g5_neo2_cpufreq_init(cpus); | 735 | rc = g5_neo2_cpufreq_init(cpus); |
736 | #endif /* CONFIG_PMAC_SMU */ | ||
717 | 737 | ||
718 | of_node_put(cpus); | 738 | of_node_put(cpus); |
719 | return rc; | 739 | return rc; |
diff --git a/arch/powerpc/platforms/powermac/pfunc_base.c b/arch/powerpc/platforms/powermac/pfunc_base.c index 6d66359ec8c8..aacfa59595d1 100644 --- a/arch/powerpc/platforms/powermac/pfunc_base.c +++ b/arch/powerpc/platforms/powermac/pfunc_base.c | |||
@@ -256,7 +256,7 @@ static struct pmf_handlers macio_mmio_handlers = { | |||
256 | .write_reg32 = macio_do_write_reg32, | 256 | .write_reg32 = macio_do_write_reg32, |
257 | .read_reg32 = macio_do_read_reg32, | 257 | .read_reg32 = macio_do_read_reg32, |
258 | .write_reg8 = macio_do_write_reg8, | 258 | .write_reg8 = macio_do_write_reg8, |
259 | .read_reg32 = macio_do_read_reg8, | 259 | .read_reg8 = macio_do_read_reg8, |
260 | .read_reg32_msrx = macio_do_read_reg32_msrx, | 260 | .read_reg32_msrx = macio_do_read_reg32_msrx, |
261 | .read_reg8_msrx = macio_do_read_reg8_msrx, | 261 | .read_reg8_msrx = macio_do_read_reg8_msrx, |
262 | .write_reg32_slm = macio_do_write_reg32_slm, | 262 | .write_reg32_slm = macio_do_write_reg32_slm, |
diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c index 060789e31c67..39f7ddb554ea 100644 --- a/arch/powerpc/platforms/powermac/pic.c +++ b/arch/powerpc/platforms/powermac/pic.c | |||
@@ -87,8 +87,8 @@ static void __pmac_retrigger(unsigned int irq_nr) | |||
87 | static void pmac_mask_and_ack_irq(unsigned int virq) | 87 | static void pmac_mask_and_ack_irq(unsigned int virq) |
88 | { | 88 | { |
89 | unsigned int src = irq_map[virq].hwirq; | 89 | unsigned int src = irq_map[virq].hwirq; |
90 | unsigned long bit = 1UL << (virq & 0x1f); | 90 | unsigned long bit = 1UL << (src & 0x1f); |
91 | int i = virq >> 5; | 91 | int i = src >> 5; |
92 | unsigned long flags; | 92 | unsigned long flags; |
93 | 93 | ||
94 | spin_lock_irqsave(&pmac_pic_lock, flags); | 94 | spin_lock_irqsave(&pmac_pic_lock, flags); |
@@ -175,7 +175,7 @@ static void pmac_mask_irq(unsigned int virq) | |||
175 | 175 | ||
176 | spin_lock_irqsave(&pmac_pic_lock, flags); | 176 | spin_lock_irqsave(&pmac_pic_lock, flags); |
177 | __clear_bit(src, ppc_cached_irq_mask); | 177 | __clear_bit(src, ppc_cached_irq_mask); |
178 | __pmac_set_irq_mask(src, 0); | 178 | __pmac_set_irq_mask(src, 1); |
179 | spin_unlock_irqrestore(&pmac_pic_lock, flags); | 179 | spin_unlock_irqrestore(&pmac_pic_lock, flags); |
180 | } | 180 | } |
181 | 181 | ||
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c index 54a52437265c..31867a701fcb 100644 --- a/arch/powerpc/platforms/pseries/setup.c +++ b/arch/powerpc/platforms/pseries/setup.c | |||
@@ -213,8 +213,6 @@ static void pseries_lpar_enable_pmcs(void) | |||
213 | { | 213 | { |
214 | unsigned long set, reset; | 214 | unsigned long set, reset; |
215 | 215 | ||
216 | power4_enable_pmcs(); | ||
217 | |||
218 | set = 1UL << 63; | 216 | set = 1UL << 63; |
219 | reset = 0; | 217 | reset = 0; |
220 | plpar_hcall_norets(H_PERFMON, set, reset); | 218 | plpar_hcall_norets(H_PERFMON, set, reset); |
@@ -501,7 +499,8 @@ static void pseries_dedicated_idle_sleep(void) | |||
501 | } | 499 | } |
502 | 500 | ||
503 | /* | 501 | /* |
504 | * Cede if the other thread is not idle, so that it can | 502 | * If not SMT, cede processor. If CPU is running SMT |
503 | * cede if the other thread is not idle, so that it can | ||
505 | * go single-threaded. If the other thread is idle, | 504 | * go single-threaded. If the other thread is idle, |
506 | * we ask the hypervisor if it has pending work it | 505 | * we ask the hypervisor if it has pending work it |
507 | * wants to do and cede if it does. Otherwise we keep | 506 | * wants to do and cede if it does. Otherwise we keep |
@@ -514,7 +513,8 @@ static void pseries_dedicated_idle_sleep(void) | |||
514 | * very low priority. The cede enables interrupts, which | 513 | * very low priority. The cede enables interrupts, which |
515 | * doesn't matter here. | 514 | * doesn't matter here. |
516 | */ | 515 | */ |
517 | if (!lppaca[cpu ^ 1].idle || poll_pending() == H_PENDING) | 516 | if (!cpu_has_feature(CPU_FTR_SMT) || !lppaca[cpu ^ 1].idle |
517 | || poll_pending() == H_PENDING) | ||
518 | cede_processor(); | 518 | cede_processor(); |
519 | 519 | ||
520 | out: | 520 | out: |
diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c index 2d0da6f9e244..e98863025721 100644 --- a/arch/powerpc/platforms/pseries/xics.c +++ b/arch/powerpc/platforms/pseries/xics.c | |||
@@ -467,7 +467,7 @@ void xics_setup_cpu(void) | |||
467 | * | 467 | * |
468 | * XXX: undo of teardown on kexec needs this too, as may hotplug | 468 | * XXX: undo of teardown on kexec needs this too, as may hotplug |
469 | */ | 469 | */ |
470 | rtas_set_indicator(GLOBAL_INTERRUPT_QUEUE, | 470 | rtas_set_indicator_fast(GLOBAL_INTERRUPT_QUEUE, |
471 | (1UL << interrupt_server_size) - 1 - default_distrib_server, 1); | 471 | (1UL << interrupt_server_size) - 1 - default_distrib_server, 1); |
472 | } | 472 | } |
473 | 473 | ||
@@ -796,7 +796,7 @@ void xics_teardown_cpu(int secondary) | |||
796 | * so leave the master cpu in the group. | 796 | * so leave the master cpu in the group. |
797 | */ | 797 | */ |
798 | if (secondary) | 798 | if (secondary) |
799 | rtas_set_indicator(GLOBAL_INTERRUPT_QUEUE, | 799 | rtas_set_indicator_fast(GLOBAL_INTERRUPT_QUEUE, |
800 | (1UL << interrupt_server_size) - 1 - | 800 | (1UL << interrupt_server_size) - 1 - |
801 | default_distrib_server, 0); | 801 | default_distrib_server, 0); |
802 | } | 802 | } |
@@ -813,7 +813,7 @@ void xics_migrate_irqs_away(void) | |||
813 | xics_set_cpu_priority(cpu, 0); | 813 | xics_set_cpu_priority(cpu, 0); |
814 | 814 | ||
815 | /* remove ourselves from the global interrupt queue */ | 815 | /* remove ourselves from the global interrupt queue */ |
816 | status = rtas_set_indicator(GLOBAL_INTERRUPT_QUEUE, | 816 | status = rtas_set_indicator_fast(GLOBAL_INTERRUPT_QUEUE, |
817 | (1UL << interrupt_server_size) - 1 - default_distrib_server, 0); | 817 | (1UL << interrupt_server_size) - 1 - default_distrib_server, 0); |
818 | WARN_ON(status < 0); | 818 | WARN_ON(status < 0); |
819 | 819 | ||
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile index cebfae242602..e5e999ea891a 100644 --- a/arch/powerpc/sysdev/Makefile +++ b/arch/powerpc/sysdev/Makefile | |||
@@ -9,11 +9,11 @@ obj-$(CONFIG_BOOKE) += dcr.o | |||
9 | obj-$(CONFIG_40x) += dcr.o | 9 | obj-$(CONFIG_40x) += dcr.o |
10 | obj-$(CONFIG_U3_DART) += dart_iommu.o | 10 | obj-$(CONFIG_U3_DART) += dart_iommu.o |
11 | obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o | 11 | obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o |
12 | obj-$(CONFIG_PPC_83xx) += ipic.o | ||
13 | obj-$(CONFIG_FSL_SOC) += fsl_soc.o | 12 | obj-$(CONFIG_FSL_SOC) += fsl_soc.o |
14 | obj-$(CONFIG_PPC_TODC) += todc.o | 13 | obj-$(CONFIG_PPC_TODC) += todc.o |
15 | obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o | 14 | obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o |
16 | 15 | ||
17 | ifeq ($(CONFIG_PPC_MERGE),y) | 16 | ifeq ($(CONFIG_PPC_MERGE),y) |
18 | obj-$(CONFIG_PPC_I8259) += i8259.o | 17 | obj-$(CONFIG_PPC_I8259) += i8259.o |
19 | endif | 18 | obj-$(CONFIG_PPC_83xx) += ipic.o |
19 | endif | ||
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c index e983972132d8..ef10bcf2d943 100644 --- a/arch/powerpc/sysdev/fsl_soc.c +++ b/arch/powerpc/sysdev/fsl_soc.c | |||
@@ -85,11 +85,8 @@ static int __init gfar_mdio_of_init(void) | |||
85 | mdio_data.irq[k] = -1; | 85 | mdio_data.irq[k] = -1; |
86 | 86 | ||
87 | while ((child = of_get_next_child(np, child)) != NULL) { | 87 | while ((child = of_get_next_child(np, child)) != NULL) { |
88 | if (child->n_intrs) { | 88 | u32 *id = get_property(child, "reg", NULL); |
89 | u32 *id = | 89 | mdio_data.irq[*id] = irq_of_parse_and_map(child, 0); |
90 | (u32 *) get_property(child, "reg", NULL); | ||
91 | mdio_data.irq[*id] = child->intrs[0].line; | ||
92 | } | ||
93 | } | 90 | } |
94 | 91 | ||
95 | ret = | 92 | ret = |
@@ -131,6 +128,7 @@ static int __init gfar_of_init(void) | |||
131 | char *model; | 128 | char *model; |
132 | void *mac_addr; | 129 | void *mac_addr; |
133 | phandle *ph; | 130 | phandle *ph; |
131 | int n_res = 1; | ||
134 | 132 | ||
135 | memset(r, 0, sizeof(r)); | 133 | memset(r, 0, sizeof(r)); |
136 | memset(&gfar_data, 0, sizeof(gfar_data)); | 134 | memset(&gfar_data, 0, sizeof(gfar_data)); |
@@ -139,8 +137,7 @@ static int __init gfar_of_init(void) | |||
139 | if (ret) | 137 | if (ret) |
140 | goto err; | 138 | goto err; |
141 | 139 | ||
142 | r[1].start = np->intrs[0].line; | 140 | r[1].start = r[1].end = irq_of_parse_and_map(np, 0); |
143 | r[1].end = np->intrs[0].line; | ||
144 | r[1].flags = IORESOURCE_IRQ; | 141 | r[1].flags = IORESOURCE_IRQ; |
145 | 142 | ||
146 | model = get_property(np, "model", NULL); | 143 | model = get_property(np, "model", NULL); |
@@ -150,27 +147,35 @@ static int __init gfar_of_init(void) | |||
150 | r[1].name = gfar_tx_intr; | 147 | r[1].name = gfar_tx_intr; |
151 | 148 | ||
152 | r[2].name = gfar_rx_intr; | 149 | r[2].name = gfar_rx_intr; |
153 | r[2].start = np->intrs[1].line; | 150 | r[2].start = r[2].end = irq_of_parse_and_map(np, 1); |
154 | r[2].end = np->intrs[1].line; | ||
155 | r[2].flags = IORESOURCE_IRQ; | 151 | r[2].flags = IORESOURCE_IRQ; |
156 | 152 | ||
157 | r[3].name = gfar_err_intr; | 153 | r[3].name = gfar_err_intr; |
158 | r[3].start = np->intrs[2].line; | 154 | r[3].start = r[3].end = irq_of_parse_and_map(np, 2); |
159 | r[3].end = np->intrs[2].line; | ||
160 | r[3].flags = IORESOURCE_IRQ; | 155 | r[3].flags = IORESOURCE_IRQ; |
156 | |||
157 | n_res += 2; | ||
161 | } | 158 | } |
162 | 159 | ||
163 | gfar_dev = | 160 | gfar_dev = |
164 | platform_device_register_simple("fsl-gianfar", i, &r[0], | 161 | platform_device_register_simple("fsl-gianfar", i, &r[0], |
165 | np->n_intrs + 1); | 162 | n_res + 1); |
166 | 163 | ||
167 | if (IS_ERR(gfar_dev)) { | 164 | if (IS_ERR(gfar_dev)) { |
168 | ret = PTR_ERR(gfar_dev); | 165 | ret = PTR_ERR(gfar_dev); |
169 | goto err; | 166 | goto err; |
170 | } | 167 | } |
171 | 168 | ||
172 | mac_addr = get_property(np, "address", NULL); | 169 | mac_addr = get_property(np, "local-mac-address", NULL); |
173 | memcpy(gfar_data.mac_addr, mac_addr, 6); | 170 | if (mac_addr == NULL) |
171 | mac_addr = get_property(np, "mac-address", NULL); | ||
172 | if (mac_addr == NULL) { | ||
173 | /* Obsolete */ | ||
174 | mac_addr = get_property(np, "address", NULL); | ||
175 | } | ||
176 | |||
177 | if (mac_addr) | ||
178 | memcpy(gfar_data.mac_addr, mac_addr, 6); | ||
174 | 179 | ||
175 | if (model && !strcasecmp(model, "TSEC")) | 180 | if (model && !strcasecmp(model, "TSEC")) |
176 | gfar_data.device_flags = | 181 | gfar_data.device_flags = |
@@ -251,8 +256,7 @@ static int __init fsl_i2c_of_init(void) | |||
251 | if (ret) | 256 | if (ret) |
252 | goto err; | 257 | goto err; |
253 | 258 | ||
254 | r[1].start = np->intrs[0].line; | 259 | r[1].start = r[1].end = irq_of_parse_and_map(np, 0); |
255 | r[1].end = np->intrs[0].line; | ||
256 | r[1].flags = IORESOURCE_IRQ; | 260 | r[1].flags = IORESOURCE_IRQ; |
257 | 261 | ||
258 | i2c_dev = platform_device_register_simple("fsl-i2c", i, r, 2); | 262 | i2c_dev = platform_device_register_simple("fsl-i2c", i, r, 2); |
@@ -388,8 +392,7 @@ static int __init fsl_usb_of_init(void) | |||
388 | if (ret) | 392 | if (ret) |
389 | goto err; | 393 | goto err; |
390 | 394 | ||
391 | r[1].start = np->intrs[0].line; | 395 | r[1].start = r[1].end = irq_of_parse_and_map(np, 0); |
392 | r[1].end = np->intrs[0].line; | ||
393 | r[1].flags = IORESOURCE_IRQ; | 396 | r[1].flags = IORESOURCE_IRQ; |
394 | 397 | ||
395 | usb_dev_mph = | 398 | usb_dev_mph = |
@@ -437,8 +440,7 @@ static int __init fsl_usb_of_init(void) | |||
437 | if (ret) | 440 | if (ret) |
438 | goto unreg_mph; | 441 | goto unreg_mph; |
439 | 442 | ||
440 | r[1].start = np->intrs[0].line; | 443 | r[1].start = r[1].end = irq_of_parse_and_map(np, 0); |
441 | r[1].end = np->intrs[0].line; | ||
442 | r[1].flags = IORESOURCE_IRQ; | 444 | r[1].flags = IORESOURCE_IRQ; |
443 | 445 | ||
444 | usb_dev_dr = | 446 | usb_dev_dr = |
diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c index 46801f5ec03f..70e707785d49 100644 --- a/arch/powerpc/sysdev/ipic.c +++ b/arch/powerpc/sysdev/ipic.c | |||
@@ -19,15 +19,18 @@ | |||
19 | #include <linux/sched.h> | 19 | #include <linux/sched.h> |
20 | #include <linux/signal.h> | 20 | #include <linux/signal.h> |
21 | #include <linux/sysdev.h> | 21 | #include <linux/sysdev.h> |
22 | #include <linux/device.h> | ||
23 | #include <linux/bootmem.h> | ||
24 | #include <linux/spinlock.h> | ||
22 | #include <asm/irq.h> | 25 | #include <asm/irq.h> |
23 | #include <asm/io.h> | 26 | #include <asm/io.h> |
27 | #include <asm/prom.h> | ||
24 | #include <asm/ipic.h> | 28 | #include <asm/ipic.h> |
25 | #include <asm/mpc83xx.h> | ||
26 | 29 | ||
27 | #include "ipic.h" | 30 | #include "ipic.h" |
28 | 31 | ||
29 | static struct ipic p_ipic; | ||
30 | static struct ipic * primary_ipic; | 32 | static struct ipic * primary_ipic; |
33 | static DEFINE_SPINLOCK(ipic_lock); | ||
31 | 34 | ||
32 | static struct ipic_info ipic_info[] = { | 35 | static struct ipic_info ipic_info[] = { |
33 | [9] = { | 36 | [9] = { |
@@ -373,74 +376,220 @@ static inline void ipic_write(volatile u32 __iomem *base, unsigned int reg, u32 | |||
373 | out_be32(base + (reg >> 2), value); | 376 | out_be32(base + (reg >> 2), value); |
374 | } | 377 | } |
375 | 378 | ||
376 | static inline struct ipic * ipic_from_irq(unsigned int irq) | 379 | static inline struct ipic * ipic_from_irq(unsigned int virq) |
377 | { | 380 | { |
378 | return primary_ipic; | 381 | return primary_ipic; |
379 | } | 382 | } |
380 | 383 | ||
381 | static void ipic_enable_irq(unsigned int irq) | 384 | #define ipic_irq_to_hw(virq) ((unsigned int)irq_map[virq].hwirq) |
385 | |||
386 | static void ipic_unmask_irq(unsigned int virq) | ||
382 | { | 387 | { |
383 | struct ipic *ipic = ipic_from_irq(irq); | 388 | struct ipic *ipic = ipic_from_irq(virq); |
384 | unsigned int src = irq - ipic->irq_offset; | 389 | unsigned int src = ipic_irq_to_hw(virq); |
390 | unsigned long flags; | ||
385 | u32 temp; | 391 | u32 temp; |
386 | 392 | ||
393 | spin_lock_irqsave(&ipic_lock, flags); | ||
394 | |||
387 | temp = ipic_read(ipic->regs, ipic_info[src].mask); | 395 | temp = ipic_read(ipic->regs, ipic_info[src].mask); |
388 | temp |= (1 << (31 - ipic_info[src].bit)); | 396 | temp |= (1 << (31 - ipic_info[src].bit)); |
389 | ipic_write(ipic->regs, ipic_info[src].mask, temp); | 397 | ipic_write(ipic->regs, ipic_info[src].mask, temp); |
398 | |||
399 | spin_unlock_irqrestore(&ipic_lock, flags); | ||
390 | } | 400 | } |
391 | 401 | ||
392 | static void ipic_disable_irq(unsigned int irq) | 402 | static void ipic_mask_irq(unsigned int virq) |
393 | { | 403 | { |
394 | struct ipic *ipic = ipic_from_irq(irq); | 404 | struct ipic *ipic = ipic_from_irq(virq); |
395 | unsigned int src = irq - ipic->irq_offset; | 405 | unsigned int src = ipic_irq_to_hw(virq); |
406 | unsigned long flags; | ||
396 | u32 temp; | 407 | u32 temp; |
397 | 408 | ||
409 | spin_lock_irqsave(&ipic_lock, flags); | ||
410 | |||
398 | temp = ipic_read(ipic->regs, ipic_info[src].mask); | 411 | temp = ipic_read(ipic->regs, ipic_info[src].mask); |
399 | temp &= ~(1 << (31 - ipic_info[src].bit)); | 412 | temp &= ~(1 << (31 - ipic_info[src].bit)); |
400 | ipic_write(ipic->regs, ipic_info[src].mask, temp); | 413 | ipic_write(ipic->regs, ipic_info[src].mask, temp); |
414 | |||
415 | spin_unlock_irqrestore(&ipic_lock, flags); | ||
401 | } | 416 | } |
402 | 417 | ||
403 | static void ipic_disable_irq_and_ack(unsigned int irq) | 418 | static void ipic_ack_irq(unsigned int virq) |
404 | { | 419 | { |
405 | struct ipic *ipic = ipic_from_irq(irq); | 420 | struct ipic *ipic = ipic_from_irq(virq); |
406 | unsigned int src = irq - ipic->irq_offset; | 421 | unsigned int src = ipic_irq_to_hw(virq); |
422 | unsigned long flags; | ||
407 | u32 temp; | 423 | u32 temp; |
408 | 424 | ||
409 | ipic_disable_irq(irq); | 425 | spin_lock_irqsave(&ipic_lock, flags); |
410 | 426 | ||
411 | temp = ipic_read(ipic->regs, ipic_info[src].pend); | 427 | temp = ipic_read(ipic->regs, ipic_info[src].pend); |
412 | temp |= (1 << (31 - ipic_info[src].bit)); | 428 | temp |= (1 << (31 - ipic_info[src].bit)); |
413 | ipic_write(ipic->regs, ipic_info[src].pend, temp); | 429 | ipic_write(ipic->regs, ipic_info[src].pend, temp); |
430 | |||
431 | spin_unlock_irqrestore(&ipic_lock, flags); | ||
414 | } | 432 | } |
415 | 433 | ||
416 | static void ipic_end_irq(unsigned int irq) | 434 | static void ipic_mask_irq_and_ack(unsigned int virq) |
417 | { | 435 | { |
418 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) | 436 | struct ipic *ipic = ipic_from_irq(virq); |
419 | ipic_enable_irq(irq); | 437 | unsigned int src = ipic_irq_to_hw(virq); |
438 | unsigned long flags; | ||
439 | u32 temp; | ||
440 | |||
441 | spin_lock_irqsave(&ipic_lock, flags); | ||
442 | |||
443 | temp = ipic_read(ipic->regs, ipic_info[src].mask); | ||
444 | temp &= ~(1 << (31 - ipic_info[src].bit)); | ||
445 | ipic_write(ipic->regs, ipic_info[src].mask, temp); | ||
446 | |||
447 | temp = ipic_read(ipic->regs, ipic_info[src].pend); | ||
448 | temp |= (1 << (31 - ipic_info[src].bit)); | ||
449 | ipic_write(ipic->regs, ipic_info[src].pend, temp); | ||
450 | |||
451 | spin_unlock_irqrestore(&ipic_lock, flags); | ||
420 | } | 452 | } |
421 | 453 | ||
422 | struct hw_interrupt_type ipic = { | 454 | static int ipic_set_irq_type(unsigned int virq, unsigned int flow_type) |
423 | .typename = " IPIC ", | 455 | { |
424 | .enable = ipic_enable_irq, | 456 | struct ipic *ipic = ipic_from_irq(virq); |
425 | .disable = ipic_disable_irq, | 457 | unsigned int src = ipic_irq_to_hw(virq); |
426 | .ack = ipic_disable_irq_and_ack, | 458 | struct irq_desc *desc = get_irq_desc(virq); |
427 | .end = ipic_end_irq, | 459 | unsigned int vold, vnew, edibit; |
460 | |||
461 | if (flow_type == IRQ_TYPE_NONE) | ||
462 | flow_type = IRQ_TYPE_LEVEL_LOW; | ||
463 | |||
464 | /* ipic supports only low assertion and high-to-low change senses | ||
465 | */ | ||
466 | if (!(flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_EDGE_FALLING))) { | ||
467 | printk(KERN_ERR "ipic: sense type 0x%x not supported\n", | ||
468 | flow_type); | ||
469 | return -EINVAL; | ||
470 | } | ||
471 | |||
472 | desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL); | ||
473 | desc->status |= flow_type & IRQ_TYPE_SENSE_MASK; | ||
474 | if (flow_type & IRQ_TYPE_LEVEL_LOW) { | ||
475 | desc->status |= IRQ_LEVEL; | ||
476 | set_irq_handler(virq, handle_level_irq); | ||
477 | } else { | ||
478 | set_irq_handler(virq, handle_edge_irq); | ||
479 | } | ||
480 | |||
481 | /* only EXT IRQ senses are programmable on ipic | ||
482 | * internal IRQ senses are LEVEL_LOW | ||
483 | */ | ||
484 | if (src == IPIC_IRQ_EXT0) | ||
485 | edibit = 15; | ||
486 | else | ||
487 | if (src >= IPIC_IRQ_EXT1 && src <= IPIC_IRQ_EXT7) | ||
488 | edibit = (14 - (src - IPIC_IRQ_EXT1)); | ||
489 | else | ||
490 | return (flow_type & IRQ_TYPE_LEVEL_LOW) ? 0 : -EINVAL; | ||
491 | |||
492 | vold = ipic_read(ipic->regs, IPIC_SECNR); | ||
493 | if ((flow_type & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_FALLING) { | ||
494 | vnew = vold | (1 << edibit); | ||
495 | } else { | ||
496 | vnew = vold & ~(1 << edibit); | ||
497 | } | ||
498 | if (vold != vnew) | ||
499 | ipic_write(ipic->regs, IPIC_SECNR, vnew); | ||
500 | return 0; | ||
501 | } | ||
502 | |||
503 | static struct irq_chip ipic_irq_chip = { | ||
504 | .typename = " IPIC ", | ||
505 | .unmask = ipic_unmask_irq, | ||
506 | .mask = ipic_mask_irq, | ||
507 | .mask_ack = ipic_mask_irq_and_ack, | ||
508 | .ack = ipic_ack_irq, | ||
509 | .set_type = ipic_set_irq_type, | ||
510 | }; | ||
511 | |||
512 | static int ipic_host_match(struct irq_host *h, struct device_node *node) | ||
513 | { | ||
514 | struct ipic *ipic = h->host_data; | ||
515 | |||
516 | /* Exact match, unless ipic node is NULL */ | ||
517 | return ipic->of_node == NULL || ipic->of_node == node; | ||
518 | } | ||
519 | |||
520 | static int ipic_host_map(struct irq_host *h, unsigned int virq, | ||
521 | irq_hw_number_t hw) | ||
522 | { | ||
523 | struct ipic *ipic = h->host_data; | ||
524 | struct irq_chip *chip; | ||
525 | |||
526 | /* Default chip */ | ||
527 | chip = &ipic->hc_irq; | ||
528 | |||
529 | set_irq_chip_data(virq, ipic); | ||
530 | set_irq_chip_and_handler(virq, chip, handle_level_irq); | ||
531 | |||
532 | /* Set default irq type */ | ||
533 | set_irq_type(virq, IRQ_TYPE_NONE); | ||
534 | |||
535 | return 0; | ||
536 | } | ||
537 | |||
538 | static int ipic_host_xlate(struct irq_host *h, struct device_node *ct, | ||
539 | u32 *intspec, unsigned int intsize, | ||
540 | irq_hw_number_t *out_hwirq, unsigned int *out_flags) | ||
541 | |||
542 | { | ||
543 | /* interrupt sense values coming from the device tree equal either | ||
544 | * LEVEL_LOW (low assertion) or EDGE_FALLING (high-to-low change) | ||
545 | */ | ||
546 | *out_hwirq = intspec[0]; | ||
547 | if (intsize > 1) | ||
548 | *out_flags = intspec[1]; | ||
549 | else | ||
550 | *out_flags = IRQ_TYPE_NONE; | ||
551 | return 0; | ||
552 | } | ||
553 | |||
554 | static struct irq_host_ops ipic_host_ops = { | ||
555 | .match = ipic_host_match, | ||
556 | .map = ipic_host_map, | ||
557 | .xlate = ipic_host_xlate, | ||
428 | }; | 558 | }; |
429 | 559 | ||
430 | void __init ipic_init(phys_addr_t phys_addr, | 560 | void __init ipic_init(struct device_node *node, |
431 | unsigned int flags, | 561 | unsigned int flags) |
432 | unsigned int irq_offset, | ||
433 | unsigned char *senses, | ||
434 | unsigned int senses_count) | ||
435 | { | 562 | { |
436 | u32 i, temp = 0; | 563 | struct ipic *ipic; |
564 | struct resource res; | ||
565 | u32 temp = 0, ret; | ||
566 | |||
567 | ipic = alloc_bootmem(sizeof(struct ipic)); | ||
568 | if (ipic == NULL) | ||
569 | return; | ||
570 | |||
571 | memset(ipic, 0, sizeof(struct ipic)); | ||
572 | ipic->of_node = node ? of_node_get(node) : NULL; | ||
573 | |||
574 | ipic->irqhost = irq_alloc_host(IRQ_HOST_MAP_LINEAR, | ||
575 | NR_IPIC_INTS, | ||
576 | &ipic_host_ops, 0); | ||
577 | if (ipic->irqhost == NULL) { | ||
578 | of_node_put(node); | ||
579 | return; | ||
580 | } | ||
581 | |||
582 | ret = of_address_to_resource(node, 0, &res); | ||
583 | if (ret) | ||
584 | return; | ||
437 | 585 | ||
438 | primary_ipic = &p_ipic; | 586 | ipic->regs = ioremap(res.start, res.end - res.start + 1); |
439 | primary_ipic->regs = ioremap(phys_addr, MPC83xx_IPIC_SIZE); | ||
440 | 587 | ||
441 | primary_ipic->irq_offset = irq_offset; | 588 | ipic->irqhost->host_data = ipic; |
589 | ipic->hc_irq = ipic_irq_chip; | ||
442 | 590 | ||
443 | ipic_write(primary_ipic->regs, IPIC_SICNR, 0x0); | 591 | /* init hw */ |
592 | ipic_write(ipic->regs, IPIC_SICNR, 0x0); | ||
444 | 593 | ||
445 | /* default priority scheme is grouped. If spread mode is required | 594 | /* default priority scheme is grouped. If spread mode is required |
446 | * configure SICFR accordingly */ | 595 | * configure SICFR accordingly */ |
@@ -453,49 +602,35 @@ void __init ipic_init(phys_addr_t phys_addr, | |||
453 | if (flags & IPIC_SPREADMODE_MIX_B) | 602 | if (flags & IPIC_SPREADMODE_MIX_B) |
454 | temp |= SICFR_MPSB; | 603 | temp |= SICFR_MPSB; |
455 | 604 | ||
456 | ipic_write(primary_ipic->regs, IPIC_SICNR, temp); | 605 | ipic_write(ipic->regs, IPIC_SICNR, temp); |
457 | 606 | ||
458 | /* handle MCP route */ | 607 | /* handle MCP route */ |
459 | temp = 0; | 608 | temp = 0; |
460 | if (flags & IPIC_DISABLE_MCP_OUT) | 609 | if (flags & IPIC_DISABLE_MCP_OUT) |
461 | temp = SERCR_MCPR; | 610 | temp = SERCR_MCPR; |
462 | ipic_write(primary_ipic->regs, IPIC_SERCR, temp); | 611 | ipic_write(ipic->regs, IPIC_SERCR, temp); |
463 | 612 | ||
464 | /* handle routing of IRQ0 to MCP */ | 613 | /* handle routing of IRQ0 to MCP */ |
465 | temp = ipic_read(primary_ipic->regs, IPIC_SEMSR); | 614 | temp = ipic_read(ipic->regs, IPIC_SEMSR); |
466 | 615 | ||
467 | if (flags & IPIC_IRQ0_MCP) | 616 | if (flags & IPIC_IRQ0_MCP) |
468 | temp |= SEMSR_SIRQ0; | 617 | temp |= SEMSR_SIRQ0; |
469 | else | 618 | else |
470 | temp &= ~SEMSR_SIRQ0; | 619 | temp &= ~SEMSR_SIRQ0; |
471 | 620 | ||
472 | ipic_write(primary_ipic->regs, IPIC_SEMSR, temp); | 621 | ipic_write(ipic->regs, IPIC_SEMSR, temp); |
473 | 622 | ||
474 | for (i = 0 ; i < NR_IPIC_INTS ; i++) { | 623 | primary_ipic = ipic; |
475 | irq_desc[i+irq_offset].chip = &ipic; | 624 | irq_set_default_host(primary_ipic->irqhost); |
476 | irq_desc[i+irq_offset].status = IRQ_LEVEL; | ||
477 | } | ||
478 | 625 | ||
479 | temp = 0; | 626 | printk ("IPIC (%d IRQ sources) at %p\n", NR_IPIC_INTS, |
480 | for (i = 0 ; i < senses_count ; i++) { | 627 | primary_ipic->regs); |
481 | if ((senses[i] & IRQ_SENSE_MASK) == IRQ_SENSE_EDGE) { | ||
482 | temp |= 1 << (15 - i); | ||
483 | if (i != 0) | ||
484 | irq_desc[i + irq_offset + MPC83xx_IRQ_EXT1 - 1].status = 0; | ||
485 | else | ||
486 | irq_desc[irq_offset + MPC83xx_IRQ_EXT0].status = 0; | ||
487 | } | ||
488 | } | ||
489 | ipic_write(primary_ipic->regs, IPIC_SECNR, temp); | ||
490 | |||
491 | printk ("IPIC (%d IRQ sources, %d External IRQs) at %p\n", NR_IPIC_INTS, | ||
492 | senses_count, primary_ipic->regs); | ||
493 | } | 628 | } |
494 | 629 | ||
495 | int ipic_set_priority(unsigned int irq, unsigned int priority) | 630 | int ipic_set_priority(unsigned int virq, unsigned int priority) |
496 | { | 631 | { |
497 | struct ipic *ipic = ipic_from_irq(irq); | 632 | struct ipic *ipic = ipic_from_irq(virq); |
498 | unsigned int src = irq - ipic->irq_offset; | 633 | unsigned int src = ipic_irq_to_hw(virq); |
499 | u32 temp; | 634 | u32 temp; |
500 | 635 | ||
501 | if (priority > 7) | 636 | if (priority > 7) |
@@ -520,10 +655,10 @@ int ipic_set_priority(unsigned int irq, unsigned int priority) | |||
520 | return 0; | 655 | return 0; |
521 | } | 656 | } |
522 | 657 | ||
523 | void ipic_set_highest_priority(unsigned int irq) | 658 | void ipic_set_highest_priority(unsigned int virq) |
524 | { | 659 | { |
525 | struct ipic *ipic = ipic_from_irq(irq); | 660 | struct ipic *ipic = ipic_from_irq(virq); |
526 | unsigned int src = irq - ipic->irq_offset; | 661 | unsigned int src = ipic_irq_to_hw(virq); |
527 | u32 temp; | 662 | u32 temp; |
528 | 663 | ||
529 | temp = ipic_read(ipic->regs, IPIC_SICFR); | 664 | temp = ipic_read(ipic->regs, IPIC_SICFR); |
@@ -537,37 +672,10 @@ void ipic_set_highest_priority(unsigned int irq) | |||
537 | 672 | ||
538 | void ipic_set_default_priority(void) | 673 | void ipic_set_default_priority(void) |
539 | { | 674 | { |
540 | ipic_set_priority(MPC83xx_IRQ_TSEC1_TX, 0); | 675 | ipic_write(primary_ipic->regs, IPIC_SIPRR_A, IPIC_SIPRR_A_DEFAULT); |
541 | ipic_set_priority(MPC83xx_IRQ_TSEC1_RX, 1); | 676 | ipic_write(primary_ipic->regs, IPIC_SIPRR_D, IPIC_SIPRR_D_DEFAULT); |
542 | ipic_set_priority(MPC83xx_IRQ_TSEC1_ERROR, 2); | 677 | ipic_write(primary_ipic->regs, IPIC_SMPRR_A, IPIC_SMPRR_A_DEFAULT); |
543 | ipic_set_priority(MPC83xx_IRQ_TSEC2_TX, 3); | 678 | ipic_write(primary_ipic->regs, IPIC_SMPRR_B, IPIC_SMPRR_B_DEFAULT); |
544 | ipic_set_priority(MPC83xx_IRQ_TSEC2_RX, 4); | ||
545 | ipic_set_priority(MPC83xx_IRQ_TSEC2_ERROR, 5); | ||
546 | ipic_set_priority(MPC83xx_IRQ_USB2_DR, 6); | ||
547 | ipic_set_priority(MPC83xx_IRQ_USB2_MPH, 7); | ||
548 | |||
549 | ipic_set_priority(MPC83xx_IRQ_UART1, 0); | ||
550 | ipic_set_priority(MPC83xx_IRQ_UART2, 1); | ||
551 | ipic_set_priority(MPC83xx_IRQ_SEC2, 2); | ||
552 | ipic_set_priority(MPC83xx_IRQ_IIC1, 5); | ||
553 | ipic_set_priority(MPC83xx_IRQ_IIC2, 6); | ||
554 | ipic_set_priority(MPC83xx_IRQ_SPI, 7); | ||
555 | ipic_set_priority(MPC83xx_IRQ_RTC_SEC, 0); | ||
556 | ipic_set_priority(MPC83xx_IRQ_PIT, 1); | ||
557 | ipic_set_priority(MPC83xx_IRQ_PCI1, 2); | ||
558 | ipic_set_priority(MPC83xx_IRQ_PCI2, 3); | ||
559 | ipic_set_priority(MPC83xx_IRQ_EXT0, 4); | ||
560 | ipic_set_priority(MPC83xx_IRQ_EXT1, 5); | ||
561 | ipic_set_priority(MPC83xx_IRQ_EXT2, 6); | ||
562 | ipic_set_priority(MPC83xx_IRQ_EXT3, 7); | ||
563 | ipic_set_priority(MPC83xx_IRQ_RTC_ALR, 0); | ||
564 | ipic_set_priority(MPC83xx_IRQ_MU, 1); | ||
565 | ipic_set_priority(MPC83xx_IRQ_SBA, 2); | ||
566 | ipic_set_priority(MPC83xx_IRQ_DMA, 3); | ||
567 | ipic_set_priority(MPC83xx_IRQ_EXT4, 4); | ||
568 | ipic_set_priority(MPC83xx_IRQ_EXT5, 5); | ||
569 | ipic_set_priority(MPC83xx_IRQ_EXT6, 6); | ||
570 | ipic_set_priority(MPC83xx_IRQ_EXT7, 7); | ||
571 | } | 679 | } |
572 | 680 | ||
573 | void ipic_enable_mcp(enum ipic_mcp_irq mcp_irq) | 681 | void ipic_enable_mcp(enum ipic_mcp_irq mcp_irq) |
@@ -600,17 +708,20 @@ void ipic_clear_mcp_status(u32 mask) | |||
600 | ipic_write(primary_ipic->regs, IPIC_SERMR, mask); | 708 | ipic_write(primary_ipic->regs, IPIC_SERMR, mask); |
601 | } | 709 | } |
602 | 710 | ||
603 | /* Return an interrupt vector or -1 if no interrupt is pending. */ | 711 | /* Return an interrupt vector or NO_IRQ if no interrupt is pending. */ |
604 | int ipic_get_irq(struct pt_regs *regs) | 712 | unsigned int ipic_get_irq(struct pt_regs *regs) |
605 | { | 713 | { |
606 | int irq; | 714 | int irq; |
607 | 715 | ||
608 | irq = ipic_read(primary_ipic->regs, IPIC_SIVCR) & 0x7f; | 716 | BUG_ON(primary_ipic == NULL); |
717 | |||
718 | #define IPIC_SIVCR_VECTOR_MASK 0x7f | ||
719 | irq = ipic_read(primary_ipic->regs, IPIC_SIVCR) & IPIC_SIVCR_VECTOR_MASK; | ||
609 | 720 | ||
610 | if (irq == 0) /* 0 --> no irq is pending */ | 721 | if (irq == 0) /* 0 --> no irq is pending */ |
611 | irq = -1; | 722 | return NO_IRQ; |
612 | 723 | ||
613 | return irq; | 724 | return irq_linear_revmap(primary_ipic->irqhost, irq); |
614 | } | 725 | } |
615 | 726 | ||
616 | static struct sysdev_class ipic_sysclass = { | 727 | static struct sysdev_class ipic_sysclass = { |
diff --git a/arch/powerpc/sysdev/ipic.h b/arch/powerpc/sysdev/ipic.h index a60c9d18bb7f..c28e589877eb 100644 --- a/arch/powerpc/sysdev/ipic.h +++ b/arch/powerpc/sysdev/ipic.h | |||
@@ -15,7 +15,18 @@ | |||
15 | 15 | ||
16 | #include <asm/ipic.h> | 16 | #include <asm/ipic.h> |
17 | 17 | ||
18 | #define MPC83xx_IPIC_SIZE (0x00100) | 18 | #define NR_IPIC_INTS 128 |
19 | |||
20 | /* External IRQS */ | ||
21 | #define IPIC_IRQ_EXT0 48 | ||
22 | #define IPIC_IRQ_EXT1 17 | ||
23 | #define IPIC_IRQ_EXT7 23 | ||
24 | |||
25 | /* Default Priority Registers */ | ||
26 | #define IPIC_SIPRR_A_DEFAULT 0x05309770 | ||
27 | #define IPIC_SIPRR_D_DEFAULT 0x05309770 | ||
28 | #define IPIC_SMPRR_A_DEFAULT 0x05309770 | ||
29 | #define IPIC_SMPRR_B_DEFAULT 0x05309770 | ||
19 | 30 | ||
20 | /* System Global Interrupt Configuration Register */ | 31 | /* System Global Interrupt Configuration Register */ |
21 | #define SICFR_IPSA 0x00010000 | 32 | #define SICFR_IPSA 0x00010000 |
@@ -31,7 +42,15 @@ | |||
31 | 42 | ||
32 | struct ipic { | 43 | struct ipic { |
33 | volatile u32 __iomem *regs; | 44 | volatile u32 __iomem *regs; |
34 | unsigned int irq_offset; | 45 | |
46 | /* The remapper for this IPIC */ | ||
47 | struct irq_host *irqhost; | ||
48 | |||
49 | /* The "linux" controller struct */ | ||
50 | struct irq_chip hc_irq; | ||
51 | |||
52 | /* The device node of the interrupt controller */ | ||
53 | struct device_node *of_node; | ||
35 | }; | 54 | }; |
36 | 55 | ||
37 | struct ipic_info { | 56 | struct ipic_info { |
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c index 6e0281afa6c3..b604926401f5 100644 --- a/arch/powerpc/sysdev/mpic.c +++ b/arch/powerpc/sysdev/mpic.c | |||
@@ -54,6 +54,94 @@ static DEFINE_SPINLOCK(mpic_lock); | |||
54 | #endif | 54 | #endif |
55 | #endif | 55 | #endif |
56 | 56 | ||
57 | #ifdef CONFIG_MPIC_WEIRD | ||
58 | static u32 mpic_infos[][MPIC_IDX_END] = { | ||
59 | [0] = { /* Original OpenPIC compatible MPIC */ | ||
60 | MPIC_GREG_BASE, | ||
61 | MPIC_GREG_FEATURE_0, | ||
62 | MPIC_GREG_GLOBAL_CONF_0, | ||
63 | MPIC_GREG_VENDOR_ID, | ||
64 | MPIC_GREG_IPI_VECTOR_PRI_0, | ||
65 | MPIC_GREG_IPI_STRIDE, | ||
66 | MPIC_GREG_SPURIOUS, | ||
67 | MPIC_GREG_TIMER_FREQ, | ||
68 | |||
69 | MPIC_TIMER_BASE, | ||
70 | MPIC_TIMER_STRIDE, | ||
71 | MPIC_TIMER_CURRENT_CNT, | ||
72 | MPIC_TIMER_BASE_CNT, | ||
73 | MPIC_TIMER_VECTOR_PRI, | ||
74 | MPIC_TIMER_DESTINATION, | ||
75 | |||
76 | MPIC_CPU_BASE, | ||
77 | MPIC_CPU_STRIDE, | ||
78 | MPIC_CPU_IPI_DISPATCH_0, | ||
79 | MPIC_CPU_IPI_DISPATCH_STRIDE, | ||
80 | MPIC_CPU_CURRENT_TASK_PRI, | ||
81 | MPIC_CPU_WHOAMI, | ||
82 | MPIC_CPU_INTACK, | ||
83 | MPIC_CPU_EOI, | ||
84 | |||
85 | MPIC_IRQ_BASE, | ||
86 | MPIC_IRQ_STRIDE, | ||
87 | MPIC_IRQ_VECTOR_PRI, | ||
88 | MPIC_VECPRI_VECTOR_MASK, | ||
89 | MPIC_VECPRI_POLARITY_POSITIVE, | ||
90 | MPIC_VECPRI_POLARITY_NEGATIVE, | ||
91 | MPIC_VECPRI_SENSE_LEVEL, | ||
92 | MPIC_VECPRI_SENSE_EDGE, | ||
93 | MPIC_VECPRI_POLARITY_MASK, | ||
94 | MPIC_VECPRI_SENSE_MASK, | ||
95 | MPIC_IRQ_DESTINATION | ||
96 | }, | ||
97 | [1] = { /* Tsi108/109 PIC */ | ||
98 | TSI108_GREG_BASE, | ||
99 | TSI108_GREG_FEATURE_0, | ||
100 | TSI108_GREG_GLOBAL_CONF_0, | ||
101 | TSI108_GREG_VENDOR_ID, | ||
102 | TSI108_GREG_IPI_VECTOR_PRI_0, | ||
103 | TSI108_GREG_IPI_STRIDE, | ||
104 | TSI108_GREG_SPURIOUS, | ||
105 | TSI108_GREG_TIMER_FREQ, | ||
106 | |||
107 | TSI108_TIMER_BASE, | ||
108 | TSI108_TIMER_STRIDE, | ||
109 | TSI108_TIMER_CURRENT_CNT, | ||
110 | TSI108_TIMER_BASE_CNT, | ||
111 | TSI108_TIMER_VECTOR_PRI, | ||
112 | TSI108_TIMER_DESTINATION, | ||
113 | |||
114 | TSI108_CPU_BASE, | ||
115 | TSI108_CPU_STRIDE, | ||
116 | TSI108_CPU_IPI_DISPATCH_0, | ||
117 | TSI108_CPU_IPI_DISPATCH_STRIDE, | ||
118 | TSI108_CPU_CURRENT_TASK_PRI, | ||
119 | TSI108_CPU_WHOAMI, | ||
120 | TSI108_CPU_INTACK, | ||
121 | TSI108_CPU_EOI, | ||
122 | |||
123 | TSI108_IRQ_BASE, | ||
124 | TSI108_IRQ_STRIDE, | ||
125 | TSI108_IRQ_VECTOR_PRI, | ||
126 | TSI108_VECPRI_VECTOR_MASK, | ||
127 | TSI108_VECPRI_POLARITY_POSITIVE, | ||
128 | TSI108_VECPRI_POLARITY_NEGATIVE, | ||
129 | TSI108_VECPRI_SENSE_LEVEL, | ||
130 | TSI108_VECPRI_SENSE_EDGE, | ||
131 | TSI108_VECPRI_POLARITY_MASK, | ||
132 | TSI108_VECPRI_SENSE_MASK, | ||
133 | TSI108_IRQ_DESTINATION | ||
134 | }, | ||
135 | }; | ||
136 | |||
137 | #define MPIC_INFO(name) mpic->hw_set[MPIC_IDX_##name] | ||
138 | |||
139 | #else /* CONFIG_MPIC_WEIRD */ | ||
140 | |||
141 | #define MPIC_INFO(name) MPIC_##name | ||
142 | |||
143 | #endif /* CONFIG_MPIC_WEIRD */ | ||
144 | |||
57 | /* | 145 | /* |
58 | * Register accessor functions | 146 | * Register accessor functions |
59 | */ | 147 | */ |
@@ -80,7 +168,8 @@ static inline void _mpic_write(unsigned int be, volatile u32 __iomem *base, | |||
80 | static inline u32 _mpic_ipi_read(struct mpic *mpic, unsigned int ipi) | 168 | static inline u32 _mpic_ipi_read(struct mpic *mpic, unsigned int ipi) |
81 | { | 169 | { |
82 | unsigned int be = (mpic->flags & MPIC_BIG_ENDIAN) != 0; | 170 | unsigned int be = (mpic->flags & MPIC_BIG_ENDIAN) != 0; |
83 | unsigned int offset = MPIC_GREG_IPI_VECTOR_PRI_0 + (ipi * 0x10); | 171 | unsigned int offset = MPIC_INFO(GREG_IPI_VECTOR_PRI_0) + |
172 | (ipi * MPIC_INFO(GREG_IPI_STRIDE)); | ||
84 | 173 | ||
85 | if (mpic->flags & MPIC_BROKEN_IPI) | 174 | if (mpic->flags & MPIC_BROKEN_IPI) |
86 | be = !be; | 175 | be = !be; |
@@ -89,7 +178,8 @@ static inline u32 _mpic_ipi_read(struct mpic *mpic, unsigned int ipi) | |||
89 | 178 | ||
90 | static inline void _mpic_ipi_write(struct mpic *mpic, unsigned int ipi, u32 value) | 179 | static inline void _mpic_ipi_write(struct mpic *mpic, unsigned int ipi, u32 value) |
91 | { | 180 | { |
92 | unsigned int offset = MPIC_GREG_IPI_VECTOR_PRI_0 + (ipi * 0x10); | 181 | unsigned int offset = MPIC_INFO(GREG_IPI_VECTOR_PRI_0) + |
182 | (ipi * MPIC_INFO(GREG_IPI_STRIDE)); | ||
93 | 183 | ||
94 | _mpic_write(mpic->flags & MPIC_BIG_ENDIAN, mpic->gregs, offset, value); | 184 | _mpic_write(mpic->flags & MPIC_BIG_ENDIAN, mpic->gregs, offset, value); |
95 | } | 185 | } |
@@ -120,7 +210,7 @@ static inline u32 _mpic_irq_read(struct mpic *mpic, unsigned int src_no, unsigne | |||
120 | unsigned int idx = src_no & mpic->isu_mask; | 210 | unsigned int idx = src_no & mpic->isu_mask; |
121 | 211 | ||
122 | return _mpic_read(mpic->flags & MPIC_BIG_ENDIAN, mpic->isus[isu], | 212 | return _mpic_read(mpic->flags & MPIC_BIG_ENDIAN, mpic->isus[isu], |
123 | reg + (idx * MPIC_IRQ_STRIDE)); | 213 | reg + (idx * MPIC_INFO(IRQ_STRIDE))); |
124 | } | 214 | } |
125 | 215 | ||
126 | static inline void _mpic_irq_write(struct mpic *mpic, unsigned int src_no, | 216 | static inline void _mpic_irq_write(struct mpic *mpic, unsigned int src_no, |
@@ -130,7 +220,7 @@ static inline void _mpic_irq_write(struct mpic *mpic, unsigned int src_no, | |||
130 | unsigned int idx = src_no & mpic->isu_mask; | 220 | unsigned int idx = src_no & mpic->isu_mask; |
131 | 221 | ||
132 | _mpic_write(mpic->flags & MPIC_BIG_ENDIAN, mpic->isus[isu], | 222 | _mpic_write(mpic->flags & MPIC_BIG_ENDIAN, mpic->isus[isu], |
133 | reg + (idx * MPIC_IRQ_STRIDE), value); | 223 | reg + (idx * MPIC_INFO(IRQ_STRIDE)), value); |
134 | } | 224 | } |
135 | 225 | ||
136 | #define mpic_read(b,r) _mpic_read(mpic->flags & MPIC_BIG_ENDIAN,(b),(r)) | 226 | #define mpic_read(b,r) _mpic_read(mpic->flags & MPIC_BIG_ENDIAN,(b),(r)) |
@@ -156,8 +246,8 @@ static void __init mpic_test_broken_ipi(struct mpic *mpic) | |||
156 | { | 246 | { |
157 | u32 r; | 247 | u32 r; |
158 | 248 | ||
159 | mpic_write(mpic->gregs, MPIC_GREG_IPI_VECTOR_PRI_0, MPIC_VECPRI_MASK); | 249 | mpic_write(mpic->gregs, MPIC_INFO(GREG_IPI_VECTOR_PRI_0), MPIC_VECPRI_MASK); |
160 | r = mpic_read(mpic->gregs, MPIC_GREG_IPI_VECTOR_PRI_0); | 250 | r = mpic_read(mpic->gregs, MPIC_INFO(GREG_IPI_VECTOR_PRI_0)); |
161 | 251 | ||
162 | if (r == le32_to_cpu(MPIC_VECPRI_MASK)) { | 252 | if (r == le32_to_cpu(MPIC_VECPRI_MASK)) { |
163 | printk(KERN_INFO "mpic: Detected reversed IPI registers\n"); | 253 | printk(KERN_INFO "mpic: Detected reversed IPI registers\n"); |
@@ -394,8 +484,8 @@ static inline struct mpic * mpic_from_irq(unsigned int irq) | |||
394 | /* Send an EOI */ | 484 | /* Send an EOI */ |
395 | static inline void mpic_eoi(struct mpic *mpic) | 485 | static inline void mpic_eoi(struct mpic *mpic) |
396 | { | 486 | { |
397 | mpic_cpu_write(MPIC_CPU_EOI, 0); | 487 | mpic_cpu_write(MPIC_INFO(CPU_EOI), 0); |
398 | (void)mpic_cpu_read(MPIC_CPU_WHOAMI); | 488 | (void)mpic_cpu_read(MPIC_INFO(CPU_WHOAMI)); |
399 | } | 489 | } |
400 | 490 | ||
401 | #ifdef CONFIG_SMP | 491 | #ifdef CONFIG_SMP |
@@ -419,8 +509,8 @@ static void mpic_unmask_irq(unsigned int irq) | |||
419 | 509 | ||
420 | DBG("%p: %s: enable_irq: %d (src %d)\n", mpic, mpic->name, irq, src); | 510 | DBG("%p: %s: enable_irq: %d (src %d)\n", mpic, mpic->name, irq, src); |
421 | 511 | ||
422 | mpic_irq_write(src, MPIC_IRQ_VECTOR_PRI, | 512 | mpic_irq_write(src, MPIC_INFO(IRQ_VECTOR_PRI), |
423 | mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) & | 513 | mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) & |
424 | ~MPIC_VECPRI_MASK); | 514 | ~MPIC_VECPRI_MASK); |
425 | /* make sure mask gets to controller before we return to user */ | 515 | /* make sure mask gets to controller before we return to user */ |
426 | do { | 516 | do { |
@@ -428,7 +518,7 @@ static void mpic_unmask_irq(unsigned int irq) | |||
428 | printk(KERN_ERR "mpic_enable_irq timeout\n"); | 518 | printk(KERN_ERR "mpic_enable_irq timeout\n"); |
429 | break; | 519 | break; |
430 | } | 520 | } |
431 | } while(mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) & MPIC_VECPRI_MASK); | 521 | } while(mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) & MPIC_VECPRI_MASK); |
432 | } | 522 | } |
433 | 523 | ||
434 | static void mpic_mask_irq(unsigned int irq) | 524 | static void mpic_mask_irq(unsigned int irq) |
@@ -439,8 +529,8 @@ static void mpic_mask_irq(unsigned int irq) | |||
439 | 529 | ||
440 | DBG("%s: disable_irq: %d (src %d)\n", mpic->name, irq, src); | 530 | DBG("%s: disable_irq: %d (src %d)\n", mpic->name, irq, src); |
441 | 531 | ||
442 | mpic_irq_write(src, MPIC_IRQ_VECTOR_PRI, | 532 | mpic_irq_write(src, MPIC_INFO(IRQ_VECTOR_PRI), |
443 | mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) | | 533 | mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) | |
444 | MPIC_VECPRI_MASK); | 534 | MPIC_VECPRI_MASK); |
445 | 535 | ||
446 | /* make sure mask gets to controller before we return to user */ | 536 | /* make sure mask gets to controller before we return to user */ |
@@ -449,7 +539,7 @@ static void mpic_mask_irq(unsigned int irq) | |||
449 | printk(KERN_ERR "mpic_enable_irq timeout\n"); | 539 | printk(KERN_ERR "mpic_enable_irq timeout\n"); |
450 | break; | 540 | break; |
451 | } | 541 | } |
452 | } while(!(mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) & MPIC_VECPRI_MASK)); | 542 | } while(!(mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) & MPIC_VECPRI_MASK)); |
453 | } | 543 | } |
454 | 544 | ||
455 | static void mpic_end_irq(unsigned int irq) | 545 | static void mpic_end_irq(unsigned int irq) |
@@ -560,24 +650,28 @@ static void mpic_set_affinity(unsigned int irq, cpumask_t cpumask) | |||
560 | 650 | ||
561 | cpus_and(tmp, cpumask, cpu_online_map); | 651 | cpus_and(tmp, cpumask, cpu_online_map); |
562 | 652 | ||
563 | mpic_irq_write(src, MPIC_IRQ_DESTINATION, | 653 | mpic_irq_write(src, MPIC_INFO(IRQ_DESTINATION), |
564 | mpic_physmask(cpus_addr(tmp)[0])); | 654 | mpic_physmask(cpus_addr(tmp)[0])); |
565 | } | 655 | } |
566 | 656 | ||
567 | static unsigned int mpic_type_to_vecpri(unsigned int type) | 657 | static unsigned int mpic_type_to_vecpri(struct mpic *mpic, unsigned int type) |
568 | { | 658 | { |
569 | /* Now convert sense value */ | 659 | /* Now convert sense value */ |
570 | switch(type & IRQ_TYPE_SENSE_MASK) { | 660 | switch(type & IRQ_TYPE_SENSE_MASK) { |
571 | case IRQ_TYPE_EDGE_RISING: | 661 | case IRQ_TYPE_EDGE_RISING: |
572 | return MPIC_VECPRI_SENSE_EDGE | MPIC_VECPRI_POLARITY_POSITIVE; | 662 | return MPIC_INFO(VECPRI_SENSE_EDGE) | |
663 | MPIC_INFO(VECPRI_POLARITY_POSITIVE); | ||
573 | case IRQ_TYPE_EDGE_FALLING: | 664 | case IRQ_TYPE_EDGE_FALLING: |
574 | case IRQ_TYPE_EDGE_BOTH: | 665 | case IRQ_TYPE_EDGE_BOTH: |
575 | return MPIC_VECPRI_SENSE_EDGE | MPIC_VECPRI_POLARITY_NEGATIVE; | 666 | return MPIC_INFO(VECPRI_SENSE_EDGE) | |
667 | MPIC_INFO(VECPRI_POLARITY_NEGATIVE); | ||
576 | case IRQ_TYPE_LEVEL_HIGH: | 668 | case IRQ_TYPE_LEVEL_HIGH: |
577 | return MPIC_VECPRI_SENSE_LEVEL | MPIC_VECPRI_POLARITY_POSITIVE; | 669 | return MPIC_INFO(VECPRI_SENSE_LEVEL) | |
670 | MPIC_INFO(VECPRI_POLARITY_POSITIVE); | ||
578 | case IRQ_TYPE_LEVEL_LOW: | 671 | case IRQ_TYPE_LEVEL_LOW: |
579 | default: | 672 | default: |
580 | return MPIC_VECPRI_SENSE_LEVEL | MPIC_VECPRI_POLARITY_NEGATIVE; | 673 | return MPIC_INFO(VECPRI_SENSE_LEVEL) | |
674 | MPIC_INFO(VECPRI_POLARITY_NEGATIVE); | ||
581 | } | 675 | } |
582 | } | 676 | } |
583 | 677 | ||
@@ -609,13 +703,14 @@ static int mpic_set_irq_type(unsigned int virq, unsigned int flow_type) | |||
609 | vecpri = MPIC_VECPRI_POLARITY_POSITIVE | | 703 | vecpri = MPIC_VECPRI_POLARITY_POSITIVE | |
610 | MPIC_VECPRI_SENSE_EDGE; | 704 | MPIC_VECPRI_SENSE_EDGE; |
611 | else | 705 | else |
612 | vecpri = mpic_type_to_vecpri(flow_type); | 706 | vecpri = mpic_type_to_vecpri(mpic, flow_type); |
613 | 707 | ||
614 | vold = mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI); | 708 | vold = mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)); |
615 | vnew = vold & ~(MPIC_VECPRI_POLARITY_MASK | MPIC_VECPRI_SENSE_MASK); | 709 | vnew = vold & ~(MPIC_INFO(VECPRI_POLARITY_MASK) | |
710 | MPIC_INFO(VECPRI_SENSE_MASK)); | ||
616 | vnew |= vecpri; | 711 | vnew |= vecpri; |
617 | if (vold != vnew) | 712 | if (vold != vnew) |
618 | mpic_irq_write(src, MPIC_IRQ_VECTOR_PRI, vnew); | 713 | mpic_irq_write(src, MPIC_INFO(IRQ_VECTOR_PRI), vnew); |
619 | 714 | ||
620 | return 0; | 715 | return 0; |
621 | } | 716 | } |
@@ -798,17 +893,22 @@ struct mpic * __init mpic_alloc(struct device_node *node, | |||
798 | mpic->irq_count = irq_count; | 893 | mpic->irq_count = irq_count; |
799 | mpic->num_sources = 0; /* so far */ | 894 | mpic->num_sources = 0; /* so far */ |
800 | 895 | ||
896 | #ifdef CONFIG_MPIC_WEIRD | ||
897 | mpic->hw_set = mpic_infos[MPIC_GET_REGSET(flags)]; | ||
898 | #endif | ||
899 | |||
801 | /* Map the global registers */ | 900 | /* Map the global registers */ |
802 | mpic->gregs = ioremap(phys_addr + MPIC_GREG_BASE, 0x1000); | 901 | mpic->gregs = ioremap(phys_addr + MPIC_INFO(GREG_BASE), 0x1000); |
803 | mpic->tmregs = mpic->gregs + ((MPIC_TIMER_BASE - MPIC_GREG_BASE) >> 2); | 902 | mpic->tmregs = mpic->gregs + |
903 | ((MPIC_INFO(TIMER_BASE) - MPIC_INFO(GREG_BASE)) >> 2); | ||
804 | BUG_ON(mpic->gregs == NULL); | 904 | BUG_ON(mpic->gregs == NULL); |
805 | 905 | ||
806 | /* Reset */ | 906 | /* Reset */ |
807 | if (flags & MPIC_WANTS_RESET) { | 907 | if (flags & MPIC_WANTS_RESET) { |
808 | mpic_write(mpic->gregs, MPIC_GREG_GLOBAL_CONF_0, | 908 | mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0), |
809 | mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_0) | 909 | mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0)) |
810 | | MPIC_GREG_GCONF_RESET); | 910 | | MPIC_GREG_GCONF_RESET); |
811 | while( mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_0) | 911 | while( mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0)) |
812 | & MPIC_GREG_GCONF_RESET) | 912 | & MPIC_GREG_GCONF_RESET) |
813 | mb(); | 913 | mb(); |
814 | } | 914 | } |
@@ -817,7 +917,7 @@ struct mpic * __init mpic_alloc(struct device_node *node, | |||
817 | * MPICs, num sources as well. On ISU MPICs, sources are counted | 917 | * MPICs, num sources as well. On ISU MPICs, sources are counted |
818 | * as ISUs are added | 918 | * as ISUs are added |
819 | */ | 919 | */ |
820 | reg = mpic_read(mpic->gregs, MPIC_GREG_FEATURE_0); | 920 | reg = mpic_read(mpic->gregs, MPIC_INFO(GREG_FEATURE_0)); |
821 | mpic->num_cpus = ((reg & MPIC_GREG_FEATURE_LAST_CPU_MASK) | 921 | mpic->num_cpus = ((reg & MPIC_GREG_FEATURE_LAST_CPU_MASK) |
822 | >> MPIC_GREG_FEATURE_LAST_CPU_SHIFT) + 1; | 922 | >> MPIC_GREG_FEATURE_LAST_CPU_SHIFT) + 1; |
823 | if (isu_size == 0) | 923 | if (isu_size == 0) |
@@ -826,16 +926,16 @@ struct mpic * __init mpic_alloc(struct device_node *node, | |||
826 | 926 | ||
827 | /* Map the per-CPU registers */ | 927 | /* Map the per-CPU registers */ |
828 | for (i = 0; i < mpic->num_cpus; i++) { | 928 | for (i = 0; i < mpic->num_cpus; i++) { |
829 | mpic->cpuregs[i] = ioremap(phys_addr + MPIC_CPU_BASE + | 929 | mpic->cpuregs[i] = ioremap(phys_addr + MPIC_INFO(CPU_BASE) + |
830 | i * MPIC_CPU_STRIDE, 0x1000); | 930 | i * MPIC_INFO(CPU_STRIDE), 0x1000); |
831 | BUG_ON(mpic->cpuregs[i] == NULL); | 931 | BUG_ON(mpic->cpuregs[i] == NULL); |
832 | } | 932 | } |
833 | 933 | ||
834 | /* Initialize main ISU if none provided */ | 934 | /* Initialize main ISU if none provided */ |
835 | if (mpic->isu_size == 0) { | 935 | if (mpic->isu_size == 0) { |
836 | mpic->isu_size = mpic->num_sources; | 936 | mpic->isu_size = mpic->num_sources; |
837 | mpic->isus[0] = ioremap(phys_addr + MPIC_IRQ_BASE, | 937 | mpic->isus[0] = ioremap(phys_addr + MPIC_INFO(IRQ_BASE), |
838 | MPIC_IRQ_STRIDE * mpic->isu_size); | 938 | MPIC_INFO(IRQ_STRIDE) * mpic->isu_size); |
839 | BUG_ON(mpic->isus[0] == NULL); | 939 | BUG_ON(mpic->isus[0] == NULL); |
840 | } | 940 | } |
841 | mpic->isu_shift = 1 + __ilog2(mpic->isu_size - 1); | 941 | mpic->isu_shift = 1 + __ilog2(mpic->isu_size - 1); |
@@ -879,7 +979,8 @@ void __init mpic_assign_isu(struct mpic *mpic, unsigned int isu_num, | |||
879 | 979 | ||
880 | BUG_ON(isu_num >= MPIC_MAX_ISU); | 980 | BUG_ON(isu_num >= MPIC_MAX_ISU); |
881 | 981 | ||
882 | mpic->isus[isu_num] = ioremap(phys_addr, MPIC_IRQ_STRIDE * mpic->isu_size); | 982 | mpic->isus[isu_num] = ioremap(phys_addr, |
983 | MPIC_INFO(IRQ_STRIDE) * mpic->isu_size); | ||
883 | if ((isu_first + mpic->isu_size) > mpic->num_sources) | 984 | if ((isu_first + mpic->isu_size) > mpic->num_sources) |
884 | mpic->num_sources = isu_first + mpic->isu_size; | 985 | mpic->num_sources = isu_first + mpic->isu_size; |
885 | } | 986 | } |
@@ -904,14 +1005,16 @@ void __init mpic_init(struct mpic *mpic) | |||
904 | printk(KERN_INFO "mpic: Initializing for %d sources\n", mpic->num_sources); | 1005 | printk(KERN_INFO "mpic: Initializing for %d sources\n", mpic->num_sources); |
905 | 1006 | ||
906 | /* Set current processor priority to max */ | 1007 | /* Set current processor priority to max */ |
907 | mpic_cpu_write(MPIC_CPU_CURRENT_TASK_PRI, 0xf); | 1008 | mpic_cpu_write(MPIC_INFO(CPU_CURRENT_TASK_PRI), 0xf); |
908 | 1009 | ||
909 | /* Initialize timers: just disable them all */ | 1010 | /* Initialize timers: just disable them all */ |
910 | for (i = 0; i < 4; i++) { | 1011 | for (i = 0; i < 4; i++) { |
911 | mpic_write(mpic->tmregs, | 1012 | mpic_write(mpic->tmregs, |
912 | i * MPIC_TIMER_STRIDE + MPIC_TIMER_DESTINATION, 0); | 1013 | i * MPIC_INFO(TIMER_STRIDE) + |
1014 | MPIC_INFO(TIMER_DESTINATION), 0); | ||
913 | mpic_write(mpic->tmregs, | 1015 | mpic_write(mpic->tmregs, |
914 | i * MPIC_TIMER_STRIDE + MPIC_TIMER_VECTOR_PRI, | 1016 | i * MPIC_INFO(TIMER_STRIDE) + |
1017 | MPIC_INFO(TIMER_VECTOR_PRI), | ||
915 | MPIC_VECPRI_MASK | | 1018 | MPIC_VECPRI_MASK | |
916 | (MPIC_VEC_TIMER_0 + i)); | 1019 | (MPIC_VEC_TIMER_0 + i)); |
917 | } | 1020 | } |
@@ -940,21 +1043,22 @@ void __init mpic_init(struct mpic *mpic) | |||
940 | (8 << MPIC_VECPRI_PRIORITY_SHIFT); | 1043 | (8 << MPIC_VECPRI_PRIORITY_SHIFT); |
941 | 1044 | ||
942 | /* init hw */ | 1045 | /* init hw */ |
943 | mpic_irq_write(i, MPIC_IRQ_VECTOR_PRI, vecpri); | 1046 | mpic_irq_write(i, MPIC_INFO(IRQ_VECTOR_PRI), vecpri); |
944 | mpic_irq_write(i, MPIC_IRQ_DESTINATION, | 1047 | mpic_irq_write(i, MPIC_INFO(IRQ_DESTINATION), |
945 | 1 << hard_smp_processor_id()); | 1048 | 1 << hard_smp_processor_id()); |
946 | } | 1049 | } |
947 | 1050 | ||
948 | /* Init spurrious vector */ | 1051 | /* Init spurrious vector */ |
949 | mpic_write(mpic->gregs, MPIC_GREG_SPURIOUS, MPIC_VEC_SPURRIOUS); | 1052 | mpic_write(mpic->gregs, MPIC_INFO(GREG_SPURIOUS), MPIC_VEC_SPURRIOUS); |
950 | 1053 | ||
951 | /* Disable 8259 passthrough */ | 1054 | /* Disable 8259 passthrough, if supported */ |
952 | mpic_write(mpic->gregs, MPIC_GREG_GLOBAL_CONF_0, | 1055 | if (!(mpic->flags & MPIC_NO_PTHROU_DIS)) |
953 | mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_0) | 1056 | mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0), |
954 | | MPIC_GREG_GCONF_8259_PTHROU_DIS); | 1057 | mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0)) |
1058 | | MPIC_GREG_GCONF_8259_PTHROU_DIS); | ||
955 | 1059 | ||
956 | /* Set current processor priority to 0 */ | 1060 | /* Set current processor priority to 0 */ |
957 | mpic_cpu_write(MPIC_CPU_CURRENT_TASK_PRI, 0); | 1061 | mpic_cpu_write(MPIC_INFO(CPU_CURRENT_TASK_PRI), 0); |
958 | } | 1062 | } |
959 | 1063 | ||
960 | void __init mpic_set_clk_ratio(struct mpic *mpic, u32 clock_ratio) | 1064 | void __init mpic_set_clk_ratio(struct mpic *mpic, u32 clock_ratio) |
@@ -997,9 +1101,9 @@ void mpic_irq_set_priority(unsigned int irq, unsigned int pri) | |||
997 | mpic_ipi_write(src - MPIC_VEC_IPI_0, | 1101 | mpic_ipi_write(src - MPIC_VEC_IPI_0, |
998 | reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT)); | 1102 | reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT)); |
999 | } else { | 1103 | } else { |
1000 | reg = mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI) | 1104 | reg = mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) |
1001 | & ~MPIC_VECPRI_PRIORITY_MASK; | 1105 | & ~MPIC_VECPRI_PRIORITY_MASK; |
1002 | mpic_irq_write(src, MPIC_IRQ_VECTOR_PRI, | 1106 | mpic_irq_write(src, MPIC_INFO(IRQ_VECTOR_PRI), |
1003 | reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT)); | 1107 | reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT)); |
1004 | } | 1108 | } |
1005 | spin_unlock_irqrestore(&mpic_lock, flags); | 1109 | spin_unlock_irqrestore(&mpic_lock, flags); |
@@ -1017,7 +1121,7 @@ unsigned int mpic_irq_get_priority(unsigned int irq) | |||
1017 | if (is_ipi) | 1121 | if (is_ipi) |
1018 | reg = mpic_ipi_read(src = MPIC_VEC_IPI_0); | 1122 | reg = mpic_ipi_read(src = MPIC_VEC_IPI_0); |
1019 | else | 1123 | else |
1020 | reg = mpic_irq_read(src, MPIC_IRQ_VECTOR_PRI); | 1124 | reg = mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)); |
1021 | spin_unlock_irqrestore(&mpic_lock, flags); | 1125 | spin_unlock_irqrestore(&mpic_lock, flags); |
1022 | return (reg & MPIC_VECPRI_PRIORITY_MASK) >> MPIC_VECPRI_PRIORITY_SHIFT; | 1126 | return (reg & MPIC_VECPRI_PRIORITY_MASK) >> MPIC_VECPRI_PRIORITY_SHIFT; |
1023 | } | 1127 | } |
@@ -1043,12 +1147,12 @@ void mpic_setup_this_cpu(void) | |||
1043 | */ | 1147 | */ |
1044 | if (distribute_irqs) { | 1148 | if (distribute_irqs) { |
1045 | for (i = 0; i < mpic->num_sources ; i++) | 1149 | for (i = 0; i < mpic->num_sources ; i++) |
1046 | mpic_irq_write(i, MPIC_IRQ_DESTINATION, | 1150 | mpic_irq_write(i, MPIC_INFO(IRQ_DESTINATION), |
1047 | mpic_irq_read(i, MPIC_IRQ_DESTINATION) | msk); | 1151 | mpic_irq_read(i, MPIC_INFO(IRQ_DESTINATION)) | msk); |
1048 | } | 1152 | } |
1049 | 1153 | ||
1050 | /* Set current processor priority to 0 */ | 1154 | /* Set current processor priority to 0 */ |
1051 | mpic_cpu_write(MPIC_CPU_CURRENT_TASK_PRI, 0); | 1155 | mpic_cpu_write(MPIC_INFO(CPU_CURRENT_TASK_PRI), 0); |
1052 | 1156 | ||
1053 | spin_unlock_irqrestore(&mpic_lock, flags); | 1157 | spin_unlock_irqrestore(&mpic_lock, flags); |
1054 | #endif /* CONFIG_SMP */ | 1158 | #endif /* CONFIG_SMP */ |
@@ -1058,7 +1162,7 @@ int mpic_cpu_get_priority(void) | |||
1058 | { | 1162 | { |
1059 | struct mpic *mpic = mpic_primary; | 1163 | struct mpic *mpic = mpic_primary; |
1060 | 1164 | ||
1061 | return mpic_cpu_read(MPIC_CPU_CURRENT_TASK_PRI); | 1165 | return mpic_cpu_read(MPIC_INFO(CPU_CURRENT_TASK_PRI)); |
1062 | } | 1166 | } |
1063 | 1167 | ||
1064 | void mpic_cpu_set_priority(int prio) | 1168 | void mpic_cpu_set_priority(int prio) |
@@ -1066,7 +1170,7 @@ void mpic_cpu_set_priority(int prio) | |||
1066 | struct mpic *mpic = mpic_primary; | 1170 | struct mpic *mpic = mpic_primary; |
1067 | 1171 | ||
1068 | prio &= MPIC_CPU_TASKPRI_MASK; | 1172 | prio &= MPIC_CPU_TASKPRI_MASK; |
1069 | mpic_cpu_write(MPIC_CPU_CURRENT_TASK_PRI, prio); | 1173 | mpic_cpu_write(MPIC_INFO(CPU_CURRENT_TASK_PRI), prio); |
1070 | } | 1174 | } |
1071 | 1175 | ||
1072 | /* | 1176 | /* |
@@ -1088,11 +1192,11 @@ void mpic_teardown_this_cpu(int secondary) | |||
1088 | 1192 | ||
1089 | /* let the mpic know we don't want intrs. */ | 1193 | /* let the mpic know we don't want intrs. */ |
1090 | for (i = 0; i < mpic->num_sources ; i++) | 1194 | for (i = 0; i < mpic->num_sources ; i++) |
1091 | mpic_irq_write(i, MPIC_IRQ_DESTINATION, | 1195 | mpic_irq_write(i, MPIC_INFO(IRQ_DESTINATION), |
1092 | mpic_irq_read(i, MPIC_IRQ_DESTINATION) & ~msk); | 1196 | mpic_irq_read(i, MPIC_INFO(IRQ_DESTINATION)) & ~msk); |
1093 | 1197 | ||
1094 | /* Set current processor priority to max */ | 1198 | /* Set current processor priority to max */ |
1095 | mpic_cpu_write(MPIC_CPU_CURRENT_TASK_PRI, 0xf); | 1199 | mpic_cpu_write(MPIC_INFO(CPU_CURRENT_TASK_PRI), 0xf); |
1096 | 1200 | ||
1097 | spin_unlock_irqrestore(&mpic_lock, flags); | 1201 | spin_unlock_irqrestore(&mpic_lock, flags); |
1098 | } | 1202 | } |
@@ -1108,7 +1212,8 @@ void mpic_send_ipi(unsigned int ipi_no, unsigned int cpu_mask) | |||
1108 | DBG("%s: send_ipi(ipi_no: %d)\n", mpic->name, ipi_no); | 1212 | DBG("%s: send_ipi(ipi_no: %d)\n", mpic->name, ipi_no); |
1109 | #endif | 1213 | #endif |
1110 | 1214 | ||
1111 | mpic_cpu_write(MPIC_CPU_IPI_DISPATCH_0 + ipi_no * 0x10, | 1215 | mpic_cpu_write(MPIC_INFO(CPU_IPI_DISPATCH_0) + |
1216 | ipi_no * MPIC_INFO(CPU_IPI_DISPATCH_STRIDE), | ||
1112 | mpic_physmask(cpu_mask & cpus_addr(cpu_online_map)[0])); | 1217 | mpic_physmask(cpu_mask & cpus_addr(cpu_online_map)[0])); |
1113 | } | 1218 | } |
1114 | 1219 | ||
@@ -1116,7 +1221,7 @@ unsigned int mpic_get_one_irq(struct mpic *mpic, struct pt_regs *regs) | |||
1116 | { | 1221 | { |
1117 | u32 src; | 1222 | u32 src; |
1118 | 1223 | ||
1119 | src = mpic_cpu_read(MPIC_CPU_INTACK) & MPIC_VECPRI_VECTOR_MASK; | 1224 | src = mpic_cpu_read(MPIC_INFO(CPU_INTACK)) & MPIC_INFO(VECPRI_VECTOR_MASK); |
1120 | #ifdef DEBUG_LOW | 1225 | #ifdef DEBUG_LOW |
1121 | DBG("%s: get_one_irq(): %d\n", mpic->name, src); | 1226 | DBG("%s: get_one_irq(): %d\n", mpic->name, src); |
1122 | #endif | 1227 | #endif |
diff --git a/arch/powerpc/sysdev/tsi108_dev.c b/arch/powerpc/sysdev/tsi108_dev.c index 26a0cc820cde..f3038461d4c0 100644 --- a/arch/powerpc/sysdev/tsi108_dev.c +++ b/arch/powerpc/sysdev/tsi108_dev.c | |||
@@ -93,13 +93,15 @@ static int __init tsi108_eth_of_init(void) | |||
93 | goto err; | 93 | goto err; |
94 | 94 | ||
95 | r[1].name = "tx"; | 95 | r[1].name = "tx"; |
96 | r[1].start = np->intrs[0].line; | 96 | r[1].start = irq_of_parse_and_map(np, 0); |
97 | r[1].end = np->intrs[0].line; | 97 | r[1].end = irq_of_parse_and_map(np, 0); |
98 | r[1].flags = IORESOURCE_IRQ; | 98 | r[1].flags = IORESOURCE_IRQ; |
99 | DBG("%s: name:start->end = %s:0x%lx-> 0x%lx\n", | ||
100 | __FUNCTION__,r[1].name, r[1].start, r[1].end); | ||
99 | 101 | ||
100 | tsi_eth_dev = | 102 | tsi_eth_dev = |
101 | platform_device_register_simple("tsi-ethernet", i, &r[0], | 103 | platform_device_register_simple("tsi-ethernet", i, &r[0], |
102 | np->n_intrs + 1); | 104 | 1); |
103 | 105 | ||
104 | if (IS_ERR(tsi_eth_dev)) { | 106 | if (IS_ERR(tsi_eth_dev)) { |
105 | ret = PTR_ERR(tsi_eth_dev); | 107 | ret = PTR_ERR(tsi_eth_dev); |
@@ -127,7 +129,7 @@ static int __init tsi108_eth_of_init(void) | |||
127 | tsi_eth_data.regs = r[0].start; | 129 | tsi_eth_data.regs = r[0].start; |
128 | tsi_eth_data.phyregs = res.start; | 130 | tsi_eth_data.phyregs = res.start; |
129 | tsi_eth_data.phy = *phy_id; | 131 | tsi_eth_data.phy = *phy_id; |
130 | tsi_eth_data.irq_num = np->intrs[0].line; | 132 | tsi_eth_data.irq_num = irq_of_parse_and_map(np, 0); |
131 | of_node_put(phy); | 133 | of_node_put(phy); |
132 | ret = | 134 | ret = |
133 | platform_device_add_data(tsi_eth_dev, &tsi_eth_data, | 135 | platform_device_add_data(tsi_eth_dev, &tsi_eth_data, |
diff --git a/arch/powerpc/sysdev/tsi108_pci.c b/arch/powerpc/sysdev/tsi108_pci.c index 3265d54c82ed..2ab06ed3ae73 100644 --- a/arch/powerpc/sysdev/tsi108_pci.c +++ b/arch/powerpc/sysdev/tsi108_pci.c | |||
@@ -26,7 +26,6 @@ | |||
26 | #include <linux/irq.h> | 26 | #include <linux/irq.h> |
27 | #include <linux/interrupt.h> | 27 | #include <linux/interrupt.h> |
28 | 28 | ||
29 | |||
30 | #include <asm/byteorder.h> | 29 | #include <asm/byteorder.h> |
31 | #include <asm/io.h> | 30 | #include <asm/io.h> |
32 | #include <asm/irq.h> | 31 | #include <asm/irq.h> |
@@ -228,7 +227,7 @@ int __init tsi108_setup_pci(struct device_node *dev) | |||
228 | 227 | ||
229 | (hose)->ops = &tsi108_direct_pci_ops; | 228 | (hose)->ops = &tsi108_direct_pci_ops; |
230 | 229 | ||
231 | printk(KERN_INFO "Found tsi108 PCI host bridge at 0x%08lx. " | 230 | printk(KERN_INFO "Found tsi108 PCI host bridge at 0x%08x. " |
232 | "Firmware bus number: %d->%d\n", | 231 | "Firmware bus number: %d->%d\n", |
233 | rsrc.start, hose->first_busno, hose->last_busno); | 232 | rsrc.start, hose->first_busno, hose->last_busno); |
234 | 233 | ||
@@ -278,7 +277,7 @@ static void init_pci_source(void) | |||
278 | mb(); | 277 | mb(); |
279 | } | 278 | } |
280 | 279 | ||
281 | static inline int get_pci_source(void) | 280 | static inline unsigned int get_pci_source(void) |
282 | { | 281 | { |
283 | u_int temp = 0; | 282 | u_int temp = 0; |
284 | int irq = -1; | 283 | int irq = -1; |
@@ -371,12 +370,12 @@ static void tsi108_pci_irq_end(u_int irq) | |||
371 | * Interrupt controller descriptor for cascaded PCI interrupt controller. | 370 | * Interrupt controller descriptor for cascaded PCI interrupt controller. |
372 | */ | 371 | */ |
373 | 372 | ||
374 | struct hw_interrupt_type tsi108_pci_irq = { | 373 | static struct irq_chip tsi108_pci_irq = { |
375 | .typename = "tsi108_PCI_int", | 374 | .typename = "tsi108_PCI_int", |
376 | .enable = tsi108_pci_irq_enable, | 375 | .mask = tsi108_pci_irq_disable, |
377 | .disable = tsi108_pci_irq_disable, | ||
378 | .ack = tsi108_pci_irq_ack, | 376 | .ack = tsi108_pci_irq_ack, |
379 | .end = tsi108_pci_irq_end, | 377 | .end = tsi108_pci_irq_end, |
378 | .unmask = tsi108_pci_irq_enable, | ||
380 | }; | 379 | }; |
381 | 380 | ||
382 | /* | 381 | /* |
@@ -399,14 +398,18 @@ void __init tsi108_pci_int_init(void) | |||
399 | DBG("Tsi108_pci_int_init: initializing PCI interrupts\n"); | 398 | DBG("Tsi108_pci_int_init: initializing PCI interrupts\n"); |
400 | 399 | ||
401 | for (i = 0; i < NUM_PCI_IRQS; i++) { | 400 | for (i = 0; i < NUM_PCI_IRQS; i++) { |
402 | irq_desc[i + IRQ_PCI_INTAD_BASE].handler = &tsi108_pci_irq; | 401 | irq_desc[i + IRQ_PCI_INTAD_BASE].chip = &tsi108_pci_irq; |
403 | irq_desc[i + IRQ_PCI_INTAD_BASE].status |= IRQ_LEVEL; | 402 | irq_desc[i + IRQ_PCI_INTAD_BASE].status |= IRQ_LEVEL; |
404 | } | 403 | } |
405 | 404 | ||
406 | init_pci_source(); | 405 | init_pci_source(); |
407 | } | 406 | } |
408 | 407 | ||
409 | int tsi108_irq_cascade(struct pt_regs *regs, void *unused) | 408 | void tsi108_irq_cascade(unsigned int irq, struct irq_desc *desc, |
409 | struct pt_regs *regs) | ||
410 | { | 410 | { |
411 | return get_pci_source(); | 411 | unsigned int cascade_irq = get_pci_source(); |
412 | if (cascade_irq != NO_IRQ) | ||
413 | generic_handle_irq(cascade_irq, regs); | ||
414 | desc->chip->eoi(irq); | ||
412 | } | 415 | } |
diff --git a/arch/ppc/kernel/smp-tbsync.c b/arch/ppc/kernel/smp-tbsync.c index 1576758debaf..d0cf3f86931d 100644 --- a/arch/ppc/kernel/smp-tbsync.c +++ b/arch/ppc/kernel/smp-tbsync.c | |||
@@ -47,8 +47,9 @@ void __devinit | |||
47 | smp_generic_take_timebase( void ) | 47 | smp_generic_take_timebase( void ) |
48 | { | 48 | { |
49 | int cmd, tbl, tbu; | 49 | int cmd, tbl, tbu; |
50 | unsigned long flags; | ||
50 | 51 | ||
51 | local_irq_disable(); | 52 | local_irq_save(flags); |
52 | while( !running ) | 53 | while( !running ) |
53 | ; | 54 | ; |
54 | rmb(); | 55 | rmb(); |
@@ -64,7 +65,7 @@ smp_generic_take_timebase( void ) | |||
64 | tbu = tbsync->tbu; | 65 | tbu = tbsync->tbu; |
65 | tbsync->ack = 0; | 66 | tbsync->ack = 0; |
66 | if( cmd == kExit ) | 67 | if( cmd == kExit ) |
67 | return; | 68 | break; |
68 | 69 | ||
69 | if( cmd == kSetAndTest ) { | 70 | if( cmd == kSetAndTest ) { |
70 | while( tbsync->handshake ) | 71 | while( tbsync->handshake ) |
@@ -77,7 +78,7 @@ smp_generic_take_timebase( void ) | |||
77 | } | 78 | } |
78 | enter_contest( tbsync->mark, -1 ); | 79 | enter_contest( tbsync->mark, -1 ); |
79 | } | 80 | } |
80 | local_irq_enable(); | 81 | local_irq_restore(flags); |
81 | } | 82 | } |
82 | 83 | ||
83 | static int __devinit | 84 | static int __devinit |
diff --git a/arch/ppc/kernel/vmlinux.lds.S b/arch/ppc/kernel/vmlinux.lds.S index 09c6525cfa61..095fd3323323 100644 --- a/arch/ppc/kernel/vmlinux.lds.S +++ b/arch/ppc/kernel/vmlinux.lds.S | |||
@@ -8,6 +8,7 @@ SECTIONS | |||
8 | . = + SIZEOF_HEADERS; | 8 | . = + SIZEOF_HEADERS; |
9 | .interp : { *(.interp) } | 9 | .interp : { *(.interp) } |
10 | .hash : { *(.hash) } | 10 | .hash : { *(.hash) } |
11 | .gnu.hash : { *(.gnu.hash) } | ||
11 | .dynsym : { *(.dynsym) } | 12 | .dynsym : { *(.dynsym) } |
12 | .dynstr : { *(.dynstr) } | 13 | .dynstr : { *(.dynstr) } |
13 | .rel.text : { *(.rel.text) } | 14 | .rel.text : { *(.rel.text) } |
diff --git a/arch/ppc/platforms/85xx/mpc8560_ads.c b/arch/ppc/platforms/85xx/mpc8560_ads.c index d90cd24d018e..94badafe4ef1 100644 --- a/arch/ppc/platforms/85xx/mpc8560_ads.c +++ b/arch/ppc/platforms/85xx/mpc8560_ads.c | |||
@@ -29,6 +29,7 @@ | |||
29 | #include <linux/initrd.h> | 29 | #include <linux/initrd.h> |
30 | #include <linux/module.h> | 30 | #include <linux/module.h> |
31 | #include <linux/fsl_devices.h> | 31 | #include <linux/fsl_devices.h> |
32 | #include <linux/fs_enet_pd.h> | ||
32 | 33 | ||
33 | #include <asm/system.h> | 34 | #include <asm/system.h> |
34 | #include <asm/pgtable.h> | 35 | #include <asm/pgtable.h> |
@@ -58,6 +59,71 @@ | |||
58 | * Setup the architecture | 59 | * Setup the architecture |
59 | * | 60 | * |
60 | */ | 61 | */ |
62 | static void init_fcc_ioports(void) | ||
63 | { | ||
64 | struct immap *immap; | ||
65 | struct io_port *io; | ||
66 | u32 tempval; | ||
67 | |||
68 | immap = cpm2_immr; | ||
69 | |||
70 | io = &immap->im_ioport; | ||
71 | /* FCC2/3 are on the ports B/C. */ | ||
72 | tempval = in_be32(&io->iop_pdirb); | ||
73 | tempval &= ~PB2_DIRB0; | ||
74 | tempval |= PB2_DIRB1; | ||
75 | out_be32(&io->iop_pdirb, tempval); | ||
76 | |||
77 | tempval = in_be32(&io->iop_psorb); | ||
78 | tempval &= ~PB2_PSORB0; | ||
79 | tempval |= PB2_PSORB1; | ||
80 | out_be32(&io->iop_psorb, tempval); | ||
81 | |||
82 | tempval = in_be32(&io->iop_pparb); | ||
83 | tempval |= (PB2_DIRB0 | PB2_DIRB1); | ||
84 | out_be32(&io->iop_pparb, tempval); | ||
85 | |||
86 | tempval = in_be32(&io->iop_pdirb); | ||
87 | tempval &= ~PB3_DIRB0; | ||
88 | tempval |= PB3_DIRB1; | ||
89 | out_be32(&io->iop_pdirb, tempval); | ||
90 | |||
91 | tempval = in_be32(&io->iop_psorb); | ||
92 | tempval &= ~PB3_PSORB0; | ||
93 | tempval |= PB3_PSORB1; | ||
94 | out_be32(&io->iop_psorb, tempval); | ||
95 | |||
96 | tempval = in_be32(&io->iop_pparb); | ||
97 | tempval |= (PB3_DIRB0 | PB3_DIRB1); | ||
98 | out_be32(&io->iop_pparb, tempval); | ||
99 | |||
100 | tempval = in_be32(&io->iop_pdirc); | ||
101 | tempval |= PC3_DIRC1; | ||
102 | out_be32(&io->iop_pdirc, tempval); | ||
103 | |||
104 | tempval = in_be32(&io->iop_pparc); | ||
105 | tempval |= PC3_DIRC1; | ||
106 | out_be32(&io->iop_pparc, tempval); | ||
107 | |||
108 | /* Port C has clocks...... */ | ||
109 | tempval = in_be32(&io->iop_psorc); | ||
110 | tempval &= ~(CLK_TRX); | ||
111 | out_be32(&io->iop_psorc, tempval); | ||
112 | |||
113 | tempval = in_be32(&io->iop_pdirc); | ||
114 | tempval &= ~(CLK_TRX); | ||
115 | out_be32(&io->iop_pdirc, tempval); | ||
116 | tempval = in_be32(&io->iop_pparc); | ||
117 | tempval |= (CLK_TRX); | ||
118 | out_be32(&io->iop_pparc, tempval); | ||
119 | |||
120 | /* Configure Serial Interface clock routing. | ||
121 | * First, clear all FCC bits to zero, | ||
122 | * then set the ones we want. | ||
123 | */ | ||
124 | immap->im_cpmux.cmx_fcr &= ~(CPMUX_CLK_MASK); | ||
125 | immap->im_cpmux.cmx_fcr |= CPMUX_CLK_ROUTE; | ||
126 | } | ||
61 | 127 | ||
62 | static void __init | 128 | static void __init |
63 | mpc8560ads_setup_arch(void) | 129 | mpc8560ads_setup_arch(void) |
@@ -66,6 +132,7 @@ mpc8560ads_setup_arch(void) | |||
66 | unsigned int freq; | 132 | unsigned int freq; |
67 | struct gianfar_platform_data *pdata; | 133 | struct gianfar_platform_data *pdata; |
68 | struct gianfar_mdio_data *mdata; | 134 | struct gianfar_mdio_data *mdata; |
135 | struct fs_platform_info *fpi; | ||
69 | 136 | ||
70 | cpm2_reset(); | 137 | cpm2_reset(); |
71 | 138 | ||
@@ -110,6 +177,28 @@ mpc8560ads_setup_arch(void) | |||
110 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); | 177 | memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); |
111 | } | 178 | } |
112 | 179 | ||
180 | init_fcc_ioports(); | ||
181 | ppc_sys_device_remove(MPC85xx_CPM_FCC1); | ||
182 | |||
183 | fpi = (struct fs_platform_info *) ppc_sys_get_pdata(MPC85xx_CPM_FCC2); | ||
184 | if (fpi) { | ||
185 | memcpy(fpi->macaddr, binfo->bi_enet2addr, 6); | ||
186 | fpi->bus_id = "0:02"; | ||
187 | fpi->phy_addr = 2; | ||
188 | fpi->dpram_offset = (u32)cpm2_immr->im_dprambase; | ||
189 | fpi->fcc_regs_c = (u32)&cpm2_immr->im_fcc_c[1]; | ||
190 | } | ||
191 | |||
192 | fpi = (struct fs_platform_info *) ppc_sys_get_pdata(MPC85xx_CPM_FCC3); | ||
193 | if (fpi) { | ||
194 | memcpy(fpi->macaddr, binfo->bi_enet2addr, 6); | ||
195 | fpi->macaddr[5] += 1; | ||
196 | fpi->bus_id = "0:03"; | ||
197 | fpi->phy_addr = 3; | ||
198 | fpi->dpram_offset = (u32)cpm2_immr->im_dprambase; | ||
199 | fpi->fcc_regs_c = (u32)&cpm2_immr->im_fcc_c[2]; | ||
200 | } | ||
201 | |||
113 | #ifdef CONFIG_BLK_DEV_INITRD | 202 | #ifdef CONFIG_BLK_DEV_INITRD |
114 | if (initrd_start) | 203 | if (initrd_start) |
115 | ROOT_DEV = Root_RAM0; | 204 | ROOT_DEV = Root_RAM0; |
diff --git a/arch/ppc/platforms/85xx/mpc85xx_ads_common.h b/arch/ppc/platforms/85xx/mpc85xx_ads_common.h index abf32281655d..c8c322fe3680 100644 --- a/arch/ppc/platforms/85xx/mpc85xx_ads_common.h +++ b/arch/ppc/platforms/85xx/mpc85xx_ads_common.h | |||
@@ -45,4 +45,23 @@ extern void mpc85xx_ads_map_io(void) __init; | |||
45 | 45 | ||
46 | #define MPC85XX_PCI1_IO_SIZE 0x01000000 | 46 | #define MPC85XX_PCI1_IO_SIZE 0x01000000 |
47 | 47 | ||
48 | /* FCC1 Clock Source Configuration. These can be | ||
49 | * redefined in the board specific file. | ||
50 | * Can only choose from CLK9-12 */ | ||
51 | #define F1_RXCLK 12 | ||
52 | #define F1_TXCLK 11 | ||
53 | |||
54 | /* FCC2 Clock Source Configuration. These can be | ||
55 | * redefined in the board specific file. | ||
56 | * Can only choose from CLK13-16 */ | ||
57 | #define F2_RXCLK 13 | ||
58 | #define F2_TXCLK 14 | ||
59 | |||
60 | /* FCC3 Clock Source Configuration. These can be | ||
61 | * redefined in the board specific file. | ||
62 | * Can only choose from CLK13-16 */ | ||
63 | #define F3_RXCLK 15 | ||
64 | #define F3_TXCLK 16 | ||
65 | |||
66 | |||
48 | #endif /* __MACH_MPC85XX_ADS_H__ */ | 67 | #endif /* __MACH_MPC85XX_ADS_H__ */ |
diff --git a/arch/ppc/platforms/mpc8272ads_setup.c b/arch/ppc/platforms/mpc8272ads_setup.c index abb7154de2c7..2a35fe2b9b96 100644 --- a/arch/ppc/platforms/mpc8272ads_setup.c +++ b/arch/ppc/platforms/mpc8272ads_setup.c | |||
@@ -56,64 +56,51 @@ static struct fs_uart_platform_info mpc8272_uart_pdata[] = { | |||
56 | }, | 56 | }, |
57 | }; | 57 | }; |
58 | 58 | ||
59 | static struct fs_mii_bus_info mii_bus_info = { | 59 | static struct fs_mii_bb_platform_info m82xx_mii_bb_pdata = { |
60 | .method = fsmii_bitbang, | 60 | .mdio_dat.bit = 18, |
61 | .id = 0, | 61 | .mdio_dir.bit = 18, |
62 | .i.bitbang = { | 62 | .mdc_dat.bit = 19, |
63 | .mdio_port = fsiop_portc, | 63 | .delay = 1, |
64 | .mdio_bit = 18, | ||
65 | .mdc_port = fsiop_portc, | ||
66 | .mdc_bit = 19, | ||
67 | .delay = 1, | ||
68 | }, | ||
69 | }; | ||
70 | |||
71 | static struct fs_platform_info mpc82xx_fcc1_pdata = { | ||
72 | .fs_no = fsid_fcc1, | ||
73 | .cp_page = CPM_CR_FCC1_PAGE, | ||
74 | .cp_block = CPM_CR_FCC1_SBLOCK, | ||
75 | .clk_trx = (PC_F1RXCLK | PC_F1TXCLK), | ||
76 | .clk_route = CMX1_CLK_ROUTE, | ||
77 | .clk_mask = CMX1_CLK_MASK, | ||
78 | .init_ioports = init_fcc1_ioports, | ||
79 | |||
80 | .phy_addr = 0, | ||
81 | #ifdef PHY_INTERRUPT | ||
82 | .phy_irq = PHY_INTERRUPT, | ||
83 | #else | ||
84 | .phy_irq = -1; | ||
85 | #endif | ||
86 | .mem_offset = FCC1_MEM_OFFSET, | ||
87 | .bus_info = &mii_bus_info, | ||
88 | .rx_ring = 32, | ||
89 | .tx_ring = 32, | ||
90 | .rx_copybreak = 240, | ||
91 | .use_napi = 0, | ||
92 | .napi_weight = 17, | ||
93 | }; | 64 | }; |
94 | 65 | ||
95 | static struct fs_platform_info mpc82xx_fcc2_pdata = { | 66 | static struct fs_platform_info mpc82xx_enet_pdata[] = { |
96 | .fs_no = fsid_fcc2, | 67 | [fsid_fcc1] = { |
97 | .cp_page = CPM_CR_FCC2_PAGE, | 68 | .fs_no = fsid_fcc1, |
98 | .cp_block = CPM_CR_FCC2_SBLOCK, | 69 | .cp_page = CPM_CR_FCC1_PAGE, |
99 | .clk_trx = (PC_F2RXCLK | PC_F2TXCLK), | 70 | .cp_block = CPM_CR_FCC1_SBLOCK, |
100 | .clk_route = CMX2_CLK_ROUTE, | 71 | |
101 | .clk_mask = CMX2_CLK_MASK, | 72 | .clk_trx = (PC_F1RXCLK | PC_F1TXCLK), |
102 | .init_ioports = init_fcc2_ioports, | 73 | .clk_route = CMX1_CLK_ROUTE, |
103 | 74 | .clk_mask = CMX1_CLK_MASK, | |
104 | .phy_addr = 3, | 75 | .init_ioports = init_fcc1_ioports, |
105 | #ifdef PHY_INTERRUPT | 76 | |
106 | .phy_irq = PHY_INTERRUPT, | 77 | .mem_offset = FCC1_MEM_OFFSET, |
107 | #else | 78 | |
108 | .phy_irq = -1; | 79 | .rx_ring = 32, |
109 | #endif | 80 | .tx_ring = 32, |
110 | .mem_offset = FCC2_MEM_OFFSET, | 81 | .rx_copybreak = 240, |
111 | .bus_info = &mii_bus_info, | 82 | .use_napi = 0, |
112 | .rx_ring = 32, | 83 | .napi_weight = 17, |
113 | .tx_ring = 32, | 84 | .bus_id = "0:00", |
114 | .rx_copybreak = 240, | 85 | }, |
115 | .use_napi = 0, | 86 | [fsid_fcc2] = { |
116 | .napi_weight = 17, | 87 | .fs_no = fsid_fcc2, |
88 | .cp_page = CPM_CR_FCC2_PAGE, | ||
89 | .cp_block = CPM_CR_FCC2_SBLOCK, | ||
90 | .clk_trx = (PC_F2RXCLK | PC_F2TXCLK), | ||
91 | .clk_route = CMX2_CLK_ROUTE, | ||
92 | .clk_mask = CMX2_CLK_MASK, | ||
93 | .init_ioports = init_fcc2_ioports, | ||
94 | |||
95 | .mem_offset = FCC2_MEM_OFFSET, | ||
96 | |||
97 | .rx_ring = 32, | ||
98 | .tx_ring = 32, | ||
99 | .rx_copybreak = 240, | ||
100 | .use_napi = 0, | ||
101 | .napi_weight = 17, | ||
102 | .bus_id = "0:03", | ||
103 | }, | ||
117 | }; | 104 | }; |
118 | 105 | ||
119 | static void init_fcc1_ioports(void) | 106 | static void init_fcc1_ioports(void) |
@@ -209,20 +196,21 @@ static void __init mpc8272ads_fixup_enet_pdata(struct platform_device *pdev, | |||
209 | bd_t* bi = (void*)__res; | 196 | bd_t* bi = (void*)__res; |
210 | int fs_no = fsid_fcc1+pdev->id-1; | 197 | int fs_no = fsid_fcc1+pdev->id-1; |
211 | 198 | ||
212 | mpc82xx_fcc1_pdata.dpram_offset = mpc82xx_fcc2_pdata.dpram_offset = (u32)cpm2_immr->im_dprambase; | 199 | if(fs_no > ARRAY_SIZE(mpc82xx_enet_pdata)) { |
213 | mpc82xx_fcc1_pdata.fcc_regs_c = mpc82xx_fcc2_pdata.fcc_regs_c = (u32)cpm2_immr->im_fcc_c; | 200 | return; |
214 | |||
215 | switch(fs_no) { | ||
216 | case fsid_fcc1: | ||
217 | memcpy(&mpc82xx_fcc1_pdata.macaddr,bi->bi_enetaddr,6); | ||
218 | pdev->dev.platform_data = &mpc82xx_fcc1_pdata; | ||
219 | break; | ||
220 | case fsid_fcc2: | ||
221 | memcpy(&mpc82xx_fcc2_pdata.macaddr,bi->bi_enetaddr,6); | ||
222 | mpc82xx_fcc2_pdata.macaddr[5] ^= 1; | ||
223 | pdev->dev.platform_data = &mpc82xx_fcc2_pdata; | ||
224 | break; | ||
225 | } | 201 | } |
202 | |||
203 | mpc82xx_enet_pdata[fs_no].dpram_offset= | ||
204 | (u32)cpm2_immr->im_dprambase; | ||
205 | mpc82xx_enet_pdata[fs_no].fcc_regs_c = | ||
206 | (u32)cpm2_immr->im_fcc_c; | ||
207 | memcpy(&mpc82xx_enet_pdata[fs_no].macaddr,bi->bi_enetaddr,6); | ||
208 | |||
209 | /* prevent dup mac */ | ||
210 | if(fs_no == fsid_fcc2) | ||
211 | mpc82xx_enet_pdata[fs_no].macaddr[5] ^= 1; | ||
212 | |||
213 | pdev->dev.platform_data = &mpc82xx_enet_pdata[fs_no]; | ||
226 | } | 214 | } |
227 | 215 | ||
228 | static void mpc8272ads_fixup_uart_pdata(struct platform_device *pdev, | 216 | static void mpc8272ads_fixup_uart_pdata(struct platform_device *pdev, |
@@ -274,6 +262,29 @@ static void init_scc4_uart_ioports(void) | |||
274 | iounmap(immap); | 262 | iounmap(immap); |
275 | } | 263 | } |
276 | 264 | ||
265 | static void __init mpc8272ads_fixup_mdio_pdata(struct platform_device *pdev, | ||
266 | int idx) | ||
267 | { | ||
268 | m82xx_mii_bb_pdata.irq[0] = PHY_INTERRUPT; | ||
269 | m82xx_mii_bb_pdata.irq[1] = -1; | ||
270 | m82xx_mii_bb_pdata.irq[2] = -1; | ||
271 | m82xx_mii_bb_pdata.irq[3] = PHY_INTERRUPT; | ||
272 | m82xx_mii_bb_pdata.irq[31] = -1; | ||
273 | |||
274 | |||
275 | m82xx_mii_bb_pdata.mdio_dat.offset = | ||
276 | (u32)&cpm2_immr->im_ioport.iop_pdatc; | ||
277 | |||
278 | m82xx_mii_bb_pdata.mdio_dir.offset = | ||
279 | (u32)&cpm2_immr->im_ioport.iop_pdirc; | ||
280 | |||
281 | m82xx_mii_bb_pdata.mdc_dat.offset = | ||
282 | (u32)&cpm2_immr->im_ioport.iop_pdatc; | ||
283 | |||
284 | |||
285 | pdev->dev.platform_data = &m82xx_mii_bb_pdata; | ||
286 | } | ||
287 | |||
277 | static int mpc8272ads_platform_notify(struct device *dev) | 288 | static int mpc8272ads_platform_notify(struct device *dev) |
278 | { | 289 | { |
279 | static const struct platform_notify_dev_map dev_map[] = { | 290 | static const struct platform_notify_dev_map dev_map[] = { |
@@ -286,6 +297,10 @@ static int mpc8272ads_platform_notify(struct device *dev) | |||
286 | .rtn = mpc8272ads_fixup_uart_pdata, | 297 | .rtn = mpc8272ads_fixup_uart_pdata, |
287 | }, | 298 | }, |
288 | { | 299 | { |
300 | .bus_id = "fsl-bb-mdio", | ||
301 | .rtn = mpc8272ads_fixup_mdio_pdata, | ||
302 | }, | ||
303 | { | ||
289 | .bus_id = NULL | 304 | .bus_id = NULL |
290 | } | 305 | } |
291 | }; | 306 | }; |
@@ -319,6 +334,7 @@ int __init mpc8272ads_init(void) | |||
319 | ppc_sys_device_enable(MPC82xx_CPM_SCC4); | 334 | ppc_sys_device_enable(MPC82xx_CPM_SCC4); |
320 | #endif | 335 | #endif |
321 | 336 | ||
337 | ppc_sys_device_enable(MPC82xx_MDIO_BB); | ||
322 | 338 | ||
323 | return 0; | 339 | return 0; |
324 | } | 340 | } |
diff --git a/arch/ppc/platforms/mpc866ads_setup.c b/arch/ppc/platforms/mpc866ads_setup.c index f19b6167c770..e12cece4c9fd 100644 --- a/arch/ppc/platforms/mpc866ads_setup.c +++ b/arch/ppc/platforms/mpc866ads_setup.c | |||
@@ -1,10 +1,10 @@ | |||
1 | /*arch/ppc/platforms/mpc885ads-setup.c | 1 | /*arch/ppc/platforms/mpc866ads-setup.c |
2 | * | 2 | * |
3 | * Platform setup for the Freescale mpc885ads board | 3 | * Platform setup for the Freescale mpc866ads board |
4 | * | 4 | * |
5 | * Vitaly Bordug <vbordug@ru.mvista.com> | 5 | * Vitaly Bordug <vbordug@ru.mvista.com> |
6 | * | 6 | * |
7 | * Copyright 2005 MontaVista Software Inc. | 7 | * Copyright 2005-2006 MontaVista Software Inc. |
8 | * | 8 | * |
9 | * This file is licensed under the terms of the GNU General Public License | 9 | * This file is licensed under the terms of the GNU General Public License |
10 | * version 2. This program is licensed "as is" without any warranty of any | 10 | * version 2. This program is licensed "as is" without any warranty of any |
@@ -42,49 +42,36 @@ static void setup_scc1_ioports(void); | |||
42 | static void setup_smc1_ioports(void); | 42 | static void setup_smc1_ioports(void); |
43 | static void setup_smc2_ioports(void); | 43 | static void setup_smc2_ioports(void); |
44 | 44 | ||
45 | static struct fs_mii_bus_info fec_mii_bus_info = { | 45 | static struct fs_mii_fec_platform_info mpc8xx_mdio_fec_pdata; |
46 | .method = fsmii_fec, | ||
47 | .id = 0, | ||
48 | }; | ||
49 | |||
50 | static struct fs_mii_bus_info scc_mii_bus_info = { | ||
51 | .method = fsmii_fixed, | ||
52 | .id = 0, | ||
53 | .i.fixed.speed = 10, | ||
54 | .i.fixed.duplex = 0, | ||
55 | }; | ||
56 | 46 | ||
57 | static struct fs_platform_info mpc8xx_fec_pdata[] = { | 47 | static struct fs_mii_fec_platform_info mpc8xx_mdio_fec_pdata; |
58 | { | ||
59 | .rx_ring = 128, | ||
60 | .tx_ring = 16, | ||
61 | .rx_copybreak = 240, | ||
62 | 48 | ||
63 | .use_napi = 1, | 49 | static struct fs_platform_info mpc8xx_enet_pdata[] = { |
64 | .napi_weight = 17, | 50 | [fsid_fec1] = { |
51 | .rx_ring = 128, | ||
52 | .tx_ring = 16, | ||
53 | .rx_copybreak = 240, | ||
65 | 54 | ||
66 | .phy_addr = 15, | 55 | .use_napi = 1, |
67 | .phy_irq = -1, | 56 | .napi_weight = 17, |
68 | 57 | ||
69 | .use_rmii = 0, | 58 | .init_ioports = setup_fec1_ioports, |
70 | 59 | ||
71 | .bus_info = &fec_mii_bus_info, | 60 | .bus_id = "0:0f", |
72 | } | 61 | .has_phy = 1, |
73 | }; | 62 | }, |
63 | [fsid_scc1] = { | ||
64 | .rx_ring = 64, | ||
65 | .tx_ring = 8, | ||
66 | .rx_copybreak = 240, | ||
67 | .use_napi = 1, | ||
68 | .napi_weight = 17, | ||
74 | 69 | ||
75 | static struct fs_platform_info mpc8xx_scc_pdata = { | ||
76 | .rx_ring = 64, | ||
77 | .tx_ring = 8, | ||
78 | .rx_copybreak = 240, | ||
79 | 70 | ||
80 | .use_napi = 1, | 71 | .init_ioports = setup_scc1_ioports, |
81 | .napi_weight = 17, | ||
82 | |||
83 | .phy_addr = -1, | ||
84 | .phy_irq = -1, | ||
85 | |||
86 | .bus_info = &scc_mii_bus_info, | ||
87 | 72 | ||
73 | .bus_id = "fixed@100:1", | ||
74 | }, | ||
88 | }; | 75 | }; |
89 | 76 | ||
90 | static struct fs_uart_platform_info mpc866_uart_pdata[] = { | 77 | static struct fs_uart_platform_info mpc866_uart_pdata[] = { |
@@ -207,63 +194,6 @@ static void setup_scc1_ioports(void) | |||
207 | 194 | ||
208 | } | 195 | } |
209 | 196 | ||
210 | static void mpc866ads_fixup_enet_pdata(struct platform_device *pdev, int fs_no) | ||
211 | { | ||
212 | struct fs_platform_info *fpi = pdev->dev.platform_data; | ||
213 | |||
214 | volatile cpm8xx_t *cp; | ||
215 | bd_t *bd = (bd_t *) __res; | ||
216 | char *e; | ||
217 | int i; | ||
218 | |||
219 | /* Get pointer to Communication Processor */ | ||
220 | cp = cpmp; | ||
221 | switch (fs_no) { | ||
222 | case fsid_fec1: | ||
223 | fpi = &mpc8xx_fec_pdata[0]; | ||
224 | fpi->init_ioports = &setup_fec1_ioports; | ||
225 | |||
226 | break; | ||
227 | case fsid_scc1: | ||
228 | fpi = &mpc8xx_scc_pdata; | ||
229 | fpi->init_ioports = &setup_scc1_ioports; | ||
230 | |||
231 | break; | ||
232 | default: | ||
233 | printk(KERN_WARNING"Device %s is not supported!\n", pdev->name); | ||
234 | return; | ||
235 | } | ||
236 | |||
237 | pdev->dev.platform_data = fpi; | ||
238 | fpi->fs_no = fs_no; | ||
239 | |||
240 | e = (unsigned char *)&bd->bi_enetaddr; | ||
241 | for (i = 0; i < 6; i++) | ||
242 | fpi->macaddr[i] = *e++; | ||
243 | |||
244 | fpi->macaddr[5 - pdev->id]++; | ||
245 | |||
246 | } | ||
247 | |||
248 | static void mpc866ads_fixup_fec_enet_pdata(struct platform_device *pdev, | ||
249 | int idx) | ||
250 | { | ||
251 | /* This is for FEC devices only */ | ||
252 | if (!pdev || !pdev->name || (!strstr(pdev->name, "fsl-cpm-fec"))) | ||
253 | return; | ||
254 | mpc866ads_fixup_enet_pdata(pdev, fsid_fec1 + pdev->id - 1); | ||
255 | } | ||
256 | |||
257 | static void mpc866ads_fixup_scc_enet_pdata(struct platform_device *pdev, | ||
258 | int idx) | ||
259 | { | ||
260 | /* This is for SCC devices only */ | ||
261 | if (!pdev || !pdev->name || (!strstr(pdev->name, "fsl-cpm-scc"))) | ||
262 | return; | ||
263 | |||
264 | mpc866ads_fixup_enet_pdata(pdev, fsid_scc1 + pdev->id - 1); | ||
265 | } | ||
266 | |||
267 | static void setup_smc1_ioports(void) | 197 | static void setup_smc1_ioports(void) |
268 | { | 198 | { |
269 | immap_t *immap = (immap_t *) IMAP_ADDR; | 199 | immap_t *immap = (immap_t *) IMAP_ADDR; |
@@ -315,6 +245,56 @@ static void setup_smc2_ioports(void) | |||
315 | 245 | ||
316 | } | 246 | } |
317 | 247 | ||
248 | static int ma_count = 0; | ||
249 | |||
250 | static void mpc866ads_fixup_enet_pdata(struct platform_device *pdev, int fs_no) | ||
251 | { | ||
252 | struct fs_platform_info *fpi; | ||
253 | |||
254 | volatile cpm8xx_t *cp; | ||
255 | bd_t *bd = (bd_t *) __res; | ||
256 | char *e; | ||
257 | int i; | ||
258 | |||
259 | /* Get pointer to Communication Processor */ | ||
260 | cp = cpmp; | ||
261 | |||
262 | if(fs_no > ARRAY_SIZE(mpc8xx_enet_pdata)) { | ||
263 | printk(KERN_ERR"No network-suitable #%d device on bus", fs_no); | ||
264 | return; | ||
265 | } | ||
266 | |||
267 | |||
268 | fpi = &mpc8xx_enet_pdata[fs_no]; | ||
269 | fpi->fs_no = fs_no; | ||
270 | pdev->dev.platform_data = fpi; | ||
271 | |||
272 | e = (unsigned char *)&bd->bi_enetaddr; | ||
273 | for (i = 0; i < 6; i++) | ||
274 | fpi->macaddr[i] = *e++; | ||
275 | |||
276 | fpi->macaddr[5] += ma_count++; | ||
277 | } | ||
278 | |||
279 | static void mpc866ads_fixup_fec_enet_pdata(struct platform_device *pdev, | ||
280 | int idx) | ||
281 | { | ||
282 | /* This is for FEC devices only */ | ||
283 | if (!pdev || !pdev->name || (!strstr(pdev->name, "fsl-cpm-fec"))) | ||
284 | return; | ||
285 | mpc866ads_fixup_enet_pdata(pdev, fsid_fec1 + pdev->id - 1); | ||
286 | } | ||
287 | |||
288 | static void mpc866ads_fixup_scc_enet_pdata(struct platform_device *pdev, | ||
289 | int idx) | ||
290 | { | ||
291 | /* This is for SCC devices only */ | ||
292 | if (!pdev || !pdev->name || (!strstr(pdev->name, "fsl-cpm-scc"))) | ||
293 | return; | ||
294 | |||
295 | mpc866ads_fixup_enet_pdata(pdev, fsid_scc1 + pdev->id - 1); | ||
296 | } | ||
297 | |||
318 | static void __init mpc866ads_fixup_uart_pdata(struct platform_device *pdev, | 298 | static void __init mpc866ads_fixup_uart_pdata(struct platform_device *pdev, |
319 | int idx) | 299 | int idx) |
320 | { | 300 | { |
@@ -359,6 +339,9 @@ static int mpc866ads_platform_notify(struct device *dev) | |||
359 | 339 | ||
360 | int __init mpc866ads_init(void) | 340 | int __init mpc866ads_init(void) |
361 | { | 341 | { |
342 | bd_t *bd = (bd_t *) __res; | ||
343 | struct fs_mii_fec_platform_info* fmpi; | ||
344 | |||
362 | printk(KERN_NOTICE "mpc866ads: Init\n"); | 345 | printk(KERN_NOTICE "mpc866ads: Init\n"); |
363 | 346 | ||
364 | platform_notify = mpc866ads_platform_notify; | 347 | platform_notify = mpc866ads_platform_notify; |
@@ -366,11 +349,20 @@ int __init mpc866ads_init(void) | |||
366 | ppc_sys_device_initfunc(); | 349 | ppc_sys_device_initfunc(); |
367 | ppc_sys_device_disable_all(); | 350 | ppc_sys_device_disable_all(); |
368 | 351 | ||
369 | #ifdef MPC8xx_SECOND_ETH_SCC1 | 352 | #ifdef CONFIG_MPC8xx_SECOND_ETH_SCC1 |
370 | ppc_sys_device_enable(MPC8xx_CPM_SCC1); | 353 | ppc_sys_device_enable(MPC8xx_CPM_SCC1); |
371 | #endif | 354 | #endif |
372 | ppc_sys_device_enable(MPC8xx_CPM_FEC1); | 355 | ppc_sys_device_enable(MPC8xx_CPM_FEC1); |
373 | 356 | ||
357 | ppc_sys_device_enable(MPC8xx_MDIO_FEC); | ||
358 | |||
359 | fmpi = ppc_sys_platform_devices[MPC8xx_MDIO_FEC].dev.platform_data = | ||
360 | &mpc8xx_mdio_fec_pdata; | ||
361 | |||
362 | fmpi->mii_speed = ((((bd->bi_intfreq + 4999999) / 2500000) / 2) & 0x3F) << 1; | ||
363 | /* No PHY interrupt line here */ | ||
364 | fmpi->irq[0xf] = -1; | ||
365 | |||
374 | /* Since either of the uarts could be used as console, they need to ready */ | 366 | /* Since either of the uarts could be used as console, they need to ready */ |
375 | #ifdef CONFIG_SERIAL_CPM_SMC1 | 367 | #ifdef CONFIG_SERIAL_CPM_SMC1 |
376 | ppc_sys_device_enable(MPC8xx_CPM_SMC1); | 368 | ppc_sys_device_enable(MPC8xx_CPM_SMC1); |
@@ -381,6 +373,14 @@ int __init mpc866ads_init(void) | |||
381 | ppc_sys_device_enable(MPC8xx_CPM_SMC2); | 373 | ppc_sys_device_enable(MPC8xx_CPM_SMC2); |
382 | ppc_sys_device_setfunc(MPC8xx_CPM_SMC2, PPC_SYS_FUNC_UART); | 374 | ppc_sys_device_setfunc(MPC8xx_CPM_SMC2, PPC_SYS_FUNC_UART); |
383 | #endif | 375 | #endif |
376 | ppc_sys_device_enable(MPC8xx_MDIO_FEC); | ||
377 | |||
378 | fmpi = ppc_sys_platform_devices[MPC8xx_MDIO_FEC].dev.platform_data = | ||
379 | &mpc8xx_mdio_fec_pdata; | ||
380 | |||
381 | fmpi->mii_speed = ((((bd->bi_intfreq + 4999999) / 2500000) / 2) & 0x3F) << 1; | ||
382 | /* No PHY interrupt line here */ | ||
383 | fmpi->irq[0xf] = -1; | ||
384 | 384 | ||
385 | return 0; | 385 | return 0; |
386 | } | 386 | } |
diff --git a/arch/ppc/platforms/mpc885ads_setup.c b/arch/ppc/platforms/mpc885ads_setup.c index c1fc4a16fea9..5dfa4e6c2af0 100644 --- a/arch/ppc/platforms/mpc885ads_setup.c +++ b/arch/ppc/platforms/mpc885ads_setup.c | |||
@@ -38,7 +38,10 @@ extern unsigned char __res[]; | |||
38 | static void setup_smc1_ioports(void); | 38 | static void setup_smc1_ioports(void); |
39 | static void setup_smc2_ioports(void); | 39 | static void setup_smc2_ioports(void); |
40 | 40 | ||
41 | static void __init mpc885ads_scc_phy_init(char); | 41 | static struct fs_mii_fec_platform_info mpc8xx_mdio_fec_pdata; |
42 | static void setup_fec1_ioports(void); | ||
43 | static void setup_fec2_ioports(void); | ||
44 | static void setup_scc3_ioports(void); | ||
42 | 45 | ||
43 | static struct fs_uart_platform_info mpc885_uart_pdata[] = { | 46 | static struct fs_uart_platform_info mpc885_uart_pdata[] = { |
44 | [fsid_smc1_uart] = { | 47 | [fsid_smc1_uart] = { |
@@ -61,23 +64,8 @@ static struct fs_uart_platform_info mpc885_uart_pdata[] = { | |||
61 | }, | 64 | }, |
62 | }; | 65 | }; |
63 | 66 | ||
64 | static struct fs_mii_bus_info fec_mii_bus_info = { | 67 | static struct fs_platform_info mpc8xx_enet_pdata[] = { |
65 | .method = fsmii_fec, | 68 | [fsid_fec1] = { |
66 | .id = 0, | ||
67 | }; | ||
68 | |||
69 | static struct fs_mii_bus_info scc_mii_bus_info = { | ||
70 | #ifdef CONFIG_SCC_ENET_8xx_FIXED | ||
71 | .method = fsmii_fixed, | ||
72 | #else | ||
73 | .method = fsmii_fec, | ||
74 | #endif | ||
75 | |||
76 | .id = 0, | ||
77 | }; | ||
78 | |||
79 | static struct fs_platform_info mpc8xx_fec_pdata[] = { | ||
80 | { | ||
81 | .rx_ring = 128, | 69 | .rx_ring = 128, |
82 | .tx_ring = 16, | 70 | .tx_ring = 16, |
83 | .rx_copybreak = 240, | 71 | .rx_copybreak = 240, |
@@ -85,11 +73,12 @@ static struct fs_platform_info mpc8xx_fec_pdata[] = { | |||
85 | .use_napi = 1, | 73 | .use_napi = 1, |
86 | .napi_weight = 17, | 74 | .napi_weight = 17, |
87 | 75 | ||
88 | .phy_addr = 0, | 76 | .init_ioports = setup_fec1_ioports, |
89 | .phy_irq = SIU_IRQ7, | ||
90 | 77 | ||
91 | .bus_info = &fec_mii_bus_info, | 78 | .bus_id = "0:00", |
92 | }, { | 79 | .has_phy = 1, |
80 | }, | ||
81 | [fsid_fec2] = { | ||
93 | .rx_ring = 128, | 82 | .rx_ring = 128, |
94 | .tx_ring = 16, | 83 | .tx_ring = 16, |
95 | .rx_copybreak = 240, | 84 | .rx_copybreak = 240, |
@@ -97,35 +86,32 @@ static struct fs_platform_info mpc8xx_fec_pdata[] = { | |||
97 | .use_napi = 1, | 86 | .use_napi = 1, |
98 | .napi_weight = 17, | 87 | .napi_weight = 17, |
99 | 88 | ||
100 | .phy_addr = 1, | 89 | .init_ioports = setup_fec2_ioports, |
101 | .phy_irq = SIU_IRQ7, | ||
102 | |||
103 | .bus_info = &fec_mii_bus_info, | ||
104 | } | ||
105 | }; | ||
106 | 90 | ||
107 | static struct fs_platform_info mpc8xx_scc_pdata = { | 91 | .bus_id = "0:01", |
108 | .rx_ring = 64, | 92 | .has_phy = 1, |
109 | .tx_ring = 8, | 93 | }, |
110 | .rx_copybreak = 240, | 94 | [fsid_scc3] = { |
95 | .rx_ring = 64, | ||
96 | .tx_ring = 8, | ||
97 | .rx_copybreak = 240, | ||
111 | 98 | ||
112 | .use_napi = 1, | 99 | .use_napi = 1, |
113 | .napi_weight = 17, | 100 | .napi_weight = 17, |
114 | 101 | ||
115 | .phy_addr = 2, | 102 | .init_ioports = setup_scc3_ioports, |
116 | #ifdef CONFIG_MPC8xx_SCC_ENET_FIXED | 103 | #ifdef CONFIG_FIXED_MII_10_FDX |
117 | .phy_irq = -1, | 104 | .bus_id = "fixed@100:1", |
118 | #else | 105 | #else |
119 | .phy_irq = SIU_IRQ7, | 106 | .bus_id = "0:02", |
120 | #endif | 107 | #endif |
121 | 108 | }, | |
122 | .bus_info = &scc_mii_bus_info, | ||
123 | }; | 109 | }; |
124 | 110 | ||
125 | void __init board_init(void) | 111 | void __init board_init(void) |
126 | { | 112 | { |
127 | volatile cpm8xx_t *cp = cpmp; | 113 | cpm8xx_t *cp = cpmp; |
128 | unsigned int *bcsr_io; | 114 | unsigned int *bcsr_io; |
129 | 115 | ||
130 | #ifdef CONFIG_FS_ENET | 116 | #ifdef CONFIG_FS_ENET |
131 | immap_t *immap = (immap_t *) IMAP_ADDR; | 117 | immap_t *immap = (immap_t *) IMAP_ADDR; |
@@ -164,6 +150,14 @@ void __init board_init(void) | |||
164 | /* use MDC for MII (common) */ | 150 | /* use MDC for MII (common) */ |
165 | setbits16(&immap->im_ioport.iop_pdpar, 0x0080); | 151 | setbits16(&immap->im_ioport.iop_pdpar, 0x0080); |
166 | clrbits16(&immap->im_ioport.iop_pddir, 0x0080); | 152 | clrbits16(&immap->im_ioport.iop_pddir, 0x0080); |
153 | bcsr_io = ioremap(BCSR5, sizeof(unsigned long)); | ||
154 | clrbits32(bcsr_io,BCSR5_MII1_EN); | ||
155 | clrbits32(bcsr_io,BCSR5_MII1_RST); | ||
156 | #ifdef CONFIG_MPC8xx_SECOND_ETH_FEC2 | ||
157 | clrbits32(bcsr_io,BCSR5_MII2_EN); | ||
158 | clrbits32(bcsr_io,BCSR5_MII2_RST); | ||
159 | #endif | ||
160 | iounmap(bcsr_io); | ||
167 | #endif | 161 | #endif |
168 | } | 162 | } |
169 | 163 | ||
@@ -194,8 +188,8 @@ static void setup_fec2_ioports(void) | |||
194 | /* configure FEC2 pins */ | 188 | /* configure FEC2 pins */ |
195 | setbits32(&immap->im_cpm.cp_pepar, 0x0003fffc); | 189 | setbits32(&immap->im_cpm.cp_pepar, 0x0003fffc); |
196 | setbits32(&immap->im_cpm.cp_pedir, 0x0003fffc); | 190 | setbits32(&immap->im_cpm.cp_pedir, 0x0003fffc); |
197 | setbits32(&immap->im_cpm.cp_peso, 0x00037800); | ||
198 | clrbits32(&immap->im_cpm.cp_peso, 0x000087fc); | 191 | clrbits32(&immap->im_cpm.cp_peso, 0x000087fc); |
192 | setbits32(&immap->im_cpm.cp_peso, 0x00037800); | ||
199 | clrbits32(&immap->im_cpm.cp_cptr, 0x00000080); | 193 | clrbits32(&immap->im_cpm.cp_cptr, 0x00000080); |
200 | } | 194 | } |
201 | 195 | ||
@@ -213,6 +207,8 @@ static void setup_scc3_ioports(void) | |||
213 | 207 | ||
214 | /* Enable the PHY. | 208 | /* Enable the PHY. |
215 | */ | 209 | */ |
210 | clrbits32(bcsr_io+4, BCSR4_ETH10_RST); | ||
211 | udelay(1000); | ||
216 | setbits32(bcsr_io+4, BCSR4_ETH10_RST); | 212 | setbits32(bcsr_io+4, BCSR4_ETH10_RST); |
217 | /* Configure port A pins for Txd and Rxd. | 213 | /* Configure port A pins for Txd and Rxd. |
218 | */ | 214 | */ |
@@ -254,37 +250,38 @@ static void setup_scc3_ioports(void) | |||
254 | clrbits32(&immap->im_cpm.cp_pedir, PE_ENET_TENA); | 250 | clrbits32(&immap->im_cpm.cp_pedir, PE_ENET_TENA); |
255 | setbits32(&immap->im_cpm.cp_peso, PE_ENET_TENA); | 251 | setbits32(&immap->im_cpm.cp_peso, PE_ENET_TENA); |
256 | 252 | ||
257 | setbits32(bcsr_io+1, BCSR1_ETHEN); | 253 | setbits32(bcsr_io+4, BCSR1_ETHEN); |
258 | iounmap(bcsr_io); | 254 | iounmap(bcsr_io); |
259 | } | 255 | } |
260 | 256 | ||
257 | static int mac_count = 0; | ||
258 | |||
261 | static void mpc885ads_fixup_enet_pdata(struct platform_device *pdev, int fs_no) | 259 | static void mpc885ads_fixup_enet_pdata(struct platform_device *pdev, int fs_no) |
262 | { | 260 | { |
263 | struct fs_platform_info *fpi = pdev->dev.platform_data; | 261 | struct fs_platform_info *fpi; |
264 | |||
265 | volatile cpm8xx_t *cp; | ||
266 | bd_t *bd = (bd_t *) __res; | 262 | bd_t *bd = (bd_t *) __res; |
267 | char *e; | 263 | char *e; |
268 | int i; | 264 | int i; |
269 | 265 | ||
270 | /* Get pointer to Communication Processor */ | 266 | if(fs_no > ARRAY_SIZE(mpc8xx_enet_pdata)) { |
271 | cp = cpmp; | 267 | printk(KERN_ERR"No network-suitable #%d device on bus", fs_no); |
268 | return; | ||
269 | } | ||
270 | |||
271 | fpi = &mpc8xx_enet_pdata[fs_no]; | ||
272 | |||
272 | switch (fs_no) { | 273 | switch (fs_no) { |
273 | case fsid_fec1: | 274 | case fsid_fec1: |
274 | fpi = &mpc8xx_fec_pdata[0]; | ||
275 | fpi->init_ioports = &setup_fec1_ioports; | 275 | fpi->init_ioports = &setup_fec1_ioports; |
276 | break; | 276 | break; |
277 | case fsid_fec2: | 277 | case fsid_fec2: |
278 | fpi = &mpc8xx_fec_pdata[1]; | ||
279 | fpi->init_ioports = &setup_fec2_ioports; | 278 | fpi->init_ioports = &setup_fec2_ioports; |
280 | break; | 279 | break; |
281 | case fsid_scc3: | 280 | case fsid_scc3: |
282 | fpi = &mpc8xx_scc_pdata; | ||
283 | fpi->init_ioports = &setup_scc3_ioports; | 281 | fpi->init_ioports = &setup_scc3_ioports; |
284 | mpc885ads_scc_phy_init(fpi->phy_addr); | ||
285 | break; | 282 | break; |
286 | default: | 283 | default: |
287 | printk(KERN_WARNING"Device %s is not supported!\n", pdev->name); | 284 | printk(KERN_WARNING "Device %s is not supported!\n", pdev->name); |
288 | return; | 285 | return; |
289 | } | 286 | } |
290 | 287 | ||
@@ -295,7 +292,7 @@ static void mpc885ads_fixup_enet_pdata(struct platform_device *pdev, int fs_no) | |||
295 | for (i = 0; i < 6; i++) | 292 | for (i = 0; i < 6; i++) |
296 | fpi->macaddr[i] = *e++; | 293 | fpi->macaddr[i] = *e++; |
297 | 294 | ||
298 | fpi->macaddr[5 - pdev->id]++; | 295 | fpi->macaddr[5] += mac_count++; |
299 | 296 | ||
300 | } | 297 | } |
301 | 298 | ||
@@ -318,58 +315,6 @@ static void __init mpc885ads_fixup_scc_enet_pdata(struct platform_device *pdev, | |||
318 | mpc885ads_fixup_enet_pdata(pdev, fsid_scc1 + pdev->id - 1); | 315 | mpc885ads_fixup_enet_pdata(pdev, fsid_scc1 + pdev->id - 1); |
319 | } | 316 | } |
320 | 317 | ||
321 | /* SCC ethernet controller does not have MII management channel. FEC1 MII | ||
322 | * channel is used to communicate with the 10Mbit PHY. | ||
323 | */ | ||
324 | |||
325 | #define MII_ECNTRL_PINMUX 0x4 | ||
326 | #define FEC_ECNTRL_PINMUX 0x00000004 | ||
327 | #define FEC_RCNTRL_MII_MODE 0x00000004 | ||
328 | |||
329 | /* Make MII read/write commands. | ||
330 | */ | ||
331 | #define mk_mii_write(REG, VAL, PHY_ADDR) (0x50020000 | (((REG) & 0x1f) << 18) | \ | ||
332 | ((VAL) & 0xffff) | ((PHY_ADDR) << 23)) | ||
333 | |||
334 | static void mpc885ads_scc_phy_init(char phy_addr) | ||
335 | { | ||
336 | volatile immap_t *immap; | ||
337 | volatile fec_t *fecp; | ||
338 | bd_t *bd; | ||
339 | |||
340 | bd = (bd_t *) __res; | ||
341 | immap = (immap_t *) IMAP_ADDR; /* pointer to internal registers */ | ||
342 | fecp = &(immap->im_cpm.cp_fec); | ||
343 | |||
344 | /* Enable MII pins of the FEC1 | ||
345 | */ | ||
346 | setbits16(&immap->im_ioport.iop_pdpar, 0x0080); | ||
347 | clrbits16(&immap->im_ioport.iop_pddir, 0x0080); | ||
348 | /* Set MII speed to 2.5 MHz | ||
349 | */ | ||
350 | out_be32(&fecp->fec_mii_speed, | ||
351 | ((((bd->bi_intfreq + 4999999) / 2500000) / 2) & 0x3F) << 1); | ||
352 | |||
353 | /* Enable FEC pin MUX | ||
354 | */ | ||
355 | setbits32(&fecp->fec_ecntrl, MII_ECNTRL_PINMUX); | ||
356 | setbits32(&fecp->fec_r_cntrl, FEC_RCNTRL_MII_MODE); | ||
357 | |||
358 | out_be32(&fecp->fec_mii_data, | ||
359 | mk_mii_write(MII_BMCR, BMCR_ISOLATE, phy_addr)); | ||
360 | udelay(100); | ||
361 | out_be32(&fecp->fec_mii_data, | ||
362 | mk_mii_write(MII_ADVERTISE, | ||
363 | ADVERTISE_10HALF | ADVERTISE_CSMA, phy_addr)); | ||
364 | udelay(100); | ||
365 | |||
366 | /* Disable FEC MII settings | ||
367 | */ | ||
368 | clrbits32(&fecp->fec_ecntrl, MII_ECNTRL_PINMUX); | ||
369 | clrbits32(&fecp->fec_r_cntrl, FEC_RCNTRL_MII_MODE); | ||
370 | out_be32(&fecp->fec_mii_speed, 0); | ||
371 | } | ||
372 | |||
373 | static void setup_smc1_ioports(void) | 318 | static void setup_smc1_ioports(void) |
374 | { | 319 | { |
375 | immap_t *immap = (immap_t *) IMAP_ADDR; | 320 | immap_t *immap = (immap_t *) IMAP_ADDR; |
@@ -462,6 +407,9 @@ static int mpc885ads_platform_notify(struct device *dev) | |||
462 | 407 | ||
463 | int __init mpc885ads_init(void) | 408 | int __init mpc885ads_init(void) |
464 | { | 409 | { |
410 | struct fs_mii_fec_platform_info* fmpi; | ||
411 | bd_t *bd = (bd_t *) __res; | ||
412 | |||
465 | printk(KERN_NOTICE "mpc885ads: Init\n"); | 413 | printk(KERN_NOTICE "mpc885ads: Init\n"); |
466 | 414 | ||
467 | platform_notify = mpc885ads_platform_notify; | 415 | platform_notify = mpc885ads_platform_notify; |
@@ -471,8 +419,17 @@ int __init mpc885ads_init(void) | |||
471 | 419 | ||
472 | ppc_sys_device_enable(MPC8xx_CPM_FEC1); | 420 | ppc_sys_device_enable(MPC8xx_CPM_FEC1); |
473 | 421 | ||
422 | ppc_sys_device_enable(MPC8xx_MDIO_FEC); | ||
423 | fmpi = ppc_sys_platform_devices[MPC8xx_MDIO_FEC].dev.platform_data = | ||
424 | &mpc8xx_mdio_fec_pdata; | ||
425 | |||
426 | fmpi->mii_speed = ((((bd->bi_intfreq + 4999999) / 2500000) / 2) & 0x3F) << 1; | ||
427 | |||
428 | /* No PHY interrupt line here */ | ||
429 | fmpi->irq[0xf] = SIU_IRQ7; | ||
430 | |||
474 | #ifdef CONFIG_MPC8xx_SECOND_ETH_SCC3 | 431 | #ifdef CONFIG_MPC8xx_SECOND_ETH_SCC3 |
475 | ppc_sys_device_enable(MPC8xx_CPM_SCC1); | 432 | ppc_sys_device_enable(MPC8xx_CPM_SCC3); |
476 | 433 | ||
477 | #endif | 434 | #endif |
478 | #ifdef CONFIG_MPC8xx_SECOND_ETH_FEC2 | 435 | #ifdef CONFIG_MPC8xx_SECOND_ETH_FEC2 |
diff --git a/arch/ppc/platforms/pq2ads_pd.h b/arch/ppc/platforms/pq2ads_pd.h index 8f14a43eafec..672483df8079 100644 --- a/arch/ppc/platforms/pq2ads_pd.h +++ b/arch/ppc/platforms/pq2ads_pd.h | |||
@@ -29,86 +29,4 @@ | |||
29 | #define F3_RXCLK 13 | 29 | #define F3_RXCLK 13 |
30 | #define F3_TXCLK 14 | 30 | #define F3_TXCLK 14 |
31 | 31 | ||
32 | /* Automatically generates register configurations */ | ||
33 | #define PC_CLK(x) ((uint)(1<<(x-1))) /* FCC CLK I/O ports */ | ||
34 | |||
35 | #define CMXFCR_RF1CS(x) ((uint)((x-5)<<27)) /* FCC1 Receive Clock Source */ | ||
36 | #define CMXFCR_TF1CS(x) ((uint)((x-5)<<24)) /* FCC1 Transmit Clock Source */ | ||
37 | #define CMXFCR_RF2CS(x) ((uint)((x-9)<<19)) /* FCC2 Receive Clock Source */ | ||
38 | #define CMXFCR_TF2CS(x) ((uint)((x-9)<<16)) /* FCC2 Transmit Clock Source */ | ||
39 | #define CMXFCR_RF3CS(x) ((uint)((x-9)<<11)) /* FCC3 Receive Clock Source */ | ||
40 | #define CMXFCR_TF3CS(x) ((uint)((x-9)<<8)) /* FCC3 Transmit Clock Source */ | ||
41 | |||
42 | #define PC_F1RXCLK PC_CLK(F1_RXCLK) | ||
43 | #define PC_F1TXCLK PC_CLK(F1_TXCLK) | ||
44 | #define CMX1_CLK_ROUTE (CMXFCR_RF1CS(F1_RXCLK) | CMXFCR_TF1CS(F1_TXCLK)) | ||
45 | #define CMX1_CLK_MASK ((uint)0xff000000) | ||
46 | |||
47 | #define PC_F2RXCLK PC_CLK(F2_RXCLK) | ||
48 | #define PC_F2TXCLK PC_CLK(F2_TXCLK) | ||
49 | #define CMX2_CLK_ROUTE (CMXFCR_RF2CS(F2_RXCLK) | CMXFCR_TF2CS(F2_TXCLK)) | ||
50 | #define CMX2_CLK_MASK ((uint)0x00ff0000) | ||
51 | |||
52 | #define PC_F3RXCLK PC_CLK(F3_RXCLK) | ||
53 | #define PC_F3TXCLK PC_CLK(F3_TXCLK) | ||
54 | #define CMX3_CLK_ROUTE (CMXFCR_RF3CS(F3_RXCLK) | CMXFCR_TF3CS(F3_TXCLK)) | ||
55 | #define CMX3_CLK_MASK ((uint)0x0000ff00) | ||
56 | |||
57 | /* I/O Pin assignment for FCC1. I don't yet know the best way to do this, | ||
58 | * but there is little variation among the choices. | ||
59 | */ | ||
60 | #define PA1_COL 0x00000001U | ||
61 | #define PA1_CRS 0x00000002U | ||
62 | #define PA1_TXER 0x00000004U | ||
63 | #define PA1_TXEN 0x00000008U | ||
64 | #define PA1_RXDV 0x00000010U | ||
65 | #define PA1_RXER 0x00000020U | ||
66 | #define PA1_TXDAT 0x00003c00U | ||
67 | #define PA1_RXDAT 0x0003c000U | ||
68 | #define PA1_PSORA0 (PA1_RXDAT | PA1_TXDAT) | ||
69 | #define PA1_PSORA1 (PA1_COL | PA1_CRS | PA1_TXER | PA1_TXEN | \ | ||
70 | PA1_RXDV | PA1_RXER) | ||
71 | #define PA1_DIRA0 (PA1_RXDAT | PA1_CRS | PA1_COL | PA1_RXER | PA1_RXDV) | ||
72 | #define PA1_DIRA1 (PA1_TXDAT | PA1_TXEN | PA1_TXER) | ||
73 | |||
74 | |||
75 | /* I/O Pin assignment for FCC2. I don't yet know the best way to do this, | ||
76 | * but there is little variation among the choices. | ||
77 | */ | ||
78 | #define PB2_TXER 0x00000001U | ||
79 | #define PB2_RXDV 0x00000002U | ||
80 | #define PB2_TXEN 0x00000004U | ||
81 | #define PB2_RXER 0x00000008U | ||
82 | #define PB2_COL 0x00000010U | ||
83 | #define PB2_CRS 0x00000020U | ||
84 | #define PB2_TXDAT 0x000003c0U | ||
85 | #define PB2_RXDAT 0x00003c00U | ||
86 | #define PB2_PSORB0 (PB2_RXDAT | PB2_TXDAT | PB2_CRS | PB2_COL | \ | ||
87 | PB2_RXER | PB2_RXDV | PB2_TXER) | ||
88 | #define PB2_PSORB1 (PB2_TXEN) | ||
89 | #define PB2_DIRB0 (PB2_RXDAT | PB2_CRS | PB2_COL | PB2_RXER | PB2_RXDV) | ||
90 | #define PB2_DIRB1 (PB2_TXDAT | PB2_TXEN | PB2_TXER) | ||
91 | |||
92 | |||
93 | /* I/O Pin assignment for FCC3. I don't yet know the best way to do this, | ||
94 | * but there is little variation among the choices. | ||
95 | */ | ||
96 | #define PB3_RXDV 0x00004000U | ||
97 | #define PB3_RXER 0x00008000U | ||
98 | #define PB3_TXER 0x00010000U | ||
99 | #define PB3_TXEN 0x00020000U | ||
100 | #define PB3_COL 0x00040000U | ||
101 | #define PB3_CRS 0x00080000U | ||
102 | #define PB3_TXDAT 0x0f000000U | ||
103 | #define PB3_RXDAT 0x00f00000U | ||
104 | #define PB3_PSORB0 (PB3_RXDAT | PB3_TXDAT | PB3_CRS | PB3_COL | \ | ||
105 | PB3_RXER | PB3_RXDV | PB3_TXER | PB3_TXEN) | ||
106 | #define PB3_PSORB1 0 | ||
107 | #define PB3_DIRB0 (PB3_RXDAT | PB3_CRS | PB3_COL | PB3_RXER | PB3_RXDV) | ||
108 | #define PB3_DIRB1 (PB3_TXDAT | PB3_TXEN | PB3_TXER) | ||
109 | |||
110 | #define FCC_MEM_OFFSET(x) (CPM_FCC_SPECIAL_BASE + (x*128)) | ||
111 | #define FCC1_MEM_OFFSET FCC_MEM_OFFSET(0) | ||
112 | #define FCC2_MEM_OFFSET FCC_MEM_OFFSET(1) | ||
113 | |||
114 | #endif | 32 | #endif |
diff --git a/arch/ppc/syslib/Makefile b/arch/ppc/syslib/Makefile index 2497bbc07e76..dca23f2ef851 100644 --- a/arch/ppc/syslib/Makefile +++ b/arch/ppc/syslib/Makefile | |||
@@ -93,7 +93,7 @@ obj-$(CONFIG_PCI) += pci_auto.o | |||
93 | endif | 93 | endif |
94 | obj-$(CONFIG_RAPIDIO) += ppc85xx_rio.o | 94 | obj-$(CONFIG_RAPIDIO) += ppc85xx_rio.o |
95 | obj-$(CONFIG_83xx) += ppc83xx_setup.o ppc_sys.o \ | 95 | obj-$(CONFIG_83xx) += ppc83xx_setup.o ppc_sys.o \ |
96 | mpc83xx_sys.o mpc83xx_devices.o | 96 | mpc83xx_sys.o mpc83xx_devices.o ipic.o |
97 | ifeq ($(CONFIG_83xx),y) | 97 | ifeq ($(CONFIG_83xx),y) |
98 | obj-$(CONFIG_PCI) += pci_auto.o | 98 | obj-$(CONFIG_PCI) += pci_auto.o |
99 | endif | 99 | endif |
diff --git a/arch/ppc/syslib/ipic.c b/arch/ppc/syslib/ipic.c new file mode 100644 index 000000000000..46801f5ec03f --- /dev/null +++ b/arch/ppc/syslib/ipic.c | |||
@@ -0,0 +1,646 @@ | |||
1 | /* | ||
2 | * include/asm-ppc/ipic.c | ||
3 | * | ||
4 | * IPIC routines implementations. | ||
5 | * | ||
6 | * Copyright 2005 Freescale Semiconductor, Inc. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify it | ||
9 | * under the terms of the GNU General Public License as published by the | ||
10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
11 | * option) any later version. | ||
12 | */ | ||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/init.h> | ||
15 | #include <linux/errno.h> | ||
16 | #include <linux/reboot.h> | ||
17 | #include <linux/slab.h> | ||
18 | #include <linux/stddef.h> | ||
19 | #include <linux/sched.h> | ||
20 | #include <linux/signal.h> | ||
21 | #include <linux/sysdev.h> | ||
22 | #include <asm/irq.h> | ||
23 | #include <asm/io.h> | ||
24 | #include <asm/ipic.h> | ||
25 | #include <asm/mpc83xx.h> | ||
26 | |||
27 | #include "ipic.h" | ||
28 | |||
29 | static struct ipic p_ipic; | ||
30 | static struct ipic * primary_ipic; | ||
31 | |||
32 | static struct ipic_info ipic_info[] = { | ||
33 | [9] = { | ||
34 | .pend = IPIC_SIPNR_H, | ||
35 | .mask = IPIC_SIMSR_H, | ||
36 | .prio = IPIC_SIPRR_D, | ||
37 | .force = IPIC_SIFCR_H, | ||
38 | .bit = 24, | ||
39 | .prio_mask = 0, | ||
40 | }, | ||
41 | [10] = { | ||
42 | .pend = IPIC_SIPNR_H, | ||
43 | .mask = IPIC_SIMSR_H, | ||
44 | .prio = IPIC_SIPRR_D, | ||
45 | .force = IPIC_SIFCR_H, | ||
46 | .bit = 25, | ||
47 | .prio_mask = 1, | ||
48 | }, | ||
49 | [11] = { | ||
50 | .pend = IPIC_SIPNR_H, | ||
51 | .mask = IPIC_SIMSR_H, | ||
52 | .prio = IPIC_SIPRR_D, | ||
53 | .force = IPIC_SIFCR_H, | ||
54 | .bit = 26, | ||
55 | .prio_mask = 2, | ||
56 | }, | ||
57 | [14] = { | ||
58 | .pend = IPIC_SIPNR_H, | ||
59 | .mask = IPIC_SIMSR_H, | ||
60 | .prio = IPIC_SIPRR_D, | ||
61 | .force = IPIC_SIFCR_H, | ||
62 | .bit = 29, | ||
63 | .prio_mask = 5, | ||
64 | }, | ||
65 | [15] = { | ||
66 | .pend = IPIC_SIPNR_H, | ||
67 | .mask = IPIC_SIMSR_H, | ||
68 | .prio = IPIC_SIPRR_D, | ||
69 | .force = IPIC_SIFCR_H, | ||
70 | .bit = 30, | ||
71 | .prio_mask = 6, | ||
72 | }, | ||
73 | [16] = { | ||
74 | .pend = IPIC_SIPNR_H, | ||
75 | .mask = IPIC_SIMSR_H, | ||
76 | .prio = IPIC_SIPRR_D, | ||
77 | .force = IPIC_SIFCR_H, | ||
78 | .bit = 31, | ||
79 | .prio_mask = 7, | ||
80 | }, | ||
81 | [17] = { | ||
82 | .pend = IPIC_SEPNR, | ||
83 | .mask = IPIC_SEMSR, | ||
84 | .prio = IPIC_SMPRR_A, | ||
85 | .force = IPIC_SEFCR, | ||
86 | .bit = 1, | ||
87 | .prio_mask = 5, | ||
88 | }, | ||
89 | [18] = { | ||
90 | .pend = IPIC_SEPNR, | ||
91 | .mask = IPIC_SEMSR, | ||
92 | .prio = IPIC_SMPRR_A, | ||
93 | .force = IPIC_SEFCR, | ||
94 | .bit = 2, | ||
95 | .prio_mask = 6, | ||
96 | }, | ||
97 | [19] = { | ||
98 | .pend = IPIC_SEPNR, | ||
99 | .mask = IPIC_SEMSR, | ||
100 | .prio = IPIC_SMPRR_A, | ||
101 | .force = IPIC_SEFCR, | ||
102 | .bit = 3, | ||
103 | .prio_mask = 7, | ||
104 | }, | ||
105 | [20] = { | ||
106 | .pend = IPIC_SEPNR, | ||
107 | .mask = IPIC_SEMSR, | ||
108 | .prio = IPIC_SMPRR_B, | ||
109 | .force = IPIC_SEFCR, | ||
110 | .bit = 4, | ||
111 | .prio_mask = 4, | ||
112 | }, | ||
113 | [21] = { | ||
114 | .pend = IPIC_SEPNR, | ||
115 | .mask = IPIC_SEMSR, | ||
116 | .prio = IPIC_SMPRR_B, | ||
117 | .force = IPIC_SEFCR, | ||
118 | .bit = 5, | ||
119 | .prio_mask = 5, | ||
120 | }, | ||
121 | [22] = { | ||
122 | .pend = IPIC_SEPNR, | ||
123 | .mask = IPIC_SEMSR, | ||
124 | .prio = IPIC_SMPRR_B, | ||
125 | .force = IPIC_SEFCR, | ||
126 | .bit = 6, | ||
127 | .prio_mask = 6, | ||
128 | }, | ||
129 | [23] = { | ||
130 | .pend = IPIC_SEPNR, | ||
131 | .mask = IPIC_SEMSR, | ||
132 | .prio = IPIC_SMPRR_B, | ||
133 | .force = IPIC_SEFCR, | ||
134 | .bit = 7, | ||
135 | .prio_mask = 7, | ||
136 | }, | ||
137 | [32] = { | ||
138 | .pend = IPIC_SIPNR_H, | ||
139 | .mask = IPIC_SIMSR_H, | ||
140 | .prio = IPIC_SIPRR_A, | ||
141 | .force = IPIC_SIFCR_H, | ||
142 | .bit = 0, | ||
143 | .prio_mask = 0, | ||
144 | }, | ||
145 | [33] = { | ||
146 | .pend = IPIC_SIPNR_H, | ||
147 | .mask = IPIC_SIMSR_H, | ||
148 | .prio = IPIC_SIPRR_A, | ||
149 | .force = IPIC_SIFCR_H, | ||
150 | .bit = 1, | ||
151 | .prio_mask = 1, | ||
152 | }, | ||
153 | [34] = { | ||
154 | .pend = IPIC_SIPNR_H, | ||
155 | .mask = IPIC_SIMSR_H, | ||
156 | .prio = IPIC_SIPRR_A, | ||
157 | .force = IPIC_SIFCR_H, | ||
158 | .bit = 2, | ||
159 | .prio_mask = 2, | ||
160 | }, | ||
161 | [35] = { | ||
162 | .pend = IPIC_SIPNR_H, | ||
163 | .mask = IPIC_SIMSR_H, | ||
164 | .prio = IPIC_SIPRR_A, | ||
165 | .force = IPIC_SIFCR_H, | ||
166 | .bit = 3, | ||
167 | .prio_mask = 3, | ||
168 | }, | ||
169 | [36] = { | ||
170 | .pend = IPIC_SIPNR_H, | ||
171 | .mask = IPIC_SIMSR_H, | ||
172 | .prio = IPIC_SIPRR_A, | ||
173 | .force = IPIC_SIFCR_H, | ||
174 | .bit = 4, | ||
175 | .prio_mask = 4, | ||
176 | }, | ||
177 | [37] = { | ||
178 | .pend = IPIC_SIPNR_H, | ||
179 | .mask = IPIC_SIMSR_H, | ||
180 | .prio = IPIC_SIPRR_A, | ||
181 | .force = IPIC_SIFCR_H, | ||
182 | .bit = 5, | ||
183 | .prio_mask = 5, | ||
184 | }, | ||
185 | [38] = { | ||
186 | .pend = IPIC_SIPNR_H, | ||
187 | .mask = IPIC_SIMSR_H, | ||
188 | .prio = IPIC_SIPRR_A, | ||
189 | .force = IPIC_SIFCR_H, | ||
190 | .bit = 6, | ||
191 | .prio_mask = 6, | ||
192 | }, | ||
193 | [39] = { | ||
194 | .pend = IPIC_SIPNR_H, | ||
195 | .mask = IPIC_SIMSR_H, | ||
196 | .prio = IPIC_SIPRR_A, | ||
197 | .force = IPIC_SIFCR_H, | ||
198 | .bit = 7, | ||
199 | .prio_mask = 7, | ||
200 | }, | ||
201 | [48] = { | ||
202 | .pend = IPIC_SEPNR, | ||
203 | .mask = IPIC_SEMSR, | ||
204 | .prio = IPIC_SMPRR_A, | ||
205 | .force = IPIC_SEFCR, | ||
206 | .bit = 0, | ||
207 | .prio_mask = 4, | ||
208 | }, | ||
209 | [64] = { | ||
210 | .pend = IPIC_SIPNR_H, | ||
211 | .mask = IPIC_SIMSR_L, | ||
212 | .prio = IPIC_SMPRR_A, | ||
213 | .force = IPIC_SIFCR_L, | ||
214 | .bit = 0, | ||
215 | .prio_mask = 0, | ||
216 | }, | ||
217 | [65] = { | ||
218 | .pend = IPIC_SIPNR_H, | ||
219 | .mask = IPIC_SIMSR_L, | ||
220 | .prio = IPIC_SMPRR_A, | ||
221 | .force = IPIC_SIFCR_L, | ||
222 | .bit = 1, | ||
223 | .prio_mask = 1, | ||
224 | }, | ||
225 | [66] = { | ||
226 | .pend = IPIC_SIPNR_H, | ||
227 | .mask = IPIC_SIMSR_L, | ||
228 | .prio = IPIC_SMPRR_A, | ||
229 | .force = IPIC_SIFCR_L, | ||
230 | .bit = 2, | ||
231 | .prio_mask = 2, | ||
232 | }, | ||
233 | [67] = { | ||
234 | .pend = IPIC_SIPNR_H, | ||
235 | .mask = IPIC_SIMSR_L, | ||
236 | .prio = IPIC_SMPRR_A, | ||
237 | .force = IPIC_SIFCR_L, | ||
238 | .bit = 3, | ||
239 | .prio_mask = 3, | ||
240 | }, | ||
241 | [68] = { | ||
242 | .pend = IPIC_SIPNR_H, | ||
243 | .mask = IPIC_SIMSR_L, | ||
244 | .prio = IPIC_SMPRR_B, | ||
245 | .force = IPIC_SIFCR_L, | ||
246 | .bit = 4, | ||
247 | .prio_mask = 0, | ||
248 | }, | ||
249 | [69] = { | ||
250 | .pend = IPIC_SIPNR_H, | ||
251 | .mask = IPIC_SIMSR_L, | ||
252 | .prio = IPIC_SMPRR_B, | ||
253 | .force = IPIC_SIFCR_L, | ||
254 | .bit = 5, | ||
255 | .prio_mask = 1, | ||
256 | }, | ||
257 | [70] = { | ||
258 | .pend = IPIC_SIPNR_H, | ||
259 | .mask = IPIC_SIMSR_L, | ||
260 | .prio = IPIC_SMPRR_B, | ||
261 | .force = IPIC_SIFCR_L, | ||
262 | .bit = 6, | ||
263 | .prio_mask = 2, | ||
264 | }, | ||
265 | [71] = { | ||
266 | .pend = IPIC_SIPNR_H, | ||
267 | .mask = IPIC_SIMSR_L, | ||
268 | .prio = IPIC_SMPRR_B, | ||
269 | .force = IPIC_SIFCR_L, | ||
270 | .bit = 7, | ||
271 | .prio_mask = 3, | ||
272 | }, | ||
273 | [72] = { | ||
274 | .pend = IPIC_SIPNR_H, | ||
275 | .mask = IPIC_SIMSR_L, | ||
276 | .prio = 0, | ||
277 | .force = IPIC_SIFCR_L, | ||
278 | .bit = 8, | ||
279 | }, | ||
280 | [73] = { | ||
281 | .pend = IPIC_SIPNR_H, | ||
282 | .mask = IPIC_SIMSR_L, | ||
283 | .prio = 0, | ||
284 | .force = IPIC_SIFCR_L, | ||
285 | .bit = 9, | ||
286 | }, | ||
287 | [74] = { | ||
288 | .pend = IPIC_SIPNR_H, | ||
289 | .mask = IPIC_SIMSR_L, | ||
290 | .prio = 0, | ||
291 | .force = IPIC_SIFCR_L, | ||
292 | .bit = 10, | ||
293 | }, | ||
294 | [75] = { | ||
295 | .pend = IPIC_SIPNR_H, | ||
296 | .mask = IPIC_SIMSR_L, | ||
297 | .prio = 0, | ||
298 | .force = IPIC_SIFCR_L, | ||
299 | .bit = 11, | ||
300 | }, | ||
301 | [76] = { | ||
302 | .pend = IPIC_SIPNR_H, | ||
303 | .mask = IPIC_SIMSR_L, | ||
304 | .prio = 0, | ||
305 | .force = IPIC_SIFCR_L, | ||
306 | .bit = 12, | ||
307 | }, | ||
308 | [77] = { | ||
309 | .pend = IPIC_SIPNR_H, | ||
310 | .mask = IPIC_SIMSR_L, | ||
311 | .prio = 0, | ||
312 | .force = IPIC_SIFCR_L, | ||
313 | .bit = 13, | ||
314 | }, | ||
315 | [78] = { | ||
316 | .pend = IPIC_SIPNR_H, | ||
317 | .mask = IPIC_SIMSR_L, | ||
318 | .prio = 0, | ||
319 | .force = IPIC_SIFCR_L, | ||
320 | .bit = 14, | ||
321 | }, | ||
322 | [79] = { | ||
323 | .pend = IPIC_SIPNR_H, | ||
324 | .mask = IPIC_SIMSR_L, | ||
325 | .prio = 0, | ||
326 | .force = IPIC_SIFCR_L, | ||
327 | .bit = 15, | ||
328 | }, | ||
329 | [80] = { | ||
330 | .pend = IPIC_SIPNR_H, | ||
331 | .mask = IPIC_SIMSR_L, | ||
332 | .prio = 0, | ||
333 | .force = IPIC_SIFCR_L, | ||
334 | .bit = 16, | ||
335 | }, | ||
336 | [84] = { | ||
337 | .pend = IPIC_SIPNR_H, | ||
338 | .mask = IPIC_SIMSR_L, | ||
339 | .prio = 0, | ||
340 | .force = IPIC_SIFCR_L, | ||
341 | .bit = 20, | ||
342 | }, | ||
343 | [85] = { | ||
344 | .pend = IPIC_SIPNR_H, | ||
345 | .mask = IPIC_SIMSR_L, | ||
346 | .prio = 0, | ||
347 | .force = IPIC_SIFCR_L, | ||
348 | .bit = 21, | ||
349 | }, | ||
350 | [90] = { | ||
351 | .pend = IPIC_SIPNR_H, | ||
352 | .mask = IPIC_SIMSR_L, | ||
353 | .prio = 0, | ||
354 | .force = IPIC_SIFCR_L, | ||
355 | .bit = 26, | ||
356 | }, | ||
357 | [91] = { | ||
358 | .pend = IPIC_SIPNR_H, | ||
359 | .mask = IPIC_SIMSR_L, | ||
360 | .prio = 0, | ||
361 | .force = IPIC_SIFCR_L, | ||
362 | .bit = 27, | ||
363 | }, | ||
364 | }; | ||
365 | |||
366 | static inline u32 ipic_read(volatile u32 __iomem *base, unsigned int reg) | ||
367 | { | ||
368 | return in_be32(base + (reg >> 2)); | ||
369 | } | ||
370 | |||
371 | static inline void ipic_write(volatile u32 __iomem *base, unsigned int reg, u32 value) | ||
372 | { | ||
373 | out_be32(base + (reg >> 2), value); | ||
374 | } | ||
375 | |||
376 | static inline struct ipic * ipic_from_irq(unsigned int irq) | ||
377 | { | ||
378 | return primary_ipic; | ||
379 | } | ||
380 | |||
381 | static void ipic_enable_irq(unsigned int irq) | ||
382 | { | ||
383 | struct ipic *ipic = ipic_from_irq(irq); | ||
384 | unsigned int src = irq - ipic->irq_offset; | ||
385 | u32 temp; | ||
386 | |||
387 | temp = ipic_read(ipic->regs, ipic_info[src].mask); | ||
388 | temp |= (1 << (31 - ipic_info[src].bit)); | ||
389 | ipic_write(ipic->regs, ipic_info[src].mask, temp); | ||
390 | } | ||
391 | |||
392 | static void ipic_disable_irq(unsigned int irq) | ||
393 | { | ||
394 | struct ipic *ipic = ipic_from_irq(irq); | ||
395 | unsigned int src = irq - ipic->irq_offset; | ||
396 | u32 temp; | ||
397 | |||
398 | temp = ipic_read(ipic->regs, ipic_info[src].mask); | ||
399 | temp &= ~(1 << (31 - ipic_info[src].bit)); | ||
400 | ipic_write(ipic->regs, ipic_info[src].mask, temp); | ||
401 | } | ||
402 | |||
403 | static void ipic_disable_irq_and_ack(unsigned int irq) | ||
404 | { | ||
405 | struct ipic *ipic = ipic_from_irq(irq); | ||
406 | unsigned int src = irq - ipic->irq_offset; | ||
407 | u32 temp; | ||
408 | |||
409 | ipic_disable_irq(irq); | ||
410 | |||
411 | temp = ipic_read(ipic->regs, ipic_info[src].pend); | ||
412 | temp |= (1 << (31 - ipic_info[src].bit)); | ||
413 | ipic_write(ipic->regs, ipic_info[src].pend, temp); | ||
414 | } | ||
415 | |||
416 | static void ipic_end_irq(unsigned int irq) | ||
417 | { | ||
418 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) | ||
419 | ipic_enable_irq(irq); | ||
420 | } | ||
421 | |||
422 | struct hw_interrupt_type ipic = { | ||
423 | .typename = " IPIC ", | ||
424 | .enable = ipic_enable_irq, | ||
425 | .disable = ipic_disable_irq, | ||
426 | .ack = ipic_disable_irq_and_ack, | ||
427 | .end = ipic_end_irq, | ||
428 | }; | ||
429 | |||
430 | void __init ipic_init(phys_addr_t phys_addr, | ||
431 | unsigned int flags, | ||
432 | unsigned int irq_offset, | ||
433 | unsigned char *senses, | ||
434 | unsigned int senses_count) | ||
435 | { | ||
436 | u32 i, temp = 0; | ||
437 | |||
438 | primary_ipic = &p_ipic; | ||
439 | primary_ipic->regs = ioremap(phys_addr, MPC83xx_IPIC_SIZE); | ||
440 | |||
441 | primary_ipic->irq_offset = irq_offset; | ||
442 | |||
443 | ipic_write(primary_ipic->regs, IPIC_SICNR, 0x0); | ||
444 | |||
445 | /* default priority scheme is grouped. If spread mode is required | ||
446 | * configure SICFR accordingly */ | ||
447 | if (flags & IPIC_SPREADMODE_GRP_A) | ||
448 | temp |= SICFR_IPSA; | ||
449 | if (flags & IPIC_SPREADMODE_GRP_D) | ||
450 | temp |= SICFR_IPSD; | ||
451 | if (flags & IPIC_SPREADMODE_MIX_A) | ||
452 | temp |= SICFR_MPSA; | ||
453 | if (flags & IPIC_SPREADMODE_MIX_B) | ||
454 | temp |= SICFR_MPSB; | ||
455 | |||
456 | ipic_write(primary_ipic->regs, IPIC_SICNR, temp); | ||
457 | |||
458 | /* handle MCP route */ | ||
459 | temp = 0; | ||
460 | if (flags & IPIC_DISABLE_MCP_OUT) | ||
461 | temp = SERCR_MCPR; | ||
462 | ipic_write(primary_ipic->regs, IPIC_SERCR, temp); | ||
463 | |||
464 | /* handle routing of IRQ0 to MCP */ | ||
465 | temp = ipic_read(primary_ipic->regs, IPIC_SEMSR); | ||
466 | |||
467 | if (flags & IPIC_IRQ0_MCP) | ||
468 | temp |= SEMSR_SIRQ0; | ||
469 | else | ||
470 | temp &= ~SEMSR_SIRQ0; | ||
471 | |||
472 | ipic_write(primary_ipic->regs, IPIC_SEMSR, temp); | ||
473 | |||
474 | for (i = 0 ; i < NR_IPIC_INTS ; i++) { | ||
475 | irq_desc[i+irq_offset].chip = &ipic; | ||
476 | irq_desc[i+irq_offset].status = IRQ_LEVEL; | ||
477 | } | ||
478 | |||
479 | temp = 0; | ||
480 | for (i = 0 ; i < senses_count ; i++) { | ||
481 | if ((senses[i] & IRQ_SENSE_MASK) == IRQ_SENSE_EDGE) { | ||
482 | temp |= 1 << (15 - i); | ||
483 | if (i != 0) | ||
484 | irq_desc[i + irq_offset + MPC83xx_IRQ_EXT1 - 1].status = 0; | ||
485 | else | ||
486 | irq_desc[irq_offset + MPC83xx_IRQ_EXT0].status = 0; | ||
487 | } | ||
488 | } | ||
489 | ipic_write(primary_ipic->regs, IPIC_SECNR, temp); | ||
490 | |||
491 | printk ("IPIC (%d IRQ sources, %d External IRQs) at %p\n", NR_IPIC_INTS, | ||
492 | senses_count, primary_ipic->regs); | ||
493 | } | ||
494 | |||
495 | int ipic_set_priority(unsigned int irq, unsigned int priority) | ||
496 | { | ||
497 | struct ipic *ipic = ipic_from_irq(irq); | ||
498 | unsigned int src = irq - ipic->irq_offset; | ||
499 | u32 temp; | ||
500 | |||
501 | if (priority > 7) | ||
502 | return -EINVAL; | ||
503 | if (src > 127) | ||
504 | return -EINVAL; | ||
505 | if (ipic_info[src].prio == 0) | ||
506 | return -EINVAL; | ||
507 | |||
508 | temp = ipic_read(ipic->regs, ipic_info[src].prio); | ||
509 | |||
510 | if (priority < 4) { | ||
511 | temp &= ~(0x7 << (20 + (3 - priority) * 3)); | ||
512 | temp |= ipic_info[src].prio_mask << (20 + (3 - priority) * 3); | ||
513 | } else { | ||
514 | temp &= ~(0x7 << (4 + (7 - priority) * 3)); | ||
515 | temp |= ipic_info[src].prio_mask << (4 + (7 - priority) * 3); | ||
516 | } | ||
517 | |||
518 | ipic_write(ipic->regs, ipic_info[src].prio, temp); | ||
519 | |||
520 | return 0; | ||
521 | } | ||
522 | |||
523 | void ipic_set_highest_priority(unsigned int irq) | ||
524 | { | ||
525 | struct ipic *ipic = ipic_from_irq(irq); | ||
526 | unsigned int src = irq - ipic->irq_offset; | ||
527 | u32 temp; | ||
528 | |||
529 | temp = ipic_read(ipic->regs, IPIC_SICFR); | ||
530 | |||
531 | /* clear and set HPI */ | ||
532 | temp &= 0x7f000000; | ||
533 | temp |= (src & 0x7f) << 24; | ||
534 | |||
535 | ipic_write(ipic->regs, IPIC_SICFR, temp); | ||
536 | } | ||
537 | |||
538 | void ipic_set_default_priority(void) | ||
539 | { | ||
540 | ipic_set_priority(MPC83xx_IRQ_TSEC1_TX, 0); | ||
541 | ipic_set_priority(MPC83xx_IRQ_TSEC1_RX, 1); | ||
542 | ipic_set_priority(MPC83xx_IRQ_TSEC1_ERROR, 2); | ||
543 | ipic_set_priority(MPC83xx_IRQ_TSEC2_TX, 3); | ||
544 | ipic_set_priority(MPC83xx_IRQ_TSEC2_RX, 4); | ||
545 | ipic_set_priority(MPC83xx_IRQ_TSEC2_ERROR, 5); | ||
546 | ipic_set_priority(MPC83xx_IRQ_USB2_DR, 6); | ||
547 | ipic_set_priority(MPC83xx_IRQ_USB2_MPH, 7); | ||
548 | |||
549 | ipic_set_priority(MPC83xx_IRQ_UART1, 0); | ||
550 | ipic_set_priority(MPC83xx_IRQ_UART2, 1); | ||
551 | ipic_set_priority(MPC83xx_IRQ_SEC2, 2); | ||
552 | ipic_set_priority(MPC83xx_IRQ_IIC1, 5); | ||
553 | ipic_set_priority(MPC83xx_IRQ_IIC2, 6); | ||
554 | ipic_set_priority(MPC83xx_IRQ_SPI, 7); | ||
555 | ipic_set_priority(MPC83xx_IRQ_RTC_SEC, 0); | ||
556 | ipic_set_priority(MPC83xx_IRQ_PIT, 1); | ||
557 | ipic_set_priority(MPC83xx_IRQ_PCI1, 2); | ||
558 | ipic_set_priority(MPC83xx_IRQ_PCI2, 3); | ||
559 | ipic_set_priority(MPC83xx_IRQ_EXT0, 4); | ||
560 | ipic_set_priority(MPC83xx_IRQ_EXT1, 5); | ||
561 | ipic_set_priority(MPC83xx_IRQ_EXT2, 6); | ||
562 | ipic_set_priority(MPC83xx_IRQ_EXT3, 7); | ||
563 | ipic_set_priority(MPC83xx_IRQ_RTC_ALR, 0); | ||
564 | ipic_set_priority(MPC83xx_IRQ_MU, 1); | ||
565 | ipic_set_priority(MPC83xx_IRQ_SBA, 2); | ||
566 | ipic_set_priority(MPC83xx_IRQ_DMA, 3); | ||
567 | ipic_set_priority(MPC83xx_IRQ_EXT4, 4); | ||
568 | ipic_set_priority(MPC83xx_IRQ_EXT5, 5); | ||
569 | ipic_set_priority(MPC83xx_IRQ_EXT6, 6); | ||
570 | ipic_set_priority(MPC83xx_IRQ_EXT7, 7); | ||
571 | } | ||
572 | |||
573 | void ipic_enable_mcp(enum ipic_mcp_irq mcp_irq) | ||
574 | { | ||
575 | struct ipic *ipic = primary_ipic; | ||
576 | u32 temp; | ||
577 | |||
578 | temp = ipic_read(ipic->regs, IPIC_SERMR); | ||
579 | temp |= (1 << (31 - mcp_irq)); | ||
580 | ipic_write(ipic->regs, IPIC_SERMR, temp); | ||
581 | } | ||
582 | |||
583 | void ipic_disable_mcp(enum ipic_mcp_irq mcp_irq) | ||
584 | { | ||
585 | struct ipic *ipic = primary_ipic; | ||
586 | u32 temp; | ||
587 | |||
588 | temp = ipic_read(ipic->regs, IPIC_SERMR); | ||
589 | temp &= (1 << (31 - mcp_irq)); | ||
590 | ipic_write(ipic->regs, IPIC_SERMR, temp); | ||
591 | } | ||
592 | |||
593 | u32 ipic_get_mcp_status(void) | ||
594 | { | ||
595 | return ipic_read(primary_ipic->regs, IPIC_SERMR); | ||
596 | } | ||
597 | |||
598 | void ipic_clear_mcp_status(u32 mask) | ||
599 | { | ||
600 | ipic_write(primary_ipic->regs, IPIC_SERMR, mask); | ||
601 | } | ||
602 | |||
603 | /* Return an interrupt vector or -1 if no interrupt is pending. */ | ||
604 | int ipic_get_irq(struct pt_regs *regs) | ||
605 | { | ||
606 | int irq; | ||
607 | |||
608 | irq = ipic_read(primary_ipic->regs, IPIC_SIVCR) & 0x7f; | ||
609 | |||
610 | if (irq == 0) /* 0 --> no irq is pending */ | ||
611 | irq = -1; | ||
612 | |||
613 | return irq; | ||
614 | } | ||
615 | |||
616 | static struct sysdev_class ipic_sysclass = { | ||
617 | set_kset_name("ipic"), | ||
618 | }; | ||
619 | |||
620 | static struct sys_device device_ipic = { | ||
621 | .id = 0, | ||
622 | .cls = &ipic_sysclass, | ||
623 | }; | ||
624 | |||
625 | static int __init init_ipic_sysfs(void) | ||
626 | { | ||
627 | int rc; | ||
628 | |||
629 | if (!primary_ipic->regs) | ||
630 | return -ENODEV; | ||
631 | printk(KERN_DEBUG "Registering ipic with sysfs...\n"); | ||
632 | |||
633 | rc = sysdev_class_register(&ipic_sysclass); | ||
634 | if (rc) { | ||
635 | printk(KERN_ERR "Failed registering ipic sys class\n"); | ||
636 | return -ENODEV; | ||
637 | } | ||
638 | rc = sysdev_register(&device_ipic); | ||
639 | if (rc) { | ||
640 | printk(KERN_ERR "Failed registering ipic sys device\n"); | ||
641 | return -ENODEV; | ||
642 | } | ||
643 | return 0; | ||
644 | } | ||
645 | |||
646 | subsys_initcall(init_ipic_sysfs); | ||
diff --git a/arch/ppc/syslib/ipic.h b/arch/ppc/syslib/ipic.h new file mode 100644 index 000000000000..a60c9d18bb7f --- /dev/null +++ b/arch/ppc/syslib/ipic.h | |||
@@ -0,0 +1,47 @@ | |||
1 | /* | ||
2 | * IPIC private definitions and structure. | ||
3 | * | ||
4 | * Maintainer: Kumar Gala <galak@kernel.crashing.org> | ||
5 | * | ||
6 | * Copyright 2005 Freescale Semiconductor, Inc | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify it | ||
9 | * under the terms of the GNU General Public License as published by the | ||
10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
11 | * option) any later version. | ||
12 | */ | ||
13 | #ifndef __IPIC_H__ | ||
14 | #define __IPIC_H__ | ||
15 | |||
16 | #include <asm/ipic.h> | ||
17 | |||
18 | #define MPC83xx_IPIC_SIZE (0x00100) | ||
19 | |||
20 | /* System Global Interrupt Configuration Register */ | ||
21 | #define SICFR_IPSA 0x00010000 | ||
22 | #define SICFR_IPSD 0x00080000 | ||
23 | #define SICFR_MPSA 0x00200000 | ||
24 | #define SICFR_MPSB 0x00400000 | ||
25 | |||
26 | /* System External Interrupt Mask Register */ | ||
27 | #define SEMSR_SIRQ0 0x00008000 | ||
28 | |||
29 | /* System Error Control Register */ | ||
30 | #define SERCR_MCPR 0x00000001 | ||
31 | |||
32 | struct ipic { | ||
33 | volatile u32 __iomem *regs; | ||
34 | unsigned int irq_offset; | ||
35 | }; | ||
36 | |||
37 | struct ipic_info { | ||
38 | u8 pend; /* pending register offset from base */ | ||
39 | u8 mask; /* mask register offset from base */ | ||
40 | u8 prio; /* priority register offset from base */ | ||
41 | u8 force; /* force register offset from base */ | ||
42 | u8 bit; /* register bit position (as per doc) | ||
43 | bit mask = 1 << (31 - bit) */ | ||
44 | u8 prio_mask; /* priority mask value */ | ||
45 | }; | ||
46 | |||
47 | #endif /* __IPIC_H__ */ | ||
diff --git a/arch/ppc/syslib/mpc85xx_devices.c b/arch/ppc/syslib/mpc85xx_devices.c index 7735336f5b8f..325136e5aee0 100644 --- a/arch/ppc/syslib/mpc85xx_devices.c +++ b/arch/ppc/syslib/mpc85xx_devices.c | |||
@@ -16,9 +16,11 @@ | |||
16 | #include <linux/device.h> | 16 | #include <linux/device.h> |
17 | #include <linux/serial_8250.h> | 17 | #include <linux/serial_8250.h> |
18 | #include <linux/fsl_devices.h> | 18 | #include <linux/fsl_devices.h> |
19 | #include <linux/fs_enet_pd.h> | ||
19 | #include <asm/mpc85xx.h> | 20 | #include <asm/mpc85xx.h> |
20 | #include <asm/irq.h> | 21 | #include <asm/irq.h> |
21 | #include <asm/ppc_sys.h> | 22 | #include <asm/ppc_sys.h> |
23 | #include <asm/cpm2.h> | ||
22 | 24 | ||
23 | /* We use offsets for IORESOURCE_MEM since we do not know at compile time | 25 | /* We use offsets for IORESOURCE_MEM since we do not know at compile time |
24 | * what CCSRBAR is, will get fixed up by mach_mpc85xx_fixup | 26 | * what CCSRBAR is, will get fixed up by mach_mpc85xx_fixup |
@@ -82,6 +84,60 @@ static struct fsl_i2c_platform_data mpc85xx_fsl_i2c2_pdata = { | |||
82 | .device_flags = FSL_I2C_DEV_SEPARATE_DFSRR, | 84 | .device_flags = FSL_I2C_DEV_SEPARATE_DFSRR, |
83 | }; | 85 | }; |
84 | 86 | ||
87 | static struct fs_platform_info mpc85xx_fcc1_pdata = { | ||
88 | .fs_no = fsid_fcc1, | ||
89 | .cp_page = CPM_CR_FCC1_PAGE, | ||
90 | .cp_block = CPM_CR_FCC1_SBLOCK, | ||
91 | |||
92 | .rx_ring = 32, | ||
93 | .tx_ring = 32, | ||
94 | .rx_copybreak = 240, | ||
95 | .use_napi = 0, | ||
96 | .napi_weight = 17, | ||
97 | |||
98 | .clk_mask = CMX1_CLK_MASK, | ||
99 | .clk_route = CMX1_CLK_ROUTE, | ||
100 | .clk_trx = (PC_F1RXCLK | PC_F1TXCLK), | ||
101 | |||
102 | .mem_offset = FCC1_MEM_OFFSET, | ||
103 | }; | ||
104 | |||
105 | static struct fs_platform_info mpc85xx_fcc2_pdata = { | ||
106 | .fs_no = fsid_fcc2, | ||
107 | .cp_page = CPM_CR_FCC2_PAGE, | ||
108 | .cp_block = CPM_CR_FCC2_SBLOCK, | ||
109 | |||
110 | .rx_ring = 32, | ||
111 | .tx_ring = 32, | ||
112 | .rx_copybreak = 240, | ||
113 | .use_napi = 0, | ||
114 | .napi_weight = 17, | ||
115 | |||
116 | .clk_mask = CMX2_CLK_MASK, | ||
117 | .clk_route = CMX2_CLK_ROUTE, | ||
118 | .clk_trx = (PC_F2RXCLK | PC_F2TXCLK), | ||
119 | |||
120 | .mem_offset = FCC2_MEM_OFFSET, | ||
121 | }; | ||
122 | |||
123 | static struct fs_platform_info mpc85xx_fcc3_pdata = { | ||
124 | .fs_no = fsid_fcc3, | ||
125 | .cp_page = CPM_CR_FCC3_PAGE, | ||
126 | .cp_block = CPM_CR_FCC3_SBLOCK, | ||
127 | |||
128 | .rx_ring = 32, | ||
129 | .tx_ring = 32, | ||
130 | .rx_copybreak = 240, | ||
131 | .use_napi = 0, | ||
132 | .napi_weight = 17, | ||
133 | |||
134 | .clk_mask = CMX3_CLK_MASK, | ||
135 | .clk_route = CMX3_CLK_ROUTE, | ||
136 | .clk_trx = (PC_F3RXCLK | PC_F3TXCLK), | ||
137 | |||
138 | .mem_offset = FCC3_MEM_OFFSET, | ||
139 | }; | ||
140 | |||
85 | static struct plat_serial8250_port serial_platform_data[] = { | 141 | static struct plat_serial8250_port serial_platform_data[] = { |
86 | [0] = { | 142 | [0] = { |
87 | .mapbase = 0x4500, | 143 | .mapbase = 0x4500, |
@@ -318,19 +374,28 @@ struct platform_device ppc_sys_platform_devices[] = { | |||
318 | [MPC85xx_CPM_FCC1] = { | 374 | [MPC85xx_CPM_FCC1] = { |
319 | .name = "fsl-cpm-fcc", | 375 | .name = "fsl-cpm-fcc", |
320 | .id = 1, | 376 | .id = 1, |
321 | .num_resources = 3, | 377 | .num_resources = 4, |
378 | .dev.platform_data = &mpc85xx_fcc1_pdata, | ||
322 | .resource = (struct resource[]) { | 379 | .resource = (struct resource[]) { |
323 | { | 380 | { |
381 | .name = "fcc_regs", | ||
324 | .start = 0x91300, | 382 | .start = 0x91300, |
325 | .end = 0x9131F, | 383 | .end = 0x9131F, |
326 | .flags = IORESOURCE_MEM, | 384 | .flags = IORESOURCE_MEM, |
327 | }, | 385 | }, |
328 | { | 386 | { |
387 | .name = "fcc_regs_c", | ||
329 | .start = 0x91380, | 388 | .start = 0x91380, |
330 | .end = 0x9139F, | 389 | .end = 0x9139F, |
331 | .flags = IORESOURCE_MEM, | 390 | .flags = IORESOURCE_MEM, |
332 | }, | 391 | }, |
333 | { | 392 | { |
393 | .name = "fcc_pram", | ||
394 | .start = 0x88400, | ||
395 | .end = 0x884ff, | ||
396 | .flags = IORESOURCE_MEM, | ||
397 | }, | ||
398 | { | ||
334 | .start = SIU_INT_FCC1, | 399 | .start = SIU_INT_FCC1, |
335 | .end = SIU_INT_FCC1, | 400 | .end = SIU_INT_FCC1, |
336 | .flags = IORESOURCE_IRQ, | 401 | .flags = IORESOURCE_IRQ, |
@@ -340,19 +405,28 @@ struct platform_device ppc_sys_platform_devices[] = { | |||
340 | [MPC85xx_CPM_FCC2] = { | 405 | [MPC85xx_CPM_FCC2] = { |
341 | .name = "fsl-cpm-fcc", | 406 | .name = "fsl-cpm-fcc", |
342 | .id = 2, | 407 | .id = 2, |
343 | .num_resources = 3, | 408 | .num_resources = 4, |
409 | .dev.platform_data = &mpc85xx_fcc2_pdata, | ||
344 | .resource = (struct resource[]) { | 410 | .resource = (struct resource[]) { |
345 | { | 411 | { |
412 | .name = "fcc_regs", | ||
346 | .start = 0x91320, | 413 | .start = 0x91320, |
347 | .end = 0x9133F, | 414 | .end = 0x9133F, |
348 | .flags = IORESOURCE_MEM, | 415 | .flags = IORESOURCE_MEM, |
349 | }, | 416 | }, |
350 | { | 417 | { |
418 | .name = "fcc_regs_c", | ||
351 | .start = 0x913A0, | 419 | .start = 0x913A0, |
352 | .end = 0x913CF, | 420 | .end = 0x913CF, |
353 | .flags = IORESOURCE_MEM, | 421 | .flags = IORESOURCE_MEM, |
354 | }, | 422 | }, |
355 | { | 423 | { |
424 | .name = "fcc_pram", | ||
425 | .start = 0x88500, | ||
426 | .end = 0x885ff, | ||
427 | .flags = IORESOURCE_MEM, | ||
428 | }, | ||
429 | { | ||
356 | .start = SIU_INT_FCC2, | 430 | .start = SIU_INT_FCC2, |
357 | .end = SIU_INT_FCC2, | 431 | .end = SIU_INT_FCC2, |
358 | .flags = IORESOURCE_IRQ, | 432 | .flags = IORESOURCE_IRQ, |
@@ -362,19 +436,28 @@ struct platform_device ppc_sys_platform_devices[] = { | |||
362 | [MPC85xx_CPM_FCC3] = { | 436 | [MPC85xx_CPM_FCC3] = { |
363 | .name = "fsl-cpm-fcc", | 437 | .name = "fsl-cpm-fcc", |
364 | .id = 3, | 438 | .id = 3, |
365 | .num_resources = 3, | 439 | .num_resources = 4, |
440 | .dev.platform_data = &mpc85xx_fcc3_pdata, | ||
366 | .resource = (struct resource[]) { | 441 | .resource = (struct resource[]) { |
367 | { | 442 | { |
443 | .name = "fcc_regs", | ||
368 | .start = 0x91340, | 444 | .start = 0x91340, |
369 | .end = 0x9135F, | 445 | .end = 0x9135F, |
370 | .flags = IORESOURCE_MEM, | 446 | .flags = IORESOURCE_MEM, |
371 | }, | 447 | }, |
372 | { | 448 | { |
449 | .name = "fcc_regs_c", | ||
373 | .start = 0x913D0, | 450 | .start = 0x913D0, |
374 | .end = 0x913FF, | 451 | .end = 0x913FF, |
375 | .flags = IORESOURCE_MEM, | 452 | .flags = IORESOURCE_MEM, |
376 | }, | 453 | }, |
377 | { | 454 | { |
455 | .name = "fcc_pram", | ||
456 | .start = 0x88600, | ||
457 | .end = 0x886ff, | ||
458 | .flags = IORESOURCE_MEM, | ||
459 | }, | ||
460 | { | ||
378 | .start = SIU_INT_FCC3, | 461 | .start = SIU_INT_FCC3, |
379 | .end = SIU_INT_FCC3, | 462 | .end = SIU_INT_FCC3, |
380 | .flags = IORESOURCE_IRQ, | 463 | .flags = IORESOURCE_IRQ, |
diff --git a/arch/ppc/syslib/mpc8xx_devices.c b/arch/ppc/syslib/mpc8xx_devices.c index 6f536383866e..cf5ab47487a7 100644 --- a/arch/ppc/syslib/mpc8xx_devices.c +++ b/arch/ppc/syslib/mpc8xx_devices.c | |||
@@ -218,6 +218,14 @@ struct platform_device ppc_sys_platform_devices[] = { | |||
218 | }, | 218 | }, |
219 | }, | 219 | }, |
220 | }, | 220 | }, |
221 | |||
222 | [MPC8xx_MDIO_FEC] = { | ||
223 | .name = "fsl-cpm-fec-mdio", | ||
224 | .id = 0, | ||
225 | .num_resources = 0, | ||
226 | |||
227 | }, | ||
228 | |||
221 | }; | 229 | }; |
222 | 230 | ||
223 | static int __init mach_mpc8xx_fixup(struct platform_device *pdev) | 231 | static int __init mach_mpc8xx_fixup(struct platform_device *pdev) |
diff --git a/arch/ppc/syslib/mpc8xx_sys.c b/arch/ppc/syslib/mpc8xx_sys.c index eee213284855..18ba1d7ff9f1 100644 --- a/arch/ppc/syslib/mpc8xx_sys.c +++ b/arch/ppc/syslib/mpc8xx_sys.c | |||
@@ -22,7 +22,7 @@ struct ppc_sys_spec ppc_sys_specs[] = { | |||
22 | .ppc_sys_name = "MPC86X", | 22 | .ppc_sys_name = "MPC86X", |
23 | .mask = 0xFFFFFFFF, | 23 | .mask = 0xFFFFFFFF, |
24 | .value = 0x00000000, | 24 | .value = 0x00000000, |
25 | .num_devices = 7, | 25 | .num_devices = 8, |
26 | .device_list = (enum ppc_sys_devices[]) | 26 | .device_list = (enum ppc_sys_devices[]) |
27 | { | 27 | { |
28 | MPC8xx_CPM_FEC1, | 28 | MPC8xx_CPM_FEC1, |
@@ -32,13 +32,14 @@ struct ppc_sys_spec ppc_sys_specs[] = { | |||
32 | MPC8xx_CPM_SCC4, | 32 | MPC8xx_CPM_SCC4, |
33 | MPC8xx_CPM_SMC1, | 33 | MPC8xx_CPM_SMC1, |
34 | MPC8xx_CPM_SMC2, | 34 | MPC8xx_CPM_SMC2, |
35 | MPC8xx_MDIO_FEC, | ||
35 | }, | 36 | }, |
36 | }, | 37 | }, |
37 | { | 38 | { |
38 | .ppc_sys_name = "MPC885", | 39 | .ppc_sys_name = "MPC885", |
39 | .mask = 0xFFFFFFFF, | 40 | .mask = 0xFFFFFFFF, |
40 | .value = 0x00000000, | 41 | .value = 0x00000000, |
41 | .num_devices = 8, | 42 | .num_devices = 9, |
42 | .device_list = (enum ppc_sys_devices[]) | 43 | .device_list = (enum ppc_sys_devices[]) |
43 | { | 44 | { |
44 | MPC8xx_CPM_FEC1, | 45 | MPC8xx_CPM_FEC1, |
@@ -49,6 +50,7 @@ struct ppc_sys_spec ppc_sys_specs[] = { | |||
49 | MPC8xx_CPM_SCC4, | 50 | MPC8xx_CPM_SCC4, |
50 | MPC8xx_CPM_SMC1, | 51 | MPC8xx_CPM_SMC1, |
51 | MPC8xx_CPM_SMC2, | 52 | MPC8xx_CPM_SMC2, |
53 | MPC8xx_MDIO_FEC, | ||
52 | }, | 54 | }, |
53 | }, | 55 | }, |
54 | { /* default match */ | 56 | { /* default match */ |
diff --git a/arch/ppc/syslib/pq2_devices.c b/arch/ppc/syslib/pq2_devices.c index 8692d00c08c4..fefbc217a56d 100644 --- a/arch/ppc/syslib/pq2_devices.c +++ b/arch/ppc/syslib/pq2_devices.c | |||
@@ -369,6 +369,11 @@ struct platform_device ppc_sys_platform_devices[] = { | |||
369 | }, | 369 | }, |
370 | }, | 370 | }, |
371 | }, | 371 | }, |
372 | [MPC82xx_MDIO_BB] = { | ||
373 | .name = "fsl-bb-mdio", | ||
374 | .id = 0, | ||
375 | .num_resources = 0, | ||
376 | }, | ||
372 | }; | 377 | }; |
373 | 378 | ||
374 | static int __init mach_mpc82xx_fixup(struct platform_device *pdev) | 379 | static int __init mach_mpc82xx_fixup(struct platform_device *pdev) |
diff --git a/arch/ppc/syslib/pq2_sys.c b/arch/ppc/syslib/pq2_sys.c index fee8948162b9..f52600c0db20 100644 --- a/arch/ppc/syslib/pq2_sys.c +++ b/arch/ppc/syslib/pq2_sys.c | |||
@@ -139,13 +139,14 @@ struct ppc_sys_spec ppc_sys_specs[] = { | |||
139 | .ppc_sys_name = "8272", | 139 | .ppc_sys_name = "8272", |
140 | .mask = 0x0000ff00, | 140 | .mask = 0x0000ff00, |
141 | .value = 0x00000c00, | 141 | .value = 0x00000c00, |
142 | .num_devices = 12, | 142 | .num_devices = 13, |
143 | .device_list = (enum ppc_sys_devices[]) | 143 | .device_list = (enum ppc_sys_devices[]) |
144 | { | 144 | { |
145 | MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1, | 145 | MPC82xx_CPM_FCC1, MPC82xx_CPM_FCC2, MPC82xx_CPM_SCC1, |
146 | MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SCC4, | 146 | MPC82xx_CPM_SCC2, MPC82xx_CPM_SCC3, MPC82xx_CPM_SCC4, |
147 | MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, | 147 | MPC82xx_CPM_SMC1, MPC82xx_CPM_SMC2, MPC82xx_CPM_SPI, |
148 | MPC82xx_CPM_I2C, MPC82xx_CPM_USB, MPC82xx_SEC1, | 148 | MPC82xx_CPM_I2C, MPC82xx_CPM_USB, MPC82xx_SEC1, |
149 | MPC82xx_MDIO_BB, | ||
149 | }, | 150 | }, |
150 | }, | 151 | }, |
151 | /* below is a list of the 8280 family of processors */ | 152 | /* below is a list of the 8280 family of processors */ |
diff --git a/arch/s390/appldata/appldata_base.c b/arch/s390/appldata/appldata_base.c index d0f82c995af6..a0a94e0ef8d1 100644 --- a/arch/s390/appldata/appldata_base.c +++ b/arch/s390/appldata/appldata_base.c | |||
@@ -617,6 +617,7 @@ appldata_offline_cpu(int cpu) | |||
617 | spin_unlock(&appldata_timer_lock); | 617 | spin_unlock(&appldata_timer_lock); |
618 | } | 618 | } |
619 | 619 | ||
620 | #ifdef CONFIG_HOTPLUG_CPU | ||
620 | static int __cpuinit | 621 | static int __cpuinit |
621 | appldata_cpu_notify(struct notifier_block *self, | 622 | appldata_cpu_notify(struct notifier_block *self, |
622 | unsigned long action, void *hcpu) | 623 | unsigned long action, void *hcpu) |
@@ -625,20 +626,19 @@ appldata_cpu_notify(struct notifier_block *self, | |||
625 | case CPU_ONLINE: | 626 | case CPU_ONLINE: |
626 | appldata_online_cpu((long) hcpu); | 627 | appldata_online_cpu((long) hcpu); |
627 | break; | 628 | break; |
628 | #ifdef CONFIG_HOTPLUG_CPU | ||
629 | case CPU_DEAD: | 629 | case CPU_DEAD: |
630 | appldata_offline_cpu((long) hcpu); | 630 | appldata_offline_cpu((long) hcpu); |
631 | break; | 631 | break; |
632 | #endif | ||
633 | default: | 632 | default: |
634 | break; | 633 | break; |
635 | } | 634 | } |
636 | return NOTIFY_OK; | 635 | return NOTIFY_OK; |
637 | } | 636 | } |
638 | 637 | ||
639 | static struct notifier_block __devinitdata appldata_nb = { | 638 | static struct notifier_block appldata_nb = { |
640 | .notifier_call = appldata_cpu_notify, | 639 | .notifier_call = appldata_cpu_notify, |
641 | }; | 640 | }; |
641 | #endif | ||
642 | 642 | ||
643 | /* | 643 | /* |
644 | * appldata_init() | 644 | * appldata_init() |
@@ -662,7 +662,7 @@ static int __init appldata_init(void) | |||
662 | appldata_online_cpu(i); | 662 | appldata_online_cpu(i); |
663 | 663 | ||
664 | /* Register cpu hotplug notifier */ | 664 | /* Register cpu hotplug notifier */ |
665 | register_cpu_notifier(&appldata_nb); | 665 | register_hotcpu_notifier(&appldata_nb); |
666 | 666 | ||
667 | appldata_sysctl_header = register_sysctl_table(appldata_dir_table, 1); | 667 | appldata_sysctl_header = register_sysctl_table(appldata_dir_table, 1); |
668 | #ifdef MODULE | 668 | #ifdef MODULE |
diff --git a/arch/s390/defconfig b/arch/s390/defconfig index f4dfc10026d2..f1d4591eddbb 100644 --- a/arch/s390/defconfig +++ b/arch/s390/defconfig | |||
@@ -1,13 +1,16 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.17-rc1 | 3 | # Linux kernel version: 2.6.18-rc2 |
4 | # Mon Apr 3 14:34:15 2006 | 4 | # Thu Jul 27 13:51:07 2006 |
5 | # | 5 | # |
6 | CONFIG_MMU=y | 6 | CONFIG_MMU=y |
7 | CONFIG_LOCKDEP_SUPPORT=y | ||
8 | CONFIG_STACKTRACE_SUPPORT=y | ||
7 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y | 9 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y |
8 | CONFIG_GENERIC_HWEIGHT=y | 10 | CONFIG_GENERIC_HWEIGHT=y |
9 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 11 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
10 | CONFIG_S390=y | 12 | CONFIG_S390=y |
13 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
11 | 14 | ||
12 | # | 15 | # |
13 | # Code maturity level options | 16 | # Code maturity level options |
@@ -25,6 +28,7 @@ CONFIG_SWAP=y | |||
25 | CONFIG_SYSVIPC=y | 28 | CONFIG_SYSVIPC=y |
26 | CONFIG_POSIX_MQUEUE=y | 29 | CONFIG_POSIX_MQUEUE=y |
27 | # CONFIG_BSD_PROCESS_ACCT is not set | 30 | # CONFIG_BSD_PROCESS_ACCT is not set |
31 | # CONFIG_TASKSTATS is not set | ||
28 | CONFIG_SYSCTL=y | 32 | CONFIG_SYSCTL=y |
29 | CONFIG_AUDIT=y | 33 | CONFIG_AUDIT=y |
30 | # CONFIG_AUDITSYSCALL is not set | 34 | # CONFIG_AUDITSYSCALL is not set |
@@ -43,10 +47,12 @@ CONFIG_PRINTK=y | |||
43 | CONFIG_BUG=y | 47 | CONFIG_BUG=y |
44 | CONFIG_ELF_CORE=y | 48 | CONFIG_ELF_CORE=y |
45 | CONFIG_BASE_FULL=y | 49 | CONFIG_BASE_FULL=y |
50 | CONFIG_RT_MUTEXES=y | ||
46 | CONFIG_FUTEX=y | 51 | CONFIG_FUTEX=y |
47 | CONFIG_EPOLL=y | 52 | CONFIG_EPOLL=y |
48 | CONFIG_SHMEM=y | 53 | CONFIG_SHMEM=y |
49 | CONFIG_SLAB=y | 54 | CONFIG_SLAB=y |
55 | CONFIG_VM_EVENT_COUNTERS=y | ||
50 | # CONFIG_TINY_SHMEM is not set | 56 | # CONFIG_TINY_SHMEM is not set |
51 | CONFIG_BASE_SMALL=0 | 57 | CONFIG_BASE_SMALL=0 |
52 | # CONFIG_SLOB is not set | 58 | # CONFIG_SLOB is not set |
@@ -94,7 +100,6 @@ CONFIG_HOTPLUG_CPU=y | |||
94 | CONFIG_DEFAULT_MIGRATION_COST=1000000 | 100 | CONFIG_DEFAULT_MIGRATION_COST=1000000 |
95 | CONFIG_COMPAT=y | 101 | CONFIG_COMPAT=y |
96 | CONFIG_SYSVIPC_COMPAT=y | 102 | CONFIG_SYSVIPC_COMPAT=y |
97 | CONFIG_BINFMT_ELF32=y | ||
98 | 103 | ||
99 | # | 104 | # |
100 | # Code generation options | 105 | # Code generation options |
@@ -115,6 +120,7 @@ CONFIG_FLATMEM=y | |||
115 | CONFIG_FLAT_NODE_MEM_MAP=y | 120 | CONFIG_FLAT_NODE_MEM_MAP=y |
116 | # CONFIG_SPARSEMEM_STATIC is not set | 121 | # CONFIG_SPARSEMEM_STATIC is not set |
117 | CONFIG_SPLIT_PTLOCK_CPUS=4 | 122 | CONFIG_SPLIT_PTLOCK_CPUS=4 |
123 | CONFIG_RESOURCES_64BIT=y | ||
118 | 124 | ||
119 | # | 125 | # |
120 | # I/O subsystem configuration | 126 | # I/O subsystem configuration |
@@ -142,6 +148,7 @@ CONFIG_VIRT_CPU_ACCOUNTING=y | |||
142 | # CONFIG_APPLDATA_BASE is not set | 148 | # CONFIG_APPLDATA_BASE is not set |
143 | CONFIG_NO_IDLE_HZ=y | 149 | CONFIG_NO_IDLE_HZ=y |
144 | CONFIG_NO_IDLE_HZ_INIT=y | 150 | CONFIG_NO_IDLE_HZ_INIT=y |
151 | CONFIG_S390_HYPFS_FS=y | ||
145 | CONFIG_KEXEC=y | 152 | CONFIG_KEXEC=y |
146 | 153 | ||
147 | # | 154 | # |
@@ -174,6 +181,8 @@ CONFIG_IP_FIB_HASH=y | |||
174 | # CONFIG_INET_IPCOMP is not set | 181 | # CONFIG_INET_IPCOMP is not set |
175 | # CONFIG_INET_XFRM_TUNNEL is not set | 182 | # CONFIG_INET_XFRM_TUNNEL is not set |
176 | # CONFIG_INET_TUNNEL is not set | 183 | # CONFIG_INET_TUNNEL is not set |
184 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
185 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
177 | CONFIG_INET_DIAG=y | 186 | CONFIG_INET_DIAG=y |
178 | CONFIG_INET_TCP_DIAG=y | 187 | CONFIG_INET_TCP_DIAG=y |
179 | # CONFIG_TCP_CONG_ADVANCED is not set | 188 | # CONFIG_TCP_CONG_ADVANCED is not set |
@@ -186,7 +195,10 @@ CONFIG_IPV6=y | |||
186 | # CONFIG_INET6_IPCOMP is not set | 195 | # CONFIG_INET6_IPCOMP is not set |
187 | # CONFIG_INET6_XFRM_TUNNEL is not set | 196 | # CONFIG_INET6_XFRM_TUNNEL is not set |
188 | # CONFIG_INET6_TUNNEL is not set | 197 | # CONFIG_INET6_TUNNEL is not set |
198 | CONFIG_INET6_XFRM_MODE_TRANSPORT=y | ||
199 | CONFIG_INET6_XFRM_MODE_TUNNEL=y | ||
189 | # CONFIG_IPV6_TUNNEL is not set | 200 | # CONFIG_IPV6_TUNNEL is not set |
201 | # CONFIG_NETWORK_SECMARK is not set | ||
190 | # CONFIG_NETFILTER is not set | 202 | # CONFIG_NETFILTER is not set |
191 | 203 | ||
192 | # | 204 | # |
@@ -263,6 +275,7 @@ CONFIG_NET_ESTIMATOR=y | |||
263 | # Network testing | 275 | # Network testing |
264 | # | 276 | # |
265 | # CONFIG_NET_PKTGEN is not set | 277 | # CONFIG_NET_PKTGEN is not set |
278 | # CONFIG_NET_TCPPROBE is not set | ||
266 | # CONFIG_HAMRADIO is not set | 279 | # CONFIG_HAMRADIO is not set |
267 | # CONFIG_IRDA is not set | 280 | # CONFIG_IRDA is not set |
268 | # CONFIG_BT is not set | 281 | # CONFIG_BT is not set |
@@ -276,6 +289,7 @@ CONFIG_STANDALONE=y | |||
276 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 289 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
277 | # CONFIG_FW_LOADER is not set | 290 | # CONFIG_FW_LOADER is not set |
278 | # CONFIG_DEBUG_DRIVER is not set | 291 | # CONFIG_DEBUG_DRIVER is not set |
292 | CONFIG_SYS_HYPERVISOR=y | ||
279 | 293 | ||
280 | # | 294 | # |
281 | # Connector - unified userspace <-> kernelspace linker | 295 | # Connector - unified userspace <-> kernelspace linker |
@@ -334,6 +348,7 @@ CONFIG_BLK_DEV_NBD=m | |||
334 | CONFIG_BLK_DEV_RAM=y | 348 | CONFIG_BLK_DEV_RAM=y |
335 | CONFIG_BLK_DEV_RAM_COUNT=16 | 349 | CONFIG_BLK_DEV_RAM_COUNT=16 |
336 | CONFIG_BLK_DEV_RAM_SIZE=4096 | 350 | CONFIG_BLK_DEV_RAM_SIZE=4096 |
351 | CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 | ||
337 | CONFIG_BLK_DEV_INITRD=y | 352 | CONFIG_BLK_DEV_INITRD=y |
338 | # CONFIG_CDROM_PKTCDVD is not set | 353 | # CONFIG_CDROM_PKTCDVD is not set |
339 | 354 | ||
@@ -359,9 +374,7 @@ CONFIG_MD_LINEAR=m | |||
359 | CONFIG_MD_RAID0=m | 374 | CONFIG_MD_RAID0=m |
360 | CONFIG_MD_RAID1=m | 375 | CONFIG_MD_RAID1=m |
361 | # CONFIG_MD_RAID10 is not set | 376 | # CONFIG_MD_RAID10 is not set |
362 | CONFIG_MD_RAID5=m | 377 | # CONFIG_MD_RAID456 is not set |
363 | # CONFIG_MD_RAID5_RESHAPE is not set | ||
364 | # CONFIG_MD_RAID6 is not set | ||
365 | CONFIG_MD_MULTIPATH=m | 378 | CONFIG_MD_MULTIPATH=m |
366 | # CONFIG_MD_FAULTY is not set | 379 | # CONFIG_MD_FAULTY is not set |
367 | CONFIG_BLK_DEV_DM=y | 380 | CONFIG_BLK_DEV_DM=y |
@@ -419,7 +432,8 @@ CONFIG_S390_TAPE_34XX=m | |||
419 | # | 432 | # |
420 | # Cryptographic devices | 433 | # Cryptographic devices |
421 | # | 434 | # |
422 | CONFIG_Z90CRYPT=m | 435 | CONFIG_ZCRYPT=m |
436 | # CONFIG_ZCRYPT_MONOLITHIC is not set | ||
423 | 437 | ||
424 | # | 438 | # |
425 | # Network device support | 439 | # Network device support |
@@ -509,6 +523,7 @@ CONFIG_FS_MBCACHE=y | |||
509 | # CONFIG_MINIX_FS is not set | 523 | # CONFIG_MINIX_FS is not set |
510 | # CONFIG_ROMFS_FS is not set | 524 | # CONFIG_ROMFS_FS is not set |
511 | CONFIG_INOTIFY=y | 525 | CONFIG_INOTIFY=y |
526 | CONFIG_INOTIFY_USER=y | ||
512 | # CONFIG_QUOTA is not set | 527 | # CONFIG_QUOTA is not set |
513 | CONFIG_DNOTIFY=y | 528 | CONFIG_DNOTIFY=y |
514 | # CONFIG_AUTOFS_FS is not set | 529 | # CONFIG_AUTOFS_FS is not set |
@@ -614,26 +629,36 @@ CONFIG_MSDOS_PARTITION=y | |||
614 | # Instrumentation Support | 629 | # Instrumentation Support |
615 | # | 630 | # |
616 | # CONFIG_PROFILING is not set | 631 | # CONFIG_PROFILING is not set |
617 | # CONFIG_STATISTICS is not set | 632 | CONFIG_STATISTICS=y |
633 | CONFIG_KPROBES=y | ||
618 | 634 | ||
619 | # | 635 | # |
620 | # Kernel hacking | 636 | # Kernel hacking |
621 | # | 637 | # |
638 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
622 | # CONFIG_PRINTK_TIME is not set | 639 | # CONFIG_PRINTK_TIME is not set |
623 | CONFIG_MAGIC_SYSRQ=y | 640 | CONFIG_MAGIC_SYSRQ=y |
641 | # CONFIG_UNUSED_SYMBOLS is not set | ||
624 | CONFIG_DEBUG_KERNEL=y | 642 | CONFIG_DEBUG_KERNEL=y |
625 | CONFIG_LOG_BUF_SHIFT=17 | 643 | CONFIG_LOG_BUF_SHIFT=17 |
626 | # CONFIG_DETECT_SOFTLOCKUP is not set | 644 | # CONFIG_DETECT_SOFTLOCKUP is not set |
627 | # CONFIG_SCHEDSTATS is not set | 645 | # CONFIG_SCHEDSTATS is not set |
628 | # CONFIG_DEBUG_SLAB is not set | 646 | # CONFIG_DEBUG_SLAB is not set |
629 | CONFIG_DEBUG_PREEMPT=y | 647 | CONFIG_DEBUG_PREEMPT=y |
630 | CONFIG_DEBUG_MUTEXES=y | 648 | # CONFIG_DEBUG_RT_MUTEXES is not set |
649 | # CONFIG_RT_MUTEX_TESTER is not set | ||
631 | CONFIG_DEBUG_SPINLOCK=y | 650 | CONFIG_DEBUG_SPINLOCK=y |
651 | CONFIG_DEBUG_MUTEXES=y | ||
652 | # CONFIG_DEBUG_RWSEMS is not set | ||
653 | # CONFIG_DEBUG_LOCK_ALLOC is not set | ||
654 | # CONFIG_PROVE_LOCKING is not set | ||
632 | CONFIG_DEBUG_SPINLOCK_SLEEP=y | 655 | CONFIG_DEBUG_SPINLOCK_SLEEP=y |
656 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
633 | # CONFIG_DEBUG_KOBJECT is not set | 657 | # CONFIG_DEBUG_KOBJECT is not set |
634 | # CONFIG_DEBUG_INFO is not set | 658 | # CONFIG_DEBUG_INFO is not set |
635 | CONFIG_DEBUG_FS=y | 659 | CONFIG_DEBUG_FS=y |
636 | # CONFIG_DEBUG_VM is not set | 660 | # CONFIG_DEBUG_VM is not set |
661 | # CONFIG_FRAME_POINTER is not set | ||
637 | # CONFIG_UNWIND_INFO is not set | 662 | # CONFIG_UNWIND_INFO is not set |
638 | CONFIG_FORCED_INLINING=y | 663 | CONFIG_FORCED_INLINING=y |
639 | # CONFIG_RCU_TORTURE_TEST is not set | 664 | # CONFIG_RCU_TORTURE_TEST is not set |
@@ -688,3 +713,4 @@ CONFIG_CRYPTO=y | |||
688 | # CONFIG_CRC16 is not set | 713 | # CONFIG_CRC16 is not set |
689 | CONFIG_CRC32=m | 714 | CONFIG_CRC32=m |
690 | # CONFIG_LIBCRC32C is not set | 715 | # CONFIG_LIBCRC32C is not set |
716 | CONFIG_PLIST=y | ||
diff --git a/arch/s390/lib/uaccess.S b/arch/s390/lib/uaccess.S index 5d59e2625048..837275284d9f 100644 --- a/arch/s390/lib/uaccess.S +++ b/arch/s390/lib/uaccess.S | |||
@@ -88,30 +88,31 @@ __copy_to_user_asm: | |||
88 | .globl __copy_in_user_asm | 88 | .globl __copy_in_user_asm |
89 | # %r2 = from, %r3 = n, %r4 = to | 89 | # %r2 = from, %r3 = n, %r4 = to |
90 | __copy_in_user_asm: | 90 | __copy_in_user_asm: |
91 | ahi %r3,-1 | ||
92 | jo 6f | ||
91 | sacf 256 | 93 | sacf 256 |
92 | bras 1,1f | 94 | bras %r1,4f |
93 | mvc 0(1,%r4),0(%r2) | 95 | 0: ahi %r3,257 |
94 | 0: mvc 0(256,%r4),0(%r2) | 96 | 1: mvc 0(1,%r4),0(%r2) |
95 | la %r2,256(%r2) | ||
96 | la %r4,256(%r4) | ||
97 | 1: ahi %r3,-256 | ||
98 | jnm 0b | ||
99 | 2: ex %r3,0(%r1) | ||
100 | sacf 0 | ||
101 | slr %r2,%r2 | ||
102 | br 14 | ||
103 | 3: mvc 0(1,%r4),0(%r2) | ||
104 | la %r2,1(%r2) | 97 | la %r2,1(%r2) |
105 | la %r4,1(%r4) | 98 | la %r4,1(%r4) |
106 | ahi %r3,-1 | 99 | ahi %r3,-1 |
100 | jnz 1b | ||
101 | 2: lr %r2,%r3 | ||
102 | br %r14 | ||
103 | 3: mvc 0(256,%r4),0(%r2) | ||
104 | la %r2,256(%r2) | ||
105 | la %r4,256(%r4) | ||
106 | 4: ahi %r3,-256 | ||
107 | jnm 3b | 107 | jnm 3b |
108 | 4: lr %r2,%r3 | 108 | 5: ex %r3,4(%r1) |
109 | sacf 0 | 109 | sacf 0 |
110 | 6: slr %r2,%r2 | ||
110 | br %r14 | 111 | br %r14 |
111 | .section __ex_table,"a" | 112 | .section __ex_table,"a" |
112 | .long 0b,3b | 113 | .long 1b,2b |
113 | .long 2b,3b | 114 | .long 3b,0b |
114 | .long 3b,4b | 115 | .long 5b,0b |
115 | .previous | 116 | .previous |
116 | 117 | ||
117 | .align 4 | 118 | .align 4 |
diff --git a/arch/s390/lib/uaccess64.S b/arch/s390/lib/uaccess64.S index 19b41a33c230..1f755be22f92 100644 --- a/arch/s390/lib/uaccess64.S +++ b/arch/s390/lib/uaccess64.S | |||
@@ -88,30 +88,31 @@ __copy_to_user_asm: | |||
88 | .globl __copy_in_user_asm | 88 | .globl __copy_in_user_asm |
89 | # %r2 = from, %r3 = n, %r4 = to | 89 | # %r2 = from, %r3 = n, %r4 = to |
90 | __copy_in_user_asm: | 90 | __copy_in_user_asm: |
91 | aghi %r3,-1 | ||
92 | jo 6f | ||
91 | sacf 256 | 93 | sacf 256 |
92 | bras 1,1f | 94 | bras %r1,4f |
93 | mvc 0(1,%r4),0(%r2) | 95 | 0: aghi %r3,257 |
94 | 0: mvc 0(256,%r4),0(%r2) | 96 | 1: mvc 0(1,%r4),0(%r2) |
95 | la %r2,256(%r2) | ||
96 | la %r4,256(%r4) | ||
97 | 1: aghi %r3,-256 | ||
98 | jnm 0b | ||
99 | 2: ex %r3,0(%r1) | ||
100 | sacf 0 | ||
101 | slgr %r2,%r2 | ||
102 | br 14 | ||
103 | 3: mvc 0(1,%r4),0(%r2) | ||
104 | la %r2,1(%r2) | 97 | la %r2,1(%r2) |
105 | la %r4,1(%r4) | 98 | la %r4,1(%r4) |
106 | aghi %r3,-1 | 99 | aghi %r3,-1 |
100 | jnz 1b | ||
101 | 2: lgr %r2,%r3 | ||
102 | br %r14 | ||
103 | 3: mvc 0(256,%r4),0(%r2) | ||
104 | la %r2,256(%r2) | ||
105 | la %r4,256(%r4) | ||
106 | 4: aghi %r3,-256 | ||
107 | jnm 3b | 107 | jnm 3b |
108 | 4: lgr %r2,%r3 | 108 | 5: ex %r3,4(%r1) |
109 | sacf 0 | 109 | sacf 0 |
110 | br %r14 | 110 | 6: slgr %r2,%r2 |
111 | br 14 | ||
111 | .section __ex_table,"a" | 112 | .section __ex_table,"a" |
112 | .quad 0b,3b | 113 | .quad 1b,2b |
113 | .quad 2b,3b | 114 | .quad 3b,0b |
114 | .quad 3b,4b | 115 | .quad 5b,0b |
115 | .previous | 116 | .previous |
116 | 117 | ||
117 | .align 4 | 118 | .align 4 |
diff --git a/arch/s390/mm/init.c b/arch/s390/mm/init.c index eb6ebfef134a..6e6b6de77770 100644 --- a/arch/s390/mm/init.c +++ b/arch/s390/mm/init.c | |||
@@ -129,7 +129,7 @@ void __init paging_init(void) | |||
129 | /* | 129 | /* |
130 | * pg_table is physical at this point | 130 | * pg_table is physical at this point |
131 | */ | 131 | */ |
132 | pg_table = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE); | 132 | pg_table = (pte_t *) alloc_bootmem_pages(PAGE_SIZE); |
133 | 133 | ||
134 | pg_dir->pgd0 = (_PAGE_TABLE | __pa(pg_table)); | 134 | pg_dir->pgd0 = (_PAGE_TABLE | __pa(pg_table)); |
135 | pg_dir->pgd1 = (_PAGE_TABLE | (__pa(pg_table)+1024)); | 135 | pg_dir->pgd1 = (_PAGE_TABLE | (__pa(pg_table)+1024)); |
@@ -219,7 +219,7 @@ void __init paging_init(void) | |||
219 | continue; | 219 | continue; |
220 | } | 220 | } |
221 | 221 | ||
222 | pm_dir = (pmd_t *) alloc_bootmem_low_pages(PAGE_SIZE*4); | 222 | pm_dir = (pmd_t *) alloc_bootmem_pages(PAGE_SIZE * 4); |
223 | pgd_populate(&init_mm, pg_dir, pm_dir); | 223 | pgd_populate(&init_mm, pg_dir, pm_dir); |
224 | 224 | ||
225 | for (j = 0 ; j < PTRS_PER_PMD ; j++,pm_dir++) { | 225 | for (j = 0 ; j < PTRS_PER_PMD ; j++,pm_dir++) { |
@@ -228,7 +228,7 @@ void __init paging_init(void) | |||
228 | continue; | 228 | continue; |
229 | } | 229 | } |
230 | 230 | ||
231 | pt_dir = (pte_t *) alloc_bootmem_low_pages(PAGE_SIZE); | 231 | pt_dir = (pte_t *) alloc_bootmem_pages(PAGE_SIZE); |
232 | pmd_populate_kernel(&init_mm, pm_dir, pt_dir); | 232 | pmd_populate_kernel(&init_mm, pm_dir, pt_dir); |
233 | 233 | ||
234 | for (k = 0 ; k < PTRS_PER_PTE ; k++,pt_dir++) { | 234 | for (k = 0 ; k < PTRS_PER_PTE ; k++,pt_dir++) { |
diff --git a/arch/sh/kernel/cpu/sh4/sq.c b/arch/sh/kernel/cpu/sh4/sq.c index 781dbb11c038..b09805f3ee23 100644 --- a/arch/sh/kernel/cpu/sh4/sq.c +++ b/arch/sh/kernel/cpu/sh4/sq.c | |||
@@ -421,18 +421,22 @@ static struct miscdevice sq_dev = { | |||
421 | 421 | ||
422 | static int __init sq_api_init(void) | 422 | static int __init sq_api_init(void) |
423 | { | 423 | { |
424 | int ret; | ||
424 | printk(KERN_NOTICE "sq: Registering store queue API.\n"); | 425 | printk(KERN_NOTICE "sq: Registering store queue API.\n"); |
425 | 426 | ||
426 | #ifdef CONFIG_PROC_FS | ||
427 | create_proc_read_entry("sq_mapping", 0, 0, sq_mapping_read_proc, 0); | 427 | create_proc_read_entry("sq_mapping", 0, 0, sq_mapping_read_proc, 0); |
428 | #endif | ||
429 | 428 | ||
430 | return misc_register(&sq_dev); | 429 | ret = misc_register(&sq_dev); |
430 | if (ret) | ||
431 | remove_proc_entry("sq_mapping", NULL); | ||
432 | |||
433 | return ret; | ||
431 | } | 434 | } |
432 | 435 | ||
433 | static void __exit sq_api_exit(void) | 436 | static void __exit sq_api_exit(void) |
434 | { | 437 | { |
435 | misc_deregister(&sq_dev); | 438 | misc_deregister(&sq_dev); |
439 | remove_proc_entry("sq_mapping", NULL); | ||
436 | } | 440 | } |
437 | 441 | ||
438 | module_init(sq_api_init); | 442 | module_init(sq_api_init); |
diff --git a/arch/sparc/kernel/setup.c b/arch/sparc/kernel/setup.c index 35488d6c7457..0251cab4708b 100644 --- a/arch/sparc/kernel/setup.c +++ b/arch/sparc/kernel/setup.c | |||
@@ -348,9 +348,9 @@ void __init setup_arch(char **cmdline_p) | |||
348 | init_mm.context = (unsigned long) NO_CONTEXT; | 348 | init_mm.context = (unsigned long) NO_CONTEXT; |
349 | init_task.thread.kregs = &fake_swapper_regs; | 349 | init_task.thread.kregs = &fake_swapper_regs; |
350 | 350 | ||
351 | smp_setup_cpu_possible_map(); | ||
352 | |||
353 | paging_init(); | 351 | paging_init(); |
352 | |||
353 | smp_setup_cpu_possible_map(); | ||
354 | } | 354 | } |
355 | 355 | ||
356 | static int __init set_preferred_console(void) | 356 | static int __init set_preferred_console(void) |
diff --git a/arch/sparc/kernel/smp.c b/arch/sparc/kernel/smp.c index e311ade1b490..276f22881d0f 100644 --- a/arch/sparc/kernel/smp.c +++ b/arch/sparc/kernel/smp.c | |||
@@ -34,7 +34,6 @@ | |||
34 | #include <asm/tlbflush.h> | 34 | #include <asm/tlbflush.h> |
35 | #include <asm/cpudata.h> | 35 | #include <asm/cpudata.h> |
36 | 36 | ||
37 | volatile int smp_processors_ready = 0; | ||
38 | int smp_num_cpus = 1; | 37 | int smp_num_cpus = 1; |
39 | volatile unsigned long cpu_callin_map[NR_CPUS] __initdata = {0,}; | 38 | volatile unsigned long cpu_callin_map[NR_CPUS] __initdata = {0,}; |
40 | unsigned char boot_cpu_id = 0; | 39 | unsigned char boot_cpu_id = 0; |
diff --git a/arch/sparc/kernel/sun4d_smp.c b/arch/sparc/kernel/sun4d_smp.c index ba843f6a2832..3ff4edd32815 100644 --- a/arch/sparc/kernel/sun4d_smp.c +++ b/arch/sparc/kernel/sun4d_smp.c | |||
@@ -42,7 +42,7 @@ extern ctxd_t *srmmu_ctx_table_phys; | |||
42 | 42 | ||
43 | extern void calibrate_delay(void); | 43 | extern void calibrate_delay(void); |
44 | 44 | ||
45 | extern volatile int smp_processors_ready; | 45 | static volatile int smp_processors_ready = 0; |
46 | static int smp_highest_cpu; | 46 | static int smp_highest_cpu; |
47 | extern volatile unsigned long cpu_callin_map[NR_CPUS]; | 47 | extern volatile unsigned long cpu_callin_map[NR_CPUS]; |
48 | extern cpuinfo_sparc cpu_data[NR_CPUS]; | 48 | extern cpuinfo_sparc cpu_data[NR_CPUS]; |
diff --git a/arch/sparc/kernel/sun4m_smp.c b/arch/sparc/kernel/sun4m_smp.c index 3b32096134aa..7d4a649138f6 100644 --- a/arch/sparc/kernel/sun4m_smp.c +++ b/arch/sparc/kernel/sun4m_smp.c | |||
@@ -39,7 +39,6 @@ extern ctxd_t *srmmu_ctx_table_phys; | |||
39 | 39 | ||
40 | extern void calibrate_delay(void); | 40 | extern void calibrate_delay(void); |
41 | 41 | ||
42 | extern volatile int smp_processors_ready; | ||
43 | extern volatile unsigned long cpu_callin_map[NR_CPUS]; | 42 | extern volatile unsigned long cpu_callin_map[NR_CPUS]; |
44 | extern unsigned char boot_cpu_id; | 43 | extern unsigned char boot_cpu_id; |
45 | 44 | ||
@@ -217,7 +216,6 @@ void __init smp4m_smp_done(void) | |||
217 | } | 216 | } |
218 | 217 | ||
219 | /* Ok, they are spinning and ready to go. */ | 218 | /* Ok, they are spinning and ready to go. */ |
220 | smp_processors_ready = 1; | ||
221 | } | 219 | } |
222 | 220 | ||
223 | /* At each hardware IRQ, we get this called to forward IRQ reception | 221 | /* At each hardware IRQ, we get this called to forward IRQ reception |
diff --git a/arch/sparc/kernel/time.c b/arch/sparc/kernel/time.c index 04eb1eab6e3e..845081b01267 100644 --- a/arch/sparc/kernel/time.c +++ b/arch/sparc/kernel/time.c | |||
@@ -225,6 +225,32 @@ static __inline__ int has_low_battery(void) | |||
225 | return (data1 == data2); /* Was the write blocked? */ | 225 | return (data1 == data2); /* Was the write blocked? */ |
226 | } | 226 | } |
227 | 227 | ||
228 | static void __init mostek_set_system_time(void) | ||
229 | { | ||
230 | unsigned int year, mon, day, hour, min, sec; | ||
231 | struct mostek48t02 *mregs; | ||
232 | |||
233 | mregs = (struct mostek48t02 *)mstk48t02_regs; | ||
234 | if(!mregs) { | ||
235 | prom_printf("Something wrong, clock regs not mapped yet.\n"); | ||
236 | prom_halt(); | ||
237 | } | ||
238 | spin_lock_irq(&mostek_lock); | ||
239 | mregs->creg |= MSTK_CREG_READ; | ||
240 | sec = MSTK_REG_SEC(mregs); | ||
241 | min = MSTK_REG_MIN(mregs); | ||
242 | hour = MSTK_REG_HOUR(mregs); | ||
243 | day = MSTK_REG_DOM(mregs); | ||
244 | mon = MSTK_REG_MONTH(mregs); | ||
245 | year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) ); | ||
246 | xtime.tv_sec = mktime(year, mon, day, hour, min, sec); | ||
247 | xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ); | ||
248 | set_normalized_timespec(&wall_to_monotonic, | ||
249 | -xtime.tv_sec, -xtime.tv_nsec); | ||
250 | mregs->creg &= ~MSTK_CREG_READ; | ||
251 | spin_unlock_irq(&mostek_lock); | ||
252 | } | ||
253 | |||
228 | /* Probe for the real time clock chip on Sun4 */ | 254 | /* Probe for the real time clock chip on Sun4 */ |
229 | static __inline__ void sun4_clock_probe(void) | 255 | static __inline__ void sun4_clock_probe(void) |
230 | { | 256 | { |
@@ -273,6 +299,7 @@ static __inline__ void sun4_clock_probe(void) | |||
273 | #endif | 299 | #endif |
274 | } | 300 | } |
275 | 301 | ||
302 | #ifndef CONFIG_SUN4 | ||
276 | static int __devinit clock_probe(struct of_device *op, const struct of_device_id *match) | 303 | static int __devinit clock_probe(struct of_device *op, const struct of_device_id *match) |
277 | { | 304 | { |
278 | struct device_node *dp = op->node; | 305 | struct device_node *dp = op->node; |
@@ -307,6 +334,8 @@ static int __devinit clock_probe(struct of_device *op, const struct of_device_id | |||
307 | if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP) | 334 | if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP) |
308 | kick_start_clock(); | 335 | kick_start_clock(); |
309 | 336 | ||
337 | mostek_set_system_time(); | ||
338 | |||
310 | return 0; | 339 | return 0; |
311 | } | 340 | } |
312 | 341 | ||
@@ -325,56 +354,37 @@ static struct of_platform_driver clock_driver = { | |||
325 | 354 | ||
326 | 355 | ||
327 | /* Probe for the mostek real time clock chip. */ | 356 | /* Probe for the mostek real time clock chip. */ |
328 | static void clock_init(void) | 357 | static int __init clock_init(void) |
329 | { | 358 | { |
330 | of_register_driver(&clock_driver, &of_bus_type); | 359 | return of_register_driver(&clock_driver, &of_bus_type); |
331 | } | 360 | } |
332 | 361 | ||
362 | /* Must be after subsys_initcall() so that busses are probed. Must | ||
363 | * be before device_initcall() because things like the RTC driver | ||
364 | * need to see the clock registers. | ||
365 | */ | ||
366 | fs_initcall(clock_init); | ||
367 | #endif /* !CONFIG_SUN4 */ | ||
368 | |||
333 | void __init sbus_time_init(void) | 369 | void __init sbus_time_init(void) |
334 | { | 370 | { |
335 | unsigned int year, mon, day, hour, min, sec; | ||
336 | struct mostek48t02 *mregs; | ||
337 | |||
338 | #ifdef CONFIG_SUN4 | ||
339 | int temp; | ||
340 | struct intersil *iregs; | ||
341 | #endif | ||
342 | 371 | ||
343 | BTFIXUPSET_CALL(bus_do_settimeofday, sbus_do_settimeofday, BTFIXUPCALL_NORM); | 372 | BTFIXUPSET_CALL(bus_do_settimeofday, sbus_do_settimeofday, BTFIXUPCALL_NORM); |
344 | btfixup(); | 373 | btfixup(); |
345 | 374 | ||
346 | if (ARCH_SUN4) | 375 | if (ARCH_SUN4) |
347 | sun4_clock_probe(); | 376 | sun4_clock_probe(); |
348 | else | ||
349 | clock_init(); | ||
350 | 377 | ||
351 | sparc_init_timers(timer_interrupt); | 378 | sparc_init_timers(timer_interrupt); |
352 | 379 | ||
353 | #ifdef CONFIG_SUN4 | 380 | #ifdef CONFIG_SUN4 |
354 | if(idprom->id_machtype == (SM_SUN4 | SM_4_330)) { | 381 | if(idprom->id_machtype == (SM_SUN4 | SM_4_330)) { |
355 | #endif | 382 | mostek_set_system_time(); |
356 | mregs = (struct mostek48t02 *)mstk48t02_regs; | ||
357 | if(!mregs) { | ||
358 | prom_printf("Something wrong, clock regs not mapped yet.\n"); | ||
359 | prom_halt(); | ||
360 | } | ||
361 | spin_lock_irq(&mostek_lock); | ||
362 | mregs->creg |= MSTK_CREG_READ; | ||
363 | sec = MSTK_REG_SEC(mregs); | ||
364 | min = MSTK_REG_MIN(mregs); | ||
365 | hour = MSTK_REG_HOUR(mregs); | ||
366 | day = MSTK_REG_DOM(mregs); | ||
367 | mon = MSTK_REG_MONTH(mregs); | ||
368 | year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) ); | ||
369 | xtime.tv_sec = mktime(year, mon, day, hour, min, sec); | ||
370 | xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ); | ||
371 | set_normalized_timespec(&wall_to_monotonic, | ||
372 | -xtime.tv_sec, -xtime.tv_nsec); | ||
373 | mregs->creg &= ~MSTK_CREG_READ; | ||
374 | spin_unlock_irq(&mostek_lock); | ||
375 | #ifdef CONFIG_SUN4 | ||
376 | } else if(idprom->id_machtype == (SM_SUN4 | SM_4_260) ) { | 383 | } else if(idprom->id_machtype == (SM_SUN4 | SM_4_260) ) { |
377 | /* initialise the intersil on sun4 */ | 384 | /* initialise the intersil on sun4 */ |
385 | unsigned int year, mon, day, hour, min, sec; | ||
386 | int temp; | ||
387 | struct intersil *iregs; | ||
378 | 388 | ||
379 | iregs=intersil_clock; | 389 | iregs=intersil_clock; |
380 | if(!iregs) { | 390 | if(!iregs) { |
diff --git a/arch/sparc64/mm/generic.c b/arch/sparc64/mm/generic.c index 8cb06205d265..af9d81db0b38 100644 --- a/arch/sparc64/mm/generic.c +++ b/arch/sparc64/mm/generic.c | |||
@@ -69,6 +69,8 @@ static inline void io_remap_pte_range(struct mm_struct *mm, pte_t * pte, | |||
69 | } else | 69 | } else |
70 | offset += PAGE_SIZE; | 70 | offset += PAGE_SIZE; |
71 | 71 | ||
72 | if (pte_write(entry)) | ||
73 | entry = pte_mkdirty(entry); | ||
72 | do { | 74 | do { |
73 | BUG_ON(!pte_none(*pte)); | 75 | BUG_ON(!pte_none(*pte)); |
74 | set_pte_at(mm, address, pte, entry); | 76 | set_pte_at(mm, address, pte, entry); |
diff --git a/arch/um/kernel/dyn.lds.S b/arch/um/kernel/dyn.lds.S index 2517ecb8bf27..68ed24df5c8f 100644 --- a/arch/um/kernel/dyn.lds.S +++ b/arch/um/kernel/dyn.lds.S | |||
@@ -26,6 +26,7 @@ SECTIONS | |||
26 | 26 | ||
27 | /* Read-only sections, merged into text segment: */ | 27 | /* Read-only sections, merged into text segment: */ |
28 | .hash : { *(.hash) } | 28 | .hash : { *(.hash) } |
29 | .gnu.hash : { *(.gnu.hash) } | ||
29 | .dynsym : { *(.dynsym) } | 30 | .dynsym : { *(.dynsym) } |
30 | .dynstr : { *(.dynstr) } | 31 | .dynstr : { *(.dynstr) } |
31 | .gnu.version : { *(.gnu.version) } | 32 | .gnu.version : { *(.gnu.version) } |
diff --git a/arch/v850/kernel/setup.c b/arch/v850/kernel/setup.c index 62bdb8d29fc0..1bf672a25692 100644 --- a/arch/v850/kernel/setup.c +++ b/arch/v850/kernel/setup.c | |||
@@ -1,8 +1,8 @@ | |||
1 | /* | 1 | /* |
2 | * arch/v850/kernel/setup.c -- Arch-dependent initialization functions | 2 | * arch/v850/kernel/setup.c -- Arch-dependent initialization functions |
3 | * | 3 | * |
4 | * Copyright (C) 2001,02,03,05 NEC Electronics Corporation | 4 | * Copyright (C) 2001,02,03,05,06 NEC Electronics Corporation |
5 | * Copyright (C) 2001,02,03,05 Miles Bader <miles@gnu.org> | 5 | * Copyright (C) 2001,02,03,05,06 Miles Bader <miles@gnu.org> |
6 | * | 6 | * |
7 | * This file is subject to the terms and conditions of the GNU General | 7 | * This file is subject to the terms and conditions of the GNU General |
8 | * Public License. See the file COPYING in the main directory of this | 8 | * Public License. See the file COPYING in the main directory of this |
@@ -190,7 +190,7 @@ void free_initmem (void) | |||
190 | for (addr = start; addr < end; addr += PAGE_SIZE) { | 190 | for (addr = start; addr < end; addr += PAGE_SIZE) { |
191 | struct page *page = virt_to_page (addr); | 191 | struct page *page = virt_to_page (addr); |
192 | ClearPageReserved (page); | 192 | ClearPageReserved (page); |
193 | set_page_count (page, 1); | 193 | init_page_count (page); |
194 | __free_page (page); | 194 | __free_page (page); |
195 | total_ram_pages++; | 195 | total_ram_pages++; |
196 | } | 196 | } |
diff --git a/arch/v850/kernel/v850_ksyms.c b/arch/v850/kernel/v850_ksyms.c index c03ad6ed61cc..67bc48e57c60 100644 --- a/arch/v850/kernel/v850_ksyms.c +++ b/arch/v850/kernel/v850_ksyms.c | |||
@@ -21,9 +21,6 @@ EXPORT_SYMBOL (trap_table); | |||
21 | 21 | ||
22 | /* platform dependent support */ | 22 | /* platform dependent support */ |
23 | EXPORT_SYMBOL (kernel_thread); | 23 | EXPORT_SYMBOL (kernel_thread); |
24 | EXPORT_SYMBOL (enable_irq); | ||
25 | EXPORT_SYMBOL (disable_irq); | ||
26 | EXPORT_SYMBOL (disable_irq_nosync); | ||
27 | EXPORT_SYMBOL (__bug); | 24 | EXPORT_SYMBOL (__bug); |
28 | 25 | ||
29 | /* Networking helper routines. */ | 26 | /* Networking helper routines. */ |
@@ -33,22 +30,9 @@ EXPORT_SYMBOL (ip_compute_csum); | |||
33 | EXPORT_SYMBOL (ip_fast_csum); | 30 | EXPORT_SYMBOL (ip_fast_csum); |
34 | 31 | ||
35 | /* string / mem functions */ | 32 | /* string / mem functions */ |
36 | EXPORT_SYMBOL (strcpy); | ||
37 | EXPORT_SYMBOL (strncpy); | ||
38 | EXPORT_SYMBOL (strcat); | ||
39 | EXPORT_SYMBOL (strncat); | ||
40 | EXPORT_SYMBOL (strcmp); | ||
41 | EXPORT_SYMBOL (strncmp); | ||
42 | EXPORT_SYMBOL (strchr); | ||
43 | EXPORT_SYMBOL (strlen); | ||
44 | EXPORT_SYMBOL (strnlen); | ||
45 | EXPORT_SYMBOL (strrchr); | ||
46 | EXPORT_SYMBOL (strstr); | ||
47 | EXPORT_SYMBOL (memset); | 33 | EXPORT_SYMBOL (memset); |
48 | EXPORT_SYMBOL (memcpy); | 34 | EXPORT_SYMBOL (memcpy); |
49 | EXPORT_SYMBOL (memmove); | 35 | EXPORT_SYMBOL (memmove); |
50 | EXPORT_SYMBOL (memcmp); | ||
51 | EXPORT_SYMBOL (memscan); | ||
52 | 36 | ||
53 | /* semaphores */ | 37 | /* semaphores */ |
54 | EXPORT_SYMBOL (__down); | 38 | EXPORT_SYMBOL (__down); |
diff --git a/arch/x86_64/defconfig b/arch/x86_64/defconfig index 83d389b8ebd8..5fb970715941 100644 --- a/arch/x86_64/defconfig +++ b/arch/x86_64/defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.17-git22 | 3 | # Linux kernel version: 2.6.18-rc4 |
4 | # Tue Jul 4 14:24:40 2006 | 4 | # Thu Aug 24 21:05:55 2006 |
5 | # | 5 | # |
6 | CONFIG_X86_64=y | 6 | CONFIG_X86_64=y |
7 | CONFIG_64BIT=y | 7 | CONFIG_64BIT=y |
@@ -37,6 +37,7 @@ CONFIG_SWAP=y | |||
37 | CONFIG_SYSVIPC=y | 37 | CONFIG_SYSVIPC=y |
38 | CONFIG_POSIX_MQUEUE=y | 38 | CONFIG_POSIX_MQUEUE=y |
39 | # CONFIG_BSD_PROCESS_ACCT is not set | 39 | # CONFIG_BSD_PROCESS_ACCT is not set |
40 | # CONFIG_TASKSTATS is not set | ||
40 | CONFIG_SYSCTL=y | 41 | CONFIG_SYSCTL=y |
41 | # CONFIG_AUDIT is not set | 42 | # CONFIG_AUDIT is not set |
42 | CONFIG_IKCONFIG=y | 43 | CONFIG_IKCONFIG=y |
@@ -200,7 +201,7 @@ CONFIG_ACPI_THERMAL=y | |||
200 | CONFIG_ACPI_NUMA=y | 201 | CONFIG_ACPI_NUMA=y |
201 | # CONFIG_ACPI_ASUS is not set | 202 | # CONFIG_ACPI_ASUS is not set |
202 | # CONFIG_ACPI_IBM is not set | 203 | # CONFIG_ACPI_IBM is not set |
203 | CONFIG_ACPI_TOSHIBA=y | 204 | # CONFIG_ACPI_TOSHIBA is not set |
204 | CONFIG_ACPI_BLACKLIST_YEAR=0 | 205 | CONFIG_ACPI_BLACKLIST_YEAR=0 |
205 | # CONFIG_ACPI_DEBUG is not set | 206 | # CONFIG_ACPI_DEBUG is not set |
206 | CONFIG_ACPI_EC=y | 207 | CONFIG_ACPI_EC=y |
@@ -215,7 +216,7 @@ CONFIG_ACPI_CONTAINER=y | |||
215 | # | 216 | # |
216 | CONFIG_CPU_FREQ=y | 217 | CONFIG_CPU_FREQ=y |
217 | CONFIG_CPU_FREQ_TABLE=y | 218 | CONFIG_CPU_FREQ_TABLE=y |
218 | # CONFIG_CPU_FREQ_DEBUG is not set | 219 | CONFIG_CPU_FREQ_DEBUG=y |
219 | CONFIG_CPU_FREQ_STAT=y | 220 | CONFIG_CPU_FREQ_STAT=y |
220 | # CONFIG_CPU_FREQ_STAT_DETAILS is not set | 221 | # CONFIG_CPU_FREQ_STAT_DETAILS is not set |
221 | CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y | 222 | CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y |
@@ -413,6 +414,7 @@ CONFIG_BLK_DEV_LOOP=y | |||
413 | CONFIG_BLK_DEV_RAM=y | 414 | CONFIG_BLK_DEV_RAM=y |
414 | CONFIG_BLK_DEV_RAM_COUNT=16 | 415 | CONFIG_BLK_DEV_RAM_COUNT=16 |
415 | CONFIG_BLK_DEV_RAM_SIZE=4096 | 416 | CONFIG_BLK_DEV_RAM_SIZE=4096 |
417 | CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 | ||
416 | CONFIG_BLK_DEV_INITRD=y | 418 | CONFIG_BLK_DEV_INITRD=y |
417 | # CONFIG_CDROM_PKTCDVD is not set | 419 | # CONFIG_CDROM_PKTCDVD is not set |
418 | # CONFIG_ATA_OVER_ETH is not set | 420 | # CONFIG_ATA_OVER_ETH is not set |
@@ -493,8 +495,9 @@ CONFIG_SCSI=y | |||
493 | CONFIG_BLK_DEV_SD=y | 495 | CONFIG_BLK_DEV_SD=y |
494 | # CONFIG_CHR_DEV_ST is not set | 496 | # CONFIG_CHR_DEV_ST is not set |
495 | # CONFIG_CHR_DEV_OSST is not set | 497 | # CONFIG_CHR_DEV_OSST is not set |
496 | # CONFIG_BLK_DEV_SR is not set | 498 | CONFIG_BLK_DEV_SR=y |
497 | # CONFIG_CHR_DEV_SG is not set | 499 | # CONFIG_BLK_DEV_SR_VENDOR is not set |
500 | CONFIG_CHR_DEV_SG=y | ||
498 | # CONFIG_CHR_DEV_SCH is not set | 501 | # CONFIG_CHR_DEV_SCH is not set |
499 | 502 | ||
500 | # | 503 | # |
@@ -510,7 +513,7 @@ CONFIG_SCSI_CONSTANTS=y | |||
510 | CONFIG_SCSI_SPI_ATTRS=y | 513 | CONFIG_SCSI_SPI_ATTRS=y |
511 | CONFIG_SCSI_FC_ATTRS=y | 514 | CONFIG_SCSI_FC_ATTRS=y |
512 | # CONFIG_SCSI_ISCSI_ATTRS is not set | 515 | # CONFIG_SCSI_ISCSI_ATTRS is not set |
513 | # CONFIG_SCSI_SAS_ATTRS is not set | 516 | CONFIG_SCSI_SAS_ATTRS=y |
514 | 517 | ||
515 | # | 518 | # |
516 | # SCSI low-level drivers | 519 | # SCSI low-level drivers |
@@ -536,7 +539,7 @@ CONFIG_MEGARAID_MAILBOX=y | |||
536 | CONFIG_MEGARAID_SAS=y | 539 | CONFIG_MEGARAID_SAS=y |
537 | CONFIG_SCSI_SATA=y | 540 | CONFIG_SCSI_SATA=y |
538 | CONFIG_SCSI_SATA_AHCI=y | 541 | CONFIG_SCSI_SATA_AHCI=y |
539 | # CONFIG_SCSI_SATA_SVW is not set | 542 | CONFIG_SCSI_SATA_SVW=y |
540 | CONFIG_SCSI_ATA_PIIX=y | 543 | CONFIG_SCSI_ATA_PIIX=y |
541 | # CONFIG_SCSI_SATA_MV is not set | 544 | # CONFIG_SCSI_SATA_MV is not set |
542 | CONFIG_SCSI_SATA_NV=y | 545 | CONFIG_SCSI_SATA_NV=y |
@@ -587,7 +590,7 @@ CONFIG_BLK_DEV_DM=y | |||
587 | CONFIG_FUSION=y | 590 | CONFIG_FUSION=y |
588 | CONFIG_FUSION_SPI=y | 591 | CONFIG_FUSION_SPI=y |
589 | # CONFIG_FUSION_FC is not set | 592 | # CONFIG_FUSION_FC is not set |
590 | # CONFIG_FUSION_SAS is not set | 593 | CONFIG_FUSION_SAS=y |
591 | CONFIG_FUSION_MAX_SGE=128 | 594 | CONFIG_FUSION_MAX_SGE=128 |
592 | # CONFIG_FUSION_CTL is not set | 595 | # CONFIG_FUSION_CTL is not set |
593 | 596 | ||
@@ -673,7 +676,7 @@ CONFIG_NET_PCI=y | |||
673 | # CONFIG_PCNET32 is not set | 676 | # CONFIG_PCNET32 is not set |
674 | # CONFIG_AMD8111_ETH is not set | 677 | # CONFIG_AMD8111_ETH is not set |
675 | # CONFIG_ADAPTEC_STARFIRE is not set | 678 | # CONFIG_ADAPTEC_STARFIRE is not set |
676 | # CONFIG_B44 is not set | 679 | CONFIG_B44=y |
677 | CONFIG_FORCEDETH=y | 680 | CONFIG_FORCEDETH=y |
678 | # CONFIG_DGRS is not set | 681 | # CONFIG_DGRS is not set |
679 | # CONFIG_EEPRO100 is not set | 682 | # CONFIG_EEPRO100 is not set |
@@ -710,7 +713,7 @@ CONFIG_E1000=y | |||
710 | # CONFIG_SK98LIN is not set | 713 | # CONFIG_SK98LIN is not set |
711 | # CONFIG_VIA_VELOCITY is not set | 714 | # CONFIG_VIA_VELOCITY is not set |
712 | CONFIG_TIGON3=y | 715 | CONFIG_TIGON3=y |
713 | # CONFIG_BNX2 is not set | 716 | CONFIG_BNX2=y |
714 | 717 | ||
715 | # | 718 | # |
716 | # Ethernet (10000 Mbit) | 719 | # Ethernet (10000 Mbit) |
@@ -840,44 +843,7 @@ CONFIG_LEGACY_PTY_COUNT=256 | |||
840 | # | 843 | # |
841 | # Watchdog Cards | 844 | # Watchdog Cards |
842 | # | 845 | # |
843 | CONFIG_WATCHDOG=y | 846 | # CONFIG_WATCHDOG is not set |
844 | # CONFIG_WATCHDOG_NOWAYOUT is not set | ||
845 | |||
846 | # | ||
847 | # Watchdog Device Drivers | ||
848 | # | ||
849 | CONFIG_SOFT_WATCHDOG=y | ||
850 | # CONFIG_ACQUIRE_WDT is not set | ||
851 | # CONFIG_ADVANTECH_WDT is not set | ||
852 | # CONFIG_ALIM1535_WDT is not set | ||
853 | # CONFIG_ALIM7101_WDT is not set | ||
854 | # CONFIG_SC520_WDT is not set | ||
855 | # CONFIG_EUROTECH_WDT is not set | ||
856 | # CONFIG_IB700_WDT is not set | ||
857 | # CONFIG_IBMASR is not set | ||
858 | # CONFIG_WAFER_WDT is not set | ||
859 | # CONFIG_I6300ESB_WDT is not set | ||
860 | # CONFIG_I8XX_TCO is not set | ||
861 | # CONFIG_SC1200_WDT is not set | ||
862 | # CONFIG_60XX_WDT is not set | ||
863 | # CONFIG_SBC8360_WDT is not set | ||
864 | # CONFIG_CPU5_WDT is not set | ||
865 | # CONFIG_W83627HF_WDT is not set | ||
866 | # CONFIG_W83877F_WDT is not set | ||
867 | # CONFIG_W83977F_WDT is not set | ||
868 | # CONFIG_MACHZ_WDT is not set | ||
869 | # CONFIG_SBC_EPX_C3_WATCHDOG is not set | ||
870 | |||
871 | # | ||
872 | # PCI-based Watchdog Cards | ||
873 | # | ||
874 | # CONFIG_PCIPCWATCHDOG is not set | ||
875 | # CONFIG_WDTPCI is not set | ||
876 | |||
877 | # | ||
878 | # USB-based Watchdog Cards | ||
879 | # | ||
880 | # CONFIG_USBPCWATCHDOG is not set | ||
881 | CONFIG_HW_RANDOM=y | 847 | CONFIG_HW_RANDOM=y |
882 | CONFIG_HW_RANDOM_INTEL=y | 848 | CONFIG_HW_RANDOM_INTEL=y |
883 | CONFIG_HW_RANDOM_AMD=y | 849 | CONFIG_HW_RANDOM_AMD=y |
@@ -1054,6 +1020,7 @@ CONFIG_VGACON_SOFT_SCROLLBACK=y | |||
1054 | CONFIG_VGACON_SOFT_SCROLLBACK_SIZE=256 | 1020 | CONFIG_VGACON_SOFT_SCROLLBACK_SIZE=256 |
1055 | CONFIG_VIDEO_SELECT=y | 1021 | CONFIG_VIDEO_SELECT=y |
1056 | CONFIG_DUMMY_CONSOLE=y | 1022 | CONFIG_DUMMY_CONSOLE=y |
1023 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
1057 | 1024 | ||
1058 | # | 1025 | # |
1059 | # Sound | 1026 | # Sound |
@@ -1195,7 +1162,7 @@ CONFIG_USB_MON=y | |||
1195 | # CONFIG_USB_LEGOTOWER is not set | 1162 | # CONFIG_USB_LEGOTOWER is not set |
1196 | # CONFIG_USB_LCD is not set | 1163 | # CONFIG_USB_LCD is not set |
1197 | # CONFIG_USB_LED is not set | 1164 | # CONFIG_USB_LED is not set |
1198 | # CONFIG_USB_CY7C63 is not set | 1165 | # CONFIG_USB_CYPRESS_CY7C63 is not set |
1199 | # CONFIG_USB_CYTHERM is not set | 1166 | # CONFIG_USB_CYTHERM is not set |
1200 | # CONFIG_USB_PHIDGETKIT is not set | 1167 | # CONFIG_USB_PHIDGETKIT is not set |
1201 | # CONFIG_USB_PHIDGETSERVO is not set | 1168 | # CONFIG_USB_PHIDGETSERVO is not set |
@@ -1299,7 +1266,7 @@ CONFIG_INOTIFY=y | |||
1299 | CONFIG_INOTIFY_USER=y | 1266 | CONFIG_INOTIFY_USER=y |
1300 | # CONFIG_QUOTA is not set | 1267 | # CONFIG_QUOTA is not set |
1301 | CONFIG_DNOTIFY=y | 1268 | CONFIG_DNOTIFY=y |
1302 | CONFIG_AUTOFS_FS=y | 1269 | # CONFIG_AUTOFS_FS is not set |
1303 | CONFIG_AUTOFS4_FS=y | 1270 | CONFIG_AUTOFS4_FS=y |
1304 | # CONFIG_FUSE_FS is not set | 1271 | # CONFIG_FUSE_FS is not set |
1305 | 1272 | ||
@@ -1373,7 +1340,6 @@ CONFIG_SUNRPC=y | |||
1373 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | 1340 | # CONFIG_RPCSEC_GSS_SPKM3 is not set |
1374 | # CONFIG_SMB_FS is not set | 1341 | # CONFIG_SMB_FS is not set |
1375 | # CONFIG_CIFS is not set | 1342 | # CONFIG_CIFS is not set |
1376 | # CONFIG_CIFS_DEBUG2 is not set | ||
1377 | # CONFIG_NCP_FS is not set | 1343 | # CONFIG_NCP_FS is not set |
1378 | # CONFIG_CODA_FS is not set | 1344 | # CONFIG_CODA_FS is not set |
1379 | # CONFIG_AFS_FS is not set | 1345 | # CONFIG_AFS_FS is not set |
@@ -1493,4 +1459,5 @@ CONFIG_DEBUG_STACKOVERFLOW=y | |||
1493 | # CONFIG_CRC16 is not set | 1459 | # CONFIG_CRC16 is not set |
1494 | CONFIG_CRC32=y | 1460 | CONFIG_CRC32=y |
1495 | # CONFIG_LIBCRC32C is not set | 1461 | # CONFIG_LIBCRC32C is not set |
1462 | CONFIG_ZLIB_INFLATE=y | ||
1496 | CONFIG_PLIST=y | 1463 | CONFIG_PLIST=y |
diff --git a/arch/x86_64/ia32/Makefile b/arch/x86_64/ia32/Makefile index 62bc5f56da9e..cdae36435e21 100644 --- a/arch/x86_64/ia32/Makefile +++ b/arch/x86_64/ia32/Makefile | |||
@@ -23,6 +23,7 @@ targets := $(foreach F,sysenter syscall,vsyscall-$F.o vsyscall-$F.so) | |||
23 | # The DSO images are built using a special linker script | 23 | # The DSO images are built using a special linker script |
24 | quiet_cmd_syscall = SYSCALL $@ | 24 | quiet_cmd_syscall = SYSCALL $@ |
25 | cmd_syscall = $(CC) -m32 -nostdlib -shared -s \ | 25 | cmd_syscall = $(CC) -m32 -nostdlib -shared -s \ |
26 | $(call ld-option, -Wl$(comma)--hash-style=sysv) \ | ||
26 | -Wl,-soname=linux-gate.so.1 -o $@ \ | 27 | -Wl,-soname=linux-gate.so.1 -o $@ \ |
27 | -Wl,-T,$(filter-out FORCE,$^) | 28 | -Wl,-T,$(filter-out FORCE,$^) |
28 | 29 | ||
diff --git a/arch/x86_64/ia32/ia32_binfmt.c b/arch/x86_64/ia32/ia32_binfmt.c index a9dc0f3b5b51..2fd5a67fd435 100644 --- a/arch/x86_64/ia32/ia32_binfmt.c +++ b/arch/x86_64/ia32/ia32_binfmt.c | |||
@@ -73,39 +73,44 @@ typedef elf_greg_t elf_gregset_t[ELF_NGREG]; | |||
73 | * Dumping its extra ELF program headers includes all the other information | 73 | * Dumping its extra ELF program headers includes all the other information |
74 | * a debugger needs to easily find how the vsyscall DSO was being used. | 74 | * a debugger needs to easily find how the vsyscall DSO was being used. |
75 | */ | 75 | */ |
76 | #define ELF_CORE_EXTRA_PHDRS (VSYSCALL32_EHDR->e_phnum) | 76 | #define ELF_CORE_EXTRA_PHDRS (find_vma(current->mm, VSYSCALL32_BASE) ? \ |
77 | (VSYSCALL32_EHDR->e_phnum) : 0) | ||
77 | #define ELF_CORE_WRITE_EXTRA_PHDRS \ | 78 | #define ELF_CORE_WRITE_EXTRA_PHDRS \ |
78 | do { \ | 79 | do { \ |
79 | const struct elf32_phdr *const vsyscall_phdrs = \ | 80 | if (find_vma(current->mm, VSYSCALL32_BASE)) { \ |
80 | (const struct elf32_phdr *) (VSYSCALL32_BASE \ | 81 | const struct elf32_phdr *const vsyscall_phdrs = \ |
81 | + VSYSCALL32_EHDR->e_phoff); \ | 82 | (const struct elf32_phdr *) (VSYSCALL32_BASE \ |
82 | int i; \ | 83 | + VSYSCALL32_EHDR->e_phoff);\ |
83 | Elf32_Off ofs = 0; \ | 84 | int i; \ |
84 | for (i = 0; i < VSYSCALL32_EHDR->e_phnum; ++i) { \ | 85 | Elf32_Off ofs = 0; \ |
85 | struct elf32_phdr phdr = vsyscall_phdrs[i]; \ | 86 | for (i = 0; i < VSYSCALL32_EHDR->e_phnum; ++i) { \ |
86 | if (phdr.p_type == PT_LOAD) { \ | 87 | struct elf32_phdr phdr = vsyscall_phdrs[i]; \ |
87 | BUG_ON(ofs != 0); \ | 88 | if (phdr.p_type == PT_LOAD) { \ |
88 | ofs = phdr.p_offset = offset; \ | 89 | BUG_ON(ofs != 0); \ |
89 | phdr.p_memsz = PAGE_ALIGN(phdr.p_memsz); \ | 90 | ofs = phdr.p_offset = offset; \ |
90 | phdr.p_filesz = phdr.p_memsz; \ | 91 | phdr.p_memsz = PAGE_ALIGN(phdr.p_memsz); \ |
91 | offset += phdr.p_filesz; \ | 92 | phdr.p_filesz = phdr.p_memsz; \ |
93 | offset += phdr.p_filesz; \ | ||
94 | } \ | ||
95 | else \ | ||
96 | phdr.p_offset += ofs; \ | ||
97 | phdr.p_paddr = 0; /* match other core phdrs */ \ | ||
98 | DUMP_WRITE(&phdr, sizeof(phdr)); \ | ||
92 | } \ | 99 | } \ |
93 | else \ | ||
94 | phdr.p_offset += ofs; \ | ||
95 | phdr.p_paddr = 0; /* match other core phdrs */ \ | ||
96 | DUMP_WRITE(&phdr, sizeof(phdr)); \ | ||
97 | } \ | 100 | } \ |
98 | } while (0) | 101 | } while (0) |
99 | #define ELF_CORE_WRITE_EXTRA_DATA \ | 102 | #define ELF_CORE_WRITE_EXTRA_DATA \ |
100 | do { \ | 103 | do { \ |
101 | const struct elf32_phdr *const vsyscall_phdrs = \ | 104 | if (find_vma(current->mm, VSYSCALL32_BASE)) { \ |
102 | (const struct elf32_phdr *) (VSYSCALL32_BASE \ | 105 | const struct elf32_phdr *const vsyscall_phdrs = \ |
103 | + VSYSCALL32_EHDR->e_phoff); \ | 106 | (const struct elf32_phdr *) (VSYSCALL32_BASE \ |
104 | int i; \ | 107 | + VSYSCALL32_EHDR->e_phoff); \ |
105 | for (i = 0; i < VSYSCALL32_EHDR->e_phnum; ++i) { \ | 108 | int i; \ |
106 | if (vsyscall_phdrs[i].p_type == PT_LOAD) \ | 109 | for (i = 0; i < VSYSCALL32_EHDR->e_phnum; ++i) { \ |
107 | DUMP_WRITE((void *) (u64) vsyscall_phdrs[i].p_vaddr, \ | 110 | if (vsyscall_phdrs[i].p_type == PT_LOAD) \ |
108 | PAGE_ALIGN(vsyscall_phdrs[i].p_memsz)); \ | 111 | DUMP_WRITE((void *) (u64) vsyscall_phdrs[i].p_vaddr,\ |
112 | PAGE_ALIGN(vsyscall_phdrs[i].p_memsz)); \ | ||
113 | } \ | ||
109 | } \ | 114 | } \ |
110 | } while (0) | 115 | } while (0) |
111 | 116 | ||
diff --git a/arch/x86_64/ia32/ia32entry.S b/arch/x86_64/ia32/ia32entry.S index 9b5bb413a6e9..5d4a7d125ed0 100644 --- a/arch/x86_64/ia32/ia32entry.S +++ b/arch/x86_64/ia32/ia32entry.S | |||
@@ -103,7 +103,7 @@ ENTRY(ia32_sysenter_target) | |||
103 | pushq %rax | 103 | pushq %rax |
104 | CFI_ADJUST_CFA_OFFSET 8 | 104 | CFI_ADJUST_CFA_OFFSET 8 |
105 | cld | 105 | cld |
106 | SAVE_ARGS 0,0,1 | 106 | SAVE_ARGS 0,0,0 |
107 | /* no need to do an access_ok check here because rbp has been | 107 | /* no need to do an access_ok check here because rbp has been |
108 | 32bit zero extended */ | 108 | 32bit zero extended */ |
109 | 1: movl (%rbp),%r9d | 109 | 1: movl (%rbp),%r9d |
diff --git a/arch/x86_64/ia32/vsyscall.lds b/arch/x86_64/ia32/vsyscall.lds index f2e75ed4c6c7..1dc86ff5bcb9 100644 --- a/arch/x86_64/ia32/vsyscall.lds +++ b/arch/x86_64/ia32/vsyscall.lds | |||
@@ -11,6 +11,7 @@ SECTIONS | |||
11 | . = VSYSCALL_BASE + SIZEOF_HEADERS; | 11 | . = VSYSCALL_BASE + SIZEOF_HEADERS; |
12 | 12 | ||
13 | .hash : { *(.hash) } :text | 13 | .hash : { *(.hash) } :text |
14 | .gnu.hash : { *(.gnu.hash) } | ||
14 | .dynsym : { *(.dynsym) } | 15 | .dynsym : { *(.dynsym) } |
15 | .dynstr : { *(.dynstr) } | 16 | .dynstr : { *(.dynstr) } |
16 | .gnu.version : { *(.gnu.version) } | 17 | .gnu.version : { *(.gnu.version) } |
diff --git a/arch/x86_64/kernel/e820.c b/arch/x86_64/kernel/e820.c index e56c2adf57a4..764bf23c7103 100644 --- a/arch/x86_64/kernel/e820.c +++ b/arch/x86_64/kernel/e820.c | |||
@@ -71,7 +71,11 @@ static inline int bad_addr(unsigned long *addrp, unsigned long size) | |||
71 | #endif | 71 | #endif |
72 | /* kernel code + 640k memory hole (later should not be needed, but | 72 | /* kernel code + 640k memory hole (later should not be needed, but |
73 | be paranoid for now) */ | 73 | be paranoid for now) */ |
74 | if (last >= 640*1024 && addr < __pa_symbol(&_end)) { | 74 | if (last >= 640*1024 && addr < 1024*1024) { |
75 | *addrp = 1024*1024; | ||
76 | return 1; | ||
77 | } | ||
78 | if (last >= __pa_symbol(&_text) && last < __pa_symbol(&_end)) { | ||
75 | *addrp = __pa_symbol(&_end); | 79 | *addrp = __pa_symbol(&_end); |
76 | return 1; | 80 | return 1; |
77 | } | 81 | } |
@@ -104,35 +108,6 @@ e820_any_mapped(unsigned long start, unsigned long end, unsigned type) | |||
104 | return 0; | 108 | return 0; |
105 | } | 109 | } |
106 | 110 | ||
107 | /* | ||
108 | * This function checks if the entire range <start,end> is mapped with type. | ||
109 | * | ||
110 | * Note: this function only works correct if the e820 table is sorted and | ||
111 | * not-overlapping, which is the case | ||
112 | */ | ||
113 | int __init e820_all_mapped(unsigned long start, unsigned long end, unsigned type) | ||
114 | { | ||
115 | int i; | ||
116 | for (i = 0; i < e820.nr_map; i++) { | ||
117 | struct e820entry *ei = &e820.map[i]; | ||
118 | if (type && ei->type != type) | ||
119 | continue; | ||
120 | /* is the region (part) in overlap with the current region ?*/ | ||
121 | if (ei->addr >= end || ei->addr + ei->size <= start) | ||
122 | continue; | ||
123 | |||
124 | /* if the region is at the beginning of <start,end> we move | ||
125 | * start to the end of the region since it's ok until there | ||
126 | */ | ||
127 | if (ei->addr <= start) | ||
128 | start = ei->addr + ei->size; | ||
129 | /* if start is now at or beyond end, we're done, full coverage */ | ||
130 | if (start >= end) | ||
131 | return 1; /* we're done */ | ||
132 | } | ||
133 | return 0; | ||
134 | } | ||
135 | |||
136 | /* | 111 | /* |
137 | * Find a free area in a specific range. | 112 | * Find a free area in a specific range. |
138 | */ | 113 | */ |
diff --git a/arch/x86_64/kernel/entry.S b/arch/x86_64/kernel/entry.S index d464dded68c0..aa8d8939abc1 100644 --- a/arch/x86_64/kernel/entry.S +++ b/arch/x86_64/kernel/entry.S | |||
@@ -513,6 +513,7 @@ END(stub_rt_sigreturn) | |||
513 | swapgs | 513 | swapgs |
514 | 1: incl %gs:pda_irqcount # RED-PEN should check preempt count | 514 | 1: incl %gs:pda_irqcount # RED-PEN should check preempt count |
515 | cmoveq %gs:pda_irqstackptr,%rsp | 515 | cmoveq %gs:pda_irqstackptr,%rsp |
516 | push %rbp # backlink for old unwinder | ||
516 | /* | 517 | /* |
517 | * We entered an interrupt context - irqs are off: | 518 | * We entered an interrupt context - irqs are off: |
518 | */ | 519 | */ |
@@ -972,6 +973,8 @@ ENTRY(kernel_thread) | |||
972 | ENDPROC(kernel_thread) | 973 | ENDPROC(kernel_thread) |
973 | 974 | ||
974 | child_rip: | 975 | child_rip: |
976 | pushq $0 # fake return address | ||
977 | CFI_STARTPROC | ||
975 | /* | 978 | /* |
976 | * Here we are in the child and the registers are set as they were | 979 | * Here we are in the child and the registers are set as they were |
977 | * at kernel_thread() invocation in the parent. | 980 | * at kernel_thread() invocation in the parent. |
@@ -982,6 +985,7 @@ child_rip: | |||
982 | # exit | 985 | # exit |
983 | xorl %edi, %edi | 986 | xorl %edi, %edi |
984 | call do_exit | 987 | call do_exit |
988 | CFI_ENDPROC | ||
985 | ENDPROC(child_rip) | 989 | ENDPROC(child_rip) |
986 | 990 | ||
987 | /* | 991 | /* |
@@ -1139,18 +1143,21 @@ ENTRY(machine_check) | |||
1139 | END(machine_check) | 1143 | END(machine_check) |
1140 | #endif | 1144 | #endif |
1141 | 1145 | ||
1146 | /* Call softirq on interrupt stack. Interrupts are off. */ | ||
1142 | ENTRY(call_softirq) | 1147 | ENTRY(call_softirq) |
1143 | CFI_STARTPROC | 1148 | CFI_STARTPROC |
1144 | movq %gs:pda_irqstackptr,%rax | 1149 | push %rbp |
1145 | movq %rsp,%rdx | 1150 | CFI_ADJUST_CFA_OFFSET 8 |
1146 | CFI_DEF_CFA_REGISTER rdx | 1151 | CFI_REL_OFFSET rbp,0 |
1152 | mov %rsp,%rbp | ||
1153 | CFI_DEF_CFA_REGISTER rbp | ||
1147 | incl %gs:pda_irqcount | 1154 | incl %gs:pda_irqcount |
1148 | cmove %rax,%rsp | 1155 | cmove %gs:pda_irqstackptr,%rsp |
1149 | pushq %rdx | 1156 | push %rbp # backlink for old unwinder |
1150 | /*todo CFI_DEF_CFA_EXPRESSION ...*/ | ||
1151 | call __do_softirq | 1157 | call __do_softirq |
1152 | popq %rsp | 1158 | leaveq |
1153 | CFI_DEF_CFA_REGISTER rsp | 1159 | CFI_DEF_CFA_REGISTER rsp |
1160 | CFI_ADJUST_CFA_OFFSET -8 | ||
1154 | decl %gs:pda_irqcount | 1161 | decl %gs:pda_irqcount |
1155 | ret | 1162 | ret |
1156 | CFI_ENDPROC | 1163 | CFI_ENDPROC |
diff --git a/arch/x86_64/kernel/head.S b/arch/x86_64/kernel/head.S index 6df05e6034fa..c9739ca81d06 100644 --- a/arch/x86_64/kernel/head.S +++ b/arch/x86_64/kernel/head.S | |||
@@ -191,6 +191,7 @@ startup_64: | |||
191 | * jump | 191 | * jump |
192 | */ | 192 | */ |
193 | movq initial_code(%rip),%rax | 193 | movq initial_code(%rip),%rax |
194 | pushq $0 # fake return address | ||
194 | jmp *%rax | 195 | jmp *%rax |
195 | 196 | ||
196 | /* SMP bootup changes these two */ | 197 | /* SMP bootup changes these two */ |
diff --git a/arch/x86_64/kernel/init_task.c b/arch/x86_64/kernel/init_task.c index ce31d904d601..3dc5854ba21e 100644 --- a/arch/x86_64/kernel/init_task.c +++ b/arch/x86_64/kernel/init_task.c | |||
@@ -46,4 +46,9 @@ EXPORT_SYMBOL(init_task); | |||
46 | */ | 46 | */ |
47 | DEFINE_PER_CPU(struct tss_struct, init_tss) ____cacheline_internodealigned_in_smp = INIT_TSS; | 47 | DEFINE_PER_CPU(struct tss_struct, init_tss) ____cacheline_internodealigned_in_smp = INIT_TSS; |
48 | 48 | ||
49 | /* Copies of the original ist values from the tss are only accessed during | ||
50 | * debugging, no special alignment required. | ||
51 | */ | ||
52 | DEFINE_PER_CPU(struct orig_ist, orig_ist); | ||
53 | |||
49 | #define ALIGN_TO_4K __attribute__((section(".data.init_task"))) | 54 | #define ALIGN_TO_4K __attribute__((section(".data.init_task"))) |
diff --git a/arch/x86_64/kernel/machine_kexec.c b/arch/x86_64/kernel/machine_kexec.c index 83fb24a02821..106076b370fc 100644 --- a/arch/x86_64/kernel/machine_kexec.c +++ b/arch/x86_64/kernel/machine_kexec.c | |||
@@ -207,14 +207,11 @@ NORET_TYPE void machine_kexec(struct kimage *image) | |||
207 | __flush_tlb(); | 207 | __flush_tlb(); |
208 | 208 | ||
209 | 209 | ||
210 | /* The segment registers are funny things, they are | 210 | /* The segment registers are funny things, they have both a |
211 | * automatically loaded from a table, in memory wherever you | 211 | * visible and an invisible part. Whenever the visible part is |
212 | * set them to a specific selector, but this table is never | 212 | * set to a specific selector, the invisible part is loaded |
213 | * accessed again unless you set the segment to a different selector. | 213 | * with from a table in memory. At no other time is the |
214 | * | 214 | * descriptor table in memory accessed. |
215 | * The more common model are caches where the behide | ||
216 | * the scenes work is done, but is also dropped at arbitrary | ||
217 | * times. | ||
218 | * | 215 | * |
219 | * I take advantage of this here by force loading the | 216 | * I take advantage of this here by force loading the |
220 | * segments, before I zap the gdt with an invalid value. | 217 | * segments, before I zap the gdt with an invalid value. |
diff --git a/arch/x86_64/kernel/mce.c b/arch/x86_64/kernel/mce.c index 88845674c661..4e017fb30fb3 100644 --- a/arch/x86_64/kernel/mce.c +++ b/arch/x86_64/kernel/mce.c | |||
@@ -615,7 +615,7 @@ static __cpuinit int mce_create_device(unsigned int cpu) | |||
615 | } | 615 | } |
616 | 616 | ||
617 | #ifdef CONFIG_HOTPLUG_CPU | 617 | #ifdef CONFIG_HOTPLUG_CPU |
618 | static __cpuinit void mce_remove_device(unsigned int cpu) | 618 | static void mce_remove_device(unsigned int cpu) |
619 | { | 619 | { |
620 | int i; | 620 | int i; |
621 | 621 | ||
@@ -626,10 +626,9 @@ static __cpuinit void mce_remove_device(unsigned int cpu) | |||
626 | sysdev_remove_file(&per_cpu(device_mce,cpu), &attr_check_interval); | 626 | sysdev_remove_file(&per_cpu(device_mce,cpu), &attr_check_interval); |
627 | sysdev_unregister(&per_cpu(device_mce,cpu)); | 627 | sysdev_unregister(&per_cpu(device_mce,cpu)); |
628 | } | 628 | } |
629 | #endif | ||
630 | 629 | ||
631 | /* Get notified when a cpu comes on/off. Be hotplug friendly. */ | 630 | /* Get notified when a cpu comes on/off. Be hotplug friendly. */ |
632 | static __cpuinit int | 631 | static int |
633 | mce_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu) | 632 | mce_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu) |
634 | { | 633 | { |
635 | unsigned int cpu = (unsigned long)hcpu; | 634 | unsigned int cpu = (unsigned long)hcpu; |
@@ -638,18 +637,17 @@ mce_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu) | |||
638 | case CPU_ONLINE: | 637 | case CPU_ONLINE: |
639 | mce_create_device(cpu); | 638 | mce_create_device(cpu); |
640 | break; | 639 | break; |
641 | #ifdef CONFIG_HOTPLUG_CPU | ||
642 | case CPU_DEAD: | 640 | case CPU_DEAD: |
643 | mce_remove_device(cpu); | 641 | mce_remove_device(cpu); |
644 | break; | 642 | break; |
645 | #endif | ||
646 | } | 643 | } |
647 | return NOTIFY_OK; | 644 | return NOTIFY_OK; |
648 | } | 645 | } |
649 | 646 | ||
650 | static struct notifier_block __cpuinitdata mce_cpu_notifier = { | 647 | static struct notifier_block mce_cpu_notifier = { |
651 | .notifier_call = mce_cpu_callback, | 648 | .notifier_call = mce_cpu_callback, |
652 | }; | 649 | }; |
650 | #endif | ||
653 | 651 | ||
654 | static __init int mce_init_device(void) | 652 | static __init int mce_init_device(void) |
655 | { | 653 | { |
@@ -664,7 +662,7 @@ static __init int mce_init_device(void) | |||
664 | mce_create_device(i); | 662 | mce_create_device(i); |
665 | } | 663 | } |
666 | 664 | ||
667 | register_cpu_notifier(&mce_cpu_notifier); | 665 | register_hotcpu_notifier(&mce_cpu_notifier); |
668 | misc_register(&mce_log_device); | 666 | misc_register(&mce_log_device); |
669 | return err; | 667 | return err; |
670 | } | 668 | } |
diff --git a/arch/x86_64/kernel/mce_amd.c b/arch/x86_64/kernel/mce_amd.c index db2acbf7ad28..883fe747f64c 100644 --- a/arch/x86_64/kernel/mce_amd.c +++ b/arch/x86_64/kernel/mce_amd.c | |||
@@ -558,7 +558,7 @@ out: | |||
558 | * of shared sysfs dir/files, and rest of the cores will be symlinked to it. | 558 | * of shared sysfs dir/files, and rest of the cores will be symlinked to it. |
559 | */ | 559 | */ |
560 | 560 | ||
561 | static __cpuinit void deallocate_threshold_block(unsigned int cpu, | 561 | static void deallocate_threshold_block(unsigned int cpu, |
562 | unsigned int bank) | 562 | unsigned int bank) |
563 | { | 563 | { |
564 | struct threshold_block *pos = NULL; | 564 | struct threshold_block *pos = NULL; |
@@ -578,7 +578,7 @@ static __cpuinit void deallocate_threshold_block(unsigned int cpu, | |||
578 | per_cpu(threshold_banks, cpu)[bank]->blocks = NULL; | 578 | per_cpu(threshold_banks, cpu)[bank]->blocks = NULL; |
579 | } | 579 | } |
580 | 580 | ||
581 | static __cpuinit void threshold_remove_bank(unsigned int cpu, int bank) | 581 | static void threshold_remove_bank(unsigned int cpu, int bank) |
582 | { | 582 | { |
583 | int i = 0; | 583 | int i = 0; |
584 | struct threshold_bank *b; | 584 | struct threshold_bank *b; |
@@ -618,7 +618,7 @@ free_out: | |||
618 | per_cpu(threshold_banks, cpu)[bank] = NULL; | 618 | per_cpu(threshold_banks, cpu)[bank] = NULL; |
619 | } | 619 | } |
620 | 620 | ||
621 | static __cpuinit void threshold_remove_device(unsigned int cpu) | 621 | static void threshold_remove_device(unsigned int cpu) |
622 | { | 622 | { |
623 | unsigned int bank; | 623 | unsigned int bank; |
624 | 624 | ||
@@ -629,14 +629,8 @@ static __cpuinit void threshold_remove_device(unsigned int cpu) | |||
629 | } | 629 | } |
630 | } | 630 | } |
631 | 631 | ||
632 | #else /* !CONFIG_HOTPLUG_CPU */ | ||
633 | static void threshold_remove_device(unsigned int cpu) | ||
634 | { | ||
635 | } | ||
636 | #endif | ||
637 | |||
638 | /* get notified when a cpu comes on/off */ | 632 | /* get notified when a cpu comes on/off */ |
639 | static int __cpuinit threshold_cpu_callback(struct notifier_block *nfb, | 633 | static int threshold_cpu_callback(struct notifier_block *nfb, |
640 | unsigned long action, void *hcpu) | 634 | unsigned long action, void *hcpu) |
641 | { | 635 | { |
642 | /* cpu was unsigned int to begin with */ | 636 | /* cpu was unsigned int to begin with */ |
@@ -659,9 +653,10 @@ static int __cpuinit threshold_cpu_callback(struct notifier_block *nfb, | |||
659 | return NOTIFY_OK; | 653 | return NOTIFY_OK; |
660 | } | 654 | } |
661 | 655 | ||
662 | static struct notifier_block threshold_cpu_notifier __cpuinitdata = { | 656 | static struct notifier_block threshold_cpu_notifier = { |
663 | .notifier_call = threshold_cpu_callback, | 657 | .notifier_call = threshold_cpu_callback, |
664 | }; | 658 | }; |
659 | #endif /* CONFIG_HOTPLUG_CPU */ | ||
665 | 660 | ||
666 | static __init int threshold_init_device(void) | 661 | static __init int threshold_init_device(void) |
667 | { | 662 | { |
@@ -673,7 +668,7 @@ static __init int threshold_init_device(void) | |||
673 | if (err) | 668 | if (err) |
674 | return err; | 669 | return err; |
675 | } | 670 | } |
676 | register_cpu_notifier(&threshold_cpu_notifier); | 671 | register_hotcpu_notifier(&threshold_cpu_notifier); |
677 | return 0; | 672 | return 0; |
678 | } | 673 | } |
679 | 674 | ||
diff --git a/arch/x86_64/kernel/pci-calgary.c b/arch/x86_64/kernel/pci-calgary.c index e71ed53b08fb..146924ba5df5 100644 --- a/arch/x86_64/kernel/pci-calgary.c +++ b/arch/x86_64/kernel/pci-calgary.c | |||
@@ -85,7 +85,8 @@ | |||
85 | #define CSR_AGENT_MASK 0xffe0ffff | 85 | #define CSR_AGENT_MASK 0xffe0ffff |
86 | 86 | ||
87 | #define MAX_NUM_OF_PHBS 8 /* how many PHBs in total? */ | 87 | #define MAX_NUM_OF_PHBS 8 /* how many PHBs in total? */ |
88 | #define MAX_PHB_BUS_NUM (MAX_NUM_OF_PHBS * 2) /* max dev->bus->number */ | 88 | #define MAX_NUM_CHASSIS 8 /* max number of chassis */ |
89 | #define MAX_PHB_BUS_NUM (MAX_NUM_OF_PHBS * MAX_NUM_CHASSIS * 2) /* max dev->bus->number */ | ||
89 | #define PHBS_PER_CALGARY 4 | 90 | #define PHBS_PER_CALGARY 4 |
90 | 91 | ||
91 | /* register offsets in Calgary's internal register space */ | 92 | /* register offsets in Calgary's internal register space */ |
@@ -110,7 +111,8 @@ static const unsigned long phb_offsets[] = { | |||
110 | 0xB000 /* PHB3 */ | 111 | 0xB000 /* PHB3 */ |
111 | }; | 112 | }; |
112 | 113 | ||
113 | void* tce_table_kva[MAX_NUM_OF_PHBS * MAX_NUMNODES]; | 114 | static char bus_to_phb[MAX_PHB_BUS_NUM]; |
115 | void* tce_table_kva[MAX_PHB_BUS_NUM]; | ||
114 | unsigned int specified_table_size = TCE_TABLE_SIZE_UNSPECIFIED; | 116 | unsigned int specified_table_size = TCE_TABLE_SIZE_UNSPECIFIED; |
115 | static int translate_empty_slots __read_mostly = 0; | 117 | static int translate_empty_slots __read_mostly = 0; |
116 | static int calgary_detected __read_mostly = 0; | 118 | static int calgary_detected __read_mostly = 0; |
@@ -119,7 +121,7 @@ static int calgary_detected __read_mostly = 0; | |||
119 | * the bitmap of PHBs the user requested that we disable | 121 | * the bitmap of PHBs the user requested that we disable |
120 | * translation on. | 122 | * translation on. |
121 | */ | 123 | */ |
122 | static DECLARE_BITMAP(translation_disabled, MAX_NUMNODES * MAX_PHB_BUS_NUM); | 124 | static DECLARE_BITMAP(translation_disabled, MAX_PHB_BUS_NUM); |
123 | 125 | ||
124 | static void tce_cache_blast(struct iommu_table *tbl); | 126 | static void tce_cache_blast(struct iommu_table *tbl); |
125 | 127 | ||
@@ -452,7 +454,7 @@ static struct dma_mapping_ops calgary_dma_ops = { | |||
452 | 454 | ||
453 | static inline int busno_to_phbid(unsigned char num) | 455 | static inline int busno_to_phbid(unsigned char num) |
454 | { | 456 | { |
455 | return bus_to_phb(num) % PHBS_PER_CALGARY; | 457 | return bus_to_phb[num]; |
456 | } | 458 | } |
457 | 459 | ||
458 | static inline unsigned long split_queue_offset(unsigned char num) | 460 | static inline unsigned long split_queue_offset(unsigned char num) |
@@ -812,7 +814,7 @@ static int __init calgary_init(void) | |||
812 | int i, ret = -ENODEV; | 814 | int i, ret = -ENODEV; |
813 | struct pci_dev *dev = NULL; | 815 | struct pci_dev *dev = NULL; |
814 | 816 | ||
815 | for (i = 0; i <= num_online_nodes() * MAX_NUM_OF_PHBS; i++) { | 817 | for (i = 0; i < MAX_PHB_BUS_NUM; i++) { |
816 | dev = pci_get_device(PCI_VENDOR_ID_IBM, | 818 | dev = pci_get_device(PCI_VENDOR_ID_IBM, |
817 | PCI_DEVICE_ID_IBM_CALGARY, | 819 | PCI_DEVICE_ID_IBM_CALGARY, |
818 | dev); | 820 | dev); |
@@ -822,7 +824,7 @@ static int __init calgary_init(void) | |||
822 | calgary_init_one_nontraslated(dev); | 824 | calgary_init_one_nontraslated(dev); |
823 | continue; | 825 | continue; |
824 | } | 826 | } |
825 | if (!tce_table_kva[i] && !translate_empty_slots) { | 827 | if (!tce_table_kva[dev->bus->number] && !translate_empty_slots) { |
826 | pci_dev_put(dev); | 828 | pci_dev_put(dev); |
827 | continue; | 829 | continue; |
828 | } | 830 | } |
@@ -842,7 +844,7 @@ error: | |||
842 | pci_dev_put(dev); | 844 | pci_dev_put(dev); |
843 | continue; | 845 | continue; |
844 | } | 846 | } |
845 | if (!tce_table_kva[i] && !translate_empty_slots) | 847 | if (!tce_table_kva[dev->bus->number] && !translate_empty_slots) |
846 | continue; | 848 | continue; |
847 | calgary_disable_translation(dev); | 849 | calgary_disable_translation(dev); |
848 | calgary_free_tar(dev); | 850 | calgary_free_tar(dev); |
@@ -876,9 +878,10 @@ static inline int __init determine_tce_table_size(u64 ram) | |||
876 | void __init detect_calgary(void) | 878 | void __init detect_calgary(void) |
877 | { | 879 | { |
878 | u32 val; | 880 | u32 val; |
879 | int bus, table_idx; | 881 | int bus; |
880 | void *tbl; | 882 | void *tbl; |
881 | int detected = 0; | 883 | int calgary_found = 0; |
884 | int phb = -1; | ||
882 | 885 | ||
883 | /* | 886 | /* |
884 | * if the user specified iommu=off or iommu=soft or we found | 887 | * if the user specified iommu=off or iommu=soft or we found |
@@ -889,38 +892,46 @@ void __init detect_calgary(void) | |||
889 | 892 | ||
890 | specified_table_size = determine_tce_table_size(end_pfn * PAGE_SIZE); | 893 | specified_table_size = determine_tce_table_size(end_pfn * PAGE_SIZE); |
891 | 894 | ||
892 | for (bus = 0, table_idx = 0; | 895 | for (bus = 0; bus < MAX_PHB_BUS_NUM; bus++) { |
893 | bus <= num_online_nodes() * MAX_PHB_BUS_NUM; | 896 | int dev; |
894 | bus++) { | 897 | |
895 | BUG_ON(bus > MAX_NUMNODES * MAX_PHB_BUS_NUM); | 898 | tce_table_kva[bus] = NULL; |
899 | bus_to_phb[bus] = -1; | ||
900 | |||
896 | if (read_pci_config(bus, 0, 0, 0) != PCI_VENDOR_DEVICE_ID_CALGARY) | 901 | if (read_pci_config(bus, 0, 0, 0) != PCI_VENDOR_DEVICE_ID_CALGARY) |
897 | continue; | 902 | continue; |
903 | |||
904 | /* | ||
905 | * There are 4 PHBs per Calgary chip. Set phb to which phb (0-3) | ||
906 | * it is connected to releative to the clagary chip. | ||
907 | */ | ||
908 | phb = (phb + 1) % PHBS_PER_CALGARY; | ||
909 | |||
898 | if (test_bit(bus, translation_disabled)) { | 910 | if (test_bit(bus, translation_disabled)) { |
899 | printk(KERN_INFO "Calgary: translation is disabled for " | 911 | printk(KERN_INFO "Calgary: translation is disabled for " |
900 | "PHB 0x%x\n", bus); | 912 | "PHB 0x%x\n", bus); |
901 | /* skip this phb, don't allocate a tbl for it */ | 913 | /* skip this phb, don't allocate a tbl for it */ |
902 | tce_table_kva[table_idx] = NULL; | ||
903 | table_idx++; | ||
904 | continue; | 914 | continue; |
905 | } | 915 | } |
906 | /* | 916 | /* |
907 | * scan the first slot of the PCI bus to see if there | 917 | * Scan the slots of the PCI bus to see if there is a device present. |
908 | * are any devices present | 918 | * The parent bus will be the zero-ith device, so start at 1. |
909 | */ | 919 | */ |
910 | val = read_pci_config(bus, 1, 0, 0); | 920 | for (dev = 1; dev < 8; dev++) { |
911 | if (val != 0xffffffff || translate_empty_slots) { | 921 | val = read_pci_config(bus, dev, 0, 0); |
912 | tbl = alloc_tce_table(); | 922 | if (val != 0xffffffff || translate_empty_slots) { |
913 | if (!tbl) | 923 | tbl = alloc_tce_table(); |
914 | goto cleanup; | 924 | if (!tbl) |
915 | detected = 1; | 925 | goto cleanup; |
916 | } else | 926 | tce_table_kva[bus] = tbl; |
917 | tbl = NULL; | 927 | bus_to_phb[bus] = phb; |
918 | 928 | calgary_found = 1; | |
919 | tce_table_kva[table_idx] = tbl; | 929 | break; |
920 | table_idx++; | 930 | } |
931 | } | ||
921 | } | 932 | } |
922 | 933 | ||
923 | if (detected) { | 934 | if (calgary_found) { |
924 | iommu_detected = 1; | 935 | iommu_detected = 1; |
925 | calgary_detected = 1; | 936 | calgary_detected = 1; |
926 | printk(KERN_INFO "PCI-DMA: Calgary IOMMU detected. " | 937 | printk(KERN_INFO "PCI-DMA: Calgary IOMMU detected. " |
@@ -929,9 +940,9 @@ void __init detect_calgary(void) | |||
929 | return; | 940 | return; |
930 | 941 | ||
931 | cleanup: | 942 | cleanup: |
932 | for (--table_idx; table_idx >= 0; --table_idx) | 943 | for (--bus; bus >= 0; --bus) |
933 | if (tce_table_kva[table_idx]) | 944 | if (tce_table_kva[bus]) |
934 | free_tce_table(tce_table_kva[table_idx]); | 945 | free_tce_table(tce_table_kva[bus]); |
935 | } | 946 | } |
936 | 947 | ||
937 | int __init calgary_iommu_init(void) | 948 | int __init calgary_iommu_init(void) |
@@ -1002,7 +1013,7 @@ static int __init calgary_parse_options(char *p) | |||
1002 | if (p == endp) | 1013 | if (p == endp) |
1003 | break; | 1014 | break; |
1004 | 1015 | ||
1005 | if (bridge <= (num_online_nodes() * MAX_PHB_BUS_NUM)) { | 1016 | if (bridge < MAX_PHB_BUS_NUM) { |
1006 | printk(KERN_INFO "Calgary: disabling " | 1017 | printk(KERN_INFO "Calgary: disabling " |
1007 | "translation for PHB 0x%x\n", bridge); | 1018 | "translation for PHB 0x%x\n", bridge); |
1008 | set_bit(bridge, translation_disabled); | 1019 | set_bit(bridge, translation_disabled); |
diff --git a/arch/x86_64/kernel/pci-nommu.c b/arch/x86_64/kernel/pci-nommu.c index c4c3cc36ac5b..aad7609d8e92 100644 --- a/arch/x86_64/kernel/pci-nommu.c +++ b/arch/x86_64/kernel/pci-nommu.c | |||
@@ -92,5 +92,7 @@ void __init no_iommu_init(void) | |||
92 | { | 92 | { |
93 | if (dma_ops) | 93 | if (dma_ops) |
94 | return; | 94 | return; |
95 | |||
96 | force_iommu = 0; /* no HW IOMMU */ | ||
95 | dma_ops = &nommu_dma_ops; | 97 | dma_ops = &nommu_dma_ops; |
96 | } | 98 | } |
diff --git a/arch/x86_64/kernel/pci-swiotlb.c b/arch/x86_64/kernel/pci-swiotlb.c index ebdb77fe2057..6a55f87ba97f 100644 --- a/arch/x86_64/kernel/pci-swiotlb.c +++ b/arch/x86_64/kernel/pci-swiotlb.c | |||
@@ -31,9 +31,10 @@ struct dma_mapping_ops swiotlb_dma_ops = { | |||
31 | void pci_swiotlb_init(void) | 31 | void pci_swiotlb_init(void) |
32 | { | 32 | { |
33 | /* don't initialize swiotlb if iommu=off (no_iommu=1) */ | 33 | /* don't initialize swiotlb if iommu=off (no_iommu=1) */ |
34 | if (!iommu_detected && !no_iommu && | 34 | if (!iommu_detected && !no_iommu && end_pfn > MAX_DMA32_PFN) |
35 | (end_pfn > MAX_DMA32_PFN || force_iommu)) | ||
36 | swiotlb = 1; | 35 | swiotlb = 1; |
36 | if (swiotlb_force) | ||
37 | swiotlb = 1; | ||
37 | if (swiotlb) { | 38 | if (swiotlb) { |
38 | printk(KERN_INFO "PCI-DMA: Using software bounce buffering for IO (SWIOTLB)\n"); | 39 | printk(KERN_INFO "PCI-DMA: Using software bounce buffering for IO (SWIOTLB)\n"); |
39 | swiotlb_init(); | 40 | swiotlb_init(); |
diff --git a/arch/x86_64/kernel/setup.c b/arch/x86_64/kernel/setup.c index 8a099ff1f8bc..34afad704824 100644 --- a/arch/x86_64/kernel/setup.c +++ b/arch/x86_64/kernel/setup.c | |||
@@ -521,8 +521,6 @@ static void discover_ebda(void) | |||
521 | 521 | ||
522 | void __init setup_arch(char **cmdline_p) | 522 | void __init setup_arch(char **cmdline_p) |
523 | { | 523 | { |
524 | unsigned long kernel_end; | ||
525 | |||
526 | ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV); | 524 | ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV); |
527 | screen_info = SCREEN_INFO; | 525 | screen_info = SCREEN_INFO; |
528 | edid_info = EDID_INFO; | 526 | edid_info = EDID_INFO; |
@@ -596,8 +594,8 @@ void __init setup_arch(char **cmdline_p) | |||
596 | (table_end - table_start) << PAGE_SHIFT); | 594 | (table_end - table_start) << PAGE_SHIFT); |
597 | 595 | ||
598 | /* reserve kernel */ | 596 | /* reserve kernel */ |
599 | kernel_end = round_up(__pa_symbol(&_end),PAGE_SIZE); | 597 | reserve_bootmem_generic(__pa_symbol(&_text), |
600 | reserve_bootmem_generic(HIGH_MEMORY, kernel_end - HIGH_MEMORY); | 598 | __pa_symbol(&_end) - __pa_symbol(&_text)); |
601 | 599 | ||
602 | /* | 600 | /* |
603 | * reserve physical page 0 - it's a special BIOS page on many boxes, | 601 | * reserve physical page 0 - it's a special BIOS page on many boxes, |
diff --git a/arch/x86_64/kernel/setup64.c b/arch/x86_64/kernel/setup64.c index 6fe58a634b5f..417de564456e 100644 --- a/arch/x86_64/kernel/setup64.c +++ b/arch/x86_64/kernel/setup64.c | |||
@@ -189,6 +189,7 @@ void __cpuinit cpu_init (void) | |||
189 | { | 189 | { |
190 | int cpu = stack_smp_processor_id(); | 190 | int cpu = stack_smp_processor_id(); |
191 | struct tss_struct *t = &per_cpu(init_tss, cpu); | 191 | struct tss_struct *t = &per_cpu(init_tss, cpu); |
192 | struct orig_ist *orig_ist = &per_cpu(orig_ist, cpu); | ||
192 | unsigned long v; | 193 | unsigned long v; |
193 | char *estacks = NULL; | 194 | char *estacks = NULL; |
194 | struct task_struct *me; | 195 | struct task_struct *me; |
@@ -256,7 +257,7 @@ void __cpuinit cpu_init (void) | |||
256 | estacks += EXCEPTION_STKSZ; | 257 | estacks += EXCEPTION_STKSZ; |
257 | break; | 258 | break; |
258 | } | 259 | } |
259 | t->ist[v] = (unsigned long)estacks; | 260 | orig_ist->ist[v] = t->ist[v] = (unsigned long)estacks; |
260 | } | 261 | } |
261 | 262 | ||
262 | t->io_bitmap_base = offsetof(struct tss_struct, io_bitmap); | 263 | t->io_bitmap_base = offsetof(struct tss_struct, io_bitmap); |
diff --git a/arch/x86_64/kernel/smp.c b/arch/x86_64/kernel/smp.c index 5a1c0a3bf872..06af6ca60129 100644 --- a/arch/x86_64/kernel/smp.c +++ b/arch/x86_64/kernel/smp.c | |||
@@ -203,7 +203,7 @@ int __cpuinit init_smp_flush(void) | |||
203 | { | 203 | { |
204 | int i; | 204 | int i; |
205 | for_each_cpu_mask(i, cpu_possible_map) { | 205 | for_each_cpu_mask(i, cpu_possible_map) { |
206 | spin_lock_init(&per_cpu(flush_state.tlbstate_lock, i)); | 206 | spin_lock_init(&per_cpu(flush_state, i).tlbstate_lock); |
207 | } | 207 | } |
208 | return 0; | 208 | return 0; |
209 | } | 209 | } |
diff --git a/arch/x86_64/kernel/tce.c b/arch/x86_64/kernel/tce.c index d3a9e79e954c..5530dda3f27a 100644 --- a/arch/x86_64/kernel/tce.c +++ b/arch/x86_64/kernel/tce.c | |||
@@ -96,7 +96,6 @@ static inline unsigned int table_size_to_number_of_entries(unsigned char size) | |||
96 | static int tce_table_setparms(struct pci_dev *dev, struct iommu_table *tbl) | 96 | static int tce_table_setparms(struct pci_dev *dev, struct iommu_table *tbl) |
97 | { | 97 | { |
98 | unsigned int bitmapsz; | 98 | unsigned int bitmapsz; |
99 | unsigned int tce_table_index; | ||
100 | unsigned long bmppages; | 99 | unsigned long bmppages; |
101 | int ret; | 100 | int ret; |
102 | 101 | ||
@@ -105,8 +104,7 @@ static int tce_table_setparms(struct pci_dev *dev, struct iommu_table *tbl) | |||
105 | /* set the tce table size - measured in entries */ | 104 | /* set the tce table size - measured in entries */ |
106 | tbl->it_size = table_size_to_number_of_entries(specified_table_size); | 105 | tbl->it_size = table_size_to_number_of_entries(specified_table_size); |
107 | 106 | ||
108 | tce_table_index = bus_to_phb(tbl->it_busno); | 107 | tbl->it_base = (unsigned long)tce_table_kva[dev->bus->number]; |
109 | tbl->it_base = (unsigned long)tce_table_kva[tce_table_index]; | ||
110 | if (!tbl->it_base) { | 108 | if (!tbl->it_base) { |
111 | printk(KERN_ERR "Calgary: iommu_table_setparms: " | 109 | printk(KERN_ERR "Calgary: iommu_table_setparms: " |
112 | "no table allocated?!\n"); | 110 | "no table allocated?!\n"); |
diff --git a/arch/x86_64/kernel/time.c b/arch/x86_64/kernel/time.c index b9ff75992c16..7a9b18224182 100644 --- a/arch/x86_64/kernel/time.c +++ b/arch/x86_64/kernel/time.c | |||
@@ -28,6 +28,7 @@ | |||
28 | #include <linux/acpi.h> | 28 | #include <linux/acpi.h> |
29 | #ifdef CONFIG_ACPI | 29 | #ifdef CONFIG_ACPI |
30 | #include <acpi/achware.h> /* for PM timer frequency */ | 30 | #include <acpi/achware.h> /* for PM timer frequency */ |
31 | #include <acpi/acpi_bus.h> | ||
31 | #endif | 32 | #endif |
32 | #include <asm/8253pit.h> | 33 | #include <asm/8253pit.h> |
33 | #include <asm/pgtable.h> | 34 | #include <asm/pgtable.h> |
@@ -193,7 +194,7 @@ unsigned long profile_pc(struct pt_regs *regs) | |||
193 | is just accounted to the spinlock function. | 194 | is just accounted to the spinlock function. |
194 | Better would be to write these functions in assembler again | 195 | Better would be to write these functions in assembler again |
195 | and check exactly. */ | 196 | and check exactly. */ |
196 | if (in_lock_functions(pc)) { | 197 | if (!user_mode(regs) && in_lock_functions(pc)) { |
197 | char *v = *(char **)regs->rsp; | 198 | char *v = *(char **)regs->rsp; |
198 | if ((v >= _stext && v <= _etext) || | 199 | if ((v >= _stext && v <= _etext) || |
199 | (v >= _sinittext && v <= _einittext) || | 200 | (v >= _sinittext && v <= _einittext) || |
@@ -953,11 +954,18 @@ __cpuinit int unsynchronized_tsc(void) | |||
953 | #ifdef CONFIG_SMP | 954 | #ifdef CONFIG_SMP |
954 | if (apic_is_clustered_box()) | 955 | if (apic_is_clustered_box()) |
955 | return 1; | 956 | return 1; |
956 | /* Intel systems are normally all synchronized. Exceptions | ||
957 | are handled in the check above. */ | ||
958 | if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) | ||
959 | return 0; | ||
960 | #endif | 957 | #endif |
958 | /* Most intel systems have synchronized TSCs except for | ||
959 | multi node systems */ | ||
960 | if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL) { | ||
961 | #ifdef CONFIG_ACPI | ||
962 | /* But TSC doesn't tick in C3 so don't use it there */ | ||
963 | if (acpi_fadt.length > 0 && acpi_fadt.plvl3_lat < 100) | ||
964 | return 1; | ||
965 | #endif | ||
966 | return 0; | ||
967 | } | ||
968 | |||
961 | /* Assume multi socket systems are not synchronized */ | 969 | /* Assume multi socket systems are not synchronized */ |
962 | return num_present_cpus() > 1; | 970 | return num_present_cpus() > 1; |
963 | } | 971 | } |
diff --git a/arch/x86_64/kernel/traps.c b/arch/x86_64/kernel/traps.c index eb39a2775236..b1249774d1e8 100644 --- a/arch/x86_64/kernel/traps.c +++ b/arch/x86_64/kernel/traps.c | |||
@@ -107,7 +107,11 @@ static inline void preempt_conditional_cli(struct pt_regs *regs) | |||
107 | } | 107 | } |
108 | 108 | ||
109 | static int kstack_depth_to_print = 12; | 109 | static int kstack_depth_to_print = 12; |
110 | #ifdef CONFIG_STACK_UNWIND | ||
110 | static int call_trace = 1; | 111 | static int call_trace = 1; |
112 | #else | ||
113 | #define call_trace (-1) | ||
114 | #endif | ||
111 | 115 | ||
112 | #ifdef CONFIG_KALLSYMS | 116 | #ifdef CONFIG_KALLSYMS |
113 | # include <linux/kallsyms.h> | 117 | # include <linux/kallsyms.h> |
@@ -174,7 +178,7 @@ static unsigned long *in_exception_stack(unsigned cpu, unsigned long stack, | |||
174 | break; | 178 | break; |
175 | #endif | 179 | #endif |
176 | default: | 180 | default: |
177 | end = per_cpu(init_tss, cpu).ist[k]; | 181 | end = per_cpu(orig_ist, cpu).ist[k]; |
178 | break; | 182 | break; |
179 | } | 183 | } |
180 | /* | 184 | /* |
@@ -254,7 +258,6 @@ void show_trace(struct task_struct *tsk, struct pt_regs *regs, unsigned long * s | |||
254 | { | 258 | { |
255 | const unsigned cpu = safe_smp_processor_id(); | 259 | const unsigned cpu = safe_smp_processor_id(); |
256 | unsigned long *irqstack_end = (unsigned long *)cpu_pda(cpu)->irqstackptr; | 260 | unsigned long *irqstack_end = (unsigned long *)cpu_pda(cpu)->irqstackptr; |
257 | int i = 11; | ||
258 | unsigned used = 0; | 261 | unsigned used = 0; |
259 | 262 | ||
260 | printk("\nCall Trace:\n"); | 263 | printk("\nCall Trace:\n"); |
@@ -276,11 +279,20 @@ void show_trace(struct task_struct *tsk, struct pt_regs *regs, unsigned long * s | |||
276 | unw_ret = show_trace_unwind(&info, NULL); | 279 | unw_ret = show_trace_unwind(&info, NULL); |
277 | } | 280 | } |
278 | if (unw_ret > 0) { | 281 | if (unw_ret > 0) { |
279 | if (call_trace > 0) | 282 | if (call_trace == 1 && !arch_unw_user_mode(&info)) { |
283 | print_symbol("DWARF2 unwinder stuck at %s\n", | ||
284 | UNW_PC(&info)); | ||
285 | if ((long)UNW_SP(&info) < 0) { | ||
286 | printk("Leftover inexact backtrace:\n"); | ||
287 | stack = (unsigned long *)UNW_SP(&info); | ||
288 | } else | ||
289 | printk("Full inexact backtrace again:\n"); | ||
290 | } else if (call_trace >= 1) | ||
280 | return; | 291 | return; |
281 | printk("Legacy call trace:"); | 292 | else |
282 | i = 18; | 293 | printk("Full inexact backtrace again:\n"); |
283 | } | 294 | } else |
295 | printk("Inexact backtrace:\n"); | ||
284 | } | 296 | } |
285 | 297 | ||
286 | /* | 298 | /* |
@@ -521,7 +533,7 @@ void __kprobes oops_end(unsigned long flags) | |||
521 | /* Nest count reaches zero, release the lock. */ | 533 | /* Nest count reaches zero, release the lock. */ |
522 | spin_unlock_irqrestore(&die_lock, flags); | 534 | spin_unlock_irqrestore(&die_lock, flags); |
523 | if (panic_on_oops) | 535 | if (panic_on_oops) |
524 | panic("Oops"); | 536 | panic("Fatal exception"); |
525 | } | 537 | } |
526 | 538 | ||
527 | void __kprobes __die(const char * str, struct pt_regs * regs, long err) | 539 | void __kprobes __die(const char * str, struct pt_regs * regs, long err) |
@@ -1112,14 +1124,18 @@ static int __init kstack_setup(char *s) | |||
1112 | } | 1124 | } |
1113 | __setup("kstack=", kstack_setup); | 1125 | __setup("kstack=", kstack_setup); |
1114 | 1126 | ||
1127 | #ifdef CONFIG_STACK_UNWIND | ||
1115 | static int __init call_trace_setup(char *s) | 1128 | static int __init call_trace_setup(char *s) |
1116 | { | 1129 | { |
1117 | if (strcmp(s, "old") == 0) | 1130 | if (strcmp(s, "old") == 0) |
1118 | call_trace = -1; | 1131 | call_trace = -1; |
1119 | else if (strcmp(s, "both") == 0) | 1132 | else if (strcmp(s, "both") == 0) |
1120 | call_trace = 0; | 1133 | call_trace = 0; |
1121 | else if (strcmp(s, "new") == 0) | 1134 | else if (strcmp(s, "newfallback") == 0) |
1122 | call_trace = 1; | 1135 | call_trace = 1; |
1136 | else if (strcmp(s, "new") == 0) | ||
1137 | call_trace = 2; | ||
1123 | return 1; | 1138 | return 1; |
1124 | } | 1139 | } |
1125 | __setup("call_trace=", call_trace_setup); | 1140 | __setup("call_trace=", call_trace_setup); |
1141 | #endif | ||
diff --git a/arch/x86_64/pci/k8-bus.c b/arch/x86_64/pci/k8-bus.c index b50a7c7c47f8..3acf60ded2a0 100644 --- a/arch/x86_64/pci/k8-bus.c +++ b/arch/x86_64/pci/k8-bus.c | |||
@@ -2,7 +2,6 @@ | |||
2 | #include <linux/pci.h> | 2 | #include <linux/pci.h> |
3 | #include <asm/mpspec.h> | 3 | #include <asm/mpspec.h> |
4 | #include <linux/cpumask.h> | 4 | #include <linux/cpumask.h> |
5 | #include <asm/k8.h> | ||
6 | 5 | ||
7 | /* | 6 | /* |
8 | * This discovers the pcibus <-> node mapping on AMD K8. | 7 | * This discovers the pcibus <-> node mapping on AMD K8. |
@@ -19,6 +18,7 @@ | |||
19 | #define NR_LDT_BUS_NUMBER_REGISTERS 3 | 18 | #define NR_LDT_BUS_NUMBER_REGISTERS 3 |
20 | #define SECONDARY_LDT_BUS_NUMBER(dword) ((dword >> 8) & 0xFF) | 19 | #define SECONDARY_LDT_BUS_NUMBER(dword) ((dword >> 8) & 0xFF) |
21 | #define SUBORDINATE_LDT_BUS_NUMBER(dword) ((dword >> 16) & 0xFF) | 20 | #define SUBORDINATE_LDT_BUS_NUMBER(dword) ((dword >> 16) & 0xFF) |
21 | #define PCI_DEVICE_ID_K8HTCONFIG 0x1100 | ||
22 | 22 | ||
23 | /** | 23 | /** |
24 | * fill_mp_bus_to_cpumask() | 24 | * fill_mp_bus_to_cpumask() |
@@ -28,7 +28,8 @@ | |||
28 | __init static int | 28 | __init static int |
29 | fill_mp_bus_to_cpumask(void) | 29 | fill_mp_bus_to_cpumask(void) |
30 | { | 30 | { |
31 | int i, j, k; | 31 | struct pci_dev *nb_dev = NULL; |
32 | int i, j; | ||
32 | u32 ldtbus, nid; | 33 | u32 ldtbus, nid; |
33 | static int lbnr[3] = { | 34 | static int lbnr[3] = { |
34 | LDT_BUS_NUMBER_REGISTER_0, | 35 | LDT_BUS_NUMBER_REGISTER_0, |
@@ -36,9 +37,8 @@ fill_mp_bus_to_cpumask(void) | |||
36 | LDT_BUS_NUMBER_REGISTER_2 | 37 | LDT_BUS_NUMBER_REGISTER_2 |
37 | }; | 38 | }; |
38 | 39 | ||
39 | cache_k8_northbridges(); | 40 | while ((nb_dev = pci_get_device(PCI_VENDOR_ID_AMD, |
40 | for (k = 0; k < num_k8_northbridges; k++) { | 41 | PCI_DEVICE_ID_K8HTCONFIG, nb_dev))) { |
41 | struct pci_dev *nb_dev = k8_northbridges[k]; | ||
42 | pci_read_config_dword(nb_dev, NODE_ID_REGISTER, &nid); | 42 | pci_read_config_dword(nb_dev, NODE_ID_REGISTER, &nid); |
43 | 43 | ||
44 | for (i = 0; i < NR_LDT_BUS_NUMBER_REGISTERS; i++) { | 44 | for (i = 0; i < NR_LDT_BUS_NUMBER_REGISTERS; i++) { |
diff --git a/arch/x86_64/pci/mmconfig.c b/arch/x86_64/pci/mmconfig.c index 3c55c76c6fd5..2d48a7941d48 100644 --- a/arch/x86_64/pci/mmconfig.c +++ b/arch/x86_64/pci/mmconfig.c | |||
@@ -9,6 +9,7 @@ | |||
9 | #include <linux/init.h> | 9 | #include <linux/init.h> |
10 | #include <linux/acpi.h> | 10 | #include <linux/acpi.h> |
11 | #include <linux/bitmap.h> | 11 | #include <linux/bitmap.h> |
12 | #include <linux/dmi.h> | ||
12 | #include <asm/e820.h> | 13 | #include <asm/e820.h> |
13 | 14 | ||
14 | #include "pci.h" | 15 | #include "pci.h" |
@@ -164,11 +165,33 @@ static __init void unreachable_devices(void) | |||
164 | } | 165 | } |
165 | } | 166 | } |
166 | 167 | ||
168 | static int disable_mcfg(struct dmi_system_id *d) | ||
169 | { | ||
170 | printk("PCI: %s detected. Disabling MCFG.\n", d->ident); | ||
171 | pci_probe &= ~PCI_PROBE_MMCONF; | ||
172 | return 0; | ||
173 | } | ||
174 | |||
175 | static struct dmi_system_id __initdata dmi_bad_mcfg[] = { | ||
176 | /* Has broken MCFG table that makes the system hang when used */ | ||
177 | { | ||
178 | .callback = disable_mcfg, | ||
179 | .ident = "Intel D3C5105 SDV", | ||
180 | .matches = { | ||
181 | DMI_MATCH(DMI_BIOS_VENDOR, "Intel"), | ||
182 | DMI_MATCH(DMI_BOARD_NAME, "D26928"), | ||
183 | }, | ||
184 | }, | ||
185 | {} | ||
186 | }; | ||
187 | |||
167 | void __init pci_mmcfg_init(void) | 188 | void __init pci_mmcfg_init(void) |
168 | { | 189 | { |
169 | int i; | 190 | int i; |
170 | 191 | ||
171 | if ((pci_probe & PCI_PROBE_MMCONF) == 0) | 192 | dmi_check_system(dmi_bad_mcfg); |
193 | |||
194 | if ((pci_probe & (PCI_PROBE_MMCONF|PCI_PROBE_MMCONF_FORCE)) == 0) | ||
172 | return; | 195 | return; |
173 | 196 | ||
174 | acpi_table_parse(ACPI_MCFG, acpi_parse_mcfg); | 197 | acpi_table_parse(ACPI_MCFG, acpi_parse_mcfg); |
@@ -177,15 +200,6 @@ void __init pci_mmcfg_init(void) | |||
177 | (pci_mmcfg_config[0].base_address == 0)) | 200 | (pci_mmcfg_config[0].base_address == 0)) |
178 | return; | 201 | return; |
179 | 202 | ||
180 | if (!e820_all_mapped(pci_mmcfg_config[0].base_address, | ||
181 | pci_mmcfg_config[0].base_address + MMCONFIG_APER_MIN, | ||
182 | E820_RESERVED)) { | ||
183 | printk(KERN_ERR "PCI: BIOS Bug: MCFG area at %x is not E820-reserved\n", | ||
184 | pci_mmcfg_config[0].base_address); | ||
185 | printk(KERN_ERR "PCI: Not using MMCONFIG.\n"); | ||
186 | return; | ||
187 | } | ||
188 | |||
189 | /* RED-PEN i386 doesn't do _nocache right now */ | 203 | /* RED-PEN i386 doesn't do _nocache right now */ |
190 | pci_mmcfg_virt = kmalloc(sizeof(*pci_mmcfg_virt) * pci_mmcfg_config_num, GFP_KERNEL); | 204 | pci_mmcfg_virt = kmalloc(sizeof(*pci_mmcfg_virt) * pci_mmcfg_config_num, GFP_KERNEL); |
191 | if (pci_mmcfg_virt == NULL) { | 205 | if (pci_mmcfg_virt == NULL) { |
diff --git a/arch/xtensa/kernel/ptrace.c b/arch/xtensa/kernel/ptrace.c index 5064d9383963..9aea23cc0dc5 100644 --- a/arch/xtensa/kernel/ptrace.c +++ b/arch/xtensa/kernel/ptrace.c | |||
@@ -212,7 +212,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) | |||
212 | */ | 212 | */ |
213 | case PTRACE_KILL: | 213 | case PTRACE_KILL: |
214 | ret = 0; | 214 | ret = 0; |
215 | if (child->state == EXIT_ZOMBIE) /* already dead */ | 215 | if (child->exit_state == EXIT_ZOMBIE) /* already dead */ |
216 | break; | 216 | break; |
217 | child->exit_code = SIGKILL; | 217 | child->exit_code = SIGKILL; |
218 | child->ptrace &= ~PT_SINGLESTEP; | 218 | child->ptrace &= ~PT_SINGLESTEP; |
diff --git a/arch/xtensa/kernel/traps.c b/arch/xtensa/kernel/traps.c index 27e409089a7b..ce077d6bf3a0 100644 --- a/arch/xtensa/kernel/traps.c +++ b/arch/xtensa/kernel/traps.c | |||
@@ -487,11 +487,9 @@ void die(const char * str, struct pt_regs * regs, long err) | |||
487 | if (in_interrupt()) | 487 | if (in_interrupt()) |
488 | panic("Fatal exception in interrupt"); | 488 | panic("Fatal exception in interrupt"); |
489 | 489 | ||
490 | if (panic_on_oops) { | 490 | if (panic_on_oops) |
491 | printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n"); | ||
492 | ssleep(5); | ||
493 | panic("Fatal exception"); | 491 | panic("Fatal exception"); |
494 | } | 492 | |
495 | do_exit(err); | 493 | do_exit(err); |
496 | } | 494 | } |
497 | 495 | ||