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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-04-27 12:20:51 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-04-27 12:20:51 -0400
commitad5da3cf39a5b11a198929be1f2644e17ecd767e (patch)
tree22d98f2a14db70e7229ec3b9c944488f2d50d4a1 /arch
parentda8ac5e0fab11d0e84be4e49aaaa828c52d17097 (diff)
parent14cf232ab161ce87ca538af3daad5f717c20d487 (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (22 commits) [MIPS] Don't force frame pointers for lockdep on MIPS [MIPS] update vr41xx Kconfig [MIPS] remove 2 select entries for VR41xx [MIPS] rename VR41XX to VR4100 series [MIPS] Use DEFINE_SPINLOCK instead of SPIN_LOCK_UNLOCKED. [MIPS] Replace old fashioned "__typeof" with "__typeof__". [MIPS] Remove unused _THREAD_SIZE_ORDER from asm-offset.c. [MIPS] Change PCI host bridge setup/resources [MIPS] Register PCI host bridge resource earlier [MIPS] Remove pnx8550-v2pci_defconfig [MIPS] Add bcm1480 ZBus trace support, fix wait related bugs [MIPS] Updated Sibyte headers [MIPS] Remove unused argument from kunmap_coherent(). [MIPS] Malta: Delete unused prototype of mips_timer_interrupt. [MIPS] Select ZONE_DMA only if GENERIC_ISA_DMA selected [MIPS] MIPS Tech: Get rid of volatile in core code. [MIPS] IP22: Get rid of volatile in IP22 core code. [MIPS] JMR3927 cleanup [MIPS] merge GT64111 PCI routines and GT64120 PCI_0 routines [MIPS] Cobalt: Split PCI codes from setup.c ...
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/Kconfig27
-rw-r--r--arch/mips/Makefile6
-rw-r--r--arch/mips/basler/excite/excite_setup.c2
-rw-r--r--arch/mips/cobalt/Makefile1
-rw-r--r--arch/mips/cobalt/console.c8
-rw-r--r--arch/mips/cobalt/irq.c2
-rw-r--r--arch/mips/cobalt/pci.c47
-rw-r--r--arch/mips/cobalt/reset.c11
-rw-r--r--arch/mips/cobalt/setup.c32
-rw-r--r--arch/mips/configs/jmr3927_defconfig254
-rw-r--r--arch/mips/configs/pnx8550-v2pci_defconfig1540
-rw-r--r--arch/mips/gt64120/wrppmc/pci.c4
-rw-r--r--arch/mips/jmr3927/common/prom.c12
-rw-r--r--arch/mips/jmr3927/common/puts.c122
-rw-r--r--arch/mips/jmr3927/rbhma3100/Makefile1
-rw-r--r--arch/mips/jmr3927/rbhma3100/init.c16
-rw-r--r--arch/mips/jmr3927/rbhma3100/irq.c312
-rw-r--r--arch/mips/jmr3927/rbhma3100/kgdb_io.c54
-rw-r--r--arch/mips/jmr3927/rbhma3100/setup.c157
-rw-r--r--arch/mips/kernel/asm-offsets.c1
-rw-r--r--arch/mips/kernel/i8259.c4
-rw-r--r--arch/mips/kernel/kspd.c5
-rw-r--r--arch/mips/kernel/rtlx.c7
-rw-r--r--arch/mips/mips-boards/generic/display.c8
-rw-r--r--arch/mips/mips-boards/generic/pci.c4
-rw-r--r--arch/mips/mips-boards/generic/reset.c12
-rw-r--r--arch/mips/mips-boards/malta/malta_int.c4
-rw-r--r--arch/mips/mips-boards/malta/malta_setup.c4
-rw-r--r--arch/mips/mm/cache.c2
-rw-r--r--arch/mips/mm/init.c25
-rw-r--r--arch/mips/pci/Makefile3
-rw-r--r--arch/mips/pci/fixup-jmr3927.c11
-rw-r--r--arch/mips/pci/ops-gt64111.c100
-rw-r--r--arch/mips/pci/ops-gt64xxx_pci0.c (renamed from arch/mips/pci/ops-gt64120.c)30
-rw-r--r--arch/mips/pci/ops-tx3927.c232
-rw-r--r--arch/mips/pci/pci-lasat.c4
-rw-r--r--arch/mips/pci/pci-ocelot.c2
-rw-r--r--arch/mips/pci/pci.c25
-rw-r--r--arch/mips/sgi-ip22/ip22-nvram.c24
-rw-r--r--arch/mips/sgi-ip22/ip22-time.c14
-rw-r--r--arch/mips/sibyte/Kconfig2
-rw-r--r--arch/mips/sibyte/common/Makefile5
-rw-r--r--arch/mips/sibyte/common/sb_tbprof.c (renamed from arch/mips/sibyte/sb1250/bcm1250_tbprof.c)158
-rw-r--r--arch/mips/sibyte/sb1250/Makefile1
-rw-r--r--arch/mips/sni/pcimt.c105
-rw-r--r--arch/mips/sni/pcit.c122
-rw-r--r--arch/mips/vr41xx/Kconfig92
47 files changed, 490 insertions, 3124 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index c78b14380b3e..130d825e5438 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -10,7 +10,6 @@ menu "Machine selection"
10 10
11config ZONE_DMA 11config ZONE_DMA
12 bool 12 bool
13 default y
14 13
15choice 14choice
16 prompt "System type" 15 prompt "System type"
@@ -165,7 +164,7 @@ config MIPS_COBALT
165 select HW_HAS_PCI 164 select HW_HAS_PCI
166 select I8259 165 select I8259
167 select IRQ_CPU 166 select IRQ_CPU
168 select MIPS_GT64111 167 select PCI_GT64XXX_PCI0
169 select SYS_HAS_CPU_NEVADA 168 select SYS_HAS_CPU_NEVADA
170 select SYS_HAS_EARLY_PRINTK 169 select SYS_HAS_EARLY_PRINTK
171 select SYS_SUPPORTS_32BIT_KERNEL 170 select SYS_SUPPORTS_32BIT_KERNEL
@@ -207,7 +206,7 @@ config MIPS_EV64120
207 depends on EXPERIMENTAL 206 depends on EXPERIMENTAL
208 select DMA_NONCOHERENT 207 select DMA_NONCOHERENT
209 select HW_HAS_PCI 208 select HW_HAS_PCI
210 select MIPS_GT64120 209 select PCI_GT64XXX_PCI0
211 select SYS_HAS_CPU_R5000 210 select SYS_HAS_CPU_R5000
212 select SYS_SUPPORTS_32BIT_KERNEL 211 select SYS_SUPPORTS_32BIT_KERNEL
213 select SYS_SUPPORTS_64BIT_KERNEL 212 select SYS_SUPPORTS_64BIT_KERNEL
@@ -245,7 +244,7 @@ config LASAT
245 select DMA_NONCOHERENT 244 select DMA_NONCOHERENT
246 select SYS_HAS_EARLY_PRINTK 245 select SYS_HAS_EARLY_PRINTK
247 select HW_HAS_PCI 246 select HW_HAS_PCI
248 select MIPS_GT64120 247 select PCI_GT64XXX_PCI0
249 select MIPS_NILE4 248 select MIPS_NILE4
250 select R5000_CPU_SCACHE 249 select R5000_CPU_SCACHE
251 select SYS_HAS_CPU_R5000 250 select SYS_HAS_CPU_R5000
@@ -263,7 +262,7 @@ config MIPS_ATLAS
263 select HW_HAS_PCI 262 select HW_HAS_PCI
264 select MIPS_BOARDS_GEN 263 select MIPS_BOARDS_GEN
265 select MIPS_BONITO64 264 select MIPS_BONITO64
266 select MIPS_GT64120 265 select PCI_GT64XXX_PCI0
267 select MIPS_MSC 266 select MIPS_MSC
268 select RM7000_CPU_SCACHE 267 select RM7000_CPU_SCACHE
269 select SWAP_IO_SPACE 268 select SWAP_IO_SPACE
@@ -296,7 +295,7 @@ config MIPS_MALTA
296 select MIPS_BOARDS_GEN 295 select MIPS_BOARDS_GEN
297 select MIPS_BONITO64 296 select MIPS_BONITO64
298 select MIPS_CPU_SCACHE 297 select MIPS_CPU_SCACHE
299 select MIPS_GT64120 298 select PCI_GT64XXX_PCI0
300 select MIPS_MSC 299 select MIPS_MSC
301 select SWAP_IO_SPACE 300 select SWAP_IO_SPACE
302 select SYS_HAS_CPU_MIPS32_R1 301 select SYS_HAS_CPU_MIPS32_R1
@@ -340,7 +339,7 @@ config WR_PPMC
340 select BOOT_ELF32 339 select BOOT_ELF32
341 select DMA_NONCOHERENT 340 select DMA_NONCOHERENT
342 select HW_HAS_PCI 341 select HW_HAS_PCI
343 select MIPS_GT64120 342 select PCI_GT64XXX_PCI0
344 select SWAP_IO_SPACE 343 select SWAP_IO_SPACE
345 select SYS_HAS_CPU_MIPS32_R1 344 select SYS_HAS_CPU_MIPS32_R1
346 select SYS_HAS_CPU_MIPS32_R2 345 select SYS_HAS_CPU_MIPS32_R2
@@ -398,7 +397,7 @@ config MOMENCO_OCELOT
398 select HW_HAS_PCI 397 select HW_HAS_PCI
399 select IRQ_CPU 398 select IRQ_CPU
400 select IRQ_CPU_RM7K 399 select IRQ_CPU_RM7K
401 select MIPS_GT64120 400 select PCI_GT64XXX_PCI0
402 select RM7000_CPU_SCACHE 401 select RM7000_CPU_SCACHE
403 select SWAP_IO_SPACE 402 select SWAP_IO_SPACE
404 select SYS_HAS_CPU_RM7000 403 select SYS_HAS_CPU_RM7000
@@ -501,10 +500,8 @@ config DDB5477
501 ether port USB, AC97, PCI, etc. 500 ether port USB, AC97, PCI, etc.
502 501
503config MACH_VR41XX 502config MACH_VR41XX
504 bool "NEC VR41XX-based machines" 503 bool "NEC VR4100 series based machines"
505 select SYS_HAS_CPU_VR41XX 504 select SYS_HAS_CPU_VR41XX
506 select SYS_SUPPORTS_32BIT_KERNEL
507 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
508 select GENERIC_HARDIRQS_NO__DO_IRQ 505 select GENERIC_HARDIRQS_NO__DO_IRQ
509 506
510config PMC_YOSEMITE 507config PMC_YOSEMITE
@@ -779,6 +776,7 @@ config TOSHIBA_JMR3927
779 select SYS_SUPPORTS_LITTLE_ENDIAN 776 select SYS_SUPPORTS_LITTLE_ENDIAN
780 select SYS_SUPPORTS_BIG_ENDIAN 777 select SYS_SUPPORTS_BIG_ENDIAN
781 select TOSHIBA_BOARDS 778 select TOSHIBA_BOARDS
779 select GENERIC_HARDIRQS_NO__DO_IRQ
782 780
783config TOSHIBA_RBTX4927 781config TOSHIBA_RBTX4927
784 bool "Toshiba TBTX49[23]7 board" 782 bool "Toshiba TBTX49[23]7 board"
@@ -922,6 +920,7 @@ config SYS_HAS_EARLY_PRINTK
922 920
923config GENERIC_ISA_DMA 921config GENERIC_ISA_DMA
924 bool 922 bool
923 select ZONE_DMA
925 924
926config I8259 925config I8259
927 bool 926 bool
@@ -945,6 +944,7 @@ config MIPS_DISABLE_OBSOLETE_IDE
945 944
946config GENERIC_ISA_DMA_SUPPORT_BROKEN 945config GENERIC_ISA_DMA_SUPPORT_BROKEN
947 bool 946 bool
947 select ZONE_DMA
948 948
949# 949#
950# Endianess selection. Sufficiently obscure so many users don't know what to 950# Endianess selection. Sufficiently obscure so many users don't know what to
@@ -999,10 +999,7 @@ config DDB5XXX_COMMON
999config MIPS_BOARDS_GEN 999config MIPS_BOARDS_GEN
1000 bool 1000 bool
1001 1001
1002config MIPS_GT64111 1002config PCI_GT64XXX_PCI0
1003 bool
1004
1005config MIPS_GT64120
1006 bool 1003 bool
1007 1004
1008config MIPS_TX3927 1005config MIPS_TX3927
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 92bca6ad6ab1..f2f742df32c7 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -530,25 +530,29 @@ cflags-$(CONFIG_SGI_IP32) += -Iinclude/asm-mips/mach-ip32
530load-$(CONFIG_SGI_IP32) += 0xffffffff80004000 530load-$(CONFIG_SGI_IP32) += 0xffffffff80004000
531 531
532# 532#
533# Sibyte SB1250 SOC 533# Sibyte SB1250/BCM1480 SOC
534# 534#
535# This is a LIB so that it links at the end, and initcalls are later 535# This is a LIB so that it links at the end, and initcalls are later
536# the sequence; but it is built as an object so that modules don't get 536# the sequence; but it is built as an object so that modules don't get
537# removed (as happens, even if they have __initcall/module_init) 537# removed (as happens, even if they have __initcall/module_init)
538# 538#
539core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/sb1250/ 539core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/sb1250/
540core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/common/
540cflags-$(CONFIG_SIBYTE_BCM112X) += -Iinclude/asm-mips/mach-sibyte \ 541cflags-$(CONFIG_SIBYTE_BCM112X) += -Iinclude/asm-mips/mach-sibyte \
541 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL 542 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
542 543
543core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/sb1250/ 544core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/sb1250/
545core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/common/
544cflags-$(CONFIG_SIBYTE_SB1250) += -Iinclude/asm-mips/mach-sibyte \ 546cflags-$(CONFIG_SIBYTE_SB1250) += -Iinclude/asm-mips/mach-sibyte \
545 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL 547 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL
546 548
547core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/bcm1480/ 549core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/bcm1480/
550core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/common/
548cflags-$(CONFIG_SIBYTE_BCM1x55) += -Iinclude/asm-mips/mach-sibyte \ 551cflags-$(CONFIG_SIBYTE_BCM1x55) += -Iinclude/asm-mips/mach-sibyte \
549 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL 552 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
550 553
551core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/bcm1480/ 554core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/bcm1480/
555core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/common/
552cflags-$(CONFIG_SIBYTE_BCM1x80) += -Iinclude/asm-mips/mach-sibyte \ 556cflags-$(CONFIG_SIBYTE_BCM1x80) += -Iinclude/asm-mips/mach-sibyte \
553 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL 557 -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL
554 558
diff --git a/arch/mips/basler/excite/excite_setup.c b/arch/mips/basler/excite/excite_setup.c
index 42f0eda1d51f..2f0e4c08eb04 100644
--- a/arch/mips/basler/excite/excite_setup.c
+++ b/arch/mips/basler/excite/excite_setup.c
@@ -63,7 +63,7 @@ volatile void __iomem * const ocd_base = (void *) (EXCITE_ADDR_OCD);
63volatile void __iomem * const titan_base = (void *) (EXCITE_ADDR_TITAN); 63volatile void __iomem * const titan_base = (void *) (EXCITE_ADDR_TITAN);
64 64
65/* Protect access to shared GPI registers */ 65/* Protect access to shared GPI registers */
66spinlock_t titan_lock = SPIN_LOCK_UNLOCKED; 66DEFINE_SPINLOCK(titan_lock);
67int titan_irqflags; 67int titan_irqflags;
68 68
69 69
diff --git a/arch/mips/cobalt/Makefile b/arch/mips/cobalt/Makefile
index b36dd8f538f9..de017c11f9b7 100644
--- a/arch/mips/cobalt/Makefile
+++ b/arch/mips/cobalt/Makefile
@@ -4,5 +4,6 @@
4 4
5obj-y := irq.o reset.o setup.o 5obj-y := irq.o reset.o setup.o
6 6
7obj-$(CONFIG_PCI) += pci.o
7obj-$(CONFIG_EARLY_PRINTK) += console.o 8obj-$(CONFIG_EARLY_PRINTK) += console.o
8obj-$(CONFIG_MTD_PHYSMAP) += mtd.o 9obj-$(CONFIG_MTD_PHYSMAP) += mtd.o
diff --git a/arch/mips/cobalt/console.c b/arch/mips/cobalt/console.c
index ca56b415b8ac..0485d51f7216 100644
--- a/arch/mips/cobalt/console.c
+++ b/arch/mips/cobalt/console.c
@@ -1,13 +1,11 @@
1/* 1/*
2 * (C) P. Horton 2006 2 * (C) P. Horton 2006
3 */ 3 */
4
5#include <linux/init.h>
6#include <linux/kernel.h>
7#include <linux/console.h>
8#include <linux/serial_reg.h> 4#include <linux/serial_reg.h>
5
9#include <asm/addrspace.h> 6#include <asm/addrspace.h>
10#include <asm/mach-cobalt/cobalt.h> 7
8#include <cobalt.h>
11 9
12void prom_putchar(char c) 10void prom_putchar(char c)
13{ 11{
diff --git a/arch/mips/cobalt/irq.c b/arch/mips/cobalt/irq.c
index fe93b846923b..950ad1e8be44 100644
--- a/arch/mips/cobalt/irq.c
+++ b/arch/mips/cobalt/irq.c
@@ -17,7 +17,7 @@
17#include <asm/irq_cpu.h> 17#include <asm/irq_cpu.h>
18#include <asm/gt64120.h> 18#include <asm/gt64120.h>
19 19
20#include <asm/mach-cobalt/cobalt.h> 20#include <cobalt.h>
21 21
22/* 22/*
23 * We have two types of interrupts that we handle, ones that come in through 23 * We have two types of interrupts that we handle, ones that come in through
diff --git a/arch/mips/cobalt/pci.c b/arch/mips/cobalt/pci.c
new file mode 100644
index 000000000000..d91027f43de6
--- /dev/null
+++ b/arch/mips/cobalt/pci.c
@@ -0,0 +1,47 @@
1/*
2 * Register PCI controller.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 1996, 1997, 2004, 05 by Ralf Baechle (ralf@linux-mips.org)
9 * Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
10 *
11 */
12#include <linux/init.h>
13#include <linux/pci.h>
14
15#include <asm/gt64120.h>
16
17extern struct pci_ops gt64xxx_pci0_ops;
18
19static struct resource cobalt_mem_resource = {
20 .start = GT_DEF_PCI0_MEM0_BASE,
21 .end = GT_DEF_PCI0_MEM0_BASE + GT_DEF_PCI0_MEM0_SIZE - 1,
22 .name = "PCI memory",
23 .flags = IORESOURCE_MEM,
24};
25
26static struct resource cobalt_io_resource = {
27 .start = 0x1000,
28 .end = GT_DEF_PCI0_IO_SIZE - 1,
29 .name = "PCI I/O",
30 .flags = IORESOURCE_IO,
31};
32
33static struct pci_controller cobalt_pci_controller = {
34 .pci_ops = &gt64xxx_pci0_ops,
35 .mem_resource = &cobalt_mem_resource,
36 .io_resource = &cobalt_io_resource,
37 .io_offset = 0 - GT_DEF_PCI0_IO_BASE,
38};
39
40static int __init cobalt_pci_init(void)
41{
42 register_pci_controller(&cobalt_pci_controller);
43
44 return 0;
45}
46
47arch_initcall(cobalt_pci_init);
diff --git a/arch/mips/cobalt/reset.c b/arch/mips/cobalt/reset.c
index 753dfccae6fa..43cca21fdbc0 100644
--- a/arch/mips/cobalt/reset.c
+++ b/arch/mips/cobalt/reset.c
@@ -8,15 +8,12 @@
8 * Copyright (C) 1995, 1996, 1997 by Ralf Baechle 8 * Copyright (C) 1995, 1996, 1997 by Ralf Baechle
9 * Copyright (C) 2001 by Liam Davies (ldavies@agile.tv) 9 * Copyright (C) 2001 by Liam Davies (ldavies@agile.tv)
10 */ 10 */
11#include <linux/sched.h> 11#include <linux/jiffies.h>
12#include <linux/mm.h> 12
13#include <asm/cacheflush.h>
14#include <asm/io.h> 13#include <asm/io.h>
15#include <asm/processor.h>
16#include <asm/reboot.h> 14#include <asm/reboot.h>
17#include <asm/system.h> 15
18#include <asm/mipsregs.h> 16#include <cobalt.h>
19#include <asm/mach-cobalt/cobalt.h>
20 17
21void cobalt_machine_halt(void) 18void cobalt_machine_halt(void)
22{ 19{
diff --git a/arch/mips/cobalt/setup.c b/arch/mips/cobalt/setup.c
index 88d34f11385a..d0dd81790f74 100644
--- a/arch/mips/cobalt/setup.c
+++ b/arch/mips/cobalt/setup.c
@@ -19,12 +19,10 @@
19#include <asm/bootinfo.h> 19#include <asm/bootinfo.h>
20#include <asm/time.h> 20#include <asm/time.h>
21#include <asm/io.h> 21#include <asm/io.h>
22#include <asm/irq.h>
23#include <asm/processor.h>
24#include <asm/reboot.h> 22#include <asm/reboot.h>
25#include <asm/gt64120.h> 23#include <asm/gt64120.h>
26 24
27#include <asm/mach-cobalt/cobalt.h> 25#include <cobalt.h>
28 26
29extern void cobalt_machine_restart(char *command); 27extern void cobalt_machine_restart(char *command);
30extern void cobalt_machine_halt(void); 28extern void cobalt_machine_halt(void);
@@ -63,22 +61,6 @@ void __init plat_timer_setup(struct irqaction *irq)
63 GT_WRITE(GT_INTRMASK_OFS, GT_INTR_T0EXP_MSK | GT_READ(GT_INTRMASK_OFS)); 61 GT_WRITE(GT_INTRMASK_OFS, GT_INTR_T0EXP_MSK | GT_READ(GT_INTRMASK_OFS));
64} 62}
65 63
66extern struct pci_ops gt64111_pci_ops;
67
68static struct resource cobalt_mem_resource = {
69 .start = GT_DEF_PCI0_MEM0_BASE,
70 .end = GT_DEF_PCI0_MEM0_BASE + GT_DEF_PCI0_MEM0_SIZE - 1,
71 .name = "PCI memory",
72 .flags = IORESOURCE_MEM
73};
74
75static struct resource cobalt_io_resource = {
76 .start = 0x1000,
77 .end = 0xffff,
78 .name = "PCI I/O",
79 .flags = IORESOURCE_IO
80};
81
82/* 64/*
83 * Cobalt doesn't have PS/2 keyboard/mouse interfaces, 65 * Cobalt doesn't have PS/2 keyboard/mouse interfaces,
84 * keyboard conntroller is never used. 66 * keyboard conntroller is never used.
@@ -111,14 +93,6 @@ static struct resource cobalt_reserved_resources[] = {
111 }, 93 },
112}; 94};
113 95
114static struct pci_controller cobalt_pci_controller = {
115 .pci_ops = &gt64111_pci_ops,
116 .mem_resource = &cobalt_mem_resource,
117 .mem_offset = 0,
118 .io_resource = &cobalt_io_resource,
119 .io_offset = 0 - GT_DEF_PCI0_IO_BASE,
120};
121
122void __init plat_mem_setup(void) 96void __init plat_mem_setup(void)
123{ 97{
124 static struct uart_port uart; 98 static struct uart_port uart;
@@ -146,10 +120,6 @@ void __init plat_mem_setup(void)
146 120
147 printk("Cobalt board ID: %d\n", cobalt_board_id); 121 printk("Cobalt board ID: %d\n", cobalt_board_id);
148 122
149#ifdef CONFIG_PCI
150 register_pci_controller(&cobalt_pci_controller);
151#endif
152
153 if (cobalt_board_id > COBALT_BRD_ID_RAQ1) { 123 if (cobalt_board_id > COBALT_BRD_ID_RAQ1) {
154#ifdef CONFIG_SERIAL_8250 124#ifdef CONFIG_SERIAL_8250
155 uart.line = 0; 125 uart.line = 0;
diff --git a/arch/mips/configs/jmr3927_defconfig b/arch/mips/configs/jmr3927_defconfig
index 21a094752dab..068e48ec7093 100644
--- a/arch/mips/configs/jmr3927_defconfig
+++ b/arch/mips/configs/jmr3927_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.20 3# Linux kernel version: 2.6.21-rc3
4# Tue Feb 20 21:47:34 2007 4# Thu Mar 15 00:40:40 2007
5# 5#
6CONFIG_MIPS=y 6CONFIG_MIPS=y
7 7
@@ -70,7 +70,7 @@ CONFIG_GENERIC_HWEIGHT=y
70CONFIG_GENERIC_CALIBRATE_DELAY=y 70CONFIG_GENERIC_CALIBRATE_DELAY=y
71CONFIG_GENERIC_TIME=y 71CONFIG_GENERIC_TIME=y
72CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y 72CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
73# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set 73CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
74CONFIG_DMA_NONCOHERENT=y 74CONFIG_DMA_NONCOHERENT=y
75CONFIG_DMA_NEED_PCI_MAP_STATE=y 75CONFIG_DMA_NEED_PCI_MAP_STATE=y
76CONFIG_CPU_BIG_ENDIAN=y 76CONFIG_CPU_BIG_ENDIAN=y
@@ -138,12 +138,12 @@ CONFIG_ZONE_DMA_FLAG=1
138# CONFIG_HZ_48 is not set 138# CONFIG_HZ_48 is not set
139# CONFIG_HZ_100 is not set 139# CONFIG_HZ_100 is not set
140# CONFIG_HZ_128 is not set 140# CONFIG_HZ_128 is not set
141# CONFIG_HZ_250 is not set 141CONFIG_HZ_250=y
142# CONFIG_HZ_256 is not set 142# CONFIG_HZ_256 is not set
143CONFIG_HZ_1000=y 143# CONFIG_HZ_1000 is not set
144# CONFIG_HZ_1024 is not set 144# CONFIG_HZ_1024 is not set
145CONFIG_SYS_SUPPORTS_ARBIT_HZ=y 145CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
146CONFIG_HZ=1000 146CONFIG_HZ=250
147CONFIG_PREEMPT_NONE=y 147CONFIG_PREEMPT_NONE=y
148# CONFIG_PREEMPT_VOLUNTARY is not set 148# CONFIG_PREEMPT_VOLUNTARY is not set
149# CONFIG_PREEMPT is not set 149# CONFIG_PREEMPT is not set
@@ -175,14 +175,15 @@ CONFIG_SYSVIPC_SYSCTL=y
175# CONFIG_AUDIT is not set 175# CONFIG_AUDIT is not set
176# CONFIG_IKCONFIG is not set 176# CONFIG_IKCONFIG is not set
177CONFIG_SYSFS_DEPRECATED=y 177CONFIG_SYSFS_DEPRECATED=y
178CONFIG_RELAY=y 178# CONFIG_RELAY is not set
179# CONFIG_BLK_DEV_INITRD is not set
179# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 180# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
180CONFIG_SYSCTL=y 181CONFIG_SYSCTL=y
181CONFIG_EMBEDDED=y 182CONFIG_EMBEDDED=y
182CONFIG_SYSCTL_SYSCALL=y 183CONFIG_SYSCTL_SYSCALL=y
183CONFIG_KALLSYMS=y 184CONFIG_KALLSYMS=y
184# CONFIG_KALLSYMS_EXTRA_PASS is not set 185# CONFIG_KALLSYMS_EXTRA_PASS is not set
185CONFIG_HOTPLUG=y 186# CONFIG_HOTPLUG is not set
186CONFIG_PRINTK=y 187CONFIG_PRINTK=y
187CONFIG_BUG=y 188CONFIG_BUG=y
188CONFIG_ELF_CORE=y 189CONFIG_ELF_CORE=y
@@ -217,11 +218,11 @@ CONFIG_IOSCHED_NOOP=y
217CONFIG_IOSCHED_AS=y 218CONFIG_IOSCHED_AS=y
218CONFIG_IOSCHED_DEADLINE=y 219CONFIG_IOSCHED_DEADLINE=y
219CONFIG_IOSCHED_CFQ=y 220CONFIG_IOSCHED_CFQ=y
220CONFIG_DEFAULT_AS=y 221# CONFIG_DEFAULT_AS is not set
221# CONFIG_DEFAULT_DEADLINE is not set 222# CONFIG_DEFAULT_DEADLINE is not set
222# CONFIG_DEFAULT_CFQ is not set 223CONFIG_DEFAULT_CFQ=y
223# CONFIG_DEFAULT_NOOP is not set 224# CONFIG_DEFAULT_NOOP is not set
224CONFIG_DEFAULT_IOSCHED="anticipatory" 225CONFIG_DEFAULT_IOSCHED="cfq"
225 226
226# 227#
227# Bus options (PCI, PCMCIA, EISA, ISA, TC) 228# Bus options (PCI, PCMCIA, EISA, ISA, TC)
@@ -233,12 +234,10 @@ CONFIG_MMU=y
233# 234#
234# PCCARD (PCMCIA/CardBus) support 235# PCCARD (PCMCIA/CardBus) support
235# 236#
236# CONFIG_PCCARD is not set
237 237
238# 238#
239# PCI Hotplug Support 239# PCI Hotplug Support
240# 240#
241# CONFIG_HOTPLUG_PCI is not set
242 241
243# 242#
244# Executable file formats 243# Executable file formats
@@ -250,10 +249,7 @@ CONFIG_TRAD_SIGNALS=y
250# 249#
251# Power management options 250# Power management options
252# 251#
253CONFIG_PM=y 252# CONFIG_PM is not set
254# CONFIG_PM_LEGACY is not set
255# CONFIG_PM_DEBUG is not set
256# CONFIG_PM_SYSFS_DEPRECATED is not set
257 253
258# 254#
259# Networking 255# Networking
@@ -267,12 +263,7 @@ CONFIG_NET=y
267CONFIG_PACKET=y 263CONFIG_PACKET=y
268# CONFIG_PACKET_MMAP is not set 264# CONFIG_PACKET_MMAP is not set
269CONFIG_UNIX=y 265CONFIG_UNIX=y
270CONFIG_XFRM=y 266# CONFIG_NET_KEY is not set
271CONFIG_XFRM_USER=y
272# CONFIG_XFRM_SUB_POLICY is not set
273CONFIG_XFRM_MIGRATE=y
274CONFIG_NET_KEY=y
275CONFIG_NET_KEY_MIGRATE=y
276CONFIG_INET=y 267CONFIG_INET=y
277# CONFIG_IP_MULTICAST is not set 268# CONFIG_IP_MULTICAST is not set
278# CONFIG_IP_ADVANCED_ROUTER is not set 269# CONFIG_IP_ADVANCED_ROUTER is not set
@@ -290,19 +281,18 @@ CONFIG_IP_PNP_BOOTP=y
290# CONFIG_INET_IPCOMP is not set 281# CONFIG_INET_IPCOMP is not set
291# CONFIG_INET_XFRM_TUNNEL is not set 282# CONFIG_INET_XFRM_TUNNEL is not set
292# CONFIG_INET_TUNNEL is not set 283# CONFIG_INET_TUNNEL is not set
293CONFIG_INET_XFRM_MODE_TRANSPORT=y 284# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
294CONFIG_INET_XFRM_MODE_TUNNEL=y 285# CONFIG_INET_XFRM_MODE_TUNNEL is not set
295CONFIG_INET_XFRM_MODE_BEET=y 286# CONFIG_INET_XFRM_MODE_BEET is not set
296CONFIG_INET_DIAG=y 287# CONFIG_INET_DIAG is not set
297CONFIG_INET_TCP_DIAG=y
298# CONFIG_TCP_CONG_ADVANCED is not set 288# CONFIG_TCP_CONG_ADVANCED is not set
299CONFIG_TCP_CONG_CUBIC=y 289CONFIG_TCP_CONG_CUBIC=y
300CONFIG_DEFAULT_TCP_CONG="cubic" 290CONFIG_DEFAULT_TCP_CONG="cubic"
301CONFIG_TCP_MD5SIG=y 291# CONFIG_TCP_MD5SIG is not set
302# CONFIG_IPV6 is not set 292# CONFIG_IPV6 is not set
303# CONFIG_INET6_XFRM_TUNNEL is not set 293# CONFIG_INET6_XFRM_TUNNEL is not set
304# CONFIG_INET6_TUNNEL is not set 294# CONFIG_INET6_TUNNEL is not set
305CONFIG_NETWORK_SECMARK=y 295# CONFIG_NETWORK_SECMARK is not set
306# CONFIG_NETFILTER is not set 296# CONFIG_NETFILTER is not set
307 297
308# 298#
@@ -343,13 +333,7 @@ CONFIG_NETWORK_SECMARK=y
343# CONFIG_HAMRADIO is not set 333# CONFIG_HAMRADIO is not set
344# CONFIG_IRDA is not set 334# CONFIG_IRDA is not set
345# CONFIG_BT is not set 335# CONFIG_BT is not set
346CONFIG_IEEE80211=y 336# CONFIG_IEEE80211 is not set
347# CONFIG_IEEE80211_DEBUG is not set
348CONFIG_IEEE80211_CRYPT_WEP=y
349CONFIG_IEEE80211_CRYPT_CCMP=y
350CONFIG_IEEE80211_SOFTMAC=y
351# CONFIG_IEEE80211_SOFTMAC_DEBUG is not set
352CONFIG_WIRELESS_EXT=y
353 337
354# 338#
355# Device Drivers 339# Device Drivers
@@ -360,14 +344,12 @@ CONFIG_WIRELESS_EXT=y
360# 344#
361CONFIG_STANDALONE=y 345CONFIG_STANDALONE=y
362CONFIG_PREVENT_FIRMWARE_BUILD=y 346CONFIG_PREVENT_FIRMWARE_BUILD=y
363CONFIG_FW_LOADER=y
364# CONFIG_SYS_HYPERVISOR is not set 347# CONFIG_SYS_HYPERVISOR is not set
365 348
366# 349#
367# Connector - unified userspace <-> kernelspace linker 350# Connector - unified userspace <-> kernelspace linker
368# 351#
369CONFIG_CONNECTOR=y 352# CONFIG_CONNECTOR is not set
370CONFIG_PROC_EVENTS=y
371 353
372# 354#
373# Memory Technology Devices (MTD) 355# Memory Technology Devices (MTD)
@@ -396,16 +378,13 @@ CONFIG_PROC_EVENTS=y
396# CONFIG_BLK_DEV_NBD is not set 378# CONFIG_BLK_DEV_NBD is not set
397# CONFIG_BLK_DEV_SX8 is not set 379# CONFIG_BLK_DEV_SX8 is not set
398# CONFIG_BLK_DEV_RAM is not set 380# CONFIG_BLK_DEV_RAM is not set
399# CONFIG_BLK_DEV_INITRD is not set 381# CONFIG_CDROM_PKTCDVD is not set
400CONFIG_CDROM_PKTCDVD=y 382# CONFIG_ATA_OVER_ETH is not set
401CONFIG_CDROM_PKTCDVD_BUFFERS=8
402# CONFIG_CDROM_PKTCDVD_WCACHE is not set
403CONFIG_ATA_OVER_ETH=y
404 383
405# 384#
406# Misc devices 385# Misc devices
407# 386#
408CONFIG_SGI_IOC4=y 387# CONFIG_SGI_IOC4 is not set
409# CONFIG_TIFM_CORE is not set 388# CONFIG_TIFM_CORE is not set
410 389
411# 390#
@@ -416,7 +395,7 @@ CONFIG_SGI_IOC4=y
416# 395#
417# SCSI device support 396# SCSI device support
418# 397#
419CONFIG_RAID_ATTRS=y 398# CONFIG_RAID_ATTRS is not set
420# CONFIG_SCSI is not set 399# CONFIG_SCSI is not set
421# CONFIG_SCSI_NETLINK is not set 400# CONFIG_SCSI_NETLINK is not set
422 401
@@ -462,26 +441,13 @@ CONFIG_NETDEVICES=y
462# 441#
463# PHY device support 442# PHY device support
464# 443#
465CONFIG_PHYLIB=y 444# CONFIG_PHYLIB is not set
466
467#
468# MII PHY device drivers
469#
470CONFIG_MARVELL_PHY=y
471CONFIG_DAVICOM_PHY=y
472CONFIG_QSEMI_PHY=y
473CONFIG_LXT_PHY=y
474CONFIG_CICADA_PHY=y
475CONFIG_VITESSE_PHY=y
476CONFIG_SMSC_PHY=y
477# CONFIG_BROADCOM_PHY is not set
478# CONFIG_FIXED_PHY is not set
479 445
480# 446#
481# Ethernet (10 or 100Mbit) 447# Ethernet (10 or 100Mbit)
482# 448#
483CONFIG_NET_ETHERNET=y 449CONFIG_NET_ETHERNET=y
484# CONFIG_MII is not set 450CONFIG_MII=y
485# CONFIG_HAPPYMEAL is not set 451# CONFIG_HAPPYMEAL is not set
486# CONFIG_SUNGEM is not set 452# CONFIG_SUNGEM is not set
487# CONFIG_CASSINI is not set 453# CONFIG_CASSINI is not set
@@ -493,7 +459,27 @@ CONFIG_NET_ETHERNET=y
493# 459#
494# CONFIG_NET_TULIP is not set 460# CONFIG_NET_TULIP is not set
495# CONFIG_HP100 is not set 461# CONFIG_HP100 is not set
496# CONFIG_NET_PCI is not set 462CONFIG_NET_PCI=y
463# CONFIG_PCNET32 is not set
464# CONFIG_AMD8111_ETH is not set
465# CONFIG_ADAPTEC_STARFIRE is not set
466# CONFIG_B44 is not set
467# CONFIG_FORCEDETH is not set
468CONFIG_TC35815=y
469# CONFIG_DGRS is not set
470# CONFIG_EEPRO100 is not set
471# CONFIG_E100 is not set
472# CONFIG_FEALNX is not set
473# CONFIG_NATSEMI is not set
474# CONFIG_NE2K_PCI is not set
475# CONFIG_8139CP is not set
476# CONFIG_8139TOO is not set
477# CONFIG_SIS900 is not set
478# CONFIG_EPIC100 is not set
479# CONFIG_SUNDANCE is not set
480# CONFIG_TLAN is not set
481# CONFIG_VIA_RHINE is not set
482# CONFIG_SC92031 is not set
497 483
498# 484#
499# Ethernet (1000 Mbit) 485# Ethernet (1000 Mbit)
@@ -509,20 +495,21 @@ CONFIG_NET_ETHERNET=y
509# CONFIG_SKGE is not set 495# CONFIG_SKGE is not set
510# CONFIG_SKY2 is not set 496# CONFIG_SKY2 is not set
511# CONFIG_SK98LIN is not set 497# CONFIG_SK98LIN is not set
498# CONFIG_VIA_VELOCITY is not set
512# CONFIG_TIGON3 is not set 499# CONFIG_TIGON3 is not set
513# CONFIG_BNX2 is not set 500# CONFIG_BNX2 is not set
514CONFIG_QLA3XXX=y 501# CONFIG_QLA3XXX is not set
515# CONFIG_ATL1 is not set 502# CONFIG_ATL1 is not set
516 503
517# 504#
518# Ethernet (10000 Mbit) 505# Ethernet (10000 Mbit)
519# 506#
520# CONFIG_CHELSIO_T1 is not set 507# CONFIG_CHELSIO_T1 is not set
521CONFIG_CHELSIO_T3=y 508# CONFIG_CHELSIO_T3 is not set
522# CONFIG_IXGB is not set 509# CONFIG_IXGB is not set
523# CONFIG_S2IO is not set 510# CONFIG_S2IO is not set
524# CONFIG_MYRI10GE is not set 511# CONFIG_MYRI10GE is not set
525CONFIG_NETXEN_NIC=y 512# CONFIG_NETXEN_NIC is not set
526 513
527# 514#
528# Token Ring devices 515# Token Ring devices
@@ -566,10 +553,7 @@ CONFIG_INPUT=y
566# 553#
567# Userland interfaces 554# Userland interfaces
568# 555#
569CONFIG_INPUT_MOUSEDEV=y 556# CONFIG_INPUT_MOUSEDEV is not set
570CONFIG_INPUT_MOUSEDEV_PSAUX=y
571CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
572CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
573# CONFIG_INPUT_JOYDEV is not set 557# CONFIG_INPUT_JOYDEV is not set
574# CONFIG_INPUT_TSDEV is not set 558# CONFIG_INPUT_TSDEV is not set
575# CONFIG_INPUT_EVDEV is not set 559# CONFIG_INPUT_EVDEV is not set
@@ -587,21 +571,13 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
587# 571#
588# Hardware I/O ports 572# Hardware I/O ports
589# 573#
590CONFIG_SERIO=y 574# CONFIG_SERIO is not set
591# CONFIG_SERIO_I8042 is not set
592CONFIG_SERIO_SERPORT=y
593# CONFIG_SERIO_PCIPS2 is not set
594# CONFIG_SERIO_LIBPS2 is not set
595CONFIG_SERIO_RAW=y
596# CONFIG_GAMEPORT is not set 575# CONFIG_GAMEPORT is not set
597 576
598# 577#
599# Character devices 578# Character devices
600# 579#
601CONFIG_VT=y 580# CONFIG_VT is not set
602CONFIG_VT_CONSOLE=y
603CONFIG_HW_CONSOLE=y
604CONFIG_VT_HW_CONSOLE_BINDING=y
605CONFIG_SERIAL_NONSTANDARD=y 581CONFIG_SERIAL_NONSTANDARD=y
606# CONFIG_COMPUTONE is not set 582# CONFIG_COMPUTONE is not set
607# CONFIG_ROCKETPORT is not set 583# CONFIG_ROCKETPORT is not set
@@ -609,7 +585,7 @@ CONFIG_SERIAL_NONSTANDARD=y
609# CONFIG_DIGIEPCA is not set 585# CONFIG_DIGIEPCA is not set
610# CONFIG_MOXA_INTELLIO is not set 586# CONFIG_MOXA_INTELLIO is not set
611# CONFIG_MOXA_SMARTIO is not set 587# CONFIG_MOXA_SMARTIO is not set
612CONFIG_MOXA_SMARTIO_NEW=y 588# CONFIG_MOXA_SMARTIO_NEW is not set
613# CONFIG_ISI is not set 589# CONFIG_ISI is not set
614# CONFIG_SYNCLINKMP is not set 590# CONFIG_SYNCLINKMP is not set
615# CONFIG_SYNCLINK_GT is not set 591# CONFIG_SYNCLINK_GT is not set
@@ -629,11 +605,12 @@ CONFIG_MOXA_SMARTIO_NEW=y
629# Non-8250 serial port support 605# Non-8250 serial port support
630# 606#
631CONFIG_SERIAL_CORE=y 607CONFIG_SERIAL_CORE=y
608CONFIG_SERIAL_CORE_CONSOLE=y
632CONFIG_SERIAL_TXX9=y 609CONFIG_SERIAL_TXX9=y
633CONFIG_HAS_TXX9_SERIAL=y 610CONFIG_HAS_TXX9_SERIAL=y
634CONFIG_SERIAL_TXX9_NR_UARTS=6 611CONFIG_SERIAL_TXX9_NR_UARTS=6
635# CONFIG_SERIAL_TXX9_CONSOLE is not set 612CONFIG_SERIAL_TXX9_CONSOLE=y
636# CONFIG_SERIAL_TXX9_STDSERIAL is not set 613CONFIG_SERIAL_TXX9_STDSERIAL=y
637# CONFIG_SERIAL_JSM is not set 614# CONFIG_SERIAL_JSM is not set
638# CONFIG_UNIX98_PTYS is not set 615# CONFIG_UNIX98_PTYS is not set
639CONFIG_LEGACY_PTYS=y 616CONFIG_LEGACY_PTYS=y
@@ -685,6 +662,11 @@ CONFIG_LEGACY_PTY_COUNT=256
685# CONFIG_HWMON_VID is not set 662# CONFIG_HWMON_VID is not set
686 663
687# 664#
665# Multifunction device drivers
666#
667# CONFIG_MFD_SM501 is not set
668
669#
688# Multimedia devices 670# Multimedia devices
689# 671#
690# CONFIG_VIDEO_DEV is not set 672# CONFIG_VIDEO_DEV is not set
@@ -697,51 +679,8 @@ CONFIG_LEGACY_PTY_COUNT=256
697# 679#
698# Graphics support 680# Graphics support
699# 681#
700# CONFIG_FIRMWARE_EDID is not set
701CONFIG_FB=y
702# CONFIG_FB_CFB_FILLRECT is not set
703# CONFIG_FB_CFB_COPYAREA is not set
704# CONFIG_FB_CFB_IMAGEBLIT is not set
705# CONFIG_FB_SVGALIB is not set
706# CONFIG_FB_MACMODES is not set
707# CONFIG_FB_BACKLIGHT is not set
708# CONFIG_FB_MODE_HELPERS is not set
709# CONFIG_FB_TILEBLITTING is not set
710# CONFIG_FB_CIRRUS is not set
711# CONFIG_FB_PM2 is not set
712# CONFIG_FB_CYBER2000 is not set
713# CONFIG_FB_ASILIANT is not set
714# CONFIG_FB_IMSTT is not set
715# CONFIG_FB_S1D13XXX is not set
716# CONFIG_FB_NVIDIA is not set
717# CONFIG_FB_RIVA is not set
718# CONFIG_FB_MATROX is not set
719# CONFIG_FB_RADEON is not set
720# CONFIG_FB_ATY128 is not set
721# CONFIG_FB_ATY is not set
722# CONFIG_FB_S3 is not set
723# CONFIG_FB_SAVAGE is not set
724# CONFIG_FB_SIS is not set
725# CONFIG_FB_NEOMAGIC is not set
726# CONFIG_FB_KYRO is not set
727# CONFIG_FB_3DFX is not set
728# CONFIG_FB_VOODOO1 is not set
729# CONFIG_FB_SMIVGX is not set
730# CONFIG_FB_TRIDENT is not set
731# CONFIG_FB_VIRTUAL is not set
732
733#
734# Console display driver support
735#
736# CONFIG_VGA_CONSOLE is not set
737CONFIG_DUMMY_CONSOLE=y
738# CONFIG_FRAMEBUFFER_CONSOLE is not set
739
740#
741# Logo configuration
742#
743# CONFIG_LOGO is not set
744# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 682# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
683# CONFIG_FB is not set
745 684
746# 685#
747# Sound 686# Sound
@@ -864,7 +803,7 @@ CONFIG_INOTIFY_USER=y
864CONFIG_DNOTIFY=y 803CONFIG_DNOTIFY=y
865# CONFIG_AUTOFS_FS is not set 804# CONFIG_AUTOFS_FS is not set
866# CONFIG_AUTOFS4_FS is not set 805# CONFIG_AUTOFS4_FS is not set
867CONFIG_FUSE_FS=y 806# CONFIG_FUSE_FS is not set
868 807
869# 808#
870# CD-ROM/DVD Filesystems 809# CD-ROM/DVD Filesystems
@@ -889,14 +828,13 @@ CONFIG_SYSFS=y
889# CONFIG_TMPFS is not set 828# CONFIG_TMPFS is not set
890# CONFIG_HUGETLB_PAGE is not set 829# CONFIG_HUGETLB_PAGE is not set
891CONFIG_RAMFS=y 830CONFIG_RAMFS=y
892CONFIG_CONFIGFS_FS=y 831# CONFIG_CONFIGFS_FS is not set
893 832
894# 833#
895# Miscellaneous filesystems 834# Miscellaneous filesystems
896# 835#
897# CONFIG_ADFS_FS is not set 836# CONFIG_ADFS_FS is not set
898# CONFIG_AFFS_FS is not set 837# CONFIG_AFFS_FS is not set
899# CONFIG_ECRYPT_FS is not set
900# CONFIG_HFS_FS is not set 838# CONFIG_HFS_FS is not set
901# CONFIG_HFSPLUS_FS is not set 839# CONFIG_HFSPLUS_FS is not set
902# CONFIG_BEFS_FS is not set 840# CONFIG_BEFS_FS is not set
@@ -944,10 +882,7 @@ CONFIG_MSDOS_PARTITION=y
944# 882#
945# Distributed Lock Manager 883# Distributed Lock Manager
946# 884#
947CONFIG_DLM=y 885# CONFIG_DLM is not set
948CONFIG_DLM_TCP=y
949# CONFIG_DLM_SCTP is not set
950# CONFIG_DLM_DEBUG is not set
951 886
952# 887#
953# Profiling support 888# Profiling support
@@ -972,65 +907,22 @@ CONFIG_CMDLINE=""
972# 907#
973# Security options 908# Security options
974# 909#
975CONFIG_KEYS=y 910# CONFIG_KEYS is not set
976CONFIG_KEYS_DEBUG_PROC_KEYS=y
977# CONFIG_SECURITY is not set 911# CONFIG_SECURITY is not set
978 912
979# 913#
980# Cryptographic options 914# Cryptographic options
981# 915#
982CONFIG_CRYPTO=y 916# CONFIG_CRYPTO is not set
983CONFIG_CRYPTO_ALGAPI=y
984CONFIG_CRYPTO_BLKCIPHER=y
985CONFIG_CRYPTO_HASH=y
986CONFIG_CRYPTO_MANAGER=y
987CONFIG_CRYPTO_HMAC=y
988CONFIG_CRYPTO_XCBC=y
989CONFIG_CRYPTO_NULL=y
990CONFIG_CRYPTO_MD4=y
991CONFIG_CRYPTO_MD5=y
992CONFIG_CRYPTO_SHA1=y
993CONFIG_CRYPTO_SHA256=y
994CONFIG_CRYPTO_SHA512=y
995CONFIG_CRYPTO_WP512=y
996CONFIG_CRYPTO_TGR192=y
997CONFIG_CRYPTO_GF128MUL=y
998CONFIG_CRYPTO_ECB=y
999CONFIG_CRYPTO_CBC=y
1000CONFIG_CRYPTO_PCBC=y
1001CONFIG_CRYPTO_LRW=y
1002CONFIG_CRYPTO_DES=y
1003CONFIG_CRYPTO_FCRYPT=y
1004CONFIG_CRYPTO_BLOWFISH=y
1005CONFIG_CRYPTO_TWOFISH=y
1006CONFIG_CRYPTO_TWOFISH_COMMON=y
1007CONFIG_CRYPTO_SERPENT=y
1008CONFIG_CRYPTO_AES=y
1009CONFIG_CRYPTO_CAST5=y
1010CONFIG_CRYPTO_CAST6=y
1011CONFIG_CRYPTO_TEA=y
1012CONFIG_CRYPTO_ARC4=y
1013CONFIG_CRYPTO_KHAZAD=y
1014CONFIG_CRYPTO_ANUBIS=y
1015CONFIG_CRYPTO_DEFLATE=y
1016CONFIG_CRYPTO_MICHAEL_MIC=y
1017CONFIG_CRYPTO_CRC32C=y
1018CONFIG_CRYPTO_CAMELLIA=y
1019
1020#
1021# Hardware crypto devices
1022#
1023 917
1024# 918#
1025# Library routines 919# Library routines
1026# 920#
1027CONFIG_BITREVERSE=y 921CONFIG_BITREVERSE=y
1028# CONFIG_CRC_CCITT is not set 922# CONFIG_CRC_CCITT is not set
1029CONFIG_CRC16=y 923# CONFIG_CRC16 is not set
1030CONFIG_CRC32=y 924CONFIG_CRC32=y
1031CONFIG_LIBCRC32C=y 925# CONFIG_LIBCRC32C is not set
1032CONFIG_ZLIB_INFLATE=y
1033CONFIG_ZLIB_DEFLATE=y
1034CONFIG_PLIST=y 926CONFIG_PLIST=y
1035CONFIG_HAS_IOMEM=y 927CONFIG_HAS_IOMEM=y
1036CONFIG_HAS_IOPORT=y 928CONFIG_HAS_IOPORT=y
diff --git a/arch/mips/configs/pnx8550-v2pci_defconfig b/arch/mips/configs/pnx8550-v2pci_defconfig
deleted file mode 100644
index 3d6c2d743502..000000000000
--- a/arch/mips/configs/pnx8550-v2pci_defconfig
+++ /dev/null
@@ -1,1540 +0,0 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.20
4# Tue Feb 20 21:47:39 2007
5#
6CONFIG_MIPS=y
7
8#
9# Machine selection
10#
11CONFIG_ZONE_DMA=y
12# CONFIG_MIPS_MTX1 is not set
13# CONFIG_MIPS_BOSPORUS is not set
14# CONFIG_MIPS_PB1000 is not set
15# CONFIG_MIPS_PB1100 is not set
16# CONFIG_MIPS_PB1500 is not set
17# CONFIG_MIPS_PB1550 is not set
18# CONFIG_MIPS_PB1200 is not set
19# CONFIG_MIPS_DB1000 is not set
20# CONFIG_MIPS_DB1100 is not set
21# CONFIG_MIPS_DB1500 is not set
22# CONFIG_MIPS_DB1550 is not set
23# CONFIG_MIPS_DB1200 is not set
24# CONFIG_MIPS_MIRAGE is not set
25# CONFIG_BASLER_EXCITE is not set
26# CONFIG_MIPS_COBALT is not set
27# CONFIG_MACH_DECSTATION is not set
28# CONFIG_MIPS_EV64120 is not set
29# CONFIG_MACH_JAZZ is not set
30# CONFIG_LASAT is not set
31# CONFIG_MIPS_ATLAS is not set
32# CONFIG_MIPS_MALTA is not set
33# CONFIG_MIPS_SEAD is not set
34# CONFIG_WR_PPMC is not set
35# CONFIG_MIPS_SIM is not set
36# CONFIG_MOMENCO_JAGUAR_ATX is not set
37# CONFIG_MOMENCO_OCELOT is not set
38# CONFIG_MOMENCO_OCELOT_3 is not set
39# CONFIG_MOMENCO_OCELOT_C is not set
40# CONFIG_MOMENCO_OCELOT_G is not set
41# CONFIG_MIPS_XXS1500 is not set
42# CONFIG_PNX8550_JBS is not set
43# CONFIG_PNX8550_STB810 is not set
44# CONFIG_DDB5477 is not set
45# CONFIG_MACH_VR41XX is not set
46# CONFIG_PMC_YOSEMITE is not set
47# CONFIG_QEMU is not set
48# CONFIG_MARKEINS is not set
49# CONFIG_SGI_IP22 is not set
50# CONFIG_SGI_IP27 is not set
51# CONFIG_SGI_IP32 is not set
52# CONFIG_SIBYTE_BIGSUR is not set
53# CONFIG_SIBYTE_SWARM is not set
54# CONFIG_SIBYTE_SENTOSA is not set
55# CONFIG_SIBYTE_RHONE is not set
56# CONFIG_SIBYTE_CARMEL is not set
57# CONFIG_SIBYTE_PTSWARM is not set
58# CONFIG_SIBYTE_LITTLESUR is not set
59# CONFIG_SIBYTE_CRHINE is not set
60# CONFIG_SIBYTE_CRHONE is not set
61# CONFIG_SNI_RM is not set
62# CONFIG_TOSHIBA_JMR3927 is not set
63# CONFIG_TOSHIBA_RBTX4927 is not set
64# CONFIG_TOSHIBA_RBTX4938 is not set
65CONFIG_RWSEM_GENERIC_SPINLOCK=y
66# CONFIG_ARCH_HAS_ILOG2_U32 is not set
67# CONFIG_ARCH_HAS_ILOG2_U64 is not set
68CONFIG_GENERIC_FIND_NEXT_BIT=y
69CONFIG_GENERIC_HWEIGHT=y
70CONFIG_GENERIC_CALIBRATE_DELAY=y
71CONFIG_GENERIC_TIME=y
72CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
73CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
74CONFIG_DMA_NONCOHERENT=y
75CONFIG_DMA_NEED_PCI_MAP_STATE=y
76# CONFIG_CPU_BIG_ENDIAN is not set
77CONFIG_CPU_LITTLE_ENDIAN=y
78CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
79CONFIG_PNX8550=y
80CONFIG_SOC_PNX8550=y
81CONFIG_MIPS_L1_CACHE_SHIFT=5
82
83#
84# CPU selection
85#
86CONFIG_CPU_MIPS32_R1=y
87# CONFIG_CPU_MIPS32_R2 is not set
88# CONFIG_CPU_MIPS64_R1 is not set
89# CONFIG_CPU_MIPS64_R2 is not set
90# CONFIG_CPU_R3000 is not set
91# CONFIG_CPU_TX39XX is not set
92# CONFIG_CPU_VR41XX is not set
93# CONFIG_CPU_R4300 is not set
94# CONFIG_CPU_R4X00 is not set
95# CONFIG_CPU_TX49XX is not set
96# CONFIG_CPU_R5000 is not set
97# CONFIG_CPU_R5432 is not set
98# CONFIG_CPU_R6000 is not set
99# CONFIG_CPU_NEVADA is not set
100# CONFIG_CPU_R8000 is not set
101# CONFIG_CPU_R10000 is not set
102# CONFIG_CPU_RM7000 is not set
103# CONFIG_CPU_RM9000 is not set
104# CONFIG_CPU_SB1 is not set
105CONFIG_SYS_HAS_CPU_MIPS32_R1=y
106CONFIG_CPU_MIPS32=y
107CONFIG_CPU_MIPSR1=y
108CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
109CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
110
111#
112# Kernel type
113#
114CONFIG_32BIT=y
115# CONFIG_64BIT is not set
116CONFIG_PAGE_SIZE_4KB=y
117# CONFIG_PAGE_SIZE_8KB is not set
118# CONFIG_PAGE_SIZE_16KB is not set
119# CONFIG_PAGE_SIZE_64KB is not set
120CONFIG_CPU_HAS_PREFETCH=y
121CONFIG_MIPS_MT_DISABLED=y
122# CONFIG_MIPS_MT_SMP is not set
123# CONFIG_MIPS_MT_SMTC is not set
124# CONFIG_MIPS_VPE_LOADER is not set
125# CONFIG_64BIT_PHYS_ADDR is not set
126CONFIG_CPU_HAS_LLSC=y
127CONFIG_CPU_HAS_SYNC=y
128CONFIG_GENERIC_HARDIRQS=y
129CONFIG_GENERIC_IRQ_PROBE=y
130CONFIG_CPU_SUPPORTS_HIGHMEM=y
131CONFIG_ARCH_FLATMEM_ENABLE=y
132CONFIG_SELECT_MEMORY_MODEL=y
133CONFIG_FLATMEM_MANUAL=y
134# CONFIG_DISCONTIGMEM_MANUAL is not set
135# CONFIG_SPARSEMEM_MANUAL is not set
136CONFIG_FLATMEM=y
137CONFIG_FLAT_NODE_MEM_MAP=y
138# CONFIG_SPARSEMEM_STATIC is not set
139CONFIG_SPLIT_PTLOCK_CPUS=4
140# CONFIG_RESOURCES_64BIT is not set
141CONFIG_ZONE_DMA_FLAG=1
142# CONFIG_HZ_48 is not set
143# CONFIG_HZ_100 is not set
144# CONFIG_HZ_128 is not set
145CONFIG_HZ_250=y
146# CONFIG_HZ_256 is not set
147# CONFIG_HZ_1000 is not set
148# CONFIG_HZ_1024 is not set
149CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
150CONFIG_HZ=250
151CONFIG_PREEMPT_NONE=y
152# CONFIG_PREEMPT_VOLUNTARY is not set
153# CONFIG_PREEMPT is not set
154# CONFIG_KEXEC is not set
155CONFIG_LOCKDEP_SUPPORT=y
156CONFIG_STACKTRACE_SUPPORT=y
157CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
158
159#
160# Code maturity level options
161#
162CONFIG_EXPERIMENTAL=y
163CONFIG_BROKEN_ON_SMP=y
164CONFIG_INIT_ENV_ARG_LIMIT=32
165
166#
167# General setup
168#
169CONFIG_LOCALVERSION=""
170CONFIG_LOCALVERSION_AUTO=y
171CONFIG_SWAP=y
172CONFIG_SYSVIPC=y
173# CONFIG_IPC_NS is not set
174CONFIG_SYSVIPC_SYSCTL=y
175# CONFIG_POSIX_MQUEUE is not set
176# CONFIG_BSD_PROCESS_ACCT is not set
177# CONFIG_TASKSTATS is not set
178# CONFIG_UTS_NS is not set
179# CONFIG_AUDIT is not set
180CONFIG_IKCONFIG=y
181CONFIG_IKCONFIG_PROC=y
182CONFIG_SYSFS_DEPRECATED=y
183# CONFIG_RELAY is not set
184CONFIG_INITRAMFS_SOURCE=""
185# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
186CONFIG_SYSCTL=y
187CONFIG_EMBEDDED=y
188# CONFIG_SYSCTL_SYSCALL is not set
189CONFIG_KALLSYMS=y
190# CONFIG_KALLSYMS_EXTRA_PASS is not set
191CONFIG_HOTPLUG=y
192CONFIG_PRINTK=y
193CONFIG_BUG=y
194CONFIG_ELF_CORE=y
195CONFIG_BASE_FULL=y
196CONFIG_FUTEX=y
197CONFIG_EPOLL=y
198CONFIG_SHMEM=y
199CONFIG_SLAB=y
200CONFIG_VM_EVENT_COUNTERS=y
201CONFIG_RT_MUTEXES=y
202# CONFIG_TINY_SHMEM is not set
203CONFIG_BASE_SMALL=0
204# CONFIG_SLOB is not set
205
206#
207# Loadable module support
208#
209CONFIG_MODULES=y
210# CONFIG_MODULE_UNLOAD is not set
211# CONFIG_MODVERSIONS is not set
212# CONFIG_MODULE_SRCVERSION_ALL is not set
213CONFIG_KMOD=y
214
215#
216# Block layer
217#
218CONFIG_BLOCK=y
219# CONFIG_LBD is not set
220# CONFIG_BLK_DEV_IO_TRACE is not set
221# CONFIG_LSF is not set
222
223#
224# IO Schedulers
225#
226CONFIG_IOSCHED_NOOP=y
227CONFIG_IOSCHED_AS=y
228CONFIG_IOSCHED_DEADLINE=y
229CONFIG_IOSCHED_CFQ=y
230CONFIG_DEFAULT_AS=y
231# CONFIG_DEFAULT_DEADLINE is not set
232# CONFIG_DEFAULT_CFQ is not set
233# CONFIG_DEFAULT_NOOP is not set
234CONFIG_DEFAULT_IOSCHED="anticipatory"
235
236#
237# Bus options (PCI, PCMCIA, EISA, ISA, TC)
238#
239CONFIG_HW_HAS_PCI=y
240CONFIG_PCI=y
241CONFIG_MMU=y
242
243#
244# PCCARD (PCMCIA/CardBus) support
245#
246# CONFIG_PCCARD is not set
247
248#
249# PCI Hotplug Support
250#
251# CONFIG_HOTPLUG_PCI is not set
252
253#
254# Executable file formats
255#
256CONFIG_BINFMT_ELF=y
257# CONFIG_BINFMT_MISC is not set
258CONFIG_TRAD_SIGNALS=y
259
260#
261# Power management options
262#
263CONFIG_PM=y
264# CONFIG_PM_LEGACY is not set
265# CONFIG_PM_DEBUG is not set
266# CONFIG_PM_SYSFS_DEPRECATED is not set
267
268#
269# Networking
270#
271CONFIG_NET=y
272
273#
274# Networking options
275#
276# CONFIG_NETDEBUG is not set
277CONFIG_PACKET=y
278# CONFIG_PACKET_MMAP is not set
279CONFIG_UNIX=y
280CONFIG_XFRM=y
281# CONFIG_XFRM_USER is not set
282# CONFIG_XFRM_SUB_POLICY is not set
283CONFIG_XFRM_MIGRATE=y
284# CONFIG_NET_KEY is not set
285CONFIG_INET=y
286# CONFIG_IP_MULTICAST is not set
287# CONFIG_IP_ADVANCED_ROUTER is not set
288CONFIG_IP_FIB_HASH=y
289CONFIG_IP_PNP=y
290# CONFIG_IP_PNP_DHCP is not set
291# CONFIG_IP_PNP_BOOTP is not set
292# CONFIG_IP_PNP_RARP is not set
293# CONFIG_NET_IPIP is not set
294# CONFIG_NET_IPGRE is not set
295# CONFIG_ARPD is not set
296# CONFIG_SYN_COOKIES is not set
297# CONFIG_INET_AH is not set
298# CONFIG_INET_ESP is not set
299# CONFIG_INET_IPCOMP is not set
300# CONFIG_INET_XFRM_TUNNEL is not set
301CONFIG_INET_TUNNEL=m
302CONFIG_INET_XFRM_MODE_TRANSPORT=y
303CONFIG_INET_XFRM_MODE_TUNNEL=y
304CONFIG_INET_XFRM_MODE_BEET=y
305CONFIG_INET_DIAG=y
306CONFIG_INET_TCP_DIAG=y
307# CONFIG_TCP_CONG_ADVANCED is not set
308CONFIG_TCP_CONG_CUBIC=y
309CONFIG_DEFAULT_TCP_CONG="cubic"
310CONFIG_TCP_MD5SIG=y
311
312#
313# IP: Virtual Server Configuration
314#
315# CONFIG_IP_VS is not set
316CONFIG_IPV6=m
317# CONFIG_IPV6_PRIVACY is not set
318CONFIG_IPV6_ROUTER_PREF=y
319CONFIG_IPV6_ROUTE_INFO=y
320# CONFIG_INET6_AH is not set
321# CONFIG_INET6_ESP is not set
322# CONFIG_INET6_IPCOMP is not set
323# CONFIG_IPV6_MIP6 is not set
324# CONFIG_INET6_XFRM_TUNNEL is not set
325# CONFIG_INET6_TUNNEL is not set
326CONFIG_INET6_XFRM_MODE_TRANSPORT=m
327CONFIG_INET6_XFRM_MODE_TUNNEL=m
328CONFIG_INET6_XFRM_MODE_BEET=m
329# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
330CONFIG_IPV6_SIT=m
331# CONFIG_IPV6_TUNNEL is not set
332# CONFIG_IPV6_MULTIPLE_TABLES is not set
333# CONFIG_NETWORK_SECMARK is not set
334CONFIG_NETFILTER=y
335# CONFIG_NETFILTER_DEBUG is not set
336
337#
338# Core Netfilter Configuration
339#
340# CONFIG_NETFILTER_NETLINK is not set
341CONFIG_NF_CONNTRACK_ENABLED=m
342CONFIG_NF_CONNTRACK_SUPPORT=y
343# CONFIG_IP_NF_CONNTRACK_SUPPORT is not set
344CONFIG_NF_CONNTRACK=m
345CONFIG_NF_CT_ACCT=y
346CONFIG_NF_CONNTRACK_MARK=y
347CONFIG_NF_CONNTRACK_EVENTS=y
348CONFIG_NF_CT_PROTO_GRE=m
349CONFIG_NF_CT_PROTO_SCTP=m
350CONFIG_NF_CONNTRACK_AMANDA=m
351CONFIG_NF_CONNTRACK_FTP=m
352CONFIG_NF_CONNTRACK_H323=m
353CONFIG_NF_CONNTRACK_IRC=m
354# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set
355CONFIG_NF_CONNTRACK_PPTP=m
356CONFIG_NF_CONNTRACK_SANE=m
357CONFIG_NF_CONNTRACK_SIP=m
358CONFIG_NF_CONNTRACK_TFTP=m
359CONFIG_NETFILTER_XTABLES=m
360CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
361CONFIG_NETFILTER_XT_TARGET_MARK=m
362CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
363CONFIG_NETFILTER_XT_TARGET_NFLOG=m
364CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
365CONFIG_NETFILTER_XT_MATCH_COMMENT=m
366CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
367CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
368CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
369CONFIG_NETFILTER_XT_MATCH_DCCP=m
370# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
371CONFIG_NETFILTER_XT_MATCH_ESP=m
372CONFIG_NETFILTER_XT_MATCH_HELPER=m
373CONFIG_NETFILTER_XT_MATCH_LENGTH=m
374CONFIG_NETFILTER_XT_MATCH_LIMIT=m
375CONFIG_NETFILTER_XT_MATCH_MAC=m
376CONFIG_NETFILTER_XT_MATCH_MARK=m
377# CONFIG_NETFILTER_XT_MATCH_POLICY is not set
378CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
379CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
380# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set
381CONFIG_NETFILTER_XT_MATCH_REALM=m
382CONFIG_NETFILTER_XT_MATCH_SCTP=m
383CONFIG_NETFILTER_XT_MATCH_STATE=m
384# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set
385CONFIG_NETFILTER_XT_MATCH_STRING=m
386CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
387CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
388
389#
390# IP: Netfilter Configuration
391#
392CONFIG_NF_CONNTRACK_IPV4=m
393CONFIG_NF_CONNTRACK_PROC_COMPAT=y
394# CONFIG_IP_NF_QUEUE is not set
395# CONFIG_IP_NF_IPTABLES is not set
396# CONFIG_IP_NF_ARPTABLES is not set
397
398#
399# IPv6: Netfilter Configuration (EXPERIMENTAL)
400#
401CONFIG_NF_CONNTRACK_IPV6=m
402# CONFIG_IP6_NF_QUEUE is not set
403# CONFIG_IP6_NF_IPTABLES is not set
404
405#
406# DCCP Configuration (EXPERIMENTAL)
407#
408# CONFIG_IP_DCCP is not set
409
410#
411# SCTP Configuration (EXPERIMENTAL)
412#
413# CONFIG_IP_SCTP is not set
414
415#
416# TIPC Configuration (EXPERIMENTAL)
417#
418# CONFIG_TIPC is not set
419# CONFIG_ATM is not set
420# CONFIG_BRIDGE is not set
421# CONFIG_VLAN_8021Q is not set
422# CONFIG_DECNET is not set
423# CONFIG_LLC2 is not set
424# CONFIG_IPX is not set
425# CONFIG_ATALK is not set
426# CONFIG_X25 is not set
427# CONFIG_LAPB is not set
428# CONFIG_ECONET is not set
429# CONFIG_WAN_ROUTER is not set
430
431#
432# QoS and/or fair queueing
433#
434# CONFIG_NET_SCHED is not set
435CONFIG_NET_CLS_ROUTE=y
436
437#
438# Network testing
439#
440# CONFIG_NET_PKTGEN is not set
441# CONFIG_HAMRADIO is not set
442# CONFIG_IRDA is not set
443# CONFIG_BT is not set
444# CONFIG_IEEE80211 is not set
445
446#
447# Device Drivers
448#
449
450#
451# Generic Driver Options
452#
453CONFIG_STANDALONE=y
454CONFIG_PREVENT_FIRMWARE_BUILD=y
455CONFIG_FW_LOADER=y
456# CONFIG_SYS_HYPERVISOR is not set
457
458#
459# Connector - unified userspace <-> kernelspace linker
460#
461# CONFIG_CONNECTOR is not set
462
463#
464# Memory Technology Devices (MTD)
465#
466# CONFIG_MTD is not set
467
468#
469# Parallel port support
470#
471# CONFIG_PARPORT is not set
472
473#
474# Plug and Play support
475#
476# CONFIG_PNPACPI is not set
477
478#
479# Block devices
480#
481# CONFIG_BLK_CPQ_DA is not set
482# CONFIG_BLK_CPQ_CISS_DA is not set
483# CONFIG_BLK_DEV_DAC960 is not set
484# CONFIG_BLK_DEV_UMEM is not set
485# CONFIG_BLK_DEV_COW_COMMON is not set
486CONFIG_BLK_DEV_LOOP=y
487# CONFIG_BLK_DEV_CRYPTOLOOP is not set
488# CONFIG_BLK_DEV_NBD is not set
489# CONFIG_BLK_DEV_SX8 is not set
490# CONFIG_BLK_DEV_UB is not set
491CONFIG_BLK_DEV_RAM=y
492CONFIG_BLK_DEV_RAM_COUNT=16
493CONFIG_BLK_DEV_RAM_SIZE=8192
494CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
495CONFIG_BLK_DEV_INITRD=y
496# CONFIG_CDROM_PKTCDVD is not set
497# CONFIG_ATA_OVER_ETH is not set
498
499#
500# Misc devices
501#
502CONFIG_SGI_IOC4=m
503# CONFIG_TIFM_CORE is not set
504
505#
506# ATA/ATAPI/MFM/RLL support
507#
508CONFIG_IDE=y
509CONFIG_IDE_MAX_HWIFS=4
510CONFIG_BLK_DEV_IDE=y
511
512#
513# Please see Documentation/ide.txt for help/info on IDE drives
514#
515# CONFIG_BLK_DEV_IDE_SATA is not set
516CONFIG_BLK_DEV_IDEDISK=y
517CONFIG_IDEDISK_MULTI_MODE=y
518# CONFIG_BLK_DEV_IDECD is not set
519# CONFIG_BLK_DEV_IDETAPE is not set
520# CONFIG_BLK_DEV_IDEFLOPPY is not set
521# CONFIG_BLK_DEV_IDESCSI is not set
522# CONFIG_IDE_TASK_IOCTL is not set
523
524#
525# IDE chipset support/bugfixes
526#
527CONFIG_IDE_GENERIC=y
528CONFIG_BLK_DEV_IDEPCI=y
529CONFIG_IDEPCI_SHARE_IRQ=y
530# CONFIG_BLK_DEV_OFFBOARD is not set
531# CONFIG_BLK_DEV_GENERIC is not set
532# CONFIG_BLK_DEV_OPTI621 is not set
533CONFIG_BLK_DEV_IDEDMA_PCI=y
534# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
535CONFIG_IDEDMA_PCI_AUTO=y
536# CONFIG_IDEDMA_ONLYDISK is not set
537# CONFIG_BLK_DEV_AEC62XX is not set
538# CONFIG_BLK_DEV_ALI15X3 is not set
539# CONFIG_BLK_DEV_AMD74XX is not set
540CONFIG_BLK_DEV_CMD64X=y
541# CONFIG_BLK_DEV_TRIFLEX is not set
542# CONFIG_BLK_DEV_CY82C693 is not set
543# CONFIG_BLK_DEV_CS5520 is not set
544# CONFIG_BLK_DEV_CS5530 is not set
545# CONFIG_BLK_DEV_HPT34X is not set
546# CONFIG_BLK_DEV_HPT366 is not set
547# CONFIG_BLK_DEV_JMICRON is not set
548# CONFIG_BLK_DEV_SC1200 is not set
549# CONFIG_BLK_DEV_PIIX is not set
550CONFIG_BLK_DEV_IT8213=m
551# CONFIG_BLK_DEV_IT821X is not set
552# CONFIG_BLK_DEV_NS87415 is not set
553# CONFIG_BLK_DEV_PDC202XX_OLD is not set
554# CONFIG_BLK_DEV_PDC202XX_NEW is not set
555# CONFIG_BLK_DEV_SVWKS is not set
556# CONFIG_BLK_DEV_SIIMAGE is not set
557# CONFIG_BLK_DEV_SLC90E66 is not set
558# CONFIG_BLK_DEV_TRM290 is not set
559# CONFIG_BLK_DEV_VIA82CXXX is not set
560CONFIG_BLK_DEV_TC86C001=m
561# CONFIG_IDE_ARM is not set
562CONFIG_BLK_DEV_IDEDMA=y
563# CONFIG_IDEDMA_IVB is not set
564CONFIG_IDEDMA_AUTO=y
565# CONFIG_BLK_DEV_HD is not set
566
567#
568# SCSI device support
569#
570# CONFIG_RAID_ATTRS is not set
571CONFIG_SCSI=y
572CONFIG_SCSI_TGT=m
573CONFIG_SCSI_NETLINK=y
574CONFIG_SCSI_PROC_FS=y
575
576#
577# SCSI support type (disk, tape, CD-ROM)
578#
579CONFIG_BLK_DEV_SD=y
580# CONFIG_CHR_DEV_ST is not set
581# CONFIG_CHR_DEV_OSST is not set
582# CONFIG_BLK_DEV_SR is not set
583# CONFIG_CHR_DEV_SG is not set
584# CONFIG_CHR_DEV_SCH is not set
585
586#
587# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
588#
589# CONFIG_SCSI_MULTI_LUN is not set
590# CONFIG_SCSI_CONSTANTS is not set
591# CONFIG_SCSI_LOGGING is not set
592CONFIG_SCSI_SCAN_ASYNC=y
593
594#
595# SCSI Transports
596#
597CONFIG_SCSI_SPI_ATTRS=m
598CONFIG_SCSI_FC_ATTRS=y
599CONFIG_SCSI_ISCSI_ATTRS=m
600# CONFIG_SCSI_SAS_ATTRS is not set
601# CONFIG_SCSI_SAS_LIBSAS is not set
602
603#
604# SCSI low-level drivers
605#
606CONFIG_ISCSI_TCP=m
607# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
608# CONFIG_SCSI_3W_9XXX is not set
609# CONFIG_SCSI_ACARD is not set
610# CONFIG_SCSI_AACRAID is not set
611CONFIG_SCSI_AIC7XXX=m
612CONFIG_AIC7XXX_CMDS_PER_DEVICE=32
613CONFIG_AIC7XXX_RESET_DELAY_MS=15000
614# CONFIG_AIC7XXX_DEBUG_ENABLE is not set
615CONFIG_AIC7XXX_DEBUG_MASK=0
616# CONFIG_AIC7XXX_REG_PRETTY_PRINT is not set
617# CONFIG_SCSI_AIC7XXX_OLD is not set
618# CONFIG_SCSI_AIC79XX is not set
619# CONFIG_SCSI_AIC94XX is not set
620# CONFIG_SCSI_DPT_I2O is not set
621# CONFIG_SCSI_ARCMSR is not set
622# CONFIG_MEGARAID_NEWGEN is not set
623# CONFIG_MEGARAID_LEGACY is not set
624# CONFIG_MEGARAID_SAS is not set
625# CONFIG_SCSI_HPTIOP is not set
626# CONFIG_SCSI_DMX3191D is not set
627# CONFIG_SCSI_FUTURE_DOMAIN is not set
628# CONFIG_SCSI_IPS is not set
629# CONFIG_SCSI_INITIO is not set
630# CONFIG_SCSI_INIA100 is not set
631# CONFIG_SCSI_STEX is not set
632# CONFIG_SCSI_SYM53C8XX_2 is not set
633# CONFIG_SCSI_QLOGIC_1280 is not set
634# CONFIG_SCSI_QLA_FC is not set
635# CONFIG_SCSI_QLA_ISCSI is not set
636# CONFIG_SCSI_LPFC is not set
637# CONFIG_SCSI_DC395x is not set
638# CONFIG_SCSI_DC390T is not set
639# CONFIG_SCSI_NSP32 is not set
640# CONFIG_SCSI_DEBUG is not set
641# CONFIG_SCSI_SRP is not set
642
643#
644# Serial ATA (prod) and Parallel ATA (experimental) drivers
645#
646# CONFIG_ATA is not set
647
648#
649# Multi-device support (RAID and LVM)
650#
651# CONFIG_MD is not set
652
653#
654# Fusion MPT device support
655#
656# CONFIG_FUSION is not set
657# CONFIG_FUSION_SPI is not set
658# CONFIG_FUSION_FC is not set
659# CONFIG_FUSION_SAS is not set
660
661#
662# IEEE 1394 (FireWire) support
663#
664# CONFIG_IEEE1394 is not set
665
666#
667# I2O device support
668#
669# CONFIG_I2O is not set
670
671#
672# Network device support
673#
674CONFIG_NETDEVICES=y
675# CONFIG_DUMMY is not set
676# CONFIG_BONDING is not set
677# CONFIG_EQUALIZER is not set
678CONFIG_TUN=m
679
680#
681# ARCnet devices
682#
683# CONFIG_ARCNET is not set
684
685#
686# PHY device support
687#
688# CONFIG_PHYLIB is not set
689
690#
691# Ethernet (10 or 100Mbit)
692#
693CONFIG_NET_ETHERNET=y
694CONFIG_MII=y
695# CONFIG_HAPPYMEAL is not set
696# CONFIG_SUNGEM is not set
697# CONFIG_CASSINI is not set
698# CONFIG_NET_VENDOR_3COM is not set
699# CONFIG_DM9000 is not set
700
701#
702# Tulip family network device support
703#
704# CONFIG_NET_TULIP is not set
705# CONFIG_HP100 is not set
706CONFIG_NET_PCI=y
707# CONFIG_PCNET32 is not set
708# CONFIG_AMD8111_ETH is not set
709# CONFIG_ADAPTEC_STARFIRE is not set
710# CONFIG_B44 is not set
711# CONFIG_FORCEDETH is not set
712# CONFIG_DGRS is not set
713# CONFIG_EEPRO100 is not set
714# CONFIG_E100 is not set
715# CONFIG_FEALNX is not set
716CONFIG_NATSEMI=y
717# CONFIG_NE2K_PCI is not set
718# CONFIG_8139CP is not set
719CONFIG_8139TOO=y
720# CONFIG_8139TOO_PIO is not set
721# CONFIG_8139TOO_TUNE_TWISTER is not set
722# CONFIG_8139TOO_8129 is not set
723# CONFIG_8139_OLD_RX_RESET is not set
724# CONFIG_SIS900 is not set
725# CONFIG_EPIC100 is not set
726# CONFIG_SUNDANCE is not set
727# CONFIG_TLAN is not set
728# CONFIG_VIA_RHINE is not set
729# CONFIG_SC92031 is not set
730
731#
732# Ethernet (1000 Mbit)
733#
734# CONFIG_ACENIC is not set
735# CONFIG_DL2K is not set
736# CONFIG_E1000 is not set
737# CONFIG_NS83820 is not set
738# CONFIG_HAMACHI is not set
739# CONFIG_YELLOWFIN is not set
740# CONFIG_R8169 is not set
741# CONFIG_SIS190 is not set
742# CONFIG_SKGE is not set
743# CONFIG_SKY2 is not set
744# CONFIG_SK98LIN is not set
745# CONFIG_VIA_VELOCITY is not set
746# CONFIG_TIGON3 is not set
747# CONFIG_BNX2 is not set
748# CONFIG_QLA3XXX is not set
749# CONFIG_ATL1 is not set
750
751#
752# Ethernet (10000 Mbit)
753#
754# CONFIG_CHELSIO_T1 is not set
755CONFIG_CHELSIO_T3=m
756# CONFIG_IXGB is not set
757# CONFIG_S2IO is not set
758# CONFIG_MYRI10GE is not set
759CONFIG_NETXEN_NIC=m
760
761#
762# Token Ring devices
763#
764# CONFIG_TR is not set
765
766#
767# Wireless LAN (non-hamradio)
768#
769# CONFIG_NET_RADIO is not set
770
771#
772# Wan interfaces
773#
774# CONFIG_WAN is not set
775# CONFIG_FDDI is not set
776# CONFIG_HIPPI is not set
777CONFIG_PPP=m
778# CONFIG_PPP_MULTILINK is not set
779# CONFIG_PPP_FILTER is not set
780CONFIG_PPP_ASYNC=m
781CONFIG_PPP_SYNC_TTY=m
782CONFIG_PPP_DEFLATE=m
783# CONFIG_PPP_BSDCOMP is not set
784CONFIG_PPP_MPPE=m
785# CONFIG_PPPOE is not set
786# CONFIG_SLIP is not set
787CONFIG_SLHC=m
788# CONFIG_NET_FC is not set
789# CONFIG_SHAPER is not set
790# CONFIG_NETCONSOLE is not set
791# CONFIG_NETPOLL is not set
792# CONFIG_NET_POLL_CONTROLLER is not set
793
794#
795# ISDN subsystem
796#
797# CONFIG_ISDN is not set
798
799#
800# Telephony Support
801#
802# CONFIG_PHONE is not set
803
804#
805# Input device support
806#
807CONFIG_INPUT=y
808# CONFIG_INPUT_FF_MEMLESS is not set
809
810#
811# Userland interfaces
812#
813CONFIG_INPUT_MOUSEDEV=y
814CONFIG_INPUT_MOUSEDEV_PSAUX=y
815CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
816CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
817# CONFIG_INPUT_JOYDEV is not set
818# CONFIG_INPUT_TSDEV is not set
819CONFIG_INPUT_EVDEV=m
820# CONFIG_INPUT_EVBUG is not set
821
822#
823# Input Device Drivers
824#
825CONFIG_INPUT_KEYBOARD=y
826CONFIG_KEYBOARD_ATKBD=y
827# CONFIG_KEYBOARD_SUNKBD is not set
828# CONFIG_KEYBOARD_LKKBD is not set
829# CONFIG_KEYBOARD_XTKBD is not set
830# CONFIG_KEYBOARD_NEWTON is not set
831# CONFIG_KEYBOARD_STOWAWAY is not set
832CONFIG_INPUT_MOUSE=y
833CONFIG_MOUSE_PS2=y
834# CONFIG_MOUSE_SERIAL is not set
835# CONFIG_MOUSE_VSXXXAA is not set
836# CONFIG_INPUT_JOYSTICK is not set
837# CONFIG_INPUT_TOUCHSCREEN is not set
838# CONFIG_INPUT_MISC is not set
839
840#
841# Hardware I/O ports
842#
843CONFIG_SERIO=y
844CONFIG_SERIO_I8042=y
845CONFIG_SERIO_SERPORT=y
846# CONFIG_SERIO_PCIPS2 is not set
847CONFIG_SERIO_LIBPS2=y
848# CONFIG_SERIO_RAW is not set
849# CONFIG_GAMEPORT is not set
850
851#
852# Character devices
853#
854CONFIG_VT=y
855# CONFIG_VT_CONSOLE is not set
856CONFIG_HW_CONSOLE=y
857# CONFIG_VT_HW_CONSOLE_BINDING is not set
858CONFIG_SERIAL_NONSTANDARD=y
859# CONFIG_COMPUTONE is not set
860# CONFIG_ROCKETPORT is not set
861# CONFIG_CYCLADES is not set
862# CONFIG_DIGIEPCA is not set
863# CONFIG_MOXA_INTELLIO is not set
864# CONFIG_MOXA_SMARTIO is not set
865CONFIG_MOXA_SMARTIO_NEW=m
866# CONFIG_ISI is not set
867# CONFIG_SYNCLINKMP is not set
868# CONFIG_SYNCLINK_GT is not set
869# CONFIG_N_HDLC is not set
870# CONFIG_RISCOM8 is not set
871# CONFIG_SPECIALIX is not set
872# CONFIG_SX is not set
873# CONFIG_RIO is not set
874# CONFIG_STALDRV is not set
875
876#
877# Serial drivers
878#
879# CONFIG_SERIAL_8250 is not set
880
881#
882# Non-8250 serial port support
883#
884CONFIG_SERIAL_PNX8XXX=y
885CONFIG_SERIAL_PNX8XXX_CONSOLE=y
886CONFIG_SERIAL_CORE=y
887CONFIG_SERIAL_CORE_CONSOLE=y
888# CONFIG_SERIAL_JSM is not set
889CONFIG_UNIX98_PTYS=y
890CONFIG_LEGACY_PTYS=y
891CONFIG_LEGACY_PTY_COUNT=256
892
893#
894# IPMI
895#
896# CONFIG_IPMI_HANDLER is not set
897
898#
899# Watchdog Cards
900#
901# CONFIG_WATCHDOG is not set
902CONFIG_HW_RANDOM=y
903# CONFIG_RTC is not set
904# CONFIG_GEN_RTC is not set
905# CONFIG_DTLK is not set
906# CONFIG_R3964 is not set
907# CONFIG_APPLICOM is not set
908# CONFIG_DRM is not set
909# CONFIG_RAW_DRIVER is not set
910
911#
912# TPM devices
913#
914# CONFIG_TCG_TPM is not set
915
916#
917# I2C support
918#
919CONFIG_I2C=m
920CONFIG_I2C_CHARDEV=m
921
922#
923# I2C Algorithms
924#
925CONFIG_I2C_ALGOBIT=m
926# CONFIG_I2C_ALGOPCF is not set
927# CONFIG_I2C_ALGOPCA is not set
928
929#
930# I2C Hardware Bus support
931#
932# CONFIG_I2C_ALI1535 is not set
933# CONFIG_I2C_ALI1563 is not set
934# CONFIG_I2C_ALI15X3 is not set
935# CONFIG_I2C_AMD756 is not set
936# CONFIG_I2C_AMD8111 is not set
937# CONFIG_I2C_I801 is not set
938# CONFIG_I2C_I810 is not set
939# CONFIG_I2C_PIIX4 is not set
940# CONFIG_I2C_NFORCE2 is not set
941# CONFIG_I2C_OCORES is not set
942# CONFIG_I2C_PARPORT_LIGHT is not set
943# CONFIG_I2C_PASEMI is not set
944# CONFIG_I2C_PROSAVAGE is not set
945# CONFIG_I2C_SAVAGE4 is not set
946# CONFIG_I2C_SIS5595 is not set
947# CONFIG_I2C_SIS630 is not set
948# CONFIG_I2C_SIS96X is not set
949# CONFIG_I2C_STUB is not set
950# CONFIG_I2C_VIA is not set
951# CONFIG_I2C_VIAPRO is not set
952# CONFIG_I2C_VOODOO3 is not set
953# CONFIG_I2C_PCA_ISA is not set
954
955#
956# Miscellaneous I2C Chip support
957#
958# CONFIG_SENSORS_DS1337 is not set
959# CONFIG_SENSORS_DS1374 is not set
960# CONFIG_SENSORS_EEPROM is not set
961# CONFIG_SENSORS_PCF8574 is not set
962# CONFIG_SENSORS_PCA9539 is not set
963# CONFIG_SENSORS_PCF8591 is not set
964# CONFIG_SENSORS_MAX6875 is not set
965# CONFIG_I2C_DEBUG_CORE is not set
966# CONFIG_I2C_DEBUG_ALGO is not set
967# CONFIG_I2C_DEBUG_BUS is not set
968# CONFIG_I2C_DEBUG_CHIP is not set
969
970#
971# SPI support
972#
973# CONFIG_SPI is not set
974# CONFIG_SPI_MASTER is not set
975
976#
977# Dallas's 1-wire bus
978#
979# CONFIG_W1 is not set
980
981#
982# Hardware Monitoring support
983#
984CONFIG_HWMON=y
985# CONFIG_HWMON_VID is not set
986# CONFIG_SENSORS_ABITUGURU is not set
987# CONFIG_SENSORS_ADM1021 is not set
988# CONFIG_SENSORS_ADM1025 is not set
989# CONFIG_SENSORS_ADM1026 is not set
990# CONFIG_SENSORS_ADM1029 is not set
991# CONFIG_SENSORS_ADM1031 is not set
992# CONFIG_SENSORS_ADM9240 is not set
993# CONFIG_SENSORS_ASB100 is not set
994# CONFIG_SENSORS_ATXP1 is not set
995# CONFIG_SENSORS_DS1621 is not set
996# CONFIG_SENSORS_F71805F is not set
997# CONFIG_SENSORS_FSCHER is not set
998# CONFIG_SENSORS_FSCPOS is not set
999# CONFIG_SENSORS_GL518SM is not set
1000# CONFIG_SENSORS_GL520SM is not set
1001# CONFIG_SENSORS_IT87 is not set
1002# CONFIG_SENSORS_LM63 is not set
1003# CONFIG_SENSORS_LM75 is not set
1004# CONFIG_SENSORS_LM77 is not set
1005# CONFIG_SENSORS_LM78 is not set
1006# CONFIG_SENSORS_LM80 is not set
1007# CONFIG_SENSORS_LM83 is not set
1008# CONFIG_SENSORS_LM85 is not set
1009# CONFIG_SENSORS_LM87 is not set
1010# CONFIG_SENSORS_LM90 is not set
1011# CONFIG_SENSORS_LM92 is not set
1012# CONFIG_SENSORS_MAX1619 is not set
1013# CONFIG_SENSORS_PC87360 is not set
1014# CONFIG_SENSORS_PC87427 is not set
1015# CONFIG_SENSORS_SIS5595 is not set
1016# CONFIG_SENSORS_SMSC47M1 is not set
1017# CONFIG_SENSORS_SMSC47M192 is not set
1018# CONFIG_SENSORS_SMSC47B397 is not set
1019# CONFIG_SENSORS_VIA686A is not set
1020# CONFIG_SENSORS_VT1211 is not set
1021# CONFIG_SENSORS_VT8231 is not set
1022# CONFIG_SENSORS_W83781D is not set
1023# CONFIG_SENSORS_W83791D is not set
1024# CONFIG_SENSORS_W83792D is not set
1025# CONFIG_SENSORS_W83793 is not set
1026# CONFIG_SENSORS_W83L785TS is not set
1027# CONFIG_SENSORS_W83627HF is not set
1028# CONFIG_SENSORS_W83627EHF is not set
1029# CONFIG_HWMON_DEBUG_CHIP is not set
1030
1031#
1032# Multimedia devices
1033#
1034# CONFIG_VIDEO_DEV is not set
1035
1036#
1037# Digital Video Broadcasting Devices
1038#
1039# CONFIG_DVB is not set
1040# CONFIG_USB_DABUSB is not set
1041
1042#
1043# Graphics support
1044#
1045CONFIG_FIRMWARE_EDID=y
1046CONFIG_FB=y
1047# CONFIG_FB_DDC is not set
1048# CONFIG_FB_CFB_FILLRECT is not set
1049# CONFIG_FB_CFB_COPYAREA is not set
1050# CONFIG_FB_CFB_IMAGEBLIT is not set
1051# CONFIG_FB_SVGALIB is not set
1052# CONFIG_FB_MACMODES is not set
1053# CONFIG_FB_BACKLIGHT is not set
1054# CONFIG_FB_MODE_HELPERS is not set
1055# CONFIG_FB_TILEBLITTING is not set
1056# CONFIG_FB_CIRRUS is not set
1057# CONFIG_FB_PM2 is not set
1058# CONFIG_FB_CYBER2000 is not set
1059# CONFIG_FB_ASILIANT is not set
1060# CONFIG_FB_IMSTT is not set
1061# CONFIG_FB_S1D13XXX is not set
1062# CONFIG_FB_NVIDIA is not set
1063# CONFIG_FB_RIVA is not set
1064# CONFIG_FB_MATROX is not set
1065# CONFIG_FB_RADEON is not set
1066# CONFIG_FB_ATY128 is not set
1067# CONFIG_FB_ATY is not set
1068# CONFIG_FB_S3 is not set
1069# CONFIG_FB_SAVAGE is not set
1070# CONFIG_FB_SIS is not set
1071# CONFIG_FB_NEOMAGIC is not set
1072# CONFIG_FB_KYRO is not set
1073# CONFIG_FB_3DFX is not set
1074# CONFIG_FB_VOODOO1 is not set
1075# CONFIG_FB_SMIVGX is not set
1076# CONFIG_FB_TRIDENT is not set
1077# CONFIG_FB_VIRTUAL is not set
1078
1079#
1080# Console display driver support
1081#
1082# CONFIG_VGA_CONSOLE is not set
1083CONFIG_DUMMY_CONSOLE=y
1084# CONFIG_FRAMEBUFFER_CONSOLE is not set
1085
1086#
1087# Logo configuration
1088#
1089# CONFIG_LOGO is not set
1090# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
1091
1092#
1093# Sound
1094#
1095# CONFIG_SOUND is not set
1096
1097#
1098# HID Devices
1099#
1100CONFIG_HID=y
1101# CONFIG_HID_DEBUG is not set
1102
1103#
1104# USB support
1105#
1106CONFIG_USB_ARCH_HAS_HCD=y
1107CONFIG_USB_ARCH_HAS_OHCI=y
1108CONFIG_USB_ARCH_HAS_EHCI=y
1109CONFIG_USB=y
1110# CONFIG_USB_DEBUG is not set
1111
1112#
1113# Miscellaneous USB options
1114#
1115CONFIG_USB_DEVICEFS=y
1116# CONFIG_USB_DYNAMIC_MINORS is not set
1117# CONFIG_USB_SUSPEND is not set
1118# CONFIG_USB_OTG is not set
1119
1120#
1121# USB Host Controller Drivers
1122#
1123# CONFIG_USB_EHCI_HCD is not set
1124# CONFIG_USB_ISP116X_HCD is not set
1125# CONFIG_USB_OHCI_HCD is not set
1126# CONFIG_USB_UHCI_HCD is not set
1127# CONFIG_USB_SL811_HCD is not set
1128
1129#
1130# USB Device Class drivers
1131#
1132# CONFIG_USB_ACM is not set
1133# CONFIG_USB_PRINTER is not set
1134
1135#
1136# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
1137#
1138
1139#
1140# may also be needed; see USB_STORAGE Help for more information
1141#
1142CONFIG_USB_STORAGE=y
1143# CONFIG_USB_STORAGE_DEBUG is not set
1144# CONFIG_USB_STORAGE_DATAFAB is not set
1145# CONFIG_USB_STORAGE_FREECOM is not set
1146# CONFIG_USB_STORAGE_ISD200 is not set
1147# CONFIG_USB_STORAGE_DPCM is not set
1148# CONFIG_USB_STORAGE_USBAT is not set
1149# CONFIG_USB_STORAGE_SDDR09 is not set
1150# CONFIG_USB_STORAGE_SDDR55 is not set
1151# CONFIG_USB_STORAGE_JUMPSHOT is not set
1152# CONFIG_USB_STORAGE_ALAUDA is not set
1153# CONFIG_USB_STORAGE_KARMA is not set
1154# CONFIG_USB_LIBUSUAL is not set
1155
1156#
1157# USB Input Devices
1158#
1159CONFIG_USB_HID=y
1160# CONFIG_USB_HIDINPUT_POWERBOOK is not set
1161# CONFIG_HID_FF is not set
1162CONFIG_USB_HIDDEV=y
1163# CONFIG_USB_AIPTEK is not set
1164# CONFIG_USB_WACOM is not set
1165# CONFIG_USB_ACECAD is not set
1166# CONFIG_USB_KBTAB is not set
1167# CONFIG_USB_POWERMATE is not set
1168# CONFIG_USB_TOUCHSCREEN is not set
1169# CONFIG_USB_YEALINK is not set
1170# CONFIG_USB_XPAD is not set
1171# CONFIG_USB_ATI_REMOTE is not set
1172# CONFIG_USB_ATI_REMOTE2 is not set
1173# CONFIG_USB_KEYSPAN_REMOTE is not set
1174# CONFIG_USB_APPLETOUCH is not set
1175# CONFIG_USB_GTCO is not set
1176
1177#
1178# USB Imaging devices
1179#
1180# CONFIG_USB_MDC800 is not set
1181# CONFIG_USB_MICROTEK is not set
1182
1183#
1184# USB Network Adapters
1185#
1186# CONFIG_USB_CATC is not set
1187# CONFIG_USB_KAWETH is not set
1188# CONFIG_USB_PEGASUS is not set
1189# CONFIG_USB_RTL8150 is not set
1190# CONFIG_USB_USBNET_MII is not set
1191# CONFIG_USB_USBNET is not set
1192CONFIG_USB_MON=y
1193
1194#
1195# USB port drivers
1196#
1197
1198#
1199# USB Serial Converter support
1200#
1201# CONFIG_USB_SERIAL is not set
1202
1203#
1204# USB Miscellaneous drivers
1205#
1206# CONFIG_USB_EMI62 is not set
1207# CONFIG_USB_EMI26 is not set
1208# CONFIG_USB_ADUTUX is not set
1209# CONFIG_USB_AUERSWALD is not set
1210# CONFIG_USB_RIO500 is not set
1211# CONFIG_USB_LEGOTOWER is not set
1212# CONFIG_USB_LCD is not set
1213# CONFIG_USB_BERRY_CHARGE is not set
1214# CONFIG_USB_LED is not set
1215# CONFIG_USB_CYPRESS_CY7C63 is not set
1216# CONFIG_USB_CYTHERM is not set
1217# CONFIG_USB_PHIDGET is not set
1218# CONFIG_USB_IDMOUSE is not set
1219# CONFIG_USB_FTDI_ELAN is not set
1220# CONFIG_USB_APPLEDISPLAY is not set
1221# CONFIG_USB_LD is not set
1222# CONFIG_USB_TRANCEVIBRATOR is not set
1223# CONFIG_USB_TEST is not set
1224
1225#
1226# USB DSL modem support
1227#
1228
1229#
1230# USB Gadget Support
1231#
1232# CONFIG_USB_GADGET is not set
1233
1234#
1235# MMC/SD Card support
1236#
1237# CONFIG_MMC is not set
1238
1239#
1240# LED devices
1241#
1242# CONFIG_NEW_LEDS is not set
1243
1244#
1245# LED drivers
1246#
1247
1248#
1249# LED Triggers
1250#
1251
1252#
1253# InfiniBand support
1254#
1255# CONFIG_INFINIBAND is not set
1256
1257#
1258# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
1259#
1260
1261#
1262# Real Time Clock
1263#
1264# CONFIG_RTC_CLASS is not set
1265
1266#
1267# DMA Engine support
1268#
1269# CONFIG_DMA_ENGINE is not set
1270
1271#
1272# DMA Clients
1273#
1274
1275#
1276# DMA Devices
1277#
1278
1279#
1280# Auxiliary Display support
1281#
1282
1283#
1284# Virtualization
1285#
1286
1287#
1288# File systems
1289#
1290CONFIG_EXT2_FS=y
1291# CONFIG_EXT2_FS_XATTR is not set
1292# CONFIG_EXT2_FS_XIP is not set
1293CONFIG_EXT3_FS=y
1294CONFIG_EXT3_FS_XATTR=y
1295# CONFIG_EXT3_FS_POSIX_ACL is not set
1296# CONFIG_EXT3_FS_SECURITY is not set
1297# CONFIG_EXT4DEV_FS is not set
1298CONFIG_JBD=y
1299# CONFIG_JBD_DEBUG is not set
1300CONFIG_FS_MBCACHE=y
1301# CONFIG_REISERFS_FS is not set
1302# CONFIG_JFS_FS is not set
1303# CONFIG_FS_POSIX_ACL is not set
1304CONFIG_XFS_FS=m
1305# CONFIG_XFS_QUOTA is not set
1306# CONFIG_XFS_SECURITY is not set
1307# CONFIG_XFS_POSIX_ACL is not set
1308# CONFIG_XFS_RT is not set
1309# CONFIG_GFS2_FS is not set
1310# CONFIG_OCFS2_FS is not set
1311# CONFIG_MINIX_FS is not set
1312# CONFIG_ROMFS_FS is not set
1313CONFIG_INOTIFY=y
1314CONFIG_INOTIFY_USER=y
1315# CONFIG_QUOTA is not set
1316CONFIG_DNOTIFY=y
1317CONFIG_AUTOFS_FS=y
1318CONFIG_AUTOFS4_FS=y
1319# CONFIG_FUSE_FS is not set
1320
1321#
1322# CD-ROM/DVD Filesystems
1323#
1324# CONFIG_ISO9660_FS is not set
1325# CONFIG_UDF_FS is not set
1326
1327#
1328# DOS/FAT/NT Filesystems
1329#
1330CONFIG_FAT_FS=y
1331CONFIG_MSDOS_FS=y
1332CONFIG_VFAT_FS=y
1333CONFIG_FAT_DEFAULT_CODEPAGE=437
1334CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1335# CONFIG_NTFS_FS is not set
1336
1337#
1338# Pseudo filesystems
1339#
1340CONFIG_PROC_FS=y
1341# CONFIG_PROC_KCORE is not set
1342CONFIG_PROC_SYSCTL=y
1343CONFIG_SYSFS=y
1344CONFIG_TMPFS=y
1345# CONFIG_TMPFS_POSIX_ACL is not set
1346# CONFIG_HUGETLB_PAGE is not set
1347CONFIG_RAMFS=y
1348CONFIG_CONFIGFS_FS=m
1349
1350#
1351# Miscellaneous filesystems
1352#
1353# CONFIG_ADFS_FS is not set
1354# CONFIG_AFFS_FS is not set
1355# CONFIG_HFS_FS is not set
1356# CONFIG_HFSPLUS_FS is not set
1357# CONFIG_BEFS_FS is not set
1358# CONFIG_BFS_FS is not set
1359# CONFIG_EFS_FS is not set
1360CONFIG_CRAMFS=y
1361# CONFIG_VXFS_FS is not set
1362# CONFIG_HPFS_FS is not set
1363# CONFIG_QNX4FS_FS is not set
1364# CONFIG_SYSV_FS is not set
1365# CONFIG_UFS_FS is not set
1366
1367#
1368# Network File Systems
1369#
1370CONFIG_NFS_FS=y
1371CONFIG_NFS_V3=y
1372# CONFIG_NFS_V3_ACL is not set
1373# CONFIG_NFS_V4 is not set
1374# CONFIG_NFS_DIRECTIO is not set
1375CONFIG_NFSD=m
1376# CONFIG_NFSD_V3 is not set
1377# CONFIG_NFSD_TCP is not set
1378CONFIG_ROOT_NFS=y
1379CONFIG_LOCKD=y
1380CONFIG_LOCKD_V4=y
1381CONFIG_EXPORTFS=m
1382CONFIG_NFS_COMMON=y
1383CONFIG_SUNRPC=y
1384# CONFIG_RPCSEC_GSS_KRB5 is not set
1385# CONFIG_RPCSEC_GSS_SPKM3 is not set
1386CONFIG_SMB_FS=m
1387# CONFIG_SMB_NLS_DEFAULT is not set
1388# CONFIG_CIFS is not set
1389# CONFIG_NCP_FS is not set
1390# CONFIG_CODA_FS is not set
1391# CONFIG_AFS_FS is not set
1392# CONFIG_9P_FS is not set
1393
1394#
1395# Partition Types
1396#
1397# CONFIG_PARTITION_ADVANCED is not set
1398CONFIG_MSDOS_PARTITION=y
1399
1400#
1401# Native Language Support
1402#
1403CONFIG_NLS=y
1404CONFIG_NLS_DEFAULT="iso8859-1"
1405# CONFIG_NLS_CODEPAGE_437 is not set
1406# CONFIG_NLS_CODEPAGE_737 is not set
1407# CONFIG_NLS_CODEPAGE_775 is not set
1408# CONFIG_NLS_CODEPAGE_850 is not set
1409# CONFIG_NLS_CODEPAGE_852 is not set
1410# CONFIG_NLS_CODEPAGE_855 is not set
1411# CONFIG_NLS_CODEPAGE_857 is not set
1412# CONFIG_NLS_CODEPAGE_860 is not set
1413# CONFIG_NLS_CODEPAGE_861 is not set
1414# CONFIG_NLS_CODEPAGE_862 is not set
1415# CONFIG_NLS_CODEPAGE_863 is not set
1416# CONFIG_NLS_CODEPAGE_864 is not set
1417# CONFIG_NLS_CODEPAGE_865 is not set
1418# CONFIG_NLS_CODEPAGE_866 is not set
1419# CONFIG_NLS_CODEPAGE_869 is not set
1420# CONFIG_NLS_CODEPAGE_936 is not set
1421# CONFIG_NLS_CODEPAGE_950 is not set
1422# CONFIG_NLS_CODEPAGE_932 is not set
1423# CONFIG_NLS_CODEPAGE_949 is not set
1424# CONFIG_NLS_CODEPAGE_874 is not set
1425# CONFIG_NLS_ISO8859_8 is not set
1426# CONFIG_NLS_CODEPAGE_1250 is not set
1427# CONFIG_NLS_CODEPAGE_1251 is not set
1428# CONFIG_NLS_ASCII is not set
1429# CONFIG_NLS_ISO8859_1 is not set
1430# CONFIG_NLS_ISO8859_2 is not set
1431# CONFIG_NLS_ISO8859_3 is not set
1432# CONFIG_NLS_ISO8859_4 is not set
1433# CONFIG_NLS_ISO8859_5 is not set
1434# CONFIG_NLS_ISO8859_6 is not set
1435# CONFIG_NLS_ISO8859_7 is not set
1436# CONFIG_NLS_ISO8859_9 is not set
1437# CONFIG_NLS_ISO8859_13 is not set
1438# CONFIG_NLS_ISO8859_14 is not set
1439# CONFIG_NLS_ISO8859_15 is not set
1440# CONFIG_NLS_KOI8_R is not set
1441# CONFIG_NLS_KOI8_U is not set
1442# CONFIG_NLS_UTF8 is not set
1443
1444#
1445# Distributed Lock Manager
1446#
1447CONFIG_DLM=m
1448CONFIG_DLM_TCP=y
1449# CONFIG_DLM_SCTP is not set
1450# CONFIG_DLM_DEBUG is not set
1451
1452#
1453# Profiling support
1454#
1455# CONFIG_PROFILING is not set
1456
1457#
1458# Kernel hacking
1459#
1460CONFIG_TRACE_IRQFLAGS_SUPPORT=y
1461# CONFIG_PRINTK_TIME is not set
1462CONFIG_ENABLE_MUST_CHECK=y
1463# CONFIG_MAGIC_SYSRQ is not set
1464# CONFIG_UNUSED_SYMBOLS is not set
1465# CONFIG_DEBUG_FS is not set
1466# CONFIG_HEADERS_CHECK is not set
1467# CONFIG_DEBUG_KERNEL is not set
1468CONFIG_LOG_BUF_SHIFT=14
1469CONFIG_CROSSCOMPILE=y
1470CONFIG_CMDLINE=""
1471CONFIG_SYS_SUPPORTS_KGDB=y
1472
1473#
1474# Security options
1475#
1476# CONFIG_KEYS is not set
1477# CONFIG_SECURITY is not set
1478
1479#
1480# Cryptographic options
1481#
1482CONFIG_CRYPTO=y
1483CONFIG_CRYPTO_ALGAPI=y
1484CONFIG_CRYPTO_BLKCIPHER=m
1485CONFIG_CRYPTO_HASH=m
1486CONFIG_CRYPTO_MANAGER=m
1487# CONFIG_CRYPTO_HMAC is not set
1488CONFIG_CRYPTO_XCBC=m
1489# CONFIG_CRYPTO_NULL is not set
1490# CONFIG_CRYPTO_MD4 is not set
1491CONFIG_CRYPTO_MD5=y
1492CONFIG_CRYPTO_SHA1=m
1493# CONFIG_CRYPTO_SHA256 is not set
1494# CONFIG_CRYPTO_SHA512 is not set
1495# CONFIG_CRYPTO_WP512 is not set
1496# CONFIG_CRYPTO_TGR192 is not set
1497CONFIG_CRYPTO_GF128MUL=m
1498CONFIG_CRYPTO_ECB=m
1499CONFIG_CRYPTO_CBC=m
1500CONFIG_CRYPTO_PCBC=m
1501CONFIG_CRYPTO_LRW=m
1502# CONFIG_CRYPTO_DES is not set
1503CONFIG_CRYPTO_FCRYPT=m
1504# CONFIG_CRYPTO_BLOWFISH is not set
1505# CONFIG_CRYPTO_TWOFISH is not set
1506# CONFIG_CRYPTO_SERPENT is not set
1507# CONFIG_CRYPTO_AES is not set
1508# CONFIG_CRYPTO_CAST5 is not set
1509# CONFIG_CRYPTO_CAST6 is not set
1510# CONFIG_CRYPTO_TEA is not set
1511CONFIG_CRYPTO_ARC4=m
1512# CONFIG_CRYPTO_KHAZAD is not set
1513# CONFIG_CRYPTO_ANUBIS is not set
1514# CONFIG_CRYPTO_DEFLATE is not set
1515# CONFIG_CRYPTO_MICHAEL_MIC is not set
1516CONFIG_CRYPTO_CRC32C=m
1517CONFIG_CRYPTO_CAMELLIA=m
1518# CONFIG_CRYPTO_TEST is not set
1519
1520#
1521# Hardware crypto devices
1522#
1523
1524#
1525# Library routines
1526#
1527CONFIG_BITREVERSE=y
1528CONFIG_CRC_CCITT=m
1529# CONFIG_CRC16 is not set
1530CONFIG_CRC32=y
1531CONFIG_LIBCRC32C=m
1532CONFIG_ZLIB_INFLATE=y
1533CONFIG_ZLIB_DEFLATE=m
1534CONFIG_TEXTSEARCH=y
1535CONFIG_TEXTSEARCH_KMP=m
1536CONFIG_TEXTSEARCH_BM=m
1537CONFIG_TEXTSEARCH_FSM=m
1538CONFIG_PLIST=y
1539CONFIG_HAS_IOMEM=y
1540CONFIG_HAS_IOPORT=y
diff --git a/arch/mips/gt64120/wrppmc/pci.c b/arch/mips/gt64120/wrppmc/pci.c
index 2fbe93467f78..0d5289bc1804 100644
--- a/arch/mips/gt64120/wrppmc/pci.c
+++ b/arch/mips/gt64120/wrppmc/pci.c
@@ -13,7 +13,7 @@
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <asm/gt64120.h> 14#include <asm/gt64120.h>
15 15
16extern struct pci_ops gt64120_pci_ops; 16extern struct pci_ops gt64xxx_pci0_ops;
17 17
18static struct resource pci0_io_resource = { 18static struct resource pci0_io_resource = {
19 .name = "pci_0 io", 19 .name = "pci_0 io",
@@ -30,7 +30,7 @@ static struct resource pci0_mem_resource = {
30}; 30};
31 31
32static struct pci_controller hose_0 = { 32static struct pci_controller hose_0 = {
33 .pci_ops = &gt64120_pci_ops, 33 .pci_ops = &gt64xxx_pci0_ops,
34 .io_resource = &pci0_io_resource, 34 .io_resource = &pci0_io_resource,
35 .mem_resource = &pci0_mem_resource, 35 .mem_resource = &pci0_mem_resource,
36}; 36};
diff --git a/arch/mips/jmr3927/common/prom.c b/arch/mips/jmr3927/common/prom.c
index aa481b774c42..5398813e50e6 100644
--- a/arch/mips/jmr3927/common/prom.c
+++ b/arch/mips/jmr3927/common/prom.c
@@ -41,16 +41,6 @@
41 41
42#include <asm/bootinfo.h> 42#include <asm/bootinfo.h>
43 43
44extern int prom_argc;
45extern char **prom_argv, **prom_envp;
46
47typedef struct
48{
49 char *name;
50/* char *val; */
51}t_env_var;
52
53
54char * __init prom_getcmdline(void) 44char * __init prom_getcmdline(void)
55{ 45{
56 return &(arcs_cmdline[0]); 46 return &(arcs_cmdline[0]);
@@ -60,6 +50,8 @@ void __init prom_init_cmdline(void)
60{ 50{
61 char *cp; 51 char *cp;
62 int actr; 52 int actr;
53 int prom_argc = fw_arg0;
54 char **prom_argv = (char **) fw_arg1;
63 55
64 actr = 1; /* Always ignore argv[0] */ 56 actr = 1; /* Always ignore argv[0] */
65 57
diff --git a/arch/mips/jmr3927/common/puts.c b/arch/mips/jmr3927/common/puts.c
index 1c1cad9cd078..c611ab497888 100644
--- a/arch/mips/jmr3927/common/puts.c
+++ b/arch/mips/jmr3927/common/puts.c
@@ -32,137 +32,29 @@
32 * 675 Mass Ave, Cambridge, MA 02139, USA. 32 * 675 Mass Ave, Cambridge, MA 02139, USA.
33 */ 33 */
34 34
35#include <linux/types.h>
36#include <asm/jmr3927/txx927.h>
37#include <asm/jmr3927/tx3927.h> 35#include <asm/jmr3927/tx3927.h>
38#include <asm/jmr3927/jmr3927.h>
39 36
40#define TIMEOUT 0xffffff 37#define TIMEOUT 0xffffff
41#define SLOW_DOWN
42
43static const char digits[16] = "0123456789abcdef";
44
45#ifdef SLOW_DOWN
46#define slow_down() { int k; for (k=0; k<10000; k++); }
47#else
48#define slow_down()
49#endif
50 38
51void 39void
52putch(const unsigned char c) 40prom_putchar(char c)
53{ 41{
54 int i = 0; 42 int i = 0;
55 43
56 do { 44 do {
57 slow_down();
58 i++; 45 i++;
59 if (i>TIMEOUT) { 46 if (i>TIMEOUT)
60 break; 47 break;
61 }
62 } while (!(tx3927_sioptr(1)->cisr & TXx927_SICISR_TXALS)); 48 } while (!(tx3927_sioptr(1)->cisr & TXx927_SICISR_TXALS));
63 tx3927_sioptr(1)->tfifo = c; 49 tx3927_sioptr(1)->tfifo = c;
64 return; 50 return;
65} 51}
66 52
67unsigned char getch(void)
68{
69 int i = 0;
70 int dicr;
71 char c;
72
73 /* diable RX int. */
74 dicr = tx3927_sioptr(1)->dicr;
75 tx3927_sioptr(1)->dicr = 0;
76
77 do {
78 slow_down();
79 i++;
80 if (i>TIMEOUT) {
81 break;
82 }
83 } while (tx3927_sioptr(1)->disr & TXx927_SIDISR_UVALID)
84 ;
85 c = tx3927_sioptr(1)->rfifo;
86
87 /* clear RX int. status */
88 tx3927_sioptr(1)->disr &= ~TXx927_SIDISR_RDIS;
89 /* enable RX int. */
90 tx3927_sioptr(1)->dicr = dicr;
91
92 return c;
93}
94void
95do_jmr3927_led_set(char n)
96{
97 /* and with current leds */
98 jmr3927_led_and_set(n);
99}
100
101void 53void
102puts(unsigned char *cp) 54puts(const char *cp)
103{ 55{
104 int i = 0; 56 while (*cp)
105 57 prom_putchar(*cp++);
106 while (*cp) { 58 prom_putchar('\r');
107 do { 59 prom_putchar('\n');
108 slow_down();
109 i++;
110 if (i>TIMEOUT) {
111 break;
112 }
113 } while (!(tx3927_sioptr(1)->cisr & TXx927_SICISR_TXALS));
114 tx3927_sioptr(1)->tfifo = *cp++;
115 }
116 putch('\r');
117 putch('\n');
118}
119
120void
121fputs(unsigned char *cp)
122{
123 int i = 0;
124
125 while (*cp) {
126 do {
127 slow_down();
128 i++;
129 if (i>TIMEOUT) {
130 break;
131 }
132 } while (!(tx3927_sioptr(1)->cisr & TXx927_SICISR_TXALS));
133 tx3927_sioptr(1)->tfifo = *cp++;
134 }
135}
136
137
138void
139put64(uint64_t ul)
140{
141 int cnt;
142 unsigned ch;
143
144 cnt = 16; /* 16 nibbles in a 64 bit long */
145 putch('0');
146 putch('x');
147 do {
148 cnt--;
149 ch = (unsigned char)(ul >> cnt * 4) & 0x0F;
150 putch(digits[ch]);
151 } while (cnt > 0);
152}
153
154void
155put32(unsigned u)
156{
157 int cnt;
158 unsigned ch;
159
160 cnt = 8; /* 8 nibbles in a 32 bit long */
161 putch('0');
162 putch('x');
163 do {
164 cnt--;
165 ch = (unsigned char)(u >> cnt * 4) & 0x0F;
166 putch(digits[ch]);
167 } while (cnt > 0);
168} 60}
diff --git a/arch/mips/jmr3927/rbhma3100/Makefile b/arch/mips/jmr3927/rbhma3100/Makefile
index 18fe9a898cb7..8d00ba460cef 100644
--- a/arch/mips/jmr3927/rbhma3100/Makefile
+++ b/arch/mips/jmr3927/rbhma3100/Makefile
@@ -3,5 +3,4 @@
3# 3#
4 4
5obj-y += init.o irq.o setup.o 5obj-y += init.o irq.o setup.o
6obj-$(CONFIG_RUNTIME_DEBUG) += debug.o
7obj-$(CONFIG_KGDB) += kgdb_io.o 6obj-$(CONFIG_KGDB) += kgdb_io.o
diff --git a/arch/mips/jmr3927/rbhma3100/init.c b/arch/mips/jmr3927/rbhma3100/init.c
index a55cb4572ded..9169fab1773a 100644
--- a/arch/mips/jmr3927/rbhma3100/init.c
+++ b/arch/mips/jmr3927/rbhma3100/init.c
@@ -28,20 +28,10 @@
28 * 675 Mass Ave, Cambridge, MA 02139, USA. 28 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 */ 29 */
30#include <linux/init.h> 30#include <linux/init.h>
31#include <linux/mm.h>
32#include <linux/sched.h>
33#include <linux/bootmem.h>
34
35#include <asm/addrspace.h>
36#include <asm/bootinfo.h> 31#include <asm/bootinfo.h>
37#include <asm/mipsregs.h>
38#include <asm/jmr3927/jmr3927.h> 32#include <asm/jmr3927/jmr3927.h>
39 33
40int prom_argc;
41char **prom_argv, **prom_envp;
42extern void __init prom_init_cmdline(void); 34extern void __init prom_init_cmdline(void);
43extern char *prom_getenv(char *envname);
44unsigned long mips_nofpu = 0;
45 35
46const char *get_system_type(void) 36const char *get_system_type(void)
47{ 37{
@@ -52,7 +42,7 @@ const char *get_system_type(void)
52 ; 42 ;
53} 43}
54 44
55extern void puts(unsigned char *cp); 45extern void puts(const char *cp);
56 46
57void __init prom_init(void) 47void __init prom_init(void)
58{ 48{
@@ -61,10 +51,6 @@ void __init prom_init(void)
61 if ((tx3927_ccfgptr->ccfg & TX3927_CCFG_TLBOFF) == 0) 51 if ((tx3927_ccfgptr->ccfg & TX3927_CCFG_TLBOFF) == 0)
62 puts("Warning: TX3927 TLB off\n"); 52 puts("Warning: TX3927 TLB off\n");
63#endif 53#endif
64 prom_argc = fw_arg0;
65 prom_argv = (char **) fw_arg1;
66 prom_envp = (char **) fw_arg2;
67
68 mips_machgroup = MACH_GROUP_TOSHIBA; 54 mips_machgroup = MACH_GROUP_TOSHIBA;
69 55
70#ifdef CONFIG_TOSHIBA_JMR3927 56#ifdef CONFIG_TOSHIBA_JMR3927
diff --git a/arch/mips/jmr3927/rbhma3100/irq.c b/arch/mips/jmr3927/rbhma3100/irq.c
index 7d2c203cb406..1187b44a3dd4 100644
--- a/arch/mips/jmr3927/rbhma3100/irq.c
+++ b/arch/mips/jmr3927/rbhma3100/irq.c
@@ -30,53 +30,21 @@
30 * 675 Mass Ave, Cambridge, MA 02139, USA. 30 * 675 Mass Ave, Cambridge, MA 02139, USA.
31 */ 31 */
32#include <linux/init.h> 32#include <linux/init.h>
33
34#include <linux/errno.h>
35#include <linux/irq.h>
36#include <linux/kernel_stat.h>
37#include <linux/signal.h>
38#include <linux/sched.h> 33#include <linux/sched.h>
39#include <linux/types.h> 34#include <linux/types.h>
40#include <linux/interrupt.h> 35#include <linux/interrupt.h>
41#include <linux/ioport.h>
42#include <linux/timex.h>
43#include <linux/slab.h>
44#include <linux/random.h>
45#include <linux/smp.h>
46#include <linux/smp_lock.h>
47#include <linux/bitops.h>
48 36
49#include <asm/irq_regs.h>
50#include <asm/io.h> 37#include <asm/io.h>
51#include <asm/mipsregs.h> 38#include <asm/mipsregs.h>
52#include <asm/system.h> 39#include <asm/system.h>
53 40
54#include <asm/ptrace.h>
55#include <asm/processor.h> 41#include <asm/processor.h>
56#include <asm/jmr3927/irq.h>
57#include <asm/debug.h>
58#include <asm/jmr3927/jmr3927.h> 42#include <asm/jmr3927/jmr3927.h>
59 43
60#if JMR3927_IRQ_END > NR_IRQS 44#if JMR3927_IRQ_END > NR_IRQS
61#error JMR3927_IRQ_END > NR_IRQS 45#error JMR3927_IRQ_END > NR_IRQS
62#endif 46#endif
63 47
64struct tb_irq_space* tb_irq_spaces;
65
66static int jmr3927_irq_base = -1;
67
68#ifdef CONFIG_PCI
69static int jmr3927_gen_iack(void)
70{
71 /* generate ACK cycle */
72#ifdef __BIG_ENDIAN
73 return (tx3927_pcicptr->iiadp >> 24) & 0xff;
74#else
75 return tx3927_pcicptr->iiadp & 0xff;
76#endif
77}
78#endif
79
80#define irc_dlevel 0 48#define irc_dlevel 0
81#define irc_elevel 1 49#define irc_elevel 1
82 50
@@ -87,89 +55,24 @@ static unsigned char irc_level[TX3927_NUM_IR] = {
87 6, 6, 6 /* TMR */ 55 6, 6, 6 /* TMR */
88}; 56};
89 57
90static void jmr3927_irq_disable(unsigned int irq_nr);
91static void jmr3927_irq_enable(unsigned int irq_nr);
92
93static void jmr3927_irq_ack(unsigned int irq)
94{
95 if (irq == JMR3927_IRQ_IRC_TMR0)
96 jmr3927_tmrptr->tisr = 0; /* ack interrupt */
97
98 jmr3927_irq_disable(irq);
99}
100
101static void jmr3927_irq_end(unsigned int irq)
102{
103 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
104 jmr3927_irq_enable(irq);
105}
106
107static void jmr3927_irq_disable(unsigned int irq_nr)
108{
109 struct tb_irq_space* sp;
110
111 for (sp = tb_irq_spaces; sp; sp = sp->next) {
112 if (sp->start_irqno <= irq_nr &&
113 irq_nr < sp->start_irqno + sp->nr_irqs) {
114 if (sp->mask_func)
115 sp->mask_func(irq_nr - sp->start_irqno,
116 sp->space_id);
117 break;
118 }
119 }
120}
121
122static void jmr3927_irq_enable(unsigned int irq_nr)
123{
124 struct tb_irq_space* sp;
125
126 for (sp = tb_irq_spaces; sp; sp = sp->next) {
127 if (sp->start_irqno <= irq_nr &&
128 irq_nr < sp->start_irqno + sp->nr_irqs) {
129 if (sp->unmask_func)
130 sp->unmask_func(irq_nr - sp->start_irqno,
131 sp->space_id);
132 break;
133 }
134 }
135}
136
137/* 58/*
138 * CP0_STATUS is a thread's resource (saved/restored on context switch). 59 * CP0_STATUS is a thread's resource (saved/restored on context switch).
139 * So disable_irq/enable_irq MUST handle IOC/ISAC/IRC registers. 60 * So disable_irq/enable_irq MUST handle IOC/IRC registers.
140 */ 61 */
141static void mask_irq_isac(int irq_nr, int space_id) 62static void mask_irq_ioc(unsigned int irq)
142{
143 /* 0: mask */
144 unsigned char imask =
145 jmr3927_isac_reg_in(JMR3927_ISAC_INTM_ADDR);
146 unsigned int bit = 1 << irq_nr;
147 jmr3927_isac_reg_out(imask & ~bit, JMR3927_ISAC_INTM_ADDR);
148 /* flush write buffer */
149 (void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR);
150}
151static void unmask_irq_isac(int irq_nr, int space_id)
152{
153 /* 0: mask */
154 unsigned char imask = jmr3927_isac_reg_in(JMR3927_ISAC_INTM_ADDR);
155 unsigned int bit = 1 << irq_nr;
156 jmr3927_isac_reg_out(imask | bit, JMR3927_ISAC_INTM_ADDR);
157 /* flush write buffer */
158 (void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR);
159}
160
161static void mask_irq_ioc(int irq_nr, int space_id)
162{ 63{
163 /* 0: mask */ 64 /* 0: mask */
65 unsigned int irq_nr = irq - JMR3927_IRQ_IOC;
164 unsigned char imask = jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR); 66 unsigned char imask = jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR);
165 unsigned int bit = 1 << irq_nr; 67 unsigned int bit = 1 << irq_nr;
166 jmr3927_ioc_reg_out(imask & ~bit, JMR3927_IOC_INTM_ADDR); 68 jmr3927_ioc_reg_out(imask & ~bit, JMR3927_IOC_INTM_ADDR);
167 /* flush write buffer */ 69 /* flush write buffer */
168 (void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR); 70 (void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR);
169} 71}
170static void unmask_irq_ioc(int irq_nr, int space_id) 72static void unmask_irq_ioc(unsigned int irq)
171{ 73{
172 /* 0: mask */ 74 /* 0: mask */
75 unsigned int irq_nr = irq - JMR3927_IRQ_IOC;
173 unsigned char imask = jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR); 76 unsigned char imask = jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR);
174 unsigned int bit = 1 << irq_nr; 77 unsigned int bit = 1 << irq_nr;
175 jmr3927_ioc_reg_out(imask | bit, JMR3927_IOC_INTM_ADDR); 78 jmr3927_ioc_reg_out(imask | bit, JMR3927_IOC_INTM_ADDR);
@@ -177,8 +80,9 @@ static void unmask_irq_ioc(int irq_nr, int space_id)
177 (void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR); 80 (void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR);
178} 81}
179 82
180static void mask_irq_irc(int irq_nr, int space_id) 83static void mask_irq_irc(unsigned int irq)
181{ 84{
85 unsigned int irq_nr = irq - JMR3927_IRQ_IRC;
182 volatile unsigned long *ilrp = &tx3927_ircptr->ilr[irq_nr / 2]; 86 volatile unsigned long *ilrp = &tx3927_ircptr->ilr[irq_nr / 2];
183 if (irq_nr & 1) 87 if (irq_nr & 1)
184 *ilrp = (*ilrp & 0x00ff) | (irc_dlevel << 8); 88 *ilrp = (*ilrp & 0x00ff) | (irc_dlevel << 8);
@@ -191,8 +95,9 @@ static void mask_irq_irc(int irq_nr, int space_id)
191 (void)tx3927_ircptr->ssr; 95 (void)tx3927_ircptr->ssr;
192} 96}
193 97
194static void unmask_irq_irc(int irq_nr, int space_id) 98static void unmask_irq_irc(unsigned int irq)
195{ 99{
100 unsigned int irq_nr = irq - JMR3927_IRQ_IRC;
196 volatile unsigned long *ilrp = &tx3927_ircptr->ilr[irq_nr / 2]; 101 volatile unsigned long *ilrp = &tx3927_ircptr->ilr[irq_nr / 2];
197 if (irq_nr & 1) 102 if (irq_nr & 1)
198 *ilrp = (*ilrp & 0x00ff) | (irc_level[irq_nr] << 8); 103 *ilrp = (*ilrp & 0x00ff) | (irc_level[irq_nr] << 8);
@@ -203,98 +108,14 @@ static void unmask_irq_irc(int irq_nr, int space_id)
203 tx3927_ircptr->imr = irc_elevel; 108 tx3927_ircptr->imr = irc_elevel;
204} 109}
205 110
206struct tb_irq_space jmr3927_isac_irqspace = {
207 .next = NULL,
208 .start_irqno = JMR3927_IRQ_ISAC,
209 nr_irqs : JMR3927_NR_IRQ_ISAC,
210 .mask_func = mask_irq_isac,
211 .unmask_func = unmask_irq_isac,
212 .name = "ISAC",
213 .space_id = 0,
214 can_share : 0
215};
216struct tb_irq_space jmr3927_ioc_irqspace = {
217 .next = NULL,
218 .start_irqno = JMR3927_IRQ_IOC,
219 nr_irqs : JMR3927_NR_IRQ_IOC,
220 .mask_func = mask_irq_ioc,
221 .unmask_func = unmask_irq_ioc,
222 .name = "IOC",
223 .space_id = 0,
224 can_share : 1
225};
226
227struct tb_irq_space jmr3927_irc_irqspace = {
228 .next = NULL,
229 .start_irqno = JMR3927_IRQ_IRC,
230 .nr_irqs = JMR3927_NR_IRQ_IRC,
231 .mask_func = mask_irq_irc,
232 .unmask_func = unmask_irq_irc,
233 .name = "on-chip",
234 .space_id = 0,
235 .can_share = 0
236};
237
238
239#ifdef CONFIG_TX_BRANCH_LIKELY_BUG_WORKAROUND
240static int tx_branch_likely_bug_count = 0;
241static int have_tx_branch_likely_bug = 0;
242
243static void tx_branch_likely_bug_fixup(void)
244{
245 struct pt_regs *regs = get_irq_regs();
246
247 /* TX39/49-BUG: Under this condition, the insn in delay slot
248 of the branch likely insn is executed (not nullified) even
249 the branch condition is false. */
250 if (!have_tx_branch_likely_bug)
251 return;
252 if ((regs->cp0_epc & 0xfff) == 0xffc &&
253 KSEGX(regs->cp0_epc) != KSEG0 &&
254 KSEGX(regs->cp0_epc) != KSEG1) {
255 unsigned int insn = *(unsigned int*)(regs->cp0_epc - 4);
256 /* beql,bnel,blezl,bgtzl */
257 /* bltzl,bgezl,blezall,bgezall */
258 /* bczfl, bcztl */
259 if ((insn & 0xf0000000) == 0x50000000 ||
260 (insn & 0xfc0e0000) == 0x04020000 ||
261 (insn & 0xf3fe0000) == 0x41020000) {
262 regs->cp0_epc -= 4;
263 tx_branch_likely_bug_count++;
264 printk(KERN_INFO
265 "fix branch-likery bug in %s (insn %08x)\n",
266 current->comm, insn);
267 }
268 }
269}
270#endif
271
272static void jmr3927_spurious(void)
273{
274 struct pt_regs * regs = get_irq_regs();
275
276#ifdef CONFIG_TX_BRANCH_LIKELY_BUG_WORKAROUND
277 tx_branch_likely_bug_fixup();
278#endif
279 printk(KERN_WARNING "spurious interrupt (cause 0x%lx, pc 0x%lx, ra 0x%lx).\n",
280 regs->cp0_cause, regs->cp0_epc, regs->regs[31]);
281}
282
283asmlinkage void plat_irq_dispatch(void) 111asmlinkage void plat_irq_dispatch(void)
284{ 112{
285 struct pt_regs * regs = get_irq_regs(); 113 unsigned long cp0_cause = read_c0_cause();
286 int irq; 114 int irq;
287 115
288#ifdef CONFIG_TX_BRANCH_LIKELY_BUG_WORKAROUND 116 if ((cp0_cause & CAUSEF_IP7) == 0)
289 tx_branch_likely_bug_fixup();
290#endif
291 if ((regs->cp0_cause & CAUSEF_IP7) == 0) {
292#if 0
293 jmr3927_spurious();
294#endif
295 return; 117 return;
296 } 118 irq = (cp0_cause >> CAUSEB_IP2) & 0x0f;
297 irq = (regs->cp0_cause >> CAUSEB_IP2) & 0x0f;
298 119
299 do_IRQ(irq + JMR3927_IRQ_IRC); 120 do_IRQ(irq + JMR3927_IRQ_IRC);
300} 121}
@@ -317,35 +138,6 @@ static struct irqaction ioc_action = {
317 jmr3927_ioc_interrupt, 0, CPU_MASK_NONE, "IOC", NULL, NULL, 138 jmr3927_ioc_interrupt, 0, CPU_MASK_NONE, "IOC", NULL, NULL,
318}; 139};
319 140
320static irqreturn_t jmr3927_isac_interrupt(int irq, void *dev_id)
321{
322 unsigned char istat = jmr3927_isac_reg_in(JMR3927_ISAC_INTS2_ADDR);
323 int i;
324
325 for (i = 0; i < JMR3927_NR_IRQ_ISAC; i++) {
326 if (istat & (1 << i)) {
327 irq = JMR3927_IRQ_ISAC + i;
328 do_IRQ(irq);
329 }
330 }
331 return IRQ_HANDLED;
332}
333
334static struct irqaction isac_action = {
335 jmr3927_isac_interrupt, 0, CPU_MASK_NONE, "ISAC", NULL, NULL,
336};
337
338
339static irqreturn_t jmr3927_isaerr_interrupt(int irq, void *dev_id)
340{
341 printk(KERN_WARNING "ISA error interrupt (irq 0x%x).\n", irq);
342
343 return IRQ_HANDLED;
344}
345static struct irqaction isaerr_action = {
346 jmr3927_isaerr_interrupt, 0, CPU_MASK_NONE, "ISA error", NULL, NULL,
347};
348
349static irqreturn_t jmr3927_pcierr_interrupt(int irq, void *dev_id) 141static irqreturn_t jmr3927_pcierr_interrupt(int irq, void *dev_id)
350{ 142{
351 printk(KERN_WARNING "PCI error interrupt (irq 0x%x).\n", irq); 143 printk(KERN_WARNING "PCI error interrupt (irq 0x%x).\n", irq);
@@ -358,54 +150,19 @@ static struct irqaction pcierr_action = {
358 jmr3927_pcierr_interrupt, 0, CPU_MASK_NONE, "PCI error", NULL, NULL, 150 jmr3927_pcierr_interrupt, 0, CPU_MASK_NONE, "PCI error", NULL, NULL,
359}; 151};
360 152
361int jmr3927_ether1_irq = 0; 153static void __init jmr3927_irq_init(void);
362
363void jmr3927_irq_init(u32 irq_base);
364 154
365void __init arch_init_irq(void) 155void __init arch_init_irq(void)
366{ 156{
367 /* look for io board's presence */
368 int have_isac = jmr3927_have_isac();
369
370 /* Now, interrupt control disabled, */ 157 /* Now, interrupt control disabled, */
371 /* all IRC interrupts are masked, */ 158 /* all IRC interrupts are masked, */
372 /* all IRC interrupt mode are Low Active. */ 159 /* all IRC interrupt mode are Low Active. */
373 160
374 if (have_isac) {
375
376 /* ETHER1 (NE2000 compatible 10M-Ether) parameter setup */
377 /* temporary enable interrupt control */
378 tx3927_ircptr->cer = 1;
379 /* ETHER1 Int. Is High-Active. */
380 if (tx3927_ircptr->ssr & (1 << 0))
381 jmr3927_ether1_irq = JMR3927_IRQ_IRC_INT0;
382#if 0 /* INT3 may be asserted by ether0 (even after reboot...) */
383 else if (tx3927_ircptr->ssr & (1 << 3))
384 jmr3927_ether1_irq = JMR3927_IRQ_IRC_INT3;
385#endif
386 /* disable interrupt control */
387 tx3927_ircptr->cer = 0;
388
389 /* Ether1: High Active */
390 if (jmr3927_ether1_irq) {
391 int ether1_irc = jmr3927_ether1_irq - JMR3927_IRQ_IRC;
392 tx3927_ircptr->cr[ether1_irc / 8] |=
393 TX3927_IRCR_HIGH << ((ether1_irc % 8) * 2);
394 }
395 }
396
397 /* mask all IOC interrupts */ 161 /* mask all IOC interrupts */
398 jmr3927_ioc_reg_out(0, JMR3927_IOC_INTM_ADDR); 162 jmr3927_ioc_reg_out(0, JMR3927_IOC_INTM_ADDR);
399 /* setup IOC interrupt mode (SOFT:High Active, Others:Low Active) */ 163 /* setup IOC interrupt mode (SOFT:High Active, Others:Low Active) */
400 jmr3927_ioc_reg_out(JMR3927_IOC_INTF_SOFT, JMR3927_IOC_INTP_ADDR); 164 jmr3927_ioc_reg_out(JMR3927_IOC_INTF_SOFT, JMR3927_IOC_INTP_ADDR);
401 165
402 if (have_isac) {
403 /* mask all ISAC interrupts */
404 jmr3927_isac_reg_out(0, JMR3927_ISAC_INTM_ADDR);
405 /* setup ISAC interrupt mode (ISAIRQ3,ISAIRQ5:Low Active ???) */
406 jmr3927_isac_reg_out(JMR3927_ISAC_INTF_IRQ3|JMR3927_ISAC_INTF_IRQ5, JMR3927_ISAC_INTP_ADDR);
407 }
408
409 /* clear PCI Soft interrupts */ 166 /* clear PCI Soft interrupts */
410 jmr3927_ioc_reg_out(0, JMR3927_IOC_INTS1_ADDR); 167 jmr3927_ioc_reg_out(0, JMR3927_IOC_INTS1_ADDR);
411 /* clear PCI Reset interrupts */ 168 /* clear PCI Reset interrupts */
@@ -415,21 +172,11 @@ void __init arch_init_irq(void)
415 tx3927_ircptr->cer = TX3927_IRCER_ICE; 172 tx3927_ircptr->cer = TX3927_IRCER_ICE;
416 tx3927_ircptr->imr = irc_elevel; 173 tx3927_ircptr->imr = irc_elevel;
417 174
418 jmr3927_irq_init(NR_ISA_IRQS); 175 jmr3927_irq_init();
419
420 /* setup irq space */
421 add_tb_irq_space(&jmr3927_isac_irqspace);
422 add_tb_irq_space(&jmr3927_ioc_irqspace);
423 add_tb_irq_space(&jmr3927_irc_irqspace);
424 176
425 /* setup IOC interrupt 1 (PCI, MODEM) */ 177 /* setup IOC interrupt 1 (PCI, MODEM) */
426 setup_irq(JMR3927_IRQ_IOCINT, &ioc_action); 178 setup_irq(JMR3927_IRQ_IOCINT, &ioc_action);
427 179
428 if (have_isac) {
429 setup_irq(JMR3927_IRQ_ISACINT, &isac_action);
430 setup_irq(JMR3927_IRQ_ISAC_ISAER, &isaerr_action);
431 }
432
433#ifdef CONFIG_PCI 180#ifdef CONFIG_PCI
434 setup_irq(JMR3927_IRQ_IRC_PCI, &pcierr_action); 181 setup_irq(JMR3927_IRQ_IRC_PCI, &pcierr_action);
435#endif 182#endif
@@ -438,21 +185,28 @@ void __init arch_init_irq(void)
438 set_c0_status(ST0_IM); /* IE bit is still 0. */ 185 set_c0_status(ST0_IM); /* IE bit is still 0. */
439} 186}
440 187
441static struct irq_chip jmr3927_irq_controller = { 188static struct irq_chip jmr3927_irq_ioc = {
442 .name = "jmr3927_irq", 189 .name = "jmr3927_ioc",
443 .ack = jmr3927_irq_ack, 190 .ack = mask_irq_ioc,
444 .mask = jmr3927_irq_disable, 191 .mask = mask_irq_ioc,
445 .mask_ack = jmr3927_irq_ack, 192 .mask_ack = mask_irq_ioc,
446 .unmask = jmr3927_irq_enable, 193 .unmask = unmask_irq_ioc,
447 .end = jmr3927_irq_end,
448}; 194};
449 195
450void jmr3927_irq_init(u32 irq_base) 196static struct irq_chip jmr3927_irq_irc = {
197 .name = "jmr3927_irc",
198 .ack = mask_irq_irc,
199 .mask = mask_irq_irc,
200 .mask_ack = mask_irq_irc,
201 .unmask = unmask_irq_irc,
202};
203
204static void __init jmr3927_irq_init(void)
451{ 205{
452 u32 i; 206 u32 i;
453 207
454 for (i= irq_base; i< irq_base + JMR3927_NR_IRQ_IRC + JMR3927_NR_IRQ_IOC; i++) 208 for (i = JMR3927_IRQ_IRC; i < JMR3927_IRQ_IRC + JMR3927_NR_IRQ_IRC; i++)
455 set_irq_chip(i, &jmr3927_irq_controller); 209 set_irq_chip_and_handler(i, &jmr3927_irq_irc, handle_level_irq);
456 210 for (i = JMR3927_IRQ_IOC; i < JMR3927_IRQ_IOC + JMR3927_NR_IRQ_IOC; i++)
457 jmr3927_irq_base = irq_base; 211 set_irq_chip_and_handler(i, &jmr3927_irq_ioc, handle_level_irq);
458} 212}
diff --git a/arch/mips/jmr3927/rbhma3100/kgdb_io.c b/arch/mips/jmr3927/rbhma3100/kgdb_io.c
index 269a42deae06..2604f2c9a96e 100644
--- a/arch/mips/jmr3927/rbhma3100/kgdb_io.c
+++ b/arch/mips/jmr3927/rbhma3100/kgdb_io.c
@@ -31,23 +31,12 @@
31 * 675 Mass Ave, Cambridge, MA 02139, USA. 31 * 675 Mass Ave, Cambridge, MA 02139, USA.
32 */ 32 */
33 33
34#include <linux/types.h>
35#include <asm/jmr3927/txx927.h>
36#include <asm/jmr3927/tx3927.h>
37#include <asm/jmr3927/jmr3927.h> 34#include <asm/jmr3927/jmr3927.h>
38 35
39#define TIMEOUT 0xffffff 36#define TIMEOUT 0xffffff
40#define SLOW_DOWN
41
42static const char digits[16] = "0123456789abcdef";
43
44#ifdef SLOW_DOWN
45#define slow_down() { int k; for (k=0; k<10000; k++); }
46#else
47#define slow_down()
48#endif
49 37
50static int remoteDebugInitialized = 0; 38static int remoteDebugInitialized = 0;
39static void debugInit(int baud)
51 40
52int putDebugChar(unsigned char c) 41int putDebugChar(unsigned char c)
53{ 42{
@@ -103,20 +92,8 @@ unsigned char getDebugChar(void)
103 return c; 92 return c;
104} 93}
105 94
106void debugInit(int baud) 95static void debugInit(int baud)
107{ 96{
108 /*
109 volatile unsigned long lcr;
110 volatile unsigned long dicr;
111 volatile unsigned long disr;
112 volatile unsigned long cisr;
113 volatile unsigned long fcr;
114 volatile unsigned long flcr;
115 volatile unsigned long bgr;
116 volatile unsigned long tfifo;
117 volatile unsigned long rfifo;
118 */
119
120 tx3927_sioptr(0)->lcr = 0x020; 97 tx3927_sioptr(0)->lcr = 0x020;
121 tx3927_sioptr(0)->dicr = 0; 98 tx3927_sioptr(0)->dicr = 0;
122 tx3927_sioptr(0)->disr = 0x4100; 99 tx3927_sioptr(0)->disr = 0x4100;
@@ -125,31 +102,4 @@ void debugInit(int baud)
125 tx3927_sioptr(0)->flcr = 0x02; 102 tx3927_sioptr(0)->flcr = 0x02;
126 tx3927_sioptr(0)->bgr = ((JMR3927_BASE_BAUD + baud / 2) / baud) | 103 tx3927_sioptr(0)->bgr = ((JMR3927_BASE_BAUD + baud / 2) / baud) |
127 TXx927_SIBGR_BCLK_T0; 104 TXx927_SIBGR_BCLK_T0;
128#if 0
129 /*
130 * Reset the UART.
131 */
132 tx3927_sioptr(0)->fcr = TXx927_SIFCR_SWRST;
133 while (tx3927_sioptr(0)->fcr & TXx927_SIFCR_SWRST)
134 ;
135
136 /*
137 * and set the speed of the serial port
138 * (currently hardwired to 9600 8N1
139 */
140
141 tx3927_sioptr(0)->lcr = TXx927_SILCR_UMODE_8BIT |
142 TXx927_SILCR_USBL_1BIT |
143 TXx927_SILCR_SCS_IMCLK_BG;
144 tx3927_sioptr(0)->bgr =
145 ((JMR3927_BASE_BAUD + baud / 2) / baud) |
146 TXx927_SIBGR_BCLK_T0;
147
148 /* HW RTS/CTS control */
149 if (ser->flags & ASYNC_HAVE_CTS_LINE)
150 tx3927_sioptr(0)->flcr = TXx927_SIFLCR_RCS | TXx927_SIFLCR_TES |
151 TXx927_SIFLCR_RTSTL_MAX /* 15 */;
152 /* Enable RX/TX */
153 tx3927_sioptr(0)->flcr &= ~(TXx927_SIFLCR_RSDE | TXx927_SIFLCR_TSDE);
154#endif
155} 105}
diff --git a/arch/mips/jmr3927/rbhma3100/setup.c b/arch/mips/jmr3927/rbhma3100/setup.c
index fc523bda068f..d1ef2895d564 100644
--- a/arch/mips/jmr3927/rbhma3100/setup.c
+++ b/arch/mips/jmr3927/rbhma3100/setup.c
@@ -54,87 +54,18 @@
54 54
55#include <asm/addrspace.h> 55#include <asm/addrspace.h>
56#include <asm/time.h> 56#include <asm/time.h>
57#include <asm/bcache.h>
58#include <asm/irq.h>
59#include <asm/reboot.h> 57#include <asm/reboot.h>
60#include <asm/gdb-stub.h>
61#include <asm/jmr3927/jmr3927.h> 58#include <asm/jmr3927/jmr3927.h>
62#include <asm/mipsregs.h> 59#include <asm/mipsregs.h>
63#include <asm/traps.h>
64 60
65extern void puts(unsigned char *cp); 61extern void puts(const char *cp);
66 62
67/* Tick Timer divider */ 63/* Tick Timer divider */
68#define JMR3927_TIMER_CCD 0 /* 1/2 */ 64#define JMR3927_TIMER_CCD 0 /* 1/2 */
69#define JMR3927_TIMER_CLK (JMR3927_IMCLK / (2 << JMR3927_TIMER_CCD)) 65#define JMR3927_TIMER_CLK (JMR3927_IMCLK / (2 << JMR3927_TIMER_CCD))
70 66
71unsigned char led_state = 0xf;
72
73struct {
74 struct resource ram0;
75 struct resource ram1;
76 struct resource pcimem;
77 struct resource iob;
78 struct resource ioc;
79 struct resource pciio;
80 struct resource jmy1394;
81 struct resource rom1;
82 struct resource rom0;
83 struct resource sio0;
84 struct resource sio1;
85} jmr3927_resources = {
86 {
87 .start = 0,
88 .end = 0x01FFFFFF,
89 .name = "RAM0",
90 .flags = IORESOURCE_MEM
91 }, {
92 .start = 0x02000000,
93 .end = 0x03FFFFFF,
94 .name = "RAM1",
95 .flags = IORESOURCE_MEM
96 }, {
97 .start = 0x08000000,
98 .end = 0x07FFFFFF,
99 .name = "PCIMEM",
100 .flags = IORESOURCE_MEM
101 }, {
102 .start = 0x10000000,
103 .end = 0x13FFFFFF,
104 .name = "IOB"
105 }, {
106 .start = 0x14000000,
107 .end = 0x14FFFFFF,
108 .name = "IOC"
109 }, {
110 .start = 0x15000000,
111 .end = 0x15FFFFFF,
112 .name = "PCIIO"
113 }, {
114 .start = 0x1D000000,
115 .end = 0x1D3FFFFF,
116 .name = "JMY1394"
117 }, {
118 .start = 0x1E000000,
119 .end = 0x1E3FFFFF,
120 .name = "ROM1"
121 }, {
122 .start = 0x1FC00000,
123 .end = 0x1FFFFFFF,
124 .name = "ROM0"
125 }, {
126 .start = 0xFFFEF300,
127 .end = 0xFFFEF3FF,
128 .name = "SIO0"
129 }, {
130 .start = 0xFFFEF400,
131 .end = 0xFFFEF4FF,
132 .name = "SIO1"
133 },
134};
135
136/* don't enable - see errata */ 67/* don't enable - see errata */
137int jmr3927_ccfg_toeon = 0; 68static int jmr3927_ccfg_toeon;
138 69
139static inline void do_reset(void) 70static inline void do_reset(void)
140{ 71{
@@ -173,9 +104,15 @@ static cycle_t jmr3927_hpt_read(void)
173 return jiffies * (JMR3927_TIMER_CLK / HZ) + jmr3927_tmrptr->trr; 104 return jiffies * (JMR3927_TIMER_CLK / HZ) + jmr3927_tmrptr->trr;
174} 105}
175 106
107static void jmr3927_timer_ack(void)
108{
109 jmr3927_tmrptr->tisr = 0; /* ack interrupt */
110}
111
176static void __init jmr3927_time_init(void) 112static void __init jmr3927_time_init(void)
177{ 113{
178 clocksource_mips.read = jmr3927_hpt_read; 114 clocksource_mips.read = jmr3927_hpt_read;
115 mips_timer_ack = jmr3927_timer_ack;
179 mips_hpt_frequency = JMR3927_TIMER_CLK; 116 mips_hpt_frequency = JMR3927_TIMER_CLK;
180} 117}
181 118
@@ -190,9 +127,6 @@ void __init plat_timer_setup(struct irqaction *irq)
190 setup_irq(JMR3927_IRQ_TICK, irq); 127 setup_irq(JMR3927_IRQ_TICK, irq);
191} 128}
192 129
193#define USECS_PER_JIFFY (1000000/HZ)
194
195//#undef DO_WRITE_THROUGH
196#define DO_WRITE_THROUGH 130#define DO_WRITE_THROUGH
197#define DO_ENABLE_CACHE 131#define DO_ENABLE_CACHE
198 132
@@ -224,12 +158,6 @@ void __init plat_mem_setup(void)
224 /* Reboot on panic */ 158 /* Reboot on panic */
225 panic_timeout = 180; 159 panic_timeout = 180;
226 160
227 {
228 unsigned int conf;
229 conf = read_c0_conf();
230 }
231
232#if 1
233 /* cache setup */ 161 /* cache setup */
234 { 162 {
235 unsigned int conf; 163 unsigned int conf;
@@ -256,16 +184,14 @@ void __init plat_mem_setup(void)
256 write_c0_conf(conf); 184 write_c0_conf(conf);
257 write_c0_cache(0); 185 write_c0_cache(0);
258 } 186 }
259#endif
260 187
261 /* initialize board */ 188 /* initialize board */
262 jmr3927_board_init(); 189 jmr3927_board_init();
263 190
264 argptr = prom_getcmdline(); 191 argptr = prom_getcmdline();
265 192
266 if ((argptr = strstr(argptr, "toeon")) != NULL) { 193 if ((argptr = strstr(argptr, "toeon")) != NULL)
267 jmr3927_ccfg_toeon = 1; 194 jmr3927_ccfg_toeon = 1;
268 }
269 argptr = prom_getcmdline(); 195 argptr = prom_getcmdline();
270 if ((argptr = strstr(argptr, "ip=")) == NULL) { 196 if ((argptr = strstr(argptr, "ip=")) == NULL) {
271 argptr = prom_getcmdline(); 197 argptr = prom_getcmdline();
@@ -281,7 +207,7 @@ void __init plat_mem_setup(void)
281 memset(&req, 0, sizeof(req)); 207 memset(&req, 0, sizeof(req));
282 req.line = i; 208 req.line = i;
283 req.iotype = UPIO_MEM; 209 req.iotype = UPIO_MEM;
284 req.membase = (char *)TX3927_SIO_REG(i); 210 req.membase = (unsigned char __iomem *)TX3927_SIO_REG(i);
285 req.mapbase = TX3927_SIO_REG(i); 211 req.mapbase = TX3927_SIO_REG(i);
286 req.irq = i == 0 ? 212 req.irq = i == 0 ?
287 JMR3927_IRQ_IRC_SIO0 : JMR3927_IRQ_IRC_SIO1; 213 JMR3927_IRQ_IRC_SIO0 : JMR3927_IRQ_IRC_SIO1;
@@ -303,65 +229,33 @@ void __init plat_mem_setup(void)
303 229
304static void tx3927_setup(void); 230static void tx3927_setup(void);
305 231
306#ifdef CONFIG_PCI
307unsigned long mips_pci_io_base;
308unsigned long mips_pci_io_size;
309unsigned long mips_pci_mem_base;
310unsigned long mips_pci_mem_size;
311/* for legacy I/O, PCI I/O PCI Bus address must be 0 */
312unsigned long mips_pci_io_pciaddr = 0;
313#endif
314
315static void __init jmr3927_board_init(void) 232static void __init jmr3927_board_init(void)
316{ 233{
317 char *argptr;
318
319#ifdef CONFIG_PCI
320 mips_pci_io_base = JMR3927_PCIIO;
321 mips_pci_io_size = JMR3927_PCIIO_SIZE;
322 mips_pci_mem_base = JMR3927_PCIMEM;
323 mips_pci_mem_size = JMR3927_PCIMEM_SIZE;
324#endif
325
326 tx3927_setup(); 234 tx3927_setup();
327 235
328 if (jmr3927_have_isac()) {
329
330#ifdef CONFIG_FB_E1355
331 argptr = prom_getcmdline();
332 if ((argptr = strstr(argptr, "video=")) == NULL) {
333 argptr = prom_getcmdline();
334 strcat(argptr, " video=e1355fb:crt16h");
335 }
336#endif
337
338#ifdef CONFIG_BLK_DEV_IDE
339 /* overrides PCI-IDE */
340#endif
341 }
342
343 /* SIO0 DTR on */ 236 /* SIO0 DTR on */
344 jmr3927_ioc_reg_out(0, JMR3927_IOC_DTR_ADDR); 237 jmr3927_ioc_reg_out(0, JMR3927_IOC_DTR_ADDR);
345 238
346 jmr3927_led_set(0); 239 jmr3927_led_set(0);
347 240
348
349 if (jmr3927_have_isac())
350 jmr3927_io_led_set(0);
351 printk("JMR-TX3927 (Rev %d) --- IOC(Rev %d) DIPSW:%d,%d,%d,%d\n", 241 printk("JMR-TX3927 (Rev %d) --- IOC(Rev %d) DIPSW:%d,%d,%d,%d\n",
352 jmr3927_ioc_reg_in(JMR3927_IOC_BREV_ADDR) & JMR3927_REV_MASK, 242 jmr3927_ioc_reg_in(JMR3927_IOC_BREV_ADDR) & JMR3927_REV_MASK,
353 jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR) & JMR3927_REV_MASK, 243 jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR) & JMR3927_REV_MASK,
354 jmr3927_dipsw1(), jmr3927_dipsw2(), 244 jmr3927_dipsw1(), jmr3927_dipsw2(),
355 jmr3927_dipsw3(), jmr3927_dipsw4()); 245 jmr3927_dipsw3(), jmr3927_dipsw4());
356 if (jmr3927_have_isac())
357 printk("JMI-3927IO2 --- ISAC(Rev %d) DIPSW:%01x\n",
358 jmr3927_isac_reg_in(JMR3927_ISAC_REV_ADDR) & JMR3927_REV_MASK,
359 jmr3927_io_dipsw());
360} 246}
361 247
362void __init tx3927_setup(void) 248static void __init tx3927_setup(void)
363{ 249{
364 int i; 250 int i;
251#ifdef CONFIG_PCI
252 unsigned long mips_pci_io_base = JMR3927_PCIIO;
253 unsigned long mips_pci_io_size = JMR3927_PCIIO_SIZE;
254 unsigned long mips_pci_mem_base = JMR3927_PCIMEM;
255 unsigned long mips_pci_mem_size = JMR3927_PCIMEM_SIZE;
256 /* for legacy I/O, PCI I/O PCI Bus address must be 0 */
257 unsigned long mips_pci_io_pciaddr = 0;
258#endif
365 259
366 /* SDRAMC are configured by PROM */ 260 /* SDRAMC are configured by PROM */
367 261
@@ -475,10 +369,8 @@ void __init tx3927_setup(void)
475 tx3927_pcicptr->mbas = ~(mips_pci_mem_size - 1); 369 tx3927_pcicptr->mbas = ~(mips_pci_mem_size - 1);
476 tx3927_pcicptr->mba = 0; 370 tx3927_pcicptr->mba = 0;
477 tx3927_pcicptr->tlbmma = 0; 371 tx3927_pcicptr->tlbmma = 0;
478#ifndef JMR3927_INIT_INDIRECT_PCI
479 /* Enable Direct mapping Address Space Decoder */ 372 /* Enable Direct mapping Address Space Decoder */
480 tx3927_pcicptr->lbc |= TX3927_PCIC_LBC_ILMDE | TX3927_PCIC_LBC_ILIDE; 373 tx3927_pcicptr->lbc |= TX3927_PCIC_LBC_ILMDE | TX3927_PCIC_LBC_ILIDE;
481#endif
482 374
483 /* Clear All Local Bus Status */ 375 /* Clear All Local Bus Status */
484 tx3927_pcicptr->lbstat = TX3927_PCIC_LBIM_ALL; 376 tx3927_pcicptr->lbstat = TX3927_PCIC_LBIM_ALL;
@@ -491,22 +383,15 @@ void __init tx3927_setup(void)
491 383
492 /* PCIC Int => IRC IRQ10 */ 384 /* PCIC Int => IRC IRQ10 */
493 tx3927_pcicptr->il = TX3927_IR_PCI; 385 tx3927_pcicptr->il = TX3927_IR_PCI;
494#if 1
495 /* Target Control (per errata) */ 386 /* Target Control (per errata) */
496 tx3927_pcicptr->tc = TX3927_PCIC_TC_OF8E | TX3927_PCIC_TC_IF8E; 387 tx3927_pcicptr->tc = TX3927_PCIC_TC_OF8E | TX3927_PCIC_TC_IF8E;
497#endif
498 388
499 /* Enable Bus Arbiter */ 389 /* Enable Bus Arbiter */
500#if 0
501 tx3927_pcicptr->req_trace = 0x73737373;
502#endif
503 tx3927_pcicptr->pbapmc = TX3927_PCIC_PBAPMC_PBAEN; 390 tx3927_pcicptr->pbapmc = TX3927_PCIC_PBAPMC_PBAEN;
504 391
505 tx3927_pcicptr->pcicmd = PCI_COMMAND_MASTER | 392 tx3927_pcicptr->pcicmd = PCI_COMMAND_MASTER |
506 PCI_COMMAND_MEMORY | 393 PCI_COMMAND_MEMORY |
507#if 1
508 PCI_COMMAND_IO | 394 PCI_COMMAND_IO |
509#endif
510 PCI_COMMAND_PARITY | PCI_COMMAND_SERR; 395 PCI_COMMAND_PARITY | PCI_COMMAND_SERR;
511 } 396 }
512#endif /* CONFIG_PCI */ 397#endif /* CONFIG_PCI */
@@ -555,8 +440,6 @@ static int __init jmr3927_rtc_init(void)
555 .flags = IORESOURCE_MEM, 440 .flags = IORESOURCE_MEM,
556 }; 441 };
557 struct platform_device *dev; 442 struct platform_device *dev;
558 if (!jmr3927_have_nvram())
559 return -ENODEV;
560 dev = platform_device_register_simple("ds1742", -1, &res, 1); 443 dev = platform_device_register_simple("ds1742", -1, &res, 1);
561 return IS_ERR(dev) ? PTR_ERR(dev) : 0; 444 return IS_ERR(dev) ? PTR_ERR(dev) : 0;
562} 445}
diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c
index 222de465db73..761a779d5c4f 100644
--- a/arch/mips/kernel/asm-offsets.c
+++ b/arch/mips/kernel/asm-offsets.c
@@ -102,7 +102,6 @@ void output_thread_info_defines(void)
102 offset("#define TI_ADDR_LIMIT ", struct thread_info, addr_limit); 102 offset("#define TI_ADDR_LIMIT ", struct thread_info, addr_limit);
103 offset("#define TI_RESTART_BLOCK ", struct thread_info, restart_block); 103 offset("#define TI_RESTART_BLOCK ", struct thread_info, restart_block);
104 offset("#define TI_REGS ", struct thread_info, regs); 104 offset("#define TI_REGS ", struct thread_info, regs);
105 constant("#define _THREAD_SIZE_ORDER ", THREAD_SIZE_ORDER);
106 constant("#define _THREAD_SIZE ", THREAD_SIZE); 105 constant("#define _THREAD_SIZE ", THREAD_SIZE);
107 constant("#define _THREAD_MASK ", THREAD_MASK); 106 constant("#define _THREAD_MASK ", THREAD_MASK);
108 linefeed; 107 linefeed;
diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c
index 9c79703979b2..2345160e63fc 100644
--- a/arch/mips/kernel/i8259.c
+++ b/arch/mips/kernel/i8259.c
@@ -328,8 +328,8 @@ void __init init_i8259_irqs (void)
328{ 328{
329 int i; 329 int i;
330 330
331 request_resource(&ioport_resource, &pic1_io_resource); 331 insert_resource(&ioport_resource, &pic1_io_resource);
332 request_resource(&ioport_resource, &pic2_io_resource); 332 insert_resource(&ioport_resource, &pic2_io_resource);
333 333
334 init_8259A(0); 334 init_8259A(0);
335 335
diff --git a/arch/mips/kernel/kspd.c b/arch/mips/kernel/kspd.c
index 29eadd404fa5..c6580018c94b 100644
--- a/arch/mips/kernel/kspd.c
+++ b/arch/mips/kernel/kspd.c
@@ -17,6 +17,7 @@
17 */ 17 */
18#include <linux/kernel.h> 18#include <linux/kernel.h>
19#include <linux/module.h> 19#include <linux/module.h>
20#include <linux/sched.h>
20#include <linux/unistd.h> 21#include <linux/unistd.h>
21#include <linux/file.h> 22#include <linux/file.h>
22#include <linux/fs.h> 23#include <linux/fs.h>
@@ -198,7 +199,6 @@ void sp_work_handle_request(void)
198 int cmd; 199 int cmd;
199 200
200 char *vcwd; 201 char *vcwd;
201 mm_segment_t old_fs;
202 int size; 202 int size;
203 203
204 ret.retval = -1; 204 ret.retval = -1;
@@ -241,8 +241,6 @@ void sp_work_handle_request(void)
241 if ((ret.retval = sp_syscall(__NR_gettimeofday, (int)&tv, 241 if ((ret.retval = sp_syscall(__NR_gettimeofday, (int)&tv,
242 (int)&tz, 0,0)) == 0) 242 (int)&tz, 0,0)) == 0)
243 ret.retval = tv.tv_sec; 243 ret.retval = tv.tv_sec;
244
245 ret.errno = errno;
246 break; 244 break;
247 245
248 case MTSP_SYSCALL_EXIT: 246 case MTSP_SYSCALL_EXIT:
@@ -279,7 +277,6 @@ void sp_work_handle_request(void)
279 if (cmd >= 0) { 277 if (cmd >= 0) {
280 ret.retval = sp_syscall(cmd, generic.arg0, generic.arg1, 278 ret.retval = sp_syscall(cmd, generic.arg0, generic.arg1,
281 generic.arg2, generic.arg3); 279 generic.arg2, generic.arg3);
282 ret.errno = errno;
283 } else 280 } else
284 printk(KERN_WARNING 281 printk(KERN_WARNING
285 "KSPD: Unknown SP syscall number %d\n", sc.cmd); 282 "KSPD: Unknown SP syscall number %d\n", sc.cmd);
diff --git a/arch/mips/kernel/rtlx.c b/arch/mips/kernel/rtlx.c
index e6e3047151a6..bfc8ca168f83 100644
--- a/arch/mips/kernel/rtlx.c
+++ b/arch/mips/kernel/rtlx.c
@@ -289,7 +289,7 @@ unsigned int rtlx_write_poll(int index)
289 return write_spacefree(chan->rt_read, chan->rt_write, chan->buffer_size); 289 return write_spacefree(chan->rt_read, chan->rt_write, chan->buffer_size);
290} 290}
291 291
292ssize_t rtlx_read(int index, void __user *buff, size_t count, int user) 292ssize_t rtlx_read(int index, void __user *buff, size_t count)
293{ 293{
294 size_t lx_write, fl = 0L; 294 size_t lx_write, fl = 0L;
295 struct rtlx_channel *lx; 295 struct rtlx_channel *lx;
@@ -331,9 +331,10 @@ out:
331 return count; 331 return count;
332} 332}
333 333
334ssize_t rtlx_write(int index, const void __user *buffer, size_t count, int user) 334ssize_t rtlx_write(int index, const void __user *buffer, size_t count)
335{ 335{
336 struct rtlx_channel *rt; 336 struct rtlx_channel *rt;
337 unsigned long failed;
337 size_t rt_read; 338 size_t rt_read;
338 size_t fl; 339 size_t fl;
339 340
@@ -363,7 +364,7 @@ ssize_t rtlx_write(int index, const void __user *buffer, size_t count, int user)
363 } 364 }
364 365
365out: 366out:
366 count -= cailed; 367 count -= failed;
367 368
368 smp_wmb(); 369 smp_wmb();
369 rt->rt_write = (rt->rt_write + count) % rt->buffer_size; 370 rt->rt_write = (rt->rt_write + count) % rt->buffer_size;
diff --git a/arch/mips/mips-boards/generic/display.c b/arch/mips/mips-boards/generic/display.c
index f653946afc23..548dbe5ce7c8 100644
--- a/arch/mips/mips-boards/generic/display.c
+++ b/arch/mips/mips-boards/generic/display.c
@@ -24,16 +24,16 @@
24 24
25void mips_display_message(const char *str) 25void mips_display_message(const char *str)
26{ 26{
27 static volatile unsigned int *display = NULL; 27 static unsigned int __iomem *display = NULL;
28 int i; 28 int i;
29 29
30 if (unlikely(display == NULL)) 30 if (unlikely(display == NULL))
31 display = (volatile unsigned int *)ioremap(ASCII_DISPLAY_POS_BASE, 16*sizeof(int)); 31 display = ioremap(ASCII_DISPLAY_POS_BASE, 16*sizeof(int));
32 32
33 for (i = 0; i <= 14; i=i+2) { 33 for (i = 0; i <= 14; i=i+2) {
34 if (*str) 34 if (*str)
35 display[i] = *str++; 35 writel(*str++, display + i);
36 else 36 else
37 display[i] = ' '; 37 writel(' ', display + i);
38 } 38 }
39} 39}
diff --git a/arch/mips/mips-boards/generic/pci.c b/arch/mips/mips-boards/generic/pci.c
index 3192a14698c8..f98d60f78658 100644
--- a/arch/mips/mips-boards/generic/pci.c
+++ b/arch/mips/mips-boards/generic/pci.c
@@ -65,7 +65,7 @@ static struct resource msc_io_resource = {
65}; 65};
66 66
67extern struct pci_ops bonito64_pci_ops; 67extern struct pci_ops bonito64_pci_ops;
68extern struct pci_ops gt64120_pci_ops; 68extern struct pci_ops gt64xxx_pci0_ops;
69extern struct pci_ops msc_pci_ops; 69extern struct pci_ops msc_pci_ops;
70 70
71static struct pci_controller bonito64_controller = { 71static struct pci_controller bonito64_controller = {
@@ -76,7 +76,7 @@ static struct pci_controller bonito64_controller = {
76}; 76};
77 77
78static struct pci_controller gt64120_controller = { 78static struct pci_controller gt64120_controller = {
79 .pci_ops = &gt64120_pci_ops, 79 .pci_ops = &gt64xxx_pci0_ops,
80 .io_resource = &gt64120_io_resource, 80 .io_resource = &gt64120_io_resource,
81 .mem_resource = &gt64120_mem_resource, 81 .mem_resource = &gt64120_mem_resource,
82}; 82};
diff --git a/arch/mips/mips-boards/generic/reset.c b/arch/mips/mips-boards/generic/reset.c
index 0996ba368b2a..7a1bb51f81ee 100644
--- a/arch/mips/mips-boards/generic/reset.c
+++ b/arch/mips/mips-boards/generic/reset.c
@@ -39,24 +39,24 @@ static void atlas_machine_power_off(void);
39 39
40static void mips_machine_restart(char *command) 40static void mips_machine_restart(char *command)
41{ 41{
42 volatile unsigned int *softres_reg = (unsigned int *)ioremap (SOFTRES_REG, sizeof(unsigned int)); 42 unsigned int __iomem *softres_reg = ioremap(SOFTRES_REG, sizeof(unsigned int));
43 43
44 *softres_reg = GORESET; 44 writew(GORESET, softres_reg);
45} 45}
46 46
47static void mips_machine_halt(void) 47static void mips_machine_halt(void)
48{ 48{
49 volatile unsigned int *softres_reg = (unsigned int *)ioremap (SOFTRES_REG, sizeof(unsigned int)); 49 unsigned int __iomem *softres_reg = ioremap(SOFTRES_REG, sizeof(unsigned int));
50 50
51 *softres_reg = GORESET; 51 writew(GORESET, softres_reg);
52} 52}
53 53
54#if defined(CONFIG_MIPS_ATLAS) 54#if defined(CONFIG_MIPS_ATLAS)
55static void atlas_machine_power_off(void) 55static void atlas_machine_power_off(void)
56{ 56{
57 volatile unsigned int *psustby_reg = (unsigned int *)ioremap(ATLAS_PSUSTBY_REG, sizeof(unsigned int)); 57 unsigned int __iomem *psustby_reg = ioremap(ATLAS_PSUSTBY_REG, sizeof(unsigned int));
58 58
59 *psustby_reg = ATLAS_GOSTBY; 59 writew(ATLAS_GOSTBY, psustby_reg);
60} 60}
61#endif 61#endif
62 62
diff --git a/arch/mips/mips-boards/malta/malta_int.c b/arch/mips/mips-boards/malta/malta_int.c
index 3c206bb17160..83d76025d61d 100644
--- a/arch/mips/mips-boards/malta/malta_int.c
+++ b/arch/mips/mips-boards/malta/malta_int.c
@@ -42,8 +42,6 @@
42#include <asm/mips-boards/msc01_pci.h> 42#include <asm/mips-boards/msc01_pci.h>
43#include <asm/msc01_ic.h> 43#include <asm/msc01_ic.h>
44 44
45extern void mips_timer_interrupt(void);
46
47static DEFINE_SPINLOCK(mips_irq_lock); 45static DEFINE_SPINLOCK(mips_irq_lock);
48 46
49static inline int mips_pcibios_iack(void) 47static inline int mips_pcibios_iack(void)
@@ -85,7 +83,7 @@ static inline int mips_pcibios_iack(void)
85 dummy = BONITO_PCIMAP_CFG; 83 dummy = BONITO_PCIMAP_CFG;
86 iob(); /* sync */ 84 iob(); /* sync */
87 85
88 irq = *(volatile u32 *)(_pcictrl_bonito_pcicfg); 86 irq = readl((u32 *)_pcictrl_bonito_pcicfg);
89 iob(); /* sync */ 87 iob(); /* sync */
90 irq &= 0xff; 88 irq &= 0xff;
91 BONITO_PCIMAP_CFG = 0; 89 BONITO_PCIMAP_CFG = 0;
diff --git a/arch/mips/mips-boards/malta/malta_setup.c b/arch/mips/mips-boards/malta/malta_setup.c
index 56ea76679cd4..7873932532a1 100644
--- a/arch/mips/mips-boards/malta/malta_setup.c
+++ b/arch/mips/mips-boards/malta/malta_setup.c
@@ -145,7 +145,8 @@ void __init plat_mem_setup(void)
145#ifdef CONFIG_BLK_DEV_IDE 145#ifdef CONFIG_BLK_DEV_IDE
146 /* Check PCI clock */ 146 /* Check PCI clock */
147 { 147 {
148 int jmpr = (*((volatile unsigned int *)ioremap(MALTA_JMPRS_REG, sizeof(unsigned int))) >> 2) & 0x07; 148 unsigned int __iomem *jmpr_p = (unsigned int *) ioremap(MALTA_JMPRS_REG, sizeof(unsigned int));
149 int jmpr = (readw(jmpr_p) >> 2) & 0x07;
149 static const int pciclocks[] __initdata = { 150 static const int pciclocks[] __initdata = {
150 33, 20, 25, 30, 12, 16, 37, 10 151 33, 20, 25, 30, 12, 16, 37, 10
151 }; 152 };
@@ -179,7 +180,6 @@ void __init plat_mem_setup(void)
179 }; 180 };
180#endif 181#endif
181#endif 182#endif
182
183 mips_reboot_setup(); 183 mips_reboot_setup();
184 184
185 board_time_init = mips_time_init; 185 board_time_init = mips_time_init;
diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c
index 4e8f1b683376..abf99b1eba13 100644
--- a/arch/mips/mm/cache.c
+++ b/arch/mips/mm/cache.c
@@ -96,7 +96,7 @@ void __flush_anon_page(struct page *page, unsigned long vmaddr)
96 96
97 kaddr = kmap_coherent(page, vmaddr); 97 kaddr = kmap_coherent(page, vmaddr);
98 flush_data_cache_page((unsigned long)kaddr); 98 flush_data_cache_page((unsigned long)kaddr);
99 kunmap_coherent(kaddr); 99 kunmap_coherent();
100 } 100 }
101} 101}
102 102
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c
index e9951c0e689f..2d1c2c024822 100644
--- a/arch/mips/mm/init.c
+++ b/arch/mips/mm/init.c
@@ -177,7 +177,7 @@ void *kmap_coherent(struct page *page, unsigned long addr)
177 177
178#define UNIQUE_ENTRYHI(idx) (CKSEG0 + ((idx) << (PAGE_SHIFT + 1))) 178#define UNIQUE_ENTRYHI(idx) (CKSEG0 + ((idx) << (PAGE_SHIFT + 1)))
179 179
180void kunmap_coherent(struct page *page) 180void kunmap_coherent(void)
181{ 181{
182#ifndef CONFIG_MIPS_MT_SMTC 182#ifndef CONFIG_MIPS_MT_SMTC
183 unsigned int wired; 183 unsigned int wired;
@@ -210,7 +210,7 @@ void copy_user_highpage(struct page *to, struct page *from,
210 if (cpu_has_dc_aliases) { 210 if (cpu_has_dc_aliases) {
211 vfrom = kmap_coherent(from, vaddr); 211 vfrom = kmap_coherent(from, vaddr);
212 copy_page(vto, vfrom); 212 copy_page(vto, vfrom);
213 kunmap_coherent(from); 213 kunmap_coherent();
214 } else { 214 } else {
215 vfrom = kmap_atomic(from, KM_USER0); 215 vfrom = kmap_atomic(from, KM_USER0);
216 copy_page(vto, vfrom); 216 copy_page(vto, vfrom);
@@ -233,7 +233,7 @@ void copy_to_user_page(struct vm_area_struct *vma,
233 if (cpu_has_dc_aliases) { 233 if (cpu_has_dc_aliases) {
234 void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); 234 void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
235 memcpy(vto, src, len); 235 memcpy(vto, src, len);
236 kunmap_coherent(page); 236 kunmap_coherent();
237 } else 237 } else
238 memcpy(dst, src, len); 238 memcpy(dst, src, len);
239 if ((vma->vm_flags & VM_EXEC) && !cpu_has_ic_fills_f_dc) 239 if ((vma->vm_flags & VM_EXEC) && !cpu_has_ic_fills_f_dc)
@@ -250,7 +250,7 @@ void copy_from_user_page(struct vm_area_struct *vma,
250 void *vfrom = 250 void *vfrom =
251 kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); 251 kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
252 memcpy(dst, vfrom, len); 252 memcpy(dst, vfrom, len);
253 kunmap_coherent(page); 253 kunmap_coherent();
254 } else 254 } else
255 memcpy(dst, src, len); 255 memcpy(dst, src, len);
256} 256}
@@ -351,18 +351,15 @@ void __init paging_init(void)
351#endif 351#endif
352 kmap_coherent_init(); 352 kmap_coherent_init();
353 353
354#ifdef CONFIG_ISA 354#ifdef CONFIG_ZONE_DMA
355 if (max_low_pfn >= MAX_DMA_PFN) 355 if (min_low_pfn < MAX_DMA_PFN && MAX_DMA_PFN <= max_low_pfn) {
356 if (min_low_pfn >= MAX_DMA_PFN) { 356 zones_size[ZONE_DMA] = MAX_DMA_PFN - min_low_pfn;
357 zones_size[ZONE_DMA] = 0; 357 zones_size[ZONE_NORMAL] = max_low_pfn - MAX_DMA_PFN;
358 zones_size[ZONE_NORMAL] = max_low_pfn - min_low_pfn; 358 } else if (max_low_pfn < MAX_DMA_PFN)
359 } else { 359 zones_size[ZONE_DMA] = max_low_pfn - min_low_pfn;
360 zones_size[ZONE_DMA] = MAX_DMA_PFN - min_low_pfn;
361 zones_size[ZONE_NORMAL] = max_low_pfn - MAX_DMA_PFN;
362 }
363 else 360 else
364#endif 361#endif
365 zones_size[ZONE_DMA] = max_low_pfn - min_low_pfn; 362 zones_size[ZONE_NORMAL] = max_low_pfn - min_low_pfn;
366 363
367#ifdef CONFIG_HIGHMEM 364#ifdef CONFIG_HIGHMEM
368 zones_size[ZONE_HIGHMEM] = highend_pfn - highstart_pfn; 365 zones_size[ZONE_HIGHMEM] = highend_pfn - highstart_pfn;
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index bf85995ca042..df487c063b1d 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -8,8 +8,7 @@ obj-y += pci.o pci-dac.o
8# PCI bus host bridge specific code 8# PCI bus host bridge specific code
9# 9#
10obj-$(CONFIG_MIPS_BONITO64) += ops-bonito64.o 10obj-$(CONFIG_MIPS_BONITO64) += ops-bonito64.o
11obj-$(CONFIG_MIPS_GT64111) += ops-gt64111.o 11obj-$(CONFIG_PCI_GT64XXX_PCI0) += ops-gt64xxx_pci0.o
12obj-$(CONFIG_MIPS_GT64120) += ops-gt64120.o
13obj-$(CONFIG_PCI_MARVELL) += ops-marvell.o 12obj-$(CONFIG_PCI_MARVELL) += ops-marvell.o
14obj-$(CONFIG_MIPS_MSC) += ops-msc.o 13obj-$(CONFIG_MIPS_MSC) += ops-msc.o
15obj-$(CONFIG_MIPS_NILE4) += ops-nile4.o 14obj-$(CONFIG_MIPS_NILE4) += ops-nile4.o
diff --git a/arch/mips/pci/fixup-jmr3927.c b/arch/mips/pci/fixup-jmr3927.c
index 6e72d213f4cd..73d18503517c 100644
--- a/arch/mips/pci/fixup-jmr3927.c
+++ b/arch/mips/pci/fixup-jmr3927.c
@@ -29,7 +29,6 @@
29 */ 29 */
30#include <linux/types.h> 30#include <linux/types.h>
31#include <linux/pci.h> 31#include <linux/pci.h>
32#include <linux/kernel.h>
33#include <linux/init.h> 32#include <linux/init.h>
34 33
35#include <asm/jmr3927/jmr3927.h> 34#include <asm/jmr3927/jmr3927.h>
@@ -81,14 +80,8 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
81 80
82 /* Check OnBoard Ethernet (IDSEL=A24, DevNu=13) */ 81 /* Check OnBoard Ethernet (IDSEL=A24, DevNu=13) */
83 if (dev->bus->parent == NULL && 82 if (dev->bus->parent == NULL &&
84 slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(24)) { 83 slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(24))
85 extern int jmr3927_ether1_irq; 84 irq = JMR3927_IRQ_ETHER0;
86 /* check this irq line was reserved for ether1 */
87 if (jmr3927_ether1_irq != JMR3927_IRQ_ETHER0)
88 irq = JMR3927_IRQ_ETHER0;
89 else
90 irq = 0; /* disable */
91 }
92 return irq; 85 return irq;
93} 86}
94 87
diff --git a/arch/mips/pci/ops-gt64111.c b/arch/mips/pci/ops-gt64111.c
deleted file mode 100644
index ecd3991bd0e4..000000000000
--- a/arch/mips/pci/ops-gt64111.c
+++ /dev/null
@@ -1,100 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1995, 1996, 1997, 2002 by Ralf Baechle
7 * Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
8 */
9#include <linux/types.h>
10#include <linux/pci.h>
11#include <linux/kernel.h>
12#include <linux/init.h>
13
14#include <asm/pci.h>
15#include <asm/io.h>
16#include <asm/gt64120.h>
17
18#include <asm/mach-cobalt/cobalt.h>
19
20/*
21 * Device 31 on the GT64111 is used to generate PCI special
22 * cycles, so we shouldn't expected to find a device there ...
23 */
24static inline int pci_range_ck(struct pci_bus *bus, unsigned int devfn)
25{
26 if (bus->number == 0 && PCI_SLOT(devfn) < 31)
27 return 0;
28
29 return -1;
30}
31
32static int gt64111_pci_read_config(struct pci_bus *bus, unsigned int devfn,
33 int where, int size, u32 * val)
34{
35 if (pci_range_ck(bus, devfn))
36 return PCIBIOS_DEVICE_NOT_FOUND;
37
38 switch (size) {
39 case 4:
40 PCI_CFG_SET(devfn, where);
41 *val = GT_READ(GT_PCI0_CFGDATA_OFS);
42 return PCIBIOS_SUCCESSFUL;
43
44 case 2:
45 PCI_CFG_SET(devfn, (where & ~0x3));
46 *val = GT_READ(GT_PCI0_CFGDATA_OFS)
47 >> ((where & 3) * 8);
48 return PCIBIOS_SUCCESSFUL;
49
50 case 1:
51 PCI_CFG_SET(devfn, (where & ~0x3));
52 *val = GT_READ(GT_PCI0_CFGDATA_OFS)
53 >> ((where & 3) * 8);
54 return PCIBIOS_SUCCESSFUL;
55 }
56
57 return PCIBIOS_BAD_REGISTER_NUMBER;
58}
59
60static int gt64111_pci_write_config(struct pci_bus *bus, unsigned int devfn,
61 int where, int size, u32 val)
62{
63 u32 tmp;
64
65 if (pci_range_ck(bus, devfn))
66 return PCIBIOS_DEVICE_NOT_FOUND;
67
68 switch (size) {
69 case 4:
70 PCI_CFG_SET(devfn, where);
71 GT_WRITE(GT_PCI0_CFGDATA_OFS, val);
72
73 return PCIBIOS_SUCCESSFUL;
74
75 case 2:
76 PCI_CFG_SET(devfn, (where & ~0x3));
77 tmp = GT_READ(GT_PCI0_CFGDATA_OFS);
78 tmp &= ~(0xffff << ((where & 0x3) * 8));
79 tmp |= (val << ((where & 0x3) * 8));
80 GT_WRITE(GT_PCI0_CFGDATA_OFS, tmp);
81
82 return PCIBIOS_SUCCESSFUL;
83
84 case 1:
85 PCI_CFG_SET(devfn, (where & ~0x3));
86 tmp = GT_READ(GT_PCI0_CFGDATA_OFS);
87 tmp &= ~(0xff << ((where & 0x3) * 8));
88 tmp |= (val << ((where & 0x3) * 8));
89 GT_WRITE(GT_PCI0_CFGDATA_OFS, tmp);
90
91 return PCIBIOS_SUCCESSFUL;
92 }
93
94 return PCIBIOS_BAD_REGISTER_NUMBER;
95}
96
97struct pci_ops gt64111_pci_ops = {
98 .read = gt64111_pci_read_config,
99 .write = gt64111_pci_write_config,
100};
diff --git a/arch/mips/pci/ops-gt64120.c b/arch/mips/pci/ops-gt64xxx_pci0.c
index 6335844d607a..3d896c5f413f 100644
--- a/arch/mips/pci/ops-gt64120.c
+++ b/arch/mips/pci/ops-gt64xxx_pci0.c
@@ -39,8 +39,8 @@
39#define PCI_CFG_TYPE1_DEV_SHF 11 39#define PCI_CFG_TYPE1_DEV_SHF 11
40#define PCI_CFG_TYPE1_BUS_SHF 16 40#define PCI_CFG_TYPE1_BUS_SHF 16
41 41
42static int gt64120_pcibios_config_access(unsigned char access_type, 42static int gt64xxx_pci0_pcibios_config_access(unsigned char access_type,
43 struct pci_bus *bus, unsigned int devfn, int where, u32 * data) 43 struct pci_bus *bus, unsigned int devfn, int where, u32 * data)
44{ 44{
45 unsigned char busnum = bus->number; 45 unsigned char busnum = bus->number;
46 u32 intr; 46 u32 intr;
@@ -100,13 +100,13 @@ static int gt64120_pcibios_config_access(unsigned char access_type,
100 * We can't address 8 and 16 bit words directly. Instead we have to 100 * We can't address 8 and 16 bit words directly. Instead we have to
101 * read/write a 32bit word and mask/modify the data we actually want. 101 * read/write a 32bit word and mask/modify the data we actually want.
102 */ 102 */
103static int gt64120_pcibios_read(struct pci_bus *bus, unsigned int devfn, 103static int gt64xxx_pci0_pcibios_read(struct pci_bus *bus, unsigned int devfn,
104 int where, int size, u32 * val) 104 int where, int size, u32 * val)
105{ 105{
106 u32 data = 0; 106 u32 data = 0;
107 107
108 if (gt64120_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where, 108 if (gt64xxx_pci0_pcibios_config_access(PCI_ACCESS_READ, bus, devfn,
109 &data)) 109 where, &data))
110 return PCIBIOS_DEVICE_NOT_FOUND; 110 return PCIBIOS_DEVICE_NOT_FOUND;
111 111
112 if (size == 1) 112 if (size == 1)
@@ -119,16 +119,16 @@ static int gt64120_pcibios_read(struct pci_bus *bus, unsigned int devfn,
119 return PCIBIOS_SUCCESSFUL; 119 return PCIBIOS_SUCCESSFUL;
120} 120}
121 121
122static int gt64120_pcibios_write(struct pci_bus *bus, unsigned int devfn, 122static int gt64xxx_pci0_pcibios_write(struct pci_bus *bus, unsigned int devfn,
123 int where, int size, u32 val) 123 int where, int size, u32 val)
124{ 124{
125 u32 data = 0; 125 u32 data = 0;
126 126
127 if (size == 4) 127 if (size == 4)
128 data = val; 128 data = val;
129 else { 129 else {
130 if (gt64120_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, 130 if (gt64xxx_pci0_pcibios_config_access(PCI_ACCESS_READ, bus,
131 where, &data)) 131 devfn, where, &data))
132 return PCIBIOS_DEVICE_NOT_FOUND; 132 return PCIBIOS_DEVICE_NOT_FOUND;
133 133
134 if (size == 1) 134 if (size == 1)
@@ -139,14 +139,14 @@ static int gt64120_pcibios_write(struct pci_bus *bus, unsigned int devfn,
139 (val << ((where & 3) << 3)); 139 (val << ((where & 3) << 3));
140 } 140 }
141 141
142 if (gt64120_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn, where, 142 if (gt64xxx_pci0_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn,
143 &data)) 143 where, &data))
144 return PCIBIOS_DEVICE_NOT_FOUND; 144 return PCIBIOS_DEVICE_NOT_FOUND;
145 145
146 return PCIBIOS_SUCCESSFUL; 146 return PCIBIOS_SUCCESSFUL;
147} 147}
148 148
149struct pci_ops gt64120_pci_ops = { 149struct pci_ops gt64xxx_pci0_ops = {
150 .read = gt64120_pcibios_read, 150 .read = gt64xxx_pci0_pcibios_read,
151 .write = gt64120_pcibios_write 151 .write = gt64xxx_pci0_pcibios_write
152}; 152};
diff --git a/arch/mips/pci/ops-tx3927.c b/arch/mips/pci/ops-tx3927.c
index 42530a0b84b3..aa698bd0d5e3 100644
--- a/arch/mips/pci/ops-tx3927.c
+++ b/arch/mips/pci/ops-tx3927.c
@@ -40,7 +40,6 @@
40 40
41#include <asm/addrspace.h> 41#include <asm/addrspace.h>
42#include <asm/jmr3927/jmr3927.h> 42#include <asm/jmr3927/jmr3927.h>
43#include <asm/debug.h>
44 43
45static inline int mkaddr(unsigned char bus, unsigned char dev_fn, 44static inline int mkaddr(unsigned char bus, unsigned char dev_fn,
46 unsigned char where) 45 unsigned char where)
@@ -130,234 +129,3 @@ struct pci_ops jmr3927_pci_ops = {
130 jmr3927_pci_read_config, 129 jmr3927_pci_read_config,
131 jmr3927_pci_write_config, 130 jmr3927_pci_write_config,
132}; 131};
133
134
135#ifndef JMR3927_INIT_INDIRECT_PCI
136
137inline unsigned long tc_readl(volatile __u32 * addr)
138{
139 return readl(addr);
140}
141
142inline void tc_writel(unsigned long data, volatile __u32 * addr)
143{
144 writel(data, addr);
145}
146#else
147
148unsigned long tc_readl(volatile __u32 * addr)
149{
150 unsigned long val;
151
152 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
153 (unsigned long) CPHYSADDR(addr);
154 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
155 (PCI_IPCIBE_ICMD_MEMREAD << PCI_IPCIBE_ICMD_SHIFT) |
156 PCI_IPCIBE_IBE_LONG;
157 while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
158 val =
159 le32_to_cpu(*(volatile u32 *) (unsigned long) & tx3927_pcicptr->
160 ipcidata);
161 /* clear by setting */
162 tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
163 return val;
164}
165
166void tc_writel(unsigned long data, volatile __u32 * addr)
167{
168 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcidata =
169 cpu_to_le32(data);
170 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
171 (unsigned long) CPHYSADDR(addr);
172 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
173 (PCI_IPCIBE_ICMD_MEMWRITE << PCI_IPCIBE_ICMD_SHIFT) |
174 PCI_IPCIBE_IBE_LONG;
175 while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
176 /* clear by setting */
177 tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
178}
179
180unsigned char tx_ioinb(unsigned char *addr)
181{
182 unsigned long val;
183 __u32 ioaddr;
184 int offset;
185 int byte;
186
187 ioaddr = (unsigned long) addr;
188 offset = ioaddr & 0x3;
189 byte = 0xf & ~(8 >> offset);
190
191 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
192 (unsigned long) ioaddr;
193 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
194 (PCI_IPCIBE_ICMD_IOREAD << PCI_IPCIBE_ICMD_SHIFT) | byte;
195 while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
196 val =
197 le32_to_cpu(*(volatile u32 *) (unsigned long) & tx3927_pcicptr->
198 ipcidata);
199 val = val & 0xff;
200 /* clear by setting */
201 tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
202 return val;
203}
204
205void tx_iooutb(unsigned long data, unsigned char *addr)
206{
207 __u32 ioaddr;
208 int offset;
209 int byte;
210
211 data = data | (data << 8) | (data << 16) | (data << 24);
212 ioaddr = (unsigned long) addr;
213 offset = ioaddr & 0x3;
214 byte = 0xf & ~(8 >> offset);
215
216 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcidata = data;
217 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
218 (unsigned long) ioaddr;
219 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
220 (PCI_IPCIBE_ICMD_IOWRITE << PCI_IPCIBE_ICMD_SHIFT) | byte;
221 while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
222 /* clear by setting */
223 tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
224}
225
226unsigned short tx_ioinw(unsigned short *addr)
227{
228 unsigned long val;
229 __u32 ioaddr;
230 int offset;
231 int byte;
232
233 ioaddr = (unsigned long) addr;
234 offset = ioaddr & 0x2;
235 byte = 3 << offset;
236
237 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
238 (unsigned long) ioaddr;
239 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
240 (PCI_IPCIBE_ICMD_IOREAD << PCI_IPCIBE_ICMD_SHIFT) | byte;
241 while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
242 val =
243 le32_to_cpu(*(volatile u32 *) (unsigned long) & tx3927_pcicptr->
244 ipcidata);
245 val = val & 0xffff;
246 /* clear by setting */
247 tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
248 return val;
249
250}
251
252void tx_iooutw(unsigned long data, unsigned short *addr)
253{
254 __u32 ioaddr;
255 int offset;
256 int byte;
257
258 data = data | (data << 16);
259 ioaddr = (unsigned long) addr;
260 offset = ioaddr & 0x2;
261 byte = 3 << offset;
262
263 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcidata = data;
264 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
265 (unsigned long) ioaddr;
266 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
267 (PCI_IPCIBE_ICMD_IOWRITE << PCI_IPCIBE_ICMD_SHIFT) | byte;
268 while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
269 /* clear by setting */
270 tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
271}
272
273unsigned long tx_ioinl(unsigned int *addr)
274{
275 unsigned long val;
276 __u32 ioaddr;
277
278 ioaddr = (unsigned long) addr;
279 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
280 (unsigned long) ioaddr;
281 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
282 (PCI_IPCIBE_ICMD_IOREAD << PCI_IPCIBE_ICMD_SHIFT) |
283 PCI_IPCIBE_IBE_LONG;
284 while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
285 val =
286 le32_to_cpu(*(volatile u32 *) (unsigned long) & tx3927_pcicptr->
287 ipcidata);
288 /* clear by setting */
289 tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
290 return val;
291}
292
293void tx_iooutl(unsigned long data, unsigned int *addr)
294{
295 __u32 ioaddr;
296
297 ioaddr = (unsigned long) addr;
298 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcidata =
299 cpu_to_le32(data);
300 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
301 (unsigned long) ioaddr;
302 *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
303 (PCI_IPCIBE_ICMD_IOWRITE << PCI_IPCIBE_ICMD_SHIFT) |
304 PCI_IPCIBE_IBE_LONG;
305 while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
306 /* clear by setting */
307 tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
308}
309
310void tx_insbyte(unsigned char *addr, void *buffer, unsigned int count)
311{
312 unsigned char *ptr = (unsigned char *) buffer;
313
314 while (count--) {
315 *ptr++ = tx_ioinb(addr);
316 }
317}
318
319void tx_insword(unsigned short *addr, void *buffer, unsigned int count)
320{
321 unsigned short *ptr = (unsigned short *) buffer;
322
323 while (count--) {
324 *ptr++ = tx_ioinw(addr);
325 }
326}
327
328void tx_inslong(unsigned int *addr, void *buffer, unsigned int count)
329{
330 unsigned long *ptr = (unsigned long *) buffer;
331
332 while (count--) {
333 *ptr++ = tx_ioinl(addr);
334 }
335}
336
337void tx_outsbyte(unsigned char *addr, void *buffer, unsigned int count)
338{
339 unsigned char *ptr = (unsigned char *) buffer;
340
341 while (count--) {
342 tx_iooutb(*ptr++, addr);
343 }
344}
345
346void tx_outsword(unsigned short *addr, void *buffer, unsigned int count)
347{
348 unsigned short *ptr = (unsigned short *) buffer;
349
350 while (count--) {
351 tx_iooutw(*ptr++, addr);
352 }
353}
354
355void tx_outslong(unsigned int *addr, void *buffer, unsigned int count)
356{
357 unsigned long *ptr = (unsigned long *) buffer;
358
359 while (count--) {
360 tx_iooutl(*ptr++, addr);
361 }
362}
363#endif
diff --git a/arch/mips/pci/pci-lasat.c b/arch/mips/pci/pci-lasat.c
index 88fb191ad2eb..985784a3e6f8 100644
--- a/arch/mips/pci/pci-lasat.c
+++ b/arch/mips/pci/pci-lasat.c
@@ -12,7 +12,7 @@
12#include <asm/bootinfo.h> 12#include <asm/bootinfo.h>
13 13
14extern struct pci_ops nile4_pci_ops; 14extern struct pci_ops nile4_pci_ops;
15extern struct pci_ops gt64120_pci_ops; 15extern struct pci_ops gt64xxx_pci0_ops;
16static struct resource lasat_pci_mem_resource = { 16static struct resource lasat_pci_mem_resource = {
17 .name = "LASAT PCI MEM", 17 .name = "LASAT PCI MEM",
18 .start = 0x18000000, 18 .start = 0x18000000,
@@ -38,7 +38,7 @@ static int __init lasat_pci_setup(void)
38 38
39 switch (mips_machtype) { 39 switch (mips_machtype) {
40 case MACH_LASAT_100: 40 case MACH_LASAT_100:
41 lasat_pci_controller.pci_ops = &gt64120_pci_ops; 41 lasat_pci_controller.pci_ops = &gt64xxx_pci0_ops;
42 break; 42 break;
43 case MACH_LASAT_200: 43 case MACH_LASAT_200:
44 lasat_pci_controller.pci_ops = &nile4_pci_ops; 44 lasat_pci_controller.pci_ops = &nile4_pci_ops;
diff --git a/arch/mips/pci/pci-ocelot.c b/arch/mips/pci/pci-ocelot.c
index 2b9495dce6ba..7f94f26d35ae 100644
--- a/arch/mips/pci/pci-ocelot.c
+++ b/arch/mips/pci/pci-ocelot.c
@@ -81,7 +81,7 @@ static struct resource ocelot_io_resource = {
81}; 81};
82 82
83static struct pci_controller ocelot_pci_controller = { 83static struct pci_controller ocelot_pci_controller = {
84 .pci_ops = gt64120_pci_ops; 84 .pci_ops = gt64xxx_pci0_ops;
85 .mem_resource = &ocelot_mem_resource; 85 .mem_resource = &ocelot_mem_resource;
86 .io_resource = &ocelot_io_resource; 86 .io_resource = &ocelot_io_resource;
87}; 87};
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index de7cfc559ddb..8108231f2e20 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -77,6 +77,13 @@ pcibios_align_resource(void *data, struct resource *res,
77 77
78void __init register_pci_controller(struct pci_controller *hose) 78void __init register_pci_controller(struct pci_controller *hose)
79{ 79{
80 if (request_resource(&iomem_resource, hose->mem_resource) < 0)
81 goto out;
82 if (request_resource(&ioport_resource, hose->io_resource) < 0) {
83 release_resource(hose->mem_resource);
84 goto out;
85 }
86
80 *hose_tail = hose; 87 *hose_tail = hose;
81 hose_tail = &hose->next; 88 hose_tail = &hose->next;
82 89
@@ -87,6 +94,11 @@ void __init register_pci_controller(struct pci_controller *hose)
87 printk(KERN_WARNING 94 printk(KERN_WARNING
88 "registering PCI controller with io_map_base unset\n"); 95 "registering PCI controller with io_map_base unset\n");
89 } 96 }
97 return;
98
99out:
100 printk(KERN_WARNING
101 "Skipping PCI bus scan due to resource conflict\n");
90} 102}
91 103
92/* Most MIPS systems have straight-forward swizzling needs. */ 104/* Most MIPS systems have straight-forward swizzling needs. */
@@ -121,11 +133,6 @@ static int __init pcibios_init(void)
121 /* Scan all of the recorded PCI controllers. */ 133 /* Scan all of the recorded PCI controllers. */
122 for (next_busno = 0, hose = hose_head; hose; hose = hose->next) { 134 for (next_busno = 0, hose = hose_head; hose; hose = hose->next) {
123 135
124 if (request_resource(&iomem_resource, hose->mem_resource) < 0)
125 goto out;
126 if (request_resource(&ioport_resource, hose->io_resource) < 0)
127 goto out_free_mem_resource;
128
129 if (!hose->iommu) 136 if (!hose->iommu)
130 PCI_DMA_BUS_IS_PHYS = 1; 137 PCI_DMA_BUS_IS_PHYS = 1;
131 138
@@ -144,14 +151,6 @@ static int __init pcibios_init(void)
144 need_domain_info = 1; 151 need_domain_info = 1;
145 } 152 }
146 } 153 }
147 continue;
148
149out_free_mem_resource:
150 release_resource(hose->mem_resource);
151
152out:
153 printk(KERN_WARNING
154 "Skipping PCI bus scan due to resource conflict\n");
155 } 154 }
156 155
157 if (!pci_probe_only) 156 if (!pci_probe_only)
diff --git a/arch/mips/sgi-ip22/ip22-nvram.c b/arch/mips/sgi-ip22/ip22-nvram.c
index fd29fd407ae8..e19d60d5fcc1 100644
--- a/arch/mips/sgi-ip22/ip22-nvram.c
+++ b/arch/mips/sgi-ip22/ip22-nvram.c
@@ -52,8 +52,7 @@
52 * national semiconductor nv ram chip the op code is 3 bits and 52 * national semiconductor nv ram chip the op code is 3 bits and
53 * the address is 6/8 bits. 53 * the address is 6/8 bits.
54 */ 54 */
55static inline void eeprom_cmd(volatile unsigned int *ctrl, unsigned cmd, 55static inline void eeprom_cmd(unsigned int *ctrl, unsigned cmd, unsigned reg)
56 unsigned reg)
57{ 56{
58 unsigned short ser_cmd; 57 unsigned short ser_cmd;
59 int i; 58 int i;
@@ -61,33 +60,34 @@ static inline void eeprom_cmd(volatile unsigned int *ctrl, unsigned cmd,
61 ser_cmd = cmd | (reg << (16 - BITS_IN_COMMAND)); 60 ser_cmd = cmd | (reg << (16 - BITS_IN_COMMAND));
62 for (i = 0; i < BITS_IN_COMMAND; i++) { 61 for (i = 0; i < BITS_IN_COMMAND; i++) {
63 if (ser_cmd & (1<<15)) /* if high order bit set */ 62 if (ser_cmd & (1<<15)) /* if high order bit set */
64 *ctrl |= EEPROM_DATO; 63 writel(readl(ctrl) | EEPROM_DATO, ctrl);
65 else 64 else
66 *ctrl &= ~EEPROM_DATO; 65 writel(readl(ctrl) & ~EEPROM_DATO, ctrl);
67 *ctrl &= ~EEPROM_ECLK; 66 writel(readl(ctrl) & ~EEPROM_ECLK, ctrl);
68 *ctrl |= EEPROM_ECLK; 67 writel(readl(ctrl) | EEPROM_ECLK, ctrl);
69 ser_cmd <<= 1; 68 ser_cmd <<= 1;
70 } 69 }
71 *ctrl &= ~EEPROM_DATO; /* see data sheet timing diagram */ 70 /* see data sheet timing diagram */
71 writel(readl(ctrl) & ~EEPROM_DATO, ctrl);
72} 72}
73 73
74unsigned short ip22_eeprom_read(volatile unsigned int *ctrl, int reg) 74unsigned short ip22_eeprom_read(unsigned int *ctrl, int reg)
75{ 75{
76 unsigned short res = 0; 76 unsigned short res = 0;
77 int i; 77 int i;
78 78
79 *ctrl &= ~EEPROM_EPROT; 79 writel(readl(ctrl) & ~EEPROM_EPROT, ctrl);
80 eeprom_cs_on(ctrl); 80 eeprom_cs_on(ctrl);
81 eeprom_cmd(ctrl, EEPROM_READ, reg); 81 eeprom_cmd(ctrl, EEPROM_READ, reg);
82 82
83 /* clock the data ouf of serial mem */ 83 /* clock the data ouf of serial mem */
84 for (i = 0; i < 16; i++) { 84 for (i = 0; i < 16; i++) {
85 *ctrl &= ~EEPROM_ECLK; 85 writel(readl(ctrl) & ~EEPROM_ECLK, ctrl);
86 delay(); 86 delay();
87 *ctrl |= EEPROM_ECLK; 87 writel(readl(ctrl) | EEPROM_ECLK, ctrl);
88 delay(); 88 delay();
89 res <<= 1; 89 res <<= 1;
90 if (*ctrl & EEPROM_DATI) 90 if (readl(ctrl) & EEPROM_DATI)
91 res |= 1; 91 res |= 1;
92 } 92 }
93 93
diff --git a/arch/mips/sgi-ip22/ip22-time.c b/arch/mips/sgi-ip22/ip22-time.c
index 205554734099..8e88a442b22a 100644
--- a/arch/mips/sgi-ip22/ip22-time.c
+++ b/arch/mips/sgi-ip22/ip22-time.c
@@ -94,7 +94,7 @@ static int indy_rtc_set_time(unsigned long tim)
94static unsigned long dosample(void) 94static unsigned long dosample(void)
95{ 95{
96 u32 ct0, ct1; 96 u32 ct0, ct1;
97 volatile u8 msb, lsb; 97 u8 msb, lsb;
98 98
99 /* Start the counter. */ 99 /* Start the counter. */
100 sgint->tcword = (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL | 100 sgint->tcword = (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL |
@@ -107,21 +107,21 @@ static unsigned long dosample(void)
107 107
108 /* Latch and spin until top byte of counter2 is zero */ 108 /* Latch and spin until top byte of counter2 is zero */
109 do { 109 do {
110 sgint->tcword = SGINT_TCWORD_CNT2 | SGINT_TCWORD_CLAT; 110 writeb(SGINT_TCWORD_CNT2 | SGINT_TCWORD_CLAT, &sgint->tcword);
111 lsb = sgint->tcnt2; 111 lsb = readb(&sgint->tcnt2);
112 msb = sgint->tcnt2; 112 msb = readb(&sgint->tcnt2);
113 ct1 = read_c0_count(); 113 ct1 = read_c0_count();
114 } while (msb); 114 } while (msb);
115 115
116 /* Stop the counter. */ 116 /* Stop the counter. */
117 sgint->tcword = (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL | 117 writeb(sgint->tcword, (SGINT_TCWORD_CNT2 | SGINT_TCWORD_CALL |
118 SGINT_TCWORD_MSWST); 118 SGINT_TCWORD_MSWST));
119 /* 119 /*
120 * Return the difference, this is how far the r4k counter increments 120 * Return the difference, this is how far the r4k counter increments
121 * for every 1/HZ seconds. We round off the nearest 1 MHz of master 121 * for every 1/HZ seconds. We round off the nearest 1 MHz of master
122 * clock (= 1000000 / HZ / 2). 122 * clock (= 1000000 / HZ / 2).
123 */ 123 */
124 /*return (ct1 - ct0 + (500000/HZ/2)) / (500000/HZ) * (500000/HZ);*/ 124
125 return (ct1 - ct0) / (500000/HZ) * (500000/HZ); 125 return (ct1 - ct0) / (500000/HZ) * (500000/HZ);
126} 126}
127 127
diff --git a/arch/mips/sibyte/Kconfig b/arch/mips/sibyte/Kconfig
index bdf24a7b5494..e6b003ec6716 100644
--- a/arch/mips/sibyte/Kconfig
+++ b/arch/mips/sibyte/Kconfig
@@ -2,6 +2,7 @@ config SIBYTE_SB1250
2 bool 2 bool
3 select HW_HAS_PCI 3 select HW_HAS_PCI
4 select SIBYTE_ENABLE_LDT_IF_PCI 4 select SIBYTE_ENABLE_LDT_IF_PCI
5 select SIBYTE_HAS_ZBUS_PROFILING
5 select SIBYTE_SB1xxx_SOC 6 select SIBYTE_SB1xxx_SOC
6 select SYS_SUPPORTS_SMP 7 select SYS_SUPPORTS_SMP
7 8
@@ -34,6 +35,7 @@ config SIBYTE_BCM112X
34config SIBYTE_BCM1x80 35config SIBYTE_BCM1x80
35 bool 36 bool
36 select HW_HAS_PCI 37 select HW_HAS_PCI
38 select SIBYTE_HAS_ZBUS_PROFILING
37 select SIBYTE_SB1xxx_SOC 39 select SIBYTE_SB1xxx_SOC
38 select SYS_SUPPORTS_SMP 40 select SYS_SUPPORTS_SMP
39 41
diff --git a/arch/mips/sibyte/common/Makefile b/arch/mips/sibyte/common/Makefile
new file mode 100644
index 000000000000..8a06a4fb5212
--- /dev/null
+++ b/arch/mips/sibyte/common/Makefile
@@ -0,0 +1,5 @@
1obj-y :=
2
3obj-$(CONFIG_SIBYTE_TBPROF) += sb_tbprof.o
4
5EXTRA_AFLAGS := $(CFLAGS)
diff --git a/arch/mips/sibyte/sb1250/bcm1250_tbprof.c b/arch/mips/sibyte/common/sb_tbprof.c
index ea0ca131a3cf..4fcdaa8ba514 100644
--- a/arch/mips/sibyte/sb1250/bcm1250_tbprof.c
+++ b/arch/mips/sibyte/common/sb_tbprof.c
@@ -31,14 +31,29 @@
31#include <linux/vmalloc.h> 31#include <linux/vmalloc.h>
32#include <linux/fs.h> 32#include <linux/fs.h>
33#include <linux/errno.h> 33#include <linux/errno.h>
34#include <linux/types.h>
35#include <linux/wait.h> 34#include <linux/wait.h>
36
37#include <asm/io.h> 35#include <asm/io.h>
38#include <asm/sibyte/sb1250.h> 36#include <asm/sibyte/sb1250.h>
37
38#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
39#include <asm/sibyte/bcm1480_regs.h>
40#include <asm/sibyte/bcm1480_scd.h>
41#include <asm/sibyte/bcm1480_int.h>
42#elif defined(CONFIG_SIBYTE_SB1250) || defined(CONFIG_SIBYTE_BCM112X)
39#include <asm/sibyte/sb1250_regs.h> 43#include <asm/sibyte/sb1250_regs.h>
40#include <asm/sibyte/sb1250_scd.h> 44#include <asm/sibyte/sb1250_scd.h>
41#include <asm/sibyte/sb1250_int.h> 45#include <asm/sibyte/sb1250_int.h>
46#else
47#error invalid SiByte UART configuation
48#endif
49
50#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
51#undef K_INT_TRACE_FREEZE
52#define K_INT_TRACE_FREEZE K_BCM1480_INT_TRACE_FREEZE
53#undef K_INT_PERF_CNT
54#define K_INT_PERF_CNT K_BCM1480_INT_PERF_CNT
55#endif
56
42#include <asm/system.h> 57#include <asm/system.h>
43#include <asm/uaccess.h> 58#include <asm/uaccess.h>
44 59
@@ -118,7 +133,7 @@ static struct sbprof_tb sbp;
118 : /* inputs */ \ 133 : /* inputs */ \
119 : /* modifies */ "$8" ) 134 : /* modifies */ "$8" )
120 135
121#define DEVNAME "bcm1250_tbprof" 136#define DEVNAME "sb_tbprof"
122 137
123#define TB_FULL (sbp.next_tb_sample == MAX_TB_SAMPLES) 138#define TB_FULL (sbp.next_tb_sample == MAX_TB_SAMPLES)
124 139
@@ -132,6 +147,7 @@ static struct sbprof_tb sbp;
132 * overflow. 147 * overflow.
133 * 148 *
134 * We map the interrupt for trace_buffer_freeze to handle it on CPU 0. 149 * We map the interrupt for trace_buffer_freeze to handle it on CPU 0.
150 *
135 */ 151 */
136 152
137static u64 tb_period; 153static u64 tb_period;
@@ -143,25 +159,36 @@ static void arm_tb(void)
143 u64 tb_options = M_SCD_TRACE_CFG_FREEZE_FULL; 159 u64 tb_options = M_SCD_TRACE_CFG_FREEZE_FULL;
144 160
145 /* 161 /*
146 * Generate an SCD_PERFCNT interrupt in TB_PERIOD Zclks to trigger 162 * Generate an SCD_PERFCNT interrupt in TB_PERIOD Zclks to
147 *start of trace. XXX vary sampling period 163 * trigger start of trace. XXX vary sampling period
148 */ 164 */
149 __raw_writeq(0, IOADDR(A_SCD_PERF_CNT_1)); 165 __raw_writeq(0, IOADDR(A_SCD_PERF_CNT_1));
150 scdperfcnt = __raw_readq(IOADDR(A_SCD_PERF_CNT_CFG)); 166 scdperfcnt = __raw_readq(IOADDR(A_SCD_PERF_CNT_CFG));
151 167
152 /* 168 /*
153 * Unfortunately, in Pass 2 we must clear all counters to knock down a 169 * Unfortunately, in Pass 2 we must clear all counters to knock down
154 * previous interrupt request. This means that bus profiling requires 170 * a previous interrupt request. This means that bus profiling
155 * ALL of the SCD perf counters. 171 * requires ALL of the SCD perf counters.
156 */ 172 */
173#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
174 __raw_writeq((scdperfcnt & ~M_SPC_CFG_SRC1) |
175 /* keep counters 0,2,3,4,5,6,7 as is */
176 V_SPC_CFG_SRC1(1), /* counter 1 counts cycles */
177 IOADDR(A_BCM1480_SCD_PERF_CNT_CFG0));
178 __raw_writeq(
179 M_SPC_CFG_ENABLE | /* enable counting */
180 M_SPC_CFG_CLEAR | /* clear all counters */
181 V_SPC_CFG_SRC1(1), /* counter 1 counts cycles */
182 IOADDR(A_BCM1480_SCD_PERF_CNT_CFG1));
183#else
157 __raw_writeq((scdperfcnt & ~M_SPC_CFG_SRC1) | 184 __raw_writeq((scdperfcnt & ~M_SPC_CFG_SRC1) |
158 /* keep counters 0,2,3 as is */ 185 /* keep counters 0,2,3 as is */
159 M_SPC_CFG_ENABLE | /* enable counting */ 186 M_SPC_CFG_ENABLE | /* enable counting */
160 M_SPC_CFG_CLEAR | /* clear all counters */ 187 M_SPC_CFG_CLEAR | /* clear all counters */
161 V_SPC_CFG_SRC1(1), /* counter 1 counts cycles */ 188 V_SPC_CFG_SRC1(1), /* counter 1 counts cycles */
162 IOADDR(A_SCD_PERF_CNT_CFG)); 189 IOADDR(A_SCD_PERF_CNT_CFG));
190#endif
163 __raw_writeq(next, IOADDR(A_SCD_PERF_CNT_1)); 191 __raw_writeq(next, IOADDR(A_SCD_PERF_CNT_1));
164
165 /* Reset the trace buffer */ 192 /* Reset the trace buffer */
166 __raw_writeq(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG)); 193 __raw_writeq(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG));
167#if 0 && defined(M_SCD_TRACE_CFG_FORCECNT) 194#if 0 && defined(M_SCD_TRACE_CFG_FORCECNT)
@@ -190,38 +217,37 @@ static irqreturn_t sbprof_tb_intr(int irq, void *dev_id)
190 /* Subscripts decrease to put bundle in the order */ 217 /* Subscripts decrease to put bundle in the order */
191 /* t0 lo, t0 hi, t1 lo, t1 hi, t2 lo, t2 hi */ 218 /* t0 lo, t0 hi, t1 lo, t1 hi, t2 lo, t2 hi */
192 p[i - 1] = __raw_readq(IOADDR(A_SCD_TRACE_READ)); 219 p[i - 1] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
193 /* read t2 hi */ 220 /* read t2 hi */
194 p[i - 2] = __raw_readq(IOADDR(A_SCD_TRACE_READ)); 221 p[i - 2] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
195 /* read t2 lo */ 222 /* read t2 lo */
196 p[i - 3] = __raw_readq(IOADDR(A_SCD_TRACE_READ)); 223 p[i - 3] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
197 /* read t1 hi */ 224 /* read t1 hi */
198 p[i - 4] = __raw_readq(IOADDR(A_SCD_TRACE_READ)); 225 p[i - 4] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
199 /* read t1 lo */ 226 /* read t1 lo */
200 p[i - 5] = __raw_readq(IOADDR(A_SCD_TRACE_READ)); 227 p[i - 5] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
201 /* read t0 hi */ 228 /* read t0 hi */
202 p[i - 6] = __raw_readq(IOADDR(A_SCD_TRACE_READ)); 229 p[i - 6] = __raw_readq(IOADDR(A_SCD_TRACE_READ));
203 /* read t0 lo */ 230 /* read t0 lo */
204 } 231 }
205 if (!sbp.tb_enable) { 232 if (!sbp.tb_enable) {
206 pr_debug(DEVNAME ": tb_intr shutdown\n"); 233 pr_debug(DEVNAME ": tb_intr shutdown\n");
207 __raw_writeq(M_SCD_TRACE_CFG_RESET, 234 __raw_writeq(M_SCD_TRACE_CFG_RESET,
208 IOADDR(A_SCD_TRACE_CFG)); 235 IOADDR(A_SCD_TRACE_CFG));
209 sbp.tb_armed = 0; 236 sbp.tb_armed = 0;
210 wake_up(&sbp.tb_sync); 237 wake_up_interruptible(&sbp.tb_sync);
211 } else { 238 } else {
212 arm_tb(); /* knock down current interrupt and get another one later */ 239 /* knock down current interrupt and get another one later */
240 arm_tb();
213 } 241 }
214 } else { 242 } else {
215 /* No more trace buffer samples */ 243 /* No more trace buffer samples */
216 pr_debug(DEVNAME ": tb_intr full\n"); 244 pr_debug(DEVNAME ": tb_intr full\n");
217 __raw_writeq(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG)); 245 __raw_writeq(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG));
218 sbp.tb_armed = 0; 246 sbp.tb_armed = 0;
219 if (!sbp.tb_enable) { 247 if (!sbp.tb_enable)
220 wake_up(&sbp.tb_sync); 248 wake_up_interruptible(&sbp.tb_sync);
221 } 249 wake_up_interruptible(&sbp.tb_read);
222 wake_up(&sbp.tb_read);
223 } 250 }
224
225 return IRQ_HANDLED; 251 return IRQ_HANDLED;
226} 252}
227 253
@@ -250,8 +276,8 @@ static int sbprof_zbprof_start(struct file *filp)
250 sbp.next_tb_sample = 0; 276 sbp.next_tb_sample = 0;
251 filp->f_pos = 0; 277 filp->f_pos = 0;
252 278
253 err = request_irq(K_INT_TRACE_FREEZE, sbprof_tb_intr, 0, 279 err = request_irq (K_INT_TRACE_FREEZE, sbprof_tb_intr, 0,
254 DEVNAME " trace freeze", &sbp); 280 DEVNAME " trace freeze", &sbp);
255 if (err) 281 if (err)
256 return -EBUSY; 282 return -EBUSY;
257 283
@@ -263,23 +289,29 @@ static int sbprof_zbprof_start(struct file *filp)
263 IOADDR(A_SCD_PERF_CNT_CFG)); 289 IOADDR(A_SCD_PERF_CNT_CFG));
264 290
265 /* 291 /*
266 * We grab this interrupt to prevent others from trying to use it, even 292 * We grab this interrupt to prevent others from trying to use
267 * though we don't want to service the interrupts (they only feed into 293 * it, even though we don't want to service the interrupts
268 * the trace-on-interrupt mechanism) 294 * (they only feed into the trace-on-interrupt mechanism)
269 */ 295 */
270 err = request_irq(K_INT_PERF_CNT, sbprof_pc_intr, 0, 296 if (request_irq(K_INT_PERF_CNT, sbprof_pc_intr, 0, DEVNAME " scd perfcnt", &sbp)) {
271 DEVNAME " scd perfcnt", &sbp); 297 free_irq(K_INT_TRACE_FREEZE, &sbp);
272 if (err) 298 return -EBUSY;
273 goto out_free_irq; 299 }
274 300
275 /* 301 /*
276 * I need the core to mask these, but the interrupt mapper to pass them 302 * I need the core to mask these, but the interrupt mapper to
277 * through. I am exploiting my knowledge that cp0_status masks out 303 * pass them through. I am exploiting my knowledge that
278 * IP[5]. krw 304 * cp0_status masks out IP[5]. krw
279 */ 305 */
306#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
307 __raw_writeq(K_BCM1480_INT_MAP_I3,
308 IOADDR(A_BCM1480_IMR_REGISTER(0, R_BCM1480_IMR_INTERRUPT_MAP_BASE_L) +
309 ((K_BCM1480_INT_PERF_CNT & 0x3f) << 3)));
310#else
280 __raw_writeq(K_INT_MAP_I3, 311 __raw_writeq(K_INT_MAP_I3,
281 IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_MAP_BASE) + 312 IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_MAP_BASE) +
282 (K_INT_PERF_CNT << 3))); 313 (K_INT_PERF_CNT << 3)));
314#endif
283 315
284 /* Initialize address traps */ 316 /* Initialize address traps */
285 __raw_writeq(0, IOADDR(A_ADDR_TRAP_UP_0)); 317 __raw_writeq(0, IOADDR(A_ADDR_TRAP_UP_0));
@@ -298,7 +330,7 @@ static int sbprof_zbprof_start(struct file *filp)
298 __raw_writeq(0, IOADDR(A_ADDR_TRAP_CFG_3)); 330 __raw_writeq(0, IOADDR(A_ADDR_TRAP_CFG_3));
299 331
300 /* Initialize Trace Event 0-7 */ 332 /* Initialize Trace Event 0-7 */
301 /* when interrupt */ 333 /* when interrupt */
302 __raw_writeq(M_SCD_TREVT_INTERRUPT, IOADDR(A_SCD_TRACE_EVENT_0)); 334 __raw_writeq(M_SCD_TREVT_INTERRUPT, IOADDR(A_SCD_TRACE_EVENT_0));
303 __raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_1)); 335 __raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_1));
304 __raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_2)); 336 __raw_writeq(0, IOADDR(A_SCD_TRACE_EVENT_2));
@@ -324,24 +356,23 @@ static int sbprof_zbprof_start(struct file *filp)
324 __raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_7)); 356 __raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_7));
325 357
326 /* Now indicate the PERF_CNT interrupt as a trace-relevant interrupt */ 358 /* Now indicate the PERF_CNT interrupt as a trace-relevant interrupt */
359#if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
360 __raw_writeq(1ULL << (K_BCM1480_INT_PERF_CNT & 0x3f),
361 IOADDR(A_BCM1480_IMR_REGISTER(0, R_BCM1480_IMR_INTERRUPT_TRACE_L)));
362#else
327 __raw_writeq(1ULL << K_INT_PERF_CNT, 363 __raw_writeq(1ULL << K_INT_PERF_CNT,
328 IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_TRACE))); 364 IOADDR(A_IMR_REGISTER(0, R_IMR_INTERRUPT_TRACE)));
329 365#endif
330 arm_tb(); 366 arm_tb();
331 367
332 pr_debug(DEVNAME ": done starting\n"); 368 pr_debug(DEVNAME ": done starting\n");
333 369
334 return 0; 370 return 0;
335
336out_free_irq:
337 free_irq(K_INT_TRACE_FREEZE, &sbp);
338
339 return err;
340} 371}
341 372
342static int sbprof_zbprof_stop(void) 373static int sbprof_zbprof_stop(void)
343{ 374{
344 int err; 375 int err = 0;
345 376
346 pr_debug(DEVNAME ": stopping\n"); 377 pr_debug(DEVNAME ": stopping\n");
347 378
@@ -365,7 +396,7 @@ static int sbprof_zbprof_stop(void)
365 396
366 pr_debug(DEVNAME ": done stopping\n"); 397 pr_debug(DEVNAME ": done stopping\n");
367 398
368 return 0; 399 return err;
369} 400}
370 401
371static int sbprof_tb_open(struct inode *inode, struct file *filp) 402static int sbprof_tb_open(struct inode *inode, struct file *filp)
@@ -380,11 +411,9 @@ static int sbprof_tb_open(struct inode *inode, struct file *filp)
380 return -EBUSY; 411 return -EBUSY;
381 412
382 memset(&sbp, 0, sizeof(struct sbprof_tb)); 413 memset(&sbp, 0, sizeof(struct sbprof_tb));
383
384 sbp.sbprof_tbbuf = vmalloc(MAX_TBSAMPLE_BYTES); 414 sbp.sbprof_tbbuf = vmalloc(MAX_TBSAMPLE_BYTES);
385 if (!sbp.sbprof_tbbuf) 415 if (!sbp.sbprof_tbbuf)
386 return -ENOMEM; 416 return -ENOMEM;
387
388 memset(sbp.sbprof_tbbuf, 0, MAX_TBSAMPLE_BYTES); 417 memset(sbp.sbprof_tbbuf, 0, MAX_TBSAMPLE_BYTES);
389 init_waitqueue_head(&sbp.tb_sync); 418 init_waitqueue_head(&sbp.tb_sync);
390 init_waitqueue_head(&sbp.tb_read); 419 init_waitqueue_head(&sbp.tb_read);
@@ -397,8 +426,9 @@ static int sbprof_tb_open(struct inode *inode, struct file *filp)
397 426
398static int sbprof_tb_release(struct inode *inode, struct file *filp) 427static int sbprof_tb_release(struct inode *inode, struct file *filp)
399{ 428{
400 int minor = iminor(inode); 429 int minor;
401 430
431 minor = iminor(inode);
402 if (minor != 0 || !sbp.open) 432 if (minor != 0 || !sbp.open)
403 return -ENODEV; 433 return -ENODEV;
404 434
@@ -419,10 +449,10 @@ static ssize_t sbprof_tb_read(struct file *filp, char *buf,
419 size_t size, loff_t *offp) 449 size_t size, loff_t *offp)
420{ 450{
421 int cur_sample, sample_off, cur_count, sample_left; 451 int cur_sample, sample_off, cur_count, sample_left;
422 long cur_off = *offp;
423 char *dest = buf;
424 int count = 0;
425 char *src; 452 char *src;
453 int count = 0;
454 char *dest = buf;
455 long cur_off = *offp;
426 456
427 if (!access_ok(VERIFY_WRITE, buf, size)) 457 if (!access_ok(VERIFY_WRITE, buf, size))
428 return -EFAULT; 458 return -EFAULT;
@@ -445,7 +475,6 @@ static ssize_t sbprof_tb_read(struct file *filp, char *buf,
445 mutex_unlock(&sbp.lock); 475 mutex_unlock(&sbp.lock);
446 return err; 476 return err;
447 } 477 }
448
449 pr_debug(DEVNAME ": read from sample %d, %d bytes\n", 478 pr_debug(DEVNAME ": read from sample %d, %d bytes\n",
450 cur_sample, cur_count); 479 cur_sample, cur_count);
451 size -= cur_count; 480 size -= cur_count;
@@ -461,45 +490,46 @@ static ssize_t sbprof_tb_read(struct file *filp, char *buf,
461 dest += cur_count; 490 dest += cur_count;
462 count += cur_count; 491 count += cur_count;
463 } 492 }
464
465 *offp = cur_off; 493 *offp = cur_off;
466 mutex_unlock(&sbp.lock); 494 mutex_unlock(&sbp.lock);
467 495
468 return count; 496 return count;
469} 497}
470 498
471static long sbprof_tb_ioctl(struct file *filp, unsigned int command, 499static long sbprof_tb_ioctl(struct file *filp,
472 unsigned long arg) 500 unsigned int command,
501 unsigned long arg)
473{ 502{
474 int error = 0; 503 int err = 0;
475 504
476 switch (command) { 505 switch (command) {
477 case SBPROF_ZBSTART: 506 case SBPROF_ZBSTART:
478 mutex_lock(&sbp.lock); 507 mutex_lock(&sbp.lock);
479 error = sbprof_zbprof_start(filp); 508 err = sbprof_zbprof_start(filp);
480 mutex_unlock(&sbp.lock); 509 mutex_unlock(&sbp.lock);
481 break; 510 break;
482 511
483 case SBPROF_ZBSTOP: 512 case SBPROF_ZBSTOP:
484 mutex_lock(&sbp.lock); 513 mutex_lock(&sbp.lock);
485 error = sbprof_zbprof_stop(); 514 err = sbprof_zbprof_stop();
486 mutex_unlock(&sbp.lock); 515 mutex_unlock(&sbp.lock);
487 break; 516 break;
488 517
489 case SBPROF_ZBWAITFULL: 518 case SBPROF_ZBWAITFULL: {
490 error = wait_event_interruptible(sbp.tb_read, TB_FULL); 519 err = wait_event_interruptible(sbp.tb_read, TB_FULL);
491 if (error) 520 if (err)
492 break; 521 break;
493 522
494 error = put_user(TB_FULL, (int *) arg); 523 err = put_user(TB_FULL, (int *) arg);
495 break; 524 break;
525 }
496 526
497 default: 527 default:
498 error = -EINVAL; 528 err = -EINVAL;
499 break; 529 break;
500 } 530 }
501 531
502 return error; 532 return err;
503} 533}
504 534
505static const struct file_operations sbprof_tb_fops = { 535static const struct file_operations sbprof_tb_fops = {
@@ -544,8 +574,8 @@ static int __init sbprof_tb_init(void)
544 574
545 sbp.open = 0; 575 sbp.open = 0;
546 tb_period = zbbus_mhz * 10000LL; 576 tb_period = zbbus_mhz * 10000LL;
547 pr_info(DEVNAME ": initialized - tb_period = %lld\n", tb_period); 577 pr_info(DEVNAME ": initialized - tb_period = %lld\n",
548 578 (long long) tb_period);
549 return 0; 579 return 0;
550 580
551out_class: 581out_class:
diff --git a/arch/mips/sibyte/sb1250/Makefile b/arch/mips/sibyte/sb1250/Makefile
index 04c0f1a7f616..df662c61473a 100644
--- a/arch/mips/sibyte/sb1250/Makefile
+++ b/arch/mips/sibyte/sb1250/Makefile
@@ -1,6 +1,5 @@
1obj-y := setup.o irq.o time.o 1obj-y := setup.o irq.o time.o
2 2
3obj-$(CONFIG_SMP) += smp.o 3obj-$(CONFIG_SMP) += smp.o
4obj-$(CONFIG_SIBYTE_TBPROF) += bcm1250_tbprof.o
5obj-$(CONFIG_SIBYTE_STANDALONE) += prom.o 4obj-$(CONFIG_SIBYTE_STANDALONE) += prom.o
6obj-$(CONFIG_SIBYTE_BUS_WATCHER) += bus_watcher.o 5obj-$(CONFIG_SIBYTE_BUS_WATCHER) += bus_watcher.o
diff --git a/arch/mips/sni/pcimt.c b/arch/mips/sni/pcimt.c
index 8e8593b64f6a..9ee208daa8b1 100644
--- a/arch/mips/sni/pcimt.c
+++ b/arch/mips/sni/pcimt.c
@@ -91,7 +91,7 @@ static struct platform_device pcimt_serial8250_device = {
91}; 91};
92 92
93static struct resource sni_io_resource = { 93static struct resource sni_io_resource = {
94 .start = 0x00001000UL, 94 .start = 0x00000000UL,
95 .end = 0x03bfffffUL, 95 .end = 0x03bfffffUL,
96 .name = "PCIMT IO MEM", 96 .name = "PCIMT IO MEM",
97 .flags = IORESOURCE_IO, 97 .flags = IORESOURCE_IO,
@@ -132,107 +132,19 @@ static struct resource pcimt_io_resources[] = {
132}; 132};
133 133
134static struct resource sni_mem_resource = { 134static struct resource sni_mem_resource = {
135 .start = 0x10000000UL, 135 .start = 0x18000000UL,
136 .end = 0xffffffffUL, 136 .end = 0x1fbfffffUL,
137 .name = "PCIMT PCI MEM", 137 .name = "PCIMT PCI MEM",
138 .flags = IORESOURCE_MEM 138 .flags = IORESOURCE_MEM
139}; 139};
140 140
141/*
142 * The RM200/RM300 has a few holes in it's PCI/EISA memory address space used
143 * for other purposes. Be paranoid and allocate all of the before the PCI
144 * code gets a chance to to map anything else there ...
145 *
146 * This leaves the following areas available:
147 *
148 * 0x10000000 - 0x1009ffff (640kB) PCI/EISA/ISA Bus Memory
149 * 0x10100000 - 0x13ffffff ( 15MB) PCI/EISA/ISA Bus Memory
150 * 0x18000000 - 0x1fbfffff (124MB) PCI/EISA Bus Memory
151 * 0x1ff08000 - 0x1ffeffff (816kB) PCI/EISA Bus Memory
152 * 0xa0000000 - 0xffffffff (1.5GB) PCI/EISA Bus Memory
153 */
154static struct resource pcimt_mem_resources[] = {
155 {
156 .start = 0x100a0000,
157 .end = 0x100bffff,
158 .name = "Video RAM area",
159 .flags = IORESOURCE_BUSY
160 }, {
161 .start = 0x100c0000,
162 .end = 0x100fffff,
163 .name = "ISA Reserved",
164 .flags = IORESOURCE_BUSY
165 }, {
166 .start = 0x14000000,
167 .end = 0x17bfffff,
168 .name = "PCI IO",
169 .flags = IORESOURCE_BUSY
170 }, {
171 .start = 0x17c00000,
172 .end = 0x17ffffff,
173 .name = "Cache Replacement Area",
174 .flags = IORESOURCE_BUSY
175 }, {
176 .start = 0x1a000000,
177 .end = 0x1a000003,
178 .name = "PCI INT Acknowledge",
179 .flags = IORESOURCE_BUSY
180 }, {
181 .start = 0x1fc00000,
182 .end = 0x1fc7ffff,
183 .name = "Boot PROM",
184 .flags = IORESOURCE_BUSY
185 }, {
186 .start = 0x1fc80000,
187 .end = 0x1fcfffff,
188 .name = "Diag PROM",
189 .flags = IORESOURCE_BUSY
190 }, {
191 .start = 0x1fd00000,
192 .end = 0x1fdfffff,
193 .name = "X-Bus",
194 .flags = IORESOURCE_BUSY
195 }, {
196 .start = 0x1fe00000,
197 .end = 0x1fefffff,
198 .name = "BIOS map",
199 .flags = IORESOURCE_BUSY
200 }, {
201 .start = 0x1ff00000,
202 .end = 0x1ff7ffff,
203 .name = "NVRAM / EEPROM",
204 .flags = IORESOURCE_BUSY
205 }, {
206 .start = 0x1fff0000,
207 .end = 0x1fffefff,
208 .name = "ASIC PCI",
209 .flags = IORESOURCE_BUSY
210 }, {
211 .start = 0x1ffff000,
212 .end = 0x1fffffff,
213 .name = "MP Agent",
214 .flags = IORESOURCE_BUSY
215 }, {
216 .start = 0x20000000,
217 .end = 0x9fffffff,
218 .name = "Main Memory",
219 .flags = IORESOURCE_BUSY
220 }
221};
222
223static void __init sni_pcimt_resource_init(void) 141static void __init sni_pcimt_resource_init(void)
224{ 142{
225 int i; 143 int i;
226 144
227 /* request I/O space for devices used on all i[345]86 PCs */ 145 /* request I/O space for devices used on all i[345]86 PCs */
228 for (i = 0; i < ARRAY_SIZE(pcimt_io_resources); i++) 146 for (i = 0; i < ARRAY_SIZE(pcimt_io_resources); i++)
229 request_resource(&ioport_resource, pcimt_io_resources + i); 147 request_resource(&sni_io_resource, pcimt_io_resources + i);
230
231 /* request mem space for pcimt-specific devices */
232 for (i = 0; i < ARRAY_SIZE(pcimt_mem_resources); i++)
233 request_resource(&sni_mem_resource, pcimt_mem_resources + i);
234
235 ioport_resource.end = sni_io_resource.end;
236} 148}
237 149
238extern struct pci_ops sni_pcimt_ops; 150extern struct pci_ops sni_pcimt_ops;
@@ -240,9 +152,10 @@ extern struct pci_ops sni_pcimt_ops;
240static struct pci_controller sni_controller = { 152static struct pci_controller sni_controller = {
241 .pci_ops = &sni_pcimt_ops, 153 .pci_ops = &sni_pcimt_ops,
242 .mem_resource = &sni_mem_resource, 154 .mem_resource = &sni_mem_resource,
243 .mem_offset = 0x10000000UL, 155 .mem_offset = 0x00000000UL,
244 .io_resource = &sni_io_resource, 156 .io_resource = &sni_io_resource,
245 .io_offset = 0x00000000UL 157 .io_offset = 0x00000000UL,
158 .io_map_base = SNI_PORT_BASE
246}; 159};
247 160
248static void enable_pcimt_irq(unsigned int irq) 161static void enable_pcimt_irq(unsigned int irq)
@@ -363,15 +276,17 @@ void __init sni_pcimt_irq_init(void)
363 276
364void sni_pcimt_init(void) 277void sni_pcimt_init(void)
365{ 278{
366 sni_pcimt_resource_init();
367 sni_pcimt_detect(); 279 sni_pcimt_detect();
368 sni_pcimt_sc_init(); 280 sni_pcimt_sc_init();
369 rtc_mips_get_time = mc146818_get_cmos_time; 281 rtc_mips_get_time = mc146818_get_cmos_time;
370 rtc_mips_set_time = mc146818_set_rtc_mmss; 282 rtc_mips_set_time = mc146818_set_rtc_mmss;
371 board_time_init = sni_cpu_time_init; 283 board_time_init = sni_cpu_time_init;
284 ioport_resource.end = sni_io_resource.end;
372#ifdef CONFIG_PCI 285#ifdef CONFIG_PCI
286 PCIBIOS_MIN_IO = 0x9000;
373 register_pci_controller(&sni_controller); 287 register_pci_controller(&sni_controller);
374#endif 288#endif
289 sni_pcimt_resource_init();
375} 290}
376 291
377static int __init snirm_pcimt_setup_devinit(void) 292static int __init snirm_pcimt_setup_devinit(void)
diff --git a/arch/mips/sni/pcit.c b/arch/mips/sni/pcit.c
index 1dfc3f00bbd3..00d151f4d121 100644
--- a/arch/mips/sni/pcit.c
+++ b/arch/mips/sni/pcit.c
@@ -43,7 +43,7 @@ static struct platform_device pcit_serial8250_device = {
43}; 43};
44 44
45static struct plat_serial8250_port pcit_cplus_data[] = { 45static struct plat_serial8250_port pcit_cplus_data[] = {
46 PORT(0x3f8, 4), 46 PORT(0x3f8, 0),
47 PORT(0x2f8, 3), 47 PORT(0x2f8, 3),
48 PORT(0x3e8, 4), 48 PORT(0x3e8, 4),
49 PORT(0x2e8, 3), 49 PORT(0x2e8, 3),
@@ -59,9 +59,9 @@ static struct platform_device pcit_cplus_serial8250_device = {
59}; 59};
60 60
61static struct resource sni_io_resource = { 61static struct resource sni_io_resource = {
62 .start = 0x00001000UL, 62 .start = 0x00000000UL,
63 .end = 0x03bfffffUL, 63 .end = 0x03bfffffUL,
64 .name = "PCIT IO MEM", 64 .name = "PCIT IO",
65 .flags = IORESOURCE_IO, 65 .flags = IORESOURCE_IO,
66}; 66};
67 67
@@ -92,6 +92,11 @@ static struct resource pcit_io_resources[] = {
92 .name = "dma2", 92 .name = "dma2",
93 .flags = IORESOURCE_BUSY 93 .flags = IORESOURCE_BUSY
94 }, { 94 }, {
95 .start = 0xcf8,
96 .end = 0xcfb,
97 .name = "PCI config addr",
98 .flags = IORESOURCE_BUSY
99 }, {
95 .start = 0xcfc, 100 .start = 0xcfc,
96 .end = 0xcff, 101 .end = 0xcff,
97 .name = "PCI config data", 102 .name = "PCI config data",
@@ -100,107 +105,19 @@ static struct resource pcit_io_resources[] = {
100}; 105};
101 106
102static struct resource sni_mem_resource = { 107static struct resource sni_mem_resource = {
103 .start = 0x10000000UL, 108 .start = 0x18000000UL,
104 .end = 0xffffffffUL, 109 .end = 0x1fbfffffUL,
105 .name = "PCIT PCI MEM", 110 .name = "PCIT PCI MEM",
106 .flags = IORESOURCE_MEM 111 .flags = IORESOURCE_MEM
107}; 112};
108 113
109/*
110 * The RM200/RM300 has a few holes in it's PCI/EISA memory address space used
111 * for other purposes. Be paranoid and allocate all of the before the PCI
112 * code gets a chance to to map anything else there ...
113 *
114 * This leaves the following areas available:
115 *
116 * 0x10000000 - 0x1009ffff (640kB) PCI/EISA/ISA Bus Memory
117 * 0x10100000 - 0x13ffffff ( 15MB) PCI/EISA/ISA Bus Memory
118 * 0x18000000 - 0x1fbfffff (124MB) PCI/EISA Bus Memory
119 * 0x1ff08000 - 0x1ffeffff (816kB) PCI/EISA Bus Memory
120 * 0xa0000000 - 0xffffffff (1.5GB) PCI/EISA Bus Memory
121 */
122static struct resource pcit_mem_resources[] = {
123 {
124 .start = 0x14000000,
125 .end = 0x17bfffff,
126 .name = "PCI IO",
127 .flags = IORESOURCE_BUSY
128 }, {
129 .start = 0x17c00000,
130 .end = 0x17ffffff,
131 .name = "Cache Replacement Area",
132 .flags = IORESOURCE_BUSY
133 }, {
134 .start = 0x180a0000,
135 .end = 0x180bffff,
136 .name = "Video RAM area",
137 .flags = IORESOURCE_BUSY
138 }, {
139 .start = 0x180c0000,
140 .end = 0x180fffff,
141 .name = "ISA Reserved",
142 .flags = IORESOURCE_BUSY
143 }, {
144 .start = 0x19000000,
145 .end = 0x1fbfffff,
146 .name = "PCI MEM",
147 .flags = IORESOURCE_BUSY
148 }, {
149 .start = 0x1fc00000,
150 .end = 0x1fc7ffff,
151 .name = "Boot PROM",
152 .flags = IORESOURCE_BUSY
153 }, {
154 .start = 0x1fc80000,
155 .end = 0x1fcfffff,
156 .name = "Diag PROM",
157 .flags = IORESOURCE_BUSY
158 }, {
159 .start = 0x1fd00000,
160 .end = 0x1fdfffff,
161 .name = "X-Bus",
162 .flags = IORESOURCE_BUSY
163 }, {
164 .start = 0x1fe00000,
165 .end = 0x1fefffff,
166 .name = "BIOS map",
167 .flags = IORESOURCE_BUSY
168 }, {
169 .start = 0x1ff00000,
170 .end = 0x1ff7ffff,
171 .name = "NVRAM / EEPROM",
172 .flags = IORESOURCE_BUSY
173 }, {
174 .start = 0x1fff0000,
175 .end = 0x1fffefff,
176 .name = "MAUI ASIC",
177 .flags = IORESOURCE_BUSY
178 }, {
179 .start = 0x1ffff000,
180 .end = 0x1fffffff,
181 .name = "MP Agent",
182 .flags = IORESOURCE_BUSY
183 }, {
184 .start = 0x20000000,
185 .end = 0x9fffffff,
186 .name = "Main Memory",
187 .flags = IORESOURCE_BUSY
188 }
189};
190
191static void __init sni_pcit_resource_init(void) 114static void __init sni_pcit_resource_init(void)
192{ 115{
193 int i; 116 int i;
194 117
195 /* request I/O space for devices used on all i[345]86 PCs */ 118 /* request I/O space for devices used on all i[345]86 PCs */
196 for (i = 0; i < ARRAY_SIZE(pcit_io_resources); i++) 119 for (i = 0; i < ARRAY_SIZE(pcit_io_resources); i++)
197 request_resource(&ioport_resource, pcit_io_resources + i); 120 request_resource(&sni_io_resource, pcit_io_resources + i);
198
199 /* request mem space for pcimt-specific devices */
200 for (i = 0; i < ARRAY_SIZE(pcit_mem_resources); i++)
201 request_resource(&sni_mem_resource, pcit_mem_resources + i);
202
203 ioport_resource.end = sni_io_resource.end;
204} 121}
205 122
206 123
@@ -209,9 +126,10 @@ extern struct pci_ops sni_pcit_ops;
209static struct pci_controller sni_pcit_controller = { 126static struct pci_controller sni_pcit_controller = {
210 .pci_ops = &sni_pcit_ops, 127 .pci_ops = &sni_pcit_ops,
211 .mem_resource = &sni_mem_resource, 128 .mem_resource = &sni_mem_resource,
212 .mem_offset = 0x10000000UL, 129 .mem_offset = 0x00000000UL,
213 .io_resource = &sni_io_resource, 130 .io_resource = &sni_io_resource,
214 .io_offset = 0x00000000UL 131 .io_offset = 0x00000000UL,
132 .io_map_base = SNI_PORT_BASE
215}; 133};
216 134
217static void enable_pcit_irq(unsigned int irq) 135static void enable_pcit_irq(unsigned int irq)
@@ -262,7 +180,7 @@ static void pcit_hwint0(void)
262 int irq; 180 int irq;
263 181
264 clear_c0_status(IE_IRQ0); 182 clear_c0_status(IE_IRQ0);
265 irq = ffs((pending >> 16) & 0x7f); 183 irq = ffs((pending >> 16) & 0x3f);
266 184
267 if (likely(irq > 0)) 185 if (likely(irq > 0))
268 do_IRQ (irq + SNI_PCIT_INT_START - 1); 186 do_IRQ (irq + SNI_PCIT_INT_START - 1);
@@ -289,6 +207,8 @@ static void sni_pcit_hwint_cplus(void)
289 207
290 if (pending & C_IRQ0) 208 if (pending & C_IRQ0)
291 pcit_hwint0(); 209 pcit_hwint0();
210 else if (pending & C_IRQ1)
211 do_IRQ (MIPS_CPU_IRQ_BASE + 3);
292 else if (pending & C_IRQ2) 212 else if (pending & C_IRQ2)
293 do_IRQ (MIPS_CPU_IRQ_BASE + 4); 213 do_IRQ (MIPS_CPU_IRQ_BASE + 4);
294 else if (pending & C_IRQ3) 214 else if (pending & C_IRQ3)
@@ -317,21 +237,23 @@ void __init sni_pcit_cplus_irq_init(void)
317 mips_cpu_irq_init(); 237 mips_cpu_irq_init();
318 for (i = SNI_PCIT_INT_START; i <= SNI_PCIT_INT_END; i++) 238 for (i = SNI_PCIT_INT_START; i <= SNI_PCIT_INT_END; i++)
319 set_irq_chip(i, &pcit_irq_type); 239 set_irq_chip(i, &pcit_irq_type);
320 *(volatile u32 *)SNI_PCIT_INT_REG = 0; 240 *(volatile u32 *)SNI_PCIT_INT_REG = 0x40000000;
321 sni_hwint = sni_pcit_hwint_cplus; 241 sni_hwint = sni_pcit_hwint_cplus;
322 change_c0_status(ST0_IM, IE_IRQ0); 242 change_c0_status(ST0_IM, IE_IRQ0);
323 setup_irq (SNI_PCIT_INT_START + 6, &sni_isa_irq); 243 setup_irq (MIPS_CPU_IRQ_BASE + 3, &sni_isa_irq);
324} 244}
325 245
326void sni_pcit_init(void) 246void sni_pcit_init(void)
327{ 247{
328 sni_pcit_resource_init();
329 rtc_mips_get_time = mc146818_get_cmos_time; 248 rtc_mips_get_time = mc146818_get_cmos_time;
330 rtc_mips_set_time = mc146818_set_rtc_mmss; 249 rtc_mips_set_time = mc146818_set_rtc_mmss;
331 board_time_init = sni_cpu_time_init; 250 board_time_init = sni_cpu_time_init;
251 ioport_resource.end = sni_io_resource.end;
332#ifdef CONFIG_PCI 252#ifdef CONFIG_PCI
253 PCIBIOS_MIN_IO = 0x9000;
333 register_pci_controller(&sni_pcit_controller); 254 register_pci_controller(&sni_pcit_controller);
334#endif 255#endif
256 sni_pcit_resource_init();
335} 257}
336 258
337static int __init snirm_pcit_setup_devinit(void) 259static int __init snirm_pcit_setup_devinit(void)
diff --git a/arch/mips/vr41xx/Kconfig b/arch/mips/vr41xx/Kconfig
index 92f41f6f934a..8f4d3e74c230 100644
--- a/arch/mips/vr41xx/Kconfig
+++ b/arch/mips/vr41xx/Kconfig
@@ -1,6 +1,10 @@
1config CASIO_E55 1choice
2 bool "Support for CASIO CASSIOPEIA E-10/15/55/65" 2 prompt "Machine type"
3 depends on MACH_VR41XX 3 depends on MACH_VR41XX
4 default TANBAC_TB022X
5
6config CASIO_E55
7 bool "CASIO CASSIOPEIA E-10/15/55/65"
4 select DMA_NONCOHERENT 8 select DMA_NONCOHERENT
5 select IRQ_CPU 9 select IRQ_CPU
6 select ISA 10 select ISA
@@ -8,8 +12,7 @@ config CASIO_E55
8 select SYS_SUPPORTS_LITTLE_ENDIAN 12 select SYS_SUPPORTS_LITTLE_ENDIAN
9 13
10config IBM_WORKPAD 14config IBM_WORKPAD
11 bool "Support for IBM WorkPad z50" 15 bool "IBM WorkPad z50"
12 depends on MACH_VR41XX
13 select DMA_NONCOHERENT 16 select DMA_NONCOHERENT
14 select IRQ_CPU 17 select IRQ_CPU
15 select ISA 18 select ISA
@@ -17,26 +20,18 @@ config IBM_WORKPAD
17 select SYS_SUPPORTS_LITTLE_ENDIAN 20 select SYS_SUPPORTS_LITTLE_ENDIAN
18 21
19config NEC_CMBVR4133 22config NEC_CMBVR4133
20 bool "Support for NEC CMB-VR4133" 23 bool "NEC CMB-VR4133"
21 depends on MACH_VR41XX
22 select DMA_NONCOHERENT 24 select DMA_NONCOHERENT
23 select IRQ_CPU 25 select IRQ_CPU
24 select HW_HAS_PCI 26 select HW_HAS_PCI
25 select SYS_SUPPORTS_32BIT_KERNEL 27 select SYS_SUPPORTS_32BIT_KERNEL
26 select SYS_SUPPORTS_LITTLE_ENDIAN 28 select SYS_SUPPORTS_LITTLE_ENDIAN
27 29
28config ROCKHOPPER
29 bool "Support for Rockhopper baseboard"
30 depends on NEC_CMBVR4133
31 select I8259
32 select HAVE_STD_PC_SERIAL_PORT
33
34config TANBAC_TB022X 30config TANBAC_TB022X
35 bool "Support for TANBAC VR4131 multichip module and TANBAC VR4131DIMM" 31 bool "TANBAC VR4131 multichip module and TANBAC VR4131DIMM"
36 depends on MACH_VR41XX
37 select DMA_NONCOHERENT 32 select DMA_NONCOHERENT
38 select HW_HAS_PCI
39 select IRQ_CPU 33 select IRQ_CPU
34 select HW_HAS_PCI
40 select SYS_SUPPORTS_32BIT_KERNEL 35 select SYS_SUPPORTS_32BIT_KERNEL
41 select SYS_SUPPORTS_LITTLE_ENDIAN 36 select SYS_SUPPORTS_LITTLE_ENDIAN
42 help 37 help
@@ -46,40 +41,65 @@ config TANBAC_TB022X
46 Please refer to <http://www.tanbac.co.jp/> 41 Please refer to <http://www.tanbac.co.jp/>
47 about VR4131 multichip module and VR4131DIMM. 42 about VR4131 multichip module and VR4131DIMM.
48 43
49config TANBAC_TB0226 44config VICTOR_MPC30X
50 bool "Support for TANBAC Mbase(TB0226)" 45 bool "Victor MP-C303/304"
46 select DMA_NONCOHERENT
47 select IRQ_CPU
48 select HW_HAS_PCI
49 select PCI_VR41XX
50 select SYS_SUPPORTS_32BIT_KERNEL
51 select SYS_SUPPORTS_LITTLE_ENDIAN
52
53config ZAO_CAPCELLA
54 bool "ZAO Networks Capcella"
55 select DMA_NONCOHERENT
56 select IRQ_CPU
57 select HW_HAS_PCI
58 select PCI_VR41XX
59 select SYS_SUPPORTS_32BIT_KERNEL
60 select SYS_SUPPORTS_LITTLE_ENDIAN
61
62endchoice
63
64config ROCKHOPPER
65 bool "Support for Rockhopper base board"
66 depends on NEC_CMBVR4133
67 select PCI_VR41XX
68 select I8259
69 select HAVE_STD_PC_SERIAL_PORT
70
71choice
72 prompt "Base board type"
51 depends on TANBAC_TB022X 73 depends on TANBAC_TB022X
74 default TANBAC_TB0287
75
76config TANBAC_TB0219
77 bool "TANBAC DIMM Evaluation Kit(TB0219)"
52 select GPIO_VR41XX 78 select GPIO_VR41XX
79 select PCI_VR41XX
80 help
81 The TANBAC DIMM Evaluation Kit(TB0219) is a MIPS-based platform
82 manufactured by TANBAC.
83 Please refer to <http://www.tanbac.co.jp/> about DIMM Evaluation Kit.
84
85config TANBAC_TB0226
86 bool "TANBAC Mbase(TB0226)"
87 select GPIO_VR41XX
88 select PCI_VR41XX
53 help 89 help
54 The TANBAC Mbase(TB0226) is a MIPS-based platform 90 The TANBAC Mbase(TB0226) is a MIPS-based platform
55 manufactured by TANBAC. 91 manufactured by TANBAC.
56 Please refer to <http://www.tanbac.co.jp/> about Mbase. 92 Please refer to <http://www.tanbac.co.jp/> about Mbase.
57 93
58config TANBAC_TB0287 94config TANBAC_TB0287
59 bool "Support for TANBAC Mini-ITX DIMM base(TB0287)" 95 bool "TANBAC Mini-ITX DIMM base(TB0287)"
60 depends on TANBAC_TB022X 96 select PCI_VR41XX
61 help 97 help
62 The TANBAC Mini-ITX DIMM base(TB0287) is a MIPS-based platform 98 The TANBAC Mini-ITX DIMM base(TB0287) is a MIPS-based platform
63 manufactured by TANBAC. 99 manufactured by TANBAC.
64 Please refer to <http://www.tanbac.co.jp/> about Mini-ITX DIMM base. 100 Please refer to <http://www.tanbac.co.jp/> about Mini-ITX DIMM base.
65 101
66config VICTOR_MPC30X 102endchoice
67 bool "Support for Victor MP-C303/304"
68 depends on MACH_VR41XX
69 select DMA_NONCOHERENT
70 select HW_HAS_PCI
71 select IRQ_CPU
72 select SYS_SUPPORTS_32BIT_KERNEL
73 select SYS_SUPPORTS_LITTLE_ENDIAN
74
75config ZAO_CAPCELLA
76 bool "Support for ZAO Networks Capcella"
77 depends on MACH_VR41XX
78 select DMA_NONCOHERENT
79 select HW_HAS_PCI
80 select IRQ_CPU
81 select SYS_SUPPORTS_32BIT_KERNEL
82 select SYS_SUPPORTS_LITTLE_ENDIAN
83 103
84config PCI_VR41XX 104config PCI_VR41XX
85 bool "Add PCI control unit support of NEC VR4100 series" 105 bool "Add PCI control unit support of NEC VR4100 series"
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-11 14:29:41 -0500