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authorH. Peter Anvin <hpa@zytor.com>2007-10-17 12:04:37 -0400
committerThomas Gleixner <tglx@inhelltoy.tec.linutronix.de>2007-10-17 14:16:12 -0400
commit6619a8fb594486363783cc4a8372e4d4ee4b913e (patch)
tree83130702b16dae3ccae5be54acd18993474ff757 /arch
parent9689ba8ad0dc27c0a2ce40eb4c0f8fb66551119c (diff)
x86: Create clflush() inline, remove hardcoded wbinvd
Create an inline function for clflush(), with the proper arguments, and use it instead of hard-coding the instruction. This also removes one instance of hard-coded wbinvd, based on a patch by Bauder de Oliveira Costa. [ tglx: arch/x86 adaptation ] Cc: Andi Kleen <andi@firstfloor.org> Cc: Glauber de Oliveira Costa <gcosta@redhat.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/kernel/tce_64.c4
-rw-r--r--arch/x86/mm/pageattr_32.c4
-rw-r--r--arch/x86/mm/pageattr_64.c2
3 files changed, 5 insertions, 5 deletions
diff --git a/arch/x86/kernel/tce_64.c b/arch/x86/kernel/tce_64.c
index e3f2569b2c44..9e540fee7009 100644
--- a/arch/x86/kernel/tce_64.c
+++ b/arch/x86/kernel/tce_64.c
@@ -40,9 +40,9 @@ static inline void flush_tce(void* tceaddr)
40{ 40{
41 /* a single tce can't cross a cache line */ 41 /* a single tce can't cross a cache line */
42 if (cpu_has_clflush) 42 if (cpu_has_clflush)
43 asm volatile("clflush (%0)" :: "r" (tceaddr)); 43 clflush(tceaddr);
44 else 44 else
45 asm volatile("wbinvd":::"memory"); 45 wbinvd();
46} 46}
47 47
48void tce_build(struct iommu_table *tbl, unsigned long index, 48void tce_build(struct iommu_table *tbl, unsigned long index,
diff --git a/arch/x86/mm/pageattr_32.c b/arch/x86/mm/pageattr_32.c
index 4241a74d16c8..260073c07600 100644
--- a/arch/x86/mm/pageattr_32.c
+++ b/arch/x86/mm/pageattr_32.c
@@ -70,10 +70,10 @@ static struct page *split_large_page(unsigned long address, pgprot_t prot,
70 70
71static void cache_flush_page(struct page *p) 71static void cache_flush_page(struct page *p)
72{ 72{
73 unsigned long adr = (unsigned long)page_address(p); 73 void *adr = page_address(p);
74 int i; 74 int i;
75 for (i = 0; i < PAGE_SIZE; i += boot_cpu_data.x86_clflush_size) 75 for (i = 0; i < PAGE_SIZE; i += boot_cpu_data.x86_clflush_size)
76 asm volatile("clflush (%0)" :: "r" (adr + i)); 76 clflush(adr+i);
77} 77}
78 78
79static void flush_kernel_map(void *arg) 79static void flush_kernel_map(void *arg)
diff --git a/arch/x86/mm/pageattr_64.c b/arch/x86/mm/pageattr_64.c
index 93d795d7c2ae..8a4f65bf956e 100644
--- a/arch/x86/mm/pageattr_64.c
+++ b/arch/x86/mm/pageattr_64.c
@@ -65,7 +65,7 @@ static void cache_flush_page(void *adr)
65{ 65{
66 int i; 66 int i;
67 for (i = 0; i < PAGE_SIZE; i += boot_cpu_data.x86_clflush_size) 67 for (i = 0; i < PAGE_SIZE; i += boot_cpu_data.x86_clflush_size)
68 asm volatile("clflush (%0)" :: "r" (adr + i)); 68 clflush(adr+i);
69} 69}
70 70
71static void flush_kernel_map(void *arg) 71static void flush_kernel_map(void *arg)